[PATCH] dt-bindings: display: convert faraday,tve200 to YAML
Converts display/faraday,tve200.txt to yaml.
Signed-off-by: Corentin Labbe
---
.../bindings/display/faraday,tve200.txt | 54 ---
.../bindings/display/faraday,tve200.yaml | 92 +++
2 files changed, 92 insertions(+), 54 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/faraday,tve200.txt
create mode 100644
Documentation/devicetree/bindings/display/faraday,tve200.yaml
diff --git a/Documentation/devicetree/bindings/display/faraday,tve200.txt
b/Documentation/devicetree/bindings/display/faraday,tve200.txt
deleted file mode 100644
index 82e3bc0b7485..
--- a/Documentation/devicetree/bindings/display/faraday,tve200.txt
+++ /dev/null
@@ -1,54 +0,0 @@
-* Faraday TV Encoder TVE200
-
-Required properties:
-
-- compatible: must be one of:
- "faraday,tve200"
- "cortina,gemini-tvc", "faraday,tve200"
-
-- reg: base address and size of the control registers block
-
-- interrupts: contains an interrupt specifier for the interrupt
- line from the TVE200
-
-- clock-names: should contain "PCLK" for the clock line clocking the
- silicon and "TVE" for the 27MHz clock to the video driver
-
-- clocks: contains phandle and clock specifier pairs for the entries
- in the clock-names property. See
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- resets: contains the reset line phandle for the block
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
- for video transmitter interfaces; see
- Documentation/devicetree/bindings/media/video-interfaces.txt
- This port should have the properties:
- reg = <0>;
- It should have one endpoint connected to a remote endpoint where
- the display is connected.
-
-Example:
-
-display-controller@6a00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "faraday,tve200";
- reg = <0x6a00 0x1000>;
- interrupts = <13 IRQ_TYPE_EDGE_RISING>;
- resets = <&syscon GEMINI_RESET_TVC>;
- clocks = <&syscon GEMINI_CLK_GATE_TVC>,
-<&syscon GEMINI_CLK_TVC>;
- clock-names = "PCLK", "TVE";
-
- port@0 {
- reg = <0>;
- display_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/faraday,tve200.yaml
b/Documentation/devicetree/bindings/display/faraday,tve200.yaml
new file mode 100644
index ..3ab51e7e72af
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/faraday,tve200.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/faraday,tve200.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Faraday TV Encoder TVE200
+
+maintainers:
+ - Linus Walleij
+
+properties:
+ compatible:
+oneOf:
+ - const: faraday,tve200
+ - items:
+ - const: cortina,gemini-tvc
+ - const: faraday,tve200
+
+ reg:
+minItems: 1
+
+ interrupts:
+minItems: 1
+
+ clock-names:
+items:
+ - const: PCLK
+ - const: TVE
+
+ clocks:
+minItems: 2
+
+ resets:
+minItems: 1
+
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+patternProperties:
+ "^port@[0-9]+$":
+type: object
+description: describes LCD panel signals, following the common binding
+ for video transmitter interfaces; see
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+ It should have one endpoint connected to a remote endpoint where
+ the display is connected.
+
+properties:
+ reg:
+const: 0
+
+required:
+ - reg
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+display-controller@6a00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "faraday,tve200";
+ reg = <0x6a00 0x1000>;
+ interrupts = <13 IRQ_TYPE_EDGE_RISING>;
+ resets = <&syscon GEMINI_RESET_TVC>;
+ clocks = <&syscon GEMINI_CLK_GATE_TVC>,
+ <&syscon GEMINI_CLK_TVC>;
+ clock-names = "PCLK", "TVE";
+
+ port@0 {
+reg = <0>;
+display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+};
+ };
+};
--
2.26.3
[PATCH v2 2/3] ARM: dts: gemini-dlink-dir-685: Remove address from display port
The address and reg adds no value to the port node, remove them.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index cc39289e99dd..2eeb142b5464 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -492,8 +492,7 @@ drive0: ide-port@0 {
display-controller@6a00 {
status = "okay";
- port@0 {
- reg = <0>;
+ port {
display_out: endpoint {
remote-endpoint = <&panel_in>;
};
--
2.26.3
[PATCH v2 3/3] ARM: dts: gemini: remove xxx-cells from display
dtb_check complains about #address-cells and #size-cells, so lets
remove them.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/gemini.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index fa708f5d0c72..34961e5bc7b2 100644
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -417,8 +417,6 @@ display-controller@6a00 {
clock-names = "PCLK", "TVE";
pinctrl-names = "default";
pinctrl-0 = <&tvc_default_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
};
--
2.26.3
[PATCH v2 1/3] dt-bindings: display: convert faraday,tve200
Converts display/faraday,tve200.txt to yaml.
Signed-off-by: Corentin Labbe
---
Changes since v1:
- added two subsequent patchs fixing issue found when converting
- fixed all issues reported by Rob Herring
.../bindings/display/faraday,tve200.txt | 54 ---
.../bindings/display/faraday,tve200.yaml | 68 +++
2 files changed, 68 insertions(+), 54 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/faraday,tve200.txt
create mode 100644
Documentation/devicetree/bindings/display/faraday,tve200.yaml
diff --git a/Documentation/devicetree/bindings/display/faraday,tve200.txt
b/Documentation/devicetree/bindings/display/faraday,tve200.txt
deleted file mode 100644
index 82e3bc0b7485..
--- a/Documentation/devicetree/bindings/display/faraday,tve200.txt
+++ /dev/null
@@ -1,54 +0,0 @@
-* Faraday TV Encoder TVE200
-
-Required properties:
-
-- compatible: must be one of:
- "faraday,tve200"
- "cortina,gemini-tvc", "faraday,tve200"
-
-- reg: base address and size of the control registers block
-
-- interrupts: contains an interrupt specifier for the interrupt
- line from the TVE200
-
-- clock-names: should contain "PCLK" for the clock line clocking the
- silicon and "TVE" for the 27MHz clock to the video driver
-
-- clocks: contains phandle and clock specifier pairs for the entries
- in the clock-names property. See
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- resets: contains the reset line phandle for the block
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
- for video transmitter interfaces; see
- Documentation/devicetree/bindings/media/video-interfaces.txt
- This port should have the properties:
- reg = <0>;
- It should have one endpoint connected to a remote endpoint where
- the display is connected.
-
-Example:
-
-display-controller@6a00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "faraday,tve200";
- reg = <0x6a00 0x1000>;
- interrupts = <13 IRQ_TYPE_EDGE_RISING>;
- resets = <&syscon GEMINI_RESET_TVC>;
- clocks = <&syscon GEMINI_CLK_GATE_TVC>,
-<&syscon GEMINI_CLK_TVC>;
- clock-names = "PCLK", "TVE";
-
- port@0 {
- reg = <0>;
- display_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/faraday,tve200.yaml
b/Documentation/devicetree/bindings/display/faraday,tve200.yaml
new file mode 100644
index ..e2ee77767321
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/faraday,tve200.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/faraday,tve200.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Faraday TV Encoder TVE200
+
+maintainers:
+ - Linus Walleij
+
+properties:
+ compatible:
+oneOf:
+ - const: faraday,tve200
+ - items:
+ - const: cortina,gemini-tvc
+ - const: faraday,tve200
+
+ reg:
+maxItems: 1
+
+ interrupts:
+minItems: 1
+
+ clock-names:
+items:
+ - const: PCLK
+ - const: TVE
+
+ clocks:
+minItems: 2
+
+ resets:
+minItems: 1
+
+ port:
+$ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+display-controller@6a00 {
+ compatible = "faraday,tve200";
+ reg = <0x6a00 0x1000>;
+ interrupts = <13 IRQ_TYPE_EDGE_RISING>;
+ resets = <&syscon GEMINI_RESET_TVC>;
+ clocks = <&syscon GEMINI_CLK_GATE_TVC>,
+ <&syscon GEMINI_CLK_TVC>;
+ clock-names = "PCLK", "TVE";
+
+ port {
+display_out: endpoint {
+ remote-endpoint = <&panel_in>;
+};
+ };
+};
--
2.26.3
nouveau: failed to initialise sync
Hello Since some days on next, nouveau fail to load: [2.754087] nouveau :02:00.0: vgaarb: deactivate vga console [2.761260] Console: switching to colour dummy device 80x25 [2.766888] nouveau :02:00.0: NVIDIA MCP77/MCP78 (0aa480a2) [2.783954] nouveau :02:00.0: bios: version 62.77.2a.00.04 [2.810122] nouveau :02:00.0: fb: 256 MiB stolen system memory [3.484031] nouveau :02:00.0: DRM: VRAM: 256 MiB [3.488993] nouveau :02:00.0: DRM: GART: 1048576 MiB [3.494308] nouveau :02:00.0: DRM: TMDS table version 2.0 [3.500052] nouveau :02:00.0: DRM: DCB version 4.0 [3.505192] nouveau :02:00.0: DRM: DCB outp 00: 01000300 001e [3.511632] nouveau :02:00.0: DRM: DCB outp 01: 01011332 00020010 [3.518074] nouveau :02:00.0: DRM: DCB conn 00: 0100 [3.523728] nouveau :02:00.0: DRM: DCB conn 01: 1261 [3.529455] nouveau :02:00.0: DRM: failed to initialise sync subsystem, -28 [3.545946] nouveau: probe of :02:00.0 failed with error -28 I bisected it to: git bisect start # good: [62fb9874f5da54fdb243003b386128037319b219] Linux 5.13 git bisect good 62fb9874f5da54fdb243003b386128037319b219 # bad: [fb0ca446157a86b75502c1636b0d81e642fe6bf1] Add linux-next specific files for 20210701 git bisect bad fb0ca446157a86b75502c1636b0d81e642fe6bf1 # good: [f63c4fda987a19b1194cc45cb72fd5bf968d9d90] Merge remote-tracking branch 'rdma/for-next' git bisect good f63c4fda987a19b1194cc45cb72fd5bf968d9d90 # bad: [49c8769be0b910d4134eba07cae5d9c71b861c4a] Merge remote-tracking branch 'drm/drm-next' git bisect bad 49c8769be0b910d4134eba07cae5d9c71b861c4a # good: [4e3db44a242a4e2afe33b59793898ecbb61d478e] Merge tag 'wireless-drivers-next-2021-06-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next git bisect good 4e3db44a242a4e2afe33b59793898ecbb61d478e # bad: [5745d647d5563d3e9d32013ad4e5c629acff04d7] Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next git bisect bad 5745d647d5563d3e9d32013ad4e5c629acff04d7 # bad: [c99c4d0ca57c978dcc2a2f41ab8449684ea154cc] Merge tag 'amd-drm-next-5.14-2021-05-19' of https://gitlab.freedesktop.org/agd5f/linux into drm-next git bisect bad c99c4d0ca57c978dcc2a2f41ab8449684ea154cc # bad: [ae25ec2fc6c5a9e5767bf1922cd648501d0f914c] Merge tag 'drm-misc-next-2021-05-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next git bisect bad ae25ec2fc6c5a9e5767bf1922cd648501d0f914c # bad: [cac80e71cfb0b00202d743c6e90333c45ba77cc5] drm/vkms: rename cursor to plane on ops of planes composition git bisect bad cac80e71cfb0b00202d743c6e90333c45ba77cc5 # good: [178bdba84c5f0ad14de384fc7f15fba0e272919d] drm/ttm/ttm_device: Demote kernel-doc abuses git bisect good 178bdba84c5f0ad14de384fc7f15fba0e272919d # bad: [3f3a6524f6065fd3d130515e012f63eac74d96da] drm/dp: Clarify DP AUX registration time git bisect bad 3f3a6524f6065fd3d130515e012f63eac74d96da # bad: [6dd7efc437611db16d432e0030f72d0c7e890127] drm/gud: cleanup coding style a bit git bisect bad 6dd7efc437611db16d432e0030f72d0c7e890127 # bad: [13b29cc3a722c2c0bc9ab9f72f9047d55d08a2f9] drm/mxsfb: Don't select DRM_KMS_FB_HELPER git bisect bad 13b29cc3a722c2c0bc9ab9f72f9047d55d08a2f9 # bad: [d02117f8efaa5fbc37437df1ae955a147a2a424a] drm/ttm: remove special handling for non GEM drivers git bisect bad d02117f8efaa5fbc37437df1ae955a147a2a424a # good: [13ea9aa1e7d891e950230e82f1dd2c84e5debcff] drm/ttm: fix error handling if no BO can be swapped out v4 git bisect good 13ea9aa1e7d891e950230e82f1dd2c84e5debcff # first bad commit: [d02117f8efaa5fbc37437df1ae955a147a2a424a] drm/ttm: remove special handling for non GEM drivers Reverting the patch permit to have nouveau works again. Regards
[PATCH] dt-bindings: display: mediatek: Add includes on examples
make dt_binding_check fail on lot of mediatek bindings due to missing
includes.
Signed-off-by: Corentin Labbe
---
2 files remains to be fixed, but their examples use some variable undefined, so
I cannot do anything:
- display/mediatek/mediatek,ethdr.yaml
- display/mediatek/mediatek,merge.yaml
.../display/mediatek/mediatek,aal.yaml| 4 +
.../display/mediatek/mediatek,ccorr.yaml | 4 +
.../display/mediatek/mediatek,color.yaml | 4 +
.../display/mediatek/mediatek,dither.yaml | 4 +
.../display/mediatek/mediatek,dsc.yaml| 4 +
.../display/mediatek/mediatek,gamma.yaml | 4 +
.../display/mediatek/mediatek,mutex.yaml | 4 +
.../display/mediatek/mediatek,od.yaml | 1 +
.../display/mediatek/mediatek,ovl-2l.yaml | 5 +
.../display/mediatek/mediatek,ovl.yaml| 5 +
.../display/mediatek/mediatek,postmask.yaml | 4 +
.../display/mediatek/mediatek,rdma.yaml | 5 +
.../display/mediatek/mediatek,split.yaml | 3 +
.../display/mediatek/mediatek,ufoe.yaml | 3 +
.../display/mediatek/mediatek,wdma.yaml | 5 +
17 files changed, 59 insertions(+), 257 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
index 225f9dd726d2..63755d4d21d7 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
@@ -66,6 +66,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
aal@14015000 {
compatible = "mediatek,mt8173-disp-aal";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
index 6894b6999412..b32355b32dfa 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
@@ -65,6 +65,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
ccorr0: ccorr@1400f000 {
compatible = "mediatek,mt8183-disp-ccorr";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
index bc83155b3b4c..ffdef0b30de8 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
@@ -75,6 +75,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
color0: color@14013000 {
compatible = "mediatek,mt8173-disp-color";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
index 9d89297f5f1d..7ac58022a2ed 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
@@ -65,6 +65,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
dither0: dither@14012000 {
compatible = "mediatek,mt8183-disp-dither";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
index 1ec083eff824..1ab30b0efffe 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
@@ -60,6 +60,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
dsc0: disp_dsc_wrap@1c009000 {
compatible = "mediatek,mt8195-disp-dsc";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
index 247baad147b3..4f8ba492dc0a 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
@@ -66,6 +66,10 @@ additionalProperties: false
examples:
- |
+#include
+#include
+#include
+#include
gamma@14016000 {
compatible = "mediatek,mt8173-disp-gamma";
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
index 6eca525eced0..ad3a69d1254c 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
@@ -71,6 +71,10 @@ additionalProper
[PATCH] backlight: led_bl: Add support for an "enable" GPIO
From: Jean-Jacques Hiblot
This patch adds support for an "enable GPIO".
Signed-off-by: Jean-Jacques Hiblot
Signed-off-by: Corentin LABBE
---
drivers/video/backlight/led_bl.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/video/backlight/led_bl.c b/drivers/video/backlight/led_bl.c
index f54d256e2d54..ebd7acc32980 100644
--- a/drivers/video/backlight/led_bl.c
+++ b/drivers/video/backlight/led_bl.c
@@ -8,6 +8,7 @@
#include
#include
+#include
#include
#include
@@ -15,6 +16,7 @@ struct led_bl_data {
struct device *dev;
struct backlight_device *bl_dev;
struct led_classdev **leds;
+ struct gpio_desc*enable_gpio;
boolenabled;
int nb_leds;
unsigned int*levels;
@@ -35,6 +37,9 @@ static void led_bl_set_brightness(struct led_bl_data *priv,
int level)
for (i = 0; i < priv->nb_leds; i++)
led_set_brightness(priv->leds[i], bkl_brightness);
+ if (!priv->enabled)
+ gpiod_set_value_cansleep(priv->enable_gpio, 1);
+
priv->enabled = true;
}
@@ -48,6 +53,9 @@ static void led_bl_power_off(struct led_bl_data *priv)
for (i = 0; i < priv->nb_leds; i++)
led_set_brightness(priv->leds[i], LED_OFF);
+ if (priv->enabled)
+ gpiod_set_value_cansleep(priv->enable_gpio, 0);
+
priv->enabled = false;
}
@@ -209,6 +217,11 @@ static int led_bl_probe(struct platform_device *pdev)
return PTR_ERR(priv->bl_dev);
}
+ priv->enable_gpio = devm_gpiod_get_optional(&pdev->dev, "enable",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(priv->enable_gpio))
+ return PTR_ERR(priv->enable_gpio);
+
for (i = 0; i < priv->nb_leds; i++)
led_sysfs_disable(priv->leds[i]);
--
2.25.1
drm: sun4i: segmentation fault with rmmod sun4i_drm
Hello When I rmmod sun4i_drm I got [ 546.417886] Internal error: Oops: 17 [#1] SMP ARM [ 547.024731] CPU: 0 PID: 18811 Comm: rmmod Not tainted 5.1.0-next-20190515-00100-gf33d93f7d2a0 #39 [ 547.033588] Hardware name: Allwinner sun7i (A20) Family [ 547.038816] PC is at drm_connector_cleanup+0x48/0x210 [ 547.043874] LR is at sun4i_hdmi_unbind+0x18/0x5c [sun4i_drm_hdmi] [ 547.049959] pc : []lr : []psr: a013 [ 547.056217] sp : c46e1e90 ip : fp : [ 547.061435] r10: 0081 r9 : c46e r8 : c0301204 [ 547.066653] r7 : r6 : c4b918a0 r5 : c4b91840 r4 : [ 547.073171] r3 : r2 : r1 : ee900210 r0 : c4b91840 [ 547.079691] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 547.086817] Control: 10c5387d Table: 446d406a DAC: 0051 [ 547.092559] Process rmmod (pid: 18811, stack limit = 0x566ffc72) [ 547.098559] Stack: (0xc46e1e90 to 0xc46e2000) [ 547.102915] 1e80: c4b91840 c4df5d80 0018 [ 547.111086] 1ea0: c0301204 c46e 0081 bf051344 c4db7200 c4df5d80 0018 c0974360 [ 547.119256] 1ec0: 21c0d377 c46e1ec8 000e c4df5d80 c0974430 c4dc9800 ee900210 [ 547.127426] 1ee0: bf02003c 0081 c0301204 bf01f054 c4df5d80 ee900210 bf02003c c0974680 [ 547.135596] 1f00: c4df5d80 c0974728 ee900210 ee900210 bf022104 bf01f014 ee900210 c097c648 [ 547.143767] 1f20: ee900210 c1845388 bf022104 c097ae98 ee900210 bf022104 bed8eb98 c097afd4 [ 547.151937] 1f40: bf022104 bf022180 bed8eb98 c0979c8c c46e c03d4ea0 346e7573 72645f69 [ 547.160107] 1f60: b6fa006d c170ae04 0017 c031659c b6f048cc c46e1fb0 bed8ee14 000a2060 [ 547.168278] 1f80: bed8eb7c c0316a74 21c0d377 00d8ed28 21c0d377 000278d4 346e7573 [ 547.176448] 1fa0: 72645f69 c0301000 000278d4 346e7573 bed8eb98 0880 bed8ee18 [ 547.184618] 1fc0: 000278d4 346e7573 72645f69 0081 b6fa2000 [ 547.192788] 1fe0: bed8eb90 bed8eb80 000277b8 b6ea8420 6010 bed8eb98 [ 547.200979] [] (drm_connector_cleanup) from [] (sun4i_hdmi_unbind+0x18/0x5c [sun4i_drm_hdmi]) [ 547.211244] [] (sun4i_hdmi_unbind [sun4i_drm_hdmi]) from [] (component_unbind+0x30/0x68) [ 547.221063] [] (component_unbind) from [] (component_unbind_all+0x98/0xbc) [ 547.229670] [] (component_unbind_all) from [] (sun4i_drv_unbind+0x38/0x4c [sun4i_drm]) [ 547.239317] [] (sun4i_drv_unbind [sun4i_drm]) from [] (take_down_master.part.0+0x18/0x30) [ 547.249221] [] (take_down_master.part.0) from [] (component_master_del+0x90/0x94) [ 547.258433] [] (component_master_del) from [] (sun4i_drv_remove+0x14/0x1c [sun4i_drm]) [ 547.268080] [] (sun4i_drv_remove [sun4i_drm]) from [] (platform_drv_remove+0x24/0x3c) [ 547.277641] [] (platform_drv_remove) from [] (device_release_driver_internal+0xdc/0x1ac) [ 547.287462] [] (device_release_driver_internal) from [] (driver_detach+0x54/0xa0) [ 547.296675] [] (driver_detach) from [] (bus_remove_driver+0x4c/0xa0) [ 547.304762] [] (bus_remove_driver) from [] (sys_delete_module+0x178/0x1f4) [ 547.313370] [] (sys_delete_module) from [] (ret_fast_syscall+0x0/0x54) [ 547.321622] Exception stack(0xc46e1fa8 to 0xc46e1ff0) [ 547.326671] 1fa0: 000278d4 346e7573 bed8eb98 0880 bed8ee18 [ 547.334841] 1fc0: 000278d4 346e7573 72645f69 0081 b6fa2000 [ 547.343008] 1fe0: bed8eb90 bed8eb80 000277b8 b6ea8420 [ 547.348061] Code: e5853310 e1a06005 e5b63060 e1560003 (e5934000) [ 547.354336] ---[ end trace 8bd87feb5ea08d7d ]--- Segmentation fault This occurs both on qemu-cubieboard and cubieboard2 Regards
DMA-API: cacheline tracking ENOMEM, dma-debug disabled due to nouveau ?
Hello Since lot of release (at least since 4.19), I hit the following error message: DMA-API: cacheline tracking ENOMEM, dma-debug disabled After hitting that, I try to check who is creating so many DMA mapping and see: cat /sys/kernel/debug/dma-api/dump | cut -d' ' -f2 | sort | uniq -c 6 ahci 257 e1000e 6 ehci-pci 5891 nouveau 24 uhci_hcd Does nouveau having this high number of DMA mapping is normal ? Regards ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: DMA-API: cacheline tracking ENOMEM, dma-debug disabled due to nouveau ?
On Wed, Aug 14, 2019 at 07:49:27PM +0200, Daniel Vetter wrote: > On Wed, Aug 14, 2019 at 04:50:33PM +0200, Corentin Labbe wrote: > > Hello > > > > Since lot of release (at least since 4.19), I hit the following error > > message: > > DMA-API: cacheline tracking ENOMEM, dma-debug disabled > > > > After hitting that, I try to check who is creating so many DMA mapping and > > see: > > cat /sys/kernel/debug/dma-api/dump | cut -d' ' -f2 | sort | uniq -c > > 6 ahci > > 257 e1000e > > 6 ehci-pci > >5891 nouveau > > 24 uhci_hcd > > > > Does nouveau having this high number of DMA mapping is normal ? > > Yeah seems perfectly fine for a gpu. Note that it never go down and when I terminate my X session, it stays the same. So without any "real" GPU work, does it is still normal to have so many active mapping ? For example, when doing some transfer, the ahci mapping number changes and then always go down to 6. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] Gpu: drm: rockchip - Fix possible NULL derefrence.
On Fri, Jan 27, 2017 at 04:41:50PM +0530, Shailendra Verma wrote:
> of_match_device could return NULL, and so can cause a NULL
> pointer dereference later.
>
> Signed-off-by: Shailendra Verma
> ---
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 13 ++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index ca22e5e..dbb99cf 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -1082,15 +1082,22 @@ static enum drm_mode_status
> rk3288_mipi_dsi_mode_valid(
> static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
>void *data)
> {
> - const struct of_device_id *of_id =
> - of_match_device(dw_mipi_dsi_dt_ids, dev);
> - const struct dw_mipi_dsi_plat_data *pdata = of_id->data;
> + const struct of_device_id *of_id;
> + const struct dw_mipi_dsi_plat_data *pdata;
> struct platform_device *pdev = to_platform_device(dev);
> struct drm_device *drm = data;
> struct dw_mipi_dsi *dsi;
> struct resource *res;
> int ret;
>
> + of_id = of_match_device(dw_mipi_dsi_dt_ids, dev);
> + if (!of_id) {
> + dev_err(dev, "Error: No device match found\n");
> + return -ENODEV;
> + }
> +
> + pdata = of_id->data;
> +
> dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
> if (!dsi)
> return -ENOMEM;
Hello
You could use of_device_get_match_data()
Regards
Corentin Labbe
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[PATCH] drm: remove writeq/readq function definitions
Instead of rewriting write/readq, use linux/io-64-nonatomic-lo-hi.h which
already have them.
Signed-off-by: Corentin Labbe
---
include/drm/drm_os_linux.h | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h
index 35e1482ba8a1..10122353b744 100644
--- a/include/drm/drm_os_linux.h
+++ b/include/drm/drm_os_linux.h
@@ -6,19 +6,7 @@
#include/* For task queue support */
#include
#include
-
-#ifndef readq
-static inline u64 readq(void __iomem *reg)
-{
- return ((u64) readl(reg)) | (((u64) readl(reg + 4UL)) << 32);
-}
-
-static inline void writeq(u64 val, void __iomem *reg)
-{
- writel(val & 0x, reg);
- writel(val >> 32, reg + 0x4UL);
-}
-#endif
+#include
/** Current process ID */
#define DRM_CURRENTPID task_pid_nr(current)
--
2.13.0
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[PATCH] gpu: ipu-v3: fix a possible NULL dereference
On 23/08/2016 17:24, Sean Paul wrote:
> On Tue, Aug 16, 2016 at 9:33 AM, LABBE Corentin
> wrote:
>> of_match_device could return NULL, and so cause a NULL pointer
>> dereference later.
>>
>> For fixing this problem, we use of_device_get_match_data(), this will
>> simplify the code a little by using a standard function for
>> getting the match data.
>>
>> Signed-off-by: LABBE Corentin
>> ---
>> drivers/gpu/ipu-v3/ipu-common.c | 4 +---
>> 1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/ipu-v3/ipu-common.c
>> b/drivers/gpu/ipu-v3/ipu-common.c
>> index 99dcacf..05a9cc6 100644
>> --- a/drivers/gpu/ipu-v3/ipu-common.c
>> +++ b/drivers/gpu/ipu-v3/ipu-common.c
>> @@ -1207,15 +1207,13 @@ EXPORT_SYMBOL_GPL(ipu_dump);
>>
>> static int ipu_probe(struct platform_device *pdev)
>> {
>> - const struct of_device_id *of_id =
>> - of_match_device(imx_ipu_dt_ids, &pdev->dev);
>> struct ipu_soc *ipu;
>> struct resource *res;
>> unsigned long ipu_base;
>> int i, ret, irq_sync, irq_err;
>> const struct ipu_devtype *devtype;
>>
>> - devtype = of_id->data;
>> + devtype = of_device_get_match_data(&pdev->dev);
>
> While you avoid the of_id dereference, it's possible that
> of_device_get_match_data() returns NULL, so you're really just moving
> the oops around.
>
> Sean
>
Hello
I apologize for didnt seen that, I will send an updated patch which fix that.
Regards
[PATCH v2 1/1] drm: modes: fix DRM modes analysis regression
Le 09/12/2015 16:32, Jani Nikula a écrit :
> On Wed, 09 Dec 2015, LABBE Corentin wrote:
>> My latest commit introduce some case where a valid mode, could be
>> rejected.
>> simple_strtox functions stop at first non-digit character, but kstrtox not.
>> So args like "video=HDMI-A-1:720x480-16 at 60" will be reject when checking
>> 16 at .
>> The proper solution is to store digits in a specific buffer.
>
> Or to revert regressing commit...? Your original commit complicated the
> already complicated function, and this one makes it more so. What is the
> benefit?
>
The benefit is to remove a function marked obsolete who do not said if the
conversation is successful or not.
But I understand that the way I have done it was not the best one.
If the maintainer want it, I will send a patch for reverting the first patch.
>> Fixes: 52157a4ca396 ("drm: modes: replace simple_strtoul by kstrtouint")
>
> For me the commit id is cc344980c76748e57c9c03100c2a14d36ab00334.
Oups, I took commit id from my local git.
Regards
[PATCH v3 2/7] include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h
This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. Signed-off-by: Corentin Labbe --- include/linux/setbits.h | 84 + 1 file changed, 84 insertions(+) create mode 100644 include/linux/setbits.h diff --git a/include/linux/setbits.h b/include/linux/setbits.h new file mode 100644 index ..c82faf8d7fe4 --- /dev/null +++ b/include/linux/setbits.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SETBITS_H +#define __LINUX_SETBITS_H + +#include + +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) + +#ifndef setbits_le32 +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) +#endif +#ifndef setbits_le32_relaxed +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ + addr, set) +#endif + +#ifndef clrbits_le32 +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) +#endif +#ifndef clrbits_le32_relaxed +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ + addr, mask) +#endif + +#ifndef clrsetbits_le32 +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) +#endif +#ifndef clrsetbits_le32_relaxed +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ + writel_relaxed, \ + addr, mask, set) +#endif + +#ifndef setclrbits_le32 +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) +#endif +#ifndef setclrbits_le32_relaxed +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ + writel_relaxed, \ + addr, mask, set) +#endif + +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ +#if defined(writeq) && defined(readq) +#ifndef setbits_le64 +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) +#endif +#ifndef setbits_le64_relaxed +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ + addr, set) +#endif + +#ifndef clrbits_le64 +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) +#endif +#ifndef clrbits_le64_relaxed +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ + addr, mask) +#endif + +#ifndef clrsetbits_le64 +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) +#endif +#ifndef clrsetbits_le64_relaxed +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ + writeq_relaxed, \ + addr, mask, set) +#endif + +#ifndef setclrbits_le64 +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) +#endif +#ifndef setclrbits_le64_relaxed +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ + writeq_relaxed, \ + addr, mask, set) +#endif + +#endif /* writeq/readq */ + +#endif /* __LINUX_SETBITS_H */ -- 2.18.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 4/7] ata: ahci_sunxi: use xxxsetbitsi_le32 functions
This patch converts ahci_sunxi to use xxxsetbits_le32 functions
Signed-off-by: Corentin Labbe
---
drivers/ata/ahci_sunxi.c | 62 +++-
1 file changed, 17 insertions(+), 45 deletions(-)
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 911710643305..69c2e01c3d52 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include "ahci.h"
#define DRV_NAME "ahci-sunxi"
@@ -58,34 +59,6 @@ MODULE_PARM_DESC(enable_pmp,
#define AHCI_P0PHYCR 0x0178
#define AHCI_P0PHYSR 0x017c
-static void sunxi_clrbits(void __iomem *reg, u32 clr_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val &= ~(clr_val);
- writel(reg_val, reg);
-}
-
-static void sunxi_setbits(void __iomem *reg, u32 set_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val |= set_val;
- writel(reg_val, reg);
-}
-
-static void sunxi_clrsetbits(void __iomem *reg, u32 clr_val, u32 set_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val &= ~(clr_val);
- reg_val |= set_val;
- writel(reg_val, reg);
-}
-
static u32 sunxi_getbits(void __iomem *reg, u8 mask, u8 shift)
{
return (readl(reg) >> shift) & mask;
@@ -100,22 +73,21 @@ static int ahci_sunxi_phy_init(struct device *dev, void
__iomem *reg_base)
writel(0, reg_base + AHCI_RWCR);
msleep(5);
- sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
-(0x7 << 24),
-(0x5 << 24) | BIT(23) | BIT(18));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS1R,
-(0x3 << 16) | (0x1f << 8) | (0x3 << 6),
-(0x2 << 16) | (0x6 << 8) | (0x2 << 6));
- sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
- sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
-(0x7 << 20), (0x3 << 20));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
-(0x1f << 5), (0x19 << 5));
+ setbits_le32(reg_base + AHCI_PHYCS1R, BIT(19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R, (0x7 << 24),
+ (0x5 << 24) | BIT(23) | BIT(18));
+ clrsetbits_le32(reg_base + AHCI_PHYCS1R,
+ (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
+ (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
+ setbits_le32(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
+ clrbits_le32(reg_base + AHCI_PHYCS1R, BIT(19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R,
+ (0x7 << 20), (0x3 << 20));
+ clrsetbits_le32(reg_base + AHCI_PHYCS2R,
+ (0x1f << 5), (0x19 << 5));
msleep(5);
- sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
+ setbits_le32(reg_base + AHCI_PHYCS0R, (0x1 << 19));
timeout = 250; /* Power up takes aprox 50 us */
do {
@@ -130,7 +102,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void
__iomem *reg_base)
udelay(1);
} while (1);
- sunxi_setbits(reg_base + AHCI_PHYCS2R, (0x1 << 24));
+ setbits_le32(reg_base + AHCI_PHYCS2R, (0x1 << 24));
timeout = 100; /* Calibration takes aprox 10 us */
do {
@@ -158,10 +130,10 @@ static void ahci_sunxi_start_engine(struct ata_port *ap)
struct ahci_host_priv *hpriv = ap->host->private_data;
/* Setup DMA before DMA start */
- sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0xff00, 0x4400);
+ clrsetbits_le32(hpriv->mmio + AHCI_P0DMACR, 0xff00, 0x4400);
/* Start DMA */
- sunxi_setbits(port_mmio + PORT_CMD, PORT_CMD_START);
+ setbits_le32(port_mmio + PORT_CMD, PORT_CMD_START);
}
static const struct ata_port_info ahci_sunxi_port_info = {
--
2.18.1
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[PATCH v3 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64
Hello This patchset adds a new set of functions which are open-coded in lot of place. Basicly the pattern is always the same, "read, modify a bit, write" some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) The first patch rename some powerpc functions for being consistent with the new name convention. The second patch adds the header with all setbits functions. The third patch is a try to implement a coccinelle semantic patch to find all place where xxxbits function could be used. It should not be merged since it is un-finalized. For the moment, the "add setbits.h header" is not working and need a future coccinelle version. The four last patch are example of some drivers conversion. Thoses patchs give an example of the reduction of code won by using xxxbits32. I would like to thanks Julia Lawall for her help on the coccinelle patch. Note that I dont know which maintainer will take the linux/setbits.h include patch. Regards Changes since v2: - Fixed patch title - Fixed style problems - shorted macro arguments name Changes since v1: - renamed LE functions to _leXX - updated coccinnelle patch with JLawall's comments Corentin Labbe (7): powerpc: rename setbits32/clrbits32 to setbits_be32/clrbits_be32 include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h coccinelle: add xxxsetbits_leXX converting spatch ata: ahci_sunxi: use xxxsetbitsi_le32 functions net: ethernet: stmmac: dwmac-sun8i: use xxxsetbits_le32 drm: meson: use xxxsetbits_le32 net: stmmac: dwmac-meson8b: use xxxsetbits_le32 arch/powerpc/include/asm/fsl_lbc.h| 2 +- arch/powerpc/include/asm/io.h | 4 +- arch/powerpc/platforms/44x/canyonlands.c | 4 +- arch/powerpc/platforms/4xx/gpio.c | 28 +- arch/powerpc/platforms/512x/pdm360ng.c| 6 +- arch/powerpc/platforms/52xx/mpc52xx_common.c | 6 +- arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 12 +- arch/powerpc/platforms/82xx/ep8248e.c | 2 +- arch/powerpc/platforms/82xx/km82xx.c | 6 +- arch/powerpc/platforms/82xx/mpc8272_ads.c | 10 +- arch/powerpc/platforms/82xx/pq2.c | 2 +- arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 4 +- arch/powerpc/platforms/82xx/pq2fads.c | 10 +- arch/powerpc/platforms/83xx/km83xx.c | 6 +- arch/powerpc/platforms/83xx/mpc836x_mds.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c | 4 +- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +- arch/powerpc/platforms/85xx/p1022_ds.c| 6 +- arch/powerpc/platforms/85xx/p1022_rdk.c | 6 +- arch/powerpc/platforms/85xx/t1042rdb_diu.c| 6 +- arch/powerpc/platforms/85xx/twr_p102x.c | 2 +- arch/powerpc/platforms/86xx/mpc8610_hpcd.c| 6 +- arch/powerpc/platforms/8xx/adder875.c | 2 +- arch/powerpc/platforms/8xx/m8xx_setup.c | 4 +- arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 +- arch/powerpc/platforms/8xx/mpc885ads_setup.c | 28 +- .../platforms/embedded6xx/flipper-pic.c | 6 +- arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 8 +- arch/powerpc/platforms/embedded6xx/wii.c | 12 +- arch/powerpc/sysdev/cpm1.c| 26 +- arch/powerpc/sysdev/cpm2.c| 16 +- arch/powerpc/sysdev/cpm_common.c | 4 +- arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 16 +- arch/powerpc/sysdev/fsl_lbc.c | 2 +- arch/powerpc/sysdev/fsl_pci.c | 12 +- arch/powerpc/sysdev/fsl_pmc.c | 2 +- arch/powerpc/sysdev/fsl_rcpm.c| 74 +-- arch/powerpc/sysdev/fsl_rio.c | 4 +- arch/powerpc/sysdev/fsl_rmu.c | 9 +- arch/powerpc/sysdev/mpic_timer.c | 12 +- drivers/ata/ahci_sunxi.c | 62 +-- drivers/gpu/drm/meson/meson_crtc.c| 14 +- drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +- drivers/gpu/drm/meson/meson_plane.c | 13 +- drivers/gpu/drm/meson/meson_registers.h | 3 - drivers/gpu/drm/meson/meson_venc.c| 13 +- drivers/gpu/drm/meson/meson_venc_cvbs.c | 4 +- drivers/gpu/drm/meson/meson_viu.c | 65 +-- drivers/gpu/drm/meson/meson_vpp.c | 22 +- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 56 +- .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 +-- include/linux/setbits.h | 84 +++ scripts/add_new_include_in_source.py | 61 +++ scripts/coccinelle/misc/setbits32.cocci | 487 ++ .../coccinelle/misc/setbits32_relaxed.cocci | 487 ++ scripts/coccinelle/misc/setbits64.cocci | 487 ++ scripts/coccinelle/misc/setbits_dev.cocci | 235 + 58 files changed, 2172 insertions(+), 395
[PATCH v3 3/7 DONOTMERGE] coccinelle: add xxxsetbits_leXX converting spatch
This patch add a spatch which convert all open coded of
setbits_le32/clrbits_le32/clrsetbits_le32
and their 64 bits counterparts.
Note that 64 and 32_relaxed are generated via
cp scripts/coccinelle/misc/setbits32.cocci
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,readl,readl_relaxed,' scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,writel,writel_relaxed,'
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,setbits_le32,setbits_le32_relaxed,g'
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,clrbits_le32,clrbits_le32_relaxed,g'
scripts/coccinelle/misc/setbits32_relaxed.cocci
cp scripts/coccinelle/misc/setbits32.cocci
scripts/coccinelle/misc/setbits64.cocci
sed -i 's,readl,readq,' scripts/coccinelle/misc/setbits64.cocci
sed -i 's,writel,writeq,' scripts/coccinelle/misc/setbits64.cocci
sed -i 's,le32,le64,' scripts/coccinelle/misc/setbits64.cocci
Signed-off-by: Corentin Labbe
---
scripts/add_new_include_in_source.py | 61 +++
scripts/coccinelle/misc/setbits32.cocci | 487 ++
.../coccinelle/misc/setbits32_relaxed.cocci | 487 ++
scripts/coccinelle/misc/setbits64.cocci | 487 ++
scripts/coccinelle/misc/setbits_dev.cocci | 235 +
5 files changed, 1757 insertions(+)
create mode 100755 scripts/add_new_include_in_source.py
create mode 100644 scripts/coccinelle/misc/setbits32.cocci
create mode 100644 scripts/coccinelle/misc/setbits32_relaxed.cocci
create mode 100644 scripts/coccinelle/misc/setbits64.cocci
create mode 100644 scripts/coccinelle/misc/setbits_dev.cocci
diff --git a/scripts/add_new_include_in_source.py
b/scripts/add_new_include_in_source.py
new file mode 100755
index ..a43ccfbf9921
--- /dev/null
+++ b/scripts/add_new_include_in_source.py
@@ -0,0 +1,61 @@
+#!/usr/bin/env python
+
+# add
+
+import os, sys
+import re
+import shutil
+
+if len(sys.argv) < 2:
+print("Usage: %s pathtosourcefile" % (sys.argv[0]))
+sys.exit(1)
+
+found_global_headers = False
+found_local_headers = False
+#first check it does already here
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if re.search("#include \n", line):
+print("INFO: header already here")
+sys.exit(0)
+if re.search("^#include <", line):
+found_global_headers = True
+if re.search("^#include \"", line):
+found_local_headers = True
+fp.close()
+
+if not found_global_headers and not found_local_headers:
+print("No header included do it at hand")
+sys.exit(1)
+
+if found_global_headers:
+done = False
+inheader = False
+with open("%s.new" % sys.argv[1], 'w') as fw:
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if re.search("^#include = "s" and line[17] >= "e" and
line[18] >= "t" and line[19] >= 'b'):
+done = True
+fw.write("#include \n")
+if not done and not re.search("^#include \n")
+fw.write(line)
+fw.close()
+fp.close()
+else:
+done = False
+with open("%s.new" % sys.argv[1], 'w') as fw:
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if not done and re.search("^#include \"", line):
+fw.write("#include \n")
+done = True
+fw.write(line)
+fw.close()
+fp.close()
+
+shutil.move("%s.new" % sys.argv[1], sys.argv[1])
+print("%s done" % sys.argv[1])
diff --git a/scripts/coccinelle/misc/setbits32.cocci
b/scripts/coccinelle/misc/setbits32.cocci
new file mode 100644
index ..71400cac6830
--- /dev/null
+++ b/scripts/coccinelle/misc/setbits32.cocci
@@ -0,0 +1,487 @@
+// SPDX-License-Identifier: GPL-2.0
+// Confidence: High
+// Copyright: (c) 2018 Corentin LABBE
+
+virtual patch
+
+@p_clrsetbits_le32_l4@
+local idexpression rr;
+expression addr;
+expression set;
+expression clear;
+expression e;
+position p;
+@@
+
+- rr@p = readl(addr);
+- rr &= ~clear;
+- rr |= set;
+- writel(rr, addr);
++ clrsetbits_le32(addr, clear, set);
+ ... when != rr
+? rr = e
+
+@script:python depends on p_clrsetbits_le32_l4@
+p1 << p_clrsetbits_le32_l4.p;
+@@
+list.append(p1[0].file)
+
+
+@p_clrsetbits_le32_l3@
+local idexpression rr;
+expression addr;
+expression set;
+expression clear;
+expression e;
+position p;
+@@
+
+- rr@p = readl(addr);
+- rr &= ~clear | set;
+- writel(rr, addr);
++ clrsetbits_le32(addr, clear, set);
+ ... when != rr
+? rr = e
+
+@script:python depends on p_clrsetbits_le32_l3@
+p1 << p_clrsetbits_le32_l3.p;
+@@
+
[PATCH v3 5/7] net: ethernet: stmmac: dwmac-sun8i: use xxxsetbits_le32
This patch convert dwmac-sun8i driver to use all xxxsetbits_le32 functions.
Signed-off-by: Corentin Labbe
---
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 +--
1 file changed, 16 insertions(+), 46 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index f9a61f90cfbc..74067a59af50 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include "stmmac.h"
#include "stmmac_platform.h"
@@ -342,50 +343,30 @@ static void sun8i_dwmac_disable_dma_irq(void __iomem
*ioaddr, u32 chan)
static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v |= EMAC_TX_DMA_START;
- v |= EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ setbits_le32(ioaddr + EMAC_TX_CTL1,
+EMAC_TX_DMA_START | EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v |= EMAC_TX_DMA_START;
- v |= EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ setbits_le32(ioaddr + EMAC_TX_CTL1,
+EMAC_TX_DMA_START | EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v &= ~EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ clrbits_le32(ioaddr + EMAC_TX_CTL1, EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_RX_CTL1);
- v |= EMAC_RX_DMA_START;
- v |= EMAC_RX_DMA_EN;
- writel(v, ioaddr + EMAC_RX_CTL1);
+ setbits_le32(ioaddr + EMAC_RX_CTL1,
+EMAC_RX_DMA_START | EMAC_RX_DMA_EN);
}
static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_RX_CTL1);
- v &= ~EMAC_RX_DMA_EN;
- writel(v, ioaddr + EMAC_RX_CTL1);
+ clrbits_le32(ioaddr + EMAC_RX_CTL1, EMAC_RX_DMA_EN);
}
static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr,
@@ -578,7 +559,6 @@ static void sun8i_dwmac_set_umac_addr(struct
mac_device_info *hw,
unsigned int reg_n)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
if (!addr) {
writel(0, ioaddr + EMAC_MACADDR_HI(reg_n));
@@ -588,9 +568,8 @@ static void sun8i_dwmac_set_umac_addr(struct
mac_device_info *hw,
stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n),
EMAC_MACADDR_LO(reg_n));
if (reg_n > 0) {
- v = readl(ioaddr + EMAC_MACADDR_HI(reg_n));
- v |= MAC_ADDR_TYPE_DST;
- writel(v, ioaddr + EMAC_MACADDR_HI(reg_n));
+ setbits_le32(ioaddr + EMAC_MACADDR_HI(reg_n),
+MAC_ADDR_TYPE_DST);
}
}
@@ -608,11 +587,8 @@ static void sun8i_dwmac_get_umac_addr(struct
mac_device_info *hw,
static int sun8i_dwmac_rx_ipc_enable(struct mac_device_info *hw)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
- v = readl(ioaddr + EMAC_RX_CTL0);
- v |= EMAC_RX_DO_CRC;
- writel(v, ioaddr + EMAC_RX_CTL0);
+ setbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_DO_CRC);
return 1;
}
@@ -662,21 +638,15 @@ static void sun8i_dwmac_flow_ctrl(struct mac_device_info
*hw,
unsigned int pause_time, u32 tx_cnt)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
- v = readl(ioaddr + EMAC_RX_CTL0);
if (fc == FLOW_AUTO)
- v |= EMAC_RX_FLOW_CTL_EN;
+ setbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_FLOW_CTL_EN);
else
- v &= ~EMAC_RX_FLOW_CTL_EN;
- writel(v, ioaddr + EMAC_RX_CTL0);
-
- v = readl(ioaddr + EMAC_TX_FLOW_CTL);
+ clrbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_FLOW_CTL_EN);
if (fc == FLOW_AUTO)
- v |= EMAC_TX_FLOW_CTL_EN;
+ setbits_le32(ioaddr + EMAC_TX_FLOW_CTL, EMAC_TX_FLOW_CTL_EN);
else
- v &= ~EMAC_TX_FLOW_CTL_EN;
- writel(v, ioaddr + EMAC_TX_FLOW_CTL);
+ clrbits_le32(ioaddr + EMAC_TX_FLOW_CTL, EMAC_TX_FLOW_CTL_EN);
}
static int sun8i_dwmac_reset(struct stmmac_priv *priv)
--
2.18.1
___
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[PATCH v3 6/7] drm: meson: use xxxsetbits_le32
This patch convert meson DRM driver to use all xxxsetbits_le32 functions.
Signed-off-by: Corentin Labbe
Reviewed-by: Neil Armstrong
Tested-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c | 14 +++---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +++--
drivers/gpu/drm/meson/meson_plane.c | 13 ++---
drivers/gpu/drm/meson/meson_registers.h | 3 --
drivers/gpu/drm/meson/meson_venc.c | 13 ++---
drivers/gpu/drm/meson/meson_venc_cvbs.c | 4 +-
drivers/gpu/drm/meson/meson_viu.c | 65 +
drivers/gpu/drm/meson/meson_vpp.c | 22 -
8 files changed, 86 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_crtc.c
b/drivers/gpu/drm/meson/meson_crtc.c
index 05520202c967..98f17ddd6b00 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -98,8 +99,8 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc,
writel(crtc_state->mode.hdisplay,
priv->io_base + _REG(VPP_POSTBLEND_H_SIZE));
- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE);
priv->viu.osd1_enabled = true;
}
@@ -114,8 +115,8 @@ static void meson_crtc_atomic_disable(struct drm_crtc *crtc,
priv->viu.osd1_commit = false;
/* Disable VPP Postblend */
- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_POSTBLEND_ENABLE, 0);
if (crtc->state->event && !crtc->state->active) {
spin_lock_irq(&crtc->dev->event_lock);
@@ -199,8 +200,9 @@ void meson_crtc_irq(struct meson_drm *priv)
MESON_CANVAS_BLKMODE_LINEAR);
/* Enable OSD1 */
- writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_OSD1_POSTBLEND,
+ VPP_OSD1_POSTBLEND);
priv->viu.osd1_commit = false;
}
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index df7247cd93f9..99a136209e15 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
#include
@@ -427,10 +428,10 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void
*data,
writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
/* Temporary Disable HDMI video stream to HDMI-TX */
- writel_bits_relaxed(0x3, 0,
- priv->io_base + _REG(VPU_HDMI_SETTING));
- writel_bits_relaxed(0xf << 8, 0,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING), 0x3,
+ 0);
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0xf << 8, 0);
/* Re-Enable VENC video stream */
if (priv->venc.hdmi_use_enci)
@@ -439,16 +440,16 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void
*data,
writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
/* Push back HDMI clock settings */
- writel_bits_relaxed(0xf << 8, wr_clk & (0xf << 8),
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0xf << 8, wr_clk & (0xf << 8));
/* Enable and Select HDMI video source for HDMI-TX */
if (priv->venc.hdmi_use_enci)
- writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0x3, MESON_VENC_SOURCE_ENCI);
else
- writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0x3, MESON_VENC_SOURCE_ENCP);
return 0;
}
@@ -632,8 +633,8 @@ static void meson_venc_hdmi_encoder_disable(s
[PATCH v3 1/7] powerpc: rename setbits32/clrbits32 to setbits_be32/clrbits_be32
Since setbits32/clrbits32 work on be32, it's better to remove ambiguity on
the used data type.
Signed-off-by: Corentin Labbe
---
arch/powerpc/include/asm/fsl_lbc.h| 2 +-
arch/powerpc/include/asm/io.h | 4 +-
arch/powerpc/platforms/44x/canyonlands.c | 4 +-
arch/powerpc/platforms/4xx/gpio.c | 28 +++
arch/powerpc/platforms/512x/pdm360ng.c| 6 +-
arch/powerpc/platforms/52xx/mpc52xx_common.c | 6 +-
arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 12 +--
arch/powerpc/platforms/82xx/ep8248e.c | 2 +-
arch/powerpc/platforms/82xx/km82xx.c | 6 +-
arch/powerpc/platforms/82xx/mpc8272_ads.c | 10 +--
arch/powerpc/platforms/82xx/pq2.c | 2 +-
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 4 +-
arch/powerpc/platforms/82xx/pq2fads.c | 10 +--
arch/powerpc/platforms/83xx/km83xx.c | 6 +-
arch/powerpc/platforms/83xx/mpc836x_mds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c | 4 +-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +-
arch/powerpc/platforms/85xx/p1022_ds.c| 6 +-
arch/powerpc/platforms/85xx/p1022_rdk.c | 6 +-
arch/powerpc/platforms/85xx/t1042rdb_diu.c| 6 +-
arch/powerpc/platforms/85xx/twr_p102x.c | 2 +-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c| 6 +-
arch/powerpc/platforms/8xx/adder875.c | 2 +-
arch/powerpc/platforms/8xx/m8xx_setup.c | 4 +-
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 +-
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 28 +++
.../platforms/embedded6xx/flipper-pic.c | 6 +-
arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 8 +-
arch/powerpc/platforms/embedded6xx/wii.c | 12 +--
arch/powerpc/sysdev/cpm1.c| 26 +++
arch/powerpc/sysdev/cpm2.c| 16 ++--
arch/powerpc/sysdev/cpm_common.c | 4 +-
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 16 ++--
arch/powerpc/sysdev/fsl_lbc.c | 2 +-
arch/powerpc/sysdev/fsl_pci.c | 12 +--
arch/powerpc/sysdev/fsl_pmc.c | 2 +-
arch/powerpc/sysdev/fsl_rcpm.c| 74 +--
arch/powerpc/sysdev/fsl_rio.c | 4 +-
arch/powerpc/sysdev/fsl_rmu.c | 9 ++-
arch/powerpc/sysdev/mpic_timer.c | 12 +--
41 files changed, 190 insertions(+), 189 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_lbc.h
b/arch/powerpc/include/asm/fsl_lbc.h
index c7240a024b96..4d6a56b48a28 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -276,7 +276,7 @@ static inline void fsl_upm_start_pattern(struct fsl_upm
*upm, u8 pat_offset)
*/
static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
{
- clrbits32(upm->mxmr, MxMR_OP_RP);
+ clrbits_be32(upm->mxmr, MxMR_OP_RP);
while (in_be32(upm->mxmr) & MxMR_OP_RP)
cpu_relax();
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 0a034519957d..bc2fc014fd4f 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -882,8 +882,8 @@ static inline void * bus_to_virt(unsigned long address)
#endif /* CONFIG_PPC32 */
/* access ports */
-#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
-#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
+#define setbits_be32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
+#define clrbits_be32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v))
#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
index 157f4ce46386..6aeb4ca64d09 100644
--- a/arch/powerpc/platforms/44x/canyonlands.c
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -113,8 +113,8 @@ static int __init ppc460ex_canyonlands_fixup(void)
* USB2HStop and gpio19 will be USB2DStop. For more details refer to
* table 34-7 of PPC460EX user manual.
*/
- setbits32((vaddr + GPIO0_OSRH), 0x4200);
- setbits32((vaddr + GPIO0_TSRH), 0x4200);
+ setbits_be32((vaddr + GPIO0_OSRH), 0x4200);
+ setbits_be32((vaddr + GPIO0_TSRH), 0x4200);
err_gpio:
iounmap(vaddr);
err_bcsr:
diff --git a/arch/powerpc/platforms/4xx/gpio.c
b/arch/powerpc/platforms/4xx/gpio.c
index 2238e369cde4..8436da0617fd 100644
--- a/arch/powerpc/platforms/4xx/gpio.c
+++ b/arch/powerpc/platforms/4xx/gpio.c
@@ -82,9 +82,9 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio,
int val)
struct ppc4xx_gpio __iomem *regs = mm_gc->regs;
if (val)
- setbits32(®s->or, GPIO_MASK(gpio));
+ setbits_be32(®s->or, GPIO_MASK(gpio));
[PATCH v3 7/7] net: stmmac: dwmac-meson8b: use xxxsetbits_le32
This patch convert meson stmmac glue driver to use all xxxsetbits_le32
functions.
Signed-off-by: Corentin Labbe
Reviewed-by: Neil Armstrong
---
.../ethernet/stmicro/stmmac/dwmac-meson8b.c | 56 ---
1 file changed, 22 insertions(+), 34 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
index c5979569fd60..abcf65588576 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include "stmmac_platform.h"
@@ -75,18 +76,6 @@ struct meson8b_dwmac_clk_configs {
struct clk_gate rgmii_tx_en;
};
-static void meson8b_dwmac_mask_bits(struct meson8b_dwmac *dwmac, u32 reg,
- u32 mask, u32 value)
-{
- u32 data;
-
- data = readl(dwmac->regs + reg);
- data &= ~mask;
- data |= (value & mask);
-
- writel(data, dwmac->regs + reg);
-}
-
static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,
const char *name_suffix,
const char **parent_names,
@@ -192,14 +181,13 @@ static int meson8b_set_phy_mode(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* enable RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_RGMII_MODE,
- PRG_ETH0_RGMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_RGMII_MODE,
+ PRG_ETH0_RGMII_MODE);
break;
case PHY_INTERFACE_MODE_RMII:
/* disable RGMII mode -> enables RMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_RGMII_MODE, 0);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_RGMII_MODE,
+ 0);
break;
default:
dev_err(dwmac->dev, "fail to set phy-mode %s\n",
@@ -218,15 +206,15 @@ static int meson_axg_set_phy_mode(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* enable RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_EXT_PHY_MODE_MASK,
- PRG_ETH0_EXT_RGMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_EXT_PHY_MODE_MASK,
+ PRG_ETH0_EXT_RGMII_MODE);
break;
case PHY_INTERFACE_MODE_RMII:
/* disable RGMII mode -> enables RMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_EXT_PHY_MODE_MASK,
- PRG_ETH0_EXT_RMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_EXT_PHY_MODE_MASK,
+ PRG_ETH0_EXT_RMII_MODE);
break;
default:
dev_err(dwmac->dev, "fail to set phy-mode %s\n",
@@ -255,11 +243,11 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* only relevant for RMII mode -> disable in RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_INVERTED_RMII_CLK, 0);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_INVERTED_RMII_CLK, 0);
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK,
- tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_TXDLY_MASK,
+ tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
/* Configure the 125MHz RGMII TX clock, the IP block changes
* the output automatically (= without us having to configure
@@ -287,13 +275,13 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RMII:
/* invert internal clk_rmii_i to generate 25/2.5 tx_rx_clk */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_INVERTED_RMII_CLK,
- PRG_ETH0_INVERTED_RMII_CLK);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_INVERTED_RMII_CLK,
+
[PATCH v2 2/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 in linux/setbits.h
This patch adds setbits32/clrbits32/clrsetbits32 and setbits64/clrbits64/clrsetbits64 in linux/setbits.h header. Signed-off-by: Corentin Labbe --- include/linux/setbits.h | 88 + 1 file changed, 88 insertions(+) create mode 100644 include/linux/setbits.h diff --git a/include/linux/setbits.h b/include/linux/setbits.h new file mode 100644 index ..6e7e257134ae --- /dev/null +++ b/include/linux/setbits.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SETBITS_H +#define __LINUX_SETBITS_H + +#include + +#define __setbits(readfunction, writefunction, addr, set) \ + writefunction((readfunction(addr) | (set)), addr) +#define __clrbits(readfunction, writefunction, addr, mask) \ + writefunction((readfunction(addr) & ~(mask)), addr) +#define __clrsetbits(readfunction, writefunction, addr, mask, set) \ + writefunction(((readfunction(addr) & ~(mask)) | (set)), addr) +#define __setclrbits(readfunction, writefunction, addr, mask, set) \ + writefunction(((readfunction(addr) | (set)) & ~(mask)), addr) + +#ifndef setbits_le32 +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) +#endif +#ifndef setbits_le32_relaxed +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ + addr, set) +#endif + +#ifndef clrbits_le32 +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) +#endif +#ifndef clrbits_le32_relaxed +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ + addr, mask) +#endif + +#ifndef clrsetbits_le32 +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) +#endif +#ifndef clrsetbits_le32_relaxed +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ + writel_relaxed, \ + addr, mask, set) +#endif + +#ifndef setclrbits_le32 +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) +#endif +#ifndef setclrbits_le32_relaxed +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ + writel_relaxed, \ + addr, mask, set) +#endif + +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ +#if defined(writeq) && defined(readq) +#ifndef setbits_le64 +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) +#endif +#ifndef setbits_le64_relaxed +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ + addr, set) +#endif + +#ifndef clrbits_le64 +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) +#endif +#ifndef clrbits_le64_relaxed +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ + addr, mask) +#endif + +#ifndef clrsetbits_le64 +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) +#endif +#ifndef clrsetbits_le64_relaxed +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ + writeq_relaxed, \ + addr, mask, set) +#endif + +#ifndef setclrbits_le64 +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) +#endif +#ifndef setclrbits_le64_relaxed +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ + writeq_relaxed, \ + addr, mask, set) +#endif + +#endif /* writeq/readq */ + +#endif /* __LINUX_SETBITS_H */ -- 2.16.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 6/7] drm: meson: use xxxsetbits32
This patch convert meson DRM driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/meson/meson_crtc.c | 14 ---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +
drivers/gpu/drm/meson/meson_plane.c | 13 ---
drivers/gpu/drm/meson/meson_registers.h | 3 --
drivers/gpu/drm/meson/meson_venc.c | 13 ---
drivers/gpu/drm/meson/meson_venc_cvbs.c | 4 +-
drivers/gpu/drm/meson/meson_viu.c | 65 +
drivers/gpu/drm/meson/meson_vpp.c | 22 +--
8 files changed, 86 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_crtc.c
b/drivers/gpu/drm/meson/meson_crtc.c
index 05520202c967..98f17ddd6b00 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -98,8 +99,8 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc,
writel(crtc_state->mode.hdisplay,
priv->io_base + _REG(VPP_POSTBLEND_H_SIZE));
- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE);
priv->viu.osd1_enabled = true;
}
@@ -114,8 +115,8 @@ static void meson_crtc_atomic_disable(struct drm_crtc *crtc,
priv->viu.osd1_commit = false;
/* Disable VPP Postblend */
- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_POSTBLEND_ENABLE, 0);
if (crtc->state->event && !crtc->state->active) {
spin_lock_irq(&crtc->dev->event_lock);
@@ -199,8 +200,9 @@ void meson_crtc_irq(struct meson_drm *priv)
MESON_CANVAS_BLKMODE_LINEAR);
/* Enable OSD1 */
- writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
- priv->io_base + _REG(VPP_MISC));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPP_MISC),
+ VPP_OSD1_POSTBLEND,
+ VPP_OSD1_POSTBLEND);
priv->viu.osd1_commit = false;
}
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index df7247cd93f9..99a136209e15 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
#include
@@ -427,10 +428,10 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void
*data,
writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
/* Temporary Disable HDMI video stream to HDMI-TX */
- writel_bits_relaxed(0x3, 0,
- priv->io_base + _REG(VPU_HDMI_SETTING));
- writel_bits_relaxed(0xf << 8, 0,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING), 0x3,
+ 0);
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0xf << 8, 0);
/* Re-Enable VENC video stream */
if (priv->venc.hdmi_use_enci)
@@ -439,16 +440,16 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void
*data,
writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
/* Push back HDMI clock settings */
- writel_bits_relaxed(0xf << 8, wr_clk & (0xf << 8),
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0xf << 8, wr_clk & (0xf << 8));
/* Enable and Select HDMI video source for HDMI-TX */
if (priv->venc.hdmi_use_enci)
- writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0x3, MESON_VENC_SOURCE_ENCI);
else
- writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP,
- priv->io_base + _REG(VPU_HDMI_SETTING));
+ clrsetbits_le32_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING),
+ 0x3, MESON_VENC_SOURCE_ENCP);
return 0;
}
@@ -632,8 +633,8 @@ static void meson_venc_hdmi_encoder_disable(struct
drm_encoder *encoder)
DRM_DEBUG_DRI
[PATCH v2 7/7] net: stmmac: dwmac-meson8b: use xxxsetbits32
This patch convert meson stmmac glue driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
.../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56 +-
1 file changed, 22 insertions(+), 34 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
index c5979569fd60..abcf65588576 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include "stmmac_platform.h"
@@ -75,18 +76,6 @@ struct meson8b_dwmac_clk_configs {
struct clk_gate rgmii_tx_en;
};
-static void meson8b_dwmac_mask_bits(struct meson8b_dwmac *dwmac, u32 reg,
- u32 mask, u32 value)
-{
- u32 data;
-
- data = readl(dwmac->regs + reg);
- data &= ~mask;
- data |= (value & mask);
-
- writel(data, dwmac->regs + reg);
-}
-
static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,
const char *name_suffix,
const char **parent_names,
@@ -192,14 +181,13 @@ static int meson8b_set_phy_mode(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* enable RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_RGMII_MODE,
- PRG_ETH0_RGMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_RGMII_MODE,
+ PRG_ETH0_RGMII_MODE);
break;
case PHY_INTERFACE_MODE_RMII:
/* disable RGMII mode -> enables RMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_RGMII_MODE, 0);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_RGMII_MODE,
+ 0);
break;
default:
dev_err(dwmac->dev, "fail to set phy-mode %s\n",
@@ -218,15 +206,15 @@ static int meson_axg_set_phy_mode(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* enable RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_EXT_PHY_MODE_MASK,
- PRG_ETH0_EXT_RGMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_EXT_PHY_MODE_MASK,
+ PRG_ETH0_EXT_RGMII_MODE);
break;
case PHY_INTERFACE_MODE_RMII:
/* disable RGMII mode -> enables RMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_EXT_PHY_MODE_MASK,
- PRG_ETH0_EXT_RMII_MODE);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_EXT_PHY_MODE_MASK,
+ PRG_ETH0_EXT_RMII_MODE);
break;
default:
dev_err(dwmac->dev, "fail to set phy-mode %s\n",
@@ -255,11 +243,11 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_TXID:
/* only relevant for RMII mode -> disable in RGMII mode */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_INVERTED_RMII_CLK, 0);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_INVERTED_RMII_CLK, 0);
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK,
- tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0, PRG_ETH0_TXDLY_MASK,
+ tx_dly_val << PRG_ETH0_TXDLY_SHIFT);
/* Configure the 125MHz RGMII TX clock, the IP block changes
* the output automatically (= without us having to configure
@@ -287,13 +275,13 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac
*dwmac)
case PHY_INTERFACE_MODE_RMII:
/* invert internal clk_rmii_i to generate 25/2.5 tx_rx_clk */
- meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,
- PRG_ETH0_INVERTED_RMII_CLK,
- PRG_ETH0_INVERTED_RMII_CLK);
+ clrsetbits_le32(dwmac->regs + PRG_ETH0,
+ PRG_ETH0_INVERTED_RMII_CLK,
+ PRG_ET
[PATCH v2 1/7] powerpc: rename setbits32/clrbits32 to setbits32_be/clrbits32_be
Since setbits32/clrbits32 work on be32, it's better to remove ambiguity on
the used data type.
Signed-off-by: Corentin Labbe
---
arch/powerpc/include/asm/fsl_lbc.h | 2 +-
arch/powerpc/include/asm/io.h| 5 +-
arch/powerpc/platforms/44x/canyonlands.c | 4 +-
arch/powerpc/platforms/4xx/gpio.c| 28 -
arch/powerpc/platforms/512x/pdm360ng.c | 6 +-
arch/powerpc/platforms/52xx/mpc52xx_common.c | 6 +-
arch/powerpc/platforms/52xx/mpc52xx_gpt.c| 10 ++--
arch/powerpc/platforms/82xx/ep8248e.c| 2 +-
arch/powerpc/platforms/82xx/km82xx.c | 6 +-
arch/powerpc/platforms/82xx/mpc8272_ads.c| 10 ++--
arch/powerpc/platforms/82xx/pq2.c| 2 +-
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 4 +-
arch/powerpc/platforms/82xx/pq2fads.c| 10 ++--
arch/powerpc/platforms/83xx/km83xx.c | 6 +-
arch/powerpc/platforms/83xx/mpc836x_mds.c| 2 +-
arch/powerpc/platforms/85xx/mpc85xx_mds.c| 2 +-
arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c | 4 +-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c| 2 +-
arch/powerpc/platforms/85xx/p1022_ds.c | 4 +-
arch/powerpc/platforms/85xx/p1022_rdk.c | 4 +-
arch/powerpc/platforms/85xx/t1042rdb_diu.c | 4 +-
arch/powerpc/platforms/85xx/twr_p102x.c | 2 +-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 4 +-
arch/powerpc/platforms/8xx/adder875.c| 2 +-
arch/powerpc/platforms/8xx/m8xx_setup.c | 4 +-
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 +-
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 28 -
arch/powerpc/platforms/embedded6xx/flipper-pic.c | 6 +-
arch/powerpc/platforms/embedded6xx/hlwd-pic.c| 8 +--
arch/powerpc/platforms/embedded6xx/wii.c | 10 ++--
arch/powerpc/sysdev/cpm1.c | 26 -
arch/powerpc/sysdev/cpm2.c | 16 ++---
arch/powerpc/sysdev/cpm_common.c | 4 +-
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c| 8 +--
arch/powerpc/sysdev/fsl_lbc.c| 2 +-
arch/powerpc/sysdev/fsl_pci.c| 8 +--
arch/powerpc/sysdev/fsl_pmc.c| 2 +-
arch/powerpc/sysdev/fsl_rcpm.c | 74
arch/powerpc/sysdev/fsl_rio.c| 4 +-
arch/powerpc/sysdev/fsl_rmu.c| 8 +--
arch/powerpc/sysdev/mpic_timer.c | 12 ++--
41 files changed, 178 insertions(+), 177 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_lbc.h
b/arch/powerpc/include/asm/fsl_lbc.h
index c7240a024b96..4d6a56b48a28 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -276,7 +276,7 @@ static inline void fsl_upm_start_pattern(struct fsl_upm
*upm, u8 pat_offset)
*/
static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
{
- clrbits32(upm->mxmr, MxMR_OP_RP);
+ clrbits_be32(upm->mxmr, MxMR_OP_RP);
while (in_be32(upm->mxmr) & MxMR_OP_RP)
cpu_relax();
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index e0331e754568..57486a1b9992 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -873,8 +873,8 @@ static inline void * bus_to_virt(unsigned long address)
#endif /* CONFIG_PPC32 */
/* access ports */
-#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
-#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
+#define setbits_be32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
+#define clrbits_be32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v))
#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
@@ -904,6 +904,7 @@ static inline void * bus_to_virt(unsigned long address)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
index 157f4ce46386..6aeb4ca64d09 100644
--- a/arch/powerpc/platforms/44x/canyonlands.c
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -113,8 +113,8 @@ static int __init ppc460ex_canyonlands_fixup(void)
* USB2HStop and gpio19 will be USB2DStop. For more details refer to
* table 34-7 of PPC460EX user manual.
*/
- setbits32((vaddr + GPIO0_OSRH), 0x4200);
- setbits32((vaddr + GPIO0_TSRH), 0x4200);
+ setbits_be32((vaddr + GPIO0_OSRH), 0x4200);
+ setbits_be32((vaddr + GPIO0_TSRH), 0x4200);
err_gpio:
iounmap(vaddr);
err_bcsr:
diff --gi
[PATCH v2 3/7] coccinelle: add xxxsetbitsXX converting spatch
This patch add a spatch which convert all open coded of
setbits32/clrbits32/clrsetbits32
and their 64 bits counterparts.
Note that 64 and 32_relaxed are generated via
cp scripts/coccinelle/misc/setbits32.cocci
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,readl,readl_relaxed,' scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,writel,writel_relaxed,'
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,setbits_le32,setbits_le32_relaxed,g'
scripts/coccinelle/misc/setbits32_relaxed.cocci
sed -i 's,clrbits_le32,clrbits_le32_relaxed,g'
scripts/coccinelle/misc/setbits32_relaxed.cocci
cp scripts/coccinelle/misc/setbits32.cocci
scripts/coccinelle/misc/setbits64.cocci
sed -i 's,readl,readq,' scripts/coccinelle/misc/setbits64.cocci
sed -i 's,writel,writeq,' scripts/coccinelle/misc/setbits64.cocci
sed -i 's,le32,le64,' scripts/coccinelle/misc/setbits64.cocci
Signed-off-by: Corentin Labbe
---
scripts/add_new_include_in_source.py| 61 +++
scripts/coccinelle/misc/setbits32.cocci | 487
scripts/coccinelle/misc/setbits32_relaxed.cocci | 487
scripts/coccinelle/misc/setbits64.cocci | 487
scripts/coccinelle/misc/setbits_dev.cocci | 235
5 files changed, 1757 insertions(+)
create mode 100755 scripts/add_new_include_in_source.py
create mode 100644 scripts/coccinelle/misc/setbits32.cocci
create mode 100644 scripts/coccinelle/misc/setbits32_relaxed.cocci
create mode 100644 scripts/coccinelle/misc/setbits64.cocci
create mode 100644 scripts/coccinelle/misc/setbits_dev.cocci
diff --git a/scripts/add_new_include_in_source.py
b/scripts/add_new_include_in_source.py
new file mode 100755
index ..a43ccfbf9921
--- /dev/null
+++ b/scripts/add_new_include_in_source.py
@@ -0,0 +1,61 @@
+#!/usr/bin/env python
+
+# add
+
+import os, sys
+import re
+import shutil
+
+if len(sys.argv) < 2:
+print("Usage: %s pathtosourcefile" % (sys.argv[0]))
+sys.exit(1)
+
+found_global_headers = False
+found_local_headers = False
+#first check it does already here
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if re.search("#include \n", line):
+print("INFO: header already here")
+sys.exit(0)
+if re.search("^#include <", line):
+found_global_headers = True
+if re.search("^#include \"", line):
+found_local_headers = True
+fp.close()
+
+if not found_global_headers and not found_local_headers:
+print("No header included do it at hand")
+sys.exit(1)
+
+if found_global_headers:
+done = False
+inheader = False
+with open("%s.new" % sys.argv[1], 'w') as fw:
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if re.search("^#include = "s" and line[17] >= "e" and
line[18] >= "t" and line[19] >= 'b'):
+done = True
+fw.write("#include \n")
+if not done and not re.search("^#include \n")
+fw.write(line)
+fw.close()
+fp.close()
+else:
+done = False
+with open("%s.new" % sys.argv[1], 'w') as fw:
+with open(sys.argv[1], 'r') as fp:
+for line in fp:
+if not done and re.search("^#include \"", line):
+fw.write("#include \n")
+done = True
+fw.write(line)
+fw.close()
+fp.close()
+
+shutil.move("%s.new" % sys.argv[1], sys.argv[1])
+print("%s done" % sys.argv[1])
diff --git a/scripts/coccinelle/misc/setbits32.cocci
b/scripts/coccinelle/misc/setbits32.cocci
new file mode 100644
index ..71400cac6830
--- /dev/null
+++ b/scripts/coccinelle/misc/setbits32.cocci
@@ -0,0 +1,487 @@
+// SPDX-License-Identifier: GPL-2.0
+// Confidence: High
+// Copyright: (c) 2018 Corentin LABBE
+
+virtual patch
+
+@p_clrsetbits_le32_l4@
+local idexpression rr;
+expression addr;
+expression set;
+expression clear;
+expression e;
+position p;
+@@
+
+- rr@p = readl(addr);
+- rr &= ~clear;
+- rr |= set;
+- writel(rr, addr);
++ clrsetbits_le32(addr, clear, set);
+ ... when != rr
+? rr = e
+
+@script:python depends on p_clrsetbits_le32_l4@
+p1 << p_clrsetbits_le32_l4.p;
+@@
+list.append(p1[0].file)
+
+
+@p_clrsetbits_le32_l3@
+local idexpression rr;
+expression addr;
+expression set;
+expression clear;
+expression e;
+position p;
+@@
+
+- rr@p = readl(addr);
+- rr &= ~clear | set;
+- writel(rr, addr);
++ clrsetbits_le32(addr, clear, set);
+ ... when != rr
+? rr = e
+
+@script:python depends on p_clrsetbits_le32_l3@
+p1 <<
[PATCH v2 5/7] net: ethernet: stmmac: dwmac-sun8i: use xxxsetbits32
This patch convert dwmac-sun8i driver to use all xxxsetbits32 functions.
Signed-off-by: Corentin Labbe
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 ++-
1 file changed, 16 insertions(+), 46 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index f9a61f90cfbc..74067a59af50 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include "stmmac.h"
#include "stmmac_platform.h"
@@ -342,50 +343,30 @@ static void sun8i_dwmac_disable_dma_irq(void __iomem
*ioaddr, u32 chan)
static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v |= EMAC_TX_DMA_START;
- v |= EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ setbits_le32(ioaddr + EMAC_TX_CTL1,
+EMAC_TX_DMA_START | EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v |= EMAC_TX_DMA_START;
- v |= EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ setbits_le32(ioaddr + EMAC_TX_CTL1,
+EMAC_TX_DMA_START | EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_TX_CTL1);
- v &= ~EMAC_TX_DMA_EN;
- writel(v, ioaddr + EMAC_TX_CTL1);
+ clrbits_le32(ioaddr + EMAC_TX_CTL1, EMAC_TX_DMA_EN);
}
static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_RX_CTL1);
- v |= EMAC_RX_DMA_START;
- v |= EMAC_RX_DMA_EN;
- writel(v, ioaddr + EMAC_RX_CTL1);
+ setbits_le32(ioaddr + EMAC_RX_CTL1,
+EMAC_RX_DMA_START | EMAC_RX_DMA_EN);
}
static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan)
{
- u32 v;
-
- v = readl(ioaddr + EMAC_RX_CTL1);
- v &= ~EMAC_RX_DMA_EN;
- writel(v, ioaddr + EMAC_RX_CTL1);
+ clrbits_le32(ioaddr + EMAC_RX_CTL1, EMAC_RX_DMA_EN);
}
static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr,
@@ -578,7 +559,6 @@ static void sun8i_dwmac_set_umac_addr(struct
mac_device_info *hw,
unsigned int reg_n)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
if (!addr) {
writel(0, ioaddr + EMAC_MACADDR_HI(reg_n));
@@ -588,9 +568,8 @@ static void sun8i_dwmac_set_umac_addr(struct
mac_device_info *hw,
stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n),
EMAC_MACADDR_LO(reg_n));
if (reg_n > 0) {
- v = readl(ioaddr + EMAC_MACADDR_HI(reg_n));
- v |= MAC_ADDR_TYPE_DST;
- writel(v, ioaddr + EMAC_MACADDR_HI(reg_n));
+ setbits_le32(ioaddr + EMAC_MACADDR_HI(reg_n),
+MAC_ADDR_TYPE_DST);
}
}
@@ -608,11 +587,8 @@ static void sun8i_dwmac_get_umac_addr(struct
mac_device_info *hw,
static int sun8i_dwmac_rx_ipc_enable(struct mac_device_info *hw)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
- v = readl(ioaddr + EMAC_RX_CTL0);
- v |= EMAC_RX_DO_CRC;
- writel(v, ioaddr + EMAC_RX_CTL0);
+ setbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_DO_CRC);
return 1;
}
@@ -662,21 +638,15 @@ static void sun8i_dwmac_flow_ctrl(struct mac_device_info
*hw,
unsigned int pause_time, u32 tx_cnt)
{
void __iomem *ioaddr = hw->pcsr;
- u32 v;
- v = readl(ioaddr + EMAC_RX_CTL0);
if (fc == FLOW_AUTO)
- v |= EMAC_RX_FLOW_CTL_EN;
+ setbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_FLOW_CTL_EN);
else
- v &= ~EMAC_RX_FLOW_CTL_EN;
- writel(v, ioaddr + EMAC_RX_CTL0);
-
- v = readl(ioaddr + EMAC_TX_FLOW_CTL);
+ clrbits_le32(ioaddr + EMAC_RX_CTL0, EMAC_RX_FLOW_CTL_EN);
if (fc == FLOW_AUTO)
- v |= EMAC_TX_FLOW_CTL_EN;
+ setbits_le32(ioaddr + EMAC_TX_FLOW_CTL, EMAC_TX_FLOW_CTL_EN);
else
- v &= ~EMAC_TX_FLOW_CTL_EN;
- writel(v, ioaddr + EMAC_TX_FLOW_CTL);
+ clrbits_le32(ioaddr + EMAC_TX_FLOW_CTL, EMAC_TX_FLOW_CTL_EN);
}
static int sun8i_dwmac_reset(struct stmmac_priv *priv)
--
2.16.4
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[PATCH v2 4/7] ata: ahci_sunxi: use xxxsetbits32 functions
This patch converts ahci_sunxi to use xxxsetbits32 functions
Signed-off-by: Corentin Labbe
---
drivers/ata/ahci_sunxi.c | 51
1 file changed, 12 insertions(+), 39 deletions(-)
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 911710643305..5b285a6dff60 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include "ahci.h"
#define DRV_NAME "ahci-sunxi"
@@ -58,34 +59,6 @@ MODULE_PARM_DESC(enable_pmp,
#define AHCI_P0PHYCR 0x0178
#define AHCI_P0PHYSR 0x017c
-static void sunxi_clrbits(void __iomem *reg, u32 clr_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val &= ~(clr_val);
- writel(reg_val, reg);
-}
-
-static void sunxi_setbits(void __iomem *reg, u32 set_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val |= set_val;
- writel(reg_val, reg);
-}
-
-static void sunxi_clrsetbits(void __iomem *reg, u32 clr_val, u32 set_val)
-{
- u32 reg_val;
-
- reg_val = readl(reg);
- reg_val &= ~(clr_val);
- reg_val |= set_val;
- writel(reg_val, reg);
-}
-
static u32 sunxi_getbits(void __iomem *reg, u8 mask, u8 shift)
{
return (readl(reg) >> shift) & mask;
@@ -100,22 +73,22 @@ static int ahci_sunxi_phy_init(struct device *dev, void
__iomem *reg_base)
writel(0, reg_base + AHCI_RWCR);
msleep(5);
- sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
+ setbits_le32(reg_base + AHCI_PHYCS1R, BIT(19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R,
(0x7 << 24),
(0x5 << 24) | BIT(23) | BIT(18));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS1R,
+ clrsetbits_le32(reg_base + AHCI_PHYCS1R,
(0x3 << 16) | (0x1f << 8) | (0x3 << 6),
(0x2 << 16) | (0x6 << 8) | (0x2 << 6));
- sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
- sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
+ setbits_le32(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
+ clrbits_le32(reg_base + AHCI_PHYCS1R, BIT(19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R,
(0x7 << 20), (0x3 << 20));
- sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
+ clrsetbits_le32(reg_base + AHCI_PHYCS2R,
(0x1f << 5), (0x19 << 5));
msleep(5);
- sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
+ setbits_le32(reg_base + AHCI_PHYCS0R, (0x1 << 19));
timeout = 250; /* Power up takes aprox 50 us */
do {
@@ -130,7 +103,7 @@ static int ahci_sunxi_phy_init(struct device *dev, void
__iomem *reg_base)
udelay(1);
} while (1);
- sunxi_setbits(reg_base + AHCI_PHYCS2R, (0x1 << 24));
+ setbits_le32(reg_base + AHCI_PHYCS2R, (0x1 << 24));
timeout = 100; /* Calibration takes aprox 10 us */
do {
@@ -158,10 +131,10 @@ static void ahci_sunxi_start_engine(struct ata_port *ap)
struct ahci_host_priv *hpriv = ap->host->private_data;
/* Setup DMA before DMA start */
- sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0xff00, 0x4400);
+ clrsetbits_le32(hpriv->mmio + AHCI_P0DMACR, 0xff00, 0x4400);
/* Start DMA */
- sunxi_setbits(port_mmio + PORT_CMD, PORT_CMD_START);
+ setbits_le32(port_mmio + PORT_CMD, PORT_CMD_START);
}
static const struct ata_port_info ahci_sunxi_port_info = {
--
2.16.4
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[PATCH v2 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64
Hello This patchset adds a new set of functions which are open-coded in lot of place. Basicly the pattern is always the same, "read, modify a bit, write" some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) The first patch rename some powerpc funtions for being consistent with the new name convention. The second patch adds the header with all setbits functions. The third patch is a try to implement a coccinelle semantic patch to find all place where xxxbits function could be used. It should not be merged since it is un-finalized. For the moment, the "add setbits.h header" is not working and need a future coccinelle version. The four last patch are example of some drivers convertion. Thoses patchs give an example of the reduction of code won by using xxxbits32. I would like to thanks Julia Lawall for her help on the coccinelle patch. Regards Changes since v1: - renamed LE functions to _leXX - updated coccinnelle patch with JLawall's comments Corentin Labbe (7): powerpc: rename setbits32/clrbits32 to setbits32_be/clrbits32_be include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 in linux/setbits.h coccinelle: add xxxsetbitsXX converting spatch ata: ahci_sunxi: use xxxsetbits32 functions net: ethernet: stmmac: dwmac-sun8i: use xxxsetbits32 drm: meson: use xxxsetbits32 net: stmmac: dwmac-meson8b: use xxxsetbits32 arch/powerpc/include/asm/fsl_lbc.h | 2 +- arch/powerpc/include/asm/io.h | 5 +- arch/powerpc/platforms/44x/canyonlands.c | 4 +- arch/powerpc/platforms/4xx/gpio.c | 28 +- arch/powerpc/platforms/512x/pdm360ng.c | 6 +- arch/powerpc/platforms/52xx/mpc52xx_common.c | 6 +- arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 10 +- arch/powerpc/platforms/82xx/ep8248e.c | 2 +- arch/powerpc/platforms/82xx/km82xx.c | 6 +- arch/powerpc/platforms/82xx/mpc8272_ads.c | 10 +- arch/powerpc/platforms/82xx/pq2.c | 2 +- arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 4 +- arch/powerpc/platforms/82xx/pq2fads.c | 10 +- arch/powerpc/platforms/83xx/km83xx.c | 6 +- arch/powerpc/platforms/83xx/mpc836x_mds.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c | 4 +- arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +- arch/powerpc/platforms/85xx/p1022_ds.c | 4 +- arch/powerpc/platforms/85xx/p1022_rdk.c| 4 +- arch/powerpc/platforms/85xx/t1042rdb_diu.c | 4 +- arch/powerpc/platforms/85xx/twr_p102x.c| 2 +- arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 4 +- arch/powerpc/platforms/8xx/adder875.c | 2 +- arch/powerpc/platforms/8xx/m8xx_setup.c| 4 +- arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 +- arch/powerpc/platforms/8xx/mpc885ads_setup.c | 28 +- arch/powerpc/platforms/embedded6xx/flipper-pic.c | 6 +- arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 8 +- arch/powerpc/platforms/embedded6xx/wii.c | 10 +- arch/powerpc/sysdev/cpm1.c | 26 +- arch/powerpc/sysdev/cpm2.c | 16 +- arch/powerpc/sysdev/cpm_common.c | 4 +- arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 8 +- arch/powerpc/sysdev/fsl_lbc.c | 2 +- arch/powerpc/sysdev/fsl_pci.c | 8 +- arch/powerpc/sysdev/fsl_pmc.c | 2 +- arch/powerpc/sysdev/fsl_rcpm.c | 74 ++-- arch/powerpc/sysdev/fsl_rio.c | 4 +- arch/powerpc/sysdev/fsl_rmu.c | 8 +- arch/powerpc/sysdev/mpic_timer.c | 12 +- drivers/ata/ahci_sunxi.c | 51 +-- drivers/gpu/drm/meson/meson_crtc.c | 14 +- drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +- drivers/gpu/drm/meson/meson_plane.c| 13 +- drivers/gpu/drm/meson/meson_registers.h| 3 - drivers/gpu/drm/meson/meson_venc.c | 13 +- drivers/gpu/drm/meson/meson_venc_cvbs.c| 4 +- drivers/gpu/drm/meson/meson_viu.c | 65 +-- drivers/gpu/drm/meson/meson_vpp.c | 22 +- .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c| 56 +-- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 +-- include/linux/setbits.h| 88 scripts/add_new_include_in_source.py | 61 +++ scripts/coccinelle/misc/setbits32.cocci| 487 + scripts/coccinelle/misc/setbits32_relaxed.cocci| 487 + scripts/coccinelle/misc/setbits
[PATCH] drm: omap: remove unused header tcm-sita.h
tcm-sita.h is unused since commit 0d6fa53fd805 ("drm/omap: Use bitmaps for
TILER placement")
Let's remove it.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/omapdrm/tcm-sita.h | 93 --
1 file changed, 93 deletions(-)
delete mode 100644 drivers/gpu/drm/omapdrm/tcm-sita.h
diff --git a/drivers/gpu/drm/omapdrm/tcm-sita.h
b/drivers/gpu/drm/omapdrm/tcm-sita.h
deleted file mode 100644
index 460e63dbf825..
--- a/drivers/gpu/drm/omapdrm/tcm-sita.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * SImple Tiler Allocator (SiTA) private structures.
- *
- * Copyright (C) 2009-2011 Texas Instruments Incorporated - http://www.ti.com/
- * Author: Ravi Ramachandra
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * * Neither the name of Texas Instruments Incorporated nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _TCM_SITA_H
-#define _TCM_SITA_H
-
-#include "tcm.h"
-
-/* length between two coordinates */
-#define LEN(a, b) ((a) > (b) ? (a) - (b) + 1 : (b) - (a) + 1)
-
-enum criteria {
- CR_MAX_NEIGHS = 0x01,
- CR_FIRST_FOUND = 0x10,
- CR_BIAS_HORIZONTAL = 0x20,
- CR_BIAS_VERTICAL= 0x40,
- CR_DIAGONAL_BALANCE = 0x80
-};
-
-/* nearness to the beginning of the search field from 0 to 1000 */
-struct nearness_factor {
- s32 x;
- s32 y;
-};
-
-/*
- * Statistics on immediately neighboring slots. Edge is the number of
- * border segments that are also border segments of the scan field. Busy
- * refers to the number of neighbors that are occupied.
- */
-struct neighbor_stats {
- u16 edge;
- u16 busy;
-};
-
-/* structure to keep the score of a potential allocation */
-struct score {
- struct nearness_factor f;
- struct neighbor_stats n;
- struct tcm_area a;
- u16neighs; /* number of busy neighbors */
-};
-
-struct sita_pvt {
- spinlock_t lock;/* spinlock to protect access */
- struct tcm_pt div_pt; /* divider point splitting container */
- struct tcm_area ***map; /* pointers to the parent area for each slot */
-};
-
-/* assign coordinates to area */
-static inline
-void assign(struct tcm_area *a, u16 x0, u16 y0, u16 x1, u16 y1)
-{
- a->p0.x = x0;
- a->p0.y = y0;
- a->p1.x = x1;
- a->p1.y = y1;
-}
-
-#endif
--
2.16.4
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[PATCH v2 00/13] gpu: drm: amd: remove unused headers
Hello This patchset remove several headers which are not used by any source file. Regards Changes since v1: - splited in multiple patchs Corentin Labbe (13): drm/amd/include: remove unused asic_reg/oss headers drm/amd/include: remove unused asic_reg/bif headers drm/amd/include: remove unused asic_reg/dce headers drm/amd/include: remove unused asic_reg/gca headers drm/amd/include: remove unused asic_reg/gmc headers drm/amd/include: remove unused asic_reg/smu headers drm/amd/include: remove unused asic_reg/umc headers drm/amd/include: remove unused asic_reg/uvd headers drm/amd/include: remove unused asic_reg/vce headers drm/amd/include: remove unused asic_reg/sdma headers drm/amd/include: remove unused asic_reg/nbif headers drm/amd/include: remove unused displayobject.h header drm/amd/powerplay: remove unused headers .../drm/amd/include/asic_reg/bif/bif_5_0_enum.h| 1198 -- .../drm/amd/include/asic_reg/bif/bif_5_1_enum.h| 1068 - .../drm/amd/include/asic_reg/dce/dce_11_2_enum.h | 6813 -- .../drm/amd/include/asic_reg/dce/dce_8_0_enum.h| 1117 - .../gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h | 2791 --- .../drm/amd/include/asic_reg/gca/gfx_8_1_enum.h| 6808 -- .../drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h | 21368 --- .../drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h| 1198 -- .../drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h| 1068 - .../amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h | 10281 - .../drm/amd/include/asic_reg/oss/oss_2_4_enum.h| 1340 -- .../drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h | 1464 -- .../drm/amd/include/asic_reg/oss/oss_3_0_enum.h| 1497 -- .../amd/include/asic_reg/sdma0/sdma0_4_0_default.h | 286 - .../amd/include/asic_reg/sdma1/sdma1_4_0_default.h | 282 - .../gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h | 148 - .../drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h | 715 - .../gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h | 1344 -- .../drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h | 1191 -- .../amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h | 5648 - .../drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h | 1205 -- .../drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h | 1246 -- .../drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h | 1282 -- .../drm/amd/include/asic_reg/smu/smu_8_0_enum.h| 1072 - .../drm/amd/include/asic_reg/umc/umc_6_0_default.h |31 - .../drm/amd/include/asic_reg/umc/umc_6_0_offset.h |52 - .../drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h | 795 - .../drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h| 1211 -- .../drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h| 1081 - .../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h |64 - .../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h |99 - drivers/gpu/drm/amd/include/displayobject.h| 249 - .../gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h| 412 - drivers/gpu/drm/amd/powerplay/inc/pp_feature.h |67 - 34 files changed, 76491 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h
[PATCH v3 11/13] drm/amd/include: remove unused asic_reg/nbif headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h | 10281 --- 1 file changed, 10281 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h deleted file mode 100644 index c7518b84f559.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 01/13] drm/amd/include: remove unused asic_reg/oss headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/oss/oss_2_4_enum.h| 1340 -- .../drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h | 1464 --- .../drm/amd/include/asic_reg/oss/oss_3_0_enum.h| 1497 3 files changed, 4301 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h b/drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h deleted file mode 100644 index 37adf0df0fd3.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h b/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h deleted file mode 100644 index 627cff10fcce.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h deleted file mode 100644 index 09338d82afba.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 04/13] drm/amd/include: remove unused asic_reg/gca headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h | 2791 --- .../drm/amd/include/asic_reg/gca/gfx_8_1_enum.h| 6808 -- .../drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h | 21368 --- 3 files changed, 30967 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h deleted file mode 100644 index 2d672b3d2fed.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h deleted file mode 100644 index f9022097fbe9.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h deleted file mode 100644 index 397705a6b3a2.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 13/13] drm/amd/powerplay: remove unused headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h| 412 - drivers/gpu/drm/amd/powerplay/inc/pp_feature.h | 67 2 files changed, 479 deletions(-) delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/pp_feature.h diff --git a/drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h deleted file mode 100644 index b8f4b73c322e.. diff --git a/drivers/gpu/drm/amd/powerplay/inc/pp_feature.h b/drivers/gpu/drm/amd/powerplay/inc/pp_feature.h deleted file mode 100644 index 0faf6a25c18b.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 09/13] drm/amd/include: remove unused asic_reg/vce headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h | 64 -- .../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h | 99 -- 2 files changed, 163 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h deleted file mode 100644 index 2176548e9203.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h deleted file mode 100644 index ea5b26b11cb1.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 07/13] drm/amd/include: remove unused asic_reg/umc headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/umc/umc_6_0_default.h | 31 - .../drm/amd/include/asic_reg/umc/umc_6_0_offset.h | 52 -- 2 files changed, 83 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h b/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h deleted file mode 100644 index 128a18f1e362.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h deleted file mode 100644 index 6985dbba39f5.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 12/13] drm/amd/include: remove unused displayobject.h header
displayobject.h is not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- drivers/gpu/drm/amd/include/displayobject.h | 249 1 file changed, 249 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/displayobject.h diff --git a/drivers/gpu/drm/amd/include/displayobject.h b/drivers/gpu/drm/amd/include/displayobject.h deleted file mode 100644 index 67e23ff9cbd4.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 02/13] drm/amd/include: remove unused asic_reg/bif headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/bif/bif_5_0_enum.h| 1198 .../drm/amd/include/asic_reg/bif/bif_5_1_enum.h| 1068 - 2 files changed, 2266 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h deleted file mode 100644 index 46b75f4bbc36.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h deleted file mode 100644 index d8d5ae0b341f.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 06/13] drm/amd/include: remove unused asic_reg/smu headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h | 148 - .../drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h | 715 --- .../gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h | 1344 - .../drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h | 1191 - .../amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h | 5648 .../drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h | 1205 - .../drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h | 1246 - .../drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h | 1282 - .../drm/amd/include/asic_reg/smu/smu_8_0_enum.h| 1072 9 files changed, 13851 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h deleted file mode 100644 index 6b10be61efc3.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h deleted file mode 100644 index 7d3925b7266e.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h deleted file mode 100644 index 57588b11ff1a.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h deleted file mode 100644 index 61face1d0d8d.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h deleted file mode 100644 index cd7893065a4b.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h deleted file mode 100644 index c1a7aba19223.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h deleted file mode 100644 index 73bbf506b1c9.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h deleted file mode 100644 index f19c4208d963.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h deleted file mode 100644 index e1540c181bf8.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 10/13] drm/amd/include: remove unused asic_reg/sdma headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../amd/include/asic_reg/sdma0/sdma0_4_0_default.h | 286 - .../amd/include/asic_reg/sdma1/sdma1_4_0_default.h | 282 2 files changed, 568 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h b/drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h deleted file mode 100644 index 4be3cb5c4556.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h b/drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h deleted file mode 100644 index 934733762ddf.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 03/13] drm/amd/include: remove unused asic_reg/dce headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/dce/dce_11_2_enum.h | 6813 .../drm/amd/include/asic_reg/dce/dce_8_0_enum.h| 1117 2 files changed, 7930 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h deleted file mode 100644 index b2ea4202d7bd.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h deleted file mode 100644 index 6bea30ef3df5.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 00/13] gpu: drm: amd: remove unused headers
Hello This patchset remove several headers which are not used by any source file. Regards Change since v1: - splited in multiple patchs Change since v2 - Use --irreversible-delete for format-patch Corentin Labbe (13): drm/amd/include: remove unused asic_reg/oss headers drm/amd/include: remove unused asic_reg/bif headers drm/amd/include: remove unused asic_reg/dce headers drm/amd/include: remove unused asic_reg/gca headers drm/amd/include: remove unused asic_reg/gmc headers drm/amd/include: remove unused asic_reg/smu headers drm/amd/include: remove unused asic_reg/umc headers drm/amd/include: remove unused asic_reg/uvd headers drm/amd/include: remove unused asic_reg/vce headers drm/amd/include: remove unused asic_reg/sdma headers drm/amd/include: remove unused asic_reg/nbif headers drm/amd/include: remove unused displayobject.h header drm/amd/powerplay: remove unused headers .../drm/amd/include/asic_reg/bif/bif_5_0_enum.h| 1198 -- .../drm/amd/include/asic_reg/bif/bif_5_1_enum.h| 1068 - .../drm/amd/include/asic_reg/dce/dce_11_2_enum.h | 6813 -- .../drm/amd/include/asic_reg/dce/dce_8_0_enum.h| 1117 - .../gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h | 2791 --- .../drm/amd/include/asic_reg/gca/gfx_8_1_enum.h| 6808 -- .../drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h | 21368 --- .../drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h| 1198 -- .../drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h| 1068 - .../amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h | 10281 - .../drm/amd/include/asic_reg/oss/oss_2_4_enum.h| 1340 -- .../drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h | 1464 -- .../drm/amd/include/asic_reg/oss/oss_3_0_enum.h| 1497 -- .../amd/include/asic_reg/sdma0/sdma0_4_0_default.h | 286 - .../amd/include/asic_reg/sdma1/sdma1_4_0_default.h | 282 - .../gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h | 148 - .../drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h | 715 - .../gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h | 1344 -- .../drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h | 1191 -- .../amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h | 5648 - .../drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h | 1205 -- .../drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h | 1246 -- .../drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h | 1282 -- .../drm/amd/include/asic_reg/smu/smu_8_0_enum.h| 1072 - .../drm/amd/include/asic_reg/umc/umc_6_0_default.h |31 - .../drm/amd/include/asic_reg/umc/umc_6_0_offset.h |52 - .../drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h | 795 - .../drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h| 1211 -- .../drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h| 1081 - .../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h |64 - .../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h |99 - drivers/gpu/drm/amd/include/displayobject.h| 249 - .../gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h| 412 - drivers/gpu/drm/amd/powerplay/inc/pp_feature.h |67 - 34 files changed, 76491 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h delete mode 100644
[PATCH v3 05/13] drm/amd/include: remove unused asic_reg/gmc headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h| 1198 .../drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h| 1068 - 2 files changed, 2266 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h b/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h deleted file mode 100644 index 05b80f2bb147.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h b/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h deleted file mode 100644 index bc18e4d1f20e.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 08/13] drm/amd/include: remove unused asic_reg/uvd headers
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe --- .../drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h | 795 - .../drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h| 1211 .../drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h| 1081 - 3 files changed, 3087 deletions(-) delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h diff --git a/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h deleted file mode 100644 index 8ee3149df5b7.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h deleted file mode 100644 index 981086f8ee4e.. diff --git a/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h b/drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h deleted file mode 100644 index ecf47ba55c2d.. -- 2.13.6 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/exynos: remove exynos_drm_rotator.h
Since its inclusion in 2012 via commit bea8a429d91a ("drm/exynos: add rotator
ipp driver")
this header is not used by any source files and is empty.
Lets just remove it.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/exynos/exynos_drm_rotator.h | 19 ---
1 file changed, 19 deletions(-)
delete mode 100644 drivers/gpu/drm/exynos/exynos_drm_rotator.h
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.h
b/drivers/gpu/drm/exynos/exynos_drm_rotator.h
deleted file mode 100644
index 71a0b4c0c1e8..
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *
- * Authors:
- * YoungJun Cho
- * Eunchul Kim
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef_EXYNOS_DRM_ROTATOR_H_
-#define_EXYNOS_DRM_ROTATOR_H_
-
-/* TODO */
-
-#endif
--
2.13.6
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[PATCH 1/2] drm/amd: remove inclusion of non-existing scheduler directory
The scheduler directory was removed via commit 1b1f42d8fde4 ("drm: move
amd_gpu_scheduler into common location")
Remove it from include path.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/amd/amdgpu/Makefile | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
b/drivers/gpu/drm/amd/amdgpu/Makefile
index d6e5b7273853..8408aeeaf6c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -30,7 +30,6 @@ FULL_AMD_DISPLAY_PATH =
$(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME)
ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
-I$(FULL_AMD_PATH)/include \
-I$(FULL_AMD_PATH)/amdgpu \
- -I$(FULL_AMD_PATH)/scheduler \
-I$(FULL_AMD_PATH)/powerplay/inc \
-I$(FULL_AMD_PATH)/acp/include \
-I$(FULL_AMD_DISPLAY_PATH) \
--
2.16.1
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[PATCH 2/2] drm/amd: Remove inclusion of non-existing include directories
This patch fix the following build warnings: CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs] cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs] CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs] cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs] [...] This warning is shown for each file in amdgpu directory, so it spams a lot. Signed-off-by: Corentin Labbe --- drivers/gpu/drm/amd/display/Makefile | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/Makefile b/drivers/gpu/drm/amd/display/Makefile index c27c81cdeed3..22c72dffdf98 100644 --- a/drivers/gpu/drm/amd/display/Makefile +++ b/drivers/gpu/drm/amd/display/Makefile @@ -26,8 +26,6 @@ AMDDALPATH = $(RELATIVE_AMD_DISPLAY_PATH) -subdir-ccflags-y += -I$(AMDDALPATH)/ -I$(AMDDALPATH)/include - subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/ subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/inc -- 2.16.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] video: remove unused kconfig SH_LCD_MIPI_DSI
SH_LCD_MIPI_DSI is unused since commit 18b6562c243f ("fbdev: sh_mipi_dsi:
remove driver")
So no need to keep it.
Fixes: 18b6562c243f ("fbdev: sh_mipi_dsi: remove driver")
Signed-off-by: Corentin Labbe
---
drivers/video/Kconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af999893..429f15b2b51a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -8,9 +8,6 @@ menu "Graphics support"
config HAVE_FB_ATMEL
bool
-config SH_LCD_MIPI_DSI
- bool
-
source "drivers/char/agp/Kconfig"
source "drivers/gpu/vga/Kconfig"
--
2.13.6
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[PATCH] gpu: msm: remove unused headers
All thoses files are not used by anybody.
Lets just remove them.
Signed-off-by: Corentin Labbe
---
drivers/gpu/drm/msm/adreno/a2xx.xml.h | 1845 -
drivers/gpu/drm/msm/dsi/mmss_cc.xml.h | 124 ---
drivers/gpu/drm/msm/hdmi/qfprom.xml.h | 54 -
3 files changed, 2023 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/adreno/a2xx.xml.h
delete mode 100644 drivers/gpu/drm/msm/dsi/mmss_cc.xml.h
delete mode 100644 drivers/gpu/drm/msm/hdmi/qfprom.xml.h
diff --git a/drivers/gpu/drm/msm/adreno/a2xx.xml.h
b/drivers/gpu/drm/msm/adreno/a2xx.xml.h
deleted file mode 100644
index 644374c7b3e0..
--- a/drivers/gpu/drm/msm/adreno/a2xx.xml.h
+++ /dev/null
@@ -1,1845 +0,0 @@
-#ifndef A2XX_XML
-#define A2XX_XML
-
-/* Autogenerated file, DO NOT EDIT manually!
-
-This file was generated by the rules-ng-ng headergen tool in this git
repository:
-http://github.com/freedreno/envytools/
-git clone https://github.com/freedreno/envytools.git
-
-The rules-ng-ng source files this header was generated from are:
-- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml (
431 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml (
1572 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml (
37162 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (
13324 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(
31866 bytes, from 2017-06-06 18:26:14)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml (
83840 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml (
111898 bytes, from 2017-06-06 18:23:59)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml (
139480 bytes, from 2017-06-16 12:44:39)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml (
1773 bytes, from 2017-05-17 13:21:27)
-
-Copyright (C) 2013-2017 by the following authors:
-- Rob Clark (robclark)
-- Ilia Mirkin (imirkin)
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-
-enum a2xx_rb_dither_type {
- DITHER_PIXEL = 0,
- DITHER_SUBPIXEL = 1,
-};
-
-enum a2xx_colorformatx {
- COLORX_4_4_4_4 = 0,
- COLORX_1_5_5_5 = 1,
- COLORX_5_6_5 = 2,
- COLORX_8 = 3,
- COLORX_8_8 = 4,
- COLORX_8_8_8_8 = 5,
- COLORX_S8_8_8_8 = 6,
- COLORX_16_FLOAT = 7,
- COLORX_16_16_FLOAT = 8,
- COLORX_16_16_16_16_FLOAT = 9,
- COLORX_32_FLOAT = 10,
- COLORX_32_32_FLOAT = 11,
- COLORX_32_32_32_32_FLOAT = 12,
- COLORX_2_3_3 = 13,
- COLORX_8_8_8 = 14,
-};
-
-enum a2xx_sq_surfaceformat {
- FMT_1_REVERSE = 0,
- FMT_1 = 1,
- FMT_8 = 2,
- FMT_1_5_5_5 = 3,
- FMT_5_6_5 = 4,
- FMT_6_5_5 = 5,
- FMT_8_8_8_8 = 6,
- FMT_2_10_10_10 = 7,
- FMT_8_A = 8,
- FMT_8_B = 9,
- FMT_8_8 = 10,
- FMT_Cr_Y1_Cb_Y0 = 11,
- FMT_Y1_Cr_Y0_Cb = 12,
- FMT_5_5_5_1 = 13,
- FMT_8_8_8_8_A = 14,
- FMT_4_4_4_4 = 15,
- FMT_10_11_11 = 16,
- FMT_11_11_10 = 17,
- FMT_DXT1 = 18,
- FMT_DXT2_3 = 19,
- FMT_DXT4_5 = 20,
- FMT_24_8 = 22,
- FMT_24_8_FLOAT = 23,
- FMT_16 = 24,
- FMT_16_16 = 25,
- FMT_16_16_16_16 = 26,
- FMT_16_EXPAND = 27,
- FMT_16_16_EXPAND = 28,
- FMT_16_16_16_16_EXPAND = 29,
- FMT_16_FLOAT = 30,
- FMT_16_16_FLOAT = 31,
- FMT_16_16_16_16_FLOAT = 32,
- FMT_32 = 33,
- FMT_32_32 = 34,
- FMT_32_32_32_32 = 35,
- FMT_32_FLOAT = 36,
- FMT_32_32_FLOAT = 37,
- FMT_32_32_32_32_FLOAT = 38,
- FMT_32_AS_8 = 39,
- FMT_32_AS_8_8 = 40,
- FMT_16_MPEG = 41,
-
Re: [PATCH V9 00/24] drm: sun4i: add Display Engine 3.3 (DE33) support
Le Wed, May 07, 2025 at 04:13:38PM -0500, Rob Herring a écrit : > On Wed, May 7, 2025 at 3:22 PM Chris Morgan wrote: > > > > From: Chris Morgan > > > > I've spoken with Ryan and he agreed to let me take over this series to > > get the display engine working on the Allwinner H616. I've taken his > > previous patch series for Display Engine 3.3 and combined it with the > > LCD controller patch series. I've also fixed a few additional bugs and > > made some changes to the device tree bindings. > > > > Changes since V8: > > - Combined the DE33 [1] series and the LCD [2] series to better track > >all patches necessary to output to an LCD display for the Allwinner > >H700. > > - Added a required LVDS reset as requested here [3]. > > - Added compatible strings with a fallback for > >allwinner,sun50i-h616-display-engine, allwinner,sun50i-h616-tcon-top, > >and allwinner,sun50i-h616-sram-c. > > - Added binding documentation for the LCD controller. > > - Renamed the de3_sram device tree node to de33_sram. > > - Corrected the LVDS reset for the LCD controller binding. > > - Removed the PWM pins from the pincontroller bindings, as PWM is not > >yet supported. > > - Reordered the patches so that a binding or a device tree node is not > >referenced before it is defined. > > > > [1] > > https://lore.kernel.org/linux-sunxi/20250310092345.31708-1-r...@testtoast.com/ > > [2] > > https://lore.kernel.org/linux-sunxi/20250216092827.15444-1-r...@testtoast.com/ > > [3] https://lore.kernel.org/linux-sunxi/38669808.XM6RcZxFsP@jernej-laptop/ > > > > Chris Morgan (24): > > dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset > > clk: sunxi-ng: h616: Add LVDS reset for LCD TCON > > drm: sun4i: de2/de3: add mixer version enum > > drm: sun4i: de2/de3: refactor mixer initialisation > > drm: sun4i: de2/de3: add generic blender register reference function > > drm: sun4i: de2/de3: use generic register reference function for layer > > configuration > > dt-bindings: allwinner: add H616 DE33 bus binding > > dt-bindings: allwinner: add H616 DE33 clock binding > > dt-bindings: allwinner: add H616 DE33 mixer binding > > clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support > > drm: sun4i: de33: vi_scaler: add Display Engine 3.3 (DE33) support > > drm: sun4i: de33: mixer: add Display Engine 3.3 (DE33) support > > drm: sun4i: de33: mixer: add mixer configuration for the H616 > > dt-bindings: allwinner: Add TCON_TOP and TCON_LCD clock/reset defines > > dt-bindings: display: sun4i: Add compatible strings for H616 DE > > dt-bindings: display: sun4i: Add compatible strings for H616 TCON TOP > > dt-bindings: sram: sunxi-sram: Add H616 SRAM C compatible > > dt-bindings: display: Add R40 and H616 display engine compatibles > > drm/sun4i: tcon: Add support for R40 LCD > > arm64: dts: allwinner: h616: add display engine, bus and mixer nodes > > arm64: dts: allwinner: h616: Add TCON nodes to H616 DTSI > > arm64: dts: allwinner: h616: add LCD and LVDS pins > > arm64: dts: allwinner: rg35xx: Add GPIO backlight control > > arm64: dts: allwinner: rg35xx: Enable LCD output > > What's the base for this series? It didn't apply for me (using b4). > > Rob > I tested it on top of linux-next next-20250508 and revert "arm64: dts: allwinner: h616: Add Mali GPU node"
