Re: [PATCH v4 7/8] drm/panel: nt35510: move hardwired parameters to configuration
On Fri, Jan 5, 2024 at 8:08 PM Linus Walleij wrote:
>
> On Thu, Jan 4, 2024 at 9:42 AM Dario Binacchi
> wrote:
>
> > This patch, preparatory for future developments, move the hardwired
> > parameters to configuration data to allow the addition of new
> > NT35510-based panels.
> >
> > Signed-off-by: Dario Binacchi
>
> I tested this patch on the NT35510-based Skomer and it makes the
> whole display mirrored around the Y-axis (text from right to left instead
> of the other way around, penguins appear mirrored upper right
> etc).
>
> + /* Enable TE, EoTP and RGB pixel format */
> + .dopctr = { NT35510_DOPCTR_0_DSITE | NT35510_DOPCTR_0_EOTP |
> + NT35510_DOPCTR_0_N565, NT35510_DOPCTR_1_CTB },
> + .madctl = NT35510_ROTATE_180_SETTING,
>
> Changing this to NT35510_ROTATE_0_SETTING makes it work
> fine again.
Sorry for the mistake
Thanks and regards,
Dario Binacchi
>
> With that change:
> Reviewed-by: Linus Walleij
> Tested-by: Linus Walleij
>
> Yours,
> Linus Walleij
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v4 8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK
On Fri, Jan 5, 2024 at 8:09 PM Linus Walleij wrote:
>
> On Thu, Jan 4, 2024 at 9:42 AM Dario Binacchi
> wrote:
>
> > The initialization commands are taken from the STMicroelectronics driver
> > found at [1].
> > To ensure backward compatibility, flags have been added to enable gamma
> > correction setting and display control. In other cases, registers have
> > been set to their default values according to the specifications found
> > in the datasheet.
> >
> > [1]
> > https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Drivers/BSP/Components/nt35510/
> > Signed-off-by: Dario Binacchi
> >
> > ---
> >
> > (no changes since v2)
>
> Reviewed-by: Linus Walleij
> (also tested to not regress my hardware)
After submitting v4, I tested the driver under different conditions,
i. e. without enabling display support in
U-Boot (I also implemented a version for U-Boot, which I will send
only after this series is merged into
the Linux kernel). In that condition I encountered an issue with the reset pin.
The minimal fix, would be this:
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
index c85dd0d0829d..89ba99763468 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt35510.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt35510.c
@@ -1133,7 +1133,7 @@ static int nt35510_probe(struct mipi_dsi_device *dsi)
if (ret)
return ret;
- nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
+ nt->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(nt->reset_gpio)) {
dev_err(dev, "error getting RESET GPIO\n");
return PTR_ERR(nt->reset_gpio);
With the doubt that this might cause a regression in your use case.
I then tried modifying the device tree instead of the nt35510 driver.
In the end, I arrived
at this patch that leaves me with some doubts, especially regarding
the strict option.
diff --git
a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-m>
index 014cac192375..32ed420a6cbf 100644
--- a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
+++ b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts
@@ -13,6 +13,17 @@ &panel0 {
compatible = "frida,frd400b25025", "novatek,nt35510";
vddi-supply = <&vcc_3v3>;
vdd-supply = <&vcc_3v3>;
+ pinctrl-0 = <&panel_reset>;
+ pinctrl-names = "default";
/delete-property/backlight;
/delete-property/power-supply;
};
+
+&pinctrl {
+ panel_reset: panel-reset {
+ pins1 {
+ pinmux = ;
+ output-high;
+ };
+ };
+};
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c
b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 346a31f31bba..6f055f7f96a2 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -895,7 +895,6 @@ static const struct pinmux_ops stm32_pmx_ops = {
.set_mux= stm32_pmx_set_mux,
.gpio_set_direction = stm32_pmx_gpio_set_direction,
.request= stm32_pmx_request,
- .strict = true,
};
Another option to fix my use case without introducing regressions
could be to add a
new property to the device tree that suggests whether to call
devm_gpiod_get_optional()
with the GPIOD_ASIS or GPIOD_OUT_HIGH parameter.
What is your opinion?
Thanks and regards,
Dario Binacchi
>
> Yours,
> Linus Walleij
--
Dario Binacchi
Senior Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[PATCH][next] accel/habanalabs: remove redundant assignment to pointer 'input'
From: Colin Ian King
The pointer input is assigned a value that is not read, it is
being re-assigned again later with the same value. Resolve this
by moving the declaration to input into the if block.
Cleans up clang scan build warning:
warning: Value stored to 'input' during its initialization is never
read [deadcode.DeadStores]
Signed-off-by: Colin Ian King
---
drivers/accel/habanalabs/goya/goya_coresight.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/accel/habanalabs/goya/goya_coresight.c
b/drivers/accel/habanalabs/goya/goya_coresight.c
index 41cae5fd843b..3827ea4c02f7 100644
--- a/drivers/accel/habanalabs/goya/goya_coresight.c
+++ b/drivers/accel/habanalabs/goya/goya_coresight.c
@@ -576,7 +576,6 @@ static int goya_config_spmu(struct hl_device *hdev,
struct hl_debug_params *params)
{
u64 base_reg;
- struct hl_debug_params_spmu *input = params->input;
u64 *output;
u32 output_arr_len;
u32 events_num;
@@ -592,7 +591,7 @@ static int goya_config_spmu(struct hl_device *hdev,
base_reg = debug_spmu_regs[params->reg_idx] - CFG_BASE;
if (params->enable) {
- input = params->input;
+ struct hl_debug_params_spmu *input = params->input;
if (!input)
return -EINVAL;
--
2.43.0
Re: [PATCH V5 1/2] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI
Hello Adam, On Fri, Jan 05, 2024 at 07:56:21PM -0600, Adam Ford wrote: > From: Lucas Stach > > Add binding for the i.MX8MP HDMI parallel video interface block. > > Signed-off-by: Lucas Stach > Reviewed-by: Laurent Pinchart > Reviewed-by: Conor Dooley Without looking at the patch's content: This lacks a Signed-off line by you. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König| Industrial Linux Solutions | https://www.pengutronix.de/ | signature.asc Description: PGP signature
[PATCH v3 1/1] drm/tests: Add KUnit tests for drm_mode_create_dvi_i_properties()
---
drivers/gpu/drm/tests/drm_connector_test.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/tests/drm_connector_test.c
b/drivers/gpu/drm/tests/drm_connector_test.c
index c66aa2dc8d9d..aad63839b5e5 100644
--- a/drivers/gpu/drm/tests/drm_connector_test.c
+++ b/drivers/gpu/drm/tests/drm_connector_test.c
@@ -4,6 +4,9 @@
*/
#include
+#include
+#include
+#include
#include
@@ -58,10 +61,27 @@ static void drm_test_get_tv_mode_from_name_truncated(struct
kunit *test)
KUNIT_EXPECT_LT(test, ret, 0);
};
+static void drm_test_mode_create_dvi_i_properties(struct kunit *test)
+{
+ struct drm_device *drm;
+ struct device *dev;
+
+ dev = drm_kunit_helper_alloc_device(test);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dev);
+
+ drm = __drm_kunit_helper_alloc_drm_device(test, dev, sizeof(*drm), 0,
DRIVER_MODESET);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, drm);
+
+ KUNIT_EXPECT_EQ(test, drm_mode_create_dvi_i_properties(drm), 0);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test,
drm->mode_config.dvi_i_select_subconnector_property);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test,
drm->mode_config.dvi_i_subconnector_property);
+}
+
static struct kunit_case drm_get_tv_mode_from_name_tests[] = {
KUNIT_CASE_PARAM(drm_test_get_tv_mode_from_name_valid,
drm_get_tv_mode_from_name_valid_gen_params),
KUNIT_CASE(drm_test_get_tv_mode_from_name_truncated),
+ KUNIT_CASE(drm_test_mode_create_dvi_i_properties),
{ }
};
--
2.34.1
[PATCH 1/1] Refactor radeon driver to use drm_gem_create_map_offset() instead of its custom implementation for associating GEM object with a fake offset. Since, we already have a generic implementatio
Signed-off-by: Dipam Turkar
---
drivers/gpu/drm/radeon/radeon_drv.c | 2 +-
drivers/gpu/drm/radeon/radeon_gem.c | 24 ++--
2 files changed, 3 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index fa531493b111..f590ed65ffba 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -578,7 +578,7 @@ static const struct drm_driver kms_driver = {
.ioctls = radeon_ioctls_kms,
.num_ioctls = ARRAY_SIZE(radeon_ioctls_kms),
.dumb_create = radeon_mode_dumb_create,
- .dumb_map_offset = radeon_mode_dumb_mmap,
+ .dumb_map_offset = drm_gem_dumb_map_offset,
.fops = &radeon_driver_kms_fops,
.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c
b/drivers/gpu/drm/radeon/radeon_gem.c
index 358d19242f4b..99794c550d2c 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -31,6 +31,7 @@
#include
#include
+#include
#include
#include
@@ -480,33 +481,12 @@ int radeon_gem_set_domain_ioctl(struct drm_device *dev,
void *data,
return r;
}
-int radeon_mode_dumb_mmap(struct drm_file *filp,
- struct drm_device *dev,
- uint32_t handle, uint64_t *offset_p)
-{
- struct drm_gem_object *gobj;
- struct radeon_bo *robj;
-
- gobj = drm_gem_object_lookup(filp, handle);
- if (gobj == NULL) {
- return -ENOENT;
- }
- robj = gem_to_radeon_bo(gobj);
- if (radeon_ttm_tt_has_userptr(robj->rdev, robj->tbo.ttm)) {
- drm_gem_object_put(gobj);
- return -EPERM;
- }
- *offset_p = radeon_bo_mmap_offset(robj);
- drm_gem_object_put(gobj);
- return 0;
-}
-
int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
struct drm_radeon_gem_mmap *args = data;
- return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
+ return drm_gem_dumb_map_offset(filp, dev, args->handle,
&args->addr_ptr);
}
int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
--
2.34.1
[Bug 218347] Crash. amdgpu : drm:amdgpu_cs_ioctl : Failed to initialize parser -125
https://bugzilla.kernel.org/show_bug.cgi?id=218347 Artem S. Tashkinov (a...@gmx.com) changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |ANSWERED --- Comment #2 from Artem S. Tashkinov (a...@gmx.com) --- Please report here instead: https://gitlab.freedesktop.org/drm/amd/-/issues -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[PATCH] drm/stm: Fix an error handling path in stm_drm_platform_probe()
If drm_dev_register() fails, a call to drv_load() must be undone, as
already done in the remove function.
Fixes: b759012c5fa7 ("drm/stm: Add STM32 LTDC driver")
Signed-off-by: Christophe JAILLET
---
This was already sent a few years ago in [1] but it got no response.
Since, there has been some activity on this driver, so I send it again.
Note that it is untested.
[1]:
https://lore.kernel.org/all/20200501125511.132029-1-christophe.jail...@wanadoo.fr/
---
drivers/gpu/drm/stm/drv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
index e8523abef27a..4d2db079ad4f 100644
--- a/drivers/gpu/drm/stm/drv.c
+++ b/drivers/gpu/drm/stm/drv.c
@@ -203,12 +203,14 @@ static int stm_drm_platform_probe(struct platform_device
*pdev)
ret = drm_dev_register(ddev, 0);
if (ret)
- goto err_put;
+ goto err_unload;
drm_fbdev_dma_setup(ddev, 16);
return 0;
+err_unload:
+ drv_unload(ddev);
err_put:
drm_dev_put(ddev);
--
2.34.1
[PATCH V6 1/2] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI
From: Lucas Stach
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Reviewed-by: Conor Dooley
Signed-off-by: Adam Ford
---
V6: Add s-o-b message for myself (Adam)
V5: I tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
Removed the pipe character from the Description.
Increased the register size from 0x40 to 0x44.
diff --git
a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
new file mode 100644
index ..3377f152f319
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP HDMI Parallel Video Interface
+
+maintainers:
+ - Lucas Stach
+
+description:
+ The HDMI parallel video interface is a timing and sync generator block in the
+ i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
+
+properties:
+ compatible:
+const: fsl,imx8mp-hdmi-pvi
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description: Input from the LCDIF controller.
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description: Output to the HDMI TX controller.
+
+required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+display-bridge@32fc4000 {
+compatible = "fsl,imx8mp-hdmi-pvi";
+reg = <0x32fc4000 0x44>;
+interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+pvi_from_lcdif3: endpoint {
+remote-endpoint = <&lcdif3_to_pvi>;
+};
+};
+
+port@1 {
+reg = <1>;
+pvi_to_hdmi_tx: endpoint {
+remote-endpoint = <&hdmi_tx_from_pvi>;
+};
+};
+};
+};
--
2.43.0
[PATCH V6 2/2] drm/bridge: imx: add driver for HDMI TX Parallel Video Interface
From: Lucas Stach
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the video
sync signals to act in bypass mode.
Signed-off-by: Lucas Stach
Reviewed-by: Luca Ceresoli (v2)
Tested-by: Marek Vasut (v1)
Tested-by: Luca Ceresoli (v2)
Tested-by: Richard Leitner (v2)
Tested-by: Frieder Schrempf (v2)
Reviewed-by: Laurent Pinchart (v3)
Reviewed-by: Luca Ceresoli
Tested-by: Luca Ceresoli
Tested-by: Fabio Estevam
Signed-off-by: Adam Ford
---
V6: No change.
V5: I (Adam) tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
No changes from V4 to V5
diff --git a/drivers/gpu/drm/bridge/imx/Kconfig
b/drivers/gpu/drm/bridge/imx/Kconfig
index 5a4f3d58501e..a4d13331e320 100644
--- a/drivers/gpu/drm/bridge/imx/Kconfig
+++ b/drivers/gpu/drm/bridge/imx/Kconfig
@@ -3,6 +3,13 @@ if ARCH_MXC || COMPILE_TEST
config DRM_IMX_LDB_HELPER
tristate
+config DRM_IMX8MP_HDMI_PVI
+ tristate "Freescale i.MX8MP HDMI PVI bridge support"
+ depends on OF
+ help
+ Choose this to enable support for the internal HDMI TX Parallel
+ Video Interface found on the Freescale i.MX8MP SoC.
+
config DRM_IMX8QM_LDB
tristate "Freescale i.MX8QM LVDS display bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/imx/Makefile
b/drivers/gpu/drm/bridge/imx/Makefile
index 2b0c2e44aa1b..e2c2106509fa 100644
--- a/drivers/gpu/drm/bridge/imx/Makefile
+++ b/drivers/gpu/drm/bridge/imx/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
+obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
new file mode 100644
index ..9efe051a1e31
--- /dev/null
+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HTX_PVI_CTRL 0x0
+#define PVI_CTRL_OP_VSYNC_POL BIT(18)
+#define PVI_CTRL_OP_HSYNC_POL BIT(17)
+#define PVI_CTRL_OP_DE_POLBIT(16)
+#define PVI_CTRL_INP_VSYNC_POLBIT(14)
+#define PVI_CTRL_INP_HSYNC_POLBIT(13)
+#define PVI_CTRL_INP_DE_POL BIT(12)
+#define PVI_CTRL_MODE_MASKGENMASK(2, 1)
+#define PVI_CTRL_MODE_LCDIF 2
+#define PVI_CTRL_EN BIT(0)
+
+struct imx8mp_hdmi_pvi {
+ struct drm_bridge bridge;
+ struct device *dev;
+ struct drm_bridge *next_bridge;
+ void __iomem*regs;
+};
+
+static inline struct imx8mp_hdmi_pvi *
+to_imx8mp_hdmi_pvi(struct drm_bridge *bridge)
+{
+ return container_of(bridge, struct imx8mp_hdmi_pvi, bridge);
+}
+
+static int imx8mp_hdmi_pvi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
+{
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+
+ return drm_bridge_attach(bridge->encoder, pvi->next_bridge,
+bridge, flags);
+}
+
+static void imx8mp_hdmi_pvi_bridge_enable(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state)
+{
+ struct drm_atomic_state *state = bridge_state->base.state;
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+ struct drm_connector_state *conn_state;
+ const struct drm_display_mode *mode;
+ struct drm_crtc_state *crtc_state;
+ struct drm_connector *connector;
+ u32 bus_flags, val;
+
+ connector = drm_atomic_get_new_connector_for_encoder(state,
bridge->encoder);
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+
+ if (WARN_ON(pm_runtime_resume_and_get(pvi->dev)))
+ return;
+
+ mode = &crtc_state->adjusted_mode;
+
+ val = FIELD_PREP(PVI_CTRL_MODE_MASK, PVI_CTRL_MODE_LCDIF) | PVI_CTRL_EN;
+
+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)
+ val |= PVI_CTRL_OP_VSYNC_POL | PVI_CTRL_INP_VSYNC_POL;
+
+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)
+ val |= PVI_CTRL_OP_HSYNC_POL | PVI_CTRL_INP_HSYNC_POL;
+
+ if (pvi->next_bridge->timings)
+ bus_flags = pvi->next_bridge->timings->input_bus_f
[PATCH V7 1/2] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI
From: Lucas Stach
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Reviewed-by: Conor Dooley
Signed-off-by: Adam Ford
---
V7: No Change
V6: Add s-o-b message for myself (Adam)
V5: I tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
Removed the pipe character from the Description.
Increased the register size from 0x40 to 0x44.
diff --git
a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
new file mode 100644
index ..3377f152f319
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP HDMI Parallel Video Interface
+
+maintainers:
+ - Lucas Stach
+
+description:
+ The HDMI parallel video interface is a timing and sync generator block in the
+ i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
+
+properties:
+ compatible:
+const: fsl,imx8mp-hdmi-pvi
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description: Input from the LCDIF controller.
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description: Output to the HDMI TX controller.
+
+required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+display-bridge@32fc4000 {
+compatible = "fsl,imx8mp-hdmi-pvi";
+reg = <0x32fc4000 0x44>;
+interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+pvi_from_lcdif3: endpoint {
+remote-endpoint = <&lcdif3_to_pvi>;
+};
+};
+
+port@1 {
+reg = <1>;
+pvi_to_hdmi_tx: endpoint {
+remote-endpoint = <&hdmi_tx_from_pvi>;
+};
+};
+};
+};
--
2.43.0
[PATCH V7 2/2] drm/bridge: imx: add driver for HDMI TX Parallel Video Interface
From: Lucas Stach
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the video
sync signals to act in bypass mode.
Signed-off-by: Lucas Stach
Reviewed-by: Luca Ceresoli (v2)
Tested-by: Marek Vasut (v1)
Tested-by: Luca Ceresoli (v2)
Tested-by: Richard Leitner (v2)
Tested-by: Frieder Schrempf (v2)
Reviewed-by: Laurent Pinchart (v3)
Reviewed-by: Luca Ceresoli
Tested-by: Luca Ceresoli
Tested-by: Fabio Estevam
Signed-off-by: Adam Ford
---
V7: Re-do some includes to address build issues after rebasing from
Linux-next
V6: No change.
V5: I (Adam) tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
No changes from V4 to V5
diff --git a/drivers/gpu/drm/bridge/imx/Kconfig
b/drivers/gpu/drm/bridge/imx/Kconfig
index 5a4f3d58501e..a4d13331e320 100644
--- a/drivers/gpu/drm/bridge/imx/Kconfig
+++ b/drivers/gpu/drm/bridge/imx/Kconfig
@@ -3,6 +3,13 @@ if ARCH_MXC || COMPILE_TEST
config DRM_IMX_LDB_HELPER
tristate
+config DRM_IMX8MP_HDMI_PVI
+ tristate "Freescale i.MX8MP HDMI PVI bridge support"
+ depends on OF
+ help
+ Choose this to enable support for the internal HDMI TX Parallel
+ Video Interface found on the Freescale i.MX8MP SoC.
+
config DRM_IMX8QM_LDB
tristate "Freescale i.MX8QM LVDS display bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/imx/Makefile
b/drivers/gpu/drm/bridge/imx/Makefile
index 2b0c2e44aa1b..e2c2106509fa 100644
--- a/drivers/gpu/drm/bridge/imx/Makefile
+++ b/drivers/gpu/drm/bridge/imx/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
+obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
new file mode 100644
index ..a76b7669fe8a
--- /dev/null
+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HTX_PVI_CTRL 0x0
+#define PVI_CTRL_OP_VSYNC_POL BIT(18)
+#define PVI_CTRL_OP_HSYNC_POL BIT(17)
+#define PVI_CTRL_OP_DE_POLBIT(16)
+#define PVI_CTRL_INP_VSYNC_POLBIT(14)
+#define PVI_CTRL_INP_HSYNC_POLBIT(13)
+#define PVI_CTRL_INP_DE_POL BIT(12)
+#define PVI_CTRL_MODE_MASKGENMASK(2, 1)
+#define PVI_CTRL_MODE_LCDIF 2
+#define PVI_CTRL_EN BIT(0)
+
+struct imx8mp_hdmi_pvi {
+ struct drm_bridge bridge;
+ struct device *dev;
+ struct drm_bridge *next_bridge;
+ void __iomem*regs;
+};
+
+static inline struct imx8mp_hdmi_pvi *
+to_imx8mp_hdmi_pvi(struct drm_bridge *bridge)
+{
+ return container_of(bridge, struct imx8mp_hdmi_pvi, bridge);
+}
+
+static int imx8mp_hdmi_pvi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
+{
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+
+ return drm_bridge_attach(bridge->encoder, pvi->next_bridge,
+bridge, flags);
+}
+
+static void imx8mp_hdmi_pvi_bridge_enable(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state)
+{
+ struct drm_atomic_state *state = bridge_state->base.state;
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+ struct drm_connector_state *conn_state;
+ const struct drm_display_mode *mode;
+ struct drm_crtc_state *crtc_state;
+ struct drm_connector *connector;
+ u32 bus_flags, val;
+
+ connector = drm_atomic_get_new_connector_for_encoder(state,
bridge->encoder);
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+
+ if (WARN_ON(pm_runtime_resume_and_get(pvi->dev)))
+ return;
+
+ mode = &crtc_state->adjusted_mode;
+
+ val = FIELD_PREP(PVI_CTRL_MODE_MASK, PVI_CTRL_MODE_LCDIF) | PVI_CTRL_EN;
+
+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)
+ val |= PVI_CTRL_OP_VSYNC_POL | PVI_CTRL_INP_VSYNC_POL;
+
+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)
+ val |= PVI_CTRL_OP_HSYNC_POL | PVI_CTRL_INP_HSYNC_POL;
+
+
[PATCH V2 1/2] dt-bindings: phy: add binding for the i.MX8MP HDMI PHY
From: Lucas Stach
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V2: Rebase on Linux-Next
Fix bot error due to the word 'binding' being in the description
Add phy-cells to the required list
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
new file mode 100644
index ..d1b941b48151
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP HDMI PHY
+
+maintainers:
+ - Lucas Stach
+
+properties:
+ compatible:
+enum:
+ - fsl,imx8mp-hdmi-phy
+
+ reg:
+maxItems: 1
+
+ "#clock-cells":
+const: 0
+
+ clocks:
+minItems: 2
+maxItems: 2
+
+ clock-names:
+items:
+ - const: apb
+ - const: ref
+
+ "#phy-cells":
+const: 0
+
+ power-domains:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+ - clocks
+ - clock-names
+ - "#phy-cells"
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+phy@32fdff00 {
+compatible = "fsl,imx8mp-hdmi-phy";
+reg = <0x32fdff00 0x100>;
+clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+ <&clk IMX8MP_CLK_HDMI_24M>;
+clock-names = "apb", "ref";
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>;
+#clock-cells = <0>;
+#phy-cells = <0>;
+};
--
2.43.0
[PATCH V2 2/2] phy: freescale: add Samsung HDMI PHY
From: Lucas Stach
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V2: Fixed some whitespace found from checkpatch
Change error handling when enabling apbclk to use dev_err_probe
Rebase on Linux-Next
I (Adam) tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index 853958fb2c06..5c2b73042dfc 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -35,6 +35,12 @@ config PHY_FSL_IMX8M_PCIE
Enable this to add support for the PCIE PHY as found on
i.MX8M family of SOCs.
+config PHY_FSL_SAMSUNG_HDMI_PHY
+ tristate "Samsung HDMI PHY support"
+ depends on OF && HAS_IOMEM
+ help
+ Enable this to add support for the Samsung HDMI PHY in i.MX8MP.
+
endif
config PHY_FSL_LYNX_28G
diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile
index cedb328bc4d2..dbcafdcc8751 100644
--- a/drivers/phy/freescale/Makefile
+++ b/drivers/phy/freescale/Makefile
@@ -3,4 +3,5 @@ obj-$(CONFIG_PHY_FSL_IMX8MQ_USB)+= phy-fsl-imx8mq-usb.o
obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o
obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o
+obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) += phy-fsl-samsung-hdmi.o
obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
new file mode 100644
index ..54e93ea898f7
--- /dev/null
+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
@@ -0,0 +1,1078 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ * Copyright 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HDMI_TX_CONTROL0 0x200
+#define HDMI_TX_CONTROL_PHY_PWRDWNBIT(3)
+
+#define PHY_REG_33 0x84
+#define REG33_MODE_SET_DONE BIT(7)
+#define REG33_FIX_DA BIT(1)
+
+#define PHY_REG_34 0x88
+#define REG34_PHY_READY BIT(7)
+#define REG34_PLL_LOCKBIT(6)
+#define REG34_PHY_CLK_READY BIT(5)
+
+
+#define PHY_PLL_REGS_NUM 48
+
+struct phy_config {
+ u32 clk_rate;
+ u8 regs[PHY_PLL_REGS_NUM];
+};
+
+const struct phy_config phy_pll_cfg[] = {
+ { 2225, {
+ 0x00, 0xD1, 0x4B, 0xF1, 0x89, 0x88, 0x80, 0x40,
+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x15, 0x25, 0x80,
+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32,
+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00,
+ },
+ }, {
+ 2375, {
+ 0x00, 0xD1, 0x50, 0xF1, 0x86, 0x85, 0x80, 0x40,
+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x03, 0x25, 0x80,
+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32,
+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00,
+ },
+ }, {
+ 2400, {
+ 0x00, 0xD1, 0x50, 0xF0, 0x00, 0x00, 0x80, 0x00,
+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x01, 0x25, 0x80,
+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32,
+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00,
+ },
+ }, {
+ 24024000, {
+ 0x00, 0xD1, 0x50, 0xF1, 0x99, 0x02, 0x80, 0x40,
+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x00, 0x25, 0x80,
+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32,
+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00,
+ },
+ }, {
+ 25175000, {
+ 0x00, 0xD1, 0x54, 0xFC, 0xCC, 0x91, 0x80, 0x40,
+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0xF5, 0x24, 0x80,
+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32,
+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x
[PATCH] driver core: component: fix spellos
Correct spelling mistakes reported by codespell. Signed-off-by: Randy Dunlap Cc: Greg Kroah-Hartman Cc: "Rafael J. Wysocki" Cc: dri-devel@lists.freedesktop.org --- drivers/base/component.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff -- a/drivers/base/component.c b/drivers/base/component.c --- a/drivers/base/component.c +++ b/drivers/base/component.c @@ -751,7 +751,7 @@ static int __component_add(struct device * component_bind_all(). See also &struct component_ops. * * @subcomponent must be nonzero and is used to differentiate between multiple - * components registerd on the same device @dev. These components are match + * components registered on the same device @dev. These components are match * using component_match_add_typed(). * * The component needs to be unregistered at driver unload/disconnect by @@ -781,7 +781,7 @@ EXPORT_SYMBOL_GPL(component_add_typed); * The component needs to be unregistered at driver unload/disconnect by * calling component_del(). * - * See also component_add_typed() for a variant that allows multipled different + * See also component_add_typed() for a variant that allows multiple different * components on the same device. */ int component_add(struct device *dev, const struct component_ops *ops)
