[PATCH 18/41] ARM: omap: remove debug-leds driver
From: Arnd Bergmann
It has been impossible to select this driver for six years
without anyone noticing, so just kill it completely.
Fixes: 54ea18e8866a ("ARM: OMAP2+: Remove board file for H4")
Signed-off-by: Arnd Bergmann
---
arch/arm/plat-omap/Kconfig | 10 --
arch/arm/plat-omap/Makefile | 4 -
arch/arm/plat-omap/debug-leds.c | 171
3 files changed, 185 deletions(-)
delete mode 100644 arch/arm/plat-omap/debug-leds.c
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index dfa19d5030e3..dc53ea8e5bbb 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -11,16 +11,6 @@ config ARCH_OMAP_OTG
comment "OMAP Feature Selections"
-config OMAP_DEBUG_DEVICES
- bool
- help
- For debug cards on TI reference boards.
-
-config OMAP_DEBUG_LEDS
- def_bool y if NEW_LEDS
- depends on OMAP_DEBUG_DEVICES
- select LEDS_CLASS
-
config POWER_AVS_OMAP
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 98a7b607873a..68ccec9de106 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -7,7 +7,3 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) :=
-I$(srctree)/arch/arm/plat-omap/include
# Common support
obj-y := sram.o dma.o
-
-# omap_device support (OMAP2+ only at the moment)
-
-obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
deleted file mode 100644
index 2b698d074874..
--- a/arch/arm/plat-omap/debug-leds.c
+++ /dev/null
@@ -1,171 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * linux/arch/arm/plat-omap/debug-leds.c
- *
- * Copyright 2011 by Bryan Wu
- * Copyright 2003 by Texas Instruments Incorporated
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-
-/* Many OMAP development platforms reuse the same "debug board"; these
- * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
- * debug board (all green), accessed through FPGA registers.
- */
-
-/* NOTE: most boards don't have a static mapping for the FPGA ... */
-struct h2p2_dbg_fpga {
- /* offset 0x00 */
- u16 smc91x[8];
- /* offset 0x10 */
- u16 fpga_rev;
- u16 board_rev;
- u16 gpio_outputs;
- u16 leds;
- /* offset 0x18 */
- u16 misc_inputs;
- u16 lan_status;
- u16 lan_reset;
- u16 reserved0;
- /* offset 0x20 */
- u16 ps2_data;
- u16 ps2_ctrl;
- /* plus also 4 rs232 ports ... */
-};
-
-static struct h2p2_dbg_fpga __iomem *fpga;
-
-static u16 fpga_led_state;
-
-struct dbg_led {
- struct led_classdev cdev;
- u16 mask;
-};
-
-static const struct {
- const char *name;
- const char *trigger;
-} dbg_leds[] = {
- { "dbg:d4", "heartbeat", },
- { "dbg:d5", "cpu0", },
- { "dbg:d6", "default-on", },
- { "dbg:d7", },
- { "dbg:d8", },
- { "dbg:d9", },
- { "dbg:d10", },
- { "dbg:d11", },
- { "dbg:d12", },
- { "dbg:d13", },
- { "dbg:d14", },
- { "dbg:d15", },
- { "dbg:d16", },
- { "dbg:d17", },
- { "dbg:d18", },
- { "dbg:d19", },
-};
-
-/*
- * The triggers lines up below will only be used if the
- * LED triggers are compiled in.
- */
-static void dbg_led_set(struct led_classdev *cdev,
- enum led_brightness b)
-{
- struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
- u16 reg;
-
- reg = readw_relaxed(&fpga->leds);
- if (b != LED_OFF)
- reg |= led->mask;
- else
- reg &= ~led->mask;
- writew_relaxed(reg, &fpga->leds);
-}
-
-static enum led_brightness dbg_led_get(struct led_classdev *cdev)
-{
- struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
- u16 reg;
-
- reg = readw_relaxed(&fpga->leds);
- return (reg & led->mask) ? LED_FULL : LED_OFF;
-}
-
-static int fpga_probe(struct platform_device *pdev)
-{
- struct resource *iomem;
- int i;
-
- iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!iomem)
- return -ENODEV;
-
- fpga = ioremap(iomem->start, resource_size(iomem));
- writew_relaxed(0xff, &fpga->leds);
-
- for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
- struct dbg_led *led;
-
- led = kzalloc(sizeof(*led), GFP_KERNEL);
- if (!led)
- break;
-
- led->cdev.name = dbg_leds[i].name;
- led->cdev.brightness_set = dbg_led_set;
- led->cdev.brightness_get = dbg_led
[PATCH 19/41] ARM: omap: dma: make usb support optional
From: Arnd Bergmann
Most of the plat-omap/dma.c code is specific to the USB
driver. Hide that code when it is not in use, to make it
clearer which parts are actually still required.
Signed-off-by: Arnd Bergmann
---
arch/arm/plat-omap/dma.c | 45 +-
drivers/usb/gadget/udc/Kconfig | 2 +-
include/linux/omap-dma.h | 5 +++-
3 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 700ba9b600e7..b7757864d0aa 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -66,7 +66,6 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static struct omap_system_dma_plat_info *p;
static struct omap_dma_dev_attr *d;
-static void omap_clear_dma(int lch);
static int enable_1510_mode;
static u32 errata;
@@ -90,19 +89,16 @@ static int omap_dma_reserve_channels;
static DEFINE_SPINLOCK(dma_chan_lock);
static struct omap_dma_lch *dma_chan;
-static inline void disable_lnk(int lch);
-static void omap_disable_channel_irq(int lch);
-static inline void omap_enable_channel_irq(int lch);
-
-#ifdef CONFIG_ARCH_OMAP15XX
-/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
-static int omap_dma_in_1510_mode(void)
+static inline void omap_disable_channel_irq(int lch)
{
- return enable_1510_mode;
+ /* disable channel interrupts */
+ p->dma_write(0, CICR, lch);
+ /* Clear CSR */
+ if (dma_omap1())
+ p->dma_read(CSR, lch);
+ else
+ p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
}
-#else
-#define omap_dma_in_1510_mode()0
-#endif
#ifdef CONFIG_ARCH_OMAP1
static inline void set_gdma_dev(int req, int dev)
@@ -169,6 +165,17 @@ void omap_set_dma_priority(int lch, int dst_port, int
priority)
#endif
EXPORT_SYMBOL(omap_set_dma_priority);
+#if IS_ENABLED(CONFIG_USB_OMAP)
+#ifdef CONFIG_ARCH_OMAP15XX
+/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
+static int omap_dma_in_1510_mode(void)
+{
+ return enable_1510_mode;
+}
+#else
+#define omap_dma_in_1510_mode()0
+#endif
+
void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
int frame_count, int sync_mode,
int dma_trigger, int src_or_dst_synch)
@@ -418,17 +425,6 @@ static inline void omap_enable_channel_irq(int lch)
p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
}
-static inline void omap_disable_channel_irq(int lch)
-{
- /* disable channel interrupts */
- p->dma_write(0, CICR, lch);
- /* Clear CSR */
- if (dma_omap1())
- p->dma_read(CSR, lch);
- else
- p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
-}
-
void omap_disable_dma_irq(int lch, u16 bits)
{
dma_chan[lch].enabled_irqs &= ~bits;
@@ -473,6 +469,7 @@ static inline void disable_lnk(int lch)
p->dma_write(l, CLNK_CTRL, lch);
dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
}
+#endif
int omap_request_dma(int dev_id, const char *dev_name,
void (*callback)(int lch, u16 ch_status, void *data),
@@ -572,6 +569,7 @@ static void omap_clear_dma(int lch)
local_irq_restore(flags);
}
+#if IS_ENABLED(CONFIG_USB_OMAP)
void omap_start_dma(int lch)
{
u32 l;
@@ -792,6 +790,7 @@ int omap_get_dma_active_status(int lch)
return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;
}
EXPORT_SYMBOL(omap_get_dma_active_status);
+#endif
int omap_dma_running(void)
{
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index cee934dce4f0..69394dc1cdfb 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -128,7 +128,7 @@ config USB_GR_UDC
config USB_OMAP
tristate "OMAP USB Device Controller"
- depends on ARCH_OMAP1 || (ARCH_OMAP && COMPILE_TEST)
+ depends on ARCH_OMAP1
depends on ISP1301_OMAP || !(MACH_OMAP_H2 || MACH_OMAP_H3)
help
Many Texas Instruments OMAP processors have flexible full
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 5e228428fda1..07fa58ae9902 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -299,8 +299,9 @@ extern void omap_set_dma_priority(int lch, int dst_port,
int priority);
extern int omap_request_dma(int dev_id, const char *dev_name,
void (*callback)(int lch, u16 ch_status, void *data),
void *data, int *dma_ch);
-extern void omap_disable_dma_irq(int ch, u16 irq_bits);
extern void omap_free_dma(int ch);
+#if IS_ENABLED(CONFIG_USB_OMAP)
+extern void omap_disable_dma_irq(int ch, u16 irq_bits);
extern void omap_start_dma(int lch);
extern void omap_stop_dma(int lch);
extern void omap_set_dma_transfer_params(int lch, int data_type,
@@ -326,6 +327,8 @@ extern void omap_set_dma_dest_burst_mode(int lch,
extern dma_add
[PATCH 20/41] dma: omap: hide legacy interface
From: Arnd Bergmann
The legacy interface for omap-dma is only used on OMAP1, and the
same is true for the non-DT case. Make both of these conditional on
CONFIG_ARCH_OMAP1 being set to simplify the dependency.
The non-OMAP stub functions in include/linux/omap-dma.h are note needed
any more either now, because they are only called on OMAP1.
Signed-off-by: Arnd Bergmann
---
drivers/dma/ti/omap-dma.c | 19 +--
include/linux/omap-dma.h | 22 --
2 files changed, 13 insertions(+), 28 deletions(-)
diff --git a/drivers/dma/ti/omap-dma.c b/drivers/dma/ti/omap-dma.c
index 8e52a0dc1f78..27f5019bdc1e 100644
--- a/drivers/dma/ti/omap-dma.c
+++ b/drivers/dma/ti/omap-dma.c
@@ -699,6 +699,11 @@ static void omap_dma_put_lch(struct omap_dmadev *od, int
lch)
mutex_unlock(&od->lch_lock);
}
+static inline bool omap_dma_legacy(struct omap_dmadev *od)
+{
+ return IS_ENABLED(CONFIG_ARCH_OMAP1) && od->legacy;
+}
+
static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
{
struct omap_dmadev *od = to_omap_dma_dev(chan->device);
@@ -706,7 +711,7 @@ static int omap_dma_alloc_chan_resources(struct dma_chan
*chan)
struct device *dev = od->ddev.dev;
int ret;
- if (od->legacy) {
+ if (omap_dma_legacy(od)) {
ret = omap_request_dma(c->dma_sig, "DMA engine",
omap_dma_callback, c, &c->dma_ch);
} else {
@@ -718,7 +723,7 @@ static int omap_dma_alloc_chan_resources(struct dma_chan
*chan)
if (ret >= 0) {
omap_dma_assign(od, c, c->dma_ch);
- if (!od->legacy) {
+ if (!omap_dma_legacy(od)) {
unsigned val;
spin_lock_irq(&od->irq_lock);
@@ -757,7 +762,7 @@ static void omap_dma_free_chan_resources(struct dma_chan
*chan)
struct omap_dmadev *od = to_omap_dma_dev(chan->device);
struct omap_chan *c = to_omap_dma_chan(chan);
- if (!od->legacy) {
+ if (!omap_dma_legacy(od)) {
spin_lock_irq(&od->irq_lock);
od->irq_enable_mask &= ~BIT(c->dma_ch);
omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);
@@ -768,7 +773,7 @@ static void omap_dma_free_chan_resources(struct dma_chan
*chan)
od->lch_map[c->dma_ch] = NULL;
vchan_free_chan_resources(&c->vc);
- if (od->legacy)
+ if (omap_dma_legacy(od))
omap_free_dma(c->dma_ch);
else
omap_dma_put_lch(od, c->dma_ch);
@@ -1674,12 +1679,14 @@ static int omap_dma_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "omap_system_dma_plat_info is
missing");
return -ENODEV;
}
- } else {
+ } else if (IS_ENABLED(CONFIG_ARCH_OMAP1)) {
od->cfg = &default_cfg;
od->plat = omap_get_plat_info();
if (!od->plat)
return -EPROBE_DEFER;
+ } else {
+ return -ENODEV;
}
od->reg_map = od->plat->reg_map;
@@ -1855,7 +1862,7 @@ static int omap_dma_remove(struct platform_device *pdev)
dma_async_device_unregister(&od->ddev);
- if (!od->legacy) {
+ if (!omap_dma_legacy(od)) {
/* Disable all interrupts */
omap_dma_glbl_write(od, IRQENABLE_L0, 0);
}
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 07fa58ae9902..254b4e10511b 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -292,7 +292,6 @@ struct omap_system_dma_plat_info {
#define dma_omap15xx() __dma_omap15xx(d)
#define dma_omap16xx() __dma_omap16xx(d)
-#if defined(CONFIG_ARCH_OMAP)
extern struct omap_system_dma_plat_info *omap_get_plat_info(void);
extern void omap_set_dma_priority(int lch, int dst_port, int priority);
@@ -340,25 +339,4 @@ static inline int omap_lcd_dma_running(void)
}
#endif
-#else /* CONFIG_ARCH_OMAP */
-static inline void omap_set_dma_priority(int lch, int dst_port, int priority)
-{
-}
-
-static inline struct omap_system_dma_plat_info *omap_get_plat_info(void)
-{
- return NULL;
-}
-
-static inline int omap_request_dma(int dev_id, const char *dev_name,
- void (*callback)(int lch, u16 ch_status, void *data),
- void *data, int *dma_ch)
-{
- return -ENODEV;
-}
-
-static inline void omap_free_dma(int ch) { }
-
-#endif /* CONFIG_ARCH_OMAP */
-
#endif /* __LINUX_OMAP_DMA_H */
--
2.29.2
[PATCH 21/41] ARM: omap1: dma: remove omap2 specific bits
From: Arnd Bergmann
No part of plat-omap/dma.c is called on omap2 any more, so
anything omap2 specific in here can simply be removed.
Signed-off-by: Arnd Bergmann
---
arch/arm/plat-omap/dma.c | 217 ++-
1 file changed, 55 insertions(+), 162 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b7757864d0aa..eb14528f133c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -34,11 +34,9 @@
#include
-#ifdef CONFIG_ARCH_OMAP1
#include
#include
#include
-#endif
/*
* MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
@@ -51,16 +49,7 @@
#undef DEBUG
-#ifndef CONFIG_ARCH_OMAP1
-enum { DMA_CH_ALLOC_DONE, DMA_CH_PARAMS_SET_DONE, DMA_CH_STARTED,
- DMA_CH_QUEUED, DMA_CH_NOTSTARTED, DMA_CH_PAUSED, DMA_CH_LINK_ENABLED
-};
-
-enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
-#endif
-
#define OMAP_DMA_ACTIVE0x01
-#define OMAP2_DMA_CSR_CLEAR_MASK 0x
#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
@@ -94,13 +83,9 @@ static inline void omap_disable_channel_irq(int lch)
/* disable channel interrupts */
p->dma_write(0, CICR, lch);
/* Clear CSR */
- if (dma_omap1())
- p->dma_read(CSR, lch);
- else
- p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
+ p->dma_read(CSR, lch);
}
-#ifdef CONFIG_ARCH_OMAP1
static inline void set_gdma_dev(int req, int dev)
{
u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4;
@@ -112,11 +97,6 @@ static inline void set_gdma_dev(int req, int dev)
l |= (dev - 1) << shift;
omap_writel(l, reg);
}
-#else
-#define set_gdma_dev(req, dev) do {} while (0)
-#define omap_readl(reg)0
-#define omap_writel(val, reg) do {} while (0)
-#endif
#ifdef CONFIG_ARCH_OMAP1
void omap_set_dma_priority(int lch, int dst_port, int priority)
@@ -181,59 +161,24 @@ void omap_set_dma_transfer_params(int lch, int data_type,
int elem_count,
int dma_trigger, int src_or_dst_synch)
{
u32 l;
+ u16 ccr;
l = p->dma_read(CSDP, lch);
l &= ~0x03;
l |= data_type;
p->dma_write(l, CSDP, lch);
- if (dma_omap1()) {
- u16 ccr;
-
- ccr = p->dma_read(CCR, lch);
- ccr &= ~(1 << 5);
- if (sync_mode == OMAP_DMA_SYNC_FRAME)
- ccr |= 1 << 5;
- p->dma_write(ccr, CCR, lch);
-
- ccr = p->dma_read(CCR2, lch);
- ccr &= ~(1 << 2);
- if (sync_mode == OMAP_DMA_SYNC_BLOCK)
- ccr |= 1 << 2;
- p->dma_write(ccr, CCR2, lch);
- }
-
- if (dma_omap2plus() && dma_trigger) {
- u32 val;
-
- val = p->dma_read(CCR, lch);
-
- /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
- val &= ~((1 << 23) | (3 << 19) | 0x1f);
- val |= (dma_trigger & ~0x1f) << 14;
- val |= dma_trigger & 0x1f;
-
- if (sync_mode & OMAP_DMA_SYNC_FRAME)
- val |= 1 << 5;
- else
- val &= ~(1 << 5);
-
- if (sync_mode & OMAP_DMA_SYNC_BLOCK)
- val |= 1 << 18;
- else
- val &= ~(1 << 18);
-
- if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
- val &= ~(1 << 24); /* dest synch */
- val |= (1 << 23); /* Prefetch */
- } else if (src_or_dst_synch) {
- val |= 1 << 24; /* source synch */
- } else {
- val &= ~(1 << 24); /* dest synch */
- }
- p->dma_write(val, CCR, lch);
- }
+ ccr = p->dma_read(CCR, lch);
+ ccr &= ~(1 << 5);
+ if (sync_mode == OMAP_DMA_SYNC_FRAME)
+ ccr |= 1 << 5;
+ p->dma_write(ccr, CCR, lch);
+ ccr = p->dma_read(CCR2, lch);
+ ccr &= ~(1 << 2);
+ if (sync_mode == OMAP_DMA_SYNC_BLOCK)
+ ccr |= 1 << 2;
+ p->dma_write(ccr, CCR2, lch);
p->dma_write(elem_count, CEN, lch);
p->dma_write(frame_count, CFN, lch);
}
@@ -241,7 +186,7 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params);
void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
{
- if (dma_omap1() && !dma_omap15xx()) {
+ if (!dma_omap15xx()) {
u32 l;
l = p->dma_read(LCH_CTRL, lch);
@@ -258,15 +203,12 @@ void omap_set_dma_src_params(int lch, int src_port, int
src_amode,
int src_ei, int src_fi)
{
u32 l;
+ u16 w;
- if (dma_omap1()) {
- u16 w;
-
- w = p->dma_read(CSDP, lch);
- w &= ~(0x1f << 2);
- w |=
[PATCH 22/41] ARM: omap1: move plat/dma.c to mach/omap-dma.c
From: Arnd Bergmann
Most of the interface functions in plat/dma.c are only used from the
USB driver, which is practically OMAP1 specific, except for compile
testing.
The omap_get_plat_info(), omap_request_dma() and omap_free_dma()
functions are never called on omap2 because of runtime checks.
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/Makefile| 2 +-
arch/arm/{plat-omap/dma.c => mach-omap1/omap-dma.c} | 0
arch/arm/plat-omap/Makefile | 2 +-
3 files changed, 2 insertions(+), 2 deletions(-)
rename arch/arm/{plat-omap/dma.c => mach-omap1/omap-dma.c} (100%)
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 450bbf552b57..0615cb0ba580 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -5,7 +5,7 @@
# Common support
obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
-serial.o devices.o dma.o fb.o
+serial.o devices.o dma.o omap-dma.o fb.o
obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/mach-omap1/omap-dma.c
similarity index 100%
rename from arch/arm/plat-omap/dma.c
rename to arch/arm/mach-omap1/omap-dma.c
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 68ccec9de106..5d55295a14ee 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -6,4 +6,4 @@
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include
# Common support
-obj-y := sram.o dma.o
+obj-y := sram.o
--
2.29.2
[PATCH 23/41] ARM: omap: split up arch/arm/plat-omap/Kconfig
From: Arnd Bergmann All the remaining features in here are either omap1 or omap2plus specific, so move them into the respective Kconfig files. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig| 2 - arch/arm/mach-omap1/Kconfig | 37 +++ arch/arm/mach-omap2/Kconfig | 49 arch/arm/plat-omap/Kconfig | 92 - 4 files changed, 86 insertions(+), 94 deletions(-) delete mode 100644 arch/arm/plat-omap/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2e8091e2d8a8..700655e31b04 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -656,8 +656,6 @@ source "arch/arm/mach-npcm/Kconfig" source "arch/arm/mach-nspire/Kconfig" -source "arch/arm/plat-omap/Kconfig" - source "arch/arm/mach-omap1/Kconfig" source "arch/arm/mach-omap2/Kconfig" diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 04155b5ce978..93ea86954a84 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -28,6 +28,11 @@ config ARCH_OMAP16XX select CPU_ARM926T select OMAP_DM_TIMER +config ARCH_OMAP + bool + +comment "OMAP Feature Selections" + config OMAP_MUX bool "OMAP multiplexing support" default y @@ -69,6 +74,38 @@ config OMAP_32K_TIMER The actual timer selection is done in the board file through the (DT_)MACHINE_START structure. +config OMAP_MPU_TIMER + bool "Use mpu timer" + depends on ARCH_OMAP1 + help + Select this option if you want to use the OMAP mpu timer. This + timer provides more intra-tick resolution than the 32KHz timer, + but consumes more power. + +config OMAP_SERIAL_WAKE + bool "Enable wake-up events for serial ports" + depends on ARCH_OMAP1 && OMAP_MUX + default y + help + Select this option if you want to have your system wake up + to data on the serial RX line. This allows you to wake the + system from serial console. + +config OMAP_RESET_CLOCKS + bool "Reset unused clocks during boot" + depends on ARCH_OMAP + help + Say Y if you want to reset unused clocks during boot. + This option saves power, but assumes all drivers are + using the clock framework. Broken drivers that do not + yet use clock framework may not work with this option. + If you are booting from another operating system, you + probably do not want this option enabled until your + device drivers work properly. + +config ARCH_OMAP_OTG + bool + comment "OMAP Board Type" config MACH_OMAP_INNOVATOR diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 02c253de9b6e..a8adbb4d478a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -123,6 +123,8 @@ config OMAP_INTERCONNECT_BARRIER bool select ARM_HEAVY_MB +config ARCH_OMAP + bool if ARCH_OMAP2PLUS @@ -153,6 +155,53 @@ config SOC_HAS_REALTIME_COUNTER depends on SOC_OMAP5 || SOC_DRA7XX default y +config POWER_AVS_OMAP + bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" + depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM + select POWER_SUPPLY + help + Say Y to enable AVS(Adaptive Voltage Scaling) + support on OMAP containing the version 1 or + version 2 of the SmartReflex IP. + V1 is the 65nm version used in OMAP3430. + V2 is the update for the 45nm version of the IP used in OMAP3630 + and OMAP4430 + + Please note, that by default SmartReflex is only + initialized and not enabled. To enable the automatic voltage + compensation for vdd mpu and vdd core from user space, + user must write 1 to + /debug/smartreflex/sr_/autocomp, + where X is mpu_iva or core for OMAP3. + Optionally autocompensation can be enabled in the kernel + by default during system init via the enable_on_init flag + which an be passed as platform data to the smartreflex driver. + +config POWER_AVS_OMAP_CLASS3 + bool "Class 3 mode of Smartreflex Implementation" + depends on POWER_AVS_OMAP && TWL4030_CORE + help + Say Y to enable Class 3 implementation of Smartreflex + + Class 3 implementation of Smartreflex employs continuous hardware + voltage calibration. + +config OMAP3_L2_AUX_SECURE_SAVE_RESTORE + bool "OMAP3 HS/EMU save and restore for L2 AUX control register" + depends on ARCH_OMAP3 && PM + help + Without this option, L2 Auxiliary control register contents are + lost during off-mode entry on HS/EMU devices. This feature + requires support from PPA / boot-loader in HS/EMU devices, which + currently does not exist by default. + +config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID + int "Service ID for the support routine to
[PATCH 24/41] ARM: omap: un-merge plat/sram.c
From: Arnd Bergmann
The sram initialization code is the only shared omap1/2 code that
is not a standalone driver, but it is very short. Having two copies
of this code means some duplication of the sources, but actually
saves object code size as it can be inlined better.
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/devices.c | 2 +-
arch/arm/mach-omap1/sram-init.c| 91 +++--
arch/arm/mach-omap1/sram.h | 4 +-
arch/arm/mach-omap2/sram.c | 91 -
arch/arm/mach-omap2/sram.h | 5 +-
arch/arm/plat-omap/Makefile| 2 +-
arch/arm/plat-omap/include/plat/sram.h | 8 --
arch/arm/plat-omap/sram.c | 129 -
8 files changed, 182 insertions(+), 150 deletions(-)
delete mode 100644 arch/arm/plat-omap/include/plat/sram.h
delete mode 100644 arch/arm/plat-omap/sram.c
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index eb0f09edb3d1..6bc32ebda7a7 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -356,7 +356,7 @@ static int __init omap1_init_devices(void)
if (!cpu_class_is_omap1())
return -ENODEV;
- omap_sram_init();
+ omap1_sram_init();
omap1_clk_late_init();
/* please keep these calls, and their implementations above,
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
index 3bd60708c345..0e3ec32a008e 100644
--- a/arch/arm/mach-omap1/sram-init.c
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
@@ -22,18 +23,77 @@
#define OMAP1_SRAM_PA 0x2000
#define SRAM_BOOTLOADER_SZ 0x80
+#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
+
+static void __iomem *omap_sram_base;
+static unsigned long omap_sram_start;
+static unsigned long omap_sram_skip;
+static unsigned long omap_sram_size;
+static void __iomem *omap_sram_ceil;
+
+/*
+ * Memory allocator for SRAM: calculates the new ceiling address
+ * for pushing a function using the fncpy API.
+ *
+ * Note that fncpy requires the returned address to be aligned
+ * to an 8-byte boundary.
+ */
+static void *omap_sram_push_address(unsigned long size)
+{
+ unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
+
+ available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
+
+ if (size > available) {
+ pr_err("Not enough space in SRAM\n");
+ return NULL;
+ }
+
+ new_ceil -= size;
+ new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
+ omap_sram_ceil = IOMEM(new_ceil);
+
+ return (void *)omap_sram_ceil;
+}
+
+void *omap_sram_push(void *funcp, unsigned long size)
+{
+ void *sram;
+ unsigned long base;
+ int pages;
+ void *dst = NULL;
+
+ sram = omap_sram_push_address(size);
+ if (!sram)
+ return NULL;
+
+ base = (unsigned long)sram & PAGE_MASK;
+ pages = PAGE_ALIGN(size) / PAGE_SIZE;
+
+ set_memory_rw(base, pages);
+
+ dst = fncpy(sram, funcp, size);
+
+ set_memory_ro(base, pages);
+ set_memory_x(base, pages);
+
+ return dst;
+}
/*
* The amount of SRAM depends on the core type.
* Note that we cannot try to test for SRAM here because writes
* to secure SRAM will hang the system. Also the SRAM is not
* yet mapped at this point.
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
*/
static void __init omap_detect_and_map_sram(void)
{
- unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
- unsigned long omap_sram_start = OMAP1_SRAM_PA;
- unsigned long omap_sram_size;
+ unsigned long base;
+ int pages;
+
+ omap_sram_skip = SRAM_BOOTLOADER_SZ;
+ omap_sram_start = OMAP1_SRAM_PA;
if (cpu_is_omap7xx())
omap_sram_size = 0x32000; /* 200K */
@@ -47,8 +107,27 @@ static void __init omap_detect_and_map_sram(void)
omap_sram_size = 0x4000;
}
- omap_map_sram(omap_sram_start, omap_sram_size,
- omap_sram_skip, 1);
+ omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
+ omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, 1);
+ if (!omap_sram_base) {
+ pr_err("SRAM: Could not map\n");
+ return;
+ }
+
+ omap_sram_ceil = omap_sram_base + omap_sram_size;
+
+ /*
+* Looks like we need to preserve some bootloader code at the
+* beginning of SRAM for jumping to flash for reboot to work...
+*/
+ memset_io(omap_sram_base + omap_sram_skip, 0,
+ omap_sram_size - omap_sram_skip);
+
+ base = (unsigned long)omap_sram_base;
+ pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
+
+ set_memory_ro(base, pages);
+ set_memory_x(base, pages);
}
static void
[PATCH 25/41] ARM: omap: remove empty plat-omap directory
From: Arnd Bergmann The last file in this directory is gone, and it can be removed as well. Signed-off-by: Arnd Bergmann --- arch/arm/Makefile | 1 - arch/arm/plat-omap/Makefile | 9 - 2 files changed, 10 deletions(-) delete mode 100644 arch/arm/plat-omap/Makefile diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a2391b8de5a5..7bcf59d0d315 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -228,7 +228,6 @@ machine-$(CONFIG_PLAT_SPEAR)+= spear # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. -plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_PLAT_ORION) += orion plat-$(CONFIG_PLAT_PXA)+= pxa plat-$(CONFIG_PLAT_VERSATILE) += versatile diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile deleted file mode 100644 index fefce2e1eaf3.. --- a/arch/arm/plat-omap/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Makefile for the linux kernel. -# - -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include - -# Common support -obj-y := -- 2.29.2
[PATCH 26/41] ARM: omap1: relocate static I/O mapping
From: Arnd Bergmann The address range 0xfee0-0xfeff is used for PCI and PCMCIA I/O port mappings, but OMAP1 has its static mappings there as well. Move the OMAP1 addresses a little higher to avoid crashing at boot. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig.debug | 6 +++--- arch/arm/mach-omap1/include/mach/hardware.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0c9497d549e3..f57b449000f7 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1837,9 +1837,9 @@ config DEBUG_UART_VIRT default 0xfec0 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfec3 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xfef36000 if DEBUG_HIGHBANK_UART - default 0xfefb if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 - default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 - default 0xfefb9800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 + default 0xff00 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1 + default 0xff000800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2 + default 0xff009800 if DEBUG_OMAP1UART3 || DEBUG_OMAP7XXUART3 default 0xffd01000 if DEBUG_HIP01_UART default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index 05c5cd3e95f4..e3522e601ccd 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h @@ -63,7 +63,7 @@ static inline u32 omap_cs3_phys(void) #endif /* ifndef __ASSEMBLER__ */ -#define OMAP1_IO_OFFSET0x0100 /* Virtual IO = 0xfefb */ +#define OMAP1_IO_OFFSET0x00fb /* Virtual IO = 0xff00 */ #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) #include -- 2.29.2
[PATCH 27/41] ARM: omap1: use pci_remap_iospace() for omap_cf
From: Arnd Bergmann
The ISA I/O space handling in omap_cf is incompatible with
PCI drivers in a multiplatform kernel, and requires a custom
mach/io.h.
Change the driver to use pci_remap_iospace() like PCI drivers do,
so the generic ioport access can work across platforms.
To actually use that code, we have to select CONFIG_PCI
here.
Signed-off-by: Arnd Bergmann
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-omap1/include/mach/io.h | 45 ---
drivers/pcmcia/omap_cf.c | 10 +++---
3 files changed, 5 insertions(+), 52 deletions(-)
delete mode 100644 arch/arm/mach-omap1/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 700655e31b04..a57ad0928edc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -487,11 +487,11 @@ config ARCH_OMAP1
bool "TI OMAP1"
select ARCH_OMAP
select CLKSRC_MMIO
+ select FORCE_PCI if PCCARD
select GENERIC_IRQ_CHIP
select GPIOLIB
select HAVE_LEGACY_CLK
select IRQ_DOMAIN
- select NEED_MACH_IO_H if PCCARD
select NEED_MACH_MEMORY_H
select SPARSE_IRQ
help
diff --git a/arch/arm/mach-omap1/include/mach/io.h
b/arch/arm/mach-omap1/include/mach/io.h
deleted file mode 100644
index ce4f8005b26f..
--- a/arch/arm/mach-omap1/include/mach/io.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/io.h
- *
- * IO definitions for TI OMAP processors and boards
- *
- * Copied from arch/arm/mach-sa1100/include/mach/io.h
- * Copyright (C) 1997-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Modifications:
- * 06-12-1997 RMK Created.
- * 07-04-1999 RMK Major cleanup
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0x
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)__typesafe_io(a)
-
-#endif
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c
index 093022ce7d91..1972a8f6fa8e 100644
--- a/drivers/pcmcia/omap_cf.c
+++ b/drivers/pcmcia/omap_cf.c
@@ -205,6 +205,7 @@ static int __init omap_cf_probe(struct platform_device
*pdev)
int irq;
int status;
struct resource *res;
+ struct resource iospace = DEFINE_RES_IO(SZ_64, SZ_4K);
seg = (int) pdev->dev.platform_data;
if (seg == 0 || seg > 3)
@@ -235,9 +236,9 @@ static int __init omap_cf_probe(struct platform_device
*pdev)
cf->phys_cf = res->start;
/* pcmcia layer only remaps "real" memory */
- cf->socket.io_offset = (unsigned long)
- ioremap(cf->phys_cf + SZ_4K, SZ_2K);
- if (!cf->socket.io_offset) {
+ cf->socket.io_offset = iospace.start;
+ status = pci_remap_iospace(&iospace, cf->phys_cf + SZ_4K);
+ if (status) {
status = -ENOMEM;
goto fail1;
}
@@ -285,8 +286,6 @@ static int __init omap_cf_probe(struct platform_device
*pdev)
fail2:
release_mem_region(cf->phys_cf, SZ_8K);
fail1:
- if (cf->socket.io_offset)
- iounmap((void __iomem *) cf->socket.io_offset);
free_irq(irq, cf);
fail0:
kfree(cf);
@@ -300,7 +299,6 @@ static int __exit omap_cf_remove(struct platform_device
*pdev)
cf->active = 0;
pcmcia_unregister_socket(&cf->socket);
del_timer_sync(&cf->timer);
- iounmap((void __iomem *) cf->socket.io_offset);
release_mem_region(cf->phys_cf, SZ_8K);
free_irq(cf->irq, cf);
kfree(cf);
--
2.29.2
[PATCH 28/41] ARM: omap1: move mach/*.h into mach directory
From: Arnd Bergmann
Most of the header files are no longer referenced from outside
arch/arm/mach-omap1, so move them all to that place directly
and change their users to use the new location.
The exceptions are:
- mach/compress.h is used by the core architecture code
- mach/serial.h is used by mach/compress.h
The mach/memory.h is empty and gets removed in the process,
avoiding the need for CONFIG_NEED_MACH_MEMORY_H.
Signed-off-by: Arnd Bergmann
---
arch/arm/Kconfig | 1 -
arch/arm/mach-omap1/ams-delta-fiq-handler.S | 3 ++-
arch/arm/mach-omap1/ams-delta-fiq.c | 2 ++
arch/arm/mach-omap1/ams-delta-fiq.h | 2 +-
arch/arm/mach-omap1/board-ams-delta.c | 4 +---
arch/arm/mach-omap1/board-fsample.c | 10 -
arch/arm/mach-omap1/board-generic.c | 6 ++
arch/arm/mach-omap1/board-h2.c| 12 +--
arch/arm/mach-omap1/board-h3.c| 14 ++---
arch/arm/mach-omap1/board-htcherald.c | 8 +++
arch/arm/mach-omap1/board-innovator.c | 10 -
arch/arm/mach-omap1/board-nokia770.c | 6 ++
arch/arm/mach-omap1/board-osk.c | 9
arch/arm/mach-omap1/board-palmte.c| 12 +--
arch/arm/mach-omap1/board-palmtt.c| 12 +--
arch/arm/mach-omap1/board-palmz71.c | 12 +--
arch/arm/mach-omap1/board-perseus2.c | 9
arch/arm/mach-omap1/board-sx1-mmc.c | 3 +--
arch/arm/mach-omap1/board-sx1.c | 10 -
arch/arm/mach-omap1/clock.c | 4 ++--
arch/arm/mach-omap1/clock_data.c | 5 ++---
arch/arm/mach-omap1/common.h | 3 +--
arch/arm/mach-omap1/devices.c | 10 -
arch/arm/mach-omap1/dma.c | 2 +-
arch/arm/mach-omap1/fb.c | 2 +-
arch/arm/mach-omap1/flash.c | 5 +++--
arch/arm/mach-omap1/fpga.c| 3 +--
arch/arm/mach-omap1/gpio15xx.c| 3 ++-
arch/arm/mach-omap1/gpio16xx.c| 5 +++--
arch/arm/mach-omap1/gpio7xx.c | 3 +--
.../mach-omap1/{include/mach => }/hardware.h | 4 +---
arch/arm/mach-omap1/i2c.c | 3 ++-
arch/arm/mach-omap1/id.c | 5 ++---
arch/arm/mach-omap1/include/mach/memory.h | 12 ---
arch/arm/mach-omap1/io.c | 7 +++
arch/arm/mach-omap1/irq.c | 4 +---
arch/arm/mach-omap1/{include/mach => }/irqs.h | 2 --
arch/arm/mach-omap1/mcbsp.c | 9
.../mach-omap1/{include/mach => }/mtd-xip.h | 3 ++-
arch/arm/mach-omap1/mux.c | 6 +++---
arch/arm/mach-omap1/{include/mach => }/mux.h | 2 --
arch/arm/mach-omap1/ocpi.c| 4 ++--
arch/arm/mach-omap1/omap-dma.c| 3 ++-
.../mach-omap1/{include/mach => }/omap1510.h | 0
.../mach-omap1/{include/mach => }/omap16xx.h | 0
.../mach-omap1/{include/mach => }/omap7xx.h | 0
arch/arm/mach-omap1/pm.c | 9
arch/arm/mach-omap1/pm.h | 2 ++
arch/arm/mach-omap1/reset.c | 3 +--
arch/arm/mach-omap1/serial.c | 3 ++-
arch/arm/mach-omap1/sleep.S | 2 +-
arch/arm/mach-omap1/soc.h | 4 ++--
arch/arm/mach-omap1/sram.S| 4 ++--
arch/arm/mach-omap1/{include/mach => }/tc.h | 2 --
arch/arm/mach-omap1/time.c| 2 +-
arch/arm/mach-omap1/timer.c | 1 +
arch/arm/mach-omap1/timer32k.c| 2 +-
arch/arm/mach-omap1/usb.c | 6 +++---
arch/arm/plat-omap/include/plat/cpu.h | 21 ---
59 files changed, 127 insertions(+), 188 deletions(-)
rename arch/arm/mach-omap1/{include/mach => }/hardware.h (98%)
delete mode 100644 arch/arm/mach-omap1/include/mach/memory.h
rename arch/arm/mach-omap1/{include/mach => }/irqs.h (99%)
rename arch/arm/mach-omap1/{include/mach => }/mtd-xip.h (97%)
rename arch/arm/mach-omap1/{include/mach => }/mux.h (98%)
rename arch/arm/mach-omap1/{include/mach => }/omap1510.h (100%)
rename arch/arm/mach-omap1/{include/mach => }/omap16xx.h (100%)
rename arch/arm/mach-omap1/{include/mach => }/omap7xx.h (100%)
rename arch/arm/mach-omap1/{include/mach => }/tc.h (98%)
delete mode 100644 arch/arm/plat-omap/include/plat/cpu.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a57ad0928edc..fb6afa6bbc8f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -492,7 +492,6 @@ config ARCH_OMAP1
select GPIOLIB
select HAVE_LEGACY_CLK
select IRQ_DOMAIN
- select NEED_MACH_MEMORY_H
select SPARSE_IRQ
help
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-h
[PATCH 29/41] ARM: omap1: fix build with no SoC selected
From: Arnd Bergmann
In a multiplatform randconfig kernel, one can have
CONFIG_ARCH_OMAP1 enabled, but none of the specific SoCs.
This leads to some build issues as the code is not
meant to deal with this configuration at the moment:
arch/arm/mach-omap1/io.c:86:20: error: unused function 'omap1_map_common_io'
[-Werror,-Wunused-function]
arch/arm/mach-omap1/pm.h:113:2: error: "Power management for this processor not
implemented yet" [-Werror,-W#warnings]
Use the same trick as on OMAP2 and guard the actual compilation
of platform code with another Makefile ifdef check based
on an option that depends on having at least one SoC enabled.
The io.c file still needs to get compiled to allow building
device drivers with a dependency on CONFIG_ARCH_OMAP1.
Signed-off-by: Arnd Bergmann
---
arch/arm/Kconfig| 1 -
arch/arm/mach-omap1/Kconfig | 4
arch/arm/mach-omap1/Makefile| 4
include/linux/soc/ti/omap1-io.h | 4 ++--
4 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fb6afa6bbc8f..a65f2c05f01c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -485,7 +485,6 @@ config ARCH_S3C24XX
config ARCH_OMAP1
bool "TI OMAP1"
- select ARCH_OMAP
select CLKSRC_MMIO
select FORCE_PCI if PCCARD
select GENERIC_IRQ_CHIP
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 93ea86954a84..d4b0cd91a4f9 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -28,6 +28,10 @@ config ARCH_OMAP16XX
select CPU_ARM926T
select OMAP_DM_TIMER
+config ARCH_OMAP1_ANY
+ select ARCH_OMAP
+ def_bool ARCH_OMAP730 || ARCH_OMAP850 || ARCH_OMAP15XX || ARCH_OMAP16XX
+
config ARCH_OMAP
bool
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 0615cb0ba580..506074b86333 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,6 +3,8 @@
# Makefile for the linux kernel.
#
+ifdef CONFIG_ARCH_OMAP1_ANY
+
# Common support
obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
serial.o devices.o dma.o omap-dma.o fb.o
@@ -57,3 +59,5 @@ obj-$(CONFIG_ARCH_OMAP730)+= gpio7xx.o
obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o
obj-$(CONFIG_ARCH_OMAP15XX)+= gpio15xx.o
obj-$(CONFIG_ARCH_OMAP16XX)+= gpio16xx.o
+
+endif
diff --git a/include/linux/soc/ti/omap1-io.h b/include/linux/soc/ti/omap1-io.h
index 9332c92690f4..f7f12728d4a6 100644
--- a/include/linux/soc/ti/omap1-io.h
+++ b/include/linux/soc/ti/omap1-io.h
@@ -5,7 +5,7 @@
#ifndef __ASSEMBLER__
#include
-#if defined(CONFIG_ARCH_OMAP) && defined(CONFIG_ARCH_OMAP1)
+#ifdef CONFIG_ARCH_OMAP1_ANY
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
@@ -15,7 +15,7 @@ extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
-#elif defined(CONFIG_COMPILE_TEST)
+#else
static inline u8 omap_readb(u32 pa) { return 0; }
static inline u16 omap_readw(u32 pa) { return 0; }
static inline u32 omap_readl(u32 pa) { return 0; }
--
2.29.2
[PATCH 30/41] ARM: OMAP1: Prepare for conversion of OMAP1 clocks to CCF
From: Janusz Krzysztofik
In preparation for conversion of OMAP1 clocks to common clock framework,
identify arch/arm/mach-omap1 local users of those clocks and update them
to call clk_prepare_enable/clk_disable_unprepare() instead of just
clk_enable/disable(), as required by CCF implementation of clock API.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/mcbsp.c| 8
arch/arm/mach-omap1/ocpi.c | 4 ++--
arch/arm/mach-omap1/serial.c | 6 +++---
arch/arm/mach-omap1/timer32k.c | 2 +-
4 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index b7bc7e4b426c..05c25c432449 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -43,8 +43,8 @@ static void omap1_mcbsp_request(unsigned int id)
api_clk = clk_get(NULL, "api_ck");
dsp_clk = clk_get(NULL, "dsp_ck");
if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
- clk_enable(api_clk);
- clk_enable(dsp_clk);
+ clk_prepare_enable(api_clk);
+ clk_prepare_enable(dsp_clk);
/*
* DSP external peripheral reset
@@ -62,11 +62,11 @@ static void omap1_mcbsp_free(unsigned int id)
if (id == 0 || id == 2) {
if (--dsp_use == 0) {
if (!IS_ERR(api_clk)) {
- clk_disable(api_clk);
+ clk_disable_unprepare(api_clk);
clk_put(api_clk);
}
if (!IS_ERR(dsp_clk)) {
- clk_disable(dsp_clk);
+ clk_disable_unprepare(dsp_clk);
clk_put(dsp_clk);
}
}
diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c
index c4a33ace4a8b..d48f726571a4 100644
--- a/arch/arm/mach-omap1/ocpi.c
+++ b/arch/arm/mach-omap1/ocpi.c
@@ -73,7 +73,7 @@ static int __init omap_ocpi_init(void)
if (IS_ERR(ocpi_ck))
return PTR_ERR(ocpi_ck);
- clk_enable(ocpi_ck);
+ clk_prepare_enable(ocpi_ck);
ocpi_enable();
pr_info("OMAP OCPI interconnect driver loaded\n");
@@ -87,7 +87,7 @@ static void __exit omap_ocpi_exit(void)
if (!cpu_is_omap16xx())
return;
- clk_disable(ocpi_ck);
+ clk_disable_unprepare(ocpi_ck);
clk_put(ocpi_ck);
}
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index d6d1843337a5..299ae1106187 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -142,7 +142,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
- clk_enable(uart1_ck);
+ clk_prepare_enable(uart1_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 1200);
}
@@ -152,7 +152,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
- clk_enable(uart2_ck);
+ clk_prepare_enable(uart2_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 1200);
else
@@ -164,7 +164,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
- clk_enable(uart3_ck);
+ clk_prepare_enable(uart3_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 1200);
}
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 23952a85ac79..560cd16568a7 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -270,7 +270,7 @@ int __init omap_32k_timer_init(void)
sync32k_ick = clk_get(NULL, "omap_32ksync_ick");
if (!IS_ERR(sync32k_ick))
- clk_enable(sync32k_ick);
+ clk_prepare_enable(sync32k_ick);
ret = omap_init_clocksource_32k(base);
}
--
2.29.2
[PATCH 31/41] ARM: OMAP1: clock: Fix early UART rate issues
From: Janusz Krzysztofik
Commit ef772f2ee31e ("ARM: OMAP: Fix CONFIG_DEBUG_LL") was supposed to fix
low level debugging, most possibly by early enabling UART clocks. The fix
actually introduced early reset of most bits of MOD_CONF_CTRL_0 register,
with the exception of UART1 and UART2 clock related bits which were set
high. However, UART1 clock bit can play different roles on different
OMAP1 variants. On OMAP1610 it enables the clock as intended, but on
OMAP1510 it switches the clock rate from 12 to 48 MHz. Even worth, for
UART2 the bit changes its clock rate also on OMAP1610. As a result, UART
rates set by a bootloader can be unintentionally changed early on kernel
boot and low level debugging broken, not fixed. Besides, reset of all
other bits was not justified.
Don't touch register bits not related to UART clocks. Also, don't touch
the bit of UART2 clock. Make sure UART1 and UART3 are enabled early on
relevant OMAP1610 machine types while preserving bootloader UART clock
rates on others.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/clock_data.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 36f04da4b939..57d3752babf8 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -766,11 +766,11 @@ int __init omap1_clk_init(void)
u32 reg;
#ifdef CONFIG_DEBUG_LL
- /*
-* Resets some clocks that may be left on from bootloader,
-* but leaves serial clocks on.
-*/
- omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+ /* Make sure UART clocks are enabled early */
+ if (cpu_is_omap16xx())
+ omap_writel(omap_readl(MOD_CONF_CTRL_0) |
+ CONF_MOD_UART1_CLK_MODE_R |
+ CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0);
#endif
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
--
2.29.2
[PATCH 32/41] ARM: OMAP1: clock: Fix UART rate reporting algorithm
From: Janusz Krzysztofik
Since its introduction to the mainline kernel, omap1_uart_recalc() helper
makes incorrect use of clk->enable_bit as a ready to use bitmap mask while
it only provides the bit number. Fix it.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 44877554eb41..42e094e781ce 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(clockfw_lock);
unsigned long omap1_uart_recalc(struct clk *clk)
{
unsigned int val = __raw_readl(clk->enable_reg);
- return val & clk->enable_bit ? 4800 : 1200;
+ return val & 1 << clk->enable_bit ? 4800 : 1200;
}
unsigned long omap1_sossi_recalc(struct clk *clk)
--
2.29.2
Re: [PATCH v2 1/2] of: Create platform devices for OF framebuffers
Hi
Am 19.04.22 um 15:30 schrieb Rob Herring:
...
-#ifndef CONFIG_PPC
static const struct of_device_id reserved_mem_matches[] = {
{ .compatible = "qcom,rmtfs-mem" },
{ .compatible = "qcom,cmd-db" },
@@ -520,33 +519,81 @@ static const struct of_device_id reserved_mem_matches[] =
{
static int __init of_platform_default_populate_init(void)
{
- struct device_node *node;
-
As both if/else clauses need 'node', I'd keep this declared here.
Ok.
device_links_supplier_sync_state_pause();
if (!of_have_populated_dt())
return -ENODEV;
- /*
-* Handle certain compatibles explicitly, since we don't want to create
-* platform_devices for every node in /reserved-memory with a
-* "compatible",
-*/
- for_each_matching_node(node, reserved_mem_matches)
- of_platform_device_create(node, NULL, NULL);
+ if (IS_ENABLED(CONFIG_PPC)) {
+ struct device_node *boot_display = NULL;
+ struct device_node *node;
+ struct platform_device *dev;
+ int ret;
+
+ /* Check if we have a MacOS display without a node spec */
+ if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL)) {
+ /*
+* The old code tried to work out which node was the
MacOS
+* display based on the address. I'm dropping that
since the
+* lack of a node spec only happens with old BootX
versions
+* (users can update) and with this code, they'll still
get
+* a display (just not the palette hacks).
+*/
+ dev = platform_device_alloc("bootx-noscreen", 0);
+ if (WARN_ON(!dev))
+ return -ENOMEM;
+ ret = platform_device_add(dev);
+ if (WARN_ON(ret)) {
+ platform_device_put(dev);
+ return ret;
+ }
+ }
- node = of_find_node_by_path("/firmware");
- if (node) {
- of_platform_populate(node, NULL, NULL, NULL);
- of_node_put(node);
- }
+ /*
+* For OF framebuffers, first create the device for the boot
display,
+* then for the other framebuffers. Only fail for the boot
display;
+* ignore errors for the rest.
+*/
+ for_each_node_by_type(node, "display") {
+ if (!of_get_property(node, "linux,opened", NULL) ||
+ !of_get_property(node, "linux,boot-display", NULL))
+ continue;
+ dev = of_platform_device_create(node, "of-display",
NULL);
+ if (WARN_ON(!dev))
+ return -ENOMEM;
+ boot_display = node;
+ break;
+ }
+ for_each_node_by_type(node, "display") {
+ if (!of_get_property(node, "linux,opened", NULL) ||
node == boot_display)
+ continue;
+ of_platform_device_create(node, "of-display", NULL);
+ }
- node = of_get_compatible_child(of_chosen, "simple-framebuffer");
- of_platform_device_create(node, NULL, NULL);
- of_node_put(node);
+ } else {
+ struct device_node *node;
+
+ /*
+* Handle certain compatibles explicitly, since we don't want
to create
+* platform_devices for every node in /reserved-memory with a
+* "compatible",
+*/
+ for_each_matching_node(node, reserved_mem_matches)
+ of_platform_device_create(node, NULL, NULL);
- /* Populate everything else. */
- of_platform_default_populate(NULL, NULL, NULL);
+ node = of_find_node_by_path("/firmware");
+ if (node) {
+ of_platform_populate(node, NULL, NULL, NULL);
+ of_node_put(node);
+ }
+
+ node = of_get_compatible_child(of_chosen, "simple-framebuffer");
+ of_platform_device_create(node, NULL, NULL);
+ of_node_put(node);
In v1, you supported "simple-framebuffer" on PPC. Don't we want to allow
that? Maybe no one cares ATM, but that could change. Either way:
Support for these framebuffers has always been mutually exclusive. The
offb driver, which originally contained the code, depends on CONFIG_PPC.
And PPC never supported simple-framebuffer anywhere.
Reviewed-by: Rob Herring
Thank you.
Best regards
Thomas
+
+ /* Populate everything else. */
+ of_platform_default_populate(NULL, NULL,
[PATCH 33/41] ARM: OMAP1: clock: Remove unused code
From: Janusz Krzysztofik
The code of OMAP1 clocks contains quite a few unused elements:
- functions and function like macros never called: clk_reparent(),
recalculate_root_clocks(), clk_enable_init_clocks(),
omap_clk_get_by_name(), omap_clk_disable_autoidle_all(),
__clk_get_parent(clk), __clk_get_rate(),
- unused structure fields:
- clkops: .find_idlest(), .find_companion(), .deny_idle(),
- clk: .src_offset, as well as .clkdm -- no longer present but still
mentioned in comments,
- definitions of unused flags: INVERT_ENABLE, CLOCK_CLKOUTX2,
- definitions of unused data types: struct clk_functions,
- prototypes of functions with no implementation: clk_init(),
omap1_watchdog_recalc().
- declarations of never defined global variables: clkops_dummy.
Drop them.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/clock.c | 81 -
arch/arm/mach-omap1/clock.h | 53 +---
2 files changed, 2 insertions(+), 132 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 42e094e781ce..5ea8ec026a85 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -734,17 +734,6 @@ unsigned long omap_fixed_divisor_recalc(struct clk *clk)
return clk->parent->rate / clk->fixed_div;
}
-void clk_reparent(struct clk *child, struct clk *parent)
-{
- list_del_init(&child->sibling);
- if (parent)
- list_add(&child->sibling, &parent->children);
- child->parent = parent;
-
- /* now do the debugfs renaming to reattach the child
- to the proper parent */
-}
-
/* Propagate rate to children */
void propagate_rate(struct clk *tclk)
{
@@ -759,24 +748,6 @@ void propagate_rate(struct clk *tclk)
static LIST_HEAD(root_clks);
-/**
- * recalculate_root_clocks - recalculate and propagate all root clocks
- *
- * Recalculates all root clocks (clocks with no parent), which if the
- * clock's .recalc is set correctly, should also propagate their rates.
- * Called at init.
- */
-void recalculate_root_clocks(void)
-{
- struct clk *clkp;
-
- list_for_each_entry(clkp, &root_clks, sibling) {
- if (clkp->recalc)
- clkp->rate = clkp->recalc(clkp);
- propagate_rate(clkp);
- }
-}
-
/**
* clk_preinit - initialize any fields in the struct clk before clk init
* @clk: struct clk * to initialize
@@ -827,42 +798,6 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
-void clk_enable_init_clocks(void)
-{
- struct clk *clkp;
-
- list_for_each_entry(clkp, &clocks, node)
- if (clkp->flags & ENABLE_ON_INIT)
- clk_enable(clkp);
-}
-
-/**
- * omap_clk_get_by_name - locate OMAP struct clk by its name
- * @name: name of the struct clk to locate
- *
- * Locate an OMAP struct clk by its name. Assumes that struct clk
- * names are unique. Returns NULL if not found or a pointer to the
- * struct clk if found.
- */
-struct clk *omap_clk_get_by_name(const char *name)
-{
- struct clk *c;
- struct clk *ret = NULL;
-
- mutex_lock(&clocks_mutex);
-
- list_for_each_entry(c, &clocks, node) {
- if (!strcmp(c->name, name)) {
- ret = c;
- break;
- }
- }
-
- mutex_unlock(&clocks_mutex);
-
- return ret;
-}
-
int omap_clk_enable_autoidle_all(void)
{
struct clk *c;
@@ -879,22 +814,6 @@ int omap_clk_enable_autoidle_all(void)
return 0;
}
-int omap_clk_disable_autoidle_all(void)
-{
- struct clk *c;
- unsigned long flags;
-
- spin_lock_irqsave(&clockfw_lock, flags);
-
- list_for_each_entry(c, &clocks, node)
- if (c->ops->deny_idle)
- c->ops->deny_idle(c);
-
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return 0;
-}
-
/*
* Low level helpers
*/
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index f3b8811f5ac0..7bebd488f1be 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -43,56 +43,28 @@ struct omap_clk {
/* Temporary, needed during the common clock framework conversion */
#define __clk_get_name(clk)(clk->name)
-#define __clk_get_parent(clk) (clk->parent)
-#define __clk_get_rate(clk)(clk->rate)
/**
* struct clkops - some clock function pointers
* @enable: fn ptr that enables the current clock in hardware
* @disable: fn ptr that enables the current clock in hardware
- * @find_idlest: function returning the IDLEST register for the clock's IP blk
- * @find_companion: function returning the "companion" clk reg for the clock
* @allow_idle: fn ptr that enables autoidle for the current clock in hardware
- * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
- *
- * A "companion" clk is an accompanying clock to the one being quer
[PATCH 34/41] ARM: OMAP1: clock: Remove noop code
From: Janusz Krzysztofik
There are some OMAP1 clock code bits that have no effect:
- crystal_type variable is set to 0 but never changed, then
crystal_type == 2 condition is never true and ck_ref.rate never set to
1920,
- clk->ops->allow_idle() is called from omap_clk_enable_autoidle_all() but
that op is not configured for any clock, then the function does nothing
and the op field is not needed,
- ENABLE_ON_INIT flag is set for some clocks but is never checked by any
code, then not needed.
Drop that code.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/clock.c | 17 -
arch/arm/mach-omap1/clock.h | 3 ---
arch/arm/mach-omap1/clock_data.c | 8 +---
3 files changed, 1 insertion(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 5ea8ec026a85..e5bd4d3b742d 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -798,22 +798,6 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
-int omap_clk_enable_autoidle_all(void)
-{
- struct clk *c;
- unsigned long flags;
-
- spin_lock_irqsave(&clockfw_lock, flags);
-
- list_for_each_entry(c, &clocks, node)
- if (c->ops->allow_idle)
- c->ops->allow_idle(c);
-
- spin_unlock_irqrestore(&clockfw_lock, flags);
-
- return 0;
-}
-
/*
* Low level helpers
*/
@@ -871,7 +855,6 @@ static int __init clk_disable_unused(void)
return 0;
}
late_initcall(clk_disable_unused);
-late_initcall(omap_clk_enable_autoidle_all);
#endif
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 7bebd488f1be..8025e4a22469 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -53,7 +53,6 @@ struct omap_clk {
struct clkops {
int (*enable)(struct clk *);
void(*disable)(struct clk *);
- void(*allow_idle)(struct clk *);
};
/*
@@ -64,7 +63,6 @@ struct clkops {
#define ENABLE_REG_32BIT (1 << 0)/* Use 32-bit access */
#define CLOCK_IDLE_CONTROL (1 << 1)
#define CLOCK_NO_IDLE_PARENT (1 << 2)
-#define ENABLE_ON_INIT (1 << 3)/* Enable upon framework init */
/**
* struct clk - OMAP struct clk
@@ -135,7 +133,6 @@ extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern unsigned long followparent_recalc(struct clk *clk);
unsigned long omap_fixed_divisor_recalc(struct clk *clk);
-extern int omap_clk_enable_autoidle_all(void);
extern const struct clkops clkops_null;
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 57d3752babf8..9b9c9fcc61c2 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -92,8 +92,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
.name = "ck_dpll1out",
.ops= &clkops_generic,
.parent = &ck_dpll1,
- .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT |
- ENABLE_ON_INIT,
+ .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_CKOUT_ARM,
.recalc = &followparent_recalc,
@@ -146,7 +145,6 @@ static struct clk arm_gpio_ck = {
.name = "ick",
.ops= &clkops_generic,
.parent = &ck_dpll1,
- .flags = ENABLE_ON_INIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
.enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc,
@@ -316,7 +314,6 @@ static struct clk tc2_ck = {
.name = "tc2_ck",
.ops= &clkops_generic,
.parent = &tc_ck.clk,
- .flags = ENABLE_ON_INIT,
.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
.enable_bit = EN_TC2_CK,
.recalc = &followparent_recalc,
@@ -762,7 +759,6 @@ u32 cpu_mask;
int __init omap1_clk_init(void)
{
struct omap_clk *c;
- int crystal_type = 0; /* Default 12 MHz */
u32 reg;
#ifdef CONFIG_DEBUG_LL
@@ -810,8 +806,6 @@ int __init omap1_clk_init(void)
if (cpu_is_omap7xx())
ck_ref.rate = 1300;
- if (cpu_is_omap16xx() && crystal_type == 2)
- ck_ref.rate = 1920;
pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL:
0x%04x\n",
omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
--
2.29.2
[PATCH 36/41] usb: gadget: omap_udc: Make it CCF clk API compatible
From: Janusz Krzysztofik
The driver, OMAP1 specific, now omits clk_prepare/unprepare() steps, not
supported by OMAP1 custom implementation of clock API. However, non-CCF
stubs of those functions exist for use on such platforms until converted
to CCF.
Update the driver to be compatible with CCF implementation of clock API.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
drivers/usb/gadget/udc/omap_udc.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/gadget/udc/omap_udc.c
b/drivers/usb/gadget/udc/omap_udc.c
index 5096d24915ce..9ee472937482 100644
--- a/drivers/usb/gadget/udc/omap_udc.c
+++ b/drivers/usb/gadget/udc/omap_udc.c
@@ -2609,6 +2609,8 @@ static void omap_udc_release(struct device *dev)
if (udc->dc_clk) {
if (udc->clk_requested)
omap_udc_enable_clock(0);
+ clk_unprepare(udc->hhc_clk);
+ clk_unprepare(udc->dc_clk);
clk_put(udc->hhc_clk);
clk_put(udc->dc_clk);
}
@@ -2773,8 +2775,8 @@ static int omap_udc_probe(struct platform_device *pdev)
hhc_clk = clk_get(&pdev->dev, "usb_hhc_ck");
BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
/* can't use omap_udc_enable_clock yet */
- clk_enable(dc_clk);
- clk_enable(hhc_clk);
+ clk_prepare_enable(dc_clk);
+ clk_prepare_enable(hhc_clk);
udelay(100);
}
@@ -2783,8 +2785,8 @@ static int omap_udc_probe(struct platform_device *pdev)
hhc_clk = clk_get(&pdev->dev, "l3_ocpi_ck");
BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
/* can't use omap_udc_enable_clock yet */
- clk_enable(dc_clk);
- clk_enable(hhc_clk);
+ clk_prepare_enable(dc_clk);
+ clk_prepare_enable(hhc_clk);
udelay(100);
}
@@ -2932,8 +2934,8 @@ static int omap_udc_probe(struct platform_device *pdev)
usb_put_phy(xceiv);
if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
- clk_disable(hhc_clk);
- clk_disable(dc_clk);
+ clk_disable_unprepare(hhc_clk);
+ clk_disable_unprepare(dc_clk);
clk_put(hhc_clk);
clk_put(dc_clk);
}
--
2.29.2
[PATCH 35/41] usb: host: ohci-omap: Make it CCF clk API compatible
From: Janusz Krzysztofik
The driver, OMAP1 specific, now omits clk_prepare/unprepare() steps, not
supported by OMAP1 custom implementation of clock API. However, non-CCF
stubs of those functions exist for use on such platforms until converted
to CCF.
Update the driver to be compatible with CCF implementation of clock API.
Signed-off-by: Janusz Krzysztofik
Acked-by: Alan Stern
Signed-off-by: Arnd Bergmann
---
drivers/usb/host/ohci-omap.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 069791d25abb..f5bc9c8bdc9a 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -259,6 +259,10 @@ static int ohci_hcd_omap_probe(struct platform_device
*pdev)
goto err_put_hcd;
}
+ retval = clk_prepare(priv->usb_host_ck);
+ if (retval)
+ goto err_put_host_ck;
+
if (!cpu_is_omap15xx())
priv->usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
else
@@ -266,13 +270,17 @@ static int ohci_hcd_omap_probe(struct platform_device
*pdev)
if (IS_ERR(priv->usb_dc_ck)) {
retval = PTR_ERR(priv->usb_dc_ck);
- goto err_put_host_ck;
+ goto err_unprepare_host_ck;
}
+ retval = clk_prepare(priv->usb_dc_ck);
+ if (retval)
+ goto err_put_dc_ck;
+
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&pdev->dev, "request_mem_region failed\n");
retval = -EBUSY;
- goto err_put_dc_ck;
+ goto err_unprepare_dc_ck;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
@@ -297,8 +305,12 @@ static int ohci_hcd_omap_probe(struct platform_device
*pdev)
iounmap(hcd->regs);
err2:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err_unprepare_dc_ck:
+ clk_unprepare(priv->usb_dc_ck);
err_put_dc_ck:
clk_put(priv->usb_dc_ck);
+err_unprepare_host_ck:
+ clk_unprepare(priv->usb_host_ck);
err_put_host_ck:
clk_put(priv->usb_host_ck);
err_put_hcd:
@@ -333,7 +345,9 @@ static int ohci_hcd_omap_remove(struct platform_device
*pdev)
}
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ clk_unprepare(priv->usb_dc_ck);
clk_put(priv->usb_dc_ck);
+ clk_unprepare(priv->usb_host_ck);
clk_put(priv->usb_host_ck);
usb_put_hcd(hcd);
return 0;
--
2.29.2
[PATCH 37/41] [MERGED] video: fbdev: omap: Make it CCF clk API compatible
From: Janusz Krzysztofik
OMAP1 LCDC drivers now omit clk_prepare/unprepare() steps, not supported
by OMAP1 custom implementation of clock API. However, non-CCF stubs of
those functions exist for use on such platforms until converted to CCF.
Update the drivers to be compatible with CCF implementation of clock API.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
drivers/video/fbdev/omap/hwa742.c | 6 +++---
drivers/video/fbdev/omap/lcdc.c | 6 +++---
drivers/video/fbdev/omap/sossi.c | 5 +++--
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/video/fbdev/omap/hwa742.c
b/drivers/video/fbdev/omap/hwa742.c
index b191bef22d98..9d9fe5c3a7a1 100644
--- a/drivers/video/fbdev/omap/hwa742.c
+++ b/drivers/video/fbdev/omap/hwa742.c
@@ -964,7 +964,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int
ext_mode,
if ((r = calc_extif_timings(ext_clk, &extif_mem_div)) < 0)
goto err3;
hwa742.extif->set_timings(&hwa742.reg_timings);
- clk_enable(hwa742.sys_ck);
+ clk_prepare_enable(hwa742.sys_ck);
calc_hwa742_clk_rates(ext_clk, &sys_clk, &pix_clk);
if ((r = calc_extif_timings(sys_clk, &extif_mem_div)) < 0)
@@ -1023,7 +1023,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int
ext_mode,
return 0;
err4:
- clk_disable(hwa742.sys_ck);
+ clk_disable_unprepare(hwa742.sys_ck);
err3:
hwa742.extif->cleanup();
err2:
@@ -1037,7 +1037,7 @@ static void hwa742_cleanup(void)
hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED);
hwa742.extif->cleanup();
hwa742.int_ctrl->cleanup();
- clk_disable(hwa742.sys_ck);
+ clk_disable_unprepare(hwa742.sys_ck);
}
struct lcd_ctrl hwa742_ctrl = {
diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c
index 4c9091bd936d..e7ce783e5215 100644
--- a/drivers/video/fbdev/omap/lcdc.c
+++ b/drivers/video/fbdev/omap/lcdc.c
@@ -713,7 +713,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int
ext_mode,
dev_err(fbdev->dev, "failed to adjust LCD rate\n");
goto fail1;
}
- clk_enable(lcdc.lcd_ck);
+ clk_prepare_enable(lcdc.lcd_ck);
r = request_irq(fbdev->int_irq, lcdc_irq_handler, 0, MODULE_NAME,
fbdev);
if (r) {
@@ -748,7 +748,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int
ext_mode,
fail3:
free_irq(fbdev->int_irq, lcdc.fbdev);
fail2:
- clk_disable(lcdc.lcd_ck);
+ clk_disable_unprepare(lcdc.lcd_ck);
fail1:
clk_put(lcdc.lcd_ck);
fail0:
@@ -762,7 +762,7 @@ static void omap_lcdc_cleanup(void)
free_fbmem();
omap_free_lcd_dma();
free_irq(lcdc.fbdev->int_irq, lcdc.fbdev);
- clk_disable(lcdc.lcd_ck);
+ clk_disable_unprepare(lcdc.lcd_ck);
clk_put(lcdc.lcd_ck);
}
diff --git a/drivers/video/fbdev/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c
index 6b99d89fbe6e..c90eb8ca58af 100644
--- a/drivers/video/fbdev/omap/sossi.c
+++ b/drivers/video/fbdev/omap/sossi.c
@@ -600,7 +600,7 @@ static int sossi_init(struct omapfb_device *fbdev)
l &= ~CONF_SOSSI_RESET_R;
omap_writel(l, MOD_CONF_CTRL_1);
- clk_enable(sossi.fck);
+ clk_prepare_enable(sossi.fck);
l = omap_readl(ARM_IDLECT2);
l &= ~(1 << 8); /* DMACK_REQ */
omap_writel(l, ARM_IDLECT2);
@@ -651,7 +651,7 @@ static int sossi_init(struct omapfb_device *fbdev)
return 0;
err:
- clk_disable(sossi.fck);
+ clk_disable_unprepare(sossi.fck);
clk_put(sossi.fck);
return r;
}
@@ -659,6 +659,7 @@ static int sossi_init(struct omapfb_device *fbdev)
static void sossi_cleanup(void)
{
omap_lcdc_free_dma_callback();
+ clk_unprepare(sossi.fck);
clk_put(sossi.fck);
iounmap(sossi.base);
}
--
2.29.2
[PATCH 38/41] [MERGED] mmc: omap: Make it CCF clk API compatible
From: Janusz Krzysztofik
The driver, OMAP specific, now omits clk_prepare/unprepare() steps, not
supported by OMAP custom implementation of clock API. However, non-CCF
stubs of those functions exist for use on such platforms until converted
to CCF.
Update the driver to be compatible with CCF implementation of clock API.
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
drivers/mmc/host/omap.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 5e5af34090f1..57d39283924d 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1374,7 +1374,7 @@ static int mmc_omap_probe(struct platform_device *pdev)
host->iclk = clk_get(&pdev->dev, "ick");
if (IS_ERR(host->iclk))
return PTR_ERR(host->iclk);
- clk_enable(host->iclk);
+ clk_prepare_enable(host->iclk);
host->fclk = clk_get(&pdev->dev, "fck");
if (IS_ERR(host->fclk)) {
@@ -1382,16 +1382,18 @@ static int mmc_omap_probe(struct platform_device *pdev)
goto err_free_iclk;
}
+ ret = clk_prepare(host->fclk);
+ if (ret)
+ goto err_put_fclk;
+
host->dma_tx_burst = -1;
host->dma_rx_burst = -1;
host->dma_tx = dma_request_chan(&pdev->dev, "tx");
if (IS_ERR(host->dma_tx)) {
ret = PTR_ERR(host->dma_tx);
- if (ret == -EPROBE_DEFER) {
- clk_put(host->fclk);
- goto err_free_iclk;
- }
+ if (ret == -EPROBE_DEFER)
+ goto err_free_fclk;
host->dma_tx = NULL;
dev_warn(host->dev, "TX DMA channel request failed\n");
@@ -1403,8 +1405,7 @@ static int mmc_omap_probe(struct platform_device *pdev)
if (ret == -EPROBE_DEFER) {
if (host->dma_tx)
dma_release_channel(host->dma_tx);
- clk_put(host->fclk);
- goto err_free_iclk;
+ goto err_free_fclk;
}
host->dma_rx = NULL;
@@ -1454,9 +1455,12 @@ static int mmc_omap_probe(struct platform_device *pdev)
dma_release_channel(host->dma_tx);
if (host->dma_rx)
dma_release_channel(host->dma_rx);
+err_free_fclk:
+ clk_unprepare(host->fclk);
+err_put_fclk:
clk_put(host->fclk);
err_free_iclk:
- clk_disable(host->iclk);
+ clk_disable_unprepare(host->iclk);
clk_put(host->iclk);
return ret;
}
@@ -1476,8 +1480,9 @@ static int mmc_omap_remove(struct platform_device *pdev)
mmc_omap_fclk_enable(host, 0);
free_irq(host->irq, host);
+ clk_unprepare(host->fclk);
clk_put(host->fclk);
- clk_disable(host->iclk);
+ clk_disable_unprepare(host->iclk);
clk_put(host->iclk);
if (host->dma_tx)
--
2.29.2
[PATCH 39/41] [MERGED] ASoC: ti: osk5912: Make it CCF clk API compatible
From: Janusz Krzysztofik
The driver, OMAP1 specific, now omits clk_prepare/unprepare() steps, not
supported by OMAP1 custom implementation of clock API. However, non-CCF
stubs of those functions exist for use on such platforms until converted
to CCF.
Update the driver to be compatible with CCF implementation of clock API.
v2: use clk_prepare_enable/clk_disable_unprepare() (Peter)
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
sound/soc/ti/osk5912.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/ti/osk5912.c b/sound/soc/ti/osk5912.c
index 40e29dda7e7a..2790c8915f55 100644
--- a/sound/soc/ti/osk5912.c
+++ b/sound/soc/ti/osk5912.c
@@ -27,12 +27,12 @@ static struct clk *tlv320aic23_mclk;
static int osk_startup(struct snd_pcm_substream *substream)
{
- return clk_enable(tlv320aic23_mclk);
+ return clk_prepare_enable(tlv320aic23_mclk);
}
static void osk_shutdown(struct snd_pcm_substream *substream)
{
- clk_disable(tlv320aic23_mclk);
+ clk_disable_unprepare(tlv320aic23_mclk);
}
static int osk_hw_params(struct snd_pcm_substream *substream,
--
2.29.2
[PATCH 40/41] [TO BE REBASED] ARM: OMAP1: clock: Convert to CCF
From: Janusz Krzysztofik
OMAP1 still uses its own implementation of standard clock API defined in
include/linux/clk.h. Internals of that implementation are not visible
outside OMAP1 directory. As a consequence, device drivers are not able to
register clocks potentially provided by peripheral devices.
Drop OMAP1 implementation of the clock API and enable common clock
framework. Modify the remaining low level code to be compatible with
clock provider API and register the clocks with CCF.
Move initialisation of clocks to omap1_timer_init() to avoid memory
allocation issues at early setup phase from where omap1_init_early() is
called. Register the clocks after initialization of clock I/O registers,
local clock pointers used by OMAP1 clock ops, and local .rate fields of
clocks with no local implementation of .recalc ops, so CCF structures are
populated with correct data during clock registration. Instead of
enabling some of the registered clocks, flag them for CCF as critical.
Introduce .is_enabled op using code that verifies hardware status of clock
enablement, split out from implementation of .disable_unused op, so the
latter is actually called by CCF for not requested but hardware enabled
clocks. Add .round_rate ops where missing so .set_rate ops are called by
CCF as expected. Since CCF allows parallel execution of .enable/.disable
and .set_rate ops, protect registers shared among those groups of ops from
concurrent access with spinlocks. Drop local debugfs support in favor of
that provided by CCF.
v2: flag tc2_ck as CLK_IS_CRITICAL (Aaro)
v3: rebase on top of soc/omap1-multiplatform-5.18,
- drop no longer needed includes from arch/arm/mach-omap1/io.c
Signed-off-by: Janusz Krzysztofik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-omap1/clock.c | 693 +--
arch/arm/mach-omap1/clock.h | 139 +++
arch/arm/mach-omap1/clock_data.c | 483 ++---
arch/arm/mach-omap1/io.c | 7 -
arch/arm/mach-omap1/time.c | 5 +
5 files changed, 563 insertions(+), 764 deletions(-)
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index e5bd4d3b742d..83381e23fab9 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -16,7 +16,9 @@
#include
#include
#include
+#include
#include
+#include
#include
@@ -28,33 +30,37 @@
#include "sram.h"
__u32 arm_idlect1_mask;
-struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
+/* provide direct internal access (not via clk API) to some clocks */
+struct omap1_clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
+/* protect registeres shared among clk_enable/disable() and clk_set_rate()
operations */
+static DEFINE_SPINLOCK(arm_ckctl_lock);
+static DEFINE_SPINLOCK(arm_idlect2_lock);
+static DEFINE_SPINLOCK(mod_conf_ctrl_0_lock);
+static DEFINE_SPINLOCK(mod_conf_ctrl_1_lock);
+static DEFINE_SPINLOCK(swd_clk_div_ctrl_sel_lock);
/*
* Omap1 specific clock functions
*/
-unsigned long omap1_uart_recalc(struct clk *clk)
+unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate)
{
unsigned int val = __raw_readl(clk->enable_reg);
return val & 1 << clk->enable_bit ? 4800 : 1200;
}
-unsigned long omap1_sossi_recalc(struct clk *clk)
+unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate)
{
u32 div = omap_readl(MOD_CONF_CTRL_1);
div = (div >> 17) & 0x7;
div++;
- return clk->parent->rate / div;
+ return p_rate / div;
}
-static void omap1_clk_allow_idle(struct clk *clk)
+static void omap1_clk_allow_idle(struct omap1_clk *clk)
{
struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -65,7 +71,7 @@ static void omap1_clk_allow_idle(struct clk *clk)
arm_idlect1_mask |= 1 << iclk->idlect_shift;
}
-static void omap1_clk_deny_idle(struct clk *clk)
+static void omap1_clk_deny_idle(struct omap1_clk *clk)
{
struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -129,7 +135,7 @@ static __u16 verify_ckctl_value(__u16 newval)
return newval;
}
-static int calc_dsor_exp(struct clk *clk, unsigned long rate)
+static int calc_dsor_exp(unsigned long rate, unsigned long realrate)
{
/* Note: If target frequency is too low, this function will return 4,
* which is invalid value. Caller must check for this value and act
@@ -142,15 +148,11 @@ static int calc_dsor_exp(struct clk *clk, unsigned long
rate)
* DSP_CK >= TC_CK
* DSPMMU_CK >= TC_CK
*/
- unsigned long realrate;
- struct clk * parent;
unsigned dsor_exp;
- parent = clk->parent;
- if (unlikely(parent == NULL))
+ if (unlikely(realrate == 0))
return -EIO;
- realrate = parent->rate;
for (dsor_exp=0; dsor_exp<4; dsor_exp++) {
[PATCH 41/41] [TO BE REBASED] ARM: omap1: enable multiplatform
From: Arnd Bergmann
With all the header files out of the way, and the clock driver
converted to the common framework, nothing stops us from building
OMAP together with the other platforms.
As usual, the decompressor support is a victim here, and is
only available when CONFIG_DEBUG_LL is configured for the
particular board.
Signed-off-by: Arnd Bergmann
---
arch/arm/Kconfig | 12 --
arch/arm/configs/omap1_defconfig | 3 +
arch/arm/mach-omap1/Kconfig | 15 +++
arch/arm/mach-omap1/hardware.h| 2 +-
arch/arm/mach-omap1/include/mach/uncompress.h | 117 --
arch/arm/mach-omap1/serial.c | 3 +-
.../mach-omap1/{include/mach => }/serial.h| 0
7 files changed, 20 insertions(+), 132 deletions(-)
delete mode 100644 arch/arm/mach-omap1/include/mach/uncompress.h
rename arch/arm/mach-omap1/{include/mach => }/serial.h (100%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a65f2c05f01c..8794c6bee29b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -483,18 +483,6 @@ config ARCH_S3C24XX
(
Re: [PATCH 2/2] drm/bridge: lt9211: Add Lontium LT9211 bridge driver
On Wed, 30 Mar 2022 at 23:23, Marek Vasut wrote:
>
> Add driver for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI to
> Single-link/Dual-Link DSI/LVDS or Single DPI bridge. This chip is highly
> capable at converting formats, but sadly it is also highly undocumented.
>
> This driver is written without any documentation from Lontium and based
> only on shreds of information available in various obscure example codes,
> hence long runs of unknown register patches and lengthy delays in various
> places. Whichever register meaning could be divined from its behavior has
> at least a comment around it.
>
> Currently the only mode tested is Single-link DSI to Single-link LVDS.
> Dual-link LVDS might work as well, the register programming is in place,
> but is untested.
>
> Signed-off-by: Marek Vasut
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Maxime Ripard
> Cc: Robert Foss
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> To: dri-devel@lists.freedesktop.org
> ---
> drivers/gpu/drm/bridge/Kconfig | 13 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/lontium-lt9211.c | 802
> 3 files changed, 816 insertions(+)
> create mode 100644 drivers/gpu/drm/bridge/lontium-lt9211.c
>
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 044a268d7c89..dd9f0b32a5a9 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -98,6 +98,19 @@ config DRM_LONTIUM_LT8912B
> Say M here if you want to support this hardware as a module.
> The module will be named "lontium-lt8912b".
>
> +config DRM_LONTIUM_LT9211
> + tristate "Lontium LT9211 DSI/LVDS/DPI bridge"
> + depends on OF
> + select DRM_PANEL_BRIDGE
> + select DRM_KMS_HELPER
> + select DRM_MIPI_DSI
> + select REGMAP_I2C
> + help
> + Driver for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI
> + input to Single-link/Dual-Link DSI/LVDS or Single DPI output bridge
> + chip.
> + Please say Y if you have such hardware.
> +
> config DRM_LONTIUM_LT9611
> tristate "Lontium LT9611 DSI/HDMI bridge"
> select SND_SOC_HDMI_CODEC if SND_SOC
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index 0774e289f81b..f800b2331d9e 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o
> obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o
> obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o
> obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o
> +obj-$(CONFIG_DRM_LONTIUM_LT9211) += lontium-lt9211.o
> obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o
> obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o
> obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o
> diff --git a/drivers/gpu/drm/bridge/lontium-lt9211.c
> b/drivers/gpu/drm/bridge/lontium-lt9211.c
> new file mode 100644
> index ..e92821fbc639
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/lontium-lt9211.c
> @@ -0,0 +1,802 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Lontium LT9211 bridge driver
> + *
> + * LT9211 is capable of converting:
> + * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
> + * Currently supported is:
> + * 1xDSI -> 1xLVDS
> + *
> + * Copyright (C) 2022 Marek Vasut
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define REG_PAGE_CONTROL 0xff
> +#define REG_CHIPID00x8100
> +#define REG_CHIPID0_VALUE 0x18
> +#define REG_CHIPID10x8101
> +#define REG_CHIPID1_VALUE 0x01
> +#define REG_CHIPID20x8102
> +#define REG_CHIPID2_VALUE 0xe3
> +
> +#define REG_DSI_LANE 0xd000
> +/* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
> +#define REG_DSI_LANE_COUNT(n) ((n) & 3)
> +
> +struct lt9211 {
> + struct drm_bridge bridge;
> + struct device *dev;
> + struct regmap *regmap;
> + struct mipi_dsi_device *dsi;
> + struct drm_bridge *panel_bridge;
> + struct gpio_desc*reset_gpio;
> + struct regulator*vccio;
> + boollvds_dual_link;
> + boollvds_dual_link_even_odd_swap;
> +};
> +
> +static const struct regmap_range lt9211_rw_ranges[] = {
> + regmap_reg_range(0xff, 0xff),
> + regmap_reg_range(0x8100, 0x816b),
> + regmap_reg_range(0x8200, 0x82aa),
> + regmap_reg_range(0x8500, 0x85ff),
> +
Re: [PATCH] drm/bridge: anx7625: Fill in empty ELD when no connector
On Tue, 19 Apr 2022 at 04:29, Xin Ji wrote:
>
> On Thu, Apr 14, 2022 at 05:00:04PM +0800, Hsin-Yi Wang wrote:
> > Speaker may share I2S with DP and .get_eld callback will be called when
> > speaker is playing. When HDMI wans't connected, the connector will be
> > null. Instead of return an error, fill in empty ELD.
> >
> > Signed-off-by: Hsin-Yi Wang
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 12 ++--
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 6516f9570b86..f2bc30c98c77 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -1932,14 +1932,14 @@ static int anx7625_audio_get_eld(struct device
> > *dev, void *data,
> > struct anx7625_data *ctx = dev_get_drvdata(dev);
> >
> > if (!ctx->connector) {
> > - dev_err(dev, "connector not initial\n");
> > - return -EINVAL;
> > + /* Pass en empty ELD if connector not available */
> > + memset(buf, 0, len);
> > + } else {
> > + dev_dbg(dev, "audio copy eld\n");
> > + memcpy(buf, ctx->connector->eld,
> > +min(sizeof(ctx->connector->eld), len));
> > }
> >
> > - dev_dbg(dev, "audio copy eld\n");
> > - memcpy(buf, ctx->connector->eld,
> > -min(sizeof(ctx->connector->eld), len));
> > -
> > return 0;
> Hi Hsin-Yi, it's OK for me.
> Reviewed-by: Xin Ji
Applied to drm-misc-next
Re: [PATCH 2/2] drm/nvdla: Add driver support for NVDLA
Am 19.04.22 um 15:59 schrieb Cai Huoqing: The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP which is integrated into NVIDIA Jetson AGX Xavier, so add driver support for this accelerator. Signed-off-by: Cai Huoqing Well doesn't looks so bad on first glance (regarding coding style etc..) But am I blind or isn't there any UAPI for the driver? I mean adding a DRM driver without any change to include/uapi/drm is really odd. Regards, Christian.
[PATCH 1/2] MAINTAINERS: Add the driver info of the NVDLA
The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP which is integrated into Jetson AGX Xavier. After adding the driver support for it, I add the driver info of the NVDLA to MAINTAINERS file. Signed-off-by: Cai Huoqing --- MAINTAINERS | 7 +++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 452f3662e5ac..0e5464d61a6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6485,6 +6485,13 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml F: drivers/gpu/drm/panel/panel-widechips-ws2401.c +DRM DRIVER FOR NVDLA +M: Cai Huoqing +L: dri-devel@lists.freedesktop.org +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: drivers/gpu/drm/nvdla/ + DRM DRIVERS M: David Airlie M: Daniel Vetter -- 2.25.1
[PATCH 0/2] drm/nvdla: Add driver support for NVDLA
The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP which is integrated into NVIDIA Jetson AGX Xavier, so add driver support for this accelerator. NVDLA introduce: http://nvdla.org/primer.html User mode driver: https://github.com/caihuoq/nvdla/tree/main/sw/umd Cai Huoqing (2): MAINTAINERS: Add the driver info of the NVDLA drm/nvdla: Add driver support for NVDLA MAINTAINERS |7 + drivers/gpu/drm/Kconfig |2 + drivers/gpu/drm/Makefile|1 + drivers/gpu/drm/nvdla/Kconfig |8 + drivers/gpu/drm/nvdla/Makefile | 19 + drivers/gpu/drm/nvdla/nvdla_bdma.c | 200 + drivers/gpu/drm/nvdla/nvdla_cache.c | 215 + drivers/gpu/drm/nvdla/nvdla_cdp.c | 300 ++ drivers/gpu/drm/nvdla/nvdla_common.c| 295 ++ drivers/gpu/drm/nvdla/nvdla_common.h| 835 +++ drivers/gpu/drm/nvdla/nvdla_conv.c | 683 +++ drivers/gpu/drm/nvdla/nvdla_drm.c | 695 +++ drivers/gpu/drm/nvdla/nvdla_drm.h | 127 + drivers/gpu/drm/nvdla/nvdla_engine.c| 233 + drivers/gpu/drm/nvdla/nvdla_engine.h| 272 + drivers/gpu/drm/nvdla/nvdla_gem.c | 393 ++ drivers/gpu/drm/nvdla/nvdla_ioctl.h | 99 + drivers/gpu/drm/nvdla/nvdla_pdp.c | 446 ++ drivers/gpu/drm/nvdla/nvdla_reg.h | 6411 +++ drivers/gpu/drm/nvdla/nvdla_rubik.c | 217 + drivers/gpu/drm/nvdla/nvdla_sched.h | 52 + drivers/gpu/drm/nvdla/nvdla_scheduler.c | 1005 drivers/gpu/drm/nvdla/nvdla_sdp.c | 728 +++ 23 files changed, 13243 insertions(+) create mode 100644 drivers/gpu/drm/nvdla/Kconfig create mode 100644 drivers/gpu/drm/nvdla/Makefile create mode 100644 drivers/gpu/drm/nvdla/nvdla_bdma.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_cache.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_cdp.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_common.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_conv.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_drm.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_drm.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_engine.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_gem.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_ioctl.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_pdp.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_reg.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_rubik.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_sched.h create mode 100644 drivers/gpu/drm/nvdla/nvdla_scheduler.c create mode 100644 drivers/gpu/drm/nvdla/nvdla_sdp.c -- 2.25.1
Re: [PATCH 00/41] OMAP1 full multiplatform conversion
On Tue, 19 Apr 2022 at 15:37, Arnd Bergmann wrote: > > From: Arnd Bergmann > > This is the full series for converting OMAP1 to multiplatform, rebased > from my 2019 attempt to do the same thing. The soc tree contains simpler > patches to do the same for iop32x, ixp4xx, ep93xx and s3c24xx, which > means we are getting closer to completing this for all ARMv5 platforms > (I have patches for PXA, which is the last one remaining). > > Janusz already tested the branch separately and did the missing work > for the common-clk conversion after my previous approach was broken. > > The fbdev, mmc and ASoC portion of Janusz' work already went into the > corresponding maintainer tree, but I include them here for reference. > Unless there are any objections, I would add the entire series to the > for-next branch of the soc tree, but only send the first 36 patches early > in the merge window. After everything else has made it in, I would rebase > the last two patches and send them separately, which may or may not make > it in the merge window. Sounds like a good plan to me. I usually send the MMC pull-request on Mondays, the first day of the merge window. [...] Kind regards Uffe
Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add missing register & interrupt
On Tue, Apr 19, 2022 at 12:33:01PM +0530, Aradhya Bhatia wrote:
> The DSS IP on the ti-am65x soc supports an additional register space,
> named "common1". Further. the IP services a maximum number of 2
> interrupts.
>
> Add the missing register space "common1" and the additional interrupt.
>
> Signed-off-by: Aradhya Bhatia
> ---
> .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 10 +++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> index 5c7d2cbc4aac..102059e9e0d5 100644
> --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
> @@ -26,6 +26,7 @@ properties:
>Addresses to each DSS memory region described in the SoC's TRM.
> items:
>- description: common DSS register area
> + - description: common1 DSS register area
You've just broken the ABI.
New entries have to go on the end.
>- description: VIDL1 light video plane
>- description: VID video plane
>- description: OVR1 overlay manager for vp1
> @@ -36,6 +37,7 @@ properties:
>reg-names:
> items:
>- const: common
> + - const: common1
>- const: vidl1
>- const: vid
>- const: ovr1
> @@ -64,7 +66,7 @@ properties:
> maxItems: 3
>
>interrupts:
> -maxItems: 1
> +maxItems: 2
Once there is more than 1, we need to know what each entry is and the
order.
>
>power-domains:
> maxItems: 1
> @@ -122,13 +124,14 @@ examples:
> dss: dss@4a0 {
> compatible = "ti,am65x-dss";
> reg = <0x04a0 0x1000>, /* common */
> +reg = <0x04a01000 0x1000>, /* common1 */
> <0x04a02000 0x1000>, /* vidl1 */
> <0x04a06000 0x1000>, /* vid */
> <0x04a07000 0x1000>, /* ovr1 */
> <0x04a08000 0x1000>, /* ovr2 */
> <0x04a0a000 0x1000>, /* vp1 */
> <0x04a0b000 0x1000>; /* vp2 */
> -reg-names = "common", "vidl1", "vid",
> +reg-names = "common", "common1". "vidl1", "vid",
> "ovr1", "ovr2", "vp1", "vp2";
> ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
> power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
> @@ -136,7 +139,8 @@ examples:
> <&k3_clks 216 1>,
> <&k3_clks 67 2>;
> clock-names = "fck", "vp1", "vp2";
> -interrupts = ;
> +interrupts = ,
> + ;
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
> --
> 2.35.3
>
>
[PATCH] drm: bridge: adv7511: Enable DRM_BRIDGE_OP_HPD based on HPD interrupt
Connector detection using poll method won't work in case of bridge attached to the encoder with the flag DRM_BRIDGE_ATTACH_NO_CONNECTOR, as the code defaults to HPD. Enable DRM_BRIDGE_OP_HPD based on HPD interrupt availability, so that it will fall back to polling, if HPD is not available. Signed-off-by: Biju Das --- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index 668dcefbae17..b3f10c54e064 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -1292,8 +1292,10 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id) goto err_unregister_cec; adv7511->bridge.funcs = &adv7511_bridge_funcs; - adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID - | DRM_BRIDGE_OP_HPD; + adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; + if (adv7511->i2c_main->irq) + adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD; + adv7511->bridge.of_node = dev->of_node; adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA; -- 2.25.1
Re: [PATCH] drm/amd/display: make hubp1_wait_pipe_read_start() static
Applied with minor change to drop the prototype in dcn10_hubp.h. Thanks!
Alex
On Fri, Apr 15, 2022 at 2:21 PM Tales Lelo da Aparecida
wrote:
>
> It's a local function, let's make it static.
>
> Signed-off-by: Tales Lelo da Aparecida
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> index fbff6beb78be..3a7f76e2c598 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
> @@ -1316,7 +1316,7 @@ void hubp1_set_flip_int(struct hubp *hubp)
> *
> * @hubp: hubp struct reference.
> */
> -void hubp1_wait_pipe_read_start(struct hubp *hubp)
> +static void hubp1_wait_pipe_read_start(struct hubp *hubp)
> {
> struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
>
> --
> 2.35.1
>
Re: [PATCH 2/2] drm/nvdla: Add driver support for NVDLA
On 19 4月 22 16:07:44, Christian König wrote: > Am 19.04.22 um 15:59 schrieb Cai Huoqing: > > The NVIDIA Deep Learning Accelerator (NVDLA) is an open source IP > > which is integrated into NVIDIA Jetson AGX Xavier, > > so add driver support for this accelerator. > > > > Signed-off-by: Cai Huoqing > > > > Well doesn't looks so bad on first glance (regarding coding style etc..) > > But am I blind or isn't there any UAPI for the driver? I mean adding a DRM > driver without any change to include/uapi/drm is really odd. thanks for your reply, I will rename nvdla_ioctl.h which is UAPI headfile, then put it to include/uapi/drm. thanks, Cai > > Regards, > Christian.
Re: [PATCH] drm/amd/pm: fix double free in si_parse_power_table()
Applied. Thanks!
On Tue, Apr 19, 2022 at 8:49 AM Keita Suzuki
wrote:
>
> In function si_parse_power_table(), array adev->pm.dpm.ps and its member
> is allocated. If the allocation of each member fails, the array itself
> is freed and returned with an error code. However, the array is later
> freed again in si_dpm_fini() function which is called when the function
> returns an error.
>
> This leads to potential double free of the array adev->pm.dpm.ps, as
> well as leak of its array members, since the members are not freed in
> the allocation function and the array is not nulled when freed.
> In addition adev->pm.dpm.num_ps, which keeps track of the allocated
> array member, is not updated until the member allocation is
> successfully finished, this could also lead to either use after free,
> or uninitialized variable access in si_dpm_fini().
>
> Fix this by postponing the free of the array until si_dpm_fini() and
> increment adev->pm.dpm.num_ps everytime the array member is allocated.
>
> Signed-off-by: Keita Suzuki
> ---
> drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 +++-
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
> b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
> index caae54487f9c..079888229485 100644
> --- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
> @@ -7331,17 +7331,15 @@ static int si_parse_power_table(struct amdgpu_device
> *adev)
> if (!adev->pm.dpm.ps)
> return -ENOMEM;
> power_state_offset = (u8 *)state_array->states;
> - for (i = 0; i < state_array->ucNumEntries; i++) {
> + for (adev->pm.dpm.num_ps = 0, i = 0; i < state_array->ucNumEntries;
> i++) {
> u8 *idx;
> power_state = (union pplib_power_state *)power_state_offset;
> non_clock_array_index = power_state->v2.nonClockInfoIndex;
> non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *)
>
> &non_clock_info_array->nonClockInfo[non_clock_array_index];
> ps = kzalloc(sizeof(struct si_ps), GFP_KERNEL);
> - if (ps == NULL) {
> - kfree(adev->pm.dpm.ps);
> + if (ps == NULL)
> return -ENOMEM;
> - }
> adev->pm.dpm.ps[i].ps_priv = ps;
> si_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i],
> non_clock_info,
> @@ -7363,8 +7361,8 @@ static int si_parse_power_table(struct amdgpu_device
> *adev)
> k++;
> }
> power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
> + adev->pm.dpm.num_ps++;
> }
> - adev->pm.dpm.num_ps = state_array->ucNumEntries;
>
> /* fill in the vce power states */
> for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
> --
> 2.25.1
>
[PATCH v2 1/2] dt-bindings: display: bridge: lt9211: Add Lontium LT9211 bridge driver
Add bindings for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI to
Single-link/Dual-Link DSI/LVDS or Single DPI bridge. This chip is highly
capable at converting formats, but sadly it is also highly undocumented.
Reviewed-by: Rob Herring
Signed-off-by: Marek Vasut
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Maxime Ripard
Cc: Rob Herring
Cc: Robert Foss
Cc: Sam Ravnborg
Cc: Thomas Zimmermann
Cc: devicet...@vger.kernel.org
To: dri-devel@lists.freedesktop.org
---
V2: - Fix up s@i2c10@i2c@ in binding example
- Add RB from Rob
---
.../display/bridge/lontium,lt9211.yaml| 117 ++
1 file changed, 117 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
diff --git
a/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
new file mode 100644
index 0..9a6e9b25d14a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
@@ -0,0 +1,117 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/lontium,lt9211.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
+
+maintainers:
+ - Marek Vasut
+
+description: |
+ The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
+ or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
+
+properties:
+ compatible:
+enum:
+ - lontium,lt9211
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ reset-gpios:
+maxItems: 1
+description: GPIO connected to active high RESET pin.
+
+ vccio-supply:
+description: Regulator for 1.8V IO power.
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+ Primary MIPI DSI port-1 for MIPI input or
+ LVDS port-1 for LVDS input or DPI input.
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+ Additional MIPI port-2 for MIPI input or LVDS port-2
+ for LVDS input. Used in combination with primary
+ port-1 to drive higher resolution displays
+
+ port@2:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+ Primary MIPI DSI port-1 for MIPI output or
+ LVDS port-1 for LVDS output or DPI output.
+
+ port@3:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+ Additional MIPI port-2 for MIPI output or LVDS port-2
+ for LVDS output. Used in combination with primary
+ port-1 to drive higher resolution displays.
+
+required:
+ - port@0
+ - port@2
+
+required:
+ - compatible
+ - reg
+ - vccio-supply
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi-bridge@3b {
+compatible = "lontium,lt9211";
+reg = <0x3b>;
+
+reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
+interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
+
+vccio-supply = <<9211_1v8>;
+
+ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+reg = <0>;
+
+endpoint {
+ remote-endpoint = <&dsi0_out>;
+};
+ };
+
+ port@2 {
+reg = <2>;
+
+endpoint {
+ remote-endpoint = <&panel_in_lvds>;
+};
+ };
+};
+ };
+};
+
+...
--
2.35.1
[PATCH v2 2/2] drm/bridge: lt9211: Add Lontium LT9211 bridge driver
Add driver for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI to
Single-link/Dual-Link DSI/LVDS or Single DPI bridge. This chip is highly
capable at converting formats, but sadly it is also highly undocumented.
This driver is written without any documentation from Lontium and based
only on shreds of information available in various obscure example codes,
hence long runs of unknown register patches and lengthy delays in various
places. Whichever register meaning could be divined from its behavior has
at least a comment around it.
Currently the only mode tested is Single-link DSI to Single-link LVDS.
Dual-link LVDS might work as well, the register programming is in place,
but is untested.
Reviewed-by: Robert Foss
Signed-off-by: Marek Vasut
Cc: Laurent Pinchart
Cc: Lucas Stach
Cc: Maxime Ripard
Cc: Robert Foss
Cc: Sam Ravnborg
Cc: Thomas Zimmermann
To: dri-devel@lists.freedesktop.org
---
V2: - Add RB from Robert
---
drivers/gpu/drm/bridge/Kconfig | 13 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/lontium-lt9211.c | 802
3 files changed, 816 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/lontium-lt9211.c
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index ca70f03ef7405..20f9bc7f4be54 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -100,6 +100,19 @@ config DRM_LONTIUM_LT8912B
Say M here if you want to support this hardware as a module.
The module will be named "lontium-lt8912b".
+config DRM_LONTIUM_LT9211
+ tristate "Lontium LT9211 DSI/LVDS/DPI bridge"
+ depends on OF
+ select DRM_PANEL_BRIDGE
+ select DRM_KMS_HELPER
+ select DRM_MIPI_DSI
+ select REGMAP_I2C
+ help
+ Driver for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI
+ input to Single-link/Dual-Link DSI/LVDS or Single DPI output bridge
+ chip.
+ Please say Y if you have such hardware.
+
config DRM_LONTIUM_LT9611
tristate "Lontium LT9611 DSI/HDMI bridge"
select SND_SOC_HDMI_CODEC if SND_SOC
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index c90fdf1d1d251..bdffad2a7ed3a 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_CROS_EC_ANX7688) += cros-ec-anx7688.o
obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o
obj-$(CONFIG_DRM_ITE_IT6505) += ite-it6505.o
obj-$(CONFIG_DRM_LONTIUM_LT8912B) += lontium-lt8912b.o
+obj-$(CONFIG_DRM_LONTIUM_LT9211) += lontium-lt9211.o
obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o
obj-$(CONFIG_DRM_LONTIUM_LT9611UXC) += lontium-lt9611uxc.o
obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o
diff --git a/drivers/gpu/drm/bridge/lontium-lt9211.c
b/drivers/gpu/drm/bridge/lontium-lt9211.c
new file mode 100644
index 0..e92821fbc6393
--- /dev/null
+++ b/drivers/gpu/drm/bridge/lontium-lt9211.c
@@ -0,0 +1,802 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lontium LT9211 bridge driver
+ *
+ * LT9211 is capable of converting:
+ * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
+ * Currently supported is:
+ * 1xDSI -> 1xLVDS
+ *
+ * Copyright (C) 2022 Marek Vasut
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define REG_PAGE_CONTROL 0xff
+#define REG_CHIPID00x8100
+#define REG_CHIPID0_VALUE 0x18
+#define REG_CHIPID10x8101
+#define REG_CHIPID1_VALUE 0x01
+#define REG_CHIPID20x8102
+#define REG_CHIPID2_VALUE 0xe3
+
+#define REG_DSI_LANE 0xd000
+/* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
+#define REG_DSI_LANE_COUNT(n) ((n) & 3)
+
+struct lt9211 {
+ struct drm_bridge bridge;
+ struct device *dev;
+ struct regmap *regmap;
+ struct mipi_dsi_device *dsi;
+ struct drm_bridge *panel_bridge;
+ struct gpio_desc*reset_gpio;
+ struct regulator*vccio;
+ boollvds_dual_link;
+ boollvds_dual_link_even_odd_swap;
+};
+
+static const struct regmap_range lt9211_rw_ranges[] = {
+ regmap_reg_range(0xff, 0xff),
+ regmap_reg_range(0x8100, 0x816b),
+ regmap_reg_range(0x8200, 0x82aa),
+ regmap_reg_range(0x8500, 0x85ff),
+ regmap_reg_range(0x8600, 0x86a0),
+ regmap_reg_range(0x8700, 0x8746),
+ regmap_reg_range(0xd000, 0xd0a7),
+ regmap_reg_range(0xd400, 0xd42c),
+ regmap_reg_range(0xd800, 0xd838),
+ regmap_reg_range(0xd9c0, 0xd9d5
Re: [PATCH] drm/amd/display: add virtual_setup_stream_attribute decl to header
Applied. Thanks! On Mon, Apr 18, 2022 at 3:48 PM Tom Rix wrote: > > Smatch reports this issue > virtual_link_hwss.c:32:6: warning: symbol > 'virtual_setup_stream_attribute' was not declared. > Should it be static? > > virtual_setup_stream_attribute is only used in > virtual_link_hwss.c, but the other functions in the > file are declared in the header file and used elsewhere. > For consistency, add the virtual_setup_stream_attribute > decl to virtual_link_hwss.h. > > Signed-off-by: Tom Rix > --- > drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.h > b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.h > index e6bcb4bb0f3a..fbcbc5afb47d 100644 > --- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.h > +++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.h > @@ -28,6 +28,7 @@ > #include "core_types.h" > > void virtual_setup_stream_encoder(struct pipe_ctx *pipe_ctx); > +void virtual_setup_stream_attribute(struct pipe_ctx *pipe_ctx); > void virtual_reset_stream_encoder(struct pipe_ctx *pipe_ctx); > const struct link_hwss *get_virtual_link_hwss(void); > > -- > 2.27.0 >
Re: [PATCH v2 1/2] dt-bindings: display: bridge: lt9211: Add Lontium LT9211 bridge driver
On Tue, 19 Apr 2022 at 16:40, Marek Vasut wrote:
>
> Add bindings for Lontium LT9211 Single/Dual-Link DSI/LVDS or Single DPI to
> Single-link/Dual-Link DSI/LVDS or Single DPI bridge. This chip is highly
> capable at converting formats, but sadly it is also highly undocumented.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Marek Vasut
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Maxime Ripard
> Cc: Rob Herring
> Cc: Robert Foss
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Cc: devicet...@vger.kernel.org
> To: dri-devel@lists.freedesktop.org
> ---
> V2: - Fix up s@i2c10@i2c@ in binding example
> - Add RB from Rob
> ---
> .../display/bridge/lontium,lt9211.yaml| 117 ++
> 1 file changed, 117 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
> b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
> new file mode 100644
> index 0..9a6e9b25d14a9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml
> @@ -0,0 +1,117 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/lontium,lt9211.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
> +
> +maintainers:
> + - Marek Vasut
> +
> +description: |
> + The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
> + or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
> +
> +properties:
> + compatible:
> +enum:
> + - lontium,lt9211
> +
> + reg:
> +maxItems: 1
> +
> + interrupts:
> +maxItems: 1
> +
> + reset-gpios:
> +maxItems: 1
> +description: GPIO connected to active high RESET pin.
> +
> + vccio-supply:
> +description: Regulator for 1.8V IO power.
> +
> + ports:
> +$ref: /schemas/graph.yaml#/properties/ports
> +
> +properties:
> + port@0:
> +$ref: /schemas/graph.yaml#/properties/port
> +description:
> + Primary MIPI DSI port-1 for MIPI input or
> + LVDS port-1 for LVDS input or DPI input.
> +
> + port@1:
> +$ref: /schemas/graph.yaml#/properties/port
> +description:
> + Additional MIPI port-2 for MIPI input or LVDS port-2
> + for LVDS input. Used in combination with primary
> + port-1 to drive higher resolution displays
> +
> + port@2:
> +$ref: /schemas/graph.yaml#/properties/port
> +description:
> + Primary MIPI DSI port-1 for MIPI output or
> + LVDS port-1 for LVDS output or DPI output.
> +
> + port@3:
> +$ref: /schemas/graph.yaml#/properties/port
> +description:
> + Additional MIPI port-2 for MIPI output or LVDS port-2
> + for LVDS output. Used in combination with primary
> + port-1 to drive higher resolution displays.
> +
> +required:
> + - port@0
> + - port@2
> +
> +required:
> + - compatible
> + - reg
> + - vccio-supply
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> +#include
> +#include
> +
> +i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + hdmi-bridge@3b {
> +compatible = "lontium,lt9211";
> +reg = <0x3b>;
> +
> +reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
> +interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
> +
> +vccio-supply = <<9211_1v8>;
> +
> +ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> +reg = <0>;
> +
> +endpoint {
> + remote-endpoint = <&dsi0_out>;
> +};
> + };
> +
> + port@2 {
> +reg = <2>;
> +
> +endpoint {
> + remote-endpoint = <&panel_in_lvds>;
> +};
> + };
> +};
> + };
> +};
> +
> +...
Applied series to drm-misc-next
Rob.
RE: [PATCH v2 1/2] dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v2 1/2] dt-bindings: display: bridge: Document RZ/G2L
> MIPI DSI TX bindings
>
> Hi Biju,
>
> On Mon, Mar 28, 2022 at 8:49 AM Biju Das
> wrote:
> > The RZ/G2L MIPI DSI TX is embedded in the Renesas RZ/G2L family SoC's.
> > It can operate in DSI mode, with up to four data lanes.
> >
> > Signed-off-by: Biju Das
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yam
> > +++ l
> > @@ -0,0 +1,175 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +
> > +title: Renesas RZ/G2L MIPI DSI Encoder
> > +
> > +maintainers:
> > + - Biju Das
> > +
> > +description: |
> > + This binding describes the MIPI DSI encoder embedded in the Renesas
> > + RZ/G2L alike family of SoC's. The encoder can operate in DSI mode,
> > +with
> > + up to four data lanes.
> > +
> > +allOf:
> > + - $ref: /schemas/display/dsi-controller.yaml#
> > +
> > +properties:
> > + compatible:
> > +enum:
> > + - renesas,rzg2l-mipi-dsi # RZ/G2L and RZ/V2L
>
> Do you want to define SoC-specific compatible values, or can the IP
> revision be read from the hardware?
There is no IP revision register for DSI. "rzg2l-mipi-dsi" is generic
Compatible for both RZ/G2L and RZ/V2L.
So I can add SoC compatible for both these SoC's along with generic one.
Regards,
Biju
>
> The rest LGTM (I'm no MIPI-DSI expert), so
> Reviewed-by: Geert Uytterhoeven
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
> -- Linus Torvalds
Re: [PATCH] drm/radeon/kms: change evergreen_default_state table from global to static
Applied. Thanks!
On Sat, Apr 16, 2022 at 2:48 PM Tom Rix wrote:
>
> evergreen_default_state and evergreen_default_size are only
> used in evergreen.c. Single file symbols should be static.
> So move their definitions to evergreen_blit_shaders.h
> and change their storage-class-specifier to static.
>
> Remove unneeded evergreen_blit_shader.c
>
> evergreen_ps/vs definitions were removed with
> commit 4f8629675800 ("drm/radeon/kms: remove r6xx+ blit copy routines")
> So their declarations in evergreen_blit_shader.h
> are not needed, so remove them.
>
> Signed-off-by: Tom Rix
> ---
> drivers/gpu/drm/radeon/Makefile | 2 +-
> .../gpu/drm/radeon/evergreen_blit_shaders.c | 303 --
> .../gpu/drm/radeon/evergreen_blit_shaders.h | 278 +++-
> 3 files changed, 274 insertions(+), 309 deletions(-)
> delete mode 100644 drivers/gpu/drm/radeon/evergreen_blit_shaders.c
>
> diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
> index 4deedaacd655..1045d2c46a76 100644
> --- a/drivers/gpu/drm/radeon/Makefile
> +++ b/drivers/gpu/drm/radeon/Makefile
> @@ -41,7 +41,7 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
> rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
> r200.o radeon_legacy_tv.o r600_cs.o \
> radeon_pm.o atombios_dp.o r600_hdmi.o dce3_1_afmt.o \
> - evergreen.o evergreen_cs.o evergreen_blit_shaders.o \
> + evergreen.o evergreen_cs.o \
> evergreen_hdmi.o radeon_trace_points.o ni.o \
> atombios_encoders.o radeon_semaphore.o radeon_sa.o atombios_i2c.o
> si.o \
> radeon_prime.o cik.o cik_blit_shaders.o \
> diff --git a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
> b/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
> deleted file mode 100644
> index 1a96ddb3e5ed..
> --- a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c
> +++ /dev/null
> @@ -1,303 +0,0 @@
> -/*
> - * Copyright 2010 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice (including the next
> - * paragraph) shall be included in all copies or substantial portions of the
> - * Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
> DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> OTHER
> - * DEALINGS IN THE SOFTWARE.
> - *
> - * Authors:
> - * Alex Deucher
> - */
> -
> -#include
> -#include
> -#include
> -
> -/*
> - * evergreen cards need to use the 3D engine to blit data which requires
> - * quite a bit of hw state setup. Rather than pull the whole 3D driver
> - * (which normally generates the 3D state) into the DRM, we opt to use
> - * statically generated state tables. The register state and shaders
> - * were hand generated to support blitting functionality. See the 3D
> - * driver or documentation for descriptions of the registers and
> - * shader instructions.
> - */
> -
> -const u32 evergreen_default_state[] =
> -{
> - 0xc0016900,
> - 0x023b,
> - 0x, /* SQ_LDS_ALLOC_PS */
> -
> - 0xc0066900,
> - 0x0240,
> - 0x, /* SQ_ESGS_RING_ITEMSIZE */
> - 0x,
> - 0x,
> - 0x,
> - 0x,
> - 0x,
> -
> - 0xc0046900,
> - 0x0247,
> - 0x, /* SQ_GS_VERT_ITEMSIZE */
> - 0x,
> - 0x,
> - 0x,
> -
> - 0xc0026900,
> - 0x0010,
> - 0x, /* DB_Z_INFO */
> - 0x, /* DB_STENCIL_INFO */
> -
> - 0xc0016900,
> - 0x0200,
> - 0x, /* DB_DEPTH_CONTROL */
> -
> - 0xc0066900,
> - 0x,
> - 0x0060, /* DB_RENDER_CONTROL */
> - 0x, /* DB_COUNT_CONTROL */
> - 0x, /* DB_DEPTH_VIEW */
> - 0x002a, /* DB_RENDER_OVERRIDE */
> - 0x, /* DB_RENDER_OVERRIDE2 */
> - 0x, /* DB_HTILE_DATA_BASE */
> -
> - 0xc0026900,
> - 0x000a,
> - 0x, /* DB_STENCIL_CLEAR */
> - 0x, /* DB_DEPTH_CLEAR */
> -
> - 0xc0016900,
> -
Re: [PATCH 3/5] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195
On 19/04/2022 05:32, Rex-BC Chen wrote:
From: "Nancy.Lin"
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,mdp-rdma.yaml | 86 +++
1 file changed, 86 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
new file mode 100644
index ..6ab773569462
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mdp-rdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MDP RDMA
+
+maintainers:
+ - Matthias Brugger
I don't think I would be the correct person to maintain this. This should be the
person that is maintaining the driver.
Regards,
Matthias
+
+description: |
+ The mediatek MDP RDMA stands for Read Direct Memory Access.
+ It provides real time data to the back-end panel driver, such as DSI,
+ DPI and DP_INTF.
+ It contains one line buffer to store the sufficient pixel data.
+ RDMA device node must be siblings to the central MMSYS_CONFIG node.
+ For a description of the MMSYS_CONFIG binding, see
+ Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for
details.
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - const: mediatek,mt8195-vdo1-rdma
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+description: A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ clocks:
+items:
+ - description: RDMA Clock
+
+ iommus:
+description:
+ This property should point to the respective IOMMU block with master
port as argument,
+ see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for
details.
+
+ mediatek,gce-client-reg:
+description:
+ The register of display function block to be set by gce. There are 4
arguments,
+ such as gce node, subsys id, offset and register size. The subsys id
that is
+ mapping to the register of display function blocks is defined in the gce
header
+ include/include/dt-bindings/gce/-gce.h of each chips.
+$ref: /schemas/types.yaml#/definitions/phandle-array
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - clocks
+ - iommus
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+
+soc {
+#address-cells = <2>;
+#size-cells = <2>;
+
+vdo1_rdma0: mdp-rdma@1c104000 {
+compatible = "mediatek,mt8195-vdo1-rdma";
+reg = <0 0x1c104000 0 0x1000>;
+interrupts = ;
+clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
+power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
+iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
+mediatek,gce-client-reg = <&gce0 SUBSYS_1c10 0x4000 0x1000>;
+};
+};
Re: [PATCH 2/5] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding
On 19/04/2022 05:32, Rex-BC Chen wrote: From: "jason-jh.lin" In the SoC before, such as mt8173, it has 2 pipelines binding to one mmsys with the same clock driver and the same power domain. In mt8195, there are 4 pipelines binding to 4 different mmsys, such as vdosys0, vdosys1, vppsys0 and vppsys1. Each mmsys uses different clock drivers and different power domain. Since each mmsys has its own mmio base address, they could be identified by their different address during probe time. Signed-off-by: jason-jh.lin Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Applied, thanks --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 6c2c3edcd443..6ad023eec193 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -31,6 +31,7 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8192-mmsys + - mediatek,mt8195-mmsys - mediatek,mt8365-mmsys - const: syscon - items:
Re: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
On 19/04/2022 05:32, Rex-BC Chen wrote:
From: "jason-jh.lin"
Power:
1. Add description for power-domains property.
GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.
Signed-off-by: jason-jh.lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Applied, thanks.
Matthias
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
reg:
maxItems: 1
+ power-domains:
+description:
+ A phandle and PM domain specifier as defined by bindings
+ of the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ mboxes:
+description:
+ Using mailbox to communicate with GCE, it should have this
+ property and list of phandle, mailbox specifiers. See
+ Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+$ref: /schemas/types.yaml#/definitions/phandle-array
+
+ mediatek,gce-client-reg:
+description:
+ The register of client driver can be configured by gce with 4 arguments
+ defined in this property, such as phandle of gce, subsys id,
+ register offset and size.
+ Each subsys id is mapping to a base address of display function blocks
+ register which is defined in the gce header
+ include/dt-bindings/gce/-gce.h.
+$ref: /schemas/types.yaml#/definitions/phandle-array
+maxItems: 1
+
"#clock-cells":
const: 1
@@ -56,9 +80,16 @@ additionalProperties: false
examples:
- |
+#include
+#include
+
mmsys: syscon@1400 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0x1400 0x1000>;
+power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
#clock-cells = <1>;
#reset-cells = <1>;
+mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+ <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+mediatek,gce-client-reg = <&gce SUBSYS_1400 0 0x1000>;
};
Re: [PATCH 1/2] Documentation/gpu: Add entries to amdgpu glossary
Applied the series with minor fix to capitalize the U in Compute Unit. Thanks! Alex On Fri, Apr 15, 2022 at 3:52 PM Tales Lelo da Aparecida wrote: > > Add missing acronyms to the amdgppu glossary. > > Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1939#note_1309737 > Signed-off-by: Tales Lelo da Aparecida > --- > Documentation/gpu/amdgpu/amdgpu-glossary.rst | 13 + > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > index 859dcec6c6f9..48829d097f40 100644 > --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst > +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst > @@ -8,12 +8,19 @@ we have a dedicated glossary for Display Core at > > .. glossary:: > > +active_cu_number > + The number of CUs that are active on the system. The number of active > + CUs may be less than SE * SH * CU depending on the board configuration. > + > CP >Command Processor > > CPLIB >Content Protection Library > > +CU > + Compute unit > + > DFS >Digital Frequency Synthesizer > > @@ -74,6 +81,12 @@ we have a dedicated glossary for Display Core at > SDMA >System DMA > > +SE > + Shader Engine > + > +SH > + SHader array > + > SMU >System Management Unit > > -- > 2.35.1 >
Re: [PATCH] drm/amdgpu/powerplay/vega10: fix minmax.cocci warnings
On Sat, Apr 16, 2022 at 11:41 AM Julia Lawall wrote: > > From: kernel test robot > > Use max to simplify the code. > > Generated by: scripts/coccinelle/misc/minmax.cocci > > CC: Denis Efremov > Reported-by: kernel test robot > Signed-off-by: kernel test robot > Signed-off-by: Julia Lawall This introduces a type comparison warning: drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c: In function ‘vega10_odn_initial_default_setting’: ./include/linux/minmax.h:20:35: warning: comparison of distinct pointer types lacks a cast 20 | (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) | ^~ ./include/linux/minmax.h:26:18: note: in expansion of macro ‘__typecheck’ 26 | (__typecheck(x, y) && __no_side_effects(x, y)) | ^~~ ./include/linux/minmax.h:36:31: note: in expansion of macro ‘__safe_cmp’ 36 | __builtin_choose_expr(__safe_cmp(x, y), \ | ^~ ./include/linux/minmax.h:52:25: note: in expansion of macro ‘__careful_cmp’ 52 | #define max(x, y) __careful_cmp(x, y, >) | ^ drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:350:40: note: in expansion of macro ‘max’ 350 | od_table[2]->entries[i].vddc = max(odn_table->max_vddc, |^~~ Alex > > --- > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git > master > head: 028192fea1de083f4f12bfb1eb7c4d7beb5c8ecd > commit: 5f66f73b9ff4dcabd4e2405ba9c32e80e02f9408 coccinelle: misc: add minmax > script > :: branch date: 17 hours ago > :: commit date: 12 months ago > > Please take the patch only if it's a positive warning. Thanks! > > drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 10 -- > 1 file changed, 4 insertions(+), 6 deletions(-) > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c > @@ -345,12 +345,10 @@ static int vega10_odn_initial_default_se > odn_table->min_vddc = dep_table[0]->entries[0].vddc; > > i = od_table[2]->count - 1; > - od_table[2]->entries[i].clk = > hwmgr->platform_descriptor.overdriveLimit.memoryClock > > od_table[2]->entries[i].clk ? > - > hwmgr->platform_descriptor.overdriveLimit.memoryClock : > - od_table[2]->entries[i].clk; > - od_table[2]->entries[i].vddc = odn_table->max_vddc > > od_table[2]->entries[i].vddc ? > - odn_table->max_vddc : > - od_table[2]->entries[i].vddc; > + od_table[2]->entries[i].clk = > max(hwmgr->platform_descriptor.overdriveLimit.memoryClock, > + od_table[2]->entries[i].clk); > + od_table[2]->entries[i].vddc = max(odn_table->max_vddc, > + od_table[2]->entries[i].vddc); > > return 0; > }
Re: [PATCH 3/5] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195
Matthias Brugger 於 2022年4月19日 週二 下午10:57寫道：
>
>
>
> On 19/04/2022 05:32, Rex-BC Chen wrote:
> > From: "Nancy.Lin"
> >
> > Add vdosys1 RDMA definition.
> >
> > Signed-off-by: Nancy.Lin
> > Reviewed-by: AngeloGioacchino Del Regno
> >
> > ---
> > .../display/mediatek/mediatek,mdp-rdma.yaml | 86 +++
> > 1 file changed, 86 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> > new file mode 100644
> > index ..6ab773569462
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> > @@ -0,0 +1,86 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mdp-rdma.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek MDP RDMA
> > +
> > +maintainers:
> > + - Matthias Brugger
>
> I don't think I would be the correct person to maintain this. This should be
> the
> person that is maintaining the driver.
Agree. This should be
Chun-Kuang Hu
Philipp Zabel
Regards,
Chun-Kuang.
>
> Regards,
> Matthias
>
> > +
> > +description: |
> > + The mediatek MDP RDMA stands for Read Direct Memory Access.
> > + It provides real time data to the back-end panel driver, such as DSI,
> > + DPI and DP_INTF.
> > + It contains one line buffer to store the sufficient pixel data.
> > + RDMA device node must be siblings to the central MMSYS_CONFIG node.
> > + For a description of the MMSYS_CONFIG binding, see
> > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for
> > details.
> > +
> > +properties:
> > + compatible:
> > +oneOf:
> > + - items:
> > + - const: mediatek,mt8195-vdo1-rdma
> > +
> > + reg:
> > +maxItems: 1
> > +
> > + interrupts:
> > +maxItems: 1
> > +
> > + power-domains:
> > +description: A phandle and PM domain specifier as defined by bindings
> > of
> > + the power controller specified by phandle. See
> > + Documentation/devicetree/bindings/power/power-domain.yaml for
> > details.
> > +
> > + clocks:
> > +items:
> > + - description: RDMA Clock
> > +
> > + iommus:
> > +description:
> > + This property should point to the respective IOMMU block with master
> > port as argument,
> > + see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for
> > details.
> > +
> > + mediatek,gce-client-reg:
> > +description:
> > + The register of display function block to be set by gce. There are 4
> > arguments,
> > + such as gce node, subsys id, offset and register size. The subsys id
> > that is
> > + mapping to the register of display function blocks is defined in the
> > gce header
> > + include/include/dt-bindings/gce/-gce.h of each chips.
> > +$ref: /schemas/types.yaml#/definitions/phandle-array
> > +maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - power-domains
> > + - clocks
> > + - iommus
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +soc {
> > +#address-cells = <2>;
> > +#size-cells = <2>;
> > +
> > +vdo1_rdma0: mdp-rdma@1c104000 {
> > +compatible = "mediatek,mt8195-vdo1-rdma";
> > +reg = <0 0x1c104000 0 0x1000>;
> > +interrupts = ;
> > +clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
> > +power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
> > +iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
> > +mediatek,gce-client-reg = <&gce0 SUBSYS_1c10 0x4000
> > 0x1000>;
> > +};
> > +};
[PATCH v5 0/6] drm/msm: rework MDSS drivers
These patches coninue work started by AngeloGioacchino Del Regno in the previous cycle by further decoupling and dissecting MDSS and MDP drivers probe/binding paths. This removes code duplication between MDP5 and DPU1 MDSS drivers, by merging them and moving to the top level. Changes since v5: - Fixed the issue with HW_REV access on MDP5 platforms - Moved "mdss"/"mdss_phys" distinction from second patch to the first one Changes since v4: - Fixed the issue with MODULE_DEVICE_TABLE reported by robot - Fixed the comments accoring to suggestions of Stephen - Removed extra goto (Stephen's suggestion) - Break long kms->dev->dev->parent chains into cleaner dpu_dev/mdp_dev and mdss_dev to document device tree bindings. Add related comments. (Stephen's suggestion) Changes since v3: - Rebased on top of current msm/msm-next - Fixed issue with enabling/disabling MDP4/MDP5 vs DSI driver (per Stephen's suggestion) - Reworked mdss_probe to remove extra platform_set_drvdata calls (per Stephen's suggestion) - Fixed a typo in the Kconfig (noted by Rob) - Added a patch to move component mastership from mdss to mdp5/dpu1 devices Changes since v2: - Rebased on top of current msm/msm-next(-staging) - Allow disabling MDP4/MDP5/DPU/HDMI components (like we do for DP and DSI) - Made mdp5_mdss_parse_clock() static - Changed mdp5 to is_mdp5 argument in several functions - Dropped boolean device data from the mdss driver - Reworked error handling in msm_pdev_probe() - Removed unused header inclusion - Dropped __init/__exit from function prototypes Changes since v1: - Rebased on top of [2] and [1] [1] https://patchwork.freedesktop.org/series/99066/ [2] https://patchwork.freedesktop.org/series/98521/ Dmitry Baryshkov (6): drm/msm: unify MDSS drivers drm/msm: remove extra indirection for msm_mdss drm/msm: split the main platform driver drm/msm: stop using device's match data pointer drm/msm: allow compile time selection of driver components drm/msm: make mdp5/dpu devices master components drivers/gpu/drm/msm/Kconfig | 50 ++- drivers/gpu/drm/msm/Makefile | 25 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 86 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 260 .../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 + drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 54 ++- .../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 + drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 57 ++- drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 drivers/gpu/drm/msm/msm_drv.c | 261 ++-- drivers/gpu/drm/msm/msm_drv.h | 61 ++- drivers/gpu/drm/msm/msm_kms.h | 21 - drivers/gpu/drm/msm/msm_mdss.c| 384 ++ 13 files changed, 661 insertions(+), 856 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c create mode 100644 drivers/gpu/drm/msm/msm_mdss.c -- 2.35.1
[PATCH v5 1/6] drm/msm: unify MDSS drivers
MDP5 and DPU1 both provide the driver handling the MDSS region, which
handles the irq domain and (incase of DPU1) adds some init for the UBWC
controller. Unify those two pieces of code into a common driver.
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile | 3 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 --
drivers/gpu/drm/msm/msm_drv.c | 4 +-
drivers/gpu/drm/msm/msm_kms.h | 3 +-
.../msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} | 156 ++-
5 files changed, 93 insertions(+), 325 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
rename drivers/gpu/drm/msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} (60%)
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e9cc7d8ac301..e76927b42033 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -42,7 +42,6 @@ msm-y := \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
disp/mdp5/mdp5_irq.o \
- disp/mdp5/mdp5_mdss.o \
disp/mdp5/mdp5_kms.o \
disp/mdp5/mdp5_pipe.o \
disp/mdp5/mdp5_mixer.o \
@@ -67,7 +66,6 @@ msm-y := \
disp/dpu1/dpu_hw_util.o \
disp/dpu1/dpu_hw_vbif.o \
disp/dpu1/dpu_kms.o \
- disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
@@ -88,6 +86,7 @@ msm-y := \
msm_gpu_devfreq.o \
msm_io_utils.o \
msm_iommu.o \
+ msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
deleted file mode 100644
index 049c6784a531..
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ /dev/null
@@ -1,252 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- */
-
-#include
-#include
-
-#include "msm_drv.h"
-#include "mdp5_kms.h"
-
-#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base)
-
-struct mdp5_mdss {
- struct msm_mdss base;
-
- void __iomem *mmio, *vbif;
-
- struct clk *ahb_clk;
- struct clk *axi_clk;
- struct clk *vsync_clk;
-
- struct {
- volatile unsigned long enabled_mask;
- struct irq_domain *domain;
- } irqcontroller;
-};
-
-static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data)
-{
- msm_writel(data, mdp5_mdss->mmio + reg);
-}
-
-static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg)
-{
- return msm_readl(mdp5_mdss->mmio + reg);
-}
-
-static irqreturn_t mdss_irq(int irq, void *arg)
-{
- struct mdp5_mdss *mdp5_mdss = arg;
- u32 intr;
-
- intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);
-
- VERB("intr=%08x", intr);
-
- while (intr) {
- irq_hw_number_t hwirq = fls(intr) - 1;
-
- generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain,
hwirq);
- intr &= ~(1 << hwirq);
- }
-
- return IRQ_HANDLED;
-}
-
-/*
- * interrupt-controller implementation, so sub-blocks (MDP/HDMI/eDP/DSI/etc)
- * can register to get their irq's delivered
- */
-
-#define VALID_IRQS (MDSS_HW_INTR_STATUS_INTR_MDP | \
- MDSS_HW_INTR_STATUS_INTR_DSI0 | \
- MDSS_HW_INTR_STATUS_INTR_DSI1 | \
- MDSS_HW_INTR_STATUS_INTR_HDMI | \
- MDSS_HW_INTR_STATUS_INTR_EDP)
-
-static void mdss_hw_mask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static void mdss_hw_unmask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static struct irq_chip mdss_hw_irq_chip = {
- .name = "mdss",
- .irq_mask = mdss_hw_mask_irq,
- .irq_unmask = mdss_hw_unmask_irq,
-};
-
-static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
-irq_hw_number_t hwirq)
-{
- struct mdp5_mdss *mdp5_mdss = d->host_data;
-
- if (!(VALID_IRQS & (1 << hwirq)))
- return -EPERM;
-
- irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, mdp5_mdss);
-
- return 0;
-}
-
-static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
- .map = mdss_hw_irqdomain_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-
-static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss)
-{
- struct device *dev = mdp5_mdss->base.dev;
-
[PATCH v5 5/6] drm/msm: allow compile time selection of driver components
MSM DRM driver already allows one to compile out the DP or DSI support. Add support for disabling other features like MDP4/MDP5/DPU drivers or direct HDMI output support. Suggested-by: Stephen Boyd Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/Kconfig | 50 +-- drivers/gpu/drm/msm/Makefile | 24 ++--- .../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 ++ .../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 ++ drivers/gpu/drm/msm/msm_drv.h | 33 drivers/gpu/drm/msm/msm_mdss.c| 13 - 6 files changed, 115 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index c79502525963..e99719067cd0 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -47,12 +47,39 @@ config DRM_MSM_GPU_SUDO Only use this if you are a driver developer. This should *not* be enabled for production kernels. If unsure, say N. -config DRM_MSM_HDMI_HDCP - bool "Enable HDMI HDCP support in MSM DRM driver" +config DRM_MSM_MDSS + bool + depends on DRM_MSM + default n + +config DRM_MSM_MDP4 + bool "Enable MDP4 support in MSM DRM driver" depends on DRM_MSM default y help - Choose this option to enable HDCP state machine + Compile in support for the Mobile Display Processor v4 (MDP4) in + the MSM DRM driver. It is the older display controller found in + devices using APQ8064/MSM8960/MSM8x60 platforms. + +config DRM_MSM_MDP5 + bool "Enable MDP5 support in MSM DRM driver" + depends on DRM_MSM + select DRM_MSM_MDSS + default y + help + Compile in support for the Mobile Display Processor v5 (MDP5) in + the MSM DRM driver. It is the display controller found in devices + using e.g. APQ8016/MSM8916/APQ8096/MSM8996/MSM8974/SDM6x0 platforms. + +config DRM_MSM_DPU + bool "Enable DPU support in MSM DRM driver" + depends on DRM_MSM + select DRM_MSM_MDSS + default y + help + Compile in support for the Display Processing Unit in + the MSM DRM driver. It is the display controller found in devices + using e.g. SDM845 and newer platforms. config DRM_MSM_DP bool "Enable DisplayPort support in MSM DRM driver" @@ -117,3 +144,20 @@ config DRM_MSM_DSI_7NM_PHY help Choose this option if DSI PHY on SM8150/SM8250/SC7280 is used on the platform. + +config DRM_MSM_HDMI + bool "Enable HDMI support in MSM DRM driver" + depends on DRM_MSM + default y + help + Compile in support for the HDMI output MSM DRM driver. It can + be a primary or a secondary display on device. Note that this is used + only for the direct HDMI output. If the device outputs HDMI data + throught some kind of DSI-to-HDMI bridge, this option can be disabled. + +config DRM_MSM_HDMI_HDCP + bool "Enable HDMI HDCP support in MSM DRM driver" + depends on DRM_MSM && DRM_MSM_HDMI + default y + help + Choose this option to enable HDCP state machine diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index e76927b42033..3dc576309255 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -16,6 +16,8 @@ msm-y := \ adreno/a6xx_gpu.o \ adreno/a6xx_gmu.o \ adreno/a6xx_hfi.o \ + +msm-$(CONFIG_DRM_MSM_HDMI) += \ hdmi/hdmi.o \ hdmi/hdmi_audio.o \ hdmi/hdmi_bridge.o \ @@ -27,9 +29,10 @@ msm-y := \ hdmi/hdmi_phy_8x60.o \ hdmi/hdmi_phy_8x74.o \ hdmi/hdmi_pll_8960.o \ - disp/mdp_format.o \ - disp/mdp_kms.o \ + +msm-$(CONFIG_DRM_MSM_MDP4) += \ disp/mdp4/mdp4_crtc.o \ + disp/mdp4/mdp4_dsi_encoder.o \ disp/mdp4/mdp4_dtv_encoder.o \ disp/mdp4/mdp4_lcdc_encoder.o \ disp/mdp4/mdp4_lvds_connector.o \ @@ -37,7 +40,10 @@ msm-y := \ disp/mdp4/mdp4_irq.o \ disp/mdp4/mdp4_kms.o \ disp/mdp4/mdp4_plane.o \ + +msm-$(CONFIG_DRM_MSM_MDP5) += \ disp/mdp5/mdp5_cfg.o \ + disp/mdp5/mdp5_cmd_encoder.o \ disp/mdp5/mdp5_ctl.o \ disp/mdp5/mdp5_crtc.o \ disp/mdp5/mdp5_encoder.o \ @@ -47,6 +53,8 @@ msm-y := \ disp/mdp5/mdp5_mixer.o \ disp/mdp5/mdp5_plane.o \ disp/mdp5/mdp5_smp.o \ + +msm-$(CONFIG_DRM_MSM_DPU) += \ disp/dpu1/dpu_core_perf.o \ disp/dpu1/dpu_crtc.o \ disp/dpu1/dpu_encoder.o \ @@ -69,6 +77,13 @@ msm-y := \ disp/dpu1/dpu_plane.o \ disp/dpu1/dpu_rm.o \ disp/dpu1/dpu_vbif.o \ + +msm-$(CONFIG_DRM_MSM_MDSS) += \ + msm_mdss.o \ + +msm-y += \ + disp/mdp_format.o \ + disp/mdp_kms.o \ disp/msm_disp_snapshot.o \ disp/msm_disp_snapshot_util.o \ msm_atomic.o \ @
[PATCH v5 4/6] drm/msm: stop using device's match data pointer
Let's make the match's data pointer a (sub-)driver's private data. The
only user currently is the msm_drm_init() function, using this data to
select kms_init callback. Pass this callback through the driver's
private data instead.
Reviewed-by: Stephen Boyd
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 ---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 14 +
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ---
drivers/gpu/drm/msm/msm_drv.c| 38 ++--
drivers/gpu/drm/msm/msm_drv.h| 5 +---
drivers/gpu/drm/msm/msm_kms.h| 4 ---
drivers/gpu/drm/msm/msm_mdss.c | 29 +++---
7 files changed, 42 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..38627ccf3068 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1172,7 +1172,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-struct msm_kms *dpu_kms_init(struct drm_device *dev)
+static int dpu_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
@@ -1180,7 +1180,7 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
if (!dev) {
DPU_ERROR("drm device node invalid\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
priv = dev->dev_private;
@@ -1189,11 +1189,11 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
if (irq < 0) {
DPU_ERROR("failed to get irq: %d\n", irq);
- return ERR_PTR(irq);
+ return irq;
}
dpu_kms->base.irq = irq;
- return &dpu_kms->base;
+ return 0;
}
static int dpu_bind(struct device *dev, struct device *master, void *data)
@@ -1204,6 +1204,8 @@ static int dpu_bind(struct device *dev, struct device
*master, void *data)
struct dpu_kms *dpu_kms;
int ret = 0;
+ priv->kms_init = dpu_kms_init;
+
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 5dc839184aef..1a14f1d3cdf7 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -389,7 +389,7 @@ static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev)
+static int mdp4_kms_init(struct drm_device *dev)
{
struct platform_device *pdev = to_platform_device(dev->dev);
struct mdp4_platform_config *config = mdp4_get_config(pdev);
@@ -403,8 +403,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
if (!mdp4_kms) {
DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
- ret = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
@@ -551,12 +550,13 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
dev->mode_config.max_width = 2048;
dev->mode_config.max_height = 2048;
- return kms;
+ return 0;
fail:
if (kms)
mdp4_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static struct mdp4_platform_config *mdp4_get_config(struct platform_device
*dev)
@@ -583,6 +583,8 @@ static int mdp4_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ priv->kms_init = mdp4_kms_init;
+
platform_set_drvdata(pdev, priv);
/*
@@ -600,7 +602,7 @@ static int mdp4_remove(struct platform_device *pdev)
}
static const struct of_device_id mdp4_dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { .compatible = "qcom,mdp4" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mdp4_dt_match);
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 3b92372e7bdf..0c78608832c3 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -544,7 +544,7 @@ static int get_clk(struct platform_device *pdev, struct clk
**clkp,
return 0;
}
-struct msm_kms *mdp5_kms_init(struct drm_device *dev)
+static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
struct platform_device *pdev;
@@ -558,7 +558,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
/* priv->kms would have been populated by the MDP5 driver */
kms =
[PATCH v5 2/6] drm/msm: remove extra indirection for msm_mdss
Since now there is just one mdss subdriver, drop all the indirection,
make msm_mdss struct completely opaque (and defined inside msm_mdss.c)
and call mdss functions directly.
Reviewed-by: Abhinav Kumar
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 29 ---
drivers/gpu/drm/msm/msm_kms.h | 16 ++--
drivers/gpu/drm/msm/msm_mdss.c | 140 +++--
3 files changed, 83 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 82b662812d72..4877d4c90465 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -980,8 +980,8 @@ static int __maybe_unused msm_runtime_suspend(struct device
*dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->disable(mdss);
+ if (mdss)
+ return msm_mdss_disable(mdss);
return 0;
}
@@ -993,8 +993,8 @@ static int __maybe_unused msm_runtime_resume(struct device
*dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->enable(mdss);
+ if (mdss)
+ return msm_mdss_enable(mdss);
return 0;
}
@@ -1220,6 +1220,7 @@ static const struct component_master_ops msm_drm_ops = {
static int msm_pdev_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
+ struct msm_mdss *mdss;
struct msm_drm_private *priv;
int ret;
@@ -1231,20 +1232,22 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = msm_mdss_init(pdev, true);
+ mdss = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = msm_mdss_init(pdev, false);
+ mdss = msm_mdss_init(pdev, false);
break;
default:
- ret = 0;
+ mdss = NULL;
break;
}
- if (ret) {
- platform_set_drvdata(pdev, NULL);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
return ret;
}
+ priv->mdss = mdss;
+
if (get_mdp_ver(pdev)) {
ret = add_display_components(pdev, &match);
if (ret)
@@ -1271,8 +1274,8 @@ static int msm_pdev_probe(struct platform_device *pdev)
fail:
of_platform_depopulate(&pdev->dev);
- if (priv->mdss && priv->mdss->funcs)
- priv->mdss->funcs->destroy(priv->mdss);
+ if (priv->mdss)
+ msm_mdss_destroy(priv->mdss);
return ret;
}
@@ -1285,8 +1288,8 @@ static int msm_pdev_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
- if (mdss && mdss->funcs)
- mdss->funcs->destroy(mdss);
+ if (mdss)
+ msm_mdss_destroy(mdss);
return 0;
}
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 10d5ae3e76df..09c21994 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,18 +201,12 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss_funcs {
- int (*enable)(struct msm_mdss *mdss);
- int (*disable)(struct msm_mdss *mdss);
- void (*destroy)(struct msm_mdss *mdss);
-};
-
-struct msm_mdss {
- struct device *dev;
- const struct msm_mdss_funcs *funcs;
-};
+struct msm_mdss;
-int msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+int msm_mdss_enable(struct msm_mdss *mdss);
+int msm_mdss_disable(struct msm_mdss *mdss);
+void msm_mdss_destroy(struct msm_mdss *mdss);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index f4f92c11bf14..60c90a382b54 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -3,19 +3,16 @@
* Copyright (c) 2018, The Linux Foundation
*/
+#include
#include
#include
#include
#include
-
-#include "msm_drv.h"
-#include "msm_kms.h"
+#include
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
-#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
-
#define HW_REV 0x0
#define HW_INTR_STATUS 0x0010
@@ -23,8 +20,9 @@
#define UBWC_CTRL_20x150
#define UBWC_PREDICTION_MODE 0x154
-struct dpu_mdss {
- struct msm_mdss base;
+struct msm_mdss {
+ struct device *dev;
+
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
@@ -37,22 +35,22 @@ struct dpu_mdss {
static void msm_mdss_irq(st
[PATCH v5 6/6] drm/msm: make mdp5/dpu devices master components
The msm_mdss serves several roles at this moment. It provides IRQ domain
used by MDP5 and DPU drivers but it also serves as a component master
for both those usecases. MDP4 (which does not have separate MDSS device)
is the component master on it's own.
Remove this assymmetry and make both MDP5 and DPU component masters too.
This removes a need to care about drm/components from msm_mdss driver,
removes an mdss pointer from struct msm_drm_private and simplifies the
interface between mdp5/dpu and msm_drv.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 88 ++--
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 16 +
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 50 +-
drivers/gpu/drm/msm/msm_drv.c| 32 -
drivers/gpu/drm/msm/msm_drv.h| 6 +-
drivers/gpu/drm/msm/msm_kms.h| 3 -
drivers/gpu/drm/msm/msm_mdss.c | 67 +++---
7 files changed, 79 insertions(+), 183 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 38627ccf3068..7672e1d28665 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -380,9 +380,13 @@ static int dpu_kms_parse_data_bus_icc_path(struct dpu_kms
*dpu_kms)
struct icc_path *path0;
struct icc_path *path1;
struct drm_device *dev = dpu_kms->dev;
+ struct device *dpu_dev = dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
- path0 = of_icc_get(dev->dev, "mdp0-mem");
- path1 = of_icc_get(dev->dev, "mdp1-mem");
+ /* Interconnects are a part of MDSS device tree binding, not the
+* MDP/DPU device. */
+ path0 = of_icc_get(mdss_dev, "mdp0-mem");
+ path1 = of_icc_get(mdss_dev, "mdp1-mem");
if (IS_ERR_OR_NULL(path0))
return PTR_ERR_OR_ZERO(path0);
@@ -837,6 +841,9 @@ static void dpu_kms_destroy(struct msm_kms *kms)
_dpu_kms_hw_destroy(dpu_kms);
msm_kms_destroy(&dpu_kms->base);
+
+ if (dpu_kms->rpm_enabled)
+ pm_runtime_disable(&dpu_kms->pdev->dev);
}
static irqreturn_t dpu_irq(struct msm_kms *kms)
@@ -973,12 +980,16 @@ static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms)
struct iommu_domain *domain;
struct msm_gem_address_space *aspace;
struct msm_mmu *mmu;
+ struct device *dpu_dev = dpu_kms->dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
domain = iommu_domain_alloc(&platform_bus_type);
if (!domain)
return 0;
- mmu = msm_iommu_new(dpu_kms->dev->dev, domain);
+ /* IOMMUs are a part of MDSS device tree binding, not the
+* MDP/DPU device. */
+ mmu = msm_iommu_new(mdss_dev, domain);
if (IS_ERR(mmu)) {
iommu_domain_free(domain);
return PTR_ERR(mmu);
@@ -1172,40 +1183,15 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-static int dpu_kms_init(struct drm_device *dev)
-{
- struct msm_drm_private *priv;
- struct dpu_kms *dpu_kms;
- int irq;
-
- if (!dev) {
- DPU_ERROR("drm device node invalid\n");
- return -EINVAL;
- }
-
- priv = dev->dev_private;
- dpu_kms = to_dpu_kms(priv->kms);
-
- irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
- if (irq < 0) {
- DPU_ERROR("failed to get irq: %d\n", irq);
- return irq;
- }
- dpu_kms->base.irq = irq;
-
- return 0;
-}
-
-static int dpu_bind(struct device *dev, struct device *master, void *data)
+static int dpu_kms_init(struct drm_device *ddev)
{
- struct msm_drm_private *priv = dev_get_drvdata(master);
+ struct msm_drm_private *priv = ddev->dev_private;
+ struct device *dev = ddev->dev;
struct platform_device *pdev = to_platform_device(dev);
- struct drm_device *ddev = priv->dev;
struct dpu_kms *dpu_kms;
+ int irq;
int ret = 0;
- priv->kms_init = dpu_kms_init;
-
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
@@ -1227,8 +1213,6 @@ static int dpu_bind(struct device *dev, struct device
*master, void *data)
}
dpu_kms->num_clocks = ret;
- platform_set_drvdata(pdev, dpu_kms);
-
ret = msm_kms_init(&dpu_kms->base, &kms_funcs);
if (ret) {
DPU_ERROR("failed to init kms, ret=%d\n", ret);
@@ -1242,31 +1226,25 @@ static int dpu_bind(struct device *dev, struct device
*master, void *data)
priv->kms = &dpu_kms->base;
- return ret;
-}
-
-static void dpu_unbind(struct device *dev, struct device *master, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ irq = irq_of_par
[PATCH v5 3/6] drm/msm: split the main platform driver
Currently the msm platform driver is a multiplex handling several cases:
- headless GPU-only driver,
- MDP4 with flat device nodes,
- MDP5/DPU MDSS with all the nodes being children of MDSS node.
This results in not-so-perfect code, checking the hardware version
(MDP4/MDP5/DPU) in several places, checking for mdss even when it can
not exist, etc. Split the code into three handling subdrivers (mdp4,
mdss and headless msm).
Reviewed-by: Abhinav Kumar
Reported-by: kernel test robot
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 56 ++
drivers/gpu/drm/msm/msm_drv.c| 228 ---
drivers/gpu/drm/msm/msm_drv.h| 27 ++-
drivers/gpu/drm/msm/msm_kms.h| 7 -
drivers/gpu/drm/msm/msm_mdss.c | 175 -
5 files changed, 288 insertions(+), 205 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 3cf476c55158..5dc839184aef 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -569,3 +569,59 @@ static struct mdp4_platform_config *mdp4_get_config(struct
platform_device *dev)
return &config;
}
+
+static const struct dev_pm_ops mdp4_pm_ops = {
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int mdp4_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ /*
+* on MDP4 based platforms, the MDP platform device is the component
+* that adds other display interface components to itself.
+*/
+ return msm_drv_probe(&pdev->dev, &pdev->dev);
+}
+
+static int mdp4_remove(struct platform_device *pdev)
+{
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
+ return 0;
+}
+
+static const struct of_device_id mdp4_dt_match[] = {
+ { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mdp4_dt_match);
+
+static struct platform_driver mdp4_platform_driver = {
+ .probe = mdp4_probe,
+ .remove = mdp4_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "mdp4",
+ .of_match_table = mdp4_dt_match,
+ .pm = &mdp4_pm_ops,
+ },
+};
+
+void __init msm_mdp4_register(void)
+{
+ platform_driver_register(&mdp4_platform_driver);
+}
+
+void __exit msm_mdp4_unregister(void)
+{
+ platform_driver_unregister(&mdp4_platform_driver);
+}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4877d4c90465..8bcc86685f2d 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -256,10 +256,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
static int get_mdp_ver(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -973,50 +969,7 @@ static const struct drm_driver msm_driver = {
.patchlevel = MSM_VERSION_PATCHLEVEL,
};
-static int __maybe_unused msm_runtime_suspend(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_disable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_runtime_resume(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_enable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_pm_suspend(struct device *dev)
-{
-
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_suspend(dev);
-}
-
-static int __maybe_unused msm_pm_resume(struct device *dev)
-{
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_resume(dev);
-}
-
-static int __maybe_unused msm_pm_prepare(struct device *dev)
+int msm_pm_prepare(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1027,7 +980,7 @@ static int __maybe_unused msm_pm_prepare(struct device
*dev)
return drm_mode_config_helper_suspend(ddev);
}
-static void __maybe_unused msm_pm_complete(struct device *dev)
+void msm_pm_complete(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1039,8 +992,6 @@ static void __maybe_unused msm_pm_complete(struct device
*dev)
}
static const struct dev_pm_ops msm_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OP
Re: [PATCH] drm/msm/mdp5: Eliminate useless code
On 19/04/2022 09:16, Haowen Bai wrote: Since mdp5_state is initialized twice at the same time, so we make code simple and easy to understand by delete one. Signed-off-by: Haowen Bai Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c index 428f88b786f9..406c34e9f3f8 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c @@ -386,8 +386,6 @@ static int mdp5_plane_atomic_async_check(struct drm_plane *plane, if (!crtc_state->active) return -EINVAL; - mdp5_state = to_mdp5_plane_state(new_plane_state); - /* don't use fast path if we don't have a hwpipe allocated yet */ if (!mdp5_state->hwpipe) return -EINVAL; -- With best wishes Dmitry
Re: [PATCH] drm: bridge: adv7511: Enable DRM_BRIDGE_OP_HPD based on HPD interrupt
On Tue, 19 Apr 2022 at 16:25, Biju Das wrote: > > Connector detection using poll method won't work in case of bridge > attached to the encoder with the flag DRM_BRIDGE_ATTACH_NO_CONNECTOR, as > the code defaults to HPD. > > Enable DRM_BRIDGE_OP_HPD based on HPD interrupt availability, so that > it will fall back to polling, if HPD is not available. > > Signed-off-by: Biju Das > --- > drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > index 668dcefbae17..b3f10c54e064 100644 > --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > @@ -1292,8 +1292,10 @@ static int adv7511_probe(struct i2c_client *i2c, const > struct i2c_device_id *id) > goto err_unregister_cec; > > adv7511->bridge.funcs = &adv7511_bridge_funcs; > - adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID > - | DRM_BRIDGE_OP_HPD; > + adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; > + if (adv7511->i2c_main->irq) > + adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD; > + > adv7511->bridge.of_node = dev->of_node; > adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA; > Reviewed-by: Robert Foss Applied to drm-misc-next
Re: [PATCH] drm: bridge: panel: Register connector if DRM device is already registered
On Tue, 19 Apr 2022 at 11:41, Jagan Teki wrote:
>
> On Tue, Apr 19, 2022 at 2:44 PM Marek Szyprowski
> wrote:
> >
> > If panel_bridge_attach() happens after DRM device registration, the
> > created connector will not be registered by the DRM core anymore. Fix
> > this by registering it explicitely in such case.
> >
> > This fixes the following issue observed on Samsung Exynos4210-based Trats
> > board with a DSI panel (the panel driver is registed after the Exynos DRM
> > component device is bound):
> >
> > $ ./modetest -c -Mexynos
> > could not get connector 56: No such file or directory
> > Segmentation fault
> >
> > While touching this, move the connector reset() call also under the DRM
> > device registered check, because otherwise it is not really needed.
> >
> > Fixes: 934aef885f9d ("drm: bridge: panel: Reset the connector state
> > pointer")
> > Signed-off-by: Marek Szyprowski
> > ---
> > Here is a bit more backgroud on this issue is available in this thread:
> > https://lore.kernel.org/all/f0474a95-4ba3-a74f-d7de-ef7aab12b...@samsung.com/
> > ---
> > drivers/gpu/drm/bridge/panel.c | 7 +--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c
> > index ff1c37b2e6e5..0ee563eb2b6f 100644
> > --- a/drivers/gpu/drm/bridge/panel.c
> > +++ b/drivers/gpu/drm/bridge/panel.c
> > @@ -83,8 +83,11 @@ static int panel_bridge_attach(struct drm_bridge *bridge,
> > drm_connector_attach_encoder(&panel_bridge->connector,
> > bridge->encoder);
> >
> > - if (connector->funcs->reset)
> > - connector->funcs->reset(connector);
> > + if (bridge->dev->registered) {
> > + if (connector->funcs->reset)
> > + connector->funcs->reset(connector);
> > + drm_connector_register(connector);
> > + }
>
> Reviewed-by: Jagan Teki
Fixed typos in commit message.
Reviewed-by: Robert Foss
Applied to drm-misc-next
Re: [PATCH] drm: bridge: adv7511: Enable DRM_BRIDGE_OP_HPD based on HPD interrupt
Hi Biju, Thank you for the patch. On Tue, Apr 19, 2022 at 03:24:53PM +0100, Biju Das wrote: > Connector detection using poll method won't work in case of bridge > attached to the encoder with the flag DRM_BRIDGE_ATTACH_NO_CONNECTOR, as > the code defaults to HPD. > > Enable DRM_BRIDGE_OP_HPD based on HPD interrupt availability, so that > it will fall back to polling, if HPD is not available. > > Signed-off-by: Biju Das Reviewed-by: Laurent Pinchart > --- > drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > index 668dcefbae17..b3f10c54e064 100644 > --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c > @@ -1292,8 +1292,10 @@ static int adv7511_probe(struct i2c_client *i2c, const > struct i2c_device_id *id) > goto err_unregister_cec; > > adv7511->bridge.funcs = &adv7511_bridge_funcs; > - adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID > - | DRM_BRIDGE_OP_HPD; > + adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; > + if (adv7511->i2c_main->irq) > + adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD; > + > adv7511->bridge.of_node = dev->of_node; > adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA; > -- Regards, Laurent Pinchart
[PATCH v2 1/3] drm/msm/dpu: index dpu_kms->hw_vbif using vbif_idx
Remove loops over hw_vbif. Instead always VBIF's idx as an index in the
array. This fixes an error in dpu_kms_hw_init(), where we fill
dpu_kms->hw_vbif[i], but check for an error pointer at
dpu_kms->hw_vbif[vbif_idx].
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 29 +++-
2 files changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..aadf032a190b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -790,11 +790,9 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
_dpu_kms_mmu_destroy(dpu_kms);
if (dpu_kms->catalog) {
- for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
- u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
-
- if ((vbif_idx < VBIF_MAX) && dpu_kms->hw_vbif[vbif_idx])
- dpu_hw_vbif_destroy(dpu_kms->hw_vbif[vbif_idx]);
+ for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
+ if (dpu_kms->hw_vbif[i])
+ dpu_hw_vbif_destroy(dpu_kms->hw_vbif[i]);
}
}
@@ -1102,7 +1100,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
- dpu_kms->hw_vbif[i] = dpu_hw_vbif_init(vbif_idx,
+ dpu_kms->hw_vbif[vbif_idx] = dpu_hw_vbif_init(vbif_idx,
dpu_kms->vbif[vbif_idx], dpu_kms->catalog);
if (IS_ERR_OR_NULL(dpu_kms->hw_vbif[vbif_idx])) {
rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
index 21d20373eb8b..a18fb649301c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
@@ -11,6 +11,14 @@
#include "dpu_hw_vbif.h"
#include "dpu_trace.h"
+static struct dpu_hw_vbif *dpu_get_vbif(struct dpu_kms *dpu_kms, enum dpu_vbif
vbif_idx)
+{
+ if (vbif_idx < ARRAY_SIZE(dpu_kms->hw_vbif))
+ return dpu_kms->hw_vbif[vbif_idx];
+
+ return NULL;
+}
+
/**
* _dpu_vbif_wait_for_xin_halt - wait for the xin to halt
* @vbif: Pointer to hardware vbif driver
@@ -148,20 +156,15 @@ static u32 _dpu_vbif_get_ot_limit(struct dpu_hw_vbif
*vbif,
void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
struct dpu_vbif_set_ot_params *params)
{
- struct dpu_hw_vbif *vbif = NULL;
+ struct dpu_hw_vbif *vbif;
struct dpu_hw_mdp *mdp;
bool forced_on = false;
u32 ot_lim;
- int ret, i;
+ int ret;
mdp = dpu_kms->hw_mdp;
- for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
- if (dpu_kms->hw_vbif[i] &&
- dpu_kms->hw_vbif[i]->idx == params->vbif_idx)
- vbif = dpu_kms->hw_vbif[i];
- }
-
+ vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
if (!vbif || !mdp) {
DRM_DEBUG_ATOMIC("invalid arguments vbif %d mdp %d\n",
vbif != NULL, mdp != NULL);
@@ -204,7 +207,7 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms,
void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
struct dpu_vbif_set_qos_params *params)
{
- struct dpu_hw_vbif *vbif = NULL;
+ struct dpu_hw_vbif *vbif;
struct dpu_hw_mdp *mdp;
bool forced_on = false;
const struct dpu_vbif_qos_tbl *qos_tbl;
@@ -216,13 +219,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
}
mdp = dpu_kms->hw_mdp;
- for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) {
- if (dpu_kms->hw_vbif[i] &&
- dpu_kms->hw_vbif[i]->idx == params->vbif_idx) {
- vbif = dpu_kms->hw_vbif[i];
- break;
- }
- }
+ vbif = dpu_get_vbif(dpu_kms, params->vbif_idx);
if (!vbif || !vbif->cap) {
DPU_ERROR("invalid vbif %d\n", params->vbif_idx);
--
2.35.1
[PATCH v2 0/3] Simplify VBIF handling
As suggested by Abhinav, rework VBIF handling, simplifying the code. Changes since v1: - Fix array index comparison in patch 1 (as noted by Abhinav) Dmitry Baryshkov (3): drm/msm/dpu: index dpu_kms->hw_vbif using vbif_idx drm/msm/dpu: fix error handling around dpu_hw_vbif_init drm/msm/dpu: drop VBIF indices .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 6 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 14 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 65 +++ 4 files changed, 46 insertions(+), 43 deletions(-) -- 2.35.1
[PATCH v2 3/3] drm/msm/dpu: drop VBIF indices
We do not expect to have other VBIFs. Drop VBIF_n indices and always use
VBIF_RT and VBIF_NRT.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 4 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 6 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 36 ---
3 files changed, 28 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index a4fe77cddfea..32a05db92f8b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -1205,7 +1205,7 @@ static const struct dpu_vbif_dynamic_ot_cfg
msm8998_ot_rdwr_cfg[] = {
static const struct dpu_vbif_cfg msm8998_vbif[] = {
{
- .name = "vbif_0", .id = VBIF_0,
+ .name = "vbif_rt", .id = VBIF_RT,
.base = 0, .len = 0x1040,
.default_ot_rd_limit = 32,
.default_ot_wr_limit = 32,
@@ -1234,7 +1234,7 @@ static const struct dpu_vbif_cfg msm8998_vbif[] = {
static const struct dpu_vbif_cfg sdm845_vbif[] = {
{
- .name = "vbif_0", .id = VBIF_0,
+ .name = "vbif_rt", .id = VBIF_RT,
.base = 0, .len = 0x1040,
.features = BIT(DPU_VBIF_QOS_REMAP),
.xin_halt_timeout = 0x4000,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index bb9ceadeb0bb..598c201ae50d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -254,11 +254,9 @@ enum dpu_wd_timer {
};
enum dpu_vbif {
- VBIF_0,
- VBIF_1,
+ VBIF_RT,
+ VBIF_NRT,
VBIF_MAX,
- VBIF_RT = VBIF_0,
- VBIF_NRT = VBIF_1
};
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
index a18fb649301c..1305e250b71e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c
@@ -19,6 +19,18 @@ static struct dpu_hw_vbif *dpu_get_vbif(struct dpu_kms
*dpu_kms, enum dpu_vbif v
return NULL;
}
+static const char *dpu_vbif_name(enum dpu_vbif idx)
+{
+ switch (idx) {
+ case VBIF_RT:
+ return "VBIF_RT";
+ case VBIF_NRT:
+ return "VBIF_NRT";
+ default:
+ return "??";
+ }
+}
+
/**
* _dpu_vbif_wait_for_xin_halt - wait for the xin to halt
* @vbif: Pointer to hardware vbif driver
@@ -50,12 +62,12 @@ static int _dpu_vbif_wait_for_xin_halt(struct dpu_hw_vbif
*vbif, u32 xin_id)
if (!status) {
rc = -ETIMEDOUT;
- DPU_ERROR("VBIF %d client %d not halting. TIMEDOUT.\n",
- vbif->idx - VBIF_0, xin_id);
+ DPU_ERROR("%s client %d not halting. TIMEDOUT.\n",
+ dpu_vbif_name(vbif->idx), xin_id);
} else {
rc = 0;
- DRM_DEBUG_ATOMIC("VBIF %d client %d is halted\n",
- vbif->idx - VBIF_0, xin_id);
+ DRM_DEBUG_ATOMIC("%s client %d is halted\n",
+ dpu_vbif_name(vbif->idx), xin_id);
}
return rc;
@@ -95,8 +107,8 @@ static void _dpu_vbif_apply_dynamic_ot_limit(struct
dpu_hw_vbif *vbif,
}
}
- DRM_DEBUG_ATOMIC("vbif:%d xin:%d w:%d h:%d fps:%d pps:%llu ot:%u\n",
- vbif->idx - VBIF_0, params->xin_id,
+ DRM_DEBUG_ATOMIC("%s xin:%d w:%d h:%d fps:%d pps:%llu ot:%u\n",
+ dpu_vbif_name(vbif->idx), params->xin_id,
params->width, params->height, params->frame_rate,
pps, *ot_lim);
}
@@ -141,8 +153,8 @@ static u32 _dpu_vbif_get_ot_limit(struct dpu_hw_vbif *vbif,
}
exit:
- DRM_DEBUG_ATOMIC("vbif:%d xin:%d ot_lim:%d\n",
- vbif->idx - VBIF_0, params->xin_id, ot_lim);
+ DRM_DEBUG_ATOMIC("%s xin:%d ot_lim:%d\n",
+ dpu_vbif_name(vbif->idx), params->xin_id, ot_lim);
return ot_lim;
}
@@ -242,8 +254,8 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms,
forced_on = mdp->ops.setup_clk_force_ctrl(mdp, params->clk_ctrl, true);
for (i = 0; i < qos_tbl->npriority_lvl; i++) {
- DRM_DEBUG_ATOMIC("vbif:%d xin:%d lvl:%d/%d\n",
- params->vbif_idx, params->xin_id, i,
+ DRM_DEBUG_ATOMIC("%s xin:%d lvl:%d/%d\n",
+ dpu_vbif_name(params->vbif_idx),
params->xin_id, i,
qos_tbl->priority_lvl[i]);
vbif->ops.set_qos_remap(vbif, params->xin_id, i,
qos_tbl->priority_lvl[i]);
@@ -263,8 +275,8 @@ void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms)
if (vbif && vbif->ops.clear_errors) {
vbif->ops.clear_errors(vbif
[PATCH v2 2/3] drm/msm/dpu: fix error handling around dpu_hw_vbif_init
Using IS_ERR_OR_NULL() together with PTR_ERR() is a typical mistake. If
the value is NULL, then the function will return 0 instead of a proper
return code. Moreover dpu_hw_vbif_init() function can not return NULL.
So, replace corresponding IS_ERR_OR_NULL() call with IS_ERR().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index aadf032a190b..d38c55f9f003 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1102,10 +1102,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
dpu_kms->hw_vbif[vbif_idx] = dpu_hw_vbif_init(vbif_idx,
dpu_kms->vbif[vbif_idx], dpu_kms->catalog);
- if (IS_ERR_OR_NULL(dpu_kms->hw_vbif[vbif_idx])) {
+ if (IS_ERR(dpu_kms->hw_vbif[vbif_idx])) {
rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]);
- if (!dpu_kms->hw_vbif[vbif_idx])
- rc = -EINVAL;
DPU_ERROR("failed to init vbif %d: %d\n", vbif_idx, rc);
dpu_kms->hw_vbif[vbif_idx] = NULL;
goto power_error;
--
2.35.1
Re: [PATCH v5 3/5] drm/msm/dp: set stream_pixel rate directly
On 08/03/2022 23:46, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-03-03 23:58:58)
On Fri, 4 Mar 2022 at 07:31, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-03-03 20:23:06)
On Fri, 4 Mar 2022 at 01:32, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-02-16 21:55:27)
The only clock for which we set the rate is the "stream_pixel". Rather
than storing the rate and then setting it by looping over all the
clocks, set the clock rate directly.
Signed-off-by: Dmitry Baryshkov
[...]
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 07f6bf7e1acb..8e6361dedd77 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1315,7 +1315,7 @@ static void dp_ctrl_set_clock_rate(struct dp_ctrl_private
*ctrl,
DRM_DEBUG_DP("setting rate=%lu on clk=%s\n", rate, name);
if (num)
- cfg->rate = rate;
+ clk_set_rate(cfg->clk, rate);
This looks bad. From what I can tell we set the rate of the pixel clk
after enabling the phy and configuring it. See the order of operations
in dp_ctrl_enable_mainlink_clocks() and note how dp_power_clk_enable()
is the one that eventually sets a rate through dp_power_clk_set_rate()
dp_ctrl_set_clock_rate(ctrl, DP_CTRL_PM, "ctrl_link",
ctrl->link->link_params.rate * 1000);
phy_configure(phy, &dp_io->phy_opts);
phy_power_on(phy);
ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, true);
This code has been changed in the previous patch.
Let's get back a bit.
Currently dp_ctrl_set_clock_rate() doesn't change the clock rate. It
just stores the rate in the config so that later the sequence of
dp_power_clk_enable() -> dp_power_clk_set_rate() ->
[dp_power_clk_set_link_rate() -> dev_pm_opp_set_rate() or
msm_dss_clk_set_rate() -> clk_set_rate()] will use that.
There are only two users of dp_ctrl_set_clock_rate():
- dp_ctrl_enable_mainlink_clocks(), which you have quoted above.
This case is handled in the patch 1 from this series. It makes
Patch 1 form this series says DP is unaffected. Huh?
dp_ctrl_enable_mainlink_clocks() call dev_pm_opp_set_rate() directly
without storing (!) the rate in the config, calling
phy_configure()/phy_power_on() and then setting the opp via the
sequence of calls specified above
Note, this handles the "ctrl_link" clock.
- dp_ctrl_enable_stream_clocks(), which calls dp_power_clk_enable()
immediately afterwards. This call would set the stream_pixel rate
while enabling stream clocks. As far as I can see, the stream_pixel is
the only stream clock. So this patch sets the clock rate without
storing in the interim configuration data.
Could you please clarify, what exactly looks bad to you?
Note, this handles the "stream_pixel" clock.
I'm concerned about the order of operations changing between the
phy being powered on and the pixel clk frequency being set. From what I
recall the pixel clk rate operations depend on the phy frequency being
set (which is done through phy_configure?) so if we call clk_set_rate()
on the pixel clk before the phy is set then the clk frequency will be
calculated badly and probably be incorrect.
But the order of operations is mostly unchanged. The only major change
is that the opp point is now set before calling the
phy_configure()/phy_power_on()
Yes that's my concern. The qmp phy driver has a couple clk_set_rate()
calls in the .configure_dp_phy callback. That is called from
phy_power_on() (see qcom_qmp_phy_power_on() and qcom_qmp_phy_dp_ops).
Looking at qcom_qmp_v3_phy_configure_dp_phy() it does
clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 10);
clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq);
and I believe the child of dp_pixel_hw is find_clock("stream_pixel").
Looks like that is DISP_CC_MDSS_DP_PIXEL_CLK which is
disp_cc_mdss_dp_pixel_clk_src for the rate settable part. That has
clk_dp_ops which is clk_rcg2_dp_set_rate() for the set rate part. That
wants the parent clk frequency to be something non-zero to use in
rational_best_approximation(). If the clk_set_rate("stream_pixel") call
is made before phy_power_on() then the parent_rate in
clk_rcg2_dp_set_rate() won't be valid and the pixel clk frequency will
be wrong.
Please excuse me, I didn't have time for this patchset up to now.
I double checked the previous patch (drm/msm/dp: "inline"
dp_ctrl_set_clock_rate("ctrl_link")). Note, that the OPP is set _after_
the PHY is powered on and configured.
Does that cover your concerns?
--
With best wishes
Dmitry
Re: [PATCH v2 1/2] dt-bindings: lcdif: Add compatible for i.MX8MP
On Sun, 17 Apr 2022 03:45:49 +0200, Marek Vasut wrote: > Add compatible string for i.MX8MP LCDIF variant. This is called LCDIFv3 > and is completely different from the LCDIFv3 found in i.MX23 in that it > has a completely scrambled register layout compared to all previous LCDIF > variants. The new LCDIFv3 also supports 36bit address space. However, > except for the complete bit reshuffling, this is still LCDIF and it still > works like one. > > Signed-off-by: Marek Vasut > Cc: Alexander Stein > Cc: Laurent Pinchart > Cc: Lucas Stach > Cc: Peng Fan > Cc: Rob Herring > Cc: Robby Cai > Cc: Sam Ravnborg > Cc: Stefan Agner > Cc: devicet...@vger.kernel.org > --- > V2: No change > --- > Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 1 + > 1 file changed, 1 insertion(+) > Please add Acked-by/Reviewed-by tags when posting new versions. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for acks received on the version they apply. If a tag was not added on purpose, please state why and what changed.
[PATCH v2 00/48] ARM: PXA multiplatform support
From: Arnd Bergmann
This revisits a series I sent a few years ago:
https://lore.kernel.org/lkml/20191018154052.1276506-1-a...@arndb.de/
All the other ARMv5 conversions are under way now, with
OMAP1 being the only one still not in linux-next yet,
and PXA completing the set.
Most of the patches are unchanged from before, furtunately
the PXA code is fairly stable. I addressed Robert's comments,
pulled in two patches from Dmitry, and added the last a the
final four patches to finish off the multiplatform conversion.
I hope someone is left to test these on PXA: if this works,
I'd like to merge it for 5.19. A git tree with these is avaialable
for testing at
https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/log/?h=pxa-multiplatform-5.18
Arnd
Arnd Bergmann (46):
ARM: pxa: split mach/generic.h
ARM: pxa: make mainstone.h private
ARM: pxa: make mach/regs-uart.h private
ARM: pxa: remove mach/dma.h
ARM: pxa: split up mach/hardware.h
ARM: pxa: stop using mach/bitfield.h
ARM: pxa: move mach/sound.h to linux/platform_data/
ARM: pxa: move regs-lcd.h into driver
watchdog: sa1100: use platform device registration
ARM: pxa: pxa2xx-ac97-lib: use IRQ resource
ARM: pxa: move pcmcia board data into mach-pxa
ARM: pxa: make addr-map.h header local
ARM: pxa: use pdev resource for palmld mmio
ARM: pxa: maybe fix gpio lookup tables
ARM: pxa: tosa: use gpio descriptor for audio
ARM: pxa: poodle: use platform data for poodle asoc driver
ARM: pxa: corgi: use gpio descriptors for audio
ARM: pxa: hx4700: use gpio descriptors for audio
ARM: pxa: lubbock: pass udc irqs as resource
ARM: pxa: spitz: use gpio descriptors for audio
ARM: pxa: eseries: use gpio lookup for audio
ARM: pxa: z2: use gpio lookup for audio device
ARM: pxa: magician: use platform driver for audio
ARM: pxa: mainstone-wm97xx: use gpio lookup table
ARM: pxa: zylonite: use gpio lookup instead mfp header
input: touchscreen: mainstone: fix pxa2xx+pxa3xx configuration
input: touchscreen: mainstone: sync with zylonite driver
Input: touchscreen: use wrapper for pxa2xx ac97 registers
ASoC: pxa: use pdev resource for FIFO regs
ASoC: pxa: ac97: use normal MMIO accessors
ASoC: pxa: i2s: use normal MMIO accessors
ARM: pxa: pcmcia: move smemc configuration back to arch
ARM: pxa: remove get_clk_frequency_khz()
cpufreq: pxa3: move clk register access to clk driver
ARM: pxa: move smemc register access from clk to platform
ARM: pxa: move clk register definitions to driver
power: tosa: simplify probe function
ARM: pxa: tosa: use gpio lookup for battery
ARM: pxa: remove unused mach/bitfield.h
ARM: mmp: remove tavorevb board support
ARM: mmp: rename pxa_register_device
ARM: pxa: move plat-pxa to drivers/soc/
ARM: PXA: fix multi-cpu build of xsc3
ARM: pxa: move mach/*.h to mach-pxa/
ARM: pxa: remove support for MTD_XIP
ARM: pxa: convert to multiplatform
Dmitry Torokhov (2):
Input: wm97xx - switch to using threaded IRQ
Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
arch/arm/Kconfig | 22 --
arch/arm/Makefile | 1 -
arch/arm/common/locomo.c | 1 -
arch/arm/common/sa.c | 5 +-
arch/arm/include/asm/hardware/sa.h| 2 -
arch/arm/mach-mmp/Kconfig | 10 +-
arch/arm/mach-mmp/Makefile| 1 -
arch/arm/mach-mmp/devices.c | 2 +-
arch/arm/mach-mmp/devices.h | 10 +-
arch/arm/mach-mmp/mfp.h | 2 +-
arch/arm/mach-mmp/mmp2.h | 48 ++---
arch/arm/mach-mmp/pxa168.h| 60 +++---
arch/arm/mach-mmp/pxa910.h| 38 ++--
arch/arm/mach-mmp/tavorevb.c | 113 ---
arch/arm/mach-mmp/ttc_dkb.c | 6 +-
arch/arm/mach-pxa/Kconfig | 14 ++
arch/arm/mach-pxa/Makefile| 18 +-
arch/arm/mach-pxa/Makefile.boot | 3 -
.../mach-pxa/{include/mach => }/addr-map.h| 0
arch/arm/mach-pxa/am300epd.c | 2 +-
.../arm/mach-pxa/balloon3-pcmcia.c| 4 +-
arch/arm/mach-pxa/balloon3.c | 4 +-
.../mach-pxa/{include/mach => }/balloon3.h| 0
arch/arm/mach-pxa/cm-x300.c | 12 +-
arch/arm/mach-pxa/colibri-evalboard.c | 1 -
.../arm/mach-pxa/colibri-pcmcia.c | 2 +-
arch/arm/mach-pxa/colibri-pxa270-income.c | 1 -
arch/arm/mach-pxa/colibri-pxa270.c| 2 +-
arch/arm/mach-pxa/colibri-pxa300.c| 3 +-
arch/arm/mach-pxa/colibri-pxa320.c| 2 +-
arch/arm/mach-pxa/colibri-pxa3xx.c| 3 +-
arch/arm/mach-pxa/colibri.h | 2 +-
arch/arm/mach-pxa/corgi.c | 23 ++-
arch/arm/mach-pxa/{include/mach => }/corgi.h | 0
arch/arm/mach-pxa/corgi
[PATCH 01/48] ARM: pxa: split mach/generic.h
From: Arnd Bergmann Only one declaration from this header is actually used in drivers, so move that one into the global location and leave everything else private. Acked-by: Robert Jarzmik Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/generic.h | 6 +- arch/arm/mach-pxa/include/mach/generic.h | 6 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 3b7873f8e1f8..67925d3ea026 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -7,6 +7,7 @@ */ #include +#include struct irq_data; @@ -71,8 +72,3 @@ extern unsigned pxa25x_get_clk_frequency_khz(int); #define pxa27x_get_clk_frequency_khz(x)(0) #endif -#ifdef CONFIG_PXA3xx -extern unsignedpxa3xx_get_clk_frequency_khz(int); -#else -#define pxa3xx_get_clk_frequency_khz(x)(0) -#endif diff --git a/arch/arm/mach-pxa/include/mach/generic.h b/arch/arm/mach-pxa/include/mach/generic.h index 665542e0c9e2..613f6a299d0d 100644 --- a/arch/arm/mach-pxa/include/mach/generic.h +++ b/arch/arm/mach-pxa/include/mach/generic.h @@ -1 +1,5 @@ -#include "../../generic.h" +#ifdef CONFIG_PXA3xx +extern unsignedpxa3xx_get_clk_frequency_khz(int); +#else +#define pxa3xx_get_clk_frequency_khz(x)(0) +#endif -- 2.29.2
[PATCH 02/48] ARM: pxa: make mainstone.h private
From: Arnd Bergmann
No driver includes this any more, so don't expose it globally.
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/mainstone.c| 2 +-
arch/arm/mach-pxa/{include/mach => }/mainstone.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/mainstone.h (99%)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d237bd030238..997f6e502201 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -45,7 +45,7 @@
#include
#include "pxa27x.h"
-#include
+#include "mainstone.h"
#include
#include
#include
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h
b/arch/arm/mach-pxa/mainstone.h
similarity index 99%
rename from arch/arm/mach-pxa/include/mach/mainstone.h
rename to arch/arm/mach-pxa/mainstone.h
index 1698f2ffd7c7..ba003742e003 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/mainstone.h
@@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * arch/arm/mach-pxa/include/mach/mainstone.h
- *
* Author:Nicolas Pitre
* Created: Nov 14, 2002
* Copyright: MontaVista Software Inc.
--
2.29.2
[PATCH 03/48] ARM: pxa: make mach/regs-uart.h private
From: Arnd Bergmann
This is not used by any drivers, so make it private to the
platform.
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/{include/mach => }/regs-uart.h | 0
arch/arm/mach-pxa/viper.c| 2 +-
arch/arm/mach-pxa/zeus.c | 2 +-
3 files changed, 2 insertions(+), 2 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/regs-uart.h (100%)
diff --git a/arch/arm/mach-pxa/include/mach/regs-uart.h
b/arch/arm/mach-pxa/regs-uart.h
similarity index 100%
rename from arch/arm/mach-pxa/include/mach/regs-uart.h
rename to arch/arm/mach-pxa/regs-uart.h
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 3aa34e9a15d3..4b81c0117971 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -48,7 +48,7 @@
#include "pxa25x.h"
#include
#include
-#include
+#include "regs-uart.h"
#include
#include "viper.h"
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 97700429633e..5d02f10b5b5a 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -39,7 +39,7 @@
#include "pxa27x.h"
#include "devices.h"
-#include
+#include "regs-uart.h"
#include
#include
#include "pxa27x-udc.h"
--
2.29.2
[PATCH 04/48] ARM: pxa: remove mach/dma.h
From: Arnd Bergmann The file no longer contains anything useful, so remove it. Acked-by: Robert Jarzmik Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/include/mach/dma.h | 17 - arch/arm/mach-pxa/pxa25x.c | 1 - arch/arm/mach-pxa/pxa27x.c | 1 - arch/arm/mach-pxa/pxa3xx.c | 1 - 4 files changed, 20 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/dma.h diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h deleted file mode 100644 index 79f9842a7e1c.. --- a/arch/arm/mach-pxa/include/mach/dma.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * arch/arm/mach-pxa/include/mach/dma.h - * - * Author:Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software, Inc. - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include - -/* DMA Controller Registers Definitions */ -#define DMAC_REGS_VIRT io_p2v(0x4000) - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 678641ab46e5..0d25cc45f825 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -34,7 +34,6 @@ #include "pxa25x.h" #include #include "pm.h" -#include #include #include "generic.h" diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index f0ba7ed24cb6..f7e89831e85b 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -33,7 +33,6 @@ #include #include #include "pm.h" -#include #include #include "generic.h" diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 560160682df6..6eb1c24d7395 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -32,7 +32,6 @@ #include #include #include "pm.h" -#include #include #include -- 2.29.2
[PATCH 05/48] ARM: pxa: split up mach/hardware.h
From: Arnd Bergmann The mach/hardware.h is included in lots of places, and it provides three different things on pxa: - the cpu_is_pxa* macros - an indirect inclusion of mach/addr-map.h - the __REG() and io_pv2() helper macros Split it up into separate and mach/pxa-regs.h headers, then change all the files that use mach/hardware.h to include the exact set of those three headers that they actually need, allowing for further more targeted cleanup. linux/soc/pxa/cpu.h can remain permanently exported and is now in a global location along with similar headers. pxa-regs.h and addr-map.h are only used in a very small number of drivers now and can be moved to arch/arm/mach-pxa/ directly when those drivers are to pass the necessary data as resources. Cc: Michael Turquette Cc: Stephen Boyd Acked-by: Viresh Kumar Acked-by: Dmitry Torokhov Cc: Jacek Anaszewski Cc: Pavel Machek Acked-by: Ulf Hansson Cc: Dominik Brodowski Acked-by: Alexandre Belloni Cc: Greg Kroah-Hartman Cc: Guenter Roeck Acked-by: Mark Brown Cc: linux-...@vger.kernel.org Cc: linux...@vger.kernel.org Cc: linux-in...@vger.kernel.org Cc: linux-l...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: linux-...@lists.infradead.org Cc: linux-...@vger.kernel.org Cc: linux-...@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-fb...@vger.kernel.org Cc: linux-watch...@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Arnd Bergmann --- arch/arm/common/locomo.c | 1 - arch/arm/common/sa.c | 5 +- arch/arm/mach-pxa/cm-x300.c | 2 + arch/arm/mach-pxa/colibri-evalboard.c | 1 - arch/arm/mach-pxa/colibri-pxa270-income.c | 1 - arch/arm/mach-pxa/colibri-pxa300.c| 1 + arch/arm/mach-pxa/colibri-pxa3xx.c| 1 - arch/arm/mach-pxa/corgi.c | 1 - arch/arm/mach-pxa/corgi_pm.c | 1 - arch/arm/mach-pxa/csb726.c| 1 + arch/arm/mach-pxa/devices.c | 2 +- arch/arm/mach-pxa/ezx.c | 1 - arch/arm/mach-pxa/generic.c | 3 +- arch/arm/mach-pxa/gumstix.c | 1 - arch/arm/mach-pxa/hx4700.c| 2 +- arch/arm/mach-pxa/idp.c | 1 - arch/arm/mach-pxa/include/mach/pxa-regs.h | 52 arch/arm/mach-pxa/include/mach/pxa2xx-regs.h | 2 +- arch/arm/mach-pxa/include/mach/pxa3xx-regs.h | 2 +- arch/arm/mach-pxa/include/mach/regs-ac97.h| 2 +- arch/arm/mach-pxa/include/mach/regs-ost.h | 2 +- arch/arm/mach-pxa/include/mach/trizeps4.h | 1 + arch/arm/mach-pxa/irq.c | 3 +- arch/arm/mach-pxa/littleton.c | 1 - arch/arm/mach-pxa/lpd270.c| 2 +- arch/arm/mach-pxa/lubbock.c | 1 - arch/arm/mach-pxa/magician.c | 2 +- arch/arm/mach-pxa/mainstone.c | 2 +- arch/arm/mach-pxa/mfp-pxa2xx.c| 1 + arch/arm/mach-pxa/mfp-pxa3xx.c| 1 - arch/arm/mach-pxa/poodle.c| 1 - arch/arm/mach-pxa/pxa-regs.h | 1 + arch/arm/mach-pxa/pxa25x.c| 3 +- arch/arm/mach-pxa/pxa25x.h| 2 +- arch/arm/mach-pxa/pxa27x-udc.h| 2 + arch/arm/mach-pxa/pxa27x.c| 3 +- arch/arm/mach-pxa/pxa27x.h| 2 +- arch/arm/mach-pxa/pxa2xx.c| 1 - arch/arm/mach-pxa/pxa300.c| 1 + arch/arm/mach-pxa/pxa320.c| 1 + arch/arm/mach-pxa/pxa3xx-ulpi.c | 2 +- arch/arm/mach-pxa/pxa3xx.c| 3 +- arch/arm/mach-pxa/pxa3xx.h| 2 +- arch/arm/mach-pxa/pxa930.c| 1 + arch/arm/mach-pxa/regs-rtc.h | 2 +- arch/arm/mach-pxa/regs-uart.h | 2 + arch/arm/mach-pxa/sleep.S | 1 - arch/arm/mach-pxa/smemc.c | 2 +- arch/arm/mach-pxa/spitz_pm.c | 1 - arch/arm/mach-pxa/standby.S | 1 - arch/arm/mach-pxa/xcep.c | 2 +- arch/arm/mach-pxa/zylonite.c | 1 + arch/arm/mach-pxa/zylonite.h | 2 + arch/arm/mach-pxa/zylonite_pxa300.c | 1 + arch/arm/mach-pxa/zylonite_pxa320.c | 1 + drivers/clk/pxa/clk-pxa3xx.c | 1 + drivers/cpufreq/pxa2xx-cpufreq.c | 1 + drivers/cpufreq/pxa3xx-cpufreq.c | 1 + drivers/input/mouse/pxa930_trkball.c | 1 - drivers/input/touchscreen/zylonite-wm97xx.c | 2 +- drivers/leds/leds-locomo.c| 1 - drivers/mmc/host/pxamci.c | 2 +- drivers/mtd/maps/pxa2xx-flash.c | 2 - drivers/pcmcia/pxa2xx_base.c | 2 +- drivers/pcmcia/pxa2xx_sharpsl.c | 1 - dr
[PATCH 06/48] ARM: pxa: stop using mach/bitfield.h
From: Arnd Bergmann There are two identical copies of mach/bitfield.h, one for mach-sa1100 and one for mach-pxa. The pxafb driver only makes use of two macros, which can be trivially open-coded in the header. Cc: dri-devel@lists.freedesktop.org Acked-by: Bartlomiej Zolnierkiewicz Acked-by: Robert Jarzmik Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/idp.c | 1 - arch/arm/mach-pxa/include/mach/regs-lcd.h | 5 +++-- arch/arm/mach-pxa/regs-u2d.h | 2 -- drivers/video/fbdev/pxafb.c | 1 - 4 files changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 57c0511472bc..525d01ddfbbb 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -30,7 +30,6 @@ #include "pxa25x.h" #include "idp.h" #include -#include #include #include diff --git a/arch/arm/mach-pxa/include/mach/regs-lcd.h b/arch/arm/mach-pxa/include/mach/regs-lcd.h index e2b6e3d1f625..6a434675f84a 100644 --- a/arch/arm/mach-pxa/include/mach/regs-lcd.h +++ b/arch/arm/mach-pxa/include/mach/regs-lcd.h @@ -2,8 +2,6 @@ #ifndef __ASM_ARCH_REGS_LCD_H #define __ASM_ARCH_REGS_LCD_H -#include - /* * LCD Controller Registers and Bits Definitions */ @@ -86,6 +84,9 @@ #define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */ #define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */ +#define Fld(Size, Shft)(((Size) << 16) + (Shft)) +#define FShft(Field) ((Field) & 0x) + #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ #define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) diff --git a/arch/arm/mach-pxa/regs-u2d.h b/arch/arm/mach-pxa/regs-u2d.h index fe4c80ad87ec..ab517ba62c9a 100644 --- a/arch/arm/mach-pxa/regs-u2d.h +++ b/arch/arm/mach-pxa/regs-u2d.h @@ -2,8 +2,6 @@ #ifndef __ASM_ARCH_PXA3xx_U2D_H #define __ASM_ARCH_PXA3xx_U2D_H -#include - /* * USB2 device controller registers and bits definitions */ diff --git a/drivers/video/fbdev/pxafb.c b/drivers/video/fbdev/pxafb.c index e3d1a184d2be..edf080f64a8c 100644 --- a/drivers/video/fbdev/pxafb.c +++ b/drivers/video/fbdev/pxafb.c @@ -64,7 +64,6 @@ #include #include #include -#include #include /* -- 2.29.2
[PATCH 07/48] ARM: pxa: move mach/sound.h to linux/platform_data/
From: Arnd Bergmann This is a basically a platform_data file, so move it out of the mach/* header directory. Cc: Marek Vasut Cc: Tomas Cech Cc: Sergey Lapin Acked-by: Mark Brown Acked-by: Robert Jarzmik Cc: alsa-de...@alsa-project.org Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/cm-x300.c | 2 +- arch/arm/mach-pxa/colibri-pxa270.c| 2 +- arch/arm/mach-pxa/colibri-pxa300.c| 2 +- arch/arm/mach-pxa/colibri-pxa320.c| 2 +- arch/arm/mach-pxa/csb726.c| 2 +- arch/arm/mach-pxa/devices.c | 2 +- arch/arm/mach-pxa/eseries.c | 2 +- arch/arm/mach-pxa/lpd270.c| 2 +- arch/arm/mach-pxa/lubbock.c | 2 +- arch/arm/mach-pxa/mainstone.c | 2 +- arch/arm/mach-pxa/mioa701.c | 2 +- arch/arm/mach-pxa/palm27x.c | 2 +- arch/arm/mach-pxa/palmld.c| 2 +- arch/arm/mach-pxa/palmt5.c| 2 +- arch/arm/mach-pxa/palmtc.c| 2 +- arch/arm/mach-pxa/palmte2.c | 2 +- arch/arm/mach-pxa/palmtreo.c | 2 +- arch/arm/mach-pxa/palmtx.c| 2 +- arch/arm/mach-pxa/palmz72.c | 2 +- arch/arm/mach-pxa/pcm990-baseboard.c | 2 +- arch/arm/mach-pxa/tosa.c | 2 +- arch/arm/mach-pxa/trizeps4.c | 2 +- arch/arm/mach-pxa/viper.c | 2 +- arch/arm/mach-pxa/vpac270.c | 2 +- arch/arm/mach-pxa/zeus.c | 2 +- arch/arm/mach-pxa/zylonite.c | 2 +- .../mach/audio.h => include/linux/platform_data/asoc-pxa.h| 4 ++-- sound/arm/pxa2xx-ac97-lib.c | 2 +- sound/arm/pxa2xx-ac97.c | 2 +- sound/soc/pxa/corgi.c | 2 +- sound/soc/pxa/e740_wm9705.c | 2 +- sound/soc/pxa/e750_wm9705.c | 2 +- sound/soc/pxa/e800_wm9712.c | 2 +- sound/soc/pxa/em-x270.c | 2 +- sound/soc/pxa/mioa701_wm9713.c| 2 +- sound/soc/pxa/palm27x.c | 2 +- sound/soc/pxa/poodle.c| 2 +- sound/soc/pxa/pxa2xx-ac97.c | 2 +- sound/soc/pxa/pxa2xx-i2s.c| 2 +- sound/soc/pxa/tosa.c | 2 +- sound/soc/pxa/z2.c| 2 +- 42 files changed, 43 insertions(+), 43 deletions(-) rename arch/arm/mach-pxa/include/mach/audio.h => include/linux/platform_data/asoc-pxa.h (93%) diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 26140249c784..82f9299f67d3 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -41,7 +41,7 @@ #include "pxa27x.h" #include -#include +#include #include #include #include "udc.h" diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 85e2537fdc15..09a5264a27c8 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -53,7 +53,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 2f2cd2ae4187..5dc669752836 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include "colibri.h" #include "pxa27x.h" diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 4ceeea142bfd..11ca6c4795e7 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -24,7 +24,7 @@ #include "colibri.h" #include #include -#include +#include #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 35dd3adb7712..1a59056e181e 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -24,7 +24,7 @@ #include "colibri.h" #include #include -#include +#include #include "pxa27x-udc.h" #include "udc.h" diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb72
[PATCH 08/48] ARM: pxa: move regs-lcd.h into driver
From: Arnd Bergmann
Only the pxafb driver uses this header, so move it into the
same directory. The SMART_* macros are required by some
platform data definitions and can go into the
linux/platform_data/video-pxafb.h header.
Acked-by: Bartlomiej Zolnierkiewicz
Acked-by: Robert Jarzmik
Cc: dri-devel@lists.freedesktop.org
Cc: linux-fb...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
.../video/fbdev/pxa3xx-regs.h | 19
drivers/video/fbdev/pxafb.c | 1 +
include/linux/platform_data/video-pxafb.h | 22 ++-
3 files changed, 22 insertions(+), 20 deletions(-)
rename arch/arm/mach-pxa/include/mach/regs-lcd.h =>
drivers/video/fbdev/pxa3xx-regs.h (90%)
diff --git a/arch/arm/mach-pxa/include/mach/regs-lcd.h
b/drivers/video/fbdev/pxa3xx-regs.h
similarity index 90%
rename from arch/arm/mach-pxa/include/mach/regs-lcd.h
rename to drivers/video/fbdev/pxa3xx-regs.h
index 6a434675f84a..6a96610ef9b5 100644
--- a/arch/arm/mach-pxa/include/mach/regs-lcd.h
+++ b/drivers/video/fbdev/pxa3xx-regs.h
@@ -177,23 +177,4 @@
#define PRSR_ST_OK (1 << 9)/* Status OK */
#define PRSR_CON_NT(1 << 10) /* Continue to Next Command */
-#define SMART_CMD_A0(0x1 << 8)
-#define SMART_CMD_READ_STATUS_REG (0x0 << 9)
-#define SMART_CMD_READ_FRAME_BUFFER((0x0 << 9) | SMART_CMD_A0)
-#define SMART_CMD_WRITE_COMMAND (0x1 << 9)
-#define SMART_CMD_WRITE_DATA ((0x1 << 9) | SMART_CMD_A0)
-#define SMART_CMD_WRITE_FRAME ((0x2 << 9) | SMART_CMD_A0)
-#define SMART_CMD_WAIT_FOR_VSYNC(0x3 << 9)
-#define SMART_CMD_NOOP (0x4 << 9)
-#define SMART_CMD_INTERRUPT (0x5 << 9)
-
-#define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff))
-#define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff))
-
-/* SMART_DELAY() is introduced for software controlled delay primitive which
- * can be inserted between command sequences, unused command 0x6 is used here
- * and delay ranges from 0ms ~ 255ms
- */
-#define SMART_CMD_DELAY(0x6 << 9)
-#define SMART_DELAY(ms)(SMART_CMD_DELAY | ((ms) & 0xff))
#endif /* __ASM_ARCH_REGS_LCD_H */
diff --git a/drivers/video/fbdev/pxafb.c b/drivers/video/fbdev/pxafb.c
index edf080f64a8c..ab5bc8272d8e 100644
--- a/drivers/video/fbdev/pxafb.c
+++ b/drivers/video/fbdev/pxafb.c
@@ -72,6 +72,7 @@
#define DEBUG_VAR 1
#include "pxafb.h"
+#include "pxa3xx-regs.h"
/* Bits which should not be set in machine configuration structures */
#define LCCR0_INVALID_CONFIG_MASK (LCCR0_OUM | LCCR0_BM | LCCR0_QDM |\
diff --git a/include/linux/platform_data/video-pxafb.h
b/include/linux/platform_data/video-pxafb.h
index b3d574778326..6333bac166a5 100644
--- a/include/linux/platform_data/video-pxafb.h
+++ b/include/linux/platform_data/video-pxafb.h
@@ -8,7 +8,6 @@
*/
#include
-#include
/*
* Supported LCD connections
@@ -153,6 +152,27 @@ struct pxafb_mach_info {
void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
unsigned long pxafb_get_hsync_time(struct device *dev);
+/* smartpanel related */
+#define SMART_CMD_A0(0x1 << 8)
+#define SMART_CMD_READ_STATUS_REG (0x0 << 9)
+#define SMART_CMD_READ_FRAME_BUFFER((0x0 << 9) | SMART_CMD_A0)
+#define SMART_CMD_WRITE_COMMAND (0x1 << 9)
+#define SMART_CMD_WRITE_DATA ((0x1 << 9) | SMART_CMD_A0)
+#define SMART_CMD_WRITE_FRAME ((0x2 << 9) | SMART_CMD_A0)
+#define SMART_CMD_WAIT_FOR_VSYNC(0x3 << 9)
+#define SMART_CMD_NOOP (0x4 << 9)
+#define SMART_CMD_INTERRUPT (0x5 << 9)
+
+#define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff))
+#define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff))
+
+/* SMART_DELAY() is introduced for software controlled delay primitive which
+ * can be inserted between command sequences, unused command 0x6 is used here
+ * and delay ranges from 0ms ~ 255ms
+ */
+#define SMART_CMD_DELAY(0x6 << 9)
+#define SMART_DELAY(ms)(SMART_CMD_DELAY | ((ms) & 0xff))
+
#ifdef CONFIG_FB_PXA_SMARTPANEL
extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
extern int pxafb_smart_flush(struct fb_info *info);
--
2.29.2
[PATCH 09/48] watchdog: sa1100: use platform device registration
From: Arnd Bergmann
Rather than relying on machine specific headers to
pass down the reboot status and the register locations,
use resources and platform_data.
Aside from this, keep the changes to a minimum.
Cc: Wim Van Sebroeck
Cc: Guenter Roeck
Cc: linux-watch...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/devices.c | 11 +++
arch/arm/mach-pxa/include/mach/regs-ost.h | 2 +
arch/arm/mach-pxa/include/mach/reset.h| 2 +-
arch/arm/mach-pxa/pxa25x.c| 2 +-
arch/arm/mach-pxa/pxa27x.c| 2 +-
arch/arm/mach-pxa/pxa3xx.c| 2 +-
arch/arm/mach-pxa/reset.c | 3 -
arch/arm/mach-sa1100/generic.c| 6 +-
arch/arm/mach-sa1100/include/mach/reset.h | 1 -
drivers/watchdog/sa1100_wdt.c | 87 ---
10 files changed, 83 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 454523237c97..12f78636045f 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -24,6 +24,8 @@
#include
#include
+#include
+#include
#include "devices.h"
#include "generic.h"
@@ -1118,3 +1120,12 @@ void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata
*dma_pdata)
{
pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
}
+
+void __init pxa_register_wdt(unsigned int reset_status)
+{
+ struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
+
+ reset_status &= RESET_STATUS_WATCHDOG;
+ platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
+ &reset_status, sizeof(reset_status));
+}
diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h
b/arch/arm/mach-pxa/include/mach/regs-ost.h
index 109d0ed264df..c8001cfc8d6b 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ost.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ost.h
@@ -7,6 +7,8 @@
/*
* OS Timer & Match Registers
*/
+#define OST_PHYS 0x40A0
+#define OST_LEN0x0020
#define OSMR0 io_p2v(0x40A0) /* */
#define OSMR1 io_p2v(0x40A4) /* */
diff --git a/arch/arm/mach-pxa/include/mach/reset.h
b/arch/arm/mach-pxa/include/mach/reset.h
index e1c4d100fd45..963dd190bc13 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -8,8 +8,8 @@
#define RESET_STATUS_GPIO (1 << 3)/* GPIO Reset */
#define RESET_STATUS_ALL (0xf)
-extern unsigned int reset_status;
extern void clear_reset_status(unsigned int mask);
+extern void pxa_register_wdt(unsigned int reset_status);
/**
* init_gpio_reset() - register GPIO as reset generator
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 305047ebd2f1..dfc90b41fba3 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -240,7 +240,7 @@ static int __init pxa25x_init(void)
if (cpu_is_pxa25x()) {
- reset_status = RCSR;
+ pxa_register_wdt(RCSR);
pxa25x_init_pm();
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index a81ac88ecbfd..38fdd22c4dc5 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -337,7 +337,7 @@ static int __init pxa27x_init(void)
if (cpu_is_pxa27x()) {
- reset_status = RCSR;
+ pxa_register_wdt(RCSR);
pxa27x_init_pm();
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index fc84aed99481..7c569fa2a6da 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -463,7 +463,7 @@ static int __init pxa3xx_init(void)
if (cpu_is_pxa3xx()) {
- reset_status = ARSR;
+ pxa_register_wdt(ARSR);
/*
* clear RDH bit every time after reset
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index af78405aa4e9..fcb791c5ae3e 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -11,9 +11,6 @@
#include
#include
-unsigned int reset_status;
-EXPORT_SYMBOL(reset_status);
-
static void do_hw_reset(void);
static int reset_gpio = -1;
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 4dfb7554649d..6c21f214cd60 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -39,9 +39,6 @@
#include "generic.h"
#include
-unsigned int reset_status;
-EXPORT_SYMBOL(reset_status);
-
#define NR_FREQS 16
/*
@@ -319,10 +316,13 @@ static struct platform_device *sa11x0_devices[]
__initdata = {
static int __init sa1100_init(void)
{
+ struct resource wdt_res = DEFINE_RES_MEM(0x9000, 0x20);
pm_power_off = sa1100_power_off;
regulator_has_full_constraints();
+ platform_device_register_simple("sa1100_wdt", -1, &wdt_res, 1);
+
return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices
[PATCH 10/48] ARM: pxa: pxa2xx-ac97-lib: use IRQ resource
From: Arnd Bergmann
The pxa2xx-ac97-lib code is the last driver to use mach/irqs.h
for PXA. Almost everything already passes the interrupt as
a resource, so use it from there.
The one exception is the mxm8x10 machine, which apparently has
a resource-less device. Replacing it with the correct one
enables the driver here as well.
Cc: alsa-de...@alsa-project.org
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/mxm8x10.c | 8 ++--
sound/arm/pxa2xx-ac97-lib.c | 10 +++---
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index fde386f6cffe..35546b59c88e 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include "pxa320.h"
#include "mxm8x10.h"
@@ -356,14 +357,9 @@ void __init mxm_8x10_usb_host_init(void)
pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
}
-/* AC97 Sound Support */
-static struct platform_device mxm_8x10_ac97_device = {
- .name = "pxa2xx-ac97"
-};
-
void __init mxm_8x10_ac97_init(void)
{
- platform_device_register(&mxm_8x10_ac97_device);
+ pxa_set_ac97_info(NULL);
}
/* NAND flash Support */
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 9b5c1f0f8998..8c79d224f03b 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -21,7 +21,6 @@
#include
-#include
#include
#include
@@ -319,6 +318,7 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume);
int pxa2xx_ac97_hw_probe(struct platform_device *dev)
{
int ret;
+ int irq;
pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
if (pdata) {
@@ -387,7 +387,11 @@ int pxa2xx_ac97_hw_probe(struct platform_device *dev)
if (ret)
goto err_clk2;
- ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
+ irq = platform_get_irq(dev, 0);
+ if (!irq)
+ goto err_irq;
+
+ ret = request_irq(irq, pxa2xx_ac97_irq, 0, "AC97", NULL);
if (ret < 0)
goto err_irq;
@@ -413,7 +417,7 @@ void pxa2xx_ac97_hw_remove(struct platform_device *dev)
if (cpu_is_pxa27x())
gpio_free(reset_gpio);
GCR |= GCR_ACLINK_OFF;
- free_irq(IRQ_AC97, NULL);
+ free_irq(platform_get_irq(dev, 0), NULL);
if (ac97conf_clk) {
clk_put(ac97conf_clk);
ac97conf_clk = NULL;
--
2.29.2
[PATCH 11/48] ARM: pxa: move pcmcia board data into mach-pxa
From: Arnd Bergmann
The drivers/pcmcia/pxa2xx_*.c are essentially part of the
board files, but for historic reasons located in drivers/pcmcia.
Move them into the same place as the actual board file to avoid
lots of machine header inclusions.
Cc: Marek Vasut
Cc: Dominik Brodowski
Cc: Jonathan Cameron
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/Makefile| 18 ++-
.../arm/mach-pxa/balloon3-pcmcia.c| 4 +-
arch/arm/mach-pxa/balloon3.c | 2 +-
.../mach-pxa/{include/mach => }/balloon3.h| 2 +-
.../arm/mach-pxa/colibri-pcmcia.c | 2 +-
.../arm/mach-pxa/e740-pcmcia.c| 2 +-
.../arm/mach-pxa/hx4700-pcmcia.c | 2 +-
.../arm/mach-pxa/palmld-pcmcia.c | 2 +-
.../arm/mach-pxa/palmtc-pcmcia.c | 4 +-
arch/arm/mach-pxa/palmtc.c| 2 +-
arch/arm/mach-pxa/{include/mach => }/palmtc.h | 2 +-
.../arm/mach-pxa/palmtx-pcmcia.c | 4 +-
arch/arm/mach-pxa/palmtx.c| 2 +-
arch/arm/mach-pxa/{include/mach => }/palmtx.h | 2 +-
.../arm/mach-pxa/trizeps4-pcmcia.c| 4 +-
arch/arm/mach-pxa/trizeps4.c | 2 +-
.../mach-pxa/{include/mach => }/trizeps4.h| 2 +-
.../arm/mach-pxa/viper-pcmcia.c | 6 +-
.../arm/mach-pxa/viper-pcmcia.h | 0
arch/arm/mach-pxa/viper.c | 2 +-
.../arm/mach-pxa/vpac270-pcmcia.c | 4 +-
arch/arm/mach-pxa/vpac270.c | 2 +-
.../arm/mach-pxa/{include/mach => }/vpac270.h | 0
arch/arm/mach-pxa/zeus.c | 2 +-
drivers/pcmcia/Makefile | 13 --
drivers/pcmcia/pxa2xx_sharpsl.c | 2 +-
drivers/pcmcia/soc_common.h | 120 +
include/pcmcia/soc_common.h | 125 ++
28 files changed, 165 insertions(+), 169 deletions(-)
rename drivers/pcmcia/pxa2xx_balloon3.c => arch/arm/mach-pxa/balloon3-pcmcia.c
(98%)
rename arch/arm/mach-pxa/{include/mach => }/balloon3.h (99%)
rename drivers/pcmcia/pxa2xx_colibri.c => arch/arm/mach-pxa/colibri-pcmcia.c
(99%)
rename drivers/pcmcia/pxa2xx_e740.c => arch/arm/mach-pxa/e740-pcmcia.c (98%)
rename drivers/pcmcia/pxa2xx_hx4700.c => arch/arm/mach-pxa/hx4700-pcmcia.c
(98%)
rename drivers/pcmcia/pxa2xx_palmld.c => arch/arm/mach-pxa/palmld-pcmcia.c
(98%)
rename drivers/pcmcia/pxa2xx_palmtc.c => arch/arm/mach-pxa/palmtc-pcmcia.c
(98%)
rename arch/arm/mach-pxa/{include/mach => }/palmtc.h (98%)
rename drivers/pcmcia/pxa2xx_palmtx.c => arch/arm/mach-pxa/palmtx-pcmcia.c
(98%)
rename arch/arm/mach-pxa/{include/mach => }/palmtx.h (98%)
rename drivers/pcmcia/pxa2xx_trizeps4.c => arch/arm/mach-pxa/trizeps4-pcmcia.c
(98%)
rename arch/arm/mach-pxa/{include/mach => }/trizeps4.h (99%)
rename drivers/pcmcia/pxa2xx_viper.c => arch/arm/mach-pxa/viper-pcmcia.c (97%)
rename include/linux/platform_data/pcmcia-pxa2xx_viper.h =>
arch/arm/mach-pxa/viper-pcmcia.h (100%)
rename drivers/pcmcia/pxa2xx_vpac270.c => arch/arm/mach-pxa/vpac270-pcmcia.c
(98%)
rename arch/arm/mach-pxa/{include/mach => }/vpac270.h (100%)
create mode 100644 include/pcmcia/soc_common.h
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 68730ceb8b7c..0aec36e67dc1 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -37,7 +37,8 @@ obj-$(CONFIG_MACH_SAAR) += saar.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_ARCH_VIPER) += viper.o
obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o
-obj-$(CONFIG_MACH_BALLOON3)+= balloon3.o
+obj-$(CONFIG_ARCOM_PCMCIA) += viper-pcmcia.o
+obj-$(CONFIG_MACH_BALLOON3)+= balloon3.o balloon3-pcmcia.o
obj-$(CONFIG_MACH_CSB726) += csb726.o
obj-$(CONFIG_CSB726_CSB701)+= csb701.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
@@ -47,18 +48,20 @@ obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_TRIZEPS4)+= trizeps4.o
+obj-$(CONFIG_TRIZEPS_PCMCIA) += trizeps4-pcmcia.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD)+= pcm990-baseboard.o
-obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
+obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o colibri-pcmcia.o
obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o
obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
-obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
-obj-$(CONFIG_MACH_VPAC270) += vpac270.o
+obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
colibri-pcmcia.o
+obj-$(CONFIG_MACH_VPAC270) += vpac270.o vpac270-pcmcia.o
# End-user Pro
[PATCH 12/48] ARM: pxa: make addr-map.h header local
From: Arnd Bergmann
Drivers should not rely on the contents of this file, so
move it into the platform directory directly.
Cc: Philipp Zabel
Cc: Paul Parsons
Signed-off-by: Arnd Bergmann
Link: https://lore.kernel.org/lkml/87mudkmx8g@belgarion.home/
---
arch/arm/mach-pxa/{include/mach => }/addr-map.h | 0
arch/arm/mach-pxa/generic.c | 2 +-
arch/arm/mach-pxa/hx4700.c | 2 +-
arch/arm/mach-pxa/lpd270.c | 2 +-
arch/arm/mach-pxa/magician.c| 2 +-
arch/arm/mach-pxa/mainstone.c | 2 +-
arch/arm/mach-pxa/pxa25x.c | 2 +-
arch/arm/mach-pxa/pxa25x.h | 2 +-
arch/arm/mach-pxa/pxa27x.c | 2 +-
arch/arm/mach-pxa/pxa27x.h | 2 +-
arch/arm/mach-pxa/pxa3xx.c | 2 +-
arch/arm/mach-pxa/pxa3xx.h | 2 +-
arch/arm/mach-pxa/trizeps4.h| 2 +-
arch/arm/mach-pxa/xcep.c| 2 +-
14 files changed, 13 insertions(+), 13 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/addr-map.h (100%)
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h
b/arch/arm/mach-pxa/addr-map.h
similarity index 100%
rename from arch/arm/mach-pxa/include/mach/addr-map.h
rename to arch/arm/mach-pxa/addr-map.h
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3c3cd90bb9b4..f9083c4f0aea 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -22,7 +22,7 @@
#include
#include
-#include
+#include "addr-map.h"
#include
#include
#include
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 191a6c24fe19..140a44cb2989 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -40,7 +40,7 @@
#include
#include "pxa27x.h"
-#include
+#include "addr-map.h"
#include
#include
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 7f10b86f85fd..e03436710752 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -38,7 +38,7 @@
#include "pxa27x.h"
#include "lpd270.h"
-#include
+#include "addr-map.h"
#include
#include
#include
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 345a44d15a2c..20ca3e28c7fb 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -34,7 +34,7 @@
#include
#include "pxa27x.h"
-#include
+#include "addr-map.h"
#include
#include
#include
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index c8200fc2159d..f0072e63b456 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -51,7 +51,7 @@
#include
#include
#include
-#include
+#include "addr-map.h"
#include
#include "generic.h"
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index dfc90b41fba3..8d21c7eef1d2 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -34,7 +34,7 @@
#include "pxa25x.h"
#include
#include "pm.h"
-#include
+#include "addr-map.h"
#include
#include "generic.h"
diff --git a/arch/arm/mach-pxa/pxa25x.h b/arch/arm/mach-pxa/pxa25x.h
index 403bc16c2ed2..4699ebf7b486 100644
--- a/arch/arm/mach-pxa/pxa25x.h
+++ b/arch/arm/mach-pxa/pxa25x.h
@@ -2,7 +2,7 @@
#ifndef __MACH_PXA25x_H
#define __MACH_PXA25x_H
-#include
+#include "addr-map.h"
#include
#include "mfp-pxa25x.h"
#include
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 38fdd22c4dc5..c36a9784fab8 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -33,7 +33,7 @@
#include
#include
#include "pm.h"
-#include
+#include "addr-map.h"
#include
#include "generic.h"
diff --git a/arch/arm/mach-pxa/pxa27x.h b/arch/arm/mach-pxa/pxa27x.h
index 6c99090647d2..bf2755561fe5 100644
--- a/arch/arm/mach-pxa/pxa27x.h
+++ b/arch/arm/mach-pxa/pxa27x.h
@@ -3,7 +3,7 @@
#define __MACH_PXA27x_H
#include
-#include
+#include "addr-map.h"
#include
#include "mfp-pxa27x.h"
#include
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 7c569fa2a6da..7881888107c7 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -32,7 +32,7 @@
#include
#include
#include "pm.h"
-#include
+#include "addr-map.h"
#include
#include
diff --git a/arch/arm/mach-pxa/pxa3xx.h b/arch/arm/mach-pxa/pxa3xx.h
index 22ace053ea25..6b424d328680 100644
--- a/arch/arm/mach-pxa/pxa3xx.h
+++ b/arch/arm/mach-pxa/pxa3xx.h
@@ -2,7 +2,7 @@
#ifndef __MACH_PXA3XX_H
#define __MACH_PXA3XX_H
-#include
+#include "addr-map.h"
#include
#include
diff --git a/arch/arm/mach-pxa/trizeps4.h b/arch/arm/mach-pxa/trizeps4.h
index 7597b9de11e2..e0f37c0ff06f 100644
--- a/arch/arm/mach-pxa/trizeps4.h
+++ b/arch/arm/mach-pxa/trizeps4.h
@@ -11,7 +11,7 @@
#ifndef _TRIPEPS4_H_
#define _TRIPEPS4_H_
-#include
+#include "addr-map.h"
#include /* PXA_GPIO_
[PATCH 13/48] ARM: pxa: use pdev resource for palmld mmio
From: Arnd Bergmann
The palmld header is almost unused in drivers, the only
remaining thing now is the PATA device address, which should
really be passed as a resource.
Cc: Jens Axboe
Cc: linux-...@vger.kernel.org
Acked-by: Robert Jarzmik
Acked-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/palmld-pcmcia.c | 3 ++-
arch/arm/mach-pxa/palmld.c| 12 +---
arch/arm/mach-pxa/{include/mach => }/palmld.h | 2 +-
drivers/ata/pata_palmld.c | 3 +--
4 files changed, 13 insertions(+), 7 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/palmld.h (98%)
diff --git a/arch/arm/mach-pxa/palmld-pcmcia.c
b/arch/arm/mach-pxa/palmld-pcmcia.c
index 07e0f7438db1..720294a50864 100644
--- a/arch/arm/mach-pxa/palmld-pcmcia.c
+++ b/arch/arm/mach-pxa/palmld-pcmcia.c
@@ -13,9 +13,10 @@
#include
#include
-#include
#include
+#include "palmld.h"
+
static struct gpio palmld_pcmcia_gpios[] = {
{ GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" },
{ GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" },
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index d85146957004..d821606ce0b5 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -29,8 +29,8 @@
#include
#include "pxa27x.h"
+#include "palmld.h"
#include
-#include
#include
#include
#include
@@ -279,9 +279,15 @@ static inline void palmld_leds_init(void) {}
* HDD
**/
#if defined(CONFIG_PATA_PALMLD) || defined(CONFIG_PATA_PALMLD_MODULE)
+static struct resource palmld_ide_resources[] = {
+ DEFINE_RES_MEM(PALMLD_IDE_PHYS, 0x1000),
+};
+
static struct platform_device palmld_ide_device = {
- .name = "pata_palmld",
- .id = -1,
+ .name = "pata_palmld",
+ .id = -1,
+ .resource = palmld_ide_resources,
+ .num_resources = ARRAY_SIZE(palmld_ide_resources),
};
static struct gpiod_lookup_table palmld_ide_gpio_table = {
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h
b/arch/arm/mach-pxa/palmld.h
similarity index 98%
rename from arch/arm/mach-pxa/include/mach/palmld.h
rename to arch/arm/mach-pxa/palmld.h
index 99a6d8b3a1e3..ee3bc15b71a2 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/palmld.h
@@ -9,7 +9,7 @@
#ifndef _INCLUDE_PALMLD_H_
#define _INCLUDE_PALMLD_H_
-#include "irqs.h" /* PXA_GPIO_TO_IRQ */
+#include /* PXA_GPIO_TO_IRQ */
/** HERE ARE GPIOs **/
diff --git a/drivers/ata/pata_palmld.c b/drivers/ata/pata_palmld.c
index 2448441571ed..400e65190904 100644
--- a/drivers/ata/pata_palmld.c
+++ b/drivers/ata/pata_palmld.c
@@ -25,7 +25,6 @@
#include
#include
-#include
#define DRV_NAME "pata_palmld"
@@ -63,7 +62,7 @@ static int palmld_pata_probe(struct platform_device *pdev)
return -ENOMEM;
/* remap drive's physical memory address */
- mem = devm_ioremap(dev, PALMLD_IDE_PHYS, 0x1000);
+ mem = devm_platform_ioremap_resource(pdev, 0);
if (!mem)
return -ENOMEM;
--
2.29.2
[PATCH 14/48] ARM: pxa: maybe fix gpio lookup tables
From: Arnd Bergmann
>From inspection I found a couple of GPIO lookups that are
listed with device "gpio-pxa", but actually have a number
from a different gpio controller.
Try to rectify that here, with a guess of what the actual
device name is.
Acked-by: Robert Jarzmik
Reviewed-by: Linus Walleij
Cc: sta...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/cm-x300.c | 8
arch/arm/mach-pxa/magician.c | 2 +-
arch/arm/mach-pxa/tosa.c | 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 09a5264a27c8..01f364a66446 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -356,13 +356,13 @@ static struct platform_device cm_x300_spi_gpio = {
static struct gpiod_lookup_table cm_x300_spi_gpiod_table = {
.dev_id = "spi_gpio",
.table = {
- GPIO_LOOKUP("gpio-pxa", GPIO_LCD_SCL,
+ GPIO_LOOKUP("pca9555.1", GPIO_LCD_SCL - GPIO_LCD_BASE,
"sck", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio-pxa", GPIO_LCD_DIN,
+ GPIO_LOOKUP("pca9555.1", GPIO_LCD_DIN - GPIO_LCD_BASE,
"mosi", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio-pxa", GPIO_LCD_DOUT,
+ GPIO_LOOKUP("pca9555.1", GPIO_LCD_DOUT - GPIO_LCD_BASE,
"miso", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("gpio-pxa", GPIO_LCD_CS,
+ GPIO_LOOKUP("pca9555.1", GPIO_LCD_CS - GPIO_LCD_BASE,
"cs", GPIO_ACTIVE_HIGH),
{ },
},
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 20ca3e28c7fb..d105deb1e098 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -681,7 +681,7 @@ static struct platform_device bq24022 = {
static struct gpiod_lookup_table bq24022_gpiod_table = {
.dev_id = "gpio-regulator",
.table = {
- GPIO_LOOKUP("gpio-pxa", EGPIO_MAGICIAN_BQ24022_ISET2,
+ GPIO_LOOKUP("htc-egpio-0", EGPIO_MAGICIAN_BQ24022_ISET2 -
MAGICIAN_EGPIO_BASE,
NULL, GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO30_MAGICIAN_BQ24022_nCHARGE_EN,
"enable", GPIO_ACTIVE_LOW),
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 5af980d77d39..9476ed0f55e9 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -296,9 +296,9 @@ static struct gpiod_lookup_table tosa_mci_gpio_table = {
.table = {
GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_nSD_DETECT,
"cd", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_SD_WP,
+ GPIO_LOOKUP("sharp-scoop.0", TOSA_GPIO_SD_WP -
TOSA_SCOOP_GPIO_BASE,
"wp", GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("gpio-pxa", TOSA_GPIO_PWR_ON,
+ GPIO_LOOKUP("sharp-scoop.0", TOSA_GPIO_PWR_ON -
TOSA_SCOOP_GPIO_BASE,
"power", GPIO_ACTIVE_HIGH),
{ },
},
--
2.29.2
[PATCH 15/48] ARM: pxa: tosa: use gpio descriptor for audio
From: Arnd Bergmann
The audio driver should not use a hardwired gpio number
from the header. Change it to use a lookup table.
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/tosa.c | 12
sound/soc/pxa/tosa.c | 16 +++-
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 9476ed0f55e9..5a16a025192c 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -887,6 +887,17 @@ static struct platform_device wm9712_device = {
.id = -1,
};
+static struct gpiod_lookup_table tosa_audio_gpio_table = {
+ .dev_id = "tosa-audio",
+ .table = {
+ GPIO_LOOKUP("tc6393xb",
+ TOSA_GPIO_L_MUTE - TOSA_TC6393XB_GPIO_BASE,
+ "l-mute", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
+
static struct platform_device tosa_audio_device = {
.name = "tosa-audio",
.id = -1,
@@ -944,6 +955,7 @@ static void __init tosa_init(void)
PMCR = 0x01;
gpiod_add_lookup_table(&tosa_mci_gpio_table);
+ gpiod_add_lookup_table(&tosa_audio_gpio_table);
pxa_set_mci_info(&tosa_mci_platform_data);
pxa_set_ficp_info(&tosa_ficp_platform_data);
pxa_set_i2c_info(NULL);
diff --git a/sound/soc/pxa/tosa.c b/sound/soc/pxa/tosa.c
index 06226f9b863e..157e6bcacffd 100644
--- a/sound/soc/pxa/tosa.c
+++ b/sound/soc/pxa/tosa.c
@@ -16,14 +16,13 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
#include
-#include
#include
#define TOSA_HP0
@@ -35,6 +34,7 @@
static int tosa_jack_func;
static int tosa_spk_func;
+static struct gpio_desc *l_mute_gpio;
static void tosa_ext_control(struct snd_soc_dapm_context *dapm)
{
@@ -128,7 +128,7 @@ static int tosa_set_spk(struct snd_kcontrol *kcontrol,
static int tosa_hp_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- gpio_set_value(TOSA_GPIO_L_MUTE, SND_SOC_DAPM_EVENT_ON(event) ? 1 : 0);
+ gpiod_set_value(l_mute_gpio, SND_SOC_DAPM_EVENT_ON(event) ? 1 : 0);
return 0;
}
@@ -222,25 +222,23 @@ static int tosa_probe(struct platform_device *pdev)
struct snd_soc_card *card = ⤩
int ret;
- ret = gpio_request_one(TOSA_GPIO_L_MUTE, GPIOF_OUT_INIT_LOW,
- "Headphone Jack");
+ l_mute_gpio = devm_gpiod_get(&pdev->dev, "l-mute", GPIOD_OUT_LOW);
+ ret = PTR_ERR_OR_ZERO(l_mute_gpio);
if (ret)
return ret;
card->dev = &pdev->dev;
ret = devm_snd_soc_register_card(&pdev->dev, card);
- if (ret) {
+ if (ret)
dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
ret);
- gpio_free(TOSA_GPIO_L_MUTE);
- }
+
return ret;
}
static int tosa_remove(struct platform_device *pdev)
{
- gpio_free(TOSA_GPIO_L_MUTE);
return 0;
}
--
2.29.2
[PATCH 16/48] ARM: pxa: poodle: use platform data for poodle asoc driver
From: Arnd Bergmann
The poodle audio driver shows its age by using a custom
gpio api for the "locomo" support chip.
In a perfect world, this would get converted to use gpiolib
and a gpio lookup table.
As the world is not perfect, just pass all the required data
in a custom platform_data structure. to avoid the globally
visible mach/poodle.h header.
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/poodle.c| 30
arch/arm/mach-pxa/{include/mach => }/poodle.h | 4 +-
include/linux/platform_data/asoc-poodle.h | 16 ++
sound/soc/pxa/poodle.c| 49 ++-
4 files changed, 63 insertions(+), 36 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/poodle.h (97%)
create mode 100644 include/linux/platform_data/asoc-poodle.h
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ca52882433d4..7772a39430ed 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -39,11 +39,13 @@
#include
#include "pxa25x.h"
-#include
#include "udc.h"
+#include "poodle.h"
+
+#include
#include
-#include
#include
+#include
#include
#include
@@ -155,12 +157,6 @@ static struct scoop_pcmcia_config poodle_pcmcia_config = {
EXPORT_SYMBOL(poodle_scoop_device);
-
-static struct platform_device poodle_audio_device = {
- .name = "poodle-audio",
- .id = -1,
-};
-
/* LoCoMo device */
static struct resource locomo_resources[] = {
[0] = {
@@ -179,7 +175,7 @@ static struct locomo_platform_data locomo_info = {
.irq_base = IRQ_BOARD_START,
};
-struct platform_device poodle_locomo_device = {
+static struct platform_device poodle_locomo_device = {
.name = "locomo",
.id = 0,
.num_resources = ARRAY_SIZE(locomo_resources),
@@ -189,7 +185,21 @@ struct platform_device poodle_locomo_device = {
},
};
-EXPORT_SYMBOL(poodle_locomo_device);
+static struct poodle_audio_platform_data poodle_audio_pdata = {
+ .locomo_dev = &poodle_locomo_device.dev,
+
+ .gpio_amp_on= POODLE_LOCOMO_GPIO_AMP_ON,
+ .gpio_mute_l= POODLE_LOCOMO_GPIO_MUTE_L,
+ .gpio_mute_r= POODLE_LOCOMO_GPIO_MUTE_R,
+ .gpio_232vcc_on = POODLE_LOCOMO_GPIO_232VCC_ON,
+ .gpio_jk_b = POODLE_LOCOMO_GPIO_JK_B,
+};
+
+static struct platform_device poodle_audio_device = {
+ .name = "poodle-audio",
+ .id = -1,
+ .dev.platform_data = &poodle_audio_pdata,
+};
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
static struct pxa2xx_spi_controller poodle_spi_info = {
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h
b/arch/arm/mach-pxa/poodle.h
similarity index 97%
rename from arch/arm/mach-pxa/include/mach/poodle.h
rename to arch/arm/mach-pxa/poodle.h
index b56b19351a03..e675a3d1aa18 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/poodle.h
@@ -15,7 +15,7 @@
#ifndef __ASM_ARCH_POODLE_H
#define __ASM_ARCH_POODLE_H 1
-#include "irqs.h" /* PXA_GPIO_TO_IRQ */
+#include /* PXA_GPIO_TO_IRQ */
/*
* GPIOs
@@ -89,6 +89,4 @@
#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */
-extern struct platform_device poodle_locomo_device;
-
#endif /* __ASM_ARCH_POODLE_H */
diff --git a/include/linux/platform_data/asoc-poodle.h
b/include/linux/platform_data/asoc-poodle.h
new file mode 100644
index ..2052fad55c5c
--- /dev/null
+++ b/include/linux/platform_data/asoc-poodle.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __LINUX_PLATFORM_DATA_POODLE_AUDIO
+#define __LINUX_PLATFORM_DATA_POODLE_AUDIO
+
+/* locomo is not a proper gpio driver, and uses its own api */
+struct poodle_audio_platform_data {
+ struct device *locomo_dev;
+
+ int gpio_amp_on;
+ int gpio_mute_l;
+ int gpio_mute_r;
+ int gpio_232vcc_on;
+ int gpio_jk_b;
+};
+
+#endif
diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c
index 176a0441235a..5fdaa477e85d 100644
--- a/sound/soc/pxa/poodle.c
+++ b/sound/soc/pxa/poodle.c
@@ -21,8 +21,8 @@
#include
#include
-#include
#include
+#include
#include "../codecs/wm8731.h"
#include "pxa2xx-i2s.h"
@@ -38,21 +38,23 @@
static int poodle_jack_func;
static int poodle_spk_func;
+static struct poodle_audio_platform_data *poodle_pdata;
+
static void poodle_ext_control(struct snd_soc_dapm_context *dapm)
{
/* set up jack connection */
if (poodle_jack_func == POODLE_HP) {
/* set = unmute headphone */
- locomo_gpio_write(&poodle_locomo_device.dev,
- POODLE_LOCOMO_GPIO_MUTE_L, 1);
- locomo_gpio_write(&poodle_locomo_device.dev,
- POODLE_LOCOMO_GPIO_MUTE_R, 1);
+ locomo_gpio_wr
[PATCH 17/48] ARM: pxa: corgi: use gpio descriptors for audio
From: Arnd Bergmann
The audio driver should not use a hardwired gpio number
from the header. Change it to use a lookup table.
Acked-by: Mark Brown
Cc: alsa-de...@alsa-project.org
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/corgi.c| 22 ++-
arch/arm/mach-pxa/{include/mach => }/corgi.h | 2 +-
arch/arm/mach-pxa/corgi_pm.c | 2 +-
sound/soc/pxa/corgi.c| 41 +---
4 files changed, 51 insertions(+), 16 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/corgi.h (98%)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index f897762c8b58..c546356d0f02 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -49,7 +49,7 @@
#include
#include
#include "udc.h"
-#include
+#include "corgi.h"
#include "sharpsl_pm.h"
#include
@@ -472,6 +472,25 @@ static struct platform_device corgiled_device = {
},
};
+static struct gpiod_lookup_table corgi_audio_gpio_table = {
+ .dev_id = "corgi-audio",
+ .table = {
+ GPIO_LOOKUP("sharp-scoop",
+ CORGI_GPIO_MUTE_L - CORGI_SCOOP_GPIO_BASE,
+ "mute-l", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop",
+ CORGI_GPIO_MUTE_R - CORGI_SCOOP_GPIO_BASE,
+ "mute-r", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop",
+ CORGI_GPIO_APM_ON - CORGI_SCOOP_GPIO_BASE,
+ "apm-on", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop",
+ CORGI_GPIO_MIC_BIAS - CORGI_SCOOP_GPIO_BASE,
+ "mic-bias", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
/*
* Corgi Audio
*/
@@ -744,6 +763,7 @@ static void __init corgi_init(void)
pxa_set_udc_info(&udc_info);
gpiod_add_lookup_table(&corgi_mci_gpio_table);
+ gpiod_add_lookup_table(&corgi_audio_gpio_table);
pxa_set_mci_info(&corgi_mci_platform_data);
pxa_set_ficp_info(&corgi_ficp_platform_data);
pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/corgi.h
similarity index 98%
rename from arch/arm/mach-pxa/include/mach/corgi.h
rename to arch/arm/mach-pxa/corgi.h
index b565ca7b8cda..fe2fcf6532b9 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/corgi.h
@@ -9,7 +9,7 @@
#ifndef __ASM_ARCH_CORGI_H
#define __ASM_ARCH_CORGI_H 1
-#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
+#include /* PXA_NR_BUILTIN_GPIO */
/*
* Corgi (Non Standard) GPIO Definitions
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index ff1ac9bf37cb..c6ddfc737644 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -20,7 +20,7 @@
#include
#include
-#include
+#include "corgi.h"
#include
#include "sharpsl_pm.h"
diff --git a/sound/soc/pxa/corgi.c b/sound/soc/pxa/corgi.c
index 8b83709431cb..4489d2c8b124 100644
--- a/sound/soc/pxa/corgi.c
+++ b/sound/soc/pxa/corgi.c
@@ -21,7 +21,6 @@
#include
#include
-#include
#include
#include "../codecs/wm8731.h"
@@ -41,6 +40,9 @@
static int corgi_jack_func;
static int corgi_spk_func;
+static struct gpio_desc *gpiod_mute_l, *gpiod_mute_r,
+ *gpiod_apm_on, *gpiod_mic_bias;
+
static void corgi_ext_control(struct snd_soc_dapm_context *dapm)
{
snd_soc_dapm_mutex_lock(dapm);
@@ -49,8 +51,8 @@ static void corgi_ext_control(struct snd_soc_dapm_context
*dapm)
switch (corgi_jack_func) {
case CORGI_HP:
/* set = unmute headphone */
- gpio_set_value(CORGI_GPIO_MUTE_L, 1);
- gpio_set_value(CORGI_GPIO_MUTE_R, 1);
+ gpiod_set_value(gpiod_mute_l, 1);
+ gpiod_set_value(gpiod_mute_r, 1);
snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack");
snd_soc_dapm_enable_pin_unlocked(dapm, "Headphone Jack");
@@ -58,24 +60,24 @@ static void corgi_ext_control(struct snd_soc_dapm_context
*dapm)
break;
case CORGI_MIC:
/* reset = mute headphone */
- gpio_set_value(CORGI_GPIO_MUTE_L, 0);
- gpio_set_value(CORGI_GPIO_MUTE_R, 0);
+ gpiod_set_value(gpiod_mute_l, 0);
+ gpiod_set_value(gpiod_mute_r, 0);
snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Headphone Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack");
break;
case CORGI_LINE:
- gpio_set_value(CORGI_GPIO_MUTE_L, 0);
- gpio_set_value(CORGI_GPIO_MUTE_R, 0);
+
[PATCH 18/48] ARM: pxa: hx4700: use gpio descriptors for audio
From: Arnd Bergmann
The audio driver should not use a hardwired gpio number
from the header. Change it to use a lookup table.
Cc: Philipp Zabel
Cc: Paul Parsons
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/hx4700-pcmcia.c | 2 +-
arch/arm/mach-pxa/hx4700.c| 16 -
arch/arm/mach-pxa/{include/mach => }/hx4700.h | 2 +-
sound/soc/pxa/hx4700.c| 34 ---
4 files changed, 31 insertions(+), 23 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/hx4700.h (99%)
diff --git a/arch/arm/mach-pxa/hx4700-pcmcia.c
b/arch/arm/mach-pxa/hx4700-pcmcia.c
index e8acbfc9ef6c..e2331dfe427d 100644
--- a/arch/arm/mach-pxa/hx4700-pcmcia.c
+++ b/arch/arm/mach-pxa/hx4700-pcmcia.c
@@ -10,7 +10,7 @@
#include
#include
-#include
+#include "hx4700.h"
#include
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 140a44cb2989..2b7f37172725 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -41,7 +41,7 @@
#include "pxa27x.h"
#include "addr-map.h"
-#include
+#include "hx4700.h"
#include
#include
@@ -834,6 +834,19 @@ static struct i2c_board_info i2c_board_info[] __initdata =
{
},
};
+static struct gpiod_lookup_table hx4700_audio_gpio_table = {
+ .dev_id = "hx4700-audio",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", GPIO75_HX4700_EARPHONE_nDET,
+ "earphone-ndet", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("gpio-pxa", GPIO92_HX4700_HP_DRIVER,
+ "hp-driver", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("gpio-pxa", GPIO107_HX4700_SPK_nSD,
+ "spk-nsd", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static struct platform_device audio = {
.name = "hx4700-audio",
.id = -1,
@@ -895,6 +908,7 @@ static void __init hx4700_init(void)
gpiod_add_lookup_table(&bq24022_gpiod_table);
gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
+ gpiod_add_lookup_table(&hx4700_audio_gpio_table);
platform_add_devices(devices, ARRAY_SIZE(devices));
pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h
b/arch/arm/mach-pxa/hx4700.h
similarity index 99%
rename from arch/arm/mach-pxa/include/mach/hx4700.h
rename to arch/arm/mach-pxa/hx4700.h
index 0c30e6d9c660..ce2db33989e1 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/hx4700.h
@@ -10,7 +10,7 @@
#include
#include
-#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
+#include /* PXA_NR_BUILTIN_GPIO */
#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
diff --git a/sound/soc/pxa/hx4700.c b/sound/soc/pxa/hx4700.c
index 7334fac758de..e70dc38d9892 100644
--- a/sound/soc/pxa/hx4700.c
+++ b/sound/soc/pxa/hx4700.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include
#include
#include
@@ -18,10 +18,10 @@
#include
#include
-#include
#include
#include "pxa2xx-i2s.h"
+static struct gpio_desc *gpiod_hp_driver, *gpiod_spk_nsd;
static struct snd_soc_jack hs_jack;
/* Headphones jack detection DAPM pin */
@@ -40,9 +40,8 @@ static struct snd_soc_jack_pin hs_jack_pin[] = {
/* Headphones jack detection GPIO */
static struct snd_soc_jack_gpio hs_jack_gpio = {
- .gpio = GPIO75_HX4700_EARPHONE_nDET,
.invert = true,
- .name = "hp-gpio",
+ .name = "earphone-ndet",
.report = SND_JACK_HEADPHONE,
.debounce_time = 200,
};
@@ -81,14 +80,14 @@ static const struct snd_soc_ops hx4700_ops = {
static int hx4700_spk_power(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- gpio_set_value(GPIO107_HX4700_SPK_nSD, !!SND_SOC_DAPM_EVENT_ON(event));
+ gpiod_set_value(gpiod_spk_nsd, !!SND_SOC_DAPM_EVENT_ON(event));
return 0;
}
static int hx4700_hp_power(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- gpio_set_value(GPIO92_HX4700_HP_DRIVER, !!SND_SOC_DAPM_EVENT_ON(event));
+ gpiod_set_value(gpiod_hp_driver, !!SND_SOC_DAPM_EVENT_ON(event));
return 0;
}
@@ -162,11 +161,6 @@ static struct snd_soc_card snd_soc_card_hx4700 = {
.fully_routed = true,
};
-static struct gpio hx4700_audio_gpios[] = {
- { GPIO107_HX4700_SPK_nSD, GPIOF_OUT_INIT_HIGH, "SPK_POWER" },
- { GPIO92_HX4700_HP_DRIVER, GPIOF_OUT_INIT_LOW, "EP_POWER" },
-};
-
static int hx4700_audio_probe(struct platform_device *pdev)
{
int ret;
@@ -174,26 +168,26 @@ static int hx4700_audio_probe(struct platform_device
*pdev)
if (!machine_is_h4700())
return -ENODEV;
- ret =
[PATCH 19/48] ARM: pxa: lubbock: pass udc irqs as resource
From: Arnd Bergmann
Lubbock is the only machine that has three IRQs for the UDC.
These are currently hardcoded in the driver based on a
machine header file.
Change this to use platform device resources as we use for
the generic IRQ anyway.
Cc: Felipe Balbi
Cc: Greg Kroah-Hartman
Cc: linux-...@vger.kernel.org
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/lubbock.c | 12 +-
.../arm/mach-pxa/{include/mach => }/lubbock.h | 2 -
drivers/usb/gadget/udc/pxa25x_udc.c | 37 ++-
drivers/usb/gadget/udc/pxa25x_udc.h | 7 +---
4 files changed, 32 insertions(+), 26 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/lubbock.h (97%)
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 46aef93c0615..201f89f49642 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -46,7 +46,7 @@
#include "pxa25x.h"
#include
-#include
+#include "lubbock.h"
#include "udc.h"
#include
#include
@@ -131,6 +131,13 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
// no D+ pullup; lubbock can't connect/disconnect in software
};
+static struct resource lubbock_udc_resources[] = {
+ DEFINE_RES_MEM(0x4060, 0x1),
+ DEFINE_RES_IRQ(IRQ_USB),
+ DEFINE_RES_IRQ(LUBBOCK_USB_IRQ),
+ DEFINE_RES_IRQ(LUBBOCK_USB_DISC_IRQ),
+};
+
/* GPIOs for SA PCMCIA */
static struct gpiod_lookup_table sa_pcmcia_gpio_table = {
.dev_id = "1800",
@@ -496,6 +503,9 @@ static void __init lubbock_init(void)
lubbock_init_pcmcia();
clk_add_alias("SA_CLK", NULL, "GPIO11_CLK", NULL);
+ /* lubbock has two extra IRQs */
+ pxa25x_device_udc.resource = lubbock_udc_resources;
+ pxa25x_device_udc.num_resources = ARRAY_SIZE(lubbock_udc_resources);
pxa_set_udc_info(&udc_info);
pxa_set_fb_info(NULL, &sharp_lm8v31);
pxa_set_mci_info(&lubbock_mci_platform_data);
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h
b/arch/arm/mach-pxa/lubbock.h
similarity index 97%
rename from arch/arm/mach-pxa/include/mach/lubbock.h
rename to arch/arm/mach-pxa/lubbock.h
index a3af4a2f9446..8e3ff7d57121 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/lubbock.h
@@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * arch/arm/mach-pxa/include/mach/lubbock.h
- *
* Author:Nicolas Pitre
* Created: Jun 15, 2001
* Copyright: MontaVista Software Inc.
diff --git a/drivers/usb/gadget/udc/pxa25x_udc.c
b/drivers/usb/gadget/udc/pxa25x_udc.c
index 6c414c99d01c..c593fc383481 100644
--- a/drivers/usb/gadget/udc/pxa25x_udc.c
+++ b/drivers/usb/gadget/udc/pxa25x_udc.c
@@ -44,10 +44,6 @@
#include
#include
-#ifdef CONFIG_ARCH_LUBBOCK
-#include
-#endif
-
#define UDCCR 0x /* UDC Control Register */
#define UDC_RES1 0x0004 /* UDC Undocumented - Reserved1 */
#define UDC_RES2 0x0008 /* UDC Undocumented - Reserved2 */
@@ -1578,18 +1574,15 @@ lubbock_vbus_irq(int irq, void *_dev)
int vbus;
dev->stats.irqs++;
- switch (irq) {
- case LUBBOCK_USB_IRQ:
+ if (irq == dev->usb_irq) {
vbus = 1;
- disable_irq(LUBBOCK_USB_IRQ);
- enable_irq(LUBBOCK_USB_DISC_IRQ);
- break;
- case LUBBOCK_USB_DISC_IRQ:
+ disable_irq(dev->usb_irq);
+ enable_irq(dev->usb_disc_irq);
+ } else if (irq == dev->usb_disc_irq) {
vbus = 0;
- disable_irq(LUBBOCK_USB_DISC_IRQ);
- enable_irq(LUBBOCK_USB_IRQ);
- break;
- default:
+ disable_irq(dev->usb_disc_irq);
+ enable_irq(dev->usb_irq);
+ } else {
return IRQ_NONE;
}
@@ -2422,20 +2415,28 @@ static int pxa25x_udc_probe(struct platform_device
*pdev)
#ifdef CONFIG_ARCH_LUBBOCK
if (machine_is_lubbock()) {
- retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_DISC_IRQ,
+ dev->usb_irq = platform_get_irq(pdev, 1);
+ if (dev->usb_irq < 0)
+ return dev->usb_irq;
+
+ dev->usb_disc_irq = platform_get_irq(pdev, 2);
+ if (dev->usb_disc_irq < 0)
+ return dev->usb_disc_irq;
+
+ retval = devm_request_irq(&pdev->dev, dev->usb_disc_irq,
lubbock_vbus_irq, 0, driver_name,
dev);
if (retval != 0) {
pr_err("%s: can't get irq %i, err %d\n",
- driver_name, LUBBOCK_USB_DISC_IRQ, retval);
+ driver_name, dev->usb_disc_irq, retval);
goto err;
}
- retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_IRQ,
+ retval = devm_request_irq(&p
[PATCH 20/48] ARM: pxa: spitz: use gpio descriptors for audio
From: Arnd Bergmann
The audio driver should not use a hardwired gpio number
from the header. Change it to use a lookup table.
Acked-by: Mark Brown
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/spitz.c| 33 ++-
arch/arm/mach-pxa/{include/mach => }/spitz.h | 2 +-
arch/arm/mach-pxa/spitz_pm.c | 2 +-
sound/soc/pxa/spitz.c| 58
4 files changed, 57 insertions(+), 38 deletions(-)
rename arch/arm/mach-pxa/{include/mach => }/spitz.h (99%)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index a648e7094e84..cd8f00945373 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -44,7 +44,7 @@
#include
#include
#include
-#include
+#include "spitz.h"
#include "sharpsl_pm.h"
#include
@@ -962,11 +962,42 @@ static void __init spitz_i2c_init(void)
static inline void spitz_i2c_init(void) {}
#endif
+static struct gpiod_lookup_table spitz_audio_gpio_table = {
+ .dev_id = "spitz-audio",
+ .table = {
+ GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L -
SPITZ_SCP_GPIO_BASE,
+ "mute-l", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R -
SPITZ_SCP_GPIO_BASE,
+ "mute-r", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop.1", SPITZ_GPIO_MIC_BIAS -
SPITZ_SCP2_GPIO_BASE,
+ "mic", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
+static struct gpiod_lookup_table akita_audio_gpio_table = {
+ .dev_id = "spitz-audio",
+ .table = {
+ GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L -
SPITZ_SCP_GPIO_BASE,
+ "mute-l", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R -
SPITZ_SCP_GPIO_BASE,
+ "mute-r", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("i2c-max7310", AKITA_GPIO_MIC_BIAS -
AKITA_IOEXP_GPIO_BASE,
+ "mic", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
/**
* Audio devices
**/
static inline void spitz_audio_init(void)
{
+ if (machine_is_akita())
+ gpiod_add_lookup_table(&akita_audio_gpio_table);
+ else
+ gpiod_add_lookup_table(&spitz_audio_gpio_table);
+
platform_device_register_simple("spitz-audio", -1, NULL, 0);
}
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/spitz.h
similarity index 99%
rename from arch/arm/mach-pxa/include/mach/spitz.h
rename to arch/arm/mach-pxa/spitz.h
index 04828d8918aa..f97e3ebd762d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/spitz.h
@@ -11,7 +11,7 @@
#define __ASM_ARCH_SPITZ_H 1
#endif
-#include "irqs.h" /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */
+#include /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */
#include
/* Spitz/Akita GPIOs */
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 201dabe883b6..6689b67f9ce5 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -19,7 +19,7 @@
#include
#include
-#include
+#include "spitz.h"
#include "pxa27x.h"
#include "sharpsl_pm.h"
diff --git a/sound/soc/pxa/spitz.c b/sound/soc/pxa/spitz.c
index 7c1384a869ca..44303b6eb228 100644
--- a/sound/soc/pxa/spitz.c
+++ b/sound/soc/pxa/spitz.c
@@ -14,13 +14,12 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
#include
-#include
#include "../codecs/wm8750.h"
#include "pxa2xx-i2s.h"
@@ -37,7 +36,7 @@
static int spitz_jack_func;
static int spitz_spk_func;
-static int spitz_mic_gpio;
+static struct gpio_desc *gpiod_mic, *gpiod_mute_l, *gpiod_mute_r;
static void spitz_ext_control(struct snd_soc_dapm_context *dapm)
{
@@ -56,8 +55,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context
*dapm)
snd_soc_dapm_disable_pin_unlocked(dapm, "Mic Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack");
snd_soc_dapm_enable_pin_unlocked(dapm, "Headphone Jack");
- gpio_set_value(SPITZ_GPIO_MUTE_L, 1);
- gpio_set_value(SPITZ_GPIO_MUTE_R, 1);
+ gpiod_set_value(gpiod_mute_l, 1);
+ gpiod_set_value(gpiod_mute_r, 1);
break;
case SPITZ_MIC:
/* enable mic jack and bias, mute hp */
@@ -65,8 +64,8 @@ static void spitz_ext_control(struct snd_soc_dapm_context
*dapm)
snd_soc_dapm_disable_pin_unlocked(dapm, "Headset Jack");
snd_soc_dapm_disable_pin_unlocked(dapm, "Line Jack");
snd_soc_dapm_enable_pin_unlocked(dapm, "Mic Jack");
- gpio_set_value(SPITZ_GPIO_MUTE_L, 0);
-
[PATCH 21/48] ARM: pxa: eseries: use gpio lookup for audio
From: Arnd Bergmann
The three eseries machines have very similar drivers for audio, all
using the mach/eseries-gpio.h header for finding the gpio numbers.
Change these to use gpio descriptors to avoid the header file
dependency.
I convert the _OFF gpio numbers into GPIO_ACTIVE_LOW ones for
consistency here.
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Reviewed-by: Linus Walleij
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/eseries.c | 32
sound/soc/pxa/e740_wm9705.c | 35 ++-
sound/soc/pxa/e750_wm9705.c | 31 ++-
sound/soc/pxa/e800_wm9712.c | 31 ++-
4 files changed, 78 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index a8b6483ff665..2643a2a72408 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
@@ -520,6 +521,16 @@ static struct platform_device e740_audio_device = {
.id = -1,
};
+static struct gpiod_lookup_table e740_audio_gpio_table = {
+ .dev_id = "e740-audio",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", GPIO_E740_WM9705_nAVDD2, "Audio
power", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("gpio-pxa", GPIO_E740_AMP_ON, "Output amp",
GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("gpio-pxa", GPIO_E740_MIC_ON, "Mic amp",
GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
/* --- */
static struct platform_device *e740_devices[] __initdata = {
@@ -540,6 +551,7 @@ static void __init e740_init(void)
"UDCCLK", &pxa25x_device_udc.dev),
eseries_get_tmio_gpios();
gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
+ gpiod_add_lookup_table(&e740_audio_gpio_table);
platform_add_devices(ARRAY_AND_SIZE(e740_devices));
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
@@ -716,6 +728,15 @@ static struct platform_device e750_tc6393xb_device = {
.resource = eseries_tmio_resources,
};
+static struct gpiod_lookup_table e750_audio_gpio_table = {
+ .dev_id = "e750-audio",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", GPIO_E750_HP_AMP_OFF, "Output amp",
GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio-pxa", GPIO_E750_SPK_AMP_OFF, "Mic amp",
GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
static struct platform_device e750_audio_device = {
.name = "e750-audio",
.id = -1,
@@ -740,6 +761,7 @@ static void __init e750_init(void)
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
gpiod_add_lookup_table(&e7xx_gpio_vbus_gpiod_table);
+ gpiod_add_lookup_table(&e750_audio_gpio_table);
platform_add_devices(ARRAY_AND_SIZE(e750_devices));
pxa_set_ac97_info(NULL);
pxa_set_ficp_info(&e7xx_ficp_platform_data);
@@ -935,6 +957,15 @@ static struct platform_device e800_tc6393xb_device = {
.resource = eseries_tmio_resources,
};
+static struct gpiod_lookup_table e800_audio_gpio_table = {
+ .dev_id = "e800-audio",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", GPIO_E800_HP_AMP_OFF, "Output amp",
GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio-pxa", GPIO_E800_SPK_AMP_ON, "Mic amp",
GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static struct platform_device e800_audio_device = {
.name = "e800-audio",
.id = -1,
@@ -959,6 +990,7 @@ static void __init e800_init(void)
"GPIO11_CLK", NULL),
eseries_get_tmio_gpios();
gpiod_add_lookup_table(&e800_gpio_vbus_gpiod_table);
+ gpiod_add_lookup_table(&e800_audio_gpio_table);
platform_add_devices(ARRAY_AND_SIZE(e800_devices));
pxa_set_ac97_info(NULL);
}
diff --git a/sound/soc/pxa/e740_wm9705.c b/sound/soc/pxa/e740_wm9705.c
index f922be7e0016..4e0e9b778d4c 100644
--- a/sound/soc/pxa/e740_wm9705.c
+++ b/sound/soc/pxa/e740_wm9705.c
@@ -7,17 +7,19 @@
#include
#include
-#include
+#include
#include
#include
#include
#include
-#include
#include
+static struct gpio_desc *gpiod_output_amp, *gpiod_input_amp;
+static struct gpio_desc *gpiod_audio_power;
+
#define E740_AUDIO_OUT 1
#define E740_AUDIO_IN 2
@@ -25,9 +27,9 @@ static int e740_audio_power;
static void e740_sync_audio_power(int status)
{
- gpio_set_value(GPIO_E740_WM9705_nAVDD2, !status);
- gpio_set_value(GPIO_E740_AMP_ON, (status & E740_AUDIO_OUT) ? 1 : 0);
- gpio_set_value(GPIO_E740_MIC_ON, (status & E740_AUDIO_IN) ? 1 : 0);
+ gpiod_set_value(gpiod_audio_power, !status);
+ gpiod_set_value(gpiod_output_amp, (status & E740_AUDIO_OUT) ? 1 : 0);
+ gpiod_
[PATCH 22/48] ARM: pxa: z2: use gpio lookup for audio device
From: Arnd Bergmann
The audio device is allocated by the audio driver, and it uses a gpio
number from the mach/z2.h header file.
Change it to use a gpio lookup table for the device allocated by the
driver to keep the header file local to the machine.
Acked-by: Mark Brown
Cc: alsa-de...@alsa-project.org
Reviewed-by: Linus Walleij
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/z2.c | 11 +++
sound/soc/pxa/z2.c | 5 ++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 7eaeda269927..bb854e903c8f 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -651,6 +651,15 @@ static void __init z2_spi_init(void)
static inline void z2_spi_init(void) {}
#endif
+static struct gpiod_lookup_table z2_audio_gpio_table = {
+ .dev_id = "soc-audio",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", GPIO37_ZIPITZ2_HEADSET_DETECT,
+ "hsdet-gpio", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
/**
* Core power regulator
**/
@@ -755,6 +764,8 @@ static void __init z2_init(void)
z2_keys_init();
z2_pmic_init();
+ gpiod_add_lookup_table(&z2_audio_gpio_table);
+
pm_power_off = z2_power_off;
}
diff --git a/sound/soc/pxa/z2.c b/sound/soc/pxa/z2.c
index dc6c48e4738b..7f1c6bc69510 100644
--- a/sound/soc/pxa/z2.c
+++ b/sound/soc/pxa/z2.c
@@ -13,7 +13,7 @@
#include
#include
#include
-#include
+#include
#include
#include
@@ -22,7 +22,6 @@
#include
#include
-#include
#include "../codecs/wm8750.h"
#include "pxa2xx-i2s.h"
@@ -89,7 +88,6 @@ static struct snd_soc_jack_pin hs_jack_pins[] = {
/* Headset jack detection gpios */
static struct snd_soc_jack_gpio hs_jack_gpios[] = {
{
- .gpio = GPIO37_ZIPITZ2_HEADSET_DETECT,
.name = "hsdet-gpio",
.report = SND_JACK_HEADSET,
.debounce_time = 200,
@@ -195,6 +193,7 @@ static int __init z2_init(void)
if (!z2_snd_device)
return -ENOMEM;
+ hs_jack_gpios[0].gpiod_dev = &z2_snd_device->dev;
platform_set_drvdata(z2_snd_device, &snd_soc_z2);
ret = platform_device_add(z2_snd_device);
--
2.29.2
[PATCH 23/48] ARM: pxa: magician: use platform driver for audio
From: Arnd Bergmann
The magician audio driver creates a codec device and gets
data from a board specific header file, both of which is
a bit suspicious. Move these into the board file itself,
using a gpio lookup table.
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/magician.c | 50 +
sound/soc/pxa/magician.c | 141 +--
2 files changed, 87 insertions(+), 104 deletions(-)
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index d105deb1e098..598c977a8ae6 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -53,6 +53,7 @@
#include
#include
#include
+#include
static unsigned long magician_pin_config[] __initdata = {
@@ -898,6 +899,53 @@ static struct platform_device strataflash = {
},
};
+/*
+ * audio support
+ */
+static struct uda1380_platform_data uda1380_info = {
+ .gpio_power = EGPIO_MAGICIAN_CODEC_POWER,
+ .gpio_reset = EGPIO_MAGICIAN_CODEC_RESET,
+ .dac_clk= UDA1380_DAC_CLK_WSPLL,
+};
+
+static struct i2c_board_info magician_audio_i2c_board_info[] = {
+ {
+ I2C_BOARD_INFO("uda1380", 0x18),
+ .platform_data = &uda1380_info,
+ },
+};
+
+static struct gpiod_lookup_table magician_audio_gpio_table = {
+ .dev_id = "magician-audio",
+ .table = {
+ GPIO_LOOKUP("htc-egpio-0",
+ EGPIO_MAGICIAN_SPK_POWER - MAGICIAN_EGPIO_BASE,
+ "SPK_POWER", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("htc-egpio-0",
+ EGPIO_MAGICIAN_EP_POWER - MAGICIAN_EGPIO_BASE,
+ "EP_POWER", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("htc-egpio-0",
+ EGPIO_MAGICIAN_MIC_POWER - MAGICIAN_EGPIO_BASE,
+ "MIC_POWER", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("htc-egpio-0",
+ EGPIO_MAGICIAN_IN_SEL0 - MAGICIAN_EGPIO_BASE,
+ "IN_SEL0", GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP("htc-egpio-0",
+ EGPIO_MAGICIAN_IN_SEL1 - MAGICIAN_EGPIO_BASE,
+ "IN_SEL1", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
+static void magician_audio_init(void)
+{
+ i2c_register_board_info(0,
+ ARRAY_AND_SIZE(magician_audio_i2c_board_info));
+
+ gpiod_add_lookup_table(&magician_audio_gpio_table);
+ platform_device_register_simple("magician-audio", -1, NULL, 0);
+}
+
/*
* PXA I2C main controller
*/
@@ -1048,6 +1096,8 @@ static void __init magician_init(void)
gpiod_add_lookup_table(&bq24022_gpiod_table);
gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
platform_add_devices(ARRAY_AND_SIZE(devices));
+
+ magician_audio_init();
}
MACHINE_START(MAGICIAN, "HTC Magician")
diff --git a/sound/soc/pxa/magician.c b/sound/soc/pxa/magician.c
index a5f326c97af2..9433cc927755 100644
--- a/sound/soc/pxa/magician.c
+++ b/sound/soc/pxa/magician.c
@@ -14,16 +14,14 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
#include
#include
-#include
-#include
#include
#include "../codecs/uda1380.h"
#include "pxa2xx-i2s.h"
@@ -36,6 +34,9 @@ static int magician_hp_switch;
static int magician_spk_switch = 1;
static int magician_in_sel = MAGICIAN_MIC;
+static struct gpio_desc *gpiod_spk_power, *gpiod_ep_power, *gpiod_mic_power;
+static struct gpio_desc *gpiod_in_sel0, *gpiod_in_sel1;
+
static void magician_ext_control(struct snd_soc_dapm_context *dapm)
{
@@ -215,10 +216,10 @@ static int magician_set_input(struct snd_kcontrol
*kcontrol,
switch (magician_in_sel) {
case MAGICIAN_MIC:
- gpio_set_value(EGPIO_MAGICIAN_IN_SEL1, 1);
+ gpiod_set_value(gpiod_in_sel1, 1);
break;
case MAGICIAN_MIC_EXT:
- gpio_set_value(EGPIO_MAGICIAN_IN_SEL1, 0);
+ gpiod_set_value(gpiod_in_sel1, 0);
}
return 1;
@@ -227,21 +228,21 @@ static int magician_set_input(struct snd_kcontrol
*kcontrol,
static int magician_spk_power(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- gpio_set_value(EGPIO_MAGICIAN_SPK_POWER, SND_SOC_DAPM_EVENT_ON(event));
+ gpiod_set_value(gpiod_spk_power, SND_SOC_DAPM_EVENT_ON(event));
return 0;
}
static int magician_hp_power(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
{
- gpio_set_value(EGPIO_MAGICIAN_EP_POWER, SND_SOC_DAPM_EVENT_ON(event));
+ gpiod_set_value(gpiod_ep_power, SND_SOC_DAPM_EVENT_ON(event));
return 0;
}
static int magician_mic_bias(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *k, int event)
[PATCH 24/48] ARM: pxa: mainstone-wm97xx: use gpio lookup table
From: Arnd Bergmann
This driver hardcodes gpio numbers without a header file.
Use lookup tables instead.
Cc: Marek Vasut
Acked-by: Dmitry Torokhov
Acked-by: Robert Jarzmik
Reviewed-by: Linus Walleij
Cc: linux-in...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/mainstone.c| 9 +
arch/arm/mach-pxa/palmld.c | 9 +
arch/arm/mach-pxa/palmt5.c | 9 +
arch/arm/mach-pxa/palmtx.c | 9 +
drivers/input/touchscreen/mainstone-wm97xx.c | 35
5 files changed, 50 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f0072e63b456..599736c93163 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -548,6 +548,14 @@ static struct gpiod_lookup_table
mainstone_pcmcia_gpio_table = {
},
};
+static struct gpiod_lookup_table mainstone_wm97xx_gpio_table = {
+ .dev_id = "wm97xx-touch",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", 4, "touch", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static void __init mainstone_init(void)
{
int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
@@ -562,6 +570,7 @@ static void __init mainstone_init(void)
"mst-pcmcia1", MST_PCMCIA_INPUTS, 0, NULL,
NULL, mst_pcmcia1_irqs);
gpiod_add_lookup_table(&mainstone_pcmcia_gpio_table);
+ gpiod_add_lookup_table(&mainstone_wm97xx_gpio_table);
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index d821606ce0b5..32308c63884e 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,6 +347,14 @@ static struct gpiod_lookup_table palmld_mci_gpio_table = {
},
};
+static struct gpiod_lookup_table palmld_wm97xx_touch_gpio_table = {
+ .dev_id = "wm97xx-touch",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static void __init palmld_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config));
@@ -355,6 +363,7 @@ static void __init palmld_init(void)
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmld_mci_gpio_table);
+ gpiod_add_lookup_table(&palmld_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMLD_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_irda_init(GPIO_NR_PALMLD_IR_DISABLE);
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 460a8b1043a5..463b62ec1b01 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -190,6 +190,14 @@ static struct gpiod_lookup_table palmt5_mci_gpio_table = {
},
};
+static struct gpiod_lookup_table palmt5_wm97xx_touch_gpio_table = {
+ .dev_id = "wm97xx-touch",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static void __init palmt5_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config));
@@ -198,6 +206,7 @@ static void __init palmt5_init(void)
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmt5_mci_gpio_table);
+ gpiod_add_lookup_table(&palmt5_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMT5_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_udc_init(GPIO_NR_PALMT5_USB_DETECT_N,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 86460d6ea721..c0d0762540ab 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -345,6 +345,14 @@ static struct gpiod_lookup_table palmtx_mci_gpio_table = {
},
};
+static struct gpiod_lookup_table palmtx_wm97xx_touch_gpio_table = {
+ .dev_id = "wm97xx-touch",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
+ { },
+ },
+};
+
static void __init palmtx_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
@@ -353,6 +361,7 @@ static void __init palmtx_init(void)
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmtx_mci_gpio_table);
+ gpiod_add_lookup_table(&palmtx_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMTX_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_udc_init(GPIO_NR_PALMTX_USB_DETECT_N,
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c
b/drivers/input/touchscreen/mainstone-wm97xx.c
index f8564b398eb3..87655105ef3a 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -58,7 +59,7 @@ static const struct continuous cinfo[] = {
/* continuous speed index */
static int sp_idx;
static u16 last,
[PATCH 25/48] ARM: pxa: zylonite: use gpio lookup instead mfp header
From: Arnd Bergmann
The mach/mfp.h header is only used by this one driver
for hardcoded gpio numbers. Change that to use a lookup
table instead.
Cc: Dmitry Torokhov
Cc: linux-in...@vger.kernel.org
Acked-by: Robert Jarzmik
Acked-by: Linus Walleij
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/zylonite.c| 31 +
drivers/input/touchscreen/zylonite-wm97xx.c | 20 +++--
2 files changed, 42 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index c48dd6d03df9..ba6dc86da855 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
#include "devices.h"
#include "generic.h"
@@ -425,6 +426,35 @@ static void __init zylonite_init_ohci(void)
static inline void zylonite_init_ohci(void) {}
#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
+static struct gpiod_lookup_table zylonite_wm97xx_touch_gpio15_table = {
+ .dev_id = "wm97xx-touch.0",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", mfp_to_gpio(MFP_PIN_GPIO15),
+ "touch", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
+static struct gpiod_lookup_table zylonite_wm97xx_touch_gpio26_table = {
+ .dev_id = "wm97xx-touch.0",
+ .table = {
+ GPIO_LOOKUP("gpio-pxa", mfp_to_gpio(MFP_PIN_GPIO26),
+ "touch", GPIO_ACTIVE_LOW),
+ { },
+ },
+};
+
+static void __init zylonite_init_wm97xx_touch(void)
+{
+ if (!IS_ENABLED(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE))
+ return;
+
+ if (cpu_is_pxa320())
+ gpiod_add_lookup_table(&zylonite_wm97xx_touch_gpio15_table);
+ else
+ gpiod_add_lookup_table(&zylonite_wm97xx_touch_gpio26_table);
+}
+
static void __init zylonite_init(void)
{
pxa_set_ffuart_info(NULL);
@@ -450,6 +480,7 @@ static void __init zylonite_init(void)
zylonite_init_nand();
zylonite_init_leds();
zylonite_init_ohci();
+ zylonite_init_wm97xx_touch();
}
MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c
b/drivers/input/touchscreen/zylonite-wm97xx.c
index f57bdf083188..cabdd6e3c6f8 100644
--- a/drivers/input/touchscreen/zylonite-wm97xx.c
+++ b/drivers/input/touchscreen/zylonite-wm97xx.c
@@ -17,14 +17,13 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
#include
#include
-#include
#include
struct continuous {
@@ -181,14 +180,17 @@ static struct wm97xx_mach_ops zylonite_mach_ops = {
static int zylonite_wm97xx_probe(struct platform_device *pdev)
{
struct wm97xx *wm = platform_get_drvdata(pdev);
- int gpio_touch_irq;
-
- if (cpu_is_pxa320())
- gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO15);
- else
- gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26);
+ struct gpio_desc *gpio_touch_irq;
+ int err;
+
+ gpio_touch_irq = devm_gpiod_get(&pdev->dev, "touch", GPIOD_IN);
+ err = PTR_ERR_OR_ZERO(gpio_touch_irq);
+ if (err) {
+ dev_err(&pdev->dev, "Cannot get irq gpio: %d\n", err);
+ return err;
+ }
- wm->pen_irq = gpio_to_irq(gpio_touch_irq);
+ wm->pen_irq = gpiod_to_irq(gpio_touch_irq);
irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH);
wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
--
2.29.2
[PATCH 26/48] input: touchscreen: mainstone: fix pxa2xx+pxa3xx configuration
From: Arnd Bergmann
There are two different ways of flushing the ac97 queue
in this driver, selected by a compile time option.
Change this to a runtime selection to make it work when both
are enabled.
Acked-by: Dmitry Torokhov
Acked-by: Robert Jarzmik
Cc: linux-in...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
drivers/input/touchscreen/mainstone-wm97xx.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c
b/drivers/input/touchscreen/mainstone-wm97xx.c
index 87655105ef3a..618c80847d9f 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -98,25 +98,20 @@ MODULE_PARM_DESC(ac97_touch_slot, "Touch screen data slot
AC97 number");
/* flush AC97 slot 5 FIFO on pxa machines */
-#ifdef CONFIG_PXA27x
-static void wm97xx_acc_pen_up(struct wm97xx *wm)
-{
- schedule_timeout_uninterruptible(1);
-
- while (MISR & (1 << 2))
- MODR;
-}
-#else
static void wm97xx_acc_pen_up(struct wm97xx *wm)
{
unsigned int count;
schedule_timeout_uninterruptible(1);
- for (count = 0; count < 16; count++)
- MODR;
+ if (cpu_is_pxa27x()) {
+ while (MISR & (1 << 2))
+ MODR;
+ } else if (cpu_is_pxa3xx()) {
+ for (count = 0; count < 16; count++)
+ MODR;
+ }
}
-#endif
static int wm97xx_acc_pen_down(struct wm97xx *wm)
{
--
2.29.2
[PATCH 27/48] input: touchscreen: mainstone: sync with zylonite driver
From: Arnd Bergmann
The two drivers are almost identical and can work on a variety
of hardware in principle. The mainstone driver supports additional
hardware, and the zylonite driver has a few cleanup patches.
Sync the two by adding the zylonite changes into the mainstone
one, and checking for the zylonite board to order to keep the
default behavior (interrupt enabled) there.
Acked-by: Dmitry Torokhov
Cc: linux-in...@vger.kernel.org
Signed-off-by: Arnd Bergmann
---
drivers/input/touchscreen/mainstone-wm97xx.c | 59 ++--
1 file changed, 31 insertions(+), 28 deletions(-)
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c
b/drivers/input/touchscreen/mainstone-wm97xx.c
index 618c80847d9f..940d3c92b1f8 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -24,9 +24,9 @@
#include
#include
#include
-#include
#include
-#include
+#include
+#include
#include
@@ -42,23 +42,22 @@ struct continuous {
#define WM_READS(sp) ((sp / HZ) + 1)
static const struct continuous cinfo[] = {
- {WM9705_ID2, 0, WM_READS(94), 94},
- {WM9705_ID2, 1, WM_READS(188), 188},
- {WM9705_ID2, 2, WM_READS(375), 375},
- {WM9705_ID2, 3, WM_READS(750), 750},
- {WM9712_ID2, 0, WM_READS(94), 94},
- {WM9712_ID2, 1, WM_READS(188), 188},
- {WM9712_ID2, 2, WM_READS(375), 375},
- {WM9712_ID2, 3, WM_READS(750), 750},
- {WM9713_ID2, 0, WM_READS(94), 94},
- {WM9713_ID2, 1, WM_READS(120), 120},
- {WM9713_ID2, 2, WM_READS(154), 154},
- {WM9713_ID2, 3, WM_READS(188), 188},
+ { WM9705_ID2, 0, WM_READS(94), 94 },
+ { WM9705_ID2, 1, WM_READS(188), 188 },
+ { WM9705_ID2, 2, WM_READS(375), 375 },
+ { WM9705_ID2, 3, WM_READS(750), 750 },
+ { WM9712_ID2, 0, WM_READS(94), 94 },
+ { WM9712_ID2, 1, WM_READS(188), 188 },
+ { WM9712_ID2, 2, WM_READS(375), 375 },
+ { WM9712_ID2, 3, WM_READS(750), 750 },
+ { WM9713_ID2, 0, WM_READS(94), 94 },
+ { WM9713_ID2, 1, WM_READS(120), 120 },
+ { WM9713_ID2, 2, WM_READS(154), 154 },
+ { WM9713_ID2, 3, WM_READS(188), 188 },
};
/* continuous speed index */
static int sp_idx;
-static u16 last, tries;
static struct gpio_desc *gpiod_irq;
/*
@@ -102,7 +101,7 @@ static void wm97xx_acc_pen_up(struct wm97xx *wm)
{
unsigned int count;
- schedule_timeout_uninterruptible(1);
+ msleep(1);
if (cpu_is_pxa27x()) {
while (MISR & (1 << 2))
@@ -117,13 +116,14 @@ static int wm97xx_acc_pen_down(struct wm97xx *wm)
{
u16 x, y, p = 0x100 | WM97XX_ADCSEL_PRES;
int reads = 0;
+ static u16 last, tries;
/* When the AC97 queue has been drained we need to allow time
* to buffer up samples otherwise we end up spinning polling
* for samples. The controller can't have a suitably low
* threshold set to use the notifications it gives.
*/
- schedule_timeout_uninterruptible(1);
+ msleep(1);
if (tries > 5) {
tries = 0;
@@ -193,6 +193,8 @@ static int wm97xx_acc_startup(struct wm97xx *wm)
/* There is some obscure mutant of WM9712 interbred with WM9713
* used on Palm HW */
wm->variant = WM97xx_WM1613;
+ } else if (machine_is_zylonite()) {
+ pen_int = 1;
}
if (pen_int) {
@@ -253,13 +255,13 @@ static void wm97xx_irq_enable(struct wm97xx *wm, int
enable)
}
static struct wm97xx_mach_ops mainstone_mach_ops = {
- .acc_enabled = 1,
- .acc_pen_up = wm97xx_acc_pen_up,
- .acc_pen_down = wm97xx_acc_pen_down,
- .acc_startup = wm97xx_acc_startup,
- .acc_shutdown = wm97xx_acc_shutdown,
- .irq_enable = wm97xx_irq_enable,
- .irq_gpio = WM97XX_GPIO_2,
+ .acc_enabled= 1,
+ .acc_pen_up = wm97xx_acc_pen_up,
+ .acc_pen_down = wm97xx_acc_pen_down,
+ .acc_startup= wm97xx_acc_startup,
+ .acc_shutdown = wm97xx_acc_shutdown,
+ .irq_enable = wm97xx_irq_enable,
+ .irq_gpio = WM97XX_GPIO_2,
};
static int mainstone_wm97xx_probe(struct platform_device *pdev)
@@ -274,14 +276,15 @@ static int mainstone_wm97xx_remove(struct platform_device
*pdev)
struct wm97xx *wm = platform_get_drvdata(pdev);
wm97xx_unregister_mach_ops(wm);
+
return 0;
}
static struct platform_driver mainstone_wm97xx_driver = {
- .probe = mainstone_wm97xx_probe,
- .remove = mainstone_wm97xx_remove,
- .driver = {
- .name = "wm97xx-touch",
+ .probe = mainstone_wm97xx_probe,
+ .remove = mainstone_wm97xx_remove,
+ .driver = {
+ .name = "wm97xx-touch",
},
};
module_platform_driver(mainstone_wm97xx_driver);
--
2.29.2
[PATCH 28/48] Input: touchscreen: use wrapper for pxa2xx ac97 registers
From: Arnd Bergmann
To avoid a dependency on the pxa platform header files with
hardcoded registers, change the driver to call a wrapper
in the pxa2xx-ac97-lib that encapsulates all the other
ac97 stuff.
Acked-by: Dmitry Torokhov
Acked-by: Robert Jarzmik
Cc: linux-in...@vger.kernel.org
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
drivers/input/touchscreen/Kconfig| 2 ++
drivers/input/touchscreen/mainstone-wm97xx.c | 16
drivers/input/touchscreen/zylonite-wm97xx.c | 12 ++--
include/sound/pxa2xx-lib.h | 4
sound/arm/pxa2xx-ac97-lib.c | 12
5 files changed, 32 insertions(+), 14 deletions(-)
diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/input/touchscreen/Kconfig
index 43c7d6e5bdc0..2d70c945b20a 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -902,6 +902,7 @@ config TOUCHSCREEN_WM9713
config TOUCHSCREEN_WM97XX_MAINSTONE
tristate "WM97xx Mainstone/Palm accelerated touch"
depends on TOUCHSCREEN_WM97XX && ARCH_PXA
+ depends on SND_PXA2XX_LIB_AC97
help
Say Y here for support for streaming mode with WM97xx touchscreens
on Mainstone, Palm Tungsten T5, TX and LifeDrive systems.
@@ -914,6 +915,7 @@ config TOUCHSCREEN_WM97XX_MAINSTONE
config TOUCHSCREEN_WM97XX_ZYLONITE
tristate "Zylonite accelerated touch"
depends on TOUCHSCREEN_WM97XX && MACH_ZYLONITE
+ depends on SND_PXA2XX_LIB_AC97
select TOUCHSCREEN_WM9713
help
Say Y here for support for streaming mode with the touchscreen
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c
b/drivers/input/touchscreen/mainstone-wm97xx.c
index 940d3c92b1f8..8f6fe68f1f99 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -28,7 +28,7 @@
#include
#include
-#include
+#include
#include
@@ -104,11 +104,11 @@ static void wm97xx_acc_pen_up(struct wm97xx *wm)
msleep(1);
if (cpu_is_pxa27x()) {
- while (MISR & (1 << 2))
- MODR;
+ while (pxa2xx_ac97_read_misr() & (1 << 2))
+ pxa2xx_ac97_read_modr();
} else if (cpu_is_pxa3xx()) {
for (count = 0; count < 16; count++)
- MODR;
+ pxa2xx_ac97_read_modr();
}
}
@@ -130,7 +130,7 @@ static int wm97xx_acc_pen_down(struct wm97xx *wm)
return RC_PENUP;
}
- x = MODR;
+ x = pxa2xx_ac97_read_modr();
if (x == last) {
tries++;
return RC_AGAIN;
@@ -138,10 +138,10 @@ static int wm97xx_acc_pen_down(struct wm97xx *wm)
last = x;
do {
if (reads)
- x = MODR;
- y = MODR;
+ x = pxa2xx_ac97_read_modr();
+ y = pxa2xx_ac97_read_modr();
if (pressure)
- p = MODR;
+ p = pxa2xx_ac97_read_modr();
dev_dbg(wm->dev, "Raw coordinates: x=%x, y=%x, p=%x\n",
x, y, p);
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c
b/drivers/input/touchscreen/zylonite-wm97xx.c
index cabdd6e3c6f8..ed7eae638713 100644
--- a/drivers/input/touchscreen/zylonite-wm97xx.c
+++ b/drivers/input/touchscreen/zylonite-wm97xx.c
@@ -24,7 +24,7 @@
#include
#include
-#include
+#include
struct continuous {
u16 id;/* codec id */
@@ -79,7 +79,7 @@ static void wm97xx_acc_pen_up(struct wm97xx *wm)
msleep(1);
for (i = 0; i < 16; i++)
- MODR;
+ pxa2xx_ac97_read_modr();
}
static int wm97xx_acc_pen_down(struct wm97xx *wm)
@@ -100,7 +100,7 @@ static int wm97xx_acc_pen_down(struct wm97xx *wm)
return RC_PENUP;
}
- x = MODR;
+ x = pxa2xx_ac97_read_modr();
if (x == last) {
tries++;
return RC_AGAIN;
@@ -108,10 +108,10 @@ static int wm97xx_acc_pen_down(struct wm97xx *wm)
last = x;
do {
if (reads)
- x = MODR;
- y = MODR;
+ x = pxa2xx_ac97_read_modr();
+ y = pxa2xx_ac97_read_modr();
if (pressure)
- p = MODR;
+ p = pxa2xx_ac97_read_modr();
dev_dbg(wm->dev, "Raw coordinates: x=%x, y=%x, p=%x\n",
x, y, p);
diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h
index 95100cff25d1..0a6f8dabf8c4 100644
--- a/include/sound/pxa2xx-lib.h
+++ b/include/sound/pxa2xx-lib.h
@@ -52,4 +52,8 @@ extern int pxa2xx_ac97_hw_resume(void);
extern int pxa2xx_ac97_hw_probe(struct platform_device *dev);
extern void pxa2xx_ac97_hw_remove(struct platform_device *dev);
+/* modem registers, use
[PATCH 29/48] Input: wm97xx - switch to using threaded IRQ
From: Dmitry Torokhov
Instead of manually disabling and enabling interrupts and scheduling work
to access the device, let's use threaded oneshot interrupt handler. It
simplifies things.
Signed-off-by: Dmitry Torokhov
Signed-off-by: Arnd Bergmann
---
drivers/input/touchscreen/wm97xx-core.c | 42 +
include/linux/wm97xx.h | 1 -
2 files changed, 7 insertions(+), 36 deletions(-)
diff --git a/drivers/input/touchscreen/wm97xx-core.c
b/drivers/input/touchscreen/wm97xx-core.c
index 1b58611c8084..2757c7768ffe 100644
--- a/drivers/input/touchscreen/wm97xx-core.c
+++ b/drivers/input/touchscreen/wm97xx-core.c
@@ -285,11 +285,12 @@ void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode)
EXPORT_SYMBOL_GPL(wm97xx_set_suspend_mode);
/*
- * Handle a pen down interrupt.
+ * Codec PENDOWN irq handler
+ *
*/
-static void wm97xx_pen_irq_worker(struct work_struct *work)
+static irqreturn_t wm97xx_pen_interrupt(int irq, void *dev_id)
{
- struct wm97xx *wm = container_of(work, struct wm97xx, pen_event_work);
+ struct wm97xx *wm = dev_id;
int pen_was_down = wm->pen_is_down;
/* do we need to enable the touch panel reader */
@@ -343,27 +344,6 @@ static void wm97xx_pen_irq_worker(struct work_struct *work)
if (!wm->pen_is_down && wm->mach_ops->acc_enabled)
wm->mach_ops->acc_pen_up(wm);
- wm->mach_ops->irq_enable(wm, 1);
-}
-
-/*
- * Codec PENDOWN irq handler
- *
- * We have to disable the codec interrupt in the handler because it
- * can take up to 1ms to clear the interrupt source. We schedule a task
- * in a work queue to do the actual interaction with the chip. The
- * interrupt is then enabled again in the slow handler when the source
- * has been cleared.
- */
-static irqreturn_t wm97xx_pen_interrupt(int irq, void *dev_id)
-{
- struct wm97xx *wm = dev_id;
-
- if (!work_pending(&wm->pen_event_work)) {
- wm->mach_ops->irq_enable(wm, 0);
- queue_work(wm->ts_workq, &wm->pen_event_work);
- }
-
return IRQ_HANDLED;
}
@@ -374,12 +354,9 @@ static int wm97xx_init_pen_irq(struct wm97xx *wm)
{
u16 reg;
- /* If an interrupt is supplied an IRQ enable operation must also be
-* provided. */
- BUG_ON(!wm->mach_ops->irq_enable);
-
- if (request_irq(wm->pen_irq, wm97xx_pen_interrupt, IRQF_SHARED,
- "wm97xx-pen", wm)) {
+ if (request_threaded_irq(wm->pen_irq, NULL, wm97xx_pen_interrupt,
+IRQF_SHARED | IRQF_ONESHOT,
+"wm97xx-pen", wm)) {
dev_err(wm->dev,
"Failed to register pen down interrupt, polling");
wm->pen_irq = 0;
@@ -509,7 +486,6 @@ static int wm97xx_ts_input_open(struct input_dev *idev)
wm->codec->dig_enable(wm, 1);
INIT_DELAYED_WORK(&wm->ts_reader, wm97xx_ts_reader);
- INIT_WORK(&wm->pen_event_work, wm97xx_pen_irq_worker);
wm->ts_reader_min_interval = HZ >= 100 ? HZ / 100 : 1;
if (wm->ts_reader_min_interval < 1)
@@ -560,10 +536,6 @@ static void wm97xx_ts_input_close(struct input_dev *idev)
wm->pen_is_down = 0;
- /* Balance out interrupt disables/enables */
- if (cancel_work_sync(&wm->pen_event_work))
- wm->mach_ops->irq_enable(wm, 1);
-
/* ts_reader rearms itself so we need to explicitly stop it
* before we destroy the workqueue.
*/
diff --git a/include/linux/wm97xx.h b/include/linux/wm97xx.h
index 462854f4f286..85bd8dd3caea 100644
--- a/include/linux/wm97xx.h
+++ b/include/linux/wm97xx.h
@@ -281,7 +281,6 @@ struct wm97xx {
unsigned long ts_reader_min_interval; /* Minimum interval */
unsigned int pen_irq; /* Pen IRQ number in use */
struct workqueue_struct *ts_workq;
- struct work_struct pen_event_work;
u16 acc_slot; /* AC97 slot used for acc touch data */
u16 acc_rate; /* acc touch data rate */
unsigned pen_is_down:1; /* Pen is down */
--
2.29.2
[PATCH 30/48] Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
From: Dmitry Torokhov
Now that we are using oneshot threaded IRQ this method is not used anymore.
Signed-off-by: Dmitry Torokhov
[arnd: add the db1300 change as well]
Cc: Manuel Lauss
Signed-off-by: Arnd Bergmann
---
arch/mips/alchemy/devboards/db1300.c | 9 -
drivers/input/touchscreen/mainstone-wm97xx.c | 9 -
drivers/input/touchscreen/zylonite-wm97xx.c | 9 -
include/linux/wm97xx.h | 3 ---
4 files changed, 30 deletions(-)
diff --git a/arch/mips/alchemy/devboards/db1300.c
b/arch/mips/alchemy/devboards/db1300.c
index cd72eaa1168f..e70e529ddd91 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -732,16 +732,7 @@ static struct platform_device db1300_lcd_dev = {
/**/
#if IS_ENABLED(CONFIG_TOUCHSCREEN_WM97XX)
-static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
-{
- if (enable)
- enable_irq(DB1300_AC97_PEN_INT);
- else
- disable_irq_nosync(DB1300_AC97_PEN_INT);
-}
-
static struct wm97xx_mach_ops db1300_wm97xx_ops = {
- .irq_enable = db1300_wm97xx_irqen,
.irq_gpio = WM97XX_GPIO_3,
};
diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c
b/drivers/input/touchscreen/mainstone-wm97xx.c
index 8f6fe68f1f99..c39f49720fe4 100644
--- a/drivers/input/touchscreen/mainstone-wm97xx.c
+++ b/drivers/input/touchscreen/mainstone-wm97xx.c
@@ -246,21 +246,12 @@ static void wm97xx_acc_shutdown(struct wm97xx *wm)
}
}
-static void wm97xx_irq_enable(struct wm97xx *wm, int enable)
-{
- if (enable)
- enable_irq(wm->pen_irq);
- else
- disable_irq_nosync(wm->pen_irq);
-}
-
static struct wm97xx_mach_ops mainstone_mach_ops = {
.acc_enabled= 1,
.acc_pen_up = wm97xx_acc_pen_up,
.acc_pen_down = wm97xx_acc_pen_down,
.acc_startup= wm97xx_acc_startup,
.acc_shutdown = wm97xx_acc_shutdown,
- .irq_enable = wm97xx_irq_enable,
.irq_gpio = WM97XX_GPIO_2,
};
diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c
b/drivers/input/touchscreen/zylonite-wm97xx.c
index ed7eae638713..a70fe4abe520 100644
--- a/drivers/input/touchscreen/zylonite-wm97xx.c
+++ b/drivers/input/touchscreen/zylonite-wm97xx.c
@@ -160,20 +160,11 @@ static int wm97xx_acc_startup(struct wm97xx *wm)
return 0;
}
-static void wm97xx_irq_enable(struct wm97xx *wm, int enable)
-{
- if (enable)
- enable_irq(wm->pen_irq);
- else
- disable_irq_nosync(wm->pen_irq);
-}
-
static struct wm97xx_mach_ops zylonite_mach_ops = {
.acc_enabled= 1,
.acc_pen_up = wm97xx_acc_pen_up,
.acc_pen_down = wm97xx_acc_pen_down,
.acc_startup= wm97xx_acc_startup,
- .irq_enable = wm97xx_irq_enable,
.irq_gpio = WM97XX_GPIO_2,
};
diff --git a/include/linux/wm97xx.h b/include/linux/wm97xx.h
index 85bd8dd3caea..332d2b0f29b9 100644
--- a/include/linux/wm97xx.h
+++ b/include/linux/wm97xx.h
@@ -254,9 +254,6 @@ struct wm97xx_mach_ops {
int (*acc_startup) (struct wm97xx *);
void (*acc_shutdown) (struct wm97xx *);
- /* interrupt mask control - required for accelerated operation */
- void (*irq_enable) (struct wm97xx *, int enable);
-
/* GPIO pin used for accelerated operation */
int irq_gpio;
--
2.29.2
[PATCH 31/48] ASoC: pxa: use pdev resource for FIFO regs
From: Arnd Bergmann
The driver currently takes the hardwired FIFO address from
a header file that we want to eliminate. Change it to use
the mmio resource instead and stop including the here.
Acked-by: Mark Brown
Cc: alsa-de...@alsa-project.org
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
sound/soc/pxa/pxa2xx-ac97.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c
index 9443c1390d2f..809ea34736ed 100644
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -21,10 +21,12 @@
#include
#include
-#include
-#include
#include
+#define PCDR 0x0040 /* PCM FIFO Data Register */
+#define MODR 0x0140 /* Modem FIFO Data Register */
+#define MCDR 0x0060 /* Mic-in FIFO Data Register */
+
static void pxa2xx_ac97_warm_reset(struct ac97_controller *adrv)
{
pxa2xx_ac97_try_warm_reset();
@@ -59,35 +61,30 @@ static struct ac97_controller_ops pxa2xx_ac97_ops = {
};
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_in = {
- .addr = __PREG(PCDR),
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
.chan_name = "pcm_pcm_stereo_in",
.maxburst = 32,
};
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_stereo_out = {
- .addr = __PREG(PCDR),
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
.chan_name = "pcm_pcm_stereo_out",
.maxburst = 32,
};
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_out = {
- .addr = __PREG(MODR),
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.chan_name = "pcm_aux_mono_out",
.maxburst = 16,
};
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_aux_mono_in = {
- .addr = __PREG(MODR),
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.chan_name = "pcm_aux_mono_in",
.maxburst = 16,
};
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_mic_mono_in = {
- .addr = __PREG(MCDR),
.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,
.chan_name = "pcm_aux_mic_mono",
.maxburst = 16,
@@ -226,6 +223,7 @@ static int pxa2xx_ac97_dev_probe(struct platform_device
*pdev)
int ret;
struct ac97_controller *ctrl;
pxa2xx_audio_ops_t *pdata = pdev->dev.platform_data;
+ struct resource *regs;
void **codecs_pdata;
if (pdev->id != -1) {
@@ -233,6 +231,16 @@ static int pxa2xx_ac97_dev_probe(struct platform_device
*pdev)
return -ENXIO;
}
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!regs)
+ return -ENXIO;
+
+ pxa2xx_ac97_pcm_stereo_in.addr = regs->start + PCDR;
+ pxa2xx_ac97_pcm_stereo_out.addr = regs->start + PCDR;
+ pxa2xx_ac97_pcm_aux_mono_out.addr = regs->start + MODR;
+ pxa2xx_ac97_pcm_aux_mono_in.addr = regs->start + MODR;
+ pxa2xx_ac97_pcm_mic_mono_in.addr = regs->start + MCDR;
+
ret = pxa2xx_ac97_hw_probe(pdev);
if (ret) {
dev_err(&pdev->dev, "PXA2xx AC97 hw probe error (%d)\n", ret);
--
2.29.2
[PATCH 32/48] ASoC: pxa: ac97: use normal MMIO accessors
From: Arnd Bergmann
To avoid dereferencing hardwired constant pointers from a global header
file, change the driver to use devm_platform_ioremap_resource for getting
an __iomem pointer, and then using readl/writel on that.
Each pointer dereference gets changed by a search&replace, which leads
to a few overlong lines, but seems less risky than trying to clean up
the code at the same time.
Cc: alsa-de...@alsa-project.org
Acked-by: Robert Jarzmik
Signed-off-by: Arnd Bergmann
---
sound/arm/pxa2xx-ac97-lib.c | 124 ++
.../arm/pxa2xx-ac97-regs.h| 42 +++---
sound/arm/pxa2xx-ac97.c | 1 -
3 files changed, 92 insertions(+), 75 deletions(-)
rename arch/arm/mach-pxa/include/mach/regs-ac97.h =>
sound/arm/pxa2xx-ac97-regs.h (71%)
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 572b73d73762..e55c0421718b 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -21,15 +21,17 @@
#include
-#include
#include
+#include "pxa2xx-ac97-regs.h"
+
static DEFINE_MUTEX(car_mutex);
static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
static volatile long gsr_bits;
static struct clk *ac97_clk;
static struct clk *ac97conf_clk;
static int reset_gpio;
+static void __iomem *ac97_reg_base;
extern void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio);
@@ -46,7 +48,7 @@ extern void pxa27x_configure_ac97reset(int reset_gpio, bool
to_gpio);
int pxa2xx_ac97_read(int slot, unsigned short reg)
{
int val = -ENODEV;
- volatile u32 *reg_addr;
+ u32 __iomem *reg_addr;
if (slot > 0)
return -ENODEV;
@@ -55,31 +57,33 @@ int pxa2xx_ac97_read(int slot, unsigned short reg)
/* set up primary or secondary codec space */
if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
- reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE;
+ reg_addr = ac97_reg_base +
+ (slot ? SMC_REG_BASE : PMC_REG_BASE);
else
- reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE;
+ reg_addr = ac97_reg_base +
+ (slot ? SAC_REG_BASE : PAC_REG_BASE);
reg_addr += (reg >> 1);
/* start read access across the ac97 link */
- GSR = GSR_CDONE | GSR_SDONE;
+ writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR);
gsr_bits = 0;
- val = (*reg_addr & 0x);
+ val = (readl(reg_addr) & 0x);
if (reg == AC97_GPIO_STATUS)
goto out;
- if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
- !((GSR | gsr_bits) & GSR_SDONE)) {
+ if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits)
& GSR_SDONE, 1) <= 0 &&
+ !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE)) {
printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
- __func__, reg, GSR | gsr_bits);
+ __func__, reg, readl(ac97_reg_base + GSR) |
gsr_bits);
val = -ETIMEDOUT;
goto out;
}
/* valid data now */
- GSR = GSR_CDONE | GSR_SDONE;
+ writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR);
gsr_bits = 0;
- val = (*reg_addr & 0x);
+ val = (readl(reg_addr) & 0x);
/* but we've just started another cycle... */
- wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
+ wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) &
GSR_SDONE, 1);
out: mutex_unlock(&car_mutex);
return val;
@@ -88,25 +92,27 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_read);
int pxa2xx_ac97_write(int slot, unsigned short reg, unsigned short val)
{
- volatile u32 *reg_addr;
+ u32 __iomem *reg_addr;
int ret = 0;
mutex_lock(&car_mutex);
/* set up primary or secondary codec space */
if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
- reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE;
+ reg_addr = ac97_reg_base +
+ (slot ? SMC_REG_BASE : PMC_REG_BASE);
else
- reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE;
+ reg_addr = ac97_reg_base +
+ (slot ? SAC_REG_BASE : PAC_REG_BASE);
reg_addr += (reg >> 1);
- GSR = GSR_CDONE | GSR_SDONE;
+ writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR);
gsr_bits = 0;
- *reg_addr = val;
- if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
- !((GSR | gsr_bits) & GSR_CDONE)) {
+ writel(val, reg_addr);
+ if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits)
& GSR_CDONE, 1) <= 0 &&
+ !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE)) {
printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
-
[PATCH 33/48] ASoC: pxa: i2s: use normal MMIO accessors
From: Arnd Bergmann
To avoid dereferencing hardwired constant pointers from a global header
file, change the driver to use devm_platform_ioremap_resource for getting
an __iomem pointer, and then using readl/writel on that.
Each pointer dereference gets changed by a search&replace, which leads
to a few overlong lines, but seems less risky than trying to clean up
the code at the same time.
Acked-by: Mark Brown
Acked-by: Robert Jarzmik
Cc: alsa-de...@alsa-project.org
Signed-off-by: Arnd Bergmann
---
sound/soc/pxa/pxa2xx-i2s.c | 110 +
1 file changed, 62 insertions(+), 48 deletions(-)
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c
index 5164c60ba89f..746e6ec9198b 100644
--- a/sound/soc/pxa/pxa2xx-i2s.c
+++ b/sound/soc/pxa/pxa2xx-i2s.c
@@ -21,7 +21,6 @@
#include
#include
-#include
#include
#include "pxa2xx-i2s.h"
@@ -29,13 +28,13 @@
/*
* I2S Controller Register and Bit Definitions
*/
-#define SACR0 __REG(0x4040) /* Global Control Register */
-#define SACR1 __REG(0x4044) /* Serial Audio I 2 S/MSB-Justified
Control Register */
-#define SASR0 __REG(0x404C) /* Serial Audio I 2 S/MSB-Justified
Interface and FIFO Status Register */
-#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask
Register */
-#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear
Register */
-#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */
-#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX
and RX FIFO access Register). */
+#define SACR0 (0x)/* Global Control Register */
+#define SACR1 (0x0004)/* Serial Audio I 2 S/MSB-Justified
Control Register */
+#define SASR0 (0x000C)/* Serial Audio I 2 S/MSB-Justified
Interface and FIFO Status Register */
+#define SAIMR (0x0014)/* Serial Audio Interrupt Mask Register
*/
+#define SAICR (0x0018)/* Serial Audio Interrupt Clear
Register */
+#define SADIV (0x0060)/* Audio Clock Divider Register. */
+#define SADR (0x0080)/* Serial Audio Data Register (TX and
RX FIFO access Register). */
#define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger
Threshold */
#define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger
Threshold */
@@ -77,16 +76,15 @@ struct pxa_i2s_port {
static struct pxa_i2s_port pxa_i2s;
static struct clk *clk_i2s;
static int clk_ena = 0;
+static void __iomem *i2s_reg_base;
static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_out = {
- .addr = __PREG(SADR),
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
.chan_name = "tx",
.maxburst = 32,
};
static struct snd_dmaengine_dai_dma_data pxa2xx_i2s_pcm_stereo_in = {
- .addr = __PREG(SADR),
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
.chan_name = "rx",
.maxburst = 32,
@@ -102,7 +100,7 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream
*substream,
return PTR_ERR(clk_i2s);
if (!snd_soc_dai_active(cpu_dai))
- SACR0 = 0;
+ writel(0, i2s_reg_base + SACR0);
return 0;
}
@@ -114,7 +112,7 @@ static int pxa_i2s_wait(void)
/* flush the Rx FIFO */
for (i = 0; i < 16; i++)
- SADR;
+ readl(i2s_reg_base + SADR);
return 0;
}
@@ -174,39 +172,39 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream
*substream,
/* is port used by another stream */
if (!(SACR0 & SACR0_ENB)) {
- SACR0 = 0;
+ writel(0, i2s_reg_base + SACR0);
if (pxa_i2s.master)
- SACR0 |= SACR0_BCKD;
+ writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD),
i2s_reg_base + SACR0);
- SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1);
- SACR1 |= pxa_i2s.fmt;
+ writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) |
SACR0_TFTH(1)), i2s_reg_base + SACR0);
+ writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt),
i2s_reg_base + SACR1);
}
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- SAIMR |= SAIMR_TFS;
+ writel(readl(i2s_reg_base + SAIMR) | (SAIMR_TFS), i2s_reg_base
+ SAIMR);
else
- SAIMR |= SAIMR_RFS;
+ writel(readl(i2s_reg_base + SAIMR) | (SAIMR_RFS), i2s_reg_base
+ SAIMR);
switch (params_rate(params)) {
case 8000:
- SADIV = 0x48;
+ writel(0x48, i2s_reg_base + SADIV);
break;
case 11025:
- SADIV = 0x34;
+ writel(0x34, i2s_reg_base + SADIV);
break;
case 16000:
- SADIV = 0x24;
+ writel(0x24, i2s_r
[PATCH 34/48] ARM: pxa: pcmcia: move smemc configuration back to arch
From: Arnd Bergmann
Rather than poking at the smemc registers directly from the
pcmcia/pxa2xx_base driver, move those bits into machine file
to have a cleaner interface.
Cc: Dominik Brodowski
Link: https://lore.kernel.org/lkml/87d0egjzxk@belgarion.home/
Signed-off-by: Arnd Bergmann
---
arch/arm/mach-pxa/generic.c | 29 ++
drivers/pcmcia/pxa2xx_base.c | 46 ---
include/linux/soc/pxa/smemc.h | 10
3 files changed, 55 insertions(+), 30 deletions(-)
create mode 100644 include/linux/soc/pxa/smemc.h
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index f9083c4f0aea..fe1d55d328e5 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -70,6 +70,35 @@ unsigned int get_clk_frequency_khz(int info)
}
EXPORT_SYMBOL(get_clk_frequency_khz);
+void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
+{
+ __raw_writel(mcmem, MCMEM(sock));
+ __raw_writel(mcatt, MCATT(sock));
+ __raw_writel(mcio, MCIO(sock));
+}
+EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
+
+void pxa_smemc_set_pcmcia_socket(int nr)
+{
+ switch (nr) {
+ case 0:
+ __raw_writel(0, MECR);
+ break;
+ case 1:
+ /*
+* We have at least one socket, so set MECR:CIT
+* (Card Is There)
+*/
+ __raw_writel(MECR_CIT, MECR);
+ break;
+ case 2:
+ /* Set CIT and MECR:NOS (Number Of Sockets) */
+ __raw_writel(MECR_CIT | MECR_NOS, MECR);
+ break;
+ }
+}
+EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
+
/*
* Intel PXA2xx internal register mapping.
*
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 7cd1375d6087..0ea41f1411e5 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -24,11 +24,10 @@
#include
#include
#include
+#include
-#include
#include
#include
-#include
#include
#include
@@ -113,7 +112,7 @@ static inline u_int pxa2xx_pcmcia_cmd_time(u_int
mem_clk_10khz,
return (30 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
}
-static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
+static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock)
{
uint32_t val;
@@ -124,12 +123,10 @@ static int pxa2xx_pcmcia_set_mcmem( int sock, int speed,
int clock )
| ((pxa2xx_mcxx_hold(speed, clock)
& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
- __raw_writel(val, MCMEM(sock));
-
- return 0;
+ return val;
}
-static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
+static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock)
{
uint32_t val;
@@ -140,12 +137,11 @@ static int pxa2xx_pcmcia_set_mcio( int sock, int speed,
int clock )
| ((pxa2xx_mcxx_hold(speed, clock)
& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
- __raw_writel(val, MCIO(sock));
- return 0;
+ return val;
}
-static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
+static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock)
{
uint32_t val;
@@ -156,31 +152,26 @@ static int pxa2xx_pcmcia_set_mcatt( int sock, int speed,
int clock )
| ((pxa2xx_mcxx_hold(speed, clock)
& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
- __raw_writel(val, MCATT(sock));
- return 0;
+ return val;
}
-static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int
clk)
+static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
{
+ unsigned long clk = clk_get_rate(skt->clk) / 1;
struct soc_pcmcia_timing timing;
int sock = skt->nr;
soc_common_pcmcia_get_timing(skt, &timing);
- pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
- pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
- pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
+ pxa_smemc_set_pcmcia_timing(sock,
+ pxa2xx_pcmcia_mcmem(sock, timing.mem, clk),
+ pxa2xx_pcmcia_mcatt(sock, timing.attr, clk),
+ pxa2xx_pcmcia_mcio(sock, timing.io, clk));
return 0;
}
-static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
-{
- unsigned long clk = clk_get_rate(skt->clk);
- return pxa2xx_pcmcia_set_mcxx(skt, clk / 1);
-}
-
#ifdef CONFIG_CPU_FREQ
static int
@@ -215,18 +206,13 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket
*skt,
void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops)
{
- /*
-* We have at least one socket, so set MECR:CIT
-* (Card Is There)
-*/
- uint32_t mecr = MECR_CIT;
+ int nr = 1;
- /* Set MECR:NOS (Number Of Sockets) */
if ((ops->first + ops->nr) > 1 ||
machine_is_vi
