Re: [PATCH] i2c: at91: use dma safe buffers

2022-03-28 Thread Michael Walle

Hi all,

Am 2022-03-03 17:17, schrieb Michael Walle:
The supplied buffer might be on the stack and we get the following 
error

message:
[3.312058] at91_i2c e0070600.i2c: rejecting DMA map of vmalloc 
memory


Use i2c_{get,put}_dma_safe_msg_buf() to get a DMA-able memory region if
necessary.

Cc: sta...@vger.kernel.org
Signed-off-by: Michael Walle 


Any news here?


---

I'm not sure if or which Fixes: tag I should add to this patch. The 
issue
seems to be since a very long time, but nobody seem to have triggered 
it.

FWIW, I'm using the sff,sfp driver, which triggers this.


-michael


Re: [PATCH] drm/amdgpu: resolve s3 hang for r7340

2022-03-28 Thread Paul Menzel

Dear Zhenneng,


Thank you for your patch.

Am 28.03.22 um 06:05 schrieb Zhenneng Li:

This is a workaround for s3 hang for r7340(amdgpu).


Is it hanging when resuming from S3? Maybe also use the line below for 
the commit message summary:


drm/amdgpu: Add 1 ms delay to init handler to fix s3 resume hang

Also, please add a space before the ( in “r7340(amdgpu)”.


When we test s3 with r7340 on arm64 platform, graphics card will hang up,
the error message are as follows:
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [1.599374][ 7] [  T291] 
amdgpu :02:00.0: fb0: amdgpudrmfb frame buffer device
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [1.612869][ 7] [  T291] 
[drm:amdgpu_device_ip_late_init [amdgpu]] *ERROR* late_init of IP block 
 failed -22
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [1.623392][ 7] [  T291] 
amdgpu :02:00.0: amdgpu_device_ip_late_init failed
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [1.630696][ 7] [  T291] 
amdgpu :02:00.0: Fatal error during GPU init
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [1.637477][ 7] [  T291] 
[drm] amdgpu: finishing device.


The prefix in the beginning is not really needed. Only the stuff after 
`kernel: `.


Maybe also add the output of `lspci -nn -s …` for that r7340 device.


Change-Id: I5048b3894c0ca9faf2f4847ddab61f9eb17b4823


Without the Gerrit instance this belongs to, the Change-Id is of no use 
in the public.



Signed-off-by: Zhenneng Li 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 3987ecb24ef4..1eced991b5b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2903,6 +2903,8 @@ static void 
amdgpu_device_delayed_init_work_handler(struct work_struct *work)
container_of(work, struct amdgpu_device, 
delayed_init_work.work);
int r;
  
+	mdelay(1);

+


Wow, I wonder how long it took you to find that workaround.


r = amdgpu_ib_ring_tests(adev);
if (r)
DRM_ERROR("ib ring test failed (%d).\n", r);



Kind regards,

Paul


Re: [PATCH] drm/amdgpu: resolve s3 hang for r7340

2022-03-28 Thread Paul Menzel

[Cc: -Jack Zhang (invalid address)

Am 28.03.22 um 09:36 schrieb Paul Menzel:

Dear Zhenneng,


Thank you for your patch.

Am 28.03.22 um 06:05 schrieb Zhenneng Li:

This is a workaround for s3 hang for r7340(amdgpu).


Is it hanging when resuming from S3? Maybe also use the line below for 
the commit message summary:


drm/amdgpu: Add 1 ms delay to init handler to fix s3 resume hang

Also, please add a space before the ( in “r7340(amdgpu)”.


When we test s3 with r7340 on arm64 platform, graphics card will hang up,
the error message are as follows:
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [    1.599374][ 7] [  T291] 
amdgpu :02:00.0: fb0: amdgpudrmfb frame buffer device
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [    1.612869][ 7] [  T291] 
[drm:amdgpu_device_ip_late_init [amdgpu]] *ERROR* late_init of IP block 
 failed -22
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [    1.623392][ 7] [  T291] 
amdgpu :02:00.0: amdgpu_device_ip_late_init failed
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [    1.630696][ 7] [  T291] 
amdgpu :02:00.0: Fatal error during GPU init
Mar  4 01:14:11 greatwall-GW-XX-XXX kernel: [    1.637477][ 7] [  T291] 
[drm] amdgpu: finishing device.


The prefix in the beginning is not really needed. Only the stuff after 
`kernel: `.


Maybe also add the output of `lspci -nn -s …` for that r7340 device.


Change-Id: I5048b3894c0ca9faf2f4847ddab61f9eb17b4823


Without the Gerrit instance this belongs to, the Change-Id is of no use 
in the public.



Signed-off-by: Zhenneng Li 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

index 3987ecb24ef4..1eced991b5b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2903,6 +2903,8 @@ static void 
amdgpu_device_delayed_init_work_handler(struct work_struct *work)

  container_of(work, struct amdgpu_device, delayed_init_work.work);
  int r;
+    mdelay(1);
+


Wow, I wonder how long it took you to find that workaround.


  r = amdgpu_ib_ring_tests(adev);
  if (r)
  DRM_ERROR("ib ring test failed (%d).\n", r);



Kind regards,

Paul


Re: [PATCH v6 02/12] clk: Introduce Kunit Tests for the framework

2022-03-28 Thread Maxime Ripard
Hi,

On Fri, Mar 25, 2022 at 05:36:25PM -0500, Daniel Latypov wrote:
> On Mon, Feb 28, 2022 at 4:47 AM Maxime Ripard  wrote:
> >
> > On Fri, Feb 25, 2022 at 01:29:03PM -0800, Daniel Latypov wrote:
> > > On Fri, Feb 25, 2022 at 5:23 AM Maxime Ripard  wrote:
> > > >
> > > > Hi Daniel,
> > > >
> > > > On Wed, Feb 23, 2022 at 02:50:59PM -0800, Daniel Latypov wrote:
> > > > > On Wed, Feb 23, 2022 at 2:56 AM Maxime Ripard  
> > > > > wrote:
> > > > > >
> > > > > > Let's test various parts of the rate-related clock API with the 
> > > > > > kunit
> > > > > > testing framework.
> > > > > >
> > > > > > Cc: kunit-...@googlegroups.com
> > > > > > Suggested-by: Stephen Boyd 
> > > > > > Signed-off-by: Maxime Ripard 
> > > > >
> > > > > Tested-by: Daniel Latypov 
> > > > >
> > > > > Looks good to me on the KUnit side.
> > > > > Two small nits below.
> > > > >
> > > > > FYI, I computed the incremental coverage for this series, i.e.:
> > > > > 1) applied the full series
> > > > > 2) computed the absolute coverage
> > > > >
> > > > > $  ./tools/testing/kunit/kunit.py run  --kunitconfig=drivers/clk
> > > > > --make_options=CC=/usr/bin/gcc-6 --kconfig_add=CONFIG_DEBUG_KERNEL=y
> > > > > --kconfig_add=CONFIG_DEBUG_INFO=y --kconfig_add=CONFIG_GCOV=y
> > > >
> > > > I built a docker container based on ubuntu 18.04 to have gcc6 and
> > > > python3.7, but this doesn't seem to be working, I'm not entirely sure 
> > > > why:
> > > >
> > > > [13:11:22] Configuring KUnit Kernel ...
> > > > Regenerating .config ...
> > > > Populating config with:
> > > > $ make ARCH=um olddefconfig CC=/usr/bin/gcc-6 O=.kunit
> > > > ERROR:root:Not all Kconfig options selected in kunitconfig were in the 
> > > > generated .config.
> > > > This is probably due to unsatisfied dependencies.
> > > > Missing: CONFIG_DEBUG_INFO=y, CONFIG_GCOV=y
> > > > Note: many Kconfig options aren't available on UML. You can try running 
> > > > on a different architecture with something like "--arch=x86_64".
> > >
> > > Did you perhaps drop CONFIG_DEBUG_KERNEL=y?
> > > Need to add 3 config options in total for coverage.
> > >
> > > If I tweak the command I ran above but drop CONFIG_DEBUG_KERNEL=y, I
> > > get the error message you get:
> > >
> > > $  ./tools/testing/kunit/kunit.py run  --kunitconfig=drivers/clk
> > > --make_options=CC=/usr/bin/gcc-6  --kconfig_add=CONFIG_DEBUG_INFO=y
> > > --kconfig_add=CONFIG_GCOV=y
> > > ...
> > > Missing: CONFIG_DEBUG_INFO=y, CONFIG_GCOV=y
> > > Note: many Kconfig options aren't available on UML. You can try
> > > running on a different architecture with something like
> > > "--arch=x86_64".
> >
> > It looks to me that it's more that DEBUG_INFO isn't enabled.
> 
> Sorry for the very delayed response.
> I was largely getting internet over mobile data around when this email
> came in and didn't want to try and download docker images over that.
> 
> It looks like that there was another change that is now merged into
> Linus' tree that causes this.
> 
> I found that adding this helped (thanks David Gow)
>   --kconfig_add=DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT
> 
> Running against --kunitconfig=lib/kunit, my final coverage result is
> 
> Overall coverage rate:
>   lines..: 13.6% (18004 of 132055 lines)
>   functions..: 15.7% (1885 of 12010 functions)
> 
> Can you give that a shot and see if it works?

It does fix the configuration issue, but I'm not able to run the tests either:

[07:53:51] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um olddefconfig O=/home/max/out
[07:53:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um olddefconfig O=/home/max/out
Building with:
$ make ARCH=um --jobs=16 O=/home/max/out
[07:54:09] Starting KUnit Kernel (1/1)...
[07:54:09] 
[07:54:09] [ERROR] Test : invalid KTAP input!
[07:54:09] 
[07:54:09] Testing complete. Passed: 0, Failed: 0, Crashed: 0, Skipped: 0, 
Errors: 1
[07:54:09] Elapsed time: 18.486s total, 2.430s configuring, 16.052s building, 
0.003s running


I've tried to remove all the coverage from the equation, and I get the
same issue if I only run kunit run from inside the container, but it
works fine outside. So I guess it's my setup that is broken. Is there
some way to debug what could be going wrong there?

Thanks!
Maxime


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Re: [PATCH v9 04/22] drm/edid: Convert cea_sad helper struct to kernelDoc

2022-03-28 Thread AngeloGioacchino Del Regno

Il 28/03/22 00:39, Guillaume Ranquet ha scritto:

Signed-off-by: Guillaume Ranquet 
---
  include/drm/drm_edid.h | 11 ---
  1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..5d4d840b9904 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -359,12 +359,17 @@ struct edid {
  
  #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
  
-/* Short Audio Descriptor */


Hello Guillaume,


+/* struct cea_sad - Short Audio Descriptor.
+   @format: See HDMI_AUDIO_CODING_TYPE_*.
+   @channels: max number of channels - 1.
+   @freq: See CEA_SAD_FREQ_*.
+   @byte2: meaning depends on format.
+*/


I appreciate the effort, but this is not valid kerneldoc.

Please refer to https://docs.kernel.org/doc-guide/kernel-doc.html

Regards,
Angelo


Re: [PATCH v9 06/22] video/hdmi: Add audio_infoframe packing for DP

2022-03-28 Thread AngeloGioacchino Del Regno

Il 28/03/22 00:39, Guillaume Ranquet ha scritto:

From: Markus Schneider-Pargmann 

Similar to HDMI, DP uses audio infoframes as well which are structured
very similar to the HDMI ones.

This patch adds a helper function to pack the HDMI audio infoframe for
DP, called hdmi_audio_infoframe_pack_for_dp().
hdmi_audio_infoframe_pack_only() is split into two parts. One of them
packs the payload only and can be used for HDMI and DP.

Signed-off-by: Markus Schneider-Pargmann 
Signed-off-by: Guillaume Ranquet 
---
  drivers/video/hdmi.c   | 82 ++
  include/drm/dp/drm_dp_helper.h |  2 +
  include/linux/hdmi.h   |  7 ++-
  3 files changed, 71 insertions(+), 20 deletions(-)

diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 947be761dfa4..5f50237554ed 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -21,6 +21,7 @@
   * DEALINGS IN THE SOFTWARE.
   */
  
+#include 

  #include 
  #include 
  #include 
@@ -381,12 +382,34 @@ static int hdmi_audio_infoframe_check_only(const struct 
hdmi_audio_infoframe *fr
   *
   * Returns 0 on success or a negative error code on failure.
   */
-int hdmi_audio_infoframe_check(struct hdmi_audio_infoframe *frame)
+int hdmi_audio_infoframe_check(const struct hdmi_audio_infoframe *frame)


I agree with this change, as hdmi_audio_infoframe_check_only()'s param is a 
const,
but you really should mention that you're constifying this one in your commit
description, or do that in a separate commit.

Either of the two is fine.

Regards,
Angelo


Re: [PATCH v9 17/22] phy: phy-mtk-dp: Add driver for DP phy

2022-03-28 Thread AngeloGioacchino Del Regno

Il 28/03/22 00:39, Guillaume Ranquet ha scritto:

From: Markus Schneider-Pargmann 

This is a new driver that supports the integrated DisplayPort phy for
mediatek SoCs, especially the mt8195. The phy is integrated into the
DisplayPort controller and will be created by the mtk-dp driver. This
driver expects a struct regmap to be able to work on the same registers
as the DisplayPort controller. It sets the device data to be the struct
phy so that the DisplayPort controller can easily work with it.

The driver does not have any devicetree bindings because the datasheet
does not list the controller and the phy as distinct units.

The interaction with the controller can be covered by the configure
callback of the phy framework and its displayport parameters.

Signed-off-by: Markus Schneider-Pargmann 
Signed-off-by: Guillaume Ranquet 
---
  MAINTAINERS   |   1 +
  drivers/phy/mediatek/Kconfig  |   8 ++
  drivers/phy/mediatek/Makefile |   1 +
  drivers/phy/mediatek/phy-mtk-dp.c | 201 ++
  4 files changed, 211 insertions(+)
  create mode 100644 drivers/phy/mediatek/phy-mtk-dp.c



..snip..


diff --git a/drivers/phy/mediatek/phy-mtk-dp.c 
b/drivers/phy/mediatek/phy-mtk-dp.c
new file mode 100644
index ..e5c5494f3636
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-dp.c


..snip..


+
+static int mtk_dp_phy_probe(struct platform_device *pdev)
+{
+   struct device *dev = &pdev->dev;
+   struct mtk_dp_phy *dp_phy;
+   struct phy *phy;
+   struct regmap *regs;
+
+   regs = syscon_regmap_lookup_by_phandle(dev->of_node, 
"mediatek,dp-syscon");
+


Please drop this blank line


+   if (IS_ERR(regs))
+   return PTR_ERR(regs);
+
+   dp_phy = devm_kzalloc(dev, sizeof(*dp_phy), GFP_KERNEL);
+   if (!dp_phy)
+   return -ENOMEM;
+
+   dp_phy->regs = regs;
+
+   phy = devm_phy_create(dev, NULL, &mtk_dp_phy_dev_ops);
+


Same here


+   if (IS_ERR(phy))
+   return dev_err_probe(dev, PTR_ERR(phy), "Failed to create DP PHY: 
%ld\n", PTR_ERR(phy));
+


Using dev_err_probe automates printing the error, so the correct usage is:

return dev_err_probe(dev, PTR_ERR(phy), "Failed to create DP PHY\n");


+   phy_set_drvdata(phy, dp_phy);
+
+   return 0;
+}
+
+struct platform_driver mtk_dp_phy_driver = {
+   .probe = mtk_dp_phy_probe,
+   .driver = {
+   .name = "mediatek-dp-phy",
+   },
+};
+module_platform_driver(mtk_dp_phy_driver);


Also, in your dt-binding, you mention a compatible for this driver, but I don't 
see
any, here. This means that you do know what to do, so please do it.

Regards,
Angelo


+
+MODULE_AUTHOR("Markus Schneider-Pargmann ");
+MODULE_DESCRIPTION("MediaTek DP PHY Driver");
+MODULE_LICENSE("GPL");




Re: [PATCH v9 12/22] drm/mediatek: dpi: move swap_shift to SoC config

2022-03-28 Thread AngeloGioacchino Del Regno

Il 28/03/22 00:39, Guillaume Ranquet ha scritto:

Add flexibility by moving the swap shift value to SoC specific config

Signed-off-by: Guillaume Ranquet 


Reviewed-by: AngeloGioacchino Del Regno 



Re: [Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

2022-03-28 Thread Tvrtko Ursulin



On 28/03/2022 04:16, fei.y...@intel.com wrote:

From: Fei Yang 

GPU hangs have been observed when multiple engines write to the
same aux_inv register at the same time. To avoid this each engine
should only invalidate its own auxiliary table. The function
gen12_emit_flush_xcs() currently invalidate the auxiliary table for
all engines because the rq->engine is not necessarily the engine
eventually carrying out the request, and potentially the engine
could even be a virtual one (with engine->instance being -1).
With the MMIO remap feature, we can actually set bit 17 of MI_LRI
instruction and let the hardware to figure out the local aux_inv
register at runtime to avoid invalidating auxiliary table for all
engines.

Bspec: 45728

v2: Invalidate AUX table for indirect context as well.

Cc: Stuart Summers 
Cc: Tvrtko Ursulin 
Signed-off-by: Chris Wilson 
Signed-off-by: Fei Yang 
---
  drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 48 
  drivers/gpu/drm/i915/gt/gen8_engine_cs.h |  4 +-
  drivers/gpu/drm/i915/gt/intel_gpu_commands.h |  1 +
  drivers/gpu/drm/i915/gt/intel_lrc.c  | 12 +
  4 files changed, 26 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 36148887c699..8178be083b42 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -6,7 +6,6 @@
  #include "gen8_engine_cs.h"
  #include "i915_drv.h"
  #include "intel_gpu_commands.h"
-#include "intel_gt_regs.h"
  #include "intel_lrc.h"
  #include "intel_ring.h"
  
@@ -165,33 +164,9 @@ static u32 preparser_disable(bool state)

return MI_ARB_CHECK | 1 << 8 | state;
  }
  
-static i915_reg_t aux_inv_reg(const struct intel_engine_cs *engine)

+u32 *gen12_emit_aux_table_inv(const i915_reg_t inv_reg, u32 *cs)


I think all helpers which emit to ring take cs as the first argument so 
it would be good to make this consistent.



  {
-   static const i915_reg_t vd[] = {
-   GEN12_VD0_AUX_NV,
-   GEN12_VD1_AUX_NV,
-   GEN12_VD2_AUX_NV,
-   GEN12_VD3_AUX_NV,
-   };
-
-   static const i915_reg_t ve[] = {
-   GEN12_VE0_AUX_NV,
-   GEN12_VE1_AUX_NV,
-   };
-
-   if (engine->class == VIDEO_DECODE_CLASS)
-   return vd[engine->instance];
-
-   if (engine->class == VIDEO_ENHANCEMENT_CLASS)
-   return ve[engine->instance];
-
-   GEM_BUG_ON("unknown aux_inv reg\n");
-   return INVALID_MMIO_REG;
-}
-
-static u32 *gen12_emit_aux_table_inv(const i915_reg_t inv_reg, u32 *cs)
-{
-   *cs++ = MI_LOAD_REGISTER_IMM(1);
+   *cs++ = MI_LOAD_REGISTER_IMM(1) | MI_LRI_MMIO_REMAP_EN;
*cs++ = i915_mmio_reg_offset(inv_reg);
*cs++ = AUX_INV;
*cs++ = MI_NOOP;
@@ -293,10 +268,12 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 
mode)
if (mode & EMIT_INVALIDATE) {
cmd += 2;
  
-		if (!HAS_FLAT_CCS(rq->engine->i915)) {

+   if (!HAS_FLAT_CCS(rq->engine->i915) &&
+   (rq->engine->class == VIDEO_DECODE_CLASS ||
+rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
aux_inv = rq->engine->mask & ~BIT(BCS0);
if (aux_inv)
-   cmd += 2 * hweight32(aux_inv) + 2;
+   cmd += 4;
}
}
  
@@ -329,15 +306,10 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)

*cs++ = 0; /* value */
  
  	if (aux_inv) { /* hsdes: 1809175790 */

-   struct intel_engine_cs *engine;
-   unsigned int tmp;
-
-   *cs++ = MI_LOAD_REGISTER_IMM(hweight32(aux_inv));
-   for_each_engine_masked(engine, rq->engine->gt, aux_inv, tmp) {
-   *cs++ = i915_mmio_reg_offset(aux_inv_reg(engine));
-   *cs++ = AUX_INV;
-   }
-   *cs++ = MI_NOOP;
+   if (rq->engine->class == VIDEO_DECODE_CLASS)
+   cs = gen12_emit_aux_table_inv(GEN12_VD0_AUX_NV, cs);
+   else
+   cs = gen12_emit_aux_table_inv(GEN12_VE0_AUX_NV, cs);


Not sure if, here and below, it would be worth to put register in a 
local and then have a single function call - up to you.



}
  
  	if (mode & EMIT_INVALIDATE)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.h 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.h
index cc6e21d3662a..94f589e73d10 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.h
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.h
@@ -10,7 +10,7 @@
  #include 
  
  #include "i915_gem.h" /* GEM_BUG_ON */

-
+#include "intel_gt_regs.h"
  #include "intel_gpu_commands.h"
  
  struct i915_request;

@@ -38,6 +38,8 @@ u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *rq, 
u32 *cs);
  u32 *gen11_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs

Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES

2022-03-28 Thread Tvrtko Ursulin



+ Joonas

On 25/03/2022 23:03, Francisco Jerez wrote:

Matt Atwood  writes:


Newer platforms have DSS that aren't necessarily available for both
geometry and compute, two queries will need to exist. This introduces
the first, when passing a valid engine class and engine instance in the
flags returns a topology describing geometry.

v2: fix white space errors
v3: change flags from hosting 2 8 bit numbers to holding a
i915_engine_class_instance struct

Cc: Ashutosh Dixit 
Cc: Matt Roper 
Cc: Joonas Lahtinen 
UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143
Signed-off-by: Matt Atwood 
---
  drivers/gpu/drm/i915/i915_query.c | 68 ++-
  include/uapi/drm/i915_drm.h   | 24 +++
  2 files changed, 65 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_query.c 
b/drivers/gpu/drm/i915/i915_query.c
index 2dfbc22857a3..fcb374201edb 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -9,6 +9,7 @@
  #include "i915_drv.h"
  #include "i915_perf.h"
  #include "i915_query.h"
+#include "gt/intel_engine_user.h"
  #include 
  
  static int copy_query_item(void *query_hdr, size_t query_sz,

@@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t query_sz,
return 0;
  }
  
-static int query_topology_info(struct drm_i915_private *dev_priv,

-  struct drm_i915_query_item *query_item)
+static int fill_topology_info(const struct sseu_dev_info *sseu,
+ struct drm_i915_query_item *query_item,
+ const u8 *subslice_mask)
  {
-   const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu;
struct drm_i915_query_topology_info topo;
u32 slice_length, subslice_length, eu_length, total_length;
int ret;
  
-	if (query_item->flags != 0)

-   return -EINVAL;
+   BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask));
  
  	if (sseu->max_slices == 0)

return -ENODEV;
  
-	BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask));

-
slice_length = sizeof(sseu->slice_mask);
subslice_length = sseu->max_slices * sseu->ss_stride;
eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride;
total_length = sizeof(topo) + slice_length + subslice_length +
   eu_length;
  
-	ret = copy_query_item(&topo, sizeof(topo), total_length,

- query_item);
+   ret = copy_query_item(&topo, sizeof(topo), total_length, query_item);
+
if (ret != 0)
return ret;
  
-	if (topo.flags != 0)

-   return -EINVAL;
-
memset(&topo, 0, sizeof(topo));
topo.max_slices = sseu->max_slices;
topo.max_subslices = sseu->max_subslices;
@@ -69,27 +64,61 @@ static int query_topology_info(struct drm_i915_private 
*dev_priv,
topo.eu_stride = sseu->eu_stride;
  
  	if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),

-  &topo, sizeof(topo)))
+&topo, sizeof(topo)))
return -EFAULT;
  
  	if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)),

-  &sseu->slice_mask, slice_length))
+&sseu->slice_mask, slice_length))
return -EFAULT;
  
  	if (copy_to_user(u64_to_user_ptr(query_item->data_ptr +

-  sizeof(topo) + slice_length),
-  sseu->subslice_mask, subslice_length))
+sizeof(topo) + slice_length),
+subslice_mask, subslice_length))
return -EFAULT;
  
  	if (copy_to_user(u64_to_user_ptr(query_item->data_ptr +

-  sizeof(topo) +
-  slice_length + subslice_length),
-  sseu->eu_mask, eu_length))
+sizeof(topo) +
+slice_length + subslice_length),
+sseu->eu_mask, eu_length))
return -EFAULT;
  
  	return total_length;

  }
  
+static int query_topology_info(struct drm_i915_private *dev_priv,

+  struct drm_i915_query_item *query_item)
+{
+   const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu;
+
+   if (query_item->flags != 0)
+   return -EINVAL;
+
+   return fill_topology_info(sseu, query_item, sseu->subslice_mask);
+}
+
+static int query_geometry_subslices(struct drm_i915_private *i915,
+   struct drm_i915_query_item *query_item)
+{
+   const struct sseu_dev_info *sseu;
+   struct intel_engine_cs *engine;
+   struct i915_engine_class_instance classinstance;
+
+   if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50))
+   return -ENODEV;
+
+

Re: [PATCH v13 5/6] drm/loongson: add drm driver for loongson display controller

2022-03-28 Thread kernel test robot
Hi Sui,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on robh/for-next linus/master v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/intel-lab-lkp/linux/commits/Sui-Jingfeng/MIPS-Loongson64-dts-update-the-display-controller-device-node/20220328-103101
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: microblaze-randconfig-s032-20220328 
(https://download.01.org/0day-ci/archive/20220328/202203281653.wiraycud-...@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 11.2.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-dirty
# 
https://github.com/intel-lab-lkp/linux/commit/836c0ab646f65b0a8c6574b5d2495c8617e96545
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
Sui-Jingfeng/MIPS-Loongson64-dts-update-the-display-controller-device-node/20220328-103101
git checkout 836c0ab646f65b0a8c6574b5d2495c8617e96545
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=microblaze 
SHELL=/bin/bash drivers/gpu/drm/loongson/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: sparse: incorrect type 
>> in assignment (different address spaces) @@ expected void [noderef] 
>> __iomem *dir_reg @@ got void * @@
   drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: expected void 
[noderef] __iomem *dir_reg
   drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: got void *
>> drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: sparse: incorrect type 
>> in assignment (different address spaces) @@ expected void [noderef] 
>> __iomem *dat_reg @@ got void * @@
   drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: expected void 
[noderef] __iomem *dat_reg
   drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: got void *
   drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: sparse: incorrect type 
in assignment (different address spaces) @@ expected void [noderef] __iomem 
*dir_reg @@ got void * @@
   drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: expected void 
[noderef] __iomem *dir_reg
   drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: got void *
   drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: sparse: incorrect type 
in assignment (different address spaces) @@ expected void [noderef] __iomem 
*dat_reg @@ got void * @@
   drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: expected void 
[noderef] __iomem *dat_reg
   drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: got void *
--
>> drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: sparse: incorrect 
>> type in argument 2 (different address spaces) @@ expected void *reg_base 
>> @@ got void [noderef] __iomem *reg_base @@
   drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: expected void 
*reg_base
   drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: got void 
[noderef] __iomem *reg_base
--
>> drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: sparse: incorrect 
>> type in argument 2 (different address spaces) @@ expected void *reg_base 
>> @@ got void [noderef] __iomem *reg_base @@
   drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: expected void 
*reg_base
   drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: got void 
[noderef] __iomem *reg_base

vim +179 drivers/gpu/drm/loongson/lsdc_i2c.c

   129  
   130  struct lsdc_i2c *lsdc_of_create_i2c_adapter(struct device *parent,
   131  void *reg_base,
   132  struct device_node *i2c_np)
   133  {
   134  unsigned int udelay = 5;
   135  unsigned int timeout = 2200;
   136  int nr = -1;
   137  struct i2c_adapter *adapter;
   138  struct lsdc_i2c *li2c;
   139  u32 sda, scl;
   140  int ret;
   141  
   142  li2c = kzalloc(sizeof(*li2c), GFP_KERNEL);
   143  if (!li2c)
   144  return ERR_PTR(-ENOMEM);
   145  
   146  spin_lock_init(&li2c->reglock);
   147  
   148  ret = of_property_read_u32(i2c_np, "loongson,sda", &sda);
   149  if (ret) {
   15

Re: [PATCH v13 5/6] drm/loongson: add drm driver for loongson display controller

2022-03-28 Thread Sui Jingfeng



On 2022/3/28 16:51, kernel test robot wrote:

Hi Sui,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on robh/for-next linus/master v5.17 next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/intel-lab-lkp/linux/commits/Sui-Jingfeng/MIPS-Loongson64-dts-update-the-display-controller-device-node/20220328-103101
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: microblaze-randconfig-s032-20220328 
(https://download.01.org/0day-ci/archive/20220328/202203281653.wiraycud-...@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 11.2.0
reproduce:
 wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
 chmod +x ~/bin/make.cross
 # apt-get install sparse
 # sparse version: v0.6.4-dirty
 # 
https://github.com/intel-lab-lkp/linux/commit/836c0ab646f65b0a8c6574b5d2495c8617e96545
 git remote add linux-review https://github.com/intel-lab-lkp/linux
 git fetch --no-tags linux-review 
Sui-Jingfeng/MIPS-Loongson64-dts-update-the-display-controller-device-node/20220328-103101
 git checkout 836c0ab646f65b0a8c6574b5d2495c8617e96545
 # save the config file to linux build tree
 mkdir build_dir
 COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=microblaze 
SHELL=/bin/bash drivers/gpu/drm/loongson/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


sparse warnings: (new ones prefixed by >>)

drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected void [noderef] __iomem 
*dir_reg @@ got void * @@

drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: expected void 
[noderef] __iomem *dir_reg
drivers/gpu/drm/loongson/lsdc_i2c.c:179:23: sparse: got void *

drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: sparse: incorrect type in 
assignment (different address spaces) @@ expected void [noderef] __iomem 
*dat_reg @@ got void * @@

drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: expected void 
[noderef] __iomem *dat_reg
drivers/gpu/drm/loongson/lsdc_i2c.c:180:23: sparse: got void *
drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: sparse: incorrect type 
in assignment (different address spaces) @@ expected void [noderef] __iomem 
*dir_reg @@ got void * @@
drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: expected void 
[noderef] __iomem *dir_reg
drivers/gpu/drm/loongson/lsdc_i2c.c:252:23: sparse: got void *
drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: sparse: incorrect type 
in assignment (different address spaces) @@ expected void [noderef] __iomem 
*dat_reg @@ got void * @@
drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: expected void 
[noderef] __iomem *dat_reg
drivers/gpu/drm/loongson/lsdc_i2c.c:253:23: sparse: got void *
--

drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: sparse: incorrect type 
in argument 2 (different address spaces) @@ expected void *reg_base @@ 
got void [noderef] __iomem *reg_base @@

drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: expected void 
*reg_base
drivers/gpu/drm/loongson/lsdc_pci_drv.c:185:61: sparse: got void 
[noderef] __iomem *reg_base
--

drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: sparse: incorrect type 
in argument 2 (different address spaces) @@ expected void *reg_base @@ 
got void [noderef] __iomem *reg_base @@

drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: expected void 
*reg_base
drivers/gpu/drm/loongson/lsdc_output.c:232:63: sparse: got void 
[noderef] __iomem *reg_base

vim +179 drivers/gpu/drm/loongson/lsdc_i2c.c

129 
130 struct lsdc_i2c *lsdc_of_create_i2c_adapter(struct device *parent,
131 void *reg_base,
132 struct device_node *i2c_np)
133 {
134 unsigned int udelay = 5;
135 unsigned int timeout = 2200;
136 int nr = -1;
137 struct i2c_adapter *adapter;
138 struct lsdc_i2c *li2c;
139 u32 sda, scl;
140 int ret;
141 
142 li2c = kzalloc(sizeof(*li2c), GFP_KERNEL);
143 if (!li2c)
144 return ERR_PTR(-ENOMEM);
145 
146 spin_lock_init(&li2c->reglock);
147 
148 ret = of_property_read_u32(i2c_np, "loongson,sda", &sda);
149 if (ret) {
150 dev_err(p

Re: [PATCH v9 18/22] drm/mediatek: Add mt8195 Embedded DisplayPort driver

2022-03-28 Thread AngeloGioacchino Del Regno

Il 28/03/22 00:39, Guillaume Ranquet ha scritto:

From: Markus Schneider-Pargmann 

This patch adds a DisplayPort driver for the Mediatek mt8195 SoC.

It supports the mt8195, the embedded DisplayPort units. It offers
DisplayPort 1.4 with up to 4 lanes.

The driver shares its iomap range with the mtk-dp-phy driver using
the regmap/syscon facility.

This driver is based on an initial version by
Jason-JH.Lin .

Signed-off-by: Markus Schneider-Pargmann 
Signed-off-by: Guillaume Ranquet 
Reported-by: kernel test robot 


Hello Guillaume,
as you know, there's some more work to do on this driver.

I will also mention here, not on the code, that at this point, your
mtk_dp_aux_transfer() function has something VERY similar to function
drm_dp_dpcd_access(), so I really believe that you can instead use
functions drm_dp_dpcd_read() and drm_dp_dpcd_write(), avoiding code
duplication around.

Please check drivers/gpu/drm/dp/drm_dp.c.


---
  drivers/gpu/drm/mediatek/Kconfig   |8 +
  drivers/gpu/drm/mediatek/Makefile  |2 +
  drivers/gpu/drm/mediatek/mtk_dp.c  | 2221 
  drivers/gpu/drm/mediatek/mtk_dp_reg.h  |  568 ++
  drivers/gpu/drm/mediatek/mtk_drm_drv.c |1 +
  drivers/gpu/drm/mediatek/mtk_drm_drv.h |1 +
  6 files changed, 2801 insertions(+)
  create mode 100644 drivers/gpu/drm/mediatek/mtk_dp.c
  create mode 100644 drivers/gpu/drm/mediatek/mtk_dp_reg.h

diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 2976d21e9a34..03ffa9b896c3 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -28,3 +28,11 @@ config DRM_MEDIATEK_HDMI
select PHY_MTK_HDMI
help
  DRM/KMS HDMI driver for Mediatek SoCs
+
+config MTK_DPTX_SUPPORT


Actually, I think that the best would be DRM_MEDIATEK_DP_TX or 
DRM_MEDIATEK_DP...
...also, ordering is important, please!


+   tristate "DRM DPTX Support for Mediatek SoCs"
+   depends on DRM_MEDIATEK
+   select PHY_MTK_DP
+   select DRM_DP_HELPER
+   help
+ DRM/KMS Display Port driver for Mediatek SoCs.
diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index 29098d7c8307..d86a6406055e 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -21,3 +21,5 @@ mediatek-drm-hdmi-objs := mtk_cec.o \
  mtk_hdmi_ddc.o
  
  obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o

+
+obj-$(CONFIG_MTK_DPTX_SUPPORT) += mtk_dp.o
diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c 
b/drivers/gpu/drm/mediatek/mtk_dp.c
new file mode 100644
index ..7cd8459cf719
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -0,0 +1,2221 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 MediaTek Inc.
+ * Copyright (c) 2021 BayLibre
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_dp_reg.h"
+
+#define MTK_DP_AUX_WAIT_REPLY_COUNT 20
+#define MTK_DP_CHECK_SINK_CAP_TIMEOUT_COUNT 3
+
+//TODO: platform/device data or dts?


Assuming that your TODO is about the maximum number of lanes,
{ .compatible = "mediatek,mt8195-edp-tx", .data = &some_const_structure },


+#define MTK_DP_MAX_LANES 4
+#define MTK_DP_MAX_LINK_RATE MTK_DP_LINKRATE_HBR3


..snip..


+
+static int mtk_dp_bulk_16bit_write(struct mtk_dp *mtk_dp, u32 offset, u8 *buf,
+  size_t length)
+{
+   int i;
+   int ret = 0;
+   int num_regs = (length + 1) / 2;
+
+   /* 2 bytes per register */
+   for (i = 0; i < num_regs; i++) {
+   u32 val = buf[i * 2] |
+ (i * 2 + 1 < length ? buf[i * 2 + 1] << 8 : 0);
+
+   ret = mtk_dp_write(mtk_dp, offset + i * 4, val);
+   if (ret)
+   goto out;


if (ret)
return ret;


+   }
+
+out:


Remove this label.


+   return ret;
+}
+
+static unsigned long mtk_dp_sip_atf_call(unsigned int cmd, unsigned int para)
+{
+   struct arm_smccc_res res;
+
+   arm_smccc_smc(MTK_DP_SIP_CONTROL_AARCH32, cmd, para, 0, 0, 0, 0, 0,
+ &res);
+
+   pr_debug("[DPTX]%s cmd 0x%x, p1 0x%x, ret 0x%lx-0x%lx", __func__, cmd,
+para, res.a0, res.a1);
+   return res.a1;
+}
+
+static int mtk_dp_msa_bypass_disable(struct mtk_dp *mtk_dp)
+{
+   const u16 bits_to_set =
+   BIT(HTOTAL_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(VTOTAL_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(HSTART_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(VSTART_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(HWIDTH_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(VHEIGHT_SEL_DP_ENC0_P0_SHIFT) |
+   BIT(HSP_SEL_DP_ENC0_P0_SHIFT) | BIT(HSW_SEL_DP_ENC0_P0_SHIFT) |
+

Re: [Intel-gfx] [PATCH] drm/i915: fix remaining_timeout in intel_gt_retire_requests_timeout

2022-03-28 Thread Das, Nirmoy



On 3/25/2022 9:33 PM, Ceraolo Spurio, Daniele wrote:



On 3/25/2022 11:37 AM, Das, Nirmoy wrote:


On 3/25/2022 6:58 PM, Daniele Ceraolo Spurio wrote:

In intel_gt_wait_for_idle, we use the remaining timeout returned from
intel_gt_retire_requests_timeout to wait on the GuC being idle. 
However,

the returned variable can have a negative value if something goes wrong
during the wait, leading to us hitting a GEM_BUG_ON in the GuC wait
function.
To fix this, make sure to only return the timeout if it is positive.

Fixes: b97060a99b01b ("drm/i915/guc: Update intel_gt_wait_for_idle 
to work with GuC")

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Matthew Brost 
Cc: John Harrison 
---
  drivers/gpu/drm/i915/gt/intel_gt_requests.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c 
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c

index edb881d756309..ef70c209976d8 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -197,7 +197,7 @@ out_active: spin_lock(&timelines->lock);
  active_count++;
    if (remaining_timeout)
-    *remaining_timeout = timeout;
+    *remaining_timeout = timeout > 0 ? timeout : 0;



Should the last flush_submission() be  "if ( timeout > 0 
&&flush_submission(gt, timeout))" ?


I considered it, but flush_submission only checks for timeout != 0 so 
it won't accidentally make use of a negative value thinking it's 
positive. I don't know if the flush is purposely done even if timeout 
is negative or if that's a mistake, but that code has been there long 
before we modified the function to return the remaining timeout and 
never seems to have caused issues, so I decided not to change it.



Yes, we need clarify if we really need the final flush if the timeout is 
negative.


But this patch  is Acked-by: Nirmoy Das 

Nirmoy



Daniele




Nirmoy


    return active_count ? timeout : 0;
  }




[PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

2022-03-28 Thread Jani Nikula
v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
review comments from Ville.

Jani Nikula (11):
  drm/edid: don't modify EDID while parsing
  drm/edid: fix reduced blanking support check
  drm/edid: slightly restructure timing and non-timing descriptor
structs
  drm/edid: pass a timing pointer to is_display_descriptor()
  drm/edid: use struct detailed_timing member access in is_rb()
  drm/edid: use struct detailed_data_monitor_range member access in gtf2
functions
  drm/edid: constify struct detailed_timing in lower level parsing
  drm/edid: constify struct detailed_timing in parsing callbacks
  drm/edid: constify struct edid passed to detailed blocks
  drm/edid: constify struct edid passed around in callbacks and closure
  drm/edid: add more general struct edid constness in the interfaces

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
 drivers/gpu/drm/drm_edid.c| 287 ++
 include/drm/drm_edid.h|  19 +-
 3 files changed, 174 insertions(+), 138 deletions(-)

-- 
2.30.2



[PATCH v2 01/11] drm/edid: don't modify EDID while parsing

2022-03-28 Thread Jani Nikula
We'll want to keep the EDID immutable while parsing. Stop modifying the
EDID because of the quirks.

In theory, this does have userspace implications, but the userspace is
supposed to use the modes exposed via KMS API, not by parsing the EDID
directly.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cc7bd58369df..1b552fe54f38 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2740,9 +2740,9 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
return NULL;
 
if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
-   timing->pixel_clock = cpu_to_le16(1088);
-
-   mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+   mode->clock = 1088 * 10;
+   else
+   mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
 
mode->hdisplay = hactive;
mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2763,14 +2763,14 @@ static struct drm_display_mode 
*drm_mode_detailed(struct drm_device *dev,
drm_mode_do_interlace_quirk(mode, pt);
 
if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
-   pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | 
DRM_EDID_PT_VSYNC_POSITIVE;
+   mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+   } else {
+   mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+   DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+   mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+   DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
}
 
-   mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
-   DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
-   mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
-   DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
-
 set_size:
mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 
8;
-- 
2.30.2



[PATCH v2 02/11] drm/edid: fix reduced blanking support check

2022-03-28 Thread Jani Nikula
The reduced blanking bit is valid only for CVT, indicated by display
range limits flags 0x04.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1b552fe54f38..13d05062d68c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[15] & 0x10)
+   if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
*(bool *)data = true;
 }
 
-- 
2.30.2



[PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread Jani Nikula
The pixel clock is conceptually part of the detailed timings, while it's
just zero padding for display descriptors. Modify the structures to
reflect this. Rename struct detailed_non_pixel to
edid_display_descriptor to better reflect spec while at it. (Further
struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/drm_edid.c| 12 ++--
 include/drm/drm_edid.h|  9 +
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b30656959fd8..e477f4b42b6b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
 {
int i = 0;
struct detailed_timing *timing;
-   struct detailed_non_pixel *data;
+   struct edid_display_descriptor *data;
struct detailed_data_monitor_range *range;
struct amdgpu_dm_connector *amdgpu_dm_connector =
to_amdgpu_dm_connector(connector);
@@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
for (i = 0; i < 4; i++) {
 
timing  = &edid->detailed_timings[i];
-   data= &timing->data.other_data;
+   data= &timing->data.descriptor;
range   = &data->data.range;
/*
 * Check if monitor has continuous frequency 
mode
@@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
if (i >= 0 && vsdb_info.freesync_supported) {
timing  = &edid->detailed_timings[i];
-   data= &timing->data.other_data;
+   data= &timing->data.descriptor;
 
amdgpu_dm_connector->min_vfreq = 
vsdb_info.min_refresh_rate_hz;
amdgpu_dm_connector->max_vfreq = 
vsdb_info.max_refresh_rate_hz;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ac80681d64f6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
mode->clock = 1088 * 10;
else
-   mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+   mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
 
mode->hdisplay = hactive;
mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2984,7 +2984,7 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
-   struct detailed_non_pixel *data = &timing->data.other_data;
+   struct edid_display_descriptor *data = &timing->data.descriptor;
struct detailed_data_monitor_range *range = &data->data.range;
 
if (!is_display_descriptor((const u8 *)timing, 
EDID_DETAIL_MONITOR_RANGE))
@@ -3117,7 +3117,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
-   struct detailed_non_pixel *data = &timing->data.other_data;
+   struct edid_display_descriptor *data = &timing->data.descriptor;
struct drm_connector *connector = closure->connector;
struct edid *edid = closure->edid;
int i;
@@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
for (i = 0; i < 4; i++) {
int width, height;
 
-   cvt = &(timing->data.other_data.data.cvt[i]);
+   cvt = &(timing->data.descriptor.data.cvt[i]);
 
if (!memcmp(cvt->code, empty, 3))
continue;
@@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
return;
 
-   *(u8 **)data = t->data.other_data.data.str.str;
+   *(u8 **)data = t->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
@@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
   void *info_monitor_range)
 {
struct drm_monitor_range_info *monitor_range = info_monitor_range;
-   const struct detailed_non_pixel *data = &timing->data.other_data;
+   const struct edid_display_descriptor *data = &timing->data.descriptor;
const struct detailed_data_m

[PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor()

2022-03-28 Thread Jani Nikula
Use struct member access instead of direct offsets to avoid lots of
casts all over the place.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 27 ---
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ac80681d64f6..586b0ed3b3dc 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2331,10 +2331,15 @@ struct drm_display_mode *drm_mode_find_dmt(struct 
drm_device *dev,
 }
 EXPORT_SYMBOL(drm_mode_find_dmt);
 
-static bool is_display_descriptor(const u8 d[18], u8 tag)
+static bool is_display_descriptor(const struct detailed_timing *descriptor, u8 
tag)
 {
-   return d[0] == 0x00 && d[1] == 0x00 &&
-   d[2] == 0x00 && d[3] == tag;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad0) != 0);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.pad1) != 2);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), data.descriptor.type) != 3);
+
+   return descriptor->data.descriptor.pad0 == 0 &&
+   descriptor->data.descriptor.pad1 == 0 &&
+   descriptor->data.descriptor.type == tag;
 }
 
 static bool is_detailed_timing_descriptor(const u8 d[18])
@@ -2405,7 +2410,7 @@ is_rb(struct detailed_timing *t, void *data)
 {
u8 *r = (u8 *)t;
 
-   if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
return;
 
if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
@@ -2431,7 +2436,7 @@ find_gtf2(struct detailed_timing *t, void *data)
 {
u8 *r = (u8 *)t;
 
-   if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
return;
 
if (r[10] == 0x02)
@@ -2987,7 +2992,7 @@ do_inferred_modes(struct detailed_timing *timing, void *c)
struct edid_display_descriptor *data = &timing->data.descriptor;
struct detailed_data_monitor_range *range = &data->data.range;
 
-   if (!is_display_descriptor((const u8 *)timing, 
EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
 
closure->modes += drm_dmt_modes_for_range(closure->connector,
@@ -3067,7 +3072,7 @@ do_established_modes(struct detailed_timing *timing, void 
*c)
 {
struct detailed_mode_closure *closure = c;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS))
+   if (!is_display_descriptor(timing, EDID_DETAIL_EST_TIMINGS))
return;
 
closure->modes += drm_est3_modes(closure->connector, timing);
@@ -3122,7 +3127,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
struct edid *edid = closure->edid;
int i;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES))
+   if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
return;
 
for (i = 0; i < 6; i++) {
@@ -3231,7 +3236,7 @@ do_cvt_mode(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_CVT_3BYTE))
return;
 
closure->modes += drm_cvt_modes(closure->connector, timing);
@@ -4491,7 +4496,7 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector 
*connector, const u8 *db)
 static void
 monitor_name(struct detailed_timing *t, void *data)
 {
-   if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
return;
 
*(u8 **)data = t->data.descriptor.data.str.str;
@@ -5226,7 +5231,7 @@ void get_monitor_range(struct detailed_timing *timing,
const struct edid_display_descriptor *data = &timing->data.descriptor;
const struct detailed_data_monitor_range *range = &data->data.range;
 
-   if (!is_display_descriptor((const u8 *)timing, 
EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
 
/*
-- 
2.30.2



[PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions

2022-03-28 Thread Jani Nikula
Use struct struct detailed_data_monitor_range member access instead of
direct offsets to avoid casting.

Use BUILD_BUG_ON() for sanity check.

v2:
- Rename timing to descriptor (Ville)
- Return and use struct detailed_data_monitor_range

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 63 ++
 1 file changed, 43 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 242f074f60d9..4d63f3412672 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2438,61 +2438,84 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *t, void *data)
+find_gtf2(struct detailed_timing *descriptor, void *data)
 {
-   u8 *r = (u8 *)t;
+   struct detailed_data_monitor_range **res = data;
 
-   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[10] == 0x02)
-   *(u8 **)data = r;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.descriptor.data.range.flags) != 10);
+
+   if (descriptor->data.descriptor.data.range.flags ==
+   DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG)
+   *res = &descriptor->data.descriptor.data.range;
 }
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_data_monitor_range *range = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? (r[12] * 2) : 0;
+   BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
+offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 
12);
+
+   return range ? range->formula.gtf2.hfreq_start_khz * 2 : 0;
 }
 
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_data_monitor_range *range = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+   BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
+offsetof(typeof(*range), formula.gtf2.c) != 13);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[13] : 0;
+   return range ? range->formula.gtf2.c : 0;
 }
 
 static int
 drm_gtf2_m(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? (r[15] << 8) + r[14] : 0;
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+   BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
+offsetof(typeof(*range), formula.gtf2.m) != 14);
+
+   return range ? le16_to_cpu(range->formula.gtf2.m) : 0;
 }
 
 static int
 drm_gtf2_k(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_data_monitor_range *range = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[16] : 0;
+   BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
+offsetof(typeof(*range), formula.gtf2.k) != 16);
+
+   return range ? range->formula.gtf2.k : 0;
 }
 
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_data_monitor_range *range = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+
+   BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
+offsetof(typeof(*range), formula.gtf2.j) != 17);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[17] : 0;
+   return range ? range->formula.gtf2.j : 0;
 }
 
 /**
-- 
2.30.2



[PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb()

2022-03-28 Thread Jani Nikula
Use struct detailed_timing member access instead of direct offsets to
avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 

---

Note: Why can we use range.formula.cvt.flags directly in is_rb() while
gtf2 functions check for range.flags == 0x02 first to ensure it's gtf2?
---
 drivers/gpu/drm/drm_edid.c | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 586b0ed3b3dc..242f074f60d9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2406,15 +2406,21 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *t, void *data)
+is_rb(struct detailed_timing *descriptor, void *data)
 {
-   u8 *r = (u8 *)t;
+   bool *res = data;
 
-   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
-   *(bool *)data = true;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor),
+ data.descriptor.data.range.flags) != 10);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor),
+ data.descriptor.data.range.formula.cvt.flags) != 
15);
+
+   if (descriptor->data.descriptor.data.range.flags == 
DRM_EDID_CVT_SUPPORT_FLAG &&
+   descriptor->data.descriptor.data.range.formula.cvt.flags & 0x10)
+   *res = true;
 }
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
-- 
2.30.2



[PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing

2022-03-28 Thread Jani Nikula
Start constifying the struct detailed_timing pointers being passed
around from bottom up.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 40 +++---
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4d63f3412672..60eee683be3f 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2566,7 +2566,7 @@ static int drm_mode_hsync(const struct drm_display_mode 
*mode)
  */
 static struct drm_display_mode *
 drm_mode_std(struct drm_connector *connector, struct edid *edid,
-struct std_timing *t)
+const struct std_timing *t)
 {
struct drm_device *dev = connector->dev;
struct drm_display_mode *m, *mode = NULL;
@@ -2684,7 +2684,7 @@ drm_mode_std(struct drm_connector *connector, struct edid 
*edid,
  */
 static void
 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
-   struct detailed_pixel_timing *pt)
+   const struct detailed_pixel_timing *pt)
 {
int i;
static const struct {
@@ -2728,11 +2728,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode 
*mode,
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  struct edid *edid,
- struct detailed_timing 
*timing,
+ const struct detailed_timing 
*timing,
  u32 quirks)
 {
struct drm_display_mode *mode;
-   struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+   const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
@@ -2827,7 +2827,7 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, u8 *t)
+   struct edid *edid, const u8 *t)
 {
int hsync, hmin, hmax;
 
@@ -2844,7 +2844,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, u8 *t)
+   struct edid *edid, const u8 *t)
 {
int vsync, vmin, vmax;
 
@@ -2860,7 +2860,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, u8 *t)
+range_pixel_clock(struct edid *edid, const u8 *t)
 {
/* unspecified */
if (t[9] == 0 || t[9] == 255)
@@ -2876,10 +2876,10 @@ range_pixel_clock(struct edid *edid, u8 *t)
 
 static bool
 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
- struct detailed_timing *timing)
+ const struct detailed_timing *timing)
 {
u32 max_clock;
-   u8 *t = (u8 *)timing;
+   const u8 *t = (const u8 *)timing;
 
if (!mode_in_hsync_range(mode, edid, t))
return false;
@@ -2922,7 +2922,7 @@ static bool valid_inferred_mode(const struct 
drm_connector *connector,
 
 static int
 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -2957,7 +2957,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode 
*mode)
 
 static int
 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -2986,7 +2986,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, 
struct edid *edid,
 
 static int
 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -3018,8 +3018,8 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
-   struct edid_display_descriptor *data = &timing->data.descriptor;
-   struct detailed_data_monitor_range *range = &data->data.range;
+   const struct edid_display_descriptor *data = &timing->data.descriptor;
+   const struct detailed_data_monitor_range *range = &data->data.range;
 
if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
@@ -3068,11

[PATCH v2 10/11] drm/edid: constify struct edid passed around in callbacks and closure

2022-03-28 Thread Jani Nikula
Finalize detailed timing parsing constness by making struct edid also
const in callbacks and closure.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 48 +++---
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 4542f8b8c8f0..0c4b95fb6bd9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -97,7 +97,7 @@ static int oui(u8 first, u8 second, u8 third)
 
 struct detailed_mode_closure {
struct drm_connector *connector;
-   struct edid *edid;
+   const struct edid *edid;
bool preferred;
u32 quirks;
int modes;
@@ -2424,7 +2424,7 @@ is_rb(const struct detailed_timing *descriptor, void 
*data)
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
 static bool
-drm_monitor_supports_rb(struct edid *edid)
+drm_monitor_supports_rb(const struct edid *edid)
 {
if (edid->revision >= 4) {
bool ret = false;
@@ -2453,7 +2453,7 @@ find_gtf2(const struct detailed_timing *descriptor, void 
*data)
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
-drm_gtf2_hbreak(struct edid *edid)
+drm_gtf2_hbreak(const struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
@@ -2466,7 +2466,7 @@ drm_gtf2_hbreak(struct edid *edid)
 }
 
 static int
-drm_gtf2_2c(struct edid *edid)
+drm_gtf2_2c(const struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
@@ -2479,7 +2479,7 @@ drm_gtf2_2c(struct edid *edid)
 }
 
 static int
-drm_gtf2_m(struct edid *edid)
+drm_gtf2_m(const struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
@@ -2492,7 +2492,7 @@ drm_gtf2_m(struct edid *edid)
 }
 
 static int
-drm_gtf2_k(struct edid *edid)
+drm_gtf2_k(const struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
@@ -2505,7 +2505,7 @@ drm_gtf2_k(struct edid *edid)
 }
 
 static int
-drm_gtf2_2j(struct edid *edid)
+drm_gtf2_2j(const struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
@@ -2521,7 +2521,7 @@ drm_gtf2_2j(struct edid *edid)
  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
  * @edid: EDID block to scan
  */
-static int standard_timing_level(struct edid *edid)
+static int standard_timing_level(const struct edid *edid)
 {
if (edid->revision >= 2) {
if (edid->revision >= 4 && (edid->features & 
DRM_EDID_FEATURE_DEFAULT_GTF))
@@ -2564,7 +2564,7 @@ static int drm_mode_hsync(const struct drm_display_mode 
*mode)
  * and convert them into a real mode using CVT/GTF/DMT.
  */
 static struct drm_display_mode *
-drm_mode_std(struct drm_connector *connector, struct edid *edid,
+drm_mode_std(struct drm_connector *connector, const struct edid *edid,
 const struct std_timing *t)
 {
struct drm_device *dev = connector->dev;
@@ -2726,7 +2726,7 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  * return a new struct drm_display_mode.
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
- struct edid *edid,
+ const struct edid *edid,
  const struct detailed_timing 
*timing,
  u32 quirks)
 {
@@ -2826,7 +2826,7 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, const u8 *t)
+   const struct edid *edid, const u8 *t)
 {
int hsync, hmin, hmax;
 
@@ -2843,7 +2843,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, const u8 *t)
+   const struct edid *edid, const u8 *t)
 {
int vsync, vmin, vmax;
 
@@ -2859,7 +2859,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, const u8 *t)
+range_pixel_clock(const struct edid *edid, const u8 *t)
 {
/* unspecified */
if (t[9] == 0 || t[9] == 255)
@@ -2874,7 +2874,7 @@ range_pixel_clock(struct edid *edid, const u8 *t)
 }
 
 static bool
-mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
  const struct detailed_timing *timing)
 {
u32 max_clock;
@@ -2920,7 +2920,7 @@ static bool valid_inferred_mode(const struct 
drm_connector *connector,
 }
 
 static int
-drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_dmt_modes_for_range(struct drm_connector *connector, const struct edid 
*edid,
 

[PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks

2022-03-28 Thread Jani Nikula
Moving one level higher, constify struct detailed_timing pointers in
callbacks.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 40 --
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 60eee683be3f..95c48485794c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2347,7 +2347,7 @@ static bool is_detailed_timing_descriptor(const u8 d[18])
return d[0] != 0x00 || d[1] != 0x00;
 }
 
-typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
@@ -2406,7 +2406,7 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *descriptor, void *data)
+is_rb(const struct detailed_timing *descriptor, void *data)
 {
bool *res = data;
 
@@ -2438,9 +2438,9 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *descriptor, void *data)
+find_gtf2(const struct detailed_timing *descriptor, void *data)
 {
-   struct detailed_data_monitor_range **res = data;
+   const struct detailed_data_monitor_range **res = data;
 
if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
@@ -2456,7 +2456,7 @@ find_gtf2(struct detailed_timing *descriptor, void *data)
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-   struct detailed_data_monitor_range *range = NULL;
+   const struct detailed_data_monitor_range *range = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2469,7 +2469,7 @@ drm_gtf2_hbreak(struct edid *edid)
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-   struct detailed_data_monitor_range *range = NULL;
+   const struct detailed_data_monitor_range *range = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2482,7 +2482,7 @@ drm_gtf2_2c(struct edid *edid)
 static int
 drm_gtf2_m(struct edid *edid)
 {
-   struct detailed_data_monitor_range *range = NULL;
+   const struct detailed_data_monitor_range *range = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2495,7 +2495,7 @@ drm_gtf2_m(struct edid *edid)
 static int
 drm_gtf2_k(struct edid *edid)
 {
-   struct detailed_data_monitor_range *range = NULL;
+   const struct detailed_data_monitor_range *range = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -2508,7 +2508,7 @@ drm_gtf2_k(struct edid *edid)
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-   struct detailed_data_monitor_range *range = NULL;
+   const struct detailed_data_monitor_range *range = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
 
@@ -3015,7 +3015,7 @@ drm_cvt_modes_for_range(struct drm_connector *connector, 
struct edid *edid,
 }
 
 static void
-do_inferred_modes(struct detailed_timing *timing, void *c)
+do_inferred_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3097,7 +3097,7 @@ drm_est3_modes(struct drm_connector *connector, const 
struct detailed_timing *ti
 }
 
 static void
-do_established_modes(struct detailed_timing *timing, void *c)
+do_established_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
@@ -3148,7 +3148,7 @@ add_established_modes(struct drm_connector *connector, 
struct edid *edid)
 }
 
 static void
-do_standard_modes(struct detailed_timing *timing, void *c)
+do_standard_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
const struct edid_display_descriptor *data = &timing->data.descriptor;
@@ -3261,7 +3261,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 }
 
 static void
-do_cvt_mode(struct detailed_timing *timing, void *c)
+do_cvt_mode(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
@@ -3290,7 +3290,7 @@ add_cvt_modes(struct drm_connector *connector, struct 
edid *edid)
 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
 
 static void
-do_detailed_mode(struct detailed_timing *timing, void *c)
+do_detailed_mode(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
struct drm_display_mode *newmode;
@@ -4523,17 +4523,19 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector 
*connector, const u8 *db)
 }
 
 static void
-monitor_name(struct detailed_timing *t, void *data)
+monitor_name(const struct detailed_timing *timing, void *data)
 {
-   if (!is_display_descriptor(t, EDID

[PATCH v2 11/11] drm/edid: add more general struct edid constness in the interfaces

2022-03-28 Thread Jani Nikula
With this, the remaining non-const parts are the ones that actually
modify the EDID, for example to fix corrupt EDID.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 21 +++--
 include/drm/drm_edid.h | 10 +-
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0c4b95fb6bd9..114ccc712c71 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2150,7 +2150,7 @@ static u32 edid_extract_panel_id(const struct edid *edid)
 
 u32 drm_edid_get_panel_id(struct i2c_adapter *adapter)
 {
-   struct edid *edid;
+   const struct edid *edid;
u32 panel_id;
 
edid = drm_do_get_edid_base_block(NULL, drm_do_probe_ddc_edid, adapter);
@@ -3670,7 +3670,7 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static int
-add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_alternate_cea_modes(struct drm_connector *connector, const struct edid 
*edid)
 {
struct drm_device *dev = connector->dev;
struct drm_display_mode *mode, *tmp;
@@ -4351,7 +4351,7 @@ static void drm_parse_y420cmdb_bitmap(struct 
drm_connector *connector,
 }
 
 static int
-add_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
const u8 *cea = drm_find_cea_extension(edid);
const u8 *db, *hdmi = NULL, *video = NULL;
@@ -4557,7 +4557,7 @@ static int get_monitor_name(const struct edid *edid, char 
name[13])
  * @bufsize: The size of the name buffer (should be at least 14 chars.)
  *
  */
-void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
+void drm_edid_get_monitor_name(const struct edid *edid, char *name, int 
bufsize)
 {
int name_length;
char buf[13];
@@ -4591,7 +4591,8 @@ static void clear_eld(struct drm_connector *connector)
  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
  * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
  */
-static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
+static void drm_edid_to_eld(struct drm_connector *connector,
+   const struct edid *edid)
 {
uint8_t *eld = connector->eld;
const u8 *cea;
@@ -4687,7 +4688,7 @@ static void drm_edid_to_eld(struct drm_connector 
*connector, struct edid *edid)
  *
  * Return: The number of found SADs or negative number on error.
  */
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
 {
int count = 0;
int i, start, end, dbl;
@@ -4749,7 +4750,7 @@ EXPORT_SYMBOL(drm_edid_to_sad);
  * Return: The number of found Speaker Allocation Blocks or negative number on
  * error.
  */
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
 {
int count = 0;
int i, start, end, dbl;
@@ -4844,7 +4845,7 @@ EXPORT_SYMBOL(drm_av_sync_delay);
  *
  * Return: True if the monitor is HDMI, false if not or unknown.
  */
-bool drm_detect_hdmi_monitor(struct edid *edid)
+bool drm_detect_hdmi_monitor(const struct edid *edid)
 {
const u8 *edid_ext;
int i;
@@ -4882,7 +4883,7 @@ EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  *
  * Return: True if the monitor supports audio, false otherwise.
  */
-bool drm_detect_monitor_audio(struct edid *edid)
+bool drm_detect_monitor_audio(const struct edid *edid)
 {
const u8 *edid_ext;
int i, j;
@@ -5549,7 +5550,7 @@ static int add_displayid_detailed_1_modes(struct 
drm_connector *connector,
 }
 
 static int add_displayid_detailed_modes(struct drm_connector *connector,
-   struct edid *edid)
+   const struct edid *edid)
 {
const struct displayid_block *block;
struct displayid_iter iter;
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 8e322ef173a8..5fe6e302a81f 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -373,8 +373,8 @@ struct drm_connector;
 struct drm_connector_state;
 struct drm_display_mode;
 
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
 int drm_av_sync_delay(struct drm_connector *connector,
  const struct drm_display_mode *mode);
 
@@ -570,8 +570,8 @@ int drm_add_edid_modes(struct drm_connector *connector, 
struct edid *edid);
 int drm_add_override_edid_modes(struct drm_connector *connector);
 
 u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
-bool drm_detect_hdmi_monitor(struct edid *edid);
-bool drm_detect_mo

[PATCH v2 09/11] drm/edid: constify struct edid passed to detailed blocks

2022-03-28 Thread Jani Nikula
Constify the first level of struct edid in detailed timing parsing. Also
switch to struct edid instead of u8.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 48 ++
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 95c48485794c..4542f8b8c8f0 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2350,38 +2350,37 @@ static bool is_detailed_timing_descriptor(const u8 
d[18])
 typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
-cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+cea_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
int i, n;
u8 d = ext[0x02];
-   u8 *det_base = ext + d;
+   const u8 *det_base = ext + d;
 
if (d < 4 || d > 127)
return;
 
n = (127 - d) / 18;
for (i = 0; i < n; i++)
-   cb((struct detailed_timing *)(det_base + 18 * i), closure);
+   cb((const struct detailed_timing *)(det_base + 18 * i), 
closure);
 }
 
 static void
-vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+vtb_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
unsigned int i, n = min((int)ext[0x02], 6);
-   u8 *det_base = ext + 5;
+   const u8 *det_base = ext + 5;
 
if (ext[0x01] != 1)
return; /* unknown version */
 
for (i = 0; i < n; i++)
-   cb((struct detailed_timing *)(det_base + 18 * i), closure);
+   cb((const struct detailed_timing *)(det_base + 18 * i), 
closure);
 }
 
 static void
-drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+drm_for_each_detailed_block(const struct edid *edid, detailed_cb *cb, void 
*closure)
 {
int i;
-   struct edid *edid = (struct edid *)raw_edid;
 
if (edid == NULL)
return;
@@ -2389,8 +2388,8 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
cb(&(edid->detailed_timings[i]), closure);
 
-   for (i = 1; i <= raw_edid[0x7e]; i++) {
-   u8 *ext = raw_edid + (i * EDID_LENGTH);
+   for (i = 1; i <= edid->extensions; i++) {
+   const u8 *ext = (const u8 *)edid + (i * EDID_LENGTH);
 
switch (*ext) {
case CEA_EXT:
@@ -2430,7 +2429,7 @@ drm_monitor_supports_rb(struct edid *edid)
if (edid->revision >= 4) {
bool ret = false;
 
-   drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+   drm_for_each_detailed_block(edid, is_rb, &ret);
return ret;
}
 
@@ -2458,7 +2457,7 @@ drm_gtf2_hbreak(struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+   drm_for_each_detailed_block(edid, find_gtf2, &range);
 
BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
 offsetof(typeof(*range), formula.gtf2.hfreq_start_khz) != 
12);
@@ -2471,7 +2470,7 @@ drm_gtf2_2c(struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+   drm_for_each_detailed_block(edid, find_gtf2, &range);
 
BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
 offsetof(typeof(*range), formula.gtf2.c) != 13);
@@ -2484,7 +2483,7 @@ drm_gtf2_m(struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+   drm_for_each_detailed_block(edid, find_gtf2, &range);
 
BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
 offsetof(typeof(*range), formula.gtf2.m) != 14);
@@ -2497,7 +2496,7 @@ drm_gtf2_k(struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+   drm_for_each_detailed_block(edid, find_gtf2, &range);
 
BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
 offsetof(typeof(*range), formula.gtf2.k) != 16);
@@ -2510,7 +2509,7 @@ drm_gtf2_2j(struct edid *edid)
 {
const struct detailed_data_monitor_range *range = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &range);
+   drm_for_each_detailed_block(edid, find_gtf2, &range);
 
BUILD_BUG_ON(offsetof(struct detailed_timing, 
data.descriptor.data.range) +
 offsetof(typeof(*range), formula.gtf2.j) != 17);
@@ -3061,8 +3060,7 @@ add_inferred_modes(struct drm_connector *connector, 
struct edid *e

Re: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread Jani Nikula
On Mon, 28 Mar 2022, Jani Nikula  wrote:
> The pixel clock is conceptually part of the detailed timings, while it's
> just zero padding for display descriptors. Modify the structures to
> reflect this. Rename struct detailed_non_pixel to
> edid_display_descriptor to better reflect spec while at it. (Further
> struct renames are left for follow-up work.)
>
> Suggested-by: Ville Syrjälä 
> Signed-off-by: Jani Nikula 

This one's missing:

Cc: Harry Wentland 
Cc: Leo Li 
Cc: Rodrigo Siqueira 
Cc: amd-...@lists.freedesktop.org

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
>  drivers/gpu/drm/drm_edid.c| 12 ++--
>  include/drm/drm_edid.h|  9 +
>  3 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index b30656959fd8..e477f4b42b6b 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct 
> drm_connector *connector,
>  {
>   int i = 0;
>   struct detailed_timing *timing;
> - struct detailed_non_pixel *data;
> + struct edid_display_descriptor *data;
>   struct detailed_data_monitor_range *range;
>   struct amdgpu_dm_connector *amdgpu_dm_connector =
>   to_amdgpu_dm_connector(connector);
> @@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct 
> drm_connector *connector,
>   for (i = 0; i < 4; i++) {
>  
>   timing  = &edid->detailed_timings[i];
> - data= &timing->data.other_data;
> + data= &timing->data.descriptor;
>   range   = &data->data.range;
>   /*
>* Check if monitor has continuous frequency 
> mode
> @@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct 
> drm_connector *connector,
>   i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
>   if (i >= 0 && vsdb_info.freesync_supported) {
>   timing  = &edid->detailed_timings[i];
> - data= &timing->data.other_data;
> + data= &timing->data.descriptor;
>  
>   amdgpu_dm_connector->min_vfreq = 
> vsdb_info.min_refresh_rate_hz;
>   amdgpu_dm_connector->max_vfreq = 
> vsdb_info.max_refresh_rate_hz;
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 13d05062d68c..ac80681d64f6 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -2742,7 +2742,7 @@ static struct drm_display_mode 
> *drm_mode_detailed(struct drm_device *dev,
>   if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
>   mode->clock = 1088 * 10;
>   else
> - mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
> + mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
>  
>   mode->hdisplay = hactive;
>   mode->hsync_start = mode->hdisplay + hsync_offset;
> @@ -2984,7 +2984,7 @@ static void
>  do_inferred_modes(struct detailed_timing *timing, void *c)
>  {
>   struct detailed_mode_closure *closure = c;
> - struct detailed_non_pixel *data = &timing->data.other_data;
> + struct edid_display_descriptor *data = &timing->data.descriptor;
>   struct detailed_data_monitor_range *range = &data->data.range;
>  
>   if (!is_display_descriptor((const u8 *)timing, 
> EDID_DETAIL_MONITOR_RANGE))
> @@ -3117,7 +3117,7 @@ static void
>  do_standard_modes(struct detailed_timing *timing, void *c)
>  {
>   struct detailed_mode_closure *closure = c;
> - struct detailed_non_pixel *data = &timing->data.other_data;
> + struct edid_display_descriptor *data = &timing->data.descriptor;
>   struct drm_connector *connector = closure->connector;
>   struct edid *edid = closure->edid;
>   int i;
> @@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector 
> *connector,
>   for (i = 0; i < 4; i++) {
>   int width, height;
>  
> - cvt = &(timing->data.other_data.data.cvt[i]);
> + cvt = &(timing->data.descriptor.data.cvt[i]);
>  
>   if (!memcmp(cvt->code, empty, 3))
>   continue;
> @@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
>   if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
>   return;
>  
> - *(u8 **)data = t->data.other_data.data.str.str;
> + *(u8 **)data = t->data.descriptor.data.str.str;
>  }
>  
>  static int get_monitor_name(struct edid *edid, char name[13])
> @@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
>  void *info_monitor_range)
>  {

Re: [PATCH 0/3] drm: omapdrm: Fix excessive GEM buffers DMM/CMA usage

2022-03-28 Thread Tomi Valkeinen

Hi,

On 19/01/2022 12:23, Ivaylo Dimitrov wrote:

This patch series fixes excessive DMM or CMA usage of GEM buffers leading to
various runtime allocation failures. The series enables daily usage of devices
without exausting limited resources like CMA or DMM space if GPU rendering is
needed.

The first patch doesn't bring any functional changes, it just moves some
TILER/DMM related code to a separate function, to simplify the review of the
next two patches.

The second patch allows off-CPU rendering to non-scanout buffers. Without that
patch, it is basically impossible to use the driver allocated GEM buffers on
OMAP3 for anything else but a basic CPU rendered examples as if we want GPU
rendering, we must allocate buffers as scanout buffers, which are CMA allocated.
CMA soon gets fragmented and we start seeing allocation failures. Such failres
in Xorg cannot be handeled gracefully, so the system is basically unusable.

Third patch fixes similar issue on OMAP4/5, where DMM/TILER spaces get
fragmented with time, leading to allocation failures.

Series were tested on Motolola Droid4 and Nokia N900, with OMAP DDX and
PVR EXA from https://github.com/maemo-leste/xf86-video-omap

Ivaylo Dimitrov (3):
   drm: omapdrm: simplify omap_gem_pin
   drm: omapdrm: Support exporting of non-contiguous GEM BOs
   drm: omapdrm: Do no allocate non-scanout GEMs through DMM/TILER

  drivers/gpu/drm/omapdrm/omap_gem.c| 198 +-
  drivers/gpu/drm/omapdrm/omap_gem.h|   3 +-
  drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c |   5 +-
  3 files changed, 116 insertions(+), 90 deletions(-)



I have pushed this to drm-misc-next.

 Tomi


Re: [PATCH v12 3/4] drm/bridge: anx7625: add MIPI DPI input feature

2022-03-28 Thread Robert Foss
> > > > > > -   DRM_DEV_DEBUG_DRIVER(dev, "found dsi host node.\n");
> > > > > > +   bus_type = V4L2_FWNODE_BUS_TYPE_PARALLEL;
> > > > > > +   mipi_lanes = MAX_LANES_SUPPORT;
> > > > > > +   ep0 = of_graph_get_endpoint_by_regs(np, 0, 0);
> > > > > > +   if (ep0) {
> > > > > > +   if (of_property_read_u32(ep0, "bus-type", &bus_type))
> > > > > > +   bus_type = 0;
> > > > > > +
> > > > > > +   mipi_lanes = of_property_count_u32_elems(ep0, 
> > > > > > "data-lanes");
> > > > > > +   }
> > > > > > +
> > > > > > +   if (bus_type == V4L2_FWNODE_BUS_TYPE_PARALLEL) /* bus type is 
> > > > > > Parallel(DSI) */
> > > > >
> > > > > This is not correct *at all*. V4L2_FWNODE_BUS_TYPE_PARALLEL has 
> > > > > nothing
> > > > > to do with DSI. DSI stands for Digital *Serial* Interface. If 
> > > > > anything,
> > > > > the V4L2_FWNODE_BUS_TYPE_PARALLEL type would map better to DPI, even 
> > > > > if
> > > > > it's not an exact match.
> > > > >
> > > > > This patch has landed in v5.17-rc1, along with the corresponding
> > > > > bindings. As DT bindings are an ABI, we should really fix this before
> > > > > v5.17 is released. There is no DSI bus types defined in DT, and adding
> > > > > one as a fix so late in the v5.17-rc cycle seems a bit of a stretch to
> > > > > me (unless Rob disagrees).
> > > > >
> > > > > It would seem best to revert this series and the corresponding 
> > > > > bindings,
> > > > > and retry in v5.18.
> > > >
> > > > There is a DT patch using this property that is already queued up for 
> > > > 5.17
> > > > in the soc tree:
> > > >
> > > > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220214200507.2500693-1-nfraprado%40collabora.com%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C69542695a9cd42cff5a508da00ea7baa%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637823304343387964%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=KbitBhnvGWfpHu6PNLUmrgdqcoZbXaA3hGwq9iAjQfI%3D&reserved=0
> > > >
> > > > merged here:
> > > >
> > > > https://nam10.safelinks.protection.outlook.com/?url=http%3A%2F%2Fgit.kernel.org%2Fsoc%2Fsoc%2Fc%2F32568ae37596b529628ac09b875f4874e614f63f&data=04%7C01%7Cxji%40analogixsemi.com%7C69542695a9cd42cff5a508da00ea7baa%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637823304343387964%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=YJAs0IPxR0hrHpGR7K00itcTIF9cnz4L4ta%2B9ACQdSk%3D&reserved=0
> > > >
> > > > We will need to revert that one as well.
> > >
> > > I just submitted a series reverting the dt-binding change + the
> > > related commit to "mt8183: jacuzzi".
> > > Can I get a quick r-b/a-b in order to get this into v5.17.
> > >
> > > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220307154558.2505734-3-robert.foss%40linaro.org%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C69542695a9cd42cff5a508da00ea7baa%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637823304343387964%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=S5ScH2jid3ZRobvO%2Fl2nVgdOvFHNj1nWafTQYG3L9d0%3D&reserved=0
> > >
> >
> > v2 of revert submitted.
> >
> > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220308094911.2680291-1-robert.foss%40linaro.org%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C69542695a9cd42cff5a508da00ea7baa%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637823304343387964%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=D6ulS16g4v4x0u23OtYRrSeitTqllWwDzPiT%2BxMcQQg%3D&reserved=0
> >
> > Xin: Will you spin a series that adds DPI support and re-enables DPI
> > for anx7625? Additionally, "mt8183: jacuzzi" will have to have DPI
> > re-enabled.
> Hi Robert Foss, I'm little confused, do I need resend this serial or
> send a patch based on currently define(V4L2_FWNODE_BUS_TYPE_PARALLEL)?
>
> And use V4L2_FWNODE_BUS_TYPE_PARALLEL for DPI, other value for DSI
> setup?

V4L2_FWNODE_BUS_TYPE_PARALLEL is not meant to be used for DPI, but
rather is used to represtent CPI. So another enum (something along the
lines of V4L2_FWNODE_BUS_TYPE_DPI) needs to be defined, and then this
series needs to use this new enum.

I'd like to see the following:
 - Introduction of V4L2_FWNODE_BUS_TYPE_DPI
 - Reworking this series to use V4L2_FWNODE_BUS_TYPE_DPI
 - Reworking "mt8183: jacuzzi" to use V4L2_FWNODE_BUS_TYPE_DPI

Does that make sense?


Rob.


Re: [PATCH v13 5/6] drm/loongson: add drm driver for loongson display controller

2022-03-28 Thread Jiaxun Yang




在 2022/3/28 10:01, Sui Jingfeng 写道:


On 2022/3/28 16:51, kernel test robot wrote:

Hi Sui,

[...]




Hi,  my driver will not used on microblaze arch,

what does this warnings means, do i need to fix this?


Hi Jingfeng,

The problem it discovered is general for all archs.

Type of reg_base (MMIO pointer) should be "void __iomem *" instead of 
"void *"

everywhere, including parameter list.

__iomem is the attribute for MMIO.

Thanks.
- Jiaxun



Re: [PATCH] drm: sti: don't use kernel-doc markers

2022-03-28 Thread Alain Volmat
Hi Randy,

thanks for the patch.

Acked-by: Alain Volmat 

Alain

On Sat, Mar 26, 2022 at 04:51:32PM -0700, Randy Dunlap wrote:
> Don't mark static functions as kernel-doc.
> 
> Prevents multiple kernel-doc build warnings:
> 
> drivers/gpu/drm/sti/sti_hdmi.c:187: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * HDMI interrupt handler threaded
> drivers/gpu/drm/sti/sti_hdmi.c:219: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * HDMI interrupt handler
> drivers/gpu/drm/sti/sti_hdmi.c:241: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Set hdmi active area depending on the drm display mode selected
> drivers/gpu/drm/sti/sti_hdmi.c:262: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Overall hdmi configuration
> drivers/gpu/drm/sti/sti_hdmi.c:340: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Helper to concatenate infoframe in 32 bits word
> drivers/gpu/drm/sti/sti_hdmi.c:357: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Helper to write info frame
> drivers/gpu/drm/sti/sti_hdmi.c:427: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Prepare and configure the AVI infoframe
> drivers/gpu/drm/sti/sti_hdmi.c:470: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Prepare and configure the AUDIO infoframe
> drivers/gpu/drm/sti/sti_hdmi.c:555: warning: This comment starts with '/**', 
> but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>  * Software reset of the hdmi subsystem
> 
> Fixes: 5402626c83a2 ("drm: sti: add HDMI driver")
> Signed-off-by: Randy Dunlap 
> Cc: Aditya Srivastava 
> Cc: Benjamin Gaignard 
> Cc: Alain Volmat 
> Cc: David Airlie 
> Cc: Daniel Vetter 
> ---
>  drivers/gpu/drm/sti/sti_hdmi.c |   20 ++--
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> --- linux-next-20220325.orig/drivers/gpu/drm/sti/sti_hdmi.c
> +++ linux-next-20220325/drivers/gpu/drm/sti/sti_hdmi.c
> @@ -183,7 +183,7 @@ void hdmi_write(struct sti_hdmi *hdmi, u
>   writel(val, hdmi->regs + offset);
>  }
>  
> -/**
> +/*
>   * HDMI interrupt handler threaded
>   *
>   * @irq: irq number
> @@ -215,7 +215,7 @@ static irqreturn_t hdmi_irq_thread(int i
>   return IRQ_HANDLED;
>  }
>  
> -/**
> +/*
>   * HDMI interrupt handler
>   *
>   * @irq: irq number
> @@ -237,7 +237,7 @@ static irqreturn_t hdmi_irq(int irq, voi
>   return IRQ_WAKE_THREAD;
>  }
>  
> -/**
> +/*
>   * Set hdmi active area depending on the drm display mode selected
>   *
>   * @hdmi: pointer on the hdmi internal structure
> @@ -258,7 +258,7 @@ static void hdmi_active_area(struct sti_
>   hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
>  }
>  
> -/**
> +/*
>   * Overall hdmi configuration
>   *
>   * @hdmi: pointer on the hdmi internal structure
> @@ -336,7 +336,7 @@ static void hdmi_infoframe_reset(struct
>   hdmi_write(hdmi, 0x0, pack_offset + i);
>  }
>  
> -/**
> +/*
>   * Helper to concatenate infoframe in 32 bits word
>   *
>   * @ptr: pointer on the hdmi internal structure
> @@ -353,7 +353,7 @@ static inline unsigned int hdmi_infofram
>   return value;
>  }
>  
> -/**
> +/*
>   * Helper to write info frame
>   *
>   * @hdmi: pointer on the hdmi internal structure
> @@ -423,7 +423,7 @@ static void hdmi_infoframe_write_infopac
>   hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
>  }
>  
> -/**
> +/*
>   * Prepare and configure the AVI infoframe
>   *
>   * AVI infoframe are transmitted at least once per two video field and
> @@ -466,7 +466,7 @@ static int hdmi_avi_infoframe_config(str
>   return 0;
>  }
>  
> -/**
> +/*
>   * Prepare and configure the AUDIO infoframe
>   *
>   * AUDIO infoframe are transmitted once per frame and
> @@ -551,7 +551,7 @@ static int hdmi_vendor_infoframe_config(
>  
>  #define HDMI_TIMEOUT_SWRESET  100   /*milliseconds */
>  
> -/**
> +/*
>   * Software reset of the hdmi subsystem
>   *
>   * @hdmi: pointer on the hdmi internal structure
> @@ -785,7 +785,7 @@ static void sti_hdmi_disable(struct drm_
>   cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
>  }
>  
> -/**
> +/*
>   * sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent
>   * clocks. None-coherent clocks means that audio and TMDS clocks have not the
>   * same source (drifts between clocks). In this case assumption is that CTS 
> is


Re: [PATCH 1/2] dma-buf: add dma_fence_unwrap

2022-03-28 Thread Christian König

Hi Ville & Daniel,

Am 25.03.22 um 16:28 schrieb Christian König:

Am 25.03.22 um 16:25 schrieb Ville Syrjälä:

On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
Add a general purpose helper to deep dive into 
dma_fence_chain/dma_fence_array

structures and iterate over all the fences in them.

This is useful when we need to flatten out all fences in those 
structures.


Signed-off-by: Christian König 

One of the dma-buf patches took down Intel CI. Looks like every
machine oopses in some sync_file thing now:
<1>[  260.470008] BUG: kernel NULL pointer dereference, address: 
0010

<1>[  260.470020] #PF: supervisor read access in kernel mode
<1>[  260.470025] #PF: error_code(0x) - not-present page
<6>[  260.470030] PGD 0 P4D 0
<4>[  260.470035] Oops:  [#1] PREEMPT SMP NOPTI
<4>[  260.470040] CPU: 0 PID: 5306 Comm: core_hotunplug Not tainted 
5.17.0-CI-CI_DRM_11405+ #1
<4>[  260.470049] Hardware name: Intel Corporation Jasper Lake Client 
Platform/Jasperlake DDR4 SODIMM RVP, BIOS 
JSLSFWI1.R00.2385.D02.2010160831 10/16/2020

<4>[  260.470058] RIP: 0010:dma_fence_array_first+0x19/0x20


I've looked into this and the root cause seems to be that the new code 
doesn't handle dma_fence_arrays with zero elements.


That is rather easy to fix, but a dma_fence_array with zero number of 
elements is most likely a bug because under the wrong circumstances it 
can create a dma_fence instance which will never signal.


I've send out a patch on Frinday ([PATCH] dma-buf: WIP 
dma_fence_array_first fix) which avoids the crash and prints a warning 
if anybody tries to create a dma_fence_array with zero length.


Can you test this?

Thanks in advance,
Christian.


Re: [PATCH v12 3/4] drm/bridge: anx7625: add MIPI DPI input feature

2022-03-28 Thread Xin Ji
On Mon, Mar 28, 2022 at 11:54:12AM +0200, Robert Foss wrote:
> > > > > > > -   DRM_DEV_DEBUG_DRIVER(dev, "found dsi host node.\n");
> > > > > > > +   bus_type = V4L2_FWNODE_BUS_TYPE_PARALLEL;
> > > > > > > +   mipi_lanes = MAX_LANES_SUPPORT;
> > > > > > > +   ep0 = of_graph_get_endpoint_by_regs(np, 0, 0);
> > > > > > > +   if (ep0) {
> > > > > > > +   if (of_property_read_u32(ep0, "bus-type", &bus_type))
> > > > > > > +   bus_type = 0;
> > > > > > > +
> > > > > > > +   mipi_lanes = of_property_count_u32_elems(ep0, 
> > > > > > > "data-lanes");
> > > > > > > +   }
> > > > > > > +
> > > > > > > +   if (bus_type == V4L2_FWNODE_BUS_TYPE_PARALLEL) /* bus type is 
> > > > > > > Parallel(DSI) */
> > > > > >
> > > > > > This is not correct *at all*. V4L2_FWNODE_BUS_TYPE_PARALLEL has 
> > > > > > nothing
> > > > > > to do with DSI. DSI stands for Digital *Serial* Interface. If 
> > > > > > anything,
> > > > > > the V4L2_FWNODE_BUS_TYPE_PARALLEL type would map better to DPI, 
> > > > > > even if
> > > > > > it's not an exact match.
> > > > > >
> > > > > > This patch has landed in v5.17-rc1, along with the corresponding
> > > > > > bindings. As DT bindings are an ABI, we should really fix this 
> > > > > > before
> > > > > > v5.17 is released. There is no DSI bus types defined in DT, and 
> > > > > > adding
> > > > > > one as a fix so late in the v5.17-rc cycle seems a bit of a stretch 
> > > > > > to
> > > > > > me (unless Rob disagrees).
> > > > > >
> > > > > > It would seem best to revert this series and the corresponding 
> > > > > > bindings,
> > > > > > and retry in v5.18.
> > > > >
> > > > > There is a DT patch using this property that is already queued up for 
> > > > > 5.17
> > > > > in the soc tree:
> > > > >
> > > > > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220214200507.2500693-1-nfraprado%40collabora.com%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C450c5609d8c24e9a34fa08da10a0f126%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637840580680816692%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=bARYbwXq6IJGxn3UBp%2F75lZhoTpzmZkTQsN0yvs7Cgg%3D&reserved=0
> > > > >
> > > > > merged here:
> > > > >
> > > > > https://nam10.safelinks.protection.outlook.com/?url=http%3A%2F%2Fgit.kernel.org%2Fsoc%2Fsoc%2Fc%2F32568ae37596b529628ac09b875f4874e614f63f&data=04%7C01%7Cxji%40analogixsemi.com%7C450c5609d8c24e9a34fa08da10a0f126%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637840580680816692%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=lt3Tp8DveE1RJ%2F1MqDzYdKtHDxIyqhBbur%2Fm4N432AI%3D&reserved=0
> > > > >
> > > > > We will need to revert that one as well.
> > > >
> > > > I just submitted a series reverting the dt-binding change + the
> > > > related commit to "mt8183: jacuzzi".
> > > > Can I get a quick r-b/a-b in order to get this into v5.17.
> > > >
> > > > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220307154558.2505734-3-robert.foss%40linaro.org%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C450c5609d8c24e9a34fa08da10a0f126%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637840580680816692%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=dgA%2BrQ3KBMPLoR5bwL5Wt2Vs6EuNy%2Fh9yfOftxeUXjM%3D&reserved=0
> > > >
> > >
> > > v2 of revert submitted.
> > >
> > > https://nam10.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fall%2F20220308094911.2680291-1-robert.foss%40linaro.org%2F&data=04%7C01%7Cxji%40analogixsemi.com%7C450c5609d8c24e9a34fa08da10a0f126%7Cb099b0b4f26c4cf59a0fd5be9acab205%7C0%7C0%7C637840580680816692%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=vIcCvXrwZs8XhXuoQ8On7vB9%2Bwrsov1DD5UBX%2B1G93Q%3D&reserved=0
> > >
> > > Xin: Will you spin a series that adds DPI support and re-enables DPI
> > > for anx7625? Additionally, "mt8183: jacuzzi" will have to have DPI
> > > re-enabled.
> > Hi Robert Foss, I'm little confused, do I need resend this serial or
> > send a patch based on currently define(V4L2_FWNODE_BUS_TYPE_PARALLEL)?
> >
> > And use V4L2_FWNODE_BUS_TYPE_PARALLEL for DPI, other value for DSI
> > setup?
> 
> V4L2_FWNODE_BUS_TYPE_PARALLEL is not meant to be used for DPI, but
> rather is used to represtent CPI. So another enum (something along the
> lines of V4L2_FWNODE_BUS_TYPE_DPI) needs to be defined, and then this
> series needs to use this new enum.
> 
> I'd like to see the following:
>  - Introduction of V4L2_FWNODE_BUS_TYPE_DPI
>  - Reworking this series to use V4L2_FWNODE_BUS_TYPE_DPI
>  - Reworking "mt8183: jacuzzi" to use V4L2_FWNODE_BUS_TYPE_DPI
> 
> Does that make sense?
Hi Rob, OK, I'll prepare the patch for review.
Thanks,
Xin
> 
> 
> Rob.


[PATCH] phy: mediatek: phy-mtk-hdmi: Simplify with dev_err_probe()

2022-03-28 Thread AngeloGioacchino Del Regno
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno 

---
 drivers/phy/mediatek/phy-mtk-hdmi.c | 50 +++--
 1 file changed, 19 insertions(+), 31 deletions(-)

diff --git a/drivers/phy/mediatek/phy-mtk-hdmi.c 
b/drivers/phy/mediatek/phy-mtk-hdmi.c
index 5fb4217fb8e0..d4bd419abc3c 100644
--- a/drivers/phy/mediatek/phy-mtk-hdmi.c
+++ b/drivers/phy/mediatek/phy-mtk-hdmi.c
@@ -120,20 +120,16 @@ static int mtk_hdmi_phy_probe(struct platform_device 
*pdev)
return PTR_ERR(hdmi_phy->regs);
 
ref_clk = devm_clk_get(dev, "pll_ref");
-   if (IS_ERR(ref_clk)) {
-   ret = PTR_ERR(ref_clk);
-   dev_err(&pdev->dev, "Failed to get PLL reference clock: %d\n",
-   ret);
-   return ret;
-   }
+   if (IS_ERR(ref_clk))
+   return dev_err_probe(dev, PTR_ERR(ref_clk),
+"Failed to get PLL reference clock\n");
+
ref_clk_name = __clk_get_name(ref_clk);
 
ret = of_property_read_string(dev->of_node, "clock-output-names",
  &clk_init.name);
-   if (ret < 0) {
-   dev_err(dev, "Failed to read clock-output-names: %d\n", ret);
-   return ret;
-   }
+   if (ret < 0)
+   return dev_err_probe(dev, ret, "Failed to read 
clock-output-names\n");
 
hdmi_phy->dev = dev;
hdmi_phy->conf =
@@ -141,25 +137,19 @@ static int mtk_hdmi_phy_probe(struct platform_device 
*pdev)
mtk_hdmi_phy_clk_get_data(hdmi_phy, &clk_init);
hdmi_phy->pll_hw.init = &clk_init;
hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw);
-   if (IS_ERR(hdmi_phy->pll)) {
-   ret = PTR_ERR(hdmi_phy->pll);
-   dev_err(dev, "Failed to register PLL: %d\n", ret);
-   return ret;
-   }
+   if (IS_ERR(hdmi_phy->pll))
+   return dev_err_probe(dev, PTR_ERR(hdmi_phy->pll),
+   "Failed to register PLL\n");
 
ret = of_property_read_u32(dev->of_node, "mediatek,ibias",
   &hdmi_phy->ibias);
-   if (ret < 0) {
-   dev_err(&pdev->dev, "Failed to get ibias: %d\n", ret);
-   return ret;
-   }
+   if (ret < 0)
+   return dev_err_probe(dev, ret, "Failed to get ibias\n");
 
ret = of_property_read_u32(dev->of_node, "mediatek,ibias_up",
   &hdmi_phy->ibias_up);
-   if (ret < 0) {
-   dev_err(&pdev->dev, "Failed to get ibias up: %d\n", ret);
-   return ret;
-   }
+   if (ret < 0)
+   return dev_err_probe(dev, ret, "Failed to get ibias_up\n");
 
dev_info(dev, "Using default TX DRV impedance: 4.2k/36\n");
hdmi_phy->drv_imp_clk = 0x30;
@@ -168,17 +158,15 @@ static int mtk_hdmi_phy_probe(struct platform_device 
*pdev)
hdmi_phy->drv_imp_d0 = 0x30;
 
phy = devm_phy_create(dev, NULL, mtk_hdmi_phy_dev_get_ops(hdmi_phy));
-   if (IS_ERR(phy)) {
-   dev_err(dev, "Failed to create HDMI PHY\n");
-   return PTR_ERR(phy);
-   }
+   if (IS_ERR(phy))
+   return dev_err_probe(dev, PTR_ERR(phy), "Cannot create HDMI 
PHY\n");
+
phy_set_drvdata(phy, hdmi_phy);
 
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-   if (IS_ERR(phy_provider)) {
-   dev_err(dev, "Failed to register HDMI PHY\n");
-   return PTR_ERR(phy_provider);
-   }
+   if (IS_ERR(phy_provider))
+   return dev_err_probe(dev, PTR_ERR(phy_provider),
+"Failed to register HDMI PHY\n");
 
if (hdmi_phy->conf->pll_default_off)
hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
-- 
2.35.1



[PATCH] phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()

2022-03-28 Thread AngeloGioacchino Del Regno
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno 

---
 drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c 
b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
index 67b005d5b9e3..815895e54172 100644
--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
@@ -154,11 +154,9 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev)
return PTR_ERR(mipi_tx->regs);
 
ref_clk = devm_clk_get(dev, NULL);
-   if (IS_ERR(ref_clk)) {
-   ret = PTR_ERR(ref_clk);
-   dev_err(dev, "Failed to get reference clock: %d\n", ret);
-   return ret;
-   }
+   if (IS_ERR(ref_clk))
+   return dev_err_probe(dev, PTR_ERR(ref_clk),
+"Failed to get reference clock\n");
 
ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",
   &mipi_tx->mipitx_drive);
-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread kernel test robot
Hi Jani,

I love your patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 
next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: x86_64-randconfig-a003-20220328 
(https://download.01.org/0day-ci/archive/20220328/202203281926.athxjpnk-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
reproduce (this is a W=1 build):
# 
https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
git checkout f538c9296c54ce8f878432153584a68939ffc111
# save the config file to linux build tree
mkdir build_dir
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has 
no member named 'pixel_clock'
 478 |   .pixel_clock = 3383,
 |^~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around 
>> initializer [-Wmissing-braces]
 464 | static struct edid gm12u320_edid = {
 |^
   ..
 478 |   .pixel_clock = 3383,
 |  {{  }}
 479 |   /* hactive = 848, hblank = 256 */
 480 |   .data.pixel_data.hactive_lo = 0x50,
 | }}
 481 |   .data.pixel_data.hblank_lo = 0x00,
 |}}
 482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
 |}}
 483 |   /* vactive = 480, vblank = 28 */
 484 |   .data.pixel_data.vactive_lo = 0xe0,
 | }}
 485 |   .data.pixel_data.vblank_lo = 0x1c,
 |}}
 486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
 |}}
 487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
 488 |   .data.pixel_data.hsync_offset_lo = 0x28,
 |  }}
 489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
 |   }}
 490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
 |  }}
 491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
 |}}
   ..
 494 |  }, {
 |  }}
   drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has 
no member named 'pixel_clock'
 495 |   .pixel_clock = 0,
 |^~~
   drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union ' has no 
member named 'other_data'
 496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
 | ^~
   drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field 
overwritten [-Woverride-init]
 496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
 |   ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 
'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union ' has no 
member named 'other_data'
 497 |   .data.other_data.data.range.min_vfreq = 59,
 | ^~
   drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field 
overwritten [-Woverride-init]
 497 |   .data.other_data.data.range.min_vfreq = 59,
 |   ^~
   drivers/gpu/drm/tiny/gm12u320.c:497:43: note: (near initialization for 
'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:498:9: error: 'union ' has no 
member named 'other_data'
 498 |   .data.other_data.data.range.max_vfreq = 61,
 | ^~
   drivers/gpu/drm/tiny/gm12u320.c:498:43: warning: initialized field 
overwritten [-Woverride-init]
 498 |   .data.other_data.data.range.max_vfreq = 61,
 |   ^~
   drivers/gpu/

[PATCH 3/4] dt-bindings: drm/bridge: anx7625: Change bus-type to 7 (DPI)

2022-03-28 Thread Xin Ji
Change bus-type define for DPI.

Fixes: a43661e7e819 ("dt-bindings:drm/bridge:anx7625:add vendor define")

Signed-off-by: Xin Ji 
---
 .../devicetree/bindings/display/bridge/analogix,anx7625.yaml  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
index 0d38d6fe3983..4590186c4a0b 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -106,7 +106,7 @@ properties:
   remote-endpoint: true
 
   bus-type:
-enum: [1, 5]
+enum: [7]
 default: 1
 
   data-lanes: true
@@ -158,7 +158,7 @@ examples:
 reg = <0>;
 anx7625_in: endpoint {
 remote-endpoint = <&mipi_dsi>;
-bus-type = <5>;
+bus-type = <7>;
 data-lanes = <0 1 2 3>;
 };
 };
-- 
2.25.1



[PATCH 4/4] drm/bridge: anx7625: Use DPI bus type

2022-03-28 Thread Xin Ji
As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI
interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it.

Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
Signed-off-by: Xin Ji 
---
 drivers/gpu/drm/bridge/analogix/anx7625.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c 
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 9a2a19ad4202..c528fa2c9533 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -1615,14 +1615,14 @@ static int anx7625_parse_dt(struct device *dev,
 
anx7625_get_swing_setting(dev, pdata);
 
-   pdata->is_dpi = 1; /* default dpi mode */
+   pdata->is_dpi = 0; /* default dsi mode */
pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0);
if (!pdata->mipi_host_node) {
DRM_DEV_ERROR(dev, "fail to get internal panel.\n");
return -ENODEV;
}
 
-   bus_type = V4L2_FWNODE_BUS_TYPE_PARALLEL;
+   bus_type = 0;
mipi_lanes = MAX_LANES_SUPPORT;
ep0 = of_graph_get_endpoint_by_regs(np, 0, 0);
if (ep0) {
@@ -1632,8 +1632,8 @@ static int anx7625_parse_dt(struct device *dev,
mipi_lanes = of_property_count_u32_elems(ep0, "data-lanes");
}
 
-   if (bus_type == V4L2_FWNODE_BUS_TYPE_PARALLEL) /* bus type is 
Parallel(DSI) */
-   pdata->is_dpi = 0;
+   if (bus_type == V4L2_FWNODE_BUS_TYPE_DPI) /* bus type is DPI */
+   pdata->is_dpi = 1;
 
pdata->mipi_lanes = mipi_lanes;
if (pdata->mipi_lanes > MAX_LANES_SUPPORT || pdata->mipi_lanes <= 0)
-- 
2.25.1



Re: [PATCH] drm/v3d: Use kvcalloc

2022-03-28 Thread Melissa Wen
On 03/12, Harshit Mogalapalli wrote:
> kvcalloc is same as kvmalloc_array + __GFP_ZERO.
> 
> Signed-off-by: Harshit Mogalapalli 
> ---
>  drivers/gpu/drm/v3d/v3d_gem.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
> index c7ed2e1cbab6..f7d37228461e 100644
> --- a/drivers/gpu/drm/v3d/v3d_gem.c
> +++ b/drivers/gpu/drm/v3d/v3d_gem.c
> @@ -308,9 +308,8 @@ v3d_lookup_bos(struct drm_device *dev,
>   return -EINVAL;
>   }
>  
> - job->bo = kvmalloc_array(job->bo_count,
> -  sizeof(struct drm_gem_cma_object *),
> -  GFP_KERNEL | __GFP_ZERO);
> + job->bo = kvcalloc(job->bo_count, sizeof(struct drm_gem_cma_object *),
> +GFP_KERNEL);

Hi Harshit,

This change seems valid to me, but I believe, in this point, v3d should
move to use the DRM function `drm_gem_objects_lookup()`, and then your
change goes there, since drm_get_objects_lookup() has the same issue
you're pointing. What do you think?

I already sent a patchset to replace steps in v3d_lookup_bos() by
drm_gem_objects_lookup(), as I mentioned. The patchset is here:
https://patchwork.freedesktop.org/series/101610/
Willing to review it? ^

Thanks,

Melissa

>   if (!job->bo) {
>   DRM_DEBUG("Failed to allocate validated BO pointers\n");
>   return -ENOMEM;
> -- 
> 2.31.1
> 


signature.asc
Description: PGP signature


Re: [ PATCH ] Documentation: fixed doc-build warnings

2022-03-28 Thread David Howells
kushagra...@outlook.com wrote:

> @@ -256,7 +256,6 @@ struct fscache_cookie *fscache_acquire_cookie(struct 
> fscache_volume *volume,
>  
>  /**
>   * fscache_use_cookie - Request usage of cookie attached to an object
> - * @object: Object description
>   * @will_modify: If cache is expected to be modified locally
>   *
>   * Request usage of the cookie attached to an object.  The caller should tell
> @@ -272,7 +271,6 @@ static inline void fscache_use_cookie(struct 
> fscache_cookie *cookie,
>  
>  /**
>   * fscache_unuse_cookie - Cease usage of cookie attached to an object
> - * @object: Object description
>   * @aux_data: Updated auxiliary data (or NULL)
>   * @object_size: Revised size of the object (or NULL)
>   *

Just deleting these lines is the wrong thing to do.  They should instead
mention the cookie parameter.

David



Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread kernel test robot
Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 
next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: i386-randconfig-a012-20220328 
(https://download.01.org/0day-ci/archive/20220328/202203282045.xd3d6of8-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
0f6d9501cf49ce02937099350d08f20c4af86f3d)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
git checkout f538c9296c54ce8f878432153584a68939ffc111
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/tiny/gm12u320.c:478:4: error: field designator 'pixel_clock' 
>> does not refer to any field in type 'struct detailed_timing'
   .pixel_clock = 3383,
^
   drivers/gpu/drm/tiny/gm12u320.c:495:4: error: field designator 'pixel_clock' 
does not refer to any field in type 'struct detailed_timing'
   .pixel_clock = 0,
^
>> drivers/gpu/drm/tiny/gm12u320.c:496:9: error: field designator 'other_data' 
>> does not refer to any field in type 'union (unnamed union at 
>> include/drm/drm_edid.h:173:2)'
   .data.other_data.type = 0xfd, /* Monitor ranges */
 ^
   drivers/gpu/drm/tiny/gm12u320.c:497:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.min_vfreq = 59,
 ^
   drivers/gpu/drm/tiny/gm12u320.c:498:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.max_vfreq = 61,
 ^
   drivers/gpu/drm/tiny/gm12u320.c:499:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.min_hfreq_khz = 29,
 ^
   drivers/gpu/drm/tiny/gm12u320.c:500:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.max_hfreq_khz = 32,
 ^
   drivers/gpu/drm/tiny/gm12u320.c:501:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.pixel_clock_mhz = 4, /* 40 MHz */
 ^
   drivers/gpu/drm/tiny/gm12u320.c:502:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.flags = 0,
 ^
   drivers/gpu/drm/tiny/gm12u320.c:503:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.data.range.formula.cvt = {
 ^
   drivers/gpu/drm/tiny/gm12u320.c:506:4: error: field designator 'pixel_clock' 
does not refer to any field in type 'struct detailed_timing'
   .pixel_clock = 0,
^
   drivers/gpu/drm/tiny/gm12u320.c:507:9: error: field designator 'other_data' 
does not refer to any field in type 'union (unnamed union at 
include/drm/drm_edid.h:173:2)'
   .data.other_data.type = 0xfc, /* Model string */
 ^
   drivers/gpu/drm/ti

Re: [PATCH] stm: ltdc: fix two incorrect NULL checks on list iterator

2022-03-28 Thread Raphael Gallais-Pou
Hello Xiaomeng

On 3/27/22 07:53, Xiaomeng Tong wrote:
> The two bugs are here:
>   if (encoder) {
>   if (bridge && bridge->timings)
>
> The list iterator value 'encoder/bridge' will *always* be set and
> non-NULL by drm_for_each_encoder()/list_for_each_entry(), so it is
> incorrect to assume that the iterator value will be NULL if the
> list is empty or no element is found.
>
> To fix the bug, use a new variable '*_iter' as the list iterator,
> while use the old variable 'encoder/bridge' as a dedicated pointer
> to point to the found element.
>
> Cc: sta...@vger.kernel.org
> Fixes: 99e360442f223 ("drm/stm: Fix bus_flags handling")
> Signed-off-by: Xiaomeng Tong 
> ---
>  drivers/gpu/drm/stm/ltdc.c | 16 ++--
>  1 file changed, 10 insertions(+), 6 deletions(-)


Thanks for your fix

Acked-by: Raphael Gallais-Pou 


Raphaël Gallais-Pou



[PATCH v3 0/4] drm/atomic: Atomic Private State debugging

2022-03-28 Thread Maxime Ripard
Hi,

This series adds an atomic_print_state hook for drm_private_obj to ease the
debugging of driver-specific sub-classes, and adds one for vc4.

It also changes the call site of drm_atomic_print_new_state to make it more
consistent.

Let me know what you think,
Maxime

Changes from v2:
  - Reworded the commit message of the first patch
  - Printed the state before running atomic_check

Changes from v1:
  - Added Daniel tags
  - Added drm_private_state documentation
  - Fixed unused variable warning
  - Removed the drm_atomic_nonblocking_commit() logging

Maxime Ripard (4):
  drm/atomic: Print the state every non-blocking commit
  drm/atomic: Add atomic_print_state to private objects
  drm/vc4: Constify private state accessors
  drm/vc4: Implement atomic_print_state for HVS channel state

 drivers/gpu/drm/drm_atomic.c  | 20 
 drivers/gpu/drm/drm_atomic_uapi.c |  4 
 drivers/gpu/drm/vc4/vc4_kms.c | 24 +---
 include/drm/drm_atomic.h  | 27 +++
 4 files changed, 64 insertions(+), 11 deletions(-)

-- 
2.35.1



[PATCH v3 1/4] drm/atomic: Print the state every non-blocking commit

2022-03-28 Thread Maxime Ripard
The DRM_UT_STATE controls whether we're calling
drm_atomic_print_new_state() whenever a new state is committed. However,
that call is made in the drm_mode_atomic_ioctl(), whereas we have
multiple users of the drm_atomic_commit() function in the kernel
(framebuffer emulation, drm_atomic_helper_dirtyfb, etc.).

This leads to multiple states being committed but never actually
displayed even though we asked to have verbose atomic state debugging.

Let's move the call to drm_atomic_print_new_state() to
drm_atomic_commit() to make sure we don't miss any. Non-blocking commits
were never logged though, and it would create too much churn in the logs
to do so, so leave them out for now.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_atomic.c  | 4 
 drivers/gpu/drm/drm_atomic_uapi.c | 4 
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 88cd992df356..637df126c2d9 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1423,8 +1423,12 @@ EXPORT_SYMBOL(drm_atomic_check_only);
 int drm_atomic_commit(struct drm_atomic_state *state)
 {
struct drm_mode_config *config = &state->dev->mode_config;
+   struct drm_printer p = drm_info_printer(state->dev->dev);
int ret;
 
+   if (drm_debug_enabled(DRM_UT_STATE))
+   drm_atomic_print_new_state(state, &p);
+
ret = drm_atomic_check_only(state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 9781722519c3..45e6d3c62a9a 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1326,7 +1326,6 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
struct drm_out_fence_state *fence_state;
int ret = 0;
unsigned int i, j, num_fences;
-   struct drm_printer p = drm_info_printer(dev->dev);
 
/* disallow for drivers not supporting atomic: */
if (!drm_core_check_feature(dev, DRIVER_ATOMIC))
@@ -1458,9 +1457,6 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
} else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
ret = drm_atomic_nonblocking_commit(state);
} else {
-   if (drm_debug_enabled(DRM_UT_STATE))
-   drm_atomic_print_new_state(state, &p);
-
ret = drm_atomic_commit(state);
}
 
-- 
2.35.1



[PATCH v3 2/4] drm/atomic: Add atomic_print_state to private objects

2022-03-28 Thread Maxime Ripard
A number of drivers (amdgpu, komeda, vc4, etc.) leverage the
drm_private_state structure, but we don't have any infrastructure to
provide debugging like we do for the other components state. Let's add
an atomic_print_state hook to be consistent.

Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_atomic.c | 16 
 include/drm/drm_atomic.h | 27 +++
 2 files changed, 39 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 637df126c2d9..58c0283fb6b0 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -789,6 +789,8 @@ drm_atomic_private_obj_init(struct drm_device *dev,
obj->state = state;
obj->funcs = funcs;
list_add_tail(&obj->head, &dev->mode_config.privobj_list);
+
+   state->obj = obj;
 }
 EXPORT_SYMBOL(drm_atomic_private_obj_init);
 
@@ -1636,6 +1638,15 @@ int __drm_atomic_helper_set_config(struct drm_mode_set 
*set,
 }
 EXPORT_SYMBOL(__drm_atomic_helper_set_config);
 
+static void drm_atomic_private_obj_print_state(struct drm_printer *p,
+  const struct drm_private_state 
*state)
+{
+   struct drm_private_obj *obj = state->obj;
+
+   if (obj->funcs->atomic_print_state)
+   obj->funcs->atomic_print_state(p, state);
+}
+
 /**
  * drm_atomic_print_new_state - prints drm atomic state
  * @state: atomic configuration to check
@@ -1656,6 +1667,8 @@ void drm_atomic_print_new_state(const struct 
drm_atomic_state *state,
struct drm_crtc_state *crtc_state;
struct drm_connector *connector;
struct drm_connector_state *connector_state;
+   struct drm_private_obj *obj;
+   struct drm_private_state *obj_state;
int i;
 
if (!p) {
@@ -1673,6 +1686,9 @@ void drm_atomic_print_new_state(const struct 
drm_atomic_state *state,
 
for_each_new_connector_in_state(state, connector, connector_state, i)
drm_atomic_connector_print_state(p, connector_state);
+
+   for_each_new_private_obj_in_state(state, obj, obj_state, i)
+   drm_atomic_private_obj_print_state(p, obj_state);
 }
 EXPORT_SYMBOL(drm_atomic_print_new_state);
 
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index 1701c2128a5c..025085df 100644
--- a/include/drm/drm_atomic.h
+++ b/include/drm/drm_atomic.h
@@ -227,6 +227,18 @@ struct drm_private_state_funcs {
 */
void (*atomic_destroy_state)(struct drm_private_obj *obj,
 struct drm_private_state *state);
+
+   /**
+* @atomic_print_state:
+*
+* If driver subclasses &struct drm_private_state, it should implement
+* this optional hook for printing additional driver specific state.
+*
+* Do not call this directly, use drm_atomic_private_obj_print_state()
+* instead.
+*/
+   void (*atomic_print_state)(struct drm_printer *p,
+  const struct drm_private_state *state);
 };
 
 /**
@@ -311,14 +323,21 @@ struct drm_private_obj {
 
 /**
  * struct drm_private_state - base struct for driver private object state
- * @state: backpointer to global drm_atomic_state
  *
- * Currently only contains a backpointer to the overall atomic update, but in
- * the future also might hold synchronization information similar to e.g.
- * &drm_crtc.commit.
+ * Currently only contains a backpointer to the overall atomic update,
+ * and the relevant private object but in the future also might hold
+ * synchronization information similar to e.g. &drm_crtc.commit.
  */
 struct drm_private_state {
+   /**
+* @state: backpointer to global drm_atomic_state
+*/
struct drm_atomic_state *state;
+
+   /**
+* @obj: backpointer to the private object
+*/
+   struct drm_private_obj *obj;
 };
 
 struct __drm_private_objs_state {
-- 
2.35.1



[PATCH v3 3/4] drm/vc4: Constify private state accessors

2022-03-28 Thread Maxime Ripard
None of those helpers modify the pointed data, let's make them const.

Acked-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_kms.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index 24de29bc1cda..26b771c919b1 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -32,7 +32,8 @@ struct vc4_ctm_state {
int fifo;
 };
 
-static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
+static struct vc4_ctm_state *
+to_vc4_ctm_state(const struct drm_private_state *priv)
 {
return container_of(priv, struct vc4_ctm_state, base);
 }
@@ -49,7 +50,7 @@ struct vc4_hvs_state {
 };
 
 static struct vc4_hvs_state *
-to_vc4_hvs_state(struct drm_private_state *priv)
+to_vc4_hvs_state(const struct drm_private_state *priv)
 {
return container_of(priv, struct vc4_hvs_state, base);
 }
@@ -61,7 +62,7 @@ struct vc4_load_tracker_state {
 };
 
 static struct vc4_load_tracker_state *
-to_vc4_load_tracker_state(struct drm_private_state *priv)
+to_vc4_load_tracker_state(const struct drm_private_state *priv)
 {
return container_of(priv, struct vc4_load_tracker_state, base);
 }
-- 
2.35.1



[PATCH v3 4/4] drm/vc4: Implement atomic_print_state for HVS channel state

2022-03-28 Thread Maxime Ripard
The HVS state configuration is useful when debugging what's going on in
the vc4 hardware pipeline. Add an implementation of .atomic_print_state.

Acked-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_kms.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c
index 26b771c919b1..bffd81d4bfcf 100644
--- a/drivers/gpu/drm/vc4/vc4_kms.c
+++ b/drivers/gpu/drm/vc4/vc4_kms.c
@@ -701,9 +701,26 @@ static void vc4_hvs_channels_destroy_state(struct 
drm_private_obj *obj,
kfree(hvs_state);
 }
 
+static void vc4_hvs_channels_print_state(struct drm_printer *p,
+const struct drm_private_state *state)
+{
+   struct vc4_hvs_state *hvs_state = to_vc4_hvs_state(state);
+   unsigned int i;
+
+   drm_printf(p, "HVS State\n");
+   drm_printf(p, "\tCore Clock Rate: %lu\n", hvs_state->core_clock_rate);
+
+   for (i = 0; i < HVS_NUM_CHANNELS; i++) {
+   drm_printf(p, "\tChannel %d\n", i);
+   drm_printf(p, "\t\tin use=%d\n", 
hvs_state->fifo_state[i].in_use);
+   drm_printf(p, "\t\tload=%lu\n", 
hvs_state->fifo_state[i].fifo_load);
+   }
+}
+
 static const struct drm_private_state_funcs vc4_hvs_state_funcs = {
.atomic_duplicate_state = vc4_hvs_channels_duplicate_state,
.atomic_destroy_state = vc4_hvs_channels_destroy_state,
+   .atomic_print_state = vc4_hvs_channels_print_state,
 };
 
 static void vc4_hvs_channels_obj_fini(struct drm_device *dev, void *unused)
-- 
2.35.1



[PATCH] drm/i915: Move intel_vtd_active and run_as_guest to i915_utils

2022-03-28 Thread Tvrtko Ursulin
From: Tvrtko Ursulin 

Continuation of the effort to declutter i915_drv.h.

Also, component specific helpers which consult the iommu/virtualization
helpers moved to respective component source/header files as appropriate.

Signed-off-by: Tvrtko Ursulin 
Cc: Jani Nikula 
Cc: Lucas De Marchi 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_bw.c  |  3 +-
 drivers/gpu/drm/i915/display/intel_display.c |  8 -
 drivers/gpu/drm/i915/display/intel_display.h |  2 ++
 drivers/gpu/drm/i915/display/intel_fbc.c |  3 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c   |  3 +-
 drivers/gpu/drm/i915/gem/i915_gemfs.c|  3 +-
 drivers/gpu/drm/i915/gt/intel_ggtt.c |  5 +--
 drivers/gpu/drm/i915/gt/intel_gtt.c  | 12 +++
 drivers/gpu/drm/i915/gt/intel_gtt.h  |  2 ++
 drivers/gpu/drm/i915/i915_debugfs.c  |  1 +
 drivers/gpu/drm/i915/i915_driver.c   |  3 +-
 drivers/gpu/drm/i915/i915_driver.h   |  4 +++
 drivers/gpu/drm/i915/i915_drv.h  | 37 
 drivers/gpu/drm/i915/i915_gpu_error.c|  3 +-
 drivers/gpu/drm/i915/i915_utils.c| 11 ++
 drivers/gpu/drm/i915/i915_utils.h|  8 +
 drivers/gpu/drm/i915/intel_device_info.c |  3 +-
 drivers/gpu/drm/i915/intel_pch.c |  3 +-
 18 files changed, 66 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index ac11ff19e47d..c93454f46d30 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -6,6 +6,7 @@
 #include 
 
 #include "i915_reg.h"
+#include "i915_utils.h"
 #include "intel_atomic.h"
 #include "intel_bw.h"
 #include "intel_cdclk.h"
@@ -649,7 +650,7 @@ static unsigned int intel_bw_data_rate(struct 
drm_i915_private *dev_priv,
for_each_pipe(dev_priv, pipe)
data_rate += bw_state->data_rate[pipe];
 
-   if (DISPLAY_VER(dev_priv) >= 13 && intel_vtd_active(dev_priv))
+   if (DISPLAY_VER(dev_priv) >= 13 && i915_vtd_active(dev_priv))
data_rate = DIV_ROUND_UP(data_rate * 105, 100);
 
return data_rate;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 3d2ff258f0a9..1dd1fc68c4c0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -77,6 +77,7 @@
 #include "g4x_hdmi.h"
 #include "hsw_ips.h"
 #include "i915_drv.h"
+#include "i915_utils.h"
 #include "icl_dsi.h"
 #include "intel_acpi.h"
 #include "intel_atomic.h"
@@ -1197,7 +1198,7 @@ static bool needs_async_flip_vtd_wa(const struct 
intel_crtc_state *crtc_state)
 {
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
 
-   return crtc_state->uapi.async_flip && intel_vtd_active(i915) &&
+   return crtc_state->uapi.async_flip && i915_vtd_active(i915) &&
(DISPLAY_VER(i915) == 9 || IS_BROADWELL(i915) || 
IS_HASWELL(i915));
 }
 
@@ -10686,3 +10687,8 @@ void intel_display_driver_unregister(struct 
drm_i915_private *i915)
acpi_video_unregister();
intel_opregion_unregister(i915);
 }
+
+bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv)
+{
+   return DISPLAY_VER(dev_priv) >= 6 && i915_vtd_active(dev_priv);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 8513703086b7..d69587c76e71 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -694,4 +694,6 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
 #define I915_STATE_WARN_ON(x)  \
I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")")
 
+bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv);
+
 #endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 142280b6ce6d..b653f3ba7c66 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -43,6 +43,7 @@
 #include 
 
 #include "i915_drv.h"
+#include "i915_utils.h"
 #include "i915_vgpu.h"
 #include "intel_cdclk.h"
 #include "intel_de.h"
@@ -1643,7 +1644,7 @@ static int intel_sanitize_fbc_option(struct 
drm_i915_private *i915)
 static bool need_fbc_vtd_wa(struct drm_i915_private *i915)
 {
/* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
-   if (intel_vtd_active(i915) &&
+   if (i915_vtd_active(i915) &&
(IS_SKYLAKE(i915) || IS_BROXTON(i915))) {
drm_info(&i915->drm,
 "Disabling framebuffer compression (FBC) to prevent 
screen flicker with VT-d enabled\n");
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 143f61aaa867..47b5e0e342ab 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/

Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread kernel test robot
Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip v5.17 
next-20220328]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: mips-randconfig-r005-20220327 
(https://download.01.org/0day-ci/archive/20220328/202203282023.nktetla5-...@intel.com/config)
compiler: mips-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
git checkout f538c9296c54ce8f878432153584a68939ffc111
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross 
O=build_dir ARCH=mips SHELL=/bin/bash drivers/gpu/drm/tiny/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All error/warnings (new ones prefixed by >>):

>> drivers/gpu/drm/tiny/gm12u320.c:478:18: error: 'struct detailed_timing' has 
>> no member named 'pixel_clock'
 478 | .pixel_clock = 3383,
 |  ^~~
>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around 
>> initializer [-Wmissing-braces]
 464 | static struct edid gm12u320_edid = {
 |^
   ..
 478 | .pixel_clock = 3383,
 |{{  }}
 479 | /* hactive = 848, hblank = 256 */
 480 | .data.pixel_data.hactive_lo = 0x50,
 |   }}
 481 | .data.pixel_data.hblank_lo = 0x00,
 |  }}
 482 | .data.pixel_data.hactive_hblank_hi = 0x31,
 |  }}
 483 | /* vactive = 480, vblank = 28 */
 484 | .data.pixel_data.vactive_lo = 0xe0,
 |   }}
 485 | .data.pixel_data.vblank_lo = 0x1c,
 |  }}
 486 | .data.pixel_data.vactive_vblank_hi = 0x10,
 |  }}
 487 | /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
 488 | .data.pixel_data.hsync_offset_lo = 0x28,
 |}}
 489 | .data.pixel_data.hsync_pulse_width_lo = 0x80,
 | }}
 490 | .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
 |}}
 491 | .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 
0x00,
 |  
}}
   ..
 494 | }, {
 | }}
   drivers/gpu/drm/tiny/gm12u320.c:495:18: error: 'struct detailed_timing' has 
no member named 'pixel_clock'
 495 | .pixel_clock = 0,
 |  ^~~
>> drivers/gpu/drm/tiny/gm12u320.c:496:23: error: 'union ' has no 
>> member named 'other_data'
 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
 |   ^~
   drivers/gpu/drm/tiny/gm12u320.c:496:41: warning: initialized field 
overwritten [-Woverride-init]
 496 | .data.other_data.type = 0xfd, /* Monitor ranges */
 | ^~~~
   drivers/gpu/drm/tiny/gm12u320.c:496:41: note: (near initialization for 
'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
   drivers/gpu/drm/tiny/gm12u320.c:497:23: error: 'union ' has no 
member named 'other_data'
 497 | .data.other_data.data.range.min_vfreq = 59,
 |   ^~
   drivers/gpu/drm/tiny/gm12

Re: [PATCH v9 02/22] dt-bindings: mediatek, dp: Add Display Port binding

2022-03-28 Thread Rob Herring
On Mon, 28 Mar 2022 00:39:07 +0200, Guillaume Ranquet wrote:
> From: Markus Schneider-Pargmann 
> 
> This controller is present on several mediatek hardware. Currently
> mt8195 and mt8395 have this controller without a functional difference,
> so only one compatible field is added.
> 
> The controller can have two forms, as a normal display port and as an
> embedded display port.
> 
> Signed-off-by: Markus Schneider-Pargmann 
> Signed-off-by: Guillaume Ranquet 
> ---
>  .../display/mediatek/mediatek,dp.yaml | 100 ++
>  1 file changed, 100 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/display/mediatek/mediatek,dp.example.dts:24:18:
 fatal error: dt-bindings/power/mt8195-power.h: No such file or directory
   24 | #include 
  |  ^~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:378: 
Documentation/devicetree/bindings/display/mediatek/mediatek,dp.example.dt.yaml] 
Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [Makefile:1398: dt_binding_check] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1609955

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.



[PATCH] drm/msm: use orig_nents to iterate over scatterlist with per-process tables

2022-03-28 Thread Jonathan Marek
This matches the implementation of iommu_map_sgtable() used for the
non-per-process page tables path.

This works around the dma_map_sgtable() call (used to invalidate cache)
overwriting sgt->nents with 1 (which is probably a separate issue).

Fixes: b145c6e65eb0 ("drm/msm: Add support to create a local pagetable")
Signed-off-by: Jonathan Marek 
---
 drivers/gpu/drm/msm/msm_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index bcaddbba564df..22935ef26a3a1 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -58,7 +58,7 @@ static int msm_iommu_pagetable_map(struct msm_mmu *mmu, u64 
iova,
u64 addr = iova;
unsigned int i;
 
-   for_each_sg(sgt->sgl, sg, sgt->nents, i) {
+   for_each_sg(sgt->sgl, sg, sgt->orig_nents, i) {
size_t size = sg->length;
phys_addr_t phys = sg_phys(sg);
 
-- 
2.26.1



Re: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs

2022-03-28 Thread Jani Nikula


I think I'm just going to revert back to my original plan of leaving the
struct restructuring to another time in the future.

BR,
Jani.


On Mon, 28 Mar 2022, kernel test robot  wrote:
> Hi Jani,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on drm/drm-next]
> [also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17 
> next-20220328]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:
> https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> base:   git://anongit.freedesktop.org/drm/drm drm-next
> config: x86_64-randconfig-a003-20220328 
> (https://download.01.org/0day-ci/archive/20220328/202203281926.athxjpnk-...@intel.com/config)
> compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
> reproduce (this is a W=1 build):
> # 
> https://github.com/intel-lab-lkp/linux/commit/f538c9296c54ce8f878432153584a68939ffc111
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review 
> Jani-Nikula/drm-edid-constify-EDID-parsing-with-some-fixes/20220328-171858
> git checkout f538c9296c54ce8f878432153584a68939ffc111
> # save the config file to linux build tree
> mkdir build_dir
> make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/tiny/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
>
> All warnings (new ones prefixed by >>):
>
>drivers/gpu/drm/tiny/gm12u320.c:478:4: error: 'struct detailed_timing' has 
> no member named 'pixel_clock'
>  478 |   .pixel_clock = 3383,
>  |^~~
>>> drivers/gpu/drm/tiny/gm12u320.c:464:36: warning: missing braces around 
>>> initializer [-Wmissing-braces]
>  464 | static struct edid gm12u320_edid = {
>  |^
>..
>  478 |   .pixel_clock = 3383,
>  |  {{  }}
>  479 |   /* hactive = 848, hblank = 256 */
>  480 |   .data.pixel_data.hactive_lo = 0x50,
>  | }}
>  481 |   .data.pixel_data.hblank_lo = 0x00,
>  |}}
>  482 |   .data.pixel_data.hactive_hblank_hi = 0x31,
>  |}}
>  483 |   /* vactive = 480, vblank = 28 */
>  484 |   .data.pixel_data.vactive_lo = 0xe0,
>  | }}
>  485 |   .data.pixel_data.vblank_lo = 0x1c,
>  |}}
>  486 |   .data.pixel_data.vactive_vblank_hi = 0x10,
>  |}}
>  487 |   /* hsync offset 40 pw 128, vsync offset 1 pw 4 */
>  488 |   .data.pixel_data.hsync_offset_lo = 0x28,
>  |  }}
>  489 |   .data.pixel_data.hsync_pulse_width_lo = 0x80,
>  |   }}
>  490 |   .data.pixel_data.vsync_offset_pulse_width_lo = 0x14,
>  |  }}
>  491 |   .data.pixel_data.hsync_vsync_offset_pulse_width_hi = 0x00,
>  |}}
>..
>  494 |  }, {
>  |  }}
>drivers/gpu/drm/tiny/gm12u320.c:495:4: error: 'struct detailed_timing' has 
> no member named 'pixel_clock'
>  495 |   .pixel_clock = 0,
>  |^~~
>drivers/gpu/drm/tiny/gm12u320.c:496:9: error: 'union ' has no 
> member named 'other_data'
>  496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>  | ^~
>drivers/gpu/drm/tiny/gm12u320.c:496:27: warning: initialized field 
> overwritten [-Woverride-init]
>  496 |   .data.other_data.type = 0xfd, /* Monitor ranges */
>  |   ^~~~
>drivers/gpu/drm/tiny/gm12u320.c:496:27: note: (near initialization for 
> 'gm12u320_edid.detailed_timings[1].data.pixel_data.pixel_clock')
>drivers/gpu/drm/tiny/gm12u320.c:497:9: error: 'union ' has no 
> member named 'other_data'
>  497 |   .data.other_data.data.range.min_vfreq = 59,
>  | ^~
>drivers/gpu/drm/tiny/gm12u320.c:497:43: warning: initialized field 
> overwritten [-Woverride-init]
>  497 |   .da

Re: [PATCH v2] drm/bridge: anx7625: Set downstream sink into normal status

2022-03-28 Thread Robert Foss
On Fri, 25 Mar 2022 at 07:29, Xin Ji  wrote:
>
> On Thu, Mar 24, 2022 at 01:07:56PM +0100, Robert Foss wrote:
> > > > > > The driver uses DRM_DEV_* for logs. Can we use this?
> > > > > Hi Hsin-Yi, as comment in drm/drm_print.h:
> > > > > "NOTE: this is deprecated in favor of drm_dbg". DRM bridge driver not
> > > > > use DRM_DEV_* any more. I'll send a patch to replace all of DRM_DEV_*
> > > > > later.
> > > >
> > > > drm_dbg is better than dev_dbg though. With the former, you still get 
> > > > the
> > > > option to control it with the drm.debug module parameter, unlike the 
> > > > latter
> > > > which normally gets compiled out.
> > > >
> > > > Please use drm_dbg*.
> > > >
> > > > ChenYu
> > >
> > > Hi ChenYu, the parameter of drm_dbg is "drm", if use drm_dbg, it will
> > > change more code, I'll consider to upstream new patch to replace all of
> > > them later.
> > >
> >
> > Alright, since the driver already uses these logging functions, let's
> > apply this patch and fix the logging function this driver uses in a
> > separate series.
> >
> > Xin: Can you submit a patch/series that converts this driver to use
> > drm_dbg* functions instead?
> Hi Robert Foss, OK, I'll submit patch after this patch get merged.
> Thanks,

Applied to drm-misc-next.

Rob.


Re: [PATCH v2] drm/bridge: nwl-dsi: switch to devm_drm_of_get_bridge

2022-03-28 Thread Robert Foss
On Fri, 18 Mar 2022 at 10:25, Liu Ying  wrote:
>
> On Thu, 2022-03-17 at 18:58 +0100, José Expósito wrote:
> > The function "drm_of_find_panel_or_bridge" has been deprecated in
> > favor of "devm_drm_of_get_bridge".
> >
> > Switch to the new function and reduce boilerplate.
> >
> > Signed-off-by: José Expósito 
> >
> > ---
> >
> > v2: (Thanks to Liu Ying)
> >
> >  - Rebase on top of drm-misc-next
> >  - Remove drm_of_panel_bridge_remove
> > ---
> >  drivers/gpu/drm/bridge/nwl-dsi.c | 23 ---
> >  1 file changed, 4 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c
> > b/drivers/gpu/drm/bridge/nwl-dsi.c
> > index e34fb09b90b9..de62e3fc6a59 100644
> > --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> > +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> > @@ -912,19 +912,11 @@ static int nwl_dsi_bridge_attach(struct
> > drm_bridge *bridge,
> >  {
> >   struct nwl_dsi *dsi = bridge_to_dsi(bridge);
> >   struct drm_bridge *panel_bridge;
> > - struct drm_panel *panel;
> > - int ret;
> > -
> > - ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0,
> > &panel,
> > -   &panel_bridge);
> > - if (ret)
> > - return ret;
> >
> > - if (panel) {
> > - panel_bridge = drm_panel_bridge_add(panel);
> > - if (IS_ERR(panel_bridge))
> > - return PTR_ERR(panel_bridge);
> > - }
> > + panel_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev-
> > >of_node,
> > +   1, 0);
> > + if (IS_ERR(panel_bridge))
> > + return PTR_ERR(panel_bridge);
> >
> >   if (!panel_bridge)
> >   return -EPROBE_DEFER;
>
> I don't think panel_bridge can be NULL here, so this check can be
> removed.  However, even if this patch is not applied, the check is not
> necessary.  I think it can be removed with a separate patch.

José, do you mind clearing up if this check is needed, and then
spinning a v3 removing this snippet if it is needed?

Rob.


[PATCH] drm/sched: Fix htmldoc warning.

2022-03-28 Thread Andrey Grodzovsky
Fixes the warning.

Signed-off-by: Andrey Grodzovsky 
---
 include/drm/gpu_scheduler.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
index 944f83ef9f2e..0fca8f38bee4 100644
--- a/include/drm/gpu_scheduler.h
+++ b/include/drm/gpu_scheduler.h
@@ -270,6 +270,7 @@ struct drm_sched_fence *to_drm_sched_fence(struct dma_fence 
*f);
  * @sched: the scheduler instance on which this job is scheduled.
  * @s_fence: contains the fences for the scheduling of job.
  * @finish_cb: the callback for the finished fence.
+ * @work: Helper to reschdeule job kill to different context.
  * @id: a unique id assigned to each job scheduled on the scheduler.
  * @karma: increment on every hang caused by this job. If this exceeds the hang
  * limit of the scheduler then the job is marked guilty and will not
-- 
2.25.1



Re: [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes

2022-03-28 Thread Jani Nikula
On Mon, 28 Mar 2022, Jani Nikula  wrote:
> v2 of https://patchwork.freedesktop.org/series/101787/ addressing some
> review comments from Ville.

Please ignore this series.

>
> Jani Nikula (11):
>   drm/edid: don't modify EDID while parsing
>   drm/edid: fix reduced blanking support check
>   drm/edid: slightly restructure timing and non-timing descriptor
> structs
>   drm/edid: pass a timing pointer to is_display_descriptor()
>   drm/edid: use struct detailed_timing member access in is_rb()
>   drm/edid: use struct detailed_data_monitor_range member access in gtf2
> functions
>   drm/edid: constify struct detailed_timing in lower level parsing
>   drm/edid: constify struct detailed_timing in parsing callbacks
>   drm/edid: constify struct edid passed to detailed blocks
>   drm/edid: constify struct edid passed around in callbacks and closure
>   drm/edid: add more general struct edid constness in the interfaces
>
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   6 +-
>  drivers/gpu/drm/drm_edid.c| 287 ++
>  include/drm/drm_edid.h|  19 +-
>  3 files changed, 174 insertions(+), 138 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center


Re: linux-next: build warning after merge of the drm-misc tree

2022-03-28 Thread Andrey Grodzovsky



On 2022-03-27 19:56, Stephen Rothwell wrote:

Hi Andrey,

On Tue, 1 Mar 2022 22:26:12 -0500 Andrey Grodzovsky  
wrote:

On 2022-03-01 20:31, Stephen Rothwell wrote:

Hi all,

On Thu, 20 Jan 2022 14:26:39 +1100 Stephen Rothwell  
wrote:

On Wed, 17 Nov 2021 13:49:26 +1100 Stephen Rothwell  
wrote:

After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:

include/drm/gpu_scheduler.h:316: warning: Function parameter or member 'work' 
not described in 'drm_sched_job'

Introduced by commit

542cff7893a3 ("drm/sched: Avoid lockdep spalt on killing a processes")

I am still seeing this warning.

I am still seeing this warning.
  

Please check you have commit c7703ce38c1e Andrey Grodzovsky   3 weeks ago    
drm/amdgpu: Fix htmldoc warning

I do have commit c7703ce38c1e (in fact it is in Linus' tree), but that
commit does not address the warning above.  I am still (as of Friday)
getting that warning.



Got it, i was confused. Sent a patch to fix, please RB.

Andrey




Re: [Intel-gfx] [PATCH v2 5/7] drm/i915/selftests: use the memcpy_from_wc call from the drm

2022-03-28 Thread Balasubramani Vivekanandan
On 21.03.2022 16:07, Lucas De Marchi wrote:
> Now Cc'ing Daniel properly
> 
> Lucas De Marchi
> 
> On Mon, Mar 21, 2022 at 04:00:56PM -0700, Lucas De Marchi wrote:
> > +Thomas Zimmermann and +Daniel Vetter
> > 
> > Could you take a look below regarding the I/O to I/O memory access?
> > 
> > On Thu, Mar 03, 2022 at 11:30:11PM +0530, Balasubramani Vivekanandan wrote:
> > > memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
> > > by the implementation in drm_cache.c.
> > > Updated to use the functions provided by drm_cache.c.
> > > 
> > > v2: check if the source and destination memory address is from local
> > >   memory or system memory and initialize the iosys_map accordingly
> > >   (Lucas)
> > > 
> > > Cc: Lucas De Marchi 
> > > Cc: Matthew Auld 
> > > Cc: Thomas Hellstr_m 
> > > 
> > > Signed-off-by: Balasubramani Vivekanandan 
> > > 
> > > ---
> > > .../drm/i915/selftests/intel_memory_region.c  | 41 +--
> > > 1 file changed, 28 insertions(+), 13 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c 
> > > b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> > > index ba32893e0873..d16ecb905f3b 100644
> > > --- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> > > +++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
> > > @@ -7,6 +7,7 @@
> > > #include 
> > > 
> > > #include 
> > > +#include 
> > > 
> > > #include "../i915_selftest.h"
> > > 
> > > @@ -1133,7 +1134,7 @@ static const char *repr_type(u32 type)
> > > 
> > > static struct drm_i915_gem_object *
> > > create_region_for_mapping(struct intel_memory_region *mr, u64 size, u32 
> > > type,
> > > -   void **out_addr)
> > > +   struct iosys_map *out_addr)
> > > {
> > >   struct drm_i915_gem_object *obj;
> > >   void *addr;
> > > @@ -1153,7 +1154,11 @@ create_region_for_mapping(struct 
> > > intel_memory_region *mr, u64 size, u32 type,
> > >   return addr;
> > >   }
> > > 
> > > - *out_addr = addr;
> > > + if (i915_gem_object_is_lmem(obj))
> > > + iosys_map_set_vaddr_iomem(out_addr, (void __iomem *)addr);
> > > + else
> > > + iosys_map_set_vaddr(out_addr, addr);
> > > +
> > >   return obj;
> > > }
> > > 
> > > @@ -1164,24 +1169,33 @@ static int wrap_ktime_compare(const void *A, 
> > > const void *B)
> > >   return ktime_compare(*a, *b);
> > > }
> > > 
> > > -static void igt_memcpy_long(void *dst, const void *src, size_t size)
> > > +static void igt_memcpy_long(struct iosys_map *dst, struct iosys_map *src,
> > > + size_t size)
> > > {
> > > - unsigned long *tmp = dst;
> > > - const unsigned long *s = src;
> > > + unsigned long *tmp = dst->is_iomem ?
> > > + (unsigned long __force *)dst->vaddr_iomem :
> > > + dst->vaddr;
> > 
> > if we access vaddr_iomem/vaddr we basically break the promise of
> > abstracting system and I/O memory. There is no point in receiving
> > struct iosys_map as argument and then break the abstraction.
> > 
Hi Lucas,
  I didn't attempt to convert the memory access using iosys_map
interfaces to abstract system and I/O memory, in this patch. The
intention of passing iosys_map structures instead of raw pointers in the
test functions is for the benefit of igt_memcpy_from_wc() test function.
igt_memcpy_from_wc() requires iosys_map variables for passing it to
drm_memcpy_from_wc().
In the other test functions, though it receives iosys_map structures I
have retained the behavior same as earlier by converting back the
iosys_map structures to pointers.
I made a short try to use iosys_map structures to perform the memory
copy inside other test functions, but I dropped it after I realized that
their is support lacking for (a) mentioned below in your comment.
Since it requires some discussion to bring in the support for (a), I did
not proceed with it.

Regards,
Bala

> > > + const unsigned long *s = src->is_iomem ?
> > > + (unsigned long __force *)src->vaddr_iomem :
> > > + src->vaddr;
> > > 
> > >   size = size / sizeof(unsigned long);
> > >   while (size--)
> > >   *tmp++ = *s++;
> > 
> > 
> > so we basically want to copy from one place to the other on a word
> > boundary. And it may be
> > 
> > a) I/O -> I/O or
> > b) system -> I/O or
> > c) I/O -> system
> > 
> > (b) and (c) should work, but AFAICS (a) is not possible with the current
> > iosys-map API. Not even the underlying APIs have that abstracted. Both
> > memcpy_fromio() and memcpy_toio() expect one of them to be RAM (system
> > memory)
> > 
> > I remember seeing people using a temporary in buffer in system memory
> > for proxying the copy. But maybe we need an abstraction for that?
> > Also adding Thomas Zimmermann here for that question.
> > 
> > and since this is a selftest testing the performance of the memcpy from
> > one memory region to the other, it would be good to have this test
> > executed to 

Re: [PATCH v11 5/7] dt-bindings: display: Add Loongson display controller

2022-03-28 Thread Rob Herring
On Sat, Mar 26, 2022 at 06:04:46PM +0800, Sui Jingfeng wrote:
> 
> On 2022/3/24 21:26, Rob Herring wrote:
> > On Thu, Mar 24, 2022 at 09:48:19AM +0800, Sui Jingfeng wrote:
> > > On 2022/3/23 21:03, Rob Herring wrote:
> > > > On Wed, Mar 23, 2022 at 11:38:55AM +0800, Sui Jingfeng wrote:
> > > > > On 2022/3/23 04:55, Rob Herring wrote:
> > > > > > On Tue, Mar 22, 2022 at 10:33:45AM +0800, Sui Jingfeng wrote:
> > > > > > > On 2022/3/22 07:20, Rob Herring wrote:
> > > > > > > > On Tue, Mar 22, 2022 at 12:29:14AM +0800, Sui Jingfeng wrote:
> > > > > > > > > From: suijingfeng 
> > > > > > > > > 
> > > > > > > > Needs a commit message.
> > > > > > > > 
> > > > > > > > > Signed-off-by: suijingfeng 
> > > > > > > > > Signed-off-by: Sui Jingfeng <15330273...@189.cn>
> > > > > > > > Same person? Don't need both emails.
> > > > > > > Yes,  suijingf...@loongson.cn is my company's email. But it can 
> > > > > > > not be used
> > > > > > > to send patches to dri-devel,
> > > > > > > 
> > > > > > > when send patches with this email, the patch will not be shown on 
> > > > > > > patch
> > > > > > > works.
> > > > > > > 
> > > > > > > Emails  are either blocked or got  rejected  by loongson's mail 
> > > > > > > server.  It
> > > > > > > can only receive emails
> > > > > > > 
> > > > > > > from you and other people, but not dri-devel. so have to use my 
> > > > > > > personal
> > > > > > > email(15330273...@189.cn) to send patches.
> > > > > > > 
> > > > > > > > > ---
> > > > > > > > >  .../loongson/loongson,display-controller.yaml | 230 
> > > > > > > > > ++
> > > > > > > > >  1 file changed, 230 insertions(+)
> > > > > > > > >  create mode 100644 
> > > > > > > > > Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> > > > > > > > > 
> > > > > > > > > diff --git 
> > > > > > > > > a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> > > > > > > > >  
> > > > > > > > > b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> > > > > > > > > new file mode 100644
> > > > > > > > > index ..7be63346289e
> > > > > > > > > --- /dev/null
> > > > > > > > > +++ 
> > > > > > > > > b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> > > > > > > > > @@ -0,0 +1,230 @@
> > > > > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > > > > > +%YAML 1.2
> > > > > > > > > +---
> > > > > > > > > +$id: 
> > > > > > > > > http://devicetree.org/schemas/display/loongson/loongson,display-controller.yaml#
> > > > > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > > > > > +
> > > > > > > > > +title: Loongson LS7A1000/LS2K1000/LS2K0500 Display 
> > > > > > > > > Controller Device Tree Bindings
> > > > > > > > > +
> > > > > > > > > +maintainers:
> > > > > > > > > +  - Sui Jingfeng 
> > > > > > > > > +
> > > > > > > > > +description: |+
> > > > > > > > > +
> > > > > > > > > +  Loongson display controllers are simple which require 
> > > > > > > > > scanout buffers
> > > > > > > > > +  to be physically contiguous. LS2K1000/LS2K0500 is a SOC, 
> > > > > > > > > only system
> > > > > > > > > +  memory is available. LS7A1000/LS7A2000 is bridge chip 
> > > > > > > > > which is equipped
> > > > > > > > > +  with a dedicated video RAM which is 64MB or more, precise 
> > > > > > > > > size can be
> > > > > > > > > +  read from the PCI BAR 2 of the GPU device(0x0014:0x7A15) 
> > > > > > > > > in the bridge
> > > > > > > > > +  chip.
> > > > > > > > > +
> > > > > > > > > +  LSDC has two display pipes, each way has a DVO interface 
> > > > > > > > > which provide
> > > > > > > > > +  RGB888 signals, vertical & horizontal synchronisations, 
> > > > > > > > > data enable and
> > > > > > > > > +  the pixel clock. LSDC has two CRTC, each CRTC is able to 
> > > > > > > > > scanout from
> > > > > > > > > +  1920x1080 resolution at 60Hz. Each CRTC has two FB address 
> > > > > > > > > registers.
> > > > > > > > > +
> > > > > > > > > +  For LS7A1000, there are 4 dedicated GPIOs whose control 
> > > > > > > > > register is
> > > > > > > > > +  located at the DC register space. They are used to emulate 
> > > > > > > > > two way i2c,
> > > > > > > > > +  One for DVO0, another for DVO1.
> > > > > > > > > +
> > > > > > > > > +  LS2K1000 and LS2K0500 SoC grab i2c adapter from other 
> > > > > > > > > module, either
> > > > > > > > > +  general purpose GPIO emulated i2c or hardware i2c in the 
> > > > > > > > > SoC.
> > > > > > > > > +
> > > > > > > > > +  LSDC's display pipeline have several components as below 
> > > > > > > > > description,
> > > > > > > > > +
> > > > > > > > > +  The display controller in LS7A1000:
> > > > > > > > > + ___ 
> > > > > > > > > _
> > > > > > > > > +|---|   
> > > > > > > > > | |
> > > > > > > > > +

Re: [PATCH] drm/sched: Fix htmldoc warning.

2022-03-28 Thread Alex Deucher
On Mon, Mar 28, 2022 at 9:25 AM Andrey Grodzovsky
 wrote:
>
> Fixes the warning.
>
> Signed-off-by: Andrey Grodzovsky 

You may want to add a Reported-by for Stephen,  WIth that,

Reviewed-by: Alex Deucher 


> ---
>  include/drm/gpu_scheduler.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
> index 944f83ef9f2e..0fca8f38bee4 100644
> --- a/include/drm/gpu_scheduler.h
> +++ b/include/drm/gpu_scheduler.h
> @@ -270,6 +270,7 @@ struct drm_sched_fence *to_drm_sched_fence(struct 
> dma_fence *f);
>   * @sched: the scheduler instance on which this job is scheduled.
>   * @s_fence: contains the fences for the scheduling of job.
>   * @finish_cb: the callback for the finished fence.
> + * @work: Helper to reschdeule job kill to different context.
>   * @id: a unique id assigned to each job scheduled on the scheduler.
>   * @karma: increment on every hang caused by this job. If this exceeds the 
> hang
>   * limit of the scheduler then the job is marked guilty and will not
> --
> 2.25.1
>


RE: [RFC PATCH] drm/amd/display: dont ignore alpha property

2022-03-28 Thread Kazlauskas, Nicholas
[AMD Official Use Only]

> -Original Message-
> From: Melissa Wen 
> Sent: Friday, March 25, 2022 4:45 PM
> To: amd-...@lists.freedesktop.org; Wentland, Harry
> ; Deucher, Alexander
> ; Siqueira, Rodrigo
> ; Kazlauskas, Nicholas
> ; Gutierrez, Agustin
> ; Liu, Zhan 
> Cc: dri-devel@lists.freedesktop.org; Simon Ser 
> Subject: [RFC PATCH] drm/amd/display: dont ignore alpha property
> Importance: High
>
> Hi all,
>
> I'm examining the IGT kms_plane_alpha_blend test, specifically the
> alpha-7efc. It fails on AMD and Intel gen8 hw, but passes on Intel
> gen11. At first, I thought it was a rounding issue. In fact, it may be
> the problem for different results between intel hw generations.
>
> However, I changed the test locally to compare CRCs for all alpha values
> in the range before the test fails. Interestingly, it fails for all
> values when running on AMD, even when comparing planes with zero alpha
> (fully transparent). Moreover, I see the same CRC values regardless of
> the value set in the alpha property.
>
> To ensure that the blending mode is as expected, I explicitly set the
> Pre-multiplied blending mode in the test. Then I tried using different
> framebuffer data and alpha values. I've tried obvious comparisons too,
> such as fully opaque and fully transparent.
>
> As far as I could verify and understand, the value set for the ALPHA
> property is totally ignored by AMD drivers. I'm not sure if this is a
> matter of how we interpret the meaning of the premultiplied blend mode
> or the driver's assumptions about the data in these blend modes.
> For example, I made a change in the test as here:
> https://paste.debian.net/1235620/
> That basically means same framebuffer, but different alpha values for
> each plane. And the result was succesful (but I expected it fails).
>

The intent was that we don't enable global plane alpha along with anything that 
requires per pixel alpha.

The HW does have bits to specify a mode that's intended to work like this, but 
I don't think we've ever fully supported it in software.

I wouldn't necessarily expect that the blending result is correct, but maybe 
the IGT test result says otherwise.

> Besides that, I see that other subtests in kms_plane_alpha_blend are
> skipped, use "None" pixel blend mode, or are not changing the
> IGT_PLANE_ALPHA property. So, this alpha-7efc seems to be the only one
> in the subset that is checking changes on alpha property under a
> Pre-multiplied blend mode, and it is failing.
>
> I see some inputs in this issue:
> https://gitlab.freedesktop.org/drm/amd/-/issues/1769.
> But them, I guessed there are different interpretations for handling
> plane alpha in the pre-multiplied blend mode. Tbh, I'm not clear, but
> there's always a chance of different interpretations, and I don't have
> a third driver with CRC capabilities for further comparisons.
>
> I made some experiments on blnd_cfg values, changing alpha_mode vs
> global_gain and global_alpha. I think the expected behaviour for the
> Pre-multiplied blend mode is achieved by applying this RFC patch (for
> Cezanne).
>
> Does it seems reasonable? Can anyone help me with more inputs to guide
> me the right direction or point out what I misunderstood about these
> concepts?
>
> Thanks,
>
> Signed-off-by: Melissa Wen 
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  | 2 +-
>  drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 
>  2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 6633df7682ce..821ffafa441e 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -5438,7 +5438,7 @@ fill_blending_from_plane_state(const struct
> drm_plane_state *plane_state,
>
>   if (plane_state->alpha < 0x) {
>   *global_alpha = true;
> - *global_alpha_value = plane_state->alpha >> 8;
> + *global_alpha_value = plane_state->alpha;

Isn't the original behavior here correct? The value into DC should only be an 
8-bit value but we have 16-bit precision from the DRM property. This is 
truncating the bits that we don't support.

>   }
>  }
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> index 4290eaf11a04..b4888f91a9d0 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
> @@ -2367,6 +2367,10 @@ void dcn20_update_mpcc(struct dc *dc, struct
> pipe_ctx *pipe_ctx)
>   == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA)
>   blnd_cfg.pre_multiplied_alpha = false;
>
> + if (blnd_cfg.pre_multiplied_alpha) {
> + blnd_cfg.alpha_mode =
> MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAI
> N;
> + blnd_cfg.global_gain = blnd_cfg.global_alpha;
> + }

Wh

Re: [PATCH 1/2] dma-buf: add dma_fence_unwrap

2022-03-28 Thread Daniel Vetter
On Mon, Mar 28, 2022 at 12:28:31PM +0200, Christian König wrote:
> Hi Ville & Daniel,
> 
> Am 25.03.22 um 16:28 schrieb Christian König:
> > Am 25.03.22 um 16:25 schrieb Ville Syrjälä:
> > > On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> > > > Add a general purpose helper to deep dive into
> > > > dma_fence_chain/dma_fence_array
> > > > structures and iterate over all the fences in them.
> > > > 
> > > > This is useful when we need to flatten out all fences in those
> > > > structures.
> > > > 
> > > > Signed-off-by: Christian König 
> > > One of the dma-buf patches took down Intel CI. Looks like every
> > > machine oopses in some sync_file thing now:
> > > <1>[  260.470008] BUG: kernel NULL pointer dereference, address:
> > > 0010
> > > <1>[  260.470020] #PF: supervisor read access in kernel mode
> > > <1>[  260.470025] #PF: error_code(0x) - not-present page
> > > <6>[  260.470030] PGD 0 P4D 0
> > > <4>[  260.470035] Oops:  [#1] PREEMPT SMP NOPTI
> > > <4>[  260.470040] CPU: 0 PID: 5306 Comm: core_hotunplug Not tainted
> > > 5.17.0-CI-CI_DRM_11405+ #1
> > > <4>[  260.470049] Hardware name: Intel Corporation Jasper Lake
> > > Client Platform/Jasperlake DDR4 SODIMM RVP, BIOS
> > > JSLSFWI1.R00.2385.D02.2010160831 10/16/2020
> > > <4>[  260.470058] RIP: 0010:dma_fence_array_first+0x19/0x20
> 
> I've looked into this and the root cause seems to be that the new code
> doesn't handle dma_fence_arrays with zero elements.
> 
> That is rather easy to fix, but a dma_fence_array with zero number of
> elements is most likely a bug because under the wrong circumstances it can
> create a dma_fence instance which will never signal.
> 
> I've send out a patch on Frinday ([PATCH] dma-buf: WIP dma_fence_array_first
> fix) which avoids the crash and prints a warning if anybody tries to create
> a dma_fence_array with zero length.
> 
> Can you test this?

It's in drm-tip now (in the fixup branch) so drm-tip results should have
the result soonish:

https://intel-gfx-ci.01.org/tree/drm-tip/index.html?

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


Re: [PATCH] drm: sti: don't use kernel-doc markers

2022-03-28 Thread Daniel Vetter
On Mon, Mar 28, 2022 at 12:21:16PM +0200, Alain Volmat wrote:
> Hi Randy,
> 
> thanks for the patch.
> 
> Acked-by: Alain Volmat 

Will Philippe apply this one?

Just trying to make sure this wont be lost, just acking isn't enough :-)
-Daniel

> 
> Alain
> 
> On Sat, Mar 26, 2022 at 04:51:32PM -0700, Randy Dunlap wrote:
> > Don't mark static functions as kernel-doc.
> > 
> > Prevents multiple kernel-doc build warnings:
> > 
> > drivers/gpu/drm/sti/sti_hdmi.c:187: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * HDMI interrupt handler threaded
> > drivers/gpu/drm/sti/sti_hdmi.c:219: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * HDMI interrupt handler
> > drivers/gpu/drm/sti/sti_hdmi.c:241: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Set hdmi active area depending on the drm display mode selected
> > drivers/gpu/drm/sti/sti_hdmi.c:262: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Overall hdmi configuration
> > drivers/gpu/drm/sti/sti_hdmi.c:340: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Helper to concatenate infoframe in 32 bits word
> > drivers/gpu/drm/sti/sti_hdmi.c:357: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Helper to write info frame
> > drivers/gpu/drm/sti/sti_hdmi.c:427: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Prepare and configure the AVI infoframe
> > drivers/gpu/drm/sti/sti_hdmi.c:470: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Prepare and configure the AUDIO infoframe
> > drivers/gpu/drm/sti/sti_hdmi.c:555: warning: This comment starts with 
> > '/**', but isn't a kernel-doc comment. Refer 
> > Documentation/doc-guide/kernel-doc.rst
> >  * Software reset of the hdmi subsystem
> > 
> > Fixes: 5402626c83a2 ("drm: sti: add HDMI driver")
> > Signed-off-by: Randy Dunlap 
> > Cc: Aditya Srivastava 
> > Cc: Benjamin Gaignard 
> > Cc: Alain Volmat 
> > Cc: David Airlie 
> > Cc: Daniel Vetter 
> > ---
> >  drivers/gpu/drm/sti/sti_hdmi.c |   20 ++--
> >  1 file changed, 10 insertions(+), 10 deletions(-)
> > 
> > --- linux-next-20220325.orig/drivers/gpu/drm/sti/sti_hdmi.c
> > +++ linux-next-20220325/drivers/gpu/drm/sti/sti_hdmi.c
> > @@ -183,7 +183,7 @@ void hdmi_write(struct sti_hdmi *hdmi, u
> > writel(val, hdmi->regs + offset);
> >  }
> >  
> > -/**
> > +/*
> >   * HDMI interrupt handler threaded
> >   *
> >   * @irq: irq number
> > @@ -215,7 +215,7 @@ static irqreturn_t hdmi_irq_thread(int i
> > return IRQ_HANDLED;
> >  }
> >  
> > -/**
> > +/*
> >   * HDMI interrupt handler
> >   *
> >   * @irq: irq number
> > @@ -237,7 +237,7 @@ static irqreturn_t hdmi_irq(int irq, voi
> > return IRQ_WAKE_THREAD;
> >  }
> >  
> > -/**
> > +/*
> >   * Set hdmi active area depending on the drm display mode selected
> >   *
> >   * @hdmi: pointer on the hdmi internal structure
> > @@ -258,7 +258,7 @@ static void hdmi_active_area(struct sti_
> > hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
> >  }
> >  
> > -/**
> > +/*
> >   * Overall hdmi configuration
> >   *
> >   * @hdmi: pointer on the hdmi internal structure
> > @@ -336,7 +336,7 @@ static void hdmi_infoframe_reset(struct
> > hdmi_write(hdmi, 0x0, pack_offset + i);
> >  }
> >  
> > -/**
> > +/*
> >   * Helper to concatenate infoframe in 32 bits word
> >   *
> >   * @ptr: pointer on the hdmi internal structure
> > @@ -353,7 +353,7 @@ static inline unsigned int hdmi_infofram
> > return value;
> >  }
> >  
> > -/**
> > +/*
> >   * Helper to write info frame
> >   *
> >   * @hdmi: pointer on the hdmi internal structure
> > @@ -423,7 +423,7 @@ static void hdmi_infoframe_write_infopac
> > hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
> >  }
> >  
> > -/**
> > +/*
> >   * Prepare and configure the AVI infoframe
> >   *
> >   * AVI infoframe are transmitted at least once per two video field and
> > @@ -466,7 +466,7 @@ static int hdmi_avi_infoframe_config(str
> > return 0;
> >  }
> >  
> > -/**
> > +/*
> >   * Prepare and configure the AUDIO infoframe
> >   *
> >   * AUDIO infoframe are transmitted once per frame and
> > @@ -551,7 +551,7 @@ static int hdmi_vendor_infoframe_config(
> >  
> >  #define HDMI_TIMEOUT_SWRESET  100   /*milliseconds */
> >  
> > -/**
> > +/*
> >   * Software reset of the hdmi subsystem
> >   *
> >   * @hdmi: pointer on the hdmi internal structure
> > @@ -785,7 +785,7 @@ static void sti

Re: [PATCH 1/2] dma-buf: add dma_fence_unwrap

2022-03-28 Thread Christian König

Am 28.03.22 um 16:22 schrieb Daniel Vetter:

On Mon, Mar 28, 2022 at 12:28:31PM +0200, Christian König wrote:

Hi Ville & Daniel,

Am 25.03.22 um 16:28 schrieb Christian König:

Am 25.03.22 um 16:25 schrieb Ville Syrjälä:

On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:

Add a general purpose helper to deep dive into
dma_fence_chain/dma_fence_array
structures and iterate over all the fences in them.

This is useful when we need to flatten out all fences in those
structures.

Signed-off-by: Christian König 

One of the dma-buf patches took down Intel CI. Looks like every
machine oopses in some sync_file thing now:
<1>[  260.470008] BUG: kernel NULL pointer dereference, address:
0010
<1>[  260.470020] #PF: supervisor read access in kernel mode
<1>[  260.470025] #PF: error_code(0x) - not-present page
<6>[  260.470030] PGD 0 P4D 0
<4>[  260.470035] Oops:  [#1] PREEMPT SMP NOPTI
<4>[  260.470040] CPU: 0 PID: 5306 Comm: core_hotunplug Not tainted
5.17.0-CI-CI_DRM_11405+ #1
<4>[  260.470049] Hardware name: Intel Corporation Jasper Lake
Client Platform/Jasperlake DDR4 SODIMM RVP, BIOS
JSLSFWI1.R00.2385.D02.2010160831 10/16/2020
<4>[  260.470058] RIP: 0010:dma_fence_array_first+0x19/0x20

I've looked into this and the root cause seems to be that the new code
doesn't handle dma_fence_arrays with zero elements.

That is rather easy to fix, but a dma_fence_array with zero number of
elements is most likely a bug because under the wrong circumstances it can
create a dma_fence instance which will never signal.

I've send out a patch on Frinday ([PATCH] dma-buf: WIP dma_fence_array_first
fix) which avoids the crash and prints a warning if anybody tries to create
a dma_fence_array with zero length.

Can you test this?

It's in drm-tip now (in the fixup branch) so drm-tip results should have
the result soonish:

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fintel-gfx-ci.01.org%2Ftree%2Fdrm-tip%2Findex.html&data=04%7C01%7Cchristian.koenig%40amd.com%7C0afc74b5df0c4ea384af08da10c672fa%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637840742273792356%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=SL2CuMgM6lCSOhDTvs%2FaFg6zRlc7F3X%2BNkf6GuGMGXI%3D&reserved=0?


How do I find something in there? Is there a search function over all 
the test results?


Thanks,
Christian.



Cheers, Daniel




Re: [PATCH 1/2] dma-buf: add dma_fence_unwrap

2022-03-28 Thread Daniel Vetter
On Mon, Mar 28, 2022 at 04:26:44PM +0200, Christian König wrote:
> Am 28.03.22 um 16:22 schrieb Daniel Vetter:
> > On Mon, Mar 28, 2022 at 12:28:31PM +0200, Christian König wrote:
> > > Hi Ville & Daniel,
> > > 
> > > Am 25.03.22 um 16:28 schrieb Christian König:
> > > > Am 25.03.22 um 16:25 schrieb Ville Syrjälä:
> > > > > On Fri, Mar 11, 2022 at 12:02:43PM +0100, Christian König wrote:
> > > > > > Add a general purpose helper to deep dive into
> > > > > > dma_fence_chain/dma_fence_array
> > > > > > structures and iterate over all the fences in them.
> > > > > > 
> > > > > > This is useful when we need to flatten out all fences in those
> > > > > > structures.
> > > > > > 
> > > > > > Signed-off-by: Christian König 
> > > > > One of the dma-buf patches took down Intel CI. Looks like every
> > > > > machine oopses in some sync_file thing now:
> > > > > <1>[  260.470008] BUG: kernel NULL pointer dereference, address:
> > > > > 0010
> > > > > <1>[  260.470020] #PF: supervisor read access in kernel mode
> > > > > <1>[  260.470025] #PF: error_code(0x) - not-present page
> > > > > <6>[  260.470030] PGD 0 P4D 0
> > > > > <4>[  260.470035] Oops:  [#1] PREEMPT SMP NOPTI
> > > > > <4>[  260.470040] CPU: 0 PID: 5306 Comm: core_hotunplug Not tainted
> > > > > 5.17.0-CI-CI_DRM_11405+ #1
> > > > > <4>[  260.470049] Hardware name: Intel Corporation Jasper Lake
> > > > > Client Platform/Jasperlake DDR4 SODIMM RVP, BIOS
> > > > > JSLSFWI1.R00.2385.D02.2010160831 10/16/2020
> > > > > <4>[  260.470058] RIP: 0010:dma_fence_array_first+0x19/0x20
> > > I've looked into this and the root cause seems to be that the new code
> > > doesn't handle dma_fence_arrays with zero elements.
> > > 
> > > That is rather easy to fix, but a dma_fence_array with zero number of
> > > elements is most likely a bug because under the wrong circumstances it can
> > > create a dma_fence instance which will never signal.
> > > 
> > > I've send out a patch on Frinday ([PATCH] dma-buf: WIP 
> > > dma_fence_array_first
> > > fix) which avoids the crash and prints a warning if anybody tries to 
> > > create
> > > a dma_fence_array with zero length.
> > > 
> > > Can you test this?
> > It's in drm-tip now (in the fixup branch) so drm-tip results should have
> > the result soonish:
> > 
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fintel-gfx-ci.01.org%2Ftree%2Fdrm-tip%2Findex.html&data=04%7C01%7Cchristian.koenig%40amd.com%7C0afc74b5df0c4ea384af08da10c672fa%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637840742273792356%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=SL2CuMgM6lCSOhDTvs%2FaFg6zRlc7F3X%2BNkf6GuGMGXI%3D&reserved=0?
> 
> How do I find something in there? Is there a search function over all the
> test results?

Not really. You can ask on #intel-gfx-ci, or look at the tests that have
blown up without this to know where to look.

You can also download all the logfiles with wget recursive or so from the
build directory (the links in the top row) and search locally.
-Daniel

> 
> Thanks,
> Christian.
> 
> > 
> > Cheers, Daniel
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH v3 00/12] drm/edid: constify EDID parsing, with fixes

2022-03-28 Thread Jani Nikula
v3 of https://patchwork.freedesktop.org/series/101787/ and
https://patchwork.freedesktop.org/series/101862/

I screwed up with the struct renamings in v2, so there's some falling
back to v1 and general confusion here. Sorry.

BR,
Jani.


Jani Nikula (12):
  drm/edid: don't modify EDID while parsing
  drm/edid: fix reduced blanking support check
  drm/edid: pass a timing pointer to is_display_descriptor()
  drm/edid: pass a timing pointer to is_detailed_timing_descriptor()
  drm/edid: use struct detailed_timing member access in is_rb()
  drm/edid: use struct detailed_timing member access in gtf2 functions
  drm/edid: constify struct detailed_timing in lower level parsing
  drm/edid: constify struct detailed_timing in parsing callbacks
  drm/edid: constify struct edid passed to detailed blocks
  drm/edid: constify struct edid passed around in callbacks and closure
  drm/edid: add more general struct edid constness in the interfaces
  drm/edid: split drm_add_edid_modes() to two

 drivers/gpu/drm/drm_edid.c | 325 -
 include/drm/drm_edid.h |  10 +-
 2 files changed, 185 insertions(+), 150 deletions(-)

-- 
2.30.2



[PATCH v3 01/12] drm/edid: don't modify EDID while parsing

2022-03-28 Thread Jani Nikula
We'll want to keep the EDID immutable while parsing. Stop modifying the
EDID because of the quirks.

In theory, this does have userspace implications, but the userspace is
supposed to use the modes exposed via KMS API, not by parsing the EDID
directly.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_edid.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cc7bd58369df..1b552fe54f38 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2740,9 +2740,9 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
return NULL;
 
if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
-   timing->pixel_clock = cpu_to_le16(1088);
-
-   mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+   mode->clock = 1088 * 10;
+   else
+   mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
 
mode->hdisplay = hactive;
mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2763,14 +2763,14 @@ static struct drm_display_mode 
*drm_mode_detailed(struct drm_device *dev,
drm_mode_do_interlace_quirk(mode, pt);
 
if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
-   pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | 
DRM_EDID_PT_VSYNC_POSITIVE;
+   mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+   } else {
+   mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+   DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+   mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+   DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
}
 
-   mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
-   DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
-   mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
-   DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
-
 set_size:
mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 
8;
-- 
2.30.2



[PATCH v3 02/12] drm/edid: fix reduced blanking support check

2022-03-28 Thread Jani Nikula
The reduced blanking bit is valid only for CVT, indicated by display
range limits flags 0x04.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 1b552fe54f38..13d05062d68c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2408,7 +2408,7 @@ is_rb(struct detailed_timing *t, void *data)
if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[15] & 0x10)
+   if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
*(bool *)data = true;
 }
 
-- 
2.30.2



[PATCH v3 03/12] drm/edid: pass a timing pointer to is_display_descriptor()

2022-03-28 Thread Jani Nikula
Use struct member access instead of direct offsets to avoid lots of
casts all over the place.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 27 ---
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ded1f019180d 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2331,10 +2331,15 @@ struct drm_display_mode *drm_mode_find_dmt(struct 
drm_device *dev,
 }
 EXPORT_SYMBOL(drm_mode_find_dmt);
 
-static bool is_display_descriptor(const u8 d[18], u8 tag)
+static bool is_display_descriptor(const struct detailed_timing *descriptor, u8 
type)
 {
-   return d[0] == 0x00 && d[1] == 0x00 &&
-   d[2] == 0x00 && d[3] == tag;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), pixel_clock) != 0);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.pad1) != 2);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.type) != 3);
+
+   return descriptor->pixel_clock == 0 &&
+   descriptor->data.other_data.pad1 == 0 &&
+   descriptor->data.other_data.type == type;
 }
 
 static bool is_detailed_timing_descriptor(const u8 d[18])
@@ -2405,7 +2410,7 @@ is_rb(struct detailed_timing *t, void *data)
 {
u8 *r = (u8 *)t;
 
-   if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
return;
 
if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
@@ -2431,7 +2436,7 @@ find_gtf2(struct detailed_timing *t, void *data)
 {
u8 *r = (u8 *)t;
 
-   if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
return;
 
if (r[10] == 0x02)
@@ -2987,7 +2992,7 @@ do_inferred_modes(struct detailed_timing *timing, void *c)
struct detailed_non_pixel *data = &timing->data.other_data;
struct detailed_data_monitor_range *range = &data->data.range;
 
-   if (!is_display_descriptor((const u8 *)timing, 
EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
 
closure->modes += drm_dmt_modes_for_range(closure->connector,
@@ -3067,7 +3072,7 @@ do_established_modes(struct detailed_timing *timing, void 
*c)
 {
struct detailed_mode_closure *closure = c;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS))
+   if (!is_display_descriptor(timing, EDID_DETAIL_EST_TIMINGS))
return;
 
closure->modes += drm_est3_modes(closure->connector, timing);
@@ -3122,7 +3127,7 @@ do_standard_modes(struct detailed_timing *timing, void *c)
struct edid *edid = closure->edid;
int i;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES))
+   if (!is_display_descriptor(timing, EDID_DETAIL_STD_MODES))
return;
 
for (i = 0; i < 6; i++) {
@@ -3231,7 +3236,7 @@ do_cvt_mode(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
-   if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_CVT_3BYTE))
return;
 
closure->modes += drm_cvt_modes(closure->connector, timing);
@@ -4491,7 +4496,7 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector 
*connector, const u8 *db)
 static void
 monitor_name(struct detailed_timing *t, void *data)
 {
-   if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
+   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
return;
 
*(u8 **)data = t->data.other_data.data.str.str;
@@ -5226,7 +5231,7 @@ void get_monitor_range(struct detailed_timing *timing,
const struct detailed_non_pixel *data = &timing->data.other_data;
const struct detailed_data_monitor_range *range = &data->data.range;
 
-   if (!is_display_descriptor((const u8 *)timing, 
EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
 
/*
-- 
2.30.2



[PATCH v3 05/12] drm/edid: use struct detailed_timing member access in is_rb()

2022-03-28 Thread Jani Nikula
Use struct detailed_timing member access instead of direct offsets to
avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 10da6b9b14fb..39c8bf4ca082 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2408,15 +2408,19 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *t, void *data)
+is_rb(struct detailed_timing *descriptor, void *data)
 {
-   u8 *r = (u8 *)t;
+   bool *res = data;
 
-   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[10] == DRM_EDID_CVT_SUPPORT_FLAG && r[15] & 0x10)
-   *(bool *)data = true;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.flags) != 10);
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.cvt.flags) != 15);
+
+   if (descriptor->data.other_data.data.range.flags == 
DRM_EDID_CVT_SUPPORT_FLAG &&
+   descriptor->data.other_data.data.range.formula.cvt.flags & 0x10)
+   *res = true;
 }
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
-- 
2.30.2



[PATCH v3 08/12] drm/edid: constify struct detailed_timing in parsing callbacks

2022-03-28 Thread Jani Nikula
Moving one level higher, constify struct detailed_timing pointers in
callbacks.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 40 --
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 6d1461991ba4..47234cf211ca 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2349,7 +2349,7 @@ static bool is_detailed_timing_descriptor(const struct 
detailed_timing *descript
return descriptor->pixel_clock != 0;
 }
 
-typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
@@ -2408,7 +2408,7 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
 }
 
 static void
-is_rb(struct detailed_timing *descriptor, void *data)
+is_rb(const struct detailed_timing *descriptor, void *data)
 {
bool *res = data;
 
@@ -2438,9 +2438,9 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *descriptor, void *data)
+find_gtf2(const struct detailed_timing *descriptor, void *data)
 {
-   struct detailed_timing **res = data;
+   const struct detailed_timing **res = data;
 
if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
@@ -2455,7 +2455,7 @@ find_gtf2(struct detailed_timing *descriptor, void *data)
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-   struct detailed_timing *descriptor = NULL;
+   const struct detailed_timing *descriptor = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
@@ -2467,7 +2467,7 @@ drm_gtf2_hbreak(struct edid *edid)
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-   struct detailed_timing *descriptor = NULL;
+   const struct detailed_timing *descriptor = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
@@ -2479,7 +2479,7 @@ drm_gtf2_2c(struct edid *edid)
 static int
 drm_gtf2_m(struct edid *edid)
 {
-   struct detailed_timing *descriptor = NULL;
+   const struct detailed_timing *descriptor = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
@@ -2491,7 +2491,7 @@ drm_gtf2_m(struct edid *edid)
 static int
 drm_gtf2_k(struct edid *edid)
 {
-   struct detailed_timing *descriptor = NULL;
+   const struct detailed_timing *descriptor = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
@@ -2503,7 +2503,7 @@ drm_gtf2_k(struct edid *edid)
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-   struct detailed_timing *descriptor = NULL;
+   const struct detailed_timing *descriptor = NULL;
 
drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
@@ -3009,7 +3009,7 @@ drm_cvt_modes_for_range(struct drm_connector *connector, 
struct edid *edid,
 }
 
 static void
-do_inferred_modes(struct detailed_timing *timing, void *c)
+do_inferred_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
const struct detailed_non_pixel *data = &timing->data.other_data;
@@ -3091,7 +3091,7 @@ drm_est3_modes(struct drm_connector *connector, const 
struct detailed_timing *ti
 }
 
 static void
-do_established_modes(struct detailed_timing *timing, void *c)
+do_established_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
@@ -3142,7 +3142,7 @@ add_established_modes(struct drm_connector *connector, 
struct edid *edid)
 }
 
 static void
-do_standard_modes(struct detailed_timing *timing, void *c)
+do_standard_modes(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
const struct detailed_non_pixel *data = &timing->data.other_data;
@@ -3255,7 +3255,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 }
 
 static void
-do_cvt_mode(struct detailed_timing *timing, void *c)
+do_cvt_mode(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
 
@@ -3284,7 +3284,7 @@ add_cvt_modes(struct drm_connector *connector, struct 
edid *edid)
 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
 
 static void
-do_detailed_mode(struct detailed_timing *timing, void *c)
+do_detailed_mode(const struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
struct drm_display_mode *newmode;
@@ -4517,17 +4517,19 @@ drm_parse_hdmi_vsdb_audio(struct drm_connector 
*connector, const u8 *db)
 }
 
 static void
-monitor_name(struct detailed_timing *t, void *data)
+monitor_name(const struct detailed_timing *timing, void *data)
 {
-   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_NAME))
+   const char **res = data;

[PATCH v3 04/12] drm/edid: pass a timing pointer to is_detailed_timing_descriptor()

2022-03-28 Thread Jani Nikula
Use struct member access instead of direct offsets to avoid a cast.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ded1f019180d..10da6b9b14fb 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2342,9 +2342,11 @@ static bool is_display_descriptor(const struct 
detailed_timing *descriptor, u8 t
descriptor->data.other_data.type == type;
 }
 
-static bool is_detailed_timing_descriptor(const u8 d[18])
+static bool is_detailed_timing_descriptor(const struct detailed_timing 
*descriptor)
 {
-   return d[0] != 0x00 || d[1] != 0x00;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), pixel_clock) != 0);
+
+   return descriptor->pixel_clock != 0;
 }
 
 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
@@ -3266,7 +3268,7 @@ do_detailed_mode(struct detailed_timing *timing, void *c)
struct detailed_mode_closure *closure = c;
struct drm_display_mode *newmode;
 
-   if (!is_detailed_timing_descriptor((const u8 *)timing))
+   if (!is_detailed_timing_descriptor(timing))
return;
 
newmode = drm_mode_detailed(closure->connector->dev,
-- 
2.30.2



[PATCH v3 06/12] drm/edid: use struct detailed_timing member access in gtf2 functions

2022-03-28 Thread Jani Nikula
Use struct detailed_timing member access instead of direct offsets to
avoid casting.

Use BUILD_BUG_ON() for sanity check.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 57 +-
 1 file changed, 37 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 39c8bf4ca082..27a0e9bf260c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2438,61 +2438,78 @@ drm_monitor_supports_rb(struct edid *edid)
 }
 
 static void
-find_gtf2(struct detailed_timing *t, void *data)
+find_gtf2(struct detailed_timing *descriptor, void *data)
 {
-   u8 *r = (u8 *)t;
+   struct detailed_timing **res = data;
 
-   if (!is_display_descriptor(t, EDID_DETAIL_MONITOR_RANGE))
+   if (!is_display_descriptor(descriptor, EDID_DETAIL_MONITOR_RANGE))
return;
 
-   if (r[10] == 0x02)
-   *(u8 **)data = r;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.flags) != 10);
+
+   if (descriptor->data.other_data.data.range.flags == 0x02)
+   *res = descriptor;
 }
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
 drm_gtf2_hbreak(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_timing *descriptor = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? (r[12] * 2) : 0;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.hfreq_start_khz) != 12);
+
+   return descriptor ? 
descriptor->data.other_data.data.range.formula.gtf2.hfreq_start_khz * 2 : 0;
 }
 
 static int
 drm_gtf2_2c(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_timing *descriptor = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.c) != 13);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[13] : 0;
+   return descriptor ? 
descriptor->data.other_data.data.range.formula.gtf2.c : 0;
 }
 
 static int
 drm_gtf2_m(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? (r[15] << 8) + r[14] : 0;
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.m) != 14);
+
+   return descriptor ? 
le16_to_cpu(descriptor->data.other_data.data.range.formula.gtf2.m) : 0;
 }
 
 static int
 drm_gtf2_k(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_timing *descriptor = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[16] : 0;
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.k) != 16);
+
+   return descriptor ? 
descriptor->data.other_data.data.range.formula.gtf2.k : 0;
 }
 
 static int
 drm_gtf2_2j(struct edid *edid)
 {
-   u8 *r = NULL;
+   struct detailed_timing *descriptor = NULL;
+
+   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+
+   BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.j) != 17);
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
-   return r ? r[17] : 0;
+   return descriptor ? 
descriptor->data.other_data.data.range.formula.gtf2.j : 0;
 }
 
 /**
-- 
2.30.2



[PATCH v3 09/12] drm/edid: constify struct edid passed to detailed blocks

2022-03-28 Thread Jani Nikula
Constify the first level of struct edid in detailed timing parsing. Also
switch to struct edid instead of u8.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 48 ++
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 47234cf211ca..dae394688e5b 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2352,38 +2352,37 @@ static bool is_detailed_timing_descriptor(const struct 
detailed_timing *descript
 typedef void detailed_cb(const struct detailed_timing *timing, void *closure);
 
 static void
-cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+cea_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
int i, n;
u8 d = ext[0x02];
-   u8 *det_base = ext + d;
+   const u8 *det_base = ext + d;
 
if (d < 4 || d > 127)
return;
 
n = (127 - d) / 18;
for (i = 0; i < n; i++)
-   cb((struct detailed_timing *)(det_base + 18 * i), closure);
+   cb((const struct detailed_timing *)(det_base + 18 * i), 
closure);
 }
 
 static void
-vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+vtb_for_each_detailed_block(const u8 *ext, detailed_cb *cb, void *closure)
 {
unsigned int i, n = min((int)ext[0x02], 6);
-   u8 *det_base = ext + 5;
+   const u8 *det_base = ext + 5;
 
if (ext[0x01] != 1)
return; /* unknown version */
 
for (i = 0; i < n; i++)
-   cb((struct detailed_timing *)(det_base + 18 * i), closure);
+   cb((const struct detailed_timing *)(det_base + 18 * i), 
closure);
 }
 
 static void
-drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+drm_for_each_detailed_block(const struct edid *edid, detailed_cb *cb, void 
*closure)
 {
int i;
-   struct edid *edid = (struct edid *)raw_edid;
 
if (edid == NULL)
return;
@@ -2391,8 +2390,8 @@ drm_for_each_detailed_block(u8 *raw_edid, detailed_cb 
*cb, void *closure)
for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
cb(&(edid->detailed_timings[i]), closure);
 
-   for (i = 1; i <= raw_edid[0x7e]; i++) {
-   u8 *ext = raw_edid + (i * EDID_LENGTH);
+   for (i = 1; i <= edid->extensions; i++) {
+   const u8 *ext = (const u8 *)edid + (i * EDID_LENGTH);
 
switch (*ext) {
case CEA_EXT:
@@ -2430,7 +2429,7 @@ drm_monitor_supports_rb(struct edid *edid)
if (edid->revision >= 4) {
bool ret = false;
 
-   drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+   drm_for_each_detailed_block(edid, is_rb, &ret);
return ret;
}
 
@@ -2457,7 +2456,7 @@ drm_gtf2_hbreak(struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+   drm_for_each_detailed_block(edid, find_gtf2, &descriptor);
 
BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.hfreq_start_khz) != 12);
 
@@ -2469,7 +2468,7 @@ drm_gtf2_2c(struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+   drm_for_each_detailed_block(edid, find_gtf2, &descriptor);
 
BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.c) != 13);
 
@@ -2481,7 +2480,7 @@ drm_gtf2_m(struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+   drm_for_each_detailed_block(edid, find_gtf2, &descriptor);
 
BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.m) != 14);
 
@@ -2493,7 +2492,7 @@ drm_gtf2_k(struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+   drm_for_each_detailed_block(edid, find_gtf2, &descriptor);
 
BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.k) != 16);
 
@@ -2505,7 +2504,7 @@ drm_gtf2_2j(struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
-   drm_for_each_detailed_block((u8 *)edid, find_gtf2, &descriptor);
+   drm_for_each_detailed_block(edid, find_gtf2, &descriptor);
 
BUILD_BUG_ON(offsetof(typeof(*descriptor), 
data.other_data.data.range.formula.gtf2.j) != 17);
 
@@ -3055,8 +3054,7 @@ add_inferred_modes(struct drm_connector *connector, 
struct edid *edid)
};
 
if (version_greater(edid, 1, 0))
-   drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
-   &closure);
+   drm_for_

[PATCH v3 07/12] drm/edid: constify struct detailed_timing in lower level parsing

2022-03-28 Thread Jani Nikula
Start constifying the struct detailed_timing pointers being passed
around from bottom up.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 40 +++---
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 27a0e9bf260c..6d1461991ba4 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2560,7 +2560,7 @@ static int drm_mode_hsync(const struct drm_display_mode 
*mode)
  */
 static struct drm_display_mode *
 drm_mode_std(struct drm_connector *connector, struct edid *edid,
-struct std_timing *t)
+const struct std_timing *t)
 {
struct drm_device *dev = connector->dev;
struct drm_display_mode *m, *mode = NULL;
@@ -2678,7 +2678,7 @@ drm_mode_std(struct drm_connector *connector, struct edid 
*edid,
  */
 static void
 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
-   struct detailed_pixel_timing *pt)
+   const struct detailed_pixel_timing *pt)
 {
int i;
static const struct {
@@ -2722,11 +2722,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode 
*mode,
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  struct edid *edid,
- struct detailed_timing 
*timing,
+ const struct detailed_timing 
*timing,
  u32 quirks)
 {
struct drm_display_mode *mode;
-   struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+   const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
@@ -2821,7 +2821,7 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, u8 *t)
+   struct edid *edid, const u8 *t)
 {
int hsync, hmin, hmax;
 
@@ -2838,7 +2838,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, u8 *t)
+   struct edid *edid, const u8 *t)
 {
int vsync, vmin, vmax;
 
@@ -2854,7 +2854,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, u8 *t)
+range_pixel_clock(struct edid *edid, const u8 *t)
 {
/* unspecified */
if (t[9] == 0 || t[9] == 255)
@@ -2870,10 +2870,10 @@ range_pixel_clock(struct edid *edid, u8 *t)
 
 static bool
 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
- struct detailed_timing *timing)
+ const struct detailed_timing *timing)
 {
u32 max_clock;
-   u8 *t = (u8 *)timing;
+   const u8 *t = (const u8 *)timing;
 
if (!mode_in_hsync_range(mode, edid, t))
return false;
@@ -2916,7 +2916,7 @@ static bool valid_inferred_mode(const struct 
drm_connector *connector,
 
 static int
 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -2951,7 +2951,7 @@ void drm_mode_fixup_1366x768(struct drm_display_mode 
*mode)
 
 static int
 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -2980,7 +2980,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector, 
struct edid *edid,
 
 static int
 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
-   struct detailed_timing *timing)
+   const struct detailed_timing *timing)
 {
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -3012,8 +3012,8 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
struct detailed_mode_closure *closure = c;
-   struct detailed_non_pixel *data = &timing->data.other_data;
-   struct detailed_data_monitor_range *range = &data->data.range;
+   const struct detailed_non_pixel *data = &timing->data.other_data;
+   const struct detailed_data_monitor_range *range = &data->data.range;
 
if (!is_display_descriptor(timing, EDID_DETAIL_MONITOR_RANGE))
return;
@@ -3062,11 +3062,11 

[PATCH v3 10/12] drm/edid: constify struct edid passed around in callbacks and closure

2022-03-28 Thread Jani Nikula
Finalize detailed timing parsing constness by making struct edid also
const in callbacks and closure.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 48 +++---
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index dae394688e5b..625fa6a4a93a 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -97,7 +97,7 @@ static int oui(u8 first, u8 second, u8 third)
 
 struct detailed_mode_closure {
struct drm_connector *connector;
-   struct edid *edid;
+   const struct edid *edid;
bool preferred;
u32 quirks;
int modes;
@@ -2424,7 +2424,7 @@ is_rb(const struct detailed_timing *descriptor, void 
*data)
 
 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
 static bool
-drm_monitor_supports_rb(struct edid *edid)
+drm_monitor_supports_rb(const struct edid *edid)
 {
if (edid->revision >= 4) {
bool ret = false;
@@ -2452,7 +2452,7 @@ find_gtf2(const struct detailed_timing *descriptor, void 
*data)
 
 /* Secondary GTF curve kicks in above some break frequency */
 static int
-drm_gtf2_hbreak(struct edid *edid)
+drm_gtf2_hbreak(const struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
@@ -2464,7 +2464,7 @@ drm_gtf2_hbreak(struct edid *edid)
 }
 
 static int
-drm_gtf2_2c(struct edid *edid)
+drm_gtf2_2c(const struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
@@ -2476,7 +2476,7 @@ drm_gtf2_2c(struct edid *edid)
 }
 
 static int
-drm_gtf2_m(struct edid *edid)
+drm_gtf2_m(const struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
@@ -2488,7 +2488,7 @@ drm_gtf2_m(struct edid *edid)
 }
 
 static int
-drm_gtf2_k(struct edid *edid)
+drm_gtf2_k(const struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
@@ -2500,7 +2500,7 @@ drm_gtf2_k(struct edid *edid)
 }
 
 static int
-drm_gtf2_2j(struct edid *edid)
+drm_gtf2_2j(const struct edid *edid)
 {
const struct detailed_timing *descriptor = NULL;
 
@@ -2515,7 +2515,7 @@ drm_gtf2_2j(struct edid *edid)
  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
  * @edid: EDID block to scan
  */
-static int standard_timing_level(struct edid *edid)
+static int standard_timing_level(const struct edid *edid)
 {
if (edid->revision >= 2) {
if (edid->revision >= 4 && (edid->features & 
DRM_EDID_FEATURE_DEFAULT_GTF))
@@ -2558,7 +2558,7 @@ static int drm_mode_hsync(const struct drm_display_mode 
*mode)
  * and convert them into a real mode using CVT/GTF/DMT.
  */
 static struct drm_display_mode *
-drm_mode_std(struct drm_connector *connector, struct edid *edid,
+drm_mode_std(struct drm_connector *connector, const struct edid *edid,
 const struct std_timing *t)
 {
struct drm_device *dev = connector->dev;
@@ -2720,7 +2720,7 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  * return a new struct drm_display_mode.
  */
 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
- struct edid *edid,
+ const struct edid *edid,
  const struct detailed_timing 
*timing,
  u32 quirks)
 {
@@ -2820,7 +2820,7 @@ static struct drm_display_mode *drm_mode_detailed(struct 
drm_device *dev,
 
 static bool
 mode_in_hsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, const u8 *t)
+   const struct edid *edid, const u8 *t)
 {
int hsync, hmin, hmax;
 
@@ -2837,7 +2837,7 @@ mode_in_hsync_range(const struct drm_display_mode *mode,
 
 static bool
 mode_in_vsync_range(const struct drm_display_mode *mode,
-   struct edid *edid, const u8 *t)
+   const struct edid *edid, const u8 *t)
 {
int vsync, vmin, vmax;
 
@@ -2853,7 +2853,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 }
 
 static u32
-range_pixel_clock(struct edid *edid, const u8 *t)
+range_pixel_clock(const struct edid *edid, const u8 *t)
 {
/* unspecified */
if (t[9] == 0 || t[9] == 255)
@@ -2868,7 +2868,7 @@ range_pixel_clock(struct edid *edid, const u8 *t)
 }
 
 static bool
-mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
  const struct detailed_timing *timing)
 {
u32 max_clock;
@@ -2914,7 +2914,7 @@ static bool valid_inferred_mode(const struct 
drm_connector *connector,
 }
 
 static int
-drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
+drm_dmt_modes_for_range(struct drm_connector *connector, const struct edid 
*edid,
const struct detailed_timing *ti

[PATCH v3 11/12] drm/edid: add more general struct edid constness in the interfaces

2022-03-28 Thread Jani Nikula
With this, the remaining non-const parts are the ones that actually
modify the EDID, for example to fix corrupt EDID.

Cc: Ville Syrjälä 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 21 +++--
 include/drm/drm_edid.h | 10 +-
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 625fa6a4a93a..d1abaa517867 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2150,7 +2150,7 @@ static u32 edid_extract_panel_id(const struct edid *edid)
 
 u32 drm_edid_get_panel_id(struct i2c_adapter *adapter)
 {
-   struct edid *edid;
+   const struct edid *edid;
u32 panel_id;
 
edid = drm_do_get_edid_base_block(NULL, drm_do_probe_ddc_edid, adapter);
@@ -3664,7 +3664,7 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static int
-add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_alternate_cea_modes(struct drm_connector *connector, const struct edid 
*edid)
 {
struct drm_device *dev = connector->dev;
struct drm_display_mode *mode, *tmp;
@@ -4345,7 +4345,7 @@ static void drm_parse_y420cmdb_bitmap(struct 
drm_connector *connector,
 }
 
 static int
-add_cea_modes(struct drm_connector *connector, struct edid *edid)
+add_cea_modes(struct drm_connector *connector, const struct edid *edid)
 {
const u8 *cea = drm_find_cea_extension(edid);
const u8 *db, *hdmi = NULL, *video = NULL;
@@ -4551,7 +4551,7 @@ static int get_monitor_name(const struct edid *edid, char 
name[13])
  * @bufsize: The size of the name buffer (should be at least 14 chars.)
  *
  */
-void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
+void drm_edid_get_monitor_name(const struct edid *edid, char *name, int 
bufsize)
 {
int name_length;
char buf[13];
@@ -4585,7 +4585,8 @@ static void clear_eld(struct drm_connector *connector)
  * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
  * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
  */
-static void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
+static void drm_edid_to_eld(struct drm_connector *connector,
+   const struct edid *edid)
 {
uint8_t *eld = connector->eld;
const u8 *cea;
@@ -4681,7 +4682,7 @@ static void drm_edid_to_eld(struct drm_connector 
*connector, struct edid *edid)
  *
  * Return: The number of found SADs or negative number on error.
  */
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
 {
int count = 0;
int i, start, end, dbl;
@@ -4743,7 +4744,7 @@ EXPORT_SYMBOL(drm_edid_to_sad);
  * Return: The number of found Speaker Allocation Blocks or negative number on
  * error.
  */
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
 {
int count = 0;
int i, start, end, dbl;
@@ -4838,7 +4839,7 @@ EXPORT_SYMBOL(drm_av_sync_delay);
  *
  * Return: True if the monitor is HDMI, false if not or unknown.
  */
-bool drm_detect_hdmi_monitor(struct edid *edid)
+bool drm_detect_hdmi_monitor(const struct edid *edid)
 {
const u8 *edid_ext;
int i;
@@ -4876,7 +4877,7 @@ EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  *
  * Return: True if the monitor supports audio, false otherwise.
  */
-bool drm_detect_monitor_audio(struct edid *edid)
+bool drm_detect_monitor_audio(const struct edid *edid)
 {
const u8 *edid_ext;
int i, j;
@@ -5543,7 +5544,7 @@ static int add_displayid_detailed_1_modes(struct 
drm_connector *connector,
 }
 
 static int add_displayid_detailed_modes(struct drm_connector *connector,
-   struct edid *edid)
+   const struct edid *edid)
 {
const struct displayid_block *block;
struct displayid_iter iter;
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..48b1bf9c315a 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -372,8 +372,8 @@ struct drm_connector;
 struct drm_connector_state;
 struct drm_display_mode;
 
-int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
-int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
 int drm_av_sync_delay(struct drm_connector *connector,
  const struct drm_display_mode *mode);
 
@@ -569,8 +569,8 @@ int drm_add_edid_modes(struct drm_connector *connector, 
struct edid *edid);
 int drm_add_override_edid_modes(struct drm_connector *connector);
 
 u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
-bool drm_detect_hdmi_monitor(struct edid *edid);
-bool drm_detect_mo

[PATCH v3 12/12] drm/edid: split drm_add_edid_modes() to two

2022-03-28 Thread Jani Nikula
Reduce the size of the function that actually modifies the EDID.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 42 ++
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index d1abaa517867..d79b06f7f34c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5561,18 +5561,8 @@ static int add_displayid_detailed_modes(struct 
drm_connector *connector,
return num_modes;
 }
 
-/**
- * drm_add_edid_modes - add modes from EDID data, if available
- * @connector: connector we're probing
- * @edid: EDID data
- *
- * Add the specified modes to the connector's mode list. Also fills out the
- * &drm_display_info structure and ELD in @connector with any information which
- * can be derived from the edid.
- *
- * Return: The number of modes added or 0 if we couldn't find any.
- */
-int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
+static int drm_edid_connector_update(struct drm_connector *connector,
+const struct edid *edid)
 {
int num_modes = 0;
u32 quirks;
@@ -5581,12 +5571,6 @@ int drm_add_edid_modes(struct drm_connector *connector, 
struct edid *edid)
clear_eld(connector);
return 0;
}
-   if (!drm_edid_is_valid(edid)) {
-   clear_eld(connector);
-   drm_warn(connector->dev, "%s: EDID invalid.\n",
-connector->name);
-   return 0;
-   }
 
drm_edid_to_eld(connector, edid);
 
@@ -5638,6 +5622,28 @@ int drm_add_edid_modes(struct drm_connector *connector, 
struct edid *edid)
 
return num_modes;
 }
+
+/**
+ * drm_add_edid_modes - add modes from EDID data, if available
+ * @connector: connector we're probing
+ * @edid: EDID data
+ *
+ * Add the specified modes to the connector's mode list. Also fills out the
+ * &drm_display_info structure and ELD in @connector with any information which
+ * can be derived from the edid.
+ *
+ * Return: The number of modes added or 0 if we couldn't find any.
+ */
+int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
+{
+   if (edid && !drm_edid_is_valid(edid)) {
+   drm_warn(connector->dev, "%s: EDID invalid.\n",
+connector->name);
+   edid = NULL;
+   }
+
+   return drm_edid_connector_update(connector, edid);
+}
 EXPORT_SYMBOL(drm_add_edid_modes);
 
 /**
-- 
2.30.2



Re: [RFC v4 4/8] dmabuf: heaps: export system_heap buffers with GPU cgroup charging

2022-03-28 Thread Daniel Vetter
On Mon, Mar 28, 2022 at 03:59:43AM +, T.J. Mercier wrote:
> From: Hridya Valsaraju 
> 
> All DMA heaps now register a new GPU cgroup device upon creation, and the
> system_heap now exports buffers associated with its GPU cgroup device for
> tracking purposes.
> 
> Signed-off-by: Hridya Valsaraju 
> Signed-off-by: T.J. Mercier 
> 
> ---
> v3 changes
> Use more common dual author commit message format per John Stultz.
> 
> v2 changes
> Move dma-buf cgroup charge transfer from a dma_buf_op defined by every
> heap to a single dma-buf function for all heaps per Daniel Vetter and
> Christian König.

Apologies for being out of the loop quite a bit. I scrolled through this
all and I think it looks good to get going.

The only thing I have is whether we should move the cgroup controllers out
of dma-buf heaps, since that's rather android centric. E.g.
- a system gpucg_device which is used by all the various single page
  allocators (dma-buf heap but also shmem helpers and really anything
  else)
- same for cma, again both for dma-buf heaps and also for the gem cma
  helpers in drm

Otherwise this will only work on non-upstream android where gpu drivers
allocate everything from dma-buf heap. If you use something like the x86
android project with mesa drivers, then driver-internal buffers will be
allocated through gem and not through dma-buf heaps. Or at least I think
that's how it works.

But also meh, we can fix this fairly easily later on by adding these
standard gpucg_dev somwehere with a bit of kerneldoc.

Anyway has my all my ack, but don't count this as my in-depth review :-)
-Daniel

> ---
>  drivers/dma-buf/dma-heap.c  | 27 +++
>  drivers/dma-buf/heaps/system_heap.c |  3 +++
>  include/linux/dma-heap.h| 11 +++
>  3 files changed, 41 insertions(+)
> 
> diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c
> index 8f5848aa144f..885072427775 100644
> --- a/drivers/dma-buf/dma-heap.c
> +++ b/drivers/dma-buf/dma-heap.c
> @@ -7,6 +7,7 @@
>   */
>  
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -31,6 +32,7 @@
>   * @heap_devtheap device node
>   * @list list head connecting to list of heaps
>   * @heap_cdevheap char device
> + * @gpucg_devgpu cgroup device for memory accounting
>   *
>   * Represents a heap of memory from which buffers can be made.
>   */
> @@ -41,6 +43,9 @@ struct dma_heap {
>   dev_t heap_devt;
>   struct list_head list;
>   struct cdev heap_cdev;
> +#ifdef CONFIG_CGROUP_GPU
> + struct gpucg_device gpucg_dev;
> +#endif
>  };
>  
>  static LIST_HEAD(heap_list);
> @@ -216,6 +221,26 @@ const char *dma_heap_get_name(struct dma_heap *heap)
>   return heap->name;
>  }
>  
> +#ifdef CONFIG_CGROUP_GPU
> +/**
> + * dma_heap_get_gpucg_dev() - get struct gpucg_device for the heap.
> + * @heap: DMA-Heap to get the gpucg_device struct for.
> + *
> + * Returns:
> + * The gpucg_device struct for the heap. NULL if the GPU cgroup controller is
> + * not enabled.
> + */
> +struct gpucg_device *dma_heap_get_gpucg_dev(struct dma_heap *heap)
> +{
> + return &heap->gpucg_dev;
> +}
> +#else /* CONFIG_CGROUP_GPU */
> +struct gpucg_device *dma_heap_get_gpucg_dev(struct dma_heap *heap)
> +{
> + return NULL;
> +}
> +#endif /* CONFIG_CGROUP_GPU */
> +
>  struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info)
>  {
>   struct dma_heap *heap, *h, *err_ret;
> @@ -288,6 +313,8 @@ struct dma_heap *dma_heap_add(const struct 
> dma_heap_export_info *exp_info)
>   list_add(&heap->list, &heap_list);
>   mutex_unlock(&heap_list_lock);
>  
> + gpucg_register_device(dma_heap_get_gpucg_dev(heap), exp_info->name);
> +
>   return heap;
>  
>  err2:
> diff --git a/drivers/dma-buf/heaps/system_heap.c 
> b/drivers/dma-buf/heaps/system_heap.c
> index ab7fd896d2c4..752a05c3cfe2 100644
> --- a/drivers/dma-buf/heaps/system_heap.c
> +++ b/drivers/dma-buf/heaps/system_heap.c
> @@ -395,6 +395,9 @@ static struct dma_buf *system_heap_allocate(struct 
> dma_heap *heap,
>   exp_info.ops = &system_heap_buf_ops;
>   exp_info.size = buffer->len;
>   exp_info.flags = fd_flags;
> +#ifdef CONFIG_CGROUP_GPU
> + exp_info.gpucg_dev = dma_heap_get_gpucg_dev(heap);
> +#endif
>   exp_info.priv = buffer;
>   dmabuf = dma_buf_export(&exp_info);
>   if (IS_ERR(dmabuf)) {
> diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h
> index 0c05561cad6e..e447a61d054e 100644
> --- a/include/linux/dma-heap.h
> +++ b/include/linux/dma-heap.h
> @@ -10,6 +10,7 @@
>  #define _DMA_HEAPS_H
>  
>  #include 
> +#include 
>  #include 
>  
>  struct dma_heap;
> @@ -59,6 +60,16 @@ void *dma_heap_get_drvdata(struct dma_heap *heap);
>   */
>  const char *dma_heap_get_name(struct dma_heap *heap);
>  
> +/**
> + * dma_heap_get_gpucg_dev() - get a pointer to the struct gpucg_device for 
> the
> + * heap.
> + * @heap: DMA-Heap to retriev

Re: [PATCH v3 1/4] drm/atomic: Print the state every non-blocking commit

2022-03-28 Thread Daniel Vetter
On Mon, Mar 28, 2022 at 02:43:01PM +0200, Maxime Ripard wrote:
> The DRM_UT_STATE controls whether we're calling
> drm_atomic_print_new_state() whenever a new state is committed. However,
> that call is made in the drm_mode_atomic_ioctl(), whereas we have
> multiple users of the drm_atomic_commit() function in the kernel
> (framebuffer emulation, drm_atomic_helper_dirtyfb, etc.).
> 
> This leads to multiple states being committed but never actually
> displayed even though we asked to have verbose atomic state debugging.
> 
> Let's move the call to drm_atomic_print_new_state() to
> drm_atomic_commit() to make sure we don't miss any. Non-blocking commits
> were never logged though, and it would create too much churn in the logs
> to do so, so leave them out for now.
> 
> Signed-off-by: Maxime Ripard 

Reviewed-by: Daniel Vetter 

> ---
>  drivers/gpu/drm/drm_atomic.c  | 4 
>  drivers/gpu/drm/drm_atomic_uapi.c | 4 
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 88cd992df356..637df126c2d9 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1423,8 +1423,12 @@ EXPORT_SYMBOL(drm_atomic_check_only);
>  int drm_atomic_commit(struct drm_atomic_state *state)
>  {
>   struct drm_mode_config *config = &state->dev->mode_config;
> + struct drm_printer p = drm_info_printer(state->dev->dev);
>   int ret;
>  
> + if (drm_debug_enabled(DRM_UT_STATE))
> + drm_atomic_print_new_state(state, &p);
> +
>   ret = drm_atomic_check_only(state);
>   if (ret)
>   return ret;
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
> b/drivers/gpu/drm/drm_atomic_uapi.c
> index 9781722519c3..45e6d3c62a9a 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -1326,7 +1326,6 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
>   struct drm_out_fence_state *fence_state;
>   int ret = 0;
>   unsigned int i, j, num_fences;
> - struct drm_printer p = drm_info_printer(dev->dev);
>  
>   /* disallow for drivers not supporting atomic: */
>   if (!drm_core_check_feature(dev, DRIVER_ATOMIC))
> @@ -1458,9 +1457,6 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
>   } else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
>   ret = drm_atomic_nonblocking_commit(state);
>   } else {
> - if (drm_debug_enabled(DRM_UT_STATE))
> - drm_atomic_print_new_state(state, &p);
> -
>   ret = drm_atomic_commit(state);
>   }
>  
> -- 
> 2.35.1
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH v2] phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()

2022-03-28 Thread AngeloGioacchino Del Regno
Use the dev_err_probe() helper to simplify error handling during probe.

Signed-off-by: AngeloGioacchino Del Regno 

---

v2: Sorry, v1 was only partial as I have accidentally sent the
wrong patch file. Fixed for v2.

 drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 29 +
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c 
b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
index 67b005d5b9e3..28506932bd91 100644
--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c
@@ -154,11 +154,9 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev)
return PTR_ERR(mipi_tx->regs);
 
ref_clk = devm_clk_get(dev, NULL);
-   if (IS_ERR(ref_clk)) {
-   ret = PTR_ERR(ref_clk);
-   dev_err(dev, "Failed to get reference clock: %d\n", ret);
-   return ret;
-   }
+   if (IS_ERR(ref_clk))
+   return dev_err_probe(dev, PTR_ERR(ref_clk),
+"Failed to get reference clock\n");
 
ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",
   &mipi_tx->mipitx_drive);
@@ -178,27 +176,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev)
 
ret = of_property_read_string(dev->of_node, "clock-output-names",
  &clk_init.name);
-   if (ret < 0) {
-   dev_err(dev, "Failed to read clock-output-names: %d\n", ret);
-   return ret;
-   }
+   if (ret < 0)
+   return dev_err_probe(dev, ret, "Failed to read 
clock-output-names\n");
 
clk_init.ops = mipi_tx->driver_data->mipi_tx_clk_ops;
 
mipi_tx->pll_hw.init = &clk_init;
mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw);
-   if (IS_ERR(mipi_tx->pll)) {
-   ret = PTR_ERR(mipi_tx->pll);
-   dev_err(dev, "Failed to register PLL: %d\n", ret);
-   return ret;
-   }
+   if (IS_ERR(mipi_tx->pll))
+   return dev_err_probe(dev, PTR_ERR(mipi_tx->pll), "Failed to 
register PLL\n");
 
phy = devm_phy_create(dev, NULL, &mtk_mipi_tx_ops);
-   if (IS_ERR(phy)) {
-   ret = PTR_ERR(phy);
-   dev_err(dev, "Failed to create MIPI D-PHY: %d\n", ret);
-   return ret;
-   }
+   if (IS_ERR(phy))
+   return dev_err_probe(dev, PTR_ERR(phy), "Failed to create MIPI 
D-PHY\n");
+
phy_set_drvdata(phy, mipi_tx);
 
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-- 
2.35.1



Re: [PATCH] drm/amd/display: DCN3.1: don't mark as kernel-doc

2022-03-28 Thread Alex Deucher
Applied.  Thanks!

Alex

On Sat, Mar 26, 2022 at 7:37 PM Randy Dunlap  wrote:
>
> There is no need for this one static function to be marked as
> kernel-doc notation.
>
> Avoid this doc build warning:
>
> warning: This comment starts with '/**', but isn't a kernel-doc comment. 
> Refer Documentation/doc-guide/kernel-doc.rst
>  * Enable CRTC
>
> Fixes: 110d3968fe95 ("drm/amd/display: Add DCN3.1 OPTC")
> Signed-off-by: Randy Dunlap 
> Cc: Alex Deucher 
> Cc: Nicholas Kazlauskas 
> Cc: amd-...@lists.freedesktop.org
> Cc: Christian König 
> Cc: "Pan, Xinhui" 
> Cc: Harry Wentland 
> Cc: Leo Li 
> Cc: Rodrigo Siqueira 
> ---
>  drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c |3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> --- linux-next-20220325.orig/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c
> +++ linux-next-20220325/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c
> @@ -91,8 +91,7 @@ static void optc31_set_odm_combine(struc
> optc1->opp_count = opp_cnt;
>  }
>
> -/**
> - * Enable CRTC
> +/*
>   * Enable CRTC - call ASIC Control Object to enable Timing generator.
>   */
>  static bool optc31_enable_crtc(struct timing_generator *optc)


[PATCH v9 10/23] dt-bindings: display: rockchip: dw-hdmi: Add regulator support

2022-03-28 Thread Sascha Hauer
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs
needed for the HDMI port. Add the binding for these supplies.

Signed-off-by: Sascha Hauer 
Acked-by: Rob Herring 
---

Notes:
Changes since v4:
- Add Robs Ack

 .../bindings/display/rockchip/rockchip,dw-hdmi.yaml   | 11 +++
 1 file changed, 11 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml 
b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
index e6b8437a1e2d1..38ebb69830287 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -28,6 +28,17 @@ properties:
   reg-io-width:
 const: 4
 
+  avdd-0v9-supply:
+description:
+  A 0.9V supply that powers up the SoC internal circuitry. The actual pin 
name
+  varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or 
sometimes
+  HDMI_AVDD_1V0.
+
+  avdd-1v8-supply:
+description:
+  A 1.8V supply that powers up the SoC internal circuitry. The pin name on 
the
+  SoC usually is HDMI_TX_AVDD_1V8.
+
   clocks:
 minItems: 2
 items:
-- 
2.30.2



[PATCH v9 05/23] dt-bindings: display: rockchip: dw-hdmi: use "ref" as clock name

2022-03-28 Thread Sascha Hauer
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
This patch adds "ref" as a new alternative clock name for "vpll"

Signed-off-by: Sascha Hauer 
Acked-by: Rob Herring 
---

Notes:
Changes since v4:
- Add Robs Ack

Changes since v3:
- Keep old clock name for compatibility reasons

 .../bindings/display/rockchip/rockchip,dw-hdmi.yaml  | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml 
b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
index da3b889ad8fcd..0400f67e5f2c9 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -36,7 +36,8 @@ properties:
   # order when present.
   - description: The HDMI CEC controller main clock
   - description: Power for GRF IO
-  - description: External clock for some HDMI PHY
+  - description: External clock for some HDMI PHY (old clock name, 
deprecated)
+  - description: External clock for some HDMI PHY (new name)
 
   clock-names:
 minItems: 2
@@ -47,10 +48,14 @@ properties:
   - cec
   - grf
   - vpll
+  - ref
   - enum:
   - grf
   - vpll
-  - const: vpll
+  - ref
+  - enum:
+  - vpll
+  - ref
 
   ddc-i2c-bus:
 $ref: /schemas/types.yaml#/definitions/phandle
-- 
2.30.2



[PATCH v9 18/23] arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi

2022-03-28 Thread Sascha Hauer
This enabled the VOP2 display controller along with hdmi and the
required port routes which is enough to get a picture out of the
hdmi port of the board.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v5:
- Drop reg property from single endpoint node

Changes since v4:
- Sort nodes alphabetically

Changes since v3:
- Fix HDMI connector type

 .../boot/dts/rockchip/rk3568-evb1-v10.dts | 47 +++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts 
b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
index a794a0ea5c701..096b66d7697e2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "rk3568.dtsi"
 
 / {
@@ -34,6 +35,17 @@ dc_12v: dc-12v {
regulator-max-microvolt = <1200>;
};
 
+   hdmi-con {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_in: endpoint {
+   remote-endpoint = <&hdmi_out_con>;
+   };
+   };
+   };
+
leds {
compatible = "gpio-leds";
 
@@ -189,6 +201,24 @@ &gpu {
status = "okay";
 };
 
+&hdmi {
+   avdd-0v9-supply = <&vdda0v9_image>;
+   avdd-1v8-supply = <&vcca1v8_image>;
+   status = "okay";
+};
+
+&hdmi_in {
+   hdmi_in_vp0: endpoint {
+   remote-endpoint = <&vp0_out_hdmi>;
+   };
+};
+
+&hdmi_out {
+   hdmi_out_con: endpoint {
+   remote-endpoint = <&hdmi_con_in>;
+   };
+};
+
 &i2c0 {
status = "okay";
 
@@ -589,3 +619,20 @@ &usb2phy1_otg {
phy-supply = <&vcc5v0_usb_host>;
status = "okay";
 };
+
+&vop {
+   assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+   assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+   status = "okay";
+};
+
+&vop_mmu {
+   status = "okay";
+};
+
+&vp0 {
+   vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+   reg = ;
+   remote-endpoint = <&hdmi_in_vp0>;
+   };
+};
-- 
2.30.2



[PATCH v9 04/23] drm/rockchip: dw_hdmi: rename vpll clock to reference clock

2022-03-28 Thread Sascha Hauer
"vpll" is a misnomer. A clock input to a device should be named after
the usage in the device, not after the clock that drives it. On the
rk3568 the same clock is driven by the HPLL.
To fix that, this patch renames the vpll clock to ref clock. The clock
name "vpll" is left for compatibility to old device trees.

Signed-off-by: Sascha Hauer 
Reviewed-by: Dmitry Osipenko 
---

Notes:
Changes since v6:
- Simplify by using devm_clk_get_optional() instead of devm_clk_get()

 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 27 +++--
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 06c9ddef6f362..912181429880a 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -69,7 +69,7 @@ struct rockchip_hdmi {
struct regmap *regmap;
struct rockchip_encoder encoder;
const struct rockchip_hdmi_chip_data *chip_data;
-   struct clk *vpll_clk;
+   struct clk *ref_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
struct phy *phy;
@@ -201,14 +201,15 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi 
*hdmi)
return PTR_ERR(hdmi->regmap);
}
 
-   hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll");
-   if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) {
-   hdmi->vpll_clk = NULL;
-   } else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) {
+   hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "ref");
+   if (!hdmi->ref_clk)
+   hdmi->ref_clk = devm_clk_get_optional(hdmi->dev, "vpll");
+
+   if (PTR_ERR(hdmi->ref_clk) == -EPROBE_DEFER) {
return -EPROBE_DEFER;
-   } else if (IS_ERR(hdmi->vpll_clk)) {
-   DRM_DEV_ERROR(hdmi->dev, "failed to get vpll clock\n");
-   return PTR_ERR(hdmi->vpll_clk);
+   } else if (IS_ERR(hdmi->ref_clk)) {
+   DRM_DEV_ERROR(hdmi->dev, "failed to get reference clock\n");
+   return PTR_ERR(hdmi->ref_clk);
}
 
hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
@@ -262,7 +263,7 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct 
drm_encoder *encoder,
 {
struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
 
-   clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000);
+   clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000);
 }
 
 static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
@@ -542,9 +543,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct 
device *master,
return ret;
}
 
-   ret = clk_prepare_enable(hdmi->vpll_clk);
+   ret = clk_prepare_enable(hdmi->ref_clk);
if (ret) {
-   DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
+   DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference 
clock: %d\n",
  ret);
return ret;
}
@@ -563,7 +564,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct 
device *master,
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
drm_encoder_cleanup(encoder);
-   clk_disable_unprepare(hdmi->vpll_clk);
+   clk_disable_unprepare(hdmi->ref_clk);
}
 
return ret;
@@ -575,7 +576,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, 
struct device *master,
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
 
dw_hdmi_unbind(hdmi->hdmi);
-   clk_disable_unprepare(hdmi->vpll_clk);
+   clk_disable_unprepare(hdmi->ref_clk);
 }
 
 static const struct component_ops dw_hdmi_rockchip_ops = {
-- 
2.30.2



[PATCH v9 08/23] dt-bindings: display: rockchip: dw-hdmi: Add compatible for rk3568 HDMI

2022-03-28 Thread Sascha Hauer
From: Benjamin Gaignard 

Define a new compatible for rk3568 HDMI.
This version of HDMI hardware block needs two new clocks hclk_vio and hclk
to provide phy reference clocks.

Signed-off-by: Benjamin Gaignard 
Reviewed-by: Rob Herring 
Signed-off-by: Sascha Hauer 
---
 .../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml   | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml 
b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
index 0400f67e5f2c9..e6b8437a1e2d1 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -23,6 +23,7 @@ properties:
   - rockchip,rk3288-dw-hdmi
   - rockchip,rk3328-dw-hdmi
   - rockchip,rk3399-dw-hdmi
+  - rockchip,rk3568-dw-hdmi
 
   reg-io-width:
 const: 4
-- 
2.30.2



[PATCH v9 01/23] clk: rk3568: Mark hclk_vo as critical

2022-03-28 Thread Sascha Hauer
Whenever pclk_vo is enabled hclk_vo must be enabled as well. This is
described in the Reference Manual as:

| 2.8.6 NIU Clock gating reliance
|
| A part of niu clocks have a dependence on another niu clock in order to
| sharing the internal bus. When these clocks are in use, another niu
| clock must be opened, and cannot be gated.  These clocks and the special
| clock on which they are relied are as following:
|
| Clocks which have dependency The clock which can not be gated
| -
| ...
| pclk_vo_niu, hclk_vo_s_niu   hclk_vo_niu
| ...

The clock framework doesn't offer a way to enable clock B whenever clock A is
enabled, at least not when B is not an ancestor of A. Workaround this by
marking hclk_vo as critical so it is never disabled. This is suboptimal in
terms of power consumption, but a stop gap solution until the clock framework
has a way to deal with this.

We have this clock tree:

|  aclk_vo  220   3  0 
0  5 Y
| aclk_hdcp 000   3  0 
0  5 N
| pclk_vo   2307500  0 
0  5 Y
|pclk_edp_ctrl  0007500  0 
0  5 N
|pclk_dsitx_1   0007500  0 
0  5 N
|pclk_dsitx_0   1207500  0 
0  5 Y
|pclk_hdmi_host 1207500  0 
0  5 Y
|pclk_hdcp  0007500  0 
0  5 N
| hclk_vo   250   15000  0 
0  5 Y
|hclk_hdcp  000   15000  0 
0  5 N
|hclk_vop   020   15000  0 
0  5 N

Without this patch the edp, dsitx, hdmi and hdcp driver would enable their
clocks which then enables pclk_vo, but hclk_vo stays disabled and register
accesses just hang. hclk_vo is enabled by the VOP2 driver, so reproducibility
of this issue depends on the probe order.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v8:
- new patch

 drivers/clk/rockchip/clk-rk3568.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-rk3568.c 
b/drivers/clk/rockchip/clk-rk3568.c
index 63dfbeeeb06d9..62694d95173ab 100644
--- a/drivers/clk/rockchip/clk-rk3568.c
+++ b/drivers/clk/rockchip/clk-rk3568.c
@@ -1591,6 +1591,7 @@ static const char *const rk3568_cru_critical_clocks[] 
__initconst = {
"hclk_php",
"pclk_php",
"hclk_usb",
+   "hclk_vo",
 };
 
 static const char *const rk3568_pmucru_critical_clocks[] __initconst = {
-- 
2.30.2



[PATCH v9 06/23] arm64: dts: rockchip: rk3399: rename HDMI ref clock to 'ref'

2022-03-28 Thread Sascha Hauer
The reference clock for the HDMI controller has been renamed to 'ref',
the previous 'vpll' name is only left for compatibility in the driver.
Rename the clock to the new name.

Signed-off-by: Sascha Hauer 
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 080457a68e3c7..d0add619b0d22 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1884,7 +1884,7 @@ hdmi: hdmi@ff94 {
 <&cru SCLK_HDMI_CEC>,
 <&cru PCLK_VIO_GRF>,
 <&cru PLL_VPLL>;
-   clock-names = "iahb", "isfr", "cec", "grf", "vpll";
+   clock-names = "iahb", "isfr", "cec", "grf", "ref";
power-domains = <&power RK3399_PD_HDCP>;
reg-io-width = <4>;
rockchip,grf = <&grf>;
-- 
2.30.2



[PATCH v9 16/23] arm64: dts: rockchip: rk356x: Add VOP2 nodes

2022-03-28 Thread Sascha Hauer
The VOP2 is the display output controller on the RK3568. Add the node
for it to the dtsi file along with the required display-subsystem node
and the iommu node.

Signed-off-by: Sascha Hauer 
Acked-by: Rob Herring 
---

Notes:
Changes since v6:
- Change RK3568_ prefix to ROCKCHIP_ prefix
- start counting from one instead of zero

Changes since v4:
- Add Robs Ack

Changes since v3:
- Bring back gamma_lut regs
- Drop redundant _vop suffix from clock names

 arch/arm64/boot/dts/rockchip/rk3566.dtsi |  4 ++
 arch/arm64/boot/dts/rockchip/rk3568.dtsi |  4 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 51 
 include/dt-bindings/soc/rockchip,vop2.h  | 14 +++
 4 files changed, 73 insertions(+)
 create mode 100644 include/dt-bindings/soc/rockchip,vop2.h

diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
index 3839eef5e4f76..595fa2562cb8e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
@@ -18,3 +18,7 @@ power-domain@RK3568_PD_PIPE {
#power-domain-cells = <0>;
};
 };
+
+&vop {
+   compatible = "rockchip,rk3566-vop";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 5b0f528d68180..4deab90e83834 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -114,3 +114,7 @@ power-domain@RK3568_PD_PIPE {
#power-domain-cells = <0>;
};
 };
+
+&vop {
+   compatible = "rockchip,rk3568-vop";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi 
b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 7cdef800cb3ce..fdb7a9a6ca743 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -129,6 +129,11 @@ opp-18 {
};
};
 
+   display_subsystem: display-subsystem {
+   compatible = "rockchip,display-subsystem";
+   ports = <&vop_out>;
+   };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -569,6 +574,52 @@ gmac1_mtl_tx_setup: tx-queues-config {
};
};
 
+   vop: vop@fe04 {
+   reg = <0x0 0xfe04 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
+   reg-names = "regs", "gamma_lut";
+   interrupts = ;
+   clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
+<&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+   clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", 
"dclk_vp2";
+   iommus = <&vop_mmu>;
+   power-domains = <&power RK3568_PD_VO>;
+   rockchip,grf = <&grf>;
+   status = "disabled";
+
+   vop_out: ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   vp0: port@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   vp1: port@1 {
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   vp2: port@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+   };
+
+   vop_mmu: iommu@fe043e00 {
+   compatible = "rockchip,rk3568-iommu";
+   reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
+   interrupts = ;
+   clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+   clock-names = "aclk", "iface";
+   #iommu-cells = <0>;
+   status = "disabled";
+   };
+
qos_gpu: qos@fe128000 {
compatible = "rockchip,rk3568-qos", "syscon";
reg = <0x0 0xfe128000 0x0 0x20>;
diff --git a/include/dt-bindings/soc/rockchip,vop2.h 
b/include/dt-bindings/soc/rockchip,vop2.h
new file mode 100644
index 0..6e66a802b96a5
--- /dev/null
+++ b/include/dt-bindings/soc/rockchip,vop2.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+
+#ifndef __DT_BINDINGS_ROCKCHIP_VOP2_H
+#define __DT_BINDINGS_ROCKCHIP_VOP2_H
+
+#define ROCKCHIP_VOP2_EP_RGB0  1
+#define ROCKCHIP_VOP2_EP_HDMI0 2
+#define ROCKCHIP_VOP2_EP_EDP0  3
+#define ROCKCHIP_VOP2_EP_MIPI0 4
+#define ROCKCHIP_VOP2_EP_LVDS0 5
+#define ROCKCHIP_VOP2_EP_MIPI1 6
+#define ROCKCHIP_VOP2_EP_LVDS1 7
+
+#endif /* __DT_BINDINGS_ROCKCHIP_VOP2_H */
-- 
2.30.2



[PATCH v9 13/23] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always

2022-03-28 Thread Sascha Hauer
From: Douglas Anderson 

Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL.  In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin.  We believe that
lowering the bandwidth like this is safe given sufficient testing.

Signed-off-by: Douglas Anderson 
Signed-off-by: Yakir Yang 
Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v3:
- new patch

 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++--
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 008ab20f39ee6..5be5d1d4963cd 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -180,20 +180,8 @@ static const struct dw_hdmi_mpll_config 
rockchip_mpll_cfg[] = {
 static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
/*  pixelclkbpp8bpp10   bpp12 */
{
-   4000,  { 0x0018, 0x0018, 0x0018 },
-   }, {
-   6500,  { 0x0028, 0x0028, 0x0028 },
-   }, {
-   6600,  { 0x0038, 0x0038, 0x0038 },
-   }, {
-   7425,  { 0x0028, 0x0038, 0x0038 },
-   }, {
-   8350,  { 0x0028, 0x0038, 0x0038 },
-   }, {
-   14625, { 0x0038, 0x0038, 0x0038 },
-   }, {
-   14850, { 0x, 0x0038, 0x0038 },
-   }, {
+   6, { 0x, 0x, 0x },
+   },  {
~0UL,  { 0x, 0x, 0x},
}
 };
-- 
2.30.2



[PATCH v9 19/23] arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a

2022-03-28 Thread Sascha Hauer
From: Michael Riesch 

Enable the RK356x Video Output Processor (VOP) 2 on the Pine64
Quartz64 Model A.

Signed-off-by: Michael Riesch 
Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v5:
- Drop reg property from single endpoint node

Changes since v4:
- Sort nodes alphabetically

Changes since v3:
- Fix HDMI connector type

 .../boot/dts/rockchip/rk3566-quartz64-a.dts   | 47 +++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts 
b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index dd7f4b9b686b8..6504f7ab3ea77 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -4,6 +4,7 @@
 
 #include 
 #include 
+#include 
 #include "rk3566.dtsi"
 
 / {
@@ -35,6 +36,17 @@ fan: gpio_fan {
#cooling-cells = <2>;
};
 
+   hdmi-con {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_in: endpoint {
+   remote-endpoint = <&hdmi_out_con>;
+   };
+   };
+   };
+
leds {
compatible = "gpio-leds";
 
@@ -248,6 +260,24 @@ &gpu {
status = "okay";
 };
 
+&hdmi {
+   avdd-0v9-supply = <&vdda_0v9>;
+   avdd-1v8-supply = <&vcc_1v8>;
+   status = "okay";
+};
+
+&hdmi_in {
+   hdmi_in_vp0: endpoint {
+   remote-endpoint = <&vp0_out_hdmi>;
+   };
+};
+
+&hdmi_out {
+   hdmi_out_con: endpoint {
+   remote-endpoint = <&hdmi_con_in>;
+   };
+};
+
 &i2c0 {
status = "okay";
 
@@ -685,3 +715,20 @@ &usb2phy1_otg {
phy-supply = <&vcc5v0_usb20_host>;
status = "okay";
 };
+
+&vop {
+   assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+   assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+   status = "okay";
+};
+
+&vop_mmu {
+   status = "okay";
+};
+
+&vp0 {
+   vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+   reg = ;
+   remote-endpoint = <&hdmi_in_vp0>;
+   };
+};
-- 
2.30.2



[PATCH v9 15/23] dt-bindings: display: rockchip: dw-hdmi: Make unwedge pinctrl optional

2022-03-28 Thread Sascha Hauer
None of the upstream device tree files has a "unwedge" pinctrl
specified. Make it optional.

Signed-off-by: Sascha Hauer 
Acked-by: Rob Herring 
---

Notes:
Changes since v4:
- Add Robs Ack

 .../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml   | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml 
b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
index 38ebb69830287..d7cb2b2be60e8 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -89,6 +89,7 @@ properties:
   The unwedge pinctrl entry shall drive the DDC SDA line low. This is
   intended to work around a hardware errata that can cause the DDC I2C
   bus to be wedged.
+minItems: 1
 items:
   - const: default
   - const: unwedge
-- 
2.30.2



[PATCH v9 03/23] drm/rockchip: Add crtc_endpoint_id to rockchip_encoder

2022-03-28 Thread Sascha Hauer
The VOP2 has an interface mux which decides to which encoder(s) a CRTC
is routed to. The encoders and CRTCs are connected via of_graphs in the
device tree. When given an encoder the VOP2 driver needs to know to
which internal register setting this encoder matches. For this the VOP2
binding offers different endpoints, one for each possible encoder. The
endpoint ids of these endpoints are used as a key from an encoders
device tree description to the internal register setting.

This patch adds the key aka endpoint id to struct rockchip_encoder plus
a function to read the endpoint id starting from the encoders device
node.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v6:
- new patch

 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 33 +
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h |  4 ++-
 2 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index ac190e2b1f7aa..214214190fef1 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -236,6 +236,39 @@ static const struct dev_pm_ops rockchip_drm_pm_ops = {
 static struct platform_driver *rockchip_sub_drivers[MAX_ROCKCHIP_SUB_DRIVERS];
 static int num_rockchip_sub_drivers;
 
+/*
+ * Get the endpoint id of the remote endpoint of the given encoder. This
+ * information is used by the VOP2 driver to identify the encoder.
+ *
+ * @rkencoder: The encoder to get the remote endpoint id from
+ * @np: The encoder device node
+ * @port: The number of the port leading to the VOP2
+ * @reg: The endpoint number leading to the VOP2
+ */
+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder 
*rkencoder,
+ struct device_node *np, int port, 
int reg)
+{
+   struct of_endpoint ep;
+   struct device_node *en, *ren;
+   int ret;
+
+   en = of_graph_get_endpoint_by_regs(np, port, reg);
+   if (!en)
+   return -ENOENT;
+
+   ren = of_graph_get_remote_endpoint(en);
+   if (!ren)
+   return -ENOENT;
+
+   ret = of_graph_parse_endpoint(ren, &ep);
+   if (ret)
+   return ret;
+
+   rkencoder->crtc_endpoint_id = ep.id;
+
+   return 0;
+}
+
 /*
  * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
  * Should be called from the component bind stage of the drivers
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 686f687a76a37..1f66a447acada 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -49,6 +49,7 @@ struct rockchip_drm_private {
 };
 
 struct rockchip_encoder {
+   int crtc_endpoint_id;
struct drm_encoder encoder;
 };
 
@@ -57,7 +58,8 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
 void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
struct device *dev);
 int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
-
+int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder 
*rencoder,
+ struct device_node *np, int port, 
int reg);
 int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
 extern struct platform_driver cdn_dp_driver;
 extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
-- 
2.30.2



[PATCH v9 12/23] drm/rockchip: dw_hdmi: drop mode_valid hook

2022-03-28 Thread Sascha Hauer
The driver checks if the pixel clock of the given mode matches an entry
in the mpll config table. The frequencies in the mpll table are meant as
a frequency range up to which the entry works, not as a frequency that
must match the pixel clock. The downstream Kernel also does not have
this check, so drop it to allow for more display resolutions.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v3:
- new patch

 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 25 -
 1 file changed, 25 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index cb43e7b47157d..008ab20f39ee6 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -248,26 +248,6 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi 
*hdmi)
return 0;
 }
 
-static enum drm_mode_status
-dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data,
-   const struct drm_display_info *info,
-   const struct drm_display_mode *mode)
-{
-   const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
-   int pclk = mode->clock * 1000;
-   bool valid = false;
-   int i;
-
-   for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
-   if (pclk == mpll_cfg[i].mpixelclock) {
-   valid = true;
-   break;
-   }
-   }
-
-   return (valid) ? MODE_OK : MODE_BAD;
-}
-
 static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder)
 {
 }
@@ -433,7 +413,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = {
 };
 
 static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
-   .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -450,7 +429,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
 };
 
 static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
-   .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg   = rockchip_mpll_cfg,
.cur_ctr= rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -470,7 +448,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = {
 };
 
 static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
-   .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -488,7 +465,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
 };
 
 static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
-   .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg   = rockchip_mpll_cfg,
.cur_ctr= rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -501,7 +477,6 @@ static struct rockchip_hdmi_chip_data rk3568_chip_data = {
 };
 
 static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
-   .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg   = rockchip_mpll_cfg,
.cur_ctr= rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
-- 
2.30.2



[PATCH v9 07/23] drm/rockchip: dw_hdmi: add rk3568 support

2022-03-28 Thread Sascha Hauer
Add a new dw_hdmi_plat_data struct and new compatible for rk3568.

Signed-off-by: Benjamin Gaignard 
Signed-off-by: Sascha Hauer 
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 912181429880a..b64cc62c7b5af 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -50,6 +50,10 @@
 #define RK3399_GRF_SOC_CON20   0x6250
 #define RK3399_HDMI_LCDC_SEL   BIT(6)
 
+#define RK3568_GRF_VO_CON1 0x0364
+#define RK3568_HDMI_SDAIN_MSK  BIT(15)
+#define RK3568_HDMI_SCLIN_MSK  BIT(14)
+
 #define HIWORD_UPDATE(val, mask)   (val | (mask) << 16)
 
 /**
@@ -473,6 +477,19 @@ static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data 
= {
.use_drm_infoframe = true,
 };
 
+static struct rockchip_hdmi_chip_data rk3568_chip_data = {
+   .lcdsel_grf_reg = -1,
+};
+
+static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
+   .mode_valid = dw_hdmi_rockchip_mode_valid,
+   .mpll_cfg   = rockchip_mpll_cfg,
+   .cur_ctr= rockchip_cur_ctr,
+   .phy_config = rockchip_phy_config,
+   .phy_data = &rk3568_chip_data,
+   .use_drm_infoframe = true,
+};
+
 static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
{ .compatible = "rockchip,rk3228-dw-hdmi",
  .data = &rk3228_hdmi_drv_data
@@ -486,6 +503,9 @@ static const struct of_device_id dw_hdmi_rockchip_dt_ids[] 
= {
{ .compatible = "rockchip,rk3399-dw-hdmi",
  .data = &rk3399_hdmi_drv_data
},
+   { .compatible = "rockchip,rk3568-dw-hdmi",
+ .data = &rk3568_hdmi_drv_data
+   },
{},
 };
 MODULE_DEVICE_TABLE(of, dw_hdmi_rockchip_dt_ids);
@@ -520,6 +540,9 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct 
device *master,
encoder = &hdmi->encoder.encoder;
 
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
+   rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
+ dev->of_node, 0, 0);
+
/*
 * If we failed to find the CRTC(s) which this encoder is
 * supposed to be connected to, it's because the CRTC has
@@ -550,6 +573,14 @@ static int dw_hdmi_rockchip_bind(struct device *dev, 
struct device *master,
return ret;
}
 
+   if (hdmi->chip_data == &rk3568_chip_data) {
+   regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
+HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK |
+  RK3568_HDMI_SCLIN_MSK,
+  RK3568_HDMI_SDAIN_MSK |
+  RK3568_HDMI_SCLIN_MSK));
+   }
+
drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);
drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
 
-- 
2.30.2



[PATCH v9 17/23] arm64: dts: rockchip: rk356x: Add HDMI nodes

2022-03-28 Thread Sascha Hauer
Add support for the HDMI port found on RK3568.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v7:
- Rename hclk to niu

Changes since v5:
- Drop unnecessary #size-cells/#address-cells from nodes with only single 
endpoint

 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi 
b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index fdb7a9a6ca743..1a359bbf65300 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -620,6 +620,38 @@ vop_mmu: iommu@fe043e00 {
status = "disabled";
};
 
+   hdmi: hdmi@fe0a {
+   compatible = "rockchip,rk3568-dw-hdmi";
+   reg = <0x0 0xfe0a 0x0 0x2>;
+   interrupts = ;
+   clocks = <&cru PCLK_HDMI_HOST>,
+<&cru CLK_HDMI_SFR>,
+<&cru CLK_HDMI_CEC>,
+<&pmucru CLK_HDMI_REF>,
+<&cru HCLK_VO>;
+   clock-names = "iahb", "isfr", "cec", "ref";
+   pinctrl-names = "default";
+   pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
+   power-domains = <&power RK3568_PD_VO>;
+   reg-io-width = <4>;
+   rockchip,grf = <&grf>;
+   #sound-dai-cells = <0>;
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   hdmi_in: port@0 {
+   reg = <0>;
+   };
+
+   hdmi_out: port@1 {
+   reg = <1>;
+   };
+   };
+   };
+
qos_gpu: qos@fe128000 {
compatible = "rockchip,rk3568-qos", "syscon";
reg = <0x0 0xfe128000 0x0 0x20>;
-- 
2.30.2



[PATCH v9 02/23] drm/rockchip: Embed drm_encoder into rockchip_decoder

2022-03-28 Thread Sascha Hauer
The VOP2 driver needs rockchip specific information for a drm_encoder.

This patch creates a struct rockchip_encoder with a struct drm_encoder
embedded in it. This is used throughout the rockchip driver instead of
struct drm_encoder directly.

The information the VOP2 drivers needs is the of_graph endpoint node
of the encoder. To ease bisectability this is added here.

While at it convert the different encoder-to-driverdata macros to
static inline functions in order to gain type safety and readability.

Signed-off-by: Sascha Hauer 
---

Notes:
Changes since v5:
- new patch

 .../gpu/drm/rockchip/analogix_dp-rockchip.c   | 32 +++--
 drivers/gpu/drm/rockchip/cdn-dp-core.c| 18 ++
 drivers/gpu/drm/rockchip/cdn-dp-core.h|  2 +-
 .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c   | 17 ++
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c   | 11 --
 drivers/gpu/drm/rockchip/inno_hdmi.c  | 32 +++--
 drivers/gpu/drm/rockchip/rk3066_hdmi.c| 34 ---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.h   | 10 ++
 drivers/gpu/drm/rockchip/rockchip_lvds.c  | 26 --
 9 files changed, 122 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index c82901d9a9ccd..28fcc8efa33db 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -40,8 +40,6 @@
 
 #define PSR_WAIT_LINE_FLAG_TIMEOUT_MS  100
 
-#define to_dp(nm)  container_of(nm, struct rockchip_dp_device, nm)
-
 /**
  * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
  * @lcdsel_grf_reg: grf register offset of lcdc select
@@ -59,7 +57,7 @@ struct rockchip_dp_chip_data {
 struct rockchip_dp_device {
struct drm_device*drm_dev;
struct device*dev;
-   struct drm_encoder   encoder;
+   struct rockchip_encoder  encoder;
struct drm_display_mode  mode;
 
struct clk   *pclk;
@@ -73,6 +71,18 @@ struct rockchip_dp_device {
struct analogix_dp_plat_data plat_data;
 };
 
+static struct rockchip_dp_device *encoder_to_dp(struct drm_encoder *encoder)
+{
+   struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
+
+   return container_of(rkencoder, struct rockchip_dp_device, encoder);
+}
+
+static struct rockchip_dp_device *pdata_encoder_to_dp(struct 
analogix_dp_plat_data *plat_data)
+{
+   return container_of(plat_data, struct rockchip_dp_device, plat_data);
+}
+
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
 {
reset_control_assert(dp->rst);
@@ -84,7 +94,7 @@ static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
 
 static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
 {
-   struct rockchip_dp_device *dp = to_dp(plat_data);
+   struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
int ret;
 
ret = clk_prepare_enable(dp->pclk);
@@ -105,7 +115,7 @@ static int rockchip_dp_poweron_start(struct 
analogix_dp_plat_data *plat_data)
 
 static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
 {
-   struct rockchip_dp_device *dp = to_dp(plat_data);
+   struct rockchip_dp_device *dp = pdata_encoder_to_dp(plat_data);
 
clk_disable_unprepare(dp->pclk);
 
@@ -166,7 +176,7 @@ struct drm_crtc *rockchip_dp_drm_get_new_crtc(struct 
drm_encoder *encoder,
 static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
   struct drm_atomic_state *state)
 {
-   struct rockchip_dp_device *dp = to_dp(encoder);
+   struct rockchip_dp_device *dp = encoder_to_dp(encoder);
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state;
int ret;
@@ -208,7 +218,7 @@ static void rockchip_dp_drm_encoder_enable(struct 
drm_encoder *encoder,
 static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
 {
-   struct rockchip_dp_device *dp = to_dp(encoder);
+   struct rockchip_dp_device *dp = encoder_to_dp(encoder);
struct drm_crtc *crtc;
struct drm_crtc_state *new_crtc_state = NULL;
int ret;
@@ -297,7 +307,7 @@ static int rockchip_dp_of_probe(struct rockchip_dp_device 
*dp)
 
 static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
 {
-   struct drm_encoder *encoder = &dp->encoder;
+   struct drm_encoder *encoder = &dp->encoder.encoder;
struct drm_device *drm_dev = dp->drm_dev;
struct device *dev = dp->dev;
int ret;
@@ -333,7 +343,7 @@ static int rockchip_dp_bind(struct device *dev, struct 
device *master,
return ret;
}
 
-   dp->plat_data.encoder = &dp->encoder;
+   dp->plat_data.encoder = &dp->encoder.encoder;
 
ret = analogix_dp_bind

[PATCH v9 22/23] dt-bindings: display: rockchip: Add binding for VOP2

2022-03-28 Thread Sascha Hauer
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566.
The binding differs slightly from the existing VOP binding, so add a new
binding file for it.

Signed-off-by: Sascha Hauer 
Reviewed-by: Rob Herring 
---

Notes:
Changes since v5:
- Add Robs Reviewed-by:

Changes since v4:
- Fix clk names in example
- Drop unnecessary assigned-clocks, assigned-clock-rates and 
assigned-clock-parents

Changes since v3:
- drop redundant _vop suffix from clock names

Changes since v3:
- new patch

 .../display/rockchip/rockchip-vop2.yaml   | 140 ++
 1 file changed, 140 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml 
b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
new file mode 100644
index 0..655d9b327f7d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SoC display controller (VOP2)
+
+description:
+  VOP2 (Video Output Processor v2) is the display controller for the Rockchip
+  series of SoCs which transfers the image data from a video memory
+  buffer to an external LCD interface.
+
+maintainers:
+  - Sandy Huang 
+  - Heiko Stuebner 
+
+properties:
+  compatible:
+enum:
+  - rockchip,rk3566-vop
+  - rockchip,rk3568-vop
+
+  reg:
+minItems: 1
+items:
+  - description:
+  Must contain one entry corresponding to the base address and length
+  of the register space.
+  - description:
+  Can optionally contain a second entry corresponding to
+  the CRTC gamma LUT address.
+
+  interrupts:
+maxItems: 1
+description:
+  The VOP interrupt is shared by several interrupt sources, such as
+  frame start (VSYNC), line flag and other status interrupts.
+
+  clocks:
+items:
+  - description: Clock for ddr buffer transfer.
+  - description: Clock for the ahb bus to R/W the phy regs.
+  - description: Pixel clock for video port 0.
+  - description: Pixel clock for video port 1.
+  - description: Pixel clock for video port 2.
+
+  clock-names:
+items:
+  - const: aclk
+  - const: hclk
+  - const: dclk_vp0
+  - const: dclk_vp1
+  - const: dclk_vp2
+
+  rockchip,grf:
+$ref: /schemas/types.yaml#/definitions/phandle
+description:
+  Phandle to GRF regs used for misc control
+
+  ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+  port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+  Output endpoint of VP0
+
+  port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+  Output endpoint of VP1
+
+  port@2:
+$ref: /schemas/graph.yaml#/properties/port
+description:
+  Output endpoint of VP2
+
+  iommus:
+maxItems: 1
+
+  power-domains:
+maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+#include 
+#include 
+bus {
+#address-cells = <2>;
+#size-cells = <2>;
+vop: vop@fe04 {
+compatible = "rockchip,rk3568-vop";
+reg = <0x0 0xfe04 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
+interrupts = ;
+clocks = <&cru ACLK_VOP>,
+ <&cru HCLK_VOP>,
+ <&cru DCLK_VOP0>,
+ <&cru DCLK_VOP1>,
+ <&cru DCLK_VOP2>;
+clock-names = "aclk",
+  "hclk",
+  "dclk_vp0",
+  "dclk_vp1",
+  "dclk_vp2";
+power-domains = <&power RK3568_PD_VO>;
+iommus = <&vop_mmu>;
+vop_out: ports {
+#address-cells = <1>;
+#size-cells = <0>;
+vp0: port@0 {
+reg = <0>;
+#address-cells = <1>;
+#size-cells = <0>;
+};
+vp1: port@1 {
+reg = <1>;
+#address-cells = <1>;
+#size-cells = <0>;
+};
+vp2: port@2 {
+reg = <2>;
+#address-cells = <1>;
+#size-cells = <0>;
+};
+};
+};
+   

[PATCH v9 09/23] drm/rockchip: dw_hdmi: add regulator support

2022-03-28 Thread Sascha Hauer
The RK3568 has HDMI_TX_AVDD0V9 and HDMI_TX_AVDD_1V8 supply inputs needed
for the HDMI port. add support for these to the driver for boards which
have them supplied by switchable regulators.

Signed-off-by: Sascha Hauer 
Reviewed-by: Dmitry Osipenko 
---
 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 41 +++--
 1 file changed, 38 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 
b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index b64cc62c7b5af..fe4f9556239ac 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -76,6 +77,8 @@ struct rockchip_hdmi {
struct clk *ref_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
+   struct regulator *avdd_0v9;
+   struct regulator *avdd_1v8;
struct phy *phy;
 };
 
@@ -226,6 +229,14 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi 
*hdmi)
return PTR_ERR(hdmi->grf_clk);
}
 
+   hdmi->avdd_0v9 = devm_regulator_get(hdmi->dev, "avdd-0v9");
+   if (IS_ERR(hdmi->avdd_0v9))
+   return PTR_ERR(hdmi->avdd_0v9);
+
+   hdmi->avdd_1v8 = devm_regulator_get(hdmi->dev, "avdd-1v8");
+   if (IS_ERR(hdmi->avdd_1v8))
+   return PTR_ERR(hdmi->avdd_1v8);
+
return 0;
 }
 
@@ -566,11 +577,23 @@ static int dw_hdmi_rockchip_bind(struct device *dev, 
struct device *master,
return ret;
}
 
+   ret = regulator_enable(hdmi->avdd_0v9);
+   if (ret) {
+   DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd0v9: %d\n", ret);
+   goto err_avdd_0v9;
+   }
+
+   ret = regulator_enable(hdmi->avdd_1v8);
+   if (ret) {
+   DRM_DEV_ERROR(hdmi->dev, "failed to enable avdd1v8: %d\n", ret);
+   goto err_avdd_1v8;
+   }
+
ret = clk_prepare_enable(hdmi->ref_clk);
if (ret) {
DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI reference 
clock: %d\n",
  ret);
-   return ret;
+   goto err_clk;
}
 
if (hdmi->chip_data == &rk3568_chip_data) {
@@ -594,10 +617,19 @@ static int dw_hdmi_rockchip_bind(struct device *dev, 
struct device *master,
 */
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
-   drm_encoder_cleanup(encoder);
-   clk_disable_unprepare(hdmi->ref_clk);
+   goto err_bind;
}
 
+   return 0;
+
+err_bind:
+   clk_disable_unprepare(hdmi->ref_clk);
+   drm_encoder_cleanup(encoder);
+err_clk:
+   regulator_disable(hdmi->avdd_1v8);
+err_avdd_1v8:
+   regulator_disable(hdmi->avdd_0v9);
+err_avdd_0v9:
return ret;
 }
 
@@ -608,6 +640,9 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, 
struct device *master,
 
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->ref_clk);
+
+   regulator_disable(hdmi->avdd_1v8);
+   regulator_disable(hdmi->avdd_0v9);
 }
 
 static const struct component_ops dw_hdmi_rockchip_ops = {
-- 
2.30.2



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