[PATCH] drm/msm/dpu: removed logically dead code
Fixed coverity warning by removing the dead code
Addresses-Coverity: 1494147 ("Logically dead code")
Signed-off-by: Ameer Hamza
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 185379b18572..75f0c0cee661 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -751,8 +751,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init(
fail:
DPU_ERROR("failed to create encoder\n");
- if (phys_enc)
- dpu_encoder_phys_vid_destroy(phys_enc);
return ERR_PTR(ret);
}
--
2.25.1
[PATCH v2] drm/msm/dpu: removed logically dead code
Fixed coverity warning by removing the dead code
Addresses-Coverity: 1494147 ("Logically dead code")
Signed-off-by: Ameer Hamza
---
Changes in v2:
removed the 'fail' part completely by moving DPU_ERROR and return statement in
place of corresponding goto statements.
---
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c| 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 185379b18572..ddd9d89cd456 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -698,17 +698,17 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init(
{
struct dpu_encoder_phys *phys_enc = NULL;
struct dpu_encoder_irq *irq;
- int i, ret = 0;
+ int i;
if (!p) {
- ret = -EINVAL;
- goto fail;
+ DPU_ERROR("failed to create encoder due to invalid
parameter\n");
+ return ERR_PTR(-EINVAL);
}
phys_enc = kzalloc(sizeof(*phys_enc), GFP_KERNEL);
if (!phys_enc) {
- ret = -ENOMEM;
- goto fail;
+ DPU_ERROR("failed to create encoder due to memory allocation
error\n");
+ return ERR_PTR(-ENOMEM);
}
phys_enc->hw_mdptop = p->dpu_kms->hw_mdp;
@@ -748,11 +748,4 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init(
DPU_DEBUG_VIDENC(phys_enc, "created intf idx:%d\n", p->intf_idx);
return phys_enc;
-
-fail:
- DPU_ERROR("failed to create encoder\n");
- if (phys_enc)
- dpu_encoder_phys_vid_destroy(phys_enc);
-
- return ERR_PTR(ret);
}
--
2.25.1
Re: [PATCH bpf v2] treewide: add missing includes masked by cgroup -> bpf dependency
On Thu, Dec 2, 2021 at 11:11 PM Greg KH wrote: > > On Thu, Dec 02, 2021 at 12:34:00PM -0800, Jakub Kicinski wrote: > > cgroup.h (therefore swap.h, therefore half of the universe) > > includes bpf.h which in turn includes module.h and slab.h. > > Since we're about to get rid of that dependency we need > > to clean things up. > > > > v2: drop the cpu.h include from cacheinfo.h, it's not necessary > > and it makes riscv sensitive to ordering of include files. > > > > Link: https://lore.kernel.org/all/20211120035253.72074-1-k...@kernel.org/ > > # v1 > > Link: https://lore.kernel.org/all/20211120165528.197359-1-k...@kernel.org/ > > # cacheinfo discussion > > Acked-by: Krzysztof Wilczyński > > Acked-by: Peter Chen > > Acked-by: SeongJae Park > > Acked-by: Jani Nikula > > Signed-off-by: Jakub Kicinski > > Acked-by: Greg Kroah-Hartman I'm not sure how to test that it helps to reduce build deps, but it builds and passes tests, so applied to bpf tree. Jakub, you'll soon get it back via bpf tree PR :)
[PATCH 8/9] drm/i915/gvt: Constify gtt_type_table_entry
It is never modified, so make it const to allow the compiler to put it
in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/gtt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index c8cd6bf28ea8..614156856f16 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -185,7 +185,7 @@ struct gtt_type_table_entry {
.pse_entry_type = pse_type, \
}
-static struct gtt_type_table_entry gtt_type_table[] = {
+static const struct gtt_type_table_entry gtt_type_table[] = {
GTT_TYPE_TABLE_ENTRY(GTT_TYPE_PPGTT_ROOT_L4_ENTRY,
GTT_TYPE_PPGTT_ROOT_L4_ENTRY,
GTT_TYPE_INVALID,
--
2.34.1
[PATCH 5/9] drm/i915/gvt: Constify gvt_mmio_block
These are never modified, so make them const to allow the compiler to
put it in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/gvt.h | 2 +-
drivers/gpu/drm/i915/gvt/handlers.c | 12 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 0c0615602343..0ebffc327528 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -272,7 +272,7 @@ struct intel_gvt_mmio {
/* Value of command write of this reg needs to be patched */
#define F_CMD_WRITE_PATCH (1 << 8)
- struct gvt_mmio_block *mmio_block;
+ const struct gvt_mmio_block *mmio_block;
unsigned int num_mmio_block;
DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index cde0a477fb49..5e85a77da257 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3627,11 +3627,11 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
return 0;
}
-static struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
- unsigned int offset)
+static const struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
+ unsigned int offset)
{
unsigned long device = intel_gvt_get_device_type(gvt);
- struct gvt_mmio_block *block = gvt->mmio.mmio_block;
+ const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
int num = gvt->mmio.num_mmio_block;
int i;
@@ -3670,7 +3670,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt)
* accessible (should have no F_CMD_ACCESS flag).
* otherwise, need to update cmd_reg_handler in cmd_parser.c
*/
-static struct gvt_mmio_block mmio_blocks[] = {
+static const struct gvt_mmio_block mmio_blocks[] = {
{D_SKL_PLUS, _MMIO(DMC_MMIO_START_RANGE), 0x3000, NULL, NULL},
{D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x4, NULL, NULL},
{D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE,
@@ -3753,7 +3753,7 @@ int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt,
int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
void *data)
{
- struct gvt_mmio_block *block = gvt->mmio.mmio_block;
+ const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
struct intel_gvt_mmio_info *e;
int i, j, ret;
@@ -3871,7 +3871,7 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu,
unsigned int offset,
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
struct intel_gvt *gvt = vgpu->gvt;
struct intel_gvt_mmio_info *mmio_info;
- struct gvt_mmio_block *mmio_block;
+ const struct gvt_mmio_block *mmio_block;
gvt_mmio_func func;
int ret;
--
2.34.1
[PATCH 2/9] drm/i915/gvt: Constify intel_gvt_gtt_pte_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/gtt.c | 62 +-
drivers/gpu/drm/i915/gvt/gtt.h | 2 +-
2 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 6efa48727052..c8cd6bf28ea8 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -499,7 +499,7 @@ DEFINE_PPGTT_GMA_TO_INDEX(gen8, l3_pdp, (gma >> 30 & 0x3));
DEFINE_PPGTT_GMA_TO_INDEX(gen8, l4_pdp, (gma >> 30 & 0x1ff));
DEFINE_PPGTT_GMA_TO_INDEX(gen8, pml4, (gma >> 39 & 0x1ff));
-static struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {
+static const struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {
.get_entry = gtt_get_entry64,
.set_entry = gtt_set_entry64,
.clear_present = gtt_entry_clear_present,
@@ -526,7 +526,7 @@ static const struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops
= {
};
/* Update entry type per pse and ips bit. */
-static void update_entry_type_for_real(struct intel_gvt_gtt_pte_ops *pte_ops,
+static void update_entry_type_for_real(const struct intel_gvt_gtt_pte_ops
*pte_ops,
struct intel_gvt_gtt_entry *entry, bool ips)
{
switch (entry->type) {
@@ -553,7 +553,7 @@ static void _ppgtt_get_root_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index,
bool guest)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
GEM_BUG_ON(mm->type != INTEL_GVT_MM_PPGTT);
@@ -580,7 +580,7 @@ static void _ppgtt_set_root_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index,
bool guest)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
pte_ops->set_entry(guest ? mm->ppgtt_mm.guest_pdps :
mm->ppgtt_mm.shadow_pdps,
@@ -596,7 +596,7 @@ static inline void ppgtt_set_shadow_root_entry(struct
intel_vgpu_mm *mm,
static void ggtt_get_guest_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -608,7 +608,7 @@ static void ggtt_get_guest_entry(struct intel_vgpu_mm *mm,
static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -619,7 +619,7 @@ static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm,
static void ggtt_get_host_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -629,7 +629,7 @@ static void ggtt_get_host_entry(struct intel_vgpu_mm *mm,
static void ggtt_set_host_entry(struct intel_vgpu_mm *mm,
struct intel_gvt_gtt_entry *entry, unsigned long index)
{
- struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *pte_ops =
mm->vgpu->gvt->gtt.pte_ops;
unsigned long offset = index;
GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -655,7 +655,7 @@ static inline int ppgtt_spt_get_entry(
bool guest)
{
struct intel_gvt *gvt = spt->vgpu->gvt;
- struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
int ret;
e->type = get_entry_type(type);
@@ -684,7 +684,7 @@ static inline int ppgtt_spt_set_entry(
bool guest)
{
struct intel_gvt *gvt = spt->vgpu->gvt;
- struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))
return -EINVAL;
@@ -947,7 +947,7 @@ static int ppgtt_invalidate_spt_by_shadow_entry(struct
intel_vgpu *vgpu,
struct intel_gvt_gtt_entry *e)
{
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
- struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
+ const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
[PATCH 1/9] drm/i915/gvt: Constify intel_gvt_gtt_pte_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/gtt.c | 4 ++--
drivers/gpu/drm/i915/gvt/gtt.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 53d0cb327539..6efa48727052 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -516,7 +516,7 @@ static struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {
.set_pfn = gen8_gtt_set_pfn,
};
-static struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {
+static const struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {
.gma_to_ggtt_pte_index = gma_to_ggtt_pte_index,
.gma_to_pte_index = gen8_gma_to_pte_index,
.gma_to_pde_index = gen8_gma_to_pde_index,
@@ -2097,7 +2097,7 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm
*mm, unsigned long gma)
struct intel_vgpu *vgpu = mm->vgpu;
struct intel_gvt *gvt = vgpu->gvt;
struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops;
- struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;
+ const struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;
unsigned long gpa = INTEL_GVT_INVALID_ADDR;
unsigned long gma_index[4];
struct intel_gvt_gtt_entry e;
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 3bf45672ef98..d0d598322404 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -92,7 +92,7 @@ struct intel_gvt_gtt_gma_ops {
struct intel_gvt_gtt {
struct intel_gvt_gtt_pte_ops *pte_ops;
- struct intel_gvt_gtt_gma_ops *gma_ops;
+ const struct intel_gvt_gtt_gma_ops *gma_ops;
int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm);
void (*mm_free_page_table)(struct intel_vgpu_mm *mm);
struct list_head oos_page_use_list_head;
--
2.34.1
[PATCH 9/9] drm/i915/gvt: Constify vgpu_types
It is never modified, so make it const to allow the compiler to put it
in read-only memory. While at it, make name a const char*.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/vgpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index fa6b92615799..80a940a1 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -77,7 +77,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
#define VGPU_WEIGHT(vgpu_num) \
(VGPU_MAX_WEIGHT / (vgpu_num))
-static struct {
+static const struct {
unsigned int low_mm;
unsigned int high_mm;
unsigned int fence;
@@ -88,7 +88,7 @@ static struct {
*/
unsigned int weight;
enum intel_vgpu_edid edid;
- char *name;
+ const char *name;
} vgpu_types[] = {
/* Fixed vGPU type table */
{ MB_TO_BYTES(64), MB_TO_BYTES(384), 4, VGPU_WEIGHT(8),
GVT_EDID_1024_768, "8" },
--
2.34.1
[PATCH 0/9] drm/i915/gvt: Constify static structs
Constify a number of static structs that are never modified to allow the compiler to put them in read-only memory. In order to do this, constify a number of local variables and pointers in structs. This is most important for structs that contain function pointers, and the patches for those structs are placed first in the series. Rikard Falkeborn (9): drm/i915/gvt: Constify intel_gvt_gtt_pte_ops drm/i915/gvt: Constify intel_gvt_gtt_pte_ops drm/i915/gvt: Constify intel_gvt_irq_ops drm/i915/gvt: Constify intel_gvt_sched_policy_ops drm/i915/gvt: Constify gvt_mmio_block drm/i915/gvt: Constify cmd_interrupt_events drm/i915/gvt: Constify formats drm/i915/gvt: Constify gtt_type_table_entry drm/i915/gvt: Constify vgpu_types drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +- drivers/gpu/drm/i915/gvt/fb_decoder.c | 24 - drivers/gpu/drm/i915/gvt/gtt.c | 68 - drivers/gpu/drm/i915/gvt/gtt.h | 4 +- drivers/gpu/drm/i915/gvt/gvt.h | 2 +- drivers/gpu/drm/i915/gvt/handlers.c | 12 ++--- drivers/gpu/drm/i915/gvt/interrupt.c| 10 ++-- drivers/gpu/drm/i915/gvt/interrupt.h| 2 +- drivers/gpu/drm/i915/gvt/sched_policy.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.h| 2 +- drivers/gpu/drm/i915/gvt/vgpu.c | 4 +- 11 files changed, 66 insertions(+), 66 deletions(-) -- 2.34.1
[PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/interrupt.c | 10 +-
drivers/gpu/drm/i915/gvt/interrupt.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c
b/drivers/gpu/drm/i915/gvt/interrupt.c
index 614b951d919f..9ccc6b1ecc28 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.c
+++ b/drivers/gpu/drm/i915/gvt/interrupt.c
@@ -176,7 +176,7 @@ int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
unsigned int reg, void *p_data, unsigned int bytes)
{
struct intel_gvt *gvt = vgpu->gvt;
- struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+ const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
u32 imr = *(u32 *)p_data;
trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
@@ -206,7 +206,7 @@ int intel_vgpu_reg_master_irq_handler(struct intel_vgpu
*vgpu,
unsigned int reg, void *p_data, unsigned int bytes)
{
struct intel_gvt *gvt = vgpu->gvt;
- struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+ const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
u32 ier = *(u32 *)p_data;
u32 virtual_ier = vgpu_vreg(vgpu, reg);
@@ -246,7 +246,7 @@ int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
{
struct intel_gvt *gvt = vgpu->gvt;
struct drm_i915_private *i915 = gvt->gt->i915;
- struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+ const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
struct intel_gvt_irq_info *info;
u32 ier = *(u32 *)p_data;
@@ -604,7 +604,7 @@ static void gen8_init_irq(
SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
}
-static struct intel_gvt_irq_ops gen8_irq_ops = {
+static const struct intel_gvt_irq_ops gen8_irq_ops = {
.init_irq = gen8_init_irq,
.check_pending_irq = gen8_check_pending_irq,
};
@@ -626,7 +626,7 @@ void intel_vgpu_trigger_virtual_event(struct intel_vgpu
*vgpu,
struct intel_gvt *gvt = vgpu->gvt;
struct intel_gvt_irq *irq = &gvt->irq;
gvt_event_virt_handler_t handler;
- struct intel_gvt_irq_ops *ops = gvt->irq.ops;
+ const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
handler = get_event_virt_handler(irq, event);
drm_WARN_ON(&i915->drm, !handler);
diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h
b/drivers/gpu/drm/i915/gvt/interrupt.h
index 6c47d3e33161..0989e180ed54 100644
--- a/drivers/gpu/drm/i915/gvt/interrupt.h
+++ b/drivers/gpu/drm/i915/gvt/interrupt.h
@@ -203,7 +203,7 @@ struct intel_gvt_irq_map {
/* structure containing device specific IRQ state */
struct intel_gvt_irq {
- struct intel_gvt_irq_ops *ops;
+ const struct intel_gvt_irq_ops *ops;
struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];
--
2.34.1
[PATCH 4/9] drm/i915/gvt: Constify intel_gvt_sched_policy_ops
These are never modified, so make them const to allow the compiler to
put them in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/sched_policy.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c
b/drivers/gpu/drm/i915/gvt/sched_policy.c
index 036b74fe9298..c077fb4674f0 100644
--- a/drivers/gpu/drm/i915/gvt/sched_policy.c
+++ b/drivers/gpu/drm/i915/gvt/sched_policy.c
@@ -368,7 +368,7 @@ static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
vgpu_data->active = false;
}
-static struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
+static const struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
.init = tbs_sched_init,
.clean = tbs_sched_clean,
.init_vgpu = tbs_sched_init_vgpu,
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.h
b/drivers/gpu/drm/i915/gvt/scheduler.h
index 7c86984a842f..1f391b3da2cc 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.h
+++ b/drivers/gpu/drm/i915/gvt/scheduler.h
@@ -56,7 +56,7 @@ struct intel_gvt_workload_scheduler {
wait_queue_head_t waitq[I915_NUM_ENGINES];
void *sched_data;
- struct intel_gvt_sched_policy_ops *sched_ops;
+ const struct intel_gvt_sched_policy_ops *sched_ops;
};
#define INDIRECT_CTX_ADDR_MASK 0xffc0
--
2.34.1
[PATCH v4 09/22] ASoC: tegra20: spdif: Use more resource-managed helpers
Use resource-managed helpers to make code cleaner. Driver's remove callback
isn't needed anymore since driver is completely resource-managed now.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 33 +
sound/soc/tegra/tegra_pcm.c | 6 ++
sound/soc/tegra/tegra_pcm.h | 1 +
3 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index d5c618611dbb..7dd263721c2c 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -289,38 +289,24 @@ static int tegra20_spdif_platform_probe(struct
platform_device *pdev)
spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
spdif->playback_dma_data.maxburst = 4;
- pm_runtime_enable(&pdev->dev);
+ ret = devm_pm_runtime_enable(&pdev->dev);
+ if (ret)
+ return ret;
- ret = snd_soc_register_component(&pdev->dev, &tegra20_spdif_component,
-&tegra20_spdif_dai, 1);
+ ret = devm_snd_soc_register_component(&pdev->dev,
+ &tegra20_spdif_component,
+ &tegra20_spdif_dai, 1);
if (ret) {
dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
- goto err_pm_disable;
+ return ret;
}
- ret = tegra_pcm_platform_register(&pdev->dev);
+ ret = devm_tegra_pcm_platform_register(&pdev->dev);
if (ret) {
dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
- goto err_unregister_component;
+ return ret;
}
- return 0;
-
-err_unregister_component:
- snd_soc_unregister_component(&pdev->dev);
-err_pm_disable:
- pm_runtime_disable(&pdev->dev);
-
- return ret;
-}
-
-static int tegra20_spdif_platform_remove(struct platform_device *pdev)
-{
- tegra_pcm_platform_unregister(&pdev->dev);
- snd_soc_unregister_component(&pdev->dev);
-
- pm_runtime_disable(&pdev->dev);
-
return 0;
}
@@ -342,7 +328,6 @@ static struct platform_driver tegra20_spdif_driver = {
.of_match_table = tegra20_spdif_of_match,
},
.probe = tegra20_spdif_platform_probe,
- .remove = tegra20_spdif_platform_remove,
};
module_platform_driver(tegra20_spdif_driver);
diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c
index ef1e74d95236..468c8e77de21 100644
--- a/sound/soc/tegra/tegra_pcm.c
+++ b/sound/soc/tegra/tegra_pcm.c
@@ -48,6 +48,12 @@ int tegra_pcm_platform_register(struct device *dev)
}
EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
+int devm_tegra_pcm_platform_register(struct device *dev)
+{
+ return devm_snd_dmaengine_pcm_register(dev,
&tegra_dmaengine_pcm_config, 0);
+}
+EXPORT_SYMBOL_GPL(devm_tegra_pcm_platform_register);
+
int tegra_pcm_platform_register_with_chan_names(struct device *dev,
struct snd_dmaengine_pcm_config *config,
char *txdmachan, char *rxdmachan)
diff --git a/sound/soc/tegra/tegra_pcm.h b/sound/soc/tegra/tegra_pcm.h
index d602126c65b7..2a36eea1740d 100644
--- a/sound/soc/tegra/tegra_pcm.h
+++ b/sound/soc/tegra/tegra_pcm.h
@@ -32,6 +32,7 @@ int tegra_pcm_hw_params(struct snd_soc_component *component,
snd_pcm_uframes_t tegra_pcm_pointer(struct snd_soc_component *component,
struct snd_pcm_substream *substream);
int tegra_pcm_platform_register(struct device *dev);
+int devm_tegra_pcm_platform_register(struct device *dev);
int tegra_pcm_platform_register_with_chan_names(struct device *dev,
struct snd_dmaengine_pcm_config *config,
char *txdmachan, char *rxdmachan);
--
2.33.1
[PATCH v4 22/22] ARM: tegra: paz00: Enable S/PDIF and HDMI audio
Enable S/PDIF controller to enable HDMI audio support on Toshiba AC100.
Use nvidia,fixed-parent-rate property that prevents audio rate conflict
between S/PDIF and I2S.
Tested-by: Agneli
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20-paz00.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
b/arch/arm/boot/dts/tegra20-paz00.dts
index 5b2260f61f05..921a811632a1 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -264,8 +264,16 @@ conf_ld17_0 {
};
};
+ spdif@70002400 {
+ status = "okay";
+
+ nvidia,fixed-parent-rate;
+ };
+
i2s@70002800 {
status = "okay";
+
+ nvidia,fixed-parent-rate;
};
serial@70006000 {
--
2.33.1
[PATCH v4 18/22] ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver
All Tegra20/30/114 serial and audio drivers depend on the Tegra20 APB DMA driver, enable this DMA driver. Signed-off-by: Dmitry Osipenko --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 172838566ecd..8863fa969ede 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -958,6 +958,7 @@ CONFIG_ST_FDMA=m CONFIG_STM32_DMA=y CONFIG_STM32_DMAMUX=y CONFIG_STM32_MDMA=y +CONFIG_TEGRA20_APB_DMA=y CONFIG_UNIPHIER_MDMAC=y CONFIG_XILINX_DMA=y CONFIG_QCOM_BAM_DMA=y -- 2.33.1
[PATCH 6/9] drm/i915/gvt: Constify cmd_interrupt_events
It is never modified, so make it const to allow the compiler to put it
in read-only memory.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c
b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index c4118b808268..ce9307546e7f 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -1144,7 +1144,7 @@ struct cmd_interrupt_event {
int mi_user_interrupt;
};
-static struct cmd_interrupt_event cmd_interrupt_events[] = {
+static const struct cmd_interrupt_event cmd_interrupt_events[] = {
[RCS0] = {
.pipe_control_notify = RCS_PIPE_CONTROL,
.mi_flush_dw = INTEL_GVT_EVENT_RESERVED,
--
2.34.1
[PATCH v4 14/22] drm/tegra: hdmi: Unwind tegra_hdmi_init() errors
Add missing error unwinding to tegra_hdmi_init(), for consistency.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/hdmi.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 3242baddc5e7..cc42476fd023 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -1456,22 +1456,31 @@ static int tegra_hdmi_init(struct host1x_client *client)
if (err < 0) {
dev_err(client->dev, "failed to enable HDMI regulator: %d\n",
err);
- return err;
+ goto output_exit;
}
err = regulator_enable(hdmi->pll);
if (err < 0) {
dev_err(hdmi->dev, "failed to enable PLL regulator: %d\n", err);
- return err;
+ goto disable_hdmi;
}
err = regulator_enable(hdmi->vdd);
if (err < 0) {
dev_err(hdmi->dev, "failed to enable VDD regulator: %d\n", err);
- return err;
+ goto disable_pll;
}
return 0;
+
+disable_pll:
+ regulator_disable(hdmi->pll);
+disable_hdmi:
+ regulator_disable(hdmi->hdmi);
+output_exit:
+ tegra_output_exit(&hdmi->output);
+
+ return err;
}
static int tegra_hdmi_exit(struct host1x_client *client)
--
2.33.1
[PATCH v1 0/2] Fix broken DRM and Host1x drivers when CONFIG_ARM_DMA_USE_IOMMU=y
Tegra DRM and Host1x don't work properly when CONFIG_ARM_DMA_USE_IOMMU=y, i.e. in case of multiplatform ARM32 kernel. The simple workaround is to detach devices from the offending IOMMU domain. This is a resend of 9 months old patches which we lost and forgotten. The problem still persists. I rebased patches on top of recent linux-next and improved commit messages. Dmitry Osipenko (2): gpu: host1x: Add back arm_iommu_detach_device() drm/tegra: Add back arm_iommu_detach_device() drivers/gpu/drm/tegra/drm.c | 15 +++ drivers/gpu/host1x/dev.c| 15 +++ 2 files changed, 30 insertions(+) -- 2.33.1
[PATCH v1 1/2] gpu: host1x: Add back arm_iommu_detach_device()
Host1x DMA buffer isn't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y.
The memory management code of Host1x driver has a longstanding overhaul
overdue and it's not obvious where the problem is in this case. Hence
let's add back the old workaround which we already had sometime before.
It explicitly detaches Host1x device from the offending implicit IOMMU
domain. This fixes a completely broken Host1x DMA in case of ARM32
multiplatform kernel config.
Cc: sta...@vger.kernel.org
Fixes: af1cbfb9bf0f ("gpu: host1x: Support DMA mapping of buffers"
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/dev.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index c42ab78327e7..f5b4dcded088 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -22,6 +22,10 @@
#include
#undef CREATE_TRACE_POINTS
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+#include
+#endif
+
#include "bus.h"
#include "channel.h"
#include "debug.h"
@@ -263,6 +267,17 @@ static struct iommu_domain *host1x_iommu_attach(struct
host1x *host)
struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev);
int err;
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+ if (host->dev->archdata.mapping) {
+ struct dma_iommu_mapping *mapping =
+ to_dma_iommu_mapping(host->dev);
+ arm_iommu_detach_device(host->dev);
+ arm_iommu_release_mapping(mapping);
+
+ domain = iommu_get_domain_for_dev(host->dev);
+ }
+#endif
+
/*
* We may not always want to enable IOMMU support (for example if the
* host1x firewall is already enabled and we don't support addressing
--
2.33.1
[PATCH v4 13/22] ASoC: tegra20: i2s: Filter out unsupported rates
Support new nvidia,fixed-parent-rate device-tree property which instructs
I2S that board wants parent clock rate to stay at a fixed rate. This allows
to play audio over S/PDIF and I2S simultaneously. The root of the problem
is that audio components on Tegra share the same audio PLL, and thus, only
a subset of rates can be supported if we want to play audio simultaneously.
Filter out audio rates that don't match parent clock rate if device-tree
has the nvidia,fixed-parent-rate property.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_i2s.c | 49 +++
1 file changed, 49 insertions(+)
diff --git a/sound/soc/tegra/tegra20_i2s.c b/sound/soc/tegra/tegra20_i2s.c
index 266d2cab9f49..27365a877e47 100644
--- a/sound/soc/tegra/tegra20_i2s.c
+++ b/sound/soc/tegra/tegra20_i2s.c
@@ -262,10 +262,59 @@ static int tegra20_i2s_probe(struct snd_soc_dai *dai)
return 0;
}
+static const unsigned int tegra20_i2s_rates[] = {
+ 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, 96000
+};
+
+static int tegra20_i2s_filter_rates(struct snd_pcm_hw_params *params,
+ struct snd_pcm_hw_rule *rule)
+{
+ struct snd_interval *r = hw_param_interval(params, rule->var);
+ struct snd_soc_dai *dai = rule->private;
+ struct tegra20_i2s *i2s = dev_get_drvdata(dai->dev);
+ struct clk *parent = clk_get_parent(i2s->clk_i2s);
+ long i, parent_rate, valid_rates = 0;
+
+ parent_rate = clk_get_rate(parent);
+ if (parent_rate <= 0) {
+ dev_err(dai->dev, "Can't get parent clock rate: %ld\n",
+ parent_rate);
+ return parent_rate ?: -EINVAL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(tegra20_i2s_rates); i++) {
+ if (parent_rate % (tegra20_i2s_rates[i] * 128) == 0)
+ valid_rates |= BIT(i);
+ }
+
+ /*
+* At least one rate must be valid, otherwise the parent clock isn't
+* audio PLL. Nothing should be filtered in this case.
+*/
+ if (!valid_rates)
+ valid_rates = BIT(ARRAY_SIZE(tegra20_i2s_rates)) - 1;
+
+ return snd_interval_list(r, ARRAY_SIZE(tegra20_i2s_rates),
+tegra20_i2s_rates, valid_rates);
+}
+
+static int tegra20_i2s_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ if (!device_property_read_bool(dai->dev, "nvidia,fixed-parent-rate"))
+ return 0;
+
+ return snd_pcm_hw_rule_add(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ tegra20_i2s_filter_rates, dai,
+ SNDRV_PCM_HW_PARAM_RATE, -1);
+}
+
static const struct snd_soc_dai_ops tegra20_i2s_dai_ops = {
.set_fmt= tegra20_i2s_set_fmt,
.hw_params = tegra20_i2s_hw_params,
.trigger= tegra20_i2s_trigger,
+ .startup= tegra20_i2s_startup,
};
static const struct snd_soc_dai_driver tegra20_i2s_dai_template = {
--
2.33.1
[Bug 211277] sometimes crash at s2ram-wake (Ryzen 3500U): amdgpu, drm, commit_tail, amdgpu_dm_atomic_commit_tail
https://bugzilla.kernel.org/show_bug.cgi?id=211277 --- Comment #87 from kolAflash (kolafl...@kolahilft.de) --- (In reply to James Zhu from comment #86) > Hi @kolAflash, thanks so much for your effort on this verification! > Would you mind help apply those patches on 5.12 stable to check also? > it should be automatically merged. Thanks! James I'm testing Linux-5.12.19 with the patch from attachment 299697 since 2021-12-02. Until now everything works fine. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[PATCH v4 19/22] ARM: tegra: Add S/PDIF node to Tegra20 device-tree
Add S/PDIF node to Tegra20 device-tree. It's needed for enabling HDMI
audio support.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 63c2c2f8c0ce..72cbe32d0c1d 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -197,6 +197,7 @@ hdmi@5428 {
reset-names = "hdmi";
power-domains = <&pd_core>;
operating-points-v2 = <&hdmi_dvfs_opp_table>;
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -396,6 +397,23 @@ tegra_ac97: ac97@70002000 {
status = "disabled";
};
+ tegra_spdif: spdif@70002400 {
+ compatible = "nvidia,tegra20-spdif";
+ reg = <0x70002400 0x200>;
+ interrupts = ;
+ clocks = <&tegra_car TEGRA20_CLK_SPDIF_OUT>,
+<&tegra_car TEGRA20_CLK_SPDIF_IN>;
+ clock-names = "out", "in";
+ resets = <&tegra_car 10>;
+ dmas = <&apbdma 3>, <&apbdma 3>;
+ dma-names = "rx", "tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+
+ assigned-clocks = <&tegra_car TEGRA20_CLK_SPDIF_OUT>;
+ assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_A_OUT0>;
+ };
+
tegra_i2s1: i2s@70002800 {
compatible = "nvidia,tegra20-i2s";
reg = <0x70002800 0x200>;
--
2.33.1
[PATCH v4 10/22] ASoC: tegra20: spdif: Reset hardware
Reset S/PDIF controller on runtime PM suspend/resume to ensure that we
always have a consistent hardware state.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 32
sound/soc/tegra/tegra20_spdif.h | 1 +
2 files changed, 33 insertions(+)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index 7dd263721c2c..bc45a0a8afab 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -7,6 +7,7 @@
*/
#include
+#include
#include
#include
#include
@@ -14,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -27,6 +29,8 @@ static __maybe_unused int
tegra20_spdif_runtime_suspend(struct device *dev)
{
struct tegra20_spdif *spdif = dev_get_drvdata(dev);
+ regcache_cache_only(spdif->regmap, true);
+
clk_disable_unprepare(spdif->clk_spdif_out);
return 0;
@@ -37,13 +41,35 @@ static __maybe_unused int
tegra20_spdif_runtime_resume(struct device *dev)
struct tegra20_spdif *spdif = dev_get_drvdata(dev);
int ret;
+ ret = reset_control_assert(spdif->reset);
+ if (ret)
+ return ret;
+
ret = clk_prepare_enable(spdif->clk_spdif_out);
if (ret) {
dev_err(dev, "clk_enable failed: %d\n", ret);
return ret;
}
+ usleep_range(10, 100);
+
+ ret = reset_control_deassert(spdif->reset);
+ if (ret)
+ goto disable_clocks;
+
+ regcache_cache_only(spdif->regmap, false);
+ regcache_mark_dirty(spdif->regmap);
+
+ ret = regcache_sync(spdif->regmap);
+ if (ret)
+ goto disable_clocks;
+
return 0;
+
+disable_clocks:
+ clk_disable_unprepare(spdif->clk_spdif_out);
+
+ return ret;
}
static int tegra20_spdif_hw_params(struct snd_pcm_substream *substream,
@@ -268,6 +294,12 @@ static int tegra20_spdif_platform_probe(struct
platform_device *pdev)
dev_set_drvdata(&pdev->dev, spdif);
+ spdif->reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(spdif->reset)) {
+ dev_err(&pdev->dev, "Can't retrieve spdif reset\n");
+ return PTR_ERR(spdif->reset);
+ }
+
spdif->clk_spdif_out = devm_clk_get(&pdev->dev, "out");
if (IS_ERR(spdif->clk_spdif_out)) {
dev_err(&pdev->dev, "Could not retrieve spdif clock\n");
diff --git a/sound/soc/tegra/tegra20_spdif.h b/sound/soc/tegra/tegra20_spdif.h
index 1973ffc2d5c7..ff4b79e2052f 100644
--- a/sound/soc/tegra/tegra20_spdif.h
+++ b/sound/soc/tegra/tegra20_spdif.h
@@ -451,6 +451,7 @@ struct tegra20_spdif {
struct snd_dmaengine_dai_dma_data capture_dma_data;
struct snd_dmaengine_dai_dma_data playback_dma_data;
struct regmap *regmap;
+ struct reset_control *reset;
};
#endif
--
2.33.1
[PATCH v4 05/22] ASoC: tegra20: spdif: Set FIFO trigger level
FIFO trigger level must be not less than the size of DMA burst, otherwise
audio will be played x4 faster that it should be because part of the DMA
data will be dropped on FIFO input buffer overflow.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 8
1 file changed, 8 insertions(+)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index 7751575cd6d6..6f0570cde964 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -69,6 +69,14 @@ static int tegra20_spdif_hw_params(struct snd_pcm_substream
*substream,
regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_CTRL, mask, val);
+ /*
+* FIFO trigger level must be bigger than DMA burst or equal to it,
+* otherwise data is discarded on overflow.
+*/
+ regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_DATA_FIFO_CSR,
+ TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_MASK,
+
TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_TU4_WORD_FULL);
+
switch (params_rate(params)) {
case 32000:
spdifclock = 4096000;
--
2.33.1
[PATCH v4 08/22] ASoC: tegra20: spdif: Improve driver's code
- Clean up whitespaces, defines and variables.
- Remove obsolete code.
- Adhere to upstream coding style.
- Don't override returned error code.
- Replace pr_err with dev_err.
No functional changes are made by this patch. This is a minor code's
refactoring that will ease further maintenance of the driver.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 49 -
1 file changed, 18 insertions(+), 31 deletions(-)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index 801784915004..d5c618611dbb 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -23,8 +23,6 @@
#include "tegra20_spdif.h"
-#define DRV_NAME "tegra20-spdif"
-
static __maybe_unused int tegra20_spdif_runtime_suspend(struct device *dev)
{
struct tegra20_spdif *spdif = dev_get_drvdata(dev);
@@ -49,11 +47,10 @@ static __maybe_unused int
tegra20_spdif_runtime_resume(struct device *dev)
}
static int tegra20_spdif_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
{
- struct device *dev = dai->dev;
- struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
+ struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
unsigned int mask = 0, val = 0;
int ret, spdifclock;
@@ -106,7 +103,7 @@ static int tegra20_spdif_hw_params(struct snd_pcm_substream
*substream,
ret = clk_set_rate(spdif->clk_spdif_out, spdifclock);
if (ret) {
- dev_err(dev, "Can't set SPDIF clock rate: %d\n", ret);
+ dev_err(dai->dev, "Can't set SPDIF clock rate: %d\n", ret);
return ret;
}
@@ -127,9 +124,9 @@ static void tegra20_spdif_stop_playback(struct
tegra20_spdif *spdif)
}
static int tegra20_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
- struct snd_soc_dai *dai)
+struct snd_soc_dai *dai)
{
- struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
+ struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
@@ -151,7 +148,7 @@ static int tegra20_spdif_trigger(struct snd_pcm_substream
*substream, int cmd,
static int tegra20_spdif_probe(struct snd_soc_dai *dai)
{
- struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
+ struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
dai->capture_dma_data = NULL;
dai->playback_dma_data = &spdif->playback_dma_data;
@@ -160,26 +157,26 @@ static int tegra20_spdif_probe(struct snd_soc_dai *dai)
}
static const struct snd_soc_dai_ops tegra20_spdif_dai_ops = {
- .hw_params = tegra20_spdif_hw_params,
- .trigger= tegra20_spdif_trigger,
+ .hw_params = tegra20_spdif_hw_params,
+ .trigger = tegra20_spdif_trigger,
};
static struct snd_soc_dai_driver tegra20_spdif_dai = {
- .name = DRV_NAME,
+ .name = "tegra20-spdif",
.probe = tegra20_spdif_probe,
.playback = {
.stream_name = "Playback",
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
- SNDRV_PCM_RATE_48000,
+SNDRV_PCM_RATE_48000,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
},
.ops = &tegra20_spdif_dai_ops,
};
static const struct snd_soc_component_driver tegra20_spdif_component = {
- .name = DRV_NAME,
+ .name = "tegra20-spdif",
};
static bool tegra20_spdif_wr_rd_reg(struct device *dev, unsigned int reg)
@@ -260,7 +257,7 @@ static const struct regmap_config
tegra20_spdif_regmap_config = {
static int tegra20_spdif_platform_probe(struct platform_device *pdev)
{
struct tegra20_spdif *spdif;
- struct resource *mem, *dmareq;
+ struct resource *mem;
void __iomem *regs;
int ret;
@@ -273,27 +270,19 @@ static int tegra20_spdif_platform_probe(struct
platform_device *pdev)
spdif->clk_spdif_out = devm_clk_get(&pdev->dev, "out");
if (IS_ERR(spdif->clk_spdif_out)) {
- pr_err("Can't retrieve spdif clock\n");
- ret = PTR_ERR(spdif->clk_spdif_out);
- return ret;
+ dev_err(&pdev->dev, "Could not retrieve spdif clock\n");
+ return PTR_ERR(spdif->clk_spdif_out);
}
regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
if (IS_ERR(regs))
return PTR_ERR(regs);
- dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
- if (!dmareq) {
- dev_err(&pdev->dev, "N
[PATCH v4 02/22] ASoC: dt-bindings: tegra20-i2s: Convert to schema
Convert NVIDIA Tegra20 I2S binding to schema.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
.../bindings/sound/nvidia,tegra20-i2s.txt | 30
.../bindings/sound/nvidia,tegra20-i2s.yaml| 70 +++
2 files changed, 70 insertions(+), 30 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
create mode 100644
Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
deleted file mode 100644
index dc30c6bfbe95..
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-NVIDIA Tegra 20 I2S controller
-
-Required properties:
-- compatible : "nvidia,tegra20-i2s"
-- reg : Should contain I2S registers location and length
-- interrupts : Should contain I2S interrupt
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
- - i2s
-- dmas : Must contain an entry for each entry in clock-names.
- See ../dma/dma.txt for details.
-- dma-names : Must include the following entries:
- - rx
- - tx
-- clocks : Must contain one entry, for the module clock.
- See ../clocks/clock-bindings.txt for details.
-
-Example:
-
-i2s@70002800 {
- compatible = "nvidia,tegra20-i2s";
- reg = <0x70002800 0x200>;
- interrupts = < 45 >;
- clocks = <&tegra_car 11>;
- resets = <&tegra_car 11>;
- reset-names = "i2s";
- dmas = <&apbdma 21>, <&apbdma 21>;
- dma-names = "rx", "tx";
-};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml
b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml
new file mode 100644
index ..ad43b237d9af
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra20 I2S Controller
+
+description: |
+ The I2S Controller streams synchronous serial audio data between system
+ memory and an external audio device. The controller supports the I2S Left
+ Justified Mode, Right Justified Mode, and DSP mode formats.
+
+maintainers:
+ - Thierry Reding
+ - Jon Hunter
+
+properties:
+ compatible:
+const: nvidia,tegra20-i2s
+
+ reg:
+maxItems: 1
+
+ resets:
+maxItems: 1
+
+ reset-names:
+const: i2s
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+minItems: 1
+
+ dmas:
+minItems: 2
+
+ dma-names:
+items:
+ - const: rx
+ - const: tx
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+ - interrupts
+ - clocks
+ - dmas
+ - dma-names
+
+additionalProperties: false
+
+examples:
+ - |
+i2s@70002800 {
+compatible = "nvidia,tegra20-i2s";
+reg = <0x70002800 0x200>;
+interrupts = <45>;
+clocks = <&tegra_car 11>;
+resets = <&tegra_car 11>;
+reset-names = "i2s";
+dmas = <&apbdma 21>, <&apbdma 21>;
+dma-names = "rx", "tx";
+};
+
+...
--
2.33.1
[PATCH v4 15/22] drm/tegra: hdmi: Register audio CODEC on Tegra20
Tegra20 SoC supports only S/PDIF source for HDMI audio. Register ASoC HDMI
S/PDIF CODEC for Tegra20, it will be linked with the S/PDIF CPU DAI.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/Kconfig | 3 +
drivers/gpu/drm/tegra/hdmi.c | 153 +++---
2 files changed, 145 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 32fe64553d2e..40f0d14cb240 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -13,6 +13,9 @@ config DRM_TEGRA_ORIG
select INTERCONNECT
select IOMMU_IOVA
select CEC_CORE if CEC_NOTIFIER
+ select SND_SIMPLE_CARD if SND_SOC_TEGRA20_SPDIF
+ select SND_SOC_HDMI_CODEC if SND_SOC_TEGRA20_SPDIF
+ select SND_AUDIO_GRAPH_CARD if SND_SOC_TEGRA20_SPDIF
help
Choose this option if you have an NVIDIA Tegra SoC.
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index cc42476fd023..5353f83cbee8 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -18,6 +18,8 @@
#include
+#include
+
#include
#include
#include
@@ -81,6 +83,9 @@ struct tegra_hdmi {
bool dvi;
struct drm_info_list *debugfs_files;
+
+ struct platform_device *audio_pdev;
+ struct mutex audio_lock;
};
static inline struct tegra_hdmi *
@@ -363,6 +368,18 @@ static const struct tmds_config tegra124_tmds_config[] = {
},
};
+static void tegra_hdmi_audio_lock(struct tegra_hdmi *hdmi)
+{
+ mutex_lock(&hdmi->audio_lock);
+ disable_irq(hdmi->irq);
+}
+
+static void tegra_hdmi_audio_unlock(struct tegra_hdmi *hdmi)
+{
+ enable_irq(hdmi->irq);
+ mutex_unlock(&hdmi->audio_lock);
+}
+
static int
tegra_hdmi_get_audio_config(unsigned int audio_freq, unsigned int pix_clock,
struct tegra_hdmi_audio_config *config)
@@ -832,6 +849,23 @@ static void tegra_hdmi_setup_tmds(struct tegra_hdmi *hdmi,
HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT);
}
+static int tegra_hdmi_reconfigure_audio(struct tegra_hdmi *hdmi)
+{
+ int err;
+
+ err = tegra_hdmi_setup_audio(hdmi);
+ if (err < 0) {
+ tegra_hdmi_disable_audio_infoframe(hdmi);
+ tegra_hdmi_disable_audio(hdmi);
+ } else {
+ tegra_hdmi_setup_audio_infoframe(hdmi);
+ tegra_hdmi_enable_audio_infoframe(hdmi);
+ tegra_hdmi_enable_audio(hdmi);
+ }
+
+ return err;
+}
+
static bool tegra_output_is_hdmi(struct tegra_output *output)
{
struct edid *edid;
@@ -1138,6 +1172,8 @@ static void tegra_hdmi_encoder_disable(struct drm_encoder
*encoder)
u32 value;
int err;
+ tegra_hdmi_audio_lock(hdmi);
+
/*
* The following accesses registers of the display controller, so make
* sure it's only executed when the output is attached to one.
@@ -1162,6 +1198,10 @@ static void tegra_hdmi_encoder_disable(struct
drm_encoder *encoder)
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_ENABLE);
tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_INT_MASK);
+ hdmi->pixel_clock = 0;
+
+ tegra_hdmi_audio_unlock(hdmi);
+
err = host1x_client_suspend(&hdmi->client);
if (err < 0)
dev_err(hdmi->dev, "failed to suspend: %d\n", err);
@@ -1185,6 +1225,8 @@ static void tegra_hdmi_encoder_enable(struct drm_encoder
*encoder)
return;
}
+ tegra_hdmi_audio_lock(hdmi);
+
/*
* Enable and unmask the HDA codec SCRATCH0 register interrupt. This
* is used for interoperability between the HDA codec driver and the
@@ -1390,6 +1432,8 @@ static void tegra_hdmi_encoder_enable(struct drm_encoder
*encoder)
}
/* TODO: add HDCP support */
+
+ tegra_hdmi_audio_unlock(hdmi);
}
static int
@@ -1419,6 +1463,91 @@ static const struct drm_encoder_helper_funcs
tegra_hdmi_encoder_helper_funcs = {
.atomic_check = tegra_hdmi_encoder_atomic_check,
};
+static int tegra_hdmi_hw_params(struct device *dev, void *data,
+ struct hdmi_codec_daifmt *fmt,
+ struct hdmi_codec_params *hparms)
+{
+ struct tegra_hdmi *hdmi = data;
+ int ret = 0;
+
+ tegra_hdmi_audio_lock(hdmi);
+
+ hdmi->format.sample_rate = hparms->sample_rate;
+ hdmi->format.channels = hparms->channels;
+
+ if (hdmi->pixel_clock && !hdmi->dvi)
+ ret = tegra_hdmi_reconfigure_audio(hdmi);
+
+ tegra_hdmi_audio_unlock(hdmi);
+
+ return ret;
+}
+
+static int tegra_hdmi_audio_startup(struct device *dev, void *data)
+{
+ struct tegra_hdmi *hdmi = data;
+ int ret;
+
+ ret = host1x_client_resume(&hdmi->client);
+ if (ret < 0)
+ dev_err(hdmi->dev, "failed to resume: %d\n", ret);
+
+ return ret;
+}
+
+stat
[PATCH v4 11/22] ASoC: tegra20: spdif: Support system suspend
Support system suspend by enforcing runtime PM suspend/resume.
Now there is no doubt that h/w is indeed stopped during suspend
and that h/w state will be properly restored after resume.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index bc45a0a8afab..a4aa5614aef4 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -345,6 +345,8 @@ static int tegra20_spdif_platform_probe(struct
platform_device *pdev)
static const struct dev_pm_ops tegra20_spdif_pm_ops = {
SET_RUNTIME_PM_OPS(tegra20_spdif_runtime_suspend,
tegra20_spdif_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
};
static const struct of_device_id tegra20_spdif_of_match[] = {
--
2.33.1
Re: [PATCH] drm/msm/dp: Add "qcom, sc7280-dp" to support display port.
On 04/12/2021 01:02, Kuogee Hsieh wrote:
Signed-off-by: Kuogee Hsieh
Reviewed by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index d44f18b..91582d3 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -146,6 +146,7 @@ static const struct msm_dp_config sc7280_dp_cfg = {
static const struct of_device_id dp_dt_match[] = {
{ .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg },
{ .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_cfg },
+ { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_cfg },
{}
};
--
With best wishes
Dmitry
[PATCH 7/9] drm/i915/gvt: Constify formats
These are never modified, so make them const to allow the compiler to
put them in read-only memory. WHile at it, make the description const
char* since it is never modified.
Signed-off-by: Rikard Falkeborn
---
drivers/gpu/drm/i915/gvt/fb_decoder.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c
b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index 11a8baba6822..3c8736ae8fed 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -40,12 +40,12 @@
#define PRIMARY_FORMAT_NUM 16
struct pixel_format {
- int drm_format; /* Pixel format in DRM definition */
- int bpp;/* Bits per pixel, 0 indicates invalid */
- char*desc; /* The description */
+ int drm_format; /* Pixel format in DRM definition */
+ int bpp;/* Bits per pixel, 0 indicates invalid
*/
+ const char *desc; /* The description */
};
-static struct pixel_format bdw_pixel_formats[] = {
+static const struct pixel_format bdw_pixel_formats[] = {
{DRM_FORMAT_C8, 8, "8-bit Indexed"},
{DRM_FORMAT_RGB565, 16, "16-bit BGRX (5:6:5 MSB-R:G:B)"},
{DRM_FORMAT_XRGB, 32, "32-bit BGRX (8:8:8:8 MSB-X:R:G:B)"},
@@ -58,7 +58,7 @@ static struct pixel_format bdw_pixel_formats[] = {
{0, 0, NULL},
};
-static struct pixel_format skl_pixel_formats[] = {
+static const struct pixel_format skl_pixel_formats[] = {
{DRM_FORMAT_YUYV, 16, "16-bit packed YUYV (8:8:8:8 MSB-V:Y2:U:Y1)"},
{DRM_FORMAT_UYVY, 16, "16-bit packed UYVY (8:8:8:8 MSB-Y2:V:Y1:U)"},
{DRM_FORMAT_YVYU, 16, "16-bit packed YVYU (8:8:8:8 MSB-U:Y2:V:Y1)"},
@@ -278,14 +278,14 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu
*vgpu,
#define CURSOR_FORMAT_NUM (1 << 6)
struct cursor_mode_format {
- int drm_format; /* Pixel format in DRM definition */
- u8 bpp;/* Bits per pixel; 0 indicates invalid */
- u32 width; /* In pixel */
- u32 height; /* In lines */
- char*desc; /* The description */
+ int drm_format; /* Pixel format in DRM definition */
+ u8 bpp;/* Bits per pixel; 0 indicates invalid
*/
+ u32 width; /* In pixel */
+ u32 height; /* In lines */
+ const char *desc; /* The description */
};
-static struct cursor_mode_format cursor_pixel_formats[] = {
+static const struct cursor_mode_format cursor_pixel_formats[] = {
{DRM_FORMAT_ARGB, 32, 128, 128, "128x128 32bpp ARGB"},
{DRM_FORMAT_ARGB, 32, 256, 256, "256x256 32bpp ARGB"},
{DRM_FORMAT_ARGB, 32, 64, 64, "64x64 32bpp ARGB"},
@@ -391,7 +391,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
#define SPRITE_FORMAT_NUM (1 << 3)
-static struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
+static const struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
[0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"},
[0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"},
[0x2] = {DRM_FORMAT_XRGB, 32, "RGB 32-bit 8:8:8:8"},
--
2.34.1
[PATCH 1/2] drm: fsl-dcu: select CONFIG_DRM_GEM_CMA_HELPER
From: Arnd Bergmann
The fsl-dcu driver uses the gem_cma_helper code, but does
noto enforce enabling this through Kconfig:
arm-linux-gnueabi-ld:
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.o:(.rodata+0x32c): undefined reference
to `drm_gem_cma_prime_import_sg_table'
arm-linux-gnueabi-ld:
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.o:(.rodata+0x334): undefined reference
to `drm_gem_cma_dumb_create'
arm-linux-gnueabi-ld: drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.o: in function
`fsl_dcu_drm_plane_atomic_update':
fsl_dcu_drm_plane.c:(.text+0x144): undefined reference to
`drm_fb_cma_get_gem_obj'
Add the same 'select' that is used in other such drivers.
Fixes: 09717af7d13d ("drm: Remove CONFIG_DRM_KMS_CMA_HELPER option")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/fsl-dcu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/fsl-dcu/Kconfig b/drivers/gpu/drm/fsl-dcu/Kconfig
index 2a13ea5c8539..e95e96c565ba 100644
--- a/drivers/gpu/drm/fsl-dcu/Kconfig
+++ b/drivers/gpu/drm/fsl-dcu/Kconfig
@@ -3,6 +3,7 @@ config DRM_FSL_DCU
tristate "DRM Support for Freescale DCU"
depends on DRM && OF && ARM && COMMON_CLK
select BACKLIGHT_CLASS_DEVICE
+ select DRM_GEM_CMA_HELPER
select DRM_KMS_HELPER
select DRM_PANEL
select REGMAP_MMIO
--
2.29.2
[PATCH v4 07/22] ASoC: tegra20: spdif: Support device-tree
Tegra20 S/PDIF driver was added in a pre-DT era and was never used since
that time. Revive driver by adding device-tree support.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index e45e371edc42..801784915004 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -270,7 +271,7 @@ static int tegra20_spdif_platform_probe(struct
platform_device *pdev)
dev_set_drvdata(&pdev->dev, spdif);
- spdif->clk_spdif_out = devm_clk_get(&pdev->dev, "spdif_out");
+ spdif->clk_spdif_out = devm_clk_get(&pdev->dev, "out");
if (IS_ERR(spdif->clk_spdif_out)) {
pr_err("Can't retrieve spdif clock\n");
ret = PTR_ERR(spdif->clk_spdif_out);
@@ -340,10 +341,17 @@ static const struct dev_pm_ops tegra20_spdif_pm_ops = {
tegra20_spdif_runtime_resume, NULL)
};
+static const struct of_device_id tegra20_spdif_of_match[] = {
+ { .compatible = "nvidia,tegra20-spdif", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, tegra20_spdif_of_match);
+
static struct platform_driver tegra20_spdif_driver = {
.driver = {
.name = DRV_NAME,
.pm = &tegra20_spdif_pm_ops,
+ .of_match_table = tegra20_spdif_of_match,
},
.probe = tegra20_spdif_platform_probe,
.remove = tegra20_spdif_platform_remove,
@@ -354,4 +362,3 @@ module_platform_driver(tegra20_spdif_driver);
MODULE_AUTHOR("Stephen Warren ");
MODULE_DESCRIPTION("Tegra20 SPDIF ASoC driver");
MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:" DRV_NAME);
--
2.33.1
[PATCH v4 21/22] ARM: tegra: acer-a500: Enable S/PDIF and HDMI audio
Enable S/PDIF controller to enable HDMI audio support on Acer A500.
Use nvidia,fixed-parent-rate property that prevents audio rate conflict
between S/PDIF and I2S.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index db388ddd062f..f47b946627c3 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -376,8 +376,16 @@ pta {
};
};
+ tegra_spdif: spdif@70002400 {
+ status = "okay";
+
+ nvidia,fixed-parent-rate;
+ };
+
tegra_i2s1: i2s@70002800 {
status = "okay";
+
+ nvidia,fixed-parent-rate;
};
uartb: serial@70006040 {
--
2.33.1
[PATCH v4 03/22] ASoC: dt-bindings: tegra20-i2s: Document new nvidia, fixed-parent-rate property
Document new nvidia,fixed-parent-rate property which instructs that this board wants parent clock to stay at a fixed rate. It allows to prevent conflicts between audio components that share same parent PLL. For instance, this property allows to have HDMI audio, speaker and headphones in the system playing audio simultaneously, which is a common pattern for consumer devices. Reviewed-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../devicetree/bindings/sound/nvidia,tegra20-i2s.yaml | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml index ad43b237d9af..68ae124eaf80 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml @@ -42,6 +42,13 @@ properties: - const: rx - const: tx + nvidia,fixed-parent-rate: +description: | + Specifies whether board prefers parent clock to stay at a fixed rate. + This allows multiple Tegra20 audio components work simultaneously by + limiting number of supportable audio rates. +type: boolean + required: - compatible - reg -- 2.33.1
[PATCH v4 12/22] ASoC: tegra20: spdif: Filter out unsupported rates
SPDIF and other SoC components share audio PLL on Tegra, thus only one
component may set the desired base clock rate. This creates problem for
HDMI audio because it uses SPDIF and audio may not work if SPDIF's clock
doesn't exactly match standard audio rate since some receivers may reject
audio in that case. Filter out audio rates which SPDIF output can't
support, assuming that other components won't change rate at runtime.
Signed-off-by: Dmitry Osipenko
---
sound/soc/tegra/tegra20_spdif.c | 61 +
1 file changed, 61 insertions(+)
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c
index a4aa5614aef4..d09cd7ee6879 100644
--- a/sound/soc/tegra/tegra20_spdif.c
+++ b/sound/soc/tegra/tegra20_spdif.c
@@ -79,6 +79,7 @@ static int tegra20_spdif_hw_params(struct snd_pcm_substream
*substream,
struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
unsigned int mask = 0, val = 0;
int ret, spdifclock;
+ long rate;
mask |= TEGRA20_SPDIF_CTRL_PACK |
TEGRA20_SPDIF_CTRL_BIT_MODE_MASK;
@@ -133,6 +134,12 @@ static int tegra20_spdif_hw_params(struct
snd_pcm_substream *substream,
return ret;
}
+ rate = clk_get_rate(spdif->clk_spdif_out);
+ if (rate != spdifclock)
+ dev_warn_once(dai->dev,
+ "SPDIF clock rate %d doesn't match requested rate
%lu\n",
+ spdifclock, rate);
+
return 0;
}
@@ -172,6 +179,59 @@ static int tegra20_spdif_trigger(struct snd_pcm_substream
*substream, int cmd,
return 0;
}
+static int tegra20_spdif_filter_rates(struct snd_pcm_hw_params *params,
+ struct snd_pcm_hw_rule *rule)
+{
+ struct snd_interval *r = hw_param_interval(params, rule->var);
+ struct snd_soc_dai *dai = rule->private;
+ struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
+ struct clk *parent = clk_get_parent(spdif->clk_spdif_out);
+ const unsigned int rates[] = { 32000, 44100, 48000 };
+ long i, parent_rate, valid_rates = 0;
+
+ parent_rate = clk_get_rate(parent);
+ if (parent_rate <= 0) {
+ dev_err(dai->dev, "Can't get parent clock rate: %ld\n",
+ parent_rate);
+ return parent_rate ?: -EINVAL;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(rates); i++) {
+ if (parent_rate % (rates[i] * 128) == 0)
+ valid_rates |= BIT(i);
+ }
+
+ /*
+* At least one rate must be valid, otherwise the parent clock isn't
+* audio PLL. Nothing should be filtered in this case.
+*/
+ if (!valid_rates)
+ valid_rates = BIT(ARRAY_SIZE(rates)) - 1;
+
+ return snd_interval_list(r, ARRAY_SIZE(rates), rates, valid_rates);
+}
+
+static int tegra20_spdif_startup(struct snd_pcm_substream *substream,
+struct snd_soc_dai *dai)
+{
+ if (!device_property_read_bool(dai->dev, "nvidia,fixed-parent-rate"))
+ return 0;
+
+ /*
+* SPDIF and I2S share audio PLL. HDMI takes audio packets from SPDIF
+* and audio may not work on some TVs if clock rate isn't precise.
+*
+* PLL rate is controlled by I2S side. Filter out audio rates that
+* don't match PLL rate at the start of stream to allow both SPDIF
+* and I2S work simultaneously, assuming that PLL rate won't be
+* changed later on.
+*/
+ return snd_pcm_hw_rule_add(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ tegra20_spdif_filter_rates, dai,
+ SNDRV_PCM_HW_PARAM_RATE, -1);
+}
+
static int tegra20_spdif_probe(struct snd_soc_dai *dai)
{
struct tegra20_spdif *spdif = dev_get_drvdata(dai->dev);
@@ -185,6 +245,7 @@ static int tegra20_spdif_probe(struct snd_soc_dai *dai)
static const struct snd_soc_dai_ops tegra20_spdif_dai_ops = {
.hw_params = tegra20_spdif_hw_params,
.trigger = tegra20_spdif_trigger,
+ .startup = tegra20_spdif_startup,
};
static struct snd_soc_dai_driver tegra20_spdif_dai = {
--
2.33.1
[PATCH v4 01/22] ASoC: dt-bindings: Add binding for Tegra20 S/PDIF
Add device-tree binding for Tegra20 S/PDIF controller.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
.../bindings/sound/nvidia,tegra20-spdif.yaml | 85 +++
1 file changed, 85 insertions(+)
create mode 100644
Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
new file mode 100644
index ..60a368a132b8
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra20 S/PDIF Controller
+
+description: |
+ The S/PDIF controller supports both input and output in serial audio
+ digital interface format. The input controller can digitally recover
+ a clock from the received stream. The S/PDIF controller is also used
+ to generate the embedded audio for HDMI output channel.
+
+maintainers:
+ - Thierry Reding
+ - Jon Hunter
+
+properties:
+ compatible:
+const: nvidia,tegra20-spdif
+
+ reg:
+maxItems: 1
+
+ resets:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+minItems: 2
+
+ clock-names:
+items:
+ - const: out
+ - const: in
+
+ dmas:
+minItems: 2
+
+ dma-names:
+items:
+ - const: rx
+ - const: tx
+
+ "#sound-dai-cells":
+const: 0
+
+ nvidia,fixed-parent-rate:
+description: |
+ Specifies whether board prefers parent clock to stay at a fixed rate.
+ This allows multiple Tegra20 audio components work simultaneously by
+ limiting number of supportable audio rates.
+type: boolean
+
+required:
+ - compatible
+ - reg
+ - resets
+ - interrupts
+ - clocks
+ - clock-names
+ - dmas
+ - dma-names
+ - "#sound-dai-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+spdif@70002400 {
+compatible = "nvidia,tegra20-spdif";
+reg = <0x70002400 0x200>;
+interrupts = <77>;
+clocks = <&clk 99>, <&clk 98>;
+clock-names = "out", "in";
+resets = <&rst 10>;
+dmas = <&apbdma 3>, <&apbdma 3>;
+dma-names = "rx", "tx";
+#sound-dai-cells = <0>;
+};
+
+...
--
2.33.1
Re: [PATCH] drm/msm/dp: Add "qcom, sc7280-dp" to support display port.
Quoting Kuogee Hsieh (2021-12-03 14:02:39)
> Signed-off-by: Kuogee Hsieh
> ---
> drivers/gpu/drm/msm/dp/dp_display.c | 1 +
> 1 file changed, 1 insertion(+)
One nit
Reviewed-by: Stephen Boyd
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
> b/drivers/gpu/drm/msm/dp/dp_display.c
> index d44f18b..91582d3 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -146,6 +146,7 @@ static const struct msm_dp_config sc7280_dp_cfg = {
> static const struct of_device_id dp_dt_match[] = {
> { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg },
> { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_cfg },
> + { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_cfg },
The letter d comes before e so it would be better to sort this
alphanumerically and avoid conflicts later.
RE: [PATCH] drm/ast: Atomic CR/SR reg R/W
Hi
-Original Message-
From: Thomas Zimmermann [mailto:tzimmerm...@suse.de]
Sent: Friday, December 03, 2021 4:47 PM
To: Kuo-Hsiang Chou ;
dri-devel@lists.freedesktop.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH] drm/ast: Atomic CR/SR reg R/W
Hi
Am 03.12.21 um 02:23 schrieb Kuo-Hsiang Chou:
>
>
> -Original Message-
> From: Kuo-Hsiang Chou
> Sent: Thursday, September 30, 2021 3:19 PM
> To: Thomas Zimmermann ;
> dri-devel@lists.freedesktop.org; linux-ker...@vger.kernel.org
> Subject: RE: [PATCH] drm/ast: Atomic CR/SR reg R/W
>
> Hi
>
> -Original Message-
> From: Thomas Zimmermann [mailto:tzimmerm...@suse.de]
> Sent: Monday, September 20, 2021 4:17 PM
> To: Kuo-Hsiang Chou ;
> dri-devel@lists.freedesktop.org; linux-ker...@vger.kernel.org
> Subject: Re: [PATCH] drm/ast: Atomic CR/SR reg R/W
>
> Hi
>
> Am 17.09.21 um 09:22 schrieb KuoHsiang Chou:
>> 1. Avoid IO-index racing
>> 2. IO-index racing happened on resolustion switching
>> and mouse moving at the same time 3. System hung while IO-index
>> racing occurred.
>
> I'd say that there's something else going one here. Mode setting and cursor
> movement should be protected against each other by DRM locking.
> Changing these low-level functions would not solve the issues. I'll try to
> reproduce the problem ASAP.
>
> Hi Thomas,
>
> Sorry to interrupt you again!
> May I understand the review's situation? Thanks!
Hi Thomas,
Look, you really have to work with us during the review process. Don't just
expect us to tell you what to do.
Thanks! Got it.
I'm not going to merge this patch. As I said, I don't think it fixes the
problem. Mouse movement and resolution switching should not interfere with each
other. The DRM framework should guarantee that.
OK, thanks for your confirmation.
I cannot reproduce the issue, but there's most likely something else happening
here. How can the system switch resolution and change the mouse at the same
time?
Sure, we will check if there is a 100 percent method to reproduce the issue.
Thanks for your responses.
Regards,
Kuo-Hsiang Chou
Best regards
Thomas
>
> Hi Tomas,
> Good day!
> May I understand the review status, or is there anything I can do to improve
> it? Thanks!
>
> Best Regards,
> Kuo-Hsiang Chou
>
> Best Regards,
> Kuo-Hsiang Chou
>
> Best regards
> Thomas
>
>>
>> Signed-off-by: KuoHsiang Chou
>> ---
>>drivers/gpu/drm/ast/ast_main.c | 48 +-
>>1 file changed, 36 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/ast/ast_main.c
>> b/drivers/gpu/drm/ast/ast_main.c index 79a361867..1d8fa70c5 100644
>> --- a/drivers/gpu/drm/ast/ast_main.c
>> +++ b/drivers/gpu/drm/ast/ast_main.c
>> @@ -41,28 +41,52 @@ void ast_set_index_reg_mask(struct ast_private *ast,
>> uint32_t base, uint8_t index,
>> uint8_t mask, uint8_t val)
>>{
>> -u8 tmp;
>> -ast_io_write8(ast, base, index);
>> -tmp = (ast_io_read8(ast, base + 1) & mask) | val;
>> -ast_set_index_reg(ast, base, index, tmp);
>> +uint16_t volatile usData;
>> +uint8_t volatile jData;
>> +
>> +do {
>> +ast_io_write8(ast, base, index);
>> +usData = ast_io_read16(ast, base);
>> +} while ((uint8_t)(usData) != index);
>> +
>> +jData = (uint8_t)(usData >> 8);
>> +jData &= mask;
>> +jData |= val;
>> +usData = ((uint16_t) jData << 8) | (uint16_t) index;
>> +ast_io_write16(ast, base, usData);
>>}
>>
>>uint8_t ast_get_index_reg(struct ast_private *ast,
>>uint32_t base, uint8_t index)
>>{
>> -uint8_t ret;
>> -ast_io_write8(ast, base, index);
>> -ret = ast_io_read8(ast, base + 1);
>> -return ret;
>> +uint16_t volatile usData;
>> +uint8_t volatile jData;
>> +
>> +do {
>> +ast_io_write8(ast, base, index);
>> +usData = ast_io_read16(ast, base);
>> +} while ((uint8_t)(usData) != index);
>> +
>> +jData = (uint8_t)(usData >> 8);
>> +
>> +return jData;
>>}
>>
>>uint8_t ast_get_index_reg_mask(struct ast_private *ast,
>> uint32_t base, uint8_t index, uint8_t mask)
>>{
>> -uint8_t ret;
>> -ast_io_write8(ast, base, index);
>> -ret = ast_io_read8(ast, base + 1) & mask;
>> -return ret;
>> +uint16_t volatile usData;
>> +uint8_t volatile jData;
>> +
>> +do {
>> +ast_io_write8(ast, base, index);
>> +usData = ast_io_read16(ast, base);
>> +} while ((uint8_t)(usData) != index);
>> +
>> +jData = (uint8_t)(usData >> 8);
>> +jData &= mask;
>> +
>> +return jData;
>>}
>>
>>static void ast_detect_config_mode(struct drm_device *dev, u32
>> *scu_rev)
>> --
>> 2.18.4
>>
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg)
> Geschäftsf
[PATCH v5 08/11] drm/i915/pxp: Use to_gt() helper
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 5d169624ad60..726c2b5a3fa3 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -14,9 +14,11 @@
#include "intel_pxp_tee.h"
#include "intel_pxp_tee_interface.h"
-static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
+static struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
{
- return &kdev_to_i915(i915_kdev)->gt.pxp;
+ struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+
+ return &to_gt(i915)->pxp;
}
static int intel_pxp_tee_io_message(struct intel_pxp *pxp,
--
2.34.1
[PATCH v4 16/22] ARM: tegra_defconfig: Enable S/PDIF driver
Enable Tegra20 S/PDIF driver. It's a part of HDMI audio subsystem on Tegra. Signed-off-by: Dmitry Osipenko --- arch/arm/configs/tegra_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 736a0d25900b..f8b40cfdfb3e 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -239,6 +239,7 @@ CONFIG_SND_HDA_CODEC_HDMI=y CONFIG_SND_SOC=y CONFIG_SND_SOC_TEGRA=y CONFIG_SND_SOC_TEGRA20_I2S=y +CONFIG_SND_SOC_TEGRA20_SPDIF=y CONFIG_SND_SOC_TEGRA30_I2S=y CONFIG_SND_SOC_TEGRA_RT5640=y CONFIG_SND_SOC_TEGRA_WM8753=y -- 2.33.1
[PATCH] drm/lima: Handle dma_set_coherent_mask error codes
The return value of dma_set_coherent_mask() is not always 0.
To catch the exception in case that dma is not support the mask.
Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/lima/lima_device.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/lima/lima_device.c
b/drivers/gpu/drm/lima/lima_device.c
index 65fdca366e41..75e9a2060b47 100644
--- a/drivers/gpu/drm/lima/lima_device.c
+++ b/drivers/gpu/drm/lima/lima_device.c
@@ -356,7 +356,9 @@ int lima_device_init(struct lima_device *ldev)
struct platform_device *pdev = to_platform_device(ldev->dev);
int err, i;
- dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
+ err = dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
+ if (err)
+ return err;
err = lima_clk_init(ldev);
if (err)
--
2.25.1
[PATCH v4 20/22] ARM: tegra: Add HDMI audio graph to Tegra20 device-tree
Add HDMI audio graph to Tegra20 device-tree to enable HDMI audio on
Tegra20 devices.
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 72cbe32d0c1d..dde228bcbbff 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -186,7 +186,7 @@ rgb {
};
};
- hdmi@5428 {
+ tegra_hdmi: hdmi@5428 {
compatible = "nvidia,tegra20-hdmi";
reg = <0x5428 0x0004>;
interrupts = ;
@@ -1063,4 +1063,24 @@ pmu {
interrupt-affinity = <&{/cpus/cpu@0}>,
<&{/cpus/cpu@1}>;
};
+
+ sound-hdmi {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "NVIDIA Tegra20 HDMI";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ simple-audio-card,dai-link@0 {
+ reg = <0>;
+
+ cpu {
+ sound-dai = <&tegra_spdif>;
+ };
+
+ codec {
+ sound-dai = <&tegra_hdmi>;
+ };
+ };
+ };
};
--
2.33.1
[PATCH v4 00/22] Support HDMI audio on NVIDIA Tegra20
This series revives Tegra20 S/PDIF driver which was upstreamed long time ago, but never was used. It also turns Tegra DRM HDMI driver into HDMI audio CODEC provider. Finally, HDMI audio is enabled in device-trees. For now the audio is enable only for Acer A500 tablet and Toshiba AC100 netbook because they're already supported by upstream, later on ASUS TF101 tablet will join them. I based S/PDIF patches on Arnd's Bergmann patch from a separate series [1] that removes obsolete slave_id. This eases merging of the patches by removing the merge conflict. This is a note for Mark Brown. I also based this series on top of power management series [2]. I.e. [2] should be applied first, otherwise "Add S/PDIF node to Tegra20 device-tree" patch should have merge conflict. This is a note for Thierry. [1] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=273312 [2] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=274534 Changelog: v4: - Added patches that update multi_v7_defconfig with the enabled S/PDIF and APB DMA drivers. v3: - Renamed S/PDIF device-tree clocks as was suggested by Rob Herring. - Added r-bs and acks that were given by Rob Herring to v2. v2: - Corrected I2S yaml problem that was reported by the DT bot for v1 by removing the non-existent required clock-names property. - Removed assigned-clocks property from S/PDIF yaml since this property is now inherited from the clocks property. - Reordered the "tegra20: spdif: Set FIFO trigger level" patch, making it the first sound/soc patch in the series, like it was suggested by Mark Brown in the comment to v1. Also reworded commit message of this patch to *not* make it looks like it should be backported to stable kernels. Arnd Bergmann (1): ASoC: tegra20-spdif: stop setting slave_id Dmitry Osipenko (21): ASoC: dt-bindings: Add binding for Tegra20 S/PDIF ASoC: dt-bindings: tegra20-i2s: Convert to schema ASoC: dt-bindings: tegra20-i2s: Document new nvidia,fixed-parent-rate property dt-bindings: host1x: Document optional HDMI sound-dai-cells ASoC: tegra20: spdif: Set FIFO trigger level ASoC: tegra20: spdif: Support device-tree ASoC: tegra20: spdif: Improve driver's code ASoC: tegra20: spdif: Use more resource-managed helpers ASoC: tegra20: spdif: Reset hardware ASoC: tegra20: spdif: Support system suspend ASoC: tegra20: spdif: Filter out unsupported rates ASoC: tegra20: i2s: Filter out unsupported rates drm/tegra: hdmi: Unwind tegra_hdmi_init() errors drm/tegra: hdmi: Register audio CODEC on Tegra20 ARM: tegra_defconfig: Enable S/PDIF driver ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver ARM: tegra: Add S/PDIF node to Tegra20 device-tree ARM: tegra: Add HDMI audio graph to Tegra20 device-tree ARM: tegra: acer-a500: Enable S/PDIF and HDMI audio ARM: tegra: paz00: Enable S/PDIF and HDMI audio .../display/tegra/nvidia,tegra20-host1x.txt | 1 + .../bindings/sound/nvidia,tegra20-i2s.txt | 30 --- .../bindings/sound/nvidia,tegra20-i2s.yaml| 77 +++ .../bindings/sound/nvidia,tegra20-spdif.yaml | 85 .../boot/dts/tegra20-acer-a500-picasso.dts| 8 + arch/arm/boot/dts/tegra20-paz00.dts | 8 + arch/arm/boot/dts/tegra20.dtsi| 40 +++- arch/arm/configs/multi_v7_defconfig | 2 + arch/arm/configs/tegra_defconfig | 1 + drivers/gpu/drm/tegra/Kconfig | 3 + drivers/gpu/drm/tegra/hdmi.c | 168 +-- sound/soc/tegra/tegra20_i2s.c | 49 + sound/soc/tegra/tegra20_spdif.c | 197 -- sound/soc/tegra/tegra20_spdif.h | 1 + sound/soc/tegra/tegra_pcm.c | 6 + sound/soc/tegra/tegra_pcm.h | 1 + 16 files changed, 574 insertions(+), 103 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.yaml create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml -- 2.33.1
Re: 5.15 regression: CONFIG_SYSFB_SIMPLEFB breaks console scrolling
Hi, this is your Linux kernel regression tracker speaking. On 03.12.21 12:20, Javier Martinez Canillas wrote: > Sorry for the late reply. > > On 11/21/21 12:47, Thorsten Leemhuis wrote: >> Hi, this is your Linux kernel regression tracker speaking. >> >> On 16.11.21 05:52, Harald Dunkel wrote: >>> >>> if I enable CONFIG_SYSFB_SIMPLEFB in 5.15.2 and use grub's default >>> configuration >>> (Debian sid amd64), then a few lines at the bottom of /dev/tty1 including >>> login prompt are off-screen. Scrolling is broken. I can login, though. >>> >>> Enabling GRUB_TERMINAL=console in grub doesn't make a difference. Using >>> the same kernel except for CONFIG_SYSFB_SIMPLEFB the problem is gone. >>> >>> Graphics card is a GeForce GTX 1650. I tried with both CONFIG_DRM_NOUVEAU >>> and proprietary graphics drivers disabled. >>> >>> Attached you can find the config file. Please mail if I can help to track >>> this problem down. >> >> Thx for the report. I'm not totally sure if this is a regression, as >> that's a new config option. But it might be one considered a successor >> to an older one, hence it might count as regression. Adding two >> developers and a mailing list to the CC, hopefully someone can clarify. > > I don't think this is a regression since enabling CONFIG_SYSFB_SIMPLEFB will > make the simpledrm driver to be bound while disabling the option makes the > efifb driver to be bound instead. > Yes, it seems to be a bug in the simpledrm driver but the solution if you > have issues with the simpledrm is to not enable CONFIG_SYSFB_SIMPLEFB and > keep using the old fbdev driver. Mandy thx for the answer, Javier. Harald is quiet for some time already and didn't object so far, hence I'll remove this from regzbot: #regzbot invalid: problem caused by a new CONFIG option Ciao, Thorsten P.S.: As a Linux kernel regression tracker I'm getting a lot of reports on my table. I can only look briefly into most of them. Unfortunately therefore I sometimes will get things wrong or miss something important. I hope that's not the case here; if you think it is, don't hesitate to tell me about it in a public reply. That's in everyone's interest, as what I wrote above might be misleading to everyone reading this; any suggestion I gave they thus might sent someone reading this down the wrong rabbit hole, which none of us wants. BTW, I have no personal interest in this issue, which is tracked using regzbot, my Linux kernel regression tracking bot (https://linux-regtracking.leemhuis.info/regzbot/). I'm only posting this mail to get things rolling again and hence don't need to be CC on all further activities wrt to this regression.
[PATCH v4 17/22] ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver
Enable Tegra20 S/PDIF driver that is a part of HDMI audio subsystem. Signed-off-by: Dmitry Osipenko --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 3d509bc13444..172838566ecd 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -762,6 +762,7 @@ CONFIG_SND_SOC_STM32_DFSDM=m CONFIG_SND_SUN4I_CODEC=m CONFIG_SND_SOC_TEGRA=m CONFIG_SND_SOC_TEGRA20_I2S=m +CONFIG_SND_SOC_TEGRA20_SPDIF=m CONFIG_SND_SOC_TEGRA30_I2S=m CONFIG_SND_SOC_TEGRA_RT5640=m CONFIG_SND_SOC_TEGRA_WM8753=m -- 2.33.1
[PATCH v5 04/11] drm/i915/gt: Use to_gt() helper
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Singed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c| 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 12 ++--
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/gt/mock_engine.c | 10 +-
drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_engine.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_engine_cs.c| 4 ++--
drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_execlists.c| 6 +++---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c| 8
drivers/gpu/drm/i915/gt/selftest_hangcheck.c| 2 +-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_migrate.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_reset.c| 2 +-
drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +++---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 6 +++---
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 4 ++--
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c | 2 +-
23 files changed, 46 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 8f8bea08e734..9ce85a845105 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -116,7 +116,7 @@ static void set_scheduler_caps(struct drm_i915_private
*i915)
disabled |= (I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY);
- if (intel_uc_uses_guc_submission(&i915->gt.uc))
+ if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
enabled |= I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP;
for (i = 0; i < ARRAY_SIZE(map); i++) {
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 110d3944f9a2..80f78d58aa2e 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1229,7 +1229,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915)
{
int ret;
- ret = ggtt_probe_hw(&i915->ggtt, &i915->gt);
+ ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915));
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
index 07ff7ba7b2b7..36eb980d757e 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -2302,7 +2302,7 @@ unsigned long i915_read_mch_val(void)
return 0;
with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
- struct intel_ips *ips = &i915->gt.rps.ips;
+ struct intel_ips *ips = &to_gt(i915)->rps.ips;
spin_lock_irq(&mchdev_lock);
chipset_val = __ips_chipset_val(ips);
@@ -2329,7 +2329,7 @@ bool i915_gpu_raise(void)
if (!i915)
return false;
- rps = &i915->gt.rps;
+ rps = &to_gt(i915)->rps;
spin_lock_irq(&mchdev_lock);
if (rps->max_freq_softlimit < rps->max_freq)
@@ -2356,7 +2356,7 @@ bool i915_gpu_lower(void)
if (!i915)
return false;
- rps = &i915->gt.rps;
+ rps = &to_gt(i915)->rps;
spin_lock_irq(&mchdev_lock);
if (rps->max_freq_softlimit > rps->min_freq)
@@ -2382,7 +2382,7 @@ bool i915_gpu_busy(void)
if (!i915)
return false;
- ret = i915->gt.awake;
+ ret = to_gt(i915)->awake;
drm_dev_put(&i915->drm);
return ret;
@@ -2405,11 +2405,11 @@ bool i915_gpu_turbo_disable(void)
if (!i915)
return false;
- rps = &i915->gt.rps;
+ rps = &to_gt(i915)->rps;
spin_lock_irq(&mchdev_lock);
rps->max_freq_softlimit = rps->min_freq;
- ret = !__gen5_rps_set(&i915->gt.rps, rps->min_freq);
+ ret = !__gen5_rps_set(&to_gt(i915)->rps, rps->min_freq);
spin_unlock_irq(&mchdev_lock);
drm_dev_put(&i915->drm);
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3113266c286e..ab3277a3d593 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -929,7 +929,7 @@ hsw_gt_workarounds_init(struct intel_gt *gt, struct
i915_wa_
[PATCH v4 04/22] dt-bindings: host1x: Document optional HDMI sound-dai-cells
Document new optional sound-dai-cells property of HDMI node. This node will be used as endpoint of HDMI sound DAI graph. Acked-by: Rob Herring Signed-off-by: Dmitry Osipenko --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index e61999ce54e9..27b746f28f31 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -297,6 +297,7 @@ of the following host1x client modules: - nvidia,edid: supplies a binary EDID blob - nvidia,panel: phandle of a display panel - operating-points-v2: See ../bindings/opp/opp.txt for details. + - #sound-dai-cells: Should be 0. - tvo: TV encoder output -- 2.33.1
RE: [v3 0/3] Introduce Raptor Lake S
> -Original Message- > From: Tvrtko Ursulin > Sent: Friday, December 3, 2021 2:57 PM > To: Srivatsa, Anusha ; intel- > g...@lists.freedesktop.org > Cc: x...@kernel.org; dri-devel@lists.freedesktop.org; Ingo Molnar > ; Borislav Petkov ; Dave Hansen > ; Joonas Lahtinen > ; Nikula, Jani > Subject: Re: [v3 0/3] Introduce Raptor Lake S > > > On 03/12/2021 06:35, Anusha Srivatsa wrote: > > Raptor Lake S(RPL-S) is a version 12 > > Display, Media and Render. For all i915 purposes it is the same as > > Alder Lake S (ADL-S). > > > > The series introduces it as a subplatform of ADL-S. The one difference > > is the GuC submission which is default on RPL-S but was not the case > > with ADL-S. > > As a side note, not a blocker of any kind, I am slightly disheartened but the > confusion of ADL_P and ADL_S being separate platforms, but then RPL_S is > subplatform of ADL_S. Maybe it is just me not being able to keep track of > things. > > > All patches are reviewed. Jani has acked the series. > > Looking for other acks in order to merge these to respective branches. > > Which branches would that be for this series? First two to drm-intel-next and > last one to drm-intel-gt-next? Is that complication needed and/or worth the > effort? Tvrtko, All three have to land to drm-intel-next. The last one has dependency on the first patch and is a trivial change. Anusha > Regards, > > Tvrtko > > > Cc: x...@kernel.org > > Cc: dri-devel@lists.freedesktop.org > > Cc: Ingo Molnar > > Cc: Borislav Petkov > > Cc: Dave Hansen > > Cc: Joonas Lahtinen > > Cc: Tvrtko Ursulin > > Acked-by: Jani Nikula > > > > Anusha Srivatsa (3): > >drm/i915/rpl-s: Add PCI IDS for Raptor Lake S > >drm/i915/rpl-s: Add PCH Support for Raptor Lake S > >drm/i915/rpl-s: Enable guc submission by default > > > > arch/x86/kernel/early-quirks.c | 1 + > > drivers/gpu/drm/i915/gt/uc/intel_uc.c| 2 +- > > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > > drivers/gpu/drm/i915/i915_pci.c | 1 + > > drivers/gpu/drm/i915/intel_device_info.c | 7 +++ > > drivers/gpu/drm/i915/intel_device_info.h | 3 +++ > > drivers/gpu/drm/i915/intel_pch.c | 1 + > > drivers/gpu/drm/i915/intel_pch.h | 1 + > > include/drm/i915_pciids.h| 9 + > > 9 files changed, 26 insertions(+), 1 deletion(-) > >
Re: [PATCH v1 2/4] ARM: dts: imx6dl-prtvt7: Add missing tvp5150 video decoder node
On Mon, Nov 22, 2021 at 01:43:08PM +0100, Oleksij Rempel wrote:
> From: Robin van der Gracht
>
> Signed-off-by: Robin van der Gracht
> ---
> arch/arm/boot/dts/imx6dl-prtvt7.dts | 40 +
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6dl-prtvt7.dts
> b/arch/arm/boot/dts/imx6dl-prtvt7.dts
> index be7c4cb339e7..02b53df03e6f 100644
> --- a/arch/arm/boot/dts/imx6dl-prtvt7.dts
> +++ b/arch/arm/boot/dts/imx6dl-prtvt7.dts
> @@ -6,6 +6,7 @@
> /dts-v1/;
> #include "imx6dl.dtsi"
> #include "imx6qdl-prti6q.dtsi"
> +#include
> #include
> #include
> #include
> @@ -171,6 +172,18 @@ panel_in: endpoint {
> };
> };
>
> + connector {
> + compatible = "composite-video-connector";
> + label = "Composite0";
> + sdtv-standards = ;
> +
> + port {
> + comp0_out: endpoint {
> + remote-endpoint = <&tvp5150_comp0_in>;
> + };
> + };
> + };
> +
> reg_bl_12v0: regulator-bl-12v0 {
> compatible = "regulator-fixed";
> pinctrl-names = "default";
> @@ -295,6 +308,29 @@ sgtl5000: audio-codec@a {
> VDDIO-supply = <®_3v3>;
> VDDD-supply = <®_1v8>;
> };
> +
> + video@5c {
> + compatible = "ti,tvp5150";
> + reg = <0x5c>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
Have a newline between property and child node.
Shawn
> + tvp5150_comp0_in: endpoint {
> + remote-endpoint = <&comp0_out>;
> + };
> + };
> +
> + /* Output port 2 is video output pad */
> + port@2 {
> + reg = <2>;
> + tvp5151_to_ipu1_csi0_mux: endpoint {
> + remote-endpoint =
> <&ipu1_csi0_mux_from_parallel_sensor>;
> + };
> + };
> + };
> };
>
> &i2c3 {
> @@ -322,6 +358,10 @@ &ipu1_di0_disp0 {
> remote-endpoint = <&display_in>;
> };
>
> +&ipu1_csi0_mux_from_parallel_sensor {
> + remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
> +};
> +
> &pwm1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pwm1>;
> --
> 2.30.2
>
[Bug 215223] New: AMDGPU Driver with Radeon RX 6700 sometimes can not find display
https://bugzilla.kernel.org/show_bug.cgi?id=215223 Bug ID: 215223 Summary: AMDGPU Driver with Radeon RX 6700 sometimes can not find display Product: Drivers Version: 2.5 Kernel Version: 5.15.6 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-...@kernel-bugs.osdl.org Reporter: reznov90...@gmail.com Regression: No Created attachment 299899 --> https://bugzilla.kernel.org/attachment.cgi?id=299899&action=edit Xorg log I have a problem with RX6700 connected to monitor using display port. It happens in 60% cases, while kernel booting i see some init messages and get black screen without signal, so i need to reset my system. As i understand, this happens because AMDGPU can not find current display, connected to display port. >(WW) AMDGPU(0): No outputs definitely connected, trying again... If system is booting, i haven't got any problems. I can watch videos (with HW acceleration) or playing games. I have also tested on 5.13.x kernel with same result. When i try to load Windows, i haven't got this problem. What's more strange, that connecting to HDMI solves this problem and linux kernel proper initialize my display. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[PATCH] omapdrm: dss: mark runtime PM functions __maybe_unused
From: Arnd Bergmann
Using the SET_RUNTIME_PM_OPS() macro causes a warning about the
referenced functions when they are marked static but not __maybe_unused:
drivers/gpu/drm/omapdrm/dss/dss.c:1572:12: error: unused function
'dss_runtime_suspend' [-Werror,-Wunused-function]
drivers/gpu/drm/omapdrm/dss/dss.c:1584:12: error: unused function
'dss_runtime_resume' [-Werror,-Wunused-function]
drivers/gpu/drm/omapdrm/dss/dispc.c:4845:12: error: unused function
'dispc_runtime_suspend' [-Werror,-Wunused-function]
drivers/gpu/drm/omapdrm/dss/dispc.c:4860:12: error: unused function
'dispc_runtime_resume' [-Werror,-Wunused-function]
Fixes: b92f7ea556f8 ("drm/omap: dss: Make use of the helper macro
SET_RUNTIME_PM_OPS()")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/omapdrm/dss/dispc.c | 4 ++--
drivers/gpu/drm/omapdrm/dss/dsi.c | 4 ++--
drivers/gpu/drm/omapdrm/dss/dss.c | 4 ++--
drivers/gpu/drm/omapdrm/dss/venc.c | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index b440147ae28b..ab259efe132b 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -4842,7 +4842,7 @@ static int dispc_remove(struct platform_device *pdev)
return 0;
}
-static int dispc_runtime_suspend(struct device *dev)
+static __maybe_unused int dispc_runtime_suspend(struct device *dev)
{
struct dispc_device *dispc = dev_get_drvdata(dev);
@@ -4857,7 +4857,7 @@ static int dispc_runtime_suspend(struct device *dev)
return 0;
}
-static int dispc_runtime_resume(struct device *dev)
+static __maybe_unused int dispc_runtime_resume(struct device *dev)
{
struct dispc_device *dispc = dev_get_drvdata(dev);
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index d730bf67fed9..a6845856cbce 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -5058,7 +5058,7 @@ static int dsi_remove(struct platform_device *pdev)
return 0;
}
-static int dsi_runtime_suspend(struct device *dev)
+static __maybe_unused int dsi_runtime_suspend(struct device *dev)
{
struct dsi_data *dsi = dev_get_drvdata(dev);
@@ -5071,7 +5071,7 @@ static int dsi_runtime_suspend(struct device *dev)
return 0;
}
-static int dsi_runtime_resume(struct device *dev)
+static __maybe_unused int dsi_runtime_resume(struct device *dev)
{
struct dsi_data *dsi = dev_get_drvdata(dev);
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 66db28bfe824..69b3e15b9356 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -1569,7 +1569,7 @@ static void dss_shutdown(struct platform_device *pdev)
DSSDBG("shutdown\n");
}
-static int dss_runtime_suspend(struct device *dev)
+static __maybe_unused int dss_runtime_suspend(struct device *dev)
{
struct dss_device *dss = dev_get_drvdata(dev);
@@ -1581,7 +1581,7 @@ static int dss_runtime_suspend(struct device *dev)
return 0;
}
-static int dss_runtime_resume(struct device *dev)
+static __maybe_unused int dss_runtime_resume(struct device *dev)
{
struct dss_device *dss = dev_get_drvdata(dev);
int r;
diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c
b/drivers/gpu/drm/omapdrm/dss/venc.c
index 508fddd376cf..4480b69ab5a7 100644
--- a/drivers/gpu/drm/omapdrm/dss/venc.c
+++ b/drivers/gpu/drm/omapdrm/dss/venc.c
@@ -879,7 +879,7 @@ static int venc_remove(struct platform_device *pdev)
return 0;
}
-static int venc_runtime_suspend(struct device *dev)
+static __maybe_unused int venc_runtime_suspend(struct device *dev)
{
struct venc_device *venc = dev_get_drvdata(dev);
@@ -889,7 +889,7 @@ static int venc_runtime_suspend(struct device *dev)
return 0;
}
-static int venc_runtime_resume(struct device *dev)
+static __maybe_unused int venc_runtime_resume(struct device *dev)
{
struct venc_device *venc = dev_get_drvdata(dev);
--
2.29.2
Re: [PATCH v2] Revert "drm/fb-helper: improve DRM fbdev emulation device names"
Hi,
On Wed, Oct 20, 2021 at 06:57:40PM +0200, Javier Martinez Canillas wrote:
> This reverts commit b3484d2b03e4c940a9598aa841a52d69729c582a.
>
> That change attempted to improve the DRM drivers fbdev emulation device
> names to avoid having confusing names like "simpledrmdrmfb" in /proc/fb.
>
> But unfortunately, there are user-space programs such as pm-utils that
> match against the fbdev names and so broke after the mentioned commit.
>
> Since the names in /proc/fb are used by tools that consider it an uAPI,
> let's restore the old names even when this lead to silly names like the
> one mentioned above.
I would like to ask about the fate of this patch. It doesn't
seem to have been picked up by anyone, does it?
Thanks,
Johannes
> Fixes: b3484d2b03e4 ("drm/fb-helper: improve DRM fbdev emulation device
> names")
> Reported-by: Johannes Stezenbach
> Signed-off-by: Javier Martinez Canillas
> Reviewed-by: Ville Syrjälä
> ---
>
> Changes in v2:
> - Add a comment explaining that the current /proc/fb names are an uAPI.
> - Add a Fixes: tag so it can be cherry-picked by stable kernels.
> - Add Ville Syrjälä's Reviewed-by tag.
>
> drivers/gpu/drm/drm_fb_helper.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 8e7a124d6c5a..22bf690910b2 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -1743,7 +1743,13 @@ void drm_fb_helper_fill_info(struct fb_info *info,
> sizes->fb_width, sizes->fb_height);
>
> info->par = fb_helper;
> - snprintf(info->fix.id, sizeof(info->fix.id), "%s",
> + /*
> + * The DRM drivers fbdev emulation device name can be confusing if the
> + * driver name also has a "drm" suffix on it. Leading to names such as
> + * "simpledrmdrmfb" in /proc/fb. Unfortunately, it's an uAPI and can't
> + * be changed due user-space tools (e.g: pm-utils) matching against it.
> + */
> + snprintf(info->fix.id, sizeof(info->fix.id), "%sdrmfb",
>fb_helper->dev->driver->name);
>
> }
> --
> 2.31.1
>
>
[PATCH v1 2/2] drm/tegra: Add back arm_iommu_detach_device()
DMA buffers of 2D/3D engines aren't mapped properly when
CONFIG_ARM_DMA_USE_IOMMU=y. The memory management code of Tegra DRM driver
has a longstanding overhaul overdue and it's not obvious where the problem
is in this case. Hence let's add back the old workaround which we already
had sometime before. It explicitly detaches DRM devices from the offending
implicit IOMMU domain. This fixes a completely broken 2d/3d drivers in
case of ARM32 multiplatform kernel config.
Cc: sta...@vger.kernel.org
Fixes: fa6661b7aa0b ("drm/tegra: Optionally attach clients to the IOMMU")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index dc04ce329be3..e9de91a4e7e8 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -22,6 +22,10 @@
#include
#include
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+#include
+#endif
+
#include "dc.h"
#include "drm.h"
#include "gem.h"
@@ -945,6 +949,17 @@ int host1x_client_iommu_attach(struct host1x_client
*client)
struct iommu_group *group = NULL;
int err;
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+ if (client->dev->archdata.mapping) {
+ struct dma_iommu_mapping *mapping =
+ to_dma_iommu_mapping(client->dev);
+ arm_iommu_detach_device(client->dev);
+ arm_iommu_release_mapping(mapping);
+
+ domain = iommu_get_domain_for_dev(client->dev);
+ }
+#endif
+
/*
* If the host1x client is already attached to an IOMMU domain that is
* not the shared IOMMU domain, don't try to attach it to a different
--
2.33.1
[PATCH v4 06/22] ASoC: tegra20-spdif: stop setting slave_id
From: Arnd Bergmann The DMA resource is never set up anywhere, and passing this as slave_id has not been the proper procedure in a long time. As a preparation for removing all slave_id references from the ALSA code, remove this one. According to Dmitry Osipenko, this driver has never been used and the mechanism for configuring DMA would not work as it is implemented, so this part will get rewritten when the driver gets put into use again in the future. Reviewed-by: Dmitry Osipenko Signed-off-by: Arnd Bergmann --- sound/soc/tegra/tegra20_spdif.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c index 6f0570cde964..e45e371edc42 100644 --- a/sound/soc/tegra/tegra20_spdif.c +++ b/sound/soc/tegra/tegra20_spdif.c @@ -298,7 +298,6 @@ static int tegra20_spdif_platform_probe(struct platform_device *pdev) spdif->playback_dma_data.addr = mem->start + TEGRA20_SPDIF_DATA_OUT; spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; spdif->playback_dma_data.maxburst = 4; - spdif->playback_dma_data.slave_id = dmareq->start; pm_runtime_enable(&pdev->dev); -- 2.33.1
[PATCH v2 1/3] drm/ast: Handle failed I2C initialization gracefully
I2C initialization is allowed to fail. In this case, create a connector
without DDC adapter. The current code would dereference a NULL pointer.
Reading the modes from the connector is supposed to work without I2C
adapter. Add the respective test.
v2:
* init edid to NULL to avoid uninitialized read
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 1e30eaeb0e1b..692e7a3b3555 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -1210,9 +1210,9 @@ static int ast_get_modes(struct drm_connector *connector)
{
struct ast_connector *ast_connector = to_ast_connector(connector);
struct ast_private *ast = to_ast_private(connector->dev);
- struct edid *edid;
- int ret;
+ struct edid *edid = NULL;
bool flags = false;
+ int ret;
if (ast->tx_chip_type == AST_TX_DP501) {
ast->dp501_maxclk = 0xff;
@@ -1226,7 +1226,7 @@ static int ast_get_modes(struct drm_connector *connector)
else
kfree(edid);
}
- if (!flags)
+ if (!flags && ast_connector->i2c)
edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
if (edid) {
drm_connector_update_edid_property(&ast_connector->base, edid);
@@ -1332,10 +1332,13 @@ static int ast_connector_init(struct drm_device *dev)
if (!ast_connector->i2c)
drm_err(dev, "failed to add ddc bus for connector\n");
- drm_connector_init_with_ddc(dev, connector,
- &ast_connector_funcs,
- DRM_MODE_CONNECTOR_VGA,
- &ast_connector->i2c->adapter);
+ if (ast_connector->i2c)
+ drm_connector_init_with_ddc(dev, connector,
&ast_connector_funcs,
+ DRM_MODE_CONNECTOR_VGA,
+ &ast_connector->i2c->adapter);
+ else
+ drm_connector_init(dev, connector, &ast_connector_funcs,
+ DRM_MODE_CONNECTOR_VGA);
drm_connector_helper_add(connector, &ast_connector_helper_funcs);
--
2.34.1
[PATCH v5 01/11] drm/i915: Store backpointer to GT in uncore
From: Michał Winiarski
We now support a per-gt uncore, yet we're not able to infer which GT
we're operating upon. Let's store a backpointer for now.
Signed-off-by: Michał Winiarski
Signed-off-by: Matt Roper
Reviewed-by: Andi Shyti
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt.c | 11 +++
drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
drivers/gpu/drm/i915/i915_driver.c | 5 +++--
drivers/gpu/drm/i915/intel_uncore.c | 9 +
drivers/gpu/drm/i915/intel_uncore.h | 3 ++-
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 ++--
drivers/gpu/drm/i915/selftests/mock_uncore.c | 2 +-
7 files changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index f2422d48be32..f98f0fb21efb 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -25,11 +25,8 @@
#include "shmem_utils.h"
#include "pxp/intel_pxp.h"
-void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
+void __intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
{
- gt->i915 = i915;
- gt->uncore = &i915->uncore;
-
spin_lock_init(>->irq_lock);
INIT_LIST_HEAD(>->closed_vma);
@@ -48,6 +45,12 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
intel_rps_init_early(>->rps);
}
+void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
+{
+ gt->i915 = i915;
+ gt->uncore = &i915->uncore;
+}
+
int intel_gt_probe_lmem(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 74e771871a9b..3ace129eb2af 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -35,6 +35,7 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc
*huc)
}
void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
+void __intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt);
int intel_gt_probe_lmem(struct intel_gt *gt);
int intel_gt_init_mmio(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index bbc99fc5888f..fb828ef25a03 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -315,8 +315,9 @@ static int i915_driver_early_probe(struct drm_i915_private
*dev_priv)
intel_device_info_subplatform_init(dev_priv);
intel_step_init(dev_priv);
+ intel_gt_init_early(&dev_priv->gt, dev_priv);
intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);
- intel_uncore_init_early(&dev_priv->uncore, dev_priv);
+ intel_uncore_init_early(&dev_priv->uncore, &dev_priv->gt);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
@@ -347,7 +348,7 @@ static int i915_driver_early_probe(struct drm_i915_private
*dev_priv)
intel_wopcm_init_early(&dev_priv->wopcm);
- intel_gt_init_early(&dev_priv->gt, dev_priv);
+ __intel_gt_init_early(&dev_priv->gt, dev_priv);
i915_gem_init_early(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index abdac78d3976..fc25ebf1a593 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2061,12 +2061,13 @@ void intel_uncore_cleanup_mmio(struct intel_uncore
*uncore)
}
void intel_uncore_init_early(struct intel_uncore *uncore,
-struct drm_i915_private *i915)
+struct intel_gt *gt)
{
spin_lock_init(&uncore->lock);
- uncore->i915 = i915;
- uncore->rpm = &i915->runtime_pm;
- uncore->debug = &i915->mmio_debug;
+ uncore->i915 = gt->i915;
+ uncore->gt = gt;
+ uncore->rpm = >->i915->runtime_pm;
+ uncore->debug = >->i915->mmio_debug;
}
static void uncore_raw_init(struct intel_uncore *uncore)
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index d1d17b04e29f..210fe2a71612 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -129,6 +129,7 @@ struct intel_uncore {
void __iomem *regs;
struct drm_i915_private *i915;
+ struct intel_gt *gt;
struct intel_runtime_pm *rpm;
spinlock_t lock; /** lock is also taken in irq contexts. */
@@ -217,7 +218,7 @@ u32 intel_uncore_read_with_mcr_steering(struct intel_uncore
*uncore,
void
intel_uncore_mmio_debug_init_early(struct intel_uncore_mmio_debug *mmio_debug);
void intel_uncore_init_early(struct intel_uncore *uncore,
-struct drm_i915_private *i915);
+
Re: [PATCH] Revert "video: fbdev: amba-clcd: Retire elder CLCD driver"
Hi Peter, [Paging John Stultz on this] On Tue, Sep 29, 2020 at 6:30 PM Peter Collingbourne wrote: > On Tue, Sep 29, 2020 at 2:32 AM Daniel Vetter wrote: > > On Tue, Sep 29, 2020 at 09:28:56AM +0200, Neil Armstrong wrote: > > > Can't Android FVP use drm-hwcomposer instead ? > > Not without kernel changes. See e.g. > https://www.spinics.net/lists/dri-devel/msg255883.html Has this gotten better in the last year+ so you can now use drm-hwcomposer? I.e. can we now delete the fbdev driver? > > Also, if we need to add more random fbdev ioctls to the drm fbdev > > emulation, then let's do that. Not keep fbdev drivers on life support for > > longer than necessary. I wanted to fix this and started to look at it at one point, however the required Android userspace build was a bit intimidating to get going. I would be able to look into this if a prebuilt Android for the emulation model was available. Yours, Linus Walleij
[PATCH v2 2/3] drm/ast: Convert I2C code to managed cleanup
Release the I2C adapter as part of the DRM device cleanup. Remove
ast's dedicated helper for struct drm_connector_funcs.destroy.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 36 +++---
1 file changed, 16 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 692e7a3b3555..abb8a3fdd812 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -40,6 +40,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -48,7 +49,6 @@
#include "ast_tables.h"
static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
-static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
static inline void ast_load_palette_index(struct ast_private *ast,
u8 index, u8 red, u8 green,
@@ -1300,14 +1300,6 @@ static enum drm_mode_status ast_mode_valid(struct
drm_connector *connector,
return flags;
}
-static void ast_connector_destroy(struct drm_connector *connector)
-{
- struct ast_connector *ast_connector = to_ast_connector(connector);
-
- ast_i2c_destroy(ast_connector->i2c);
- drm_connector_cleanup(connector);
-}
-
static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
.get_modes = ast_get_modes,
.mode_valid = ast_mode_valid,
@@ -1316,7 +1308,7 @@ static const struct drm_connector_helper_funcs
ast_connector_helper_funcs = {
static const struct drm_connector_funcs ast_connector_funcs = {
.reset = drm_atomic_helper_connector_reset,
.fill_modes = drm_helper_probe_single_connector_modes,
- .destroy = ast_connector_destroy,
+ .destroy = drm_connector_cleanup,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
@@ -1493,6 +1485,14 @@ static void set_data(void *i2c_priv, int data)
}
}
+static void ast_i2c_release(struct drm_device *dev, void *res)
+{
+ struct ast_i2c_chan *i2c = res;
+
+ i2c_del_adapter(&i2c->adapter);
+ kfree(i2c);
+}
+
static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
{
struct ast_i2c_chan *i2c;
@@ -1521,19 +1521,15 @@ static struct ast_i2c_chan *ast_i2c_create(struct
drm_device *dev)
ret = i2c_bit_add_bus(&i2c->adapter);
if (ret) {
drm_err(dev, "Failed to register bit i2c\n");
- goto out_free;
+ goto out_kfree;
}
+ ret = drmm_add_action_or_reset(dev, ast_i2c_release, i2c);
+ if (ret)
+ return NULL;
return i2c;
-out_free:
- kfree(i2c);
- return NULL;
-}
-static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
-{
- if (!i2c)
- return;
- i2c_del_adapter(&i2c->adapter);
+out_kfree:
kfree(i2c);
+ return NULL;
}
--
2.34.1
[PATCH 2/2] drm: aspeed: select CONFIG_DRM_GEM_CMA_HELPER
From: Arnd Bergmann
The aspeed driver uses the gem_cma_helper code, but does
noto enforce enabling this through Kconfig:
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_drv.o:(.rodata+0x2c8):
undefined reference to `drm_gem_cma_prime_import_sg_table'
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_drv.o:(.rodata+0x2d8):
undefined reference to `drm_gem_cma_dumb_create'
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_crtc.o: in function
`aspeed_gfx_pipe_update':
aspeed_gfx_crtc.c:(.text+0xe5): undefined reference to `drm_fb_cma_get_gem_obj'
Add the same 'select' that is used in other such drivers.
Fixes: 09717af7d13d ("drm: Remove CONFIG_DRM_KMS_CMA_HELPER option")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/aspeed/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/aspeed/Kconfig b/drivers/gpu/drm/aspeed/Kconfig
index 36c4a7e86981..024ccab14f88 100644
--- a/drivers/gpu/drm/aspeed/Kconfig
+++ b/drivers/gpu/drm/aspeed/Kconfig
@@ -5,6 +5,7 @@ config DRM_ASPEED_GFX
depends on (COMPILE_TEST || ARCH_ASPEED)
depends on MMU
select DRM_KMS_HELPER
+ select DRM_GEM_CMA_HELPER
select DMA_CMA if HAVE_DMA_CONTIGUOUS
select CMA if HAVE_DMA_CONTIGUOUS
select MFD_SYSCON
--
2.29.2
[RFC PATCH] drm/panel: Fix panel removal if mipi_dsi_attach fail
If mipi_dsi_attach fail the panel must be removed from panel list
because it get be probed back but later for -EPROBE_DEFER. A lot
of panels are affect on same issue, fix them all
Signed-off-by: Michael Trimarchi
---
drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 6 +-
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 6 +-
drivers/gpu/drm/panel/panel-innolux-p079zca.c | 8 +++-
drivers/gpu/drm/panel/panel-jdi-lt070me05000.c| 6 +-
drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c| 6 +-
drivers/gpu/drm/panel/panel-novatek-nt36672a.c| 6 +-
drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c | 6 +-
drivers/gpu/drm/panel/panel-ronbo-rb070d30.c | 6 +-
drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 6 +-
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 6 +-
drivers/gpu/drm/panel/panel-tdo-tl070wsh30.c | 6 +-
11 files changed, 57 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
index 581661b506f8..585f61cc42f0 100644
--- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
+++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
@@ -227,7 +227,11 @@ static int feiyang_dsi_probe(struct mipi_dsi_device *dsi)
dsi->format = MIPI_DSI_FMT_RGB888;
dsi->lanes = 4;
- return mipi_dsi_attach(dsi);
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0)
+ drm_panel_remove(&ctx->panel);
+
+ return ret;
}
static int feiyang_dsi_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
index 534dd7414d42..9dc6bafec3f3 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
@@ -674,7 +674,11 @@ static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)
dsi->format = MIPI_DSI_FMT_RGB888;
dsi->lanes = 4;
- return mipi_dsi_attach(dsi);
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0)
+ drm_panel_remove(&ctx->panel);
+
+ return ret;
}
static int ili9881c_dsi_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c
b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
index aea316225391..d5abd792f12f 100644
--- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c
+++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
@@ -495,7 +495,13 @@ static int innolux_panel_probe(struct mipi_dsi_device *dsi)
if (err < 0)
return err;
- return mipi_dsi_attach(dsi);
+ err = mipi_dsi_attach(dsi);
+ if (err < 0) {
+ struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi);
+ innolux_panel_del(innolux);
+ }
+
+ return err;
}
static int innolux_panel_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
index 733010b5e4f5..e52b0cc8e081 100644
--- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
+++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
@@ -473,7 +473,11 @@ static int jdi_panel_probe(struct mipi_dsi_device *dsi)
if (ret < 0)
return ret;
- return mipi_dsi_attach(dsi);
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0)
+ jdi_panel_del(jdi);
+
+ return ret;
}
static int jdi_panel_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c
b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c
index 86e4213e8bb1..6e3cd6ea8bf9 100644
--- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c
+++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c
@@ -406,7 +406,11 @@ static int kingdisplay_panel_probe(struct mipi_dsi_device
*dsi)
if (err < 0)
return err;
- return mipi_dsi_attach(dsi);
+ err = mipi_dsi_attach(dsi);
+ if (err < 0)
+ drm_panel_remove(kingdisplay);
+
+ return err;
}
static int kingdisplay_panel_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 533cd3934b8b..ac7a003193c3 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -656,7 +656,11 @@ static int nt36672a_panel_probe(struct mipi_dsi_device
*dsi)
if (err < 0)
return err;
- return mipi_dsi_attach(dsi);
+ err = mipi_dsi_attach(dsi);
+ if (err < 0)
+ drm_panel_remove(&pinfo->base);
+
+ return err;
}
static int nt36672a_panel_remove(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c
b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c
index 3c20beeb1781..552f
[PATCH v5 05/11] drm/i915/gem: Use to_gt() helper
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 22
drivers/gpu/drm/i915/gem/i915_gem_create.c| 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 4 +--
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_phys.c | 6 +++--
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 6 ++---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 3 ++-
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 12 -
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +-
.../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +--
.../i915/gem/selftests/i915_gem_client_blt.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 10 +++
.../drm/i915/gem/selftests/i915_gem_migrate.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_mman.c| 26 ++-
15 files changed, 55 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 347dab952e90..cad3f0b2be9e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -237,7 +237,7 @@ static int proto_context_set_persistence(struct
drm_i915_private *i915,
* colateral damage, and we should not pretend we can by
* exposing the interface.
*/
- if (!intel_has_reset_engine(&i915->gt))
+ if (!intel_has_reset_engine(to_gt(i915)))
return -ENODEV;
pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);
@@ -254,7 +254,7 @@ static int proto_context_set_protected(struct
drm_i915_private *i915,
if (!protected) {
pc->uses_protected_content = false;
- } else if (!intel_pxp_is_enabled(&i915->gt.pxp)) {
+ } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
ret = -ENODEV;
} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
!(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
@@ -268,8 +268,8 @@ static int proto_context_set_protected(struct
drm_i915_private *i915,
*/
pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (!intel_pxp_is_active(&i915->gt.pxp))
- ret = intel_pxp_start(&i915->gt.pxp);
+ if (!intel_pxp_is_active(&to_gt(i915)->pxp))
+ ret = intel_pxp_start(&to_gt(i915)->pxp);
}
return ret;
@@ -571,7 +571,7 @@ set_proto_ctx_engines_parallel_submit(struct
i915_user_extension __user *base,
intel_engine_mask_t prev_mask;
/* FIXME: This is NIY for execlists */
- if (!(intel_uc_uses_guc_submission(&i915->gt.uc)))
+ if (!(intel_uc_uses_guc_submission(&to_gt(i915)->uc)))
return -ENODEV;
if (get_user(slot, &ext->engine_index))
@@ -833,7 +833,7 @@ static int set_proto_ctx_sseu(struct drm_i915_file_private
*fpriv,
sseu = &pc->legacy_rcs_sseu;
}
- ret = i915_gem_user_to_context_sseu(&i915->gt, &user_sseu, sseu);
+ ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu);
if (ret)
return ret;
@@ -1044,7 +1044,7 @@ static struct i915_gem_engines *alloc_engines(unsigned
int count)
static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx,
struct intel_sseu rcs_sseu)
{
- const struct intel_gt *gt = &ctx->i915->gt;
+ const struct intel_gt *gt = to_gt(ctx->i915);
struct intel_engine_cs *engine;
struct i915_gem_engines *e, *err;
enum intel_engine_id id;
@@ -1521,7 +1521,7 @@ static int __context_set_persistence(struct
i915_gem_context *ctx, bool state)
* colateral damage, and we should not pretend we can by
* exposing the interface.
*/
- if (!intel_has_reset_engine(&ctx->i915->gt))
+ if (!intel_has_reset_engine(to_gt(ctx->i915)))
return -ENODEV;
i915_gem_context_clear_persistence(ctx);
@@ -1559,7 +1559,7 @@ i915_gem_create_context(struct drm_i915_private *i915,
} else if (HAS_FULL_PPGTT(i915)) {
struct i915_ppgtt *ppgtt;
- ppgtt = i915_ppgtt_create(&i915->gt, 0);
+ ppgtt = i915_ppgtt_create(to_gt(i915), 0);
if (IS_ERR(ppgtt)) {
drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n",
PTR_ERR(ppgtt));
@@ -1742,7 +1742,7 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void
*data,
if (args->flags)
return -EINVA
[PATCH v5 00/11] More preparation for multi gt patches
Hi, the first patch concludes the first stage of refactoring which makes the use of intel_gt on the different subsystem. It's taken from Matt's series and it has alread been reviewed. The patch has just been replaced before any multitile patches and I think it can be already pushed. Patch 2-10 are a simple abstraction of the i915->gt which now is under the to_gt() wrapper. This part is mostly taken from Michał. Patch 11 changes i915->gt to i915->gt0. Andi Changelog: == Patchwork: https://patchwork.freedesktop.org/series/97020/ v4 -> v5: - use to_gt() instead of to_root_gt() and use Michał work done previously. - split the /i915->gt/to_gt()/ patch in smaller chunks in order to make review easier. (Thanks Lucas) v3 -> v4: - the intel_gt_init_early() has been split as it was causing some headaches for the order of the early initialization. The split has been done keeping in mind the coming next patch in the series that wil make this a static function. v2 -> v3: - sed -i ... took too much freedom and changed more than it was supposed to. - fix a compile error which did not appear in my local build v1 -> v2: - patch 2: do not use anymore the reference i915->gt but use to_root_gt(), coming from Matt Roper's patch. - fix some comments from Chris. Andi Shyti (3): drm/i915/selftests: Use to_gt() helper drm/i915/pxp: Use to_gt() helper drm/i915: Rename i915->gt to i915->gt0 Michał Winiarski (8): drm/i915: Store backpointer to GT in uncore drm/i915: Introduce to_gt() helper drm/i915/display: Use to_gt() helper drm/i915/gt: Use to_gt() helper drm/i915/gem: Use to_gt() helper drm/i915/gvt: Use to_gt() helper drm/i915: Use to_gt() helper drm/i915: Use to_gt() helper for GGTT accesses .../gpu/drm/i915/display/intel_atomic_plane.c | 4 +- drivers/gpu/drm/i915/display/intel_display.c | 18 +++--- drivers/gpu/drm/i915/display/intel_dpt.c | 2 +- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- drivers/gpu/drm/i915/display/intel_overlay.c | 2 +- .../drm/i915/display/intel_plane_initial.c| 2 +- .../drm/i915/display/skl_universal_plane.c| 2 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 22 drivers/gpu/drm/i915/gem/i915_gem_context.h | 2 +- drivers/gpu/drm/i915/gem/i915_gem_create.c| 2 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 6 +- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 +++--- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_pm.c| 8 +-- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 8 +-- drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +- drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 3 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 12 ++-- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +- .../i915/gem/selftests/i915_gem_client_blt.c | 4 +- .../drm/i915/gem/selftests/i915_gem_context.c | 12 ++-- .../drm/i915/gem/selftests/i915_gem_migrate.c | 2 +- .../drm/i915/gem/selftests/i915_gem_mman.c| 42 +++--- .../drm/i915/gem/selftests/i915_gem_object.c | 2 +- drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 ++--- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 6 +- drivers/gpu/drm/i915/gt/intel_gt.c| 11 ++-- drivers/gpu/drm/i915/gt/intel_gt.h| 1 + .../gpu/drm/i915/gt/intel_gt_buffer_pool.c| 7 +-- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 +- drivers/gpu/drm/i915/gt/intel_rps.c | 12 ++-- drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- drivers/gpu/drm/i915/gt/mock_engine.c | 10 ++-- drivers/gpu/drm/i915/gt/selftest_context.c| 2 +- drivers/gpu/drm/i915/gt/selftest_engine.c | 2 +- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 +- .../drm/i915/gt/selftest_engine_heartbeat.c | 4 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 6 +- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 8 +-- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_lrc.c| 2 +- drivers/gpu/drm/i915/gt/selftest_migrate.c| 4 +- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- drivers/gpu/drm/i915/gt/selftest_reset.c | 4 +- .../drm/i915/gt/selftest_ring_submission.c| 4 +- drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +- drivers/gpu/drm/i915/gt/selftest_timeline.c | 6 +- .../gpu/drm/i915/gt/selftest_workarounds.c| 4 +- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +- .../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 2 +- drivers/gpu/drm/i915/gvt/gvt.c| 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 38 ++--- drivers/gpu/drm/i915/i915_debugfs_params.c| 4 +- drivers/gpu/drm/i915/i915_driver.c
[PATCH v5 07/11] drm/i915/selftests: Use to_gt() helper
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Andi Shyti
Cc: Michał Winiarski
---
drivers/gpu/drm/i915/selftests/i915_active.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +-
.../gpu/drm/i915/selftests/i915_gem_evict.c | 6 ++--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +--
drivers/gpu/drm/i915/selftests/i915_perf.c| 2 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 10 +++
.../gpu/drm/i915/selftests/i915_selftest.c| 4 +--
.../gpu/drm/i915/selftests/igt_flush_test.c | 2 +-
.../gpu/drm/i915/selftests/igt_live_test.c| 4 +--
.../drm/i915/selftests/intel_memory_region.c | 4 +--
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 30 +--
drivers/gpu/drm/i915/selftests/mock_gtt.c | 6 ++--
drivers/gpu/drm/i915/selftests/mock_uncore.c | 2 +-
14 files changed, 40 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c
b/drivers/gpu/drm/i915/selftests/i915_active.c
index 61bf4560d8af..2dac9be1de58 100644
--- a/drivers/gpu/drm/i915/selftests/i915_active.c
+++ b/drivers/gpu/drm/i915/selftests/i915_active.c
@@ -254,7 +254,7 @@ int i915_active_live_selftests(struct drm_i915_private
*i915)
SUBTEST(live_active_barrier),
};
- if (intel_gt_is_wedged(&i915->gt))
+ if (intel_gt_is_wedged(to_gt(i915)))
return 0;
return i915_subtests(tests, i915);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c
b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 152d9ab135b1..b5576888cd78 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -248,7 +248,7 @@ int i915_gem_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_gem_ww_ctx),
};
- if (intel_gt_is_wedged(&i915->gt))
+ if (intel_gt_is_wedged(to_gt(i915)))
return 0;
return i915_live_subtests(tests, i915);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 7e0658a77659..75b709c26dd3 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -545,7 +545,7 @@ int i915_gem_evict_mock_selftests(void)
return -ENOMEM;
with_intel_runtime_pm(&i915->runtime_pm, wakeref)
- err = i915_subtests(tests, &i915->gt);
+ err = i915_subtests(tests, to_gt(i915));
mock_destroy_device(i915);
return err;
@@ -557,8 +557,8 @@ int i915_gem_evict_live_selftests(struct drm_i915_private
*i915)
SUBTEST(igt_evict_contexts),
};
- if (intel_gt_is_wedged(&i915->gt))
+ if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, &i915->gt);
+ return intel_gt_live_subtests(tests, to_gt(i915));
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 46f4236039a9..48123c3e1ff0 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -155,7 +155,7 @@ static int igt_ppgtt_alloc(void *arg)
if (!HAS_PPGTT(dev_priv))
return 0;
- ppgtt = i915_ppgtt_create(&dev_priv->gt, 0);
+ ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);
if (IS_ERR(ppgtt))
return PTR_ERR(ppgtt);
@@ -1053,7 +1053,7 @@ static int exercise_ppgtt(struct drm_i915_private
*dev_priv,
if (IS_ERR(file))
return PTR_ERR(file);
- ppgtt = i915_ppgtt_create(&dev_priv->gt, 0);
+ ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0);
if (IS_ERR(ppgtt)) {
err = PTR_ERR(ppgtt);
goto out_free;
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c
b/drivers/gpu/drm/i915/selftests/i915_perf.c
index 9e9a6cb1d9e5..88db2e3d81d0 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -424,7 +424,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915)
if (!perf->metrics_kobj || !perf->ops.enable_metric_set)
return 0;
- if (intel_gt_is_wedged(&i915->gt))
+ if (intel_gt_is_wedged(to_gt(i915)))
return 0;
err = alloc_empty_config(&i915->perf);
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index 9979ef9197cd..92a859b34190 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -841,7 +841,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private
*i915)
__i915_gem_object_flush_map(obj, 0, 64);
i915_gem_object_unpin_map(obj);
- intel_gt_c
[PATCH v5 02/11] drm/i915: Introduce to_gt() helper
From: Michał Winiarski
To allow further refactoring and abstract away the fact that GT is
stored inside i915 private.
No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 7 +--
drivers/gpu/drm/i915/i915_drv.h| 5 +
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index acc49c56a9f3..9db3dcbd917f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -9,11 +9,6 @@
#include "intel_engine_pm.h"
#include "intel_gt_buffer_pool.h"
-static struct intel_gt *to_gt(struct intel_gt_buffer_pool *pool)
-{
- return container_of(pool, struct intel_gt, buffer_pool);
-}
-
static struct list_head *
bucket_for_size(struct intel_gt_buffer_pool *pool, size_t sz)
{
@@ -141,7 +136,7 @@ static struct intel_gt_buffer_pool_node *
node_create(struct intel_gt_buffer_pool *pool, size_t sz,
enum i915_map_type type)
{
- struct intel_gt *gt = to_gt(pool);
+ struct intel_gt *gt = container_of(pool, struct intel_gt, buffer_pool);
struct intel_gt_buffer_pool_node *node;
struct drm_i915_gem_object *obj;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 85bb8d3107f0..d43b08b80b0d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1080,6 +1080,11 @@ static inline struct drm_i915_private
*pdev_to_i915(struct pci_dev *pdev)
return pci_get_drvdata(pdev);
}
+static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
+{
+ return &i915->gt;
+}
+
/* Simple iterator over all initialised engines */
#define for_each_engine(engine__, dev_priv__, id__) \
for ((id__) = 0; \
--
2.34.1
Re: [PATCH v2 0/8] Host1x context isolation support
Will, Joerg, Rob, On 08/11/2021 10:36, Mikko Perttunen wrote: On 9/16/21 5:32 PM, Mikko Perttunen wrote: Hi all, *** New in v2: Added support for Tegra194 Use standard iommu-map property instead of custom mechanism *** this series adds support for Host1x 'context isolation'. Since when programming engines through Host1x, userspace can program in any addresses it wants, we need some way to isolate the engines' memory spaces. Traditionally this has either been done imperfectly with a single shared IOMMU domain, or by copying and verifying the programming command stream at submit time (Host1x firewall). Since Tegra186 there is a privileged (only usable by kernel) Host1x opcode that allows setting the stream ID sent by the engine to the SMMU. So, by allocating a number of context banks and stream IDs for this purpose, and using this opcode at the beginning of each job, we can implement isolation. Due to the limited number of context banks only each process gets its own context, and not each channel. This feature also allows sharing engines among multiple VMs when used with Host1x's hardware virtualization support - up to 8 VMs can be configured with a subset of allowed stream IDs, enforced at hardware level. To implement this, this series adds a new host1x context bus, which will contain the 'struct device's corresponding to each context bank / stream ID, changes to device tree and SMMU code to allow registering the devices and using the bus, as well as the Host1x stream ID programming code and support in TegraDRM. Device tree bindings are not updated yet pending consensus that the proposed changes make sense. Thanks, Mikko Mikko Perttunen (8): gpu: host1x: Add context bus gpu: host1x: Add context device management code gpu: host1x: Program context stream ID on submission iommu/arm-smmu: Attach to host1x context device bus arm64: tegra: Add Host1x context stream IDs on Tegra186+ drm/tegra: falcon: Set DMACTX field on DMA transactions drm/tegra: vic: Implement get_streamid_offset drm/tegra: Support context isolation arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ++ drivers/gpu/Makefile | 3 +- drivers/gpu/drm/tegra/drm.h | 2 + drivers/gpu/drm/tegra/falcon.c | 8 + drivers/gpu/drm/tegra/falcon.h | 1 + drivers/gpu/drm/tegra/submit.c | 13 ++ drivers/gpu/drm/tegra/uapi.c | 34 - drivers/gpu/drm/tegra/vic.c | 38 + drivers/gpu/host1x/Kconfig | 5 + drivers/gpu/host1x/Makefile | 2 + drivers/gpu/host1x/context.c | 174 ++ drivers/gpu/host1x/context.h | 27 drivers/gpu/host1x/context_bus.c | 31 drivers/gpu/host1x/dev.c | 12 +- drivers/gpu/host1x/dev.h | 2 + drivers/gpu/host1x/hw/channel_hw.c | 52 ++- drivers/gpu/host1x/hw/host1x06_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x07_hardware.h | 10 ++ drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 ++ include/linux/host1x.h | 21 +++ include/linux/host1x_context_bus.h | 15 ++ 22 files changed, 488 insertions(+), 9 deletions(-) create mode 100644 drivers/gpu/host1x/context.c create mode 100644 drivers/gpu/host1x/context.h create mode 100644 drivers/gpu/host1x/context_bus.c create mode 100644 include/linux/host1x_context_bus.h IOMMU/DT folks, any thoughts about this approach? The patches that are of interest outside of Host1x/TegraDRM specifics are patches 1, 2, 4, and 5. Any feedback on this? Jon -- nvpublic
[PATCH v2 0/3] ast: Fix I2C corner cases wrt init/cleanup
The VGA connector in ast is supposed to work without I2C. Currently, this isn't implemented correctly in several places. Fix this. Also add managed cleanup of the I2C code and move it into separate source file. Tested on AST2100 hardware. v2: * init edid to NULL to avoid uninitialized read * drop test for drm_connector_init() for now * move I2C code into separate source file Thomas Zimmermann (3): drm/ast: Handle failed I2C initialization gracefully drm/ast: Convert I2C code to managed cleanup drm/ast: Move I2C code into separate source file drivers/gpu/drm/ast/Makefile | 2 +- drivers/gpu/drm/ast/ast_drv.h | 3 + drivers/gpu/drm/ast/ast_i2c.c | 152 + drivers/gpu/drm/ast/ast_mode.c | 151 +++- 4 files changed, 167 insertions(+), 141 deletions(-) create mode 100644 drivers/gpu/drm/ast/ast_i2c.c base-commit: 909bf926eaf382123d9b215871143d9e3cf44aa3 -- 2.34.1
Re: [PATCH 2/2] drm: aspeed: select CONFIG_DRM_GEM_CMA_HELPER
Hi Arnd
Am 04.12.21 um 18:46 schrieb Arnd Bergmann:
From: Arnd Bergmann
The aspeed driver uses the gem_cma_helper code, but does
noto enforce enabling this through Kconfig:
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_drv.o:(.rodata+0x2c8):
undefined reference to `drm_gem_cma_prime_import_sg_table'
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_drv.o:(.rodata+0x2d8):
undefined reference to `drm_gem_cma_dumb_create'
x86_64-linux-ld: drivers/gpu/drm/aspeed/aspeed_gfx_crtc.o: in function
`aspeed_gfx_pipe_update':
aspeed_gfx_crtc.c:(.text+0xe5): undefined reference to `drm_fb_cma_get_gem_obj'
Add the same 'select' that is used in other such drivers.
Fixes: 09717af7d13d ("drm: Remove CONFIG_DRM_KMS_CMA_HELPER option")
Signed-off-by: Arnd Bergmann
Thanks! I've added both patches to drm-misc-next.
Best regards
Thomas
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Ivo Totev
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Description: OpenPGP digital signature
[PATCH v5 03/11] drm/i915/display: Use to_gt() helper
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display.c | 18 +-
drivers/gpu/drm/i915/display/intel_dpt.c | 2 +-
drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
.../gpu/drm/i915/display/skl_universal_plane.c | 2 +-
5 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 27b8f99dd099..39f5c77c63f6 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -818,7 +818,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
* maximum clocks following a vblank miss (see do_rps_boost()).
*/
if (!state->rps_interactive) {
- intel_rps_mark_interactive(&dev_priv->gt.rps, true);
+ intel_rps_mark_interactive(&to_gt(dev_priv)->rps, true);
state->rps_interactive = true;
}
@@ -852,7 +852,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
return;
if (state->rps_interactive) {
- intel_rps_mark_interactive(&dev_priv->gt.rps, false);
+ intel_rps_mark_interactive(&to_gt(dev_priv)->rps, false);
state->rps_interactive = false;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 128d4943a43b..b5cab57a26a6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -841,7 +841,7 @@ __intel_display_resume(struct drm_device *dev,
static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
{
return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
- intel_has_gpu_reset(&dev_priv->gt));
+ intel_has_gpu_reset(to_gt(dev_priv)));
}
void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
@@ -860,14 +860,14 @@ void intel_display_prepare_reset(struct drm_i915_private
*dev_priv)
return;
/* We have a modeset vs reset deadlock, defensively unbreak it. */
- set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+ set_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
smp_mb__after_atomic();
- wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);
+ wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET);
if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) {
drm_dbg_kms(&dev_priv->drm,
"Modeset potentially stuck, unbreaking through
wedging\n");
- intel_gt_set_wedged(&dev_priv->gt);
+ intel_gt_set_wedged(to_gt(dev_priv));
}
/*
@@ -918,7 +918,7 @@ void intel_display_finish_reset(struct drm_i915_private
*dev_priv)
return;
/* reset doesn't touch the display */
- if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+ if (!test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
return;
state = fetch_and_zero(&dev_priv->modeset_restore_state);
@@ -956,7 +956,7 @@ void intel_display_finish_reset(struct drm_i915_private
*dev_priv)
drm_modeset_acquire_fini(ctx);
mutex_unlock(&dev->mode_config.mutex);
- clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+ clear_bit_unlock(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
}
static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state)
@@ -8564,19 +8564,19 @@ static void intel_atomic_commit_fence_wait(struct
intel_atomic_state *intel_stat
for (;;) {
prepare_to_wait(&intel_state->commit_ready.wait,
&wait_fence, TASK_UNINTERRUPTIBLE);
- prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+ prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
I915_RESET_MODESET),
&wait_reset, TASK_UNINTERRUPTIBLE);
if (i915_sw_fence_done(&intel_state->commit_ready) ||
- test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+ test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
break;
schedule();
}
finish_wait(&intel_state->commit_ready.wait, &wait_fence);
- finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+ finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
I915_RESET_MODESET),
&wait_reset);
}
diff --git a/drivers/gpu/drm/i915/displ
[PATCH v5 10/11] drm/i915: Use to_gt() helper for GGTT accesses
From: Michał Winiarski
GGTT is currently available both through i915->ggtt and gt->ggtt, and we
eventually want to get rid of the i915->ggtt one.
Use to_gt() for all i915->ggtt accesses to help with the future
refactoring.
Signed-off-by: Michał Winiarski
Cc: Michal Wajdeczko
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
.../gpu/drm/i915/display/intel_plane_initial.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_context.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 16
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 6 +++---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_client_blt.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_context.c| 2 +-
.../gpu/drm/i915/gem/selftests/i915_gem_mman.c | 16
.../gpu/drm/i915/gem/selftests/i915_gem_object.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 16
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 4 ++--
drivers/gpu/drm/i915/selftests/i915_gem.c| 8
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c| 6 +++---
drivers/gpu/drm/i915/selftests/i915_request.c| 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c| 2 +-
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 6 +++---
26 files changed, 68 insertions(+), 68 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 6efbef7a1fc0..128d62130768 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -595,7 +595,7 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
else if (DISPLAY_VER(i915) == 9)
skl_fbc_program_cfb_stride(fbc);
- if (i915->ggtt.num_fences)
+ if (to_gt(i915)->ggtt->num_fences)
snb_fbc_program_fence(fbc);
intel_de_write(i915, ILK_DPFC_CONTROL,
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
b/drivers/gpu/drm/i915/display/intel_plane_initial.c
index 01ce1d72297f..e4186a0b8edb 100644
--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
@@ -94,7 +94,7 @@ initial_plane_vma(struct drm_i915_private *i915,
goto err_obj;
}
- vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
if (IS_ERR(vma))
goto err_obj;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h
b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index babfecb17ad1..e5b0f66ea1fe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -174,7 +174,7 @@ i915_gem_context_get_eb_vm(struct i915_gem_context *ctx)
vm = ctx->vm;
if (!vm)
- vm = &ctx->i915->ggtt.vm;
+ vm = &to_gt(ctx->i915)->ggtt->vm;
vm = i915_vm_get(vm);
return vm;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index ec7c4a29a720..3078611d5bfe 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1106,7 +1106,7 @@ static inline struct i915_ggtt *cache_to_ggtt(struct
reloc_cache *cache)
{
struct drm_i915_private *i915 =
container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
- return &i915->ggtt;
+ return to_gt(i915)->ggtt;
}
static void reloc_cache_reset(struct reloc_cache *cache, struct
i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 581553f688fd..feff49d169a6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -294,7 +294,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
struct drm_device *dev = obj->base.dev;
struct drm_i915_private *i915 = to_i915(dev);
struct intel_runtime_pm *rpm = &i915->runtime_pm;
- struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
bool write = area->vm_flags & VM_WRITE;
struct i915_gem_ww_ctx ww;
intel_wakeref_t wakeref;
@@ -387,16 +387,16 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
assert_rpm_w
[PATCH v5 09/11] drm/i915: Use to_gt() helper
From: Michał Winiarski
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.
Signed-off-by: Michał Winiarski
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_debugfs.c| 38 +++
drivers/gpu/drm/i915/i915_debugfs_params.c | 4 +-
drivers/gpu/drm/i915/i915_driver.c | 32 ++---
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_gem.c| 16 +++
drivers/gpu/drm/i915/i915_getparam.c | 10 ++--
drivers/gpu/drm/i915/i915_gpu_error.c | 4 +-
drivers/gpu/drm/i915/i915_irq.c| 56 +++---
drivers/gpu/drm/i915/i915_perf.c | 2 +-
drivers/gpu/drm/i915/i915_pmu.c| 14 +++---
drivers/gpu/drm/i915/i915_query.c | 2 +-
drivers/gpu/drm/i915/i915_sysfs.c | 22 -
drivers/gpu/drm/i915/intel_gvt.c | 2 +-
drivers/gpu/drm/i915/intel_wopcm.c | 2 +-
14 files changed, 103 insertions(+), 103 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 390d541f64ea..0783baf5514f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -66,7 +66,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
intel_device_info_print_static(INTEL_INFO(i915), &p);
intel_device_info_print_runtime(RUNTIME_INFO(i915), &p);
i915_print_iommu_status(i915, &p);
- intel_gt_info_print(&i915->gt.info, &p);
+ intel_gt_info_print(&to_gt(i915)->info, &p);
intel_driver_caps_print(&i915->caps, &p);
kernel_param_lock(THIS_MODULE);
@@ -294,7 +294,7 @@ static int i915_gpu_info_open(struct inode *inode, struct
file *file)
gpu = NULL;
with_intel_runtime_pm(&i915->runtime_pm, wakeref)
- gpu = i915_gpu_coredump(&i915->gt, ALL_ENGINES);
+ gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES);
if (IS_ERR(gpu))
return PTR_ERR(gpu);
@@ -352,7 +352,7 @@ static const struct file_operations i915_error_state_fops =
{
static int i915_frequency_info(struct seq_file *m, void *unused)
{
struct drm_i915_private *i915 = node_to_i915(m->private);
- struct intel_gt *gt = &i915->gt;
+ struct intel_gt *gt = to_gt(i915);
struct drm_printer p = drm_seq_file_printer(m);
intel_gt_pm_frequency_dump(gt, &p);
@@ -440,11 +440,11 @@ static int i915_swizzle_info(struct seq_file *m, void
*data)
static int i915_rps_boost_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- struct intel_rps *rps = &dev_priv->gt.rps;
+ struct intel_rps *rps = &to_gt(dev_priv)->rps;
seq_printf(m, "RPS enabled? %s\n", yesno(intel_rps_is_enabled(rps)));
seq_printf(m, "RPS active? %s\n", yesno(intel_rps_is_active(rps)));
- seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake));
+ seq_printf(m, "GPU busy? %s\n", yesno(to_gt(dev_priv)->awake));
seq_printf(m, "Boosts outstanding? %d\n",
atomic_read(&rps->num_waiters));
seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive));
@@ -477,7 +477,7 @@ static int i915_runtime_pm_status(struct seq_file *m, void
*unused)
seq_printf(m, "Runtime power status: %s\n",
enableddisabled(!dev_priv->power_domains.init_wakeref));
- seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake));
+ seq_printf(m, "GPU idle: %s\n", yesno(!to_gt(dev_priv)->awake));
seq_printf(m, "IRQs disabled: %s\n",
yesno(!intel_irqs_enabled(dev_priv)));
#ifdef CONFIG_PM
@@ -509,18 +509,18 @@ static int i915_engine_info(struct seq_file *m, void
*unused)
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
seq_printf(m, "GT awake? %s [%d], %llums\n",
- yesno(i915->gt.awake),
- atomic_read(&i915->gt.wakeref.count),
- ktime_to_ms(intel_gt_get_awake_time(&i915->gt)));
+ yesno(to_gt(i915)->awake),
+ atomic_read(&to_gt(i915)->wakeref.count),
+ ktime_to_ms(intel_gt_get_awake_time(to_gt(i915;
seq_printf(m, "CS timestamp frequency: %u Hz, %d ns\n",
- i915->gt.clock_frequency,
- i915->gt.clock_period_ns);
+ to_gt(i915)->clock_frequency,
+ to_gt(i915)->clock_period_ns);
p = drm_seq_file_printer(m);
for_each_uabi_engine(engine, i915)
intel_engine_dump(engine, &p, "%s\n", engine->name);
- intel_gt_show_timelines(&i915->gt, &p, i915_request_show_with_schedule);
+ intel_gt_show_timelines(to_gt(i915), &p,
i915_request_show_with_schedule);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
@@ -559,14 +559,14 @@ static int i915_wedged_get(voi
[PATCH v2 3/3] drm/ast: Move I2C code into separate source file
Move I2C code into its own source file. Makes the mode-setting
code a little less convoluted.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/Makefile | 2 +-
drivers/gpu/drm/ast/ast_drv.h | 3 +
drivers/gpu/drm/ast/ast_i2c.c | 152 +
drivers/gpu/drm/ast/ast_mode.c | 128 ---
4 files changed, 156 insertions(+), 129 deletions(-)
create mode 100644 drivers/gpu/drm/ast/ast_i2c.c
diff --git a/drivers/gpu/drm/ast/Makefile b/drivers/gpu/drm/ast/Makefile
index 438a2d05b115..21f71160bc3e 100644
--- a/drivers/gpu/drm/ast/Makefile
+++ b/drivers/gpu/drm/ast/Makefile
@@ -3,6 +3,6 @@
# Makefile for the drm device driver. This driver provides support for the
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-ast-y := ast_drv.o ast_main.o ast_mm.o ast_mode.o ast_post.o ast_dp501.o
+ast-y := ast_drv.o ast_i2c.o ast_main.o ast_mm.o ast_mode.o ast_post.o
ast_dp501.o
obj-$(CONFIG_DRM_AST) := ast.o
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index 2cfce7dc95af..00bfa41ff7cb 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -357,4 +357,7 @@ bool ast_dp501_read_edid(struct drm_device *dev, u8
*ediddata);
u8 ast_get_dp501_max_clk(struct drm_device *dev);
void ast_init_3rdtx(struct drm_device *dev);
+/* ast_i2c.c */
+struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
+
#endif
diff --git a/drivers/gpu/drm/ast/ast_i2c.c b/drivers/gpu/drm/ast/ast_i2c.c
new file mode 100644
index ..8e4589d74b21
--- /dev/null
+++ b/drivers/gpu/drm/ast/ast_i2c.c
@@ -0,0 +1,152 @@
+// SPDX-License: MIT
+/*
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+
+#include
+#include
+
+#include "ast_drv.h"
+
+static void ast_i2c_setsda(void *i2c_priv, int data)
+{
+ struct ast_i2c_chan *i2c = i2c_priv;
+ struct ast_private *ast = to_ast_private(i2c->dev);
+ int i;
+ u8 ujcrb7, jtemp;
+
+ for (i = 0; i < 0x1; i++) {
+ ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
+ ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1,
ujcrb7);
+ jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7,
0x04);
+ if (ujcrb7 == jtemp)
+ break;
+ }
+}
+
+static void ast_i2c_setscl(void *i2c_priv, int clock)
+{
+ struct ast_i2c_chan *i2c = i2c_priv;
+ struct ast_private *ast = to_ast_private(i2c->dev);
+ int i;
+ u8 ujcrb7, jtemp;
+
+ for (i = 0; i < 0x1; i++) {
+ ujcrb7 = ((clock & 0x01) ? 0 : 1);
+ ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4,
ujcrb7);
+ jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7,
0x01);
+ if (ujcrb7 == jtemp)
+ break;
+ }
+}
+
+static int ast_i2c_getsda(void *i2c_priv)
+{
+ struct ast_i2c_chan *i2c = i2c_priv;
+ struct ast_private *ast = to_ast_private(i2c->dev);
+ uint32_t val, val2, count, pass;
+
+ count = 0;
+ pass = 0;
+ val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5)
& 0x01;
+ do {
+ val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7,
0x20) >> 5) & 0x01;
+ if (val == val2) {
+ pass++;
+ } else {
+ pass = 0;
+ val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT,
0xb7, 0x20) >> 5) & 0x01;
+ }
+ } while ((pass < 5) && (count++ < 0x1));
+
+ return val & 1 ? 1 : 0;
+}
+
+static int ast_i2c_getscl(void *i2c_priv)
+{
+ struct ast_i2c_chan *i2c = i2c_priv;
+ struct ast_private *ast = to_ast_private(i2c->dev);
+ uint32_t val, val2, count, pass;
+
+ count = 0;
+ pass = 0;
+ val = (
Re: [PATCH v1 4/4] ARM: dts: imx6dl: plym2m, prtvt7, victgo: make use of new resistive-adc-touch driver
On Mon, Nov 22, 2021 at 01:43:10PM +0100, Oleksij Rempel wrote:
> The tsc2046 is an ADC used as touchscreen controller. To share as mach
> code as possible, we should use it as actual ADC + virtual tochscreen
> controller.
> With this patch we make use of the new kernel IIO and HID infrastructure.
>
> Signed-off-by: Oleksij Rempel
One space is enough in subject "victgo: make".
> ---
> arch/arm/boot/dts/imx6dl-plym2m.dts | 55 -
> arch/arm/boot/dts/imx6dl-prtvt7.dts | 53 ---
> arch/arm/boot/dts/imx6dl-victgo.dts | 55 +
> 3 files changed, 120 insertions(+), 43 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6dl-plym2m.dts
> b/arch/arm/boot/dts/imx6dl-plym2m.dts
> index 60fe5f14666e..e2afedae85cb 100644
> --- a/arch/arm/boot/dts/imx6dl-plym2m.dts
> +++ b/arch/arm/boot/dts/imx6dl-plym2m.dts
> @@ -101,6 +101,17 @@ reg_12v0: regulator-12v0 {
> regulator-min-microvolt = <1200>;
> regulator-max-microvolt = <1200>;
> };
> +
> + touchscreen {
> + compatible = "resistive-adc-touch";
> + io-channels = <&adc 1>, <&adc 3>, <&adc 4>, <&adc 5>;
> + io-channel-names = "y", "z1", "z2", "x";
> + touchscreen-min-pressure = <64687>;
> + touchscreen-inverted-x;
> + touchscreen-inverted-y;
> + touchscreen-x-plate-ohms = <300>;
> + touchscreen-y-plate-ohms = <800>;
> + };
> };
>
> &can1 {
> @@ -129,26 +140,38 @@ &ecspi2 {
> pinctrl-0 = <&pinctrl_ecspi2>;
> status = "okay";
>
> - touchscreen@0 {
> - compatible = "ti,tsc2046";
> + adc: adc@0 {
Isn't label name "adc" too generic?
> + compatible = "ti,tsc2046e-adc";
> reg = <0>;
> pinctrl-0 = <&pinctrl_tsc2046>;
> pinctrl-names ="default";
> - spi-max-frequency = <10>;
> - interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
> - pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
> + spi-max-frequency = <100>;
> + interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
> + #io-channel-cells = <1>;
>
> - touchscreen-inverted-x;
> - touchscreen-inverted-y;
> - touchscreen-max-pressure = <4095>;
> -
> - ti,vref-delay-usecs = /bits/ 16 <100>;
> - ti,x-plate-ohms = /bits/ 16 <800>;
> - ti,y-plate-ohms = /bits/ 16 <300>;
> - ti,debounce-max = /bits/ 16 <3>;
> - ti,debounce-tol = /bits/ 16 <70>;
> - ti,debounce-rep = /bits/ 16 <3>;
> - wakeup-source;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + channel@1 {
> + reg = <1>;
> + settling-time-us = <700>;
> + oversampling-ratio = <5>;
> + };
Have a newline between child nodes.
Shawn
> + channel@3 {
> + reg = <3>;
> + settling-time-us = <700>;
> + oversampling-ratio = <5>;
> + };
> + channel@4 {
> + reg = <4>;
> + settling-time-us = <700>;
> + oversampling-ratio = <5>;
> + };
> + channel@5 {
> + reg = <5>;
> + settling-time-us = <700>;
> + oversampling-ratio = <5>;
> + };
> };
> };
>
> diff --git a/arch/arm/boot/dts/imx6dl-prtvt7.dts
> b/arch/arm/boot/dts/imx6dl-prtvt7.dts
> index 02b53df03e6f..c361e0683973 100644
> --- a/arch/arm/boot/dts/imx6dl-prtvt7.dts
> +++ b/arch/arm/boot/dts/imx6dl-prtvt7.dts
> @@ -235,6 +235,17 @@ simple-audio-card,codec {
> frame-master;
> };
> };
> +
> + touchscreen {
> + compatible = "resistive-adc-touch";
> + io-channels = <&adc 1>, <&adc 3>, <&adc 4>, <&adc 5>;
> + io-channel-names = "y", "z1", "z2", "x";
> + touchscreen-min-pressure = <64687>;
> + touchscreen-inverted-x;
> + touchscreen-inverted-y;
> + touchscreen-x-plate-ohms = <300>;
> + touchscreen-y-plate-ohms = <800>;
> + };
> };
>
> &audmux {
> @@ -277,22 +288,38 @@ &ecspi2 {
> pinctrl-0 = <&pinctrl_ecspi2>;
> status = "okay";
>
> - touchscreen@0 {
> - compatible = "ti,tsc2046";
> + adc: adc@0 {
> + compatible = "ti,tsc2046e-adc";
> reg = <0>;
> pinctrl-0 = <&pinctrl_tsc>;
> pinctrl-names ="default";
> - spi-max-frequency = <10>;
> - interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
> - pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
> - touchscreen-max-pressure = <4095>;
> -
Re: [PATCH v5 3/7] drm: sun4i: dsi: Convert to bridge driver
Hi Jagan
@@ -1503,28 +1506,18 @@ static int samsung_dsim_panel_or_bridge(struct
samsung_dsim *dsi,
{
struct drm_bridge *panel_bridge;
struct drm_panel *panel;
- struct device_node *remote;
-
- if (of_graph_is_present(node)) {
- remote = of_graph_get_remote_node(node, DSI_PORT_OUT, 0);
- if (!remote)
- return -ENODEV;
+ int ret;
- node = remote;
- }
+ ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0, &panel,
+ &panel_bridge);
+ if (ret)
+ return ret;
- panel_bridge = of_drm_find_bridge(node);
- if (!panel_bridge) {
- panel = of_drm_find_panel(node);
- if (!IS_ERR(panel)) {
- panel_bridge = drm_panel_bridge_add(panel);
- if (IS_ERR(panel_bridge))
- return PTR_ERR(panel_bridge);
- }
+ if (panel) {
+ panel_bridge = drm_panel_bridge_add(panel);
+ if (IS_ERR(panel_bridge))
+ return PTR_ERR(panel_bridge);
}
-
- of_node_put(node);
-
dsi->out_bridge = panel_bridge;
I need to apply this change to register my panel on imx8mn even mode I
found that
@@ -1594,11 +1587,15 @@ static int samsung_dsim_host_attach(struct
mipi_dsi_host *host,
return ret;
}
- mutex_lock(&drm->mode_config.mutex);
dsi->lanes = device->lanes;
dsi->format = device->format;
dsi->mode_flags = device->mode_flags;
+
+ if (!drm)
+ return 0;
+
+ mutex_lock(&drm->mode_config.mutex);
mode_config is not initialized in this path.
Michael
On Tue, Nov 30, 2021 at 8:39 AM Jagan Teki wrote:
>
> On Fri, Nov 26, 2021 at 9:34 PM Maxime Ripard wrote:
> >
> > On Thu, Nov 25, 2021 at 09:44:14PM +0530, Jagan Teki wrote:
> > > On Thu, Nov 25, 2021 at 9:40 PM Maxime Ripard wrote:
> > > >
> > > > On Thu, Nov 25, 2021 at 07:55:41PM +0530, Jagan Teki wrote:
> > > > > Hi,
> > > > >
> > > > > On Thu, Nov 25, 2021 at 7:45 PM Maxime Ripard
> > > > > wrote:
> > > > > >
> > > > > > On Wed, Nov 24, 2021 at 12:02:47AM +0530, Jagan Teki wrote:
> > > > > > > > > > > > + dsi->panel = of_drm_find_panel(remote);
> > > > > > > > > > > > + if (IS_ERR(dsi->panel)) {
> > > > > > > > > > > > + dsi->panel = NULL;
> > > > > > > > > > > > +
> > > > > > > > > > > > + dsi->next_bridge =
> > > > > > > > > > > > of_drm_find_bridge(remote);
> > > > > > > > > > > > + if (IS_ERR(dsi->next_bridge)) {
> > > > > > > > > > > > + dev_err(dsi->dev, "failed to find
> > > > > > > > > > > > bridge\n");
> > > > > > > > > > > > + return PTR_ERR(dsi->next_bridge);
> > > > > > > > > > > > + }
> > > > > > > > > > > > + } else {
> > > > > > > > > > > > + dsi->next_bridge = NULL;
> > > > > > > > > > > > + }
> > > > > > > > > > > > +
> > > > > > > > > > > > + of_node_put(remote);
> > > > > > > > > > >
> > > > > > > > > > > Using devm_drm_of_get_bridge would greatly simplify the
> > > > > > > > > > > driver
> > > > > > > > > >
> > > > > > > > > > I'm aware of this and this would break the existing sunxi
> > > > > > > > > > dsi binding,
> > > > > > > > > > we are not using ports based pipeline in dsi node.
> > > > > > > > > > Of-course you have
> > > > > > > > > > pointed the same before, please check below
> > > > > > > > > > https://patchwork.kernel.org/project/dri-devel/patch/20210322140152.101709-2-ja...@amarulasolutions.com/
> > > > > > > > >
> > > > > > > > > Then drm_of_find_panel_or_bridge needs to be adjusted to
> > > > > > > > > handle the DSI
> > > > > > > > > bindings and look for a panel or bridge not only through the
> > > > > > > > > OF graph,
> > > > > > > > > but also on the child nodes
> > > > > > > >
> > > > > > > > Okay. I need to check this.
> > > > > > >
> > > > > > > devm_drm_of_get_bridge is not working with legacy binding like
> > > > > > > the one
> > > > > > > used in sun6i dsi
> > > > > >
> > > > > > There's nothing legacy about it.
> > > > >
> > > > > What I'm mean legacy here with current binding used in sun6i-dsi like
> > > > > this.
> > > > >
> > > > > &dsi {
> > > > > vcc-dsi-supply = <®_dcdc1>; /* VCC-DSI */
> > > > > status = "okay";
> > > > >
> > > > > panel@0 {
> > > > >compatible = "bananapi,s070wv20-ct16-icn6211";
> > > > >reg = <0>;
> > > > >reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /*
> > > > > LCD-RST: PL5 */
> > > > > enable-gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>; /*
> > > > > LCD-PWR-EN: PB7 */
> > > > > backlight = <&backlight>;
> > > > > };
> > > > > };
> > > >
> > > > Yes, I know, it's the generic DSI binding. It's still not legacy.
>
[PATCH v5 06/11] drm/i915/gvt: Use to_gt() helper
From: Michał Winiarski Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes. Signed-off-by: Michał Winiarski Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gvt/gvt.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c index cbac409f6c8a..f0b69e4dcb52 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.c +++ b/drivers/gpu/drm/i915/gvt/gvt.c @@ -205,7 +205,7 @@ int intel_gvt_init_device(struct drm_i915_private *i915) spin_lock_init(&gvt->scheduler.mmio_context_lock); mutex_init(&gvt->lock); mutex_init(&gvt->sched_lock); - gvt->gt = &i915->gt; + gvt->gt = to_gt(i915); i915->gvt = gvt; init_device_info(gvt); diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 6c804102528b..42a0c9ae0a73 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -1386,7 +1386,7 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) enum intel_engine_id i; int ret; - ppgtt = i915_ppgtt_create(&i915->gt, I915_BO_ALLOC_PM_EARLY); + ppgtt = i915_ppgtt_create(to_gt(i915), I915_BO_ALLOC_PM_EARLY); if (IS_ERR(ppgtt)) return PTR_ERR(ppgtt); -- 2.34.1
Re: [PATCH 1/6] dt-bindings: display: sitronix, st7735r: Fix backlight in example
On Thu, Nov 25, 2021 at 4:17 PM Noralf Trønnes wrote:
> The backlight property was lost during conversion to yaml in commit
> abdd9e3705c8 ("dt-bindings: display: sitronix,st7735r: Convert to DT schema").
> Put it back.
>
> Fixes: abdd9e3705c8 ("dt-bindings: display: sitronix,st7735r: Convert to DT
> schema")
> Signed-off-by: Noralf Trønnes
Mea culpa
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v5 11/11] drm/i915: Rename i915->gt to i915->gt0
In preparation of the multitile support, highlight the root GT by
calling it gt0 inside the drm i915 private data.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 39a1b5ef64e8..4ab50a04e1fd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1008,7 +1008,7 @@ struct drm_i915_private {
struct i915_perf perf;
/* Abstract the submission mechanism (legacy ringbuffer or execlists)
away */
- struct intel_gt gt;
+ struct intel_gt gt0;
struct {
struct i915_gem_contexts {
@@ -1082,7 +1082,7 @@ static inline struct drm_i915_private
*pdev_to_i915(struct pci_dev *pdev)
static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
{
- return &i915->gt;
+ return &i915->gt0;
}
/* Simple iterator over all initialised engines */
--
2.34.1
[PATCH] drm: make drm_syncobj_array_wait() use the range hrtimer feature
select(), poll() and epoll_wait() all already supports high-precision
timeout handling. This patch makes drm_syncobj_array_wait() to handle
the timeout in high precision using the same heuristics and functions
implemented for select().
Signed-off-by: Tatsuyuki Ishi
---
drivers/gpu/drm/drm_syncobj.c | 75 ---
1 file changed, 44 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index c9a9d74f338c..b2f1631e7dc2 100644
--- a/drivers/gpu/drm/drm_syncobj.c
+++ b/drivers/gpu/drm/drm_syncobj.c
@@ -949,17 +949,30 @@ static void syncobj_wait_syncobj_func(struct drm_syncobj
*syncobj,
list_del_init(&wait->node);
}
-static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj
**syncobjs,
- void __user *user_points,
- uint32_t count,
- uint32_t flags,
- signed long timeout,
- uint32_t *idx)
+static int drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs,
+ void __user *user_points,
+ uint32_t count, uint32_t flags,
+ struct timespec64 *timeout,
+ uint32_t *idx)
{
struct syncobj_wait_entry *entries;
struct dma_fence *fence;
uint64_t *points;
uint32_t signaled_count, i;
+ u64 slack = 0;
+ ktime_t expires, *to = NULL;
+ int ret = 0, timed_out = 0;
+
+ if (timeout->tv_sec | timeout->tv_nsec) {
+ slack = select_estimate_accuracy(timeout);
+ to = &expires;
+ *to = timespec64_to_ktime(*timeout);
+ } else {
+ /*
+* Avoid scheduling a hrtimer wait if timeout is zero.
+*/
+ timed_out = 1;
+ }
if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT)
lockdep_assert_none_held_once();
@@ -973,13 +986,13 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
} else if (copy_from_user(points, user_points,
sizeof(uint64_t) * count)) {
- timeout = -EFAULT;
+ ret = -EFAULT;
goto err_free_points;
}
entries = kcalloc(count, sizeof(*entries), GFP_KERNEL);
if (!entries) {
- timeout = -ENOMEM;
+ ret = -ENOMEM;
goto err_free_points;
}
/* Walk the list of sync objects and initialize entries. We do
@@ -999,7 +1012,7 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) {
continue;
} else {
- timeout = -EINVAL;
+ ret = -EINVAL;
goto cleanup_entries;
}
}
@@ -1063,17 +1076,18 @@ static signed long
drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs,
if (signaled_count == count)
goto done_waiting;
- if (timeout == 0) {
- timeout = -ETIME;
+ if (timed_out) {
+ ret = -ETIME;
goto done_waiting;
}
if (signal_pending(current)) {
- timeout = -ERESTARTSYS;
+ ret = -ERESTARTSYS;
goto done_waiting;
}
- timeout = schedule_timeout(timeout);
+ timed_out =
+ !schedule_hrtimeout_range(to, slack, HRTIMER_MODE_ABS);
} while (1);
done_waiting:
@@ -1092,7 +1106,7 @@ static signed long drm_syncobj_array_wait_timeout(struct
drm_syncobj **syncobjs,
err_free_points:
kfree(points);
- return timeout;
+ return ret;
}
/**
@@ -1134,28 +1148,27 @@ static int drm_syncobj_array_wait(struct drm_device
*dev,
struct drm_syncobj_timeline_wait
*timeline_wait,
struct drm_syncobj **syncobjs, bool timeline)
{
- signed long timeout = 0;
+ int ret = 0;
+ struct timespec64 timeout;
uint32_t first = ~0;
if (!timeline) {
- timeout = drm_timeout_abs_to_jiffies(wait->timeout_nsec);
- timeout = drm_syncobj_array_wait_timeout(syncobjs,
-NULL,
-wait->count_handles,
-
Re: [PATCH] drm: Return error codes from struct drm_driver.gem_create_object
On Tue, Nov 30, 2021 at 10:52:55AM +0100, Thomas Zimmermann wrote: > GEM helper libraries use struct drm_driver.gem_create_object to let > drivers override GEM object allocation. On failure, the call returns > NULL. > > Change the semantics to make the calls return a pointer-encoded error. > This aligns the callback with its callers. Fixes the ingenic driver, > which already returns an error pointer. > > Also update the callers to handle the involved types more strictly. > > Signed-off-by: Thomas Zimmermann > --- > There is an alternative patch at [1] that updates the value returned > by ingenics' gem_create_object to NULL. Fixing the interface to return > an errno code is more consistent with the rest of the GEM functions. > > [1] https://lore.kernel.org/dri-devel/2028111522.GD1147@kili/ My fix was already applied and backported to -stable etc... Your patch is not developed against a current tree so you broke it. That's the tricky thing with changing the API because say people wrote their code last week where returning NULL was correct. When they submit their driver upstream, everything will merge and build but it will break at runtime. For now, it's only vc4_create_object() which is broken. regards, dan carpenter
[PATCH v2 0/3] drm/vc4: Support for 30 bits YUV formats
Hi, Here are a few patches adding support for the P030 and the BT709 and BT2020 colorspaces. Let me know what you think, Maxime Changes from v1: - Reworded the format description - Fixed use before initialisation Dave Stevenson (3): drm/fourcc: Add packed 10bit YUV 4:2:0 format drm/vc4: plane: Add support for DRM_FORMAT_P030 drm/vc4: plane: Add support for YUV color encodings and ranges drivers/gpu/drm/drm_fourcc.c| 3 + drivers/gpu/drm/vc4/vc4_plane.c | 199 ++-- drivers/gpu/drm/vc4/vc4_regs.h | 19 ++- include/uapi/drm/drm_fourcc.h | 11 ++ 4 files changed, 193 insertions(+), 39 deletions(-) -- 2.33.1
[PATCH v2 1/3] drm/fourcc: Add packed 10bit YUV 4:2:0 format
From: Dave Stevenson
Adds a format that is 3 10bit YUV 4:2:0 samples packed into
a 32bit work (with 2 spare bits).
Supported on Broadcom BCM2711 chips.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/drm_fourcc.c | 3 +++
include/uapi/drm/drm_fourcc.h | 11 +++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index 25837b1d6639..07741b678798 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -269,6 +269,9 @@ const struct drm_format_info *__drm_format_info(u32 format)
.num_planes = 3, .char_per_block = { 2, 2, 2 },
.block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
.vsub = 0, .is_yuv = true },
+ { .format = DRM_FORMAT_P030,.depth = 0,
.num_planes = 2,
+ .char_per_block = { 4, 8, 0 }, .block_w = { 3, 3, 0 },
.block_h = { 1, 1, 0 },
+ .hsub = 2, .vsub = 2, .is_yuv = true},
};
unsigned int i;
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 7f652c96845b..fc0c1454d275 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -314,6 +314,13 @@ extern "C" {
*/
#define DRM_FORMAT_P016fourcc_code('P', '0', '1', '6') /* 2x2
subsampled Cr:Cb plane 16 bits per channel */
+/* 2 plane YCbCr420.
+ * 3 10 bit components and 2 padding bits packed into 4 bytes.
+ * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
+ * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0
[2:10:10:10:2:10:10:10] little endian
+ */
+#define DRM_FORMAT_P030fourcc_code('P', '0', '3', '0') /* 2x2
subsampled Cr:Cb plane 10 bits per channel packed */
+
/* 3 plane non-subsampled (444) YCbCr
* 16 bits per component, but only 10 bits are used and 6 bits are padded
* index 0: Y plane, [15:0] Y:x [10:6] little endian
@@ -854,6 +861,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
* and UV. Some SAND-using hardware stores UV in a separate tiled
* image from Y to reduce the column height, which is not supported
* with these modifiers.
+ *
+ * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also
+ * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes
+ * wide, but as this is a 10 bpp format that translates to 96 pixels.
*/
#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
--
2.33.1
[PATCH v2 2/3] drm/vc4: plane: Add support for DRM_FORMAT_P030
From: Dave Stevenson
The P030 format, used with the DRM_FORMAT_MOD_BROADCOM_SAND128 modifier,
is a format output by the video decoder on the BCM2711.
Add native support to the KMS planes for that format.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_plane.c | 128
1 file changed, 97 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index ac761c683663..18627b240a55 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -33,6 +33,7 @@ static const struct hvs_format {
u32 hvs; /* HVS_FORMAT_* */
u32 pixel_order;
u32 pixel_order_hvs5;
+ bool hvs5_only;
} hvs_formats[] = {
{
.drm = DRM_FORMAT_XRGB,
@@ -128,6 +129,12 @@ static const struct hvs_format {
.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
},
+ {
+ .drm = DRM_FORMAT_P030,
+ .hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+ .hvs5_only = true,
+ },
};
static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
@@ -762,47 +769,91 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
case DRM_FORMAT_MOD_BROADCOM_SAND128:
case DRM_FORMAT_MOD_BROADCOM_SAND256: {
uint32_t param = fourcc_mod_broadcom_param(fb->modifier);
- u32 tile_w, tile, x_off, pix_per_tile;
-
- hvs_format = HVS_PIXEL_FORMAT_H264;
-
- switch (base_format_mod) {
- case DRM_FORMAT_MOD_BROADCOM_SAND64:
- tiling = SCALER_CTL0_TILING_64B;
- tile_w = 64;
- break;
- case DRM_FORMAT_MOD_BROADCOM_SAND128:
- tiling = SCALER_CTL0_TILING_128B;
- tile_w = 128;
- break;
- case DRM_FORMAT_MOD_BROADCOM_SAND256:
- tiling = SCALER_CTL0_TILING_256B_OR_T;
- tile_w = 256;
- break;
- default:
- break;
- }
if (param > SCALER_TILE_HEIGHT_MASK) {
- DRM_DEBUG_KMS("SAND height too large (%d)\n", param);
+ DRM_DEBUG_KMS("SAND height too large (%d)\n",
+ param);
return -EINVAL;
}
- pix_per_tile = tile_w / fb->format->cpp[0];
- tile = vc4_state->src_x / pix_per_tile;
- x_off = vc4_state->src_x % pix_per_tile;
+ if (fb->format->format == DRM_FORMAT_P030) {
+ hvs_format = HVS_PIXEL_FORMAT_YCBCR_10BIT;
+ tiling = SCALER_CTL0_TILING_128B;
+ } else {
+ hvs_format = HVS_PIXEL_FORMAT_H264;
+
+ switch (base_format_mod) {
+ case DRM_FORMAT_MOD_BROADCOM_SAND64:
+ tiling = SCALER_CTL0_TILING_64B;
+ break;
+ case DRM_FORMAT_MOD_BROADCOM_SAND128:
+ tiling = SCALER_CTL0_TILING_128B;
+ break;
+ case DRM_FORMAT_MOD_BROADCOM_SAND256:
+ tiling = SCALER_CTL0_TILING_256B_OR_T;
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
+ }
/* Adjust the base pointer to the first pixel to be scanned
* out.
+*
+* For P030, y_ptr [31:4] is the 128bit word for the start pixel
+* y_ptr [3:0] is the pixel (0-11) contained within that 128bit
+* word that should be taken as the first pixel.
+* Ditto uv_ptr [31:4] vs [3:0], however [3:0] contains the
+* element within the 128bit word, eg for pixel 3 the value
+* should be 6.
*/
for (i = 0; i < num_planes; i++) {
+ u32 tile_w, tile, x_off, pix_per_tile;
+
+ if (fb->format->format == DRM_FORMAT_P030) {
+ /*
+* Spec says: bits [31:4] of the given address
+* should point to the 128-bit word containing
+* the desired starting pixel, and bits[3:0]
+* should be between 0 and 11, indicating which
+* of the 12-pixels in that 128-bit word is the
+* first pixel
[PATCH v2 3/3] drm/vc4: plane: Add support for YUV color encodings and ranges
From: Dave Stevenson
The BT601/BT709 color encoding and limited vs full
range properties were not being exposed, defaulting
always to BT601 limited range.
Expose the parameters and set the registers appropriately.
Signed-off-by: Dave Stevenson
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_plane.c | 71 +++--
drivers/gpu/drm/vc4/vc4_regs.h | 19 ++---
2 files changed, 82 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 18627b240a55..1155b0beb620 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -623,6 +623,51 @@ static int vc4_plane_allocate_lbm(struct drm_plane_state
*state)
return 0;
}
+/*
+ * The colorspace conversion matrices are held in 3 entries in the dlist.
+ * Create an array of them, with entries for each full and limited mode, and
+ * each supported colorspace.
+ */
+static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = {
+ {
+ /* Limited range */
+ {
+ /* BT601 */
+ SCALER_CSC0_ITR_R_601_5,
+ SCALER_CSC1_ITR_R_601_5,
+ SCALER_CSC2_ITR_R_601_5,
+ }, {
+ /* BT709 */
+ SCALER_CSC0_ITR_R_709_3,
+ SCALER_CSC1_ITR_R_709_3,
+ SCALER_CSC2_ITR_R_709_3,
+ }, {
+ /* BT2020 */
+ SCALER_CSC0_ITR_R_2020,
+ SCALER_CSC1_ITR_R_2020,
+ SCALER_CSC2_ITR_R_2020,
+ }
+ }, {
+ /* Full range */
+ {
+ /* JFIF */
+ SCALER_CSC0_JPEG_JFIF,
+ SCALER_CSC1_JPEG_JFIF,
+ SCALER_CSC2_JPEG_JFIF,
+ }, {
+ /* BT709 */
+ SCALER_CSC0_ITR_R_709_3_FR,
+ SCALER_CSC1_ITR_R_709_3_FR,
+ SCALER_CSC2_ITR_R_709_3_FR,
+ }, {
+ /* BT2020 */
+ SCALER_CSC0_ITR_R_2020_FR,
+ SCALER_CSC1_ITR_R_2020_FR,
+ SCALER_CSC2_ITR_R_2020_FR,
+ }
+ }
+};
+
/* Writes out a full display list for an active plane to the plane's
* private dlist state.
*/
@@ -1018,9 +1063,20 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
/* Colorspace conversion words */
if (vc4_state->is_yuv) {
- vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
- vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
- vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
+ enum drm_color_encoding color_encoding = state->color_encoding;
+ enum drm_color_range color_range = state->color_range;
+ const u32 *ccm;
+
+ if (color_encoding >= DRM_COLOR_ENCODING_MAX)
+ color_encoding = DRM_COLOR_YCBCR_BT601;
+ if (color_range >= DRM_COLOR_RANGE_MAX)
+ color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;
+
+ ccm = colorspace_coeffs[color_range][color_encoding];
+
+ vc4_dlist_write(vc4_state, ccm[0]);
+ vc4_dlist_write(vc4_state, ccm[1]);
+ vc4_dlist_write(vc4_state, ccm[2]);
}
vc4_state->lbm_offset = 0;
@@ -1449,6 +1505,15 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
DRM_MODE_REFLECT_X |
DRM_MODE_REFLECT_Y);
+ drm_plane_create_color_properties(plane,
+ BIT(DRM_COLOR_YCBCR_BT601) |
+ BIT(DRM_COLOR_YCBCR_BT709) |
+ BIT(DRM_COLOR_YCBCR_BT2020),
+ BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
+ BIT(DRM_COLOR_YCBCR_FULL_RANGE),
+ DRM_COLOR_YCBCR_BT709,
+ DRM_COLOR_YCBCR_LIMITED_RANGE);
+
return plane;
}
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 489f921ef44d..7538b84a6dca 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -975,7 +975,10 @@ enum hvs_pixel_format {
#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
#define SCALER_CSC0_ITR_R_601_50x00f0
#define SCALER_CSC0_ITR_R_709_30x00f0
+#define SCALER_CSC0_ITR_R_2020 0x00f0
#define SCALER_CSC0_JPEG_JFIF 0x
+#define SCALER_CSC0_ITR_R_709_3_FR 0x
+#define SCALER_CSC0_ITR_R_2020_FR
Re: [PATCH] omapdrm: dss: mark runtime PM functions __maybe_unused
Hi Arnd,
Thank you for the patch.
On Sun, Dec 05, 2021 at 02:15:56PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Using the SET_RUNTIME_PM_OPS() macro causes a warning about the
> referenced functions when they are marked static but not __maybe_unused:
>
> drivers/gpu/drm/omapdrm/dss/dss.c:1572:12: error: unused function
> 'dss_runtime_suspend' [-Werror,-Wunused-function]
> drivers/gpu/drm/omapdrm/dss/dss.c:1584:12: error: unused function
> 'dss_runtime_resume' [-Werror,-Wunused-function]
> drivers/gpu/drm/omapdrm/dss/dispc.c:4845:12: error: unused function
> 'dispc_runtime_suspend' [-Werror,-Wunused-function]
> drivers/gpu/drm/omapdrm/dss/dispc.c:4860:12: error: unused function
> 'dispc_runtime_resume' [-Werror,-Wunused-function]
>
> Fixes: b92f7ea556f8 ("drm/omap: dss: Make use of the helper macro
> SET_RUNTIME_PM_OPS()")
I wonder how well drivers are tested with !CONFIG_PM. We may be going
through hoops and loops to support this when it actually won't work in
most drivers. That's a separate issue though :-)
Reviewed-by: Laurent Pinchart
Tomi, could you apply this ?
> Signed-off-by: Arnd Bergmann
> ---
> drivers/gpu/drm/omapdrm/dss/dispc.c | 4 ++--
> drivers/gpu/drm/omapdrm/dss/dsi.c | 4 ++--
> drivers/gpu/drm/omapdrm/dss/dss.c | 4 ++--
> drivers/gpu/drm/omapdrm/dss/venc.c | 4 ++--
> 4 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c
> b/drivers/gpu/drm/omapdrm/dss/dispc.c
> index b440147ae28b..ab259efe132b 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dispc.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
> @@ -4842,7 +4842,7 @@ static int dispc_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static int dispc_runtime_suspend(struct device *dev)
> +static __maybe_unused int dispc_runtime_suspend(struct device *dev)
> {
> struct dispc_device *dispc = dev_get_drvdata(dev);
>
> @@ -4857,7 +4857,7 @@ static int dispc_runtime_suspend(struct device *dev)
> return 0;
> }
>
> -static int dispc_runtime_resume(struct device *dev)
> +static __maybe_unused int dispc_runtime_resume(struct device *dev)
> {
> struct dispc_device *dispc = dev_get_drvdata(dev);
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c
> b/drivers/gpu/drm/omapdrm/dss/dsi.c
> index d730bf67fed9..a6845856cbce 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dsi.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
> @@ -5058,7 +5058,7 @@ static int dsi_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static int dsi_runtime_suspend(struct device *dev)
> +static __maybe_unused int dsi_runtime_suspend(struct device *dev)
> {
> struct dsi_data *dsi = dev_get_drvdata(dev);
>
> @@ -5071,7 +5071,7 @@ static int dsi_runtime_suspend(struct device *dev)
> return 0;
> }
>
> -static int dsi_runtime_resume(struct device *dev)
> +static __maybe_unused int dsi_runtime_resume(struct device *dev)
> {
> struct dsi_data *dsi = dev_get_drvdata(dev);
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c
> b/drivers/gpu/drm/omapdrm/dss/dss.c
> index 66db28bfe824..69b3e15b9356 100644
> --- a/drivers/gpu/drm/omapdrm/dss/dss.c
> +++ b/drivers/gpu/drm/omapdrm/dss/dss.c
> @@ -1569,7 +1569,7 @@ static void dss_shutdown(struct platform_device *pdev)
> DSSDBG("shutdown\n");
> }
>
> -static int dss_runtime_suspend(struct device *dev)
> +static __maybe_unused int dss_runtime_suspend(struct device *dev)
> {
> struct dss_device *dss = dev_get_drvdata(dev);
>
> @@ -1581,7 +1581,7 @@ static int dss_runtime_suspend(struct device *dev)
> return 0;
> }
>
> -static int dss_runtime_resume(struct device *dev)
> +static __maybe_unused int dss_runtime_resume(struct device *dev)
> {
> struct dss_device *dss = dev_get_drvdata(dev);
> int r;
> diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c
> b/drivers/gpu/drm/omapdrm/dss/venc.c
> index 508fddd376cf..4480b69ab5a7 100644
> --- a/drivers/gpu/drm/omapdrm/dss/venc.c
> +++ b/drivers/gpu/drm/omapdrm/dss/venc.c
> @@ -879,7 +879,7 @@ static int venc_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static int venc_runtime_suspend(struct device *dev)
> +static __maybe_unused int venc_runtime_suspend(struct device *dev)
> {
> struct venc_device *venc = dev_get_drvdata(dev);
>
> @@ -889,7 +889,7 @@ static int venc_runtime_suspend(struct device *dev)
> return 0;
> }
>
> -static int venc_runtime_resume(struct device *dev)
> +static __maybe_unused int venc_runtime_resume(struct device *dev)
> {
> struct venc_device *venc = dev_get_drvdata(dev);
>
--
Regards,
Laurent Pinchart
Re: [PATCH] drm: Return error codes from struct drm_driver.gem_create_object
Hi Am 06.12.21 um 11:42 schrieb Dan Carpenter: On Tue, Nov 30, 2021 at 10:52:55AM +0100, Thomas Zimmermann wrote: GEM helper libraries use struct drm_driver.gem_create_object to let drivers override GEM object allocation. On failure, the call returns NULL. Change the semantics to make the calls return a pointer-encoded error. This aligns the callback with its callers. Fixes the ingenic driver, which already returns an error pointer. Also update the callers to handle the involved types more strictly. Signed-off-by: Thomas Zimmermann --- There is an alternative patch at [1] that updates the value returned by ingenics' gem_create_object to NULL. Fixing the interface to return an errno code is more consistent with the rest of the GEM functions. [1] https://lore.kernel.org/dri-devel/2028111522.GD1147@kili/ My fix was already applied and backported to -stable etc... Your patch is not developed against a current tree so you broke it. Do you have a specific link? I just checked the stable tree at [1] and there no trace of your patch. Patches for DRM should go through through DRM trees; drm-misc-fixes in this case. Exceptions should at least be announce on dri-devel. Neither is the case here. Best regards Thomas [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/gpu/drm/ingenic/ingenic-drm-drv.c That's the tricky thing with changing the API because say people wrote their code last week where returning NULL was correct. When they submit their driver upstream, everything will merge and build but it will break at runtime. For now, it's only vc4_create_object() which is broken. regards, dan carpenter -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Ivo Totev OpenPGP_signature Description: OpenPGP digital signature
Re: [PATCH v9 00/15] Clean up "mediatek,larb"
On Fri, Nov 12, 2021 at 06:54:54PM +0800, Yong Wu wrote: > Yong Wu (14): > dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW > iommu/mediatek-v1: Free the existed fwspec if the master dev already > has > iommu/mediatek: Return ENODEV if the device is NULL > iommu/mediatek: Add probe_defer for smi-larb > iommu/mediatek: Add device_link between the consumer and the larb > devices > media: mtk-jpeg: Get rid of mtk_smi_larb_get/put > media: mtk-mdp: Get rid of mtk_smi_larb_get/put > drm/mediatek: Get rid of mtk_smi_larb_get/put > media: mtk-vcodec: Get rid of mtk_smi_larb_get/put > media: mtk-vcodec: dec: Remove mtk_vcodec_release_dec_pm > media: mtk-vcodec: enc: Remove mtk_vcodec_release_enc_pm > memory: mtk-smi: Get rid of mtk_smi_larb_get/put > arm: dts: mediatek: Get rid of mediatek, larb for MM nodes > arm64: dts: mediatek: Get rid of mediatek, larb for MM nodes > > Yongqiang Niu (1): > drm/mediatek: Add pm runtime support for ovl and rdma What is the plan for merging this? If Matthias has no objections I can take the iommu-parts, or will this go through another tree? Regards, Joerg
Re: [PATCH v2 1/3] drm/fourcc: Add packed 10bit YUV 4:2:0 format
On Mon, 6 Dec 2021 at 11:01, Maxime Ripard wrote:
>
> From: Dave Stevenson
>
> Adds a format that is 3 10bit YUV 4:2:0 samples packed into
> a 32bit work (with 2 spare bits).
Quite possibly my typo, but
s/work/word
> Supported on Broadcom BCM2711 chips.
>
> Signed-off-by: Dave Stevenson
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/drm_fourcc.c | 3 +++
> include/uapi/drm/drm_fourcc.h | 11 +++
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index 25837b1d6639..07741b678798 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -269,6 +269,9 @@ const struct drm_format_info *__drm_format_info(u32
> format)
> .num_planes = 3, .char_per_block = { 2, 2, 2 },
> .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
> .vsub = 0, .is_yuv = true },
> + { .format = DRM_FORMAT_P030,.depth = 0,
> .num_planes = 2,
> + .char_per_block = { 4, 8, 0 }, .block_w = { 3, 3, 0 },
> .block_h = { 1, 1, 0 },
> + .hsub = 2, .vsub = 2, .is_yuv = true},
> };
>
> unsigned int i;
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 7f652c96845b..fc0c1454d275 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -314,6 +314,13 @@ extern "C" {
> */
> #define DRM_FORMAT_P016fourcc_code('P', '0', '1', '6') /*
> 2x2 subsampled Cr:Cb plane 16 bits per channel */
>
> +/* 2 plane YCbCr420.
> + * 3 10 bit components and 2 padding bits packed into 4 bytes.
> + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
> + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0
> [2:10:10:10:2:10:10:10] little endian
> + */
> +#define DRM_FORMAT_P030fourcc_code('P', '0', '3', '0') /*
> 2x2 subsampled Cr:Cb plane 10 bits per channel packed */
> +
> /* 3 plane non-subsampled (444) YCbCr
> * 16 bits per component, but only 10 bits are used and 6 bits are padded
> * index 0: Y plane, [15:0] Y:x [10:6] little endian
> @@ -854,6 +861,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
> * and UV. Some SAND-using hardware stores UV in a separate tiled
> * image from Y to reduce the column height, which is not supported
> * with these modifiers.
> + *
> + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also
> + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes
> + * wide, but as this is a 10 bpp format that translates to 96 pixels.
> */
>
> #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
> --
> 2.33.1
>
Re: [PATCH v2 3/3] drm/vc4: plane: Add support for YUV color encodings and ranges
On Mon, 6 Dec 2021 at 11:02, Maxime Ripard wrote:
>
> From: Dave Stevenson
Minor note that we've changed to raspberrypi.com instead of .org, but
it currently forwards through anyway. The other two patches have the
.com address.
> The BT601/BT709 color encoding and limited vs full
> range properties were not being exposed, defaulting
> always to BT601 limited range.
>
> Expose the parameters and set the registers appropriately.
>
> Signed-off-by: Dave Stevenson
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/vc4/vc4_plane.c | 71 +++--
> drivers/gpu/drm/vc4/vc4_regs.h | 19 ++---
> 2 files changed, 82 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
> index 18627b240a55..1155b0beb620 100644
> --- a/drivers/gpu/drm/vc4/vc4_plane.c
> +++ b/drivers/gpu/drm/vc4/vc4_plane.c
> @@ -623,6 +623,51 @@ static int vc4_plane_allocate_lbm(struct drm_plane_state
> *state)
> return 0;
> }
>
> +/*
> + * The colorspace conversion matrices are held in 3 entries in the dlist.
> + * Create an array of them, with entries for each full and limited mode, and
> + * each supported colorspace.
> + */
> +static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = {
> + {
> + /* Limited range */
> + {
> + /* BT601 */
> + SCALER_CSC0_ITR_R_601_5,
> + SCALER_CSC1_ITR_R_601_5,
> + SCALER_CSC2_ITR_R_601_5,
> + }, {
> + /* BT709 */
> + SCALER_CSC0_ITR_R_709_3,
> + SCALER_CSC1_ITR_R_709_3,
> + SCALER_CSC2_ITR_R_709_3,
> + }, {
> + /* BT2020 */
> + SCALER_CSC0_ITR_R_2020,
> + SCALER_CSC1_ITR_R_2020,
> + SCALER_CSC2_ITR_R_2020,
> + }
> + }, {
> + /* Full range */
> + {
> + /* JFIF */
> + SCALER_CSC0_JPEG_JFIF,
> + SCALER_CSC1_JPEG_JFIF,
> + SCALER_CSC2_JPEG_JFIF,
> + }, {
> + /* BT709 */
> + SCALER_CSC0_ITR_R_709_3_FR,
> + SCALER_CSC1_ITR_R_709_3_FR,
> + SCALER_CSC2_ITR_R_709_3_FR,
> + }, {
> + /* BT2020 */
> + SCALER_CSC0_ITR_R_2020_FR,
> + SCALER_CSC1_ITR_R_2020_FR,
> + SCALER_CSC2_ITR_R_2020_FR,
> + }
> + }
> +};
> +
> /* Writes out a full display list for an active plane to the plane's
> * private dlist state.
> */
> @@ -1018,9 +1063,20 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
>
> /* Colorspace conversion words */
> if (vc4_state->is_yuv) {
> - vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
> - vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
> - vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
> + enum drm_color_encoding color_encoding =
> state->color_encoding;
> + enum drm_color_range color_range = state->color_range;
> + const u32 *ccm;
> +
> + if (color_encoding >= DRM_COLOR_ENCODING_MAX)
> + color_encoding = DRM_COLOR_YCBCR_BT601;
> + if (color_range >= DRM_COLOR_RANGE_MAX)
> + color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;
> +
> + ccm = colorspace_coeffs[color_range][color_encoding];
> +
> + vc4_dlist_write(vc4_state, ccm[0]);
> + vc4_dlist_write(vc4_state, ccm[1]);
> + vc4_dlist_write(vc4_state, ccm[2]);
> }
>
> vc4_state->lbm_offset = 0;
> @@ -1449,6 +1505,15 @@ struct drm_plane *vc4_plane_init(struct drm_device
> *dev,
>DRM_MODE_REFLECT_X |
>DRM_MODE_REFLECT_Y);
>
> + drm_plane_create_color_properties(plane,
> + BIT(DRM_COLOR_YCBCR_BT601) |
> + BIT(DRM_COLOR_YCBCR_BT709) |
> + BIT(DRM_COLOR_YCBCR_BT2020),
> + BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
> + BIT(DRM_COLOR_YCBCR_FULL_RANGE),
> + DRM_COLOR_YCBCR_BT709,
> + DRM_COLOR_YCBCR_LIMITED_RANGE);
> +
> return plane;
> }
>
> diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
> index 489f921ef44d..7538b84a6dca 100644
> --- a/drivers/gpu/drm/vc4/vc4_regs.h
> +++ b/drivers/gpu/drm/vc4/vc4_regs.h
> @@ -975,7 +975,
Re: [PATCH 1/9] gpu: host1x: Add missing DMA API include
Hi Robin, On Wed, Nov 24, 2021 at 02:05:15PM +, Robin Murphy wrote: > Bah, seems like tegra-vic needs the same treatment too, but wasn't in my > local config. Should I squash that into a respin of this patch on the > grounds of being vaguely related, or would you prefer it separate? In case this fix gets queued in the iommu-tree too, please put it all in one patch. Thanks, Joerg
[syzbot] KASAN: out-of-bounds Write in virtio_gpu_cmd_transfer_to_host_2d
Hello, syzbot found the following issue on: HEAD commit:e66435936756 mm: fix mismerge of folio page flag manipulat.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=14c79e0eb0 kernel config: https://syzkaller.appspot.com/x/.config?x=ca1c2027dfeaf335 dashboard link: https://syzkaller.appspot.com/bug?extid=f01248cf57e6929868e4 compiler: gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2 Unfortunately, I don't have any reproducer for this issue yet. IMPORTANT: if you fix the issue, please add the following tag to the commit: Reported-by: syzbot+f01248cf57e692986...@syzkaller.appspotmail.com R13: 7ffe6190e50f R14: 7f51be874300 R15: 00022000 == BUG: KASAN: out-of-bounds in memset include/linux/fortify-string.h:175 [inline] BUG: KASAN: out-of-bounds in virtio_gpu_cmd_transfer_to_host_2d+0x160/0x4a0 drivers/gpu/drm/virtio/virtgpu_vq.c:618 Write of size 56 at addr fff4 by task syz-executor.1/13670 CPU: 2 PID: 13670 Comm: syz-executor.1 Not tainted 5.15.0-syzkaller #0 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-2 04/01/2014 Call Trace: __dump_stack lib/dump_stack.c:88 [inline] dump_stack_lvl+0xcd/0x134 lib/dump_stack.c:106 print_address_description.constprop.0.cold+0xf/0x2d6 mm/kasan/report.c:256 __kasan_report mm/kasan/report.c:442 [inline] kasan_report.cold+0x83/0xdf mm/kasan/report.c:459 check_region_inline mm/kasan/generic.c:183 [inline] kasan_check_range+0x13d/0x180 mm/kasan/generic.c:189 memset+0x20/0x40 mm/kasan/shadow.c:44 memset include/linux/fortify-string.h:175 [inline] virtio_gpu_cmd_transfer_to_host_2d+0x160/0x4a0 drivers/gpu/drm/virtio/virtgpu_vq.c:618 virtio_gpu_update_dumb_bo drivers/gpu/drm/virtio/virtgpu_plane.c:128 [inline] virtio_gpu_primary_plane_update+0xfcb/0x1650 drivers/gpu/drm/virtio/virtgpu_plane.c:199 drm_atomic_helper_commit_planes+0x332/0xb60 drivers/gpu/drm/drm_atomic_helper.c:2552 drm_atomic_helper_commit_tail+0x62/0xf0 drivers/gpu/drm/drm_atomic_helper.c:1582 commit_tail+0x32d/0x420 drivers/gpu/drm/drm_atomic_helper.c:1667 drm_atomic_helper_commit drivers/gpu/drm/drm_atomic_helper.c:1884 [inline] drm_atomic_helper_commit+0x2eb/0x370 drivers/gpu/drm/drm_atomic_helper.c:1817 drm_atomic_commit+0xd8/0x110 drivers/gpu/drm/drm_atomic.c:1412 drm_client_modeset_commit_atomic+0x685/0x7c0 drivers/gpu/drm/drm_client_modeset.c:1043 drm_client_modeset_commit_locked+0x145/0x580 drivers/gpu/drm/drm_client_modeset.c:1146 drm_client_modeset_commit+0x4d/0x80 drivers/gpu/drm/drm_client_modeset.c:1172 __drm_fb_helper_restore_fbdev_mode_unlocked drivers/gpu/drm/drm_fb_helper.c:252 [inline] __drm_fb_helper_restore_fbdev_mode_unlocked drivers/gpu/drm/drm_fb_helper.c:231 [inline] drm_fb_helper_restore_fbdev_mode_unlocked drivers/gpu/drm/drm_fb_helper.c:279 [inline] drm_fb_helper_lastclose drivers/gpu/drm/drm_fb_helper.c:1997 [inline] drm_fbdev_client_restore+0xe3/0x1a0 drivers/gpu/drm/drm_fb_helper.c:2397 drm_client_dev_restore+0x184/0x290 drivers/gpu/drm/drm_client.c:226 drm_lastclose drivers/gpu/drm/drm_file.c:467 [inline] drm_release+0x441/0x530 drivers/gpu/drm/drm_file.c:498 __fput+0x286/0x9f0 fs/file_table.c:280 task_work_run+0xdd/0x1a0 kernel/task_work.c:164 tracehook_notify_resume include/linux/tracehook.h:189 [inline] exit_to_user_mode_loop kernel/entry/common.c:175 [inline] exit_to_user_mode_prepare+0x27e/0x290 kernel/entry/common.c:207 __syscall_exit_to_user_mode_work kernel/entry/common.c:289 [inline] syscall_exit_to_user_mode+0x19/0x60 kernel/entry/common.c:300 do_syscall_64+0x42/0xb0 arch/x86/entry/common.c:86 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7f51c12b1a04 Code: 84 00 00 00 00 00 44 89 54 24 0c e8 96 f9 ff ff 44 8b 54 24 0c 44 89 e2 48 89 ee 41 89 c0 bf 9c ff ff ff b8 01 01 00 00 0f 05 <48> 3d 00 f0 ff ff 77 34 44 89 c7 89 44 24 0c e8 c8 f9 ff ff 8b 44 RSP: 002b:7f51be873cc0 EFLAGS: 0293 ORIG_RAX: 0101 RAX: ffea RBX: 6667 RCX: 7f51c12b1a04 RDX: ff00 RSI: 7f51be873d60 RDI: ff9c RBP: 7f51be873d60 R08: R09: R10: R11: 0293 R12: ff00 R13: 7ffe6190e50f R14: 7f51be874300 R15: 00022000 Memory state around the buggy address: fe80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >ff80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 general protection fault, maybe for address 0xc9000422f80c: [#1] PREEMPT SMP KASAN CPU: 2 PID: 13670 Comm: syz-executor.1 Not tainted 5.15.0-syzkaller #0 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-2 04/01/2014 RIP: 0010:memcpy_erms+0x6/0x10 arch/x86/lib/memcpy_64.S:55 Code: cc cc cc cc eb 1e 0f 1f 00 48 89 f8 48 89 d1 48 c1
[syzbot] general protection fault in virtio_gpu_array_put_free
Hello, syzbot found the following issue on: HEAD commit:d58071a8a76d Linux 5.16-rc3 git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=11f773f6b0 kernel config: https://syzkaller.appspot.com/x/.config?x=171728a464c05f2b dashboard link: https://syzkaller.appspot.com/bug?extid=e9072e90624a31dfa85f compiler: gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2 Unfortunately, I don't have any reproducer for this issue yet. IMPORTANT: if you fix the issue, please add the following tag to the commit: Reported-by: syzbot+e9072e90624a31dfa...@syzkaller.appspotmail.com general protection fault, probably for non-canonical address 0xdc0e: [#1] PREEMPT SMP KASAN KASAN: null-ptr-deref in range [0x0070-0x0077] CPU: 0 PID: 20114 Comm: syz-executor.3 Not tainted 5.16.0-rc3-syzkaller #0 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-2 04/01/2014 RIP: 0010:virtio_gpu_array_put_free+0x2f/0x190 drivers/gpu/drm/virtio/virtgpu_gem.c:251 Code: 55 49 89 fd 41 54 55 53 48 83 ec 08 e8 5a dd 09 fd 49 8d 45 70 48 89 c2 48 89 04 24 48 b8 00 00 00 00 00 fc ff df 48 c1 ea 03 <0f> b6 04 02 84 c0 74 08 3c 03 0f 8e 21 01 00 00 41 8b 5d 70 31 ff RSP: 0018:c90005a9fa90 EFLAGS: 00010202 RAX: dc00 RBX: RCX: c900262ce000 RDX: 000e RSI: 846cf6e6 RDI: RBP: 88801882b800 R08: R09: c90005a9f9ef R10: 846dcc29 R11: R12: c90005a9fbd0 R13: R14: 888045f6 R15: fff4 FS: 7f4ad9393700() GS:88802ca0() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: 7f561e680558 CR3: 50bde000 CR4: 00150ef0 DR0: DR1: DR2: DR3: DR6: fffe0ff0 DR7: 0600 Call Trace: virtio_gpu_object_create+0x5c7/0xd90 drivers/gpu/drm/virtio/virtgpu_object.c:251 virtio_gpu_gem_create drivers/gpu/drm/virtio/virtgpu_gem.c:42 [inline] virtio_gpu_mode_dumb_create+0x319/0x5c0 drivers/gpu/drm/virtio/virtgpu_gem.c:90 drm_mode_create_dumb+0x26c/0x2f0 drivers/gpu/drm/drm_dumb_buffers.c:96 drm_ioctl_kernel+0x27d/0x4e0 drivers/gpu/drm/drm_ioctl.c:782 drm_ioctl+0x51e/0x9d0 drivers/gpu/drm/drm_ioctl.c:885 vfs_ioctl fs/ioctl.c:51 [inline] __do_sys_ioctl fs/ioctl.c:874 [inline] __se_sys_ioctl fs/ioctl.c:860 [inline] __x64_sys_ioctl+0x193/0x200 fs/ioctl.c:860 do_syscall_x64 arch/x86/entry/common.c:50 [inline] do_syscall_64+0x35/0xb0 arch/x86/entry/common.c:80 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7f4adbe1dae9 Code: ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 c7 c1 bc ff ff ff f7 d8 64 89 01 48 RSP: 002b:7f4ad9393188 EFLAGS: 0246 ORIG_RAX: 0010 RAX: ffda RBX: 7f4adbf30f60 RCX: 7f4adbe1dae9 RDX: 2040 RSI: c02064b2 RDI: 0003 RBP: 7f4ad93931d0 R08: R09: R10: R11: 0246 R12: 0002 R13: 7ffccb96db4f R14: 7f4ad9393300 R15: 00022000 Modules linked in: ---[ end trace 8191b5e5ff4f69ef ]--- RIP: 0010:virtio_gpu_array_put_free+0x2f/0x190 drivers/gpu/drm/virtio/virtgpu_gem.c:251 Code: 55 49 89 fd 41 54 55 53 48 83 ec 08 e8 5a dd 09 fd 49 8d 45 70 48 89 c2 48 89 04 24 48 b8 00 00 00 00 00 fc ff df 48 c1 ea 03 <0f> b6 04 02 84 c0 74 08 3c 03 0f 8e 21 01 00 00 41 8b 5d 70 31 ff RSP: 0018:c90005a9fa90 EFLAGS: 00010202 RAX: dc00 RBX: RCX: c900262ce000 RDX: 000e RSI: 846cf6e6 RDI: RBP: 88801882b800 R08: R09: c90005a9f9ef R10: 846dcc29 R11: R12: c90005a9fbd0 R13: R14: 888045f6 R15: fff4 FS: 7f4ad9393700() GS:88802cb0() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: 0065f4d7 CR3: 50bde000 CR4: 00150ee0 DR0: DR1: DR2: DR3: DR6: fffe0ff0 DR7: 0400 Code disassembly (best guess): 0: 55 push %rbp 1: 49 89 fdmov%rdi,%r13 4: 41 54 push %r12 6: 55 push %rbp 7: 53 push %rbx 8: 48 83 ec 08 sub$0x8,%rsp c: e8 5a dd 09 fd callq 0xfd09dd6b 11: 49 8d 45 70 lea0x70(%r13),%rax 15: 48 89 c2mov%rax,%rdx 18: 48 89 04 24 mov%rax,(%rsp) 1c: 48 b8 00 00 00 00 00movabs $0xdc00,%rax 23: fc ff df
Regression in 5.15 in nouveau
Hi, when updating from 5.14 to 5.15 on a system with NVIDIA GP108 [GeForce GT 1030] (NV138) and Ryzen 9 3900XT using kde/plasma on X (not wayland), there is a regression: There is now some annoying black flickering in some applications, for example thunderbird, firefox, or mpv. It mostly happens when scrolling or when playing video. Only the window of the application flickers, not the whole screen. But the flickering is not limited to the scrolled area: for example in firefox the url and bookmark bars flicker, too, not only the web site. I have bisected the issue to this commit: commit 3e1ad79bf66165bdb2baca3989f9227939241f11 (HEAD) Author: Christian König Date: Sun Jun 6 11:50:15 2021 +0200 drm/nouveau: always wait for the exclusive fence Drivers also need to to sync to the exclusive fence when a shared one is present. Signed-off-by: Christian König Reviewed-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/msgid/20210702111642.17259-4-christian.koe...@amd.com This sounds like performance is impacted severely by that commit. Can this be fixed somehow? A partial dmesg is below. Cheers, Stefan dmesg |grep -i -e drm -e dri -e nvidia -e nouveau -e fb [0.00] BIOS-e820: [mem 0xbc552000-0xbc8fbfff] reserved [0.004971] ACPI: XSDT 0xBCFB0728 CC (v01 ALASKA A M I 01072009 AMI 0113) [0.010838] PM: hibernation: Registered nosave memory: [mem 0xbc552000-0xbc8fbfff] [0.204873] Performance Events: Fam17h+ core perfctr, AMD PMU driver. [0.292761] Registering PCC driver as Mailbox controller [0.292761] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 [0.518295] pci :06:00.0: reg 0x10: [mem 0xfb00-0xfbff] [0.519132] pci :06:00.1: [10de:0fb8] type 00 class 0x040300 [0.519653] pci :00:03.1: bridge window [mem 0xfb00-0xfc0f] [0.549101] pci :00:03.1: bridge window [mem 0xfb00-0xfc0f] [0.550994] pci_bus :06: resource 1 [mem 0xfb00-0xfc0f] [0.561285] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250) [0.564152] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [0.570870] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [0.571531] AMD-Vi: AMD IOMMUv2 driver by Joerg Roedel [0.988343] microcode: Microcode Update Driver: v2.2. [1.112435] ACPI: OSL: Resource conflict; ACPI support missing from driver? [1.114174] usbcore: registered new interface driver usbfs [1.114331] usbcore: registered new interface driver hub [1.114599] usbcore: registered new device driver usb [2.373857] hid: raw HID events driver (C) Jiri Kosina [2.378553] usbcore: registered new interface driver usbhid [2.378641] usbhid: USB HID core driver [2.581069] ata3.00: supports DRM functions and may not be fully accessible [2.582388] ata3.00: supports DRM functions and may not be fully accessible [3.371574] ata5.00: supports DRM functions and may not be fully accessible [3.396636] ata5.00: supports DRM functions and may not be fully accessible [4.159005] sr 1:0:0:0: [sr0] scsi3-mmc drive: 48x/48x writer dvd-ram cd/rw xa/form2 cdda tray [4.159120] cdrom: Uniform CD-ROM driver Revision: 3.20 [5.936017] systemd[1]: Starting Load Kernel Module drm... [5.957038] systemd[1]: modprobe@drm.service: Deactivated successfully. [5.957238] systemd[1]: Finished Load Kernel Module drm. [6.104901] sp5100_tco: SP5100/SB800 TCO WatchDog Timer Driver [6.122007] usbcore: registered new device driver apple-mfi-fastcharge [6.213866] input: HDA NVidia HDMI/DP,pcm=3 as /devices/pci:00/:00:03.1/:06:00.1/sound/card0/input8 [6.236581] AMD64 EDAC driver v3.5.0 [6.259473] input: HDA NVidia HDMI/DP,pcm=7 as /devices/pci:00/:00:03.1/:06:00.1/sound/card0/input9 [6.259631] input: HDA NVidia HDMI/DP,pcm=8 as /devices/pci:00/:00:03.1/:06:00.1/sound/card0/input10 [6.260559] input: HDA NVidia HDMI/DP,pcm=9 as /devices/pci:00/:00:03.1/:06:00.1/sound/card0/input11 [6.260913] input: HDA NVidia HDMI/DP,pcm=10 as /devices/pci:00/:00:03.1/:06:00.1/sound/card0/input12 [6.485220] nouveau :06:00.0: vgaarb: deactivate vga console [6.486484] nouveau :06:00.0: NVIDIA GP108 (138000a1) [6.612994] nouveau :06:00.0: bios: version 86.08.24.00.23 [6.617303] nouveau :06:00.0: pmu: firmware unavailable [6.621410] nouveau :06:00.0: fb: 2048 MiB GDDR5 [6.653892] nouveau :06:00.0: DRM: VRAM: 2048 MiB [6.653895] nouveau :06:00.0: DRM: GART: 536870912 MiB [6.653897] nouveau :06:00.0: DRM: BIT table 'A' not found [6.653899] nouveau :06:00.0: DRM: BIT table 'L' not found [6.653900] nouveau :06:00.0: DRM: TMDS table version 2.0 [6.653902] nouveau :06:00.0: DRM: DCB version 4.1 [6.653904] nouveau :06
[syzbot] general protection fault in virtio_gpu_object_create
Hello, syzbot found the following issue on: HEAD commit:136057256686 Linux 5.16-rc2 git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=14029126b0 kernel config: https://syzkaller.appspot.com/x/.config?x=bf85c53718a1e697 dashboard link: https://syzkaller.appspot.com/bug?extid=62d1cf88cc39247b2e23 compiler: gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2 Unfortunately, I don't have any reproducer for this issue yet. IMPORTANT: if you fix the issue, please add the following tag to the commit: Reported-by: syzbot+62d1cf88cc39247b2...@syzkaller.appspotmail.com RBP: 7f96f6d2a1d0 R08: R09: R10: R11: 0246 R12: 0002 R13: 7ffde5383b0f R14: 7f96f6d2a300 R15: 00022000 general protection fault, probably for non-canonical address 0xdc00: [#1] PREEMPT SMP KASAN KASAN: null-ptr-deref in range [0x-0x0007] CPU: 3 PID: 32308 Comm: syz-executor.2 Not tainted 5.16.0-rc2-syzkaller #0 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.14.0-2 04/01/2014 RIP: 0010:virtio_gpu_object_shmem_init drivers/gpu/drm/virtio/virtgpu_object.c:183 [inline] RIP: 0010:virtio_gpu_object_create+0x29b/0xd90 drivers/gpu/drm/virtio/virtgpu_object.c:249 Code: 89 de e8 38 11 09 fd 48 85 db 0f 85 9f 03 00 00 e8 9a 0e 09 fd 49 8d 7f 0c 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 <0f> b6 14 02 48 89 f8 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 82 RSP: 0018:c90002fafad0 EFLAGS: 00010246 RAX: dc00 RBX: RCX: c900242c8000 RDX: RSI: 846dc446 RDI: RBP: 8880257af000 R08: R09: 8bcca173 R10: 846dc438 R11: R12: c90002fafbd0 R13: 8880430e0010 R14: 8880430e R15: fff4 FS: 7f96f6d2a700() GS:88802cd0() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: 009af988 CR3: 53153000 CR4: 00150ee0 DR0: DR1: DR2: DR3: DR6: fffe0ff0 DR7: 0400 Call Trace: virtio_gpu_gem_create drivers/gpu/drm/virtio/virtgpu_gem.c:42 [inline] virtio_gpu_mode_dumb_create+0x319/0x5c0 drivers/gpu/drm/virtio/virtgpu_gem.c:90 drm_mode_create_dumb+0x26c/0x2f0 drivers/gpu/drm/drm_dumb_buffers.c:96 drm_ioctl_kernel+0x27d/0x4e0 drivers/gpu/drm/drm_ioctl.c:782 drm_ioctl+0x51e/0x9d0 drivers/gpu/drm/drm_ioctl.c:885 vfs_ioctl fs/ioctl.c:51 [inline] __do_sys_ioctl fs/ioctl.c:874 [inline] __se_sys_ioctl fs/ioctl.c:860 [inline] __x64_sys_ioctl+0x193/0x200 fs/ioctl.c:860 do_syscall_x64 arch/x86/entry/common.c:50 [inline] do_syscall_64+0x35/0xb0 arch/x86/entry/common.c:80 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7f96f97b4ae9 Code: ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 c7 c1 bc ff ff ff f7 d8 64 89 01 48 RSP: 002b:7f96f6d2a188 EFLAGS: 0246 ORIG_RAX: 0010 RAX: ffda RBX: 7f96f98c7f60 RCX: 7f96f97b4ae9 RDX: 2040 RSI: c02064b2 RDI: 0003 RBP: 7f96f6d2a1d0 R08: R09: R10: R11: 0246 R12: 0002 R13: 7ffde5383b0f R14: 7f96f6d2a300 R15: 00022000 Modules linked in: ---[ end trace 7991b533e1b66750 ]--- RIP: 0010:virtio_gpu_object_shmem_init drivers/gpu/drm/virtio/virtgpu_object.c:183 [inline] RIP: 0010:virtio_gpu_object_create+0x29b/0xd90 drivers/gpu/drm/virtio/virtgpu_object.c:249 Code: 89 de e8 38 11 09 fd 48 85 db 0f 85 9f 03 00 00 e8 9a 0e 09 fd 49 8d 7f 0c 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 <0f> b6 14 02 48 89 f8 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 82 RSP: 0018:c90002fafad0 EFLAGS: 00010246 RAX: dc00 RBX: RCX: c900242c8000 RDX: RSI: 846dc446 RDI: RBP: 8880257af000 R08: R09: 8bcca173 R10: 846dc438 R11: R12: c90002fafbd0 R13: 8880430e0010 R14: 8880430e R15: fff4 FS: 7f96f6d2a700() GS:88802cd0() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: 009af988 CR3: 53153000 CR4: 00150ee0 DR0: DR1: DR2: DR3: DR6: fffe0ff0 DR7: 0400 Code disassembly (best guess): 0: 89 de mov%ebx,%esi 2: e8 38 11 09 fd callq 0xfd09113f 7: 48 85 dbtest %rbx,%rbx a: 0f 85 9f 03 00 00 jne0x3af 10: e8 9a 0e 09 fd callq 0xfd090eaf 15: 49
Re: [PATCH v9 00/15] Clean up "mediatek,larb"
Hi Yong Wu, On 12/11/2021 11:54, Yong Wu wrote: > MediaTek IOMMU block diagram always like below: > > M4U > | > smi-common > | > - > | | ... > | | > larb1 larb2 > | | > vdec venc > > All the consumer connect with smi-larb, then connect with smi-common. > > When the consumer works, it should enable the smi-larb's power which also > need enable the smi-common's power firstly. > > Thus, Firstly, use the device link connect the consumer and the > smi-larbs. then add device link between the smi-larb and smi-common. > > After adding the device_link, then "mediatek,larb" property can be removed. > the iommu consumer don't need call the mtk_smi_larb_get/put to enable > the power and clock of smi-larb and smi-common. > > Base on a jpeg dt-bing patchset[1] that already got the necessary R-b. > > This patchset cross several tree, From [2], the media tree should be a good > choice. > > [1] > https://lore.kernel.org/linux-mediatek/20210702102304.3346429-1-hsi...@chromium.org/ Please resend this patch series converting the jpeg bindings to yaml, and this time CC the linux-media mailinglist. Because that was omitted, it never appeared in the media patchwork system, and so this was never merged. Since this patch series depends on this series, this needs to be merged first. Bindings for media drivers must be CC-ed to linux-media, since we maintain those. Regards, Hans > [2] > https://lore.kernel.org/linux-mediatek/e7269c80-5437-6ab9-c1db-df0b94eb9...@gmail.com/ > > Change notes: > v9: 1) Add return -ENODEV when the dev is null. > 2) Add more strict about the case that a iommu consume device use the > ports in > different larbs. Don't allow this case. > 3) Remove two codec interface: mtk_vcodec_release_enc/dec_pm since it > only has one > line now. > > v8: > https://lore.kernel.org/linux-mediatek/20210929013719.25120-1-yong...@mediatek.com/ > 1) Rebase on v5.15-rc1. > 2) Don't rebase the below mdp patchset that may still need more discuss. > > https://lore.kernel.org/linux-mediatek/20210709022324.1607884-1-ei...@chromium.org/ > 3) Add Frank's Tested-by. Remove Dafna's Tested-by as he requested. > > v7: > https://lore.kernel.org/linux-mediatek/20210730025238.22456-1-yong...@mediatek.com/ > 1) Fix a arm32 boot fail issue. reported from Frank. > 2) Add a return fail in the mtk drm. suggested by Dafna. > > v6: > https://lore.kernel.org/linux-mediatek/20210714025626.5528-1-yong...@mediatek.com/ > 1) rebase on v5.14-rc1. > 2) Fix the issue commented in v5 from Dafna and Hsin-Yi. > 3) Remove the patches about using pm_runtime_resume_and_get since they > have >already been merged by other patches. > > v5: > https://lore.kernel.org/linux-mediatek/20210410091128.31823-1-yong...@mediatek.com/ > 1) Base v5.12-rc2. > 2) Remove changing the mtk-iommu to module_platform_driver patch, It have > already been a > independent patch. > > v4: > https://lore.kernel.org/linux-mediatek/1590826218-23653-1-git-send-email-yong...@mediatek.com/ > > base on v5.7-rc1. > 1) Move drm PM patch before smi patchs. > 2) Change builtin_platform_driver to module_platform_driver since we may > need > build as module. > 3) Rebase many patchset as above. > > v3: > https://lore.kernel.org/linux-iommu/1567503456-24725-1-git-send-email-yong...@mediatek.com/ > 1) rebase on v5.3-rc1 and the latest mt8183 patchset. > 2) Use device_is_bound to check whether the driver is ready from > Matthias. > 3) Add DL_FLAG_STATELESS flag when calling device_link_add and explain the >reason in the commit message[3/14]. > 4) Add a display patch[12/14] into this series. otherwise it may affect >display HW fastlogo even though it don't happen in mt8183. > > v2: > https://lore.kernel.org/linux-iommu/1560171313-28299-1-git-send-email-yong...@mediatek.com/ >1) rebase on v5.2-rc1. >2) Move adding device_link between the consumer and smi-larb into > iommu_add_device from Robin. >3) add DL_FLAG_AUTOREMOVE_CONSUMER even though the smi is built-in from > Evan. >4) Remove the shutdown callback in iommu. > > v1: > https://lore.kernel.org/linux-iommu/1546318276-18993-1-git-send-email-yong...@mediatek.com/ > > Yong Wu (14): > dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW > iommu/mediatek-v1: Free the existed fwspec if the master dev already > has > iommu/mediatek: Return ENODEV if the device is NULL > iommu/mediatek: Add probe_defer for smi-larb > iommu/mediatek: Add device_link between the consumer and the larb > devices > media: mtk-jpeg: Get rid of mtk_smi_larb_get/put > media: mtk-mdp: Get rid of mtk_smi_larb_get/put > drm/mediatek: Get rid of mtk_smi_larb_get/put > media: mtk-vcodec: Get rid of mtk_smi_larb_get/put > media: mtk-vcodec: dec: Remove mtk_vcodec_release_dec_pm
Re: [PATCH v9 00/15] Clean up "mediatek,larb"
On 06/12/2021 12:52, Joerg Roedel wrote: > On Fri, Nov 12, 2021 at 06:54:54PM +0800, Yong Wu wrote: >> Yong Wu (14): >> dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW >> iommu/mediatek-v1: Free the existed fwspec if the master dev already >> has >> iommu/mediatek: Return ENODEV if the device is NULL >> iommu/mediatek: Add probe_defer for smi-larb >> iommu/mediatek: Add device_link between the consumer and the larb >> devices >> media: mtk-jpeg: Get rid of mtk_smi_larb_get/put >> media: mtk-mdp: Get rid of mtk_smi_larb_get/put >> drm/mediatek: Get rid of mtk_smi_larb_get/put >> media: mtk-vcodec: Get rid of mtk_smi_larb_get/put >> media: mtk-vcodec: dec: Remove mtk_vcodec_release_dec_pm >> media: mtk-vcodec: enc: Remove mtk_vcodec_release_enc_pm >> memory: mtk-smi: Get rid of mtk_smi_larb_get/put >> arm: dts: mediatek: Get rid of mediatek, larb for MM nodes >> arm64: dts: mediatek: Get rid of mediatek, larb for MM nodes >> >> Yongqiang Niu (1): >> drm/mediatek: Add pm runtime support for ovl and rdma > > What is the plan for merging this? If Matthias has no objections I can > take the iommu-parts, or will this go through another tree? I think it might be easiest if it is all going through the media subsystem (except for the dts patches, we don't handle those unless specifically requested to do so). I need a resend for jpeg bindings txt to yaml conversion series first, though. This time with the linux-media mailinglist included :-) I would need your Ack for the iommu patches as well, of course. Regards, Hans
Re: [PATCH v9 00/15] Clean up "mediatek,larb"
On Mon, Dec 6, 2021 at 8:23 PM Hans Verkuil wrote: > > Hi Yong Wu, > > On 12/11/2021 11:54, Yong Wu wrote: > > MediaTek IOMMU block diagram always like below: > > > > M4U > > | > > smi-common > > | > > - > > | | ... > > | | > > larb1 larb2 > > | | > > vdec venc > > > > All the consumer connect with smi-larb, then connect with smi-common. > > > > When the consumer works, it should enable the smi-larb's power which also > > need enable the smi-common's power firstly. > > > > Thus, Firstly, use the device link connect the consumer and the > > smi-larbs. then add device link between the smi-larb and smi-common. > > > > After adding the device_link, then "mediatek,larb" property can be removed. > > the iommu consumer don't need call the mtk_smi_larb_get/put to enable > > the power and clock of smi-larb and smi-common. > > > > Base on a jpeg dt-bing patchset[1] that already got the necessary R-b. > > > > This patchset cross several tree, From [2], the media tree should be a good > > choice. > > > > [1] > > https://lore.kernel.org/linux-mediatek/20210702102304.3346429-1-hsi...@chromium.org/ > > Please resend this patch series converting the jpeg bindings to yaml, and > this time > CC the linux-media mailinglist. Because that was omitted, it never appeared > in the > media patchwork system, and so this was never merged. Since this patch series > depends on > this series, this needs to be merged first. Hi Hans, I've resent a v6 and cc linux-media: https://patchwork.linuxtv.org/project/linux-media/patch/20211206130425.184420-1-hsi...@chromium.org/ thanks > > Bindings for media drivers must be CC-ed to linux-media, since we maintain > those. > > Regards, > > Hans > > > [2] > > https://lore.kernel.org/linux-mediatek/e7269c80-5437-6ab9-c1db-df0b94eb9...@gmail.com/ > > > > Change notes: > > v9: 1) Add return -ENODEV when the dev is null. > > 2) Add more strict about the case that a iommu consume device use the > > ports in > > different larbs. Don't allow this case. > > 3) Remove two codec interface: mtk_vcodec_release_enc/dec_pm since it > > only has one > > line now. > > > > v8: > > https://lore.kernel.org/linux-mediatek/20210929013719.25120-1-yong...@mediatek.com/ > > 1) Rebase on v5.15-rc1. > > 2) Don't rebase the below mdp patchset that may still need more discuss. > > > > https://lore.kernel.org/linux-mediatek/20210709022324.1607884-1-ei...@chromium.org/ > > 3) Add Frank's Tested-by. Remove Dafna's Tested-by as he requested. > > > > v7: > > https://lore.kernel.org/linux-mediatek/20210730025238.22456-1-yong...@mediatek.com/ > > 1) Fix a arm32 boot fail issue. reported from Frank. > > 2) Add a return fail in the mtk drm. suggested by Dafna. > > > > v6: > > https://lore.kernel.org/linux-mediatek/20210714025626.5528-1-yong...@mediatek.com/ > > 1) rebase on v5.14-rc1. > > 2) Fix the issue commented in v5 from Dafna and Hsin-Yi. > > 3) Remove the patches about using pm_runtime_resume_and_get since they > > have > >already been merged by other patches. > > > > v5: > > https://lore.kernel.org/linux-mediatek/20210410091128.31823-1-yong...@mediatek.com/ > > 1) Base v5.12-rc2. > > 2) Remove changing the mtk-iommu to module_platform_driver patch, It > > have already been a > > independent patch. > > > > v4: > > https://lore.kernel.org/linux-mediatek/1590826218-23653-1-git-send-email-yong...@mediatek.com/ > > base on v5.7-rc1. > > 1) Move drm PM patch before smi patchs. > > 2) Change builtin_platform_driver to module_platform_driver since we may > > need > > build as module. > > 3) Rebase many patchset as above. > > > > v3: > > https://lore.kernel.org/linux-iommu/1567503456-24725-1-git-send-email-yong...@mediatek.com/ > > 1) rebase on v5.3-rc1 and the latest mt8183 patchset. > > 2) Use device_is_bound to check whether the driver is ready from > > Matthias. > > 3) Add DL_FLAG_STATELESS flag when calling device_link_add and explain > > the > >reason in the commit message[3/14]. > > 4) Add a display patch[12/14] into this series. otherwise it may affect > >display HW fastlogo even though it don't happen in mt8183. > > > > v2: > > https://lore.kernel.org/linux-iommu/1560171313-28299-1-git-send-email-yong...@mediatek.com/ > >1) rebase on v5.2-rc1. > >2) Move adding device_link between the consumer and smi-larb into > > iommu_add_device from Robin. > >3) add DL_FLAG_AUTOREMOVE_CONSUMER even though the smi is built-in from > > Evan. > >4) Remove the shutdown callback in iommu. > > > > v1: > > https://lore.kernel.org/linux-iommu/1546318276-18993-1-git-send-email-yong...@mediatek.com/ > > > > Yong Wu (14): > > dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW > > iommu/mediatek-v1: Free the existed fwspec if the master dev already > > has > > iommu/mediatek: Return
Re: [Intel-gfx] [PATCH v2 03/16] drm/i915: Remove pages_mutex and intel_gtt->vma_ops.set/clear_pages members, v2.
On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
wrote:
>
> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
> the special handling, all callers use the defaults anyway. We only remap
> in ggtt, so default case will fall through.
>
> Because we still don't require locking in i915_vma_unpin(), handle this by
> using xchg in get_pages(), as it's locked with obj->mutex, and cmpxchg in
> unpin, which only fails if we race a against a new pin.
>
> Changes since v1:
> - aliasing gtt sets ZERO_SIZE_PTR, not -ENODEV, remove special case
> from __i915_vma_get_pages(). (Matt)
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_dpt.c | 2 -
> drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 15 -
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 403
> drivers/gpu/drm/i915/gt/intel_gtt.c | 13 -
> drivers/gpu/drm/i915/gt/intel_gtt.h | 7 -
> drivers/gpu/drm/i915/gt/intel_ppgtt.c | 12 -
> drivers/gpu/drm/i915/i915_vma.c | 444 --
> drivers/gpu/drm/i915/i915_vma.h | 3 +
> drivers/gpu/drm/i915/i915_vma_types.h | 1 -
> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 12 +-
> drivers/gpu/drm/i915/selftests/mock_gtt.c | 4 -
> 11 files changed, 424 insertions(+), 492 deletions(-)
>
> }
> @@ -854,18 +1233,22 @@ static int vma_get_pages(struct i915_vma *vma)
> static void __vma_put_pages(struct i915_vma *vma, unsigned int count)
> {
> /* We allocate under vma_get_pages, so beware the shrinker */
> - mutex_lock_nested(&vma->pages_mutex, SINGLE_DEPTH_NESTING);
> + struct sg_table *pages = READ_ONCE(vma->pages);
> +
> GEM_BUG_ON(atomic_read(&vma->pages_count) < count);
> +
> if (atomic_sub_return(count, &vma->pages_count) == 0) {
Does this emit a barrier? Or can the READ_ONCE(vma->pages) be moved
past this, and does that matter?
> - vma->ops->clear_pages(vma);
> - GEM_BUG_ON(vma->pages);
> + if (pages == cmpxchg(&vma->pages, pages, NULL) &&
try_cmpxchg? Also can pages be NULL here?
As an aside, is it somehow possible to re-order the series or
something to avoid introducing the transient lockless trickery here? I
know by the end of the series this all gets removed, but still just
slightly worried here.
> + pages != vma->obj->mm.pages) {
> + sg_free_table(pages);
> + kfree(pages);
> + }
>
> i915_gem_object_unpin_pages(vma->obj);
> }
> - mutex_unlock(&vma->pages_mutex);
> }
Re: [PATCH v2 04/16] drm/i915: Take object lock in i915_ggtt_pin if ww is not set
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst wrote: > > i915_vma_wait_for_bind needs the vma lock held, fix the caller. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Matthew Auld
Re: Regression in 5.15 in nouveau
[TLDR: adding this regression to regzbot; most of this mail is compiled from a few templates paragraphs some of you will have seen aready.] Hi, this is your Linux kernel regression tracker speaking. Top-posting for once, to make this easy accessible to everyone. Adding the regression mailing list to the list of recipients, as it should be in the loop for all regressions, as explained here: https://www.kernel.org/doc/html/latest/admin-guide/reporting-issues.html To be sure this issue doesn't fall through the cracks unnoticed, I'm adding it to regzbot, my Linux kernel regression tracking bot: #regzbot ^introduced 3e1ad79bf66165bdb2baca3989f9227939241f11 #regzbot title drm: nouveau: annoying black flickering in some applications with KDE Plasma with Xorg #regzbot ignore-activity Reminder: when fixing the issue, please add a 'Link:' tag with the URL to the report (the parent of this mail), then regzbot will automatically mark the regression as resolved once the fix lands in the appropriate tree. For more details about regzbot see footer. Sending this to everyone that got the initial report, to make all aware of the tracking. I also hope that messages like this motivate people to directly get at least the regression mailing list and ideally even regzbot involved when dealing with regressions, as messages like this wouldn't be needed then. Don't worry, I'll send further messages wrt to this regression just to the lists (with a tag in the subject so people can filter them away), as long as they are intended just for regzbot. With a bit of luck no such messages will be needed anyway. Ciao, Thorsten, your Linux kernel regression tracker. P.S.: As a Linux kernel regression tracker I'm getting a lot of reports on my table. I can only look briefly into most of them. Unfortunately therefore I sometimes will get things wrong or miss something important. I hope that's not the case here; if you think it is, don't hesitate to tell me about it in a public reply. That's in everyone's interest, as what I wrote above might be misleading to everyone reading this; any suggestion I gave they thus might sent someone reading this down the wrong rabbit hole, which none of us wants. BTW, I have no personal interest in this issue, which is tracked using regzbot, my Linux kernel regression tracking bot (https://linux-regtracking.leemhuis.info/regzbot/). I'm only posting this mail to get things rolling again and hence don't need to be CC on all further activities wrt to this regression. On 04.12.21 17:40, Stefan Fritsch wrote: > Hi, > > when updating from 5.14 to 5.15 on a system with NVIDIA GP108 [GeForce > GT 1030] (NV138) and Ryzen 9 3900XT using kde/plasma on X (not wayland), > there is a regression: There is now some annoying black flickering in > some applications, for example thunderbird, firefox, or mpv. It mostly > happens when scrolling or when playing video. Only the window of the > application flickers, not the whole screen. But the flickering is not > limited to the scrolled area: for example in firefox the url and > bookmark bars flicker, too, not only the web site. I have bisected the > issue to this commit: > > commit 3e1ad79bf66165bdb2baca3989f9227939241f11 (HEAD) > Author: Christian König > Date: Sun Jun 6 11:50:15 2021 +0200 > > drm/nouveau: always wait for the exclusive fence > > Drivers also need to to sync to the exclusive fence when > a shared one is present. > > Signed-off-by: Christian König > Reviewed-by: Daniel Vetter > Link: > https://patchwork.freedesktop.org/patch/msgid/20210702111642.17259-4-christian.koe...@amd.com > > > > This sounds like performance is impacted severely by that commit. Can > this be fixed somehow? A partial dmesg is below. > > Cheers, > Stefan > > > dmesg |grep -i -e drm -e dri -e nvidia -e nouveau -e fb > [ 0.00] BIOS-e820: [mem 0xbc552000-0xbc8fbfff] > reserved > [ 0.004971] ACPI: XSDT 0xBCFB0728 CC (v01 ALASKA A M I > 01072009 AMI 0113) > [ 0.010838] PM: hibernation: Registered nosave memory: [mem > 0xbc552000-0xbc8fbfff] > [ 0.204873] Performance Events: Fam17h+ core perfctr, AMD PMU driver. > [ 0.292761] Registering PCC driver as Mailbox controller > [ 0.292761] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 > [ 0.518295] pci :06:00.0: reg 0x10: [mem 0xfb00-0xfbff] > [ 0.519132] pci :06:00.1: [10de:0fb8] type 00 class 0x040300 > [ 0.519653] pci :00:03.1: bridge window [mem > 0xfb00-0xfc0f] > [ 0.549101] pci :00:03.1: bridge window [mem > 0xfb00-0xfc0f] > [ 0.550994] pci_bus :06: resource 1 [mem 0xfb00-0xfc0f] > [ 0.561285] Block layer SCSI generic (bsg) driver version 0.4 loaded > (major 250) > [ 0.564152] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 > [ 0.570870] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled > [ 0.571531] AMD-Vi: AMD IOMMUv2 driver by Joerg
Re: [PATCH 4/6] dt-bindings: gpu: mali-bifrost: Document RZ/G2L support
Hi Biju,
On Fri, Dec 3, 2021 at 12:52 PM Biju Das wrote:
> The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31 GPU,
> add a compatible string for it.
>
> Signed-off-by: Biju Das
> Reviewed-by: Lad Prabhakar
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -52,7 +64,8 @@ properties:
> maxItems: 3
>
>resets:
> -maxItems: 2
> +minItems: 1
2, as before?
> +maxItems: 3
Perhaps you should add reset-names?
>
>"#cooling-cells":
> const: 2
> @@ -113,6 +126,21 @@ allOf:
> - sram-supply
> - power-domains
> - power-domain-names
> + - if:
> + properties:
> +compatible:
> + contains:
> +const: renesas,r9a07g044-mali
> +then:
> + properties:
> +interrupt-names:
> + minItems: 4
> +clock-names:
> + minItems: 3
> + required:
> +- clock-names
> +- power-domains
> +- resets
reset-names
> else:
>properties:
> power-domains:
The rest looks good to me, but I'm no Mali expert.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH v3 0/8] DG2 accelerated migration/clearing support
Enable accelerated moves and clearing on DG2. On such HW we have minimum page size restrictions when accessing LMEM from the GTT, where we now have to use 64K GTT pages or larger. With the ppGTT the page-table also has a slightly different layout from past generations when using the 64K GTT mode(which is still enabled on via some PDE bit), where it is now compacted down to 32 qword entries. Note that on discrete the paging structures must also be placed in LMEM, and we need to able to modify them via the GTT itself(see patch 7), which is one of the complications here. The series needs to be applied on top of the DG2 enabling branch: https://cgit.freedesktop.org/~ramaling/linux/log/?h=dg2_enabling_ww49.3 Matthew Auld (8): drm/i915/migrate: don't check the scratch page drm/i915/migrate: fix offset calculation drm/i915/migrate: fix length calculation drm/i915/selftests: handle object rounding drm/i915/gtt: allow overriding the pt alignment drm/i915/gtt: add xehpsdv_ppgtt_insert_entry drm/i915/migrate: add acceleration support for DG2 drm/i915/migrate: turn on acceleration for DG2 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 50 +- drivers/gpu/drm/i915/gt/intel_gtt.h| 10 +- drivers/gpu/drm/i915/gt/intel_migrate.c| 195 - drivers/gpu/drm/i915/gt/intel_ppgtt.c | 16 +- drivers/gpu/drm/i915/gt/selftest_migrate.c | 1 + 5 files changed, 221 insertions(+), 51 deletions(-) -- 2.31.1
[PATCH v3 1/8] drm/i915/migrate: don't check the scratch page
The scratch page might not be allocated in LMEM(like on DG2), so instead
of using that as the deciding factor for where the paging structures
live, let's just query the pt before mapping it.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ramalingam C
Reviewed-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 765c6d48fe52..2d3188a398dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -13,7 +13,6 @@
struct insert_pte_data {
u64 offset;
- bool is_lmem;
};
#define CHUNK_SZ SZ_8M /* ~1ms at 8GiB/s preemption delay */
@@ -41,7 +40,7 @@ static void insert_pte(struct i915_address_space *vm,
struct insert_pte_data *d = data;
vm->insert_page(vm, px_dma(pt), d->offset, I915_CACHE_NONE,
- d->is_lmem ? PTE_LM : 0);
+ i915_gem_object_is_lmem(pt->base) ? PTE_LM : 0);
d->offset += PAGE_SIZE;
}
@@ -135,7 +134,6 @@ static struct i915_address_space *migrate_vm(struct
intel_gt *gt)
goto err_vm;
/* Now allow the GPU to rewrite the PTE via its own ppGTT */
- d.is_lmem = i915_gem_object_is_lmem(vm->vm.scratch[0]);
vm->vm.foreach(&vm->vm, base, base + sz, insert_pte, &d);
}
--
2.31.1
