Re: [syzbot] general protection fault in drm_client_buffer_vunmap
#syz fix: drm/fb-helper: only unmap if buffer not null Am 11.04.21 um 14:01 schrieb syzbot: #syz fix: drm/fb-helper: only unmap if buffer not null -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer OpenPGP_signature Description: OpenPGP digital signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [syzbot] general protection fault in drm_client_buffer_vunmap
syzbot suspects this issue was fixed by commit: commit 874a52f9b693ed8bf7a92b3592a547ce8a684e6f Author: Tong Zhang Date: Sun Feb 28 04:46:25 2021 + drm/fb-helper: only unmap if buffer not null bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=10c27b7ed0 start commit: c03c21ba Merge tag 'keys-misc-20210126' of git://git.kerne.. git tree: upstream kernel config: https://syzkaller.appspot.com/x/.config?x=ec4c85e44cc3172e dashboard link: https://syzkaller.appspot.com/bug?extid=10328e8428a896b65119 syz repro: https://syzkaller.appspot.com/x/repro.syz?x=12d95d7ad0 C reproducer: https://syzkaller.appspot.com/x/repro.c?x=148da9ccd0 If the result looks correct, please mark the issue as fixed by replying with: #syz fix: drm/fb-helper: only unmap if buffer not null For information about bisection process see: https://goo.gl/tpsmEJ#bisection ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] vt_ioctl: make VT_RESIZEX behave like VT_RESIZE
On Sun, Apr 11, 2021 at 2:43 PM Maciej W. Rozycki wrote: > > So it does trigger with vgacon and my old server, which I have started > experimenting with and for a start I have switched to a new kernel for an > unrelated purpose (now that I have relieved it from all its usual tasks > except for the last remaining one for which I haven't got the required > user software ported to the new system yet): > > "struct vt_consize"->v_vlin is ignored. Please report if you need this. > "struct vt_consize"->v_clin is ignored. Please report if you need this. Note that it's entirely possible that things continue to work well despite this warning. It's unclear to me from your email if you actually see any difference (and apparently you're not able to see it right now due to not being close to the machine). The fact that v_vlin/v_clin are ignored doesn't necessarily mean that they are different from what they were before, so the warning may be a non-issue. > It continues using svgatextmode with its glass (CRT) VT to set my usual > 80x37 text mode (720x576 pixel resolution) by manipulating the VGA clock > chip and the CRT controller appropriately for a nice refresh rate of 85Hz: > > Chipset = `TVGA8900', Textmode clock = 44.90 MHz, 80x37 chars, CharCell = > 9x16. Refresh = 52.51kHz/84.7Hz. That doesn't seem necessarily wrong to me. > So what's the supposed impact of this change that prompted the inclusion > of the messages? There _may_ be no impact at all apart from the messages. The code _used_ to set the scan lines (v_vlin) and font height (v_clin) from those numbers if they were non-zero, and now it just ignores them and warns instead. The code now just sets the font height from the actual font size when the font is set. Which is honestly the only thing that ever made sense. Trying to set it with v_clin is ignored, but it's entirely possible - maybe even likely - that your user of VT_RESIZEX sets it to the same values it already has. Exactly because setting a font line number to anything else than the font size isn't exactly sensible. But if your screen looks different than it used to, that is obviously interesting and says something actually changed (outside of the message itself). Linus ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/msm/dsi: fix msm_dsi_phy_get_clk_provider return code
msm_dsi_phy_get_clk_provider() always returns two provided clocks, so
return 0 instead of returning incorrect -EINVAL error code.
Fixes: 5d13459650b3 ("drm/msm/dsi: push provided clocks handling into a generic
code")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index f0a2ddf96a4b..ff7f2ec42030 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -843,7 +843,7 @@ int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
if (pixel_clk_provider)
*pixel_clk_provider =
phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
- return -EINVAL;
+ return 0;
}
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
--
2.30.2
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1 0/3] drm/msm/dpu: rework irq handling
Simplify IRQ handling. dpu_irq_map is a huge table consisting of all possible IRQ entries (including a plenty of 'reserved' = not existing IRQs). It is always used to lookup the interrupt index (in the table) and then to use this index to lookup related interrupt register and mask. For the long period of time these indices had 1:1 correspondence to register/mask pairs. SC7280 introduced 'additional' IRQs removing this correpondence. Replace all IRQ lookup with stable irq indices, which correponds directly to the register/bit pair. The dpu_irq_map table is used only for the lookup of the irq index. Changes since RFC: - rebase on top of msm/msm-next to include SC7280 changes. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1 2/3] drm/msm/dpu: hw_intr: always call dpu_hw_intr_clear_intr_status_nolock
Always call dpu_hw_intr_clear_intr_status_nolock() from the
dpu_hw_intr_dispatch_irqs(). This simplifies the callback function
(which call clears the interrupts anyway) and enforces clearing the hw
interrupt status.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 9 -
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 39 +--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 9 -
3 files changed, 18 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index 54b34746a587..fd11a2aeab6c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -41,15 +41,6 @@ static void dpu_core_irq_callback_handler(void *arg, int
irq_idx)
if (cb->func)
cb->func(cb->arg, irq_idx);
spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags);
-
- /*
-* Clear pending interrupt status in HW.
-* NOTE: dpu_core_irq_callback_handler is protected by top-level
-* spinlock, so it is safe to clear any interrupt status here.
-*/
- dpu_kms->hw_intr->ops.clear_intr_status_nolock(
- dpu_kms->hw_intr,
- irq_idx);
}
int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index cf9bfd45aa59..8bd22e060437 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -1362,6 +1362,22 @@ static int dpu_hw_intr_irqidx_lookup(struct dpu_hw_intr
*intr,
return -EINVAL;
}
+static void dpu_hw_intr_clear_intr_status_nolock(struct dpu_hw_intr *intr,
+ int irq_idx)
+{
+ int reg_idx;
+
+ if (!intr)
+ return;
+
+ reg_idx = dpu_irq_map[irq_idx].reg_idx;
+ DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off,
+ dpu_irq_map[irq_idx].irq_mask);
+
+ /* ensure register writes go through */
+ wmb();
+}
+
static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr *intr,
void (*cbfunc)(void *, int),
void *arg)
@@ -1430,9 +1446,8 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
*/
if (cbfunc)
cbfunc(arg, irq_idx);
- else
- intr->ops.clear_intr_status_nolock(
- intr, irq_idx);
+
+ dpu_hw_intr_clear_intr_status_nolock(intr,
irq_idx);
/*
* When callback finish, clear the irq_status
@@ -1597,23 +1612,6 @@ static int dpu_hw_intr_disable_irqs(struct dpu_hw_intr
*intr)
return 0;
}
-
-static void dpu_hw_intr_clear_intr_status_nolock(struct dpu_hw_intr *intr,
- int irq_idx)
-{
- int reg_idx;
-
- if (!intr)
- return;
-
- reg_idx = dpu_irq_map[irq_idx].reg_idx;
- DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off,
- dpu_irq_map[irq_idx].irq_mask);
-
- /* ensure register writes go through */
- wmb();
-}
-
static u32 dpu_hw_intr_get_interrupt_status(struct dpu_hw_intr *intr,
int irq_idx, bool clear)
{
@@ -1655,7 +1653,6 @@ static void __setup_intr_ops(struct dpu_hw_intr_ops *ops)
ops->dispatch_irqs = dpu_hw_intr_dispatch_irq;
ops->clear_all_irqs = dpu_hw_intr_clear_irqs;
ops->disable_all_irqs = dpu_hw_intr_disable_irqs;
- ops->clear_intr_status_nolock = dpu_hw_intr_clear_intr_status_nolock;
ops->get_interrupt_status = dpu_hw_intr_get_interrupt_status;
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 5a1c304ba93f..5bade5637ecc 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -142,15 +142,6 @@ struct dpu_hw_intr_ops {
void (*cbfunc)(void *arg, int irq_idx),
void *arg);
- /**
-* clear_intr_status_nolock() - clears the HW interrupts without lock
-* @intr: HW interrupt handle
-* @irq_idx:Lookup irq index return from irq_idx_lookup
-*/
- void (*clear_intr_status_nolock)(
- struct dpu_hw_intr *intr,
- int irq_idx);
-
/**
* get_interrupt_status - Gets HW interrupt status, and clear if set,
*based on given lookup IRQ index.
--
2.30.2
___
dri-devel mailing list
dri-devel@l
[PATCH v1 3/3] drm/msm/dpu: simplify interrupt managing
Change huge lookup table to contain just sensible entries. IRQ index is
now not an index in the table, but just register id (multiplied by 32,
the amount of IRQs in the register) plus offset in the register. This
allows us to remove all the "reserved" entries from dpu_irq_map. The
table is now only used for lookups, individual functions calculate
register and mask using the irq_idx.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 10 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 1151 +++--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h |4 +-
3 files changed, 196 insertions(+), 969 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index fd11a2aeab6c..4e2ad03df903 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -70,7 +70,7 @@ static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int
irq_idx)
return -EINVAL;
}
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
+ if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -133,7 +133,7 @@ static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms,
int irq_idx)
return -EINVAL;
}
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
+ if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -208,7 +208,7 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms,
int irq_idx,
return -EINVAL;
}
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
+ if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -243,7 +243,7 @@ int dpu_core_irq_unregister_callback(struct dpu_kms
*dpu_kms, int irq_idx,
return -EINVAL;
}
- if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->irq_idx_tbl_size) {
+ if (irq_idx < 0 || irq_idx >= dpu_kms->hw_intr->total_irqs) {
DPU_ERROR("invalid IRQ index: [%d]\n", irq_idx);
return -EINVAL;
}
@@ -328,7 +328,7 @@ void dpu_core_irq_preinstall(struct dpu_kms *dpu_kms)
spin_lock_init(&dpu_kms->irq_obj.cb_lock);
/* Create irq callbacks for all possible irq_idx */
- dpu_kms->irq_obj.total_irqs = dpu_kms->hw_intr->irq_idx_tbl_size;
+ dpu_kms->irq_obj.total_irqs = dpu_kms->hw_intr->total_irqs;
dpu_kms->irq_obj.irq_cb_tbl = kcalloc(dpu_kms->irq_obj.total_irqs,
sizeof(struct list_head), GFP_KERNEL);
dpu_kms->irq_obj.enable_counts = kcalloc(dpu_kms->irq_obj.total_irqs,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 8bd22e060437..2cb6800047c3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -32,142 +32,142 @@
/**
* WB interrupt status bit definitions
*/
-#define DPU_INTR_WB_0_DONE BIT(0)
-#define DPU_INTR_WB_1_DONE BIT(1)
-#define DPU_INTR_WB_2_DONE BIT(4)
+#define DPU_INTR_WB_0_DONE 0
+#define DPU_INTR_WB_1_DONE 1
+#define DPU_INTR_WB_2_DONE 4
/**
* WDOG timer interrupt status bit definitions
*/
-#define DPU_INTR_WD_TIMER_0_DONE BIT(2)
-#define DPU_INTR_WD_TIMER_1_DONE BIT(3)
-#define DPU_INTR_WD_TIMER_2_DONE BIT(5)
-#define DPU_INTR_WD_TIMER_3_DONE BIT(6)
-#define DPU_INTR_WD_TIMER_4_DONE BIT(7)
+#define DPU_INTR_WD_TIMER_0_DONE 2
+#define DPU_INTR_WD_TIMER_1_DONE 3
+#define DPU_INTR_WD_TIMER_2_DONE 5
+#define DPU_INTR_WD_TIMER_3_DONE 6
+#define DPU_INTR_WD_TIMER_4_DONE 7
/**
* Pingpong interrupt status bit definitions
*/
-#define DPU_INTR_PING_PONG_0_DONE BIT(8)
-#define DPU_INTR_PING_PONG_1_DONE BIT(9)
-#define DPU_INTR_PING_PONG_2_DONE BIT(10)
-#define DPU_INTR_PING_PONG_3_DONE BIT(11)
-#define DPU_INTR_PING_PONG_0_RD_PTR BIT(12)
-#define DPU_INTR_PING_PONG_1_RD_PTR BIT(13)
-#define DPU_INTR_PING_PONG_2_RD_PTR BIT(14)
-#define DPU_INTR_PING_PONG_3_RD_PTR BIT(15)
-#define DPU_INTR_PING_PONG_0_WR_PTR BIT(16)
-#define DPU_INTR_PING_PONG_1_WR_PTR BIT(17)
-#define DPU_INTR_PING_PONG_2_WR_PTR BIT(18)
-#define DPU_INTR_PING_PONG_3_WR_PTR BIT(19)
-#define DPU_INTR_PING_PONG_0_AUTOREFRESH_DONE BIT(20)
-#define DPU_INTR_PING_PONG_1_AUTOREFRESH_DONE BIT(21)
-#define DPU_INTR_PING_PONG_2_AUTOREFRESH_DONE BIT(22)
-#define DPU_INTR_PING_PONG_3_AUTOREFRESH_DONE BIT(23)
+#define DPU_INTR_PING_PONG_0_DONE 8
+#define DPU_INTR_PING_PONG_1_DONE 9
+#define DPU_INTR_PING_PONG_2_DONE 10
+#define DPU_INTR_PING_PO
[PATCH v1 1/3] drm/msm/dpu: merge dpu_hw_intr_get_interrupt_statuses into dpu_hw_intr_dispatch_irqs
There is little sense in reading interrupt statuses and right after that
going after the array of statuses to dispatch them. Merge both loops
into single function doing read and dispatch.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 10 +--
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 66 ++-
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 8 ---
3 files changed, 20 insertions(+), 64 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
index cdec3fbe6ff4..54b34746a587 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
@@ -376,15 +376,6 @@ void dpu_core_irq_uninstall(struct dpu_kms *dpu_kms)
irqreturn_t dpu_core_irq(struct dpu_kms *dpu_kms)
{
- /*
-* Read interrupt status from all sources. Interrupt status are
-* stored within hw_intr.
-* Function will also clear the interrupt status after reading.
-* Individual interrupt status bit will only get stored if it
-* is enabled.
-*/
- dpu_kms->hw_intr->ops.get_interrupt_statuses(dpu_kms->hw_intr);
-
/*
* Dispatch to HW driver to handle interrupt lookup that is being
* fired. When matching interrupt is located, HW driver will call to
@@ -392,6 +383,7 @@ irqreturn_t dpu_core_irq(struct dpu_kms *dpu_kms)
* dpu_core_irq_callback_handler will perform the registered function
* callback, and do the interrupt status clearing once the registered
* callback is finished.
+* Function will also clear the interrupt status after reading.
*/
dpu_kms->hw_intr->ops.dispatch_irqs(
dpu_kms->hw_intr,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 48c96b812126..cf9bfd45aa59 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -1371,6 +1371,7 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
int start_idx;
int end_idx;
u32 irq_status;
+ u32 enable_mask;
unsigned long irq_flags;
if (!intr)
@@ -1383,8 +1384,6 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
*/
spin_lock_irqsave(&intr->irq_lock, irq_flags);
for (reg_idx = 0; reg_idx < ARRAY_SIZE(dpu_intr_set); reg_idx++) {
- irq_status = intr->save_irq_status[reg_idx];
-
/*
* Each Interrupt register has a range of 64 indexes, and
* that is static for dpu_irq_map.
@@ -1396,6 +1395,20 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
start_idx >= ARRAY_SIZE(dpu_irq_map))
continue;
+ /* Read interrupt status */
+ irq_status = DPU_REG_READ(&intr->hw,
dpu_intr_set[reg_idx].status_off);
+
+ /* Read enable mask */
+ enable_mask = DPU_REG_READ(&intr->hw,
dpu_intr_set[reg_idx].en_off);
+
+ /* and clear the interrupt */
+ if (irq_status)
+ DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off,
+irq_status);
+
+ /* Finally update IRQ status based on enable mask */
+ irq_status &= enable_mask;
+
/*
* Search through matching intr status from irq map.
* start_idx and end_idx defined the search range in
@@ -1429,6 +1442,10 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr
*intr,
irq_status &= ~dpu_irq_map[irq_idx].irq_mask;
}
}
+
+ /* ensure register writes go through */
+ wmb();
+
spin_unlock_irqrestore(&intr->irq_lock, irq_flags);
}
@@ -1580,41 +1597,6 @@ static int dpu_hw_intr_disable_irqs(struct dpu_hw_intr
*intr)
return 0;
}
-static void dpu_hw_intr_get_interrupt_statuses(struct dpu_hw_intr *intr)
-{
- int i;
- u32 enable_mask;
- unsigned long irq_flags;
-
- if (!intr)
- return;
-
- spin_lock_irqsave(&intr->irq_lock, irq_flags);
- for (i = 0; i < ARRAY_SIZE(dpu_intr_set); i++) {
- if (!test_bit(i, &intr->irq_mask))
- continue;
-
- /* Read interrupt status */
- intr->save_irq_status[i] = DPU_REG_READ(&intr->hw,
- dpu_intr_set[i].status_off);
-
- /* Read enable mask */
- enable_mask = DPU_REG_READ(&intr->hw, dpu_intr_set[i].en_off);
-
- /* and clear the interrupt */
- if (intr->save_irq_status[i])
- DPU_REG_WRITE(&intr->hw, dpu_intr_set[i].clr_off,
-
[pull] drm/msm: drm-msm-next for 5.13
Hi Dave&Daniel, This time around a bit larger than usual, but a large part of that is Dmitry's dsi phy/pll refactor (which is itself a pretty large negative diffstat). The dsi phy/pll refactor includes a couple clk patches a-b the maintainer. (For folks actually trying to boot msm-next, there is one clk fix required, which should hopefully land in 5.12 but not in msm-next.. https://patchwork.freedesktop.org/patch/427412/) * Big DSI phy/pll cleanup * Initial support for sc7280 * compatibles fixes for sm8150/sm8250 * cleanups for all dpu gens to use same bandwidth scaling paths (\o/) * various shrinker path lock contention optimizations * unpin/swap support for GEM objects (disabled by default, enable with msm.enable_eviction=1 .. due to various combinations of iommu drivers with older gens I want to get more testing on hw I don't have in front of me before enabling by default) * The usual assortment of misc fixes and cleanups The following changes since commit 1e28eed17697bcf343c6743f0028cc3b5dd88bf0: Linux 5.12-rc3 (2021-03-14 14:41:02 -0700) are available in the Git repository at: https://gitlab.freedesktop.org/drm/msm.git drm-msm-next-2021-04-11 for you to fetch changes up to a29c8c0241654d5f3165d52e9307e4feff955621: drm/msm/disp/dpu1: fix display underruns during modeset. (2021-04-09 12:02:35 -0700) Abhinav Kumar (3): drm/msm/dp: Fix indentation kbot warnings in DP driver drm/msm/dp: Fix incorrect NULL check kbot warnings in DP driver drm/msm/dp: delete unnecessary debugfs error handling Akhil P Oommen (2): drm/msm/a6xx: Fix perfcounter oob timeout drm/msm: Select CONFIG_NVMEM AngeloGioacchino Del Regno (2): drm/msm/dsi: Uncomment core_mmss clock for MSM8996 drm/msm/mdp5: Disable pingpong autorefresh at tearcheck init Bernard Zhao (1): gpu/drm/msm: remove redundant pr_err() when devm_kzalloc failed Bhaskar Chowdhury (1): drivers: gpu: drm: msn: disp: dpu1: Fixed couple of spellings in the file dpu_hw_top.h Bjorn Andersson (1): drm/msm: Remove need for reiterating the compatibles Colin Ian King (1): drm/msm: Fix spelling mistake "Purgable" -> "Purgeable" Dmitry Baryshkov (32): drm/msm/dsi: fix check-before-set in the 7nm dsi_pll code drm/msm/dsi_pll_7nm: Solve TODO for multiplier frac_bits assignment drm/msm/dsi_pll_7nm: Fix variable usage for pll_lockdet_rate drm/msm: fix shutdown hook in case GPU components failed to bind drm/msm: a6xx: fix version check for the A650 SQE microcode clk: mux: provide devm_clk_hw_register_mux() clk: divider: add devm_clk_hw_register_divider drm/msm/dsi: replace PHY's init callback with configurable data drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code drm/msm/dsi: drop multiple pll enable_seq support drm/msm/dsi: move all PLL callbacks into PHY config struct drm/msm/dsi: drop global msm_dsi_phy_type enumaration drm/msm/dsi: move min/max PLL rate to phy config drm/msm/dsi: remove msm_dsi_pll_set_usecase drm/msm/dsi: push provided clocks handling into a generic code drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks drm/msm/dsi: use devm_of_clk_add_hw_provider drm/msm/dsi: make save/restore_state phy-level functions drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers drm/msm/dsi: simplify vco_delay handling in dsi_phy_28nm driver drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy drm/msm/dsi: drop msm_dsi_pll abstraction drm/msm/dsi: drop PLL accessor functions drm/msm/dsi: move ioremaps to dsi_phy_driver_probe drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances drm/msm/dsi: remove temp data from global pll structure drm/msm/dsi: inline msm_dsi_phy_set_src_pll drm/msm/dsi: stop passing src_pll_id to the phy_enable call drm/msm/dpu: enable DPU_SSPP_QOS_8LVL for SM8250 drm/msm/dpu: fill missing details in hw catalog for sdm845 and sm8[12]50 drm/msm/dpu: always use mdp device to scale bandwidth Douglas Anderson (1): drm/msm: Fix speed-bin support not to access outside valid memory Fabio Estevam (1): drm/msm: Fix suspend/resume on i.MX5 John Stultz (1): drm/msm: Fix removal of valid error case when checking speed_bin Jonathan Marek (2): drm/msm: fix a6xx_gmu_clear_oob drm/msm: add compatibles for sm8150/sm8250 display Jordan Crouse (1): drm/msm: a6xx: Make sure the SQE microcode is safe Kalyan Thota (4): drm/msm/disp/dpu1: icc path needs to be set before dpu runtime resume drm/msm/disp/dpu1: program 3d_merge only if block is attached drm/msm/disp/dpu1: turn off vblank irqs aggressively in dpu driver drm/msm/disp/dpu1: fix display underruns during
Request for assistance
Greetings I'm running a Debian testing (11) system using Nouveau as a driver for 2 graphics cards: 1. Nvidia 1050 Ti (GP107) and a Nvidia 570 (GF110) driving 5 monitors 1 - 3840x2160 and 4 - 1920x1080s. The 5th monitor was added some about 8 weeks ago and since life got interesting. Previously I would use an uptime that would last anywhere from 4 to 6 months but after adding the 5th monitor - - - well the best has been some few days and the worst - - - a few hours. I starting digging to try and find possible issues. First thing I found was the idea of adding firmware which was an interesting exercise but was successful and now somewhere between 400 and 700 seconds after reboot I'm seeing this: [ 534.790587] nouveau :02:00.0: firmware: direct-loading firmware nouveau/nvc8_fuc084 I was cheering when I got this far - - - - except this flaw was hiding another one that I hope you might be able to help with. The error I see (using dmesg) looks something like this: [25375.252874] perf: interrupt took too long (3168 > 3150), lowering kernel.perf_event_max_sample_rate to 63000 [35577.509444] perf: interrupt took too long (3963 > 3960), lowering kernel.perf_event_max_sample_rate to 50250 [54648.710595] perf: interrupt took too long (4991 > 4953), lowering kernel.perf_event_max_sample_rate to 4 [77975.516742] nouveau :01:00.0: fifo: FB_FLUSH_TIMEOUT [85039.583604] nouveau :01:00.0: DRM: core notifier timeout [85041.583597] nouveau :01:00.0: DRM: base-0: timeout [85041.585023] nouveau :01:00.0: bus: MMIO read of FAULT at 690400 [ IBUS ] [85041.585259] nouveau :01:00.0: bus: MMIO read of FAULT at 616d48 [ IBUS ] [85043.587213] nouveau :01:00.0: DRM: core notifier timeout [85045.587202] nouveau :01:00.0: DRM: base-1: timeout [85047.587302] nouveau :01:00.0: DRM: core notifier timeout [85049.587289] nouveau :01:00.0: DRM: base-2: timeout [85051.628464] nouveau :01:00.0: DRM: core notifier timeout [85053.628538] nouveau :01:00.0: DRM: core notifier timeout [85085.181271] nouveau :01:00.0: DRM: core notifier timeout [85087.181829] nouveau :01:00.0: DRM: core notifier timeout [85089.181909] nouveau :01:00.0: DRM: core notifier timeout That's the error but here's another data point from early in the boot cycle: [1.989397] nouveau :01:00.0: firmware: direct-loading firmware nvidia/gp107/acr/ucode_unload.bin [1.989401] nouveau :01:00.0: pmu: firmware unavailable [1.989535] nouveau :01:00.0: firmware: direct-loading firmware nvidia/gp107/gr/fecs_bl.bin In digging for what I might be able to do I found this final communication from late February with a subject line of: Re: [PATCH v2] drm/nouveau/pmu: fix timeout on GP108 Is what is discussed in this thread the same issue that I'm having on a GP107? If it is the same issue do I need to apply both of the patches? (If the answer to the second question is yes how do I apply the patch? I've found this technique at 'stackoverflow': 1) git clone 2) git checkout 13fac179aa50556ba3c60790a9beb6ca9d0b1b8b 3) git apply is this the right way to patch the kernel? (Never done this and really don't need my main computer down for even hours nevermind weeks.) Hopefully my explanation is clear enough - - - - if more information from dmesg files are needed - - - well I have 5 or 6 to choose from (called from the second m/c on the network that I reboot the main m/c from). TIA ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/panel: panel-dsi-cm: Convert sysfs sprintf/snprintf family to sysfs_emit
Fix the following coccicheck warning: drivers/gpu/drm/panel/panel-dsi-cm.c:271:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/panel/panel-dsi-cm.c:251:8-16: WARNING: use scnprintf or sprintf Signed-off-by: Tian Tao --- drivers/gpu/drm/panel/panel-dsi-cm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-dsi-cm.c b/drivers/gpu/drm/panel/panel-dsi-cm.c index af381d7..422d689 100644 --- a/drivers/gpu/drm/panel/panel-dsi-cm.c +++ b/drivers/gpu/drm/panel/panel-dsi-cm.c @@ -247,7 +247,7 @@ static ssize_t num_dsi_errors_show(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%d\n", errors); + return sysfs_emit(buf, "%d\n", errors); } static ssize_t hw_revision_show(struct device *dev, @@ -267,7 +267,7 @@ static ssize_t hw_revision_show(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x\n", id1, id2, id3); + return sysfs_emit(buf, "%02x.%02x.%02x\n", id1, id2, id3); } static DEVICE_ATTR_RO(num_dsi_errors); -- 2.7.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/nouveau/hwmon: Convert sysfs sprintf/snprintf family to sysfs_emit
Fix the following coccicheck warning:
drivers/gpu/drm/nouveau/nouveau_hwmon.c:44:8-16: WARNING:
use scnprintf or sprintf
drivers/gpu/drm/nouveau/nouveau_hwmon.c:57:8-16: WARNING:
use scnprintf or sprintf
drivers/gpu/drm/nouveau/nouveau_hwmon.c:90:8-16: WARNING:
use scnprintf or sprintf
Signed-off-by: Tian Tao
---
drivers/gpu/drm/nouveau/nouveau_hwmon.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
index 1c3104d..c6e5ee9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
@@ -41,7 +41,7 @@ static ssize_t
nouveau_hwmon_show_temp1_auto_point1_pwm(struct device *d,
struct device_attribute *a, char *buf)
{
- return snprintf(buf, PAGE_SIZE, "%d\n", 100);
+ return sysfs_emit(buf, "%d\n", 100);
}
static SENSOR_DEVICE_ATTR(temp1_auto_point1_pwm, 0444,
nouveau_hwmon_show_temp1_auto_point1_pwm, NULL, 0);
@@ -54,7 +54,7 @@ nouveau_hwmon_temp1_auto_point1_temp(struct device *d,
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvkm_therm *therm = nvxx_therm(&drm->client.device);
- return snprintf(buf, PAGE_SIZE, "%d\n",
+ return sysfs_emit(buf, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST) * 1000);
}
static ssize_t
@@ -87,7 +87,7 @@ nouveau_hwmon_temp1_auto_point1_temp_hyst(struct device *d,
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvkm_therm *therm = nvxx_therm(&drm->client.device);
- return snprintf(buf, PAGE_SIZE, "%d\n",
+ return sysfs_emit(buf, "%d\n",
therm->attr_get(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST) * 1000);
}
static ssize_t
--
2.7.4
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] vt_ioctl: make VT_RESIZEX behave like VT_RESIZE
On Tue, 29 Sep 2020, Greg KH wrote: > > > > >> VT_RESIZEX was introduced in Linux 1.3.3, but it is unclear that what > > > > >> comes to the "+ more" part, and I couldn't find a user of VT_RESIZEX. > > > > >> > > > > > > > > > > It seems this is/was used by "svgatextmode" which seems to be at > > > > > http://www.ibiblio.org/pub/Linux/utils/console/ > > > > > > > > > > Not sure if that kind of software still has a chance to work nowadays. > > > > > > > > > > > > > Thanks for the information. > > > > > > > > It seems that v.v_vlin = curr_textmode->VDisplay / > > > > (MOFLG_ISSET(curr_textmode, ATTR_DOUBLESCAN) ? 2 : 1) > > > > and v.v_clin = curr_textmode->FontHeight . Thus, v.v_clin is font's > > > > height and seems to be non-zero. > > > > But according to https://bugs.gentoo.org/19485 , people are using > > > > kernel framebuffer instead. > > > > > > > > > > Yes, this seems to be from pre framebuffer times. > > > > > > Back in the days "svga" was the wording you got for "pokes svga card > > > hardware registers from userspace drivers". And textmode means font > > > rendering is done via (fixed function in those times) hardware scanout > > > engine. Of course having only to update 2 bytes per character was a huge > > > saving early on. Likely this is also before vesa VBE was reliable. > > > > > > So i guess the point where this all starts going wrong allowing the X > > > parts > > > of the api to be combined with FB based rendering at all? Sounds the only > > > user didn't use that combination and so it was never tested? > > > > > > Then again, this all relates to hardware from 20 years ago... > > > > Imo userspace modesetting should be burned down anywhere we can. We've > > gotten away with this in drivers/gpu by just seamlessly transitioning to > > kernel drivers. > > > > Since th only userspace we've found seems to be able to cope if this ioctl > > doesn't do anything, my vote goes towards ripping it out completely and > > doing nothing in there. Only question is whether we should error or fail > > with a silent success: Former is safer, latter can avoid a few regression > > reports since the userspace tools keep "working", and usually people don't > > notice for stuff this old. It worked in drivers/gpu :-) > > This patch just ignores the ioctl and keeps on going, so userspace > "shouldn't" notice it :) > > And it's in linux-next now, so all should be good. So it does trigger with vgacon and my old server, which I have started experimenting with and for a start I have switched to a new kernel for an unrelated purpose (now that I have relieved it from all its usual tasks except for the last remaining one for which I haven't got the required user software ported to the new system yet): "struct vt_consize"->v_vlin is ignored. Please report if you need this. "struct vt_consize"->v_clin is ignored. Please report if you need this. It continues using svgatextmode with its glass (CRT) VT to set my usual 80x37 text mode (720x576 pixel resolution) by manipulating the VGA clock chip and the CRT controller appropriately for a nice refresh rate of 85Hz: Chipset = `TVGA8900', Textmode clock = 44.90 MHz, 80x37 chars, CharCell = 9x16. Refresh = 52.51kHz/84.7Hz. Indeed the piece of software became less usable around Y2K as clock chip support stopped being added to svgatextmode for new video adapters, but with the advent of LCD technology and its disregard for the refresh rate previously driven by the pixel clock the program got its second life and I have used it ever since with its plain VGA driver by just manipulating the CRTC for the resolution required: Chipset = `VGA', Textmode clock = 28.32 MHz, 80x37 chars, CharCell = 9x16. Refresh = 31.47kHz/49.0Hz. (that would still work with a standard 800x600 SVGA CRT, but the refresh rate would make anyone's eyes cry soon; with LCD it's just awesome, and the VGA emulation of the actual graphics adapter turns it at the video output into a 1600x1200 picture at the horizontal and vertical rates of 75KHz and 60Hz respectively, making the text produced on LCD outstanding while showing about the right amount of it). But I'm currently ~160km/100mi away from the server I have triggered this message with, so I cannot easily check what's going on with its VT. And I can't fiddle with my production laptop (ThinkPad P51) I have with me that I also use svgatextmode with so much as to reboot it with a new kernel (plain Debian 4.19.16-1~bpo9+1 still here). So what's the supposed impact of this change that prompted the inclusion of the messages? I can port svgatextmode (it's my own compilation anyway) if that is required for it to continue working correctly, but I need to understand the circumstances here. I have failed to find a satisfactory alternative solution to vgacon and svgatextmode; the main showstopper is the IBM's hardware trick for a 9x16 character cell that I rely on. Maciej _
[PATCH v1, 0/3] gamma set with cmdq
This series are based on 5.12-rc2 and provide 3 patch to set gamma lut with cmdq Yongqiang Niu (3): drm/mediatek: Separate aal module arm64: dts: mt8183: refine aal compatible name drm/mediatek: gamma set with cmdq arch/arm64/boot/dts/mediatek/mt8183.dtsi| 3 +- drivers/gpu/drm/mediatek/Makefile | 3 +- drivers/gpu/drm/mediatek/mtk_disp_aal.c | 167 drivers/gpu/drm/mediatek/mtk_disp_drv.h | 14 ++- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 11 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 18 +-- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 39 +-- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + 10 files changed, 213 insertions(+), 59 deletions(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_aal.c -- 1.8.1.1.dirty ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1, 1/3] drm/mediatek: Separate aal module
mt8183 aal has no gamma function
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 167
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 9 ++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 39 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
6 files changed, 187 insertions(+), 40 deletions(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_aal.c
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index dc54a7a..29098d7 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
-mediatek-drm-y := mtk_disp_ccorr.o \
+mediatek-drm-y := mtk_disp_aal.o \
+ mtk_disp_ccorr.o \
mtk_disp_color.o \
mtk_disp_gamma.o \
mtk_disp_ovl.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
new file mode 100644
index 000..64b4528
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "mtk_disp_drv.h"
+#include "mtk_drm_crtc.h"
+#include "mtk_drm_ddp_comp.h"
+
+#define DISP_AAL_EN0x
+#define AAL_EN BIT(0)
+#define DISP_AAL_SIZE 0x0030
+
+
+struct mtk_disp_aal_data {
+ bool has_gamma;
+};
+
+/**
+ * struct mtk_disp_aal - DISP_AAL driver structure
+ * @ddp_comp - structure containing type enum and hardware resources
+ * @crtc - associated crtc to report irq events to
+ */
+struct mtk_disp_aal {
+ struct clk *clk;
+ void __iomem *regs;
+ struct cmdq_client_reg cmdq_reg;
+ const struct mtk_disp_aal_data *data;
+};
+
+int mtk_aal_clk_enable(struct device *dev)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ return clk_prepare_enable(aal->clk);
+}
+
+void mtk_aal_clk_disable(struct device *dev)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ clk_disable_unprepare(aal->clk);
+}
+
+void mtk_aal_config(struct device *dev, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs,
DISP_AAL_SIZE);
+}
+
+void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ if (aal->data && aal->data->has_gamma)
+ mtk_gamma_set_common(aal->regs, state);
+}
+
+void mtk_aal_start(struct device *dev)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ writel(AAL_EN, aal->regs + DISP_AAL_EN);
+}
+
+void mtk_aal_stop(struct device *dev)
+{
+ struct mtk_disp_aal *aal = dev_get_drvdata(dev);
+
+ writel_relaxed(0x0, aal->regs + DISP_AAL_EN);
+}
+
+static int mtk_disp_aal_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ return 0;
+}
+
+static void mtk_disp_aal_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+}
+
+static const struct component_ops mtk_disp_aal_component_ops = {
+ .bind = mtk_disp_aal_bind,
+ .unbind = mtk_disp_aal_unbind,
+};
+
+static int mtk_disp_aal_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mtk_disp_aal *priv;
+ struct resource *res;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(priv->clk)) {
+ dev_err(dev, "failed to get aal clk\n");
+ return PTR_ERR(priv->clk);
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->regs = devm_ioremap_resource(dev, res);
+ if (IS_ERR(priv->regs)) {
+ dev_err(dev, "failed to ioremap aal\n");
+ return PTR_ERR(priv->regs);
+ }
+
+#if IS_REACHABLE(CONFIG_MTK_CMDQ)
+ ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
+ if (ret)
+ dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
+#endif
+
+ priv->data = of_device_get_match_data(dev);
+ platform_set_drvdata(pdev, priv);
+
+ ret = component_add(dev, &mtk_disp_aal_component_ops);
+ if (ret)
+ dev_err(dev, "Failed to add component: %d\n", ret);
+
+ return ret;
+}
+
+static int mtk_disp_aal_remove(struct platform_device *pdev)
+{
+
[PATCH v1, 2/3] arm64: dts: mt8183: refine aal compatible name
mt8183 aal is different with mt8173
remove mt8173 compatible name for mt8183 aal
Signed-off-by: Yongqiang Niu
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 80519a1..ee8f87f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1061,8 +1061,7 @@
};
aal0: aal@1401 {
- compatible = "mediatek,mt8183-disp-aal",
-"mediatek,mt8173-disp-aal";
+ compatible = "mediatek,mt8183-disp-aal";
reg = <0 0x1401 0 0x1000>;
interrupts = ;
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
--
1.8.1.1.dirty
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1, 3/3] drm/mediatek: gamma set with cmdq
gamma lut set in vsync active will caused display flash issue
set gamma lut with cmdq
Signed-off-by: Yongqiang Niu
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 4 ++--
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 7 ---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 11 ++-
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 18 +++---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 +---
5 files changed, 28 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
index 64b4528..c8e178e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -59,12 +59,12 @@ void mtk_aal_config(struct device *dev, unsigned int w,
mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs,
DISP_AAL_SIZE);
}
-void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
+void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state,
struct cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_aal *aal = dev_get_drvdata(dev);
if (aal->data && aal->data->has_gamma)
- mtk_gamma_set_common(aal->regs, state);
+ mtk_gamma_set_common(aal->regs, &aal->cmdq_reg, state,
cmdq_pkt);
}
void mtk_aal_start(struct device *dev)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 86c3068..c2e7dcb 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -14,7 +14,7 @@
void mtk_aal_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
-void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state);
+void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state,
struct cmdq_pkt *cmdq_pkt);
void mtk_aal_start(struct device *dev);
void mtk_aal_stop(struct device *dev);
@@ -50,8 +50,9 @@ void mtk_dither_set_common(void __iomem *regs, struct
cmdq_client_reg *cmdq_reg,
void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
-void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state);
+void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state, struct
cmdq_pkt *cmdq_pkt);
+void mtk_gamma_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
+ struct drm_crtc_state *state, struct cmdq_pkt
*cmdq_pkt);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 3ebf91e..99a4ff3 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -55,7 +55,8 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
+void mtk_gamma_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
+ struct drm_crtc_state *state, struct cmdq_pkt
*cmdq_pkt)
{
unsigned int i, reg;
struct drm_color_lut *lut;
@@ -65,23 +66,23 @@ void mtk_gamma_set_common(void __iomem *regs, struct
drm_crtc_state *state)
if (state->gamma_lut) {
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
+ mtk_ddp_write(cmdq_pkt, reg, cmdq_reg, regs, DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < MTK_LUT_SIZE; i++) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
((lut[i].blue >> 6) & LUT_10BIT_MASK);
- writel(word, (lut_base + i * 4));
+ mtk_ddp_write(cmdq_pkt, word, cmdq_reg, regs, (lut_base
+ i * 4));
}
}
}
-void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
+void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state, struct
cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- mtk_gamma_set_common(gamma->regs, state);
+ mtk_gamma_set_common(gamma->regs, &gamma->cmdq_reg, state, cmdq_pkt);
}
void mtk_gamma_config(struct device *dev, unsigned int w,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index 8b0de90..73428f0 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drive
