[Bug 208981] trace with B550I AORUS PRO AX and AMD Ryzen 5 PRO 4650G
https://bugzilla.kernel.org/show_bug.cgi?id=208981 --- Comment #5 from Florian La Roche (florian.laro...@gmail.com) --- I have tested kernels 5.6.19, 5.7.10 and 5.7.17 and they all show this problem. I assume your report means this also happens on a 5.4.x kernel (Ubuntu 20.04 LTS) Display seams to work ok and I am mostly using it on a server machine, so maybe not a huge problem, still a trace on each reboot... :-) (The kernel source mentions Display Port, clock values for power management etc. ???) Also seems to depend on BIOS data (?), so I'll check again on future BIOS versions as well as future kernel source code for fixes. [4.207712] smu driver if version = 0x000b, smu fw if version = 0x000e, smu fw version = 0x00374100 (55.65.0) [4.207717] SMU driver if version not matched [4.207795] SMU is initialized successfully! best regards, Florian La Roche -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/5] drm/bridge: nwl-dsi: Add support for clock-drop-level
Hi Robert,
On Fri, Aug 28, 2020 at 02:13:30PM +0300, Robert Chiras (OSS) wrote:
> From: Robert Chiras
>
> The clock-drop-level is needed in order to add more blanking space needed
> by DSI panels when sending DSI commands. One level is the equivalent of
> phy_ref rate from the PLL rate. Since the PLL rate is targeted as highest
> possible, each level should not get the crtc_clock too low, compared to
> the actual clock.
Did you check whether this is only needed during panel prepare (when the
image sequence is being sent)? I wonder if this is an artifact of the
driver sending pixel data too early - and if it's not whether we have
something else wrong so that we need to have a longer blanking period
with some panels?
Cheers,
-- Guido
>
> Example for a clock of 132M, with "clock-drop-level = <1>" in dts file
> will result in a crtc_clock of 129M, using the following logic:
> - video_pll rate to provide both phy_ref rate of 24M and pixel-clock
> of 132M is 1056M (divisor /43 for phy_ref and /8 for pixel-clock)
> - from this rate, we subtract the equivalent of phy_ref (24M) but
> keep the same divisor. This way, the video_pll rate will be 1056 - 24
> = 1032M.
> - new pixel-clock will be: 1032 / 8 = 129M
>
> For a "clock-drop-level = <2>", new pixel-clock will be:
> (1056 - (24 * 2)) / 8 = 1008 / 8 = 126M
>
> Signed-off-by: Robert Chiras
> ---
> drivers/gpu/drm/bridge/nwl-dsi.c | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c
> b/drivers/gpu/drm/bridge/nwl-dsi.c
> index 1228466..ac4aa0a 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -142,6 +142,7 @@ struct nwl_dsi {
>
> struct nwl_dsi_transfer *xfer;
> struct list_head valid_modes;
> + u32 clk_drop_lvl;
> };
>
> static const struct regmap_config nwl_dsi_regmap_config = {
> @@ -842,13 +843,14 @@ static unsigned long nwl_dsi_get_lcm(unsigned long a,
> unsigned long b)
>
> return ((unsigned long long)a * b) / gcf;
> }
> -
> /*
> * This function tries to adjust the crtc_clock for a DSI device in such a
> way
> * that the video pll will be able to satisfy both Display Controller pixel
> * clock (feeding out DPI interface) and our input phy_ref clock.
> + * Also, the DC pixel clock must be lower than the actual clock in order to
> + * have enough blanking space to send DSI commands, if the device is a panel.
> */
> -static void nwl_dsi_setup_pll_config(struct mode_config *config)
> +static void nwl_dsi_setup_pll_config(struct mode_config *config, u32 lvl)
> {
> unsigned long pll_rate;
> int div;
> @@ -908,7 +910,6 @@ static void nwl_dsi_setup_pll_config(struct mode_config
> *config)
> }
> }
>
> -
> /*
> * This function will try the required phy speed for current mode
> * If the phy speed can be achieved, the phy will save the speed
> @@ -1103,7 +1104,7 @@ nwl_dsi_bridge_mode_valid(struct drm_bridge *bridge,
>
> pll_rate = config->pll_rates[config->phy_rate_idx];
> if (dsi->pll_clk && !pll_rate)
> - nwl_dsi_setup_pll_config(config);
> + nwl_dsi_setup_pll_config(config, dsi->clk_drop_lvl);
>
> return MODE_OK;
> }
> @@ -1248,6 +1249,7 @@ static const struct drm_bridge_funcs
> nwl_dsi_bridge_funcs = {
> static int nwl_dsi_parse_dt(struct nwl_dsi *dsi)
> {
> struct platform_device *pdev = to_platform_device(dsi->dev);
> + struct device_node *np = dsi->dev->of_node;
> struct clk *clk;
> void __iomem *base;
> int ret;
> @@ -1364,6 +1366,8 @@ static int nwl_dsi_parse_dt(struct nwl_dsi *dsi)
> return PTR_ERR(dsi->rst_dpi);
> }
>
> + of_property_read_u32(np, "fsl,clock-drop-level", &dsi->clk_drop_lvl);
> +
> INIT_LIST_HEAD(&dsi->valid_modes);
>
> return 0;
> --
> 2.7.4
>
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[PATCH] drm/panel: s6e63m0: Fix up DRM_DEV* regression
Ooops the panel drivers stopped to use DRM_DEV* messages
and we predictably create errors by merging code that
still use it.
Signed-off-by: Linus Walleij
---
.../gpu/drm/panel/panel-samsung-s6e63m0-dsi.c | 28 +--
.../gpu/drm/panel/panel-samsung-s6e63m0-spi.c | 8 +++---
drivers/gpu/drm/panel/panel-samsung-s6e63m0.c | 18 ++--
3 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c
b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c
index 2ec9e7900791..6eca6f4c0e99 100644
--- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c
+++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-dsi.c
@@ -23,11 +23,11 @@ static int s6e63m0_dsi_dcs_read(struct device *dev, const
u8 cmd, u8 *data)
ret = mipi_dsi_dcs_read(dsi, cmd, data, 1);
if (ret < 0) {
- DRM_DEV_ERROR(dev, "could not read DCS CMD %02x\n", cmd);
+ dev_err(dev, "could not read DCS CMD %02x\n", cmd);
return ret;
}
- DRM_DEV_INFO(dev, "DSI read CMD %02x = %02x\n", cmd, *data);
+ dev_info(dev, "DSI read CMD %02x = %02x\n", cmd, *data);
return 0;
}
@@ -42,7 +42,7 @@ static int s6e63m0_dsi_dcs_write(struct device *dev, const u8
*data, size_t len)
int chunk;
int ret;
- DRM_DEV_INFO(dev, "DSI writing dcs seq: %*ph\n", (int)len, data);
+ dev_info(dev, "DSI writing dcs seq: %*ph\n", (int)len, data);
/* Pick out and skip past the DCS command */
cmd = *seqp;
@@ -56,9 +56,9 @@ static int s6e63m0_dsi_dcs_write(struct device *dev, const u8
*data, size_t len)
chunk = S6E63M0_DSI_MAX_CHUNK;
ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk);
if (ret < 0) {
- DRM_DEV_ERROR(dev,
- "error sending DCS command seq cmd %02x\n",
- cmd);
+ dev_err(dev,
+ "error sending DCS command seq cmd %02x\n",
+ cmd);
return ret;
}
cmdwritten += chunk;
@@ -70,23 +70,23 @@ static int s6e63m0_dsi_dcs_write(struct device *dev, const
u8 *data, size_t len)
chunk = S6E63M0_DSI_MAX_CHUNK;
ret = mipi_dsi_dcs_write(dsi, MCS_GLOBAL_PARAM, &cmdwritten, 1);
if (ret < 0) {
- DRM_DEV_ERROR(dev,
- "error sending CMD %02x global param
%02x\n",
- cmd, cmdwritten);
+ dev_err(dev,
+ "error sending CMD %02x global param %02x\n",
+ cmd, cmdwritten);
return ret;
}
ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk);
if (ret < 0) {
- DRM_DEV_ERROR(dev,
- "error sending CMD %02x chunk\n",
- cmd);
+ dev_err(dev,
+ "error sending CMD %02x chunk\n",
+ cmd);
return ret;
}
cmdwritten += chunk;
seqp += chunk;
}
- DRM_DEV_INFO(dev, "sent command %02x %02x bytes\n",
-cmd, cmdwritten);
+ dev_info(dev, "sent command %02x %02x bytes\n",
+cmd, cmdwritten);
usleep_range(8000, 9000);
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c
b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c
index 3b1a2a3a44ea..d298d780220d 100644
--- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c
+++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c
@@ -41,7 +41,7 @@ static int s6e63m0_spi_dcs_write(struct device *dev, const u8
*data, size_t len)
{
int ret = 0;
- DRM_DEV_DEBUG(dev, "SPI writing dcs seq: %*ph\n", (int)len, data);
+ dev_dbg(dev, "SPI writing dcs seq: %*ph\n", (int)len, data);
ret = s6e63m0_spi_write_word(dev, *data);
while (!ret && --len) {
@@ -50,8 +50,8 @@ static int s6e63m0_spi_dcs_write(struct device *dev, const u8
*data, size_t len)
}
if (ret) {
- DRM_DEV_ERROR(dev, "SPI error %d writing dcs seq: %*ph\n", ret,
- (int)len, data);
+ dev_err(dev, "SPI error %d writing dcs seq: %*ph\n", ret,
+ (int)len, data);
}
usleep_range(300, 310);
@@ -68,7 +68,7 @@ static int s6e63m0_spi_probe(struct spi_device *spi)
spi->mode = SPI_MODE_3;
ret = spi_setup(spi);
if (ret < 0) {
- DRM_DEV_ERROR(dev, "spi setup failed.\n");
+ dev_err(dev, "spi setup failed.\n");
return ret;
}
return s6e63m0_probe(dev, s6e63m0_spi_dcs_read, s6e63m0_spi_dcs_write,
diff --git a/drivers/gpu/drm/pane
[Bug 208373] drm:drm_atomic_helper_wait_for_dependencies - drm_kms_helper - flip_done timed out
https://bugzilla.kernel.org/show_bug.cgi?id=208373 Gluzskiy Alexandr (sss123n...@list.ru) changed: What|Removed |Added CC||sss123n...@list.ru --- Comment #5 from Gluzskiy Alexandr (sss123n...@list.ru) --- Created attachment 292383 --> https://bugzilla.kernel.org/attachment.cgi?id=292383&action=edit dmesg i have similar problem on 5.8.5 if i switch SDL/SDL2 app to fullscreen mode, screen going black, gpu driver hangs, X and SDLX app cannot be killed, following appears in dmesg: -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [git pull] drm fixes for 5.9-rc4
On Sat, 5 Sep 2020 at 05:02, Linus Torvalds wrote: > > On Thu, Sep 3, 2020 at 8:53 PM Dave Airlie wrote: > > > > Not much going on this week, nouveau has a display hw bug workaround, > > amdgpu has some PM fixes and CIK regression fixes, one single radeon > > PLL fix, and a couple of i915 display fixes. > > Any movement on the i915 relocation issue? I've only seen the one > report for the 64-bit case, but clearly there was more going on than > just the missing page table flush on 32-bit.. I'm going to pull in the reverts this week I think, Intel are changing some part of their patchflows to me, but the 5.10 queue had to revert some stuff in this area for other reasons, so I'd like to sanely get those into 5.9 as well. Dave. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 209179] New: nouveau 0000:01:00.0: can't change power state from D3cold to D0 (config space inaccessible)
https://bugzilla.kernel.org/show_bug.cgi?id=209179 Bug ID: 209179 Summary: nouveau :01:00.0: can't change power state from D3cold to D0 (config space inaccessible) Product: Drivers Version: 2.5 Kernel Version: 5.8.7 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-...@kernel-bugs.osdl.org Reporter: ker...@mattmcadoo.com Regression: No Created attachment 292387 --> https://bugzilla.kernel.org/attachment.cgi?id=292387&action=edit full dmesg output Lenovo ThinkPad W540, with hybrid video (Intel/Nvidia) 01:00.0 VGA compatible controller: NVIDIA Corporation GK107GLM [Quadro K1100M] (rev ff) (prog-if ff) !!! Unknown header type 7f Kernel driver in use: nouveau Dmesg has numerous errors like the following (full dmesg output in attachment): [ 16.243256] nouveau :01:00.0: can't change power state from D3cold to D0 (config space inaccessible) [ 16.243265] nouveau :01:00.0: can't change power state from D3cold to D0 (config space inaccessible) [ 16.303637] nouveau :01:00.0: can't change power state from D3cold to D0 (config space inaccessible) [ 16.303659] nouveau :01:00.0: tmr: stalled at [ 16.303659] [ cut here ] [ 16.303660] nouveau :01:00.0: timeout [ 16.303679] WARNING: CPU: 6 PID: 87 at drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c:107 nvkm_pmu_reset+0x275/0x2d0 [ 16.303680] Modules linked in: [ 16.303683] CPU: 6 PID: 87 Comm: kworker/6:1 Not tainted 5.8.7-gentoo #5 [ 16.303684] Hardware name: LENOVO 20BG0014US/20BG0014US, BIOS GNET91WW (2.39 ) 05/29/2019 [ 16.303688] Workqueue: pm pm_runtime_work [ 16.303691] RIP: 0010:nvkm_pmu_reset+0x275/0x2d0 [ 16.303693] Code: e4 74 57 e8 dd 09 10 00 4c 89 e2 48 c7 c7 66 d0 33 84 48 83 05 8b f5 5e 04 01 48 89 c6 e8 62 19 1c ff 48 83 05 83 f5 5e 04 01 <0f> 0b 48 83 05 81 f5 5e 04 01 48 8b 45 00 48 83 05 7d f5 5e 04 01 [ 16.303694] RSP: 0018:c92c7a80 EFLAGS: 00010202 [ 16.303695] RAX: RBX: 5338e800 RCX: [ 16.303696] RDX: 0001 RSI: 0002 RDI: 0001 [ 16.303697] RBP: 5337da00 R08: 0491 R09: [ 16.303699] R10: 0002 R11: 0007aee4 R12: 591c95a0 [ 16.303700] R13: 0003caea9731 R14: 0003caea956f R15: 5921b0b0 [ 16.303701] FS: () GS:5d78() knlGS: [ 16.303702] CS: 0010 DS: ES: CR0: 80050033 [ 16.303703] CR2: 55a07a344f14 CR3: 00083ea48006 CR4: 001606e0 [ 16.303704] Call Trace: [ 16.303710] nvkm_pmu_preinit+0x1a/0x30 [ 16.303712] nvkm_subdev_preinit+0x44/0xa0 [ 16.303716] ? nvkm_device_pci_preinit+0x5e/0x80 [ 16.303717] nvkm_device_init+0x76/0x2e0 [ 16.303720] nvkm_udevice_init+0x64/0x90 [ 16.303721] nvkm_object_init+0x52/0x190 [ 16.303723] nvkm_object_init+0x8b/0x190 [ 16.303724] nvkm_object_init+0x8b/0x190 [ 16.303727] ? new_id_store+0x2a0/0x2a0 [ 16.303729] nvkm_client_resume+0x19/0x30 [ 16.303732] nvif_client_resume+0x22/0x30 [ 16.303734] nouveau_do_resume+0x32/0x120 [ 16.303736] nouveau_pmops_runtime_resume+0xa4/0x1d0 [ 16.303738] pci_pm_runtime_resume+0xba/0x120 [ 16.303740] ? new_id_store+0x2a0/0x2a0 [ 16.303741] __rpm_callback+0xd6/0x1f0 [ 16.303743] ? new_id_store+0x2a0/0x2a0 [ 16.303744] ? new_id_store+0x2a0/0x2a0 [ 16.303745] rpm_callback+0x36/0xc0 [ 16.303746] ? new_id_store+0x2a0/0x2a0 [ 16.303748] rpm_resume+0x7d0/0x9f0 [ 16.303750] __pm_runtime_resume+0x5c/0x90 [ 16.303751] ? new_id_store+0x2a0/0x2a0 [ 16.303752] rpm_get_suppliers+0x4c/0x1a0 [ 16.303754] ? new_id_store+0x2a0/0x2a0 [ 16.303755] __rpm_callback+0x198/0x1f0 [ 16.303756] ? new_id_store+0x2a0/0x2a0 [ 16.303757] ? new_id_store+0x2a0/0x2a0 [ 16.303759] rpm_callback+0x36/0xc0 [ 16.303760] ? new_id_store+0x2a0/0x2a0 [ 16.303761] rpm_resume+0x7d0/0x9f0 [ 16.303763] pm_runtime_work+0x99/0xf0 [ 16.303765] process_one_work+0x203/0x620 [ 16.303767] worker_thread+0x257/0x5f0 [ 16.303769] ? rescuer_thread+0x4a0/0x4a0 [ 16.303770] kthread+0x1d0/0x220 [ 16.303772] ? kthread_create_worker+0xa0/0xa0 [ 16.303774] ret_from_fork+0x22/0x30 [ 16.303777] ---[ end trace 084955cbd974989c ]--- -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 209179] nouveau 0000:01:00.0: can't change power state from D3cold to D0 (config space inaccessible)
https://bugzilla.kernel.org/show_bug.cgi?id=209179 --- Comment #1 from ker...@mattmcadoo.com --- Created attachment 292389 --> https://bugzilla.kernel.org/attachment.cgi?id=292389&action=edit 5.8.7 kernel config -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 4/9] arm64: dts: renesas: r8a77961: Add FCP device nodes
From: Kuninori Morimoto
This patch adds FCP device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 52 +++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 0abfea0b27be..fe0db11b9cb9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2004,6 +2004,58 @@ pciec1: pcie@ee80 {
status = "disabled";
};
+ fcpf0: fcp@fe95 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe95 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A77961_PD_A3VC>;
+ resets = <&cpg 615>;
+ };
+
+ fcpvb0: fcp@fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A77961_PD_A3VC>;
+ resets = <&cpg 607>;
+ };
+
+ fcpvi0: fcp@fe9af000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A77961_PD_A3VC>;
+ resets = <&cpg 611>;
+ iommus = <&ipmmu_vc0 19>;
+ };
+
+ fcpvd0: fcp@fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ iommus = <&ipmmu_vi0 8>;
+ };
+
+ fcpvd1: fcp@fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ iommus = <&ipmmu_vi0 9>;
+ };
+
+ fcpvd2: fcp@fea37000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 601>;
+ iommus = <&ipmmu_vi0 10>;
+ };
+
csi20: csi2@fea8 {
reg = <0 0xfea8 0 0x1>;
/* placeholder */
--
2.25.1
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[PATCH 1/9] dt-bindings: display: renesas: du: Document the r8a77961 bindings
From: Kuninori Morimoto Document the R-Car M3-W+ (R8A77961) SoC in the R-Car DU bindings. Signed-off-by: Kuninori Morimoto --- Documentation/devicetree/bindings/display/renesas,du.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt index 51cd4d162770..9e0c473cc4c0 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.txt +++ b/Documentation/devicetree/bindings/display/renesas,du.txt @@ -18,6 +18,7 @@ Required Properties: - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU +- "renesas,du-r8a77961" for R8A77961 (R-Car M3-W+) compatible DU - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU - "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU -- 2.25.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 5/9] arm64: dts: renesas: r8a77961: Add VSP device nodes
From: Kuninori Morimoto
This patch adds VSP device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 55 +++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index fe0db11b9cb9..c2a6918ed5e6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2056,6 +2056,61 @@ fcpvd2: fcp@fea37000 {
iommus = <&ipmmu_vi0 10>;
};
+ vspb: vsp@fe96 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe96 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A77961_PD_A3VC>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
+ vspd0: vsp@fea2 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea2 0 0x5000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 623>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
+ vspd1: vsp@fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x5000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 622>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 622>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
+ vspd2: vsp@fea3 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea3 0 0x5000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 621>;
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 621>;
+
+ renesas,fcp = <&fcpvd2>;
+ };
+
+ vspi0: vsp@fe9a {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a 0 0x8000>;
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A77961_PD_A3VC>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
+ };
+
csi20: csi2@fea8 {
reg = <0 0xfea8 0 0x1>;
/* placeholder */
--
2.25.1
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[PATCH 2/9] dt-bindings: display: renesas: dw-hdmi: Add R8A77961 support
From: Kuninori Morimoto This patch adds R-Car M3-W+ (R8A77961) SoC bindings. Signed-off-by: Kuninori Morimoto --- .../devicetree/bindings/display/bridge/renesas,dw-hdmi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt index 819f3e31013c..6b2aa000b204 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt @@ -16,6 +16,7 @@ Required properties: - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX + - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible HDMI TX -- 2.25.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 0/9] arm64: renesas: enable HDMI Display/Sound on R-Car M3-W+ Salvator-XS
Hi Geert, Laurent These patches enables HDMI Display/Sound for R8A77961. These are tested on R-Car M3-W+ Salvator-XS board. Kuninori Morimoto (9): dt-bindings: display: renesas: du: Document the r8a77961 bindings dt-bindings: display: renesas: dw-hdmi: Add R8A77961 support drm: rcar-du: Add r8a77961 support arm64: dts: renesas: r8a77961: Add FCP device nodes arm64: dts: renesas: r8a77961: Add VSP device nodes arm64: dts: renesas: r8a77961: Add DU device nodes arm64: dts: renesas: r8a77961: Add HDMI device nodes arm64: dts: renesas: r8a77961-salvator-xs: add HDMI Display support arm64: dts: renesas: r8a77961-salvator-xs: add HDMI Sound support .../display/bridge/renesas,dw-hdmi.txt| 1 + .../bindings/display/renesas,du.txt | 1 + .../boot/dts/renesas/r8a77961-salvator-xs.dts | 57 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 132 +- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 1 + 5 files changed, 190 insertions(+), 2 deletions(-) -- 2.25.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 3/9] drm: rcar-du: Add r8a77961 support
From: Kuninori Morimoto
This patch adds R-Car M3-W+ (R8A77961) support which has
compatible to R-Car M3-W (R8A77960).
Signed-off-by: Kuninori Morimoto
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index f53b0ec71085..64533cbdbef0 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -458,6 +458,7 @@ static const struct of_device_id rcar_du_of_table[] = {
{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
{ .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
+ { .compatible = "renesas,du-r8a77961", .data = &rcar_du_r8a7796_info },
{ .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info },
{ .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info },
{ .compatible = "renesas,du-r8a77980", .data = &rcar_du_r8a77970_info },
--
2.25.1
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[PATCH 6/9] arm64: dts: renesas: r8a77961: Add DU device nodes
From: Kuninori Morimoto
This patch adds DU device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index c2a6918ed5e6..dcd92f5abad6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2165,8 +2165,19 @@ port@2 {
};
du: display@feb0 {
+ compatible = "renesas,du-r8a77961";
reg = <0 0xfeb0 0 0x7>;
- /* placeholder */
+ interrupts = ,
+,
+;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+<&cpg CPG_MOD 722>;
+ clock-names = "du.0", "du.1", "du.2";
+ resets = <&cpg 724>, <&cpg 722>;
+ reset-names = "du.0", "du.2";
+
+ renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
+ status = "disabled";
ports {
#address-cells = <1>;
--
2.25.1
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[PATCH 9/9] arm64: dts: renesas: r8a77961-salvator-xs: add HDMI Sound support
From: Kuninori Morimoto
This patch enables HDMI Sound on R-Car M3-W+ Salvator-XS board.
This patch is test on R-Car M3-W+ Salvator-XS board.
This reverts commit b997613fad58a03588f0f64a3d86db6c5bd76dd2.
Signed-off-by: Kuninori Morimoto
---
.../boot/dts/renesas/r8a77961-salvator-xs.dts | 29 +++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
index ca21a702db54..1e7603365106 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
@@ -51,9 +51,38 @@ rcar_dw_hdmi0_out: endpoint {
remote-endpoint = <&hdmi0_con>;
};
};
+ port@2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
&hdmi0_con {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
+
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port@1 {
+ reg = <1>;
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ };
+};
+
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1>; /* HDMI0 */
+};
--
2.25.1
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[PATCH 8/9] arm64: dts: renesas: r8a77961-salvator-xs: add HDMI Display support
From: Kuninori Morimoto
This patch enables HDMI Display on R-Car M3-W+ Salvator-XS board.
This patch is test on R-Car M3-W+ Salvator-XS board.
Signed-off-by: Kuninori Morimoto
---
.../boot/dts/renesas/r8a77961-salvator-xs.dts | 28 +++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
index 2ffc7e31dd58..ca21a702db54 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts
@@ -29,3 +29,31 @@ memory@6 {
reg = <0x6 0x 0x1 0x>;
};
};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+<&cpg CPG_MOD 723>,
+<&cpg CPG_MOD 722>,
+<&versaclock6 1>,
+<&x21_clk>,
+<&versaclock6 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};
+
+&hdmi0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ rcar_dw_hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi0_con>;
+ };
+ };
+ };
+};
+
+&hdmi0_con {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
+};
--
2.25.1
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[PATCH 7/9] arm64: dts: renesas: r8a77961: Add HDMI device nodes
From: Kuninori Morimoto
This patch adds HDMI device nodes for R-Car M3-W+ (r8a77961) SoC.
This patch is test on R-Car M3-W+ Salvator-XS board.
Signed-off-by: Kuninori Morimoto
---
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index dcd92f5abad6..5050cf8e7625 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2145,14 +2145,23 @@ port@1 {
};
hdmi0: hdmi@fead {
+ compatible = "renesas,r8a77961-hdmi",
"renesas,rcar-gen3-hdmi";
reg = <0 0xfead 0 0x1>;
- /* placeholder */
+ interrupts = ;
+ clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE
R8A77961_CLK_HDMI>;
+ clock-names = "iahb", "isfr";
+ power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+ resets = <&cpg 729>;
+ status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
+ dw_hdmi0_in: endpoint {
+ remote-endpoint =
<&du_out_hdmi0>;
+ };
};
port@1 {
reg = <1>;
@@ -2191,6 +2200,7 @@ du_out_rgb: endpoint {
port@1 {
reg = <1>;
du_out_hdmi0: endpoint {
+ remote-endpoint =
<&dw_hdmi0_in>;
};
};
port@2 {
--
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Re: [PATCH] udmabuf: Add missing compact_ioctl
Hi, > +#ifdef CONFIG_COMPAT > + .compat_ioctl = udmabuf_ioctl, > +#endif Pushed to drm-misc-next. thanks, Gerd ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 2/2] drm/virtio: set max_segment
When initializing call virtio_max_dma_size() to figure the scatter list
limit. Needed to make virtio-gpu work properly with SEV.
v2: place max_segment in drm driver not gem object.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/virtio/virtgpu_kms.c
b/drivers/gpu/drm/virtio/virtgpu_kms.c
index 75d0dc2f6d28..151471acdfcf 100644
--- a/drivers/gpu/drm/virtio/virtgpu_kms.c
+++ b/drivers/gpu/drm/virtio/virtgpu_kms.c
@@ -167,6 +167,7 @@ int virtio_gpu_init(struct drm_device *dev)
DRM_ERROR("failed to alloc vbufs\n");
goto err_vbufs;
}
+ dev->max_segment = virtio_max_dma_size(vgdev->vdev);
/* get display info */
virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
--
2.27.0
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[PATCH v3 1/2] drm: allow limiting the scatter list size.
Add max_segment argument to drm_prime_pages_to_sg(). When set pass it
through to the __sg_alloc_table_from_pages() call, otherwise use
SCATTERLIST_MAX_SEGMENT.
Also add max_segment field to drm driver and pass it to
drm_prime_pages_to_sg() calls in drivers and helpers.
v2: place max_segment in drm driver not gem object.
v3: move max_segment next to the other gem fields.
Signed-off-by: Gerd Hoffmann
---
include/drm/drm_device.h| 8
include/drm/drm_prime.h | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++-
drivers/gpu/drm/drm_gem_shmem_helper.c | 3 ++-
drivers/gpu/drm/drm_prime.c | 10 +++---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 3 ++-
drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c | 3 ++-
drivers/gpu/drm/msm/msm_gem.c | 3 ++-
drivers/gpu/drm/msm/msm_gem_prime.c | 3 ++-
drivers/gpu/drm/nouveau/nouveau_prime.c | 3 ++-
drivers/gpu/drm/radeon/radeon_prime.c | 3 ++-
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 6 --
drivers/gpu/drm/tegra/gem.c | 3 ++-
drivers/gpu/drm/vgem/vgem_drv.c | 3 ++-
drivers/gpu/drm/xen/xen_drm_front_gem.c | 3 ++-
15 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index f4f68e7a9149..c455ef404ca6 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -308,6 +308,14 @@ struct drm_device {
/** @vma_offset_manager: GEM information */
struct drm_vma_offset_manager *vma_offset_manager;
+ /**
+* @max_segment:
+*
+* Max size for scatter list segments for GEM objects. When
+* unset the default (SCATTERLIST_MAX_SEGMENT) is used.
+*/
+ size_t max_segment;
+
/** @vram_mm: VRAM MM memory manager */
struct drm_vram_mm *vram_mm;
diff --git a/include/drm/drm_prime.h b/include/drm/drm_prime.h
index 9af7422b44cf..2c3689435cb4 100644
--- a/include/drm/drm_prime.h
+++ b/include/drm/drm_prime.h
@@ -88,7 +88,8 @@ void drm_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void
*vaddr);
int drm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
int drm_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma);
-struct sg_table *drm_prime_pages_to_sg(struct page **pages, unsigned int
nr_pages);
+struct sg_table *drm_prime_pages_to_sg(struct page **pages, unsigned int
nr_pages,
+ size_t max_segment);
struct dma_buf *drm_gem_prime_export(struct drm_gem_object *obj,
int flags);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index 519ce4427fce..8f6a647757e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -303,7 +303,8 @@ static struct sg_table *amdgpu_dma_buf_map(struct
dma_buf_attachment *attach,
switch (bo->tbo.mem.mem_type) {
case TTM_PL_TT:
sgt = drm_prime_pages_to_sg(bo->tbo.ttm->pages,
- bo->tbo.num_pages);
+ bo->tbo.num_pages,
+ obj->dev->max_segment);
if (IS_ERR(sgt))
return sgt;
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
index 4b7cfbac4daa..8f47b41b0b2f 100644
--- a/drivers/gpu/drm/drm_gem_shmem_helper.c
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -656,7 +656,8 @@ struct sg_table *drm_gem_shmem_get_sg_table(struct
drm_gem_object *obj)
WARN_ON(shmem->base.import_attach);
- return drm_prime_pages_to_sg(shmem->pages, obj->size >> PAGE_SHIFT);
+ return drm_prime_pages_to_sg(shmem->pages, obj->size >> PAGE_SHIFT,
+obj->dev->max_segment);
}
EXPORT_SYMBOL_GPL(drm_gem_shmem_get_sg_table);
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 1693aa7c14b5..27c783fd6633 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -802,7 +802,8 @@ static const struct dma_buf_ops drm_gem_prime_dmabuf_ops =
{
*
* This is useful for implementing &drm_gem_object_funcs.get_sg_table.
*/
-struct sg_table *drm_prime_pages_to_sg(struct page **pages, unsigned int
nr_pages)
+struct sg_table *drm_prime_pages_to_sg(struct page **pages, unsigned int
nr_pages,
+ size_t max_segment)
{
struct sg_table *sg = NULL;
int ret;
@@ -813,8 +814,11 @@ struct sg_table *drm_prime_pages_to_sg(struct page
**pages, unsigned int nr_page
goto out;
}
- ret = sg_alloc_table_from_pages(sg, pages, nr_pages, 0,
- nr_pages << PAGE_SHIFT, GFP_KERNEL);
+ if (max_segment == 0 || max_segment > SCA
[PATCH v3 0/2] drm: fix virtio-gpu + sev
virtio-gpu must make sure scatter list segments are not too big. Gerd Hoffmann (2): drm: allow limiting the scatter list size. drm/virtio: set max_segment include/drm/drm_device.h| 8 include/drm/drm_prime.h | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ++- drivers/gpu/drm/drm_gem_shmem_helper.c | 3 ++- drivers/gpu/drm/drm_prime.c | 10 +++--- drivers/gpu/drm/etnaviv/etnaviv_gem.c | 3 ++- drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c | 3 ++- drivers/gpu/drm/msm/msm_gem.c | 3 ++- drivers/gpu/drm/msm/msm_gem_prime.c | 3 ++- drivers/gpu/drm/nouveau/nouveau_prime.c | 3 ++- drivers/gpu/drm/radeon/radeon_prime.c | 3 ++- drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 6 -- drivers/gpu/drm/tegra/gem.c | 3 ++- drivers/gpu/drm/vgem/vgem_drv.c | 3 ++- drivers/gpu/drm/virtio/virtgpu_kms.c| 1 + drivers/gpu/drm/xen/xen_drm_front_gem.c | 3 ++- 16 files changed, 44 insertions(+), 17 deletions(-) -- 2.27.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 1/2] drm: allow limiting the scatter list size.
> > + /**
> > +* @max_segment:
> > +*
> > +* Max size for scatter list segments. When unset the default
> > +* (SCATTERLIST_MAX_SEGMENT) is used.
> > +*/
> > + size_t max_segment;
>
> Is there no better place for this then "at the bottom"? drm_device is a
> huge structure, piling stuff up randomly doesn't make it better :-)
Moved next to the other gem fields for now (v3 posted).
> I think ideally we'd have a gem substruct like we have on the modeset side
> at least.
Phew, that'll be quite some churn in the tree. And there aren't that many
gem-related fields in struct drm_device.
So you are looking for something like below (header changes only)?
take care,
Gerd
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index c455ef404ca6..950167ede98a 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -299,22 +299,8 @@ struct drm_device {
/** @mode_config: Current mode config */
struct drm_mode_config mode_config;
- /** @object_name_lock: GEM information */
- struct mutex object_name_lock;
-
- /** @object_name_idr: GEM information */
- struct idr object_name_idr;
-
- /** @vma_offset_manager: GEM information */
- struct drm_vma_offset_manager *vma_offset_manager;
-
- /**
-* @max_segment:
-*
-* Max size for scatter list segments for GEM objects. When
-* unset the default (SCATTERLIST_MAX_SEGMENT) is used.
-*/
- size_t max_segment;
+ /** @gem_config: Current GEM config */
+ struct drm_gem_config gem_config;
/** @vram_mm: VRAM MM memory manager */
struct drm_vram_mm *vram_mm;
diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h
index 337a48321705..74129fb29fb8 100644
--- a/include/drm/drm_gem.h
+++ b/include/drm/drm_gem.h
@@ -39,6 +39,25 @@
#include
+struct drm_gem_config {
+ /** @object_name_lock: GEM information */
+ struct mutex object_name_lock;
+
+ /** @object_name_idr: GEM information */
+ struct idr object_name_idr;
+
+ /** @vma_offset_manager: GEM information */
+ struct drm_vma_offset_manager *vma_offset_manager;
+
+ /**
+* @max_segment:
+*
+* Max size for scatter list segments for GEM objects. When
+* unset the default (SCATTERLIST_MAX_SEGMENT) is used.
+*/
+ size_t max_segment;
+};
+
struct drm_gem_object;
/**
___
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Re: [Linux-kernel-mentees] [PATCH v1 0/2] video: fbdev: radeonfb: PCI PM framework upgrade and fix-ups.
On Mon, Sep 07, 2020 at 12:01:53PM +0530, Vaibhav Gupta wrote: > Please review this patch-series. I see no patch here :( ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [Linux-kernel-mentees] [PATCH v1 1/2] video: fbdev: aty: radeon_pm: remove redundant CONFIG_PM container
On Mon, Sep 07, 2020 at 12:03:47PM +0530, Vaibhav Gupta wrote: > Why did you send empty emails out? greg k-h ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
