Re: [PATCH v5 0/5] drm/ttm, amdgpu: Introduce LRU bulk move functionality

2018-09-02 Thread Mike Lothian
Hi

Is there an updated series? These no longer apply for me

Thanks

Mike

On Wed, 22 Aug 2018 at 09:42 Huang Rui  wrote:

> On Wed, Aug 22, 2018 at 04:24:02PM +0800, Christian König wrote:
> > Please commit patches #1, #2 and #3, doesn't make much sense to send
> > them out even more often.
> >
> > Jerry's comments on patch #4 sound valid to me as well, but with those
> > minor issues fixes/commented I think we can commit it.
> >
> > Thanks for taking care of this,
> > Christian.
>
> OK. Thanks to your time.
>
> Thanks,
> Ray
>
> >
> > Am 22.08.2018 um 09:52 schrieb Huang Rui:
> > > The idea and proposal is originally from Christian, and I continue to
> work to
> > > deliver it.
> > >
> > > Background:
> > > amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then
> move all of
> > > them on the end of LRU list one by one. Thus, that cause so many BOs
> moved to
> > > the end of the LRU, and impact performance seriously.
> > >
> > > Then Christian provided a workaround to not move PD/PT BOs on LRU with
> below
> > > patch:
> > > Commit 0bbf32026cf5ba41e9922b30e26e1bed1ecd38ae ("drm/amdgpu: band aid
> > > validating VM PTs")
> > >
> > > However, the final solution should bulk move all PD/PT and PerVM BOs
> on the LRU
> > > instead of one by one.
> > >
> > > Whenever amdgpu_vm_validate_pt_bos() is called and we have BOs which
> need to be
> > > validated we move all BOs together to the end of the LRU without
> dropping the
> > > lock for the LRU.
> > >
> > > While doing so we note the beginning and end of this block in the LRU
> list.
> > >
> > > Now when amdgpu_vm_validate_pt_bos() is called and we don't have
> anything to do,
> > > we don't move every BO one by one, but instead cut the LRU list into
> pieces so
> > > that we bulk move everything to the end in just one operation.
> > >
> > > Test data:
> > >
> +--+-+---+---+
> > > |  |The Talos|Clpeak(OCL)|BusSpeedReadback(OCL)
>   |
> > > |  |Principle(Vulkan)|   |
>|
> > >
> ++
> > > |  | |   |0.319 ms(1k) 0.314
> ms(2K) 0.308 ms(4K) |
> > > | Original |  147.7 FPS  |  76.86 us |0.307 ms(8K) 0.310
> ms(16K) |
> > >
> ++
> > > | Orignial + WA| |   |0.254 ms(1K) 0.241
> ms(2K)  |
> > > |(don't move   |  162.1 FPS  |  42.15 us |0.230 ms(4K) 0.223
> ms(8K) 0.204 ms(16K)|
> > > |PT BOs on LRU)| |   |
>|
> > >
> ++
> > > | Bulk move|  163.1 FPS  |  40.52 us |0.244 ms(1K) 0.252
> ms(2K) 0.213 ms(4K) |
> > > |  | |   |0.214 ms(8K) 0.225
> ms(16K) |
> > >
> +--+-+---+---+
> > >
> > > After test them with above three benchmarks include vulkan and opencl.
> We can
> > > see the visible improvement than original, and even better than
> original with
> > > workaround.
> > >
> > > Changes from V1 -> V2:
> > > - Fix to missed the BOs in relocated/moved that should be also moved
> to the end
> > >of LRU.
> > >
> > > Changes from V2 -> V3:
> > > - Remove unused parameter and use list_for_each_entry instead of the
> one with
> > >save entry.
> > >
> > > Changes from V3 -> V4:
> > > - Move the amdgpu_vm_move_to_lru_tail after command submission, at
> that time,
> > >all bo will be back on idle list.
> > >
> > > Changes from V4 -> V5:
> > > - Remove amdgpu_vm_move_to_lru_tail_by_list(), use bulk_moveable
> instread of
> > >validated, and move ttm_bo_bulk_move_lru_tail() also into
> > >amdgpu_vm_move_to_lru_tail().
> > >
> > > Thanks,
> > > Ray
> > >
> > > Christian König (2):
> > >drm/ttm: add helper structures for bulk moves on lru list
> > >drm/ttm: revise ttm_bo_move_to_lru_tail to support bulk moves
> > >
> > > Huang Rui (3):
> > >drm/ttm: add bulk move function on LRU
> > >drm/amdgpu: use bulk moves for efficient VM LRU handling (v5)
> > >drm/amdgpu: move PD/PT bos on LRU again
> > >
> > >   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +
> > >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 68
> +++--
> > >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 11 -
> > >   drivers/gpu/drm/ttm/ttm_bo.c   | 78
> +-
> > >   include/drm/ttm/ttm_bo_api.h   | 16 ++-
> > >   include/drm/ttm/ttm_bo_driver.h| 28 
> > >   6 files changed, 186 insertions(+), 25 deletions(-)
> > >
> >
> ___
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> amd-...@lists.freedesktop.org
> https://li

[Bug 107465] amdgpu.dc=1 triggers graphic card not recognizing native screen resolution

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107465

Germano Massullo  changed:

   What|Removed |Added

Summary|System does not recognize   |amdgpu.dc=1 triggers
   |native screen resolution|graphic card not
   ||recognizing native screen
   ||resolution

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[Bug 107465] amdgpu.dc=1 triggers graphic card not recognizing native screen resolution

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107465

--- Comment #3 from Germano Massullo  ---
Just a clarification: title "amdgpu.dc=1" is not meant as having amdgpu.dc=1 as
setted boot parameter, the situation is:
no boot parameter = problem triggered
amdgpu.dc=0 = no problem

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Re: [PATCH 00/27] Allwinner H6 DE3 and HDMI support

2018-09-02 Thread Chen-Yu Tsai
On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec  wrote:
>
> This series adds support for Display Engine 3.0 and HDMI 2.0a, which
> can be found on H6 SoC.
>
> Display Engine 3.0 in comparison to 2.0 mostly adds features needed for
> displaying and processing 10-bit and AFBC formats, which are not yet
> supported by this series.
>
> This series is based on linux-next at next-20180828, which has working
> R40 display pipeline support. I'll rebase series on later linux-next, if
> needed, once R40 display pipeline support is reintroduced.
>
> I suggest all patches go through allwinner tree, except DRM patches,
> which should go through drm-misc tree.
>
> Last detail, PineH64 model A schematic has DDC_EN signal, which enables
> DDC voltage level shifter. TL Lim, PINE64 founder, said that this
> signal is not actually present on PineH64 model A board. It is, however
> present on PineH64 model B engineering samples, but it will be removed
> in production version. Because of that, I didn't include any code for
> it.
>
> Please take a look.
>
> Best regards,
> Jernej
>
> Icenowy Zheng (7):
>   dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C
>   arm64: allwinner: h6: add system controller device tree node

Prefix should be "arm64: dts: allwinner: h6: ".

>   dt-bindings: bus: add H6 DE3 bus binding
>   dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI
>   drm: sun4i: add quirks for TCON TOP
>   dt-bindings: display: sun4i-drm: document H6 TCON TOP
>   drm: sun4i: add support for H6 TCON TOP
>
> Jernej Skrabec (20):
>   clk: sunxi-ng: Adjust MP clock parent rate when allowed
>   clk: sunxi-ng: Use u64 for calculation of NM rate
>   clk: sunxi-ng: h6: Set video PLLs limits
>   dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
>   clk: sunxi-ng: Add support for H6 DE3 clocks
>   dt-bindings: display: sun4i-drm: Add H6 display engine compatibles
>   drm/sun4i: Add compatible for H6 display engine
>   drm/sun4i: Rework DE2 register defines
>   drm/sun4i: Add basic support for DE3
>   drm/sun4i: Add support for H6 DE3 mixer 0
>   drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a
>   drm/sun4i: Not all DW HDMI controllers has scrambled addresses
>   drm/sun4i: dw-hdmi: Make mode_valid function configurable
>   drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock
>   drm/sun4i: Add support for H6 DW HDMI controller
>   drm/sun4i: Add support for Synopsys HDMI PHY
>   drm/sun4i: Add support for H6 HDMI PHY
>   drm/sun4i: Initialize registers in tcon-top driver
>   arm64: dts: sun50i: h6: Add HDMI pipeline
>   arm64: dts: sun50i: h6: Enable HDMI output on Pine H64 board

Same here.

ChenYu

>
>  .../bindings/bus/sun50i-de2-bus.txt   |   9 +-
>  .../devicetree/bindings/clock/sun8i-de2.txt   |   5 +-
>  .../bindings/display/sunxi/sun4i-drm.txt  |  30 ++-
>  .../devicetree/bindings/sram/sunxi-sram.txt   |   4 +
>  .../boot/dts/allwinner/sun50i-h6-pine-h64.dts |  25 ++
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 224 ++
>  drivers/clk/sunxi-ng/ccu-sun50i-h6.c  |   4 +
>  drivers/clk/sunxi-ng/ccu-sun8i-de2.c  |  65 +
>  drivers/clk/sunxi-ng/ccu-sun8i-de2.h  |   1 +
>  drivers/clk/sunxi-ng/ccu_mp.c |  64 -
>  drivers/clk/sunxi-ng/ccu_nm.c |  18 +-
>  drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   1 +
>  drivers/gpu/drm/sun4i/sun4i_drv.c |   1 +
>  drivers/gpu/drm/sun4i/sun8i_csc.c |  96 +++-
>  drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c |  45 +++-
>  drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h |  14 +-
>  drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c| 178 +-
>  drivers/gpu/drm/sun4i/sun8i_mixer.c   |  44 +++-
>  drivers/gpu/drm/sun4i/sun8i_mixer.h   |  61 +++--
>  drivers/gpu/drm/sun4i/sun8i_tcon_top.c|  58 -
>  drivers/gpu/drm/sun4i/sun8i_ui_layer.c|  47 ++--
>  drivers/gpu/drm/sun4i/sun8i_ui_layer.h|  37 +--
>  drivers/gpu/drm/sun4i/sun8i_ui_scaler.c   |  45 ++--
>  drivers/gpu/drm/sun4i/sun8i_ui_scaler.h   |  28 +--
>  drivers/gpu/drm/sun4i/sun8i_vi_layer.c|  55 +++--
>  drivers/gpu/drm/sun4i/sun8i_vi_layer.h|  25 +-
>  drivers/gpu/drm/sun4i/sun8i_vi_scaler.c   |  85 +--
>  drivers/gpu/drm/sun4i/sun8i_vi_scaler.h   |  68 --
>  include/dt-bindings/clock/sun8i-de2.h |   3 +
>  include/dt-bindings/reset/sun8i-de2.h |   1 +
>  30 files changed, 1127 insertions(+), 214 deletions(-)
>
> --
> 2.18.0
>
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[Bug 107154] [drm] GPU recovery disabled.

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107154

--- Comment #10 from freedesktop@nentwig.biz ---
So, there's 4.19rc1-amd-next \o/

echo: write error: Device or resource busy

This started to happen with 4.18. dmesg:

[  171.245467] Freezing of tasks failed after 20.006 seconds (1 tasks refusing
to freeze, wq_busy=0):
[  171.245484] systemd-udevd   D0   700615 0x8124

So, is this sth. to report to fricking systemd to?


Gee, really...?!

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Re: [PATCH libdrm] libdrm: Allow dynamic drm majors on linux

2018-09-02 Thread Alex Deucher
On Fri, Aug 31, 2018 at 11:32 AM Christian König
 wrote:
>
> Am 31.08.2018 um 17:27 schrieb Emil Velikov:
> > On 31 August 2018 at 15:38, Michel Dänzer  wrote:
> >> [ Adding the amd-gfx list ]
> >>
> >> On 2018-08-31 3:05 p.m., Thomas Hellstrom wrote:
> >>> On 08/31/2018 02:30 PM, Emil Velikov wrote:
>  On 31 August 2018 at 12:54, Thomas Hellstrom 
>  wrote:
> > To determine whether a device node is a drm device node or not, the code
> > currently compares the node's major number to the static drm major
> > device
> > number.
> >
> > This breaks the standalone vmwgfx driver on XWayland dri clients,
> >
>  Any particular reason why the code doesn't use a fixed node there?
>  It will make the diff vs the in-kernel driver a bit smaller.
> >>> Because then it won't be able to interoperate with other in-tree
> >>> drivers, like virtual drm drivers or passthrough usb drm drivers.
> >>> There is no clean way to share the minor number allocation with in-tree
> >>> drm, so standalone vmwgfx is using dynamic major allocation.
> >> I wonder why I haven't heard of any of these issues with the standalone
> >> version of amdgpu shipped in packaged AMD releases. Does that also use a
> >> different major number? If yes, maybe it's just that nobody has tried
> >> Xwayland clients with that driver. If no, how does it avoid the other
> >> issues described above?
> >>
> > AFAICT, the difference is that the standalone vmwgfx uses an internal
> > copy of drm core.
> > It doesn't reuse the in-kernel drm, hence it cannot know which minor it can 
> > use.
>
> The amdgpu pro package has it's own drm core copy as well and there it
> still works.

We don't use our own copy of drm core in the kernel, we rely on the in
kernel one.  Just ttm and amdgpu are updated in the dkms packages.

Alex

>
> Not sure how our back-porting guys handle that.
>
> Christian.
>
> >
> > -Emil
> > ___
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> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
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Re: [PATCH v5 0/5] drm/ttm,amdgpu: Introduce LRU bulk move functionality

2018-09-02 Thread Koenig, Christian
That one is already committed to amd-staging-drm-next.

But I've fixed a few bugs with that just yesterday, not sure if the public copy 
of amd-staging-drm-next is already up to date.

Christian.

Am 02.09.2018 10:12 schrieb Mike Lothian :
Hi

Is there an updated series? These no longer apply for me

Thanks

Mike

On Wed, 22 Aug 2018 at 09:42 Huang Rui 
mailto:ray.hu...@amd.com>> wrote:
On Wed, Aug 22, 2018 at 04:24:02PM +0800, Christian König wrote:
> Please commit patches #1, #2 and #3, doesn't make much sense to send
> them out even more often.
>
> Jerry's comments on patch #4 sound valid to me as well, but with those
> minor issues fixes/commented I think we can commit it.
>
> Thanks for taking care of this,
> Christian.

OK. Thanks to your time.

Thanks,
Ray

>
> Am 22.08.2018 um 09:52 schrieb Huang Rui:
> > The idea and proposal is originally from Christian, and I continue to work 
> > to
> > deliver it.
> >
> > Background:
> > amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move 
> > all of
> > them on the end of LRU list one by one. Thus, that cause so many BOs moved 
> > to
> > the end of the LRU, and impact performance seriously.
> >
> > Then Christian provided a workaround to not move PD/PT BOs on LRU with below
> > patch:
> > Commit 0bbf32026cf5ba41e9922b30e26e1bed1ecd38ae ("drm/amdgpu: band aid
> > validating VM PTs")
> >
> > However, the final solution should bulk move all PD/PT and PerVM BOs on the 
> > LRU
> > instead of one by one.
> >
> > Whenever amdgpu_vm_validate_pt_bos() is called and we have BOs which need 
> > to be
> > validated we move all BOs together to the end of the LRU without dropping 
> > the
> > lock for the LRU.
> >
> > While doing so we note the beginning and end of this block in the LRU list.
> >
> > Now when amdgpu_vm_validate_pt_bos() is called and we don't have anything 
> > to do,
> > we don't move every BO one by one, but instead cut the LRU list into pieces 
> > so
> > that we bulk move everything to the end in just one operation.
> >
> > Test data:
> > +--+-+---+---+
> > |  |The Talos|Clpeak(OCL)|BusSpeedReadback(OCL) 
> >  |
> > |  |Principle(Vulkan)|   |  
> >  |
> > ++
> > |  | |   |0.319 ms(1k) 0.314 ms(2K) 
> > 0.308 ms(4K) |
> > | Original |  147.7 FPS  |  76.86 us |0.307 ms(8K) 0.310 ms(16K)
> >  |
> > ++
> > | Orignial + WA| |   |0.254 ms(1K) 0.241 ms(2K) 
> >  |
> > |(don't move   |  162.1 FPS  |  42.15 us |0.230 ms(4K) 0.223 ms(8K) 
> > 0.204 ms(16K)|
> > |PT BOs on LRU)| |   |  
> >  |
> > ++
> > | Bulk move|  163.1 FPS  |  40.52 us |0.244 ms(1K) 0.252 ms(2K) 
> > 0.213 ms(4K) |
> > |  | |   |0.214 ms(8K) 0.225 ms(16K)
> >  |
> > +--+-+---+---+
> >
> > After test them with above three benchmarks include vulkan and opencl. We 
> > can
> > see the visible improvement than original, and even better than original 
> > with
> > workaround.
> >
> > Changes from V1 -> V2:
> > - Fix to missed the BOs in relocated/moved that should be also moved to the 
> > end
> >of LRU.
> >
> > Changes from V2 -> V3:
> > - Remove unused parameter and use list_for_each_entry instead of the one 
> > with
> >save entry.
> >
> > Changes from V3 -> V4:
> > - Move the amdgpu_vm_move_to_lru_tail after command submission, at that 
> > time,
> >all bo will be back on idle list.
> >
> > Changes from V4 -> V5:
> > - Remove amdgpu_vm_move_to_lru_tail_by_list(), use bulk_moveable instread of
> >validated, and move ttm_bo_bulk_move_lru_tail() also into
> >amdgpu_vm_move_to_lru_tail().
> >
> > Thanks,
> > Ray
> >
> > Christian König (2):
> >drm/ttm: add helper structures for bulk moves on lru list
> >drm/ttm: revise ttm_bo_move_to_lru_tail to support bulk moves
> >
> > Huang Rui (3):
> >drm/ttm: add bulk move function on LRU
> >drm/amdgpu: use bulk moves for efficient VM LRU handling (v5)
> >drm/amdgpu: move PD/PT bos on LRU again
> >
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 68 +++--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 11 -
> >   drivers/gpu/drm/ttm/ttm_bo.c   | 78 
> > +-
> >   include/drm/ttm/ttm_bo_api.h   | 16 ++-
> >   include/drm/ttm/ttm_bo_driver.h| 28 
> >   6 files 

[PATCH v2 1/2] backlight: Remove s6e63m0 driver

2018-09-02 Thread Krzysztof Kozlowski
The driver for S6E63M0 AMOLED LCD panel is not used.  It does not
support DeviceTree and respective possible users (S5Pv210 Aquila and
Goni boards) are DeviceTree-only.

Suggested-by: Marek Szyprowski 
Cc: Marek Szyprowski 
Cc: Inki Dae 
Signed-off-by: Krzysztof Kozlowski 
Acked-by: Jingoo Han 
Acked-by: Daniel Thompson 

---

Changes since v1:
1. Remove sysfs ABI documentation file.
2. Add Jingoo's and Daniel's acks.
---
 Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 |  27 -
 drivers/video/backlight/Kconfig   |   8 -
 drivers/video/backlight/Makefile  |   1 -
 drivers/video/backlight/s6e63m0.c | 857 --
 drivers/video/backlight/s6e63m0_gamma.h   | 266 ---
 5 files changed, 1159 deletions(-)
 delete mode 100644 Documentation/ABI/testing/sysfs-class-lcd-s6e63m0
 delete mode 100644 drivers/video/backlight/s6e63m0.c
 delete mode 100644 drivers/video/backlight/s6e63m0_gamma.h

diff --git a/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 
b/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0
deleted file mode 100644
index ae0a2d3dcc07..
--- a/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0
+++ /dev/null
@@ -1,27 +0,0 @@
-sysfs interface for the S6E63M0 AMOLED LCD panel driver

-
-What:  /sys/class/lcd//gamma_mode
-Date:  May, 2010
-KernelVersion: v2.6.35
-Contact:   dri-devel@lists.freedesktop.org
-Description:
-   (RW) Read or write the gamma mode. Following three modes are
-   supported:
-   0 - gamma value 2.2,
-   1 - gamma value 1.9 and
-   2 - gamma value 1.7.
-
-
-What:  /sys/class/lcd//gamma_table
-Date:  May, 2010
-KernelVersion: v2.6.35
-Contact:   dri-devel@lists.freedesktop.org
-Description:
-   (RO) Displays the size of the gamma table i.e. the number of
-   gamma modes available.
-
-This is a backlight lcd driver. These interfaces are an extension to the API
-documented in Documentation/ABI/testing/sysfs-class-lcd and in
-Documentation/ABI/stable/sysfs-class-backlight (under
-/sys/class/backlight//).
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 2919e2334052..2373c3cec0c3 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -111,14 +111,6 @@ config LCD_HP700
  If you have an HP Jornada 700 series handheld (710/720/728)
  say Y to enable LCD control driver.
 
-config LCD_S6E63M0
-   tristate "S6E63M0 AMOLED LCD Driver"
-   depends on SPI && BACKLIGHT_CLASS_DEVICE
-   default n
-   help
- If you have an S6E63M0 LCD Panel, say Y to enable its
- LCD control driver.
-
 config LCD_LD9040
tristate "LD9040 AMOLED LCD Driver"
depends on SPI && BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index 0dcc2c745c03..c7a46392a76f 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_LCD_LMS501KF03)  += lms501kf03.o
 obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
 obj-$(CONFIG_LCD_OTM3225A) += otm3225a.o
 obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o
-obj-$(CONFIG_LCD_S6E63M0)  += s6e63m0.o
 obj-$(CONFIG_LCD_TDO24M)   += tdo24m.o
 obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o
 obj-$(CONFIG_LCD_VGG2432A4)+= vgg2432a4.o
diff --git a/drivers/video/backlight/s6e63m0.c 
b/drivers/video/backlight/s6e63m0.c
deleted file mode 100644
index 3c4a22a3063a..
--- a/drivers/video/backlight/s6e63m0.c
+++ /dev/null
@@ -1,857 +0,0 @@
-/*
- * S6E63M0 AMOLED LCD panel driver.
- *
- * Author: InKi Dae  
- *
- * Derived from drivers/video/omap/lcd-apollon.c
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "s6e63m0_gamma.h"
-
-#define SLEEPMSEC  0x1000
-#define ENDDEF 0x2000
-#defineDEFMASK 0xFF00
-#define COMMAND_ONLY   0xFE
-#define DATA_ONLY  0xFF
-
-#define MIN_BRIGHTNESS 0
-#define MAX_BRIGHTNESS 10
-
-struct s6e63m0 {
-   struct device   *dev;
-   struct spi_device   *spi;
-   unsigned intpower;
-   unsigned intcurrent_brightness;
-   unsigned intgamma_mode;
-   unsigned intgamma_table_count;
-   struct lcd_device   *ld;
-   struct backligh

[PATCH v2 2/2] backlight: Remove ld9040 driver

2018-09-02 Thread Krzysztof Kozlowski
The driver for LD9040 AMOLED LCD panel was superseded with DRM driver
panel-samsung-ld9040.c.  It does not support DeviceTree and respective
possible user (Exynos4210 Universal C210) is DeviceTree-only and uses
DRM version of driver.

Suggested-by: Marek Szyprowski 
Cc: Marek Szyprowski 
Cc: Inki Dae 
Signed-off-by: Krzysztof Kozlowski 
Acked-by: Jingoo Han 
Acked-by: Daniel Thompson 

---

Changes since v1:
1. Add Jingoo's and Daniel's acks.
---
 drivers/video/backlight/Kconfig|   8 -
 drivers/video/backlight/Makefile   |   1 -
 drivers/video/backlight/ld9040.c   | 811 -
 drivers/video/backlight/ld9040_gamma.h | 202 
 4 files changed, 1022 deletions(-)
 delete mode 100644 drivers/video/backlight/ld9040.c
 delete mode 100644 drivers/video/backlight/ld9040_gamma.h

diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 2373c3cec0c3..71ee978c848f 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -111,14 +111,6 @@ config LCD_HP700
  If you have an HP Jornada 700 series handheld (710/720/728)
  say Y to enable LCD control driver.
 
-config LCD_LD9040
-   tristate "LD9040 AMOLED LCD Driver"
-   depends on SPI && BACKLIGHT_CLASS_DEVICE
-   default n
-   help
- If you have an LD9040 Panel, say Y to enable its
- control driver.
-
 config LCD_AMS369FG06
tristate "AMS369FG06 AMOLED LCD Driver"
depends on SPI && BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index c7a46392a76f..63c507c07437 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_LCD_HX8357)+= hx8357.o
 obj-$(CONFIG_LCD_ILI922X)  += ili922x.o
 obj-$(CONFIG_LCD_ILI9320)  += ili9320.o
 obj-$(CONFIG_LCD_L4F00242T03)  += l4f00242t03.o
-obj-$(CONFIG_LCD_LD9040)   += ld9040.o
 obj-$(CONFIG_LCD_LMS283GF05)   += lms283gf05.o
 obj-$(CONFIG_LCD_LMS501KF03)   += lms501kf03.o
 obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o
diff --git a/drivers/video/backlight/ld9040.c b/drivers/video/backlight/ld9040.c
deleted file mode 100644
index 677f8abba27c..
--- a/drivers/video/backlight/ld9040.c
+++ /dev/null
@@ -1,811 +0,0 @@
-/*
- * ld9040 AMOLED LCD panel driver.
- *
- * Copyright (c) 2011 Samsung Electronics
- * Author: Donghwa Lee  
- * Derived from drivers/video/backlight/s6e63m0.c
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "ld9040_gamma.h"
-
-#define SLEEPMSEC  0x1000
-#define ENDDEF 0x2000
-#defineDEFMASK 0xFF00
-#define COMMAND_ONLY   0xFE
-#define DATA_ONLY  0xFF
-
-#define MIN_BRIGHTNESS 0
-#define MAX_BRIGHTNESS 24
-
-struct ld9040 {
-   struct device   *dev;
-   struct spi_device   *spi;
-   unsigned intpower;
-   unsigned intcurrent_brightness;
-
-   struct lcd_device   *ld;
-   struct backlight_device *bd;
-   struct lcd_platform_data*lcd_pd;
-
-   struct mutexlock;
-   bool  enabled;
-};
-
-static struct regulator_bulk_data supplies[] = {
-   { .supply = "vdd3", },
-   { .supply = "vci", },
-};
-
-static void ld9040_regulator_enable(struct ld9040 *lcd)
-{
-   int ret = 0;
-   struct lcd_platform_data *pd = NULL;
-
-   pd = lcd->lcd_pd;
-   mutex_lock(&lcd->lock);
-   if (!lcd->enabled) {
-   ret = regulator_bulk_enable(ARRAY_SIZE(supplies), supplies);
-   if (ret)
-   goto out;
-
-   lcd->enabled = true;
-   }
-   msleep(pd->power_on_delay);
-out:
-   mutex_unlock(&lcd->lock);
-}
-
-static void ld9040_regulator_disable(struct ld9040 *lcd)
-{
-   int ret = 0;
-
-   mutex_lock(&lcd->lock);
-   if (lcd->enabled) {
-   ret = regulator_bulk_disable(ARRAY_SIZE(supplies), supplies);
-   if (ret)
-   goto out;
-
-   lcd->enabled = false;
-   }
-out:
-   mutex_unlock(&lcd->lock);
-}
-
-static const unsigned short seq_swreset[] = {
-   0x01, COMMAND_ONLY,
-   ENDDEF, 0x00
-};
-
-static const unsigned short seq_user_setting[] = {
-   0xF0, 0x5A,
-
-   DATA_ONLY, 0x5A,
-   ENDDEF, 0x00
-};
-
-static const unsigned short seq_elvss_on[] = {
-   0xB1, 0x0D,
-
-   DATA_ONLY, 0x00,
-   DATA

[PATCH 21/27] drm/sun4i: Add support for H6 HDMI PHY

2018-09-02 Thread Jernej Skrabec
H6 has Synopsys DWC HDMI 2.0 TX PHY.

mpll settings were calculated from specifications of similar Synopsys
HDMI PHY found in i.MX6. Other PHY settings were derived from BSP PHY
driver code.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 137 +
 1 file changed, 137 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index ee2bf61cd4d2..2f5499bd35ec 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -14,6 +14,122 @@
  */
 #define I2C_ADDR   0x69
 
+static const struct dw_hdmi_mpll_config sun50i_h6_mpll_cfg[] = {
+   {
+   30666000, {
+   { 0x00b3, 0x },
+   { 0x2153, 0x },
+   { 0x40f3, 0x },
+   },
+   },  {
+   3680, {
+   { 0x00b3, 0x },
+   { 0x2153, 0x },
+   { 0x40a2, 0x0001 },
+   },
+   },  {
+   4600, {
+   { 0x00b3, 0x },
+   { 0x2142, 0x0001 },
+   { 0x40a2, 0x0001 },
+   },
+   },  {
+   61333000, {
+   { 0x0072, 0x0001 },
+   { 0x2142, 0x0001 },
+   { 0x40a2, 0x0001 },
+   },
+   },  {
+   7360, {
+   { 0x0072, 0x0001 },
+   { 0x2142, 0x0001 },
+   { 0x4061, 0x0002 },
+   },
+   },  {
+   9200, {
+   { 0x0072, 0x0001 },
+   { 0x2145, 0x0002 },
+   { 0x4061, 0x0002 },
+   },
+   },  {
+   122666000, {
+   { 0x0051, 0x0002 },
+   { 0x2145, 0x0002 },
+   { 0x4061, 0x0002 },
+   },
+   },  {
+   14720, {
+   { 0x0051, 0x0002 },
+   { 0x2145, 0x0002 },
+   { 0x4064, 0x0003 },
+   },
+   },  {
+   18400, {
+   { 0x0051, 0x0002 },
+   { 0x214c, 0x0003 },
+   { 0x4064, 0x0003 },
+   },
+   },  {
+   22000, {
+   { 0x0040, 0x0003 },
+   { 0x214c, 0x0003 },
+   { 0x4064, 0x0003 },
+   },
+   },  {
+   27200, {
+   { 0x0040, 0x0003 },
+   { 0x214c, 0x0003 },
+   { 0x5a64, 0x0003 },
+   },
+   },  {
+   34000, {
+   { 0x0040, 0x0003 },
+   { 0x3b4c, 0x0003 },
+   { 0x5a64, 0x0003 },
+   },
+   },  {
+   6, {
+   { 0x1a40, 0x0003 },
+   { 0x3b4c, 0x0003 },
+   { 0x5a64, 0x0003 },
+   },
+   }, {
+   ~0UL, {
+   { 0x, 0x },
+   { 0x, 0x },
+   { 0x, 0x },
+   },
+   }
+};
+
+static const struct dw_hdmi_curr_ctrl sun50i_h6_cur_ctr[] = {
+   /* pixelclkbpp8bpp10   bpp12 */
+   { 25175000,  { 0x, 0x, 0x }, },
+   { 2700,  { 0x0012, 0x, 0x }, },
+   { 5940,  { 0x0008, 0x0008, 0x0008 }, },
+   { 7200,  { 0x0008, 0x0008, 0x001b }, },
+   { 7425,  { 0x0013, 0x0013, 0x0013 }, },
+   { 9000,  { 0x0008, 0x001a, 0x001b }, },
+   { 11880, { 0x001b, 0x001a, 0x001b }, },
+   { 14400, { 0x001b, 0x001a, 0x0034 }, },
+   { 18000, { 0x001b, 0x0033, 0x0034 }, },
+   { 21600, { 0x0036, 0x0033, 0x0034 }, },
+   { 23760, { 0x0036, 0x0033, 0x001b }, },
+   { 28800, { 0x0036, 0x001b, 0x001b }, },
+   { 29700, { 0x0019, 0x001b, 0x0019 }, },
+   { 33000, { 0x0036, 0x001b, 0x001b }, },
+   { 6, { 0x003f, 0x001b, 0x001b }, },
+   { ~0UL,  { 0x, 0x, 0x }, }
+};
+
+static const struct dw_hdmi_phy_config sun50i_h6_phy_config[] = {
+   /*pixelclk   symbol   term   vlev*/
+   { 7425,  0x8009, 0x0004, 0x0232},
+   { 14850, 0x8029, 0x0004, 0x0273},
+   { 6, 0x8039, 0x0004, 0x014a},
+   { ~0UL,  0x, 0x, 0x}
+};
+
 static int sun8i_hdmi_phy_config_a83t(struct dw_hdmi *hdmi,
  struct sun8i_hdmi_phy *phy,
  unsigned int clk_rate)
@@ -290,6 +406,16 @@ static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy 
*phy)
 SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
 }
 
+static void sun50i_hd

[PATCH v3 08/13] drm/mgag200: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Remove duplicated call, while at it.

Signed-off-by: Michał Mirosław 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/mgag200/mgag200_drv.c  | 21 +
 drivers/gpu/drm/mgag200/mgag200_main.c |  9 -
 2 files changed, 1 insertion(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c 
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 74cdde2ee474..ac6af4bd9df6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -42,29 +42,10 @@ static const struct pci_device_id pciidlist[] = {
 
 MODULE_DEVICE_TABLE(pci, pciidlist);
 
-static void mgag200_kick_out_firmware_fb(struct pci_dev *pdev)
-{
-   struct apertures_struct *ap;
-   bool primary = false;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return;
-
-   ap->ranges[0].base = pci_resource_start(pdev, 0);
-   ap->ranges[0].size = pci_resource_len(pdev, 0);
-
-#ifdef CONFIG_X86
-   primary = pdev->resource[PCI_ROM_RESOURCE].flags & 
IORESOURCE_ROM_SHADOW;
-#endif
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "mgag200drmfb", 
primary);
-   kfree(ap);
-}
-
 
 static int mga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
-   mgag200_kick_out_firmware_fb(pdev);
+   drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, 
"mgag200drmfb");
 
return drm_get_pci_dev(pdev, ent, &driver);
 }
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 780f983b0294..79d54103d470 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -124,20 +124,11 @@ static int mga_probe_vram(struct mga_device *mdev, void 
__iomem *mem)
 static int mga_vram_init(struct mga_device *mdev)
 {
void __iomem *mem;
-   struct apertures_struct *aper = alloc_apertures(1);
-   if (!aper)
-   return -ENOMEM;
 
/* BAR 0 is VRAM */
mdev->mc.vram_base = pci_resource_start(mdev->dev->pdev, 0);
mdev->mc.vram_window = pci_resource_len(mdev->dev->pdev, 0);
 
-   aper->ranges[0].base = mdev->mc.vram_base;
-   aper->ranges[0].size = mdev->mc.vram_window;
-
-   drm_fb_helper_remove_conflicting_framebuffers(aper, "mgafb", true);
-   kfree(aper);
-
if (!devm_request_mem_region(mdev->dev->dev, mdev->mc.vram_base, 
mdev->mc.vram_window,
"mgadrmfb_vram")) {
DRM_ERROR("can't reserve VRAM\n");
-- 
2.18.0

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[PATCH v3 09/13] drm/radeon: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Alex Deucher 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/radeon/radeon_drv.c | 23 +--
 1 file changed, 1 insertion(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_drv.c 
b/drivers/gpu/drm/radeon/radeon_drv.c
index b28288a781ef..36c98a0ec991 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -311,27 +311,6 @@ static struct drm_driver kms_driver;
 
 bool radeon_device_is_virtual(void);
 
-static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
-{
-   struct apertures_struct *ap;
-   bool primary = false;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return -ENOMEM;
-
-   ap->ranges[0].base = pci_resource_start(pdev, 0);
-   ap->ranges[0].size = pci_resource_len(pdev, 0);
-
-#ifdef CONFIG_X86
-   primary = pdev->resource[PCI_ROM_RESOURCE].flags & 
IORESOURCE_ROM_SHADOW;
-#endif
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "radeondrmfb", 
primary);
-   kfree(ap);
-
-   return 0;
-}
-
 static int radeon_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
 {
@@ -341,7 +320,7 @@ static int radeon_pci_probe(struct pci_dev *pdev,
return -EPROBE_DEFER;
 
/* Get rid of things like offb */
-   ret = radeon_kick_out_firmware_fb(pdev);
+   ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, 
"radeondrmfb");
if (ret)
return ret;
 
-- 
2.18.0

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[PATCH 00/27] Allwinner H6 DE3 and HDMI support

2018-09-02 Thread Jernej Skrabec
This series adds support for Display Engine 3.0 and HDMI 2.0a, which
can be found on H6 SoC.

Display Engine 3.0 in comparison to 2.0 mostly adds features needed for
displaying and processing 10-bit and AFBC formats, which are not yet
supported by this series.

This series is based on linux-next at next-20180828, which has working
R40 display pipeline support. I'll rebase series on later linux-next, if
needed, once R40 display pipeline support is reintroduced.

I suggest all patches go through allwinner tree, except DRM patches,
which should go through drm-misc tree.

Last detail, PineH64 model A schematic has DDC_EN signal, which enables
DDC voltage level shifter. TL Lim, PINE64 founder, said that this
signal is not actually present on PineH64 model A board. It is, however
present on PineH64 model B engineering samples, but it will be removed
in production version. Because of that, I didn't include any code for
it.

Please take a look.

Best regards,
Jernej

Icenowy Zheng (7):
  dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C
  arm64: allwinner: h6: add system controller device tree node
  dt-bindings: bus: add H6 DE3 bus binding
  dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI
  drm: sun4i: add quirks for TCON TOP
  dt-bindings: display: sun4i-drm: document H6 TCON TOP
  drm: sun4i: add support for H6 TCON TOP

Jernej Skrabec (20):
  clk: sunxi-ng: Adjust MP clock parent rate when allowed
  clk: sunxi-ng: Use u64 for calculation of NM rate
  clk: sunxi-ng: h6: Set video PLLs limits
  dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
  clk: sunxi-ng: Add support for H6 DE3 clocks
  dt-bindings: display: sun4i-drm: Add H6 display engine compatibles
  drm/sun4i: Add compatible for H6 display engine
  drm/sun4i: Rework DE2 register defines
  drm/sun4i: Add basic support for DE3
  drm/sun4i: Add support for H6 DE3 mixer 0
  drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a
  drm/sun4i: Not all DW HDMI controllers has scrambled addresses
  drm/sun4i: dw-hdmi: Make mode_valid function configurable
  drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock
  drm/sun4i: Add support for H6 DW HDMI controller
  drm/sun4i: Add support for Synopsys HDMI PHY
  drm/sun4i: Add support for H6 HDMI PHY
  drm/sun4i: Initialize registers in tcon-top driver
  arm64: dts: sun50i: h6: Add HDMI pipeline
  arm64: dts: sun50i: h6: Enable HDMI output on Pine H64 board

 .../bindings/bus/sun50i-de2-bus.txt   |   9 +-
 .../devicetree/bindings/clock/sun8i-de2.txt   |   5 +-
 .../bindings/display/sunxi/sun4i-drm.txt  |  30 ++-
 .../devicetree/bindings/sram/sunxi-sram.txt   |   4 +
 .../boot/dts/allwinner/sun50i-h6-pine-h64.dts |  25 ++
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 224 ++
 drivers/clk/sunxi-ng/ccu-sun50i-h6.c  |   4 +
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c  |  65 +
 drivers/clk/sunxi-ng/ccu-sun8i-de2.h  |   1 +
 drivers/clk/sunxi-ng/ccu_mp.c |  64 -
 drivers/clk/sunxi-ng/ccu_nm.c |  18 +-
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c |   1 +
 drivers/gpu/drm/sun4i/sun4i_drv.c |   1 +
 drivers/gpu/drm/sun4i/sun8i_csc.c |  96 +++-
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c |  45 +++-
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h |  14 +-
 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c| 178 +-
 drivers/gpu/drm/sun4i/sun8i_mixer.c   |  44 +++-
 drivers/gpu/drm/sun4i/sun8i_mixer.h   |  61 +++--
 drivers/gpu/drm/sun4i/sun8i_tcon_top.c|  58 -
 drivers/gpu/drm/sun4i/sun8i_ui_layer.c|  47 ++--
 drivers/gpu/drm/sun4i/sun8i_ui_layer.h|  37 +--
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c   |  45 ++--
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h   |  28 +--
 drivers/gpu/drm/sun4i/sun8i_vi_layer.c|  55 +++--
 drivers/gpu/drm/sun4i/sun8i_vi_layer.h|  25 +-
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c   |  85 +--
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h   |  68 --
 include/dt-bindings/clock/sun8i-de2.h |   3 +
 include/dt-bindings/reset/sun8i-de2.h |   1 +
 30 files changed, 1127 insertions(+), 214 deletions(-)

-- 
2.18.0

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[PATCH 16/27] drm/sun4i: dw-hdmi: Make mode_valid function configurable

2018-09-02 Thread Jernej Skrabec
Since it is not possible to access sun8i-dw-hdmi driver private data
inside mode_valid function, make it configurable. That way different
versions of HDMI controllers can set different function, depending on
it's limitations.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 18 ++
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h |  6 ++
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 31875b636434..a5020fe8bd69 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -33,8 +34,8 @@ static const struct drm_encoder_funcs 
sun8i_dw_hdmi_encoder_funcs = {
 };
 
 static enum drm_mode_status
-sun8i_dw_hdmi_mode_valid(struct drm_connector *connector,
-const struct drm_display_mode *mode)
+sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector,
+ const struct drm_display_mode *mode)
 {
if (mode->clock > 297000)
return MODE_CLOCK_HIGH;
@@ -102,6 +103,8 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct 
device *master,
hdmi->dev = &pdev->dev;
encoder = &hdmi->encoder;
 
+   hdmi->quirks = of_device_get_match_data(dev);
+
encoder->possible_crtcs =
sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node);
/*
@@ -156,7 +159,7 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct 
device *master,
 
sun8i_hdmi_phy_init(hdmi->phy);
 
-   plat_data->mode_valid = &sun8i_dw_hdmi_mode_valid;
+   plat_data->mode_valid = hdmi->quirks->mode_valid;
plat_data->phy_ops = sun8i_hdmi_phy_get_ops();
plat_data->phy_name = "sun8i_dw_hdmi_phy";
plat_data->phy_data = hdmi->phy;
@@ -215,8 +218,15 @@ static int sun8i_dw_hdmi_remove(struct platform_device 
*pdev)
return 0;
 }
 
+static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
+   .mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
+};
+
 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
-   { .compatible = "allwinner,sun8i-a83t-dw-hdmi" },
+   {
+   .compatible = "allwinner,sun8i-a83t-dw-hdmi",
+   .data = &sun8i_a83t_quirks,
+   },
{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids);
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
index aadbe0a10b0c..b718c47e00be 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
@@ -169,6 +169,11 @@ struct sun8i_hdmi_phy {
struct sun8i_hdmi_phy_variant   *variant;
 };
 
+struct sun8i_dw_hdmi_quirks {
+   enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
+  const struct drm_display_mode *mode);
+};
+
 struct sun8i_dw_hdmi {
struct clk  *clk_tmds;
struct device   *dev;
@@ -176,6 +181,7 @@ struct sun8i_dw_hdmi {
struct drm_encoder  encoder;
struct sun8i_hdmi_phy   *phy;
struct dw_hdmi_plat_dataplat_data;
+   const struct sun8i_dw_hdmi_quirks *quirks;
struct reset_control*rst_ctrl;
 };
 
-- 
2.18.0

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[PATCH 14/27] drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a

2018-09-02 Thread Jernej Skrabec
It turns out that even new DW HDMI controllers exhibits same mangenta
line issues as older versions.

Enable workaround for v2.12a.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c 
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 5971976284bf..df1c7a2d6961 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -1664,6 +1664,7 @@ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
case 0x131a:
case 0x132a:
case 0x201a:
+   case 0x212a:
count = 1;
break;
default:
-- 
2.18.0

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[PATCH 06/27] clk: sunxi-ng: h6: Set video PLLs limits

2018-09-02 Thread Jernej Skrabec
Video PLL factors can be set in a way that final PLL rate is outside
stable range. H6 user manual specifically says that N factor should not
be below 12. While it doesn't says anything about maximum stable rate, it
is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).

Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
to 2.4 GHz, which is maximum in BSP driver.

Signed-off-by: Jernej Skrabec 
---
 drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c 
b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index 2193e1495086..f44d314b2285 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -120,6 +120,8 @@ static struct ccu_nm pll_video0_clk = {
.n  = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m  = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+   .min_rate   = 28800,
+   .max_rate   = 24,
.common = {
.reg= 0x040,
.features   = CCU_FEATURE_FIXED_POSTDIV,
@@ -136,6 +138,8 @@ static struct ccu_nm pll_video1_clk = {
.n  = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m  = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+   .min_rate   = 28800,
+   .max_rate   = 24,
.common = {
.reg= 0x048,
.features   = CCU_FEATURE_FIXED_POSTDIV,
-- 
2.18.0

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[PATCH v3 03/13] fbdev: add kerneldoc do remove_conflicting_framebuffers()

2018-09-02 Thread Michał Mirosław
Document remove_conflicting_framebuffers() behaviour.

Signed-off-by: Michał Mirosław 
---
 drivers/video/fbdev/core/fbmem.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index 0df148eb4699..2de93b5014e3 100644
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -1775,6 +1775,16 @@ int unlink_framebuffer(struct fb_info *fb_info)
 }
 EXPORT_SYMBOL(unlink_framebuffer);
 
+/**
+ * remove_conflicting_framebuffers - remove firmware-configured framebuffers
+ * @a: memory range, users of which are to be removed
+ * @name: requesting driver name
+ * @primary: also kick vga16fb if present
+ *
+ * This function removes framebuffer devices (initialized by 
firmware/bootloader)
+ * which use memory range described by @a. If @a is NULL all such devices are
+ * removed.
+ */
 int remove_conflicting_framebuffers(struct apertures_struct *a,
const char *name, bool primary)
 {
-- 
2.18.0

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[PATCH v3 10/13] drm/virtio: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/virtio/virtgpu_drm_bus.c | 24 +++-
 1 file changed, 3 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/virtio/virtgpu_drm_bus.c 
b/drivers/gpu/drm/virtio/virtgpu_drm_bus.c
index 7df8d0c9026a..115ed546ca4e 100644
--- a/drivers/gpu/drm/virtio/virtgpu_drm_bus.c
+++ b/drivers/gpu/drm/virtio/virtgpu_drm_bus.c
@@ -28,26 +28,6 @@
 
 #include "virtgpu_drv.h"
 
-static void virtio_pci_kick_out_firmware_fb(struct pci_dev *pci_dev)
-{
-   struct apertures_struct *ap;
-   bool primary;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return;
-
-   ap->ranges[0].base = pci_resource_start(pci_dev, 0);
-   ap->ranges[0].size = pci_resource_len(pci_dev, 0);
-
-   primary = pci_dev->resource[PCI_ROM_RESOURCE].flags
-   & IORESOURCE_ROM_SHADOW;
-
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "virtiodrmfb", 
primary);
-
-   kfree(ap);
-}
-
 int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev)
 {
struct drm_device *dev;
@@ -69,7 +49,9 @@ int drm_virtio_init(struct drm_driver *driver, struct 
virtio_device *vdev)
 pname);
dev->pdev = pdev;
if (vga)
-   virtio_pci_kick_out_firmware_fb(pdev);
+   drm_fb_helper_remove_conflicting_pci_framebuffers(pdev,
+ 0,
+ 
"virtiodrmfb");
 
snprintf(unique, sizeof(unique), "pci:%s", pname);
ret = drm_dev_set_unique(dev, unique);
-- 
2.18.0

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[PATCH 18/27] dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

The Allwinner H6 SoC uses a v2.12a DesignWare HDMI controller, with
dedicated CEC and HDCP clocks added; the PHY connected is a standard
DesignWare HDMI PHY.

Add binding for it.

Signed-off-by: Icenowy Zheng 
[added HDCP clock and reset]
Signed-off-by: Jernej Skrabec 
---
 .../devicetree/bindings/display/sunxi/sun4i-drm.txt   | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index dec2f8a6da9c..278410e43940 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -78,6 +78,7 @@ Required properties:
 
   - compatible: value must be one of:
 * "allwinner,sun8i-a83t-dw-hdmi"
+* "allwinner,sun50i-h6-dw-hdmi"
   - reg: base address and size of memory-mapped region
   - reg-io-width: See dw_hdmi.txt. Shall be 1.
   - interrupts: HDMI interrupt number
@@ -85,9 +86,14 @@ Required properties:
 * iahb: the HDMI bus clock
 * isfr: the HDMI register clock
 * tmds: TMDS clock
+* cec: HDMI CEC clock (H6 only)
+* hdcp: HDCP clock (H6 only)
+* hdcp-bus: HDCP bus clock (H6 only)
   - clock-names: the clock names mentioned above
-  - resets: phandle to the reset controller
-  - reset-names: must be "ctrl"
+  - resets:
+* ctrl: HDMI controller reset
+* hdcp: HDCP reset (H6 only)
+  - reset-names: reset names mentioned above
   - phys: phandle to the DWC HDMI PHY
   - phy-names: must be "phy"
 
@@ -104,6 +110,7 @@ Required properties:
 * allwinner,sun8i-a83t-hdmi-phy
 * allwinner,sun8i-h3-hdmi-phy
 * allwinner,sun50i-a64-hdmi-phy
+* allwinner,sun50i-h6-hdmi-phy
   - reg: base address and size of memory-mapped region
   - clocks: phandles to the clocks feeding the HDMI PHY
 * bus: the HDMI PHY interface clock
-- 
2.18.0

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[PATCH 17/27] drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock

2018-09-02 Thread Jernej Skrabec
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at
all. At this point it is not clear whether it is just not necessary or
it would cause some kind of issues.

Add a quirk for it.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 5 -
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index a5020fe8bd69..16a0c7a88ea8 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -153,7 +153,9 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct 
device *master,
goto err_disable_clk_tmds;
}
 
-   drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
+   if (hdmi->quirks->set_rate)
+   drm_encoder_helper_add(encoder,
+  &sun8i_dw_hdmi_encoder_helper_funcs);
drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs,
 DRM_MODE_ENCODER_TMDS, NULL);
 
@@ -220,6 +222,7 @@ static int sun8i_dw_hdmi_remove(struct platform_device 
*pdev)
 
 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
.mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
+   .set_rate = true,
 };
 
 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
index b718c47e00be..94cf13d09abe 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
@@ -172,6 +172,7 @@ struct sun8i_hdmi_phy {
 struct sun8i_dw_hdmi_quirks {
enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
   const struct drm_display_mode *mode);
+   bool set_rate;
 };
 
 struct sun8i_dw_hdmi {
-- 
2.18.0

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[PATCH v3 02/13] fbdev: allow apertures == NULL in remove_conflicting_framebuffers()

2018-09-02 Thread Michał Mirosław
Interpret (otherwise-invalid) NULL apertures argument to mean all-memory
range. This will allow to remove several duplicates of this code
from drivers in following patches.

Signed-off-by: Michał Mirosław 
Acked-by: Bartlomiej Zolnierkiewicz 

---
v2: added kerneldoc to corresponding DRM helper
v3: split kerneldoc to another patch
---
 drivers/video/fbdev/core/fbmem.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index 30a18d4c9de4..0df148eb4699 100644
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -1779,11 +1779,25 @@ int remove_conflicting_framebuffers(struct 
apertures_struct *a,
const char *name, bool primary)
 {
int ret;
+   bool do_free = false;
+
+   if (!a) {
+   a = alloc_apertures(1);
+   if (!a)
+   return -ENOMEM;
+
+   a->ranges[0].base = 0;
+   a->ranges[0].size = ~0;
+   do_free = true;
+   }
 
mutex_lock(®istration_lock);
ret = do_remove_conflicting_framebuffers(a, name, primary);
mutex_unlock(®istration_lock);
 
+   if (do_free)
+   kfree(a);
+
return ret;
 }
 EXPORT_SYMBOL(remove_conflicting_framebuffers);
-- 
2.18.0

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Re: [PATCH] drm/vkms: Fix race condition around accessing frame number

2018-09-02 Thread Haneen Mohammed
On Fri, Aug 31, 2018 at 10:41:40AM +0200, Daniel Vetter wrote:
> On Fri, Aug 24, 2018 at 02:16:34AM +0300, Haneen Mohammed wrote:
> > crtc_state is accessed by both vblank_handle() and the ordered
> > work_struct handle vkms_crc_work_handle() to retrieve and or update
> > the frame number for computed CRC.
> > 
> > Since work_struct can fail, add frame_end to account for missing frame
> > numbers.
> > 
> > use atomic_t witth appropriate flags for synchronization between hrtimer
> > callback and ordered work_struct handle since spinlock can't be used
> > with work_struct handle and mutex can't be used with hrtimer callback.
> > 
> > This patch passes the following subtests from igt kms_pipe_crc_basic test:
> > bad-source, read-crc-pipe-A, read-crc-pipe-A-frame-sequence,
> > nonblocking-crc-pipe-A, nonblocking-crc-pipe-A-frame-sequence
> > 
> > Signed-off-by: Haneen Mohammed 
> 
> So atomic_t is probably the greatest trap in the linux kernel. It sounds
> like the right thing, but in 99% of all case you want to use it it isn't.
> The trouble is that atomic_t is _very_ unordered, the only thing it
> guarantees is that atomic_t transactions to the _same_ variable are
> consistent. But anything else can be reordered at will.
> 
> This is very confusing since the new C++ atomic standards has fully
> ordered atomics as the default, and you expressedly need to ask for the
> weakly ordered ones. In linux you need to sprinkle epic amounts of
> smb_barrier* and similar things around them to make atomic_t behave like a
> "normal" C++ atomic type.
> 
> tldr; atomic_t is good for special refcounting needs, when the normal
> refcount_t doesn't cut it. Not much else.
> 
> What usually should be done:
> - Use normal u64 (to match the vblank counter size) instead of atomic_t
>   here.
> - Make sure all access is protect by an appropriate spinlock.
> 

I see, thanks for the explanation!

hm would the patch be fine if I just switch atomic_t to u64 without
using spinlock? since that won't be possible with the work_struct.

Thanks,
Haneen

> > ---
> >  drivers/gpu/drm/vkms/vkms_crc.c  | 33 ++--
> >  drivers/gpu/drm/vkms/vkms_crtc.c | 13 +++--
> >  drivers/gpu/drm/vkms/vkms_drv.h  |  6 --
> >  3 files changed, 46 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/vkms/vkms_crc.c 
> > b/drivers/gpu/drm/vkms/vkms_crc.c
> > index ed47d67cecd6..4a1ba5b7886a 100644
> > --- a/drivers/gpu/drm/vkms/vkms_crc.c
> > +++ b/drivers/gpu/drm/vkms/vkms_crc.c
> > @@ -34,6 +34,15 @@ static uint32_t _vkms_get_crc(struct vkms_crc_data 
> > *crc_data)
> > return crc;
> >  }
> >  
> > +/**
> > + * vkms_crc_work_handle - ordered work_struct to compute CRC
> > + *
> > + * @work: work_struct
> > + *
> > + * Work handler for computing CRCs. work_struct scheduled in
> > + * an ordered workqueue that's periodically scheduled to run by
> > + * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
> > + */
> >  void vkms_crc_work_handle(struct work_struct *work)
> >  {
> > struct vkms_crtc_state *crtc_state = container_of(work,
> > @@ -45,8 +54,18 @@ void vkms_crc_work_handle(struct work_struct *work)
> > output);
> > struct vkms_crc_data *primary_crc = NULL;
> > struct drm_plane *plane;
> > -
> > u32 crc32 = 0;
> > +   u32 frame_start, frame_end;
> > +
> > +   frame_start = atomic_read(&crtc_state->frame_start);
> > +   frame_end = atomic_read(&crtc_state->frame_end);
> > +   /* _vblank_handle() hasn't updated frame_start yet */
> > +   if (!frame_start) {
> 
> I think if we go with u64 we can ignore the issues for wrap-arround, since
> that will simply never happen. But a comment would be good.
> 
> Aside from the atomic_t issue I think this looks good.
> -Daniel
> 
> > +   return;
> > +   } else if (frame_start == frame_end) {
> > +   atomic_set(&crtc_state->frame_start, 0);
> > +   return;
> > +   }
> >  
> > drm_for_each_plane(plane, &vdev->drm) {
> > struct vkms_plane_state *vplane_state;
> > @@ -67,7 +86,17 @@ void vkms_crc_work_handle(struct work_struct *work)
> > if (primary_crc)
> > crc32 = _vkms_get_crc(primary_crc);
> >  
> > -   drm_crtc_add_crc_entry(crtc, true, crtc_state->n_frame, &crc32);
> > +   frame_end = drm_crtc_accurate_vblank_count(crtc);
> > +
> > +   /* queue_work can fail to schedule crc_work; add crc for
> > +* missing frames
> > +*/
> > +   while (frame_start <= frame_end)
> > +   drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
> > +
> > +   /* to avoid using the same value again */
> > +   atomic_set(&crtc_state->frame_end, frame_end);
> > +   atomic_set(&crtc_state->frame_start, 0);
> >  }
> >  
> >  static int vkms_crc_parse_source(const char *src_name, bool *enabled)
> > diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c 
> > b/drivers/gpu/drm/vkms/vkms_crtc.c
> > index 9d0b1a325a78..a170677acd46 100644
> > --- a/driver

[PATCH 04/27] clk: sunxi-ng: Adjust MP clock parent rate when allowed

2018-09-02 Thread Jernej Skrabec
Currently MP clocks don't consider adjusting parent rate even if they
are allowed to do so. Such behaviour considerably lowers amount of
possible rates, which is very inconvenient when such clock is used for
pixel clock, for example.

In order to improve the situation, adjusting parent rate is considered
when allowed.

This code is inspired by clk_divider_bestdiv() function, which does
basically the same thing for different clock type.

Signed-off-by: Jernej Skrabec 
---
 drivers/clk/sunxi-ng/ccu_mp.c | 64 +--
 1 file changed, 62 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c
index 5d0af4051737..0357349eb767 100644
--- a/drivers/clk/sunxi-ng/ccu_mp.c
+++ b/drivers/clk/sunxi-ng/ccu_mp.c
@@ -40,6 +40,61 @@ static void ccu_mp_find_best(unsigned long parent, unsigned 
long rate,
*p = best_p;
 }
 
+static unsigned long ccu_mp_find_best_with_parent_adj(struct clk_hw *hw,
+ unsigned long *parent,
+ unsigned long rate,
+ unsigned int max_m,
+ unsigned int max_p)
+{
+   unsigned long parent_rate_saved;
+   unsigned long parent_rate, now;
+   unsigned long best_rate = 0;
+   unsigned int _m, _p, div;
+   unsigned long maxdiv;
+
+   parent_rate_saved = *parent;
+
+   /*
+* The maximum divider we can use without overflowing
+* unsigned long in rate * m * p below
+*/
+   maxdiv = max_m * max_p;
+   maxdiv = min(ULONG_MAX / rate, maxdiv);
+
+   for (_p = 1; _p <= max_p; _p <<= 1) {
+   for (_m = 1; _m <= max_m; _m++) {
+   div = _m * _p;
+
+   if (div > maxdiv)
+   break;
+
+   if (rate * div == parent_rate_saved) {
+   /*
+* It's the most ideal case if the requested
+* rate can be divided from parent clock without
+* needing to change parent rate, so return the
+* divider immediately.
+*/
+   *parent = parent_rate_saved;
+   return rate;
+   }
+
+   parent_rate = clk_hw_round_rate(hw, rate * div);
+   now = parent_rate / div;
+
+   if (now <= rate && now > best_rate) {
+   best_rate = now;
+   *parent = parent_rate;
+
+   if (now == rate)
+   return rate;
+   }
+   }
+   }
+
+   return best_rate;
+}
+
 static unsigned long ccu_mp_round_rate(struct ccu_mux_internal *mux,
   struct clk_hw *hw,
   unsigned long *parent_rate,
@@ -56,8 +111,13 @@ static unsigned long ccu_mp_round_rate(struct 
ccu_mux_internal *mux,
max_m = cmp->m.max ?: 1 << cmp->m.width;
max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
 
-   ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p);
-   rate = *parent_rate / p / m;
+   if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
+   ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p);
+   rate = *parent_rate / p / m;
+   } else {
+   rate = ccu_mp_find_best_with_parent_adj(hw, parent_rate, rate,
+   max_m, max_p);
+   }
 
if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= cmp->fixed_post_div;
-- 
2.18.0

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[PATCH 13/27] drm/sun4i: Add support for H6 DE3 mixer 0

2018-09-02 Thread Jernej Skrabec
Mixer 0 has 1 VI and 3 UI planes, scaler on all planes and can output
4K image @60Hz. It also support 10 bit colors.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c 
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index a9218abf0935..54eca2dd4b33 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -540,6 +540,15 @@ static int sun8i_mixer_remove(struct platform_device *pdev)
return 0;
 }
 
+static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = {
+   .ccsc   = 0,
+   .is_de3 = true,
+   .mod_rate   = 6,
+   .scaler_mask= 0xf,
+   .ui_num = 3,
+   .vi_num = 1,
+};
+
 static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = {
.ccsc   = 0,
.scaler_mask= 0xf,
@@ -587,6 +596,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
 };
 
 static const struct of_device_id sun8i_mixer_of_table[] = {
+   {
+   .compatible = "allwinner,sun50i-h6-de3-mixer-0",
+   .data = &sun50i_h6_mixer0_cfg,
+   },
{
.compatible = "allwinner,sun8i-a83t-de2-mixer-0",
.data = &sun8i_a83t_mixer0_cfg,
-- 
2.18.0

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[PATCH v3 06/13] drm/bochs: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/bochs/bochs_drv.c | 18 +-
 1 file changed, 1 insertion(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/bochs/bochs_drv.c 
b/drivers/gpu/drm/bochs/bochs_drv.c
index 7b20318483e4..c61b40c72b62 100644
--- a/drivers/gpu/drm/bochs/bochs_drv.c
+++ b/drivers/gpu/drm/bochs/bochs_drv.c
@@ -143,22 +143,6 @@ static const struct dev_pm_ops bochs_pm_ops = {
 /* -- */
 /* pci interface  */
 
-static int bochs_kick_out_firmware_fb(struct pci_dev *pdev)
-{
-   struct apertures_struct *ap;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return -ENOMEM;
-
-   ap->ranges[0].base = pci_resource_start(pdev, 0);
-   ap->ranges[0].size = pci_resource_len(pdev, 0);
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "bochsdrmfb", false);
-   kfree(ap);
-
-   return 0;
-}
-
 static int bochs_pci_probe(struct pci_dev *pdev,
   const struct pci_device_id *ent)
 {
@@ -171,7 +155,7 @@ static int bochs_pci_probe(struct pci_dev *pdev,
return -ENOMEM;
}
 
-   ret = bochs_kick_out_firmware_fb(pdev);
+   ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, 
"bochsdrmfb");
if (ret)
return ret;
 
-- 
2.18.0

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[PATCH 25/27] drm: sun4i: add support for H6 TCON TOP

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

The TCON TOP on Allwinner H6 SoC is a cut down version of the R40 TCON
TOP, which dropped TCON_TV1 and DSI (which do not exist on H6).

Add support for it.

Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c 
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index ed13233cad88..d0f1767ec6fc 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -279,12 +279,20 @@ const struct sun8i_tcon_top_quirks 
sun8i_r40_tcon_top_quirks = {
.has_dsi= true,
 };
 
+const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = {
+   /* Nothing special */
+};
+
 /* sun4i_drv uses this list to check if a device node is a TCON TOP */
 const struct of_device_id sun8i_tcon_top_of_table[] = {
{
.compatible = "allwinner,sun8i-r40-tcon-top",
.data = &sun8i_r40_tcon_top_quirks
},
+   {
+   .compatible = "allwinner,sun50i-h6-tcon-top",
+   .data = &sun50i_h6_tcon_top_quirks
+   },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);
-- 
2.18.0

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[PATCH v3 04/13] fbdev: add remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Almost all PCI drivers using remove_conflicting_framebuffers() wrap it
with the same code.

---
v2: add kerneldoc for DRM helper
v3: propagate remove_conflicting_framebuffers() return value
  + move kerneldoc to where function is implemented

Signed-off-by: Michał Mirosław 
---
 drivers/video/fbdev/core/fbmem.c | 35 
 include/drm/drm_fb_helper.h  | 12 +++
 include/linux/fb.h   |  2 ++
 3 files changed, 49 insertions(+)

diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index 2de93b5014e3..cd96b1c62bbe 100644
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -1812,6 +1813,40 @@ int remove_conflicting_framebuffers(struct 
apertures_struct *a,
 }
 EXPORT_SYMBOL(remove_conflicting_framebuffers);
 
+/**
+ * remove_conflicting_pci_framebuffers - remove firmware-configured 
framebuffers for PCI devices
+ * @pdev: PCI device
+ * @resource_id: index of PCI BAR configuring framebuffer memory
+ * @name: requesting driver name
+ *
+ * This function removes framebuffer devices (eg. initialized by firmware)
+ * using memory range configured for @pdev's BAR @resource_id.
+ *
+ * The function assumes that PCI device with shadowed ROM drives a primary
+ * display and so kicks out vga16fb.
+ */
+int remove_conflicting_pci_framebuffers(struct pci_dev *pdev, int res_id, 
const char *name)
+{
+   struct apertures_struct *ap;
+   bool primary = false;
+   int err;
+
+   ap = alloc_apertures(1);
+   if (!ap)
+   return -ENOMEM;
+
+   ap->ranges[0].base = pci_resource_start(pdev, res_id);
+   ap->ranges[0].size = pci_resource_len(pdev, res_id);
+#ifdef CONFIG_X86
+   primary = pdev->resource[PCI_ROM_RESOURCE].flags &
+   IORESOURCE_ROM_SHADOW;
+#endif
+   err = remove_conflicting_framebuffers(ap, name, primary);
+   kfree(ap);
+   return err;
+}
+EXPORT_SYMBOL(remove_conflicting_pci_framebuffers);
+
 /**
  * register_framebuffer - registers a frame buffer device
  * @fb_info: frame buffer info structure
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index b069433e7fc1..20ea856db900 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -577,4 +577,16 @@ drm_fb_helper_remove_conflicting_framebuffers(struct 
apertures_struct *a,
 #endif
 }
 
+static inline int
+drm_fb_helper_remove_conflicting_pci_framebuffers(struct pci_dev *pdev,
+ int resource_id,
+ const char *name)
+{
+#if IS_REACHABLE(CONFIG_FB)
+   return remove_conflicting_pci_framebuffers(pdev, resource_id, name);
+#else
+   return 0;
+#endif
+}
+
 #endif
diff --git a/include/linux/fb.h b/include/linux/fb.h
index aa74a228bb92..abeffd55b66a 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -632,6 +632,8 @@ extern ssize_t fb_sys_write(struct fb_info *info, const 
char __user *buf,
 extern int register_framebuffer(struct fb_info *fb_info);
 extern int unregister_framebuffer(struct fb_info *fb_info);
 extern int unlink_framebuffer(struct fb_info *fb_info);
+extern int remove_conflicting_pci_framebuffers(struct pci_dev *pdev, int 
res_id,
+  const char *name);
 extern int remove_conflicting_framebuffers(struct apertures_struct *a,
   const char *name, bool primary);
 extern int fb_prepare_logo(struct fb_info *fb_info, int rotate);
-- 
2.18.0

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[PATCH 12/27] drm/sun4i: Add basic support for DE3

2018-09-02 Thread Jernej Skrabec
Display Engine 3 is an upgrade of DE2 with new features like support for
10 bit color formats and support for AFBC.

Most of DE2 code works with DE3, except some small details.

Add support for it.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_csc.c   | 96 +++--
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 17 -
 drivers/gpu/drm/sun4i/sun8i_mixer.h | 21 +-
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c |  8 ++-
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h |  1 +
 drivers/gpu/drm/sun4i/sun8i_vi_layer.c  |  8 +++
 drivers/gpu/drm/sun4i/sun8i_vi_layer.h  |  2 +
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 34 -
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 23 ++
 9 files changed, 197 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c 
b/drivers/gpu/drm/sun4i/sun8i_csc.c
index b14925b40ccf..101901ccf2dc 100644
--- a/drivers/gpu/drm/sun4i/sun8i_csc.c
+++ b/drivers/gpu/drm/sun4i/sun8i_csc.c
@@ -34,6 +34,34 @@ static const u32 yvu2rgb[] = {
0x04A8, 0x, 0x0813, 0xFFFBAC4A,
 };
 
+/*
+ * DE3 has a bit different CSC units. Factors are in two's complement format.
+ * First three have 17 bits for fractinal part and last two 2 bits. First
+ * three values in each line are multiplication factor, 4th is difference,
+ * which is subtracted from the input value before the multiplication and
+ * last value is constant, which is added at the end.
+ *
+ * x' = c00 * (x + d0) + c01 * (y + d1) + c02 * (z + d2) + const0
+ * y' = c10 * (x + d0) + c11 * (y + d1) + c12 * (z + d2) + const1
+ * z' = c20 * (x + d0) + c21 * (y + d1) + c22 * (z + d2) + const2
+ *
+ * Please note that above formula is true only for Blender CSC. Other DE3 CSC
+ * units takes only positive value for difference. From what can be deducted
+ * from BSP driver code, those units probably automatically assume that
+ * difference has to be subtracted.
+ */
+static const u32 yuv2rgb_de3[] = {
+   0x0002542a, 0x, 0x0003312a, 0xffc0, 0x,
+   0x0002542a, 0x376b, 0xfffe5fc3, 0xfe00, 0x,
+   0x0002542a, 0x000408d3, 0x, 0xfe00, 0x,
+};
+
+static const u32 yvu2rgb_de3[] = {
+   0x0002542a, 0x0003312a, 0x, 0xffc0, 0x,
+   0x0002542a, 0xfffe5fc3, 0x376b, 0xfe00, 0x,
+   0x0002542a, 0x, 0x000408d3, 0xfe00, 0x,
+};
+
 static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
   enum sun8i_csc_mode mode)
 {
@@ -61,6 +89,38 @@ static void sun8i_csc_set_coefficients(struct regmap *map, 
u32 base,
}
 }
 
+static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer,
+   enum sun8i_csc_mode mode)
+{
+   const u32 *table;
+   int i, j;
+
+   switch (mode) {
+   case SUN8I_CSC_MODE_YUV2RGB:
+   table = yuv2rgb_de3;
+   break;
+   case SUN8I_CSC_MODE_YVU2RGB:
+   table = yvu2rgb_de3;
+   break;
+   default:
+   DRM_WARN("Wrong CSC mode specified.\n");
+   return;
+   }
+
+   for (i = 0; i < 3; i++) {
+   for (j = 0; j < 3; j++)
+   regmap_write(map,
+SUN8I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
+layer, i, j),
+table[i * 5 + j]);
+   regmap_write(map,
+SUN8I_MIXER_BLEND_CSC_CONST(DE3_BLD_BASE,
+layer, i),
+SUN8I_MIXER_BLEND_CSC_CONST_VAL(table[i * 5 + 3],
+table[i * 5 + 4]));
+   }
+}
+
 static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable)
 {
u32 val;
@@ -73,21 +133,45 @@ static void sun8i_csc_enable(struct regmap *map, u32 base, 
bool enable)
regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val);
 }
 
+static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable)
+{
+   u32 val, mask;
+
+   mask = SUN8I_MIXER_BLEND_CSC_CTL_EN(layer);
+
+   if (enable)
+   val = mask;
+   else
+   val = 0;
+
+   regmap_update_bits(map, SUN8I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE),
+  mask, val);
+}
+
 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
 enum sun8i_csc_mode mode)
 {
-   u32 base;
+   if (!mixer->cfg->is_de3) {
+   u32 base;
 
-   base = ccsc_base[mixer->cfg->ccsc][layer];
+   base = ccsc_base[mixer->cfg->ccsc][layer];
 
-   sun8i_csc_set_coefficients(mixer->engine.regs, base, mode);
+   sun8i_csc_set_coefficients(mixer->engine.regs, base, mode);
+   } else {

[PATCH 11/27] drm/sun4i: Rework DE2 register defines

2018-09-02 Thread Jernej Skrabec
Most, if not all, registers found in DE2 still exists in DE3. However,
units are on different base addresses.

To prepare for addition of DE3 support, registers macros are reworked so
they take base address as parameter.

Signed-off-by: Jernej Skrabec 
[rebased]
Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 14 ---
 drivers/gpu/drm/sun4i/sun8i_mixer.h | 44 +---
 drivers/gpu/drm/sun4i/sun8i_ui_layer.c  | 47 ++
 drivers/gpu/drm/sun4i/sun8i_ui_layer.h  | 37 +
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c | 41 +++
 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h | 27 +
 drivers/gpu/drm/sun4i/sun8i_vi_layer.c  | 47 ++
 drivers/gpu/drm/sun4i/sun8i_vi_layer.h  | 23 ++-
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 53 +++--
 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 45 ++---
 10 files changed, 219 insertions(+), 159 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c 
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index fc3713608f78..743941a33d88 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -368,6 +368,7 @@ static int sun8i_mixer_bind(struct device *dev, struct 
device *master,
struct sun8i_mixer *mixer;
struct resource *res;
void __iomem *regs;
+   unsigned int base;
int plane_cnt;
int i, ret;
 
@@ -456,6 +457,8 @@ static int sun8i_mixer_bind(struct device *dev, struct 
device *master,
 
list_add_tail(&mixer->engine.list, &drv->engine_list);
 
+   base = sun8i_blender_base(mixer);
+
/* Reset the registers */
for (i = 0x0; i < 0x2; i += 4)
regmap_write(mixer->engine.regs, i, 0);
@@ -465,24 +468,25 @@ static int sun8i_mixer_bind(struct device *dev, struct 
device *master,
 SUN8I_MIXER_GLOBAL_CTL_RT_EN);
 
/* Set background color to black */
-   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR,
+   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base),
 SUN8I_MIXER_BLEND_COLOR_BLACK);
 
/*
 * Set fill color of bottom plane to black. Generally not needed
 * except when VI plane is at bottom (zpos = 0) and enabled.
 */
-   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL,
+   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),
 SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0));
-   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(0),
+   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0),
 SUN8I_MIXER_BLEND_COLOR_BLACK);
 
plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num;
for (i = 0; i < plane_cnt; i++)
-   regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(i),
+   regmap_write(mixer->engine.regs,
+SUN8I_MIXER_BLEND_MODE(base, i),
 SUN8I_MIXER_BLEND_MODE_DEF);
 
-   regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL,
+   regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),
   SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0);
 
return 0;
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h 
b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 406c42e752d7..020b0a097c84 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -29,20 +29,24 @@
 
 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLEBIT(0)
 
-#define SUN8I_MIXER_BLEND_PIPE_CTL 0x1000
-#define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x)   (0x1004 + 0x10 * (x) + 0x0)
-#define SUN8I_MIXER_BLEND_ATTR_INSIZE(x)   (0x1004 + 0x10 * (x) + 0x4)
-#define SUN8I_MIXER_BLEND_ATTR_COORD(x)(0x1004 + 0x10 * (x) + 
0x8)
-#define SUN8I_MIXER_BLEND_ROUTE0x1080
-#define SUN8I_MIXER_BLEND_PREMULTIPLY  0x1084
-#define SUN8I_MIXER_BLEND_BKCOLOR  0x1088
-#define SUN8I_MIXER_BLEND_OUTSIZE  0x108c
-#define SUN8I_MIXER_BLEND_MODE(x)  (0x1090 + 0x04 * (x))
-#define SUN8I_MIXER_BLEND_CK_CTL   0x10b0
-#define SUN8I_MIXER_BLEND_CK_CFG   0x10b4
-#define SUN8I_MIXER_BLEND_CK_MAX(x)(0x10c0 + 0x04 * (x))
-#define SUN8I_MIXER_BLEND_CK_MIN(x)(0x10e0 + 0x04 * (x))
-#define SUN8I_MIXER_BLEND_OUTCTL   0x10fc
+#define DE2_BLD_BASE   0x1000
+#define DE2_CH_BASE0x2000
+#define DE2_CH_SIZE0x1000
+
+#define SUN8I_MIXER_BLEND_PIPE_CTL(base)   ((base) + 0)
+#define SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, x) ((base) + 0x4 + 0x10 * (x))
+#define SUN8I_MIXER_BLEND_ATTR_INSIZE(base, x) ((base) + 0x8 + 0x10 * (x))
+#define SUN8I_MIXER_BLEND_ATTR_COORD(base, x)  ((base) + 0xC 

[PATCH 26/27] arm64: dts: sun50i: h6: Add HDMI pipeline

2018-09-02 Thread Jernej Skrabec
This commit adds all entries needed for HDMI to function properly.

Signed-off-by: Jernej Skrabec 
[added DE3 bus]
Signed-off-by: Icenowy Zheng 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 201 +++
 1 file changed, 201 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 040828d2e2c0..59dda8f89d23 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -6,8 +6,11 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
+#include 
 
 / {
interrupt-parent = <&gic>;
@@ -86,12 +89,63 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
 
+   de: display-engine {
+   compatible = "allwinner,sun50i-h6-display-engine";
+   allwinner,pipelines = <&mixer0>;
+   status = "disabled";
+   };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
 
+   de3@100 {
+   compatible = "allwinner,sun50i-h6-de3",
+"allwinner,sun50i-a64-de2";
+   reg = <0x100 0x40>;
+   allwinner,sram = <&de2_sram 1>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x100 0x40>;
+
+   display_clocks: clock@0 {
+   compatible = "allwinner,sun50i-h6-de3-clk";
+   reg = <0x0 0x1>;
+   clocks = <&ccu CLK_DE>,
+<&ccu CLK_BUS_DE>;
+   clock-names = "mod",
+ "bus";
+   resets = <&ccu RST_BUS_DE>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+   mixer0: mixer@10 {
+   compatible = "allwinner,sun50i-h6-de3-mixer-0";
+   reg = <0x10 0x10>;
+   clocks = <&display_clocks CLK_BUS_MIXER0>,
+<&display_clocks CLK_MIXER0>;
+   clock-names = "bus",
+ "mod";
+   resets = <&display_clocks RST_MIXER0>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mixer0_out: port@1 {
+   reg = <1>;
+
+   mixer0_out_tcon_top_mixer0: 
endpoint {
+   remote-endpoint = 
<&tcon_top_mixer0_in_mixer0>;
+   };
+   };
+   };
+   };
+   };
+
syscon: syscon@300 {
compatible = "allwinner,sun50i-h6-system-control",
 "allwinner,sun50i-a64-system-control";
@@ -149,6 +203,11 @@
interrupt-controller;
#interrupt-cells = <3>;
 
+   hdmi_pins: hdmi-pins {
+   pins = "PH8", "PH9", "PH10";
+   function = "hdmi";
+   };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
   "PF4", "PF5";
@@ -258,6 +317,148 @@
status = "disabled";
};
 
+   hdmi: hdmi@600 {
+   compatible = "allwinner,sun50i-h6-dw-hdmi";
+   reg = <0x0600 0x1>;
+   reg-io-width = <1>;
+   interrupts = ;
+   clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
+<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
+<&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
+   clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
+ "hdcp-bus";
+   resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
+   reset-names = "ctrl", "hdcp";
+   phys = <&hdmi_phy>;
+   phy-names = "hdmi-phy";
+   pinctrl-names = "default";
+   pinctrl-0 = <&hdmi_pins>;
+   status = "disabled";
+
+

[PATCH v3 05/13] drm/amdgpu: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Alex Deucher 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 24 +---
 1 file changed, 1 insertion(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0b19482b36b8..9b6e037719db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -560,28 +560,6 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
 
 static struct drm_driver kms_driver;
 
-static int amdgpu_kick_out_firmware_fb(struct pci_dev *pdev)
-{
-   struct apertures_struct *ap;
-   bool primary = false;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return -ENOMEM;
-
-   ap->ranges[0].base = pci_resource_start(pdev, 0);
-   ap->ranges[0].size = pci_resource_len(pdev, 0);
-
-#ifdef CONFIG_X86
-   primary = pdev->resource[PCI_ROM_RESOURCE].flags & 
IORESOURCE_ROM_SHADOW;
-#endif
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "amdgpudrmfb", 
primary);
-   kfree(ap);
-
-   return 0;
-}
-
-
 static int amdgpu_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
 {
@@ -609,7 +587,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
return ret;
 
/* Get rid of things like offb */
-   ret = amdgpu_kick_out_firmware_fb(pdev);
+   ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, 
"amdgpudrmfb");
if (ret)
return ret;
 
-- 
2.18.0

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[PATCH 01/27] dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

The Allwinner H6 SoC's DE3 needs the SRAM C section being claimed in the
system controller to work, like A64 DE2.

As H6 and A64 system controller are quite similar, code is reused now,
and the A64 fallback compatible string is added after the H6 compatible
string.

Signed-off-by: Icenowy Zheng 
[fixed typo in compatible string]
Signed-off-by: Jernej Skrabec 
---
 Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/sram/sunxi-sram.txt 
b/Documentation/devicetree/bindings/sram/sunxi-sram.txt
index c51ade86578c..62dd0748f0ef 100644
--- a/Documentation/devicetree/bindings/sram/sunxi-sram.txt
+++ b/Documentation/devicetree/bindings/sram/sunxi-sram.txt
@@ -18,6 +18,7 @@ Required properties:
 - "allwinner,sun8i-h3-system-control"
 - "allwinner,sun50i-a64-sram-controller" (deprecated)
 - "allwinner,sun50i-a64-system-control"
+- "allwinner,sun50i-h6-system-control", 
"allwinner,sun50i-a64-system-control"
 - reg : sram controller register offset + length
 
 SRAM nodes
@@ -54,6 +55,9 @@ The valid sections compatible for H3 are:
 The valid sections compatible for A64 are:
 - allwinner,sun50i-a64-sram-c
 
+The valid sections compatible for H6 are:
+- allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c
+
 Devices using SRAM sections
 ---
 
-- 
2.18.0

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[PATCH 10/27] drm/sun4i: Add compatible for H6 display engine

2018-09-02 Thread Jernej Skrabec
H6 is first Allwinner SoC which supports 10 bit colors, HDR and AFBC.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index dd19d674055c..e5731d092e1a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -410,6 +410,7 @@ static int sun4i_drv_remove(struct platform_device *pdev)
 
 static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun4i-a10-display-engine" },
+   { .compatible = "allwinner,sun50i-h6-display-engine" },
{ .compatible = "allwinner,sun5i-a10s-display-engine" },
{ .compatible = "allwinner,sun5i-a13-display-engine" },
{ .compatible = "allwinner,sun6i-a31-display-engine" },
-- 
2.18.0

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[PATCH 24/27] dt-bindings: display: sun4i-drm: document H6 TCON TOP

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

Allwinner H6 SoC has a cut down version of TCON TOP.

Add binding documentation for it.

Signed-off-by: Icenowy Zheng 
[expanded description]
Signed-off-by: Jernej Skrabec 
---
 .../bindings/display/sunxi/sun4i-drm.txt   | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 278410e43940..a14eb9313e70 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -221,24 +221,26 @@ It allows display pipeline to be configured in very 
different ways:
  \ [3] TCON-TV1 [1] - TVE1/RGB
 
 Note that both TCON TOP references same physical unit. Both mixers can be
-connected to any TCON.
+connected to any TCON. Not all TCON TOP variants support all features.
 
 Required properties:
   - compatible: value must be one of:
 * allwinner,sun8i-r40-tcon-top
+* allwinner,sun50i-h6-tcon-top
   - reg: base address and size of the memory-mapped region.
   - clocks: phandle to the clocks feeding the TCON TOP
 * bus: TCON TOP interface clock
 * tcon-tv0: TCON TV0 clock
-* tve0: TVE0 clock
-* tcon-tv1: TCON TV1 clock
-* tve1: TVE0 clock
-* dsi: MIPI DSI clock
+* tve0: TVE0 clock (R40 only)
+* tcon-tv1: TCON TV1 clock (R40 only)
+* tve1: TVE0 clock (R40 only)
+* dsi: MIPI DSI clock (R40 only)
   - clock-names: clock name mentioned above
   - resets: phandle to the reset line driving the TCON TOP
   - #clock-cells : must contain 1
   - clock-output-names: Names of clocks created for TCON TV0 channel clock,
-TCON TV1 channel clock and DSI channel clock, in that order.
+TCON TV1 channel clock (R40 only) and DSI channel clock (R40 only), in
+that order.
 
 - ports: A ports node with endpoint definitions as defined in
 Documentation/devicetree/bindings/media/video-interfaces.txt. 6 ports 
should
-- 
2.18.0

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[PATCH 08/27] clk: sunxi-ng: Add support for H6 DE3 clocks

2018-09-02 Thread Jernej Skrabec
Support for mixer0, mixer1, writeback and rotation units is added.

Signed-off-by: Jernej Skrabec 
Signed-off-by: Icenowy Zheng 
---
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 65 
 drivers/clk/sunxi-ng/ccu-sun8i-de2.h |  1 +
 2 files changed, 66 insertions(+)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c 
b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index bae5ee67a797..4535c1c27d27 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -31,6 +31,8 @@ static SUNXI_CCU_GATE(bus_mixer1_clk, "bus-mixer1",   
"bus-de",
  0x04, BIT(1), 0);
 static SUNXI_CCU_GATE(bus_wb_clk,  "bus-wb",   "bus-de",
  0x04, BIT(2), 0);
+static SUNXI_CCU_GATE(bus_rot_clk, "bus-rot",  "bus-de",
+ 0x04, BIT(3), 0);
 
 static SUNXI_CCU_GATE(mixer0_clk,  "mixer0",   "mixer0-div",
  0x00, BIT(0), CLK_SET_RATE_PARENT);
@@ -38,6 +40,8 @@ static SUNXI_CCU_GATE(mixer1_clk, "mixer1",   
"mixer1-div",
  0x00, BIT(1), CLK_SET_RATE_PARENT);
 static SUNXI_CCU_GATE(wb_clk,  "wb",   "wb-div",
  0x00, BIT(2), CLK_SET_RATE_PARENT);
+static SUNXI_CCU_GATE(rot_clk, "rot",  "rot-div",
+ 0x00, BIT(3), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_M(mixer0_div_clk, "mixer0-div", "de", 0x0c, 0, 4,
   CLK_SET_RATE_PARENT);
@@ -45,6 +49,8 @@ static SUNXI_CCU_M(mixer1_div_clk, "mixer1-div", "de", 0x0c, 
4, 4,
   CLK_SET_RATE_PARENT);
 static SUNXI_CCU_M(wb_div_clk, "wb-div", "de", 0x0c, 8, 4,
   CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(rot_div_clk, "rot-div", "de", 0x0c, 0x0c, 4,
+  CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_M(mixer0_div_a83_clk, "mixer0-div", "pll-de", 0x0c, 0, 4,
   CLK_SET_RATE_PARENT);
@@ -53,6 +59,24 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", 
"pll-de", 0x0c, 4, 4,
 static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
   CLK_SET_RATE_PARENT);
 
+static struct ccu_common *sun50i_h6_de3_clks[] = {
+   &mixer0_clk.common,
+   &mixer1_clk.common,
+   &wb_clk.common,
+
+   &bus_mixer0_clk.common,
+   &bus_mixer1_clk.common,
+   &bus_wb_clk.common,
+
+   &mixer0_div_clk.common,
+   &mixer1_div_clk.common,
+   &wb_div_clk.common,
+
+   &bus_rot_clk.common,
+   &rot_clk.common,
+   &rot_div_clk.common,
+};
+
 static struct ccu_common *sun8i_a83t_de2_clks[] = {
&mixer0_clk.common,
&mixer1_clk.common,
@@ -92,6 +116,26 @@ static struct ccu_common *sun8i_v3s_de2_clks[] = {
&wb_div_clk.common,
 };
 
+static struct clk_hw_onecell_data sun50i_h6_de3_hw_clks = {
+   .hws= {
+   [CLK_MIXER0]= &mixer0_clk.common.hw,
+   [CLK_MIXER1]= &mixer1_clk.common.hw,
+   [CLK_WB]= &wb_clk.common.hw,
+   [CLK_ROT]   = &rot_clk.common.hw,
+
+   [CLK_BUS_MIXER0]= &bus_mixer0_clk.common.hw,
+   [CLK_BUS_MIXER1]= &bus_mixer1_clk.common.hw,
+   [CLK_BUS_WB]= &bus_wb_clk.common.hw,
+   [CLK_BUS_ROT]   = &bus_rot_clk.common.hw,
+
+   [CLK_MIXER0_DIV]= &mixer0_div_clk.common.hw,
+   [CLK_MIXER1_DIV]= &mixer1_div_clk.common.hw,
+   [CLK_WB_DIV]= &wb_div_clk.common.hw,
+   [CLK_ROT_DIV]   = &rot_div_clk.common.hw,
+   },
+   .num= 12,
+};
+
 static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = {
.hws= {
[CLK_MIXER0]= &mixer0_clk.common.hw,
@@ -156,6 +200,13 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = {
[RST_WB]= { 0x08, BIT(2) },
 };
 
+static struct ccu_reset_map sun50i_h6_de3_resets[] = {
+   [RST_MIXER0]= { 0x08, BIT(0) },
+   [RST_MIXER1]= { 0x08, BIT(1) },
+   [RST_WB]= { 0x08, BIT(2) },
+   [RST_ROT]   = { 0x08, BIT(3) },
+};
+
 static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
.ccu_clks   = sun8i_a83t_de2_clks,
.num_ccu_clks   = ARRAY_SIZE(sun8i_a83t_de2_clks),
@@ -186,6 +237,16 @@ static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc 
= {
.num_resets = ARRAY_SIZE(sun50i_a64_de2_resets),
 };
 
+static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
+   .ccu_clks   = sun50i_h6_de3_clks,
+   .num_ccu_clks   = ARRAY_SIZE(sun50i_h6_de3_clks),
+
+   .hw_clks= &sun50i_h6_de3_hw_clks,
+
+   .resets = sun50i_h6_de3_resets,
+   .num_resets = ARRAY_SIZE(sun50i_h6_de3_resets),
+};
+
 static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
.ccu_clks   = sun8i_v3s_de2_clks,
.num_ccu_clks   = ARRAY_SIZE(sun8i_v3s_de2

Re: [PATCH v2 00/12] remove_conflicting_framebuffers() cleanup

2018-09-02 Thread Michał Mirosław
On Fri, Aug 31, 2018 at 10:07:42AM +0100, Chris Wilson wrote:
[...]
> Ahah, someone is looking at remove_conflicting_framebuffers(). May I
> interest you in a use-after-free?

> [  378.423513] stack segment:  [#1] PREEMPT SMP PTI
> [  378.423530] CPU: 1 PID: 4338 Comm: pm_rpm Tainted: G U
> 4.19.0-rc1-CI-CI_DRM_4746+ #1
> [  378.423548] Hardware name: To Be Filled By O.E.M. To Be Filled By 
> O.E.M./J4205-ITX, BIOS P1.10 09/29/2016
> [  378.423570] RIP: 0010:do_remove_conflicting_framebuffers+0x56/0x170
> [  378.423587] Code: 49 8b 45 00 48 85 c0 74 50 f6 40 0a 08 74 4a 4d 85 e4 48 
> 8b a8 78 04 00 00 74 1f 48 85 ed 74 1a 41 8b 0c 24 31 db 85 c9 74 10 <8b> 55 
> 00 85 d2 75 42 83 c3 01 41 39 1c 24 77 f0 48 85 ed 74 1a 45
> [  378.423620] RSP: 0018:c91dfa88 EFLAGS: 00010202
> [  378.423632] RAX: 880274470008 RBX:  RCX: 
> 0001
> [  378.423646] RDX: 0001 RSI: a025c634 RDI: 
> 88025cc3b428
> [  378.423660] RBP: 6b6b6b6b6b6b6b6b R08: 1edaddfa R09: 
> a025c634
> [  378.423673] R10: c91dfae8 R11: 820de938 R12: 
> 88025cc3b428
> [  378.423687] R13: 8234ca20 R14: 8234cb20 R15: 
> 0001
> [  378.423701] FS:  7fcf03d0a980() GS:880277e8() 
> knlGS:
> [  378.423717] CS:  0010 DS:  ES:  CR0: 80050033
> [  378.423729] CR2: 7fffece1fdb8 CR3: 0001fe32e000 CR4: 
> 003406e0
> [  378.423742] Call Trace:
> [  378.423756]  remove_conflicting_framebuffers+0x28/0x40
> [  378.423856]  i915_driver_load+0x7f5/0x10c0 [i915]
[...]

Looks like registered_fb[] entry is pointing to (partially?) freed or
corrupted fb_info, but I can't see how this could be an effect of
remove_conflicting_framebuffers().

Best Regards,
Michał Mirosław
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[PATCH 07/27] dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description

2018-09-02 Thread Jernej Skrabec
This commit adds necessary description and dt includes for H6 DE3 clock.
It is very similar to others, but memory region has some additional
registers not found in DE2.

Signed-off-by: Jernej Skrabec 
---
 Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +++--
 include/dt-bindings/clock/sun8i-de2.h | 3 +++
 include/dt-bindings/reset/sun8i-de2.h | 1 +
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt 
b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
index e94582e8b8a9..41a52c2acffd 100644
--- a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
+++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
@@ -1,5 +1,5 @@
-Allwinner Display Engine 2.0 Clock Control Binding
---
+Allwinner Display Engine 2.0/3.0 Clock Control Binding
+--
 
 Required properties :
 - compatible: must contain one of the following compatibles:
@@ -8,6 +8,7 @@ Required properties :
- "allwinner,sun8i-v3s-de2-clk"
- "allwinner,sun50i-a64-de2-clk"
- "allwinner,sun50i-h5-de2-clk"
+   - "allwinner,sun50i-h6-de3-clk"
 
 - reg: Must contain the registers base address and length
 - clocks: phandle to the clocks feeding the display engine subsystem.
diff --git a/include/dt-bindings/clock/sun8i-de2.h 
b/include/dt-bindings/clock/sun8i-de2.h
index 3bed63b524aa..7768f73b051e 100644
--- a/include/dt-bindings/clock/sun8i-de2.h
+++ b/include/dt-bindings/clock/sun8i-de2.h
@@ -15,4 +15,7 @@
 #define CLK_MIXER1 7
 #define CLK_WB 8
 
+#define CLK_BUS_ROT9
+#define CLK_ROT10
+
 #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */
diff --git a/include/dt-bindings/reset/sun8i-de2.h 
b/include/dt-bindings/reset/sun8i-de2.h
index 9526017432f0..1c36a6ac86d6 100644
--- a/include/dt-bindings/reset/sun8i-de2.h
+++ b/include/dt-bindings/reset/sun8i-de2.h
@@ -10,5 +10,6 @@
 #define RST_MIXER0 0
 #define RST_MIXER1 1
 #define RST_WB 2
+#define RST_ROT3
 
 #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */
-- 
2.18.0

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[PATCH 20/27] drm/sun4i: Add support for Synopsys HDMI PHY

2018-09-02 Thread Jernej Skrabec
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to
DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys
PHY, driver has to be reorganized to support them.

Variant structure is expanded to allow differentiation between custom
and Sysnopsys PHYs and to hold Synopsys PHY settings.

Since DW HDMI bridge platform data has different fields for custom and
Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with
sun8i_hdmi_phy_set_ops().

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c  |  4 +---
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h  |  7 ++-
 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 18 --
 3 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 44143c9f20d0..bf35975dd100 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -172,9 +172,7 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct 
device *master,
sun8i_hdmi_phy_init(hdmi->phy);
 
plat_data->mode_valid = hdmi->quirks->mode_valid;
-   plat_data->phy_ops = sun8i_hdmi_phy_get_ops();
-   plat_data->phy_name = "sun8i_dw_hdmi_phy";
-   plat_data->phy_data = hdmi->phy;
+   sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
 
platform_set_drvdata(pdev, hdmi);
 
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
index 94cf13d09abe..e48cd9b3cce3 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
@@ -149,6 +149,10 @@ struct sun8i_hdmi_phy;
 struct sun8i_hdmi_phy_variant {
bool has_phy_clk;
bool has_second_pll;
+   bool is_custom_phy;
+   const struct dw_hdmi_curr_ctrl *cur_ctr;
+   const struct dw_hdmi_mpll_config *mpll_cfg;
+   const struct dw_hdmi_phy_config *phy_cfg;
void (*phy_init)(struct sun8i_hdmi_phy *phy);
void (*phy_disable)(struct dw_hdmi *hdmi,
struct sun8i_hdmi_phy *phy);
@@ -196,7 +200,8 @@ int sun8i_hdmi_phy_probe(struct sun8i_dw_hdmi *hdmi, struct 
device_node *node);
 void sun8i_hdmi_phy_remove(struct sun8i_dw_hdmi *hdmi);
 
 void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy);
-const struct dw_hdmi_phy_ops *sun8i_hdmi_phy_get_ops(void);
+void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
+   struct dw_hdmi_plat_data *plat_data);
 
 int sun8i_phy_clk_create(struct sun8i_hdmi_phy *phy, struct device *dev,
 bool second_parent);
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index ad4ba1cc83b4..ee2bf61cd4d2 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -390,9 +390,20 @@ void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
phy->variant->phy_init(phy);
 }
 
-const struct dw_hdmi_phy_ops *sun8i_hdmi_phy_get_ops(void)
+void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy,
+   struct dw_hdmi_plat_data *plat_data)
 {
-   return &sun8i_hdmi_phy_ops;
+   struct sun8i_hdmi_phy_variant *variant = phy->variant;
+
+   if (variant->is_custom_phy) {
+   plat_data->phy_ops = &sun8i_hdmi_phy_ops;
+   plat_data->phy_name = "sun8i_dw_hdmi_phy";
+   plat_data->phy_data = phy;
+   } else {
+   plat_data->mpll_cfg = variant->mpll_cfg;
+   plat_data->cur_ctr = variant->cur_ctr;
+   plat_data->phy_config = variant->phy_cfg;
+   }
 }
 
 static struct regmap_config sun8i_hdmi_phy_regmap_config = {
@@ -405,6 +416,7 @@ static struct regmap_config sun8i_hdmi_phy_regmap_config = {
 
 static const struct sun8i_hdmi_phy_variant sun50i_a64_hdmi_phy = {
.has_phy_clk = true,
+   .is_custom_phy = true,
.has_second_pll = true,
.phy_init = &sun8i_hdmi_phy_init_h3,
.phy_disable = &sun8i_hdmi_phy_disable_h3,
@@ -412,6 +424,7 @@ static const struct sun8i_hdmi_phy_variant 
sun50i_a64_hdmi_phy = {
 };
 
 static const struct sun8i_hdmi_phy_variant sun8i_a83t_hdmi_phy = {
+   .is_custom_phy = true,
.phy_init = &sun8i_hdmi_phy_init_a83t,
.phy_disable = &sun8i_hdmi_phy_disable_a83t,
.phy_config = &sun8i_hdmi_phy_config_a83t,
@@ -419,6 +432,7 @@ static const struct sun8i_hdmi_phy_variant 
sun8i_a83t_hdmi_phy = {
 
 static const struct sun8i_hdmi_phy_variant sun8i_h3_hdmi_phy = {
.has_phy_clk = true,
+   .is_custom_phy = true,
.phy_init = &sun8i_hdmi_phy_init_h3,
.phy_disable = &sun8i_hdmi_phy_disable_h3,
.phy_config = &sun8i_hdmi_phy_config_h3,
-- 
2.18.0

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[PATCH 09/27] dt-bindings: display: sun4i-drm: Add H6 display engine compatibles

2018-09-02 Thread Jernej Skrabec
This commit adds compatibles used in H6 display pipeline, namely for
display engine, mixer and TV TCON.

H6 display engine is somewhat similar to R40, just less TCONs and
mixer support more features.

Signed-off-by: Jernej Skrabec 
---
 .../devicetree/bindings/display/sunxi/sun4i-drm.txt  | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index f8773ecb7525..dec2f8a6da9c 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -151,6 +151,7 @@ Required properties:
* allwinner,sun8i-v3s-tcon
* allwinner,sun9i-a80-tcon-lcd
* allwinner,sun9i-a80-tcon-tv
+   * allwinner,sun50i-h6-tcon-tv, allwinner,sun8i-r40-tcon-tv
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
  - clocks: phandles to the clocks feeding the TCON.
@@ -370,6 +371,7 @@ Required properties:
 * allwinner,sun8i-a83t-de2-mixer-1
 * allwinner,sun8i-h3-de2-mixer-0
 * allwinner,sun8i-v3s-de2-mixer
+* allwinner,sun50i-h6-de3-mixer-0
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the mixer
 * bus: the mixer interface clock
@@ -403,9 +405,10 @@ Required properties:
 * allwinner,sun8i-r40-display-engine
 * allwinner,sun8i-v3s-display-engine
 * allwinner,sun9i-a80-display-engine
+* allwinner,sun50i-h6-display-engine
 
   - allwinner,pipelines: list of phandle to the display engine
-frontends (DE 1.0) or mixers (DE 2.0) available.
+frontends (DE 1.0) or mixers (DE 2.0/3.0) available.
 
 Example:
 
-- 
2.18.0

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[PATCH v3 01/13] fbdev: show fbdev number for debugging

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Bartlomiej Zolnierkiewicz 
Acked-by: Daniel Vetter 
---
 drivers/video/fbdev/core/fbmem.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index f741ba8df01b..30a18d4c9de4 100644
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -1618,8 +1618,8 @@ static int do_remove_conflicting_framebuffers(struct 
apertures_struct *a,
(primary && gen_aper && gen_aper->count &&
 gen_aper->ranges[0].base == VGA_FB_PHYS)) {
 
-   printk(KERN_INFO "fb: switching to %s from %s\n",
-  name, registered_fb[i]->fix.id);
+   printk(KERN_INFO "fb%d: switching to %s from %s\n",
+  i, name, registered_fb[i]->fix.id);
ret = do_unregister_framebuffer(registered_fb[i]);
if (ret)
return ret;
-- 
2.18.0

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[PATCH 23/27] drm: sun4i: add quirks for TCON TOP

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

Some SoCs, such as H6, doesn't have a full-featured TCON TOP.

Add quirks support for TCON TOP.

Currently the presence of TCON_TV1 and DSI is controlled via the quirks
structure.

Signed-off-by: Icenowy Zheng 
---
 drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 43 --
 1 file changed, 34 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c 
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 37158548b447..ed13233cad88 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -9,11 +9,17 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
 #include "sun8i_tcon_top.h"
 
+struct sun8i_tcon_top_quirks {
+   bool has_tcon_tv1;
+   bool has_dsi;
+};
+
 static bool sun8i_tcon_top_node_is_tcon_top(struct device_node *node)
 {
return !!of_match_node(sun8i_tcon_top_of_table, node);
@@ -121,10 +127,13 @@ static int sun8i_tcon_top_bind(struct device *dev, struct 
device *master,
struct platform_device *pdev = to_platform_device(dev);
struct clk_hw_onecell_data *clk_data;
struct sun8i_tcon_top *tcon_top;
+   const struct sun8i_tcon_top_quirks *quirks;
struct resource *res;
void __iomem *regs;
int ret, i;
 
+   quirks = of_device_get_match_data(&pdev->dev);
+
tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);
if (!tcon_top)
return -ENOMEM;
@@ -187,15 +196,23 @@ static int sun8i_tcon_top_bind(struct device *dev, struct 
device *master,
 &tcon_top->reg_lock,
 TCON_TOP_TCON_TV0_GATE, 0);
 
-   clk_data->hws[CLK_TCON_TOP_TV1] =
-   sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
-&tcon_top->reg_lock,
-TCON_TOP_TCON_TV1_GATE, 1);
+   if (quirks->has_tcon_tv1) {
+   clk_data->hws[CLK_TCON_TOP_TV1] =
+   sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
+&tcon_top->reg_lock,
+TCON_TOP_TCON_TV1_GATE, 1);
+   } else {
+   clk_data->hws[CLK_TCON_TOP_TV1] = NULL;
+   }
 
-   clk_data->hws[CLK_TCON_TOP_DSI] =
-   sun8i_tcon_top_register_gate(dev, "dsi", regs,
-&tcon_top->reg_lock,
-TCON_TOP_TCON_DSI_GATE, 2);
+   if (quirks->has_dsi) {
+   clk_data->hws[CLK_TCON_TOP_DSI] =
+   sun8i_tcon_top_register_gate(dev, "dsi", regs,
+&tcon_top->reg_lock,
+TCON_TOP_TCON_DSI_GATE, 2);
+   } else {
+   clk_data->hws[CLK_TCON_TOP_DSI] = NULL;
+   }
 
for (i = 0; i < CLK_NUM; i++)
if (IS_ERR(clk_data->hws[i])) {
@@ -257,9 +274,17 @@ static int sun8i_tcon_top_remove(struct platform_device 
*pdev)
return 0;
 }
 
+const struct sun8i_tcon_top_quirks sun8i_r40_tcon_top_quirks = {
+   .has_tcon_tv1   = true,
+   .has_dsi= true,
+};
+
 /* sun4i_drv uses this list to check if a device node is a TCON TOP */
 const struct of_device_id sun8i_tcon_top_of_table[] = {
-   { .compatible = "allwinner,sun8i-r40-tcon-top" },
+   {
+   .compatible = "allwinner,sun8i-r40-tcon-top",
+   .data = &sun8i_r40_tcon_top_quirks
+   },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);
-- 
2.18.0

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[PATCH 19/27] drm/sun4i: Add support for H6 DW HDMI controller

2018-09-02 Thread Jernej Skrabec
H6 has DW HDMI 2.0 controller v2.12a.

It supports 4K at 60 Hz and HDCP 2.2.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c 
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 16a0c7a88ea8..44143c9f20d0 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -43,6 +43,16 @@ sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector 
*connector,
return MODE_OK;
 }
 
+static enum drm_mode_status
+sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector,
+   const struct drm_display_mode *mode)
+{
+   if (mode->clock > 60)
+   return MODE_CLOCK_HIGH;
+
+   return MODE_OK;
+}
+
 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node)
 {
return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
@@ -220,12 +230,20 @@ static int sun8i_dw_hdmi_remove(struct platform_device 
*pdev)
return 0;
 }
 
+static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = {
+   .mode_valid = sun8i_dw_hdmi_mode_valid_h6,
+};
+
 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
.mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
.set_rate = true,
 };
 
 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
+   {
+   .compatible = "allwinner,sun50i-h6-dw-hdmi",
+   .data = &sun50i_h6_quirks,
+   },
{
.compatible = "allwinner,sun8i-a83t-dw-hdmi",
.data = &sun8i_a83t_quirks,
-- 
2.18.0

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[PATCH 22/27] drm/sun4i: Initialize registers in tcon-top driver

2018-09-02 Thread Jernej Skrabec
It turns out that TCON TOP registers in H6 SoC have non-zero reset
value. This may cause issues if bits are not changed during
configuration.

To prevent that, initialize registers to 0.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c 
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 3040a79f298f..37158548b447 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -167,6 +167,13 @@ static int sun8i_tcon_top_bind(struct device *dev, struct 
device *master,
goto err_assert_reset;
}
 
+   /*
+* At least on H6, some registers have some bits set by default
+* which may cause issues. Clear them here.
+*/
+   writel(0, regs + TCON_TOP_PORT_SEL_REG);
+   writel(0, regs + TCON_TOP_GATE_SRC_REG);
+
/*
 * TCON TOP has two muxes, which select parent clock for each TCON TV
 * channel clock. Parent could be either TCON TV or TVE clock. For now
-- 
2.18.0

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[PATCH 02/27] arm64: allwinner: h6: add system controller device tree node

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

As we have already binding for the H6 system controller, add its node
to the device tree.

Signed-off-by: Icenowy Zheng 
[fixed compatible string]
Signed-off-by: Jernej Skrabec 
---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 23 
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index cfa5fffcf62b..040828d2e2c0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -92,6 +92,29 @@
#size-cells = <1>;
ranges;
 
+   syscon: syscon@300 {
+   compatible = "allwinner,sun50i-h6-system-control",
+"allwinner,sun50i-a64-system-control";
+   reg = <0x0300 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   sram_c: sram@28000 {
+   compatible = "mmio-sram";
+   reg = <0x00028000 0x1e000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x00028000 0x1e000>;
+
+   de2_sram: sram-section@0 {
+   compatible = 
"allwinner,sun50i-h6-sram-c",
+
"allwinner,sun50i-a64-sram-c";
+   reg = <0x 0x1e000>;
+   };
+   };
+   };
+
ccu: clock@3001000 {
compatible = "allwinner,sun50i-h6-ccu";
reg = <0x03001000 0x1000>;
-- 
2.18.0

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[PATCH v3 00/13] remove_conflicting_framebuffers() cleanup

2018-09-02 Thread Michał Mirosław
This series cleans up duplicated code for replacing firmware FB
driver with proper DRI driver and adds handover support to
Tegra driver.

This is a sligtly updated version of a series sent on 24 Nov 2017.

---
v2:
 - rebased on current drm-next
 - dropped staging/sm750fb changes
 - added kernel docs for DRM helpers
v3:
 - move kerneldoc to fbdev, where functions are implemented
 - split kerneldoc for remove_conflicting_framebuffers()
 - propagate return value in remove_conflicting_pci_framebuffers()

---
Michał Mirosław (13):
  fbdev: show fbdev number for debugging
  fbdev: allow apertures == NULL in remove_conflicting_framebuffers()
  fbdev: add kerneldoc do remove_conflicting_framebuffers()
  fbdev: add remove_conflicting_pci_framebuffers()
  drm/amdgpu: use simpler remove_conflicting_pci_framebuffers()
  drm/bochs: use simpler remove_conflicting_pci_framebuffers()
  drm/cirrus: use simpler remove_conflicting_pci_framebuffers()
  drm/mgag200: use simpler remove_conflicting_pci_framebuffers()
  drm/radeon: use simpler remove_conflicting_pci_framebuffers()
  drm/virtio: use simpler remove_conflicting_pci_framebuffers()
  drm/vc4: use simpler remove_conflicting_framebuffers(NULL)
  drm/sun4i: use simpler remove_conflicting_framebuffers(NULL)
  drm/tegra: kick out simplefb

 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c  | 24 +
 drivers/gpu/drm/bochs/bochs_drv.c| 18 +--
 drivers/gpu/drm/cirrus/cirrus_drv.c  | 23 +
 drivers/gpu/drm/mgag200/mgag200_drv.c| 21 +---
 drivers/gpu/drm/mgag200/mgag200_main.c   |  9 
 drivers/gpu/drm/radeon/radeon_drv.c  | 23 +
 drivers/gpu/drm/sun4i/sun4i_drv.c| 18 +--
 drivers/gpu/drm/tegra/drm.c  |  4 ++
 drivers/gpu/drm/vc4/vc4_drv.c| 20 +---
 drivers/gpu/drm/virtio/virtgpu_drm_bus.c | 24 ++---
 drivers/video/fbdev/core/fbmem.c | 63 +++-
 include/drm/drm_fb_helper.h  | 12 +
 include/linux/fb.h   |  2 +
 13 files changed, 89 insertions(+), 172 deletions(-)

-- 
2.18.0

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[PATCH 05/27] clk: sunxi-ng: Use u64 for calculation of NM rate

2018-09-02 Thread Jernej Skrabec
Allwinner H6 SoC has multiplier N range between 1 and 254. Since parent
rate is 24MHz, intermediate result when calculating final rate easily
overflows 32 bit variable.

Because of that, introduce function for calculating clock rate which
uses 64 bit variable for intermediate result.

Signed-off-by: Jernej Skrabec 
---
 drivers/clk/sunxi-ng/ccu_nm.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index 6fe3c14f7b2d..424d8635b053 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c
@@ -19,6 +19,17 @@ struct _ccu_nm {
unsigned long   m, min_m, max_m;
 };
 
+static unsigned long ccu_nm_calc_rate(unsigned long parent,
+ unsigned long n, unsigned long m)
+{
+   u64 rate = parent;
+
+   rate *= n;
+   do_div(rate, m);
+
+   return rate;
+}
+
 static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
 struct _ccu_nm *nm)
 {
@@ -28,7 +39,8 @@ static void ccu_nm_find_best(unsigned long parent, unsigned 
long rate,
 
for (_n = nm->min_n; _n <= nm->max_n; _n++) {
for (_m = nm->min_m; _m <= nm->max_m; _m++) {
-   unsigned long tmp_rate = parent * _n  / _m;
+   unsigned long tmp_rate = ccu_nm_calc_rate(parent,
+ _n, _m);
 
if (tmp_rate > rate)
continue;
@@ -100,7 +112,7 @@ static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm))
rate = ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n);
else
-   rate = parent_rate * n / m;
+   rate = ccu_nm_calc_rate(parent_rate, n, m);
 
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nm->fixed_post_div;
@@ -149,7 +161,7 @@ static long ccu_nm_round_rate(struct clk_hw *hw, unsigned 
long rate,
_nm.max_m = nm->m.max ?: 1 << nm->m.width;
 
ccu_nm_find_best(*parent_rate, rate, &_nm);
-   rate = *parent_rate * _nm.n / _nm.m;
+   rate = ccu_nm_calc_rate(*parent_rate, _nm.n, _nm.m);
 
if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
rate /= nm->fixed_post_div;
-- 
2.18.0

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[PATCH v3 11/13] drm/vc4: use simpler remove_conflicting_framebuffers(NULL)

2018-09-02 Thread Michał Mirosław
Use remove_conflicting_framebuffers(NULL) instead of open-coding it.

Signed-off-by: Michał Mirosław 
Acked-by: Eric Anholt 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/vc4/vc4_drv.c | 20 +---
 1 file changed, 1 insertion(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 94b99c90425a..96bb90325995 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -246,24 +246,6 @@ static void vc4_match_add_drivers(struct device *dev,
}
 }
 
-static void vc4_kick_out_firmware_fb(void)
-{
-   struct apertures_struct *ap;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return;
-
-   /* Since VC4 is a UMA device, the simplefb node may have been
-* located anywhere in memory.
-*/
-   ap->ranges[0].base = 0;
-   ap->ranges[0].size = ~0;
-
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "vc4drmfb", false);
-   kfree(ap);
-}
-
 static int vc4_drm_bind(struct device *dev)
 {
struct platform_device *pdev = to_platform_device(dev);
@@ -296,7 +278,7 @@ static int vc4_drm_bind(struct device *dev)
if (ret)
goto gem_destroy;
 
-   vc4_kick_out_firmware_fb();
+   drm_fb_helper_remove_conflicting_framebuffers(NULL, "vc4drmfb", false);
 
ret = drm_dev_register(drm, 0);
if (ret < 0)
-- 
2.18.0

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[PATCH 03/27] dt-bindings: bus: add H6 DE3 bus binding

2018-09-02 Thread Jernej Skrabec
From: Icenowy Zheng 

The Allwinner H6 DE3 bus is similar to the A64 DE2 one.

Add its compatible string with the A64 string as fallback to the
binding.

Some description of the binding is modified to make it more generic.

Signed-off-by: Icenowy Zheng 
---
 Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt 
b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
index 87dfb33fb3be..ac1445b95f41 100644
--- a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
+++ b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
@@ -1,11 +1,14 @@
-Device tree bindings for Allwinner A64 DE2 bus
+Device tree bindings for Allwinner DE2/3 bus
 
 The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C)
-to be claimed for enabling the access.
+to be claimed for enabling the access. The DE3 on Allwinner H6 is at the same
+situation, and the binding also applies.
 
 Required properties:
 
- - compatible: Should contain "allwinner,sun50i-a64-de2"
+ - compatible: Should be one of:
+   - "allwinner,sun50i-a64-de2"
+   - "allwinner,sun50i-a6-de3", 
"allwinner,sun50i-a64-de2"
  - reg:A resource specifier for the register space
  - #address-cells: Must be set to 1
  - #size-cells:Must be set to 1
-- 
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[PATCH v3 07/13] drm/cirrus: use simpler remove_conflicting_pci_framebuffers()

2018-09-02 Thread Michał Mirosław
Signed-off-by: Michał Mirosław 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/cirrus/cirrus_drv.c | 23 +--
 1 file changed, 1 insertion(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c 
b/drivers/gpu/drm/cirrus/cirrus_drv.c
index 69c4e352dd78..85ed8657c862 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.c
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
@@ -42,33 +42,12 @@ static const struct pci_device_id pciidlist[] = {
 };
 
 
-static int cirrus_kick_out_firmware_fb(struct pci_dev *pdev)
-{
-   struct apertures_struct *ap;
-   bool primary = false;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return -ENOMEM;
-
-   ap->ranges[0].base = pci_resource_start(pdev, 0);
-   ap->ranges[0].size = pci_resource_len(pdev, 0);
-
-#ifdef CONFIG_X86
-   primary = pdev->resource[PCI_ROM_RESOURCE].flags & 
IORESOURCE_ROM_SHADOW;
-#endif
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "cirrusdrmfb", 
primary);
-   kfree(ap);
-
-   return 0;
-}
-
 static int cirrus_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
 {
int ret;
 
-   ret = cirrus_kick_out_firmware_fb(pdev);
+   ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, 
"cirrusdrmfb");
if (ret)
return ret;
 
-- 
2.18.0

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[PATCH 15/27] drm/sun4i: Not all DW HDMI controllers has scrambled addresses

2018-09-02 Thread Jernej Skrabec
Currently supported Allwinner SoCs with DW HDMI controller have
scrambled addresses and read lock. However, that is not true in general.
For example, A80 and H6 have normal addresses and normal read access.

Move code for unscrambling addresses and unlocking read access to it's
own function and call it from init function.

Signed-off-by: Jernej Skrabec 
---
 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
index 82502b351aec..ad4ba1cc83b4 100644
--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
+++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
@@ -279,8 +279,21 @@ static const struct dw_hdmi_phy_ops sun8i_hdmi_phy_ops = {
.setup_hpd = &dw_hdmi_phy_setup_hpd,
 };
 
+static void sun8i_hdmi_phy_unlock(struct sun8i_hdmi_phy *phy)
+{
+   /* enable read access to HDMI controller */
+   regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
+SUN8I_HDMI_PHY_READ_EN_MAGIC);
+
+   /* unscramble register offsets */
+   regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
+SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
+}
+
 static void sun8i_hdmi_phy_init_a83t(struct sun8i_hdmi_phy *phy)
 {
+   sun8i_hdmi_phy_unlock(phy);
+
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG,
   SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK,
   SUN8I_HDMI_PHY_DBG_CTRL_PX_LOCK);
@@ -298,6 +311,8 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy 
*phy)
 {
unsigned int val;
 
+   sun8i_hdmi_phy_unlock(phy);
+
regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0);
regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
   SUN8I_HDMI_PHY_ANA_CFG1_ENBI,
@@ -372,14 +387,6 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy 
*phy)
 
 void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy)
 {
-   /* enable read access to HDMI controller */
-   regmap_write(phy->regs, SUN8I_HDMI_PHY_READ_EN_REG,
-SUN8I_HDMI_PHY_READ_EN_MAGIC);
-
-   /* unscramble register offsets */
-   regmap_write(phy->regs, SUN8I_HDMI_PHY_UNSCRAMBLE_REG,
-SUN8I_HDMI_PHY_UNSCRAMBLE_MAGIC);
-
phy->variant->phy_init(phy);
 }
 
-- 
2.18.0

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[PATCH v3 13/13] drm/tegra: kick out simplefb

2018-09-02 Thread Michał Mirosław
Kick out firmware fb when loading Tegra driver.

Signed-off-by: Michał Mirosław 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/tegra/drm.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 7afe2f635f74..b51ec138fed2 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -1203,6 +1203,10 @@ static int host1x_drm_probe(struct host1x_device *dev)
 
dev_set_drvdata(&dev->dev, drm);
 
+   err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", 
false);
+   if (err < 0)
+   goto unref;
+
err = drm_dev_register(drm, 0);
if (err < 0)
goto unref;
-- 
2.18.0

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[PATCH v3 12/13] drm/sun4i: use simpler remove_conflicting_framebuffers(NULL)

2018-09-02 Thread Michał Mirosław
Use remove_conflicting_framebuffers(NULL) instead of duplicating it.

Signed-off-by: Michał Mirosław 
Acked-by: Maxime Ripard 
Acked-by: Daniel Vetter 
---
 drivers/gpu/drm/sun4i/sun4i_drv.c | 18 +-
 1 file changed, 1 insertion(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 50d19605c38f..555b5db8036f 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -60,22 +60,6 @@ static struct drm_driver sun4i_drv_driver = {
/* Frame Buffer Operations */
 };
 
-static void sun4i_remove_framebuffers(void)
-{
-   struct apertures_struct *ap;
-
-   ap = alloc_apertures(1);
-   if (!ap)
-   return;
-
-   /* The framebuffer can be located anywhere in RAM */
-   ap->ranges[0].base = 0;
-   ap->ranges[0].size = ~0;
-
-   drm_fb_helper_remove_conflicting_framebuffers(ap, "sun4i-drm-fb", 
false);
-   kfree(ap);
-}
-
 static int sun4i_drv_bind(struct device *dev)
 {
struct drm_device *drm;
@@ -118,7 +102,7 @@ static int sun4i_drv_bind(struct device *dev)
drm->irq_enabled = true;
 
/* Remove early framebuffers (ie. simplefb) */
-   sun4i_remove_framebuffers();
+   drm_fb_helper_remove_conflicting_framebuffers(NULL, "sun4i-drm-fb", 
false);
 
/* Create our framebuffer */
ret = sun4i_framebuffer_init(drm);
-- 
2.18.0

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[PATCH 27/27] arm64: dts: sun50i: h6: Enable HDMI output on Pine H64 board

2018-09-02 Thread Jernej Skrabec
Pine H64 board has HDMI type A connector.

Signed-off-by: Jernej Skrabec 
---
 .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 25 +++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 48daec7f78ba..36db21314996 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -21,6 +21,17 @@
stdout-path = "serial0:115200n8";
};
 
+   connector {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_in: endpoint {
+   remote-endpoint = <&hdmi_out_con>;
+   };
+   };
+   };
+
leds {
compatible = "gpio-leds";
 
@@ -41,6 +52,20 @@
};
 };
 
+&de {
+   status = "okay";
+};
+
+&hdmi {
+   status = "okay";
+};
+
+&hdmi_out {
+   hdmi_out_con: endpoint {
+   remote-endpoint = <&hdmi_con_in>;
+   };
+};
+
 &mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
-- 
2.18.0

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[Bug 107784] [AMD tahiti XT] displayport broken

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107784

Bug ID: 107784
   Summary: [AMD tahiti XT] displayport broken
   Product: DRI
   Version: DRI git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: blocker
  Priority: highest
 Component: DRM/AMDgpu
  Assignee: dri-devel@lists.freedesktop.org
  Reporter: sylvain.bertr...@gmail.com

linux 4.19-rc1+ branch: amd-staging-drm-next
commit:d0a96214993c5dad9c2a54b888209f0f5cafd060

amdgpu is unable to program my displayport monitor anymore (was working in
4.18-rc1+)

see the error messages in the kernel log

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[Bug 107784] [AMD tahiti XT] displayport broken

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107784

--- Comment #1 from Sylvain BERTRAND  ---
Created attachment 141416
  --> https://bugs.freedesktop.org/attachment.cgi?id=141416&action=edit
kernel log

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[PATCH v2 1/2] drm: Add library for shmem backed GEM objects

2018-09-02 Thread Noralf Trønnes
This adds a library for shmem backed GEM objects with the necessary
drm_driver callbacks.

Signed-off-by: Noralf Trønnes 
---

Changes since version 1:
- Fix missing argument in docs (kbuild test robot)
- Fix: sparse: expression using sizeof(void) (kbuild test robot)
- Rebasing gave a new checkpatch warning, so I changed to bitfields:
  CHECK: Avoid using bool structure members because of possible alignment 
issues - see: https://lkml.org/lkml/2017/11/21/384
  #834: FILE: include/drm/drm_gem_shmem_helper.h:84:
  +   bool pages_mark_dirty_on_put;
  #841: FILE: include/drm/drm_gem_shmem_helper.h:91:
  +   bool pages_mark_accessed_on_put;

 Documentation/gpu/drm-kms-helpers.rst  |  12 +
 drivers/gpu/drm/Kconfig|   6 +
 drivers/gpu/drm/Makefile   |   1 +
 drivers/gpu/drm/drm_gem_shmem_helper.c | 676 +
 include/drm/drm_gem_shmem_helper.h | 198 ++
 5 files changed, 893 insertions(+)
 create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c
 create mode 100644 include/drm/drm_gem_shmem_helper.h

diff --git a/Documentation/gpu/drm-kms-helpers.rst 
b/Documentation/gpu/drm-kms-helpers.rst
index f9cfcdcdf024..bc24b1b5216a 100644
--- a/Documentation/gpu/drm-kms-helpers.rst
+++ b/Documentation/gpu/drm-kms-helpers.rst
@@ -326,3 +326,15 @@ Legacy CRTC/Modeset Helper Functions Reference
 
 .. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c
:export:
+
+SHMEM GEM Helper Reference
+==
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+   :doc: overview
+
+.. kernel-doc:: include/drm/drm_gem_shmem_helper.h
+   :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+   :export:
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index cb88528e7b10..db588ae44bcc 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -157,6 +157,12 @@ config DRM_KMS_CMA_HELPER
help
  Choose this if you need the KMS CMA helper functions
 
+config DRM_GEM_SHMEM_HELPER
+   bool
+   depends on DRM
+   help
+ Choose this if you need the GEM shmem helper functions
+
 config DRM_VM
bool
depends on DRM && MMU
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index a6771cef85e2..c6798590799f 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -24,6 +24,7 @@ drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
 drm-$(CONFIG_DRM_VM) += drm_vm.o
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
 drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
+drm-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_gem_shmem_helper.o
 drm-$(CONFIG_PCI) += ati_pcigart.o
 drm-$(CONFIG_DRM_PANEL) += drm_panel.o
 drm-$(CONFIG_OF) += drm_of.o
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c 
b/drivers/gpu/drm/drm_gem_shmem_helper.c
new file mode 100644
index ..53181bb0e1cf
--- /dev/null
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -0,0 +1,676 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2018 Noralf Trønnes
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: overview
+ *
+ * This library provides helpers for GEM objects backed by shmem buffers
+ * allocated using anonymous pageable memory.
+ */
+
+/**
+ * drm_gem_shmem_create - Allocate an object with the given size
+ * @dev: DRM device
+ * @size: Size of the object to allocate
+ *
+ * This function creates a shmem GEM object. The default cache mode is
+ * DRM_GEM_SHMEM_BO_CACHED. The &drm_driver->gem_create_object callback can be
+ * used override this.
+ *
+ * Returns:
+ * A struct drm_gem_shmem_object * on success or an ERR_PTR()-encoded negative
+ * error code on failure.
+ */
+struct drm_gem_shmem_object *drm_gem_shmem_create(struct drm_device *dev, 
size_t size)
+{
+   struct drm_gem_shmem_object *shmem;
+   struct drm_gem_object *obj;
+   int ret;
+
+   size = PAGE_ALIGN(size);
+
+   if (dev->driver->gem_create_object)
+   obj = dev->driver->gem_create_object(dev, size);
+   else
+   obj = kzalloc(sizeof(*shmem), GFP_KERNEL);
+   if (!obj)
+   return ERR_PTR(-ENOMEM);
+
+   shmem = to_drm_gem_shmem_obj(obj);
+
+   if (!dev->driver->gem_create_object)
+   shmem->cache_mode = DRM_GEM_SHMEM_BO_CACHED;
+
+   ret = drm_gem_object_init(dev, obj, size);
+   if (ret)
+   goto err_free;
+
+   ret = drm_gem_create_mmap_offset(obj);
+   if (ret)
+   goto err_release;
+
+   mutex_init(&shmem->pages_lock);
+   mutex_init(&shmem->vmap_lock);
+
+   return shmem;
+
+err_release:
+   drm_gem_object_release(obj);
+err_free:
+   kfree(shmem);
+
+   return ERR_PTR(ret);
+}
+EXPORT_SYMBOL_GPL(drm_gem_shmem_create);
+
+/**
+ * drm_gem_shmem_free_object - Free resources associated with a shmem GEM 
object
+ * @obj: GEM object to free
+ *
+ * This function clean

[PATCH v2 2/2] drm/tinydrm: Switch from CMA to shmem buffers

2018-09-02 Thread Noralf Trønnes
This move makes tinydrm useful for more drivers. tinydrm doesn't need
continuous memory, but at the time it was convenient to use the CMA
library. The spi core can do dma on is_vmalloc() addresses making this
possible.

Cc: David Lechner 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/tinydrm/Kconfig|  2 +-
 drivers/gpu/drm/tinydrm/core/tinydrm-core.c| 91 +++---
 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c |  5 ++
 drivers/gpu/drm/tinydrm/ili9225.c  | 14 ++--
 drivers/gpu/drm/tinydrm/ili9341.c  |  6 +-
 drivers/gpu/drm/tinydrm/mi0283qt.c |  6 +-
 drivers/gpu/drm/tinydrm/mipi-dbi.c | 38 ---
 drivers/gpu/drm/tinydrm/repaper.c  | 24 +++
 drivers/gpu/drm/tinydrm/st7586.c   | 15 +++--
 drivers/gpu/drm/tinydrm/st7735r.c  |  6 +-
 include/drm/tinydrm/tinydrm.h  | 36 +++---
 11 files changed, 89 insertions(+), 154 deletions(-)

diff --git a/drivers/gpu/drm/tinydrm/Kconfig b/drivers/gpu/drm/tinydrm/Kconfig
index 16f4b5c91f1b..aa0cabba5ace 100644
--- a/drivers/gpu/drm/tinydrm/Kconfig
+++ b/drivers/gpu/drm/tinydrm/Kconfig
@@ -2,7 +2,7 @@ menuconfig DRM_TINYDRM
tristate "Support for simple displays"
depends on DRM
select DRM_KMS_HELPER
-   select DRM_KMS_CMA_HELPER
+   select DRM_GEM_SHMEM_HELPER
help
  Choose this option if you have a tinydrm supported display.
  If M is selected the module will be called tinydrm.
diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-core.c 
b/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
index 255341ee4eb9..efd83367aae2 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -23,7 +24,7 @@
  *
  * It is based on &drm_simple_display_pipe coupled with a &drm_connector which
  * has only one fixed &drm_display_mode. The framebuffers are backed by the
- * cma helper and have support for framebuffer flushing (dirty).
+ * shmem buffers and have support for framebuffer flushing (dirty).
  * fbdev support is also included.
  *
  */
@@ -37,84 +38,38 @@
  */
 
 /**
- * tinydrm_gem_cma_prime_import_sg_table - Produce a CMA GEM object from
- * another driver's scatter/gather table of pinned pages
- * @drm: DRM device to import into
- * @attach: DMA-BUF attachment
- * @sgt: Scatter/gather table of pinned pages
+ * tinydrm_fb_destroy - Destroy framebuffer
+ * @fb: Framebuffer
  *
- * This function imports a scatter/gather table exported via DMA-BUF by
- * another driver using drm_gem_cma_prime_import_sg_table(). It sets the
- * kernel virtual address on the CMA object. Drivers should use this as their
- * &drm_driver->gem_prime_import_sg_table callback if they need the virtual
- * address. tinydrm_gem_cma_free_object() should be used in combination with
- * this function.
- *
- * Returns:
- * A pointer to a newly created GEM object or an ERR_PTR-encoded negative
- * error code on failure.
+ * This function unmaps the virtual address on the backing buffer and destroys 
the framebuffer.
+ * Drivers should use this as their &drm_framebuffer_funcs->destroy callback.
  */
-struct drm_gem_object *
-tinydrm_gem_cma_prime_import_sg_table(struct drm_device *drm,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt)
+void tinydrm_fb_destroy(struct drm_framebuffer *fb)
 {
-   struct drm_gem_cma_object *cma_obj;
-   struct drm_gem_object *obj;
-   void *vaddr;
-
-   vaddr = dma_buf_vmap(attach->dmabuf);
-   if (!vaddr) {
-   DRM_ERROR("Failed to vmap PRIME buffer\n");
-   return ERR_PTR(-ENOMEM);
-   }
-
-   obj = drm_gem_cma_prime_import_sg_table(drm, attach, sgt);
-   if (IS_ERR(obj)) {
-   dma_buf_vunmap(attach->dmabuf, vaddr);
-   return obj;
-   }
-
-   cma_obj = to_drm_gem_cma_obj(obj);
-   cma_obj->vaddr = vaddr;
-
-   return obj;
+   drm_gem_shmem_vunmap(to_drm_gem_shmem_obj(fb->obj[0]));
+   drm_gem_fb_destroy(fb);
 }
-EXPORT_SYMBOL(tinydrm_gem_cma_prime_import_sg_table);
-
-/**
- * tinydrm_gem_cma_free_object - Free resources associated with a CMA GEM
- *   object
- * @gem_obj: GEM object to free
- *
- * This function frees the backing memory of the CMA GEM object, cleans up the
- * GEM object state and frees the memory used to store the object itself using
- * drm_gem_cma_free_object(). It also handles PRIME buffers which has the 
kernel
- * virtual address set by tinydrm_gem_cma_prime_import_sg_table(). Drivers
- * can use this as their &drm_driver->gem_free_object_unlocked callback.
- */
-void tinydrm_gem_cma_free_object(struct drm_gem_object *gem_obj)
-{
-   if (gem_obj->import_attach) {
-   struct drm_gem_cma_o

[PATCH v2 0/2] drm: Add shmem GEM library

2018-09-02 Thread Noralf Trønnes
This patchset adds a library for shmem backed GEM objects and makes use
of it in tinydrm.

When I made tinydrm I used the CMA helper because it was very easy to
use. July last year I learned that this limits which drivers to PRIME
import from, since CMA requires continuous memory. tinydrm drivers don't
require that. So I set out to change that looking first at shmem, but
that wasn't working since shmem didn't work with fbdev deferred I/O.
Then I did a vmalloc buffer attempt which worked with deferred I/O, but
maybe wouldn't be of so much use as a library for other drivers to use.
As my work to split out stuff from the CMA helper for shared use came to
an end, I had a generic fbdev emulation that uses a shadow buffer for
deferred I/O.
This means that I can now use shmem buffers after all.

I have looked at the other drivers that use drm_gem_get_pages() and
several supports different cache modes so I've done that even though
tinydrm only uses the cached one.

tinydrm can both use vmalloc and shmem buffers, it doesn't matter as far
as I can see. So the question is what will benefit the rest of DRM the
most.

Note:
Sparse has this complaint, but the problem is in kvmalloc_array():
include/linux/mm.h:592:13: error: undefined identifier '__builtin_mul_overflow'

Noralf.

Changes since version 1:
- Fix missing argument in docs (kbuild test robot)
- Fix: sparse: expression using sizeof(void) (kbuild test robot)
- Rebasing gave a new checkpatch warning, so I changed to bitfields:
  CHECK: Avoid using bool structure members because of possible alignment 
issues - see: https://lkml.org/lkml/2017/11/21/384
  #834: FILE: include/drm/drm_gem_shmem_helper.h:84:
  +   bool pages_mark_dirty_on_put;
  #841: FILE: include/drm/drm_gem_shmem_helper.h:91:
  +   bool pages_mark_accessed_on_put;

Noralf Trønnes (2):
  drm: Add library for shmem backed GEM objects
  drm/tinydrm: Switch from CMA to shmem buffers

 Documentation/gpu/drm-kms-helpers.rst  |  12 +
 drivers/gpu/drm/Kconfig|   6 +
 drivers/gpu/drm/Makefile   |   1 +
 drivers/gpu/drm/drm_gem_shmem_helper.c | 676 +
 drivers/gpu/drm/tinydrm/Kconfig|   2 +-
 drivers/gpu/drm/tinydrm/core/tinydrm-core.c|  91 +---
 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c |   5 +
 drivers/gpu/drm/tinydrm/ili9225.c  |  14 +-
 drivers/gpu/drm/tinydrm/ili9341.c  |   6 +-
 drivers/gpu/drm/tinydrm/mi0283qt.c |   6 +-
 drivers/gpu/drm/tinydrm/mipi-dbi.c |  38 +-
 drivers/gpu/drm/tinydrm/repaper.c  |  24 +-
 drivers/gpu/drm/tinydrm/st7586.c   |  15 +-
 drivers/gpu/drm/tinydrm/st7735r.c  |   6 +-
 include/drm/drm_gem_shmem_helper.h | 198 
 include/drm/tinydrm/tinydrm.h  |  36 +-
 16 files changed, 982 insertions(+), 154 deletions(-)
 create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c
 create mode 100644 include/drm/drm_gem_shmem_helper.h

-- 
2.15.1

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Re: [PATCH v2 1/2] drm: Add library for shmem backed GEM objects

2018-09-02 Thread Sam Ravnborg
Hi Noralf.

Only nitpicks, I have not the background
to review the actual implmentation.
So no tags from me to put on the commit.

Sam

> +/**
> + * drm_gem_shmem_create - Allocate an object with the given size
> + * @dev: DRM device
> + * @size: Size of the object to allocate
> + *
> + * This function creates a shmem GEM object. The default cache mode is
> + * DRM_GEM_SHMEM_BO_CACHED. The &drm_driver->gem_create_object callback can 
> be
> + * used override this.
used to override this.
 ^^

> + *
> + * Returns:
> + * A struct drm_gem_shmem_object * on success or an ERR_PTR()-encoded 
> negative
> + * error code on failure.
> + */
> +struct drm_gem_shmem_object *drm_gem_shmem_create(struct drm_device *dev, 
> size_t size)
> +{
> + struct drm_gem_shmem_object *shmem;
> + struct drm_gem_object *obj;
> + int ret;
> +
> + size = PAGE_ALIGN(size);
> +
> + if (dev->driver->gem_create_object)
> + obj = dev->driver->gem_create_object(dev, size);
> + else
> + obj = kzalloc(sizeof(*shmem), GFP_KERNEL);
> + if (!obj)
> + return ERR_PTR(-ENOMEM);
> +
> + shmem = to_drm_gem_shmem_obj(obj);
> +
> + if (!dev->driver->gem_create_object)
> + shmem->cache_mode = DRM_GEM_SHMEM_BO_CACHED;
> +
> + ret = drm_gem_object_init(dev, obj, size);
> + if (ret)
> + goto err_free;
Some users of drm_gem_object_init() calls drm_gem_object_put_unlocked(obj)
when there is an error. Others call kfree() liek in this case.

> +
> + ret = drm_gem_create_mmap_offset(obj);
> + if (ret)
> + goto err_release;
> +
> + mutex_init(&shmem->pages_lock);
> + mutex_init(&shmem->vmap_lock);
> +
> + return shmem;
> +
> +err_release:
> + drm_gem_object_release(obj);
> +err_free:
> + kfree(shmem);
> +
> + return ERR_PTR(ret);
> +}
> +EXPORT_SYMBOL_GPL(drm_gem_shmem_create);
> +
> +
> +static int drm_gem_shmem_get_pages_locked(struct drm_gem_shmem_object *shmem)
> +{
> + struct drm_gem_object *obj = &shmem->base;
> + struct page **pages;
> +
> + if (shmem->pages_use_count++ > 0)
> + return 0;
> +
> + pages = drm_gem_get_pages(obj);
> + if (IS_ERR(pages)) {
> + DRM_DEBUG_KMS("Failed to get pages (%ld)\n", PTR_ERR(pages));
> + shmem->pages_use_count = 0;
> + return PTR_ERR(pages);
> + }
> +
> + shmem->pages = pages;
> +
> + return 0;
> +}
> +
> +/*
> + * drm_gem_shmem_get_pages - Allocate backing pages for a shmem GEM object
> + * @shmem: shmem GEM object
> + *
> + * This function makes sure that backing pages exists for the shmem GEM 
> object
> + * and increases the use count.
> + *
> + * Returns:
> + * 0 on success or a negative error code on failure.
> + */
> +int drm_gem_shmem_get_pages(struct drm_gem_shmem_object *shmem)
> +{
> + int ret;
> +
> + ret = mutex_lock_interruptible(&shmem->pages_lock);
> + if (ret)
> + return ret;
> + ret = drm_gem_shmem_get_pages_locked(shmem);
> + mutex_unlock(&shmem->pages_lock);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(drm_gem_shmem_get_pages);
> +

The functions is named *_unlocked, but called with a lock held.
Inconsistent?

> +static void drm_gem_shmem_put_pages_unlocked(struct drm_gem_shmem_object 
> *shmem)
> +{
> + struct drm_gem_object *obj = &shmem->base;
> +
> + if (WARN_ON_ONCE(!shmem->pages_use_count))
> + return;
> +
> + if (--shmem->pages_use_count > 0)
> + return;
> +
> + drm_gem_put_pages(obj, shmem->pages,
> +   shmem->pages_mark_dirty_on_put,
> +   shmem->pages_mark_accessed_on_put);
> + shmem->pages = NULL;
> +}
> +
> +/*
> + * drm_gem_shmem_put_pages - Decrease use count on the backing pages for a 
> shmem GEM object
> + * @shmem: shmem GEM object
> + *
> + * This function decreases the use count and puts the backing pages when use 
> drops to zero.
> + */
> +void drm_gem_shmem_put_pages(struct drm_gem_shmem_object *shmem)
> +{
> + mutex_lock(&shmem->pages_lock);
> + drm_gem_shmem_put_pages_unlocked(shmem);
> + mutex_unlock(&shmem->pages_lock);
> +}
> +EXPORT_SYMBOL(drm_gem_shmem_put_pages);
> +
> +static int drm_gem_shmem_vmap_locked(struct drm_gem_shmem_object *shmem)
> +{
> + struct drm_gem_object *obj = &shmem->base;
> + int ret;
> +
> + if (shmem->vmap_use_count++ > 0)
> + return 0;
> +
> + ret = drm_gem_shmem_get_pages(shmem);
> + if (ret)
> + goto err_zero_use;
> +
> + if (obj->import_attach) {
> + shmem->vaddr = dma_buf_vmap(obj->import_attach->dmabuf);
> + } else {
> + pgprot_t prot;
> +
> + switch (shmem->cache_mode) {
> + case DRM_GEM_SHMEM_BO_UNKNOWN:
No printout to help the coder that did not set this?

> + ret = -EINVAL;
> + goto err_put_pages;
> +
> + case DRM_GEM_SHMEM_BO_WR

[Bug 107213] [amdgpu/DisplayPort] KDE Wayland session is segfaulting right after login

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107213

--- Comment #5 from george  ---
Hello, found this bug via web search. I am experiencing the *exact* same bug.
I'm running Fedora 28 with MATE desktop, so I'm confident this is not a KDE
problem.

My error message:
[39911.150851] [drm:generic_reg_wait [amdgpu]] *ERROR* REG_WAIT timeout 10us *
3000 tries - dce110_stream_encoder_dp_blank line:956
[39911.150927] WARNING: CPU: 5 PID: 1452 at
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:195
generic_reg_wait+0xe7/0x160 [amdgpu]

Mobo: Supermicro X9SRL
CPU: intel Xeon E5 2680 v2
GPU: MSI Radeon RX 480 4GB with latest polaris10 bin file
Kernel: 4.17.19
Mesa: 18.0.5

This must be an AMDGPU driver bug. I'm also connected via DisplayPort and I
frequently get the monitor sleeping to powersave mode during boot. If I switch
to TTY1 and do a Ctrl-Alt-Del reboot, it usually boots up normally after the
blind "three finger salute" reboot.

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[Bug 107213] [amdgpu/DisplayPort] KDE Wayland session is segfaulting right after login

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107213

--- Comment #6 from george  ---
Created attachment 141418
  --> https://bugs.freedesktop.org/attachment.cgi?id=141418&action=edit
amdgpu crash in dmesg output

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[Bug 107213] [amdgpu/DisplayPort] KDE Wayland session is segfaulting right after login

2018-09-02 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=107213

--- Comment #7 from Shmerl  ---
I'm waiting for kernel 4.19.x to see if it improves anything, since it
apparently had some fix that looks related:

https://lists.freedesktop.org/archives/dri-devel/2018-August/185123.html

> drm/amd/display: Fix Vega10 black screen after mode change

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Re: [PATCH 5/5] [RFC]drm: add syncobj timeline support v3

2018-09-02 Thread Chunming Zhou



在 2018/8/30 19:32, Christian König 写道:

[SNIP]



+
+struct drm_syncobj_wait_pt {
+    struct drm_syncobj_stub_fence base;
+    u64    value;
+    struct rb_node   node;
+};
+struct drm_syncobj_signal_pt {
+    struct drm_syncobj_stub_fence base;
+    struct dma_fence *signal_fence;
+    struct dma_fence *pre_pt_base;
+    struct dma_fence_cb signal_cb;
+    struct dma_fence_cb pre_pt_cb;
+    struct drm_syncobj *syncobj;
+    u64    value;
+    struct list_head list;
+};


What are those two structures good for

They are used to record wait ops points and signal ops points.
For timeline, they are connected by timeline value, works like:
    a. signal pt increase timeline value to signal_pt value when 
signal_pt is signaled. signal_pt is depending on previous pt fence 
and itself signal fence from signal ops.

    b. wait pt tree checks if timeline value over itself value.

For normal, works like:
    a. signal pt increase 1 for syncobj_timeline->signal_point 
every time when signal ops is performed.
    b. when wait ops is comming, wait pt will fetch above last 
signal pt value as its wait point. wait pt will be only signaled by 
equal point value signal_pt.




and why is the stub fence their base?
Good question, I tried to kzalloc for them as well when I debug 
them, I encountered a problem:
I lookup/find wait_pt or signal_pt successfully, but when I tried 
to use them, they are freed sometimes, and results in NULL point.
and generally, when lookup them, we often need their stub fence as 
well, and in the meantime,  their lifecycle are same.

Above reason, I make stub fence as their base.


That sounds like you only did this because you messed up the lifecycle.

Additional to that I don't think you correctly considered the 
lifecycle of the waits and the sync object itself. E.g. blocking in 
drm_syncobj_timeline_fini() until all waits are done is not a good 
idea.


What you should do instead is to create a fence_array object with 
all the fence we need to wait for when a wait point is requested.
Yeah, this is our initial discussion result, but when I tried to do 
that, I found that cannot meet the advance signal requirement:
    a. We need to consider the wait and signal pt value are not 
one-to-one match, it's difficult to find dependent point, at least, 
there is some overhead.


As far as I can see that is independent of using a fence array here. 
See you can either use a ring buffer or an rb-tree, but when you want 
to wait for a specific point we need to condense the not yet signaled 
fences into an array.
again, need to find the range of where the specific point in, we should 
close to timeline semantics, I also refered the sw_sync.c timeline, 
usally wait_pt is signalled by timeline point. And I agree we can 
implement it with several methods, but I don't think there are basical 
differences.




    b. because we allowed "wait-before-signal", if 
"wait-before-signal" happens, there isn't signal fence which can be 
used to create fence array.


Well, again we DON'T support wait-before-signal here. I will certainly 
NAK any implementation which tries to do this until we haven't figured 
out all the resource management constraints and I still don't see how 
we can do this.
yes, we don't support real wait-before-signal in patch now, just a fake 
wait-before-signal, which still wait on CS submission until signal 
operation coming through wait_event, which is the conclusion we 
disscussed before.





So timeline value is good to resolve that.



Otherwise somebody can easily construct a situation where timeline 
sync obj A waits on B and B waits on A.
Same situation also can happens with fence-array, we only can see 
this is a programming bug with incorrect use.


No, fence-array is initialized only once with a static list of fences. 
This way it is impossible to add the fence-array to itself for example.


E.g. you can't build circle dependencies with that.
we already wait for signal operation event, so never build circle 
dependencies with that. The theory is same.






Better use rbtree_postorder_for_each_entry_safe() for this.
From the comments, seems we cannot use it here, we need erase node 
here.

Comments:
 * Note, however, that it cannot handle other modifications that 
re-order the
 * rbtree it is iterating over. This includes calling rb_erase() on 
@pos, as

 * rb_erase() may rebalance the tree, causing us to miss some nodes.
 */


Yeah, but your current implementation has the same problem :)

You need to use something like "while (node = rb_first(...))" 
instead if you want to destruct the whole tree.

OK, got it, I will change it in v4.

Thanks,
David Zhou


Regards,
Christian.



Thanks,
David Zhou


Regards,
Christian.


+    wait_pt = rb_entry(node, struct drm_syncobj_wait_pt, node);
+    node = rb_next(node);
I already get the next node before erasing this node, so the "for 
(..." sentence is equal with "while (...)"


That still doesn't work. The problem is the because 

[Bug 200531] amdgpu: *ERROR* REG_WAIT timeout when a display is put to sleep

2018-09-02 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=200531

Aleksandr Mezin (mezin.alexan...@gmail.com) changed:

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|OBSOLETE|---

--- Comment #7 from Aleksandr Mezin (mezin.alexan...@gmail.com) ---
No, I was wrong, 4.18.5, the problem is still there. When monitors turn off, I
still see REG_WAIT timeout in dmesg. And after that they never turn on again -
"no signal".

[ 1032.102931] [drm:generic_reg_wait [amdgpu]] *ERROR* REG_WAIT timeout 10us *
3500 tries - dce_mi_free_dmif line:636
[ 1032.102974] WARNING: CPU: 0 PID: 1333 at
drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c:254
generic_reg_wait+0xe7/0x160 [amdgpu]
[ 1032.102975] Modules linked in: fuse mousedev input_leds hid_logitech_hidpp
uvcvideo hid_logitech_dj hid_apple hid_generic videobuf2_vmalloc
videobuf2_memops videobuf2_v4l2 snd_usb_audio videobuf2_common videodev
snd_usbmidi_lib joydev usbhid snd_rawmidi xpad media snd_seq_device hid
ff_memless usblp msr vmnet(O) nct6775 hwmon_vid amdkfd amd_iommu_v2
snd_hda_codec_realtek amdgpu snd_hda_codec_generic snd_hda_codec_hdmi
intel_rapl nfit x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel kvm
chash gpu_sched i2c_algo_bit ttm irqbypass crct10dif_pclmul crc32_pclmul
ghash_clmulni_intel pcbc drm_kms_helper aesni_intel eeepc_wmi aes_x86_64
asus_wmi crypto_simd cryptd glue_helper snd_hda_intel sparse_keymap
intel_cstate rfkill iTCO_wdt drm iTCO_vendor_support led_class mxm_wmi wmi_bmof
intel_wmi_thunderbolt
[ 1032.103001]  snd_hda_codec agpgart snd_hda_core syscopyarea sysfillrect
sysimgblt fb_sys_fops snd_hwdep intel_uncore snd_pcm intel_rapl_perf snd_timer
mei_me pcspkr e1000e snd mei ioatdma soundcore i2c_i801 evdev dca mac_hid
rtc_cmos pcc_cpufreq wmi vmmon(O) vmw_vmci vboxnetflt(O) vboxnetadp(O)
vboxpci(O) vboxdrv(O) sg crypto_user ip_tables x_tables xfs libcrc32c
crc32c_generic sd_mod ahci xhci_pci libahci xhci_hcd libata crc32c_intel
usbcore scsi_mod usb_common
[ 1032.103022] CPU: 0 PID: 1333 Comm: Xorg Tainted: G   O 
4.18.5-arch1-1-ARCH #1
[ 1032.103023] Hardware name: System manufacturer System Product Name/PRIME
X299-A, BIOS 1503 08/03/2018
[ 1032.103046] RIP: 0010:generic_reg_wait+0xe7/0x160 [amdgpu]
[ 1032.103046] Code: 44 24 58 8b 54 24 48 89 de 44 89 4c 24 08 48 8b 4c 24 50
48 c7 c7 18 cf eb c0 e8 04 80 dc ff 83 7d 20 01 44 8b 4c 24 08 74 02 <0f> 0b 48
83 c4 10 44 89 c8 5b 5d 41 5c 41 5d 41 5e 41 5f c3 41 0f
[ 1032.103062] RSP: 0018:a75704f838c0 EFLAGS: 00010297
[ 1032.103063] RAX:  RBX: 000a RCX:
0001
[ 1032.103063] RDX:  RSI: 9d8811ce RDI:

[ 1032.103064] RBP: 9a763ae4f000 R08: 9ceddf10 R09:
0002
[ 1032.103064] R10: 0004 R11: 9e004f2d R12:
0dad
[ 1032.103065] R13: 35b0 R14: 0010 R15:
0001
[ 1032.103066] FS:  7f416ce48e00() GS:9a763f60()
knlGS:
[ 1032.103066] CS:  0010 DS:  ES:  CR0: 80050033
[ 1032.103067] CR2: 7fa639a53288 CR3: 00083afae003 CR4:
003606f0
[ 1032.103068] DR0:  DR1:  DR2:

[ 1032.103068] DR3:  DR6: fffe0ff0 DR7:
0400
[ 1032.103068] Call Trace:
[ 1032.103096]  dce_mi_free_dmif+0xf8/0x180 [amdgpu]
[ 1032.103121]  dce110_reset_hw_ctx_wrap+0x141/0x1b0 [amdgpu]
[ 1032.103145]  dce110_apply_ctx_to_hw+0x52/0xa30 [amdgpu]
[ 1032.103167]  ? hwmgr_handle_task+0x6b/0xc0 [amdgpu]
[ 1032.103190]  ? pp_dpm_dispatch_tasks+0x41/0x60 [amdgpu]
[ 1032.103205]  ? amdgpu_pm_compute_clocks.part.8+0xb7/0x530 [amdgpu]
[ 1032.103229]  dc_commit_state+0x2d1/0x550 [amdgpu]
[ 1032.103253]  amdgpu_dm_atomic_commit_tail+0x37c/0xd70 [amdgpu]
[ 1032.103257]  ? preempt_count_add+0x68/0xa0
[ 1032.103259]  ? _raw_spin_lock_irq+0x1a/0x40
[ 1032.103260]  ? _raw_spin_unlock_irq+0x1d/0x30
[ 1032.103261]  ? wait_for_common+0x113/0x190
[ 1032.103262]  ? _raw_spin_unlock_irq+0x1d/0x30
[ 1032.103263]  ? wait_for_common+0x113/0x190
[ 1032.103269]  commit_tail+0x3d/0x70 [drm_kms_helper]
[ 1032.103272]  drm_atomic_helper_commit+0x103/0x110 [drm_kms_helper]
[ 1032.103282]  drm_mode_atomic_ioctl+0x7b1/0x920 [drm]
[ 1032.103285]  ? import_iovec+0x37/0xd0
[ 1032.103291]  ? drm_atomic_set_property+0x510/0x510 [drm]
[ 1032.103295]  drm_ioctl_kernel+0xa7/0xf0 [drm]
[ 1032.103300]  drm_ioctl+0x30e/0x3c0 [drm]
[ 1032.103306]  ? drm_atomic_set_property+0x510/0x510 [drm]
[ 1032.103308]  ? __set_current_blocked+0x3d/0x60
[ 1032.103309]  ? _raw_spin_unlock_irq+0x1d/0x30
[ 1032.103322]  amdgpu_drm_ioctl+0x49/0x80 [amdgpu]
[ 1032.103324]  do_vfs_ioctl+0xa4/0x620
[ 1032.103327]  ? syscall_slow_exit_work+0x19b/0x1b0
[ 1032.103328]  ksys_ioctl+0x60/0x90
[ 1032.103329]  __x64_