Re: [PATCH v2 10/18] drm/sun4i: mixer: Read id from DT
On Wed, Jul 11, 2018 at 3:10 PM, Jernej Škrabec wrote:
> Dne sreda, 11. julij 2018 ob 05:11:56 CEST je Chen-Yu Tsai napisal(a):
>> On Wed, Jul 11, 2018 at 4:35 AM, Jernej Skrabec
> wrote:
>> > Currently, TCON supports 2 ways to match TCON with engine (mixer in this
>> > case). Old way is to just traverse of graph backwards and compare node
>> > pointer. New way is to match TCON and engine by their respective ids.
>> > All SoCs with DE2 enabled till now used the old way, which means mixer
>> > id was never used and thus never implemented.
>> >
>> > However, for R40, only the new way will be used. To prepare for that,
>> > implement mixer id fetching from DT.
>> >
>> > Signed-off-by: Jernej Skrabec
>> > ---
>> >
>> > drivers/gpu/drm/sun4i/sun8i_mixer.c | 40 +++--
>> > 1 file changed, 38 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index aa81b9838ae8..4bd4d8ccb34f
>> > 100644
>> > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> > @@ -22,6 +22,7 @@
>> >
>> > #include
>> > #include
>> > #include
>> >
>> > +#include
>> >
>> > #include
>> >
>> > #include "sun4i_drv.h"
>> >
>> > @@ -322,6 +323,42 @@ static struct regmap_config sun8i_mixer_regmap_config
>> > = {>
>> > .max_register = 0xbfffc, /* guessed */
>> >
>> > };
>> >
>> > +static int sun8i_mixer_of_get_id(struct device_node *node)
>> > +{
>> > + struct device_node *port, *ep;
>> > + int ret = -EINVAL;
>> > +
>> > + /* output is port 1 */
>> > + port = of_graph_get_port_by_id(node, 1);
>> > + if (!port)
>> > + return -EINVAL;
>> > +
>> > + /* try to find downstream endpoint */
>> > + for_each_available_child_of_node(port, ep) {
>> > + struct device_node *remote;
>> > + u32 reg;
>> > +
>> > + remote = of_graph_get_remote_endpoint(ep);
>> > + if (!remote)
>> > + continue;
>> > +
>> > + ret = of_property_read_u32(remote, "reg", ®);
>> > + if (!ret) {
>> > + of_node_put(remote);
>> > + of_node_put(ep);
>> > + of_node_put(port);
>> > +
>> > + return reg;
>> > + }
>> > +
>> > + of_node_put(remote);
>> > + }
>> > +
>> > + of_node_put(port);
>> > +
>> > + return ret;
>> > +}
>> > +
>>
>> The above looks good.
>>
>> > static int sun8i_mixer_bind(struct device *dev, struct device *master,
>> >
>> > void *data)
>> >
>> > {
>> >
>> > @@ -353,8 +390,7 @@ static int sun8i_mixer_bind(struct device *dev, struct
>> > device *master,>
>> > dev_set_drvdata(dev, mixer);
>> > mixer->engine.ops = &sun8i_engine_ops;
>> > mixer->engine.node = dev->of_node;
>> >
>> > - /* The ID of the mixer currently doesn't matter */
>> > - mixer->engine.id = -1;
>> > + mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);
>>
>> Should you be handling error codes?
>
> Sadly, no. Other supported DE2 SoC miss reg property in DT and it would break
> them. Additionally, V3s has only one mixer and thus technically doesn't
> violate binding with omiting mixer id.
>
> Anyway, it was -1 all the time before and not really used, so having negative
> value doesn't change anything for other SoCs. If this fails and it's needed,
> it would stop at mixer <-> TCON matching stage anyway.
>
> I guess I should add comment for that.
Yes. Please. We'll leave the rest till later. I plan to fix up the missing
IDs for all the other SoCs anyway.
ChenYu
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[PATCH 17/17] drm/armada: add plane colorspace properties
Use the DRM standard plane properties for specifying the YUV
colour encoding parameter. Our colour range is fixed at limited
range.
Since we are transitioning to atomic modeset, we need to explicitly
add handling of these properties to our atomic_set_property() method,
but once the transition is complete, these will be removed.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index 7f75df4f8390..bc1b5b860141 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -23,6 +23,7 @@
#define DEFAULT_BRIGHTNESS 0
#define DEFAULT_CONTRAST 0x4000
#define DEFAULT_SATURATION 0x4000
+#define DEFAULT_ENCODING DRM_COLOR_YCBCR_BT601
struct armada_ovl_plane {
struct armada_plane base;
@@ -59,6 +60,19 @@ static inline u32 armada_spu_saturation(struct
drm_plane_state *state)
return drm_to_overlay_state(state)->saturation << 16;
}
+static inline u32 armada_csc(struct drm_plane_state *state)
+{
+ /*
+* The CFG_CSC_RGB_* settings control the output of the colour space
+* converter, setting the range of output values it produces. Since
+* we will be blending with the full-range graphics, we need to
+* produce full-range RGB output from the conversion.
+*/
+ return CFG_CSC_RGB_COMPUTER |
+ (state->color_encoding == DRM_COLOR_YCBCR_BT709 ?
+ CFG_CSC_YUV_CCIR709 : CFG_CSC_YUV_CCIR601);
+}
+
/* === Plane support === */
static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
struct armada_plane_work *work)
@@ -189,6 +203,11 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
armada_reg_queue_set(regs, idx, val, LCD_SPU_SATURATION);
if (!old_state->visible && state->visible)
armada_reg_queue_set(regs, idx, 0x2000, LCD_SPU_CBSH_HUE);
+ val = armada_csc(state);
+ if ((!old_state->visible && state->visible) ||
+ armada_csc(old_state) != val)
+ armada_reg_queue_mod(regs, idx, val, CFG_CSC_MASK,
+LCD_SPU_IOPAD_CONTROL);
val = drm_to_overlay_state(state)->colorkey_yr;
if ((!old_state->visible && state->visible) ||
drm_to_overlay_state(old_state)->colorkey_yr != val)
@@ -399,6 +418,8 @@ static void armada_overlay_reset(struct drm_plane *plane)
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (state) {
state->base.plane = plane;
+ state->base.color_encoding = DEFAULT_ENCODING;
+ state->base.color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;
state->base.rotation = DRM_MODE_ROTATE_0;
state->colorkey_yr = 0xfefefe00;
state->colorkey_ug = 0x01010100;
@@ -489,6 +510,9 @@ static int armada_overlay_set_property(struct drm_plane
*plane,
drm_to_overlay_state(state)->contrast = val;
} else if (property == priv->saturation_prop) {
drm_to_overlay_state(state)->saturation = val;
+ } else if (property == plane->color_encoding_property) {
+ /* transitional only */
+ state->color_encoding = val;
} else {
return -EINVAL;
}
@@ -685,5 +709,12 @@ int armada_overlay_plane_create(struct drm_device *dev,
unsigned long crtcs)
drm_object_attach_property(mobj, priv->saturation_prop,
DEFAULT_SATURATION);
- return 0;
+ ret = drm_plane_create_color_properties(&dplane->base.base,
+ BIT(DRM_COLOR_YCBCR_BT601) |
+ BIT(DRM_COLOR_YCBCR_BT709),
+
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
+ DEFAULT_ENCODING,
+ DRM_COLOR_YCBCR_LIMITED_RANGE);
+
+ return ret;
}
--
2.7.4
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[PATCH 03/20] drm/armada: provide pitches from armada_drm_plane_calc_addrs()
Provide the framebuffer pitches from armada_drm_plane_calc_addrs() as
well as the base addresses for each plane. Since this is now about
more than just addresses, rename to armada_drm_plane_calc().
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 8
drivers/gpu/drm/armada/armada_plane.c | 22 ++
drivers/gpu/drm/armada/armada_plane.h | 3 ++-
3 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index e8c3bcc09d5c..f36f6fb919e7 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -130,10 +130,10 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
old_state->src.y1 != state->src.y1 ||
old_state->fb != state->fb) {
const struct drm_format_info *format;
- u16 src_x;
+ u16 src_x, pitches[3];
u32 addrs[3];
- armada_drm_plane_calc_addrs(state, addrs);
+ armada_drm_plane_calc(state, addrs, pitches);
armada_reg_queue_set(regs, idx, addrs[0],
LCD_SPU_DMA_START_ADDR_Y0);
@@ -148,9 +148,9 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
armada_reg_queue_set(regs, idx, addrs[2],
LCD_SPU_DMA_START_ADDR_V1);
- val = state->fb->pitches[0] << 16 | state->fb->pitches[0];
+ val = pitches[0] << 16 | pitches[0];
armada_reg_queue_set(regs, idx, val, LCD_SPU_DMA_PITCH_YC);
- val = state->fb->pitches[1] << 16 | state->fb->pitches[2];
+ val = pitches[1] << 16 | pitches[2];
armada_reg_queue_set(regs, idx, val, LCD_SPU_DMA_PITCH_UV);
cfg = CFG_DMA_FMT(drm_fb_to_armada_fb(state->fb)->fmt) |
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index c426c92c79d9..3c9414c56aca 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -35,7 +35,8 @@ static const uint32_t armada_primary_formats[] = {
DRM_FORMAT_BGR565,
};
-void armada_drm_plane_calc_addrs(struct drm_plane_state *state, u32 addrs[3])
+void armada_drm_plane_calc(struct drm_plane_state *state, u32 addrs[3],
+ u16 pitches[3])
{
struct drm_framebuffer *fb = state->fb;
const struct drm_format_info *format = fb->format;
@@ -53,37 +54,42 @@ void armada_drm_plane_calc_addrs(struct drm_plane_state
*state, u32 addrs[3])
addrs[0] = addr + fb->offsets[0] + y * fb->pitches[0] +
x * format->cpp[0];
+ pitches[0] = fb->pitches[0];
y /= format->vsub;
x /= format->hsub;
- for (i = 1; i < num_planes; i++)
+ for (i = 1; i < num_planes; i++) {
addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
x * format->cpp[i];
- for (; i < 3; i++)
+ pitches[i] = fb->pitches[i];
+ }
+ for (; i < 3; i++) {
addrs[i] = 0;
+ pitches[i] = 0;
+ }
}
static unsigned armada_drm_crtc_calc_fb(struct drm_plane_state *state,
struct armada_regs *regs, bool interlaced)
{
- unsigned pitch = state->fb->pitches[0];
+ u16 pitches[3];
u32 addrs[3], addr_odd, addr_even;
unsigned i = 0;
- armada_drm_plane_calc_addrs(state, addrs);
+ armada_drm_plane_calc(state, addrs, pitches);
addr_odd = addr_even = addrs[0];
if (interlaced) {
- addr_even += pitch;
- pitch *= 2;
+ addr_even += pitches[0];
+ pitches[0] *= 2;
}
/* write offset, base, and pitch */
armada_reg_queue_set(regs, i, addr_odd, LCD_CFG_GRA_START_ADDR0);
armada_reg_queue_set(regs, i, addr_even, LCD_CFG_GRA_START_ADDR1);
- armada_reg_queue_mod(regs, i, pitch, 0x, LCD_CFG_GRA_PITCH);
+ armada_reg_queue_mod(regs, i, pitches[0], 0x, LCD_CFG_GRA_PITCH);
return i;
}
diff --git a/drivers/gpu/drm/armada/armada_plane.h
b/drivers/gpu/drm/armada/armada_plane.h
index 999a0bd3e512..98280beaaa44 100644
--- a/drivers/gpu/drm/armada/armada_plane.h
+++ b/drivers/gpu/drm/armada/armada_plane.h
@@ -1,7 +1,8 @@
#ifndef ARMADA_PLANE_H
#define ARMADA_PLANE_H
-void armada_drm_plane_calc_addrs(struct drm_plane_state *state, u32 addrs[3]);
+void armada_drm_plane_calc(struct drm_plane_state *state, u32 addrs[3],
+ u16 pitches[3]);
int armada_drm_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state);
void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
--
2.7.4
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Re: [PATCH v2 1/1] drm/panel: Add support for Olimex LCD-OLinuXino panel
On 07/10/2018 01:32 PM, Thierry Reding wrote:
On Mon, Jun 25, 2018 at 09:44:35AM +0300, Stefan Mavrodiev wrote:
This patch adds Olimex Ltd. LCD-OLinuXino bridge panel driver. The
panel is used with different LCDs (currently from 480x272 to 1280x800).
Small EEPROM chip is used for identification, which holds some
factory data and timing requirements.
Signed-off-by: Stefan Mavrodiev
---
Changes for v2:
- Changed lcd_olinuxino_funcs to static const
.../display/panel/olimex,lcd-olinuxino.txt | 42 +++
MAINTAINERS| 6 +
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c | 360 +
5 files changed, 419 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
create mode 100644 drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c
diff --git
a/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
new file mode 100644
index 000..a89f9c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
@@ -0,0 +1,42 @@
+Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
+
+This device can be used as bridge between a host controller and LCD panels.
+Currently supported LCDs are:
+ - LCD-OLinuXino-4.3TS
+ - LCD-OLinuXino-5
+ - LCD-OLinuXino-7
+ - LCD-OLinuXino-10
+
+The panel itself contains:
+ - AT24C16C EEPROM holding panel identification and timing requirements
+ - AR1021 resistive touch screen controller (optional)
+ - FT5x6 capacitive touch screnn controller (optional)
+ - GT911/GT928 capacitive touch screen controller (optional)
+
+The above chips share same I2C bus. The EEPROM is factory preprogrammed with
+device information (id, serial, etc.) and timing requirements.
+
+Touchscreen bingings can be found in these files:
+ - input/touchscreen/goodix.txt
+ - input/touchscreen/edt-ft5x06.txt
+ - input/touchscreen/ar1021.txt
+
+Required properties:
+ - compatible: should be "olimex,lcd-olinuxino"
+ - reg: address of the configuration EEPROM, should be <0x50>
+ - power-supply: phandle of the regulator that provides the supply voltage
+
+Optional properties:
+ - enable-gpios: GPIO pin to enable or disable the panel
+ - backlight: phandle of the backlight device attacked to the panel
+
+Example:
+&i2c2 {
+ panel@50 {
+ compatible = "olimex,lcd-olinuxino";
+ reg = <0x50>;
+ power-supply = <®_vcc5v0>;
+ enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
+ backlight = <&backlight>;
+ };
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 624c3fd..30343f1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4557,6 +4557,12 @@ S: Supported
F:drivers/gpu/drm/nouveau/
F:include/uapi/drm/nouveau_drm.h
+DRM DRIVER FOR OLIMEX LCD-OLINUXINO PANELS
+M: Stefan Mavrodiev
+S: Maintained
+F: drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c
+F: Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt
+
DRM DRIVER FOR PERVASIVE DISPLAYS REPAPER PANELS
M:Noralf Trønnes
S:Maintained
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 25682ff..0292994 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -81,6 +81,16 @@ config DRM_PANEL_LG_LG4573
Say Y here if you want to enable support for LG4573 RGB panel.
To compile this driver as a module, choose M here.
+config DRM_PANEL_OLIMEX_LCD_OLINUXINO
+ tristate "Olimex LCD-OLinuXino panel"
+ depends on OF
+ depends on I2C
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Olimex Ltd.
+ LCD-OLinuXino panel. The panel is used with different sizes LCDs,
+ from 480x272 to 1280x800, and 24 bit per pixel.
+
config DRM_PANEL_ORISETECH_OTM8009A
tristate "Orise Technology otm8009a 480x800 dsi 2dl panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f26efc1..185027f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
+obj-$(CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO) += panel-olimex-lcd-olinuxino.o
obj-$(CONFIG_DRM_PANEL_ORISETECH_OTM8009A) += panel-orisetech-otm8009a.o
obj-$(CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00) +=
panel-panasonic-vvx10f034n00.o
obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) +=
panel-raspberrypi-touchscre
[PATCH v2 00/18] Allwinner R40 HDMI refactoring
This series fixes several issues found in R40 HDMI patch series after it was applied. Conversation can be found here: http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/586011.html Patches are based on latest linux-next (next-20180710) and are ordered in such way that they don't break R40 HDMI at any time. Because of that I suggest that whole series goes through drm-misc to preserve that order. I also tested those patches on H3 to make sure it doesn't break other platforms. However, it would be nice to test for regressions also on older SoCs (with DE1). Best regards, Jernej Changes from v1: - added Review-by and Acked-by tags - added a patch which reorders mixer includes alphabetically - reworked function which finds mixer id - dropped register initialization in TCON TOP - reworded some commit messages Jernej Skrabec (18): dt-bindings: display: sun4i-drm: Add R40 display engine compatible drm/sun4i: Add R40 display engine compatible ARM: dts: sun8i: r40: Remove fallback display engine compatible drm/sun4i: tcon-top: Cleanup clock handling drm/sun4i: tcon: Release node when traversing of graph dt-bindings: display: sun4i-drm: Add R40 TV TCON description drm/sun4i: DW HDMI: Release nodes if error happens during CRTC search ARM: dts: sun8i: r40: Add mixer ids to TCON TOP drm/sun4i: mixer: Order includes alphabetically drm/sun4i: mixer: Read id from DT drm/sun4i: tcon-top: Add helpers for mux switching drm/sun4i: tcon: Add another way for matching mixers with tcon drm/sun4i: tcon: Add support for R40 TCON ARM: dts: sun8i: r40: Remove fallback compatible for TCON TV ARM: dts: sun8i: r40: Add missing TCON-TOP - TCON connections ARM: dts: sun8i: r40: Disable TCONs by default. drm/sun4i: tcon-top: Remove mux configuration at probe time dt-bindings: display: sun4i-drm: Fix order of DW HDMI PHY compatibles .../bindings/display/sunxi/sun4i-drm.txt | 6 +- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 20 +- arch/arm/boot/dts/sun8i-r40.dtsi | 65 ++- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + drivers/gpu/drm/sun4i/sun4i_tcon.c| 92 - drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 15 +- drivers/gpu/drm/sun4i/sun8i_mixer.c | 42 - drivers/gpu/drm/sun4i/sun8i_tcon_top.c| 178 -- drivers/gpu/drm/sun4i/sun8i_tcon_top.h| 4 + 9 files changed, 278 insertions(+), 145 deletions(-) -- 2.18.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 02/20] drm/armada: pass plane state into armada_drm_plane_calc_addrs()
armada_drm_plane_calc_addrs() gets all its information from the plane
state, so it makes sense to pass the plane state pointer down into this
function, rather than extracting the information in identical ways,
sometimes a couple of layers up.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 6 +++---
drivers/gpu/drm/armada/armada_plane.c | 25 -
drivers/gpu/drm/armada/armada_plane.h | 3 +--
3 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index bc1b5b860141..e8c3bcc09d5c 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -130,11 +130,10 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
old_state->src.y1 != state->src.y1 ||
old_state->fb != state->fb) {
const struct drm_format_info *format;
- u16 src_x = state->src.x1 >> 16;
- u16 src_y = state->src.y1 >> 16;
+ u16 src_x;
u32 addrs[3];
- armada_drm_plane_calc_addrs(addrs, state->fb, src_x, src_y);
+ armada_drm_plane_calc_addrs(state, addrs);
armada_reg_queue_set(regs, idx, addrs[0],
LCD_SPU_DMA_START_ADDR_Y0);
@@ -166,6 +165,7 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
* the UV swap.
*/
format = state->fb->format;
+ src_x = state->src.x1 >> 16;
if (format->num_planes == 1 && src_x & (format->hsub - 1))
cfg ^= CFG_DMA_MOD(CFG_SWAPUV);
cfg_mask = CFG_CBSH_ENA | CFG_DMAFORMAT |
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index 1cb6a605bda9..c426c92c79d9 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -35,14 +35,19 @@ static const uint32_t armada_primary_formats[] = {
DRM_FORMAT_BGR565,
};
-void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
- int x, int y)
+void armada_drm_plane_calc_addrs(struct drm_plane_state *state, u32 addrs[3])
{
+ struct drm_framebuffer *fb = state->fb;
const struct drm_format_info *format = fb->format;
unsigned int num_planes = format->num_planes;
+ unsigned int x = state->src.x1 >> 16;
+ unsigned int y = state->src.y1 >> 16;
u32 addr = drm_fb_obj(fb)->dev_addr;
int i;
+ DRM_DEBUG_KMS("pitch %u x %d y %d bpp %d\n",
+ fb->pitches[0], x, y, format->cpp[0] * 8);
+
if (num_planes > 3)
num_planes = 3;
@@ -59,17 +64,14 @@ void armada_drm_plane_calc_addrs(u32 *addrs, struct
drm_framebuffer *fb,
addrs[i] = 0;
}
-static unsigned armada_drm_crtc_calc_fb(struct drm_framebuffer *fb,
- int x, int y, struct armada_regs *regs, bool interlaced)
+static unsigned armada_drm_crtc_calc_fb(struct drm_plane_state *state,
+ struct armada_regs *regs, bool interlaced)
{
- unsigned pitch = fb->pitches[0];
+ unsigned pitch = state->fb->pitches[0];
u32 addrs[3], addr_odd, addr_even;
unsigned i = 0;
- DRM_DEBUG_DRIVER("pitch %u x %d y %d bpp %d\n",
- pitch, x, y, fb->format->cpp[0] * 8);
-
- armada_drm_plane_calc_addrs(addrs, fb, x, y);
+ armada_drm_plane_calc_addrs(state, addrs);
addr_odd = addr_even = addrs[0];
@@ -175,10 +177,7 @@ static void armada_drm_primary_plane_atomic_update(struct
drm_plane *plane,
if (old_state->src.x1 != state->src.x1 ||
old_state->src.y1 != state->src.y1 ||
old_state->fb != state->fb) {
- idx += armada_drm_crtc_calc_fb(state->fb,
- state->src.x1 >> 16,
- state->src.y1 >> 16,
- regs + idx,
+ idx += armada_drm_crtc_calc_fb(state, regs + idx,
dcrtc->interlaced);
}
if (old_state->fb != state->fb) {
diff --git a/drivers/gpu/drm/armada/armada_plane.h
b/drivers/gpu/drm/armada/armada_plane.h
index 3c8316003907..999a0bd3e512 100644
--- a/drivers/gpu/drm/armada/armada_plane.h
+++ b/drivers/gpu/drm/armada/armada_plane.h
@@ -1,8 +1,7 @@
#ifndef ARMADA_PLANE_H
#define ARMADA_PLANE_H
-void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
- int x, int y);
+void armada_drm_plane_calc_addrs(struct drm_plane_state *state, u32 addrs[3]);
int armada_drm_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state);
void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
--
2.7.4
___
dri-devel m
[PATCH v2 08/18] ARM: dts: sun8i: r40: Add mixer ids to TCON TOP
sun4i-drm DT binding, second paragraph of the first section says:
For all connections between components up to the TCONs in the display
pipeline, when there are multiple components of the same type at the
same depth, the local endpoint ID must be the same as the remote
component's index.
Add mixer ids in R40 DT as mandated by DT binding.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-r40.dtsi | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 2afb079a3776..1dd088d82773 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -576,9 +576,12 @@
#size-cells = <0>;
tcon_top_mixer0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0>;
- tcon_top_mixer0_in_mixer0: endpoint {
+ tcon_top_mixer0_in_mixer0: endpoint@0 {
+ reg = <0>;
remote-endpoint =
<&mixer0_out_tcon_top>;
};
};
@@ -606,9 +609,12 @@
};
tcon_top_mixer1_in: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <2>;
- tcon_top_mixer1_in_mixer1: endpoint {
+ tcon_top_mixer1_in_mixer1: endpoint@1 {
+ reg = <1>;
remote-endpoint =
<&mixer1_out_tcon_top>;
};
};
--
2.18.0
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[PATCH 10/20] drm/armada: unhook dpms state from armada_drm_crtc_update()
Explicitly pass in the desired enable/disable state into
armada_drm_crtc_update() rather than having it use the DPMS state
stored in our crtc structure.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 5d8fdcda27ee..554135062d93 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -94,13 +94,13 @@ armada_drm_crtc_update_regs(struct armada_crtc *dcrtc,
struct armada_regs *regs)
#define dpms_blanked(dpms) ((dpms) != DRM_MODE_DPMS_ON)
-static void armada_drm_crtc_update(struct armada_crtc *dcrtc)
+static void armada_drm_crtc_update(struct armada_crtc *dcrtc, bool enable)
{
uint32_t dumb_ctrl;
dumb_ctrl = dcrtc->cfg_dumb_ctrl;
- if (!dpms_blanked(dcrtc->dpms))
+ if (enable)
dumb_ctrl |= CFG_DUMB_ENA;
/*
@@ -109,8 +109,7 @@ static void armada_drm_crtc_update(struct armada_crtc
*dcrtc)
* force LCD_D[23:0] to output blank color, overriding the GPIO or
* SPI usage. So leave it as-is unless in DUMB24_RGB888_0 mode.
*/
- if (dpms_blanked(dcrtc->dpms) &&
- (dumb_ctrl & DUMB_MASK) == DUMB24_RGB888_0) {
+ if (!enable && (dumb_ctrl & DUMB_MASK) == DUMB24_RGB888_0) {
dumb_ctrl &= ~DUMB_MASK;
dumb_ctrl |= DUMB_BLANK;
}
@@ -256,7 +255,7 @@ static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int
dpms)
else if (dcrtc->variant->enable)
dcrtc->variant->enable(dcrtc, &crtc->hwmode);
dcrtc->dpms = dpms;
- armada_drm_crtc_update(dcrtc);
+ armada_drm_crtc_update(dcrtc, !dpms_blanked(dcrtc->dpms));
if (!dpms_blanked(dpms))
drm_crtc_vblank_on(&dcrtc->crtc);
else if (dcrtc->variant->disable)
@@ -305,7 +304,7 @@ static void armada_drm_crtc_commit(struct drm_crtc *crtc)
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
dcrtc->dpms = DRM_MODE_DPMS_ON;
- armada_drm_crtc_update(dcrtc);
+ armada_drm_crtc_update(dcrtc, true);
drm_crtc_vblank_on(crtc);
armada_drm_crtc_queue_state_event(crtc);
--
2.7.4
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[PATCH 20/20] drm/armada: remove obsolete fb unreferencing kfifo and workqueue
Remove the obsolete fb unreferencing system that is no longer used
since we've transitioned to atomic modeset.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_drm.h | 7 ---
drivers/gpu/drm/armada/armada_drv.c | 35 ---
2 files changed, 42 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_drm.h
b/drivers/gpu/drm/armada/armada_drm.h
index 9658be917ea1..f09083ff15d3 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -55,8 +55,6 @@ extern const struct armada_variant armada510_ops;
struct armada_private {
struct drm_device drm;
- struct work_struct fb_unref_work;
- DECLARE_KFIFO(fb_unref, struct drm_framebuffer *, 8);
struct drm_fb_helper*fbdev;
struct armada_crtc *dcrtc[2];
struct drm_mm linear; /* protected by linear_lock */
@@ -75,11 +73,6 @@ struct armada_private {
#endif
};
-void __armada_drm_queue_unref_work(struct drm_device *,
- struct drm_framebuffer *);
-void armada_drm_queue_unref_work(struct drm_device *,
- struct drm_framebuffer *);
-
int armada_fbdev_init(struct drm_device *);
void armada_fbdev_fini(struct drm_device *);
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index 8e776afe5bd7..7bdd6a1a5f31 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -22,36 +22,6 @@
#include
#include "armada_ioctlP.h"
-static void armada_drm_unref_work(struct work_struct *work)
-{
- struct armada_private *priv =
- container_of(work, struct armada_private, fb_unref_work);
- struct drm_framebuffer *fb;
-
- while (kfifo_get(&priv->fb_unref, &fb))
- drm_framebuffer_put(fb);
-}
-
-/* Must be called with dev->event_lock held */
-void __armada_drm_queue_unref_work(struct drm_device *dev,
- struct drm_framebuffer *fb)
-{
- struct armada_private *priv = dev->dev_private;
-
- WARN_ON(!kfifo_put(&priv->fb_unref, fb));
- schedule_work(&priv->fb_unref_work);
-}
-
-void armada_drm_queue_unref_work(struct drm_device *dev,
- struct drm_framebuffer *fb)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&dev->event_lock, flags);
- __armada_drm_queue_unref_work(dev, fb);
- spin_unlock_irqrestore(&dev->event_lock, flags);
-}
-
static struct drm_ioctl_desc armada_ioctls[] = {
DRM_IOCTL_DEF_DRV(ARMADA_GEM_CREATE, armada_gem_create_ioctl,0),
DRM_IOCTL_DEF_DRV(ARMADA_GEM_MMAP, armada_gem_mmap_ioctl, 0),
@@ -138,9 +108,6 @@ static int armada_drm_bind(struct device *dev)
dev_set_drvdata(dev, &priv->drm);
- INIT_WORK(&priv->fb_unref_work, armada_drm_unref_work);
- INIT_KFIFO(priv->fb_unref);
-
/* Mode setting support */
drm_mode_config_init(&priv->drm);
priv->drm.mode_config.min_width = 320;
@@ -194,7 +161,6 @@ static int armada_drm_bind(struct device *dev)
err_kms:
drm_mode_config_cleanup(&priv->drm);
drm_mm_takedown(&priv->linear);
- flush_work(&priv->fb_unref_work);
drm_dev_put(&priv->drm);
return ret;
}
@@ -213,7 +179,6 @@ static void armada_drm_unbind(struct device *dev)
drm_mode_config_cleanup(&priv->drm);
drm_mm_takedown(&priv->linear);
- flush_work(&priv->fb_unref_work);
drm_dev_put(&priv->drm);
}
--
2.7.4
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[PATCH v2 14/18] ARM: dts: sun8i: r40: Remove fallback compatible for TCON TV
A83T and R40 TCON TV are very similar. However, R40 TCON TV is wired
differently, which makes it incompatible with A83T TCON TV.
Because of that, remove fallback A83T TCON TV compatible.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-r40.dtsi | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 1dd088d82773..6b4fe899 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -666,8 +666,7 @@
};
tcon_tv0: lcd-controller@1c73000 {
- compatible = "allwinner,sun8i-r40-tcon-tv",
-"allwinner,sun8i-a83t-tcon-tv";
+ compatible = "allwinner,sun8i-r40-tcon-tv";
reg = <0x01c73000 0x1000>;
interrupts = ;
clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
@@ -690,8 +689,7 @@
};
tcon_tv1: lcd-controller@1c74000 {
- compatible = "allwinner,sun8i-r40-tcon-tv",
-"allwinner,sun8i-a83t-tcon-tv";
+ compatible = "allwinner,sun8i-r40-tcon-tv";
reg = <0x01c74000 0x1000>;
interrupts = ;
clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top 1>;
--
2.18.0
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[PATCH 03/17] drm/armada: move mode set vblank handling and disable/enable
Move the mode set vblank handling and controller enable/disable to the
prepare() and commit() callbacks. This will be needed when we move to
mode_set_nofb() as we should not enable the controller without the
plane coordinates and location having been properly updated.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 41 ++--
drivers/gpu/drm/armada/armada_crtc.h | 1 +
2 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 205d5dc7ba81..683b2cec3d55 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -399,6 +399,7 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
struct drm_plane *plane;
+ u32 val;
/*
* If we have an overlay plane associated with this CRTC, disable
@@ -411,6 +412,18 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
HZ));
}
+
+ /* Wait for pending flips to complete */
+ armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
+ MAX_SCHEDULE_TIMEOUT);
+
+ drm_crtc_vblank_off(crtc);
+
+ val = dcrtc->dumb_ctrl & ~CFG_DUMB_ENA;
+ if (val != dcrtc->dumb_ctrl) {
+ dcrtc->dumb_ctrl = val;
+ writel_relaxed(val, dcrtc->base + LCD_SPU_DUMB_CTRL);
+ }
}
/* The mode_config.mutex will be held for this call */
@@ -418,10 +431,12 @@ static void armada_drm_crtc_commit(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- if (dcrtc->dpms != DRM_MODE_DPMS_ON) {
- dcrtc->dpms = DRM_MODE_DPMS_ON;
- armada_drm_crtc_update(dcrtc);
- }
+ dcrtc->dpms = DRM_MODE_DPMS_ON;
+ armada_drm_crtc_update(dcrtc);
+ drm_crtc_vblank_on(crtc);
+
+ if (dcrtc->old_modeset_fb)
+ armada_drm_crtc_finish_fb(dcrtc, dcrtc->old_modeset_fb, false);
}
/* The mode_config.mutex will be held for this call */
@@ -623,6 +638,7 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
bool interlaced;
drm_framebuffer_get(crtc->primary->fb);
+ dcrtc->old_modeset_fb = old_fb;
interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
@@ -656,18 +672,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
adj->crtc_vsync_end,
adj->crtc_vtotal, tm, bm);
- /* Wait for pending flips to complete */
- armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
- MAX_SCHEDULE_TIMEOUT);
-
- drm_crtc_vblank_off(crtc);
-
- val = dcrtc->dumb_ctrl & ~CFG_DUMB_ENA;
- if (val != dcrtc->dumb_ctrl) {
- dcrtc->dumb_ctrl = val;
- writel_relaxed(val, dcrtc->base + LCD_SPU_DUMB_CTRL);
- }
-
/*
* If we are blanked, we would have disabled the clock. Re-enable
* it so that compute_clock() does the right thing.
@@ -739,11 +743,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
armada_drm_primary_set(crtc, crtc->primary, x, y);
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
- armada_drm_crtc_update(dcrtc);
-
- drm_crtc_vblank_on(crtc);
- armada_drm_crtc_finish_fb(dcrtc, old_fb, dpms_blanked(dcrtc->dpms));
-
return 0;
}
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 445829b8877a..8edcfd1fa75f 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -93,6 +93,7 @@ struct armada_crtc {
uint8_t csc_rgb_mode;
struct drm_plane*plane;
+ struct drm_framebuffer *old_modeset_fb;
struct armada_gem_object*cursor_obj;
int cursor_x;
--
2.7.4
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Re: [PATCH 16/17] drm/sun4i: tcon-top: Remove mux configuration at probe time
Dne torek, 10. julij 2018 ob 18:09:26 CEST je Chen-Yu Tsai napisal(a):
> On Sat, Jul 7, 2018 at 1:51 AM, Jernej Skrabec
wrote:
> > Now that R40 TCON migrated to runtime mux configuration, old code can be
> > removed.
> >
> > Signed-off-by: Jernej Skrabec
> > ---
> >
> > drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 81 +++---
> > 1 file changed, 7 insertions(+), 74 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index c09b15b64192..78795d6cb174
> > 100644
> > --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > @@ -87,34 +87,6 @@ int sun8i_tcon_top_de_config(struct device *dev, int
> > mixer, int tcon)>
> > }
> > EXPORT_SYMBOL(sun8i_tcon_top_de_config);
> >
> > -static int sun8i_tcon_top_get_connected_ep_id(struct device_node *node,
> > - int port_id)
> > -{
> > - struct device_node *ep, *remote, *port;
> > - struct of_endpoint endpoint;
> > -
> > - port = of_graph_get_port_by_id(node, port_id);
> > - if (!port)
> > - return -ENOENT;
> > -
> > - for_each_available_child_of_node(port, ep) {
> > - remote = of_graph_get_remote_port_parent(ep);
> > - if (!remote)
> > - continue;
> > -
> > - if (of_device_is_available(remote)) {
> > - of_graph_parse_endpoint(ep, &endpoint);
> > -
> > - of_node_put(remote);
> > -
> > - return endpoint.id;
> > - }
> > -
> > - of_node_put(remote);
> > - }
> > -
> > - return -ENOENT;
> > -}
> >
> > static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
> >
> >const char *parent,
> >
> > @@ -149,11 +121,9 @@ static int sun8i_tcon_top_bind(struct device *dev,
> > struct device *master,>
> > struct platform_device *pdev = to_platform_device(dev);
> > struct clk_hw_onecell_data *clk_data;
> > struct sun8i_tcon_top *tcon_top;
> >
> > - bool mixer0_unused = false;
> >
> > struct resource *res;
> > void __iomem *regs;
> >
> > - int ret, i, id;
> > - u32 val;
> > + int ret, i;
> >
> > tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);
> > if (!tcon_top)
> >
> > @@ -198,49 +168,12 @@ static int sun8i_tcon_top_bind(struct device *dev,
> > struct device *master,>
> > goto err_assert_reset;
> >
> > }
> >
> > - val = 0;
> > -
> > - /* check if HDMI mux output is connected */
> > - if (sun8i_tcon_top_get_connected_ep_id(dev->of_node, 5) >= 0) {
> > - /* find HDMI input endpoint id, if it is connected at
> > all*/
> > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 4);
> > - if (id >= 0)
> > - val = FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, id + 1);
> > - else
> > - DRM_DEBUG_DRIVER("TCON TOP HDMI input is not
> > connected\n"); - } else {
> > - DRM_DEBUG_DRIVER("TCON TOP HDMI output is not
> > connected\n"); - }
> > -
> > - writel(val, regs + TCON_TOP_GATE_SRC_REG);
> > -
> > - val = 0;
> > -
> > - /* process mixer0 mux output */
> > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 1);
> > - if (id >= 0) {
> > - val = FIELD_PREP(TCON_TOP_PORT_DE0_MSK, id);
> > - } else {
> > - DRM_DEBUG_DRIVER("TCON TOP mixer0 output is not
> > connected\n"); - mixer0_unused = true;
> > - }
> > -
> > - /* process mixer1 mux output */
> > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 3);
> > - if (id >= 0) {
> > - val |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, id);
> > -
> > - /*
> > -* mixer0 mux has priority over mixer1 mux. We have to
> > -* make sure mixer0 doesn't overtake TCON from mixer1.
> > -*/
> > - if (mixer0_unused && id == 0)
> > - val |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, 1);
> > - } else {
> > - DRM_DEBUG_DRIVER("TCON TOP mixer1 output is not
> > connected\n"); - }
> > -
> > - writel(val, regs + TCON_TOP_PORT_SEL_REG);
> > + /*
> > +* Default register values might have some reserved bits set,
> > which
> > +* prevents TCON TOP from working properly. Set them to 0 here.
> > +*/
> > + writel(0, regs + TCON_TOP_GATE_SRC_REG);
> > + writel(0, regs + TCON_TOP_PORT_SEL_REG);
>
> Would it make sense to just force a reset using the reset control?
I wrote TCON TOP driver for H6 at first. For some reason, some registers had
reserved bits set after reset line was released. TCON TOP
[PATCH 15/20] drm/armada: switch overlay plane to atomic modeset
Switch the overlay plane away from the transitional helpers and legacy
methods, and use atomic helpers instead to implement the legacy
set_plane ioctl methods.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c| 89 -
drivers/gpu/drm/armada/armada_crtc.h| 19
drivers/gpu/drm/armada/armada_overlay.c | 172 ++--
3 files changed, 32 insertions(+), 248 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index a25094bbeb2c..ebcb99316c94 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -117,80 +117,6 @@ static void armada_drm_crtc_update(struct armada_crtc
*dcrtc, bool enable)
dcrtc->base + LCD_SPU_DUMB_CTRL);
}
-static void armada_drm_plane_work_call(struct armada_crtc *dcrtc,
- struct armada_plane_work *work,
- void (*fn)(struct armada_crtc *, struct armada_plane_work *))
-{
- struct armada_plane *dplane = drm_to_armada_plane(work->plane);
- struct drm_pending_vblank_event *event;
- struct drm_framebuffer *fb;
-
- if (fn)
- fn(dcrtc, work);
- drm_crtc_vblank_put(&dcrtc->crtc);
-
- event = work->event;
- fb = work->old_fb;
- if (event || fb) {
- struct drm_device *dev = dcrtc->crtc.dev;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->event_lock, flags);
- if (event)
- drm_crtc_send_vblank_event(&dcrtc->crtc, event);
- if (fb)
- __armada_drm_queue_unref_work(dev, fb);
- spin_unlock_irqrestore(&dev->event_lock, flags);
- }
-
- if (work->need_kfree)
- kfree(work);
-
- wake_up(&dplane->frame_wait);
-}
-
-static void armada_drm_plane_work_run(struct armada_crtc *dcrtc,
- struct drm_plane *plane)
-{
- struct armada_plane *dplane = drm_to_armada_plane(plane);
- struct armada_plane_work *work = xchg(&dplane->work, NULL);
-
- /* Handle any pending frame work. */
- if (work)
- armada_drm_plane_work_call(dcrtc, work, work->fn);
-}
-
-int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
- struct armada_plane_work *work)
-{
- struct armada_plane *plane = drm_to_armada_plane(work->plane);
- int ret;
-
- ret = drm_crtc_vblank_get(&dcrtc->crtc);
- if (ret)
- return ret;
-
- ret = cmpxchg(&plane->work, NULL, work) ? -EBUSY : 0;
- if (ret)
- drm_crtc_vblank_put(&dcrtc->crtc);
-
- return ret;
-}
-
-int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout)
-{
- return wait_event_timeout(plane->frame_wait, !plane->work, timeout);
-}
-
-void armada_drm_plane_work_cancel(struct armada_crtc *dcrtc,
- struct armada_plane *dplane)
-{
- struct armada_plane_work *work = xchg(&dplane->work, NULL);
-
- if (work)
- armada_drm_plane_work_call(dcrtc, work, work->cancel);
-}
-
static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
@@ -247,7 +173,6 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc,
u32 stat)
{
struct drm_pending_vblank_event *event;
void __iomem *base = dcrtc->base;
- struct drm_plane *ovl_plane;
if (stat & DMA_FF_UNDERFLOW)
DRM_ERROR("video underflow on crtc %u\n", dcrtc->num);
@@ -257,10 +182,6 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc,
u32 stat)
if (stat & VSYNC_IRQ)
drm_crtc_handle_vblank(&dcrtc->crtc);
- ovl_plane = dcrtc->plane;
- if (ovl_plane)
- armada_drm_plane_work_run(dcrtc, ovl_plane);
-
spin_lock(&dcrtc->irq_lock);
if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) {
int i = stat & GRA_FRAME_IRQ0 ? 0 : 1;
@@ -462,19 +383,9 @@ static void armada_drm_crtc_atomic_disable(struct drm_crtc
*crtc,
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
struct drm_pending_vblank_event *event;
- struct drm_plane *plane;
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
- /*
-* For transition only - we must wait for completion of our
-* untransitioned paths before changing anything.
-*/
- plane = dcrtc->plane;
- if (plane)
- WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
- HZ));
-
drm_crtc_vblank_off(crtc);
armada_drm_crtc_update(dcrtc, false);
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index afc9266bc1e2..5b607d45f469 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -35,29 +35,12 @@ struct armada_crtc;
Re: [PATCH v2 1/1] drm/panel: Add support for Olimex LCD-OLinuXino panel
On 07/10/2018 04:27 PM, Greg Kroah-Hartman wrote:
On Tue, Jul 10, 2018 at 04:08:54PM +0300, Stefan Mavrodiev wrote:
On 07/10/2018 01:32 PM, Thierry Reding wrote:
+MODULE_AUTHOR("Stefan Mavrodiev ");
+MODULE_DESCRIPTION("LCD-OLinuXino driver");
+MODULE_LICENSE("GPL v2");
This seems to contradict the GPL-2.0+ in the SPDX header.
Can you elaborate on this?
Please read module.h for what this string means.
Oh My bad. License should be "GPL", not "GPL v2".
thanks,
greg k-h
Regards,
Stefan Mavrodiev
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[PATCH v2 09/18] drm/sun4i: mixer: Order includes alphabetically
Includes are not alphabetically ordered. Reorder them. Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index ee8febb25903..aa81b9838ae8 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -21,8 +21,8 @@ #include #include -#include #include +#include #include "sun4i_drv.h" #include "sun8i_mixer.h" -- 2.18.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/3] drm: mxsfb: Change driver.name to mxsfb-drm
On 07/10/2018 11:06 AM, Stefan Agner wrote: > On 16.06.2018 01:32, Marek Vasut wrote: >> On 06/16/2018 12:42 AM, Leonard Crestez wrote: >>> On Fri, 2018-06-15 at 23:36 +0200, Marek Vasut wrote: On 06/15/2018 10:58 PM, Leonard Crestez wrote: > On Fri, 2018-06-15 at 16:47 -0300, Fabio Estevam wrote: >> On Fri, Jun 15, 2018 at 4:43 PM, Leonard Crestez >> wrote: >>> >>> The FBDEV driver uses the same name and both can't be registered at the >>> same time. Fix this by renaming the drm driver to mxsfb-drm >> >> Stefan sent the same patch a few days ago: > > In that thread there is a proposal for removing the old fbdev/mxsfb > driver entirely. > > That would break old DTBs, isn't this generally considered bad? Also, > are we sure the removal of fbdev/mxsfb wouldn't lose any features? > > What my series does is make both drivers work with the same kernel > image and turns the choice into a board-level dtb decision. Supporting > everything at once seems desirable to me and it allows for a very > smooth upgrade path. Having two drivers in the kernel with different set of bugs is always bad. > The old driver could be removed later, after all users are converted. Both drivers were in for long enough already. And let's be realistic, how many MX23/MX28 users of old DTs with new kernels are there who cannot update the DT as well ? >>> >>> Grepping for "display =" in arch/arm/boot/dts/imx* I see that old >>> bindings are also used by 3rd-party boards for imx6/7: >>> * imx6sx-nitrogen6sx >>> * imx6ul-geam >>> * imx6ul-isiot >>> * imx6ul-opos6uldev >>> * imx6ul-pico-hobbit >>> * imx6ul-tx6ul >>> * imx7d-nitrogen7 >> >> Er, yes, a handful of boards which could be updated :) >> >>> Converting everything might be quite a bit of work, and explicitly >>> supporting old bindings is also work. >> >> Does adding support for old bindings justify the effort invested ? I >> doubt so, it only adds more code to maintain. >> >>> It is very confusing that there is a whole set of displays for imx6/7 >>> which are supported by upstream but only with a non-default config. >>> While it is extremely common in the embedded field to have custom >>> configs the default one in the kernel should try to "just work". >>> >>> Couldn't this patch series be considered a bugfix? It was also >>> surprisingly small. >> >> I think it's just a workaround which allows you to postpone the real >> fix, and I don't like that. > > This is one of the situation where states quo is kinda the worst > situation. > > Currently imx_v6_v7_defconfig and mxs_defconfig actually still uses > CONFIG_FB_MXS. > > I understand that you'd rather prefer to move forward. I suggest we do > it in steps. > > In 4.19: > > - Change DRM driver.name to mxsfb-drm so we avoid conflicts for now But this will break mesa if it depends on mxsfb name for ie. etnaviv binding. > - Remove CONFIG_FB_MXS from imx_v6_v7_defconfig/mxs_defconfig now, and > only enable CONFIG_DRM_MXSFB=y > - Add (deprecated) to CONFIG_FB_MXS > > In 4.19/4.20: > - Fix the above device trees > > In 4.20/4.21: > - Remove FB_MXS > > Does that sound reasonable? If yes, I can send the patch set to do step > 1. Can you fix the DTs for 4.19 too ? -- Best regards, Marek Vasut ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm: gma500: Changed __attribute__((packed)) to __packed
Signed-off-by: Eames Trinh
---
drivers/gpu/drm/gma500/intel_bios.h | 38 ++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/gma500/intel_bios.h
b/drivers/gpu/drm/gma500/intel_bios.h
index 978ae4b25e82..e0ccf1d19a4d 100644
--- a/drivers/gpu/drm/gma500/intel_bios.h
+++ b/drivers/gpu/drm/gma500/intel_bios.h
@@ -34,7 +34,7 @@ struct vbt_header {
u8 reserved0;
u32 bdb_offset; /**< from beginning of VBT */
u32 aim_offset[4]; /**< from beginning of VBT */
-} __attribute__((packed));
+} __packed;
struct bdb_header {
@@ -61,7 +61,7 @@ struct vbios_data {
u8 rsvd4; /* popup memory size */
u8 resize_pci_bios;
u8 rsvd5; /* is crt already on ddc2 */
-} __attribute__((packed));
+} __packed;
/*
* There are several types of BIOS data blocks (BDBs), each block has
@@ -133,7 +133,7 @@ struct bdb_general_features {
u8 dp_ssc_enb:1;/* PCH attached eDP supports SSC */
u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
u8 rsvd11:3; /* finish byte */
-} __attribute__((packed));
+} __packed;
/* pre-915 */
#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
@@ -213,7 +213,7 @@ struct child_device_config {
u8 dvo2_wiring;
u16 extended_type;
u8 dvo_function;
-} __attribute__((packed));
+} __packed;
struct bdb_general_definitions {
@@ -256,7 +256,7 @@ struct bdb_lvds_options {
u8 lvds_edid:1;
u8 rsvd2:1;
u8 rsvd4;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_backlight {
u8 type:2;
@@ -268,7 +268,7 @@ struct bdb_lvds_backlight {
u8 i2caddr;
u8 brightnesscmd;
/*FIXME: more...*/
-} __attribute__((packed));
+} __packed;
/* LFP pointer table contains entries to the struct below */
struct bdb_lvds_lfp_data_ptr {
@@ -278,12 +278,12 @@ struct bdb_lvds_lfp_data_ptr {
u8 dvo_table_size;
u16 panel_pnp_id_offset;
u8 pnp_table_size;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data_ptrs {
u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
struct bdb_lvds_lfp_data_ptr ptr[16];
-} __attribute__((packed));
+} __packed;
/* LFP data has 3 blocks per entry */
struct lvds_fp_timing {
@@ -300,7 +300,7 @@ struct lvds_fp_timing {
u32 pfit_reg;
u32 pfit_reg_val;
u16 terminator;
-} __attribute__((packed));
+} __packed;
struct lvds_dvo_timing {
u16 clock; /**< In 10khz */
@@ -328,7 +328,7 @@ struct lvds_dvo_timing {
u8 vsync_positive:1;
u8 hsync_positive:1;
u8 rsvd2:1;
-} __attribute__((packed));
+} __packed;
struct lvds_pnp_id {
u16 mfg_name;
@@ -336,17 +336,17 @@ struct lvds_pnp_id {
u32 serial;
u8 mfg_week;
u8 mfg_year;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data_entry {
struct lvds_fp_timing fp_timing;
struct lvds_dvo_timing dvo_timing;
struct lvds_pnp_id pnp_id;
-} __attribute__((packed));
+} __packed;
struct bdb_lvds_lfp_data {
struct bdb_lvds_lfp_data_entry data[16];
-} __attribute__((packed));
+} __packed;
struct aimdb_header {
char signature[16];
@@ -354,12 +354,12 @@ struct aimdb_header {
u16 aimdb_version;
u16 aimdb_header_size;
u16 aimdb_size;
-} __attribute__((packed));
+} __packed;
struct aimdb_block {
u8 aimdb_id;
u16 aimdb_size;
-} __attribute__((packed));
+} __packed;
struct vch_panel_data {
u16 fp_timing_offset;
@@ -370,12 +370,12 @@ struct vch_panel_data {
u8 text_fitting_size;
u16 graphics_fitting_offset;
u8 graphics_fitting_size;
-} __attribute__((packed));
+} __packed;
struct vch_bdb_22 {
struct aimdb_block aimdb_block;
struct vch_panel_data panels[16];
-} __attribute__((packed));
+} __packed;
struct bdb_sdvo_lvds_options {
u8 panel_backlight;
@@ -391,7 +391,7 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_2;
u8 panel_misc_bits_3;
u8 panel_misc_bits_4;
-} __attribute__((packed));
+} __packed;
#define BDB_DRIVER_FEATURE_NO_LVDS 0
#define BDB_DRIVER_FEATURE_INT_LVDS1
@@ -436,7 +436,7 @@ struct bdb_driver_features {
u8 hdmi_termination;
u8 custom_vbt_version;
-} __attribute__((packed));
+} __packed;
#define EDP_18BPP 0
#define EDP_24BPP 1
--
2.11.0
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[PATCH 14/17] drm/armada: move CBSH properties into overlay plane state
Move the contrast, brightness, and saturation properties to the overlay
plane state structure, and call our overlay commit function to update
the hardware via the planes atomic_update() method.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.h| 2 +-
drivers/gpu/drm/armada/armada_overlay.c | 163 ++--
2 files changed, 136 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 73ddd7d61eb4..c27435a8776a 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -42,7 +42,7 @@ struct armada_plane_work {
struct drm_plane *plane;
struct drm_framebuffer *old_fb;
struct drm_pending_vblank_event *event;
- struct armada_regs regs[14];
+ struct armada_regs regs[24];
};
struct armada_plane {
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index 40868e485ae8..ec3ce28f162e 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -20,6 +20,10 @@
#include "armada_plane.h"
#include "armada_trace.h"
+#define DEFAULT_BRIGHTNESS 0
+#define DEFAULT_CONTRAST 0x4000
+#define DEFAULT_SATURATION 0x4000
+
struct armada_ovl_plane_properties {
uint32_t colorkey_yr;
uint32_t colorkey_ug;
@@ -27,9 +31,6 @@ struct armada_ovl_plane_properties {
#define K2R(val) (((val) >> 0) & 0xff)
#define K2G(val) (((val) >> 8) & 0xff)
#define K2B(val) (((val) >> 16) & 0xff)
- int16_t brightness;
- uint16_t contrast;
- uint16_t saturation;
uint32_t colorkey_mode;
uint32_t colorkey_enable;
};
@@ -44,6 +45,26 @@ struct armada_ovl_plane {
#define drm_to_armada_ovl_plane(p) \
container_of(p, struct armada_ovl_plane, base.base)
+struct armada_overlay_state {
+ struct drm_plane_state base;
+ s16 brightness;
+ u16 contrast;
+ u16 saturation;
+};
+#define drm_to_overlay_state(s) \
+ container_of(s, struct armada_overlay_state, base)
+
+static inline u32 armada_spu_contrast(struct drm_plane_state *state)
+{
+ return drm_to_overlay_state(state)->brightness << 16 |
+ drm_to_overlay_state(state)->contrast;
+}
+
+static inline u32 armada_spu_saturation(struct drm_plane_state *state)
+{
+ /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
+ return drm_to_overlay_state(state)->saturation << 16;
+}
static void
armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
@@ -53,13 +74,6 @@ armada_ovl_update_attr(struct armada_ovl_plane_properties
*prop,
writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
- writel_relaxed(prop->brightness << 16 | prop->contrast,
- dcrtc->base + LCD_SPU_CONTRAST);
- /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
- writel_relaxed(prop->saturation << 16,
- dcrtc->base + LCD_SPU_SATURATION);
- writel_relaxed(0x2000, dcrtc->base + LCD_SPU_CBSH_HUE);
-
spin_lock_irq(&dcrtc->irq_lock);
armada_updatel(prop->colorkey_mode,
CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
@@ -191,6 +205,17 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
armada_reg_queue_mod(regs, idx, cfg, cfg_mask,
LCD_SPU_DMA_CTRL0);
+ val = armada_spu_contrast(state);
+ if ((!old_state->visible && state->visible) ||
+ armada_spu_contrast(old_state) != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_CONTRAST);
+ val = armada_spu_saturation(state);
+ if ((!old_state->visible && state->visible) ||
+ armada_spu_saturation(old_state) != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_SATURATION);
+ if (!old_state->visible && state->visible)
+ armada_reg_queue_set(regs, idx, 0x2000, LCD_SPU_CBSH_HUE);
+
dcrtc->regs_idx += idx;
}
@@ -264,6 +289,10 @@ static int armada_overlay_commit(struct drm_plane *plane,
/* Point of no return */
swap(plane->state, state);
+ /* No CRTC, can't update */
+ if (!plane->state->crtc)
+ goto put_state;
+
dcrtc->regs_idx = 0;
dcrtc->regs = work->regs;
@@ -300,7 +329,7 @@ static int armada_overlay_commit(struct drm_plane *plane,
dplane->next_work = !dplane->next_work;
put_state:
- drm_atomic_helper_plane_destroy_state(plane, state);
+ plane->funcs->atomic_destroy_state(plane, state);
return ret;
}
@@ -318,7 +347,7 @@ armada_ovl_plane_update(struct drm_plane *plane, struct
drm_crtc *crtc,
src_x, src_y, src_w, src_h);
/* Con
[PATCH 11/17] drm/armada: use old_state for update tracking in atomic_update()
Rather than tracking the register state, we can now check the previous
state and decide which registers need updating from that since the old
plane state indicates the previous state which was programmed into the
hardware.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c| 116 ++--
drivers/gpu/drm/armada/armada_crtc.h| 12 --
drivers/gpu/drm/armada/armada_overlay.c | 189 ++--
3 files changed, 144 insertions(+), 173 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 056673911818..14339d5bed14 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -1114,64 +1114,14 @@ int armada_drm_plane_atomic_check(struct drm_plane
*plane,
return 0;
}
-static unsigned int armada_drm_primary_update_state(
- struct drm_plane_state *state, struct armada_regs *regs)
-{
- struct armada_plane *dplane = drm_to_armada_plane(state->plane);
- struct armada_crtc *dcrtc = drm_to_armada_crtc(state->crtc);
- struct armada_framebuffer *dfb = drm_fb_to_armada_fb(state->fb);
- bool was_disabled;
- unsigned int idx = 0;
- u32 val;
-
- val = CFG_GRA_FMT(dfb->fmt) | CFG_GRA_MOD(dfb->mod);
- if (dfb->fmt > CFG_420)
- val |= CFG_PALETTE_ENA;
- if (state->visible)
- val |= CFG_GRA_ENA;
- if (drm_rect_width(&state->src) >> 16 != drm_rect_width(&state->dst))
- val |= CFG_GRA_HSMOOTH;
- if (dcrtc->interlaced)
- val |= CFG_GRA_FTOGGLE;
-
- was_disabled = !(dplane->state.ctrl0 & CFG_GRA_ENA);
- if (was_disabled)
- armada_reg_queue_mod(regs, idx,
-0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);
-
- dplane->state.ctrl0 = val;
- dplane->state.src_hw = armada_rect_hw_fp(&state->src);
- dplane->state.dst_hw = armada_rect_hw(&state->dst);
- dplane->state.dst_yx = armada_rect_yx(&state->dst);
-
- idx += armada_drm_crtc_calc_fb(&dfb->fb, state->src.x1 >> 16,
- state->src.y1 >> 16, regs + idx,
- dcrtc->interlaced);
- armada_reg_queue_set(regs, idx, dplane->state.dst_yx,
-LCD_SPU_GRA_OVSA_HPXL_VLN);
- armada_reg_queue_set(regs, idx, dplane->state.src_hw,
-LCD_SPU_GRA_HPXL_VLN);
- armada_reg_queue_set(regs, idx, dplane->state.dst_hw,
-LCD_SPU_GZM_HPXL_VLN);
- armada_reg_queue_mod(regs, idx, dplane->state.ctrl0, CFG_GRAFORMAT |
-CFG_GRA_MOD(CFG_SWAPRB | CFG_SWAPUV |
-CFG_SWAPYU | CFG_YUV2RGB) |
-CFG_PALETTE_ENA | CFG_GRA_FTOGGLE |
-CFG_GRA_HSMOOTH | CFG_GRA_ENA,
-LCD_SPU_DMA_CTRL0);
-
- dplane->state.vsync_update = !was_disabled;
- dplane->state.changed = true;
-
- return idx;
-}
-
static void armada_drm_primary_plane_atomic_update(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
struct drm_plane_state *state = plane->state;
struct armada_crtc *dcrtc;
struct armada_regs *regs;
+ u32 cfg, cfg_mask, val;
+ unsigned int idx;
DRM_DEBUG_KMS("[PLANE:%d:%s]\n", plane->base.id, plane->name);
@@ -1187,13 +1137,69 @@ static void
armada_drm_primary_plane_atomic_update(struct drm_plane *plane,
dcrtc = drm_to_armada_crtc(state->crtc);
regs = dcrtc->regs + dcrtc->regs_idx;
- dcrtc->regs_idx += armada_drm_primary_update_state(state, regs);
+ idx = 0;
+ if (!old_state->visible && state->visible) {
+ val = CFG_PDWN64x66;
+ if (drm_fb_to_armada_fb(state->fb)->fmt > CFG_420)
+ val |= CFG_PDWN256x24;
+ armada_reg_queue_mod(regs, idx, 0, val, LCD_SPU_SRAM_PARA1);
+ }
+ val = armada_rect_hw_fp(&state->src);
+ if (armada_rect_hw_fp(&old_state->src) != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_GRA_HPXL_VLN);
+ val = armada_rect_yx(&state->dst);
+ if (armada_rect_yx(&old_state->dst) != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_GRA_OVSA_HPXL_VLN);
+ val = armada_rect_hw(&state->dst);
+ if (armada_rect_hw(&old_state->dst) != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_GZM_HPXL_VLN);
+ if (old_state->src.x1 != state->src.x1 ||
+ old_state->src.y1 != state->src.y1 ||
+ old_state->fb != state->fb) {
+ idx += armada_drm_crtc_calc_fb(state->fb,
+ state->src.x1 >> 16,
+ state->src.y1 >> 16,
+ regs + idx,
+
[PATCH 04/17] drm/armada: use core of primary update_plane for mode set
Use the core of the update_plane method to configure the primary plane
within mode_set() rather than duplicating this code. This moves us
closer to the same code structure that the atomic modeset transitional
helpers will use.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 137 +++
1 file changed, 59 insertions(+), 78 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 683b2cec3d55..6dd54f1d3ac9 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -613,17 +613,8 @@ static void armada_drm_gra_plane_regs(struct armada_regs
*regs,
armada_reg_queue_end(regs, i);
}
-static void armada_drm_primary_set(struct drm_crtc *crtc,
- struct drm_plane *plane, int x, int y)
-{
- struct armada_plane_state *state = &drm_to_armada_plane(plane)->state;
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- struct armada_regs regs[8];
- bool interlaced = dcrtc->interlaced;
-
- armada_drm_gra_plane_regs(regs, plane->fb, state, x, y, interlaced);
- armada_drm_crtc_update_regs(dcrtc, regs);
-}
+static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
+ struct drm_framebuffer *old_fb);
/* The mode_config.mutex will be held for this call */
static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
@@ -637,24 +628,13 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
unsigned i;
bool interlaced;
- drm_framebuffer_get(crtc->primary->fb);
+ /* Take a reference on the old fb for armada_drm_crtc_commit() */
+ if (old_fb)
+ drm_framebuffer_get(old_fb);
dcrtc->old_modeset_fb = old_fb;
interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
- val = CFG_GRA_ENA;
- val |= CFG_GRA_FMT(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt);
- val |= CFG_GRA_MOD(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->mod);
-
- if (drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt > CFG_420)
- val |= CFG_PALETTE_ENA;
-
- drm_to_armada_plane(crtc->primary)->state.ctrl0 = val;
- drm_to_armada_plane(crtc->primary)->state.src_hw =
- drm_to_armada_plane(crtc->primary)->state.dst_hw =
- adj->crtc_vdisplay << 16 | adj->crtc_hdisplay;
- drm_to_armada_plane(crtc->primary)->state.dst_yx = 0;
-
i = 0;
rm = adj->crtc_hsync_start - adj->crtc_hdisplay;
lm = adj->crtc_htotal - adj->crtc_hsync_end;
@@ -694,9 +674,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
spin_lock_irqsave(&dcrtc->irq_lock, flags);
- /* Ensure graphic fifo is enabled */
- armada_reg_queue_mod(regs, i, 0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);
-
/* Even interlaced/progressive frame */
dcrtc->v[1].spu_v_h_total = adj->crtc_vtotal << 16 |
adj->crtc_htotal;
@@ -739,37 +716,34 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
armada_reg_queue_end(regs, i);
armada_drm_crtc_update_regs(dcrtc, regs);
-
- armada_drm_primary_set(crtc, crtc->primary, x, y);
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
- return 0;
+ return armada_drm_crtc_mode_set_base(crtc, x, y, old_fb);
}
+static int armada_drm_do_primary_update(struct drm_plane *plane,
+ struct drm_plane_state *state, struct drm_framebuffer *old_fb);
+
/* The mode_config.mutex will be held for this call */
static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
struct drm_framebuffer *old_fb)
{
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- struct armada_regs regs[4];
- unsigned i;
-
- i = armada_drm_crtc_calc_fb(crtc->primary->fb, crtc->x, crtc->y, regs,
- dcrtc->interlaced);
- armada_reg_queue_end(regs, i);
-
- /* Wait for pending flips to complete */
- armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
- MAX_SCHEDULE_TIMEOUT);
-
- /* Take a reference to the new fb as we're using it */
- drm_framebuffer_get(crtc->primary->fb);
-
- /* Update the base in the CRTC */
- armada_drm_crtc_update_regs(dcrtc, regs);
+ struct drm_plane_state state = {
+ .plane = crtc->primary,
+ .crtc = crtc,
+ .fb = crtc->primary->fb,
+ .crtc_x = 0,
+ .crtc_y = 0,
+ .crtc_w = crtc->mode.hdisplay,
+ .crtc_h = crtc->mode.vdisplay,
+ .src_x = x << 16,
+ .src_y = y << 16,
+ .src_w = crtc->mode.hdisplay << 16,
+ .src_h = crtc->mode.vdisplay << 16,
+ .rotation = DRM_MODE_ROTATE_0,
+ };
- /* Drop our previously held reference */
-
[PATCH v2 01/18] dt-bindings: display: sun4i-drm: Add R40 display engine compatible
R40 has pretty unique display pipeline. It supports two outputs at the same time. Possible outputs: - 1x HDMI, - 2x TV output - 1x VGA, - 1x MIPI DSI and - 2x LCD outputs That is the biggest number of possible outputs from all Allwinner SoC. Because of that, add new compatible for it. Reviewed-by: Chen-Yu Tsai Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 5a9319ad8861..288b4cbc255e 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -399,6 +399,7 @@ Required properties: * allwinner,sun8i-a33-display-engine * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-h3-display-engine +* allwinner,sun8i-r40-display-engine * allwinner,sun8i-v3s-display-engine * allwinner,sun9i-a80-display-engine -- 2.18.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 05/18] drm/sun4i: tcon: Release node when traversing of graph
Function sun4i_tcon_find_engine_traverse() doesn't release node if it
needs to traverse of graph deeper than 1 level.
Fix this by calling of_node_put().
Fixes: 49836b11fe71 ("drm/sun4i: tcon: Generalize engine search algorithm")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index aacc841d3dc6..3fb084f802e2 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -811,6 +811,7 @@ sun4i_tcon_find_engine_traverse(struct sun4i_drv *drv,
* remote output id. If this for some reason can't be done, 0
* is used as input port id.
*/
+ of_node_put(port);
port = of_graph_get_remote_port(ep);
if (!of_property_read_u32(port, "reg", ®) && reg > 0)
reg -= 1;
--
2.18.0
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[PATCH 1/3] drm/armada: fix compare_of() for LCD controllers
The DT node passed for LCD controllers is the "port" node within the
parent device. Detect this and compare the parent node.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_drv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index d1705d298a39..217f0590fd61 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -205,7 +205,10 @@ static void armada_drm_unbind(struct device *dev)
static int compare_of(struct device *dev, void *data)
{
- return dev->of_node == data;
+ struct device_node *np = data;
+ if (of_node_cmp(np->name, "port") == 0)
+ np = np->parent;
+ return dev->of_node == np;
}
static int compare_dev_name(struct device *dev, void *data)
--
2.7.4
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[PATCH 10/17] drm/armada: remove temporary crtc state
Now that we have the CRTC using the atomic modeset transitional helper,
there is no need to build a temporary crtc state anymore - we can use
the CRTC atomic state directly.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 5bb097b75b44..056673911818 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -1099,13 +1099,13 @@ int armada_drm_plane_atomic_check(struct drm_plane
*plane,
{
if (state->fb && !WARN_ON(!state->crtc)) {
struct drm_crtc *crtc = state->crtc;
- struct drm_crtc_state crtc_state = {
- .crtc = crtc,
- .enable = crtc->enabled,
- .mode = crtc->mode,
- };
+ struct drm_crtc_state *crtc_state;
- return drm_atomic_helper_check_plane_state(state, &crtc_state,
+ if (state->state)
+ crtc_state =
drm_atomic_get_existing_crtc_state(state->state, crtc);
+ else
+ crtc_state = crtc->state;
+ return drm_atomic_helper_check_plane_state(state, crtc_state,
0, INT_MAX,
true, false);
} else {
--
2.7.4
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[PATCH v2 04/18] drm/sun4i: tcon-top: Cleanup clock handling
There is no need to acquire reference to clock just to get its name.
This commit just cleans up the code. There is no functional change.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 48 ++
1 file changed, 11 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 8da0460e0028..9fb51940156f 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -44,15 +44,20 @@ static int sun8i_tcon_top_get_connected_ep_id(struct
device_node *node,
}
static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
- struct clk *parent,
+ const char *parent,
void __iomem *regs,
spinlock_t *lock,
u8 bit, int name_index)
{
const char *clk_name, *parent_name;
- int ret;
+ int ret, index;
+
+ index = of_property_match_string(dev->of_node, "clock-names", parent);
+ if (IS_ERR_VALUE(index))
+ return ERR_PTR(index);
+
+ parent_name = of_clk_get_parent_name(dev->of_node, index);
- parent_name = __clk_get_name(parent);
ret = of_property_read_string_index(dev->of_node,
"clock-output-names", name_index,
&clk_name);
@@ -69,7 +74,6 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
void *data)
{
struct platform_device *pdev = to_platform_device(dev);
- struct clk *dsi, *tcon_tv0, *tcon_tv1, *tve0, *tve1;
struct clk_hw_onecell_data *clk_data;
struct sun8i_tcon_top *tcon_top;
bool mixer0_unused = false;
@@ -103,36 +107,6 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
return PTR_ERR(tcon_top->bus);
}
- dsi = devm_clk_get(dev, "dsi");
- if (IS_ERR(dsi)) {
- dev_err(dev, "Couldn't get the dsi clock\n");
- return PTR_ERR(dsi);
- }
-
- tcon_tv0 = devm_clk_get(dev, "tcon-tv0");
- if (IS_ERR(tcon_tv0)) {
- dev_err(dev, "Couldn't get the tcon-tv0 clock\n");
- return PTR_ERR(tcon_tv0);
- }
-
- tcon_tv1 = devm_clk_get(dev, "tcon-tv1");
- if (IS_ERR(tcon_tv1)) {
- dev_err(dev, "Couldn't get the tcon-tv1 clock\n");
- return PTR_ERR(tcon_tv1);
- }
-
- tve0 = devm_clk_get(dev, "tve0");
- if (IS_ERR(tve0)) {
- dev_err(dev, "Couldn't get the tve0 clock\n");
- return PTR_ERR(tve0);
- }
-
- tve1 = devm_clk_get(dev, "tve1");
- if (IS_ERR(tve1)) {
- dev_err(dev, "Couldn't get the tve1 clock\n");
- return PTR_ERR(tve1);
- }
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(dev, res);
if (IS_ERR(regs))
@@ -203,17 +177,17 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
* to TVE clock parent.
*/
clk_data->hws[CLK_TCON_TOP_TV0] =
- sun8i_tcon_top_register_gate(dev, tcon_tv0, regs,
+ sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,
&tcon_top->reg_lock,
TCON_TOP_TCON_TV0_GATE, 0);
clk_data->hws[CLK_TCON_TOP_TV1] =
- sun8i_tcon_top_register_gate(dev, tcon_tv1, regs,
+ sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
&tcon_top->reg_lock,
TCON_TOP_TCON_TV1_GATE, 1);
clk_data->hws[CLK_TCON_TOP_DSI] =
- sun8i_tcon_top_register_gate(dev, dsi, regs,
+ sun8i_tcon_top_register_gate(dev, "dsi", regs,
&tcon_top->reg_lock,
TCON_TOP_TCON_DSI_GATE, 2);
--
2.18.0
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[PATCH v2 13/18] drm/sun4i: tcon: Add support for R40 TCON
R40 TV TCON is basically the same as on A83T. However, it needs special
handling, because it has to set up TCON TOP muxes at runtime.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 40 ++
1 file changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 44ec3a3d4d64..5676b7faaca0 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -1291,6 +1291,40 @@ static int sun6i_tcon_set_mux(struct sun4i_tcon *tcon,
return 0;
}
+static int sun8i_r40_tcon_tv_set_mux(struct sun4i_tcon *tcon,
+const struct drm_encoder *encoder)
+{
+ struct device_node *port, *remote;
+ struct platform_device *pdev;
+ int id, ret;
+
+ /* find TCON TOP platform device and TCON id */
+
+ port = of_graph_get_port_by_id(tcon->dev->of_node, 0);
+ if (!port)
+ return -EINVAL;
+
+ id = sun4i_tcon_of_get_id_from_port(port);
+ of_node_put(port);
+
+ remote = of_graph_get_remote_node(tcon->dev->of_node, 0, -1);
+ if (!remote)
+ return -EINVAL;
+
+ pdev = of_find_device_by_node(remote);
+ of_node_put(remote);
+ if (!pdev)
+ return -EINVAL;
+
+ if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) {
+ ret = sun8i_tcon_top_set_hdmi_src(&pdev->dev, id);
+ if (ret)
+ return ret;
+ }
+
+ return sun8i_tcon_top_de_config(&pdev->dev, tcon->id, id);
+}
+
static const struct sun4i_tcon_quirks sun4i_a10_quirks = {
.has_channel_0 = true,
.has_channel_1 = true,
@@ -1338,6 +1372,11 @@ static const struct sun4i_tcon_quirks
sun8i_a83t_tv_quirks = {
.has_channel_1 = true,
};
+static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = {
+ .has_channel_1 = true,
+ .set_mux= sun8i_r40_tcon_tv_set_mux,
+};
+
static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
.has_channel_0 = true,
};
@@ -1362,6 +1401,7 @@ const struct of_device_id sun4i_tcon_of_table[] = {
{ .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
{ .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data =
&sun8i_a83t_lcd_quirks },
{ .compatible = "allwinner,sun8i-a83t-tcon-tv", .data =
&sun8i_a83t_tv_quirks },
+ { .compatible = "allwinner,sun8i-r40-tcon-tv", .data =
&sun8i_r40_tv_quirks },
{ .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
{ .compatible = "allwinner,sun9i-a80-tcon-lcd", .data =
&sun9i_a80_tcon_lcd_quirks },
{ .compatible = "allwinner,sun9i-a80-tcon-tv", .data =
&sun9i_a80_tcon_tv_quirks },
--
2.18.0
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[PATCH 04/20] drm/armada: push interlace calculation into armada_drm_plane_calc()
Push the interlaced frame calculation down into armada_drm_plane_calc()
which needs to apply the same correction for both the overlay and
primary planes.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 16 +++---
drivers/gpu/drm/armada/armada_plane.c | 38 +
drivers/gpu/drm/armada/armada_plane.h | 4 ++--
3 files changed, 30 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index f36f6fb919e7..7de8b6bd7847 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -131,21 +131,21 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
old_state->fb != state->fb) {
const struct drm_format_info *format;
u16 src_x, pitches[3];
- u32 addrs[3];
+ u32 addrs[2][3];
- armada_drm_plane_calc(state, addrs, pitches);
+ armada_drm_plane_calc(state, addrs, pitches, false);
- armada_reg_queue_set(regs, idx, addrs[0],
+ armada_reg_queue_set(regs, idx, addrs[0][0],
LCD_SPU_DMA_START_ADDR_Y0);
- armada_reg_queue_set(regs, idx, addrs[1],
+ armada_reg_queue_set(regs, idx, addrs[0][1],
LCD_SPU_DMA_START_ADDR_U0);
- armada_reg_queue_set(regs, idx, addrs[2],
+ armada_reg_queue_set(regs, idx, addrs[0][2],
LCD_SPU_DMA_START_ADDR_V0);
- armada_reg_queue_set(regs, idx, addrs[0],
+ armada_reg_queue_set(regs, idx, addrs[1][0],
LCD_SPU_DMA_START_ADDR_Y1);
- armada_reg_queue_set(regs, idx, addrs[1],
+ armada_reg_queue_set(regs, idx, addrs[1][1],
LCD_SPU_DMA_START_ADDR_U1);
- armada_reg_queue_set(regs, idx, addrs[2],
+ armada_reg_queue_set(regs, idx, addrs[1][2],
LCD_SPU_DMA_START_ADDR_V1);
val = pitches[0] << 16 | pitches[0];
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index 3c9414c56aca..1320fec4c386 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -35,8 +35,8 @@ static const uint32_t armada_primary_formats[] = {
DRM_FORMAT_BGR565,
};
-void armada_drm_plane_calc(struct drm_plane_state *state, u32 addrs[3],
- u16 pitches[3])
+void armada_drm_plane_calc(struct drm_plane_state *state, u32 addrs[2][3],
+ u16 pitches[3], bool interlaced)
{
struct drm_framebuffer *fb = state->fb;
const struct drm_format_info *format = fb->format;
@@ -52,43 +52,45 @@ void armada_drm_plane_calc(struct drm_plane_state *state,
u32 addrs[3],
if (num_planes > 3)
num_planes = 3;
- addrs[0] = addr + fb->offsets[0] + y * fb->pitches[0] +
- x * format->cpp[0];
+ addrs[0][0] = addr + fb->offsets[0] + y * fb->pitches[0] +
+ x * format->cpp[0];
pitches[0] = fb->pitches[0];
y /= format->vsub;
x /= format->hsub;
for (i = 1; i < num_planes; i++) {
- addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
-x * format->cpp[i];
+ addrs[0][i] = addr + fb->offsets[i] + y * fb->pitches[i] +
+ x * format->cpp[i];
pitches[i] = fb->pitches[i];
}
for (; i < 3; i++) {
- addrs[i] = 0;
+ addrs[0][i] = 0;
pitches[i] = 0;
}
+ if (interlaced) {
+ for (i = 0; i < 3; i++) {
+ addrs[1][i] = addrs[0][i] + pitches[i];
+ pitches[i] *= 2;
+ }
+ } else {
+ for (i = 0; i < 3; i++)
+ addrs[1][i] = addrs[0][i];
+ }
}
static unsigned armada_drm_crtc_calc_fb(struct drm_plane_state *state,
struct armada_regs *regs, bool interlaced)
{
u16 pitches[3];
- u32 addrs[3], addr_odd, addr_even;
+ u32 addrs[2][3];
unsigned i = 0;
- armada_drm_plane_calc(state, addrs, pitches);
-
- addr_odd = addr_even = addrs[0];
-
- if (interlaced) {
- addr_even += pitches[0];
- pitches[0] *= 2;
- }
+ armada_drm_plane_calc(state, addrs, pitches, interlaced);
/* write offset, base, and pitch */
- armada_reg_queue_set(regs, i, addr_odd, LCD_CFG_GRA_START_ADDR0);
- armada_reg_queue_set(regs, i, addr_even, LCD_CFG_GRA_START_ADDR1);
+ armada_reg_queue_set(regs, i, addrs[0][0], LCD_CFG_GRA_START_ADDR0);
+ armada_reg_queue_set(regs, i, addrs[1][0], LCD_C
[PATCH 0/3] Finish Armada DRM DT support
Finish Armada DRM support for DT, finally allowing mainline kernels to use this driver unimpeded. arch/arm/boot/dts/dove-cubox.dts | 43 +++ drivers/gpu/drm/armada/Makefile | 3 +++ drivers/gpu/drm/armada/armada_drv.c | 29 ++--- drivers/gpu/drm/armada/armada_rmem.c | 49 4 files changed, 121 insertions(+), 3 deletions(-) -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 13.8Mbps down 630kbps up According to speedtest.net: 13Mbps down 490kbps up ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 11/18] drm/sun4i: tcon-top: Add helpers for mux switching
We want to be able to set TCON TOP muxes at runtime. Add helpers for
that.
Old, static configuration of muxes at probe time is preserved for now.
It will be removed when R40 TCON starts using them.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 74 ++
drivers/gpu/drm/sun4i/sun8i_tcon_top.h | 4 ++
2 files changed, 78 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 9fb51940156f..c09b15b64192 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -14,6 +14,79 @@
#include "sun8i_tcon_top.h"
+static bool sun8i_tcon_top_node_is_tcon_top(struct device_node *node)
+{
+ return !!of_match_node(sun8i_tcon_top_of_table, node);
+}
+
+int sun8i_tcon_top_set_hdmi_src(struct device *dev, int tcon)
+{
+ struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
+ unsigned long flags;
+ u32 val;
+
+ if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {
+ dev_err(dev, "Device is not TCON TOP!\n");
+ return -EINVAL;
+ }
+
+ if (tcon < 2 || tcon > 3) {
+ dev_err(dev, "TCON index must be 2 or 3!\n");
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&tcon_top->reg_lock, flags);
+
+ val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG);
+ val &= ~TCON_TOP_HDMI_SRC_MSK;
+ val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1);
+ writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG);
+
+ spin_unlock_irqrestore(&tcon_top->reg_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(sun8i_tcon_top_set_hdmi_src);
+
+int sun8i_tcon_top_de_config(struct device *dev, int mixer, int tcon)
+{
+ struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);
+ unsigned long flags;
+ u32 reg;
+
+ if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {
+ dev_err(dev, "Device is not TCON TOP!\n");
+ return -EINVAL;
+ }
+
+ if (mixer > 1) {
+ dev_err(dev, "Mixer index is too high!\n");
+ return -EINVAL;
+ }
+
+ if (tcon > 3) {
+ dev_err(dev, "TCON index is too high!\n");
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&tcon_top->reg_lock, flags);
+
+ reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG);
+ if (mixer == 0) {
+ reg &= ~TCON_TOP_PORT_DE0_MSK;
+ reg |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, tcon);
+ } else {
+ reg &= ~TCON_TOP_PORT_DE1_MSK;
+ reg |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, tcon);
+ }
+ writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG);
+
+ spin_unlock_irqrestore(&tcon_top->reg_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(sun8i_tcon_top_de_config);
+
static int sun8i_tcon_top_get_connected_ep_id(struct device_node *node,
int port_id)
{
@@ -109,6 +182,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(dev, res);
+ tcon_top->regs = regs;
if (IS_ERR(regs))
return PTR_ERR(regs);
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.h
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.h
index 39838bbfeaee..0390584a330e 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.h
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.h
@@ -26,6 +26,7 @@
struct sun8i_tcon_top {
struct clk *bus;
struct clk_hw_onecell_data *clk_data;
+ void __iomem*regs;
struct reset_control*rst;
/*
@@ -37,4 +38,7 @@ struct sun8i_tcon_top {
extern const struct of_device_id sun8i_tcon_top_of_table[];
+int sun8i_tcon_top_set_hdmi_src(struct device *dev, int tcon);
+int sun8i_tcon_top_de_config(struct device *dev, int mixer, int tcon);
+
#endif /* _SUN8I_TCON_TOP_H_ */
--
2.18.0
___
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 12/18] drm/sun4i: tcon: Add another way for matching mixers with tcon
Till now, new way of matching engines with TCONs was reading their
respective ids and match them by those ids. However, with introduction
of TCON TOP, that might not be so straightforward anymore.
- there might be more TCONs that engines (mixers)
- TCON ids might have non-consecutive ids
Workaround that by matching mixer id with TCON index from TCON list.
For example, R40 has 2 mixers and 4 TCONs. Board designer can choose
2 outputs, which are connected to any of those 4 TCONs. As long as there
are only 2 TCONs enabled in DT, using index in list as alternative id,
will allow to match them with mixer 0 and 1.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 51 --
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 3fb084f802e2..44ec3a3d4d64 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -35,6 +35,7 @@
#include "sun4i_rgb.h"
#include "sun4i_tcon.h"
#include "sun6i_mipi_dsi.h"
+#include "sun8i_tcon_top.h"
#include "sunxi_engine.h"
static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder
*encoder)
@@ -880,6 +881,36 @@ static struct sunxi_engine
*sun4i_tcon_get_engine_by_id(struct sun4i_drv *drv,
return ERR_PTR(-EINVAL);
}
+static bool sun4i_tcon_connected_to_tcon_top(struct device_node *node)
+{
+ struct device_node *remote;
+ bool ret = false;
+
+ remote = of_graph_get_remote_node(node, 0, -1);
+ if (remote) {
+ ret = !!of_match_node(sun8i_tcon_top_of_table, remote);
+ of_node_put(remote);
+ }
+
+ return ret;
+}
+
+static int sun4i_tcon_get_index(struct sun4i_drv *drv)
+{
+ struct list_head *pos;
+ int size = 0;
+
+ /*
+* Because TCON is added to the list at the end of the probe
+* (after this function is called), index of the current TCON
+* will be same as current TCON list size.
+*/
+ list_for_each(pos, &drv->tcon_list)
+ ++size;
+
+ return size;
+}
+
/*
* On SoCs with the old display pipeline design (Display Engine 1.0),
* we assumed the TCON was always tied to just one backend. However
@@ -928,8 +959,24 @@ static struct sunxi_engine *sun4i_tcon_find_engine(struct
sun4i_drv *drv,
* connections between the backend and TCON?
*/
if (of_get_child_count(port) > 1) {
- /* Get our ID directly from an upstream endpoint */
- int id = sun4i_tcon_of_get_id_from_port(port);
+ int id;
+
+ /*
+* When pipeline has the same number of TCONs and engines which
+* are represented by frontends/backends (DE1) or mixers (DE2),
+* we match them by their respective IDs. However, if pipeline
+* contains TCON TOP, chances are that there are either more
+* TCONs than engines (R40) or TCONs with non-consecutive ids.
+* (H6). In that case it's easier just use TCON index in list
+* as an id. That means that on R40, any 2 TCONs can be enabled
+* in DT out of 4 (there are 2 mixers). Due to the design of
+* TCON TOP, remaining 2 TCONs can't be connected to anything
+* anyway.
+*/
+ if (sun4i_tcon_connected_to_tcon_top(node))
+ id = sun4i_tcon_get_index(drv);
+ else
+ id = sun4i_tcon_of_get_id_from_port(port);
/* Get our engine by matching our ID */
engine = sun4i_tcon_get_engine_by_id(drv, id);
--
2.18.0
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[PATCH v2 15/18] ARM: dts: sun8i: r40: Add missing TCON-TOP - TCON connections
Current R40 is missing some graph connections between TCON TOP and
TCONs.
Add them.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
.../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 20 -
arch/arm/boot/dts/sun8i-r40.dtsi | 44 +++
2 files changed, 44 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 4f3d583183dc..737cf01b1acd 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -251,26 +251,6 @@
regulator-name = "vcc-wifi";
};
-&tcon_top_hdmi_in_tcon_tv0 {
- remote-endpoint = <&tcon_tv0_out_tcon_top>;
-};
-
-&tcon_top_mixer0_out_tcon_tv0 {
- remote-endpoint = <&tcon_tv0_in_tcon_top>;
-};
-
-&tcon_tv0_in {
- tcon_tv0_in_tcon_top: endpoint {
- remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
- };
-};
-
-&tcon_tv0_out {
- tcon_tv0_out_tcon_top: endpoint {
- remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
- };
-};
-
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 6b4fe899..e5c7e4804384 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -601,10 +601,12 @@
tcon_top_mixer0_out_tcon_tv0:
endpoint@2 {
reg = <2>;
+ remote-endpoint =
<&tcon_tv0_in_tcon_top_mixer0>;
};
tcon_top_mixer0_out_tcon_tv1:
endpoint@3 {
reg = <3>;
+ remote-endpoint =
<&tcon_tv1_in_tcon_top_mixer0>;
};
};
@@ -634,10 +636,12 @@
tcon_top_mixer1_out_tcon_tv0:
endpoint@2 {
reg = <2>;
+ remote-endpoint =
<&tcon_tv0_in_tcon_top_mixer1>;
};
tcon_top_mixer1_out_tcon_tv1:
endpoint@3 {
reg = <3>;
+ remote-endpoint =
<&tcon_tv1_in_tcon_top_mixer1>;
};
};
@@ -648,10 +652,12 @@
tcon_top_hdmi_in_tcon_tv0: endpoint@0 {
reg = <0>;
+ remote-endpoint =
<&tcon_tv0_out_tcon_top>;
};
tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
reg = <1>;
+ remote-endpoint =
<&tcon_tv1_out_tcon_top>;
};
};
@@ -679,11 +685,30 @@
#size-cells = <0>;
tcon_tv0_in: port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0>;
+
+ tcon_tv0_in_tcon_top_mixer0: endpoint@0
{
+ reg = <0>;
+ remote-endpoint =
<&tcon_top_mixer0_out_tcon_tv0>;
+ };
+
+ tcon_tv0_in_tcon_top_mixer1: endpoint@1
{
+ reg = <1>;
+ remote-endpoint =
<&tcon_top_mixer1_out_tcon_tv0>;
+ };
};
tcon_tv0_out: port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <1>;
+
+ tcon_tv0_out_tcon_top: endpoint@1 {
+ reg = <1>;
+ remote-endpoint =
<&tcon_top_hdmi_in_tcon_tv0>;
+ };
};
};
};
@@ -702,11 +727,30 @@
#size-cells = <0>;
tcon_tv1_in: port@0 {
+
[PATCH 16/17] drm/armada: remove crtc YUV colourspace properties
Remove the unused CRTC colourspace properties - userspace does not make
use of these. In any case, these are not a property of the CRTC, since
they demonstrably only affect the video (overlay) plane, irrespective
of the format of the graphics (primary) plane.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 118 ---
drivers/gpu/drm/armada/armada_crtc.h | 2 -
drivers/gpu/drm/armada/armada_drm.h | 2 -
3 files changed, 122 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index b9b0a508793d..35b2df0fc21c 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -23,14 +23,6 @@
#include "armada_plane.h"
#include "armada_trace.h"
-enum csc_mode {
- CSC_AUTO = 0,
- CSC_YUV_CCIR601 = 1,
- CSC_YUV_CCIR709 = 2,
- CSC_RGB_COMPUTER = 1,
- CSC_RGB_STUDIO = 2,
-};
-
/*
* A note about interlacing. Let's consider HDMI 1920x1080i.
* The timing parameters we have from X are:
@@ -438,42 +430,6 @@ static irqreturn_t armada_drm_irq(int irq, void *arg)
return IRQ_NONE;
}
-static uint32_t armada_drm_crtc_calculate_csc(struct armada_crtc *dcrtc)
-{
- struct drm_display_mode *adj = &dcrtc->crtc.mode;
- uint32_t val = 0;
-
- if (dcrtc->csc_yuv_mode == CSC_YUV_CCIR709)
- val |= CFG_CSC_YUV_CCIR709;
- if (dcrtc->csc_rgb_mode == CSC_RGB_STUDIO)
- val |= CFG_CSC_RGB_STUDIO;
-
- /*
-* In auto mode, set the colorimetry, based upon the HDMI spec.
-* 1280x720p, 1920x1080p and 1920x1080i use ITU709, others use
-* ITU601. It may be more appropriate to set this depending on
-* the source - but what if the graphic frame is YUV and the
-* video frame is RGB?
-*/
- if ((adj->hdisplay == 1280 && adj->vdisplay == 720 &&
-!(adj->flags & DRM_MODE_FLAG_INTERLACE)) ||
- (adj->hdisplay == 1920 && adj->vdisplay == 1080)) {
- if (dcrtc->csc_yuv_mode == CSC_AUTO)
- val |= CFG_CSC_YUV_CCIR709;
- }
-
- /*
-* We assume we're connected to a TV-like device, so the YUV->RGB
-* conversion should produce a limited range. We should set this
-* depending on the connectors attached to this CRTC, and what
-* kind of device they report being connected.
-*/
- if (dcrtc->csc_rgb_mode == CSC_AUTO)
- val |= CFG_CSC_RGB_STUDIO;
-
- return val;
-}
-
/* The mode_config.mutex will be held for this call */
static void armada_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
@@ -560,9 +516,6 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
val = adj->flags & DRM_MODE_FLAG_NVSYNC ? CFG_VSYNC_INV : 0;
armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1);
-
- val = dcrtc->spu_iopad_ctrl | armada_drm_crtc_calculate_csc(dcrtc);
- armada_reg_queue_set(regs, i, val, LCD_SPU_IOPAD_CONTROL);
armada_reg_queue_end(regs, i);
armada_drm_crtc_update_regs(dcrtc, regs);
@@ -937,33 +890,6 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
return ret;
}
-static int
-armada_drm_crtc_set_property(struct drm_crtc *crtc,
- struct drm_property *property, uint64_t val)
-{
- struct armada_private *priv = crtc->dev->dev_private;
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- bool update_csc = false;
-
- if (property == priv->csc_yuv_prop) {
- dcrtc->csc_yuv_mode = val;
- update_csc = true;
- } else if (property == priv->csc_rgb_prop) {
- dcrtc->csc_rgb_mode = val;
- update_csc = true;
- }
-
- if (update_csc) {
- uint32_t val;
-
- val = dcrtc->spu_iopad_ctrl |
- armada_drm_crtc_calculate_csc(dcrtc);
- writel_relaxed(val, dcrtc->base + LCD_SPU_IOPAD_CONTROL);
- }
-
- return 0;
-}
-
/* These are called under the vbl_lock. */
static int armada_drm_crtc_enable_vblank(struct drm_crtc *crtc)
{
@@ -993,45 +919,12 @@ static const struct drm_crtc_funcs armada_crtc_funcs = {
.destroy= armada_drm_crtc_destroy,
.set_config = drm_crtc_helper_set_config,
.page_flip = armada_drm_crtc_page_flip,
- .set_property = armada_drm_crtc_set_property,
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.enable_vblank = armada_drm_crtc_enable_vblank,
.disable_vblank = armada_drm_crtc_disable_vblank,
};
-static const struct drm_prop_enum_list armada_drm_csc_yuv_enum_list[] = {
- { CSC_AUTO,"Auto" },
- { CSC_YUV_CCIR601, "CCIR601" },
- { CSC_YUV_CCIR709, "CCIR709" },
-};
-
-static const struct drm_prop_e
drm/msm/mdp5: negative x/y in cursor move
Hi,
modesetting X11 driver may provide negative x/y cordinates in
mdp5_crtc_cursor_move(...) call when rotation is enabled.
Because of
static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
{
...
mdp5_crtc->cursor.x = x = max(x, 0);
mdp5_crtc->cursor.y = y = max(y, 0);
...
}
x/y is calmped to 0/0 in those cases resulting that the cursor does not
move anymore beyond mdp5_crtc->cursor.width, mdp5_crtc->cursor.height.
For e.g rotation of 180 degree that means that the upper left cursor point
stays never reaches the region (0/0) to (
mdp5_crtc->cursor.width/mdp5_crtc->cursor.height).
I already asked the X men if this should be fixed in modesetting driver or
in the kernel CRT
functions:
https://www.spinics.net/lists/xorg/msg58969.html
They told me to fix this in the kernel.
So, I suppose:
1.) cursor x should be rather clamped instead to
static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) {
...
mdp5_crtc->cursor.x = x = max(x, -mdp5_crtc->cursor.width);
mdp5_crtc->cursor.y = y = max(y, -mdp5_crtc->cursor.height);
...
}
2.) The ROI calculation must be extendet to:
static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t *roi_h)
{
...
if (x>=0)
*roi_w = min(mdp5_crtc->cursor.width, xres -
mdp5_crtc->cursor.x);
else
*roi_w = mdp5_crtc->cursor.width - abs(mdp5_crtc->cursor.x);
if (y>=0)
*roi_h = min(mdp5_crtc->cursor.height, yres -
mdp5_crtc->cursor.y);
else
*roi_h = mdp5_crtc->cursor.height - abs(mdp5_crtc->cursor.y);
...
}
3.) There has to be some kind of hotspot setup
in mdp5_crtc_restore_cursor(...)
Since I have no MDP5 documentation, I don't know how to setup the hotspot
and I can't
implement 3.)
Please help!
Best regards
-Carsten
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[PATCH 14/20] drm/armada: switch primary plane to atomic modeset
Switch the primary plane away from the transitional helpers, and
use the atomic helpers instead to implement the legacy set_plane
ioctl call for this plane.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 116 +-
drivers/gpu/drm/armada/armada_plane.c | 4 +-
2 files changed, 3 insertions(+), 117 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 0cef40ad3a06..a25094bbeb2c 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -191,34 +191,6 @@ void armada_drm_plane_work_cancel(struct armada_crtc
*dcrtc,
armada_drm_plane_work_call(dcrtc, work, work->cancel);
}
-static void armada_drm_crtc_complete_frame_work(struct armada_crtc *dcrtc,
- struct armada_plane_work *work)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&dcrtc->irq_lock, flags);
- armada_drm_crtc_update_regs(dcrtc, work->regs);
- spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
-}
-
-static struct armada_plane_work *
-armada_drm_crtc_alloc_plane_work(struct drm_plane *plane)
-{
- struct armada_plane_work *work;
- int i = 0;
-
- work = kzalloc(sizeof(*work), GFP_KERNEL);
- if (!work)
- return NULL;
-
- work->plane = plane;
- work->fn = armada_drm_crtc_complete_frame_work;
- work->need_kfree = true;
- armada_reg_queue_end(work->regs, i);
-
- return work;
-}
-
static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
@@ -318,9 +290,6 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc,
u32 stat)
spin_unlock(&dcrtc->irq_lock);
- if (stat & GRA_FRAME_IRQ)
- armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
-
if (stat & VSYNC_IRQ) {
event = xchg(&dcrtc->event, NULL);
if (event) {
@@ -459,15 +428,9 @@ static void armada_drm_crtc_atomic_begin(struct drm_crtc
*crtc,
struct drm_crtc_state *old_crtc_state)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- struct armada_plane *dplane;
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
- /* Wait 100ms for any plane works to complete */
- dplane = drm_to_armada_plane(crtc->primary);
- if (WARN_ON(armada_drm_plane_work_wait(dplane, HZ / 10) == 0))
- armada_drm_plane_work_cancel(dcrtc, dplane);
-
dcrtc->regs_idx = 0;
dcrtc->regs = dcrtc->atomic_regs;
}
@@ -511,8 +474,6 @@ static void armada_drm_crtc_atomic_disable(struct drm_crtc
*crtc,
if (plane)
WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
HZ));
- armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
- MAX_SCHEDULE_TIMEOUT);
drm_crtc_vblank_off(crtc);
armada_drm_crtc_update(dcrtc, false);
@@ -802,81 +763,6 @@ static void armada_drm_crtc_destroy(struct drm_crtc *crtc)
kfree(dcrtc);
}
-/*
- * The mode_config lock is held here, to prevent races between this
- * and a mode_set.
- */
-static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
- struct drm_framebuffer *fb, struct drm_pending_vblank_event *event,
- uint32_t page_flip_flags, struct drm_modeset_acquire_ctx *ctx)
-{
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- struct drm_plane *plane = crtc->primary;
- const struct drm_plane_helper_funcs *plane_funcs;
- struct drm_plane_state *state;
- struct armada_plane_work *work;
- int ret;
-
- /* Construct new state for the primary plane */
- state = drm_atomic_helper_plane_duplicate_state(plane);
- if (!state)
- return -ENOMEM;
-
- drm_atomic_set_fb_for_plane(state, fb);
-
- work = armada_drm_crtc_alloc_plane_work(plane);
- if (!work) {
- ret = -ENOMEM;
- goto put_state;
- }
-
- /* Make sure we can get vblank interrupts */
- ret = drm_crtc_vblank_get(crtc);
- if (ret)
- goto put_work;
-
- /*
-* If we have another work pending, we can't process this flip.
-* The modeset locks protect us from another user queuing a work
-* while we're setting up.
-*/
- if (drm_to_armada_plane(plane)->work) {
- ret = -EBUSY;
- goto put_vblank;
- }
-
- work->event = event;
- work->old_fb = plane->state->fb;
-
- /*
-* Hold a ref on the new fb while it's being displayed by the
-* hardware. The old fb refcount will be released in the worker.
-*/
- drm_framebuffer_get(state->fb);
-
- /* Point of no return */
- swap(plane->state, state)
[PATCH 01/20] drm/armada: move armada_drm_mode_config_funcs to armada_drv.c
Move the armada_drm_mode_config_funcs to armada_drv.c, since this now
has less to do with FBs than it does with general mode configuration.
In doing so, we need to make armada_fb_create() visible to armada_drv.c,
which reveals a function name clash with armada_fbdev.c. Rename the
version in armada_fbdev.c.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_drm.h | 2 --
drivers/gpu/drm/armada/armada_drv.c | 6 ++
drivers/gpu/drm/armada/armada_fb.c| 7 +--
drivers/gpu/drm/armada/armada_fb.h| 3 ++-
drivers/gpu/drm/armada/armada_fbdev.c | 4 ++--
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_drm.h
b/drivers/gpu/drm/armada/armada_drm.h
index 28087e4b9b81..64f1c8836078 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -79,8 +79,6 @@ void __armada_drm_queue_unref_work(struct drm_device *,
void armada_drm_queue_unref_work(struct drm_device *,
struct drm_framebuffer *);
-extern const struct drm_mode_config_funcs armada_drm_mode_config_funcs;
-
int armada_fbdev_init(struct drm_device *);
void armada_fbdev_fini(struct drm_device *);
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index 27df48010a66..9acd0f3a543a 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -16,6 +16,7 @@
#include "armada_crtc.h"
#include "armada_drm.h"
#include "armada_gem.h"
+#include "armada_fb.h"
#include "armada_hw.h"
#include
#include "armada_ioctlP.h"
@@ -78,6 +79,11 @@ static struct drm_driver armada_drm_driver = {
.fops = &armada_drm_fops,
};
+static const struct drm_mode_config_funcs armada_drm_mode_config_funcs = {
+ .fb_create = armada_fb_create,
+ .output_poll_changed= drm_fb_helper_output_poll_changed,
+};
+
static int armada_drm_bind(struct device *dev)
{
struct armada_private *priv;
diff --git a/drivers/gpu/drm/armada/armada_fb.c
b/drivers/gpu/drm/armada/armada_fb.c
index edd15126bde9..6bd638a54579 100644
--- a/drivers/gpu/drm/armada/armada_fb.c
+++ b/drivers/gpu/drm/armada/armada_fb.c
@@ -84,7 +84,7 @@ struct armada_framebuffer *armada_framebuffer_create(struct
drm_device *dev,
return dfb;
}
-static struct drm_framebuffer *armada_fb_create(struct drm_device *dev,
+struct drm_framebuffer *armada_fb_create(struct drm_device *dev,
struct drm_file *dfile, const struct drm_mode_fb_cmd2 *mode)
{
struct armada_gem_object *obj;
@@ -138,8 +138,3 @@ static struct drm_framebuffer *armada_fb_create(struct
drm_device *dev,
DRM_ERROR("failed to initialize framebuffer: %d\n", ret);
return ERR_PTR(ret);
}
-
-const struct drm_mode_config_funcs armada_drm_mode_config_funcs = {
- .fb_create = armada_fb_create,
- .output_poll_changed= drm_fb_helper_output_poll_changed,
-};
diff --git a/drivers/gpu/drm/armada/armada_fb.h
b/drivers/gpu/drm/armada/armada_fb.h
index 5c130ff5da77..476daad0a36a 100644
--- a/drivers/gpu/drm/armada/armada_fb.h
+++ b/drivers/gpu/drm/armada/armada_fb.h
@@ -19,5 +19,6 @@ struct armada_framebuffer {
struct armada_framebuffer *armada_framebuffer_create(struct drm_device *,
const struct drm_mode_fb_cmd2 *, struct armada_gem_object *);
-
+struct drm_framebuffer *armada_fb_create(struct drm_device *dev,
+ struct drm_file *dfile, const struct drm_mode_fb_cmd2 *mode);
#endif
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c
b/drivers/gpu/drm/armada/armada_fbdev.c
index 2a59db0994b2..8d23700848df 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -24,7 +24,7 @@ static /*const*/ struct fb_ops armada_fb_ops = {
.fb_imageblit = drm_fb_helper_cfb_imageblit,
};
-static int armada_fb_create(struct drm_fb_helper *fbh,
+static int armada_fbdev_create(struct drm_fb_helper *fbh,
struct drm_fb_helper_surface_size *sizes)
{
struct drm_device *dev = fbh->dev;
@@ -108,7 +108,7 @@ static int armada_fb_probe(struct drm_fb_helper *fbh,
int ret = 0;
if (!fbh->fb) {
- ret = armada_fb_create(fbh, sizes);
+ ret = armada_fbdev_create(fbh, sizes);
if (ret == 0)
ret = 1;
}
--
2.7.4
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[PATCH 12/20] drm/armada: enable atomic modeset support
Enable atomic modeset helpers, and internal DRM use of atomic modeset
with armada-drm.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 7 +++
drivers/gpu/drm/armada/armada_drv.c | 5 -
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index e93097d3aa06..375a20757561 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -278,13 +278,12 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
struct drm_plane *plane;
/*
-* If we have an overlay plane associated with this CRTC, disable
-* it before the modeset to avoid its coordinates being outside
-* the new mode parameters.
+* If we have an overlay plane associated with this CRTC, disable it
+* before the modeset to avoid its coordinates being outside the new
+* mode parameters. For transitional atomic modeset, we only wait.
*/
plane = dcrtc->plane;
if (plane) {
- drm_plane_force_disable(plane);
WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
HZ));
}
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index 9acd0f3a543a..8e776afe5bd7 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -74,7 +75,7 @@ static struct drm_driver armada_drm_driver = {
.desc = "Armada SoC DRM",
.date = "20120730",
.driver_features= DRIVER_GEM | DRIVER_MODESET |
- DRIVER_PRIME,
+ DRIVER_PRIME | DRIVER_ATOMIC,
.ioctls = armada_ioctls,
.fops = &armada_drm_fops,
};
@@ -82,6 +83,8 @@ static struct drm_driver armada_drm_driver = {
static const struct drm_mode_config_funcs armada_drm_mode_config_funcs = {
.fb_create = armada_fb_create,
.output_poll_changed= drm_fb_helper_output_poll_changed,
+ .atomic_check = drm_atomic_helper_check,
+ .atomic_commit = drm_atomic_helper_commit,
};
static int armada_drm_bind(struct device *dev)
--
2.7.4
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[PATCH 00/17] Transition Armada DRM planes to atomic state
Convert Armada planes to use the transitional atomic modeset helpers. This series depends on recently previously posted Armada DRM patches, and "drm: add missing ctx argument to plane transitional helpers" in drm-misc's next branch. This is part of a larger series finishing the conversion, which is about 40 patches in total. drivers/gpu/drm/armada/Makefile | 2 +- drivers/gpu/drm/armada/armada_crtc.c| 694 ++-- drivers/gpu/drm/armada/armada_crtc.h| 28 +- drivers/gpu/drm/armada/armada_drm.h | 2 - drivers/gpu/drm/armada/armada_drv.c | 2 + drivers/gpu/drm/armada/armada_hw.h | 15 + drivers/gpu/drm/armada/armada_overlay.c | 671 -- drivers/gpu/drm/armada/armada_plane.c | 291 + drivers/gpu/drm/armada/armada_plane.h | 16 + 9 files changed, 890 insertions(+), 831 deletions(-) create mode 100644 drivers/gpu/drm/armada/armada_plane.c create mode 100644 drivers/gpu/drm/armada/armada_plane.h -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 13.8Mbps down 630kbps up According to speedtest.net: 13Mbps down 490kbps up ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 13/20] drm/armada: switch legacy modeset to atomic modeset
Switch the legacy set_config() method to use the atomic modeset
helper, which allows us to get rid of the legacy dpms, prepare,
commit, mode_set, mode_set_base and disable helper methods.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 103 +--
drivers/gpu/drm/armada/armada_crtc.h | 1 -
2 files changed, 1 insertion(+), 103 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 375a20757561..0cef40ad3a06 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -92,8 +92,6 @@ armada_drm_crtc_update_regs(struct armada_crtc *dcrtc, struct
armada_regs *regs)
}
}
-#define dpms_blanked(dpms) ((dpms) != DRM_MODE_DPMS_ON)
-
static void armada_drm_crtc_update(struct armada_crtc *dcrtc, bool enable)
{
uint32_t dumb_ctrl;
@@ -221,16 +219,6 @@ armada_drm_crtc_alloc_plane_work(struct drm_plane *plane)
return work;
}
-static void armada_drm_vblank_off(struct armada_crtc *dcrtc)
-{
- /*
-* Tell the DRM core that vblank IRQs aren't going to happen for
-* a while. This cleans up any pending vblank events for us.
-*/
- drm_crtc_vblank_off(&dcrtc->crtc);
- armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
-}
-
static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
@@ -245,71 +233,6 @@ static void armada_drm_crtc_queue_state_event(struct
drm_crtc *crtc)
}
/* The mode_config.mutex will be held for this call */
-static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms)
-{
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
-
- if (dpms_blanked(dcrtc->dpms) != dpms_blanked(dpms)) {
- if (dpms_blanked(dpms))
- armada_drm_vblank_off(dcrtc);
- else if (dcrtc->variant->enable)
- dcrtc->variant->enable(dcrtc, &crtc->hwmode);
- dcrtc->dpms = dpms;
- armada_drm_crtc_update(dcrtc, !dpms_blanked(dcrtc->dpms));
- if (!dpms_blanked(dpms))
- drm_crtc_vblank_on(&dcrtc->crtc);
- else if (dcrtc->variant->disable)
- dcrtc->variant->disable(dcrtc);
- } else if (dcrtc->dpms != dpms) {
- dcrtc->dpms = dpms;
- }
-}
-
-/*
- * Prepare for a mode set. Turn off overlay to ensure that we don't end
- * up with the overlay size being bigger than the active screen size.
- * We rely upon X refreshing this state after the mode set has completed.
- *
- * The mode_config.mutex will be held for this call
- */
-static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
-{
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- struct drm_plane *plane;
-
- /*
-* If we have an overlay plane associated with this CRTC, disable it
-* before the modeset to avoid its coordinates being outside the new
-* mode parameters. For transitional atomic modeset, we only wait.
-*/
- plane = dcrtc->plane;
- if (plane) {
- WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
- HZ));
- }
-
- /* Wait for pending flips to complete */
- armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
- MAX_SCHEDULE_TIMEOUT);
-
- drm_crtc_vblank_off(crtc);
-
- armada_updatel(0, CFG_DUMB_ENA, dcrtc->base + LCD_SPU_DUMB_CTRL);
-}
-
-/* The mode_config.mutex will be held for this call */
-static void armada_drm_crtc_commit(struct drm_crtc *crtc)
-{
- struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
-
- dcrtc->dpms = DRM_MODE_DPMS_ON;
- armada_drm_crtc_update(dcrtc, true);
- drm_crtc_vblank_on(crtc);
-
- armada_drm_crtc_queue_state_event(crtc);
-}
-
-/* The mode_config.mutex will be held for this call */
static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc,
const struct drm_display_mode *mode, struct drm_display_mode *adj)
{
@@ -532,15 +455,6 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
}
-/* The mode_config.mutex will be held for this call */
-static void armada_drm_crtc_disable(struct drm_crtc *crtc)
-{
- armada_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
-
- /* Disable our primary plane when we disable the CRTC. */
- crtc->primary->funcs->disable_plane(crtc->primary, NULL);
-}
-
static void armada_drm_crtc_atomic_begin(struct drm_crtc *crtc,
struct drm_crtc_state *old_crtc_state)
{
@@ -600,7 +514,6 @@ static void armada_drm_crtc_atomic_disable(struct drm_crtc
*crtc,
armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
[PATCH 06/17] drm/armada: reset all atomic state during driver initialisation
Reset the atomic state of any converted components during driver initialisation to ensure that we have the atomic state initialised for any component converted to atomic modeset. Signed-off-by: Russell King --- drivers/gpu/drm/armada/armada_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c index a9ee492a2810..27df48010a66 100644 --- a/drivers/gpu/drm/armada/armada_drv.c +++ b/drivers/gpu/drm/armada/armada_drv.c @@ -159,6 +159,8 @@ static int armada_drm_bind(struct device *dev) priv->drm.irq_enabled = true; + drm_mode_config_reset(&priv->drm); + ret = armada_fbdev_init(&priv->drm); if (ret) goto err_comp; -- 2.7.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 18/20] drm/armada: remove unnecessary armada_ovl_plane structure
We no longer need a private plane structure, so get rid of it. Use the
drm_plane structure directly.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 34 +
1 file changed, 9 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index ec2043b6f61f..eb7dfb65ef47 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -25,12 +25,6 @@
#define DEFAULT_SATURATION 0x4000
#define DEFAULT_ENCODING DRM_COLOR_YCBCR_BT601
-struct armada_ovl_plane {
- struct armada_plane base;
-};
-#define drm_to_armada_ovl_plane(p) \
- container_of(p, struct armada_ovl_plane, base.base)
-
struct armada_overlay_state {
struct drm_plane_state base;
u32 colorkey_yr;
@@ -301,11 +295,8 @@ armada_overlay_plane_update(struct drm_plane *plane,
struct drm_crtc *crtc,
static void armada_ovl_plane_destroy(struct drm_plane *plane)
{
- struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
-
drm_plane_cleanup(plane);
-
- kfree(dplane);
+ kfree(plane);
}
static void armada_overlay_reset(struct drm_plane *plane)
@@ -550,38 +541,31 @@ int armada_overlay_plane_create(struct drm_device *dev,
unsigned long crtcs)
{
struct armada_private *priv = dev->dev_private;
struct drm_mode_object *mobj;
- struct armada_ovl_plane *dplane;
+ struct drm_plane *overlay;
int ret;
ret = armada_overlay_create_properties(dev);
if (ret)
return ret;
- dplane = kzalloc(sizeof(*dplane), GFP_KERNEL);
- if (!dplane)
+ overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
+ if (!overlay)
return -ENOMEM;
- ret = armada_drm_plane_init(&dplane->base);
- if (ret) {
- kfree(dplane);
- return ret;
- }
-
- drm_plane_helper_add(&dplane->base.base,
-&armada_overlay_plane_helper_funcs);
+ drm_plane_helper_add(overlay, &armada_overlay_plane_helper_funcs);
- ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
+ ret = drm_universal_plane_init(dev, overlay, crtcs,
&armada_ovl_plane_funcs,
armada_ovl_formats,
ARRAY_SIZE(armada_ovl_formats),
NULL,
DRM_PLANE_TYPE_OVERLAY, NULL);
if (ret) {
- kfree(dplane);
+ kfree(overlay);
return ret;
}
- mobj = &dplane->base.base.base;
+ mobj = &overlay->base;
drm_object_attach_property(mobj, priv->colorkey_prop,
0x0101fe);
drm_object_attach_property(mobj, priv->colorkey_min_prop,
@@ -601,7 +585,7 @@ int armada_overlay_plane_create(struct drm_device *dev,
unsigned long crtcs)
drm_object_attach_property(mobj, priv->saturation_prop,
DEFAULT_SATURATION);
- ret = drm_plane_create_color_properties(&dplane->base.base,
+ ret = drm_plane_create_color_properties(overlay,
BIT(DRM_COLOR_YCBCR_BT601) |
BIT(DRM_COLOR_YCBCR_BT709),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
--
2.7.4
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[PATCH 08/17] drm/armada: convert page_flip to use primary plane atomic_update()
page_flip requests happen asynchronously, so we can't wait on the
vblank event before returning to userspace, as the transitional plane
update helper would do. Craft our own implementation that keeps the
asynchronous behaviour of this request, while making use of the atomic
infrastructure for the primary plane update.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 81
1 file changed, 55 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 523e0e8c6962..50b34f5fc97b 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -939,53 +940,81 @@ static void armada_drm_crtc_destroy(struct drm_crtc *crtc)
* and a mode_set.
*/
static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
- struct drm_framebuffer *fb, struct drm_pending_vblank_event *event,
uint32_t page_flip_flags,
- struct drm_modeset_acquire_ctx *ctx)
+ struct drm_framebuffer *fb, struct drm_pending_vblank_event *event,
+ uint32_t page_flip_flags, struct drm_modeset_acquire_ctx *ctx)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+ struct drm_plane *plane = crtc->primary;
+ const struct drm_plane_helper_funcs *plane_funcs;
+ struct drm_plane_state *state;
struct armada_plane_work *work;
- unsigned i;
int ret;
- work = armada_drm_crtc_alloc_plane_work(dcrtc->crtc.primary);
- if (!work)
+ /* Construct new state for the primary plane */
+ state = drm_atomic_helper_plane_duplicate_state(plane);
+ if (!state)
return -ENOMEM;
- work->event = event;
- work->old_fb = dcrtc->crtc.primary->fb;
+ drm_atomic_set_fb_for_plane(state, fb);
- i = armada_drm_crtc_calc_fb(fb, crtc->x, crtc->y, work->regs,
- dcrtc->interlaced);
- armada_reg_queue_end(work->regs, i);
+ work = armada_drm_crtc_alloc_plane_work(plane);
+ if (!work) {
+ ret = -ENOMEM;
+ goto put_state;
+ }
+
+ /* Make sure we can get vblank interrupts */
+ ret = drm_crtc_vblank_get(crtc);
+ if (ret)
+ goto put_work;
/*
-* Ensure that we hold a reference on the new framebuffer.
-* This has to match the behaviour in mode_set.
+* If we have another work pending, we can't process this flip.
+* The modeset locks protect us from another user queuing a work
+* while we're setting up.
*/
- drm_framebuffer_get(fb);
-
- ret = armada_drm_plane_work_queue(dcrtc, work);
- if (ret) {
- /* Undo our reference above */
- drm_framebuffer_put(fb);
- kfree(work);
- return ret;
+ if (drm_to_armada_plane(plane)->work) {
+ ret = -EBUSY;
+ goto put_vblank;
}
+ work->event = event;
+ work->old_fb = plane->state->fb;
+
/*
-* We are in transition to atomic modeset: update the atomic modeset
-* state with the new framebuffer to keep the state consistent.
+* Hold a ref on the new fb while it's being displayed by the
+* hardware. The old fb refcount will be released in the worker.
*/
- drm_framebuffer_assign(&dcrtc->crtc.primary->state->fb, fb);
+ drm_framebuffer_get(state->fb);
+
+ /* Point of no return */
+ swap(plane->state, state);
+
+ dcrtc->regs_idx = 0;
+ dcrtc->regs = work->regs;
+
+ plane_funcs = plane->helper_private;
+ plane_funcs->atomic_update(plane, state);
+ armada_reg_queue_end(dcrtc->regs, dcrtc->regs_idx);
+
+ /* Queue the work - this should never fail */
+ WARN_ON(armada_drm_plane_work_queue(dcrtc, work));
+ work = NULL;
/*
* Finally, if the display is blanked, we won't receive an
* interrupt, so complete it now.
*/
if (dpms_blanked(dcrtc->dpms))
- armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
-
- return 0;
+ armada_drm_plane_work_run(dcrtc, plane);
+
+put_vblank:
+ drm_crtc_vblank_put(crtc);
+put_work:
+ kfree(work);
+put_state:
+ drm_atomic_helper_plane_destroy_state(plane, state);
+ return ret;
}
static int
--
2.7.4
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Re: [PATCH] kernel.h: Add for_each_if()
On Tue, Jul 10 2018, Daniel Vetter wrote:
> On Mon, Jul 09, 2018 at 04:30:01PM -0700, Andrew Morton wrote:
>> On Mon, 9 Jul 2018 18:25:09 +0200 Daniel Vetter
>> wrote:
>>
>> > To avoid compilers complainig about ambigious else blocks when putting
>> > an if condition into a for_each macro one needs to invert the
>> > condition and add a dummy else. We have a nice little convenience
>> > macro for that in drm headers, let's move it out. Subsequent patches
>> > will roll it out to other places.
>> >
>> > The issue the compilers complain about are nested if with an else
>> > block and no {} to disambiguate which if the else belongs to. The C
>> > standard is clear, but in practice people forget:
>> >
>> > if (foo)
>> >if (bar)
>> >/* something */
>> >else
>> >/* something else
>>
>> um, yeah, don't do that. Kernel coding style is very much to do
>>
>> if (foo) {
>> if (bar)
>> /* something */
>> else
>> /* something else
>> }
>>
>> And if not doing that generates a warning then, well, do that.
>>
>> > The same can happen in a for_each macro when it also contains an if
>> > condition at the end, except the compiler message is now really
>> > confusing since there's only 1 if:
>> >
>> > for_each_something()
>> >if (bar)
>> >/* something */
>> >else
>> >/* something else
>> >
>> > The for_each_if() macro, by inverting the condition and adding an
>> > else, avoids the compiler warning.
>>
>> Ditto.
>>
>> > Motivated by a discussion with Andy and Yisheng, who want to add
>> > another for_each_macro which would benefit from for_each_if() instead
>> > of hand-rolling it.
>>
>> Ditto.
>>
>> > v2: Explain a bit better what this is good for, after the discussion
>> > with Peter Z.
>>
>> Presumably the above was discussed in whatever-thread-that-was.
>
> So there's a bunch of open coded versions of this already in kernel
> headers (at least the ones I've found). Not counting the big pile of
> existing users in drm. They are all wrong and should be reverted to a
> plain if? That why there's a bunch more patches in this series.
>
> And yes I made it clear in the discussion that if you sprinkle enough {}
> there's no warning, should have probably captured this here.
>
> Aka a formal Nack-pls-keep-your-stuff-in-drm: would be appreciated so I
> can stop bothering with this.
I think is it problematic to have macros like
#define for_each_foo(...) for (..) if ()
because
for_each_foo(...)
if (x) ; else ..;
is handled badly.
So in that sense, your work seems like a good thing.
However it isn't clear to me that you need a new macro.
The above macro could simply be changed to
#define for_each_foo(...) for (..) if (!);else
Clearly people don't always think to do this, but would adding a macro
help people to think?
If we were to have a macro, it isn't clear to me that for_each_if() is a
good name.
Every other macro I've seen that starts "for_each_" causes the body to
loop. This one doesn't. If someone doesn't know what for_each_if()
does and sees it in code, they are unlikely to jump to the right
conclusion.
I would suggest that "__if" would be a better choice. I think most
people would guess that means "like 'if', but a bit different", which is
fairly accurate.
I think the only sure way to avoid bad macros being written is to teach
some static checker to warn about any macro with a dangling "if".
Possibly checkpatch.pl could do that (but I'm not volunteering).
I do agree that it would be good to do something, and if people find
for_each_fi() to actually reduce the number of poorly written macros,
then I don't object to it.
Thanks,
NeilBrown
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Re: [PATCH v2 10/18] drm/sun4i: mixer: Read id from DT
Dne sreda, 11. julij 2018 ob 05:11:56 CEST je Chen-Yu Tsai napisal(a):
> On Wed, Jul 11, 2018 at 4:35 AM, Jernej Skrabec
wrote:
> > Currently, TCON supports 2 ways to match TCON with engine (mixer in this
> > case). Old way is to just traverse of graph backwards and compare node
> > pointer. New way is to match TCON and engine by their respective ids.
> > All SoCs with DE2 enabled till now used the old way, which means mixer
> > id was never used and thus never implemented.
> >
> > However, for R40, only the new way will be used. To prepare for that,
> > implement mixer id fetching from DT.
> >
> > Signed-off-by: Jernej Skrabec
> > ---
> >
> > drivers/gpu/drm/sun4i/sun8i_mixer.c | 40 +++--
> > 1 file changed, 38 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index aa81b9838ae8..4bd4d8ccb34f
> > 100644
> > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > @@ -22,6 +22,7 @@
> >
> > #include
> > #include
> > #include
> >
> > +#include
> >
> > #include
> >
> > #include "sun4i_drv.h"
> >
> > @@ -322,6 +323,42 @@ static struct regmap_config sun8i_mixer_regmap_config
> > = {>
> > .max_register = 0xbfffc, /* guessed */
> >
> > };
> >
> > +static int sun8i_mixer_of_get_id(struct device_node *node)
> > +{
> > + struct device_node *port, *ep;
> > + int ret = -EINVAL;
> > +
> > + /* output is port 1 */
> > + port = of_graph_get_port_by_id(node, 1);
> > + if (!port)
> > + return -EINVAL;
> > +
> > + /* try to find downstream endpoint */
> > + for_each_available_child_of_node(port, ep) {
> > + struct device_node *remote;
> > + u32 reg;
> > +
> > + remote = of_graph_get_remote_endpoint(ep);
> > + if (!remote)
> > + continue;
> > +
> > + ret = of_property_read_u32(remote, "reg", ®);
> > + if (!ret) {
> > + of_node_put(remote);
> > + of_node_put(ep);
> > + of_node_put(port);
> > +
> > + return reg;
> > + }
> > +
> > + of_node_put(remote);
> > + }
> > +
> > + of_node_put(port);
> > +
> > + return ret;
> > +}
> > +
>
> The above looks good.
>
> > static int sun8i_mixer_bind(struct device *dev, struct device *master,
> >
> > void *data)
> >
> > {
> >
> > @@ -353,8 +390,7 @@ static int sun8i_mixer_bind(struct device *dev, struct
> > device *master,>
> > dev_set_drvdata(dev, mixer);
> > mixer->engine.ops = &sun8i_engine_ops;
> > mixer->engine.node = dev->of_node;
> >
> > - /* The ID of the mixer currently doesn't matter */
> > - mixer->engine.id = -1;
> > + mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);
>
> Should you be handling error codes?
Sadly, no. Other supported DE2 SoC miss reg property in DT and it would break
them. Additionally, V3s has only one mixer and thus technically doesn't
violate binding with omiting mixer id.
Anyway, it was -1 all the time before and not really used, so having negative
value doesn't change anything for other SoCs. If this fails and it's needed,
it would stop at mixer <-> TCON matching stage anyway.
I guess I should add comment for that.
Best regards,
Jernej
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[PATCH 09/17] drm/armada: convert overlay plane to atomic state
The overlay plane support updates asynchronously to the request, but the
drm_plane_helper_update() transitional helper waits for a vblank event
before releasing the framebuffer. Using the transitional helper would
make the call block, which would introduce a performance regression.
Convert the overlay plane update to use the atomic state structures and
methods for the plane, but implement our own legacy update method
rather than the transitional helper.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c| 79 +-
drivers/gpu/drm/armada/armada_crtc.h| 7 ++
drivers/gpu/drm/armada/armada_overlay.c | 179
3 files changed, 145 insertions(+), 120 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 50b34f5fc97b..5bb097b75b44 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -295,19 +295,6 @@ static void armada_drm_crtc_complete_frame_work(struct
armada_crtc *dcrtc,
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
}
-static void armada_drm_crtc_complete_disable_work(struct armada_crtc *dcrtc,
- struct armada_plane_work *work)
-{
- unsigned long flags;
-
- if (dcrtc->plane == work->plane)
- dcrtc->plane = NULL;
-
- spin_lock_irqsave(&dcrtc->irq_lock, flags);
- armada_drm_crtc_update_regs(dcrtc, work->regs);
- spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
-}
-
static struct armada_plane_work *
armada_drm_crtc_alloc_plane_work(struct drm_plane *plane)
{
@@ -1080,7 +1067,7 @@ static const struct drm_crtc_funcs armada_crtc_funcs = {
.disable_vblank = armada_drm_crtc_disable_vblank,
};
-static int armada_drm_plane_prepare_fb(struct drm_plane *plane,
+int armada_drm_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
DRM_DEBUG_KMS("[PLANE:%d:%s] [FB:%d]\n",
@@ -1096,7 +1083,7 @@ static int armada_drm_plane_prepare_fb(struct drm_plane
*plane,
return 0;
}
-static void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
+void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
DRM_DEBUG_KMS("[PLANE:%d:%s] [FB:%d]\n",
@@ -1107,7 +1094,7 @@ static void armada_drm_plane_cleanup_fb(struct drm_plane
*plane,
drm_framebuffer_put(old_state->fb);
}
-static int armada_drm_plane_atomic_check(struct drm_plane *plane,
+int armada_drm_plane_atomic_check(struct drm_plane *plane,
struct drm_plane_state *state)
{
if (state->fb && !WARN_ON(!state->crtc)) {
@@ -1243,66 +1230,6 @@ static const struct drm_plane_helper_funcs
armada_primary_plane_helper_funcs = {
.atomic_disable = armada_drm_primary_plane_atomic_disable,
};
-int armada_drm_plane_disable(struct drm_plane *plane,
-struct drm_modeset_acquire_ctx *ctx)
-{
- struct armada_plane *dplane = drm_to_armada_plane(plane);
- struct armada_crtc *dcrtc;
- struct armada_plane_work *work;
- unsigned int idx = 0;
- u32 sram_para1, enable_mask;
-
- if (!plane->crtc)
- return 0;
-
- /*
-* Arrange to power down most RAMs and FIFOs if this is the primary
-* plane, otherwise just the YUV FIFOs for the overlay plane.
-*/
- if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
- sram_para1 = CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 |
-CFG_PDWN32x32 | CFG_PDWN64x66;
- enable_mask = CFG_GRA_ENA;
- } else {
- sram_para1 = CFG_PDWN16x66 | CFG_PDWN32x66;
- enable_mask = CFG_DMA_ENA;
- }
-
- dplane->state.ctrl0 &= ~enable_mask;
-
- dcrtc = drm_to_armada_crtc(plane->crtc);
-
- /*
-* Try to disable the plane and drop our ref on the framebuffer
-* at the next frame update. If we fail for any reason, disable
-* the plane immediately.
-*/
- work = &dplane->works[dplane->next_work];
- work->fn = armada_drm_crtc_complete_disable_work;
- work->cancel = armada_drm_crtc_complete_disable_work;
- work->old_fb = plane->fb;
-
- armada_reg_queue_mod(work->regs, idx,
-0, enable_mask, LCD_SPU_DMA_CTRL0);
- armada_reg_queue_mod(work->regs, idx,
-sram_para1, 0, LCD_SPU_SRAM_PARA1);
- armada_reg_queue_end(work->regs, idx);
-
- /* Wait for any preceding work to complete, but don't wedge */
- if (WARN_ON(!armada_drm_plane_work_wait(dplane, HZ)))
- armada_drm_plane_work_cancel(dcrtc, dplane);
-
- if (armada_drm_plane_work_queue(dcrtc, work)) {
- work->fn(dcrtc, work);
- if (work->old_fb)
- drm_framebuffer_unreference(work->old_fb);
- }
-
- dplane->next_work = !dplane->next_work;
-
[PATCH v2 10/18] drm/sun4i: mixer: Read id from DT
Currently, TCON supports 2 ways to match TCON with engine (mixer in this
case). Old way is to just traverse of graph backwards and compare node
pointer. New way is to match TCON and engine by their respective ids.
All SoCs with DE2 enabled till now used the old way, which means mixer
id was never used and thus never implemented.
However, for R40, only the new way will be used. To prepare for that,
implement mixer id fetching from DT.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 40 +++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index aa81b9838ae8..4bd4d8ccb34f 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun4i_drv.h"
@@ -322,6 +323,42 @@ static struct regmap_config sun8i_mixer_regmap_config = {
.max_register = 0xbfffc, /* guessed */
};
+static int sun8i_mixer_of_get_id(struct device_node *node)
+{
+ struct device_node *port, *ep;
+ int ret = -EINVAL;
+
+ /* output is port 1 */
+ port = of_graph_get_port_by_id(node, 1);
+ if (!port)
+ return -EINVAL;
+
+ /* try to find downstream endpoint */
+ for_each_available_child_of_node(port, ep) {
+ struct device_node *remote;
+ u32 reg;
+
+ remote = of_graph_get_remote_endpoint(ep);
+ if (!remote)
+ continue;
+
+ ret = of_property_read_u32(remote, "reg", ®);
+ if (!ret) {
+ of_node_put(remote);
+ of_node_put(ep);
+ of_node_put(port);
+
+ return reg;
+ }
+
+ of_node_put(remote);
+ }
+
+ of_node_put(port);
+
+ return ret;
+}
+
static int sun8i_mixer_bind(struct device *dev, struct device *master,
void *data)
{
@@ -353,8 +390,7 @@ static int sun8i_mixer_bind(struct device *dev, struct
device *master,
dev_set_drvdata(dev, mixer);
mixer->engine.ops = &sun8i_engine_ops;
mixer->engine.node = dev->of_node;
- /* The ID of the mixer currently doesn't matter */
- mixer->engine.id = -1;
+ mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);
mixer->cfg = of_device_get_match_data(dev);
if (!mixer->cfg)
--
2.18.0
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[PATCH 05/20] drm/armada: move sync signal polarity to mode_set_nofb() method
For atomic modeset, we need to set the sync signal polarities from the
CRTC state structure rather than the legacy mode structure stored in
CRTC. In any case, we should update this from our mode_set_nofb()
method, rather than the commit() method. Move it there, and ensure
that armada_drm_crtc_update() will not overwrite these bits.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 47 +---
drivers/gpu/drm/armada/armada_crtc.h | 1 -
2 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 35b2df0fc21c..3cae6587b079 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -115,25 +115,9 @@ static void armada_drm_crtc_update(struct armada_crtc
*dcrtc)
dumb_ctrl |= DUMB_BLANK;
}
- /*
-* The documentation doesn't indicate what the normal state of
-* the sync signals are. Sebastian Hesselbart kindly probed
-* these signals on his board to determine their state.
-*
-* The non-inverted state of the sync signals is active high.
-* Setting these bits makes the appropriate signal active low.
-*/
- if (dcrtc->crtc.mode.flags & DRM_MODE_FLAG_NCSYNC)
- dumb_ctrl |= CFG_INV_CSYNC;
- if (dcrtc->crtc.mode.flags & DRM_MODE_FLAG_NHSYNC)
- dumb_ctrl |= CFG_INV_HSYNC;
- if (dcrtc->crtc.mode.flags & DRM_MODE_FLAG_NVSYNC)
- dumb_ctrl |= CFG_INV_VSYNC;
-
- if (dcrtc->dumb_ctrl != dumb_ctrl) {
- dcrtc->dumb_ctrl = dumb_ctrl;
- writel_relaxed(dumb_ctrl, dcrtc->base + LCD_SPU_DUMB_CTRL);
- }
+ armada_updatel(dumb_ctrl,
+ ~(CFG_INV_CSYNC | CFG_INV_HSYNC | CFG_INV_VSYNC),
+ dcrtc->base + LCD_SPU_DUMB_CTRL);
}
static void armada_drm_plane_work_call(struct armada_crtc *dcrtc,
@@ -280,7 +264,6 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
struct drm_plane *plane;
- u32 val;
/*
* If we have an overlay plane associated with this CRTC, disable
@@ -300,11 +283,7 @@ static void armada_drm_crtc_prepare(struct drm_crtc *crtc)
drm_crtc_vblank_off(crtc);
- val = dcrtc->dumb_ctrl & ~CFG_DUMB_ENA;
- if (val != dcrtc->dumb_ctrl) {
- dcrtc->dumb_ctrl = val;
- writel_relaxed(val, dcrtc->base + LCD_SPU_DUMB_CTRL);
- }
+ armada_updatel(0, CFG_DUMB_ENA, dcrtc->base + LCD_SPU_DUMB_CTRL);
}
/* The mode_config.mutex will be held for this call */
@@ -516,6 +495,24 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
val = adj->flags & DRM_MODE_FLAG_NVSYNC ? CFG_VSYNC_INV : 0;
armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1);
+
+ /*
+* The documentation doesn't indicate what the normal state of
+* the sync signals are. Sebastian Hesselbart kindly probed
+* these signals on his board to determine their state.
+*
+* The non-inverted state of the sync signals is active high.
+* Setting these bits makes the appropriate signal active low.
+*/
+ val = 0;
+ if (adj->flags & DRM_MODE_FLAG_NCSYNC)
+ val |= CFG_INV_CSYNC;
+ if (adj->flags & DRM_MODE_FLAG_NHSYNC)
+ val |= CFG_INV_HSYNC;
+ if (adj->flags & DRM_MODE_FLAG_NVSYNC)
+ val |= CFG_INV_VSYNC;
+ armada_reg_queue_mod(regs, i, val, CFG_INV_CSYNC | CFG_INV_HSYNC |
+CFG_INV_VSYNC, LCD_SPU_DUMB_CTRL);
armada_reg_queue_end(regs, i);
armada_drm_crtc_update_regs(dcrtc, regs);
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 21338f7c3d7d..775c01c52982 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -85,7 +85,6 @@ struct armada_crtc {
int dpms;
uint32_tcfg_dumb_ctrl;
- uint32_tdumb_ctrl;
uint32_tspu_iopad_ctrl;
spinlock_t irq_lock;
--
2.7.4
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[PATCH 17/20] drm/armada: update primary framebuffer parameters on mode change
The framebuffer base address and toggling mode needs to be updated
when the interlaced flag for mode changes is updated. Arrange to
reprogram these parameters when only the mode has changed.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_plane.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index 39c9ba3ee57e..bed2dca83a37 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -184,11 +184,13 @@ static void armada_drm_primary_plane_atomic_update(struct
drm_plane *plane,
armada_reg_queue_set(regs, idx, val, LCD_SPU_GZM_HPXL_VLN);
if (old_state->src.x1 != state->src.x1 ||
old_state->src.y1 != state->src.y1 ||
- old_state->fb != state->fb) {
+ old_state->fb != state->fb ||
+ state->crtc->state->mode_changed) {
idx += armada_drm_crtc_calc_fb(state, regs + idx,
dcrtc->interlaced);
}
- if (old_state->fb != state->fb) {
+ if (old_state->fb != state->fb ||
+ state->crtc->state->mode_changed) {
cfg = CFG_GRA_FMT(drm_fb_to_armada_fb(state->fb)->fmt) |
CFG_GRA_MOD(drm_fb_to_armada_fb(state->fb)->mod);
if (drm_fb_to_armada_fb(state->fb)->fmt > CFG_420)
--
2.7.4
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[PATCH 02/17] drm/armada: add rectangle helpers
Add helpers to convert rectangle width/height and x/y to register
values.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c| 8 +++-
drivers/gpu/drm/armada/armada_hw.h | 15 +++
drivers/gpu/drm/armada/armada_overlay.c | 7 +++
3 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 78bb3d51417b..205d5dc7ba81 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -1158,11 +1158,9 @@ static void armada_drm_primary_update_state(struct
drm_plane_state *state,
0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);
dplane->state.ctrl0 = val;
- dplane->state.src_hw = (drm_rect_height(&state->src) & 0x) |
- drm_rect_width(&state->src) >> 16;
- dplane->state.dst_hw = drm_rect_height(&state->dst) << 16 |
- drm_rect_width(&state->dst);
- dplane->state.dst_yx = state->dst.y1 << 16 | state->dst.x1;
+ dplane->state.src_hw = armada_rect_hw_fp(&state->src);
+ dplane->state.dst_hw = armada_rect_hw(&state->dst);
+ dplane->state.dst_yx = armada_rect_yx(&state->dst);
armada_drm_gra_plane_regs(regs + idx, &dfb->fb, &dplane->state,
state->src.x1 >> 16, state->src.y1 >> 16,
diff --git a/drivers/gpu/drm/armada/armada_hw.h
b/drivers/gpu/drm/armada/armada_hw.h
index 345dc4d0851e..277580b36758 100644
--- a/drivers/gpu/drm/armada/armada_hw.h
+++ b/drivers/gpu/drm/armada/armada_hw.h
@@ -316,4 +316,19 @@ enum {
PWRDN_IRQ_LEVEL = 1 << 0,
};
+static inline u32 armada_rect_hw_fp(struct drm_rect *r)
+{
+ return (drm_rect_height(r) & 0x) | drm_rect_width(r) >> 16;
+}
+
+static inline u32 armada_rect_hw(struct drm_rect *r)
+{
+ return drm_rect_height(r) << 16 | (drm_rect_width(r) & 0x);
+}
+
+static inline u32 armada_rect_yx(struct drm_rect *r)
+{
+ return (r)->y1 << 16 | ((r)->x1 & 0x);
+}
+
#endif
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index afa7ded3ae31..2347811ccf1b 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -146,22 +146,21 @@ static void armada_ovl_plane_update_state(struct
drm_plane_state *state,
LCD_SPU_DMA_PITCH_UV);
}
- val = (drm_rect_height(&state->src) & 0x) |
- drm_rect_width(&state->src) >> 16;
+ val = armada_rect_hw_fp(&state->src);
if (dplane->base.state.src_hw != val) {
dplane->base.state.src_hw = val;
armada_reg_queue_set(regs, idx, val,
LCD_SPU_DMA_HPXL_VLN);
}
- val = drm_rect_height(&state->dst) << 16 | drm_rect_width(&state->dst);
+ val = armada_rect_hw(&state->dst);
if (dplane->base.state.dst_hw != val) {
dplane->base.state.dst_hw = val;
armada_reg_queue_set(regs, idx, val,
LCD_SPU_DZM_HPXL_VLN);
}
- val = state->dst.y1 << 16 | state->dst.x1;
+ val = armada_rect_yx(&state->dst);
if (dplane->base.state.dst_yx != val) {
dplane->base.state.dst_yx = val;
armada_reg_queue_set(regs, idx, val,
--
2.7.4
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[PATCH 06/20] drm/armada: update debug in armada_drm_crtc_mode_set_nofb()
Update debug to use KMS level, and print the mode using the standard
format for mode lines, but print the adjusted CRTC parameters as
that's what we will be programming for.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 3cae6587b079..9ad966caf08c 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -426,16 +426,15 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
bm = adj->crtc_vsync_start - adj->crtc_vdisplay;
tm = adj->crtc_vtotal - adj->crtc_vsync_end;
- DRM_DEBUG_DRIVER("H: %d %d %d %d lm %d rm %d\n",
- adj->crtc_hdisplay,
- adj->crtc_hsync_start,
- adj->crtc_hsync_end,
- adj->crtc_htotal, lm, rm);
- DRM_DEBUG_DRIVER("V: %d %d %d %d tm %d bm %d\n",
- adj->crtc_vdisplay,
- adj->crtc_vsync_start,
- adj->crtc_vsync_end,
- adj->crtc_vtotal, tm, bm);
+ DRM_DEBUG_KMS("[CRTC:%d:%s] mode " DRM_MODE_FMT "\n",
+ crtc->base.id, crtc->name,
+ adj->base.id, adj->name, adj->vrefresh, adj->clock,
+ adj->crtc_hdisplay, adj->crtc_hsync_start,
+ adj->crtc_hsync_end, adj->crtc_htotal,
+ adj->crtc_vdisplay, adj->crtc_vsync_start,
+ adj->crtc_vsync_end, adj->crtc_vtotal,
+ adj->type, adj->flags);
+ DRM_DEBUG_KMS("lm %d rm %d tm %d bm %d\n", lm, rm, tm, bm);
/*
* If we are blanked, we would have disabled the clock. Re-enable
--
2.7.4
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[PATCH v2 18/18] dt-bindings: display: sun4i-drm: Fix order of DW HDMI PHY compatibles
They are currently sorted alphabetically. However, they should be sorted
by release date of the family and then alphabetically.
Fixes: 03c35dbf73e0 ("dt-bindings: display: sun4i-drm: Add description of A64
HDMI PHY")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 7e2451396a28..f8773ecb7525 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -101,9 +101,9 @@ DWC HDMI PHY
Required properties:
- compatible: value must be one of:
-* allwinner,sun50i-a64-hdmi-phy
* allwinner,sun8i-a83t-hdmi-phy
* allwinner,sun8i-h3-hdmi-phy
+* allwinner,sun50i-a64-hdmi-phy
- reg: base address and size of memory-mapped region
- clocks: phandles to the clocks feeding the HDMI PHY
* bus: the HDMI PHY interface clock
--
2.18.0
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[PATCH 07/20] drm/armada: clean up SPU_ADV_REG
Rather than writing all bits of SPU_ADV_REG on modeset, only write
what we need to change, and initialise the register in the variant
initialisation.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_510.c | 5 -
drivers/gpu/drm/armada/armada_crtc.c | 11 ---
drivers/gpu/drm/armada/armada_drm.h | 1 -
3 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_510.c
b/drivers/gpu/drm/armada/armada_510.c
index 41a784f5a5e6..9a4fbb6a24b8 100644
--- a/drivers/gpu/drm/armada/armada_510.c
+++ b/drivers/gpu/drm/armada/armada_510.c
@@ -27,6 +27,10 @@ static int armada510_crtc_init(struct armada_crtc *dcrtc,
struct device *dev)
/* Lower the watermark so to eliminate jitter at higher bandwidths */
armada_updatel(0x20, (1 << 11) | 0xff, dcrtc->base + LCD_CFG_RDREG4F);
+ /* Initialise SPU register */
+ writel_relaxed(ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND,
+ dcrtc->base + LCD_SPU_ADV_REG);
+
return 0;
}
@@ -77,7 +81,6 @@ static int armada510_crtc_compute_clock(struct armada_crtc
*dcrtc,
const struct armada_variant armada510_ops = {
.has_spu_adv_reg = true,
- .spu_adv_reg = ADV_HWC32ENABLE | ADV_HWC32ARGB | ADV_HWC32BLEND,
.init = armada510_crtc_init,
.compute_clock = armada510_crtc_compute_clock,
};
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 9ad966caf08c..80d34a4b7d41 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -463,17 +463,15 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
adj->crtc_htotal;
dcrtc->v[1].spu_v_porch = tm << 16 | bm;
val = adj->crtc_hsync_start;
- dcrtc->v[1].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN |
- dcrtc->variant->spu_adv_reg;
+ dcrtc->v[1].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN;
if (interlaced) {
/* Odd interlaced frame */
+ val -= adj->crtc_htotal / 2;
+ dcrtc->v[0].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN;
dcrtc->v[0].spu_v_h_total = dcrtc->v[1].spu_v_h_total +
(1 << 16);
dcrtc->v[0].spu_v_porch = dcrtc->v[1].spu_v_porch + 1;
- val = adj->crtc_hsync_start - adj->crtc_htotal / 2;
- dcrtc->v[0].spu_adv_reg = val << 20 | val | ADV_VSYNCOFFEN |
- dcrtc->variant->spu_adv_reg;
} else {
dcrtc->v[0] = dcrtc->v[1];
}
@@ -486,11 +484,10 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_h_total,
LCD_SPUT_V_H_TOTAL);
- if (dcrtc->variant->has_spu_adv_reg) {
+ if (dcrtc->variant->has_spu_adv_reg)
armada_reg_queue_mod(regs, i, dcrtc->v[0].spu_adv_reg,
ADV_VSYNC_L_OFF | ADV_VSYNC_H_OFF |
ADV_VSYNCOFFEN, LCD_SPU_ADV_REG);
- }
val = adj->flags & DRM_MODE_FLAG_NVSYNC ? CFG_VSYNC_INV : 0;
armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1);
diff --git a/drivers/gpu/drm/armada/armada_drm.h
b/drivers/gpu/drm/armada/armada_drm.h
index 64f1c8836078..a6f919b0084c 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -42,7 +42,6 @@ struct armada_private;
struct armada_variant {
bool has_spu_adv_reg;
- uint32_t spu_adv_reg;
int (*init)(struct armada_crtc *, struct device *);
int (*compute_clock)(struct armada_crtc *,
const struct drm_display_mode *,
--
2.7.4
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[PATCH 08/20] drm/armada: handle atomic modeset crtc events
Prepare handling for atomic modeset CRTC events. Currently, using the
transition helpers, CRTC events do not exist, but once we switch to
proper atomic modeset, they have to be handled.
We queue an event for the next vblank in two places:
- armada_drm_crtc_atomic_flush() provided we aren't doing an
atomic modeset.
- armada_drm_crtc_commit() if we are committing a modeset.
This ensures that the event is sent at the correct time (after all
updates have been written to the hardware and after the following
vblank.)
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 33 +
drivers/gpu/drm/armada/armada_crtc.h | 1 +
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 80d34a4b7d41..a0c67ec892cf 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -232,6 +232,19 @@ static void armada_drm_vblank_off(struct armada_crtc
*dcrtc)
armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
}
+static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc)
+{
+ struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+ struct drm_pending_vblank_event *event;
+
+ /* If we have an event, we need vblank events enabled */
+ event = xchg(&crtc->state->event, NULL);
+ if (event) {
+ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
+ dcrtc->event = event;
+ }
+}
+
/* The mode_config.mutex will be held for this call */
static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms)
{
@@ -294,6 +307,8 @@ static void armada_drm_crtc_commit(struct drm_crtc *crtc)
dcrtc->dpms = DRM_MODE_DPMS_ON;
armada_drm_crtc_update(dcrtc);
drm_crtc_vblank_on(crtc);
+
+ armada_drm_crtc_queue_state_event(crtc);
}
/* The mode_config.mutex will be held for this call */
@@ -337,6 +352,7 @@ static void armada_drm_crtc_enable_irq(struct armada_crtc
*dcrtc, u32 mask)
static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat)
{
+ struct drm_pending_vblank_event *event;
void __iomem *base = dcrtc->base;
struct drm_plane *ovl_plane;
@@ -383,6 +399,16 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc,
u32 stat)
if (stat & GRA_FRAME_IRQ)
armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
+
+ if (stat & VSYNC_IRQ) {
+ event = xchg(&dcrtc->event, NULL);
+ if (event) {
+ spin_lock(&dcrtc->crtc.dev->event_lock);
+ drm_crtc_send_vblank_event(&dcrtc->crtc, event);
+ spin_unlock(&dcrtc->crtc.dev->event_lock);
+ drm_crtc_vblank_put(&dcrtc->crtc);
+ }
+ }
}
static irqreturn_t armada_drm_irq(int irq, void *arg)
@@ -554,6 +580,13 @@ static void armada_drm_crtc_atomic_flush(struct drm_crtc
*crtc,
spin_lock_irqsave(&dcrtc->irq_lock, flags);
armada_drm_crtc_update_regs(dcrtc, dcrtc->regs);
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
+
+ /*
+* If we aren't doing a full modeset, then we need to queue
+* the event here.
+*/
+ if (!drm_atomic_crtc_needs_modeset(crtc->state))
+ armada_drm_crtc_queue_state_event(crtc);
}
static const struct drm_crtc_helper_funcs armada_crtc_helper_funcs = {
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 775c01c52982..8b1de877cb02 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -90,6 +90,7 @@ struct armada_crtc {
spinlock_t irq_lock;
uint32_tirq_ena;
+ struct drm_pending_vblank_event *event;
struct armada_regs atomic_regs[32];
struct armada_regs *regs;
unsigned intregs_idx;
--
2.7.4
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[PATCH 07/17] drm/armada: convert primary plane to atomic state
Convert the primary plane as a whole to use its atomic state and the
transitional helpers. The CRTC is also switched to use the transitional
helpers for mode_set() and mode_set_base().
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 308 +--
drivers/gpu/drm/armada/armada_crtc.h | 8 +-
2 files changed, 157 insertions(+), 159 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 735abdab9754..523e0e8c6962 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -325,38 +325,6 @@ armada_drm_crtc_alloc_plane_work(struct drm_plane *plane)
return work;
}
-static void armada_drm_crtc_finish_fb(struct armada_crtc *dcrtc,
- struct drm_framebuffer *fb, bool force)
-{
- struct armada_plane_work *work;
-
- if (!fb)
- return;
-
- if (force) {
- /* Display is disabled, so just drop the old fb */
- drm_framebuffer_put(fb);
- return;
- }
-
- work = armada_drm_crtc_alloc_plane_work(dcrtc->crtc.primary);
- if (work) {
- work->old_fb = fb;
-
- if (armada_drm_plane_work_queue(dcrtc, work) == 0)
- return;
-
- kfree(work);
- }
-
- /*
-* Oops - just drop the reference immediately and hope for
-* the best. The worst that will happen is the buffer gets
-* reused before it has finished being displayed.
-*/
- drm_framebuffer_put(fb);
-}
-
static void armada_drm_vblank_off(struct armada_crtc *dcrtc)
{
/*
@@ -434,9 +402,6 @@ static void armada_drm_crtc_commit(struct drm_crtc *crtc)
dcrtc->dpms = DRM_MODE_DPMS_ON;
armada_drm_crtc_update(dcrtc);
drm_crtc_vblank_on(crtc);
-
- if (dcrtc->old_modeset_fb)
- armada_drm_crtc_finish_fb(dcrtc, dcrtc->old_modeset_fb, false);
}
/* The mode_config.mutex will be held for this call */
@@ -588,27 +553,16 @@ static uint32_t armada_drm_crtc_calculate_csc(struct
armada_crtc *dcrtc)
return val;
}
-static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
- struct drm_framebuffer *old_fb);
-
/* The mode_config.mutex will be held for this call */
-static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
- struct drm_display_mode *mode, struct drm_display_mode *adj,
- int x, int y, struct drm_framebuffer *old_fb)
+static void armada_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
+ struct drm_display_mode *adj = &crtc->state->adjusted_mode;
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
struct armada_regs regs[17];
uint32_t lm, rm, tm, bm, val, sclk;
unsigned long flags;
unsigned i;
- bool interlaced;
-
- /* Take a reference on the old fb for armada_drm_crtc_commit() */
- if (old_fb)
- drm_framebuffer_get(old_fb);
- dcrtc->old_modeset_fb = old_fb;
-
- interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
+ bool interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
i = 0;
rm = adj->crtc_hsync_start - adj->crtc_hdisplay;
@@ -692,35 +646,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
armada_drm_crtc_update_regs(dcrtc, regs);
spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
-
- return armada_drm_crtc_mode_set_base(crtc, x, y, old_fb);
-}
-
-static int armada_drm_do_primary_update(struct drm_plane *plane,
- struct drm_plane_state *state, struct drm_framebuffer *old_fb);
-
-/* The mode_config.mutex will be held for this call */
-static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
- struct drm_framebuffer *old_fb)
-{
- struct drm_plane_state state = {
- .plane = crtc->primary,
- .crtc = crtc,
- .fb = crtc->primary->fb,
- .crtc_x = 0,
- .crtc_y = 0,
- .crtc_w = crtc->mode.hdisplay,
- .crtc_h = crtc->mode.vdisplay,
- .src_x = x << 16,
- .src_y = y << 16,
- .src_w = crtc->mode.hdisplay << 16,
- .src_h = crtc->mode.vdisplay << 16,
- .rotation = DRM_MODE_ROTATE_0,
- };
-
- armada_drm_do_primary_update(crtc->primary, &state, old_fb);
-
- return 0;
}
/* The mode_config.mutex will be held for this call */
@@ -732,14 +657,49 @@ static void armada_drm_crtc_disable(struct drm_crtc *crtc)
crtc->primary->funcs->disable_plane(crtc->primary, NULL);
}
+static void armada_drm_crtc_atomic_begin(struct drm_crtc *crtc,
+struct drm_crtc_state *old_crtc_state)
+{
+ struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+ struct armada_plane *dplane;
+
+ DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base
[PATCH 13/17] drm/armada: move plane works to overlay
Only overlay makes use of these now, so move these to the overlay code.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.h| 2 --
drivers/gpu/drm/armada/armada_overlay.c | 12
drivers/gpu/drm/armada/armada_plane.c | 6 --
3 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 2672c5cc0e45..73ddd7d61eb4 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -48,8 +48,6 @@ struct armada_plane_work {
struct armada_plane {
struct drm_planebase;
wait_queue_head_t frame_wait;
- boolnext_work;
- struct armada_plane_work works[2];
struct armada_plane_work *work;
};
#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index 214b2171a8f4..40868e485ae8 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -36,6 +36,8 @@ struct armada_ovl_plane_properties {
struct armada_ovl_plane {
struct armada_plane base;
+ struct armada_plane_work works[2];
+ bool next_work;
bool wait_vblank;
struct armada_ovl_plane_properties prop;
};
@@ -245,7 +247,7 @@ static int armada_overlay_commit(struct drm_plane *plane,
if (ret)
goto put_state;
- work = &dplane->base.works[dplane->base.next_work];
+ work = &dplane->works[dplane->next_work];
if (plane->state->fb != state->fb) {
/*
@@ -295,7 +297,7 @@ static int armada_overlay_commit(struct drm_plane *plane,
ret = 0;
}
- dplane->base.next_work = !dplane->base.next_work;
+ dplane->next_work = !dplane->next_work;
put_state:
drm_atomic_helper_plane_destroy_state(plane, state);
@@ -515,8 +517,10 @@ int armada_overlay_plane_create(struct drm_device *dev,
unsigned long crtcs)
return ret;
}
- dplane->base.works[0].fn = armada_ovl_plane_work;
- dplane->base.works[1].fn = armada_ovl_plane_work;
+ dplane->works[0].plane = &dplane->base.base;
+ dplane->works[0].fn = armada_ovl_plane_work;
+ dplane->works[1].plane = &dplane->base.base;
+ dplane->works[1].fn = armada_ovl_plane_work;
drm_plane_helper_add(&dplane->base.base,
&armada_overlay_plane_helper_funcs);
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index 9d1eec1dc720..1cb6a605bda9 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -264,13 +264,7 @@ static const struct drm_plane_funcs
armada_primary_plane_funcs = {
int armada_drm_plane_init(struct armada_plane *plane)
{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(plane->works); i++)
- plane->works[i].plane = &plane->base;
-
init_waitqueue_head(&plane->frame_wait);
-
return 0;
}
--
2.7.4
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[PATCH v2 06/18] dt-bindings: display: sun4i-drm: Add R40 TV TCON description
TCON description is expanded with R40 TV TCON compatible. It is a bit special, because it is connected to TCON TOP instead directly to mixer and it needs special handling. Reviewed-by: Chen-Yu Tsai Acked-by: Rob Herring Signed-off-by: Jernej Skrabec --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 288b4cbc255e..7e2451396a28 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -147,6 +147,7 @@ Required properties: * allwinner,sun8i-a33-tcon * allwinner,sun8i-a83t-tcon-lcd * allwinner,sun8i-a83t-tcon-tv + * allwinner,sun8i-r40-tcon-tv * allwinner,sun8i-v3s-tcon * allwinner,sun9i-a80-tcon-lcd * allwinner,sun9i-a80-tcon-tv @@ -181,7 +182,7 @@ For TCONs with channel 0, there is one more clock required: For TCONs with channel 1, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 -When TCON support LVDS (all TCONs except TV TCON on A83T and those found +When TCON support LVDS (all TCONs except TV TCONs on A83T, R40 and those found in A13, H3, H5 and V3s SoCs), you need one more reset line: - 'lvds': The reset line driving the LVDS logic -- 2.18.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/tinydrm: Fix doc build warnings
On Tue, Jul 10, 2018 at 06:31:15PM +0200, Noralf Trønnes wrote:
>
> Den 10.07.2018 18.18, skrev David Lechner:
> > On 07/10/2018 10:05 AM, Noralf Trønnes wrote:
> > > include/drm/tinydrm/tinydrm.h:34: warning: Function parameter or
> > > member 'fb_dirty' not described in 'tinydrm_device'
> > > drivers/gpu/drm/tinydrm/mipi-dbi.c:272: warning: Function parameter
> > > or member 'crtc_state' not described in 'mipi_dbi_enable_flush'
> > > drivers/gpu/drm/tinydrm/mipi-dbi.c:272: warning: Function parameter
> > > or member 'plane_state' not described in 'mipi_dbi_enable_flush'
> > >
> > > Move struct member docs inline so it's not missed next time.
> > >
> > > Cc: David Lechner
> > > Signed-off-by: Noralf Trønnes
> > > ---
> > > drivers/gpu/drm/tinydrm/mipi-dbi.c | 2 ++
> > > include/drm/tinydrm/tinydrm.h | 23 +++
> > > 2 files changed, 21 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c
> > > b/drivers/gpu/drm/tinydrm/mipi-dbi.c
> > > index 4d1fb31a781f..cb3441e51d5f 100644
> > > --- a/drivers/gpu/drm/tinydrm/mipi-dbi.c
> > > +++ b/drivers/gpu/drm/tinydrm/mipi-dbi.c
> > > @@ -260,6 +260,8 @@ static const struct drm_framebuffer_funcs
> > > mipi_dbi_fb_funcs = {
> > > /**
> > > * mipi_dbi_enable_flush - MIPI DBI enable helper
> > > * @mipi: MIPI DBI structure
> > > + * @crtc_state: CRTC state
> > > + * @plane_state: Plane state
> > > *
> > > * This function sets &mipi_dbi->enabled, flushes the whole
> > > framebuffer and
> > > * enables the backlight. Drivers can use this in their
> > > diff --git a/include/drm/tinydrm/tinydrm.h
> > > b/include/drm/tinydrm/tinydrm.h
> > > index 56e4a916b5e8..fe9827d0ca8a 100644
> > > --- a/include/drm/tinydrm/tinydrm.h
> > > +++ b/include/drm/tinydrm/tinydrm.h
> > > @@ -16,16 +16,31 @@
> > > /**
> > > * struct tinydrm_device - tinydrm device
> > > - * @drm: DRM device
> > > - * @pipe: Display pipe structure
> > > - * @dirty_lock: Serializes framebuffer flushing
> > > - * @fb_funcs: Framebuffer functions used when creating framebuffers
> > > */
> > > struct tinydrm_device {
> > > + /**
> > > + * @drm: DRM device
> > > + */
> > > struct drm_device *drm;
> > > +
> > > + /**
> > > + * @pipe: Display pipe structure
> > > + */
> > > struct drm_simple_display_pipe pipe;
> > > +
> > > + /**
> > > + * @dirty_lock: Serializes framebuffer flushing
> > > + */
> > > struct mutex dirty_lock;
> > > +
> > > + /**
> > > + * @fb_funcs: Framebuffer functions used when creating framebuffers
> > > + */
> > > const struct drm_framebuffer_funcs *fb_funcs;
> > > +
> > > + /**
> > > + * @fb_dirty: Framebuffer dirty callback
> > > + */
> > > int (*fb_dirty)(struct drm_framebuffer *framebuffer,
> > > struct drm_file *file_priv, unsigned flags,
> > > unsigned color, struct drm_clip_rect *clips,
> > >
> >
> > I assume the kerneldoc parser know how to handle this?
> >
>
> This? What are you referring to?
>
> This is how I build the documentation: make DOCBOOKS="" htmldocs
Fyi DOCBOOKS="" no longer needed since all the old docbook stuff is gone.
-Daniel
--
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 1/3 v4] ARM: dts: Modernize the Vexpress PL111 integration
On 09/07/18 08:52, Linus Walleij wrote: > The Versatile Express was submitted with the actual display > bridges unconnected (but defined in the device tree) and > mock "panels" encoded in the device tree node of the PL111 > controller. > > This doesn't even remotely describe the actual Versatile > Express hardware. Exploit the SiI9022 bridge by connecting > the PL111 pads to it, making it use EDID or fallback values > to drive the monitor. > > The also has to use the reserved memory through the > CMA pool rather than by open coding a memory region and > remapping it explicitly in the driver. To achieve this, > a reserved-memory node must exist in the root of the > device tree, so we need to pull that out of the > motherboard .dtsi include files, and push it into each > top-level device tree instead. > > We do the same manouver for all the Versatile Express > boards, taking into account the different location of the > video RAM depending on which chip select is used on > each platform. > > This plays nicely with the new PL111 DRM driver and > follows the standard ways of assigning bridges and > memory pools for graphics. > > Cc: Sudeep Holla > Cc: Lorenzo Pieralisi > Cc: Liviu Dudau > Cc: Mali DP Maintainers > Cc: Robin Murphy > Signed-off-by: Linus Walleij > --- > ChangeLog v3->v4: > - Fix the ARM and ARM64 shared vexpress-v2m-rc1.dtsi > file address-cells etc so that the ports do not give > DTC warnings anymore. Still get below warnings, not sure if I need to upgrade my DTC ? vexpress-v2f-1xv7-ca53x2.dtb: Warning (graph_child_address): /smb@800/motherboard/iofpga@3,/i2c@16/dvi-transmitter@39/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary rtsm_ve-aemv8a.dtb: Warning (graph_child_address): /smb@800/motherboard/iofpga@3,/i2c@16/dvi-transmitter@39/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary > - Fixed up the CA53 DTS: use the right chip select base > at 0x1800. I really hate this as it make maintenance difficult, but I don't have good alternative, so I am fine as it is for now :) > - Fixed up the Real-Time Systems Models Virtual Executive > RTSMv8 AEM VE: > - Added the I2C interface (whether implemented in the > emulator or not) It doesn't work. This change is breaking the working CLCD on the models. I just tested and CLCD driver returns > - Fixed the chip select of the memory node to the right > memory base 0x1800. See, this keeps happening. Anyways I think you can drop RTSM changes if models don't support I2C and DVI. Liviu, As you deal with DRM drivers and I have no knowledge in that domain, I want to hear your feedback or Ack/Review ? -- -- Regards, Sudeep ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 02/18] drm/sun4i: Add R40 display engine compatible
R40 has versatile display pipeline. It supports two simultanious outputs
on various outputs (TVE, VGA, HDMI, MIPI DSI, LCD).
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 6ddf4eaccb40..a15feb807393 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -417,6 +417,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
{ .compatible = "allwinner,sun8i-a33-display-engine" },
{ .compatible = "allwinner,sun8i-a83t-display-engine" },
{ .compatible = "allwinner,sun8i-h3-display-engine" },
+ { .compatible = "allwinner,sun8i-r40-display-engine" },
{ .compatible = "allwinner,sun8i-v3s-display-engine" },
{ .compatible = "allwinner,sun9i-a80-display-engine" },
{ }
--
2.18.0
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Re: [PATCH 1/4] drm/vkms: Add functions to map GEM backing storage
On Tue, Jul 10, 2018 at 09:12:36AM +0100, Chris Wilson wrote:
> Quoting Haneen Mohammed (2018-07-09 16:44:26)
> > +struct page **get_pages(struct vkms_gem_object *vkms_obj)
> > +{
> > + struct drm_gem_object *gem_obj = &vkms_obj->gem;
> > + struct page **pages = vkms_obj->pages;
> > +
> > + if (!pages) {
> > + mutex_lock(&vkms_obj->pages_lock);
> > + pages = drm_gem_get_pages(gem_obj);
> > + if (IS_ERR(pages)) {
> > + mutex_unlock(&vkms_obj->pages_lock);
> > + return pages;
> > + }
> > +
> > + vkms_obj->pages = pages;
> > + mutex_unlock(&vkms_obj->pages_lock);
>
> You have a race here with two callers setting pages. Trivially you fix
> it by checking if (!pages) again inside the lock, but the lock is
> superfluous in this case:
> if (!vkms_obj->pages) {
> srtuct pages **pages;
>
> pages = drm_gem_get_pages(gem_obj);
> if (IS_ERR(pages))
> return pages;
>
> if (cmpxchg(&vkms_obj->pages, NULL, pages))
> put_pages(pages);
>
> /* barrier() is implied */
> }
>
> return vkms_obj->pages;
> -Chris
Thank you for the feedback!
- Haneen
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[PATCH 16/20] drm/armada: update planes after the dumb frame is complete
Write out the plane updates after the dumb frame has completed, but
just before the blank period. This allows all the plane updates to
be performed in a flicker-free non-tearing manner.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 46 +---
drivers/gpu/drm/armada/armada_crtc.h | 1 +
2 files changed, 28 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index ebcb99316c94..bb1e13b4516b 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -197,21 +197,27 @@ static void armada_drm_crtc_irq(struct armada_crtc
*dcrtc, u32 stat)
writel_relaxed(val, base + LCD_SPU_ADV_REG);
}
- if (stat & DUMB_FRAMEDONE && dcrtc->cursor_update) {
- writel_relaxed(dcrtc->cursor_hw_pos,
- base + LCD_SPU_HWC_OVSA_HPXL_VLN);
- writel_relaxed(dcrtc->cursor_hw_sz,
- base + LCD_SPU_HWC_HPXL_VLN);
- armada_updatel(CFG_HWC_ENA,
- CFG_HWC_ENA | CFG_HWC_1BITMOD | CFG_HWC_1BITENA,
- base + LCD_SPU_DMA_CTRL0);
- dcrtc->cursor_update = false;
+ if (stat & dcrtc->irq_ena & DUMB_FRAMEDONE) {
+ if (dcrtc->update_pending) {
+ armada_drm_crtc_update_regs(dcrtc, dcrtc->regs);
+ dcrtc->update_pending = false;
+ }
+ if (dcrtc->cursor_update) {
+ writel_relaxed(dcrtc->cursor_hw_pos,
+ base + LCD_SPU_HWC_OVSA_HPXL_VLN);
+ writel_relaxed(dcrtc->cursor_hw_sz,
+ base + LCD_SPU_HWC_HPXL_VLN);
+ armada_updatel(CFG_HWC_ENA,
+ CFG_HWC_ENA | CFG_HWC_1BITMOD |
+ CFG_HWC_1BITENA,
+ base + LCD_SPU_DMA_CTRL0);
+ dcrtc->cursor_update = false;
+ }
armada_drm_crtc_disable_irq(dcrtc, DUMB_FRAMEDONE_ENA);
}
-
spin_unlock(&dcrtc->irq_lock);
- if (stat & VSYNC_IRQ) {
+ if (stat & VSYNC_IRQ && !dcrtc->update_pending) {
event = xchg(&dcrtc->event, NULL);
if (event) {
spin_lock(&dcrtc->crtc.dev->event_lock);
@@ -360,22 +366,26 @@ static void armada_drm_crtc_atomic_flush(struct drm_crtc
*crtc,
struct drm_crtc_state *old_crtc_state)
{
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
- unsigned long flags;
DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
armada_reg_queue_end(dcrtc->regs, dcrtc->regs_idx);
- spin_lock_irqsave(&dcrtc->irq_lock, flags);
- armada_drm_crtc_update_regs(dcrtc, dcrtc->regs);
- spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
-
/*
* If we aren't doing a full modeset, then we need to queue
* the event here.
*/
- if (!drm_atomic_crtc_needs_modeset(crtc->state))
+ if (!drm_atomic_crtc_needs_modeset(crtc->state)) {
+ dcrtc->update_pending = true;
armada_drm_crtc_queue_state_event(crtc);
+ spin_lock_irq(&dcrtc->irq_lock);
+ armada_drm_crtc_enable_irq(dcrtc, DUMB_FRAMEDONE_ENA);
+ spin_unlock_irq(&dcrtc->irq_lock);
+ } else {
+ spin_lock_irq(&dcrtc->irq_lock);
+ armada_drm_crtc_update_regs(dcrtc, dcrtc->regs);
+ spin_unlock_irq(&dcrtc->irq_lock);
+ }
}
static void armada_drm_crtc_atomic_disable(struct drm_crtc *crtc,
@@ -532,7 +542,6 @@ static int armada_drm_crtc_cursor_update(struct armada_crtc
*dcrtc, bool reload)
if (!dcrtc->cursor_obj || !h || !w) {
spin_lock_irq(&dcrtc->irq_lock);
- armada_drm_crtc_disable_irq(dcrtc, DUMB_FRAMEDONE_ENA);
dcrtc->cursor_update = false;
armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0);
spin_unlock_irq(&dcrtc->irq_lock);
@@ -556,7 +565,6 @@ static int armada_drm_crtc_cursor_update(struct armada_crtc
*dcrtc, bool reload)
if (dcrtc->cursor_hw_sz != (h << 16 | w)) {
spin_lock_irq(&dcrtc->irq_lock);
- armada_drm_crtc_disable_irq(dcrtc, DUMB_FRAMEDONE_ENA);
dcrtc->cursor_update = false;
armada_updatel(0, CFG_HWC_ENA, dcrtc->base + LCD_SPU_DMA_CTRL0);
spin_unlock_irq(&dcrtc->irq_lock);
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index 5b607d45f469..b95ea13d0705 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -70,6 +70,
[PATCH 09/20] drm/armada: push responsibility for clock management to backend
Push responsibility for managing the clock during DPMS down into the
variant backend, rather than the CRTC layer having knowledge of its
state.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_510.c | 19 +++
drivers/gpu/drm/armada/armada_crtc.c | 19 ++-
drivers/gpu/drm/armada/armada_drm.h | 2 ++
3 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_510.c
b/drivers/gpu/drm/armada/armada_510.c
index 9a4fbb6a24b8..2f7c048c5361 100644
--- a/drivers/gpu/drm/armada/armada_510.c
+++ b/drivers/gpu/drm/armada/armada_510.c
@@ -79,8 +79,27 @@ static int armada510_crtc_compute_clock(struct armada_crtc
*dcrtc,
return 0;
}
+static void armada510_crtc_disable(struct armada_crtc *dcrtc)
+{
+ if (!IS_ERR(dcrtc->clk)) {
+ clk_disable_unprepare(dcrtc->clk);
+ dcrtc->clk = ERR_PTR(-EINVAL);
+ }
+}
+
+static void armada510_crtc_enable(struct armada_crtc *dcrtc,
+ const struct drm_display_mode *mode)
+{
+ if (IS_ERR(dcrtc->clk)) {
+ dcrtc->clk = dcrtc->extclk[0];
+ WARN_ON(clk_prepare_enable(dcrtc->clk));
+ }
+}
+
const struct armada_variant armada510_ops = {
.has_spu_adv_reg = true,
.init = armada510_crtc_init,
.compute_clock = armada510_crtc_compute_clock,
+ .disable = armada510_crtc_disable,
+ .enable = armada510_crtc_enable,
};
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index a0c67ec892cf..5d8fdcda27ee 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -253,14 +253,14 @@ static void armada_drm_crtc_dpms(struct drm_crtc *crtc,
int dpms)
if (dpms_blanked(dcrtc->dpms) != dpms_blanked(dpms)) {
if (dpms_blanked(dpms))
armada_drm_vblank_off(dcrtc);
- else if (!IS_ERR(dcrtc->clk))
- WARN_ON(clk_prepare_enable(dcrtc->clk));
+ else if (dcrtc->variant->enable)
+ dcrtc->variant->enable(dcrtc, &crtc->hwmode);
dcrtc->dpms = dpms;
armada_drm_crtc_update(dcrtc);
if (!dpms_blanked(dpms))
drm_crtc_vblank_on(&dcrtc->crtc);
- else if (!IS_ERR(dcrtc->clk))
- clk_disable_unprepare(dcrtc->clk);
+ else if (dcrtc->variant->disable)
+ dcrtc->variant->disable(dcrtc);
} else if (dcrtc->dpms != dpms) {
dcrtc->dpms = dpms;
}
@@ -462,13 +462,6 @@ static void armada_drm_crtc_mode_set_nofb(struct drm_crtc
*crtc)
adj->type, adj->flags);
DRM_DEBUG_KMS("lm %d rm %d tm %d bm %d\n", lm, rm, tm, bm);
- /*
-* If we are blanked, we would have disabled the clock. Re-enable
-* it so that compute_clock() does the right thing.
-*/
- if (!IS_ERR(dcrtc->clk) && dpms_blanked(dcrtc->dpms))
- WARN_ON(clk_prepare_enable(dcrtc->clk));
-
/* Now compute the divider for real */
dcrtc->variant->compute_clock(dcrtc, adj, &sclk);
@@ -824,8 +817,8 @@ static void armada_drm_crtc_destroy(struct drm_crtc *crtc)
priv->dcrtc[dcrtc->num] = NULL;
drm_crtc_cleanup(&dcrtc->crtc);
- if (!IS_ERR(dcrtc->clk))
- clk_disable_unprepare(dcrtc->clk);
+ if (dcrtc->variant->disable)
+ dcrtc->variant->disable(dcrtc);
writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ENA);
diff --git a/drivers/gpu/drm/armada/armada_drm.h
b/drivers/gpu/drm/armada/armada_drm.h
index a6f919b0084c..9658be917ea1 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -46,6 +46,8 @@ struct armada_variant {
int (*compute_clock)(struct armada_crtc *,
const struct drm_display_mode *,
uint32_t *);
+ void (*disable)(struct armada_crtc *);
+ void (*enable)(struct armada_crtc *, const struct drm_display_mode *);
};
/* Variant ops */
--
2.7.4
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Re: drm/msm/mdp5: negative x/y in cursor move
I found the solution:
ROI has to be recalculated for negative x/y indicating using the
lower/right corner of the cursor buffer. Further, MDP5_LM_CURSOR_XY_SRC_Y
and MDP5_LM_CURSOR_XY_SRC_X mus be calculated for the hotspot:
Index: kernel-source/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
===
--- kernel-source.orig/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
+++ kernel-source/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
@@ -65,7 +65,7 @@ struct mdp5_crtc {
struct drm_gem_object *scanout_bo;
uint64_t iova;
uint32_t width, height;
- uint32_t x, y;
+ int x, y;
} cursor;
};
#define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base)
@@ -756,10 +756,16 @@ static void get_roi(struct drm_crtc *crt
* (xres-x) will be new cursor width when x > (xres - cursor.width)
* (yres-y) will be new cursor height when y > (yres - cursor.height)
*/
- *roi_w = min(mdp5_crtc->cursor.width, xres -
- mdp5_crtc->cursor.x);
- *roi_h = min(mdp5_crtc->cursor.height, yres -
- mdp5_crtc->cursor.y);
+ if (mdp5_crtc->cursor.x >= 0)
+ *roi_w = min(mdp5_crtc->cursor.width, xres -
+ mdp5_crtc->cursor.x);
+ else
+ *roi_w = mdp5_crtc->cursor.width - abs(mdp5_crtc->cursor.x);
+ if (mdp5_crtc->cursor.y >= 0)
+ *roi_h = min(mdp5_crtc->cursor.height, yres -
+ mdp5_crtc->cursor.y);
+ else
+ *roi_h = mdp5_crtc->cursor.height - abs(mdp5_crtc->cursor.y);
}
static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc)
@@ -769,7 +775,7 @@ static void mdp5_crtc_restore_cursor(str
struct mdp5_kms *mdp5_kms = get_kms(crtc);
const enum mdp5_cursor_alpha cur_alpha = CURSOR_ALPHA_PER_PIXEL;
uint32_t blendcfg, stride;
- uint32_t x, y, width, height;
+ uint32_t x, y, src_x, src_y, width, height;
uint32_t roi_w, roi_h;
int lm;
@@ -786,6 +792,20 @@ static void mdp5_crtc_restore_cursor(str
get_roi(crtc, &roi_w, &roi_h);
+if (mdp5_crtc->cursor.x < 0) {
+src_x = abs(mdp5_crtc->cursor.x);
+x = 0;
+ } else
+src_x = 0;
+
+if (mdp5_crtc->cursor.y < 0) {
+src_y = abs(mdp5_crtc->cursor.y);
+y = 0;
+} else
+src_y = 0;
+
+ //printk("x=%d, y=%d roi_w=%d roi_h=%d src_x=%d src_y=%d\n", x, y, roi_w,
roi_h, src_x, src_y);
+
mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_STRIDE(lm), stride);
mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_FORMAT(lm),
MDP5_LM_CURSOR_FORMAT_FORMAT(CURSOR_FMT_ARGB));
@@ -798,6 +818,9 @@ static void mdp5_crtc_restore_cursor(str
mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_START_XY(lm),
MDP5_LM_CURSOR_START_XY_Y_START(y) |
MDP5_LM_CURSOR_START_XY_X_START(x));
+ mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_XY(lm),
+ MDP5_LM_CURSOR_XY_SRC_Y(src_y) |
+ MDP5_LM_CURSOR_XY_SRC_X(src_x));
mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BASE_ADDR(lm),
mdp5_crtc->cursor.iova);
@@ -903,6 +926,8 @@ static int mdp5_crtc_cursor_move(struct
uint32_t roi_w;
uint32_t roi_h;
unsigned long flags;
+ int border_x = mdp5_crtc->cursor.width * (-1);
+ int border_y = mdp5_crtc->cursor.height * (-1);
if (!mdp5_crtc->lm_cursor_enabled) {
dev_warn(dev->dev,
@@ -918,8 +943,8 @@ static int mdp5_crtc_cursor_move(struct
if (unlikely(!crtc->state->enable))
return 0;
- mdp5_crtc->cursor.x = x = max(x, 0);
- mdp5_crtc->cursor.y = y = max(y, 0);
+ mdp5_crtc->cursor.x = x = max(x, border_x);
+ mdp5_crtc->cursor.y = y = max(y, border_y);
get_roi(crtc, &roi_w, &roi_h);
Best regards
-Carsten
2018-07-10 12:11 GMT+02:00 Carsten Behling :
> Hi,
>
> modesetting X11 driver may provide negative x/y cordinates in
> mdp5_crtc_cursor_move(...) call when rotation is enabled.
>
> Because of
>
> static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
> {
> ...
> mdp5_crtc->cursor.x = x = max(x, 0);
> mdp5_crtc->cursor.y = y = max(y, 0);
> ...
> }
>
> x/y is calmped to 0/0 in those cases resulting that the cursor does not
> move anymore beyond mdp5_crtc->cursor.width, mdp5_crtc->cursor.height.
>
> For e.g rotation of 180 degree that means that the upper left cursor point
> stays never reaches the region (0/0) to (mdp5_crtc->cursor.width/
> mdp5_crtc->cursor.height).
>
> I already asked the X men if this should be fixed in modesetting driver or
> in the kernel CRT
> functions:
>
> https://www.spinics.net/lists/xorg/msg58969.html
>
> They told me to fix this in the kernel.
>
> So, I suppose:
>
> 1.) cursor x should be rather clamped instead to
>
> static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) {
> ...
> mdp5_crtc->cursor.x = x = max(x, -mdp5_crtc->cursor.width);
> mdp5_crtc->cursor.y = y = max(y, -mdp5_crtc->cursor.height);
> ...
> }
>
> 2.) The ROI calculation must be extendet to:
>
> static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t
> *roi_h)
> {
> ...
> if (x>=0)
> *roi_w = min(mdp5_crtc->cursor.width, xres -
> mdp5_crtc->cursor.x);
> else
> *roi_w =
[PATCH 19/20] drm/armada: remove unnecessary armada_plane structure
We no longer require a private armada_plane structure, so eliminate
it, and use the drm_plane structure directly.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 6 +++---
drivers/gpu/drm/armada/armada_crtc.h | 7 ---
drivers/gpu/drm/armada/armada_plane.c | 17 +++--
drivers/gpu/drm/armada/armada_plane.h | 3 +--
4 files changed, 7 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index bb1e13b4516b..da9360688b55 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -723,7 +723,7 @@ static int armada_drm_crtc_create(struct drm_device *drm,
struct device *dev,
{
struct armada_private *priv = drm->dev_private;
struct armada_crtc *dcrtc;
- struct armada_plane *primary;
+ struct drm_plane *primary;
void __iomem *base;
int ret;
@@ -793,7 +793,7 @@ static int armada_drm_crtc_create(struct drm_device *drm,
struct device *dev,
goto err_crtc;
}
- ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, &primary->base, NULL,
+ ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, primary, NULL,
&armada_crtc_funcs, NULL);
if (ret)
goto err_crtc_init;
@@ -803,7 +803,7 @@ static int armada_drm_crtc_create(struct drm_device *drm,
struct device *dev,
return armada_overlay_plane_create(drm, 1 << dcrtc->num);
err_crtc_init:
- primary->base.funcs->destroy(&primary->base);
+ primary->funcs->destroy(primary);
err_crtc:
kfree(dcrtc);
diff --git a/drivers/gpu/drm/armada/armada_crtc.h
b/drivers/gpu/drm/armada/armada_crtc.h
index b95ea13d0705..7ebd337b60af 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -32,15 +32,8 @@ struct armada_regs {
armada_reg_queue_mod(_r, _i, 0, 0, ~0)
struct armada_crtc;
-struct armada_plane;
struct armada_variant;
-struct armada_plane {
- struct drm_planebase;
- wait_queue_head_t frame_wait;
-};
-#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
-
struct armada_crtc {
struct drm_crtc crtc;
const struct armada_variant *variant;
diff --git a/drivers/gpu/drm/armada/armada_plane.c
b/drivers/gpu/drm/armada/armada_plane.c
index bed2dca83a37..9f36423dd394 100644
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -271,25 +271,14 @@ static const struct drm_plane_funcs
armada_primary_plane_funcs = {
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
};
-int armada_drm_plane_init(struct armada_plane *plane)
-{
- init_waitqueue_head(&plane->frame_wait);
- return 0;
-}
-
int armada_drm_primary_plane_init(struct drm_device *drm,
- struct armada_plane *primary)
+ struct drm_plane *primary)
{
int ret;
- ret = armada_drm_plane_init(primary);
- if (ret)
- return ret;
-
- drm_plane_helper_add(&primary->base,
-&armada_primary_plane_helper_funcs);
+ drm_plane_helper_add(primary, &armada_primary_plane_helper_funcs);
- ret = drm_universal_plane_init(drm, &primary->base, 0,
+ ret = drm_universal_plane_init(drm, primary, 0,
&armada_primary_plane_funcs,
armada_primary_formats,
ARRAY_SIZE(armada_primary_formats),
diff --git a/drivers/gpu/drm/armada/armada_plane.h
b/drivers/gpu/drm/armada/armada_plane.h
index 1bd8430992e0..ff4281ba7fad 100644
--- a/drivers/gpu/drm/armada/armada_plane.h
+++ b/drivers/gpu/drm/armada/armada_plane.h
@@ -9,8 +9,7 @@ void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *old_state);
int armada_drm_plane_atomic_check(struct drm_plane *plane,
struct drm_plane_state *state);
-int armada_drm_plane_init(struct armada_plane *plane);
int armada_drm_primary_plane_init(struct drm_device *drm,
- struct armada_plane *primary);
+ struct drm_plane *primary);
#endif
--
2.7.4
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[PATCH v2 03/18] ARM: dts: sun8i: r40: Remove fallback display engine compatible
R40 has pretty unique display pipeline. Because of that, H3 display
engine compatible fallback should be removed.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-r40.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index c95a59aac48f..2afb079a3776 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -102,8 +102,7 @@
};
de: display-engine {
- compatible = "allwinner,sun8i-r40-display-engine",
-"allwinner,sun8i-h3-display-engine";
+ compatible = "allwinner,sun8i-r40-display-engine";
allwinner,pipelines = <&mixer0>, <&mixer1>;
status = "disabled";
};
--
2.18.0
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[PATCH 15/17] drm/armada: move colorkey properties into overlay plane state
Move the overlay plane colorkey properties into the plane state,
keeping the existing driver behaviour to avoid breaking userspace.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_overlay.c | 251 +---
1 file changed, 132 insertions(+), 119 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_overlay.c
b/drivers/gpu/drm/armada/armada_overlay.c
index ec3ce28f162e..7f75df4f8390 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -24,29 +24,22 @@
#define DEFAULT_CONTRAST 0x4000
#define DEFAULT_SATURATION 0x4000
-struct armada_ovl_plane_properties {
- uint32_t colorkey_yr;
- uint32_t colorkey_ug;
- uint32_t colorkey_vb;
-#define K2R(val) (((val) >> 0) & 0xff)
-#define K2G(val) (((val) >> 8) & 0xff)
-#define K2B(val) (((val) >> 16) & 0xff)
- uint32_t colorkey_mode;
- uint32_t colorkey_enable;
-};
-
struct armada_ovl_plane {
struct armada_plane base;
struct armada_plane_work works[2];
bool next_work;
bool wait_vblank;
- struct armada_ovl_plane_properties prop;
};
#define drm_to_armada_ovl_plane(p) \
container_of(p, struct armada_ovl_plane, base.base)
struct armada_overlay_state {
struct drm_plane_state base;
+ u32 colorkey_yr;
+ u32 colorkey_ug;
+ u32 colorkey_vb;
+ u32 colorkey_mode;
+ u32 colorkey_enable;
s16 brightness;
u16 contrast;
u16 saturation;
@@ -66,25 +59,6 @@ static inline u32 armada_spu_saturation(struct
drm_plane_state *state)
return drm_to_overlay_state(state)->saturation << 16;
}
-static void
-armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
- struct armada_crtc *dcrtc)
-{
- writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y);
- writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
- writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
-
- spin_lock_irq(&dcrtc->irq_lock);
- armada_updatel(prop->colorkey_mode,
- CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
- dcrtc->base + LCD_SPU_DMA_CTRL1);
- if (dcrtc->variant->has_spu_adv_reg)
- armada_updatel(prop->colorkey_enable,
- ADV_GRACOLORKEY | ADV_VIDCOLORKEY,
- dcrtc->base + LCD_SPU_ADV_REG);
- spin_unlock_irq(&dcrtc->irq_lock);
-}
-
/* === Plane support === */
static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
struct armada_plane_work *work)
@@ -215,6 +189,30 @@ static void armada_drm_overlay_plane_atomic_update(struct
drm_plane *plane,
armada_reg_queue_set(regs, idx, val, LCD_SPU_SATURATION);
if (!old_state->visible && state->visible)
armada_reg_queue_set(regs, idx, 0x2000, LCD_SPU_CBSH_HUE);
+ val = drm_to_overlay_state(state)->colorkey_yr;
+ if ((!old_state->visible && state->visible) ||
+ drm_to_overlay_state(old_state)->colorkey_yr != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_COLORKEY_Y);
+ val = drm_to_overlay_state(state)->colorkey_ug;
+ if ((!old_state->visible && state->visible) ||
+ drm_to_overlay_state(old_state)->colorkey_ug != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_COLORKEY_U);
+ val = drm_to_overlay_state(state)->colorkey_vb;
+ if ((!old_state->visible && state->visible) ||
+ drm_to_overlay_state(old_state)->colorkey_vb != val)
+ armada_reg_queue_set(regs, idx, val, LCD_SPU_COLORKEY_V);
+ val = drm_to_overlay_state(state)->colorkey_mode;
+ if ((!old_state->visible && state->visible) ||
+ drm_to_overlay_state(old_state)->colorkey_mode != val)
+ armada_reg_queue_mod(regs, idx, val, CFG_CKMODE_MASK |
+CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
+LCD_SPU_DMA_CTRL1);
+ val = drm_to_overlay_state(state)->colorkey_enable;
+ if (((!old_state->visible && state->visible) ||
+drm_to_overlay_state(old_state)->colorkey_enable != val) &&
+ dcrtc->variant->has_spu_adv_reg)
+ armada_reg_queue_mod(regs, idx, val, ADV_GRACOLORKEY |
+ADV_VIDCOLORKEY, LCD_SPU_ADV_REG);
dcrtc->regs_idx += idx;
}
@@ -314,10 +312,7 @@ static int armada_overlay_commit(struct drm_plane *plane,
goto put_state;
}
- if (!dcrtc->plane) {
- dcrtc->plane = plane;
- armada_ovl_update_attr(&dplane->prop, dcrtc);
- }
+ dcrtc->plane = plane;
/* Queue it for update on the next interrupt if we are enabled */
ret = armada_drm_plane_work_queue(dcrtc, work);
@@ -377,85 +372,20 @@ static void armada_ovl_plane_destroy(struct drm_pla
Re: [linux-sunxi] Re: [PATCH 16/17] drm/sun4i: tcon-top: Remove mux configuration at probe time
Dne torek, 10. julij 2018 ob 18:18:43 CEST je Jernej Škrabec napisal(a):
> Dne torek, 10. julij 2018 ob 18:09:26 CEST je Chen-Yu Tsai napisal(a):
> > On Sat, Jul 7, 2018 at 1:51 AM, Jernej Skrabec
>
> wrote:
> > > Now that R40 TCON migrated to runtime mux configuration, old code can be
> > > removed.
> > >
> > > Signed-off-by: Jernej Skrabec
> > > ---
> > >
> > > drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 81 +++---
> > > 1 file changed, 7 insertions(+), 74 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index
> > > c09b15b64192..78795d6cb174
> > > 100644
> > > --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> > > @@ -87,34 +87,6 @@ int sun8i_tcon_top_de_config(struct device *dev, int
> > > mixer, int tcon)>
> > >
> > > }
> > > EXPORT_SYMBOL(sun8i_tcon_top_de_config);
> > >
> > > -static int sun8i_tcon_top_get_connected_ep_id(struct device_node *node,
> > > - int port_id)
> > > -{
> > > - struct device_node *ep, *remote, *port;
> > > - struct of_endpoint endpoint;
> > > -
> > > - port = of_graph_get_port_by_id(node, port_id);
> > > - if (!port)
> > > - return -ENOENT;
> > > -
> > > - for_each_available_child_of_node(port, ep) {
> > > - remote = of_graph_get_remote_port_parent(ep);
> > > - if (!remote)
> > > - continue;
> > > -
> > > - if (of_device_is_available(remote)) {
> > > - of_graph_parse_endpoint(ep, &endpoint);
> > > -
> > > - of_node_put(remote);
> > > -
> > > - return endpoint.id;
> > > - }
> > > -
> > > - of_node_put(remote);
> > > - }
> > > -
> > > - return -ENOENT;
> > > -}
> > >
> > > static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
> > >
> > >const char *parent,
> > >
> > > @@ -149,11 +121,9 @@ static int sun8i_tcon_top_bind(struct device *dev,
> > > struct device *master,>
> > >
> > > struct platform_device *pdev = to_platform_device(dev);
> > > struct clk_hw_onecell_data *clk_data;
> > > struct sun8i_tcon_top *tcon_top;
> > >
> > > - bool mixer0_unused = false;
> > >
> > > struct resource *res;
> > > void __iomem *regs;
> > >
> > > - int ret, i, id;
> > > - u32 val;
> > > + int ret, i;
> > >
> > > tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);
> > > if (!tcon_top)
> > >
> > > @@ -198,49 +168,12 @@ static int sun8i_tcon_top_bind(struct device *dev,
> > > struct device *master,>
> > >
> > > goto err_assert_reset;
> > >
> > > }
> > >
> > > - val = 0;
> > > -
> > > - /* check if HDMI mux output is connected */
> > > - if (sun8i_tcon_top_get_connected_ep_id(dev->of_node, 5) >= 0) {
> > > - /* find HDMI input endpoint id, if it is connected at
> > > all*/
> > > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node,
> > > 4);
> > > - if (id >= 0)
> > > - val = FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, id + 1);
> > > - else
> > > - DRM_DEBUG_DRIVER("TCON TOP HDMI input is not
> > > connected\n"); - } else {
> > > - DRM_DEBUG_DRIVER("TCON TOP HDMI output is not
> > > connected\n"); - }
> > > -
> > > - writel(val, regs + TCON_TOP_GATE_SRC_REG);
> > > -
> > > - val = 0;
> > > -
> > > - /* process mixer0 mux output */
> > > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 1);
> > > - if (id >= 0) {
> > > - val = FIELD_PREP(TCON_TOP_PORT_DE0_MSK, id);
> > > - } else {
> > > - DRM_DEBUG_DRIVER("TCON TOP mixer0 output is not
> > > connected\n"); - mixer0_unused = true;
> > > - }
> > > -
> > > - /* process mixer1 mux output */
> > > - id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 3);
> > > - if (id >= 0) {
> > > - val |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, id);
> > > -
> > > - /*
> > > -* mixer0 mux has priority over mixer1 mux. We have to
> > > -* make sure mixer0 doesn't overtake TCON from mixer1.
> > > -*/
> > > - if (mixer0_unused && id == 0)
> > > - val |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, 1);
> > > - } else {
> > > - DRM_DEBUG_DRIVER("TCON TOP mixer1 output is not
> > > connected\n"); - }
> > > -
> > > - writel(val, regs + TCON_TOP_PORT_SEL_REG);
> > > + /*
> > > +* Default register values might have some reserved bits set,
> > > which
> > > +* prevents TCON TOP from working p
[PATCH 05/17] drm/armada: merge armada_drm_gra_plane_regs() into only caller
armada_drm_gra_plane_regs() is now only ever called from within
armada_drm_primary_update_state(), so merge it into this function.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 55
1 file changed, 24 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 6dd54f1d3ac9..735abdab9754 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -588,31 +588,6 @@ static uint32_t armada_drm_crtc_calculate_csc(struct
armada_crtc *dcrtc)
return val;
}
-static void armada_drm_gra_plane_regs(struct armada_regs *regs,
- struct drm_framebuffer *fb, struct armada_plane_state *state,
- int x, int y, bool interlaced)
-{
- unsigned int i;
- u32 ctrl0;
-
- i = armada_drm_crtc_calc_fb(fb, x, y, regs, interlaced);
- armada_reg_queue_set(regs, i, state->dst_yx, LCD_SPU_GRA_OVSA_HPXL_VLN);
- armada_reg_queue_set(regs, i, state->src_hw, LCD_SPU_GRA_HPXL_VLN);
- armada_reg_queue_set(regs, i, state->dst_hw, LCD_SPU_GZM_HPXL_VLN);
-
- ctrl0 = state->ctrl0;
- if (interlaced)
- ctrl0 |= CFG_GRA_FTOGGLE;
-
- armada_reg_queue_mod(regs, i, ctrl0, CFG_GRAFORMAT |
-CFG_GRA_MOD(CFG_SWAPRB | CFG_SWAPUV |
-CFG_SWAPYU | CFG_YUV2RGB) |
-CFG_PALETTE_ENA | CFG_GRA_FTOGGLE |
-CFG_GRA_HSMOOTH | CFG_GRA_ENA,
-LCD_SPU_DMA_CTRL0);
- armada_reg_queue_end(regs, i);
-}
-
static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
struct drm_framebuffer *old_fb);
@@ -1107,8 +1082,8 @@ static const struct drm_crtc_funcs armada_crtc_funcs = {
.disable_vblank = armada_drm_crtc_disable_vblank,
};
-static void armada_drm_primary_update_state(struct drm_plane_state *state,
- struct armada_regs *regs)
+static unsigned int armada_drm_primary_update_state(
+ struct drm_plane_state *state, struct armada_regs *regs)
{
struct armada_plane *dplane = drm_to_armada_plane(state->plane);
struct armada_crtc *dcrtc = drm_to_armada_crtc(state->crtc);
@@ -1124,6 +1099,8 @@ static void armada_drm_primary_update_state(struct
drm_plane_state *state,
val |= CFG_GRA_ENA;
if (drm_rect_width(&state->src) >> 16 != drm_rect_width(&state->dst))
val |= CFG_GRA_HSMOOTH;
+ if (dcrtc->interlaced)
+ val |= CFG_GRA_FTOGGLE;
was_disabled = !(dplane->state.ctrl0 & CFG_GRA_ENA);
if (was_disabled)
@@ -1135,12 +1112,26 @@ static void armada_drm_primary_update_state(struct
drm_plane_state *state,
dplane->state.dst_hw = armada_rect_hw(&state->dst);
dplane->state.dst_yx = armada_rect_yx(&state->dst);
- armada_drm_gra_plane_regs(regs + idx, &dfb->fb, &dplane->state,
- state->src.x1 >> 16, state->src.y1 >> 16,
- dcrtc->interlaced);
+ idx += armada_drm_crtc_calc_fb(&dfb->fb, state->src.x1 >> 16,
+ state->src.y1 >> 16, regs + idx,
+ dcrtc->interlaced);
+ armada_reg_queue_set(regs, idx, dplane->state.dst_yx,
+LCD_SPU_GRA_OVSA_HPXL_VLN);
+ armada_reg_queue_set(regs, idx, dplane->state.src_hw,
+LCD_SPU_GRA_HPXL_VLN);
+ armada_reg_queue_set(regs, idx, dplane->state.dst_hw,
+LCD_SPU_GZM_HPXL_VLN);
+ armada_reg_queue_mod(regs, idx, dplane->state.ctrl0, CFG_GRAFORMAT |
+CFG_GRA_MOD(CFG_SWAPRB | CFG_SWAPUV |
+CFG_SWAPYU | CFG_YUV2RGB) |
+CFG_PALETTE_ENA | CFG_GRA_FTOGGLE |
+CFG_GRA_HSMOOTH | CFG_GRA_ENA,
+LCD_SPU_DMA_CTRL0);
dplane->state.vsync_update = !was_disabled;
dplane->state.changed = true;
+
+ return idx;
}
static int armada_drm_do_primary_update(struct drm_plane *plane,
@@ -1154,6 +1145,7 @@ static int armada_drm_do_primary_update(struct drm_plane
*plane,
.enable = state->crtc->enabled,
.mode = state->crtc->mode,
};
+ unsigned int idx;
int ret;
ret = drm_atomic_helper_check_plane_state(state, &crtc_state, 0,
@@ -1176,7 +1168,8 @@ static int armada_drm_do_primary_update(struct drm_plane
*plane,
work->old_fb = NULL;
}
- armada_drm_primary_update_state(state, work->regs);
+ idx = armada_drm_primary_update_state(state, work->regs);
+ armada_reg_queue_end(work->regs, idx);
if (!dplane->state.changed)
return 0;
--
2.7.4
___
Re: [PATCH 4/4] drm/vkms: subclass CRTC state
On Tue, Jul 10, 2018 at 10:10:46AM +0200, Daniel Vetter wrote:
> On Mon, Jul 09, 2018 at 06:48:36PM +0300, Haneen Mohammed wrote:
> > Subclass CRTC state struct to enable storing driver's private
> > state. This patch only adds the base drm_crtc_state struct and
> > the atomic functions that handle it.
> >
> > Signed-off-by: Haneen Mohammed
>
> Reviewed-by: Daniel Vetter
>
> > ---
> > drivers/gpu/drm/vkms/vkms_crtc.c | 55 ++--
> > drivers/gpu/drm/vkms/vkms_drv.h | 8 +
> > 2 files changed, 60 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c
> > b/drivers/gpu/drm/vkms/vkms_crtc.c
> > index 84cc05506b09..56206437647d 100644
> > --- a/drivers/gpu/drm/vkms/vkms_crtc.c
> > +++ b/drivers/gpu/drm/vkms/vkms_crtc.c
> > @@ -10,13 +10,62 @@
> > #include
> > #include
> >
> > +static void vkms_crtc_reset(struct drm_crtc *crtc)
> > +{
> > + struct vkms_crtc_state *state = NULL;
> > +
> > + if (crtc->state) {
> > + state = container_of(crtc->state, struct vkms_crtc_state,
> > +base);
> > + __drm_atomic_helper_crtc_destroy_state(crtc->state);
> > + kfree(state);
> > + crtc->state = NULL;
> > + }
> > +
> > + state = kzalloc(sizeof(*state), GFP_KERNEL);
>
> Hm, using kzalloc here is a good idea instead of kmalloc like in the
> default functions. Care to write a patch for drm_atomic_helper to replace
> all the kmalloc with kzalloc?
>
Sure, I will work on that and on your other comments.
Thank you so much!
Haneen
> Thanks, Daniel
>
> > + if (!state)
> > + return;
> > +
> > + crtc->state = &state->base;
> > + crtc->state->crtc = crtc;
> > +}
> > +
> > +static struct drm_crtc_state *
> > +vkms_crtc_duplicate_state(struct drm_crtc *crtc)
> > +{
> > + struct vkms_crtc_state *state;
> > +
> > + if (WARN_ON(!crtc->state))
> > + return NULL;
> > +
> > + state = kzalloc(sizeof(*state), GFP_KERNEL);
> > + if (!state)
> > + return NULL;
> > +
> > + __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
> > +
> > + return &state->base;
> > +}
> > +
> > +static void vkms_crtc_destroy_state(struct drm_crtc *crtc,
> > + struct drm_crtc_state *state)
> > +{
> > + struct vkms_crtc_state *vkms_state;
> > +
> > + vkms_state = container_of(state, struct vkms_crtc_state, base);
> > +
> > + __drm_atomic_helper_crtc_destroy_state(state);
> > + kfree(vkms_state);
> > +}
> > +
> > static const struct drm_crtc_funcs vkms_crtc_funcs = {
> > .set_config = drm_atomic_helper_set_config,
> > .destroy= drm_crtc_cleanup,
> > .page_flip = drm_atomic_helper_page_flip,
> > - .reset = drm_atomic_helper_crtc_reset,
> > - .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
> > - .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> > +
> > + .reset = vkms_crtc_reset,
> > + .atomic_duplicate_state = vkms_crtc_duplicate_state,
> > + .atomic_destroy_state = vkms_crtc_destroy_state,
> > };
> >
> > static int vkms_crtc_atomic_check(struct drm_crtc *crtc,
> > diff --git a/drivers/gpu/drm/vkms/vkms_drv.h
> > b/drivers/gpu/drm/vkms/vkms_drv.h
> > index d339a8108d85..61e367d32308 100644
> > --- a/drivers/gpu/drm/vkms/vkms_drv.h
> > +++ b/drivers/gpu/drm/vkms/vkms_drv.h
> > @@ -19,6 +19,14 @@ static const u32 vkms_formats[] = {
> > DRM_FORMAT_XRGB,
> > };
> >
> > +/**
> > + * vkms_crtc_state - Driver specific CRTC state
> > + * @base: base CRTC state
> > + */
> > +struct vkms_crtc_state {
> > + struct drm_crtc_state base;
> > +};
> > +
> > struct vkms_output {
> > struct drm_crtc crtc;
> > struct drm_encoder encoder;
> > --
> > 2.17.1
> >
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
___
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[PATCH 12/17] drm/armada: move primary plane to separate file
Split out the primary plane support; this is now entirely separate from
the CRTC support.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/Makefile | 2 +-
drivers/gpu/drm/armada/armada_crtc.c| 273 +
drivers/gpu/drm/armada/armada_crtc.h| 10 --
drivers/gpu/drm/armada/armada_overlay.c | 3 +-
drivers/gpu/drm/armada/armada_plane.c | 297
drivers/gpu/drm/armada/armada_plane.h | 16 ++
6 files changed, 318 insertions(+), 283 deletions(-)
create mode 100644 drivers/gpu/drm/armada/armada_plane.c
create mode 100644 drivers/gpu/drm/armada/armada_plane.h
diff --git a/drivers/gpu/drm/armada/Makefile b/drivers/gpu/drm/armada/Makefile
index 0b8bf3b8aa6a..d34843e121c7 100644
--- a/drivers/gpu/drm/armada/Makefile
+++ b/drivers/gpu/drm/armada/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
armada-y := armada_crtc.o armada_drv.o armada_fb.o armada_fbdev.o \
- armada_gem.o armada_overlay.o armada_trace.o
+ armada_gem.o armada_overlay.o armada_plane.o armada_trace.o
armada-y += armada_510.o
armada-$(CONFIG_DEBUG_FS) += armada_debugfs.o
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 14339d5bed14..b9b0a508793d 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -20,6 +20,7 @@
#include "armada_fb.h"
#include "armada_gem.h"
#include "armada_hw.h"
+#include "armada_plane.h"
#include "armada_trace.h"
enum csc_mode {
@@ -30,23 +31,6 @@ enum csc_mode {
CSC_RGB_STUDIO = 2,
};
-static const uint32_t armada_primary_formats[] = {
- DRM_FORMAT_UYVY,
- DRM_FORMAT_YUYV,
- DRM_FORMAT_VYUY,
- DRM_FORMAT_YVYU,
- DRM_FORMAT_ARGB,
- DRM_FORMAT_ABGR,
- DRM_FORMAT_XRGB,
- DRM_FORMAT_XBGR,
- DRM_FORMAT_RGB888,
- DRM_FORMAT_BGR888,
- DRM_FORMAT_ARGB1555,
- DRM_FORMAT_ABGR1555,
- DRM_FORMAT_RGB565,
- DRM_FORMAT_BGR565,
-};
-
/*
* A note about interlacing. Let's consider HDMI 1920x1080i.
* The timing parameters we have from X are:
@@ -160,57 +144,6 @@ static void armada_drm_crtc_update(struct armada_crtc
*dcrtc)
}
}
-void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
- int x, int y)
-{
- const struct drm_format_info *format = fb->format;
- unsigned int num_planes = format->num_planes;
- u32 addr = drm_fb_obj(fb)->dev_addr;
- int i;
-
- if (num_planes > 3)
- num_planes = 3;
-
- addrs[0] = addr + fb->offsets[0] + y * fb->pitches[0] +
- x * format->cpp[0];
-
- y /= format->vsub;
- x /= format->hsub;
-
- for (i = 1; i < num_planes; i++)
- addrs[i] = addr + fb->offsets[i] + y * fb->pitches[i] +
-x * format->cpp[i];
- for (; i < 3; i++)
- addrs[i] = 0;
-}
-
-static unsigned armada_drm_crtc_calc_fb(struct drm_framebuffer *fb,
- int x, int y, struct armada_regs *regs, bool interlaced)
-{
- unsigned pitch = fb->pitches[0];
- u32 addrs[3], addr_odd, addr_even;
- unsigned i = 0;
-
- DRM_DEBUG_DRIVER("pitch %u x %d y %d bpp %d\n",
- pitch, x, y, fb->format->cpp[0] * 8);
-
- armada_drm_plane_calc_addrs(addrs, fb, x, y);
-
- addr_odd = addr_even = addrs[0];
-
- if (interlaced) {
- addr_even += pitch;
- pitch *= 2;
- }
-
- /* write offset, base, and pitch */
- armada_reg_queue_set(regs, i, addr_odd, LCD_CFG_GRA_START_ADDR0);
- armada_reg_queue_set(regs, i, addr_even, LCD_CFG_GRA_START_ADDR1);
- armada_reg_queue_mod(regs, i, pitch, 0x, LCD_CFG_GRA_PITCH);
-
- return i;
-}
-
static void armada_drm_plane_work_call(struct armada_crtc *dcrtc,
struct armada_plane_work *work,
void (*fn)(struct armada_crtc *, struct armada_plane_work *))
@@ -1067,194 +1000,6 @@ static const struct drm_crtc_funcs armada_crtc_funcs = {
.disable_vblank = armada_drm_crtc_disable_vblank,
};
-int armada_drm_plane_prepare_fb(struct drm_plane *plane,
- struct drm_plane_state *state)
-{
- DRM_DEBUG_KMS("[PLANE:%d:%s] [FB:%d]\n",
- plane->base.id, plane->name,
- state->fb ? state->fb->base.id : 0);
-
- /*
-* Take a reference on the new framebuffer - we want to
-* hold on to it while the hardware is displaying it.
-*/
- if (state->fb)
- drm_framebuffer_get(state->fb);
- return 0;
-}
-
-void armada_drm_plane_cleanup_fb(struct drm_plane *plane,
- struct drm_plane_state *old_state)
-{
- DRM_DEBUG_KMS("[PLANE:%d:%s] [FB:%d]\n",
- plane->base.id, plane->name,
- old_state->fb ? old_state->fb->base.id : 0);
-
- if (old_state->fb)
- drm_frame
[PATCH v2 16/18] ARM: dts: sun8i: r40: Disable TCONs by default.
R40 has 4 TCONs, but only 2 of them can receive some kind of output at
the same time. Let's disable them by default, so only those which are
really connected on board can be enabled in board dts file.
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4
arch/arm/boot/dts/sun8i-r40.dtsi | 2 ++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 737cf01b1acd..c39b9169ea64 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -251,6 +251,10 @@
regulator-name = "vcc-wifi";
};
+&tcon_tv0 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index e5c7e4804384..e2cbd4f645c5 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -679,6 +679,7 @@
clock-names = "ahb", "tcon-ch1";
resets = <&ccu RST_BUS_TCON_TV0>;
reset-names = "lcd";
+ status = "disabled";
ports {
#address-cells = <1>;
@@ -721,6 +722,7 @@
clock-names = "ahb", "tcon-ch1";
resets = <&ccu RST_BUS_TCON_TV1>;
reset-names = "lcd";
+ status = "disabled";
ports {
#address-cells = <1>;
--
2.18.0
___
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[PATCH 01/17] drm/armada: clean up armada_drm_crtc_page_flip()
drm_mode_page_flip_ioctl() already takes care of checking the framebuffer format, and also assigns primary->fb after a successful call to this handler. These are both redundant, and can be removed. Signed-off-by: Russell King --- drivers/gpu/drm/armada/armada_crtc.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index 42a40daff132..78bb3d51417b 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -1039,10 +1039,6 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc, unsigned i; int ret; - /* We don't support changing the pixel format */ - if (fb->format != crtc->primary->fb->format) - return -EINVAL; - work = armada_drm_crtc_alloc_plane_work(dcrtc->crtc.primary); if (!work) return -ENOMEM; @@ -1069,14 +1065,6 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc, } /* -* Don't take a reference on the new framebuffer; -* drm_mode_page_flip_ioctl() has already grabbed a reference and -* will _not_ drop that reference on successful return from this -* function. Simply mark this new framebuffer as the current one. -*/ - dcrtc->crtc.primary->fb = fb; - - /* * Finally, if the display is blanked, we won't receive an * interrupt, so complete it now. */ -- 2.7.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/3] drm/armada: add OF reserved memory support
Existing Armada DRM makes use of reserved memory for allocating
contiguous screen buffers, which currently prevents its use with
DT systems. Add support for this for DT systems.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/Makefile | 3 +++
drivers/gpu/drm/armada/armada_drv.c | 24 --
drivers/gpu/drm/armada/armada_rmem.c | 49
3 files changed, 74 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/armada/armada_rmem.c
diff --git a/drivers/gpu/drm/armada/Makefile b/drivers/gpu/drm/armada/Makefile
index ecf25cf9f9f5..0b8bf3b8aa6a 100644
--- a/drivers/gpu/drm/armada/Makefile
+++ b/drivers/gpu/drm/armada/Makefile
@@ -5,3 +5,6 @@ armada-y+= armada_510.o
armada-$(CONFIG_DEBUG_FS) += armada_debugfs.o
obj-$(CONFIG_DRM_ARMADA) := armada.o
+
+armada-rmem-$(CONFIG_DRM_ARMADA) += armada_rmem.o
+obj-y += $(armada-rmem-y) $(armada-rmem-m)
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index 217f0590fd61..a9ee492a2810 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -96,6 +97,9 @@ static int armada_drm_bind(struct device *dev)
return -EINVAL;
}
+ if (!mem && dev->of_node)
+ mem = dev->platform_data;
+
if (!mem)
return -ENXIO;
@@ -250,9 +254,17 @@ static int armada_drm_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
int ret;
- ret = drm_of_component_probe(dev, compare_dev_name, &armada_master_ops);
- if (ret != -EINVAL)
+ if (dev->of_node) {
+ ret = of_reserved_mem_device_init(dev);
+ if (ret && ret != -ENODEV)
+ return ret;
+
+ ret = drm_of_component_probe(dev, compare_of,
+&armada_master_ops);
+ if (ret)
+ of_reserved_mem_device_release(dev);
return ret;
+ }
if (dev->platform_data) {
char **devices = dev->platform_data;
@@ -287,6 +299,7 @@ static int armada_drm_probe(struct platform_device *pdev)
static int armada_drm_remove(struct platform_device *pdev)
{
component_master_del(&pdev->dev, &armada_master_ops);
+ of_reserved_mem_device_release(&pdev->dev);
return 0;
}
@@ -300,11 +313,18 @@ static const struct platform_device_id
armada_drm_platform_ids[] = {
};
MODULE_DEVICE_TABLE(platform, armada_drm_platform_ids);
+static const struct of_device_id armada_drm_dt_ids[] = {
+ { .compatible = "marvell,dove-display-subsystem", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, armada_drm_dt_ids);
+
static struct platform_driver armada_drm_platform_driver = {
.probe = armada_drm_probe,
.remove = armada_drm_remove,
.driver = {
.name = "armada-drm",
+ .of_match_table = armada_drm_dt_ids,
},
.id_table = armada_drm_platform_ids,
};
diff --git a/drivers/gpu/drm/armada/armada_rmem.c
b/drivers/gpu/drm/armada/armada_rmem.c
new file mode 100644
index ..36bb20e426b6
--- /dev/null
+++ b/drivers/gpu/drm/armada/armada_rmem.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2017 Russell King
+#include
+#include
+#include
+#include
+
+static int armada_rmem_dev_init(struct reserved_mem *rmem, struct device *dev)
+{
+ struct resource *r;
+
+ if (dev->platform_data)
+ return -EBUSY;
+
+ r = kzalloc(sizeof(*r), GFP_KERNEL);
+ if (!r)
+ return -ENOMEM;
+
+ r->start = rmem->base;
+ r->end = rmem->base + rmem->size - 1;
+ r->flags = IORESOURCE_MEM;
+
+ rmem->priv = r;
+ dev->platform_data = r;
+
+ return 0;
+}
+
+static void armada_rmem_dev_release(struct reserved_mem *rmem,
+ struct device *dev)
+{
+ kfree(rmem->priv);
+ rmem->priv = NULL;
+ dev->platform_data = NULL;
+}
+
+static const struct reserved_mem_ops armada_rmem_ops = {
+ .device_init = armada_rmem_dev_init,
+ .device_release = armada_rmem_dev_release,
+};
+
+static int __init armada_rmem_init(struct reserved_mem *rmem)
+{
+ rmem->ops = &armada_rmem_ops;
+ return 0;
+}
+
+RESERVEDMEM_OF_DECLARE(armada_rmem, "marvell,dove-framebuffer",
+ armada_rmem_init);
--
2.7.4
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Re: [PATCH V3] drm/vkms: Add vblank events simulated by hrtimers
On Tue, Jul 10, 2018 at 10:48:57PM -0300, Rodrigo Siqueira wrote:
> This commit adds regular vblank events simulated through hrtimers, which
> is a feature required by VKMS to mimic real hardware. Additionally, all
> the vblank event send after pageflip is kept in the atomic_flush
> function.
>
> Signed-off-by: Rodrigo Siqueira
> ---
> Changes since v1:
> - Removes hardcoded vblank interval to get it from user space
> - Compute the vblank timer interval per interruption
>
> Changes since v2:
> - Removes unnecessary algorithm to compute the next period
> - Uses drm_calc_timestamping_constants to get the vblank interval
> instead of calculating it manually
> - Adds disable_vblank helper that turns of crtc
> - Simplifies implementation by using drm_crtc_arm_vblank_event
> - Replaces the code in atomic_begin to atomic_flush
> - Removes unnecessary field in vkms_output
>
> drivers/gpu/drm/vkms/vkms_crtc.c | 88 +++-
> drivers/gpu/drm/vkms/vkms_drv.c | 9
> drivers/gpu/drm/vkms/vkms_drv.h | 15 ++
> 3 files changed, 110 insertions(+), 2 deletions(-)
Patch looks good, but doesn't apply cleanly on top of drm-misc-next. Can
you please rebase (and if there's other patches this patch depends upon,
please resend those too).
Thanks, Daniel
>
> diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c
> b/drivers/gpu/drm/vkms/vkms_crtc.c
> index 84cc05506b09..bc9beccb977e 100644
> --- a/drivers/gpu/drm/vkms/vkms_crtc.c
> +++ b/drivers/gpu/drm/vkms/vkms_crtc.c
> @@ -10,6 +10,60 @@
> #include
> #include
>
> +static enum hrtimer_restart vkms_vblank_simulate(struct hrtimer *timer)
> +{
> + struct vkms_output *output = container_of(timer, struct vkms_output,
> + vblank_hrtimer);
> + struct drm_crtc *crtc = &output->crtc;
> + int ret_overrun;
> + bool ret;
> +
> + ret = drm_crtc_handle_vblank(crtc);
> + if (!ret)
> + DRM_ERROR("vkms failure on handling vblank");
> +
> + ret_overrun = hrtimer_forward_now(&output->vblank_hrtimer,
> + output->period_ns);
> +
> + return HRTIMER_RESTART;
> +}
> +
> +static int vkms_enable_vblank(struct drm_crtc *crtc)
> +{
> + struct drm_device *dev = crtc->dev;
> + unsigned int pipe = drm_crtc_index(crtc);
> + struct drm_vblank_crtc *vblank = &dev->vblank[pipe];
> + struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
> +
> + drm_calc_timestamping_constants(crtc, &crtc->mode);
> +
> + hrtimer_init(&out->vblank_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
> + out->vblank_hrtimer.function = &vkms_vblank_simulate;
> + out->period_ns = ktime_set(0, vblank->framedur_ns);
> + hrtimer_start(&out->vblank_hrtimer, out->period_ns, HRTIMER_MODE_REL);
> +
> + return 0;
> +}
> +
> +static void vkms_disable_vblank(struct drm_crtc *crtc)
> +{
> + struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
> +
> + hrtimer_cancel(&out->vblank_hrtimer);
> +}
> +
> +bool vkms_get_vblank_timestamp(struct drm_device *dev, unsigned int pipe,
> +int *max_error, ktime_t *vblank_time,
> +bool in_vblank_irq)
> +{
> + struct vkms_device *vkmsdev = drm_device_to_vkms_device(dev);
> + struct vkms_output *output = &vkmsdev->output;
> +
> + *vblank_time = output->vblank_hrtimer.node.expires;
> +
> + return true;
> +}
> +
> static const struct drm_crtc_funcs vkms_crtc_funcs = {
> .set_config = drm_atomic_helper_set_config,
> .destroy= drm_crtc_cleanup,
> @@ -17,6 +71,8 @@ static const struct drm_crtc_funcs vkms_crtc_funcs = {
> .reset = drm_atomic_helper_crtc_reset,
> .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> + .enable_vblank = vkms_enable_vblank,
> + .disable_vblank = vkms_disable_vblank,
> };
>
> static int vkms_crtc_atomic_check(struct drm_crtc *crtc,
> @@ -28,11 +84,39 @@ static int vkms_crtc_atomic_check(struct drm_crtc *crtc,
> static void vkms_crtc_atomic_enable(struct drm_crtc *crtc,
> struct drm_crtc_state *old_state)
> {
> + drm_crtc_vblank_on(crtc);
> +}
> +
> +static void vkms_crtc_atomic_disable(struct drm_crtc *crtc,
> + struct drm_crtc_state *old_state)
> +{
> + drm_crtc_vblank_off(crtc);
> +}
> +
> +static void vkms_crtc_atomic_flush(struct drm_crtc *crtc,
> +struct drm_crtc_state *old_crtc_state)
> +{
> + unsigned long flags;
> +
> + if (crtc->state->event) {
> + spin_lock_irqsave(&crtc->dev->event_lock, flags);
> +
> + if (drm_crtc_vblank_get(crtc) != 0)
> + drm_crtc_send_vblank_event(crtc, crtc->state->event);
> + else
> + drm_crtc_arm_vb
[PATCH 00/20] Finish Armada DRM transition to atomic modeset
This series finishes the transition of Armada DRM to atomic modeset. drivers/gpu/drm/armada/armada_510.c | 24 +- drivers/gpu/drm/armada/armada_crtc.c| 506 ++-- drivers/gpu/drm/armada/armada_crtc.h| 30 +- drivers/gpu/drm/armada/armada_drm.h | 12 +- drivers/gpu/drm/armada/armada_drv.c | 46 +-- drivers/gpu/drm/armada/armada_fb.c | 7 +- drivers/gpu/drm/armada/armada_fb.h | 3 +- drivers/gpu/drm/armada/armada_fbdev.c | 4 +- drivers/gpu/drm/armada/armada_overlay.c | 230 --- drivers/gpu/drm/armada/armada_plane.c | 96 +++--- drivers/gpu/drm/armada/armada_plane.h | 7 +- 11 files changed, 294 insertions(+), 671 deletions(-) -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 13.8Mbps down 630kbps up According to speedtest.net: 13Mbps down 490kbps up ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 17/18] drm/sun4i: tcon-top: Remove mux configuration at probe time
Now that R40 TCON migrated to runtime mux configuration, old code can be
removed.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 76 +-
1 file changed, 1 insertion(+), 75 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index c09b15b64192..b7cf0f0f6583 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -87,34 +87,6 @@ int sun8i_tcon_top_de_config(struct device *dev, int mixer,
int tcon)
}
EXPORT_SYMBOL(sun8i_tcon_top_de_config);
-static int sun8i_tcon_top_get_connected_ep_id(struct device_node *node,
- int port_id)
-{
- struct device_node *ep, *remote, *port;
- struct of_endpoint endpoint;
-
- port = of_graph_get_port_by_id(node, port_id);
- if (!port)
- return -ENOENT;
-
- for_each_available_child_of_node(port, ep) {
- remote = of_graph_get_remote_port_parent(ep);
- if (!remote)
- continue;
-
- if (of_device_is_available(remote)) {
- of_graph_parse_endpoint(ep, &endpoint);
-
- of_node_put(remote);
-
- return endpoint.id;
- }
-
- of_node_put(remote);
- }
-
- return -ENOENT;
-}
static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,
const char *parent,
@@ -149,11 +121,9 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
struct platform_device *pdev = to_platform_device(dev);
struct clk_hw_onecell_data *clk_data;
struct sun8i_tcon_top *tcon_top;
- bool mixer0_unused = false;
struct resource *res;
void __iomem *regs;
- int ret, i, id;
- u32 val;
+ int ret, i;
tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);
if (!tcon_top)
@@ -198,50 +168,6 @@ static int sun8i_tcon_top_bind(struct device *dev, struct
device *master,
goto err_assert_reset;
}
- val = 0;
-
- /* check if HDMI mux output is connected */
- if (sun8i_tcon_top_get_connected_ep_id(dev->of_node, 5) >= 0) {
- /* find HDMI input endpoint id, if it is connected at all*/
- id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 4);
- if (id >= 0)
- val = FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, id + 1);
- else
- DRM_DEBUG_DRIVER("TCON TOP HDMI input is not
connected\n");
- } else {
- DRM_DEBUG_DRIVER("TCON TOP HDMI output is not connected\n");
- }
-
- writel(val, regs + TCON_TOP_GATE_SRC_REG);
-
- val = 0;
-
- /* process mixer0 mux output */
- id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 1);
- if (id >= 0) {
- val = FIELD_PREP(TCON_TOP_PORT_DE0_MSK, id);
- } else {
- DRM_DEBUG_DRIVER("TCON TOP mixer0 output is not connected\n");
- mixer0_unused = true;
- }
-
- /* process mixer1 mux output */
- id = sun8i_tcon_top_get_connected_ep_id(dev->of_node, 3);
- if (id >= 0) {
- val |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, id);
-
- /*
-* mixer0 mux has priority over mixer1 mux. We have to
-* make sure mixer0 doesn't overtake TCON from mixer1.
-*/
- if (mixer0_unused && id == 0)
- val |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, 1);
- } else {
- DRM_DEBUG_DRIVER("TCON TOP mixer1 output is not connected\n");
- }
-
- writel(val, regs + TCON_TOP_PORT_SEL_REG);
-
/*
* TCON TOP has two muxes, which select parent clock for each TCON TV
* channel clock. Parent could be either TCON TV or TVE clock. For now
--
2.18.0
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Re: [PATCH v4 0/9] xen: dma-buf support for grant device
On 07/02/2018 09:12 AM, Oleksandr Andrushchenko wrote: > On 07/02/2018 11:20 AM, Juergen Gross wrote: >> On 02/07/18 09:10, Oleksandr Andrushchenko wrote: >>> Hello, Boris, Juergen! >>> >>> Do you think I can re-base the series (which already has >>> all required R-b's from Xen community) onto the latest kernel >>> with API changes to patches 5 (of_dma_configure) and 8 >>> (dma-buf atomic ops) and we can merge it to the Xen's kernel tree? >> Rebase: yes. >> >> Merging to the Xen kernel tree: only after setting up the >> for-linus-4.19 branch, which will be done by Boris later this >> month. > Then I'll probably have to wait until for-linus-4.19 branch > Boris, do you have any dates in mind for that? Usually after rc5, so I suspect sometime next week. -boris ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 07/18] drm/sun4i: DW HDMI: Release nodes if error happens during CRTC search
If error happens in sun8i_dw_hdmi_find_possible_crtcs(), nodes are not
released with of_node_put() before returning.
Fix that by calling of_node_put() when necessary. While on it, clean up
the code by using of_graph_get_remote_node() which also lowers number of
cases where error handling has to be performed.
Fixes: 57e23de02f48 ("drm/sun4i: DW HDMI: Expand algorithm for possible crtcs")
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
index 3459b9ec56c9..21dc9ebad0b4 100644
--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
@@ -53,22 +53,14 @@ static u32 sun8i_dw_hdmi_find_possible_crtcs(struct
drm_device *drm,
struct device_node *port, *ep, *remote, *remote_port;
u32 crtcs = 0;
- port = of_graph_get_port_by_id(node, 0);
- if (!port)
- return 0;
-
- ep = of_get_next_available_child(port, NULL);
- if (!ep)
- return 0;
-
- remote = of_graph_get_remote_port_parent(ep);
+ remote = of_graph_get_remote_node(node, 0, -1);
if (!remote)
return 0;
if (sun8i_dw_hdmi_node_is_tcon_top(remote)) {
port = of_graph_get_port_by_id(remote, 4);
if (!port)
- return 0;
+ goto crtcs_exit;
for_each_child_of_node(port, ep) {
remote_port = of_graph_get_remote_port(ep);
@@ -81,6 +73,9 @@ static u32 sun8i_dw_hdmi_find_possible_crtcs(struct
drm_device *drm,
crtcs = drm_of_find_possible_crtcs(drm, node);
}
+crtcs_exit:
+ of_node_put(remote);
+
return crtcs;
}
--
2.18.0
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[PATCH 11/20] drm/armada: implement atomic_enable()/atomic_disable() methods
Implement the atomic_enable()/atomic_disable() methods used by the
atomic modeset helpers. atomic_disable() will need some transitional
code during conversion to ensure proper ordering is maintained.
Signed-off-by: Russell King
---
drivers/gpu/drm/armada/armada_crtc.c | 71
1 file changed, 71 insertions(+)
diff --git a/drivers/gpu/drm/armada/armada_crtc.c
b/drivers/gpu/drm/armada/armada_crtc.c
index 554135062d93..e93097d3aa06 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -581,6 +581,75 @@ static void armada_drm_crtc_atomic_flush(struct drm_crtc
*crtc,
armada_drm_crtc_queue_state_event(crtc);
}
+static void armada_drm_crtc_atomic_disable(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state)
+{
+ struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+ struct drm_pending_vblank_event *event;
+ struct drm_plane *plane;
+
+ DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
+
+ /*
+* For transition only - we must wait for completion of our
+* untransitioned paths before changing anything.
+*/
+ plane = dcrtc->plane;
+ if (plane)
+ WARN_ON(!armada_drm_plane_work_wait(drm_to_armada_plane(plane),
+ HZ));
+ armada_drm_plane_work_wait(drm_to_armada_plane(dcrtc->crtc.primary),
+ MAX_SCHEDULE_TIMEOUT);
+
+ dcrtc->dpms = DRM_MODE_DPMS_OFF;
+ drm_crtc_vblank_off(crtc);
+ armada_drm_crtc_update(dcrtc, false);
+
+ if (!crtc->state->active) {
+ /*
+* This modeset will be leaving the CRTC disabled, so
+* call the backend to disable upstream clocks etc.
+*/
+ if (dcrtc->variant->disable)
+ dcrtc->variant->disable(dcrtc);
+
+ /*
+* We will not receive any further vblank events.
+* Send the flip_done event manually.
+*/
+ event = crtc->state->event;
+ crtc->state->event = NULL;
+ if (event) {
+ spin_lock_irq(&crtc->dev->event_lock);
+ drm_crtc_send_vblank_event(crtc, event);
+ spin_unlock_irq(&crtc->dev->event_lock);
+ }
+ }
+}
+
+static void armada_drm_crtc_atomic_enable(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state)
+{
+ struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
+
+ DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name);
+
+ dcrtc->dpms = DRM_MODE_DPMS_ON;
+ if (!old_state->active) {
+ /*
+* This modeset is enabling the CRTC after it having
+* been disabled. Reverse the call to ->disable in
+* the atomic_disable().
+*/
+ if (dcrtc->variant->enable)
+ dcrtc->variant->enable(dcrtc,
&crtc->state->adjusted_mode);
+ }
+ armada_drm_crtc_update(dcrtc, true);
+ drm_crtc_vblank_on(crtc);
+
+ armada_drm_crtc_queue_state_event(crtc);
+}
+
static const struct drm_crtc_helper_funcs armada_crtc_helper_funcs = {
.dpms = armada_drm_crtc_dpms,
.prepare= armada_drm_crtc_prepare,
@@ -592,6 +661,8 @@ static const struct drm_crtc_helper_funcs
armada_crtc_helper_funcs = {
.disable= armada_drm_crtc_disable,
.atomic_begin = armada_drm_crtc_atomic_begin,
.atomic_flush = armada_drm_crtc_atomic_flush,
+ .atomic_disable = armada_drm_crtc_atomic_disable,
+ .atomic_enable = armada_drm_crtc_atomic_enable,
};
static void armada_load_cursor_argb(void __iomem *base, uint32_t *pix,
--
2.7.4
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Re: 答复: 答复: [alsa-devel] 答复: [PATCH] vgaswitchroo: set audio client id according to bound gpu client id
On Tue, 10 Jul 2018 13:21:00 +0200, Takashi Iwai wrote: > > > revert the fix of amdgpu suspend issue, audio issue also can be observed. > > Did you check the behavior with the single AMD GPU hardware? > If confirmed, we can forget about vga_switcheroo. ... and taking a look back at the recent changes, I guess it can be the forced runtime PM enablement, not directly with vga_switcheroo action itself. Jim, could you tell me which PCI devices are handled as vga_switcheroo audio client? The kernel should show all messages "xxx: Handle vga_switcheroo audio client". At best, give the full dmesg output and the lspci -nv output. thanks, Takashi ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 107183] Enabling Glamor takes half a second
https://bugs.freedesktop.org/show_bug.cgi?id=107183 Michel Dänzer changed: What|Removed |Added Attachment #140548|text/x-log |text/plain mime type|| -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH V2 1/5] drm/vkms: Add dumb operations
On Thu, Jul 05, 2018 at 11:21:19PM +0300, Haneen Mohammed wrote:
> On Thu, Jun 21, 2018 at 09:16:13AM -0300, Rodrigo Siqueira wrote:
> > VKMS currently does not handle dumb data, and as a consequence, it does
> > not provide mechanisms for handling gem. This commit adds the necessary
> > support for gem object/handler and the dumb functions.
> >
> > Signed-off-by: Rodrigo Siqueira
> > ---
>
> This looks good to me except with missing gem_free_object_unlocked callback,
> which causes warning: Memory manager not clean during takedown.
>
> Maybe it will be easier if we add this in another patch instead of creating
> v3 of
> this patchset?
Ah this is the patch series that didn't land yet ...
Rodrigo, can you pls respin with the issue fixed that Haneen spotted?
Haneen, can you pls review the other patches in this series too?
Also, do we have any other patch series that's not yet applied? With two
interns working on the same thing it's a bit harder to keep track of stuff
...
Thanks, Daniel
>
> > drivers/gpu/drm/vkms/Makefile | 2 +-
> > drivers/gpu/drm/vkms/vkms_drv.c | 9 ++
> > drivers/gpu/drm/vkms/vkms_drv.h | 21
> > drivers/gpu/drm/vkms/vkms_gem.c | 168
> > 4 files changed, 199 insertions(+), 1 deletion(-)
> > create mode 100644 drivers/gpu/drm/vkms/vkms_gem.c
> >
> > diff --git a/drivers/gpu/drm/vkms/Makefile b/drivers/gpu/drm/vkms/Makefile
> > index 3f774a6a9c58..986297da51bf 100644
> > --- a/drivers/gpu/drm/vkms/Makefile
> > +++ b/drivers/gpu/drm/vkms/Makefile
> > @@ -1,3 +1,3 @@
> > -vkms-y := vkms_drv.o vkms_plane.o vkms_output.o vkms_crtc.o
> > +vkms-y := vkms_drv.o vkms_plane.o vkms_output.o vkms_crtc.o vkms_gem.o
> >
> > obj-$(CONFIG_DRM_VKMS) += vkms.o
> > diff --git a/drivers/gpu/drm/vkms/vkms_drv.c
> > b/drivers/gpu/drm/vkms/vkms_drv.c
> > index 740a4cbfed91..638bab9083b5 100644
> > --- a/drivers/gpu/drm/vkms/vkms_drv.c
> > +++ b/drivers/gpu/drm/vkms/vkms_drv.c
> > @@ -37,6 +37,12 @@ static const struct file_operations vkms_driver_fops = {
> > .release= drm_release,
> > };
> >
> > +static const struct vm_operations_struct vkms_gem_vm_ops = {
> > + .fault = vkms_gem_fault,
> > + .open = drm_gem_vm_open,
> > + .close = drm_gem_vm_close,
> > +};
> > +
> > static void vkms_release(struct drm_device *dev)
> > {
> > struct vkms_device *vkms = container_of(dev, struct vkms_device, drm);
> > @@ -50,6 +56,9 @@ static struct drm_driver vkms_driver = {
> > .driver_features= DRIVER_MODESET | DRIVER_ATOMIC | DRIVER_GEM,
> > .release= vkms_release,
> > .fops = &vkms_driver_fops,
> > + .dumb_create= vkms_dumb_create,
> > + .dumb_map_offset= vkms_dumb_map,
> > + .gem_vm_ops = &vkms_gem_vm_ops,
> >
> > .name = DRIVER_NAME,
> > .desc = DRIVER_DESC,
> > diff --git a/drivers/gpu/drm/vkms/vkms_drv.h
> > b/drivers/gpu/drm/vkms/vkms_drv.h
> > index b0f9d2e61a42..54bb3dd2b2c1 100644
> > --- a/drivers/gpu/drm/vkms/vkms_drv.h
> > +++ b/drivers/gpu/drm/vkms/vkms_drv.h
> > @@ -3,6 +3,7 @@
> >
> > #include
> > #include
> > +#include
> > #include
> >
> > static const u32 vkms_formats[] = {
> > @@ -21,6 +22,12 @@ struct vkms_device {
> > struct vkms_output output;
> > };
> >
> > +struct vkms_gem_object {
> > + struct drm_gem_object gem;
> > + struct mutex pages_lock; /* Page lock used in page fault handler */
> > + struct page **pages;
> > +};
> > +
> > int vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,
> >struct drm_plane *primary, struct drm_plane *cursor);
> >
> > @@ -28,4 +35,18 @@ int vkms_output_init(struct vkms_device *vkmsdev);
> >
> > struct drm_plane *vkms_plane_init(struct vkms_device *vkmsdev);
> >
> > +/* Gem stuff */
> > +struct drm_gem_object *vkms_gem_create(struct drm_device *dev,
> > + struct drm_file *file,
> > + u32 *handle,
> > + u64 size);
> > +
> > +int vkms_gem_fault(struct vm_fault *vmf);
> > +
> > +int vkms_dumb_create(struct drm_file *file, struct drm_device *dev,
> > +struct drm_mode_create_dumb *args);
> > +
> > +int vkms_dumb_map(struct drm_file *file, struct drm_device *dev,
> > + u32 handle, u64 *offset);
> > +
> > #endif /* _VKMS_DRV_H_ */
> > diff --git a/drivers/gpu/drm/vkms/vkms_gem.c
> > b/drivers/gpu/drm/vkms/vkms_gem.c
> > new file mode 100644
> > index ..9f820f56b9e0
> > --- /dev/null
> > +++ b/drivers/gpu/drm/vkms/vkms_gem.c
> > @@ -0,0 +1,168 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later versi
[Bug 107183] Enabling Glamor takes half a second
https://bugs.freedesktop.org/show_bug.cgi?id=107183 --- Comment #1 from Michel Dänzer --- FWIW, this only takes a few milliseconds on my systems. You'd have to profile where the time is spent on your system, but it's more likely somewhere between glamor and Mesa / LLVM than in the kernel. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH V2 3/5] drm/vkms: Add atomic helpers functions
On Thu, Jun 21, 2018 at 09:16:41AM -0300, Rodrigo Siqueira wrote:
> This patch adds the struct drm_crtc_helper_funcs with simple
> atomic_check and atomic_enable functions.
>
> Signed-off-by: Rodrigo Siqueira
> ---
> drivers/gpu/drm/vkms/vkms_crtc.c | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c
> b/drivers/gpu/drm/vkms/vkms_crtc.c
> index bf76cd39ece7..84cc05506b09 100644
> --- a/drivers/gpu/drm/vkms/vkms_crtc.c
> +++ b/drivers/gpu/drm/vkms/vkms_crtc.c
> @@ -19,6 +19,22 @@ static const struct drm_crtc_funcs vkms_crtc_funcs = {
> .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> };
>
> +static int vkms_crtc_atomic_check(struct drm_crtc *crtc,
> + struct drm_crtc_state *state)
> +{
> + return 0;
> +}
> +
> +static void vkms_crtc_atomic_enable(struct drm_crtc *crtc,
> + struct drm_crtc_state *old_state)
> +{
> +}
Please don't add empty functions when not requird (these callbacks should
all be optional). Also I'd squash this patch in with the patch adding the
vblank hrtimer, splitting this out doesn't really make sense.
-Daniel
> +
> +static const struct drm_crtc_helper_funcs vkms_crtc_helper_funcs = {
> + .atomic_check = vkms_crtc_atomic_check,
> + .atomic_enable = vkms_crtc_atomic_enable,
> +};
> +
> int vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,
> struct drm_plane *primary, struct drm_plane *cursor)
> {
> @@ -31,5 +47,7 @@ int vkms_crtc_init(struct drm_device *dev, struct drm_crtc
> *crtc,
> return ret;
> }
>
> + drm_crtc_helper_add(crtc, &vkms_crtc_helper_funcs);
> +
> return ret;
> }
> --
> 2.17.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH V2 4/5] drm/vkms: Add connectors helpers
On Thu, Jun 21, 2018 at 09:17:09AM -0300, Rodrigo Siqueira wrote:
> This patch adds the struct drm_connector_helper_funcs with some
> necessary hooks. Additionally, it also adds some missing hooks at
> drm_connector_funcs.
>
> Signed-off-by: Rodrigo Siqueira
> ---
> drivers/gpu/drm/vkms/vkms_drv.c| 6 --
> drivers/gpu/drm/vkms/vkms_drv.h| 9 +
> drivers/gpu/drm/vkms/vkms_output.c | 27 +++
> 3 files changed, 36 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/drivers/gpu/drm/vkms/vkms_drv.c
> index cc046fff985c..fe93f8c17997 100644
> --- a/drivers/gpu/drm/vkms/vkms_drv.c
> +++ b/drivers/gpu/drm/vkms/vkms_drv.c
> @@ -19,12 +19,6 @@
> #define DRIVER_MAJOR 1
> #define DRIVER_MINOR 0
>
> -#define XRES_MIN32
> -#define YRES_MIN32
> -
> -#define XRES_MAX 8192
> -#define YRES_MAX 8192
> -
> static struct vkms_device *vkms_device;
>
> static const struct file_operations vkms_driver_fops = {
> diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h
> index 54bb3dd2b2c1..76f1720f81a5 100644
> --- a/drivers/gpu/drm/vkms/vkms_drv.h
> +++ b/drivers/gpu/drm/vkms/vkms_drv.h
> @@ -6,6 +6,15 @@
> #include
> #include
>
> +#define XRES_MIN32
> +#define YRES_MIN32
> +
> +#define XRES_DEF 1024
> +#define YRES_DEF 768
> +
> +#define XRES_MAX 8192
> +#define YRES_MAX 8192
> +
> static const u32 vkms_formats[] = {
> DRM_FORMAT_XRGB,
> };
> diff --git a/drivers/gpu/drm/vkms/vkms_output.c
> b/drivers/gpu/drm/vkms/vkms_output.c
> index 48143eac3c12..fef3b1c1b054 100644
> --- a/drivers/gpu/drm/vkms/vkms_output.c
> +++ b/drivers/gpu/drm/vkms/vkms_output.c
> @@ -8,6 +8,7 @@
>
> #include "vkms_drv.h"
> #include
> +#include
>
> static void vkms_connector_destroy(struct drm_connector *connector)
> {
> @@ -18,12 +19,36 @@ static void vkms_connector_destroy(struct drm_connector
> *connector)
> static const struct drm_connector_funcs vkms_connector_funcs = {
> .fill_modes = drm_helper_probe_single_connector_modes,
> .destroy = vkms_connector_destroy,
> + .reset = drm_atomic_helper_connector_reset,
> + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> };
>
> static const struct drm_encoder_funcs vkms_encoder_funcs = {
> .destroy = drm_encoder_cleanup,
> };
>
> +static int vkms_conn_get_modes(struct drm_connector *connector)
> +{
> + int count;
> +
> + count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
> + drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
> +
> + return count;
> +}
> +
> +static int vkms_conn_mode_valid(struct drm_connector *connector,
> + struct drm_display_mode *mode)
> +{
> + return MODE_OK;
> +}
No need to implement this dummy function, it's the default behaviour.
Please remove. Otherwise lgtm.
Thanks, Daniel
> +
> +static const struct drm_connector_helper_funcs vkms_conn_helper_funcs = {
> + .get_modes= vkms_conn_get_modes,
> + .mode_valid = vkms_conn_mode_valid,
> +};
> +
> int vkms_output_init(struct vkms_device *vkmsdev)
> {
> struct vkms_output *output = &vkmsdev->output;
> @@ -49,6 +74,8 @@ int vkms_output_init(struct vkms_device *vkmsdev)
> goto err_connector;
> }
>
> + drm_connector_helper_add(connector, &vkms_conn_helper_funcs);
> +
> ret = drm_connector_register(connector);
> if (ret) {
> DRM_ERROR("Failed to register connector\n");
> --
> 2.17.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH V2 5/5] drm/vkms: Add plane helper struct
On Thu, Jun 21, 2018 at 09:17:25AM -0300, Rodrigo Siqueira wrote:
> This patch adds the struct drm_plane_helper_funcs and the required atomic
> hooks.
>
> Signed-off-by: Rodrigo Siqueira
> ---
> drivers/gpu/drm/vkms/vkms_plane.c | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/vkms/vkms_plane.c
> b/drivers/gpu/drm/vkms/vkms_plane.c
> index 2c25b1d6ab5b..f7f63143f6d0 100644
> --- a/drivers/gpu/drm/vkms/vkms_plane.c
> +++ b/drivers/gpu/drm/vkms/vkms_plane.c
> @@ -19,6 +19,22 @@ static const struct drm_plane_funcs vkms_plane_funcs = {
> .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
> };
>
> +static int vkms_plane_atomic_check(struct drm_plane *plane,
> +struct drm_plane_state *state)
> +{
> + return 0;
> +}
> +
> +static void vkms_primary_plane_update(struct drm_plane *plane,
> + struct drm_plane_state *old_state)
> +{
> +}
Again no dummy functions pls, and I'd squash this in with whatever patch
actually needs it. Not sure we do need it already (I think Haneen does,
but she can pick this all up into her series).
-Daniel
> +
> +static const struct drm_plane_helper_funcs vkms_primary_helper_funcs = {
> + .atomic_check = vkms_plane_atomic_check,
> + .atomic_update = vkms_primary_plane_update,
> +};
> +
> struct drm_plane *vkms_plane_init(struct vkms_device *vkmsdev)
> {
> struct drm_device *dev = &vkmsdev->drm;
> @@ -42,5 +58,7 @@ struct drm_plane *vkms_plane_init(struct vkms_device
> *vkmsdev)
> return ERR_PTR(ret);
> }
>
> + drm_plane_helper_add(plane, &vkms_primary_helper_funcs);
> +
> return plane;
> }
> --
> 2.17.1
>
--
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Re: [PATCH 1/3] vulkan: Define new VK_MESA_query_timestamp extension [v2]
On Tue, 10 Jul 2018 11:02:23 -0700 "Keith Packard" wrote: > Pekka Paalanen writes: > > > On Sat, 23 Jun 2018 12:13:53 -0500 > > Jason Ekstrand wrote: > > > >> I haven't thought through this comment all that hard but would it make > >> sense to have three timestamps, CPU, GPU, CPU so that you have error bars > >> on the GPU timestamp? At the very least, two timestamps would be better > >> than one so that, when we pull it into the kernel, it can provide > >> something > >> more accurate than userspace trying to grab a snapshot. > > > > Hi, > > > > three timestamps sounds like a good idea to me, but you might want to > > reach out to media developers (e.g. gstreamer) who have experience in > > synchronizing different clocks and what that will actually take. > > Oh, I know that's really hard, and I don't want to solve that problem > here. I explicitly *don't* solve it though -- I simply expose the > ability to get correlated values in the two application-visible time > domains that the Vulkan API already exposes (surface time and GPU > time). How to synchronize the application as those two clocks drift > around is outside the domain of this extension. Hi Keith, I did not mean you would be solving that problem. I meant that it would be good to figure out what people actually want from the API to be able to solve the problem themselves. Thanks, pq pgpqgqXubaZJn.pgp Description: OpenPGP digital signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm: gma500: Changed __attribute__((packed)) to __packed
On Tue, Jul 10, 2018 at 03:00:21PM +0200, Eames Trinh wrote:
> Signed-off-by: Eames Trinh
Applied, thanks.
-Daniel
> ---
> drivers/gpu/drm/gma500/intel_bios.h | 38
> ++---
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/intel_bios.h
> b/drivers/gpu/drm/gma500/intel_bios.h
> index 978ae4b25e82..e0ccf1d19a4d 100644
> --- a/drivers/gpu/drm/gma500/intel_bios.h
> +++ b/drivers/gpu/drm/gma500/intel_bios.h
> @@ -34,7 +34,7 @@ struct vbt_header {
> u8 reserved0;
> u32 bdb_offset; /**< from beginning of VBT */
> u32 aim_offset[4]; /**< from beginning of VBT */
> -} __attribute__((packed));
> +} __packed;
>
>
> struct bdb_header {
> @@ -61,7 +61,7 @@ struct vbios_data {
> u8 rsvd4; /* popup memory size */
> u8 resize_pci_bios;
> u8 rsvd5; /* is crt already on ddc2 */
> -} __attribute__((packed));
> +} __packed;
>
> /*
> * There are several types of BIOS data blocks (BDBs), each block has
> @@ -133,7 +133,7 @@ struct bdb_general_features {
> u8 dp_ssc_enb:1;/* PCH attached eDP supports SSC */
> u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
> u8 rsvd11:3; /* finish byte */
> -} __attribute__((packed));
> +} __packed;
>
> /* pre-915 */
> #define GPIO_PIN_DVI_LVDS0x03 /* "DVI/LVDS DDC GPIO pins" */
> @@ -213,7 +213,7 @@ struct child_device_config {
> u8 dvo2_wiring;
> u16 extended_type;
> u8 dvo_function;
> -} __attribute__((packed));
> +} __packed;
>
>
> struct bdb_general_definitions {
> @@ -256,7 +256,7 @@ struct bdb_lvds_options {
> u8 lvds_edid:1;
> u8 rsvd2:1;
> u8 rsvd4;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_backlight {
> u8 type:2;
> @@ -268,7 +268,7 @@ struct bdb_lvds_backlight {
> u8 i2caddr;
> u8 brightnesscmd;
> /*FIXME: more...*/
> -} __attribute__((packed));
> +} __packed;
>
> /* LFP pointer table contains entries to the struct below */
> struct bdb_lvds_lfp_data_ptr {
> @@ -278,12 +278,12 @@ struct bdb_lvds_lfp_data_ptr {
> u8 dvo_table_size;
> u16 panel_pnp_id_offset;
> u8 pnp_table_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data_ptrs {
> u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
> struct bdb_lvds_lfp_data_ptr ptr[16];
> -} __attribute__((packed));
> +} __packed;
>
> /* LFP data has 3 blocks per entry */
> struct lvds_fp_timing {
> @@ -300,7 +300,7 @@ struct lvds_fp_timing {
> u32 pfit_reg;
> u32 pfit_reg_val;
> u16 terminator;
> -} __attribute__((packed));
> +} __packed;
>
> struct lvds_dvo_timing {
> u16 clock; /**< In 10khz */
> @@ -328,7 +328,7 @@ struct lvds_dvo_timing {
> u8 vsync_positive:1;
> u8 hsync_positive:1;
> u8 rsvd2:1;
> -} __attribute__((packed));
> +} __packed;
>
> struct lvds_pnp_id {
> u16 mfg_name;
> @@ -336,17 +336,17 @@ struct lvds_pnp_id {
> u32 serial;
> u8 mfg_week;
> u8 mfg_year;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data_entry {
> struct lvds_fp_timing fp_timing;
> struct lvds_dvo_timing dvo_timing;
> struct lvds_pnp_id pnp_id;
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_lvds_lfp_data {
> struct bdb_lvds_lfp_data_entry data[16];
> -} __attribute__((packed));
> +} __packed;
>
> struct aimdb_header {
> char signature[16];
> @@ -354,12 +354,12 @@ struct aimdb_header {
> u16 aimdb_version;
> u16 aimdb_header_size;
> u16 aimdb_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct aimdb_block {
> u8 aimdb_id;
> u16 aimdb_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct vch_panel_data {
> u16 fp_timing_offset;
> @@ -370,12 +370,12 @@ struct vch_panel_data {
> u8 text_fitting_size;
> u16 graphics_fitting_offset;
> u8 graphics_fitting_size;
> -} __attribute__((packed));
> +} __packed;
>
> struct vch_bdb_22 {
> struct aimdb_block aimdb_block;
> struct vch_panel_data panels[16];
> -} __attribute__((packed));
> +} __packed;
>
> struct bdb_sdvo_lvds_options {
> u8 panel_backlight;
> @@ -391,7 +391,7 @@ struct bdb_sdvo_lvds_options {
> u8 panel_misc_bits_2;
> u8 panel_misc_bits_3;
> u8 panel_misc_bits_4;
> -} __attribute__((packed));
> +} __packed;
>
> #define BDB_DRIVER_FEATURE_NO_LVDS 0
> #define BDB_DRIVER_FEATURE_INT_LVDS 1
> @@ -436,7 +436,7 @@ struct bdb_driver_features {
>
> u8 hdmi_termination;
> u8 custom_vbt_version;
> -} __attribute__((packed));
> +} __packed;
>
> #define EDP_18BPP0
> #define EDP_24BPP1
> --
> 2.11.0
>
> ___
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> dri-devel@lists.freedesktop.org
> https://lists.fre
[PATCH] drm/nouveau/hwmon: potential uninitialized variables
Smatch complains that "value" can be uninitialized when kstrtol() returns -ERANGE. Signed-off-by: Dan Carpenter diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c b/drivers/gpu/drm/nouveau/nouveau_hwmon.c index 44178b4c3599..08a1ab6b150d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c +++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c @@ -69,8 +69,8 @@ nouveau_hwmon_set_temp1_auto_point1_temp(struct device *d, struct nvkm_therm *therm = nvxx_therm(&drm->client.device); long value; - if (kstrtol(buf, 10, &value) == -EINVAL) - return count; + if (kstrtol(buf, 10, &value)) + return -EINVAL; therm->attr_set(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST, value / 1000); @@ -102,8 +102,8 @@ nouveau_hwmon_set_temp1_auto_point1_temp_hyst(struct device *d, struct nvkm_therm *therm = nvxx_therm(&drm->client.device); long value; - if (kstrtol(buf, 10, &value) == -EINVAL) - return count; + if (kstrtol(buf, 10, &value)) + return -EINVAL; therm->attr_set(therm, NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST, value / 1000); @@ -156,7 +156,7 @@ nouveau_hwmon_set_pwm1_min(struct device *d, struct device_attribute *a, long value; int ret; - if (kstrtol(buf, 10, &value) == -EINVAL) + if (kstrtol(buf, 10, &value)) return -EINVAL; ret = therm->attr_set(therm, NVKM_THERM_ATTR_FAN_MIN_DUTY, value); @@ -179,7 +179,7 @@ nouveau_hwmon_set_pwm1_max(struct device *d, struct device_attribute *a, long value; int ret; - if (kstrtol(buf, 10, &value) == -EINVAL) + if (kstrtol(buf, 10, &value)) return -EINVAL; ret = therm->attr_set(therm, NVKM_THERM_ATTR_FAN_MAX_DUTY, value); ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] [v2] drm/sun4i: fix build failure with CONFIG_DRM_SUN8I_MIXER=m
On Mon, Jul 09, 2018 at 06:05:55PM +0200, Arnd Bergmann wrote:
> Having DRM_SUN4I built-in but DRM_SUN8I_MIXER as a loadable module results in
> a link error, as we try to access a symbol from the sun8i_tcon_top.ko module:
>
> ERROR: "sun8i_tcon_top_of_table" [drivers/gpu/drm/sun4i/sun8i-drm-hdmi.ko]
> undefined!
> ERROR: "sun8i_tcon_top_of_table" [drivers/gpu/drm/sun4i/sun4i-drm.ko]
> undefined!
>
> This solves the problem by adding a silent symbol for the tcon_top module,
> building it as a separate module in exactly the cases that we need it,
> but in a way that it is reachable by the other modules.
>
> Fixes: 57e23de02f48 ("drm/sun4i: DW HDMI: Expand algorithm for possible
> crtcs")
> Fixes: ef0cf6441fbb ("drm/sun4i: Add support for traversing graph with TCON
> TOP")
> Signed-off-by: Arnd Bergmann
Applied, thanks!
Maxime
--
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Embedded Linux and Kernel engineering
https://bootlin.com
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[Bug 107139] [CI] KBL-G Hades Canyon doesn't survive igt@gem_exec_suspend@basic-s4-devices
https://bugs.freedesktop.org/show_bug.cgi?id=107139 Tomi Sarvela changed: What|Removed |Added Assignee|intel-gfx-bugs@lists.freede |dri-devel@lists.freedesktop |sktop.org |.org i915 platform||KBL Component|DRM/Intel |DRM/AMDgpu QA Contact|intel-gfx-bugs@lists.freede | |sktop.org | OS|All |Linux (All) Hardware|Other |x86-64 (AMD64) --- Comment #2 from Tomi Sarvela --- Trace catched. Moving bug to DRM/AMDgpu side [ 201.720189] atkbd serio0: Use 'setkeycodes 7c ' to make it known. [ 201.781782] done (allocated 209842 pages) [ 202.536562] DMAR: DRHD: handling fault status reg 3 [ 202.536585] DMAR: [DMA Read] Request device [01:00.0] fault addr 527000 [fault reason 06] PTE Read access is not set [ 203.554655] [drm:amdgpu_vce_ring_test_ib [amdgpu]] *ERROR* amdgpu: IB test timed out. [ 203.554684] [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* amdgpu: failed testing IB on ring 15 (-110). [ 203.554687] [drm:process_one_work] *ERROR* ib ring test failed (-110). [ 207.647706] usb usb1: root hub lost power or was reset [ 207.647709] usb usb2: root hub lost power or was reset [ 207.648779] usb usb3: root hub lost power or was reset [ 207.648783] usb usb4: root hub lost power or was reset [ 207.977164] [drm:uvd_v6_0_ring_test_ring [amdgpu]] *ERROR* amdgpu: ring 12 test failed (0xCAFEDEAD) [ 207.977177] [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block failed -22 [ 207.977189] [drm:amdgpu_device_resume [amdgpu]] *ERROR* amdgpu_device_ip_resume failed (-22). [ 207.977192] dpm_run_callback(): pci_pm_restore+0x0/0xa0 returns -22 [ 207.977198] PM: Device :01:00.0 failed to restore async: error -22 [ 208.256034] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0). [ 208.256036] atkbd serio0: Use 'setkeycodes 7c ' to make it known. [ 208.459780] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0). [ 208.459782] atkbd serio0: Use 'setkeycodes 7c ' to make it known. [ 208.664209] atkbd serio0: Unknown key released (translated set 2, code 0x7c on isa0060/serio0). [ 208.664211] atkbd serio0: Use 'setkeycodes 7c ' to make it known. [ 208.671947] Setting dangerous option reset - tainting kernel Full trace: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4467/fi-kbl-8809g/igt@gem_exec_susp...@basic-s4-devices.html History: https://intel-gfx-ci.01.org/tree/drm-tip/fi-kbl-8809g.html Hardware: Intel Hades Canyon NUC8i7HVK (Kaby Lake CPU with "Vega-M" graphic) Kconfig: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4467/kernel.config.bz2 -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 00/18] Allwinner R40 HDMI refactoring
On Tue, Jul 10, 2018 at 10:34:53PM +0200, Jernej Skrabec wrote: > This series fixes several issues found in R40 HDMI patch series after > it was applied. Conversation can be found here: > http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/586011.html > > Patches are based on latest linux-next (next-20180710) and are ordered > in such way that they don't break R40 HDMI at any time. Because of that > I suggest that whole series goes through drm-misc to preserve that order. > > I also tested those patches on H3 to make sure it doesn't break other > platforms. However, it would be nice to test for regressions also on > older SoCs (with DE1). > > Best regards, > Jernej Applied all patches but the patch 10, thanks! Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 00/18] Allwinner R40 HDMI refactoring
On Wed, Jul 11, 2018 at 4:30 PM, Maxime Ripard wrote: > On Tue, Jul 10, 2018 at 10:34:53PM +0200, Jernej Skrabec wrote: >> This series fixes several issues found in R40 HDMI patch series after >> it was applied. Conversation can be found here: >> http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/586011.html >> >> Patches are based on latest linux-next (next-20180710) and are ordered >> in such way that they don't break R40 HDMI at any time. Because of that >> I suggest that whole series goes through drm-misc to preserve that order. >> >> I also tested those patches on H3 to make sure it doesn't break other >> platforms. However, it would be nice to test for regressions also on >> older SoCs (with DE1). >> >> Best regards, >> Jernej > > Applied all patches but the patch 10, thanks! Patch 4 actually has an error. Hope you haven't pushed it out yet. ChenYu ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: 答复: 答复: [alsa-devel] 答复: [PATCH] vgaswitchroo: set audio client id according to bound gpu client id
On 2018年07月11日 15:19, Takashi Iwai wrote: On Tue, 10 Jul 2018 13:21:00 +0200, Takashi Iwai wrote: revert the fix of amdgpu suspend issue, audio issue also can be observed. Did you check the behavior with the single AMD GPU hardware? If confirmed, we can forget about vga_switcheroo. ... and taking a look back at the recent changes, I guess it can be the forced runtime PM enablement, not directly with vga_switcheroo action itself. Yeah, the function vga_switcheroo_set_dynamic_switch() has discarded, so there is no way GFX driver to control audio power. However, keep in mind, current audio is bound to iGPU, that mean the issue should be nothing about vgaswtichreoo. since current audio pci bus is different from dGPU, that means the pci_bus_set_current_state() in vga_switcheroo_runtime_suspend() and pci_wakeup_bus() in vga_switcheroo_runtime_resume() could not touch the audio pci power state from dGPU instance. This is a feedback got from our OEM developer, it is the overview of audio detect process. First, the kernel audio driver will be triggered to read ELD, if the >> ELD is valid, it will report a jack event (on or available) to sound >> core driver; the pulseaudio subscribe all jack events, if it is told >> that the hdmi jack is plugged in (on), the pulseaudio will set this >> port to available, then the pa-card or pa-sink has available port, it >> can be selected (manually, some daemons or policy in >> /usr/share/pulseaudio/alsa-mixer/) as default output card/default sink. If the description is correct. I think there are maybe two problems. 1. audio will auto power off after setup device link duo to usage_count=0. 2. duo to audio is power down, it could not get the HDMI jack insert event. How do you think? Jim, could you tell me which PCI devices are handled as vga_switcheroo audio client? The kernel should show all messages "xxx: Handle vga_switcheroo audio client". [ 4.311095] snd_hda_intel :06:00.1: enabling device ( -> 0002) [ 4.314286] snd_hda_intel :06:00.1: Handle vga_switcheroo audio client [ 4.314822] snd_hda_intel :06:00.6: enabling device ( -> 0002) 01:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:699f] (rev c3) 06:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15dd] (rev d1) 06:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15de] Thanks JimQu At best, give the full dmesg output and the lspci -nv output. thanks, Takashi ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC PATCH] mm, oom: distinguish blockable mode for mmu notifiers
On Tue 10-07-18 19:20:20, Leon Romanovsky wrote: > On Tue, Jul 10, 2018 at 04:14:10PM +0200, Michal Hocko wrote: > > On Tue 10-07-18 16:40:40, Leon Romanovsky wrote: > > > On Mon, Jul 09, 2018 at 02:29:08PM +0200, Michal Hocko wrote: > > > > On Wed 27-06-18 09:44:21, Michal Hocko wrote: > > > > > This is the v2 of RFC based on the feedback I've received so far. The > > > > > code even compiles as a bonus ;) I haven't runtime tested it yet, > > > > > mostly > > > > > because I have no idea how. > > > > > > > > > > Any further feedback is highly appreciated of course. > > > > > > > > Any other feedback before I post this as non-RFC? > > > > > > From mlx5 perspective, who is primary user of umem_odp.c your change > > > looks ok. > > > > Can I assume your Acked-by? > > I didn't have a chance to test it because it applies on our rdma-next, but > fails to compile. What is the compilation problem? Is it caused by the patch or some other unrelated changed? -- Michal Hocko SUSE Labs ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: 答复: 答复: [alsa-devel] 答复: [PATCH] vgaswitchroo: set audio client id according to bound gpu client id
On Wed, 11 Jul 2018 10:41:38 +0200,
jimqu wrote:
>
>
>
> On 2018年07月11日 15:19, Takashi Iwai wrote:
> > On Tue, 10 Jul 2018 13:21:00 +0200,
> > Takashi Iwai wrote:
> >>> revert the fix of amdgpu suspend issue, audio issue also can be observed.
> >> Did you check the behavior with the single AMD GPU hardware?
> >> If confirmed, we can forget about vga_switcheroo.
> > ... and taking a look back at the recent changes, I guess it can be
> > the forced runtime PM enablement, not directly with vga_switcheroo
> > action itself.
>
> Yeah, the function vga_switcheroo_set_dynamic_switch() has discarded,
> so there is no way GFX driver to control audio power. However, keep in
> mind, current audio is bound to iGPU, that mean the issue should be
> nothing about
> vgaswtichreoo. since current audio pci bus is different from dGPU,
> that means the pci_bus_set_current_state() in
> vga_switcheroo_runtime_suspend() and pci_wakeup_bus() in
> vga_switcheroo_runtime_resume() could not touch the audio pci power
> state from dGPU instance.
>
> This is a feedback got from our OEM developer, it is the overview of
> audio detect process.
>
> > First, the kernel audio driver will be triggered to read ELD, if the
> >> ELD is valid, it will report a jack event (on or available) to sound
> >> core driver; the pulseaudio subscribe all jack events, if it is told
> >> that the hdmi jack is plugged in (on), the pulseaudio will set this
> >> port to available, then the pa-card or pa-sink has available port, it
> >> can be selected (manually, some daemons or policy in
> >> /usr/share/pulseaudio/alsa-mixer/) as default output card/default sink.
>
> If the description is correct. I think there are maybe two problems.
>
> 1. audio will auto power off after setup device link duo to usage_count=0.
> 2. duo to audio is power down, it could not get the HDMI jack insert event.
>
> How do you think?
>
> > Jim, could you tell me which PCI devices are handled as vga_switcheroo
> > audio client? The kernel should show all messages "xxx: Handle
> > vga_switcheroo audio client".
>
> [ 4.311095] snd_hda_intel :06:00.1: enabling device ( -> 0002)
> [ 4.314286] snd_hda_intel :06:00.1: Handle vga_switcheroo audio
> client
> [ 4.314822] snd_hda_intel :06:00.6: enabling device ( -> 0002)
>
> 01:00.0 VGA compatible controller [0300]: Advanced Micro Devices,
> Inc. [AMD/ATI] Device [1002:699f] (rev c3)
> 06:00.0 VGA compatible controller [0300]: Advanced Micro Devices,
> Inc. [AMD/ATI] Device [1002:15dd] (rev d1)
> 06:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI]
> Device [1002:15de]
OK this sheds a brighter light, finally.
If my understanding is correct, the issue is a false vga_switcheroo
audio detection, after all. This is the primary GPU and it shouldn't
be registered as a vga_switcheroo discrete GPU.
Below is a very ugly workaround for this particular case. It assumes
that the AMD+AMD combo will never have audio outputs on both but only
for the primary, and it's possibly wrong.
Is there a handy way to identify whether the given VGA PCI entry is
a discrete GPU or not? The amdgpu and radeon seem checking ATPX
ACPI.
Takashi
---
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1418,8 +1418,18 @@ static int azx_dev_free(struct snd_device *device)
*/
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
{
+ static const struct pci_device_id ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
+ .class = PCI_BASE_CLASS_DISPLAY << 16,
+ .class_mask = 0xff << 16 },
+ {}
+ };
struct pci_dev *p;
+ /* check whether Intel graphics is present as primary GPU */
+ if (!pci_dev_present(ids))
+ return NULL;
+
/* check only discrete GPU */
switch (pci->vendor) {
case PCI_VENDOR_ID_ATI:
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Re: [PATCH 1/3 v4] ARM: dts: Modernize the Vexpress PL111 integration
On Tue, Jul 10, 2018 at 10:46:03AM +0100, Sudeep Holla wrote: > > > On 09/07/18 08:52, Linus Walleij wrote: > > The Versatile Express was submitted with the actual display > > bridges unconnected (but defined in the device tree) and > > mock "panels" encoded in the device tree node of the PL111 > > controller. > > > > This doesn't even remotely describe the actual Versatile > > Express hardware. Exploit the SiI9022 bridge by connecting > > the PL111 pads to it, making it use EDID or fallback values > > to drive the monitor. > > > > The also has to use the reserved memory through the > > CMA pool rather than by open coding a memory region and > > remapping it explicitly in the driver. To achieve this, > > a reserved-memory node must exist in the root of the > > device tree, so we need to pull that out of the > > motherboard .dtsi include files, and push it into each > > top-level device tree instead. > > > > We do the same manouver for all the Versatile Express > > boards, taking into account the different location of the > > video RAM depending on which chip select is used on > > each platform. > > > > This plays nicely with the new PL111 DRM driver and > > follows the standard ways of assigning bridges and > > memory pools for graphics. > > > > Cc: Sudeep Holla > > Cc: Lorenzo Pieralisi > > Cc: Liviu Dudau > > Cc: Mali DP Maintainers > > Cc: Robin Murphy > > Signed-off-by: Linus Walleij > > --- > > ChangeLog v3->v4: > > - Fix the ARM and ARM64 shared vexpress-v2m-rc1.dtsi > > file address-cells etc so that the ports do not give > > DTC warnings anymore. > > Still get below warnings, not sure if I need to upgrade my DTC ? > > vexpress-v2f-1xv7-ca53x2.dtb: Warning (graph_child_address): > /smb@800/motherboard/iofpga@3,/i2c@16/dvi-transmitter@39/ports: > graph node has single child node 'port@0', #address-cells/#size-cells > are not necessary > rtsm_ve-aemv8a.dtb: Warning (graph_child_address): > /smb@800/motherboard/iofpga@3,/i2c@16/dvi-transmitter@39/ports: > graph node has single child node 'port@0', #address-cells/#size-cells > are not necessary > > > - Fixed up the CA53 DTS: use the right chip select base > > at 0x1800. > > I really hate this as it make maintenance difficult, but I don't have > good alternative, so I am fine as it is for now :) > > > - Fixed up the Real-Time Systems Models Virtual Executive > > RTSMv8 AEM VE: > > - Added the I2C interface (whether implemented in the > > emulator or not) > > It doesn't work. This change is breaking the working CLCD on the models. > I just tested and CLCD driver returns > > > - Fixed the chip select of the memory node to the right > > memory base 0x1800. > > See, this keeps happening. > > Anyways I think you can drop RTSM changes if models don't support I2C > and DVI. > > Liviu, Hi Sudeep, > > As you deal with DRM drivers and I have no knowledge in that domain, > I want to hear your feedback or Ack/Review ? I was testing last week the previous version of the patchset but run into the issue with my toolchain having the new binutils that generates invalid code for THUMB2 kernels, so it took me a while to find that one out. For a VExpress that has a TC2 CoreTile, the HDLCD driver fails to load because the DT doesn't have the right "port" node, which is something I need to fix, but then we need to make sure we can switch outputs to the CoreTile and that is where I got to until now, due to some other commitments. Otherwise, provided Linus has a fix for the issues you've raised, I have nothing against these patches being merged, so if you need them: Acked-by: Liviu Dudau Best regards, Liviu > > -- > -- > Regards, > Sudeep -- | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --- ¯\_(ツ)_/¯ ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: 答复: 答复: [alsa-devel] 答复: [PATCH] vgaswitchroo: set audio client id according to bound gpu client id
On 2018年07月11日 17:04, Takashi Iwai wrote:
On Wed, 11 Jul 2018 10:41:38 +0200,
jimqu wrote:
On 2018年07月11日 15:19, Takashi Iwai wrote:
On Tue, 10 Jul 2018 13:21:00 +0200,
Takashi Iwai wrote:
revert the fix of amdgpu suspend issue, audio issue also can be observed.
Did you check the behavior with the single AMD GPU hardware?
If confirmed, we can forget about vga_switcheroo.
... and taking a look back at the recent changes, I guess it can be
the forced runtime PM enablement, not directly with vga_switcheroo
action itself.
Yeah, the function vga_switcheroo_set_dynamic_switch() has discarded,
so there is no way GFX driver to control audio power. However, keep in
mind, current audio is bound to iGPU, that mean the issue should be
nothing about
vgaswtichreoo. since current audio pci bus is different from dGPU,
that means the pci_bus_set_current_state() in
vga_switcheroo_runtime_suspend() and pci_wakeup_bus() in
vga_switcheroo_runtime_resume() could not touch the audio pci power
state from dGPU instance.
This is a feedback got from our OEM developer, it is the overview of
audio detect process.
First, the kernel audio driver will be triggered to read ELD, if the
ELD is valid, it will report a jack event (on or available) to sound
core driver; the pulseaudio subscribe all jack events, if it is told
that the hdmi jack is plugged in (on), the pulseaudio will set this
port to available, then the pa-card or pa-sink has available port, it
can be selected (manually, some daemons or policy in
/usr/share/pulseaudio/alsa-mixer/) as default output card/default sink.
If the description is correct. I think there are maybe two problems.
1. audio will auto power off after setup device link duo to usage_count=0.
2. duo to audio is power down, it could not get the HDMI jack insert event.
How do you think?
Jim, could you tell me which PCI devices are handled as vga_switcheroo
audio client? The kernel should show all messages "xxx: Handle
vga_switcheroo audio client".
[ 4.311095] snd_hda_intel :06:00.1: enabling device ( -> 0002)
[ 4.314286] snd_hda_intel :06:00.1: Handle vga_switcheroo audio
client
[ 4.314822] snd_hda_intel :06:00.6: enabling device ( -> 0002)
01:00.0 VGA compatible controller [0300]: Advanced Micro Devices,
Inc. [AMD/ATI] Device [1002:699f] (rev c3)
06:00.0 VGA compatible controller [0300]: Advanced Micro Devices,
Inc. [AMD/ATI] Device [1002:15dd] (rev d1)
06:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI]
Device [1002:15de]
OK this sheds a brighter light, finally.
If my understanding is correct, the issue is a false vga_switcheroo
audio detection, after all. This is the primary GPU and it shouldn't
be registered as a vga_switcheroo discrete GPU.
Below is a very ugly workaround for this particular case. It assumes
that the AMD+AMD combo will never have audio outputs on both but only
for the primary, and it's possibly wrong.
Is there a handy way to identify whether the given VGA PCI entry is
a discrete GPU or not? The amdgpu and radeon seem checking ATPX
ACPI.
This is no issue about this topic, in amdgpu driver, both iGPU/dGPU will
register as VGA_SWITCHEROO_UNKNOWN_ID, and the client id will be
re-initialized in vgaswitchreoo_enable() via ATPX call. Then, iGPU will
set as VGA_SWITCHEROO_IGD, and dGPU will set as VGA_SWITCHEROO_DIS.
I think current focus should be how to detect HDMI audio device under
audio suspend state.
Thanks
JimQu
Takashi
---
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1418,8 +1418,18 @@ static int azx_dev_free(struct snd_device *device)
*/
static struct pci_dev *get_bound_vga(struct pci_dev *pci)
{
+ static const struct pci_device_id ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
+ .class = PCI_BASE_CLASS_DISPLAY << 16,
+ .class_mask = 0xff << 16 },
+ {}
+ };
struct pci_dev *p;
+ /* check whether Intel graphics is present as primary GPU */
+ if (!pci_dev_present(ids))
+ return NULL;
+
/* check only discrete GPU */
switch (pci->vendor) {
case PCI_VENDOR_ID_ATI:
___
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Re: [PATCH v2 2/4] drm/arm/malidp: Implemented the size validation for AFBC framebuffers
On Tue, Jul 10, 2018 at 02:18:55PM +0100, Ayan Kumar Halder wrote:
> AFBC buffers include additional metadata which increases the required
> allocation size. Implement the appropriate size validation and sanity
> checking for AFBC buffers.
> Added malidp specific function for framebuffer creation. This checks
> if the framebuffer has AFBC modifiers and if so, it verifies the
> necessary constraints on the size, alignment, offsets and pitch.
>
> Changes from v2:
> - Replaced DRM_ERROR() with DRM_DEBUG_KMS() in
> malidp_verify_afbc_framebuffer_caps() and
> malidp_verify_afbc_framebuffer_size()
>
> Signed-off-by: Ayan Kumar halder
> Reviewed-by: Brian Starkey
> Reviewed-by: Liviu Dudau
Acked-by: Liviu Dudau
Thanks,
Liviu
> ---
> drivers/gpu/drm/arm/malidp_drv.c | 128
> ++-
> drivers/gpu/drm/arm/malidp_hw.h | 5 ++
> 2 files changed, 132 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/arm/malidp_drv.c
> b/drivers/gpu/drm/arm/malidp_drv.c
> index 8d20faa..262a830 100644
> --- a/drivers/gpu/drm/arm/malidp_drv.c
> +++ b/drivers/gpu/drm/arm/malidp_drv.c
> @@ -35,6 +35,7 @@
> #include "malidp_hw.h"
>
> #define MALIDP_CONF_VALID_TIMEOUT250
> +#define AFBC_HEADER_SIZE 16
>
> static void malidp_write_gamma_table(struct malidp_hw_device *hwdev,
>u32 data[MALIDP_COEFFTAB_NUM_COEFFS])
> @@ -245,8 +246,133 @@ static const struct drm_mode_config_helper_funcs
> malidp_mode_config_helpers = {
> .atomic_commit_tail = malidp_atomic_commit_tail,
> };
>
> +static bool
> +malidp_verify_afbc_framebuffer_caps(struct drm_device *dev,
> + const struct drm_mode_fb_cmd2 *mode_cmd)
> +{
> + const struct drm_format_info *info;
> +
> + if ((mode_cmd->modifier[0] >> 56) != DRM_FORMAT_MOD_VENDOR_ARM) {
> + DRM_DEBUG_KMS("Unknown modifier (not Arm)\n");
> + return false;
> + }
> +
> + if (mode_cmd->modifier[0] &
> + ~DRM_FORMAT_MOD_ARM_AFBC(AFBC_MOD_VALID_BITS)) {
> + DRM_DEBUG_KMS("Unsupported modifiers\n");
> + return false;
> + }
> +
> + info = drm_get_format_info(dev, mode_cmd);
> + if (!info) {
> + DRM_DEBUG_KMS("Unable to get the format information\n");
> + return false;
> + }
> +
> + if (info->num_planes != 1) {
> + DRM_DEBUG_KMS("AFBC buffers expect one plane\n");
> + return false;
> + }
> +
> + if (mode_cmd->offsets[0] != 0) {
> + DRM_DEBUG_KMS("AFBC buffers' plane offset should be 0\n");
> + return false;
> + }
> +
> + switch (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK) {
> + case AFBC_FORMAT_MOD_BLOCK_SIZE_16x16:
> + if ((mode_cmd->width % 16) || (mode_cmd->height % 16)) {
> + DRM_DEBUG_KMS("AFBC buffers must be aligned to 16
> pixels\n");
> + return false;
> + }
> + break;
> + default:
> + DRM_DEBUG_KMS("Unsupported AFBC block size\n");
> + return false;
> + }
> +
> + return true;
> +}
> +
> +static bool
> +malidp_verify_afbc_framebuffer_size(struct drm_device *dev,
> + struct drm_file *file,
> + const struct drm_mode_fb_cmd2 *mode_cmd)
> +{
> + int n_superblocks = 0;
> + const struct drm_format_info *info;
> + struct drm_gem_object *objs = NULL;
> + u32 afbc_superblock_size = 0, afbc_superblock_height = 0;
> + u32 afbc_superblock_width = 0, afbc_size = 0;
> +
> + switch (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK) {
> + case AFBC_FORMAT_MOD_BLOCK_SIZE_16x16:
> + afbc_superblock_height = 16;
> + afbc_superblock_width = 16;
> + break;
> + default:
> + DRM_DEBUG_KMS("AFBC superblock size is not supported\n");
> + return false;
> + }
> +
> + info = drm_get_format_info(dev, mode_cmd);
> +
> + n_superblocks = (mode_cmd->width / afbc_superblock_width) *
> + (mode_cmd->height / afbc_superblock_height);
> +
> + afbc_superblock_size = info->cpp[0] * afbc_superblock_width *
> + afbc_superblock_height;
> +
> + afbc_size = ALIGN(n_superblocks * AFBC_HEADER_SIZE, 128);
> +
> + if (mode_cmd->width * info->cpp[0] != mode_cmd->pitches[0]) {
> + DRM_DEBUG_KMS("Invalid value of pitch (=%u) should be same as
> width (=%u) * cpp (=%u)\n",
> + mode_cmd->pitches[0], mode_cmd->width,
> info->cpp[0]);
> + return false;
> + }
> +
> + objs = drm_gem_object_lookup(file, mode_cmd->handles[0]);
> + if (!objs) {
> + DRM_DEBUG_KMS("Failed to lookup GEM object\n");
> + return false;
> + }
> +
> + if (objs->size < afbc_size) {
> + DRM_DEBUG_KMS("buffer size (%zu) too small
Re: [PATCH v2 00/18] Allwinner R40 HDMI refactoring
On Wed, Jul 11, 2018 at 10:41:54AM +0200, Jernej Škrabec wrote: > Dne sreda, 11. julij 2018 ob 10:30:36 CEST je Maxime Ripard napisal(a): > > On Tue, Jul 10, 2018 at 10:34:53PM +0200, Jernej Skrabec wrote: > > > This series fixes several issues found in R40 HDMI patch series after > > > it was applied. Conversation can be found here: > > > http://lists.infradead.org/pipermail/linux-arm-kernel/2018-June/586011.htm > > > l > > > > > > Patches are based on latest linux-next (next-20180710) and are ordered > > > in such way that they don't break R40 HDMI at any time. Because of that > > > I suggest that whole series goes through drm-misc to preserve that order. > > > > > > I also tested those patches on H3 to make sure it doesn't break other > > > platforms. However, it would be nice to test for regressions also on > > > older SoCs (with DE1). > > > > > > Best regards, > > > Jernej > > > > Applied all patches but the patch 10, thanks! > > Maxime > > Ok, I'll send patch 10 separately. However, patch 4 needs a fix according to > test build robot: > > if (IS_ERR_VALUE(index)) > should be: > if (index < 0) Yeah, sorry, I forgot to say it, but I fixed it locally (and the return below as well). > Additionally, due to Arnds patch merged (drm/sun4i: fix build failure with > CONFIG_DRM_SUN8I_MIXER=m), sun4i_tcon.c needs additional handling if TCON_TOP > driver is not build. I'll drop it then, I haven't pushed it yet. Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 3/4] drm/arm/malidp: Set the AFBC register bits if the framebuffer has AFBC modifier
On Tue, Jul 10, 2018 at 02:18:56PM +0100, Ayan Kumar Halder wrote:
> Added the AFBC decoder registers for DP500 , DP550 and DP650.
> These registers control the processing of AFBC buffers. It controls various
> features like AFBC decoder enable, lossless transformation and block split
> as well as setting of the left, right, top and bottom cropping of AFBC buffers
> (in number of pixels).
> All the layers (except DE_SMART) support framebuffers with AFBC modifiers.
> One needs to set the pixel values of the top, left, bottom and right cropping
> for the AFBC framebuffer.
> Added the functionality in malidp_de_plane_update() to set the various
> registers for AFBC decoder, depending on the modifiers.
>
> Changes from v2:-
> - Removed the "if (fb->modifier)" check from malidp_de_plane_update()
> and added it in malidp_de_set_plane_afbc(). This will consolidate all the
> AFBC specific register configurations in a single function ie
> malidp_de_set_plane_afbc().
>
> Signed-off-by: Ayan Kumar halder
> Reviewed-by: Brian Starkey
Acked-by: Liviu Dudau
Thanks,
Liviu
> ---
> drivers/gpu/drm/arm/malidp_hw.c | 27 +++-
> drivers/gpu/drm/arm/malidp_hw.h | 2 +
> drivers/gpu/drm/arm/malidp_planes.c | 83
> +
> drivers/gpu/drm/arm/malidp_regs.h | 20 +
> 4 files changed, 113 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c
> index 4dbf39f..fd6b510 100644
> --- a/drivers/gpu/drm/arm/malidp_hw.c
> +++ b/drivers/gpu/drm/arm/malidp_hw.c
> @@ -76,33 +76,38 @@ static const struct malidp_format_id
> malidp550_de_formats[] = {
>
> static const struct malidp_layer malidp500_layers[] = {
> { DE_VIDEO1, MALIDP500_DE_LV_BASE, MALIDP500_DE_LV_PTR_BASE,
> - MALIDP_DE_LV_STRIDE0, MALIDP500_LV_YUV2RGB, ROTATE_ANY },
> + MALIDP_DE_LV_STRIDE0, MALIDP500_LV_YUV2RGB, ROTATE_ANY,
> + MALIDP500_DE_LV_AD_CTRL },
> { DE_GRAPHICS1, MALIDP500_DE_LG1_BASE, MALIDP500_DE_LG1_PTR_BASE,
> - MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY },
> + MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY, MALIDP500_DE_LG1_AD_CTRL },
> { DE_GRAPHICS2, MALIDP500_DE_LG2_BASE, MALIDP500_DE_LG2_PTR_BASE,
> - MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY },
> + MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY, MALIDP500_DE_LG2_AD_CTRL },
> };
>
> static const struct malidp_layer malidp550_layers[] = {
> { DE_VIDEO1, MALIDP550_DE_LV1_BASE, MALIDP550_DE_LV1_PTR_BASE,
> - MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY },
> + MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY,
> + MALIDP550_DE_LV1_AD_CTRL },
> { DE_GRAPHICS1, MALIDP550_DE_LG_BASE, MALIDP550_DE_LG_PTR_BASE,
> - MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY },
> + MALIDP_DE_LG_STRIDE, 0, ROTATE_ANY, MALIDP550_DE_LG_AD_CTRL },
> { DE_VIDEO2, MALIDP550_DE_LV2_BASE, MALIDP550_DE_LV2_PTR_BASE,
> - MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY },
> + MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY,
> + MALIDP550_DE_LV2_AD_CTRL },
> { DE_SMART, MALIDP550_DE_LS_BASE, MALIDP550_DE_LS_PTR_BASE,
> - MALIDP550_DE_LS_R1_STRIDE, 0, ROTATE_NONE },
> + MALIDP550_DE_LS_R1_STRIDE, 0, ROTATE_NONE, 0 },
> };
>
> static const struct malidp_layer malidp650_layers[] = {
> { DE_VIDEO1, MALIDP550_DE_LV1_BASE, MALIDP550_DE_LV1_PTR_BASE,
> - MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY },
> + MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY,
> + MALIDP550_DE_LV1_AD_CTRL },
> { DE_GRAPHICS1, MALIDP550_DE_LG_BASE, MALIDP550_DE_LG_PTR_BASE,
> - MALIDP_DE_LG_STRIDE, 0, ROTATE_COMPRESSED },
> + MALIDP_DE_LG_STRIDE, 0, ROTATE_COMPRESSED,
> MALIDP550_DE_LG_AD_CTRL },
> { DE_VIDEO2, MALIDP550_DE_LV2_BASE, MALIDP550_DE_LV2_PTR_BASE,
> - MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY },
> + MALIDP_DE_LV_STRIDE0, MALIDP550_LV_YUV2RGB, ROTATE_ANY,
> + MALIDP550_DE_LV2_AD_CTRL },
> { DE_SMART, MALIDP550_DE_LS_BASE, MALIDP550_DE_LS_PTR_BASE,
> - MALIDP550_DE_LS_R1_STRIDE, 0, ROTATE_NONE },
> + MALIDP550_DE_LS_R1_STRIDE, 0, ROTATE_NONE, 0 },
> };
>
> #define SE_N_SCALING_COEFFS 96
> diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h
> index 4390243..bbe6883 100644
> --- a/drivers/gpu/drm/arm/malidp_hw.h
> +++ b/drivers/gpu/drm/arm/malidp_hw.h
> @@ -67,6 +67,8 @@ struct malidp_layer {
> u16 stride_offset; /* offset to the first stride register. */
> s16 yuv2rgb_offset; /* offset to the YUV->RGB matrix entries */
> enum rotation_features rot;/* type of rotation supported */
> + /* address offset for the AFBC decoder registers */
> + u16 afbc_decoder_offset;
>
