[Bug 102204] GLideN64 very slow on oland/radeonsi

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102204

H4nN1baL  changed:

   What|Removed |Added

Version|17.1|17.2
 OS|All |Linux (All)
  Component|Drivers/Gallium/radeonsi|Drivers/Gallium/r600
   Assignee|reizemb...@gmail.com|dri-devel@lists.freedesktop
   ||.org
   Severity|normal  |major
   Hardware|Other   |x86-64 (AMD64)
   Priority|medium  |high

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[Bug 102204] GLideN64 very slow on r600/radeonsi

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=102204

H4nN1baL  changed:

   What|Removed |Added

Summary|GLideN64 very slow on   |GLideN64 very slow on
   |oland/radeonsi  |r600/radeonsi

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[Bug 104717] Rocket League: grass rendering broken with nir

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104717

Kenneth Graunke  changed:

   What|Removed |Added

 QA Contact|intel-3d-bugs@lists.freedes |dri-devel@lists.freedesktop
   |ktop.org|.org
   Assignee|intel-3d-bugs@lists.freedes |dri-devel@lists.freedesktop
   |ktop.org|.org
  Component|Drivers/DRI/i965|Drivers/Gallium/radeonsi

--- Comment #1 from Kenneth Graunke  ---
I bet the ac/nir code just doesn't respect the driconf option (which i965
doesn't use).  Moving the bug to radeonsi for now and assigning to Tim.

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[Bug 198123] Console is the wrong color at boot with radeon 6670

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=198123

Paul Tobias (tobias@gmail.com) changed:

   What|Removed |Added

 CC||tobias@gmail.com

--- Comment #21 from Paul Tobias (tobias@gmail.com) ---
I'm having the red console text problem with the ast driver too. It worked fine
with kernel 4.12.12, the problem appeared after upgrading the kernel to
4.14.14. 

The boot process starts with proper console text colours, but right after
kernel modesetting kicks in the white text changes to red. I've used the
"nomodeset" kernel parameter to work around the problem for a while. I'll
attach a picture which illustrates the problem.

I've bisected it to the same commit b8e2b0199cc377617dc238f5106352c06dcd3fa2 as
in comment #8.

Applying the patch from comment #13 on top of
b8e2b0199cc377617dc238f5106352c06dcd3fa2 fixes it for me.

And the patch from comment #17 on top of stable 4.14.14 fixes it too (without
the patch from comment #13).

Unfortunately I don't have a Radeon card, can't test with that.

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[Bug 198123] Console is the wrong color at boot with radeon 6670

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=198123

--- Comment #22 from Paul Tobias (tobias@gmail.com) ---
Created attachment 273783
  --> https://bugzilla.kernel.org/attachment.cgi?id=273783&action=edit
Red console text with kernel 4.14 and ast driver

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[Bug 198511] lags in youtube videos 1080p 60fps with radeon hd4650 and kernel 4.15rc8

[bugzilla-daemon]

https://bugzilla.kernel.org/show_bug.cgi?id=198511

--- Comment #29 from Christian König (christian.koe...@amd.com) ---
For this you need to call the driver IOCTL to create a buffer object directly.

Best is probably you use the Mesa code as and work from that backward, see here
https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
function radeon_create_bo.

drmCommandWriteRead(), struct drm_radeon_gem_create and all the defines you
need are provided by libdrm.

Domain should be RADEON_DOMAIN_GTT in this case, flags can be zero or
RADEON_GEM_GTT_WC.

Size and alignment should be obvious.

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Re: [PATCH 1/2] drm/sun4i: Handle DRM_BUS_FLAG_PIXDATA_*EDGE

[Maxime Ripard]

Hi,

On Sat, Jan 20, 2018 at 07:50:20PM +0100, Giulio Benetti wrote:
> Can't set dclk polarity on sun4i.
> 
> Handle both positive and negative dclk polarity,
> according to bus_flags.

It's not really that we can't set it, it's that it's been ignored.

> Signed-off-by: Giulio Benetti 
> ---
>  drivers/gpu/drm/sun4i/sun4i_tcon.c | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
> b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index f4284b5..6121210 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -17,6 +17,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  
> @@ -173,6 +174,9 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon 
> *tcon,
>  static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
>const struct drm_display_mode *mode)
>  {
> + struct drm_panel *panel = tcon->panel;
> + struct drm_connector *connector = panel->connector;
> + struct drm_display_info display_info = connector->display_info;
>   unsigned int bp, hsync, vsync;
>   u8 clk_delay;
>   u32 val = 0;
> @@ -226,8 +230,13 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon 
> *tcon,
>   if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
>   val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
>  
> + if(display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)
> + val |= SUN4I_TCON0_IO_POL_DCLK_PHASE(1);
> +

Checkpatch here returns:
ERROR: space required before the open parenthesis '('

And, where did you find that info? How does it interact with the
set_phase callback of the dotclock driver?

Maxime

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Re: [v3, 3/6] dt: booting-without-of: DT fix s/#interrupt-cell/#interrupt-cells/

[Michael Ellerman]

On Fri, 2017-06-02 at 12:38:46 UTC, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven 
> Acked-by: Rob Herring 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/4be4119d1fbd93c44d5c639735c312

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Re: [PATCH 2/2] drm/sun4i: Handle DRM_MODE_FLAG_**SYNC_POSITIVE correctly

[Maxime Ripard]

On Sat, Jan 20, 2018 at 07:50:21PM +0100, Giulio Benetti wrote:
> On previous handling, if specified DRM_MODE_FLAG_N*SYNC,
> it was ignored,
> because only PHSYNC and PVSYNC were taken into account.
> DRM_MODE_FLAG_P*SYNC and DRM_MODE_FLAG_N*SYNC are not exclusive.
> 
> If flags contains PVSYNC, it doesn't mean it is NVSYNC.
> And it's true also the contrary.
> Also, as I've checked with scope on A20,
> if (flags & PVSYNC) then SUN4I_TCON0_IO_POL_VSYNC_POSITIVE
> must be set, as name suggests.
> It seems all display io polarities starts inverted if 0.
> 
> Signed-off-by: Giulio Benetti 
> 
> PVSYNC and PHSYNC only
> 
> Signed-off-by: Giulio Benetti 

Checkpatch:
WARNING: Duplicate signature

> ---
>  drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
> b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index 6121210..e873a37 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -224,10 +224,10 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon 
> *tcon,
>SUN4I_TCON0_BASIC3_H_SYNC(hsync));
>  
>   /* Setup the polarity of the various signals */
> - if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
> + if (mode->flags & DRM_MODE_FLAG_PHSYNC)
>   val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
>  
> - if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
> + if (mode->flags & DRM_MODE_FLAG_PVSYNC)
>   val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;

I'm not sure why you were talking of the differences between NVSYNC
and PVSYNC if you're not making use of any of it here?

Also, how was it tested? This seems quite weird that we haven't caught
that one sooner, and I'm a bit worried about the possible regressions
here.

Maxime

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[Bug 101900] No HDMI HBR audio on Polaris (no TrueHD, no Atmos, no Neo:X, no HD Master audio)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101900

--- Comment #27 from letha...@gmail.com ---
After more tests, i have a small race condition on my systemctl setup which
causes X to be unable to load the "amdgpu" driver and fallbacks on
"modesetting" instead.

In this case, the videocard can't use vdpau anymore, so it's fully software
decoding. Then the sound is playing perfectly.

When X is loading the amdgpu driver, the sound problems are still present. The
video must eat the sound bandwidth or something (?)

Actually on "4.15.0-999-generic #201801102100"

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[Bug 101900] No HDMI HBR audio on Polaris (no TrueHD, no Atmos, no Neo:X, no HD Master audio) and static noise in sound when LPCM on amdgpu Xorg driver

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101900

letha...@gmail.com changed:

   What|Removed |Added

Summary|No HDMI HBR audio on|No HDMI HBR audio on
   |Polaris (no TrueHD, no  |Polaris (no TrueHD, no
   |Atmos, no Neo:X, no HD  |Atmos, no Neo:X, no HD
   |Master audio)   |Master audio) and static
   ||noise in sound when LPCM on
   ||amdgpu Xorg driver

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[PATCH v4 04/13] drm/sun4i: backend: Add a custom plane state

[Maxime Ripard]

We will need to store some additional data in the future to the state.
Create a custom plane state that will embed those data, in order to store
the pipe or whether or not that plane should use the frontend.

Reviewed-by: Chen-Yu Tsai 
Reviewed-by: Neil Armstrong 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_layer.c | 50 --
 drivers/gpu/drm/sun4i/sun4i_layer.h | 10 ++-
 2 files changed, 57 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 7bddf12548d3..b85a9a02d166 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -25,6 +25,50 @@ struct sun4i_plane_desc {
   uint32_tnformats;
 };
 
+static void sun4i_backend_layer_reset(struct drm_plane *plane)
+{
+   struct sun4i_layer_state *state;
+
+   if (plane->state) {
+   state = state_to_sun4i_layer_state(plane->state);
+
+   __drm_atomic_helper_plane_destroy_state(&state->state);
+
+   kfree(state);
+   plane->state = NULL;
+   }
+
+   state = kzalloc(sizeof(*state), GFP_KERNEL);
+   if (state) {
+   plane->state = &state->state;
+   plane->state->plane = plane;
+   }
+}
+
+static struct drm_plane_state *
+sun4i_backend_layer_duplicate_state(struct drm_plane *plane)
+{
+   struct sun4i_layer_state *copy;
+
+   copy = kzalloc(sizeof(*copy), GFP_KERNEL);
+   if (!copy)
+   return NULL;
+
+   __drm_atomic_helper_plane_duplicate_state(plane, ©->state);
+
+   return ©->state;
+}
+
+static void sun4i_backend_layer_destroy_state(struct drm_plane *plane,
+ struct drm_plane_state *state)
+{
+   struct sun4i_layer_state *s_state = state_to_sun4i_layer_state(state);
+
+   __drm_atomic_helper_plane_destroy_state(state);
+
+   kfree(s_state);
+}
+
 static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane,
   struct drm_plane_state 
*old_state)
 {
@@ -52,11 +96,11 @@ static const struct drm_plane_helper_funcs 
sun4i_backend_layer_helper_funcs = {
 };
 
 static const struct drm_plane_funcs sun4i_backend_layer_funcs = {
-   .atomic_destroy_state   = drm_atomic_helper_plane_destroy_state,
-   .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
+   .atomic_destroy_state   = sun4i_backend_layer_destroy_state,
+   .atomic_duplicate_state = sun4i_backend_layer_duplicate_state,
.destroy= drm_plane_cleanup,
.disable_plane  = drm_atomic_helper_disable_plane,
-   .reset  = drm_atomic_helper_plane_reset,
+   .reset  = sun4i_backend_layer_reset,
.update_plane   = drm_atomic_helper_update_plane,
 };
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.h 
b/drivers/gpu/drm/sun4i/sun4i_layer.h
index 4e84f438b346..d2c19348d1b0 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.h
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.h
@@ -22,12 +22,22 @@ struct sun4i_layer {
int id;
 };
 
+struct sun4i_layer_state {
+   struct drm_plane_state  state;
+};
+
 static inline struct sun4i_layer *
 plane_to_sun4i_layer(struct drm_plane *plane)
 {
return container_of(plane, struct sun4i_layer, plane);
 }
 
+static inline struct sun4i_layer_state *
+state_to_sun4i_layer_state(struct drm_plane_state *state)
+{
+   return container_of(state, struct sun4i_layer_state, state);
+}
+
 struct drm_plane **sun4i_layers_init(struct drm_device *drm,
 struct sunxi_engine *engine);
 
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[PATCH v4 00/13] drm/sun4i: Support the Display Engine frontend

[Maxime Ripard]

Hi,

This is a first serie to enable the display engine frontend.

This hardware block is found in the first generation Display Engine from
Allwinner. Its role is to implement more advanced features that the
associated backend, even though the backend alone can be used (and was used
so far) for basic composition.

Among those features, we will find hardware scaling, that is supported in
this serie, colorspace conversions, or more exotic formats support such as
the one output by the VPU.

Let me know what you think,
Maxime

Changes from v3:
  - Added some TODO notes for the ALPHA_EN and pipelines bits
  - Reset the frontend in the runtime_resume callback instead of probe

Changes from v2:
  - Substracted PHYS_OFFSET to the buffer address
  - Make sure we only probe and add to the component list on frontends that
are supported, and not simply the one enabled in the DTs
  - Reset the device at probe, and deassert the line after the clocks are
enabled
  - Fixed the format value used
  - Used drm_fb_cma_get_gem_addr
  - Added a define for the COEF_ACCESS_CTRL bit
  - Fixed a wrong comment
  - Kept the ordering of the engine ops
  - Reapplied the NULL plane pointer patch that got squashed in v2 somehow
  - s/backend/engine/ in the engine_ops documentation

Changes from v1:
  - Fixed the unbind function to not disable the already disabled clocks,
and to remove ourself from the frontend list
  - Changed the log level of the frontend disabled message
  - Added blank lines where suggested by Neil
  - Fixed an artifact that was happening when the plane using the frontend
was disabled. This was happening because the frontend was disabled
before the backend layer (that would be disabled at the next vblank).
This led to a significant rework of the patches, so I didn't apply all
the tags. I also had to take a few patches in.
  - Added engine ops documentation
  - Fixed a bug in our duplicate_state callback that wouldn't preserve the
frontend state
  - Removed the hardcoded register values and used the real ones instead.
  - Fixed some compilation errors reported by the 0-day bot.

Maxime Ripard (13):
  drm/sun4i: backend: Move line stride setup to buffer setup function
  drm/sun4i: backend: Document the engine operations
  drm/sun4i: backend: Allow a NULL plane pointer to retrieve the format
  drm/sun4i: backend: Add a custom plane state
  drm/sun4i: engine: Add a custom crtc atomic_check
  drm/sun4i: engine: Add a VBLANK quirk callback
  drm/sun4i: engine: Create an atomic_begin callback
  drm/sun4i: Add a driver for the display frontend
  drm/sun4i: backend: Wire in the frontend
  drm/sun4i: backend: Add a custom atomic_check for the frontend
  drm/sun4i: backend: Use runtime_pm variant of atomic_commit_tail
  drm/sun4i: backend: Make sure we don't have a commit pending
  ARM: dts: sun8i: a33 Enable our display frontend

 arch/arm/boot/dts/sun8i-a33.dtsi  |   1 +-
 drivers/gpu/drm/sun4i/Makefile|   3 +-
 drivers/gpu/drm/sun4i/sun4i_backend.c | 184 ++-
 drivers/gpu/drm/sun4i/sun4i_backend.h |  10 +-
 drivers/gpu/drm/sun4i/sun4i_crtc.c|  21 +-
 drivers/gpu/drm/sun4i/sun4i_drv.c |  27 +-
 drivers/gpu/drm/sun4i/sun4i_drv.h |   1 +-
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c |   6 +-
 drivers/gpu/drm/sun4i/sun4i_frontend.c| 389 +++-
 drivers/gpu/drm/sun4i/sun4i_frontend.h|  99 ++-
 drivers/gpu/drm/sun4i/sun4i_layer.c   |  83 -
 drivers/gpu/drm/sun4i/sun4i_layer.h   |  11 +-
 drivers/gpu/drm/sun4i/sun4i_tcon.c|   4 +-
 drivers/gpu/drm/sun4i/sunxi_engine.h  |  89 +-
 14 files changed, 907 insertions(+), 21 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.h

base-commit: f2e323798ce2553a10ddc720879553642e05e619
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[PATCH v4 10/13] drm/sun4i: backend: Add a custom atomic_check for the frontend

[Maxime Ripard]

Now that we have everything in place, we can start enabling the frontend.
This is more difficult than one would assume since there can only be one
plane using the frontend per-backend.

We therefore need to make sure that the userspace will not try to setup
multiple planes using it, since that would be impossible. In order to
prevent that, we can create an atomic_check callback that will check that
only one plane will effectively make use of the frontend in a given
configuration, and will toggle the switch in that plane state so that the
proper setup function can do their role.

Reviewed-by: Chen-Yu Tsai 
Reviewed-by: Neil Armstrong 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 65 -
 drivers/gpu/drm/sun4i/sun4i_backend.h |  2 +-
 2 files changed, 67 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 21b047e5b4b7..1b8e3dcbe47a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -11,6 +11,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -271,6 +272,69 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend 
*backend,
return 0;
 }
 
+static bool sun4i_backend_plane_uses_scaler(struct drm_plane_state *state)
+{
+   u16 src_h = state->src_h >> 16;
+   u16 src_w = state->src_w >> 16;
+
+   DRM_DEBUG_DRIVER("Input size %dx%d, output size %dx%d\n",
+src_w, src_h, state->crtc_w, state->crtc_h);
+
+   if ((state->crtc_h != src_h) || (state->crtc_w != src_w))
+   return true;
+
+   return false;
+}
+
+static bool sun4i_backend_plane_uses_frontend(struct drm_plane_state *state)
+{
+   struct sun4i_layer *layer = plane_to_sun4i_layer(state->plane);
+   struct sun4i_backend *backend = layer->backend;
+
+   if (IS_ERR(backend->frontend))
+   return false;
+
+   return sun4i_backend_plane_uses_scaler(state);
+}
+
+static int sun4i_backend_atomic_check(struct sunxi_engine *engine,
+ struct drm_crtc_state *crtc_state)
+{
+   struct drm_atomic_state *state = crtc_state->state;
+   struct drm_device *drm = state->dev;
+   struct drm_plane *plane;
+   unsigned int num_frontend_planes = 0;
+
+   DRM_DEBUG_DRIVER("Starting checking our planes\n");
+
+   if (!crtc_state->planes_changed)
+   return 0;
+
+   drm_for_each_plane_mask(plane, drm, crtc_state->plane_mask) {
+   struct drm_plane_state *plane_state =
+   drm_atomic_get_plane_state(state, plane);
+   struct sun4i_layer_state *layer_state =
+   state_to_sun4i_layer_state(plane_state);
+
+   if (sun4i_backend_plane_uses_frontend(plane_state)) {
+   DRM_DEBUG_DRIVER("Using the frontend for plane %d\n",
+plane->index);
+
+   layer_state->uses_frontend = true;
+   num_frontend_planes++;
+   } else {
+   layer_state->uses_frontend = false;
+   }
+   }
+
+   if (num_frontend_planes > SUN4I_BACKEND_NUM_FRONTEND_LAYERS) {
+   DRM_DEBUG_DRIVER("Too many planes going through the frontend, 
rejecting\n");
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 static void sun4i_backend_vblank_quirk(struct sunxi_engine *engine)
 {
struct sun4i_backend *backend = engine_to_sun4i_backend(engine);
@@ -415,6 +479,7 @@ static struct sun4i_frontend 
*sun4i_backend_find_frontend(struct sun4i_drv *drv,
 }
 
 static const struct sunxi_engine_ops sun4i_backend_engine_ops = {
+   .atomic_check   = sun4i_backend_atomic_check,
.commit = sun4i_backend_commit,
.layers_init= sun4i_layers_init,
.apply_color_correction = sun4i_backend_apply_color_correction,
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h 
b/drivers/gpu/drm/sun4i/sun4i_backend.h
index 350a2dbde31a..b5edf2d50a24 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -144,6 +144,8 @@
 #define SUN4I_BACKEND_HWCCOLORTAB_OFF  0x4c00
 #define SUN4I_BACKEND_PIPE_OFF(p)  (0x5000 + (0x400 * (p)))
 
+#define SUN4I_BACKEND_NUM_FRONTEND_LAYERS  1
+
 struct sun4i_backend {
struct sunxi_engine engine;
struct sun4i_frontend   *frontend;
-- 
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[PATCH v4 06/13] drm/sun4i: engine: Add a VBLANK quirk callback

[Maxime Ripard]

In some cases, the display engine needs to apply some quirks during the
VBLANK event. In the Display Engine 1.0 case for example, we can only
disable the frontend once the backend has been, which is at VBLANK.

Let's introduce a callback that can be implemented by the various engines.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c   |  4 
 drivers/gpu/drm/sun4i/sunxi_engine.h | 13 +
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c 
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index e122f5b2a395..55f54b54293c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -368,6 +368,7 @@ static irqreturn_t sun4i_tcon_handler(int irq, void 
*private)
struct sun4i_tcon *tcon = private;
struct drm_device *drm = tcon->drm;
struct sun4i_crtc *scrtc = tcon->crtc;
+   struct sunxi_engine *engine = scrtc->engine;
unsigned int status;
 
regmap_read(tcon->regs, SUN4I_TCON_GINT0_REG, &status);
@@ -385,6 +386,9 @@ static irqreturn_t sun4i_tcon_handler(int irq, void 
*private)
   SUN4I_TCON_GINT0_VBLANK_INT(1),
   0);
 
+   if (engine->ops->vblank_quirk)
+   engine->ops->vblank_quirk(engine);
+
return IRQ_HANDLED;
 }
 
diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h 
b/drivers/gpu/drm/sun4i/sunxi_engine.h
index b819d4f9f02f..54c029877531 100644
--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
+++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
@@ -85,6 +85,19 @@ struct sunxi_engine_ops {
 * This function is optional.
 */
void (*disable_color_correction)(struct sunxi_engine *engine);
+
+   /**
+* @vblank_quirk:
+*
+* This callback is used to implement engine-specific
+* behaviour part of the VBLANK event. It is run with all the
+* constraints of an interrupt (can't sleep, all local
+* interrupts disabled) and therefore should be as fast as
+* possible.
+*
+* This function is optional.
+*/
+   void (*vblank_quirk)(struct sunxi_engine *engine);
 };
 
 /**
-- 
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[PATCH v4 12/13] drm/sun4i: backend: Make sure we don't have a commit pending

[Maxime Ripard]

If we try to read the backend registers while it fetches the new values, we
end up with the value of some random register instead of the one we asked
for.

In order to prevent that, let's make sure that the very first thing we do
during our atomic modesetting is to let the commit bit come to a rest.

We don't have to worry about anything else since the only time we will
trigger a new transaction is during the atomic_commit which comes much
later.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 1b8e3dcbe47a..5d4a49e9ccc3 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -297,6 +297,17 @@ static bool sun4i_backend_plane_uses_frontend(struct 
drm_plane_state *state)
return sun4i_backend_plane_uses_scaler(state);
 }
 
+static void sun4i_backend_atomic_begin(struct sunxi_engine *engine,
+  struct drm_crtc_state *old_state)
+{
+   u32 val;
+
+   WARN_ON(regmap_read_poll_timeout(engine->regs,
+SUN4I_BACKEND_REGBUFFCTL_REG,
+val, !(val & 
SUN4I_BACKEND_REGBUFFCTL_LOADCTL),
+100, 5));
+}
+
 static int sun4i_backend_atomic_check(struct sunxi_engine *engine,
  struct drm_crtc_state *crtc_state)
 {
@@ -479,6 +490,7 @@ static struct sun4i_frontend 
*sun4i_backend_find_frontend(struct sun4i_drv *drv,
 }
 
 static const struct sunxi_engine_ops sun4i_backend_engine_ops = {
+   .atomic_begin   = sun4i_backend_atomic_begin,
.atomic_check   = sun4i_backend_atomic_check,
.commit = sun4i_backend_commit,
.layers_init= sun4i_layers_init,
-- 
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[PATCH v4 03/13] drm/sun4i: backend: Allow a NULL plane pointer to retrieve the format

[Maxime Ripard]

The function converting the DRM format to its equivalent in the backend
registers was assuming that we were having a plane.

However, we might want to use that function when setting up a plane using
the frontend, in which case we will not have a plane associated to the
backend's layer. Yet, we still need to setup the format to the one output
by the frontend.

Test for NULL plane pointers before referencing them, so that we can work
around it.

Reviewed-by: Neil Armstrong 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index c99d1a7e815a..f971d3fb5ee4 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -93,7 +93,7 @@ void sun4i_backend_layer_enable(struct sun4i_backend *backend,
 static int sun4i_backend_drm_format_to_layer(struct drm_plane *plane,
 u32 format, u32 *mode)
 {
-   if ((plane->type == DRM_PLANE_TYPE_PRIMARY) &&
+   if (plane && (plane->type == DRM_PLANE_TYPE_PRIMARY) &&
(format == DRM_FORMAT_ARGB))
format = DRM_FORMAT_XRGB;
 
-- 
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[PATCH v4 02/13] drm/sun4i: backend: Document the engine operations

[Maxime Ripard]

Our operations were missing some documentation to explain what was expected
from them.

Let's make that clearer.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sunxi_engine.h | 46 +-
 1 file changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h 
b/drivers/gpu/drm/sun4i/sunxi_engine.h
index 4cb70ae65c79..b374e074c7c3 100644
--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
+++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
@@ -15,12 +15,58 @@ struct drm_device;
 
 struct sunxi_engine;
 
+/**
+ * struct sunxi_engine_ops - helper operations for sunXi engines
+ *
+ * These hooks are used by the common part of the DRM driver to
+ * implement the proper behaviour.
+ */
 struct sunxi_engine_ops {
+   /**
+* @commit:
+*
+* This callback will trigger the hardware switch to commit
+* the new configuration that has been setup during the next
+* vblank period.
+*
+* This function is optional.
+*/
void (*commit)(struct sunxi_engine *engine);
+
+   /**
+* @layers_init:
+*
+* This callback is used to allocate, initialize and register
+* the layers supported by that engine.
+*
+* This function is mandatory.
+*
+* RETURNS:
+*
+* The array of struct drm_plane backing the layers, or an
+* error pointer on failure.
+*/
struct drm_plane **(*layers_init)(struct drm_device *drm,
  struct sunxi_engine *engine);
 
+   /**
+* @apply_color_correction:
+*
+* This callback will enable the color correction in the
+* engine. This is useful only for the composite output.
+*
+* This function is optional.
+*/
void (*apply_color_correction)(struct sunxi_engine *engine);
+
+   /**
+* @disable_color_correction:
+*
+* This callback will stop the color correction in the
+* engine. This is useful only for the composite output.
+*
+* This function is optional.
+*/
void (*disable_color_correction)(struct sunxi_engine *engine);
 };
 
-- 
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[PATCH v4 05/13] drm/sun4i: engine: Add a custom crtc atomic_check

[Maxime Ripard]

We have some restrictions on what the planes and CRTC can provide that are
tied to only one generation of display engines.

For example, on the first generation, we can only have one YUV plane or one
plane that uses the frontend output.

Let's allow our engines to provide an atomic_check callback to validate the
current configuration.

Reviewed-by: Chen-Yu Tsai 
Reviewed-by: Neil Armstrong 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_crtc.c   | 14 ++
 drivers/gpu/drm/sun4i/sunxi_engine.h | 17 +
 2 files changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c 
b/drivers/gpu/drm/sun4i/sun4i_crtc.c
index 5decae0069d0..2a565325714f 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
@@ -46,6 +46,19 @@ static struct drm_encoder *sun4i_crtc_get_encoder(struct 
drm_crtc *crtc)
return NULL;
 }
 
+static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
+   struct drm_crtc_state *state)
+{
+   struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
+   struct sunxi_engine *engine = scrtc->engine;
+   int ret = 0;
+
+   if (engine && engine->ops && engine->ops->atomic_check)
+   ret = engine->ops->atomic_check(engine, state);
+
+   return ret;
+}
+
 static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
 {
@@ -125,6 +138,7 @@ static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
 }
 
 static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
+   .atomic_check   = sun4i_crtc_atomic_check,
.atomic_begin   = sun4i_crtc_atomic_begin,
.atomic_flush   = sun4i_crtc_atomic_flush,
.atomic_enable  = sun4i_crtc_atomic_enable,
diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h 
b/drivers/gpu/drm/sun4i/sunxi_engine.h
index b374e074c7c3..b819d4f9f02f 100644
--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
+++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
@@ -23,6 +23,23 @@ struct sunxi_engine;
  */
 struct sunxi_engine_ops {
/**
+* @atomic_check:
+*
+* This callback allows to validate plane-update related CRTC
+* constraints specific to engines. This is mirroring the
+* &drm_crtc_helper_funcs.atomic_check callback, so any
+* documentation there applies.
+*
+* This function is optional.
+*
+* RETURNS:
+*
+* 0 on success or a negative error code.
+*/
+   int (*atomic_check)(struct sunxi_engine *engine,
+   struct drm_crtc_state *state);
+
+   /**
 * @commit:
 *
 * This callback will trigger the hardware switch to commit
-- 
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[PATCH v4 08/13] drm/sun4i: Add a driver for the display frontend

[Maxime Ripard]

The display frontend is an hardware block that can be used to implement
some more advanced features like hardware scaling or colorspace
conversions. It can also be used to implement the output format of the VPU.

Let's create a minimal driver for it that will only enable the hardware
scaling features.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/Makefile |   3 +-
 drivers/gpu/drm/sun4i/sun4i_drv.c  |  27 +-
 drivers/gpu/drm/sun4i/sun4i_drv.h  |   1 +-
 drivers/gpu/drm/sun4i/sun4i_frontend.c | 389 ++-
 drivers/gpu/drm/sun4i/sun4i_frontend.h |  99 +++-
 5 files changed, 514 insertions(+), 5 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_frontend.h

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 0c2f8c7facae..b660d82011f4 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 sun4i-backend-y+= sun4i_backend.o sun4i_layer.o
+sun4i-frontend-y   += sun4i_frontend.o
 
 sun4i-drm-y+= sun4i_drv.o
 sun4i-drm-y+= sun4i_framebuffer.o
@@ -21,6 +22,6 @@ obj-$(CONFIG_DRM_SUN4I)   += sun4i-tcon.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o
 obj-$(CONFIG_DRM_SUN4I)+= sun6i_drc.o
 
-obj-$(CONFIG_DRM_SUN4I_BACKEND)+= sun4i-backend.o
+obj-$(CONFIG_DRM_SUN4I_BACKEND)+= sun4i-backend.o sun4i-frontend.o
 obj-$(CONFIG_DRM_SUN4I_HDMI)   += sun4i-drm-hdmi.o
 obj-$(CONFIG_DRM_SUN8I_MIXER)  += sun8i-mixer.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 75c76cdd82bc..42e68cf3a2e8 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -23,6 +23,7 @@
 #include 
 
 #include "sun4i_drv.h"
+#include "sun4i_frontend.h"
 #include "sun4i_framebuffer.h"
 #include "sun4i_tcon.h"
 
@@ -98,6 +99,7 @@ static int sun4i_drv_bind(struct device *dev)
goto free_drm;
}
drm->dev_private = drv;
+   INIT_LIST_HEAD(&drv->frontend_list);
INIT_LIST_HEAD(&drv->engine_list);
INIT_LIST_HEAD(&drv->tcon_list);
 
@@ -185,6 +187,14 @@ static bool sun4i_drv_node_is_frontend(struct device_node 
*node)
of_device_is_compatible(node, 
"allwinner,sun8i-a33-display-frontend");
 }
 
+static bool sun4i_drv_node_is_supported_frontend(struct device_node *node)
+{
+   if (IS_ENABLED(CONFIG_DRM_SUN4I_BACKEND))
+   return !!of_match_node(sun4i_frontend_of_table, node);
+
+   return false;
+}
+
 static bool sun4i_drv_node_is_tcon(struct device_node *node)
 {
return of_device_is_compatible(node, "allwinner,sun4i-a10-tcon") ||
@@ -239,9 +249,11 @@ static int sun4i_drv_add_endpoints(struct device *dev,
int count = 0;
 
/*
-* We don't support the frontend for now, so we will never
-* have a device bound. Just skip over it, but we still want
-* the rest our pipeline to be added.
+* The frontend has been disabled in some of our old device
+* trees. If we find a node that is the frontend and is
+* disabled, we should just follow through and parse its
+* child, but without adding it to the component list.
+* Otherwise, we obviously want to add it to the list.
 */
if (!sun4i_drv_node_is_frontend(node) &&
!of_device_is_available(node))
@@ -254,7 +266,14 @@ static int sun4i_drv_add_endpoints(struct device *dev,
if (sun4i_drv_node_is_connector(node))
return 0;
 
-   if (!sun4i_drv_node_is_frontend(node)) {
+   /*
+* If the device is either just a regular device, or an
+* enabled frontend supported by the driver, we add it to our
+* component list.
+*/
+   if (!sun4i_drv_node_is_frontend(node) ||
+   (sun4i_drv_node_is_supported_frontend(node) &&
+of_device_is_available(node))) {
/* Add current component */
DRM_DEBUG_DRIVER("Adding component %pOF\n", node);
drm_of_component_match_add(dev, match, compare_of, node);
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.h 
b/drivers/gpu/drm/sun4i/sun4i_drv.h
index a960c89270cc..9c26a345f85c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.h
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.h
@@ -19,6 +19,7 @@
 
 struct sun4i_drv {
struct list_headengine_list;
+   struct list_headfrontend_list;
struct list_headtcon_list;
 
struct drm_fbdev_cma*fbdev;
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c 
b/drivers/gpu/drm/sun4i/sun4i_frontend.c
new file mode 100644
index ..ddf6cfa6dd23
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c
@@ -0,0 +1,389 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Fre

[PATCH v4 01/13] drm/sun4i: backend: Move line stride setup to buffer setup function

[Maxime Ripard]

Setup the line stride in the buffer setup function, since it's tied to the
buffer itself, and is not needed when we do not set the buffer in the
backend.

This is for example the case when using the frontend and then routing its
output to the backend.

Reviewed-by: Chen-Yu Tsai 
Reviewed-by: Neil Armstrong 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 847eecbe4d14..c99d1a7e815a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -141,7 +141,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend 
*backend,
 int layer, struct drm_plane *plane)
 {
struct drm_plane_state *state = plane->state;
-   struct drm_framebuffer *fb = state->fb;
 
DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
 
@@ -153,12 +152,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend 
*backend,
   state->crtc_h));
}
 
-   /* Set the line width */
-   DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8);
-   regmap_write(backend->engine.regs,
-SUN4I_BACKEND_LAYLINEWIDTH_REG(layer),
-fb->pitches[0] * 8);
-
/* Set height and width */
DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n",
 state->crtc_w, state->crtc_h);
@@ -218,6 +211,13 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend 
*backend,
u32 lo_paddr, hi_paddr;
dma_addr_t paddr;
 
+   /* Set the line width */
+   DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8);
+   regmap_write(backend->engine.regs,
+SUN4I_BACKEND_LAYLINEWIDTH_REG(layer),
+fb->pitches[0] * 8);
+
+
/* Get the start of the displayed memory */
paddr = drm_fb_cma_get_gem_addr(fb, state, 0);
DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
-- 
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[PATCH v4 13/13] ARM: dts: sun8i: a33 Enable our display frontend

[Maxime Ripard]

The display frontend can be used to do hardware scaling, colorspaces
conversion or to implement the buffer format output by the Cedar VPU.

Since we're starting to have some support for it in the DRM driver, let's
enable its DT node.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun8i-a33.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 50eb84fa246a..a21f2ed07a52 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -289,7 +289,6 @@
clock-names = "ahb", "mod",
  "ram";
resets = <&ccu RST_BUS_DE_FE>;
-   status = "disabled";
 
ports {
#address-cells = <1>;
-- 
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[PATCH v4 11/13] drm/sun4i: backend: Use runtime_pm variant of atomic_commit_tail

[Maxime Ripard]

During a hardware commit, the commit bit in the backend will only be
cleared if the TCON is enabled. Use the runtime_pm variant of the
atomic_commit_tail hook that makes sure that the CRTC, our TCON, is enabled
when we perform an atomic_commit.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c 
b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
index 2992f0a6b349..a01a5b7d46e6 100644
--- a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
@@ -10,6 +10,7 @@
  * the License, or (at your option) any later version.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -32,6 +33,10 @@ static const struct drm_mode_config_funcs 
sun4i_de_mode_config_funcs = {
.fb_create  = drm_gem_fb_create,
 };
 
+static struct drm_mode_config_helper_funcs sun4i_de_mode_config_helpers = {
+   .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
+};
+
 struct drm_fbdev_cma *sun4i_framebuffer_init(struct drm_device *drm)
 {
drm_mode_config_reset(drm);
@@ -40,6 +45,7 @@ struct drm_fbdev_cma *sun4i_framebuffer_init(struct 
drm_device *drm)
drm->mode_config.max_height = 8192;
 
drm->mode_config.funcs = &sun4i_de_mode_config_funcs;
+   drm->mode_config.helper_private = &sun4i_de_mode_config_helpers;
 
return drm_fbdev_cma_init(drm, 32, drm->mode_config.num_connector);
 }
-- 
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[PATCH v4 09/13] drm/sun4i: backend: Wire in the frontend

[Maxime Ripard]

Now that we have a driver, we can make use of it. This is done by
adding a flag to our custom plane state that will trigger whether we should
use the frontend on that particular plane or not.

The rest is just plumbing to set up the backend to not perform the DMA but
receive its data from the frontend.

Note that we're still not making any use of the frontend itself, as no one
is setting the flag yet.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 91 -
 drivers/gpu/drm/sun4i/sun4i_backend.h |  8 ++-
 drivers/gpu/drm/sun4i/sun4i_crtc.c|  1 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c   | 33 +-
 drivers/gpu/drm/sun4i/sun4i_layer.h   |  1 +-
 5 files changed, 131 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index f971d3fb5ee4..21b047e5b4b7 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -26,6 +26,7 @@
 
 #include "sun4i_backend.h"
 #include "sun4i_drv.h"
+#include "sun4i_frontend.h"
 #include "sun4i_layer.h"
 #include "sunxi_engine.h"
 
@@ -203,6 +204,30 @@ int sun4i_backend_update_layer_formats(struct 
sun4i_backend *backend,
return 0;
 }
 
+int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,
+   int layer, uint32_t fmt)
+{
+   u32 val;
+   int ret;
+
+   ret = sun4i_backend_drm_format_to_layer(NULL, fmt, &val);
+   if (ret) {
+   DRM_DEBUG_DRIVER("Invalid format\n");
+   return ret;
+   }
+
+   regmap_update_bits(backend->engine.regs,
+  SUN4I_BACKEND_ATTCTL_REG0(layer),
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOEN,
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOEN);
+
+   regmap_update_bits(backend->engine.regs,
+  SUN4I_BACKEND_ATTCTL_REG1(layer),
+  SUN4I_BACKEND_ATTCTL_REG1_LAY_FBFMT, val);
+
+   return 0;
+}
+
 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
  int layer, struct drm_plane *plane)
 {
@@ -246,6 +271,36 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend 
*backend,
return 0;
 }
 
+static void sun4i_backend_vblank_quirk(struct sunxi_engine *engine)
+{
+   struct sun4i_backend *backend = engine_to_sun4i_backend(engine);
+   struct sun4i_frontend *frontend = backend->frontend;
+
+   if (!frontend)
+   return;
+
+   /*
+* In a teardown scenario with the frontend involved, we have
+* to keep the frontend enabled until the next vblank, and
+* only then disable it.
+*
+* This is due to the fact that the backend will not take into
+* account the new configuration (with the plane that used to
+* be fed by the frontend now disabled) until we write to the
+* commit bit and the hardware fetches the new configuration
+* during the next vblank.
+*
+* So we keep the frontend around in order to prevent any
+* visual artifacts.
+*/
+   spin_lock(&backend->frontend_lock);
+   if (backend->frontend_teardown) {
+   sun4i_frontend_exit(frontend);
+   backend->frontend_teardown = false;
+   }
+   spin_unlock(&backend->frontend_lock);
+};
+
 static int sun4i_backend_init_sat(struct device *dev) {
struct sun4i_backend *backend = dev_get_drvdata(dev);
int ret;
@@ -330,11 +385,41 @@ static int sun4i_backend_of_get_id(struct device_node 
*node)
return ret;
 }
 
+/* TODO: This needs to take multiple pipelines into account */
+static struct sun4i_frontend *sun4i_backend_find_frontend(struct sun4i_drv 
*drv,
+ struct device_node 
*node)
+{
+   struct device_node *port, *ep, *remote;
+   struct sun4i_frontend *frontend;
+
+   port = of_graph_get_port_by_id(node, 0);
+   if (!port)
+   return ERR_PTR(-EINVAL);
+
+   for_each_available_child_of_node(port, ep) {
+   remote = of_graph_get_remote_port_parent(ep);
+   if (!remote)
+   continue;
+
+   /* does this node match any registered engines? */
+   list_for_each_entry(frontend, &drv->frontend_list, list) {
+   if (remote == frontend->node) {
+   of_node_put(remote);
+   of_node_put(port);
+   return frontend;
+   }
+   }
+   }
+
+   return ERR_PTR(-EINVAL);
+}
+
 static const struct sunxi_engine_ops sun4i_backend_engine_ops = {
.commit = sun4i_backend_commit,
.layers_init= sun4i_layers_init,
.apply_color_correc

[PATCH v4 07/13] drm/sun4i: engine: Create an atomic_begin callback

[Maxime Ripard]

We have to implement some display engine specific behaviours in
atomic_begin. Let's add a function for that.

Reviewed-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_crtc.c   |  6 +-
 drivers/gpu/drm/sun4i/sunxi_engine.h | 13 +
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c 
b/drivers/gpu/drm/sun4i/sun4i_crtc.c
index 2a565325714f..f549f2874353 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
@@ -64,6 +64,7 @@ static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
 {
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
struct drm_device *dev = crtc->dev;
+   struct sunxi_engine *engine = scrtc->engine;
unsigned long flags;
 
if (crtc->state->event) {
@@ -73,7 +74,10 @@ static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
scrtc->event = crtc->state->event;
spin_unlock_irqrestore(&dev->event_lock, flags);
crtc->state->event = NULL;
-}
+   }
+
+   if (engine->ops->atomic_begin)
+   engine->ops->atomic_begin(engine, old_state);
 }
 
 static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h 
b/drivers/gpu/drm/sun4i/sunxi_engine.h
index 54c029877531..baa7a1f95300 100644
--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
+++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
@@ -23,6 +23,19 @@ struct sunxi_engine;
  */
 struct sunxi_engine_ops {
/**
+* @atomic_begin:
+*
+* This callback allows to prepare our engine for an atomic
+* update. This is mirroring the
+* &drm_crtc_helper_funcs.atomic_begin callback, so any
+* documentation there applies.
+*
+* This function is optional.
+*/
+   void (*atomic_begin)(struct sunxi_engine *engine,
+struct drm_crtc_state *old_state);
+
+   /**
 * @atomic_check:
 *
 * This callback allows to validate plane-update related CRTC
-- 
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Re: [PATCH RFC 8/9] drm/i915: Allow default context priority to be set via cgroup parameter

[Michel Dänzer]

On 2018-01-20 11:40 AM, Chris Wilson wrote:
> 
> Along this vein, it's worthwhile pointing out that the current scheduler
> is not even close to being the cgroup-enabled CFS implementation it
> needs to be to call itself a scheduler. (It's more or less a no-op
> scheduler.) It may be premature to start exposing hooks into it.

Sounds like it may not be too late to abandon the separate i915
scheduler in favour of the common one used by amdgpu and etnaviv?


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Libre software enthusiast | Mesa and X developer
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[Bug 101900] No HDMI HBR audio on Polaris (no TrueHD, no Atmos, no Neo:X, no HD Master audio) and static noise in sound when LPCM on amdgpu Xorg driver

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=101900

--- Comment #28 from Andy Furniss  ---
(In reply to lethalwp from comment #27)
> After more tests, i have a small race condition on my systemctl setup which
> causes X to be unable to load the "amdgpu" driver and fallbacks on
> "modesetting" instead.
> 
> In this case, the videocard can't use vdpau anymore, so it's fully software
> decoding. Then the sound is playing perfectly.
> 
> When X is loading the amdgpu driver, the sound problems are still present.
> The video must eat the sound bandwidth or something (?)

Software decode/display may load CPUs enough to hide the alsa bug I mentioned
earlier.

Try testing with an audio only file (be sure the player for this test is using
alsa not pulse).

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Re: [PATCH RFC 8/9] drm/i915: Allow default context priority to be set via cgroup parameter

[Chris Wilson]

Quoting Michel Dänzer (2018-01-22 09:50:38)
> On 2018-01-20 11:40 AM, Chris Wilson wrote:
> > 
> > Along this vein, it's worthwhile pointing out that the current scheduler
> > is not even close to being the cgroup-enabled CFS implementation it
> > needs to be to call itself a scheduler. (It's more or less a no-op
> > scheduler.) It may be premature to start exposing hooks into it.
> 
> Sounds like it may not be too late to abandon the separate i915
> scheduler in favour of the common one used by amdgpu and etnaviv?

Why? It doesn't do anything of the sort either. It has a lot of code to
achieve less.
-Chris
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[PATCH] drm/bridge/synopsys: dsi: Adopt SPDX identifiers

[Philippe Cornu]

Add SPDX identifiers to the Synopsys DesignWare MIPI DSI
host controller driver.

Signed-off-by: Philippe Cornu 
---
 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c 
b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
index 46b0e73404d1..e06836dec77c 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
@@ -1,12 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
  * Copyright (C) STMicroelectronics SA 2017
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
  * Modified by Philippe Cornu 
  * This generic Synopsys DesignWare MIPI DSI host driver is based on the
  * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
-- 
2.15.1

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[PATCH] drm/stm: drv: Improve data transfers

[Philippe Cornu]

To optimize data transfers, align pitch on 128 bytes & height
on 4 bytes. This optimization is not applicable without MMU.

Signed-off-by: Yannick Fertre 
Signed-off-by: Vincent Abriou 
Signed-off-by: Philippe Cornu 
---
 drivers/gpu/drm/stm/drv.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
index 8fe954c27fba..c2bd9d882b93 100644
--- a/drivers/gpu/drm/stm/drv.c
+++ b/drivers/gpu/drm/stm/drv.c
@@ -31,6 +31,23 @@ static const struct drm_mode_config_funcs 
drv_mode_config_funcs = {
.atomic_commit = drm_atomic_helper_commit,
 };
 
+#ifdef CONFIG_MMU
+static int stm_dumb_create(struct drm_file *file, struct drm_device *dev,
+  struct drm_mode_create_dumb *args)
+{
+   unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
+
+   /*
+* in order to optimize data transfer, pitch is aligned on
+* 128 bytes, height is aligned on 4 bytes
+*/
+   args->pitch = roundup(min_pitch, 128);
+   args->height = roundup(args->height, 4);
+
+   return drm_gem_cma_dumb_create_internal(file, dev, args);
+}
+#endif
+
 DEFINE_DRM_GEM_CMA_FOPS(drv_driver_fops);
 
 static struct drm_driver drv_driver = {
@@ -44,7 +61,11 @@ static struct drm_driver drv_driver = {
.minor = 0,
.patchlevel = 0,
.fops = &drv_driver_fops,
+#ifdef CONFIG_MMU
+   .dumb_create = stm_dumb_create,
+#else
.dumb_create = drm_gem_cma_dumb_create,
+#endif
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
.gem_free_object_unlocked = drm_gem_cma_free_object,
-- 
2.15.1

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[PATCH v2 00/19] drm/sun4i: Support more planes, zpos and plane-wide alpha

[Maxime Ripard]

Hi,

This serie aims at enhancing the support for our planes in the current drm
driver on the first generation of Allwinner's display engine.

This also introduces a few generic stuff, as well as some conversion for
some other drivers.

This series basically implements three things that look orthogonal, but due
to the way the hardware works are kind of related.

The main feature is that instead of implementing 2 planes per backend, we
are now able to use the planes that are available in hardware. This was
unsupported before because of the way the composition works in the
hardware.

Indeed, the planes are first grouped into 2 pipes that are doing a basic
composition, in case of overlapping planes, it just takes whatever plane
has the highest priority (=> zpos). Then, the alpha blending is done
between the two pipes. This was simplified so far by only using two planes,
one for each pipe, which was allowing us to have an illusion of proper
alpha blending. This is further complicated by the bug/feature that the
lowest plane must not have any alpha at all, otherwise the pixel will turn
black, no matter what the value of alpha is. This basically means that we
can have a plane with alpha only in the second pipe.

However, as we have more and more blocks being worked on, 2 planes are
getting really limited and we need to support all 4 of them.

This is mostly possible by extending our atomic_check and to make sure that
we enforce those constraints, and assign the pipes automatically. This is
done by looking at the number of planes using an alpha component, and we
then end up in various scenarios:
  - 0 plane with alpha
=> we don't care for the pipes at all. All the planes are assigned to
   the first pipe
  - 1 plane with alpha
=> we assign all the planes without alpha below the plane with alpha to
   the first pipe, and then all the remaining planes to the second
   pipe. The plane with alpha will be the lowest plane on that pipe,
   which means that whatever plane is above it will have precedence,
   but the alpha component will remain and will be used on pixels that
   are not overlapping
  - 2-4 planes with alpha
=> we can't operate that way, we just reject the configuration.

In addition to the formats that embed an alpha component, we also add
support for plane-wide alpha property, and in order to tweak the
configuration the way we want to, we also add support for configurable
zpos.

Let me know what you think,
Maxime

Changes from v1:
  - Document the behaviour on concurrent usage of the alpha property and an
alpha component in the format
  - Allowed for higher alpha values
  - Moved the alpha value from a helper to the struct drm_format_info
  - Collected tags

Maxime Ripard (19):
  drm/fourcc: Add a alpha field to drm_format_info
  drm/atmel-hlcdc: Use the alpha format field in drm_format_info
  drm/atmel-exynos: Use the alpha format field in drm_format_info
  drm/rockchip: Use the alpha format field in drm_format_info
  drm/vc4: Use the alpha format field in drm_format_info
  drm/blend: Add a generic alpha property
  drm/atmel-hclcdc: Convert to the new generic alpha property
  drm/rcar-du: Convert to the new generic alpha property
  drm/sun4i: backend: Fix structure indentation
  drm/sun4i: backend: Fix define typo
  drm/sun4i: framebuffer: Add a custom atomic_check
  drm/sun4i: backend: Move the coord function in the shared part
  drm/sun4i: backend: Set a default zpos in our reset hook
  drm/sun4i: backend: Add support for zpos
  drm/sun4i: backend: Check for the number of alpha planes
  drm/sun4i: backend: Assign the pipes automatically
  drm/sun4i: backend: Make zpos configurable
  drm/sun4i: Add support for plane alpha
  drm/sun4i: backend: Remove ARGB spoofing

 Documentation/gpu/kms-properties.csv|   2 +-
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h|  13 +--
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 113 ++-
 drivers/gpu/drm/drm_atomic.c|   4 +-
 drivers/gpu/drm/drm_atomic_helper.c |   4 +-
 drivers/gpu/drm/drm_blend.c |  32 -
 drivers/gpu/drm/drm_fourcc.c|  50 +++
 drivers/gpu/drm/exynos/exynos_mixer.c   |  14 +--
 drivers/gpu/drm/rcar-du/rcar_du_drv.h   |   1 +-
 drivers/gpu/drm/rcar-du/rcar_du_kms.c   |   5 +-
 drivers/gpu/drm/rcar-du/rcar_du_plane.c |  15 +--
 drivers/gpu/drm/rcar-du/rcar_du_plane.h |   2 +-
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c   |  42 +--
 drivers/gpu/drm/rcar-du/rcar_du_vsp.h   |   2 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  13 +--
 drivers/gpu/drm/sun4i/sun4i_backend.c   | 124 +++--
 drivers/gpu/drm/sun4i/sun4i_backend.h   |  11 +-
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c   |  18 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c |  84 ++--
 drivers/gpu/drm/sun4i/sun4i_layer.h |   1 +-
 driv

[PATCH v2 11/19] drm/sun4i: framebuffer: Add a custom atomic_check

[Maxime Ripard]

In order to support normalized zpos, we need to call
drm_atomic_normalize_zpos in our driver's drm_mode_config_funcs'
atomic_check.

Let's duplicate the definition of drm_atomic_helper_check for now.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c 
b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
index a01a5b7d46e6..e68004844abe 100644
--- a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
@@ -26,9 +26,21 @@ static void sun4i_de_output_poll_changed(struct drm_device 
*drm)
drm_fbdev_cma_hotplug_event(drv->fbdev);
 }
 
+static int sun4i_de_atomic_check(struct drm_device *dev,
+struct drm_atomic_state *state)
+{
+   int ret;
+
+   ret = drm_atomic_helper_check_modeset(dev, state);
+   if (ret)
+   return ret;
+
+   return drm_atomic_helper_check_planes(dev, state);
+}
+
 static const struct drm_mode_config_funcs sun4i_de_mode_config_funcs = {
.output_poll_changed= sun4i_de_output_poll_changed,
-   .atomic_check   = drm_atomic_helper_check,
+   .atomic_check   = sun4i_de_atomic_check,
.atomic_commit  = drm_atomic_helper_commit,
.fb_create  = drm_gem_fb_create,
 };
-- 
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[PATCH v2 07/19] drm/atmel-hclcdc: Convert to the new generic alpha property

[Maxime Ripard]

Now that we have support for per-plane alpha in the core, let's use it.

Acked-by: Boris Brezillon 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h| 13 +---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 89 ++
 2 files changed, 14 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
index 6833ee253cfa..704cac6399eb 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
@@ -298,7 +298,6 @@ struct atmel_hlcdc_layer {
 struct atmel_hlcdc_plane {
struct drm_plane base;
struct atmel_hlcdc_layer layer;
-   struct atmel_hlcdc_plane_properties *properties;
 };
 
 static inline struct atmel_hlcdc_plane *
@@ -345,18 +344,6 @@ struct atmel_hlcdc_dc_desc {
 };
 
 /**
- * Atmel HLCDC Plane properties.
- *
- * This structure stores plane property definitions.
- *
- * @alpha: alpha blending (or transparency) property
- * @rotation: rotation property
- */
-struct atmel_hlcdc_plane_properties {
-   struct drm_property *alpha;
-};
-
-/**
  * Atmel HLCDC Display Controller.
  *
  * @desc: HLCDC Display Controller description
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index e18800ed7cd1..d1b89a6f6280 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -31,7 +31,6 @@
  * @src_y: y buffer position
  * @src_w: buffer width
  * @src_h: buffer height
- * @alpha: alpha blending of the plane
  * @disc_x: x discard position
  * @disc_y: y discard position
  * @disc_w: discard width
@@ -54,8 +53,6 @@ struct atmel_hlcdc_plane_state {
uint32_t src_w;
uint32_t src_h;
 
-   u8 alpha;
-
int disc_x;
int disc_y;
int disc_w;
@@ -385,7 +382,7 @@ atmel_hlcdc_plane_update_general_settings(struct 
atmel_hlcdc_plane *plane,
cfg |= ATMEL_HLCDC_LAYER_LAEN;
else
cfg |= ATMEL_HLCDC_LAYER_GAEN |
-  ATMEL_HLCDC_LAYER_GA(state->alpha);
+  ATMEL_HLCDC_LAYER_GA(state->base.alpha);
}
 
if (state->disc_h && state->disc_w)
@@ -553,7 +550,7 @@ atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state 
*c_state)
 
if (!ovl_s->fb ||
ovl_s->fb->format->has_alpha ||
-   ovl_state->alpha != 255)
+   ovl_s->alpha != 255)
continue;
 
/* TODO: implement a smarter hidden area detection */
@@ -829,51 +826,18 @@ static void atmel_hlcdc_plane_destroy(struct drm_plane *p)
drm_plane_cleanup(p);
 }
 
-static int atmel_hlcdc_plane_atomic_set_property(struct drm_plane *p,
-struct drm_plane_state *s,
-struct drm_property *property,
-uint64_t val)
-{
-   struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
-   struct atmel_hlcdc_plane_properties *props = plane->properties;
-   struct atmel_hlcdc_plane_state *state =
-   drm_plane_state_to_atmel_hlcdc_plane_state(s);
-
-   if (property == props->alpha)
-   state->alpha = val;
-   else
-   return -EINVAL;
-
-   return 0;
-}
-
-static int atmel_hlcdc_plane_atomic_get_property(struct drm_plane *p,
-   const struct drm_plane_state *s,
-   struct drm_property *property,
-   uint64_t *val)
-{
-   struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
-   struct atmel_hlcdc_plane_properties *props = plane->properties;
-   const struct atmel_hlcdc_plane_state *state =
-   container_of(s, const struct atmel_hlcdc_plane_state, base);
-
-   if (property == props->alpha)
-   *val = state->alpha;
-   else
-   return -EINVAL;
-
-   return 0;
-}
-
-static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane,
-   struct atmel_hlcdc_plane_properties *props)
+static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane)
 {
const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
 
if (desc->type == ATMEL_HLCDC_OVERLAY_LAYER ||
-   desc->type == ATMEL_HLCDC_CURSOR_LAYER)
-   drm_object_attach_property(&plane->base.base,
-  props->alpha, 255);
+   desc->type == ATMEL_HLCDC_CURSOR_LAYER) {
+   int ret;
+
+   ret = drm_plane_create_alpha_property(&plane->base, 255);
+   if (ret)
+   return ret;
+   }
 
  

[PATCH v2 09/19] drm/sun4i: backend: Fix structure indentation

[Maxime Ripard]

The sun4i_plane_desc structure was somehow indented to two tabulations
instead of one as we shoud do. Fix that.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_layer.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 4652b25be0d2..f03da16eb92a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -20,10 +20,10 @@
 #include "sunxi_engine.h"
 
 struct sun4i_plane_desc {
-  enum drm_plane_type type;
-  u8  pipe;
-  const uint32_t  *formats;
-  uint32_tnformats;
+   enum drm_plane_type type;
+   u8  pipe;
+   const uint32_t  *formats;
+   uint32_tnformats;
 };
 
 static void sun4i_backend_layer_reset(struct drm_plane *plane)
-- 
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[PATCH v2 08/19] drm/rcar-du: Convert to the new generic alpha property

[Maxime Ripard]

Now that we have support for per-plane alpha in the core, let's use it.

Reviewed-by: Laurent Pinchart 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  1 +-
 drivers/gpu/drm/rcar-du/rcar_du_kms.c   |  5 +---
 drivers/gpu/drm/rcar-du/rcar_du_plane.c | 15 +++--
 drivers/gpu/drm/rcar-du/rcar_du_plane.h |  2 +-
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c   | 42 ++
 drivers/gpu/drm/rcar-du/rcar_du_vsp.h   |  2 +-
 6 files changed, 9 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index f8cd79488ece..aff04adaae53 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -89,7 +89,6 @@ struct rcar_du_device {
struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];
 
struct {
-   struct drm_property *alpha;
struct drm_property *colorkey;
} props;
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c 
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 566d1a948c8f..e1b5a7b460cc 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -417,11 +417,6 @@ static int rcar_du_encoders_init(struct rcar_du_device 
*rcdu)
 
 static int rcar_du_properties_init(struct rcar_du_device *rcdu)
 {
-   rcdu->props.alpha =
-   drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
-   if (rcdu->props.alpha == NULL)
-   return -ENOMEM;
-
/*
 * The color key is expressed as an RGB888 triplet stored in a 32-bit
 * integer in XRGB format. Bit 24 is used as a flag to disable (0)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c 
b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index 61833cc1c699..5b34e8092c8b 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -423,7 +423,7 @@ static void rcar_du_plane_setup_mode(struct rcar_du_group 
*rgrp,
rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
else
rcar_du_plane_write(rgrp, index, PnALPHAR,
-   PnALPHAR_ABIT_X | state->alpha);
+   PnALPHAR_ABIT_X | state->state.alpha);
 
pnmr = PnMR_BM_MD | state->format->pnmr;
 
@@ -667,11 +667,11 @@ static void rcar_du_plane_reset(struct drm_plane *plane)
 
state->hwindex = -1;
state->source = RCAR_DU_PLANE_MEMORY;
-   state->alpha = 255;
state->colorkey = RCAR_DU_COLORKEY_NONE;
state->state.zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
 
plane->state = &state->state;
+   plane->state->alpha = 255;
plane->state->plane = plane;
 }
 
@@ -683,9 +683,7 @@ static int rcar_du_plane_atomic_set_property(struct 
drm_plane *plane,
struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
 
-   if (property == rcdu->props.alpha)
-   rstate->alpha = val;
-   else if (property == rcdu->props.colorkey)
+   if (property == rcdu->props.colorkey)
rstate->colorkey = val;
else
return -EINVAL;
@@ -701,9 +699,7 @@ static int rcar_du_plane_atomic_get_property(struct 
drm_plane *plane,
container_of(state, const struct rcar_du_plane_state, state);
struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
 
-   if (property == rcdu->props.alpha)
-   *val = rstate->alpha;
-   else if (property == rcdu->props.colorkey)
+   if (property == rcdu->props.colorkey)
*val = rstate->colorkey;
else
return -EINVAL;
@@ -772,10 +768,9 @@ int rcar_du_planes_init(struct rcar_du_group *rgrp)
continue;
 
drm_object_attach_property(&plane->plane.base,
-  rcdu->props.alpha, 255);
-   drm_object_attach_property(&plane->plane.base,
   rcdu->props.colorkey,
   RCAR_DU_COLORKEY_NONE);
+   drm_plane_create_alpha_property(&plane->plane, 255);
drm_plane_create_zpos_property(&plane->plane, 1, 1, 7);
}
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h 
b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
index f62e09f195de..2dc793ebd1a2 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
@@ -50,7 +50,6 @@ static inline struct rcar_du_plane *to_rcar_plane(struct 
drm_plane *plane)
  * @state: base DRM plane state
  * @format: information about the pixel format used by the plane
  * @hwindex: 0-based hardware plane index, -1 means unused
- * @alpha: value of the plane alpha property
  * @colorkey: value of the plane colorkey property
  */
 struct rcar_du_plane_state {
@@ -60,7 +59,6 @@ struct rca

[PATCH v2 02/19] drm/atmel-hlcdc: Use the alpha format field in drm_format_info

[Maxime Ripard]

Now that the drm_format_info has a alpha field to tell if a format embeds
an alpha component in it, let's use it.

Acked-by: Boris Brezillon 
Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 24 +++---
 1 file changed, 5 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index 703c2d13603f..e18800ed7cd1 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -194,20 +194,6 @@ static int atmel_hlcdc_format_to_plane_mode(u32 format, 
u32 *mode)
return 0;
 }
 
-static bool atmel_hlcdc_format_embeds_alpha(u32 format)
-{
-   int i;
-
-   for (i = 0; i < sizeof(format); i++) {
-   char tmp = (format >> (8 * i)) & 0xff;
-
-   if (tmp == 'A')
-   return true;
-   }
-
-   return false;
-}
-
 static u32 heo_downscaling_xcoef[] = {
0x11343311,
0x00f7,
@@ -377,13 +363,13 @@ atmel_hlcdc_plane_update_general_settings(struct 
atmel_hlcdc_plane *plane,
 {
unsigned int cfg = ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16 | state->ahb_id;
const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
-   u32 format = state->base.fb->format->format;
+   const struct drm_format_info *format = state->base.fb->format;
 
/*
 * Rotation optimization is not working on RGB888 (rotation is still
 * working but without any optimization).
 */
-   if (format == DRM_FORMAT_RGB888)
+   if (format->format == DRM_FORMAT_RGB888)
cfg |= ATMEL_HLCDC_LAYER_DMA_ROTDIS;
 
atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG,
@@ -395,7 +381,7 @@ atmel_hlcdc_plane_update_general_settings(struct 
atmel_hlcdc_plane *plane,
cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |
   ATMEL_HLCDC_LAYER_ITER;
 
-   if (atmel_hlcdc_format_embeds_alpha(format))
+   if (format->has_alpha)
cfg |= ATMEL_HLCDC_LAYER_LAEN;
else
cfg |= ATMEL_HLCDC_LAYER_GAEN |
@@ -566,7 +552,7 @@ atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state 
*c_state)
ovl_state = drm_plane_state_to_atmel_hlcdc_plane_state(ovl_s);
 
if (!ovl_s->fb ||
-   atmel_hlcdc_format_embeds_alpha(ovl_s->fb->format->format) 
||
+   ovl_s->fb->format->has_alpha ||
ovl_state->alpha != 255)
continue;
 
@@ -769,7 +755,7 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane 
*p,
 
if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) &&
(!desc->layout.memsize ||
-atmel_hlcdc_format_embeds_alpha(state->base.fb->format->format)))
+state->base.fb->format->has_alpha))
return -EINVAL;
 
if (state->crtc_x < 0 || state->crtc_y < 0)
-- 
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[PATCH v2 05/19] drm/vc4: Use the alpha format field in drm_format_info

[Maxime Ripard]

Now that the drm_format_info has a alpha field to tell if a format embeds
an alpha component in it, let's use it.

Cc: Eric Anholt 
Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/vc4/vc4_plane.c | 19 +--
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 423a23ed8fc2..a0a626242bcd 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -85,40 +85,39 @@ static const struct hvs_format {
u32 drm; /* DRM_FORMAT_* */
u32 hvs; /* HVS_FORMAT_* */
u32 pixel_order;
-   bool has_alpha;
bool flip_cbcr;
 } hvs_formats[] = {
{
.drm = DRM_FORMAT_XRGB, .hvs = HVS_PIXEL_FORMAT_RGBA,
-   .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
+   .pixel_order = HVS_PIXEL_ORDER_ABGR,
},
{
.drm = DRM_FORMAT_ARGB, .hvs = HVS_PIXEL_FORMAT_RGBA,
-   .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
+   .pixel_order = HVS_PIXEL_ORDER_ABGR,
},
{
.drm = DRM_FORMAT_ABGR, .hvs = HVS_PIXEL_FORMAT_RGBA,
-   .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = true,
+   .pixel_order = HVS_PIXEL_ORDER_ARGB,
},
{
.drm = DRM_FORMAT_XBGR, .hvs = HVS_PIXEL_FORMAT_RGBA,
-   .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = false,
+   .pixel_order = HVS_PIXEL_ORDER_ARGB,
},
{
.drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565,
-   .pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false,
+   .pixel_order = HVS_PIXEL_ORDER_XRGB,
},
{
.drm = DRM_FORMAT_BGR565, .hvs = HVS_PIXEL_FORMAT_RGB565,
-   .pixel_order = HVS_PIXEL_ORDER_XBGR, .has_alpha = false,
+   .pixel_order = HVS_PIXEL_ORDER_XBGR,
},
{
.drm = DRM_FORMAT_ARGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
-   .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
+   .pixel_order = HVS_PIXEL_ORDER_ABGR,
},
{
.drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
-   .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
+   .pixel_order = HVS_PIXEL_ORDER_ABGR,
},
{
.drm = DRM_FORMAT_YUV422,
@@ -601,7 +600,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
/* Position Word 2: Source Image Size, Alpha Mode */
vc4_state->pos2_offset = vc4_state->dlist_count;
vc4_dlist_write(vc4_state,
-   VC4_SET_FIELD(format->has_alpha ?
+   VC4_SET_FIELD(fb->format->has_alpha ?
  SCALER_POS2_ALPHA_MODE_PIPELINE :
  SCALER_POS2_ALPHA_MODE_FIXED,
  SCALER_POS2_ALPHA_MODE) |
-- 
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[PATCH v2 16/19] drm/sun4i: backend: Assign the pipes automatically

[Maxime Ripard]

Since we now have a way to enforce the zpos, check for the number of alpha
planes, the only missing part is to assign our pipe automatically instead
of hardcoding it.

The algorithm is quite simple, but requires two iterations over the list of
planes.

In the first one (which is the same one that we've had to check for alpha,
the frontend usage, and so on), we order the planes by their zpos.

We can then do a second iteration over that array by ascending zpos
starting with the pipe 0. When and if we encounter our alpha plane, we put
it and all the other subsequent planes in the second pipe.

And since we have runtime checks and pipe assignments now, we can just
remove the static declaration of the planes we used to have.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 41 +--
 drivers/gpu/drm/sun4i/sun4i_layer.c   | 50 
 drivers/gpu/drm/sun4i/sun4i_layer.h   |  1 +-
 3 files changed, 48 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index eb1749d2c0d5..38c4b44f6ff5 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -276,12 +276,16 @@ int sun4i_backend_update_layer_zpos(struct sun4i_backend 
*backend, int layer,
struct drm_plane *plane)
 {
struct drm_plane_state *state = plane->state;
+   struct sun4i_layer_state *p_state = state_to_sun4i_layer_state(state);
unsigned int priority = state->normalized_zpos;
+   unsigned int pipe = p_state->pipe;
 
-   DRM_DEBUG_DRIVER("Setting layer %d priority to %d\n", layer, priority);
-
+   DRM_DEBUG_DRIVER("Setting layer %d priority to %d and pipe %d\n",
+layer, priority, pipe);
regmap_update_bits(backend->engine.regs, 
SUN4I_BACKEND_ATTCTL_REG0(layer),
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK |
   SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK,
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(p_state->pipe) 
|
   SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(priority));
 
return 0;
@@ -326,12 +330,15 @@ static void sun4i_backend_atomic_begin(struct 
sunxi_engine *engine,
 static int sun4i_backend_atomic_check(struct sunxi_engine *engine,
  struct drm_crtc_state *crtc_state)
 {
+   struct drm_plane_state *plane_states[SUN4I_BACKEND_NUM_LAYERS] = { 0 };
struct drm_atomic_state *state = crtc_state->state;
struct drm_device *drm = state->dev;
struct drm_plane *plane;
unsigned int num_planes = 0;
unsigned int num_alpha_planes = 0;
unsigned int num_frontend_planes = 0;
+   unsigned int current_pipe = 0;
+   unsigned int i;
 
DRM_DEBUG_DRIVER("Starting checking our planes\n");
 
@@ -344,6 +351,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
struct sun4i_layer_state *layer_state =
state_to_sun4i_layer_state(plane_state);
struct drm_framebuffer *fb = plane_state->fb;
+   struct drm_format_name_buf format_name;
 
if (sun4i_backend_plane_uses_frontend(plane_state)) {
DRM_DEBUG_DRIVER("Using the frontend for plane %d\n",
@@ -361,9 +369,19 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
if (fb->format->has_alpha)
num_alpha_planes++;
 
+   DRM_DEBUG_DRIVER("Plane zpos is %d\n",
+plane_state->normalized_zpos);
+
+   /* Sort our planes by Zpos */
+   plane_states[plane_state->normalized_zpos] = plane_state;
+
num_planes++;
}
 
+   /* All our planes were disabled, bail out */
+   if (!num_planes)
+   return 0;
+
/*
 * The hardware is a bit unusual here.
 *
@@ -400,6 +418,25 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
return -EINVAL;
}
 
+   /* We can't have an alpha plane at the lowest position */
+   if (plane_states[0]->fb->format->has_alpha)
+   return -EINVAL;
+
+   for (i = 1; i < num_planes; i++) {
+   struct drm_plane_state *p_state = plane_states[i];
+   struct drm_framebuffer *fb = p_state->fb;
+   struct sun4i_layer_state *s_state = 
state_to_sun4i_layer_state(p_state);
+
+   /*
+* The only alpha position is the lowest plane of the
+* second pipe.
+*/
+   if (fb->format->has_alpha)
+   current_pipe++;
+
+   s_state->pipe = current_pipe;
+   }
+
if (num_frontend_planes > SUN4I_BACKEND_NUM_FRONTEND_LAYERS) {
DRM_DEBUG_DRIVER("Too many

[PATCH v2 01/19] drm/fourcc: Add a alpha field to drm_format_info

[Maxime Ripard]

There's a bunch of drivers that duplicate the same function to know if a
particular format embeds an alpha component or not.

Let's create a field in the drm_format_info to avoid duplicating that logic
and looking up formats all the time.

Cc: Eric Anholt 
Cc: Inki Dae 
Cc: Joonyoung Shim 
Cc: Kyungmin Park 
Cc: Laurent Pinchart 
Cc: Mark Yao 
Cc: Seung-Woo Kim 
Reviewed-by: Boris Brezillon 
Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/drm_fourcc.c | 50 ++---
 include/drm/drm_fourcc.h |  2 +-
 2 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index 9c0152df45ad..5ca6395cd4d3 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -112,18 +112,18 @@ const struct drm_format_info *__drm_format_info(u32 
format)
{ .format = DRM_FORMAT_XBGR,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBX,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGRX,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_ARGB,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_ABGR,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_RGBA,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_BGRA,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
+   { .format = DRM_FORMAT_ARGB,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_ABGR,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_RGBA,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_BGRA,.depth = 0,  
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_XRGB1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_XBGR1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBX5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGRX5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_ARGB1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_ABGR1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_RGBA5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_BGRA5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
+   { .format = DRM_FORMAT_ARGB1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_ABGR1555,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_RGBA5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
+   { .format = DRM_FORMAT_BGRA5551,.depth = 15, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true },
{ .format = DRM_FORMAT_RGB565,  .depth = 16, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGR565,  .depth = 16, 
.num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGB888,  .depth = 24, 
.num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1 },
@@ -132,26 +132,26 @@ const struct drm_format_info *__drm_format_info(u32 
format)
{ .format = DRM_FORMAT_XBGR,.depth = 24, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBX,.depth = 24, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGRX,.depth = 24, 
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
-   { .format = DRM_FORMAT_RGB565_A8,   .depth = 24, 
.num_pla

[PATCH v2 19/19] drm/sun4i: backend: Remove ARGB spoofing

[Maxime Ripard]

We've had some code for quite some time to prevent the alpha bug from
happening on the lowest primary plane. Since we now check for this in our
atomic_check, we can simply remove it.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index f5beeec06fd5..b414dc87e217 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -92,13 +92,8 @@ void sun4i_backend_layer_enable(struct sun4i_backend 
*backend,
   SUN4I_BACKEND_MODCTL_LAY_EN(layer), val);
 }
 
-static int sun4i_backend_drm_format_to_layer(struct drm_plane *plane,
-u32 format, u32 *mode)
+static int sun4i_backend_drm_format_to_layer(u32 format, u32 *mode)
 {
-   if (plane && (plane->type == DRM_PLANE_TYPE_PRIMARY) &&
-   (format == DRM_FORMAT_ARGB))
-   format = DRM_FORMAT_XRGB;
-
switch (format) {
case DRM_FORMAT_ARGB:
*mode = SUN4I_BACKEND_LAY_FBFMT_ARGB;
@@ -200,8 +195,7 @@ int sun4i_backend_update_layer_formats(struct sun4i_backend 
*backend,
   SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN,
   val);
 
-   ret = sun4i_backend_drm_format_to_layer(plane, fb->format->format,
-   &val);
+   ret = sun4i_backend_drm_format_to_layer(fb->format->format, &val);
if (ret) {
DRM_DEBUG_DRIVER("Invalid format\n");
return ret;
@@ -220,7 +214,7 @@ int sun4i_backend_update_layer_frontend(struct 
sun4i_backend *backend,
u32 val;
int ret;
 
-   ret = sun4i_backend_drm_format_to_layer(NULL, fmt, &val);
+   ret = sun4i_backend_drm_format_to_layer(fmt, &val);
if (ret) {
DRM_DEBUG_DRIVER("Invalid format\n");
return ret;
-- 
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[PATCH v2 10/19] drm/sun4i: backend: Fix define typo

[Maxime Ripard]

There was a typo in the width spelling of the (unused)
SUN4I_BACKEND_IYUVLINEWITDTH_REG macro. Fix it.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h 
b/drivers/gpu/drm/sun4i/sun4i_backend.h
index b5edf2d50a24..1ca8b7db6807 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -112,7 +112,9 @@
 #define SUN4I_BACKEND_SPRALPHACTL_REG  0x90c
 #define SUN4I_BACKEND_IYUVCTL_REG  0x920
 #define SUN4I_BACKEND_IYUVADD_REG(c)   (0x930 + (0x4 * (c)))
-#define SUN4I_BACKEND_IYUVLINEWITDTH_REG(c)(0x940 + (0x4 * (c)))
+
+#define SUN4I_BACKEND_IYUVLINEWIDTH_REG(c) (0x940 + (0x4 * (c)))
+
 #define SUN4I_BACKEND_YGCOEF_REG(c)(0x950 + (0x4 * (c)))
 #define SUN4I_BACKEND_YGCONS_REG   0x95c
 #define SUN4I_BACKEND_URCOEF_REG(c)(0x960 + (0x4 * (c)))
-- 
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[PATCH v2 13/19] drm/sun4i: backend: Set a default zpos in our reset hook

[Maxime Ripard]

The our plane state zpos value will be set only if there's an existing
state attached to the plane when creating the property.

However, this is not the case during the probe, and we therefore need to
put our default value in our reset hook.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_layer.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index c448cb6b9fa9..03549646528a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -28,6 +28,7 @@ struct sun4i_plane_desc {
 
 static void sun4i_backend_layer_reset(struct drm_plane *plane)
 {
+   struct sun4i_layer *layer = plane_to_sun4i_layer(plane);
struct sun4i_layer_state *state;
 
if (plane->state) {
@@ -43,6 +44,7 @@ static void sun4i_backend_layer_reset(struct drm_plane *plane)
if (state) {
plane->state = &state->state;
plane->state->plane = plane;
+   plane->state->zpos = layer->id;
}
 }
 
-- 
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[PATCH v2 12/19] drm/sun4i: backend: Move the coord function in the shared part

[Maxime Ripard]

The function supposed to update a plane's coordinates is called in both
branches of our function. Let's move it out the if statement.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_layer.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index f03da16eb92a..c448cb6b9fa9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -106,14 +106,13 @@ static void sun4i_backend_layer_atomic_update(struct 
drm_plane *plane,
  DRM_FORMAT_ARGB);
sun4i_backend_update_layer_frontend(backend, layer->id,
DRM_FORMAT_ARGB);
-   sun4i_backend_update_layer_coord(backend, layer->id, plane);
sun4i_frontend_enable(frontend);
} else {
-   sun4i_backend_update_layer_coord(backend, layer->id, plane);
sun4i_backend_update_layer_formats(backend, layer->id, plane);
sun4i_backend_update_layer_buffer(backend, layer->id, plane);
}
 
+   sun4i_backend_update_layer_coord(backend, layer->id, plane);
sun4i_backend_layer_enable(backend, layer->id, true);
 }
 
-- 
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[PATCH v2 06/19] drm/blend: Add a generic alpha property

[Maxime Ripard]

Some drivers duplicate the logic to create a property to store a per-plane
alpha.

This is especially useful if we ever want to support extra protocols for
Wayland like:
https://lists.freedesktop.org/archives/wayland-devel/2017-August/034741.html

Let's create a helper in order to move that to the core.

Cc: Laurent Pinchart 
Reviewed-by: Boris Brezillon 
Signed-off-by: Maxime Ripard 
---
 Documentation/gpu/kms-properties.csv |  2 +-
 drivers/gpu/drm/drm_atomic.c |  4 -
 drivers/gpu/drm/drm_atomic_helper.c  |  4 -
 drivers/gpu/drm/drm_blend.c  | 32 +-
 include/drm/drm_blend.h  |  1 +-
 include/drm/drm_plane.h  |  6 +-
 6 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/Documentation/gpu/kms-properties.csv 
b/Documentation/gpu/kms-properties.csv
index 927b65e14219..25ad3503d663 100644
--- a/Documentation/gpu/kms-properties.csv
+++ b/Documentation/gpu/kms-properties.csv
@@ -99,5 +99,5 @@ radeon,DVI-I,“coherent”,RANGE,"Min=0, Max=1",Connector,TBD
 ,,"""underscan vborder""",RANGE,"Min=0, Max=128",Connector,TBD
 ,Audio,“audio”,ENUM,"{ ""off"", ""on"", ""auto"" }",Connector,TBD
 ,FMT Dithering,“dither”,ENUM,"{ ""off"", ""on"" }",Connector,TBD
-rcar-du,Generic,"""alpha""",RANGE,"Min=0, Max=255",Plane,TBD
+,,"""alpha""",RANGE,"Min=0, Max=Driver dependant",Plane,Opacity of the plane 
from transparent (0) to fully opaque (MAX). If this property is set to a value 
different than max, and that the pixel will define an alpha component, the 
property will have precendance and the pixel value will be ignored. The alpha 
value is represented as straight alpha, ie the colors haven't been pre-adjusted 
for their opacity by multiplication. Therefore, the equation to get a color 
value for one pixel, assuming two planes A and B, will be (color_a * alpha_a + 
color_b * alpha_b * (MAX - alpha_a) / MAX) / (alpha_a + alpha_b * (MAX - 
alpha_a) / MAX)
 ,,"""colorkey""",RANGE,"Min=0, Max=0x01ff",Plane,TBD
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index c2da5585e201..ade18cf62c89 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -749,6 +749,8 @@ static int drm_atomic_plane_set_property(struct drm_plane 
*plane,
state->src_w = val;
} else if (property == config->prop_src_h) {
state->src_h = val;
+   } else if (property == plane->alpha_property) {
+   state->alpha = val;
} else if (property == plane->rotation_property) {
if (!is_power_of_2(val & DRM_MODE_ROTATE_MASK))
return -EINVAL;
@@ -810,6 +812,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
*val = state->src_w;
} else if (property == config->prop_src_h) {
*val = state->src_h;
+   } else if (property == plane->alpha_property) {
+   *val = state->alpha;
} else if (property == plane->rotation_property) {
*val = state->rotation;
} else if (property == plane->zpos_property) {
diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index 71d712f1b56a..bad0af053384 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3373,6 +3373,10 @@ void drm_atomic_helper_plane_reset(struct drm_plane 
*plane)
if (plane->state) {
plane->state->plane = plane;
plane->state->rotation = DRM_MODE_ROTATE_0;
+
+   /* Reset the alpha value to fully opaque if it matters */
+   if (plane->alpha_property)
+   plane->state->alpha = plane->alpha_property->values[1];
}
 }
 EXPORT_SYMBOL(drm_atomic_helper_plane_reset);
diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c
index 2e5e089dd912..e6bfa618e902 100644
--- a/drivers/gpu/drm/drm_blend.c
+++ b/drivers/gpu/drm/drm_blend.c
@@ -104,6 +104,38 @@
  */
 
 /**
+ * drm_plane_create_alpha_property - create a new alpha property
+ * @plane: drm plane
+ * @max_alpha: maximum value of alpha
+ *
+ * This function initializes a generic, mutable, alpha property and
+ * enables support for it in the DRM core.
+ *
+ * The alpha property will be allowed to be within the bounds of 0
+ * (transparent) to @max_alpha (opaque)
+ *
+ * Returns:
+ * 0 on success, negative error code on failure.
+ */
+int drm_plane_create_alpha_property(struct drm_plane *plane, u16 max_alpha)
+{
+   struct drm_property *prop;
+
+   prop = drm_property_create_range(plane->dev, 0, "alpha", 0, max_alpha);
+   if (!prop)
+   return -ENOMEM;
+
+   drm_object_attach_property(&plane->base, prop, max_alpha);
+   plane->alpha_property = prop;
+
+   if (plane->state)
+   plane->state->alpha = max_alpha;
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_plane_create_alpha_property);
+
+/**
  * drm_plane_create_rotation_property - create a n

[PATCH v2 15/19] drm/sun4i: backend: Check for the number of alpha planes

[Maxime Ripard]

Due to the way the composition is done in hardware, we can only have a
single alpha-enabled plane active at a time, placed in the second (highest
priority) pipe.

Make sure of that in our atomic_check to not end up in an impossible
scenario.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 50 -
 drivers/gpu/drm/sun4i/sun4i_backend.h |  2 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c   | 23 +-
 3 files changed, 53 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index c4986054909b..eb1749d2c0d5 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -329,6 +329,8 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
struct drm_atomic_state *state = crtc_state->state;
struct drm_device *drm = state->dev;
struct drm_plane *plane;
+   unsigned int num_planes = 0;
+   unsigned int num_alpha_planes = 0;
unsigned int num_frontend_planes = 0;
 
DRM_DEBUG_DRIVER("Starting checking our planes\n");
@@ -341,6 +343,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
drm_atomic_get_plane_state(state, plane);
struct sun4i_layer_state *layer_state =
state_to_sun4i_layer_state(plane_state);
+   struct drm_framebuffer *fb = plane_state->fb;
 
if (sun4i_backend_plane_uses_frontend(plane_state)) {
DRM_DEBUG_DRIVER("Using the frontend for plane %d\n",
@@ -351,6 +354,50 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
} else {
layer_state->uses_frontend = false;
}
+
+   DRM_DEBUG_DRIVER("Plane FB format is %s\n",
+drm_get_format_name(fb->format->format,
+&format_name));
+   if (fb->format->has_alpha)
+   num_alpha_planes++;
+
+   num_planes++;
+   }
+
+   /*
+* The hardware is a bit unusual here.
+*
+* Even though it supports 4 layers, it does the composition
+* in two separate steps.
+*
+* The first one is assigning a layer to one of its two
+* pipes. If more that 1 layer is assigned to the same pipe,
+* and if pixels overlaps, the pipe will take the pixel from
+* the layer with the highest priority.
+*
+* The second step is the actual alpha blending, that takes
+* the two pipes as input, and uses the eventual alpha
+* component to do the transparency between the two.
+*
+* This two steps scenario makes us unable to guarantee a
+* robust alpha blending between the 4 layers in all
+* situations, since this means that we need to have one layer
+* with alpha at the lowest position of our two pipes.
+*
+* However, we cannot even do that, since the hardware has a
+* bug where the lowest plane of the lowest pipe (pipe 0,
+* priority 0), if it has any alpha, will discard the pixel
+* entirely and just display the pixels in the background
+* color (black by default).
+*
+* Since means that we effectively have only three valid
+* configurations with alpha, all of them with the alpha being
+* on pipe1 with the lowest position, which can be 1, 2 or 3
+* depending on the number of planes and their zpos.
+*/
+   if (num_alpha_planes > SUN4I_BACKEND_NUM_ALPHA_LAYERS) {
+   DRM_DEBUG_DRIVER("Too many planes with alpha, rejecting...\n");
+   return -EINVAL;
}
 
if (num_frontend_planes > SUN4I_BACKEND_NUM_FRONTEND_LAYERS) {
@@ -358,6 +405,9 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
return -EINVAL;
}
 
+   DRM_DEBUG_DRIVER("State valid with %u planes, %u alpha, %u video\n",
+num_planes, num_alpha_planes, num_frontend_planes);
+
return 0;
 }
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h 
b/drivers/gpu/drm/sun4i/sun4i_backend.h
index 04a4f11b87a8..52e77591186a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -146,6 +146,8 @@
 #define SUN4I_BACKEND_HWCCOLORTAB_OFF  0x4c00
 #define SUN4I_BACKEND_PIPE_OFF(p)  (0x5000 + (0x400 * (p)))
 
+#define SUN4I_BACKEND_NUM_LAYERS   4
+#define SUN4I_BACKEND_NUM_ALPHA_LAYERS 1
 #define SUN4I_BACKEND_NUM_FRONTEND_LAYERS  1
 
 struct sun4i_backend {
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index fbf25d59cf88..900e716443b8 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.

[PATCH v2 04/19] drm/rockchip: Use the alpha format field in drm_format_info

[Maxime Ripard]

Now that the drm_format_info has a alpha field to tell if a format embeds
an alpha component in it, let's use it.

Acked-by: Sandy huang 
Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 13 +
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 19128b4dea54..db6a0662be5a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -253,17 +253,6 @@ static bool is_yuv_support(uint32_t format)
}
 }
 
-static bool is_alpha_support(uint32_t format)
-{
-   switch (format) {
-   case DRM_FORMAT_ARGB:
-   case DRM_FORMAT_ABGR:
-   return true;
-   default:
-   return false;
-   }
-}
-
 static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
  uint32_t dst, bool is_horizontal,
  int vsu_mode, int *vskiplines)
@@ -790,7 +779,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
rb_swap = has_rb_swapped(fb->format->format);
VOP_WIN_SET(vop, win, rb_swap, rb_swap);
 
-   if (is_alpha_support(fb->format->format)) {
+   if (fb->format->has_alpha) {
VOP_WIN_SET(vop, win, dst_alpha_ctl,
DST_FACTOR_M0(ALPHA_SRC_INVERSE));
val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) |
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[PATCH v2 18/19] drm/sun4i: Add support for plane alpha

[Maxime Ripard]

Our backend supports a per-plane alpha property. Support it through our new
helper.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 16 +---
 drivers/gpu/drm/sun4i/sun4i_backend.h |  3 +++
 drivers/gpu/drm/sun4i/sun4i_layer.c   |  2 ++
 3 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 38c4b44f6ff5..f5beeec06fd5 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -191,6 +191,15 @@ int sun4i_backend_update_layer_formats(struct 
sun4i_backend *backend,
DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",
 interlaced ? "on" : "off");
 
+   val = SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(state->alpha);
+   if (state->alpha != 255)
+   val |= SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN;
+   regmap_update_bits(backend->engine.regs,
+  SUN4I_BACKEND_ATTCTL_REG0(layer),
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_MASK |
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN,
+  val);
+
ret = sun4i_backend_drm_format_to_layer(plane, fb->format->format,
&val);
if (ret) {
@@ -366,7 +375,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
DRM_DEBUG_DRIVER("Plane FB format is %s\n",
 drm_get_format_name(fb->format->format,
 &format_name));
-   if (fb->format->has_alpha)
+   if (fb->format->has_alpha || (plane_state->alpha != 255))
num_alpha_planes++;
 
DRM_DEBUG_DRIVER("Plane zpos is %d\n",
@@ -419,7 +428,8 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
}
 
/* We can't have an alpha plane at the lowest position */
-   if (plane_states[0]->fb->format->has_alpha)
+   if (plane_states[0]->fb->format->has_alpha ||
+   (plane_states[0]->alpha != 255))
return -EINVAL;
 
for (i = 1; i < num_planes; i++) {
@@ -431,7 +441,7 @@ static int sun4i_backend_atomic_check(struct sunxi_engine 
*engine,
 * The only alpha position is the lowest plane of the
 * second pipe.
 */
-   if (fb->format->has_alpha)
+   if (fb->format->has_alpha || (p_state->alpha != 255))
current_pipe++;
 
s_state->pipe = current_pipe;
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h 
b/drivers/gpu/drm/sun4i/sun4i_backend.h
index 52e77591186a..03294d5dd1a2 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -68,11 +68,14 @@
 #define SUN4I_BACKEND_CKMIN_REG0x884
 #define SUN4I_BACKEND_CKCFG_REG0x888
 #define SUN4I_BACKEND_ATTCTL_REG0(l)   (0x890 + (0x4 * (l)))
+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_MASKGENMASK(31, 24)
+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(x)  ((x) << 24)
 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK BIT(15)
 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x)   ((x) << 15)
 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK  GENMASK(11, 10)
 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x)((x) << 
10)
 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_VDOENBIT(1)
+#define SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN  BIT(0)
 
 #define SUN4I_BACKEND_ATTCTL_REG1(l)   (0x8a0 + (0x4 * (l)))
 #define SUN4I_BACKEND_ATTCTL_REG1_LAY_HSCAFCT  GENMASK(15, 14)
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 9e538f761dcb..d5598de92f85 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -37,6 +37,7 @@ static void sun4i_backend_layer_reset(struct drm_plane *plane)
if (state) {
plane->state = &state->state;
plane->state->plane = plane;
+   plane->state->alpha = 255;
plane->state->zpos = layer->id;
}
 }
@@ -163,6 +164,7 @@ static struct sun4i_layer *sun4i_layer_init_one(struct 
drm_device *drm,
 &sun4i_backend_layer_helper_funcs);
layer->backend = backend;
 
+   drm_plane_create_alpha_property(&layer->plane, 255);
drm_plane_create_zpos_property(&layer->plane, 0, 0,
   SUN4I_BACKEND_NUM_LAYERS - 1);
 
-- 
git-series 0.9.1
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[PATCH v2 17/19] drm/sun4i: backend: Make zpos configurable

[Maxime Ripard]

Now that we have everything in place, we can make zpos configurable now.
Change the zpos property from an immutable one to a regular.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_layer.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index ec7b906dbb84..9e538f761dcb 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -163,6 +163,9 @@ static struct sun4i_layer *sun4i_layer_init_one(struct 
drm_device *drm,
 &sun4i_backend_layer_helper_funcs);
layer->backend = backend;
 
+   drm_plane_create_zpos_property(&layer->plane, 0, 0,
+  SUN4I_BACKEND_NUM_LAYERS - 1);
+
return layer;
 }
 
@@ -189,8 +192,6 @@ struct drm_plane **sun4i_layers_init(struct drm_device *drm,
return ERR_CAST(layer);
};
 
-   drm_plane_create_zpos_immutable_property(&layer->plane, i);
-
layer->id = i;
planes[i] = &layer->plane;
};
-- 
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[PATCH v2 14/19] drm/sun4i: backend: Add support for zpos

[Maxime Ripard]

Our various planes have a configurable zpos, that combined with the pipes
allow to configure the composition.

Since the interaction between the pipes, zpos and alphas framebuffers are
not trivials, let's just enable the zpos as an immutable property for now,
and use that zpos in our atomic_update part.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_backend.c | 15 +++
 drivers/gpu/drm/sun4i/sun4i_backend.h |  2 ++
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c |  4 
 drivers/gpu/drm/sun4i/sun4i_layer.c   |  3 +++
 4 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index a18c86a15748..c4986054909b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -272,6 +272,21 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend 
*backend,
return 0;
 }
 
+int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend, int layer,
+   struct drm_plane *plane)
+{
+   struct drm_plane_state *state = plane->state;
+   unsigned int priority = state->normalized_zpos;
+
+   DRM_DEBUG_DRIVER("Setting layer %d priority to %d\n", layer, priority);
+
+   regmap_update_bits(backend->engine.regs, 
SUN4I_BACKEND_ATTCTL_REG0(layer),
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK,
+  SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(priority));
+
+   return 0;
+}
+
 static bool sun4i_backend_plane_uses_scaler(struct drm_plane_state *state)
 {
u16 src_h = state->src_h >> 16;
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h 
b/drivers/gpu/drm/sun4i/sun4i_backend.h
index 1ca8b7db6807..04a4f11b87a8 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -182,5 +182,7 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend 
*backend,
  int layer, struct drm_plane *plane);
 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend,
int layer, uint32_t in_fmt);
+int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend,
+   int layer, struct drm_plane *plane);
 
 #endif /* _SUN4I_BACKEND_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c 
b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
index e68004844abe..5b3986437a50 100644
--- a/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_framebuffer.c
@@ -35,6 +35,10 @@ static int sun4i_de_atomic_check(struct drm_device *dev,
if (ret)
return ret;
 
+   ret = drm_atomic_normalize_zpos(dev, state);
+   if (ret)
+   return ret;
+
return drm_atomic_helper_check_planes(dev, state);
 }
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c 
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 03549646528a..fbf25d59cf88 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -115,6 +115,7 @@ static void sun4i_backend_layer_atomic_update(struct 
drm_plane *plane,
}
 
sun4i_backend_update_layer_coord(backend, layer->id, plane);
+   sun4i_backend_update_layer_zpos(backend, layer->id, plane);
sun4i_backend_layer_enable(backend, layer->id, true);
 }
 
@@ -237,6 +238,8 @@ struct drm_plane **sun4i_layers_init(struct drm_device *drm,
return ERR_CAST(layer);
};
 
+   drm_plane_create_zpos_immutable_property(&layer->plane, i);
+
DRM_DEBUG_DRIVER("Assigning %s plane to pipe %d\n",
 i ? "overlay" : "primary", plane->pipe);
regmap_update_bits(engine->regs, SUN4I_BACKEND_ATTCTL_REG0(i),
-- 
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[PATCH v2 03/19] drm/atmel-exynos: Use the alpha format field in drm_format_info

[Maxime Ripard]

Now that the drm_format_info has a alpha field to tell if a format embeds
an alpha component in it, let's use it.

Cc: Joonyoung Shim 
Cc: Kyungmin Park 
Cc: Seung-Woo Kim 
Acked-by: Inki Dae 
Reviewed-by: Daniel Vetter 
Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 14 +-
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index dc5d79465f9b..257299ec95c4 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -179,18 +179,6 @@ static const u8 filter_cr_horiz_tap4[] = {
70, 59, 48, 37, 27, 19, 11, 5,
 };
 
-static inline bool is_alpha_format(unsigned int pixel_format)
-{
-   switch (pixel_format) {
-   case DRM_FORMAT_ARGB:
-   case DRM_FORMAT_ARGB1555:
-   case DRM_FORMAT_ARGB:
-   return true;
-   default:
-   return false;
-   }
-}
-
 static inline u32 vp_reg_read(struct mixer_context *ctx, u32 reg_id)
 {
return readl(ctx->vp_regs + reg_id);
@@ -625,7 +613,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
mixer_reg_write(ctx, MXR_GRAPHIC_BASE(win), dma_addr);
 
mixer_cfg_layer(ctx, win, priority, true);
-   mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->format->format));
+   mixer_cfg_gfx_blend(ctx, win, fb->format->has_alpha);
 
/* layer update mandatory for mixer 16.0.33.0 */
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
-- 
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Re: [PATCH 02/40] drm/rockchip: support prime import sg table

[Heiko Stuebner]

Am Montag, 15. Januar 2018, 18:15:36 CET schrieb Thierry Escande:
> From: Haixia Shi 
> 
> The prime fd to handle ioctl was not used with rockchip before. Support
> was added in order to pass graphics_Gbm and to support potential uses
> within Chrome OS (e.g. zero-copy video decode, camera).
> 
> Signed-off-by: Haixia Shi 
> Signed-off-by: Sean Paul 
> Signed-off-by: Thierry Escande 

On rk3036 + lima and rk3328 + lima
Tested-by: Heiko Stuebner 
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Re: [PATCH 03/40] drm/rockchip: Respect page offset for PRIME mmap calls

[Heiko Stuebner]

Am Montag, 15. Januar 2018, 18:15:37 CET schrieb Thierry Escande:
> From: Ørjan Eide 
> 
> When mapping external DMA-bufs through the PRIME mmap call, we might be
> given an offset which has to be respected. However for the internal DRM
> GEM mmap path, we have to ignore the fake mmap offset used to identify
> the buffer only. Currently the code always zeroes out vma->vm_pgoff,
> which breaks the former.
> 
> This patch fixes the problem by moving the vm_pgoff assignment to a
> function that is used only for GEM mmap path, so that the PRIME path
> retains the original offset.
> 
> Cc: Daniel Kurtz 
> Signed-off-by: Ørjan Eide 
> Signed-off-by: Tomasz Figa 
> Signed-off-by: Sean Paul 
> Signed-off-by: Thierry Escande 

On rk3036 + lima and rk3328 + lima
Tested-by: Heiko Stuebner 
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Re: [PATCH libdrm] modetest: Fix to check return value of asprintf()

[Eric Engestrom]

On Wednesday, 2018-01-10 11:16:41 +0900, Seung-Woo Kim wrote:
> There is warning about ignoring return value of 'asprintf'. Fix to
> check return value of asprintf().
> 
> Signed-off-by: Seung-Woo Kim 

Reviewed-by: Eric Engestrom 

Do you have commit access or would you like me to push it for you?

> ---
>  tests/modetest/modetest.c |5 -
>  1 files changed, 4 insertions(+), 1 deletions(-)
> 
> diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
> index 62d9332..0773bd0 100644
> --- a/tests/modetest/modetest.c
> +++ b/tests/modetest/modetest.c
> @@ -656,10 +656,13 @@ static struct resources *get_resources(struct device 
> *dev)
>   for (i = 0; i < res->res->count_connectors; i++) {
>   struct connector *connector = &res->connectors[i];
>   drmModeConnector *conn = connector->connector;
> + int num;
>  
> - asprintf(&connector->name, "%s-%u",
> + num = asprintf(&connector->name, "%s-%u",
>util_lookup_connector_type_name(conn->connector_type),
>conn->connector_type_id);
> + if (num < 0)
> + goto error;
>   }
>  
>  #define get_properties(_res, __res, type, Type)  
> \
> -- 
> 1.7.4.1
> 
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[PATCH] video: remove unused kconfig SH_LCD_MIPI_DSI

[Corentin Labbe]

SH_LCD_MIPI_DSI is unused since commit 18b6562c243f ("fbdev: sh_mipi_dsi: 
remove driver")
So no need to keep it.
Fixes: 18b6562c243f ("fbdev: sh_mipi_dsi: remove driver")

Signed-off-by: Corentin Labbe 
---
 drivers/video/Kconfig | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af999893..429f15b2b51a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -8,9 +8,6 @@ menu "Graphics support"
 config HAVE_FB_ATMEL
bool
 
-config SH_LCD_MIPI_DSI
-   bool
-
 source "drivers/char/agp/Kconfig"
 
 source "drivers/gpu/vga/Kconfig"
-- 
2.13.6

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[Bug 104723] [CI] igt@[kms_3d|igt@kms_panel_fitting] - fail - Could not open data file "1080p-left.png": No such file or directoryReceived signal SIGSEGV.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104723

Marta Löfstedt  changed:

   What|Removed |Added

Summary|[CI] igt@kms_3d - fail -|[CI]
   |Could not open data file|igt@[kms_3d|igt@kms_panel_f
   |"1080p-left.png": No such   |itting] - fail - Could not
   |file or directoryReceived   |open data file
   |signal SIGSEGV. |"1080p-left.png": No such
   ||file or directoryReceived
   ||signal SIGSEGV.
  Component|DRM/Intel   |IGT
   Assignee|intel-gfx-bugs@lists.freede |dri-devel@lists.freedesktop
   |sktop.org   |.org
 QA Contact|intel-gfx-bugs@lists.freede |
   |sktop.org   |

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[PATCH 0/2] Add support for i2c_new_secondary_device

[Kieran Bingham]

Back in 2014, Jean-Michel provided patches [0] to implement a means of
describing software defined I2C addresses for devices through the DT nodes.

The patch to implement the function "i2c_new_secondary_device()" was integrated,
but the corresponding driver update didn't get applied.

This short series re-bases Jean-Michel's patch to mainline for the ADV7604 
driver
in linux-media, and also provides a patch for the ADV7511 DRM Bridge driver 
taking
the same approach.

This series allows us to define the I2C address allocations of these devices in
the device tree for the Renesas D3 platform where these two devices reside on
the same bus and conflict with each other presently..

[0] https://lkml.org/lkml/2014/10/22/468
[1] https://lkml.org/lkml/2014/10/22/469

Jean-Michel Hautbois (1):
  media: adv7604: Add support for i2c_new_secondary_device

Kieran Bingham (1):
  drm: adv7511: Add support for i2c_new_secondary_device

 .../bindings/display/bridge/adi,adv7511.txt| 10 +++-
 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 ++-
 drivers/gpu/drm/bridge/adv7511/adv7511.h   |  4 ++
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   | 36 -
 drivers/media/i2c/adv7604.c| 60 ++
 5 files changed, 92 insertions(+), 36 deletions(-)

-- 
2.7.4

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[PATCH 1/2] media: adv7604: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Jean-Michel Hautbois 

The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Jean-Michel Hautbois 
[Kieran: Re-adapted for mainline]
Signed-off-by: Kieran Bingham 
---
Based upon the original posting :
  https://lkml.org/lkml/2014/10/22/469
---
 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 ++-
 drivers/media/i2c/adv7604.c| 60 ++
 2 files changed, 55 insertions(+), 23 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.txt 
b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
index 9cbd92eb5d05..b64e313dcc66 100644
--- a/Documentation/devicetree/bindings/media/i2c/adv7604.txt
+++ b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
@@ -13,7 +13,11 @@ Required Properties:
 - "adi,adv7611" for the ADV7611
 - "adi,adv7612" for the ADV7612
 
-  - reg: I2C slave address
+  - reg: I2C slave addresses
+The ADV76xx has up to thirteen 256-byte maps that can be accessed via the
+main I²C ports. Each map has it own I²C address and acts as a standard
+slave device on the I²C bus. The main address is mandatory, others are
+optional and revert to defaults if not specified.
 
   - hpd-gpios: References to the GPIOs that control the HDMI hot-plug
 detection pins, one per HDMI input. The active flag indicates the GPIO
@@ -35,6 +39,11 @@ Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the device's reset pin.
   - default-input: Select which input is selected after reset.
+  - reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are :
+ "main", "avlink", "cec", "infoframe", "esdp", "dpp", "afe",
+ "rep", "edid", "hdmi", "test", "cp", "vdp"
 
 Optional Endpoint Properties:
 
@@ -52,7 +61,12 @@ Example:
 
hdmi_receiver@4c {
compatible = "adi,adv7611";
-   reg = <0x4c>;
+   /*
+* The edid page will be accessible @ 0x66 on the i2c bus. All
+* other maps will retain their default addresses.
+*/
+   reg = <0x4c 0x66>;
+   reg-names "main", "edid";
 
reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>;
hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>;
diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 1544920ec52d..c346b9a8fb57 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -2734,6 +2734,27 @@ static const struct v4l2_ctrl_config 
adv76xx_ctrl_free_run_color = {
 
 /* --- */
 
+struct adv76xx_register {
+   const char *name;
+   u8 default_addr;
+};
+
+static const struct adv76xx_register adv76xx_secondary_names[] = {
+   [ADV76XX_PAGE_IO] = { "main", 0x4c },
+   [ADV7604_PAGE_AVLINK] = { "avlink", 0x42 },
+   [ADV76XX_PAGE_CEC] = { "cec", 0x40 },
+   [ADV76XX_PAGE_INFOFRAME] = { "infoframe", 0x3e },
+   [ADV7604_PAGE_ESDP] = { "esdp", 0x38 },
+   [ADV7604_PAGE_DPP] = { "dpp", 0x3c },
+   [ADV76XX_PAGE_AFE] = { "afe", 0x26 },
+   [ADV76XX_PAGE_REP] = { "rep", 0x32 },
+   [ADV76XX_PAGE_EDID] = { "edid", 0x36 },
+   [ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
+   [ADV76XX_PAGE_TEST] = { "test", 0x30 },
+   [ADV76XX_PAGE_CP] = { "cp", 0x22 },
+   [ADV7604_PAGE_VDP] = { "vdp", 0x24 },
+};
+
 static int adv76xx_core_init(struct v4l2_subdev *sd)
 {
struct adv76xx_state *state = to_state(sd);
@@ -2834,13 +2855,26 @@ static void adv76xx_unregister_clients(struct 
adv76xx_state *state)
 }
 
 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd,
-   u8 addr, u8 io_reg)
+  unsigned int i)
 {
struct i2c_client *client = v4l2_get_subdevdata(sd);
+   struct adv76xx_state *state = to_state(sd);
+   struct adv76xx_platform_data *pdata = &state->pdata;
+   unsigned int io_reg = 0xf2 + i;
+   struct i2c_client *new_client;
+
+   if (pdata && pdata->i2c_addresses[i])
+   new_client = i2c_new_dummy(client->adapter,
+  pdata->i2c_addresses[i]);
+   else
+   new_client = i2c_new_secondary_device(client,
+   adv76xx_secondary_names[i].name,
+   adv76xx_secondary_names[i].default_addr);
 
-   if (addr)
-   io_write(sd, io_reg, addr << 1);
-   return i2c_new_dummy(client->adapt

[PATCH 2/2] drm: adv7511: Add support for i2c_new_secondary_device

[Kieran Bingham]

The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Kieran Bingham 
---
 .../bindings/display/bridge/adi,adv7511.txt| 10 +-
 drivers/gpu/drm/bridge/adv7511/adv7511.h   |  4 +++
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   | 36 ++
 3 files changed, 37 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt 
b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
index 0047b1394c70..f6bb9f6d3f48 100644
--- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
+++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
@@ -70,6 +70,9 @@ Optional properties:
   rather than generate its own timings for HDMI output.
 - clocks: from common clock binding: reference to the CEC clock.
 - clock-names: from common clock binding: must be "cec".
+- reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are : "main", "edid", "cec", "packet"
 
 Required nodes:
 
@@ -88,7 +91,12 @@ Example
 
adv7511w: hdmi@39 {
compatible = "adi,adv7511w";
-   reg = <39>;
+   /*
+* The EDID page will be accessible on address 0x66 on the i2c
+* bus. All other maps continue to use their default addresses.
+*/
+   reg = <0x39 0x66>;
+   reg-names = "main", "edid";
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
clocks = <&cec_clock>;
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h 
b/drivers/gpu/drm/bridge/adv7511/adv7511.h
index d034b2cb5eee..7d81ce3808e0 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
@@ -53,8 +53,10 @@
 #define ADV7511_REG_POWER  0x41
 #define ADV7511_REG_STATUS 0x42
 #define ADV7511_REG_EDID_I2C_ADDR  0x43
+#define ADV7511_REG_EDID_I2C_ADDR_DEFAULT  0x3f
 #define ADV7511_REG_PACKET_ENABLE1 0x44
 #define ADV7511_REG_PACKET_I2C_ADDR0x45
+#define ADV7511_REG_PACKET_I2C_ADDR_DEFAULT0x38
 #define ADV7511_REG_DSD_ENABLE 0x46
 #define ADV7511_REG_VIDEO_INPUT_CFG2   0x48
 #define ADV7511_REG_INFOFRAME_UPDATE   0x4a
@@ -89,6 +91,7 @@
 #define ADV7511_REG_TMDS_CLOCK_INV 0xde
 #define ADV7511_REG_ARC_CTRL   0xdf
 #define ADV7511_REG_CEC_I2C_ADDR   0xe1
+#define ADV7511_REG_CEC_I2C_ADDR_DEFAULT   0x3c
 #define ADV7511_REG_CEC_CTRL   0xe2
 #define ADV7511_REG_CHIP_ID_HIGH   0xf5
 #define ADV7511_REG_CHIP_ID_LOW0xf6
@@ -322,6 +325,7 @@ struct adv7511 {
struct i2c_client *i2c_main;
struct i2c_client *i2c_edid;
struct i2c_client *i2c_cec;
+   struct i2c_client *i2c_packet;
 
struct regmap *regmap;
struct regmap *regmap_cec;
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 
b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index efa29db5fc2b..7ec33837752b 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -969,8 +969,8 @@ static int adv7511_init_cec_regmap(struct adv7511 *adv)
 {
int ret;
 
-   adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
-adv->i2c_main->addr - 1);
+   adv->i2c_cec = i2c_new_secondary_device(adv->i2c_main, "cec",
+   ADV7511_REG_CEC_I2C_ADDR_DEFAULT);
if (!adv->i2c_cec)
return -ENOMEM;
i2c_set_clientdata(adv->i2c_cec, adv);
@@ -1082,8 +1082,6 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
struct adv7511_link_config link_config;
struct adv7511 *adv7511;
struct device *dev = &i2c->dev;
-   unsigned int main_i2c_addr = i2c->addr << 1;
-   unsigned int edid_i2c_addr = main_i2c_addr + 4;
unsigned int val;
int ret;
 
@@ -1153,24 +1151,35 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
if (ret)
goto uninit_regulators;
 
-   regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
-   regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
-main_i2c_addr - 0xa);
-   regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
-main_i2c_addr - 2);
-
adv7511_packet_disable(adv7511, 0x);
 
-   adv7511->i2c_ed

Re: [PATCH 2/2] drm: adv7511: Add support for i2c_new_secondary_device

[Lars-Peter Clausen]

On 01/22/2018 01:50 PM, Kieran Bingham wrote:
> The ADV7511 has four 256-byte maps that can be accessed via the main I²C
> ports. Each map has it own I²C address and acts as a standard slave
> device on the I²C bus.
> 
> Allow a device tree node to override the default addresses so that
> address conflicts with other devices on the same bus may be resolved at
> the board description level.
> 
> Signed-off-by: Kieran Bingham 

I've been working on the same thing, but you've beat me to it! Patch looks
mostly OK, but I think you are missing this piece:

https://github.com/analogdevicesinc/linux/commit/ba9b57507cb78724a606eb24104e22fea942437d#diff-2cf1828c644e351adefabe9509410400L553

> ---
>  .../bindings/display/bridge/adi,adv7511.txt| 10 +-
>  drivers/gpu/drm/bridge/adv7511/adv7511.h   |  4 +++
>  drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   | 36 
> ++
>  3 files changed, 37 insertions(+), 13 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt 
> b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
> index 0047b1394c70..f6bb9f6d3f48 100644
> --- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
> @@ -70,6 +70,9 @@ Optional properties:
>rather than generate its own timings for HDMI output.
>  - clocks: from common clock binding: reference to the CEC clock.
>  - clock-names: from common clock binding: must be "cec".
> +- reg-names : Names of maps with programmable addresses.
> + It can contain any map needing a non-default address.
> + Possible maps names are : "main", "edid", "cec", "packet"
>  
>  Required nodes:
>  
> @@ -88,7 +91,12 @@ Example
>  
>   adv7511w: hdmi@39 {
>   compatible = "adi,adv7511w";
> - reg = <39>;
> + /*
> +  * The EDID page will be accessible on address 0x66 on the i2c
> +  * bus. All other maps continue to use their default addresses.
> +  */
> + reg = <0x39 0x66>;
> + reg-names = "main", "edid";
>   interrupt-parent = <&gpio3>;
>   interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
>   clocks = <&cec_clock>;
> diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h 
> b/drivers/gpu/drm/bridge/adv7511/adv7511.h
> index d034b2cb5eee..7d81ce3808e0 100644
> --- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
> +++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
> @@ -53,8 +53,10 @@
>  #define ADV7511_REG_POWER0x41
>  #define ADV7511_REG_STATUS   0x42
>  #define ADV7511_REG_EDID_I2C_ADDR0x43
> +#define ADV7511_REG_EDID_I2C_ADDR_DEFAULT0x3f
>  #define ADV7511_REG_PACKET_ENABLE1   0x44
>  #define ADV7511_REG_PACKET_I2C_ADDR  0x45
> +#define ADV7511_REG_PACKET_I2C_ADDR_DEFAULT  0x38
>  #define ADV7511_REG_DSD_ENABLE   0x46
>  #define ADV7511_REG_VIDEO_INPUT_CFG2 0x48
>  #define ADV7511_REG_INFOFRAME_UPDATE 0x4a
> @@ -89,6 +91,7 @@
>  #define ADV7511_REG_TMDS_CLOCK_INV   0xde
>  #define ADV7511_REG_ARC_CTRL 0xdf
>  #define ADV7511_REG_CEC_I2C_ADDR 0xe1
> +#define ADV7511_REG_CEC_I2C_ADDR_DEFAULT 0x3c
>  #define ADV7511_REG_CEC_CTRL 0xe2
>  #define ADV7511_REG_CHIP_ID_HIGH 0xf5
>  #define ADV7511_REG_CHIP_ID_LOW  0xf6
> @@ -322,6 +325,7 @@ struct adv7511 {
>   struct i2c_client *i2c_main;
>   struct i2c_client *i2c_edid;
>   struct i2c_client *i2c_cec;
> + struct i2c_client *i2c_packet;
>  
>   struct regmap *regmap;
>   struct regmap *regmap_cec;
> diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 
> b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
> index efa29db5fc2b..7ec33837752b 100644
> --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
> +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
> @@ -969,8 +969,8 @@ static int adv7511_init_cec_regmap(struct adv7511 *adv)
>  {
>   int ret;
>  
> - adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
> -  adv->i2c_main->addr - 1);
> + adv->i2c_cec = i2c_new_secondary_device(adv->i2c_main, "cec",
> + ADV7511_REG_CEC_I2C_ADDR_DEFAULT);
>   if (!adv->i2c_cec)
>   return -ENOMEM;
>   i2c_set_clientdata(adv->i2c_cec, adv);
> @@ -1082,8 +1082,6 @@ static int adv7511_probe(struct i2c_client *i2c, const 
> struct i2c_device_id *id)
>   struct adv7511_link_config link_config;
>   struct adv7511 *adv7511;
>   struct device *dev = &i2c->dev;
> - unsigned int main_i2c_addr = i2c->addr << 1;
> - unsigned int edid_i2c_addr = main_i2c_addr + 4;
>   unsigned int val;
>   int ret;
>  
> @@ -1153,24 +1151,35 @@ static int adv7511_probe(struct i2c_client *i2c, 
> const struct i2c_device_id *id)
>   i

[Bug 104723] [CI] igt@[kms_3d|igt@kms_panel_fitting] - fail - Could not open data file "1080p-left.png": No such file or directoryReceived signal SIGSEGV.

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104723

--- Comment #3 from Petri Latvala  ---
Caused by meson build using an incorrect string for IGT_DATADIR. Patch sent:
https://patchwork.freedesktop.org/series/36896/

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Re: [PATCH v4 08/13] drm/sun4i: Add a driver for the display frontend

[Chen-Yu Tsai]

On Mon, Jan 22, 2018 at 5:25 PM, Maxime Ripard
 wrote:
> The display frontend is an hardware block that can be used to implement
> some more advanced features like hardware scaling or colorspace
> conversions. It can also be used to implement the output format of the VPU.
>
> Let's create a minimal driver for it that will only enable the hardware
> scaling features.
>
> Signed-off-by: Maxime Ripard 

Reviewed-by: Chen-Yu Tsai 
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[Bug 103915] Undertale crashes on startup (compiling shaders?)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103915

--- Comment #6 from Alexander Schlarb  ---
Hi! Just wanted to report that I'm also affected by this issue.

I own an Undertale DRM-free edition from Humble Store and it crashes on
startup. Running `apitrace` also only produces the word "on".

However I found that at least once before it crashed the following message was
printed to the terminal window:

LLVM ERROR: Unknown specifier in datalayout string

This error message seems to originate from line 395 of this file in LLVM:
http://llvm.org/doxygen/DataLayout_8cpp_source.html

I have therefore attached a backtrace of `gdb` with `break
llvm::DataLayout::parseSpecifier` just before the crash (there is also a
pointer to a "shader" mentioned several times in the trace, but it doesn't
appear to be a string and I'm not sure how to extract it unfortunately; if I
can do better please just ask).

Running the game using `LIBGL_ALWAYS_SOFTWARE=1` works without issues and if I
take an `apitrace` of this and replay it there are no crashes, but lots of LLVM
diagnostic warnings. I have attached those as well.

Also if a developer is willing to have a look at this I'm willing to sponsor a
(DRM-free) copy of the game.

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[Bug 103915] Undertale crashes on startup (compiling shaders?)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103915

--- Comment #7 from Alexander Schlarb  ---
Created attachment 136894
  --> https://bugs.freedesktop.org/attachment.cgi?id=136894&action=edit
Backtrace of Undertale / YoYo Game Linux Runner just before crash

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[Bug 103915] Undertale crashes on startup (compiling shaders?)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103915

--- Comment #8 from Alexander Schlarb  ---
Created attachment 136895
  --> https://bugs.freedesktop.org/attachment.cgi?id=136895&action=edit
API trace warnings of game startup

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[Bug 103915] Undertale crashes on startup (compiling shaders?)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103915

--- Comment #9 from Alexander Schlarb  ---
BTW: I should also probably mention my hardware & software:

 * Radeon R9 M280X (BonaireXT)
 * Linux 4.14.0-3-amd64
 * Debian unstable
 * Mesa 17.3.3
 * DRM 3.19.0
 * LLVM 5.0.1 from http://apt.llvm.org/ (also tested with Debian default LLVM)
 * apitrace 7.1+git20170623.d38a69d6+repack-3

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[Bug 104730] VLC crashes on playback with "READ_ONLY without WC is disallowed"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=104730

Bug ID: 104730
   Summary: VLC crashes on playback with "READ_ONLY without WC is
disallowed"
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel@lists.freedesktop.org
  Reporter: e...@xmw.de
QA Contact: dri-devel@lists.freedesktop.org
CC: mar...@gmail.com

Created attachment 136896
  --> https://bugs.freedesktop.org/attachment.cgi?id=136896&action=edit
VLC gdb bt

In current git master, vlc crashes on any playback with the above assertion.
This is not happening on the same system with Mesa 17.3.3.

I assume the new assertion comes from the following patch:
https://patchwork.freedesktop.org/patch/191502/
https://cgit.freedesktop.org/mesa/mesa/commit/?id=c7f84f6513f9cc9502b9cf3bdca9b95a6b87c98b

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Re: [PATCH v4 00/13] drm/sun4i: Support the Display Engine frontend

[Maxime Ripard]

On Mon, Jan 22, 2018 at 10:25:14AM +0100, Maxime Ripard wrote:
> Hi,
> 
> This is a first serie to enable the display engine frontend.
> 
> This hardware block is found in the first generation Display Engine from
> Allwinner. Its role is to implement more advanced features that the
> associated backend, even though the backend alone can be used (and was used
> so far) for basic composition.
> 
> Among those features, we will find hardware scaling, that is supported in
> this serie, colorspace conversions, or more exotic formats support such as
> the one output by the VPU.

Applied the DRM patches to drm-misc-next, and queued the dt patch for 4.17.

Maxime

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Re: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example

[Rob Herring]

On Sun, Jan 21, 2018 at 2:58 PM, Philippe Cornu  wrote:
> In the dsi panel example, clock names in the "clock-names"
> field have been swapped:
> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4
>
> Signed-off-by: Philippe Cornu 
> ---
>  Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 
> b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
> index 029252253ad4..3eb1b48b47dd 100644
> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
> @@ -98,7 +98,7 @@ Example 2: DSI panel
> compatible = "st,stm32-dsi";
> reg = <0x40016c00 0x800>;
> clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
> -   clock-names = "ref", "pclk";
> +   clock-names = "pclk", "ref";

There is no way to tell they are reversed because pclk is not even
documented. Please fix that too.

> resets = <&rcc STM32F4_APB2_RESET(DSI)>;
> reset-names = "apb";
>
> --
> 2.15.1
>
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Re: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example

[Philippe CORNU]

Hi Rob,

On 01/22/2018 03:30 PM, Rob Herring wrote:
> On Sun, Jan 21, 2018 at 2:58 PM, Philippe Cornu  wrote:
>> In the dsi panel example, clock names in the "clock-names"
>> field have been swapped:
>> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
>> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4
>>
>> Signed-off-by: Philippe Cornu 
>> ---
>>   Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 
>> b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> index 029252253ad4..3eb1b48b47dd 100644
>> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> @@ -98,7 +98,7 @@ Example 2: DSI panel
>>  compatible = "st,stm32-dsi";
>>  reg = <0x40016c00 0x800>;
>>  clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
>> -   clock-names = "ref", "pclk";
>> +   clock-names = "pclk", "ref";
> 
> There is no way to tell they are reversed because pclk is not even
> documented. Please fix that too.
> 

Many thanks for your review.

pclk is already described in the generic part 
(Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt).

In st,stm32-ltdc.txt (specific part), I have documented: "For all 
mandatory properties & nodes, please refer to the related documentation 
in [5]".

Do you think it is clear enough?

Many thanks,
Philippe :-)

>>  resets = <&rcc STM32F4_APB2_RESET(DSI)>;
>>  reset-names = "apb";
>>
>> --
>> 2.15.1
>>
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[PATCH v18 00/10] Add backlight helper functions

[Meghana Madhyastha]

Move drm helper functions from tinydrm-helpers to linux/backlight for
ease of use by callers in other drivers.

Changes in v18: 
-Fixed warnings resulting from passing device_node* to of_find_backlight.
 Fixed it by passing struct device* to of_find_backlight

Meghana Madhyastha (10):
  video: backlight: Add helpers to enable and disable backlight
  drm/tinydrm: Convert tinydrm_enable/disable_backlight to
backlight_enable/disable
  video: backlight: Add of_find_backlight helper in backlight.c
  drm/tinydrm: Replace tinydrm_of_find_backlight with of_find_backlight
  video: backlight: Add devres versions of of_find_backlight
  drm/tinydrm: Call devres version of of_find_backlight
  drm/panel: Use backlight_enable/disable helpers
  drm/omapdrm: Use backlight_enable/disable helpers
  drm/panel: Use of_find_backlight helper
  drm/omapdrm: Use of_find_backlight helper

 drivers/gpu/drm/omapdrm/displays/panel-dpi.c| 44 
 drivers/gpu/drm/panel/panel-innolux-p079zca.c   | 30 ++--
 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c  |  6 +-
 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 38 ++
 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 37 ++
 drivers/gpu/drm/tinydrm/Kconfig |  2 -
 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c  | 95 -
 drivers/gpu/drm/tinydrm/mi0283qt.c  |  3 +-
 drivers/gpu/drm/tinydrm/mipi-dbi.c  |  4 +-
 drivers/gpu/drm/tinydrm/st7735r.c   |  3 +-
 drivers/video/backlight/backlight.c | 73 +++
 include/drm/tinydrm/tinydrm-helpers.h   |  4 --
 include/linux/backlight.h   | 58 +++
 13 files changed, 171 insertions(+), 226 deletions(-)

-- 
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[PATCH v18 01/10] video: backlight: Add helpers to enable and disable backlight

[Meghana Madhyastha]

Add helper functions backlight_enable and backlight_disable to
enable/disable a backlight device. These helper functions can
then be used by different drm and tinydrm drivers to avoid
repetition of code and also to enforce a uniform and consistent
way to enable/disable a backlight device.

Signed-off-by: Meghana Madhyastha 
---
Acked-by: Daniel Thompson 
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 include/linux/backlight.h | 32 
 1 file changed, 32 insertions(+)

diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index af7003548..ace825e2c 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -130,6 +130,38 @@ static inline int backlight_update_status(struct 
backlight_device *bd)
return ret;
 }
 
+/**
+ * backlight_enable - Enable backlight
+ * @bd: the backlight device to enable
+ */
+static inline int backlight_enable(struct backlight_device *bd)
+{
+   if (!bd)
+   return 0;
+
+   bd->props.power = FB_BLANK_UNBLANK;
+   bd->props.fb_blank = FB_BLANK_UNBLANK;
+   bd->props.state &= ~BL_CORE_FBBLANK;
+
+   return backlight_update_status(bd);
+}
+
+/**
+ * backlight_disable - Disable backlight
+ * @bd: the backlight device to disable
+ */
+static inline int backlight_disable(struct backlight_device *bd)
+{
+   if (!bd)
+   return 0;
+
+   bd->props.power = FB_BLANK_POWERDOWN;
+   bd->props.fb_blank = FB_BLANK_POWERDOWN;
+   bd->props.state |= BL_CORE_FBBLANK;
+
+   return backlight_update_status(bd);
+}
+
 extern struct backlight_device *backlight_device_register(const char *name,
struct device *dev, void *devdata, const struct backlight_ops *ops,
const struct backlight_properties *props);
-- 
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[PATCH v18 02/10] drm/tinydrm: Convert tinydrm_enable/disable_backlight to backlight_enable/disable

[Meghana Madhyastha]

Remove tinydrm_enable/disable_backlight and let the callers call the
more generic backlight_enable/disable helpers

Signed-off-by: Meghana Madhyastha 
---
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 55 --
 drivers/gpu/drm/tinydrm/mipi-dbi.c |  4 +-
 include/drm/tinydrm/tinydrm-helpers.h  |  2 -
 3 files changed, 2 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c 
b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
index bf96072d1..7326e1758 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
@@ -276,61 +276,6 @@ struct backlight_device *tinydrm_of_find_backlight(struct 
device *dev)
 }
 EXPORT_SYMBOL(tinydrm_of_find_backlight);
 
-/**
- * tinydrm_enable_backlight - Enable backlight helper
- * @backlight: Backlight device
- *
- * Returns:
- * Zero on success, negative error code on failure.
- */
-int tinydrm_enable_backlight(struct backlight_device *backlight)
-{
-   unsigned int old_state;
-   int ret;
-
-   if (!backlight)
-   return 0;
-
-   old_state = backlight->props.state;
-   backlight->props.state &= ~BL_CORE_FBBLANK;
-   DRM_DEBUG_KMS("Backlight state: 0x%x -> 0x%x\n", old_state,
- backlight->props.state);
-
-   ret = backlight_update_status(backlight);
-   if (ret)
-   DRM_ERROR("Failed to enable backlight %d\n", ret);
-
-   return ret;
-}
-EXPORT_SYMBOL(tinydrm_enable_backlight);
-
-/**
- * tinydrm_disable_backlight - Disable backlight helper
- * @backlight: Backlight device
- *
- * Returns:
- * Zero on success, negative error code on failure.
- */
-int tinydrm_disable_backlight(struct backlight_device *backlight)
-{
-   unsigned int old_state;
-   int ret;
-
-   if (!backlight)
-   return 0;
-
-   old_state = backlight->props.state;
-   backlight->props.state |= BL_CORE_FBBLANK;
-   DRM_DEBUG_KMS("Backlight state: 0x%x -> 0x%x\n", old_state,
- backlight->props.state);
-   ret = backlight_update_status(backlight);
-   if (ret)
-   DRM_ERROR("Failed to disable backlight %d\n", ret);
-
-   return ret;
-}
-EXPORT_SYMBOL(tinydrm_disable_backlight);
-
 #if IS_ENABLED(CONFIG_SPI)
 
 /**
diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c 
b/drivers/gpu/drm/tinydrm/mipi-dbi.c
index 75dd65c57..9e903812b 100644
--- a/drivers/gpu/drm/tinydrm/mipi-dbi.c
+++ b/drivers/gpu/drm/tinydrm/mipi-dbi.c
@@ -286,7 +286,7 @@ void mipi_dbi_enable_flush(struct mipi_dbi *mipi)
if (fb)
fb->funcs->dirty(fb, NULL, 0, 0, NULL, 0);
 
-   tinydrm_enable_backlight(mipi->backlight);
+   backlight_enable(mipi->backlight);
 }
 EXPORT_SYMBOL(mipi_dbi_enable_flush);
 
@@ -325,7 +325,7 @@ void mipi_dbi_pipe_disable(struct drm_simple_display_pipe 
*pipe)
mipi->enabled = false;
 
if (mipi->backlight)
-   tinydrm_disable_backlight(mipi->backlight);
+   backlight_disable(mipi->backlight);
else
mipi_dbi_blank(mipi);
 
diff --git a/include/drm/tinydrm/tinydrm-helpers.h 
b/include/drm/tinydrm/tinydrm-helpers.h
index d554ded60..f54fae03e 100644
--- a/include/drm/tinydrm/tinydrm-helpers.h
+++ b/include/drm/tinydrm/tinydrm-helpers.h
@@ -47,8 +47,6 @@ void tinydrm_xrgb_to_gray8(u8 *dst, void *vaddr, struct 
drm_framebuffer *fb,
   struct drm_clip_rect *clip);
 
 struct backlight_device *tinydrm_of_find_backlight(struct device *dev);
-int tinydrm_enable_backlight(struct backlight_device *backlight);
-int tinydrm_disable_backlight(struct backlight_device *backlight);
 
 size_t tinydrm_spi_max_transfer_size(struct spi_device *spi, size_t max_len);
 bool tinydrm_spi_bpw_supported(struct spi_device *spi, u8 bpw);
-- 
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[PATCH v18 03/10] video: backlight: Add of_find_backlight helper in backlight.c

[Meghana Madhyastha]

Add of_find_backlight, a helper function which is a generic version
of tinydrm_of_find_backlight that can be used by other drivers to avoid
repetition of code and simplify things.

Signed-off-by: Meghana Madhyastha 
---
Acked-by: Daniel Thompson 
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 drivers/video/backlight/backlight.c | 43 +
 include/linux/backlight.h   | 19 
 2 files changed, 62 insertions(+)

diff --git a/drivers/video/backlight/backlight.c 
b/drivers/video/backlight/backlight.c
index 8049e7656..553bf5c48 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -580,6 +580,49 @@ struct backlight_device *of_find_backlight_by_node(struct 
device_node *node)
 EXPORT_SYMBOL(of_find_backlight_by_node);
 #endif
 
+/**
+ * of_find_backlight - Get backlight device
+ * @dev: Device
+ *
+ * This function looks for a property named 'backlight' on the DT node
+ * connected to @dev and looks up the backlight device.
+ *
+ * Call backlight_put() to drop the reference on the backlight device.
+ *
+ * Returns:
+ * A pointer to the backlight device if found.
+ * Error pointer -EPROBE_DEFER if the DT property is set, but no backlight
+ * device is found.
+ * NULL if there's no backlight property.
+ */
+struct backlight_device *of_find_backlight(struct device *dev)
+{
+   struct backlight_device *bd = NULL;
+   struct device_node *np;
+
+   if (!dev)
+   return NULL;
+
+   if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
+   np = of_parse_phandle(dev->of_node, "backlight", 0);
+   if (np) {
+   bd = of_find_backlight_by_node(np);
+   of_node_put(np);
+   if (!bd)
+   return ERR_PTR(-EPROBE_DEFER);
+   /*
+* Note: gpio_backlight uses brightness as
+* power state during probe
+*/
+   if (!bd->props.brightness)
+   bd->props.brightness = bd->props.max_brightness;
+   }
+   }
+
+   return bd;
+}
+EXPORT_SYMBOL(of_find_backlight);
+
 static void __exit backlight_class_exit(void)
 {
class_destroy(backlight_class);
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index ace825e2c..ddc9bade4 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -162,6 +162,16 @@ static inline int backlight_disable(struct 
backlight_device *bd)
return backlight_update_status(bd);
 }
 
+/**
+ * backlight_put - Drop backlight reference
+ * @bd: the backlight device to put
+ */
+static inline void backlight_put(struct backlight_device *bd)
+{
+   if (bd)
+   put_device(&bd->dev);
+}
+
 extern struct backlight_device *backlight_device_register(const char *name,
struct device *dev, void *devdata, const struct backlight_ops *ops,
const struct backlight_properties *props);
@@ -205,4 +215,13 @@ of_find_backlight_by_node(struct device_node *node)
 }
 #endif
 
+#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
+struct backlight_device *of_find_backlight(struct device *dev);
+#else
+static inline struct backlight_device *of_find_backlight(struct device *dev)
+{
+   return NULL;
+}
+#endif
+
 #endif
-- 
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[PATCH v18 04/10] drm/tinydrm: Replace tinydrm_of_find_backlight with of_find_backlight

[Meghana Madhyastha]

Remove tinydrm_of_find_backlight from tinydrm-helpers.c. We now have
a generic of_find_backlight defined in backlight.c. Let the callers
of tinydrm_of_find_backlight call of_find_backlight. Also, remove
select BACKLIGHT_LCD_SUPPORT and select BACKLIGHT_CLASS_DEVICE from
tinydrm/Kconfig as it is a hack that is no longer needed.

Signed-off-by: Meghana Madhyastha 
---
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 drivers/gpu/drm/tinydrm/Kconfig|  2 --
 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 40 --
 drivers/gpu/drm/tinydrm/mi0283qt.c |  3 +-
 drivers/gpu/drm/tinydrm/st7735r.c  |  3 +-
 include/drm/tinydrm/tinydrm-helpers.h  |  2 --
 5 files changed, 4 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/tinydrm/Kconfig b/drivers/gpu/drm/tinydrm/Kconfig
index b0e567d41..13339be84 100644
--- a/drivers/gpu/drm/tinydrm/Kconfig
+++ b/drivers/gpu/drm/tinydrm/Kconfig
@@ -3,8 +3,6 @@ menuconfig DRM_TINYDRM
depends on DRM
select DRM_KMS_HELPER
select DRM_KMS_CMA_HELPER
-   select BACKLIGHT_LCD_SUPPORT
-   select BACKLIGHT_CLASS_DEVICE
help
  Choose this option if you have a tinydrm supported display.
  If M is selected the module will be called tinydrm.
diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c 
b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
index 7326e1758..d1c3ce9ab 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
@@ -236,46 +236,6 @@ void tinydrm_xrgb_to_gray8(u8 *dst, void *vaddr, 
struct drm_framebuffer *fb,
 }
 EXPORT_SYMBOL(tinydrm_xrgb_to_gray8);
 
-/**
- * tinydrm_of_find_backlight - Find backlight device in device-tree
- * @dev: Device
- *
- * This function looks for a DT node pointed to by a property named 'backlight'
- * and uses of_find_backlight_by_node() to get the backlight device.
- * Additionally if the brightness property is zero, it is set to
- * max_brightness.
- *
- * Returns:
- * NULL if there's no backlight property.
- * Error pointer -EPROBE_DEFER if the DT node is found, but no backlight device
- * is found.
- * If the backlight device is found, a pointer to the structure is returned.
- */
-struct backlight_device *tinydrm_of_find_backlight(struct device *dev)
-{
-   struct backlight_device *backlight;
-   struct device_node *np;
-
-   np = of_parse_phandle(dev->of_node, "backlight", 0);
-   if (!np)
-   return NULL;
-
-   backlight = of_find_backlight_by_node(np);
-   of_node_put(np);
-
-   if (!backlight)
-   return ERR_PTR(-EPROBE_DEFER);
-
-   if (!backlight->props.brightness) {
-   backlight->props.brightness = backlight->props.max_brightness;
-   DRM_DEBUG_KMS("Backlight brightness set to %d\n",
- backlight->props.brightness);
-   }
-
-   return backlight;
-}
-EXPORT_SYMBOL(tinydrm_of_find_backlight);
-
 #if IS_ENABLED(CONFIG_SPI)
 
 /**
diff --git a/drivers/gpu/drm/tinydrm/mi0283qt.c 
b/drivers/gpu/drm/tinydrm/mi0283qt.c
index 79cb5af5a..a8aafce36 100644
--- a/drivers/gpu/drm/tinydrm/mi0283qt.c
+++ b/drivers/gpu/drm/tinydrm/mi0283qt.c
@@ -9,6 +9,7 @@
  * (at your option) any later version.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -195,7 +196,7 @@ static int mi0283qt_probe(struct spi_device *spi)
if (IS_ERR(mipi->regulator))
return PTR_ERR(mipi->regulator);
 
-   mipi->backlight = tinydrm_of_find_backlight(dev);
+   mipi->backlight = of_find_backlight(dev);
if (IS_ERR(mipi->backlight))
return PTR_ERR(mipi->backlight);
 
diff --git a/drivers/gpu/drm/tinydrm/st7735r.c 
b/drivers/gpu/drm/tinydrm/st7735r.c
index 08b4fb18e..2e6b7b8ec 100644
--- a/drivers/gpu/drm/tinydrm/st7735r.c
+++ b/drivers/gpu/drm/tinydrm/st7735r.c
@@ -5,6 +5,7 @@
  * Copyright 2017 David Lechner 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -163,7 +164,7 @@ static int st7735r_probe(struct spi_device *spi)
return PTR_ERR(dc);
}
 
-   mipi->backlight = tinydrm_of_find_backlight(dev);
+   mipi->backlight = of_find_backlight(dev);
if (IS_ERR(mipi->backlight))
return PTR_ERR(mipi->backlight);
 
diff --git a/include/drm/tinydrm/tinydrm-helpers.h 
b/include/drm/tinydrm/tinydrm-helpers.h
index f54fae03e..0a4ddbc04 100644
--- a/include/drm/tinydrm/tinydrm-helpers.h
+++ b/include/drm/tinydrm/tinydrm-helpers.h
@@ -46,8 +46,6 @@ void tinydrm_xrgb_to_rgb565(u16 *dst, void *vaddr,
 void tinydrm_xrgb_to_gray8(u8 *dst, void *vaddr, struct drm_framebuffer 
*fb,
   struct drm_clip_rect *clip);
 
-struct backlight_device *tinydrm_of_find_backlight(struct device *dev);
-
 size_t tinydrm_spi_max_transfer_size(struct spi_device *spi, size_t max_len);
 bool tinydrm_spi_bpw_supported(struct spi_device *spi, u8 bpw);
 int t

[PATCH v18 05/10] video: backlight: Add devres versions of of_find_backlight

[Meghana Madhyastha]

Add devm_of_find_backlight and the corresponding release
function because some drivers use devres versions of functions
for acquiring device resources.

Signed-off-by: Meghana Madhyastha 
---
Acked-by: Daniel Thompson 
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 drivers/video/backlight/backlight.c | 30 ++
 include/linux/backlight.h   |  7 +++
 2 files changed, 37 insertions(+)

diff --git a/drivers/video/backlight/backlight.c 
b/drivers/video/backlight/backlight.c
index 553bf5c48..deb824bef 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -623,6 +623,36 @@ struct backlight_device *of_find_backlight(struct device 
*dev)
 }
 EXPORT_SYMBOL(of_find_backlight);
 
+static void devm_backlight_release(void *data)
+{
+   backlight_put(data);
+}
+
+/**
+ * devm_of_find_backlight - Resource-managed of_find_backlight()
+ * @dev: Device
+ *
+ * Device managed version of of_find_backlight().
+ * The reference on the backlight device is automatically
+ * dropped on driver detach.
+ */
+struct backlight_device *devm_of_find_backlight(struct device *dev)
+{
+   struct backlight_device *bd;
+   int ret;
+
+   bd = of_find_backlight(dev);
+   if (IS_ERR_OR_NULL(bd))
+   return bd;
+   ret = devm_add_action(dev, devm_backlight_release, bd);
+   if (ret) {
+   backlight_put(bd);
+   return ERR_PTR(ret);
+   }
+   return bd;
+}
+EXPORT_SYMBOL(devm_of_find_backlight);
+
 static void __exit backlight_class_exit(void)
 {
class_destroy(backlight_class);
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index ddc9bade4..2baab6f38 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -217,11 +217,18 @@ of_find_backlight_by_node(struct device_node *node)
 
 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
 struct backlight_device *of_find_backlight(struct device *dev);
+struct backlight_device *devm_of_find_backlight(struct device *dev);
 #else
 static inline struct backlight_device *of_find_backlight(struct device *dev)
 {
return NULL;
 }
+
+static inline struct backlight_device *
+devm_of_find_backlight(struct device *dev)
+{
+   return NULL;
+}
 #endif
 
 #endif
-- 
2.11.0

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[PATCH v18 06/10] drm/tinydrm: Call devres version of of_find_backlight

[Meghana Madhyastha]

Call devm_of_find_backlight (the devres version) instead of
of_find_backlight.

Signed-off-by: Meghana Madhyastha 
---
Reviewed-by: Noralf Trønnes 
Reviewed-by: Sean Paul

 drivers/gpu/drm/tinydrm/mi0283qt.c | 2 +-
 drivers/gpu/drm/tinydrm/st7735r.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/tinydrm/mi0283qt.c 
b/drivers/gpu/drm/tinydrm/mi0283qt.c
index a8aafce36..d8ed6e6f8 100644
--- a/drivers/gpu/drm/tinydrm/mi0283qt.c
+++ b/drivers/gpu/drm/tinydrm/mi0283qt.c
@@ -196,7 +196,7 @@ static int mi0283qt_probe(struct spi_device *spi)
if (IS_ERR(mipi->regulator))
return PTR_ERR(mipi->regulator);
 
-   mipi->backlight = of_find_backlight(dev);
+   mipi->backlight = devm_of_find_backlight(dev);
if (IS_ERR(mipi->backlight))
return PTR_ERR(mipi->backlight);
 
diff --git a/drivers/gpu/drm/tinydrm/st7735r.c 
b/drivers/gpu/drm/tinydrm/st7735r.c
index 2e6b7b8ec..67d197ecf 100644
--- a/drivers/gpu/drm/tinydrm/st7735r.c
+++ b/drivers/gpu/drm/tinydrm/st7735r.c
@@ -164,7 +164,7 @@ static int st7735r_probe(struct spi_device *spi)
return PTR_ERR(dc);
}
 
-   mipi->backlight = of_find_backlight(dev);
+   mipi->backlight = devm_of_find_backlight(dev);
if (IS_ERR(mipi->backlight))
return PTR_ERR(mipi->backlight);
 
-- 
2.11.0

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[PATCH v18 08/10] drm/omapdrm: Use backlight_enable/disable helpers

[Meghana Madhyastha]

Use backlight_enable/disable helpers instead of changing
the property and calling backlight_update_status for cleaner
and simpler code and also to avoid repetitions.

Signed-off-by: Meghana Madhyastha 
---
 drivers/gpu/drm/omapdrm/displays/panel-dpi.c | 11 ++-
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
index e065f7e10..ac9596251 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
@@ -87,11 +87,7 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
}
 
gpiod_set_value_cansleep(ddata->enable_gpio, 1);
-
-   if (ddata->backlight) {
-   ddata->backlight->props.power = FB_BLANK_UNBLANK;
-   backlight_update_status(ddata->backlight);
-   }
+   backlight_enable(ddata->backlight);
 
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
 
@@ -106,10 +102,7 @@ static void panel_dpi_disable(struct omap_dss_device 
*dssdev)
if (!omapdss_device_is_enabled(dssdev))
return;
 
-   if (ddata->backlight) {
-   ddata->backlight->props.power = FB_BLANK_POWERDOWN;
-   backlight_update_status(ddata->backlight);
-   }
+   backlight_disable(ddata->backlight);
 
gpiod_set_value_cansleep(ddata->enable_gpio, 0);
regulator_disable(ddata->vcc_supply);
-- 
2.11.0

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[PATCH v18 07/10] drm/panel: Use backlight_enable/disable helpers

[Meghana Madhyastha]

Use backlight_enable/disable helpers instead of changing
the property and calling backlight_update_status for cleaner
and simpler code and also to avoid repetitions.

Signed-off-by: Meghana Madhyastha 
---
 drivers/gpu/drm/panel/panel-innolux-p079zca.c   |  6 ++
 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c  |  6 ++
 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 10 ++
 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 10 ++
 4 files changed, 8 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c 
b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
index 6ba93449f..4c1b29eec 100644
--- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c
+++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
@@ -45,8 +45,7 @@ static int innolux_panel_disable(struct drm_panel *panel)
if (!innolux->enabled)
return 0;
 
-   innolux->backlight->props.power = FB_BLANK_POWERDOWN;
-   backlight_update_status(innolux->backlight);
+   backlight_disable(innolux->backlight);
 
err = mipi_dsi_dcs_set_display_off(innolux->link);
if (err < 0)
@@ -151,8 +150,7 @@ static int innolux_panel_enable(struct drm_panel *panel)
if (innolux->enabled)
return 0;
 
-   innolux->backlight->props.power = FB_BLANK_UNBLANK;
-   ret = backlight_update_status(innolux->backlight);
+   ret = backlight_enable(innolux->backlight);
if (ret) {
DRM_DEV_ERROR(panel->drm->dev,
  "Failed to enable backlight %d\n", ret);
diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c 
b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
index 5b2340ef7..0a94ab79a 100644
--- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
+++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c
@@ -192,8 +192,7 @@ static int jdi_panel_disable(struct drm_panel *panel)
if (!jdi->enabled)
return 0;
 
-   jdi->backlight->props.power = FB_BLANK_POWERDOWN;
-   backlight_update_status(jdi->backlight);
+   backlight_disable(jdi->backlight);
 
jdi->enabled = false;
 
@@ -289,8 +288,7 @@ static int jdi_panel_enable(struct drm_panel *panel)
if (jdi->enabled)
return 0;
 
-   jdi->backlight->props.power = FB_BLANK_UNBLANK;
-   backlight_update_status(jdi->backlight);
+   backlight_enable(jdi->backlight);
 
jdi->enabled = true;
 
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c 
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
index 3cce3ca19..072c0fc79 100644
--- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
+++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
@@ -96,10 +96,7 @@ static int sharp_panel_disable(struct drm_panel *panel)
if (!sharp->enabled)
return 0;
 
-   if (sharp->backlight) {
-   sharp->backlight->props.power = FB_BLANK_POWERDOWN;
-   backlight_update_status(sharp->backlight);
-   }
+   backlight_disable(sharp->backlight);
 
sharp->enabled = false;
 
@@ -263,10 +260,7 @@ static int sharp_panel_enable(struct drm_panel *panel)
if (sharp->enabled)
return 0;
 
-   if (sharp->backlight) {
-   sharp->backlight->props.power = FB_BLANK_UNBLANK;
-   backlight_update_status(sharp->backlight);
-   }
+   backlight_enable(sharp->backlight);
 
sharp->enabled = true;
 
diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c 
b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
index 3aeb0bda4..8a5137963 100644
--- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
+++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
@@ -117,10 +117,7 @@ static int sharp_nt_panel_disable(struct drm_panel *panel)
if (!sharp_nt->enabled)
return 0;
 
-   if (sharp_nt->backlight) {
-   sharp_nt->backlight->props.power = FB_BLANK_POWERDOWN;
-   backlight_update_status(sharp_nt->backlight);
-   }
+   backlight_disable(sharp_nt->backlight);
 
sharp_nt->enabled = false;
 
@@ -203,10 +200,7 @@ static int sharp_nt_panel_enable(struct drm_panel *panel)
if (sharp_nt->enabled)
return 0;
 
-   if (sharp_nt->backlight) {
-   sharp_nt->backlight->props.power = FB_BLANK_UNBLANK;
-   backlight_update_status(sharp_nt->backlight);
-   }
+   backlight_enable(sharp_nt->backlight);
 
sharp_nt->enabled = true;
 
-- 
2.11.0

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[PATCH v18 09/10] drm/panel: Use of_find_backlight helper

[Meghana Madhyastha]

Replace of_find_backlight_by_node and of the code around it
with of_find_backlight helper to avoid repetition of code.

Signed-off-by: Meghana Madhyastha 
---
Changes in v18: 
-Fixed warnings resulting from passing device_node* to of_find_backlight.
 Fixed it by passing struct device* to of_find_backlight

 drivers/gpu/drm/panel/panel-innolux-p079zca.c   | 24 -
 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c | 28 +
 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 27 
 3 files changed, 13 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c 
b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
index 4c1b29eec..57df39b5c 100644
--- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c
+++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c
@@ -215,7 +215,6 @@ MODULE_DEVICE_TABLE(of, innolux_of_match);
 static int innolux_panel_add(struct innolux_panel *innolux)
 {
struct device *dev = &innolux->link->dev;
-   struct device_node *np;
int err;
 
innolux->supply = devm_regulator_get(dev, "power");
@@ -230,37 +229,22 @@ static int innolux_panel_add(struct innolux_panel 
*innolux)
innolux->enable_gpio = NULL;
}
 
-   np = of_parse_phandle(dev->of_node, "backlight", 0);
-   if (np) {
-   innolux->backlight = of_find_backlight_by_node(np);
-   of_node_put(np);
+   innolux->backlight = devm_of_find_backlight(dev);
 
-   if (!innolux->backlight)
-   return -EPROBE_DEFER;
-   }
+   if (IS_ERR(innolux->backlight))
+   return PTR_ERR(innolux->backlight);
 
drm_panel_init(&innolux->base);
innolux->base.funcs = &innolux_panel_funcs;
innolux->base.dev = &innolux->link->dev;
 
-   err = drm_panel_add(&innolux->base);
-   if (err < 0)
-   goto put_backlight;
-
-   return 0;
-
-put_backlight:
-   put_device(&innolux->backlight->dev);
-
-   return err;
+   return drm_panel_add(&innolux->base);
 }
 
 static void innolux_panel_del(struct innolux_panel *innolux)
 {
if (innolux->base.dev)
drm_panel_remove(&innolux->base);
-
-   put_device(&innolux->backlight->dev);
 }
 
 static int innolux_panel_probe(struct mipi_dsi_device *dsi)
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c 
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
index 072c0fc79..6bf8730f1 100644
--- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
+++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
@@ -318,8 +318,7 @@ MODULE_DEVICE_TABLE(of, sharp_of_match);
 
 static int sharp_panel_add(struct sharp_panel *sharp)
 {
-   struct device_node *np;
-   int err;
+   struct device *dev = &sharp->link1->dev;
 
sharp->mode = &default_mode;
 
@@ -327,30 +326,16 @@ static int sharp_panel_add(struct sharp_panel *sharp)
if (IS_ERR(sharp->supply))
return PTR_ERR(sharp->supply);
 
-   np = of_parse_phandle(sharp->link1->dev.of_node, "backlight", 0);
-   if (np) {
-   sharp->backlight = of_find_backlight_by_node(np);
-   of_node_put(np);
+   sharp->backlight = devm_of_find_backlight(dev);
 
-   if (!sharp->backlight)
-   return -EPROBE_DEFER;
-   }
+   if (IS_ERR(sharp->backlight))
+   return PTR_ERR(sharp->backlight);
 
drm_panel_init(&sharp->base);
sharp->base.funcs = &sharp_panel_funcs;
sharp->base.dev = &sharp->link1->dev;
 
-   err = drm_panel_add(&sharp->base);
-   if (err < 0)
-   goto put_backlight;
-
-   return 0;
-
-put_backlight:
-   if (sharp->backlight)
-   put_device(&sharp->backlight->dev);
-
-   return err;
+   return drm_panel_add(&sharp->base);
 }
 
 static void sharp_panel_del(struct sharp_panel *sharp)
@@ -358,9 +343,6 @@ static void sharp_panel_del(struct sharp_panel *sharp)
if (sharp->base.dev)
drm_panel_remove(&sharp->base);
 
-   if (sharp->backlight)
-   put_device(&sharp->backlight->dev);
-
if (sharp->link2)
put_device(&sharp->link2->dev);
 }
diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c 
b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
index 8a5137963..494aa9b16 100644
--- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
+++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
@@ -253,8 +253,6 @@ static const struct drm_panel_funcs sharp_nt_panel_funcs = {
 static int sharp_nt_panel_add(struct sharp_nt_panel *sharp_nt)
 {
struct device *dev = &sharp_nt->dsi->dev;
-   struct device_node *np;
-   int ret;
 
sharp_nt->mode = &default_mode;
 
@@ -271,39 +269,22 @@ static int sharp_nt_panel_add(struct sharp_nt_panel 
*sharp_nt)
gpiod_set_value(sharp_nt->reset_gpio, 0);
}
 
-   np = of_parse_phandle(d

Re: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example

[Rob Herring]

On Mon, Jan 22, 2018 at 8:39 AM, Philippe CORNU  wrote:
> Hi Rob,
>
> On 01/22/2018 03:30 PM, Rob Herring wrote:
>> On Sun, Jan 21, 2018 at 2:58 PM, Philippe Cornu  
>> wrote:
>>> In the dsi panel example, clock names in the "clock-names"
>>> field have been swapped:
>>> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
>>> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4
>>>
>>> Signed-off-by: Philippe Cornu 
>>> ---
>>>   Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 
>>> b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> index 029252253ad4..3eb1b48b47dd 100644
>>> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> @@ -98,7 +98,7 @@ Example 2: DSI panel
>>>  compatible = "st,stm32-dsi";
>>>  reg = <0x40016c00 0x800>;
>>>  clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
>>> -   clock-names = "ref", "pclk";
>>> +   clock-names = "pclk", "ref";
>>
>> There is no way to tell they are reversed because pclk is not even
>> documented. Please fix that too.
>>
>
> Many thanks for your review.
>
> pclk is already described in the generic part
> (Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt).

Ah, okay.

>
> In st,stm32-ltdc.txt (specific part), I have documented: "For all
> mandatory properties & nodes, please refer to the related documentation
> in [5]".
>
> Do you think it is clear enough?

Yes.

Please resend both patches and I'll apply.

Rob
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[PATCH v18 10/10] drm/omapdrm: Use of_find_backlight helper

[Meghana Madhyastha]

Replace of_find_backlight_by_node and of the code around it
with of_find_backlight helper to avoid repetition of code.

Signed-off-by: Meghana Madhyastha 
---
Changes in v18: 
-Fixed warnings resulting from passing device_node* to of_find_backlight.
 Fixed it by passing struct device* to of_find_backlight

 drivers/gpu/drm/omapdrm/displays/panel-dpi.c | 33 ++--
 1 file changed, 11 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c 
b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
index ac9596251..93b7a176d 100644
--- a/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dpi.c
@@ -156,14 +156,14 @@ static struct omap_dss_driver panel_dpi_ops = {
 static int panel_dpi_probe_of(struct platform_device *pdev)
 {
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
+   struct device *dev = &pdev->dev;
struct device_node *node = pdev->dev.of_node;
-   struct device_node *bl_node;
struct omap_dss_device *in;
int r;
struct display_timing timing;
struct gpio_desc *gpio;
 
-   gpio = devm_gpiod_get_optional(&pdev->dev, "enable", GPIOD_OUT_LOW);
+   gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW);
if (IS_ERR(gpio))
return PTR_ERR(gpio);
 
@@ -175,47 +175,36 @@ static int panel_dpi_probe_of(struct platform_device 
*pdev)
 * timing and order relative to the enable gpio. So for now it's just
 * ensured that the reset line isn't active.
 */
-   gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
+   gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(gpio))
return PTR_ERR(gpio);
 
-   ddata->vcc_supply = devm_regulator_get(&pdev->dev, "vcc");
+   ddata->vcc_supply = devm_regulator_get(dev, "vcc");
if (IS_ERR(ddata->vcc_supply))
return PTR_ERR(ddata->vcc_supply);
 
-   bl_node = of_parse_phandle(node, "backlight", 0);
-   if (bl_node) {
-   ddata->backlight = of_find_backlight_by_node(bl_node);
-   of_node_put(bl_node);
+   ddata->backlight = of_find_backlight(dev);
 
-   if (!ddata->backlight)
-   return -EPROBE_DEFER;
-   }
+   if (IS_ERR(ddata->backlight))
+   return PTR_ERR(ddata->backlight);
 
r = of_get_display_timing(node, "panel-timing", &timing);
if (r) {
-   dev_err(&pdev->dev, "failed to get video timing\n");
-   goto error_free_backlight;
+   dev_err(dev, "failed to get video timing\n");
+   return r;
}
 
videomode_from_timing(&timing, &ddata->vm);
 
in = omapdss_of_find_source_for_first_ep(node);
if (IS_ERR(in)) {
-   dev_err(&pdev->dev, "failed to find video source\n");
-   r = PTR_ERR(in);
-   goto error_free_backlight;
+   dev_err(dev, "failed to find video source\n");
+   return PTR_ERR(in);
}
 
ddata->in = in;
 
return 0;
-
-error_free_backlight:
-   if (ddata->backlight)
-   put_device(&ddata->backlight->dev);
-
-   return r;
 }
 
 static int panel_dpi_probe(struct platform_device *pdev)
-- 
2.11.0

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[Bug 103277] [bisected] Systems hangs on resume from S3 sleep due to "Match actual state during S3 resume" commit

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103277

--- Comment #12 from Harry Wentland  ---
Can you try blacklisting amdgpu and try S3 again?

We've seen issues with S3 on 4.15 RCs outside of amdgpu where the system
wouldn't come back from S3. It's fixed in more recent RCs (definitely 4.15-rc6
and newer) but the issue might still be there in amd-staging-drm-next.

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[PATCH] drm/bridge/synopsys: dsi: Add 1.31 version support

[Philippe Cornu]

From: Philippe CORNU 

Add support for the Synopsys DesignWare MIPI DSI version 1.31
Two registers need to be updated/added for supporting 1.31:
* PHY_TMR_CFG 0x9c (updated)
  1.30 [31:24] phy_hs2lp_time
   [23:16] phy_lp2hs_time
   [14: 0] max_rd_time

  1.31 [25:16] phy_hs2lp_time
   [ 9: 0] phy_lp2hs_time

* PHY_TMR_RD_CFG 0xf4 (new)
  1.31 [14: 0] max_rd_time

Signed-off-by: Philippe Cornu 
---
 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 52 +++
 1 file changed, 46 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c 
b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
index 735f38429c06..20a2ca14a7ad 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
@@ -25,7 +25,13 @@
 #include 
 #include 
 
+#define HWVER_130  0x31333000  /* IP version 1.30 */
+#define HWVER_131  0x31333100  /* IP version 1.31 */
+#define HWVER_OLDEST   HWVER_130
+#define HWVER_NEWEST   HWVER_131
+
 #define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
 
 #define DSI_PWR_UP 0x04
 #define RESET  0
@@ -161,11 +167,12 @@
 #define PHY_CLKHS2LP_TIME(lbcc)(((lbcc) & 0x3ff) << 16)
 #define PHY_CLKLP2HS_TIME(lbcc)((lbcc) & 0x3ff)
 
-/* TODO Next register is slightly different between 1.30 & 1.31 IP version */
 #define DSI_PHY_TMR_CFG0x9c
-#define PHY_HS2LP_TIME(lbcc)   (((lbcc) & 0xff) << 24)
-#define PHY_LP2HS_TIME(lbcc)   (((lbcc) & 0xff) << 16)
-#define MAX_RD_TIME(lbcc)  ((lbcc) & 0x7fff)
+#define PHY_HS2LP_TIME_V130(lbcc)  (((lbcc) & 0xff) << 24)
+#define PHY_LP2HS_TIME_V130(lbcc)  (((lbcc) & 0xff) << 16)
+#define MAX_RD_TIME_V130(lbcc) ((lbcc) & 0x7fff)
+#define PHY_HS2LP_TIME_V131(lbcc)  (((lbcc) & 0x3ff) << 16)
+#define PHY_LP2HS_TIME_V131(lbcc)  ((lbcc) & 0x3ff)
 
 #define DSI_PHY_RSTZ   0xa0
 #define PHY_DISFORCEPLL0
@@ -204,7 +211,9 @@
 #define DSI_INT_ST10xc0
 #define DSI_INT_MSK0   0xc4
 #define DSI_INT_MSK1   0xc8
+
 #define DSI_PHY_TMR_RD_CFG 0xf4
+#define MAX_RD_TIME_V131(lbcc) ((lbcc) & 0x7fff)
 
 #define PHY_STATUS_TIMEOUT_US  1
 #define CMD_PKT_STATUS_TIMEOUT_US  2
@@ -215,6 +224,7 @@ struct dw_mipi_dsi {
struct drm_bridge *panel_bridge;
struct device *dev;
void __iomem *base;
+   u32 hw_version;
 
struct clk *pclk;
struct clk *px_clk;
@@ -616,8 +626,14 @@ static void dw_mipi_dsi_dphy_timing_config(struct 
dw_mipi_dsi *dsi)
 * note: DSI_PHY_TMR_CFG.MAX_RD_TIME should be in line with
 * DSI_CMD_MODE_CFG.MAX_RD_PKT_SIZE_LP (see CMD_MODE_ALL_LP)
 */
-   dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x40)
- | PHY_LP2HS_TIME(0x40) | MAX_RD_TIME(1));
+   if (dsi->hw_version == HWVER_131) {
+   dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME_V131(0x40) |
+ PHY_LP2HS_TIME_V131(0x40));
+   dsi_write(dsi, DSI_PHY_TMR_RD_CFG, MAX_RD_TIME_V131(1));
+   } else {
+   dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME_V130(0x40) |
+ PHY_LP2HS_TIME_V130(0x40) | MAX_RD_TIME_V130(1));
+   }
 
dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40)
  | PHY_CLKLP2HS_TIME(0x40));
@@ -791,6 +807,28 @@ static const struct drm_bridge_funcs 
dw_mipi_dsi_bridge_funcs = {
.attach   = dw_mipi_dsi_bridge_attach,
 };
 
+static void dsi_get_version(struct dw_mipi_dsi *dsi)
+{
+   u32 hw_version;
+
+   clk_prepare_enable(dsi->pclk);
+   hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
+   clk_disable_unprepare(dsi->pclk);
+
+   if (hw_version > HWVER_NEWEST) {
+   DRM_DEBUG("hw version: use 0x%08x for this recent 0x%08x\n",
+ HWVER_NEWEST, hw_version);
+   hw_version = HWVER_NEWEST;
+
+   } else if (hw_version < HWVER_OLDEST) {
+   DRM_DEBUG("hw version: use 0x%08x for this old 0x%08x\n",
+ HWVER_OLDEST, hw_version);
+   hw_version = HWVER_OLDEST;
+   }
+
+   dsi->hw_version = hw_version;
+}
+
 static struct dw_mipi_dsi *
 __dw_mipi_dsi_probe(struct platform_device *pdev,
const struct dw_mipi_dsi_plat_data *plat_data)
@@ -870,6 +908,8 @@ __dw_mipi_dsi_probe(struct platform_device *pdev,
clk_disable_unprepare(dsi->pclk);
}
 
+   dsi_get_version(dsi);
+
pm_runtime_enable(dev);
 
dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
-- 
2.15.1

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[PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example

[Philippe Cornu]

In the dsi panel example, clock names in the "clock-names"
field have been swapped:
* "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
* "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4

Signed-off-by: Philippe Cornu 
---
 Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 
b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
index 029252253ad4..3eb1b48b47dd 100644
--- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
+++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
@@ -98,7 +98,7 @@ Example 2: DSI panel
compatible = "st,stm32-dsi";
reg = <0x40016c00 0x800>;
clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
-   clock-names = "ref", "pclk";
+   clock-names = "pclk", "ref";
resets = <&rcc STM32F4_APB2_RESET(DSI)>;
reset-names = "apb";
 
-- 
2.15.1

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[PATCH] dt-bindings: display: stm32: add pixel clock mandatory property

[Philippe Cornu]

Add the DPI/RGB input pixel clock in mandatory properties
because it really offers a better preciseness for timing
computations.

Signed-off-by: Philippe Cornu 
---
Please apply "dt-bindings: display: stm32: correct clock-names
in dsi panel example" before this patch.

Changes in v3: remove the note regarding swapped clock names
  (now in a separate patch).
Changes in v2: put new clock in last position (Rob Herring)

 Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt 
b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
index 3eb1b48b47dd..942b7237ae87 100644
--- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
+++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
@@ -29,6 +29,7 @@ Mandatory properties specific to STM32 DSI:
 - compatible: "st,stm32-dsi".
 - clock-names:
   - phy pll reference clock string name, must be "ref".
+  - DPI/RGB input pixel clock string name, must be "px_clk".
 - resets: see [5].
 - reset-names: see [5].
 
@@ -97,8 +98,9 @@ Example 2: DSI panel
#size-cells = <0>;
compatible = "st,stm32-dsi";
reg = <0x40016c00 0x800>;
-   clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
-   clock-names = "pclk", "ref";
+   clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>,
+<&rcc 1 CLK_LCD>;
+   clock-names = "pclk", "ref", "px_clk";
resets = <&rcc STM32F4_APB2_RESET(DSI)>;
reset-names = "apb";
 
-- 
2.15.1

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[PATCH libdrm] tests: Add drm_set_cgrp_param

[Matt Roper]

drm_set_cgrp_param is a simple tool to set DRM parameters associated with a
cgroup.  It is intended to be called at system initialization time (e.g., from
a sysv-init script or systemd service) to configure graphics policy and
resource management according to the wishes of the system integrator.

Signed-off-by: Matt Roper 
---
 configure.ac  |  1 +
 tests/Makefile.am |  2 +-
 tests/drm_set_cgrp_param/Makefile.am  | 18 ++
 tests/drm_set_cgrp_param/drm_set_cgrp_param.c | 80 +++
 4 files changed, 100 insertions(+), 1 deletion(-)
 create mode 100644 tests/drm_set_cgrp_param/Makefile.am
 create mode 100644 tests/drm_set_cgrp_param/drm_set_cgrp_param.c

diff --git a/configure.ac b/configure.ac
index 35378b3384..9b5f340e2a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -567,6 +567,7 @@ AC_CONFIG_FILES([
tests/nouveau/Makefile
tests/etnaviv/Makefile
tests/util/Makefile
+   tests/drm_set_cgrp_param/Makefile
man/Makefile
libdrm.pc])
 AC_OUTPUT
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 0355a9255f..d77a8639c8 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -1,4 +1,4 @@
-SUBDIRS = util kms modeprint proptest modetest vbltest
+SUBDIRS = util kms modeprint proptest modetest vbltest drm_set_cgrp_param
 
 if HAVE_LIBKMS
 SUBDIRS += kmstest
diff --git a/tests/drm_set_cgrp_param/Makefile.am 
b/tests/drm_set_cgrp_param/Makefile.am
new file mode 100644
index 00..c32ec1c440
--- /dev/null
+++ b/tests/drm_set_cgrp_param/Makefile.am
@@ -0,0 +1,18 @@
+AM_CFLAGS = \
+   $(WARN_CFLAGS)\
+   -I$(top_srcdir)/include/drm \
+   -I$(top_srcdir)/tests \
+   -I$(top_srcdir)
+
+if HAVE_INSTALL_TESTS
+bin_PROGRAMS = \
+   drm_set_cgrp_param
+else
+noinst_PROGRAMS = \
+   drm_set_cgrp_param
+endif
+
+drm_set_cgrp_param_SOURCES = \
+   drm_set_cgrp_param.c
+drm_set_cgrp_param_LDADD = \
+   $(top_builddir)/libdrm.la
diff --git a/tests/drm_set_cgrp_param/drm_set_cgrp_param.c 
b/tests/drm_set_cgrp_param/drm_set_cgrp_param.c
new file mode 100644
index 00..987bd18e88
--- /dev/null
+++ b/tests/drm_set_cgrp_param/drm_set_cgrp_param.c
@@ -0,0 +1,80 @@
+/*
+ * \file drm_set_cgrp_prop.c
+ * Simple tool to set a DRM property for a cgroup.  Intended for use in
+ * system-specific initialization handling (e.g., sysv init, systemd, etc.).
+ */
+
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "xf86drm.h"
+#include "xf86drmMode.h"
+
+#include "util/common.h"
+
+int main(int argc, char **argv)
+{
+   int drm_fd, cgrp_fd;
+   struct drm_cgroup_setparam req;
+   int ret;
+
+   if (argc != 5) {
+   puts("Usage:");
+   printf("  %s\n\n", 
argv[0]);
+   puts("Example:");
+   printf("  %s /dev/dri/card0 /sys/fs/cgroup-2/highprio 1 10\n",
+  argv[0]);
+   return 1;
+   }
+
+   drm_fd = open(argv[1], O_RDWR, 0);
+   if (drm_fd < 0) {
+   perror("Invalid DRM device");
+   return 1;
+   }
+
+   cgrp_fd = open(argv[2], O_RDONLY|O_DIRECTORY, 0);
+   if (cgrp_fd < 0) {
+   perror("Invalid cgroup directory");
+   return 1;
+   }
+
+   req.cgroup_fd = cgrp_fd;
+   req.reserved = 0;
+   req.param = (uint64_t)strtoul(argv[3], NULL, 0);
+   req.value = (int64_t)strtol(argv[4], NULL, 0);
+
+   ret = drmIoctl(drm_fd, DRM_IOCTL_CGROUP_SETPARAM, &req);
+   if (ret)
+   perror("Failed to set cgroup parameter");
+
+   close(cgrp_fd);
+   close(drm_fd);
+
+   return ret;
+}
-- 
2.14.3

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[Bug 103443] [CI] igt@ - success - WARN - no modes for connector 76

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=103443
Bug 103443 depends on bug 103369, which changed state.

Bug 103369 Summary: [CI] igt@kms_* fail - igt-kms-WARNING: connector 76/eDP-1 
has no modes
https://bugs.freedesktop.org/show_bug.cgi?id=103369

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

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Re: [PATCH RFC 8/9] drm/i915: Allow default context priority to be set via cgroup parameter

[Matt Roper]

On Sat, Jan 20, 2018 at 10:40:19AM +, Chris Wilson wrote:
> Quoting Chris Wilson (2018-01-20 09:36:10)
> > Quoting Matt Roper (2018-01-20 01:51:40)
> > > GPU contexts are usually created with "normal" priority as a starting 
> > > point and
> > > then may be adjusted from their either via explicit methods 
> > > (context_set_param)
> > > or implicit methods (boosts/penalization due to runtime behavior).  Let's 
> > > allow
> > > a system integrator to override this starting GPU priority for a group of
> > > processes by setting a parameter on the cgroup that these processes 
> > > belong to.
> > 
> > You are still allowing a process to undo the cgroup by changing its
> > own priority. What you want I think is a priority-offset or somesuch.
> 
> Along this vein, it's worthwhile pointing out that the current scheduler
> is not even close to being the cgroup-enabled CFS implementation it
> needs to be to call itself a scheduler. (It's more or less a no-op
> scheduler.) It may be premature to start exposing hooks into it.
> -Chris

I think that probably depends a bit on what you need from a "scheduler."
The current i915 scheduler isn't fair (i.e., it allows higher priority
processes to potentially starve out lower priority processes), but that
winds up being exactly what we want in a lot of embedded use cases where
the higher priority apps truly need absolute precedence over lower
priority.  Granted, in those kind of settings the higher priority apps
tend to be curated, so there's already a reasonable expectation that
they're well-behaved and won't overcommit the system.

The suggestion of switching the cgroup to give a priority offset vs a
priority starting point is a good suggestion though; thanks!


Matt


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[PATCH] gpu: ipu-cpmem: add 8-bit grayscale support to ipu_cpmem_set_image

[Philipp Zabel]

Add the missing offset calculation for grayscale images. Since the IPU
only supports capturing greyscale in raw passthrough mode, it is the
same as 8-bit bayer formats.

Signed-off-by: Philipp Zabel 
---
 drivers/gpu/ipu-v3/ipu-cpmem.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index bb9c087e6c0d2..ef32377b91c08 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -788,6 +788,7 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct 
ipu_image *image)
case V4L2_PIX_FMT_SGBRG8:
case V4L2_PIX_FMT_SGRBG8:
case V4L2_PIX_FMT_SRGGB8:
+   case V4L2_PIX_FMT_GREY:
offset = image->rect.left + image->rect.top * pix->bytesperline;
break;
case V4L2_PIX_FMT_SBGGR16:
-- 
2.11.0

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Re: [PATCH RFC 6/9] drm: Add cgroup helper library

[Tejun Heo]

Hello, Matt.

On Fri, Jan 19, 2018 at 05:51:38PM -0800, Matt Roper wrote:
> Most DRM drivers will want to handle the CGROUP_SETPARAM ioctl by looking up a
> driver-specific per-cgroup data structure (or allocating a new one) and 
> storing
> the supplied parameter value into the data structure (possibly after doing 
> some
> checking and sanitization on the provided value).  Let's provide a helper
> library for drivers that will take care of the details of storing per-cgroup
> data structures in a hashtable and destroying those structures if/when the
> cgroup itself is removed.

Would it be possible to make the core of this a built-in part of
cgroup like cgroup-bpf does?  My gut feeling is that that isn't gonna
be much code anyway and likely to be cleaner to implement and use.

Being a full-fledged controller comes with quite a bit of complexity
in terms of sync rules and everything, and we may build a simpler
modular infrastructure if usages like this proliferate but for now
extending from the core seems the most straight forward.

Thanks.

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Re: [PATCH 2/3] dt-bindings: etnaviv: change clocks to be optional

[Rob Herring]

On Fri, Jan 19, 2018 at 6:06 AM, Lucas Stach  wrote:
> While the clocks were documented as required, the driver always treated them
> as optional and there are existing Marvell Dove DTs, which would break if
> changed to required. Accept reality and document the clocks as optional.

The fact that clocks are optional for a driver doesn't mean they are
optional for the binding. Now they could be optional because you have
power-domains and all clock management is done within the power domain
(though that too is driver specifics leaking into the binding because
power domain has come to mean power management domain).

>
> Signed-off-by: Lucas Stach 
> ---
>  .../devicetree/bindings/display/etnaviv/etnaviv-drm.txt| 10 
> +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git 
> a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt 
> b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> index c6f4e023c34a..f28aa5735f4f 100644
> --- a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> +++ b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> @@ -30,16 +30,16 @@ Required properties:
>  - reg: should be register base and length as documented in the
>datasheet
>  - interrupts: Should contain the cores interrupt line
> +
> +Optional properties:
> +- power-domains: a power domain consumer specifier according to
> +  Documentation/devicetree/bindings/power/power_domain.txt
>  - clocks: should contain one clock for entry in clock-names
>see Documentation/devicetree/bindings/clock/clock-bindings.txt
>  - clock-names:
> - "bus":AXI/register clock
> - "core":   GPU core clock
> -   - "shader": Shader clock (only required if GPU has feature PIPE_3D)
> -
> -Optional properties:
> -- power-domains: a power domain consumer specifier according to
> -  Documentation/devicetree/bindings/power/power_domain.txt
> +   - "shader": Shader clock (only if GPU has feature PIPE_3D)

"required" is still appropriate here because it is "if you have
optional clocks, then it is required if gpu has PIPE_3D").

Rob
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Re: [PATCH 2/3] dt-bindings: etnaviv: change clocks to be optional

[Lucas Stach]

Am Montag, den 22.01.2018, 10:28 -0600 schrieb Rob Herring:
> On Fri, Jan 19, 2018 at 6:06 AM, Lucas Stach 
> wrote:
> > While the clocks were documented as required, the driver always
> > treated them
> > as optional and there are existing Marvell Dove DTs, which would
> > break if
> > changed to required. Accept reality and document the clocks as
> > optional.
> 
> The fact that clocks are optional for a driver doesn't mean they are
> optional for the binding. Now they could be optional because you have
> power-domains and all clock management is done within the power
> domain
> (though that too is driver specifics leaking into the binding because
> power domain has come to mean power management domain).

So you prefer the binding to stay as-is and accept the Dove DTs as non-
compliant to the bindings, but still okay? That's fine with me and I'll
drop that patch in this case.

Regards,
Lucas
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[PATCH 06/10] drm/etnaviv: add hardware database

[Lucas Stach]

New versions of the Vivante kernel driver don't trust the hardware feature
bits anymore, but use an internal hardware database. This also includes
more feature fields than are available in hardware.

As we can't trust the hardware feature bits to be correct anymore, we need
to replicate the HWDB in etanviv. For now only the GC7000L as found on
the i.MX8M is supported.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/Makefile   |  1 +
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c  |  7 
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h  |  1 +
 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 65 ++
 4 files changed, 74 insertions(+)
 create mode 100644 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c

diff --git a/drivers/gpu/drm/etnaviv/Makefile b/drivers/gpu/drm/etnaviv/Makefile
index 1281c8d4fae5..24cb508f29df 100644
--- a/drivers/gpu/drm/etnaviv/Makefile
+++ b/drivers/gpu/drm/etnaviv/Makefile
@@ -9,6 +9,7 @@ etnaviv-y := \
etnaviv_gem_submit.o \
etnaviv_gem.o \
etnaviv_gpu.o \
+   etnaviv_hwdb.o \
etnaviv_iommu_v2.o \
etnaviv_iommu.o \
etnaviv_mmu.o \
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index adde2274163d..08ee716f7b3c 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -376,6 +376,13 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
dev_info(gpu->dev, "model: GC%x, revision: %x\n",
 gpu->identity.model, gpu->identity.revision);
 
+   /*
+* If there is a match in the HWDB, we aren't interested in the
+* remaining register values, as they might be wrong.
+*/
+   if (etnaviv_fill_identity_from_hwdb(gpu))
+   return;
+
gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE);
 
/* Disable fast clear on GC700. */
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 6d8e210f1016..cc238a9c64ce 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -187,6 +187,7 @@ static inline bool fence_retired(struct etnaviv_gpu *gpu, 
u32 fence)
 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value);
 
 int etnaviv_gpu_init(struct etnaviv_gpu *gpu);
+bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu);
 
 #ifdef CONFIG_DEBUG_FS
 int etnaviv_gpu_debugfs(struct etnaviv_gpu *gpu, struct seq_file *m);
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c 
b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
new file mode 100644
index ..ea08bb38caaf
--- /dev/null
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2018 Etnaviv Project
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include "etnaviv_gpu.h"
+
+static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
+   {
+   .model = 0x7000,
+   .revision = 0x6214,
+   .stream_count = 16,
+   .register_max = 64,
+   .thread_count = 1024,
+   .shader_core_count = 4,
+   .vertex_cache_size = 16,
+   .vertex_output_buffer_size = 1024,
+   .pixel_pipes = 2,
+   .instruction_count = 512,
+   .num_constants = 320,
+   .buffer_size = 0,
+   .varyings_count = 16,
+   .features = 0xe0287cad,
+   .minor_features0 = 0xc1799eff,
+   .minor_features1 = 0xfefbfad9,
+   .minor_features2 = 0xeb9d4fbf,
+   .minor_features3 = 0xedfffced,
+   .minor_features4 = 0xdb0dafc7,
+   .minor_features5 = 0xbb5ac333,
+   .minor_features6 = 0xfc8ee200,
+   .minor_features7 = 0x03fbfa6f,
+   .minor_features8 = 0x00ef0ef0,
+   .minor_features9 = 0x0edbf03c,
+   .minor_features10 = 0x90044250,
+   .minor_features11 = 0x0024,
+   },
+};
+
+bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu)
+{
+   struct etnaviv_chip_identity *ident = &gpu->identity;
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(etnaviv_chip_identities); i++) {
+   if (etnaviv_chip_identities[i].model == ident->model &&
+   etnaviv_chip_identities[i].revision == ident->revision) {
+   memcpy(id

[PATCH 03/10] drm/etnaviv: add support for slave interface clock

[Lucas Stach]

The slave interface clock is a clock input found on newer cores to gate
the register interface. For now we simply ungate it when the GPU is in
active state.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 4eb1a27278ec..27516f964136 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1543,6 +1543,12 @@ static int etnaviv_gpu_clk_enable(struct etnaviv_gpu 
*gpu)
 {
int ret;
 
+   if (gpu->clk_reg) {
+   ret = clk_prepare_enable(gpu->clk_reg);
+   if (ret)
+   return ret;
+   }
+
if (gpu->clk_bus) {
ret = clk_prepare_enable(gpu->clk_bus);
if (ret)
@@ -1581,6 +1587,8 @@ static int etnaviv_gpu_clk_disable(struct etnaviv_gpu 
*gpu)
clk_disable_unprepare(gpu->clk_core);
if (gpu->clk_bus)
clk_disable_unprepare(gpu->clk_bus);
+   if (gpu->clk_reg)
+   clk_disable_unprepare(gpu->clk_reg);
 
return 0;
 }
@@ -1827,6 +1835,11 @@ static int etnaviv_gpu_platform_probe(struct 
platform_device *pdev)
}
 
/* Get Clocks: */
+   gpu->clk_reg = devm_clk_get(&pdev->dev, "reg");
+   DBG("clk_reg: %p", gpu->clk_reg);
+   if (IS_ERR(gpu->clk_reg))
+   gpu->clk_reg = NULL;
+
gpu->clk_bus = devm_clk_get(&pdev->dev, "bus");
DBG("clk_bus: %p", gpu->clk_bus);
if (IS_ERR(gpu->clk_bus))
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 0170eb0a0923..e91200c9d4c1 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -152,6 +152,7 @@ struct etnaviv_gpu {
 
/* Power Control: */
struct clk *clk_bus;
+   struct clk *clk_reg;
struct clk *clk_core;
struct clk *clk_shader;
 
-- 
2.11.0

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[PATCH 01/10] drm/etnaviv: use correct format specifier for size_t

[Lucas Stach]

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_mmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
index d113fe06e6b5..49e049713a52 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
@@ -29,7 +29,7 @@ static void etnaviv_domain_unmap(struct etnaviv_iommu_domain 
*domain,
size_t pgsize = SZ_4K;
 
if (!IS_ALIGNED(iova | size, pgsize)) {
-   pr_err("unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%x\n",
+   pr_err("unaligned: iova 0x%lx size 0x%zx min_pagesz 0x%zx\n",
   iova, size, pgsize);
return;
}
@@ -54,7 +54,7 @@ static int etnaviv_domain_map(struct etnaviv_iommu_domain 
*domain,
int ret = 0;
 
if (!IS_ALIGNED(iova | paddr | size, pgsize)) {
-   pr_err("unaligned: iova 0x%lx pa %pa size 0x%zx min_pagesz 
0x%x\n",
+   pr_err("unaligned: iova 0x%lx pa %pa size 0x%zx min_pagesz 
0x%zx\n",
   iova, &paddr, size, pgsize);
return -EINVAL;
}
-- 
2.11.0

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[PATCH 00/10] GC7000L aka i.MX8M support

[Lucas Stach]

Hi all,

the following series adds the necessary bits to get the GC7000L, as found
on the NXP i.MX8M, up and running.

It's not enough to run the GL userspace bits yet, as we are still missing
reloc support for the texture descriptors, but it gets the basic FE and
MMU state setup into place. I've only validated that the FE is correctly
executing the commands in the kernel ring for now.

There are more patches to come, but I want to get others the chance to
review the basic stuff early.

Regards,
Lucas

Lucas Stach (10):
  drm/etnaviv: use correct format specifier for size_t
  drm/etnaviv: split out and optimize MMU fault dumping
  drm/etnaviv: add support for slave interface clock
  drm/etnaviv: update hardware headers from rnndb
  drm/etnaviv: add more minor features fields
  drm/etnaviv: add hardware database
  drm/etnaviv: add security handling mode enum
  drm/etnaviv: handle security states
  drm/etnaviv: add function to load the initial PTA state
  drm/etnaviv: add PTA handling to MMUv2

 drivers/gpu/drm/etnaviv/Makefile   |   1 +
 drivers/gpu/drm/etnaviv/common.xml.h   | 281 +++--
 drivers/gpu/drm/etnaviv/etnaviv_buffer.c   |  18 ++
 drivers/gpu/drm/etnaviv/etnaviv_drv.h  |   1 +
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c  | 120 ++--
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h  |  25 ++-
 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c |  65 +++
 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c |  76 +++-
 drivers/gpu/drm/etnaviv/etnaviv_mmu.c  |   4 +-
 drivers/gpu/drm/etnaviv/state_hi.xml.h | 149 +--
 include/uapi/drm/etnaviv_drm.h |   6 +
 11 files changed, 645 insertions(+), 101 deletions(-)
 create mode 100644 drivers/gpu/drm/etnaviv/etnaviv_hwdb.c

-- 
2.11.0

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[PATCH 02/10] drm/etnaviv: split out and optimize MMU fault dumping

[Lucas Stach]

Split out the fault dumping, as this will get more complex in the future.
Also there is no need to read and dump the fault address from MMUs that
didn't signal a fault.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 31 +--
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index bab6a8286520..4eb1a27278ec 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1454,9 +1454,22 @@ static void sync_point_worker(struct work_struct *work)
etnaviv_gpu_start_fe(gpu, addr + 2, 2);
 }
 
-/*
- * Init/Cleanup:
- */
+static void dump_mmu_fault(struct etnaviv_gpu *gpu)
+{
+   u32 status = gpu_read(gpu, VIVS_MMUv2_STATUS);
+   int i;
+
+   dev_err_ratelimited(gpu->dev, "MMU fault status 0x%08x\n", status);
+
+   for (i = 0; i < 4; i++) {
+   if (!(status & (VIVS_MMUv2_STATUS_EXCEPTION0__MASK << (i * 4
+   continue;
+
+   dev_err_ratelimited(gpu->dev, "MMU %d fault addr 0x%08x\n", i,
+   gpu_read(gpu, VIVS_MMUv2_EXCEPTION_ADDR(i)));
+   }
+}
+
 static irqreturn_t irq_handler(int irq, void *data)
 {
struct etnaviv_gpu *gpu = data;
@@ -1477,17 +1490,7 @@ static irqreturn_t irq_handler(int irq, void *data)
}
 
if (intr & VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION) {
-   int i;
-
-   dev_err_ratelimited(gpu->dev,
-   "MMU fault status 0x%08x\n",
-   gpu_read(gpu, VIVS_MMUv2_STATUS));
-   for (i = 0; i < 4; i++) {
-   dev_err_ratelimited(gpu->dev,
-   "MMU %d fault addr 0x%08x\n",
-   i, gpu_read(gpu,
-   VIVS_MMUv2_EXCEPTION_ADDR(i)));
-   }
+   dump_mmu_fault(gpu);
intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION;
}
 
-- 
2.11.0

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[PATCH 05/10] drm/etnaviv: add more minor features fields

[Lucas Stach]

Newer GPU cores added yet more feature bits. Make room for them and
let userspace query them.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 36 +++
 drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 16 ++--
 include/uapi/drm/etnaviv_drm.h|  6 ++
 3 files changed, 48 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 27516f964136..adde2274163d 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -86,6 +86,30 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 
param, u64 *value)
*value = gpu->identity.minor_features5;
break;
 
+   case ETNAVIV_PARAM_GPU_FEATURES_7:
+   *value = gpu->identity.minor_features6;
+   break;
+
+   case ETNAVIV_PARAM_GPU_FEATURES_8:
+   *value = gpu->identity.minor_features7;
+   break;
+
+   case ETNAVIV_PARAM_GPU_FEATURES_9:
+   *value = gpu->identity.minor_features8;
+   break;
+
+   case ETNAVIV_PARAM_GPU_FEATURES_10:
+   *value = gpu->identity.minor_features9;
+   break;
+
+   case ETNAVIV_PARAM_GPU_FEATURES_11:
+   *value = gpu->identity.minor_features10;
+   break;
+
+   case ETNAVIV_PARAM_GPU_FEATURES_12:
+   *value = gpu->identity.minor_features11;
+   break;
+
case ETNAVIV_PARAM_GPU_STREAM_COUNT:
*value = gpu->identity.stream_count;
break;
@@ -825,6 +849,18 @@ int etnaviv_gpu_debugfs(struct etnaviv_gpu *gpu, struct 
seq_file *m)
   gpu->identity.minor_features4);
seq_printf(m, "\t minor_features5: 0x%08x\n",
   gpu->identity.minor_features5);
+   seq_printf(m, "\t minor_features6: 0x%08x\n",
+  gpu->identity.minor_features6);
+   seq_printf(m, "\t minor_features7: 0x%08x\n",
+  gpu->identity.minor_features7);
+   seq_printf(m, "\t minor_features8: 0x%08x\n",
+  gpu->identity.minor_features8);
+   seq_printf(m, "\t minor_features9: 0x%08x\n",
+  gpu->identity.minor_features9);
+   seq_printf(m, "\t minor_features10: 0x%08x\n",
+  gpu->identity.minor_features10);
+   seq_printf(m, "\t minor_features11: 0x%08x\n",
+  gpu->identity.minor_features11);
 
seq_puts(m, "\tspecs\n");
seq_printf(m, "\t stream_count:  %d\n",
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index e91200c9d4c1..6d8e210f1016 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -38,21 +38,17 @@ struct etnaviv_chip_identity {
 
/* Supported minor feature fields. */
u32 minor_features0;
-
-   /* Supported minor feature 1 fields. */
u32 minor_features1;
-
-   /* Supported minor feature 2 fields. */
u32 minor_features2;
-
-   /* Supported minor feature 3 fields. */
u32 minor_features3;
-
-   /* Supported minor feature 4 fields. */
u32 minor_features4;
-
-   /* Supported minor feature 5 fields. */
u32 minor_features5;
+   u32 minor_features6;
+   u32 minor_features7;
+   u32 minor_features8;
+   u32 minor_features9;
+   u32 minor_features10;
+   u32 minor_features11;
 
/* Number of streams supported. */
u32 stream_count;
diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
index e9b997a0ef27..0d5c49dc478c 100644
--- a/include/uapi/drm/etnaviv_drm.h
+++ b/include/uapi/drm/etnaviv_drm.h
@@ -55,6 +55,12 @@ struct drm_etnaviv_timespec {
 #define ETNAVIV_PARAM_GPU_FEATURES_40x07
 #define ETNAVIV_PARAM_GPU_FEATURES_50x08
 #define ETNAVIV_PARAM_GPU_FEATURES_60x09
+#define ETNAVIV_PARAM_GPU_FEATURES_70x0a
+#define ETNAVIV_PARAM_GPU_FEATURES_80x0b
+#define ETNAVIV_PARAM_GPU_FEATURES_90x0c
+#define ETNAVIV_PARAM_GPU_FEATURES_10   0x0d
+#define ETNAVIV_PARAM_GPU_FEATURES_11   0x0e
+#define ETNAVIV_PARAM_GPU_FEATURES_12   0x0f
 
 #define ETNAVIV_PARAM_GPU_STREAM_COUNT  0x10
 #define ETNAVIV_PARAM_GPU_REGISTER_MAX  0x11
-- 
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[PATCH 09/10] drm/etnaviv: add function to load the initial PTA state

[Lucas Stach]

On GPUs with the security feature the MTLB config is stored in the PTA.
Add a function to trigger the initial PTA load through the FE.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 18 ++
 drivers/gpu/drm/etnaviv/etnaviv_drv.h|  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c 
b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c
index 99ad2f073c6e..bfc6d4aa3b7c 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_buffer.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_buffer.c
@@ -215,6 +215,24 @@ u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, 
u32 mtlb_addr, u32 safe
return buffer->user_size / 8;
 }
 
+u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu)
+{
+   struct etnaviv_cmdbuf *buffer = &gpu->buffer;
+
+   lockdep_assert_held(&gpu->lock);
+
+   buffer->user_size = 0;
+
+   CMD_LOAD_STATE(buffer, VIVS_MMUv2_PTA_CONFIG,
+  VIVS_MMUv2_PTA_CONFIG_INDEX(0));
+
+   CMD_END(buffer);
+
+   buffer->user_size = ALIGN(buffer->user_size, 8);
+
+   return buffer->user_size / 8;
+}
+
 void etnaviv_buffer_end(struct etnaviv_gpu *gpu)
 {
struct etnaviv_cmdbuf *buffer = &gpu->buffer;
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h 
b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
index a54f0b758a5c..7aff2df84902 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h
@@ -85,6 +85,7 @@ int etnaviv_gem_new_userptr(struct drm_device *dev, struct 
drm_file *file,
uintptr_t ptr, u32 size, u32 flags, u32 *handle);
 u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu);
 u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, u32 mtlb_addr, u32 
safe_addr);
+u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu);
 void etnaviv_buffer_end(struct etnaviv_gpu *gpu);
 void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event);
 void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,
-- 
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[PATCH 10/10] drm/etnaviv: add PTA handling to MMUv2

[Lucas Stach]

The Page Table Array is a new first level structure above the MTLB
availabale on GPUs with the security feature. Use the PTa to set up
the MMU when the security related states are handled by the kernel driver.

Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c | 76 +-
 1 file changed, 75 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c 
b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
index 1e956e266aa3..b57bdb6bc73f 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
@@ -40,6 +40,9 @@
 
 struct etnaviv_iommuv2_domain {
struct etnaviv_iommu_domain base;
+   /* P(age) T(able) A(rray) */
+   u64 *pta_cpu;
+   dma_addr_t pta_dma;
/* M(aster) TLB aka first level pagetable */
u32 *mtlb_cpu;
dma_addr_t mtlb_dma;
@@ -114,6 +117,15 @@ static int etnaviv_iommuv2_init(struct 
etnaviv_iommuv2_domain *etnaviv_domain)
for (i = 0; i < SZ_4K / 4; i++)
*p++ = 0xdead55aa;
 
+   etnaviv_domain->pta_cpu = dma_alloc_coherent(etnaviv_domain->base.dev,
+SZ_4K,
+&etnaviv_domain->pta_dma,
+GFP_KERNEL);
+   if (!etnaviv_domain->pta_cpu) {
+   ret = -ENOMEM;
+   goto fail_mem;
+   }
+
etnaviv_domain->mtlb_cpu = dma_alloc_coherent(etnaviv_domain->base.dev,
  SZ_4K,
  &etnaviv_domain->mtlb_dma,
@@ -150,6 +162,11 @@ static int etnaviv_iommuv2_init(struct 
etnaviv_iommuv2_domain *etnaviv_domain)
  etnaviv_domain->base.bad_page_cpu,
  etnaviv_domain->base.bad_page_dma);
 
+   if (etnaviv_domain->pta_cpu)
+   dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,
+ etnaviv_domain->pta_cpu,
+ etnaviv_domain->pta_dma);
+
if (etnaviv_domain->mtlb_cpu)
dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,
  etnaviv_domain->mtlb_cpu,
@@ -176,6 +193,10 @@ static void etnaviv_iommuv2_domain_free(struct 
etnaviv_iommu_domain *domain)
  etnaviv_domain->base.bad_page_dma);
 
dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,
+ etnaviv_domain->pta_cpu,
+ etnaviv_domain->pta_dma);
+
+   dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,
  etnaviv_domain->mtlb_cpu,
  etnaviv_domain->mtlb_dma);
 
@@ -216,7 +237,7 @@ static void etnaviv_iommuv2_dump(struct 
etnaviv_iommu_domain *domain, void *buf)
memcpy(buf, etnaviv_domain->stlb_cpu[i], SZ_4K);
 }
 
-void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu)
+static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu)
 {
struct etnaviv_iommuv2_domain *etnaviv_domain =
to_etnaviv_domain(gpu->mmu->domain);
@@ -236,6 +257,59 @@ void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu)
gpu_write(gpu, VIVS_MMUv2_CONTROL, VIVS_MMUv2_CONTROL_ENABLE);
 }
 
+static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu)
+{
+   struct etnaviv_iommuv2_domain *etnaviv_domain =
+   to_etnaviv_domain(gpu->mmu->domain);
+   u16 prefetch;
+
+   /* If the MMU is already enabled the state is still there. */
+   if (gpu_read(gpu, VIVS_MMUv2_SEC_CONTROL) & 
VIVS_MMUv2_SEC_CONTROL_ENABLE)
+   return;
+
+   gpu_write(gpu, VIVS_MMUv2_PTA_ADDRESS_LOW,
+ lower_32_bits(etnaviv_domain->pta_dma));
+   gpu_write(gpu, VIVS_MMUv2_PTA_ADDRESS_HIGH,
+ upper_32_bits(etnaviv_domain->pta_dma));
+   gpu_write(gpu, VIVS_MMUv2_PTA_CONTROL, VIVS_MMUv2_PTA_CONTROL_ENABLE);
+
+   gpu_write(gpu, VIVS_MMUv2_NONSEC_SAFE_ADDR_LOW,
+ lower_32_bits(etnaviv_domain->base.bad_page_dma));
+   gpu_write(gpu, VIVS_MMUv2_SEC_SAFE_ADDR_LOW,
+ lower_32_bits(etnaviv_domain->base.bad_page_dma));
+   gpu_write(gpu, VIVS_MMUv2_SAFE_ADDRESS_CONFIG,
+ VIVS_MMUv2_SAFE_ADDRESS_CONFIG_NON_SEC_SAFE_ADDR_HIGH(
+ upper_32_bits(etnaviv_domain->base.bad_page_dma)) |
+ VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH(
+ upper_32_bits(etnaviv_domain->base.bad_page_dma)));
+
+   etnaviv_domain->pta_cpu[0] = etnaviv_domain->mtlb_dma |
+VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K;
+
+   /* trigger a PTA load through the FE */
+   prefetch = etnaviv_buffer_config_pta(gpu);
+   etnaviv_gpu_start_fe(gpu, (u32)etnaviv_cmdbuf_get_pa(&gpu->buffer),
+