[Bug 98693] Mad Max: Long lags when VRAM full
https://bugs.freedesktop.org/show_bug.cgi?id=98693 Bug ID: 98693 Summary: Mad Max: Long lags when VRAM full Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r600 Assignee: dri-devel at lists.freedesktop.org Reporter: jani.karkkainen at gmail.com QA Contact: dri-devel at lists.freedesktop.org I get random lagging when playing the recently released Mad Max. Every once in a while, the game freezes completely, and gets back to the game after an arbitrary amount of seconds, anywhere from 2 to 35. With GALLIUM_HUD, and noticed that the lags appear to precede the VRAM slowly ramping up to full, and then I get this huge lag, and then VRAM usage is a lot lower (eg. from 1GB to ~600MB). I found this possibly related news item from a couple of months back: https://www.gamingonlinux.com/articles/a-reason-for-poor-performance-on-amd-plus-mesa-has-been-found-and-a-patch-is-in-progress.7873 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20161112/38255573/attachment.html>
[PATCH] drm/etnaviv: Allow DRAW_INSTANCED commands
On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote: > Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED command in the > command stream to draw a number of instances of the same geometry. > > The information that has been figured out about the command can be found > here: https://github.com/etnaviv/etna_viv/blob/master/rnndb/cmdstream.xml#L270 > > This command is not allowed currently by the DRM driver because it > was not known before. This patch enables parsing it in command > streams and allows using it by userspace drivers. > > Signed-off-by: Wladimir J. van der Laan On that note, can we finally get the etnaviv driver merged to upstream, like it should have been months ago? I know there's the excuse that the display vs. render node thing in egl isn't fixed yet, but afaiui Xorg prime and gpu-only providers have this all working, so really this isn't a reason, just a very weak excuse. And even on the egl side the driver should be perfectly useable as a rendering-only thing (for piglitting or whatever). Uabi is supposed to be merged only when the userspace side is ready, so really admit that it _is_ ready and just land it in mesa. Out of tree drivers are nonsense imo, no matter whether it's the kernel or mesa tree. Adding Dave too. -Daniel > --- > drivers/gpu/drm/etnaviv/cmdstream.xml.h | 60 > ++-- > drivers/gpu/drm/etnaviv/etnaviv_cmd_parser.c | 1 + > 2 files changed, 57 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/etnaviv/cmdstream.xml.h > b/drivers/gpu/drm/etnaviv/cmdstream.xml.h > index 8c44ba9..65f1ba1 100644 > --- a/drivers/gpu/drm/etnaviv/cmdstream.xml.h > +++ b/drivers/gpu/drm/etnaviv/cmdstream.xml.h > @@ -8,10 +8,34 @@ This file was generated by the rules-ng-ng headergen tool > in this git repository > git clone git://0x04.net/rules-ng-ng > > The rules-ng-ng source files this header was generated from are: > -- cmdstream.xml ( 12589 bytes, from 2014-02-17 14:57:56) > -- common.xml( 18437 bytes, from 2015-03-25 11:27:41) > - > -Copyright (C) 2014 > +- cmdstream.xml ( 14094 bytes, from 2016-11-11 06:55:14) > +- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) > +- common.xml( 23344 bytes, from 2016-11-10 15:14:07) > + > +Copyright (C) 2012-2016 by the following authors: > +- Wladimir J. van der Laan > +- Christian Gmeiner > +- Lucas Stach > +- Russell King > + > +Permission is hereby granted, free of charge, to any person obtaining a > +copy of this software and associated documentation files (the "Software"), > +to deal in the Software without restriction, including without limitation > +the rights to use, copy, modify, merge, publish, distribute, sub license, > +and/or sell copies of the Software, and to permit persons to whom the > +Software is furnished to do so, subject to the following conditions: > + > +The above copyright notice and this permission notice (including the > +next paragraph) shall be included in all copies or substantial portions > +of the Software. > + > +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL > +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > +DEALINGS IN THE SOFTWARE. > */ > > > @@ -26,6 +50,7 @@ Copyright (C) 2014 > #define FE_OPCODE_STALL > 0x0009 > #define FE_OPCODE_CALL > 0x000a > #define FE_OPCODE_RETURN 0x000b > +#define FE_OPCODE_DRAW_INSTANCED 0x000c > #define FE_OPCODE_CHIP_SELECT > 0x000d > #define PRIMITIVE_TYPE_POINTS > 0x0001 > #define PRIMITIVE_TYPE_LINES 0x0002 > @@ -214,5 +239,32 @@ Copyright (C) 2014 > #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 > 0x0002 > #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 > 0x0001 > > +#define VIV_FE_DRAW_INSTANCED > 0x > + > +#define VIV_FE_DRAW_INSTANCED_HEADER 0x > +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__MASK > 0xf800 > +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__SHIFT 27 > +#define VIV_FE_DRAW_INSTANCED_HEADER_OP_DRAW_INSTANCED > 0x6000 > +#define VIV_FE_DRAW_INSTANCED_HEADER_INDEXED 0x0010 > +#define VIV_FE_DRAW_INSTANCED_HEADER_TYPE__MASK > 0x000f > +#define VIV_FE_DRAW_INSTANCED_HEADER_TYPE__SH
[PATCH] drm/etnaviv: Allow DRAW_INSTANCED commands
On Sat, Nov 12, 2016 at 8:30 AM, Daniel Vetter wrote: > On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote: >> Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED command in the >> command stream to draw a number of instances of the same geometry. >> >> The information that has been figured out about the command can be found >> here: >> https://github.com/etnaviv/etna_viv/blob/master/rnndb/cmdstream.xml#L270 >> >> This command is not allowed currently by the DRM driver because it >> was not known before. This patch enables parsing it in command >> streams and allows using it by userspace drivers. >> >> Signed-off-by: Wladimir J. van der Laan > > On that note, can we finally get the etnaviv driver merged to upstream, > like it should have been months ago? I know there's the excuse that the > display vs. render node thing in egl isn't fixed yet, but afaiui Xorg > prime and gpu-only providers have this all working, so really this isn't a > reason, just a very weak excuse. And even on the egl side the driver > should be perfectly useable as a rendering-only thing (for piglitting or > whatever). Uabi is supposed to be merged only when the userspace side is > ready, so really admit that it _is_ ready and just land it in mesa. Out of > tree drivers are nonsense imo, no matter whether it's the kernel or mesa > tree. +1 BR, -R > Adding Dave too. > -Daniel > >> --- >> drivers/gpu/drm/etnaviv/cmdstream.xml.h | 60 >> ++-- >> drivers/gpu/drm/etnaviv/etnaviv_cmd_parser.c | 1 + >> 2 files changed, 57 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/etnaviv/cmdstream.xml.h >> b/drivers/gpu/drm/etnaviv/cmdstream.xml.h >> index 8c44ba9..65f1ba1 100644 >> --- a/drivers/gpu/drm/etnaviv/cmdstream.xml.h >> +++ b/drivers/gpu/drm/etnaviv/cmdstream.xml.h >> @@ -8,10 +8,34 @@ This file was generated by the rules-ng-ng headergen tool >> in this git repository >> git clone git://0x04.net/rules-ng-ng >> >> The rules-ng-ng source files this header was generated from are: >> -- cmdstream.xml ( 12589 bytes, from 2014-02-17 14:57:56) >> -- common.xml( 18437 bytes, from 2015-03-25 11:27:41) >> - >> -Copyright (C) 2014 >> +- cmdstream.xml ( 14094 bytes, from 2016-11-11 06:55:14) >> +- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) >> +- common.xml( 23344 bytes, from 2016-11-10 15:14:07) >> + >> +Copyright (C) 2012-2016 by the following authors: >> +- Wladimir J. van der Laan >> +- Christian Gmeiner >> +- Lucas Stach >> +- Russell King >> + >> +Permission is hereby granted, free of charge, to any person obtaining a >> +copy of this software and associated documentation files (the "Software"), >> +to deal in the Software without restriction, including without limitation >> +the rights to use, copy, modify, merge, publish, distribute, sub license, >> +and/or sell copies of the Software, and to permit persons to whom the >> +Software is furnished to do so, subject to the following conditions: >> + >> +The above copyright notice and this permission notice (including the >> +next paragraph) shall be included in all copies or substantial portions >> +of the Software. >> + >> +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR >> +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >> +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL >> +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER >> +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >> +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER >> +DEALINGS IN THE SOFTWARE. >> */ >> >> >> @@ -26,6 +50,7 @@ Copyright (C) 2014 >> #define FE_OPCODE_STALL >> 0x0009 >> #define FE_OPCODE_CALL >> 0x000a >> #define FE_OPCODE_RETURN 0x000b >> +#define FE_OPCODE_DRAW_INSTANCED 0x000c >> #define FE_OPCODE_CHIP_SELECT >> 0x000d >> #define PRIMITIVE_TYPE_POINTS >> 0x0001 >> #define PRIMITIVE_TYPE_LINES 0x0002 >> @@ -214,5 +239,32 @@ Copyright (C) 2014 >> #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 >> 0x0002 >> #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 >> 0x0001 >> >> +#define VIV_FE_DRAW_INSTANCED >> 0x >> + >> +#define VIV_FE_DRAW_INSTANCED_HEADER 0x >> +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__MASK >> 0xf800 >> +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__SHIFT 27 >> +#define VIV_FE_DRAW_INSTANCED_HEADER_OP_DRAW_INSTANCED >> 0x6000 >> +#define VIV_FE_DRAW_INSTANCED
[PATCH] drm/etnaviv: Allow DRAW_INSTANCED commands
On Sat, Nov 12, 2016 at 3:01 PM, Rob Clark wrote: > On Sat, Nov 12, 2016 at 8:30 AM, Daniel Vetter wrote: >> On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote: >>> Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED command in the >>> command stream to draw a number of instances of the same geometry. >>> >>> The information that has been figured out about the command can be found >>> here: >>> https://github.com/etnaviv/etna_viv/blob/master/rnndb/cmdstream.xml#L270 >>> >>> This command is not allowed currently by the DRM driver because it >>> was not known before. This patch enables parsing it in command >>> streams and allows using it by userspace drivers. >>> >>> Signed-off-by: Wladimir J. van der Laan >> >> On that note, can we finally get the etnaviv driver merged to upstream, >> like it should have been months ago? I know there's the excuse that the >> display vs. render node thing in egl isn't fixed yet, but afaiui Xorg >> prime and gpu-only providers have this all working, so really this isn't a >> reason, just a very weak excuse. And even on the egl side the driver >> should be perfectly useable as a rendering-only thing (for piglitting or >> whatever). Uabi is supposed to be merged only when the userspace side is >> ready, so really admit that it _is_ ready and just land it in mesa. Out of >> tree drivers are nonsense imo, no matter whether it's the kernel or mesa >> tree. > > +1 Coffee started kicking in, and I realized that mesa and a bunch more folks should be on cc here. -Daniel > > BR, > -R > >> Adding Dave too. >> -Daniel >> >>> --- >>> drivers/gpu/drm/etnaviv/cmdstream.xml.h | 60 >>> ++-- >>> drivers/gpu/drm/etnaviv/etnaviv_cmd_parser.c | 1 + >>> 2 files changed, 57 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/etnaviv/cmdstream.xml.h >>> b/drivers/gpu/drm/etnaviv/cmdstream.xml.h >>> index 8c44ba9..65f1ba1 100644 >>> --- a/drivers/gpu/drm/etnaviv/cmdstream.xml.h >>> +++ b/drivers/gpu/drm/etnaviv/cmdstream.xml.h >>> @@ -8,10 +8,34 @@ This file was generated by the rules-ng-ng headergen tool >>> in this git repository >>> git clone git://0x04.net/rules-ng-ng >>> >>> The rules-ng-ng source files this header was generated from are: >>> -- cmdstream.xml ( 12589 bytes, from 2014-02-17 14:57:56) >>> -- common.xml( 18437 bytes, from 2015-03-25 11:27:41) >>> - >>> -Copyright (C) 2014 >>> +- cmdstream.xml ( 14094 bytes, from 2016-11-11 06:55:14) >>> +- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) >>> +- common.xml( 23344 bytes, from 2016-11-10 15:14:07) >>> + >>> +Copyright (C) 2012-2016 by the following authors: >>> +- Wladimir J. van der Laan >>> +- Christian Gmeiner >>> +- Lucas Stach >>> +- Russell King >>> + >>> +Permission is hereby granted, free of charge, to any person obtaining a >>> +copy of this software and associated documentation files (the "Software"), >>> +to deal in the Software without restriction, including without limitation >>> +the rights to use, copy, modify, merge, publish, distribute, sub license, >>> +and/or sell copies of the Software, and to permit persons to whom the >>> +Software is furnished to do so, subject to the following conditions: >>> + >>> +The above copyright notice and this permission notice (including the >>> +next paragraph) shall be included in all copies or substantial portions >>> +of the Software. >>> + >>> +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR >>> +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >>> +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL >>> +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER >>> +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING >>> +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER >>> +DEALINGS IN THE SOFTWARE. >>> */ >>> >>> >>> @@ -26,6 +50,7 @@ Copyright (C) 2014 >>> #define FE_OPCODE_STALL >>> 0x0009 >>> #define FE_OPCODE_CALL >>> 0x000a >>> #define FE_OPCODE_RETURN 0x000b >>> +#define FE_OPCODE_DRAW_INSTANCED 0x000c >>> #define FE_OPCODE_CHIP_SELECT >>> 0x000d >>> #define PRIMITIVE_TYPE_POINTS >>> 0x0001 >>> #define PRIMITIVE_TYPE_LINES 0x0002 >>> @@ -214,5 +239,32 @@ Copyright (C) 2014 >>> #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 >>> 0x0002 >>> #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 >>> 0x0001 >>> >>> +#define VIV_FE_DRAW_INSTANCED >>> 0x >>> + >>> +#define VIV_FE_DRAW_INSTANCED_HEADER 0x >>> +#define VI
[PATCH] drm/etnaviv: Allow DRAW_INSTANCED commands
2016-11-12 15:02 GMT+01:00 Daniel Vetter : > On Sat, Nov 12, 2016 at 3:01 PM, Rob Clark wrote: >> On Sat, Nov 12, 2016 at 8:30 AM, Daniel Vetter wrote: >>> On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote: Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED command in the command stream to draw a number of instances of the same geometry. The information that has been figured out about the command can be found here: https://github.com/etnaviv/etna_viv/blob/master/rnndb/cmdstream.xml#L270 This command is not allowed currently by the DRM driver because it was not known before. This patch enables parsing it in command streams and allows using it by userspace drivers. Signed-off-by: Wladimir J. van der Laan >>> >>> On that note, can we finally get the etnaviv driver merged to upstream, >>> like it should have been months ago? I know there's the excuse that the >>> display vs. render node thing in egl isn't fixed yet, but afaiui Xorg >>> prime and gpu-only providers have this all working, so really this isn't a >>> reason, just a very weak excuse. And even on the egl side the driver >>> should be perfectly useable as a rendering-only thing (for piglitting or >>> whatever). Uabi is supposed to be merged only when the userspace side is >>> ready, so really admit that it _is_ ready and just land it in mesa. Out of >>> tree drivers are nonsense imo, no matter whether it's the kernel or mesa >>> tree. >> >> +1 > > Coffee started kicking in, and I realized that mesa and a bunch more > folks should be on cc here. Expect mesa patches for next week. greets -- Christian Gmeiner, MSc https://soundcloud.com/christian-gmeiner > -Daniel > > >> >> BR, >> -R >> >>> Adding Dave too. >>> -Daniel >>> --- drivers/gpu/drm/etnaviv/cmdstream.xml.h | 60 ++-- drivers/gpu/drm/etnaviv/etnaviv_cmd_parser.c | 1 + 2 files changed, 57 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/cmdstream.xml.h b/drivers/gpu/drm/etnaviv/cmdstream.xml.h index 8c44ba9..65f1ba1 100644 --- a/drivers/gpu/drm/etnaviv/cmdstream.xml.h +++ b/drivers/gpu/drm/etnaviv/cmdstream.xml.h @@ -8,10 +8,34 @@ This file was generated by the rules-ng-ng headergen tool in this git repository git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: -- cmdstream.xml ( 12589 bytes, from 2014-02-17 14:57:56) -- common.xml( 18437 bytes, from 2015-03-25 11:27:41) - -Copyright (C) 2014 +- cmdstream.xml ( 14094 bytes, from 2016-11-11 06:55:14) +- copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) +- common.xml( 23344 bytes, from 2016-11-10 15:14:07) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. */ @@ -26,6 +50,7 @@ Copyright (C) 2014 #define FE_OPCODE_STALL 0x0009 #define FE_OPCODE_CALL 0x000a #define FE_OPCODE_RETURN 0x000b +#define FE_OPCODE_DRAW_INSTANCED 0x000c #define FE_OPCODE_CHIP_SELECT 0x000d #define PRIMITIVE_TYPE_POINTS 0x0001 #define PRIMITIVE_TYPE_LINES 0x0002 @@ -214,5 +239,32 @@ Copyright (C) 2014 #define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 0x0002 #define
[PATCH] amdkfd: fix spelling mistake in kfd_ioctl_dbg_unrgesiter
From: Colin Ian King
Trivial fix to spelling mistake, rename kfd_ioctl_dbg_unrgesiter
to kfd_ioctl_dbg_unregister
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index ee3e04e..6316aad 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -486,7 +486,7 @@ static int kfd_ioctl_dbg_register(struct file *filep,
return status;
}
-static int kfd_ioctl_dbg_unrgesiter(struct file *filep,
+static int kfd_ioctl_dbg_unregister(struct file *filep,
struct kfd_process *p, void *data)
{
struct kfd_ioctl_dbg_unregister_args *args = data;
@@ -498,7 +498,7 @@ static int kfd_ioctl_dbg_unrgesiter(struct file *filep,
return -EINVAL;
if (dev->device_info->asic_family == CHIP_CARRIZO) {
- pr_debug("kfd_ioctl_dbg_unrgesiter not supported on CZ\n");
+ pr_debug("kfd_ioctl_dbg_unregister not supported on CZ\n");
return -EINVAL;
}
@@ -892,7 +892,7 @@ static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = {
kfd_ioctl_dbg_register, 0),
AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER,
- kfd_ioctl_dbg_unrgesiter, 0),
+ kfd_ioctl_dbg_unregister, 0),
AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH,
kfd_ioctl_dbg_address_watch, 0),
--
2.10.2
[PATCH] drm/vc4: Add threading support
From: Jonas Pfeil
Add support for threaded fragment shaders. The validation code checks
for thread switch signals and ensures that the registers of the other
thread are not touched, and that our clamps are not live across thread
switches. It also checks that the threading and branching
instructions do not interfere.
(Original patch by Jonas, changes by anholt for style cleanup,
removing validation the kernel doesn't need to do, and adding the flag
for userspace).
Signed-off-by: Jonas Pfeil
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_drv.c | 1 +
drivers/gpu/drm/vc4/vc4_drv.h | 2 +
drivers/gpu/drm/vc4/vc4_validate.c | 17 +---
drivers/gpu/drm/vc4/vc4_validate_shaders.c | 62 ++
include/uapi/drm/vc4_drm.h | 1 +
5 files changed, 78 insertions(+), 5 deletions(-)
mode change 100644 => 100755 drivers/gpu/drm/vc4/vc4_validate.c
mode change 100644 => 100755 drivers/gpu/drm/vc4/vc4_validate_shaders.c
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index 7abfe088f2d1..86aabf6d0f79 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -82,6 +82,7 @@ static int vc4_get_param_ioctl(struct drm_device *dev, void
*data,
break;
case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
case DRM_VC4_PARAM_SUPPORTS_ETC1:
+ case DRM_VC4_PARAM_SUPPORTS_THREADED_FS:
args->value = true;
break;
default:
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 7c1e4d97486f..fef172804345 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -381,6 +381,8 @@ struct vc4_validated_shader_info {
uint32_t num_uniform_addr_offsets;
uint32_t *uniform_addr_offsets;
+
+ bool is_threaded;
};
/**
diff --git a/drivers/gpu/drm/vc4/vc4_validate.c
b/drivers/gpu/drm/vc4/vc4_validate.c
old mode 100644
new mode 100755
index e18f88203d32..9fd171c361c2
--- a/drivers/gpu/drm/vc4/vc4_validate.c
+++ b/drivers/gpu/drm/vc4/vc4_validate.c
@@ -789,11 +789,6 @@ validate_gl_shader_rec(struct drm_device *dev,
exec->shader_rec_v += roundup(packet_size, 16);
exec->shader_rec_size -= packet_size;
- if (!(*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD)) {
- DRM_ERROR("Multi-threaded fragment shaders not supported.\n");
- return -EINVAL;
- }
-
for (i = 0; i < shader_reloc_count; i++) {
if (src_handles[i] > exec->bo_count) {
DRM_ERROR("Shader handle %d too big\n", src_handles[i]);
@@ -810,6 +805,18 @@ validate_gl_shader_rec(struct drm_device *dev,
return -EINVAL;
}
+ if (((*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD) == 0) !=
+ to_vc4_bo(&bo[0]->base)->validated_shader->is_threaded) {
+ DRM_ERROR("Thread mode of CL and FS do not match\n");
+ return -EINVAL;
+ }
+
+ if (to_vc4_bo(&bo[1]->base)->validated_shader->is_threaded ||
+ to_vc4_bo(&bo[2]->base)->validated_shader->is_threaded) {
+ DRM_ERROR("cs and vs cannot be threaded\n");
+ return -EINVAL;
+ }
+
for (i = 0; i < shader_reloc_count; i++) {
struct vc4_validated_shader_info *validated_shader;
uint32_t o = shader_reloc_offsets[i];
diff --git a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
old mode 100644
new mode 100755
index 917321ce832f..90e94ef116b2
--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
@@ -83,6 +83,13 @@ struct vc4_shader_validation_state {
* basic blocks.
*/
bool needs_uniform_address_for_loop;
+
+ /* Set when we find an instruction writing the top half of the
+* register files. If we allowed writing the unusable regs in
+* a threaded shader, then the other shader running on our
+* QPU's clamp validation would be invalid.
+*/
+ bool all_registers_used;
};
static uint32_t
@@ -119,6 +126,13 @@ raddr_add_a_to_live_reg_index(uint64_t inst)
}
static bool
+live_reg_is_upper_half(uint32_t lri)
+{
+ return (lri >= 16 && lri < 32) ||
+ (lri >= 32 + 16 && lri < 32 + 32);
+}
+
+static bool
is_tmu_submit(uint32_t waddr)
{
return (waddr == QPU_W_TMU0_S ||
@@ -390,6 +404,9 @@ check_reg_write(struct vc4_validated_shader_info
*validated_shader,
} else {
validation_state->live_immediates[lri] = ~0;
}
+
+ if (live_reg_is_upper_half(lri))
+ validation_state->all_registers_used = true;
}
switch (waddr) {
@@ -597,6 +614,11 @@ check_instruction_reads(struct vc4_validated_shader_info
*validated_shader,
ret
[PATCH] drm/sun4i: constify component_ops structures
These component_ops structures are only used as the second argument to
component_add and component_del, which are declared as const, so the
structures can be declared as const as well.
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct component_ops i at p = { ... };
@ok1@
identifier r.i;
expression e1;
position p;
@@
component_add(e1,&i at p)
@ok2@
identifier r.i;
expression e1;
position p;
@@
component_del(e1, &i at p)
@bad@
position p != {r.p,ok1.p,ok2.p};
identifier r.i;
struct component_ops e;
@@
e at i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct component_ops i = { ... };
//
The result of the size command before the change is (arm):
text data bss dec hex filename
5266236 85510 1586 sun4i_backend.o
6393236 86637 19ed sun4i_tcon.o
3700368 84076 fec sun4i_tv.o
1668108 01776 6f0 sun6i_drc.o
and after the change:
text data bss dec hex filename
5274228 855101586 sun4i_backend.o
6401228 8663719ed sun4i_tcon.o
3708360 84076 fec sun4i_tv.o
1676100 01776 6f0 sun6i_drc.o
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/sun4i/sun4i_backend.c |2 +-
drivers/gpu/drm/sun4i/sun4i_tcon.c|2 +-
drivers/gpu/drm/sun4i/sun4i_tv.c |2 +-
drivers/gpu/drm/sun4i/sun6i_drc.c |2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 7eb2a96..2e08f96 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -409,7 +409,7 @@ static void sun4i_backend_unbind(struct device *dev, struct
device *master,
reset_control_assert(backend->reset);
}
-static struct component_ops sun4i_backend_ops = {
+static const struct component_ops sun4i_backend_ops = {
.bind = sun4i_backend_bind,
.unbind = sun4i_backend_unbind,
};
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index c6afb24..ea2906f 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -545,7 +545,7 @@ static void sun4i_tcon_unbind(struct device *dev, struct
device *master,
sun4i_tcon_free_clocks(tcon);
}
-static struct component_ops sun4i_tcon_ops = {
+static const struct component_ops sun4i_tcon_ops = {
.bind = sun4i_tcon_bind,
.unbind = sun4i_tcon_unbind,
};
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 1dd3d9e..d430b331 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -667,7 +667,7 @@ static void sun4i_tv_unbind(struct device *dev, struct
device *master,
clk_disable_unprepare(tv->clk);
}
-static struct component_ops sun4i_tv_ops = {
+static const struct component_ops sun4i_tv_ops = {
.bind = sun4i_tv_bind,
.unbind = sun4i_tv_unbind,
};
diff --git a/drivers/gpu/drm/sun4i/sun6i_drc.c
b/drivers/gpu/drm/sun4i/sun6i_drc.c
index 6ef707c..09bba85 100644
--- a/drivers/gpu/drm/sun4i/sun6i_drc.c
+++ b/drivers/gpu/drm/sun4i/sun6i_drc.c
@@ -80,7 +80,7 @@ static void sun6i_drc_unbind(struct device *dev, struct
device *master,
reset_control_assert(drc->reset);
}
-static struct component_ops sun6i_drc_ops = {
+static const struct component_ops sun6i_drc_ops = {
.bind = sun6i_drc_bind,
.unbind = sun6i_drc_unbind,
};
[Bug 141741] drm:radeon_get_bios [radeon]] *ERROR* Unable to locate a BIOS ROM
https://bugzilla.kernel.org/show_bug.cgi?id=141741 Socrates Archer changed: What|Removed |Added CC||scrt.arc at riseup.net --- Comment #20 from Socrates Archer --- Affected use here as well. Toshiba Satellite c850 on Arch kernel 4.6+ fails during boot journalctl shows this [drm:radeon_get_bios [radeon]] *ERROR* Unable to locate a BIOS ROMradeon :01:00.0: Fatal error during GPU init [drm] radeon: finishing device. -- You are receiving this mail because: You are on the CC list for the bug. You are watching the assignee of the bug.
[Bug 98505] [radeon, amdgpu] Regression introduced in 4.8-rc3
https://bugs.freedesktop.org/show_bug.cgi?id=98505 --- Comment #23 from Peter Wu --- Nayan, as a workaround you may add the pcie_port_pm=force option to your kernel command line, then you should not need the patch. Can you check this? Alex, I don't think that the minimum date should change in 4.8 (and 4.9?) due to the risk of breakage since it is not just limited to amdgpu/radeon. Another concern is that while the year seems a good heuristic, it does not match the checks that Windows 8 performs (which may or may not be an issue): https://msdn.microsoft.com/en-us/windows/hardware/drivers/bringup/firmware-requirements-for-d3cold I'll bring this up with linux-pci developers after the weekend. Should I proceed with proposing workaround amdgpu/radeon patches? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20161112/bf7d7586/attachment.html>
[PATCH v4] drm: move allocation out of drm_get_format_name()
The function's behaviour was changed in 90844f00049e, without changing
its signature, causing people to keep using it the old way without
realising they were now leaking memory.
Rob Clark also noticed it was also allocating GFP_KERNEL memory in
atomic contexts, breaking them.
Instead of having to allocate GFP_ATOMIC memory and fixing the callers
to make them cleanup the memory afterwards, let's change the function's
signature by having the caller take care of the memory and passing it to
the function.
The new parameter is a single-field struct in order to enforce the size
of its buffer and help callers to correctly manage their memory.
Fixes: 90844f00049e ("drm: make drm_get_format_name thread-safe")
Cc: Rob Clark
Cc: Christian König
Acked-by: Christian König
Acked-by: Rob Clark
Acked-by: Sinclair Yeh (vmwgfx)
Reviewed-by: Jani Nikula
Suggested-by: Ville Syrjälä
Signed-off-by: Eric Engestrom
---
v4 - rebase on drm-next (d8c1abd968f1c880ad8c)
- add missed `const` to the return value
v3 - fix "Fixes" tag, replace it with an actual commit message
- collect ack & r-b
v2 - use single-field struct instead of typedef to let the compiler
enforce the type (Christian König)
---
include/drm/drm_fourcc.h| 10 +-
drivers/gpu/drm/drm_fourcc.c| 14 +++--
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 7 ++---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 7 ++---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 3 +-
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 7 ++---
drivers/gpu/drm/drm_atomic.c| 10 +++---
drivers/gpu/drm/drm_crtc.c | 7 +++--
drivers/gpu/drm/drm_framebuffer.c | 7 +++--
drivers/gpu/drm/drm_modeset_helper.c| 7 +++--
drivers/gpu/drm/drm_plane.c | 7 +++--
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 7 ++---
drivers/gpu/drm/i915/i915_debugfs.c | 10 +++---
drivers/gpu/drm/i915/intel_atomic_plane.c | 8 ++---
drivers/gpu/drm/i915/intel_display.c| 41 ++---
drivers/gpu/drm/radeon/atombios_crtc.c | 14 -
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 3 +-
17 files changed, 82 insertions(+), 87 deletions(-)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index dc0aafa..fcc08da 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -45,6 +45,14 @@ struct drm_format_info {
u8 vsub;
};
+/**
+ * struct drm_format_name_buf - name of a DRM format
+ * @str: string buffer containing the format name
+ */
+struct drm_format_name_buf {
+ char str[32];
+};
+
const struct drm_format_info *__drm_format_info(u32 format);
const struct drm_format_info *drm_format_info(u32 format);
uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth);
@@ -54,6 +62,6 @@ int drm_format_horz_chroma_subsampling(uint32_t format);
int drm_format_vert_chroma_subsampling(uint32_t format);
int drm_format_plane_width(int width, uint32_t format, int plane);
int drm_format_plane_height(int height, uint32_t format, int plane);
-char *drm_get_format_name(uint32_t format) __malloc;
+const char *drm_get_format_name(uint32_t format, struct drm_format_name_buf
*buf);
#endif /* __DRM_FOURCC_H__ */
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index cbb8b77..90d2cc8 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -79,17 +79,13 @@ uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t
depth)
EXPORT_SYMBOL(drm_mode_legacy_fb_format);
/**
- * drm_get_format_name - return a string for drm fourcc format
+ * drm_get_format_name - fill a string with a drm fourcc format's name
* @format: format to compute name of
+ * @buf: caller-supplied buffer
- *
- * Note that the buffer returned by this function is owned by the caller
- * and will need to be freed using kfree().
*/
-char *drm_get_format_name(uint32_t format)
+const char *drm_get_format_name(uint32_t format, struct drm_format_name_buf
*buf)
{
- char *buf = kmalloc(32, GFP_KERNEL);
-
- snprintf(buf, 32,
+ snprintf(buf->str, sizeof(buf->str),
"%c%c%c%c %s-endian (0x%08x)",
printable_char(format & 0xff),
printable_char((format >> 8) & 0xff),
@@ -98,7 +94,7 @@ char *drm_get_format_name(uint32_t format)
format & DRM_FORMAT_BIG_ENDIAN ? "big" : "little",
format);
- return buf;
+ return buf->str;
}
EXPORT_SYMBOL(drm_get_format_name);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 679dd73..65a954c 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2032,7 +2032,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc
*crtc,
u32 tmp, viewport_w, viewport_h;
int r;
bool bypas
[PATCH v6 6/9] drm/hisilicon/hibmc: Add encoder for VDAC
å¨ 2016/11/11 6:20, Sean Paul åé:
> On Fri, Oct 28, 2016 at 3:27 AM, Rongrong Zou
> wrote:
>> Add encoder funcs and helpers for VDAC.
>>
>> Signed-off-by: Rongrong Zou
>> ---
>> drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 6 ++
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 2 +
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 89
>>
>> 4 files changed, 98 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
>>
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> b/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> index 72e107e..e04f114 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> @@ -1,5 +1,5 @@
>> ccflags-y := -Iinclude/drm
>> -hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_fbdev.o
>> hibmc_drm_power.o hibmc_ttm.o
>> +hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o
>> hibmc_drm_fbdev.o hibmc_drm_power.o hibmc_ttm.o
>>
>> obj-$(CONFIG_DRM_HISI_HIBMC) +=hibmc-drm.o
>> #obj-y += hibmc-drm.o
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
>> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
>> index 303cd36..ba191e1 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
>> @@ -125,6 +125,12 @@ static int hibmc_kms_init(struct hibmc_drm_device
>> *hidev)
>> return ret;
>> }
>>
>> + ret = hibmc_encoder_init(hidev);
>> + if (ret) {
>> + DRM_ERROR("failed to init encoder\n");
>> + return ret;
>> + }
>> +
>> return 0;
>> }
>>
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
>> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
>> index 5731ec2..401cea4 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
>> @@ -47,6 +47,7 @@ struct hibmc_drm_device {
>> struct drm_device *dev;
>> struct drm_plane plane;
>> struct drm_crtc crtc;
>> + struct drm_encoder encoder;
>
> Same comment here, you don't need to keep track of this
ok, it can be dealt with like crtc.
>
>> bool mode_config_initialized;
>>
>> /* ttm */
>> @@ -87,6 +88,7 @@ static inline struct hibmc_bo *gem_to_hibmc_bo(struct
>> drm_gem_object *gem)
>>
>> int hibmc_plane_init(struct hibmc_drm_device *hidev);
>> int hibmc_crtc_init(struct hibmc_drm_device *hidev);
>> +int hibmc_encoder_init(struct hibmc_drm_device *hidev);
>> int hibmc_fbdev_init(struct hibmc_drm_device *hidev);
>> void hibmc_fbdev_fini(struct hibmc_drm_device *hidev);
>>
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
>> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
>> new file mode 100644
>> index 000..953f659
>> --- /dev/null
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
>> @@ -0,0 +1,89 @@
>> +/* Hisilicon Hibmc SoC drm driver
>> + *
>> + * Based on the bochs drm driver.
>> + *
>> + * Copyright (c) 2016 Huawei Limited.
>> + *
>> + * Author:
>> + * Rongrong Zou
>> + * Rongrong Zou
>> + * Jianhua Li
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + */
>> +
>> +#include
>> +#include
>> +
>> +#include "hibmc_drm_drv.h"
>> +#include "hibmc_drm_regs.h"
>> +
>> +static int defx = 800;
>> +static int defy = 600;
>> +
>> +module_param(defx, int, 0444);
>> +module_param(defy, int, 0444);
>> +MODULE_PARM_DESC(defx, "default x resolution");
>> +MODULE_PARM_DESC(defy, "default y resolution");
>
> Not used, and I'm not sure these are a good idea
it is used in following patch, i think it is put in wrong place.
>
>> +
>> +static void hibmc_encoder_disable(struct drm_encoder *encoder)
>> +{
>> +}
>> +
>> +static void hibmc_encoder_enable(struct drm_encoder *encoder)
>> +{
>> +}
>
> Null-checked, no need to stub
thanks for pointing it out.
>
>> +
>> +static void hibmc_encoder_mode_set(struct drm_encoder *encoder,
>> + struct drm_display_mode *mode,
>> + struct drm_display_mode *adj_mode)
>> +{
>> + u32 reg;
>> + struct drm_device *dev = encoder->dev;
>> + struct hibmc_drm_device *hidev = dev->dev_private;
>> +
>> + /* just open DISPLAY_CONTROL_HISILE register bit 3:0*/
>> + reg = readl(hidev->mmio + DISPLAY_CONTROL_HISILE);
>> + reg |= 0xf;
>
> Can you just pull this into a #define instead of explaining in the comment?
ok, thanks.
>
>> + writel(reg, hidev->mmio + DISPLAY_CONTROL_HISILE);
>> +}
>> +
>> +static int hibmc_encoder_atomic_ch
[PATCH 1/1 linux-next] drm/nouveau: don't opencode IS_REACHABLE()
Signed-off-by: Fabian Frederick
---
drivers/gpu/drm/nouveau/nouveau_hwmon.c | 6 +++---
drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
index 71f764b..ddfac0b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
@@ -37,7 +37,7 @@
#include
#include
-#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
+#if IS_REACHABLE(CONFIG_HWMON)
static ssize_t
nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char
*buf)
{
@@ -662,7 +662,7 @@ static const struct attribute_group hwmon_power_attrgroup =
{
int
nouveau_hwmon_init(struct drm_device *dev)
{
-#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
+#if IS_REACHABLE(CONFIG_HWMON)
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvkm_therm *therm = nvxx_therm(&drm->device);
struct nvkm_volt *volt = nvxx_volt(&drm->device);
@@ -749,7 +749,7 @@ nouveau_hwmon_init(struct drm_device *dev)
void
nouveau_hwmon_fini(struct drm_device *dev)
{
-#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
+#if IS_REACHABLE(CONFIG_HWMON)
struct nouveau_hwmon *hwmon = nouveau_hwmon(dev);
if (hwmon->hwmon) {
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
index df2dd08..8de914c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h
@@ -1,5 +1,5 @@
#include "priv.h"
-#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE))
+#if IS_REACHABLE(CONFIG_AGP)
#ifndef __NVKM_PCI_AGP_H__
#define __NVKM_PCI_AGP_H__
--
2.7.4
[PATCH v6 5/9] drm/hisilicon/hibmc: Add crtc for DE
å¨ 2016/11/11 6:14, Sean Paul åé:
> On Fri, Oct 28, 2016 at 3:27 AM, Rongrong Zou
> wrote:
>> Add crtc funcs and helper funcs for DE.
>>
>> Signed-off-by: Rongrong Zou
>> ---
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 318
>>
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 6 +
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 2 +
>> 3 files changed, 326 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> index 9c1a68c..9b5d0d0 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> @@ -23,6 +23,7 @@
>>
>> #include "hibmc_drm_drv.h"
>> #include "hibmc_drm_regs.h"
>> +#include "hibmc_drm_de.h"
>> #include "hibmc_drm_power.h"
>
> nit: alphabetize
ok, thanks.
>
>>
>> /* --
>> */
>
> Remove
will do, thanks.
>
>> @@ -168,3 +169,320 @@ int hibmc_plane_init(struct hibmc_drm_device *hidev)
>> drm_plane_helper_add(plane, &hibmc_plane_helper_funcs);
>> return 0;
>> }
>> +
>> +static void hibmc_crtc_enable(struct drm_crtc *crtc)
>> +{
>> + unsigned int reg;
>> + /* power mode 0 is default. */
>
> This comment seems to be in the wrong place
will remove it, thanks.
>
>> + struct hibmc_drm_device *hidev = crtc->dev->dev_private;
>> +
>> + hibmc_set_power_mode(hidev, HIBMC_PW_MODE_CTL_MODE_MODE0);
>> +
>> + /* Enable display power gate & LOCALMEM power gate*/
>> + reg = readl(hidev->mmio + HIBMC_CURRENT_GATE);
>> + reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
>> + reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
>> + reg |= HIBMC_CURR_GATE_LOCALMEM(ON);
>> + reg |= HIBMC_CURR_GATE_DISPLAY(ON);
>> + hibmc_set_current_gate(hidev, reg);
>> + drm_crtc_vblank_on(crtc);
>> +}
>> +
>> +static void hibmc_crtc_disable(struct drm_crtc *crtc)
>> +{
>> + unsigned int reg;
>> + struct hibmc_drm_device *hidev = crtc->dev->dev_private;
>> +
>> + drm_crtc_vblank_off(crtc);
>> +
>> + hibmc_set_power_mode(hidev, HIBMC_PW_MODE_CTL_MODE_SLEEP);
>> +
>> + /* Enable display power gate & LOCALMEM power gate*/
>> + reg = readl(hidev->mmio + HIBMC_CURRENT_GATE);
>> + reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
>> + reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
>> + reg |= HIBMC_CURR_GATE_LOCALMEM(OFF);
>> + reg |= HIBMC_CURR_GATE_DISPLAY(OFF);
>> + hibmc_set_current_gate(hidev, reg);
>> +}
>> +
>> +static int hibmc_crtc_atomic_check(struct drm_crtc *crtc,
>> + struct drm_crtc_state *state)
>> +{
>> + return 0;
>> +}
>
> Caller NULL-checks, no need for stub
thanks for pointing it out.
>
>> +
>> +static unsigned int format_pll_reg(void)
>> +{
>> + unsigned int pllreg = 0;
>> + struct panel_pll pll = {0};
>> +
>> + /* Note that all PLL's have the same format. Here,
>> +* we just use Panel PLL parameter to work out the bit
>> +* fields in the register.On returning a 32 bit number, the value can
>> +* be applied to any PLL in the calling function.
>> +*/
>> + pllreg |= HIBMC_PLL_CTRL_BYPASS(OFF) & HIBMC_PLL_CTRL_BYPASS_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_POWER(ON) & HIBMC_PLL_CTRL_POWER_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_INPUT(OSC) & HIBMC_PLL_CTRL_INPUT_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_POD(pll.POD) & HIBMC_PLL_CTRL_POD_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_OD(pll.OD) & HIBMC_PLL_CTRL_OD_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_N(pll.N) & HIBMC_PLL_CTRL_N_MASK;
>> + pllreg |= HIBMC_PLL_CTRL_M(pll.M) & HIBMC_PLL_CTRL_M_MASK;
>> +
>> + return pllreg;
>> +}
>> +
>> +static void set_vclock_hisilicon(struct drm_device *dev, unsigned long pll)
>> +{
>> + unsigned long tmp0, tmp1;
>> + struct hibmc_drm_device *hidev = dev->dev_private;
>> +
>> + /* 1. outer_bypass_n=0 */
>> + tmp0 = readl(hidev->mmio + CRT_PLL1_HS);
>> + tmp0 &= 0xBFFF;
>> + writel(tmp0, hidev->mmio + CRT_PLL1_HS);
>> +
>> + /* 2. pll_pd=1?inter_bypass=1 */
>> + writel(0x2100, hidev->mmio + CRT_PLL1_HS);
>> +
>> + /* 3. config pll */
>> + writel(pll, hidev->mmio + CRT_PLL1_HS);
>> +
>> + /* 4. delay */
>> + mdelay(1);
>
> These should be usleep_range() see
> https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
This looks better to me. i think a 'usleep_range(1000, 2000)' is ok.
>
>> +
>> + /* 5. pll_pd =0 */
>> + tmp1 = pll & ~0x0100;
>> + writel(tmp1, hidev->mmio + CRT_PLL1_HS);
>> +
>> + /* 6. delay */
>> + mdelay(1);
>> +
>> + /* 7. inter_bypass=0 */
>> + tmp1 &= ~0x2000;
>> + writel(tmp1, hidev->mmio + CRT_PLL1_HS);
>> +
>> + /* 8. delay */
>> + mdelay(1);
>> +
>> + /* 9
[PATCH v6 4/9] drm/hisilicon/hibmc: Add plane for DE
å¨ 2016/11/11 5:53, Sean Paul åé:
> On Fri, Oct 28, 2016 at 3:27 AM, Rongrong Zou
> wrote:
>> Add plane funcs and helper funcs for DE.
>>
>> Signed-off-by: Rongrong Zou
>> ---
>> drivers/gpu/drm/hisilicon/hibmc/Kconfig | 1 +
>> drivers/gpu/drm/hisilicon/hibmc/Makefile| 2 +-
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 170
>>
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.h | 29
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 51 ++-
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 5 +
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 6 +
>> 7 files changed, 261 insertions(+), 3 deletions(-)
>> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.h
>>
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Kconfig
>> b/drivers/gpu/drm/hisilicon/hibmc/Kconfig
>> index bcb8c18..380622a 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/Kconfig
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/Kconfig
>> @@ -1,6 +1,7 @@
>> config DRM_HISI_HIBMC
>> tristate "DRM Support for Hisilicon Hibmc"
>> depends on DRM && PCI
>> + select DRM_KMS_HELPER
>> select DRM_TTM
>>
>> help
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> b/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> index 810a37e..72e107e 100644
>> --- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
>> @@ -1,5 +1,5 @@
>> ccflags-y := -Iinclude/drm
>> -hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_fbdev.o hibmc_drm_power.o
>> hibmc_ttm.o
>> +hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_fbdev.o
>> hibmc_drm_power.o hibmc_ttm.o
>>
>> obj-$(CONFIG_DRM_HISI_HIBMC) +=hibmc-drm.o
>> #obj-y += hibmc-drm.o
>> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> new file mode 100644
>> index 000..9c1a68c
>> --- /dev/null
>> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
>> @@ -0,0 +1,170 @@
>> +/* Hisilicon Hibmc SoC drm driver
>> + *
>> + * Based on the bochs drm driver.
>> + *
>> + * Copyright (c) 2016 Huawei Limited.
>> + *
>> + * Author:
>> + * Rongrong Zou
>> + * Rongrong Zou
>> + * Jianhua Li
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#include "hibmc_drm_drv.h"
>> +#include "hibmc_drm_regs.h"
>> +#include "hibmc_drm_power.h"
>> +
>> +/* -- */
>
> Remove
ok, will do, thanks.
>
>> +
>> +static int hibmc_plane_atomic_check(struct drm_plane *plane,
>> + struct drm_plane_state *state)
>> +{
>> + struct drm_framebuffer *fb = state->fb;
>> + struct drm_crtc *crtc = state->crtc;
>> + struct drm_crtc_state *crtc_state;
>> + u32 src_x = state->src_x >> 16;
>> + u32 src_y = state->src_y >> 16;
>> + u32 src_w = state->src_w >> 16;
>> + u32 src_h = state->src_h >> 16;
>> + int crtc_x = state->crtc_x;
>> + int crtc_y = state->crtc_y;
>> + u32 crtc_w = state->crtc_w;
>> + u32 crtc_h = state->crtc_h;
>
> I don't think you gain anything with the crtc_* vars
It would work well, but looks redundant and not simple enough,
will delete them, thanks.
>
>> +
>> + if (!crtc || !fb)
>> + return 0;
>> +
>> + crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
>> + if (IS_ERR(crtc_state))
>> + return PTR_ERR(crtc_state);
>> +
>> + if (src_w != crtc_w || src_h != crtc_h) {
>> + DRM_ERROR("Scale not support!!!\n");
>
> I like the enthusiasm, but I think DRM_DEBUG_ATOMIC would be better
I'm sorry, can you explain why here should be an DRM_DEBUG_ATOMIC,
when this condition is hit, it is really an error and atomic_commit will
abort with failure.
>
>> + return -EINVAL;
>> + }
>> +
>> + if (src_x + src_w > fb->width ||
>> + src_y + src_h > fb->height)
>
> These should be already covered in drm_atomic_plane_check
understood, thanks.
>
>> + return -EINVAL;
>> +
>> + if (crtc_x < 0 || crtc_y < 0)
>
> Print DRM_DEBUG_ATOMIC message here
agreed. thanks.
>
>> + return -EINVAL;
>> +
>> + if (crtc_x + crtc_w > crtc_state->adjusted_mode.hdisplay ||
>> + crtc_y + crtc_h > crtc_state->adjusted_mode.vdisplay)
>
> DRM_DEBUG_ATOMIC here too
ditto.
>
>> + return -EINVAL;
>> +
>> + return 0;
>> +}
>> +
>> +static void hibmc_plane_atomic_update(struct drm_plane *plane,
>> +
