[Bug 95451] UVD errors after unsuspending

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95451

Vedran Miletić  changed:

   What|Removed |Added

 CC||rivanvx at gmail.com

--- Comment #1 from Vedran Miletić  ---
I have seen screen corruption on both Tonga and Fiji after resuming from
suspend, will check if I can reproduce this.

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[RFC 1/8] dma-buf/fence: add fence_collection fences

2016-05-18 Thread Christian König
Am 15.04.2016 um 21:25 schrieb Daniel Vetter:
> On Fri, Apr 15, 2016 at 11:27:50AM -0700, Gustavo Padovan wrote:
>> 2016-04-15 Christian König :
>>> Amdgpu also has an implementation for a fence collection which uses a a
>>> hashtable to keep the fences grouped by context (e.g. only the latest fence
>>> is keept for each context). See amdgpu_sync.c for reference.
>>>
>>> We should either make the collection similar in a way that you can add as
>>> many fences as you want (like the amdgpu implementation) or make it static
>>> and only add a fixed number of fences right from the beginning.
>>>
>>> I can certainly see use cases for both, but if you want to stick with a
>>> static approach you should probably call the new object fence_array instead
>>> of fence_collection and do as Daniel suggested.
>> Maybe we can go for something in between. Have fence_collection_init()
>> need at least two fences to create the fence_collection. Then
>> fence_collection_add() would add more dinamically.
> The problem with adding fences later on is that it makes it trivial to add
> deadlocks and loops. Just add the fence collection to itself, boom. From
> that pov it's an unsafe api, and hence something to avoid.
> -Daniel

Any conclusion on this? Did any version of the patch made it upstream?

I'm in the need of an array based fence collection right now as well. 
Any objection that I just take the patch proposed here and fix the 
comments or are you still else working on this right now?

Regards,
Christian.




[PATCH 0/6] ARM: dts: sun5i: q8-common: Enable various peripherals

2016-05-18 Thread Hans de Goede
Hi Chen-Yu,

On 17-05-16 17:56, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This series enables more peripherals for Allwinner A13-based Q8 devices.
> The peripherals include the WiFi, the PMIC's micro-usb power supply
> (driver), audio codec (headphone and speaker), and full display support
> with the new DRM KMS driver. The series is based on parts of Maxime's
> "drm: Add Support for Passive RGB to VGA bridges" series, specifically
> the clk and drm fixes, and common DTS bits.
>
> Hans, since you have a collection of q8 tablets, I'm hoping you could
> test these bits and provide some feedback.

I've not run any tests, just looked at the patches, the stuff in
patch 3 is already present in arch/arm/boot/dts/sun5i-a13-q8-tablet.dts
I put it there because I saw some .fex files which don't use ldo3 for wifi
I'm fine with moving it to -common though, I believe that you're right
that it makes more sense there, having it in 2 places is not really
useful though.

The other patches look good.

Thanks & Regards,

Hans


>
>
> Patch 1 is a small fix for part of the init failure path.
>
> Patch 2 disables ldo5 on the axp209 by default. This regulator output is
> muxed with a gpio, and the regulator on/off settings override the gpio.
>
> Patch 3 enables the USB WiFi module found.
>
> Patch 4 enables the USB/VBUS power supply of the PMIC.
>
> Patch 5 enables the audio codec, with support for the speaker amp.
>
> Patch 6 enables the LCD panel with the display pipeline.
>
>
> Regards
> ChenYu
>
>
> Chen-Yu Tsai (6):
>   drm: sun4i: do cleanup if RGB output init fails
>   ARM: dts: axp209: Disable ldo5 by default
>   ARM: dts: sun5i: q8-common: Enable USB-based WiFi
>   ARM: dts: sun5i: q8-common: Enable USB power supply
>   ARM: dts: sun5i: q8-common: Enable audio codec
>   ARM: dts: sun5i: q8-common: Enable display pipeline and LCD display
>
>  arch/arm/boot/dts/axp209.dtsi  |  1 +
>  arch/arm/boot/dts/sun5i-q8-common.dtsi | 62 
> ++
>  drivers/gpu/drm/sun4i/sun4i_tcon.c |  6 +++-
>  3 files changed, 68 insertions(+), 1 deletion(-)
>


[PATCH] Revert "drm/imx: Remove of_node assignment from ipuv3-crtc driver probe"

2016-05-18 Thread Chris Ruehl
Hi
On Wednesday, May 18, 2016 01:11 AM, Fabio Estevam wrote:
> Commit 407c9eba789767 ("drm/imx: Remove of_node assignment from ipuv3-crtc
> driver probe") causes the IPU to be non-functional, so better to
> revert it to avoid such regression.
>
> This reverts commit 407c9eba789767feb68b42eb2d65db68584e06c0.
>
> Cc:  # 4.4.x
> Signed-off-by: Fabio Estevam 

Revert patch tested with 4.6 - imx6d and imx6dl boards

[2.292032] dwhdmi-imx 12.hdmi: Detected HDMI controller 
0x13:0xa:0xa0:0xc1
[2.305742] imx-drm display-subsystem: bound 12.hdmi (ops 
dw_hdmi_imx_ops)


Regards
Chris

> ---
>   drivers/gpu/drm/imx/ipuv3-crtc.c | 34 ++
>   1 file changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c 
> b/drivers/gpu/drm/imx/ipuv3-crtc.c
> index dee8e8b..006753d 100644
> --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
> +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
> @@ -520,6 +520,28 @@ err_put_resources:
>   return ret;
>   }
>
> +static struct device_node *ipu_drm_get_port_by_id(struct device_node *parent,
> +   int port_id)
> +{
> + struct device_node *port;
> + int id, ret;
> +
> + port = of_get_child_by_name(parent, "port");
> + while (port) {
> + ret = of_property_read_u32(port, "reg", &id);
> + if (!ret && id == port_id)
> + return port;
> +
> + do {
> + port = of_get_next_child(parent, port);
> + if (!port)
> + return NULL;
> + } while (of_node_cmp(port->name, "port"));
> + }
> +
> + return NULL;
> +}
> +
>   static int ipu_drm_bind(struct device *dev, struct device *master, void 
> *data)
>   {
>   struct ipu_client_platformdata *pdata = dev->platform_data;
> @@ -562,11 +584,23 @@ static const struct component_ops ipu_crtc_ops = {
>   static int ipu_drm_probe(struct platform_device *pdev)
>   {
>   struct device *dev = &pdev->dev;
> + struct ipu_client_platformdata *pdata = dev->platform_data;
>   int ret;
>
>   if (!dev->platform_data)
>   return -EINVAL;
>
> + if (!dev->of_node) {
> + /* Associate crtc device with the corresponding DI port node */
> + dev->of_node = ipu_drm_get_port_by_id(dev->parent->of_node,
> +   pdata->di + 2);
> + if (!dev->of_node) {
> + dev_err(dev, "missing port@%d node in %s\n",
> + pdata->di + 2, dev->parent->of_node->full_name);
> + return -ENODEV;
> + }
> + }
> +
>   ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
>   if (ret)
>   return ret;
>

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[PATCH 5/5] drm/amd/amdgpu : Remove unused variable

2016-05-18 Thread Zhang, Jerry
Reviewed-by: Junwei Zhang 

Regards,
Jerry (Junwei Zhang)

SRDC SW Development
AMD Shanghai
_

> -Original Message-
> From: Muhammad Falak R Wani [mailto:falakreyaz at gmail.com]
> Sent: Tuesday, May 17, 2016 5:43 PM
> To: David Airlie
> Cc: Deucher, Alexander; Koenig, Christian; Zhou, Jammy; Dave Airlie; StDenis,
> Tom; Yang, Young; Zhang, Jerry; dri-devel at lists.freedesktop.org; linux-
> kernel at vger.kernel.org
> Subject: [PATCH 5/5] drm/amd/amdgpu : Remove unused variable
> 
> Remove unused variable 'ret', and directly return 0.
> 
> Signed-off-by: Muhammad Falak R Wani 
> ---
>  drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
> b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
> index 55cdab8..cba951a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
> @@ -99,7 +99,6 @@ static void tonga_ih_disable_interrupts(struct
> amdgpu_device *adev)
>   */
>  static int tonga_ih_irq_init(struct amdgpu_device *adev)  {
> - int ret = 0;
>   int rb_bufsz;
>   u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr;
>   u64 wptr_off;
> @@ -165,7 +164,7 @@ static int tonga_ih_irq_init(struct amdgpu_device *adev)
>   /* enable interrupts */
>   tonga_ih_enable_interrupts(adev);
> 
> - return ret;
> + return 0;
>  }
> 
>  /**
> --
> 1.9.1



[PATCH] tty: vt: Fix soft lockup in fbcon cursor blink timer.

2016-05-18 Thread Ming Lei
On Wed, May 18, 2016 at 4:49 AM, Pavel Machek  wrote:
> On Tue 2016-05-17 11:41:04, David Daney wrote:
>> From: David Daney 
>>
>> We are getting somewhat random soft lockups with this signature:
>>
>> [   86.992215] [] el1_irq+0xa0/0x10c
>> [   86.997082] [] cursor_timer_handler+0x30/0x54
>> [   87.002991] [] call_timer_fn+0x54/0x1a8
>> [   87.008378] [] run_timer_softirq+0x1c4/0x2bc
>> [   87.014200] [] __do_softirq+0x114/0x344
>> [   87.019590] [] irq_exit+0x74/0x98
>> [   87.024458] [] __handle_domain_irq+0x98/0xfc
>> [   87.030278] [] gic_handle_irq+0x94/0x190
>>
>> This is caused by the vt visual_init() function calling into
>> fbcon_init() with a vc_cur_blink_ms value of zero.  This is a
>> transient condition, as it is later set to a non-zero value.  But, if
>> the timer happens to expire while the blink rate is zero, it goes into
>> an endless loop, and we get soft lockup.
>>
>> The fix is to initialize vc_cur_blink_ms before calling the con_init()
>> function.
>>
>> Signed-off-by: David Daney 
>> Cc: stable at vger.kernel.org
>
> Acked-by: Pavel Machek 

Tested-by: Ming Lei 

Thanks David and Pavel for making it work!

>
> (And it is amazing how many problems configurable blink speed caused).
>
> Thanks!
> Pavel
>
> --
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) 
> http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


[RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701

2016-05-18 Thread YT Shen
Hi Emil,

On Tue, 2016-05-17 at 10:55 +0100, Emil Velikov wrote:
> Hi YT Shen,
> 
> On 12 May 2016 at 12:49,   wrote:
> > From: YT Shen 
> >
> > This patch add support for the Mediatek MT2701 DISP subsystem.
> > There is only one OVL engine in MT2701, and we have shadow
> > register support here.
> >
> > Signed-off-by: YT Shen 
> > ---
> >  drivers/gpu/drm/mediatek/mtk_disp_ovl.c |   49 ++---
> >  drivers/gpu/drm/mediatek/mtk_disp_rdma.c|   36 +--
> >  drivers/gpu/drm/mediatek/mtk_drm_crtc.c |   78 +-
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c  |  151 
> > ---
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp.h  |2 +
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   63 +--
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   15 +++
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c  |   72 +++--
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |9 ++
> >  drivers/gpu/drm/mediatek/mtk_drm_gem.c  |4 +
> >  10 files changed, 373 insertions(+), 106 deletions(-)
> >
> This patch does a bit too many things at once imho
>  - Renames existing macros
>  - Factors out helper functions - mtk_crtc_ddp_config and alike.
>  - Introduces *driver_data for existing hardware and uses it
>  - and adds support for the different hardware.
> 
> I'm no expert in the area, but it feels like you want to split things
> roughly as per above.
> A rather serious mali note and some "this should be const" follow
> suggestions inline.
Thanks for your suggestions.  I will split this patch into several small
patches.  They are easier to understand, and easier to review.
> 
> 
> >
> > +static struct mtk_ddp_comp_driver_data mt2701_ovl_driver_data = {
> > +   .ovl = {0x0040, 1 << 12, 0}
> > +};
> > +
> > +static struct mtk_ddp_comp_driver_data mt8173_ovl_driver_data = {
> > +   .ovl = {0x0f40, 0, 1 << 12}
> > +};
> > +
> These two should be const right ?
Yes, they should.
> 
> 
> >
> > +static struct mtk_ddp_comp_driver_data mt2701_rdma_driver_data = {
> > +   .rdma_fifo_pseudo_size = SZ_4K,
> > +};
> > +
> > +static struct mtk_ddp_comp_driver_data mt8173_rdma_driver_data = {
> > +   .rdma_fifo_pseudo_size = SZ_8K,
> > +};
> > +
> Same here.
OK.
> 
> 
> >
> > -#define MUTEX_MOD_DISP_OVL0BIT(11)
> > -#define MUTEX_MOD_DISP_OVL1BIT(12)
> > -#define MUTEX_MOD_DISP_RDMA0   BIT(13)
> > -#define MUTEX_MOD_DISP_RDMA1   BIT(14)
> > -#define MUTEX_MOD_DISP_RDMA2   BIT(15)
> > -#define MUTEX_MOD_DISP_WDMA0   BIT(16)
> > -#define MUTEX_MOD_DISP_WDMA1   BIT(17)
> > -#define MUTEX_MOD_DISP_COLOR0  BIT(18)
> > -#define MUTEX_MOD_DISP_COLOR1  BIT(19)
> > -#define MUTEX_MOD_DISP_AAL BIT(20)
> > -#define MUTEX_MOD_DISP_GAMMA   BIT(21)
> > -#define MUTEX_MOD_DISP_UFOEBIT(22)
> > -#define MUTEX_MOD_DISP_PWM0BIT(23)
> > -#define MUTEX_MOD_DISP_PWM1BIT(24)
> > -#define MUTEX_MOD_DISP_OD  BIT(25)
> > +#define MUTEX_MOD_MT8173_DISP_OVL0 BIT(11)
> > +#define MUTEX_MOD_MT8173_DISP_OVL1 BIT(12)
> > +#define MUTEX_MOD_MT8173_DISP_RDMA0BIT(13)
> > +#define MUTEX_MOD_MT8173_DISP_RDMA1BIT(14)
> > +#define MUTEX_MOD_MT8173_DISP_RDMA2BIT(15)
> > +#define MUTEX_MOD_MT8173_DISP_WDMA0BIT(16)
> > +#define MUTEX_MOD_MT8173_DISP_WDMA1BIT(17)
> > +#define MUTEX_MOD_MT8173_DISP_COLOR0   BIT(18)
> > +#define MUTEX_MOD_MT8173_DISP_COLOR1   BIT(19)
> > +#define MUTEX_MOD_MT8173_DISP_AAL  BIT(20)
> > +#define MUTEX_MOD_MT8173_DISP_GAMMABIT(21)
> > +#define MUTEX_MOD_MT8173_DISP_UFOE BIT(22)
> > +#define MUTEX_MOD_MT8173_DISP_PWM0 BIT(23)
> > +#define MUTEX_MOD_MT8173_DISP_PWM1 BIT(24)
> > +#define MUTEX_MOD_MT8173_DISP_OD   BIT(25)
> > +
> > +#define MUTEX_MOD_MT2701_DISP_OVL  BIT(3)
> > +#define MUTEX_MOD_MT2701_DISP_WDMA BIT(6)
> > +#define MUTEX_MOD_MT2701_DISP_COLORBIT(7)
> > +#define MUTEX_MOD_MT2701_DISP_BLS  BIT(9)
> > +#define MUTEX_MOD_MT2701_DISP_RDMA0BIT(10)
> > +#define MUTEX_MOD_MT2701_DISP_RDMA1BIT(12)
> >
> Even though the driver not does use a unique prefix/namespace for
> these macros (which it should imho), it's better to keep the hardware
> name/part first. Ideally the rename will be a separate patch.
OK, I will rename the macros and put it in a separate patch.
> 
> 
> > @@ -131,6 +153,32 @@ static const struct mtk_ddp_comp_match 
> > mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
> > [DDP_COMPONENT_WDMA1]   = { MTK_DISP_WDMA,  1, NULL },
> >  };
> >
> > +static struct mtk_ddp_comp_driver_data mt2701_color_driver_data = {
> > +   .color_offset = 0x0f00,
> > +};
> > +
> > +static struct mtk_ddp_comp_driver_data mt8173_color_driver_data = {
> > +   .color_offset = 0x

[PATCH] Revert "drm/imx: Remove of_node assignment from ipuv3-crtc driver probe"

2016-05-18 Thread Philipp Zabel
Hi Fabio, Chris,

Am Mittwoch, den 18.05.2016, 09:02 +0800 schrieb Chris Ruehl:
> Hi
> On Wednesday, May 18, 2016 01:11 AM, Fabio Estevam wrote:
> > Commit 407c9eba789767 ("drm/imx: Remove of_node assignment from ipuv3-crtc
> > driver probe") causes the IPU to be non-functional, so better to
> > revert it to avoid such regression.
> >
> > This reverts commit 407c9eba789767feb68b42eb2d65db68584e06c0.
> >
> > Cc:  # 4.4.x
> > Signed-off-by: Fabio Estevam 
> 
> Revert patch tested with 4.6 - imx6d and imx6dl boards
> 
> [2.292032] dwhdmi-imx 12.hdmi: Detected HDMI controller 
> 0x13:0xa:0xa0:0xc1
> [2.305742] imx-drm display-subsystem: bound 12.hdmi (ops 
> dw_hdmi_imx_ops)

Could you also test https://patchwork.kernel.org/patch/9081661/ ?

regards
Philipp



[PATCH] drm/etnaviv: enable GPU module level clock gating support

2016-05-18 Thread Lucas Stach
From: Russell King 

Enable GPU module level hardware clock gating, using the conditions
found in the galcore v5 driver.

v2 lst: Split out clock gating enable into separate function, as
there might be more conditions needed for new hardware.

Signed-off-by: Russell King 
Signed-off-by: Lucas Stach 
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c  | 44 ++
 drivers/gpu/drm/etnaviv/state_hi.xml.h |  7 ++
 2 files changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 049d00d8ded5..66d8cfbb75bb 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -487,6 +487,47 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
return 0;
 }

+static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
+{
+   u32 pmc, ppc;
+
+   /* enable clock gating */
+   ppc = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+   ppc |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+
+   /* Disable stall module clock gating for 4.3.0.1 and 4.3.0.2 revs */
+   if (gpu->identity.revision == 0x4301 ||
+   gpu->identity.revision == 0x4302)
+   ppc |= VIVS_PM_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING;
+
+   gpu_write(gpu, VIVS_PM_POWER_CONTROLS, ppc);
+
+   pmc = gpu_read(gpu, VIVS_PM_MODULE_CONTROLS);
+
+   /* Disable PA clock gating for GC400+ except for GC420 */
+   if (gpu->identity.model >= chipModel_GC400 &&
+   gpu->identity.model != chipModel_GC420)
+   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA;
+
+   /*
+* Disable PE clock gating on revs < 5.0.0.0 when HZ is
+* present without a bug fix.
+*/
+   if (gpu->identity.revision < 0x5000 &&
+   gpu->identity.minor_features0 & chipMinorFeatures0_HZ &&
+   !(gpu->identity.minor_features1 &
+ chipMinorFeatures1_DISABLE_PE_GATING))
+   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE;
+
+   if (gpu->identity.revision < 0x5422)
+   pmc |= BIT(15); /* Unknown bit */
+
+   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
+   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;
+
+   gpu_write(gpu, VIVS_PM_MODULE_CONTROLS, pmc);
+}
+
 static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
 {
u16 prefetch;
@@ -506,6 +547,9 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
gpu_write(gpu, VIVS_MC_DEBUG_MEMORY, mc_memory_debug);
}

+   /* enable module-level clock gating */
+   etnaviv_gpu_enable_mlcg(gpu);
+
/*
 * Update GPU AXI cache atttribute to "cacheable, no allocate".
 * This is necessary to prevent the iMX6 SoC locking up.
diff --git a/drivers/gpu/drm/etnaviv/state_hi.xml.h 
b/drivers/gpu/drm/etnaviv/state_hi.xml.h
index 6a7de5f1454a..807a3d9e0dd5 100644
--- a/drivers/gpu/drm/etnaviv/state_hi.xml.h
+++ b/drivers/gpu/drm/etnaviv/state_hi.xml.h
@@ -218,6 +218,13 @@ Copyright (C) 2015
 #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_FE 0x0001
 #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_DE 0x0002
 #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE 0x0004
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH 0x0008
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA 0x0010
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE 0x0020
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA 0x0040
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX 0x0080
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ  
0x0001
+#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ  
0x0002

 #define VIVS_PM_MODULE_STATUS  0x0108
 #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE0x0001
-- 
2.8.0.rc3



[PATCH] drm: Fix error handling in drm_connector_register

2016-05-18 Thread Chris Wilson
On Fri, May 06, 2016 at 02:55:02PM +0200, Daniel Vetter wrote:
> When debugfs or sysfs registration failed, we failed to clean up the
> idr registration. Reorder to fix this.
> 
> Cc: Dave Airlie 
> Signed-off-by: Daniel Vetter 

Had to check that we could do the idr_replace after exposing
sysfs/debugfs objects and came to the conclusion that those objects do
not depend upon the idr, so
Reviewed-by: Chris Wilson 
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


[PATCH] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Jon Hunter

On 17/05/16 18:36, Daniel Vetter wrote:
> On Tue, May 17, 2016 at 7:29 PM, Jon Hunter  wrote:
 @@ -764,6 +769,9 @@ tegra_dsi_connector_duplicate_state(struct 
 drm_connector *connector)
  if (!copy)
  return NULL;

 +if (copy->base.crtc)
 +drm_connector_reference(connector);
 +
>>>
>>> Please use __drm_atomic_helper_connector_duplicate_state instead of
>>> open-coding it.
>>
>> Unfortunately, tegra is allocating and duplicating memory for the entire
>> tegra_dsi_state structure (of which drm_connector_state is a member) in
>> this function and so I was not able to do that. However, may be Thierry
>> can comment on whether that is completely necessary and if we can move
>> to using __drm_atomic_helper_connector_duplicate_state() instead.
> 
> Check out how other drivers are using this helper - it is explicitly
> for the case where you duplicate the entire struct, and it just
> initializes the core part from drm. You can then add your own fixup
> code afterwards. It also doesn't matter whether you do kmalloc or
> kcalloc or kmemdup - it does a memcpy of its own to make sure state
> gets copied.

I had a look but I don't see anyone using the
__drm_atomic_helper_connector_duplicate_state() helper, I only see that
 drivers are using drm_atomic_helper_connector_duplicate_state()
directly.  

Yes I understand that this helper is doing an explicit copy of the
entire drm_connector_state struct and yes I could do something like the
following ...

 static struct drm_connector_state *
 tegra_dsi_connector_duplicate_state(struct drm_connector *connector)
 {
 struct tegra_dsi_state *state = to_dsi_state(connector->state);
 struct tegra_dsi_state *copy;

 copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
 if (!copy)
 return NULL;

 __drm_atomic_helper_connector_duplicate_state(connector,
   ©->base);

 return ©->base;
 }

... however, this means that I am copying the drm_connector_state twice
and this is what I was trying to avoid. Sorry if I am misunderstanding
you here, but I don't see how I can avoid the 2nd copy if I use 
__drm_atomic_helper_connector_duplicate_state().

Cheers
Jon

-- 
nvpublic


imx-drm: regression due to commit 503fe87bd0a8 ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading")

2016-05-18 Thread Lothar Waßmann
Hi,

On Fri, 13 May 2016 13:04:12 +0200 Philipp Zabel wrote:
> Hi Lothar,
> 
> Am Freitag, den 13.05.2016, 12:33 +0200 schrieb Lothar Waßmann:
> > Hi,
> > 
> > the commit 503fe87bd0a8 ("gpu: ipu-v3: Fix imx-ipuv3-crtc module 
> > autoloading")
> > indeed fixes the autoloading issue, but completely breaks the driver in
> > non-modular mode (at least with the parallel-display driver I didn't
> > yet check with the imx-ldb driver.
> > Can anyone confirm that the imx-drm driver in current linux-next
> > (next-20160512) works for them with any i.MX6 or i.MX53 board?
> 
> I have sent a patch: https://patchwork.kernel.org/patch/9081661/
> that I'd appreciate your input on.
> 
This patch works for the parallel-display driver but not for imx-ldb
(I didn't test the TV or HDMI drivers). It works when the DRM driver is
built as modules, but when it is non-modular I get a framebuffer
device which is useable from userspace, but no output on the LVDS
interface.

When reverting 503fe87bd0a8346ba9d8b7f49115dcd0a4185226 instead of
applying the above patch, the builtin driver works normally.


Lothar Waßmann


next-20160518 build: 2 failures 20 warnings (next-20160518)

2016-05-18 Thread Mark Brown
On Wed, May 18, 2016 at 08:05:26AM +0100, Build bot for Mark Brown wrote:

Today's -next fails to build arm and arm64 allmodconfigs fail to build
due to:

>   arm64-allmodconfig
>   arm-allmodconfig
> ../drivers/gpu/drm/mediatek/mtk_drm_fb.c:141:30: error: passing argument 1 of 
> 'drm_gem_object_lookup' from incompatible pointer type 
> [-Werror=incompatible-pointer-types]
> ../drivers/gpu/drm/mediatek/mtk_drm_fb.c:141:8: error: too many arguments to 
> function 'drm_gem_object_lookup'
> ../drivers/gpu/drm/mediatek/mtk_drm_gem.c:142:30: error: passing argument 1 
> of 'drm_gem_object_lookup' from incompatible pointer type 
> [-Werror=incompatible-pointer-types]
> ../drivers/gpu/drm/mediatek/mtk_drm_gem.c:142:8: error: too many arguments to 
> function 'drm_gem_object_lookup'

Apparently triggered by 8ad0bd84f98607 (drm: Remove unused drm_device
from drm_gem_object_lookup()) which didn't update the Mediatek drivers.
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next-20160518 build: 2 failures 20 warnings (next-20160518)

2016-05-18 Thread Chris Wilson
On Wed, May 18, 2016 at 11:15:59AM +0100, Mark Brown wrote:
> On Wed, May 18, 2016 at 08:05:26AM +0100, Build bot for Mark Brown wrote:
> 
> Today's -next fails to build arm and arm64 allmodconfigs fail to build
> due to:
> 
> > arm64-allmodconfig
> > arm-allmodconfig
> > ../drivers/gpu/drm/mediatek/mtk_drm_fb.c:141:30: error: passing argument 1 
> > of 'drm_gem_object_lookup' from incompatible pointer type 
> > [-Werror=incompatible-pointer-types]
> > ../drivers/gpu/drm/mediatek/mtk_drm_fb.c:141:8: error: too many arguments 
> > to function 'drm_gem_object_lookup'
> > ../drivers/gpu/drm/mediatek/mtk_drm_gem.c:142:30: error: passing argument 1 
> > of 'drm_gem_object_lookup' from incompatible pointer type 
> > [-Werror=incompatible-pointer-types]
> > ../drivers/gpu/drm/mediatek/mtk_drm_gem.c:142:8: error: too many arguments 
> > to function 'drm_gem_object_lookup'
> 
> Apparently triggered by 8ad0bd84f98607 (drm: Remove unused drm_device
> from drm_gem_object_lookup()) which didn't update the Mediatek drivers.

I'm pretty sure they didn't exist when I wrote the patch!

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_fb.c 
b/drivers/gpu/drm/mediatek/mtk_drm_fb.c
index 33d30c19f35f..147df85399ab 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_fb.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_fb.c
@@ -138,7 +138,7 @@ struct drm_framebuffer *mtk_drm_mode_fb_create(struct 
drm_device *dev,
if (drm_format_num_planes(cmd->pixel_format) != 1)
return ERR_PTR(-EINVAL);

-   gem = drm_gem_object_lookup(dev, file, cmd->handles[0]);
+   gem = drm_gem_object_lookup(file, cmd->handles[0]);
if (!gem)
return ERR_PTR(-ENOENT);

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c 
b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
index a773bfaea913..fa2ec0cd00e8 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
@@ -139,7 +139,7 @@ int mtk_drm_gem_dumb_map_offset(struct drm_file *file_priv,
struct drm_gem_object *obj;
int ret;

-   obj = drm_gem_object_lookup(dev, file_priv, handle);
+   obj = drm_gem_object_lookup(file_priv, handle);
if (!obj) {
DRM_ERROR("failed to lookup gem object.\n");
return -EINVAL;

-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


[PATCH] drm: Avoid connector reference imbalance on error path

2016-05-18 Thread Daniel Vetter
On Fri, May 06, 2016 at 12:47:45PM +0100, Chris Wilson wrote:
> Whilst looking at the fallout from using connector references for
> atomic, I noticed that there is an early return buried in
> drm_atomic_set_crtc_for_connector() that if hit could cause us to leak a
> reference on the connector.
> 
> Fixes: d2307dea14 (drm/atomic: use connector references (v3))
> Signed-off-by: Chris Wilson 
> Cc: Daniel Stone 
> Cc: Daniel Vetter 
> Cc: Dave Airlie 

Applied to drm-misc, thanks.
-Daniel

> ---
>  drivers/gpu/drm/drm_atomic.c | 20 +++-
>  1 file changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 86e89db02ed7..3ff1ed7b33db 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1160,14 +1160,18 @@ drm_atomic_set_crtc_for_connector(struct 
> drm_connector_state *conn_state,
>  {
>   struct drm_crtc_state *crtc_state;
>  
> - if (crtc)
> - drm_connector_reference(conn_state->connector);
> - if (conn_state->crtc && conn_state->crtc != crtc) {
> + if (conn_state->crtc == crtc)
> + return 0;
> +
> + if (conn_state->crtc) {
>   crtc_state = 
> drm_atomic_get_existing_crtc_state(conn_state->state,
>   
> conn_state->crtc);
>  
>   crtc_state->connector_mask &=
>   ~(1 << drm_connector_index(conn_state->connector));
> +
> + drm_connector_unreference(conn_state->connector);
> + conn_state->crtc = NULL;
>   }
>  
>   if (crtc) {
> @@ -1177,18 +1181,16 @@ drm_atomic_set_crtc_for_connector(struct 
> drm_connector_state *conn_state,
>  
>   crtc_state->connector_mask |=
>   1 << drm_connector_index(conn_state->connector);
> - }
>  
> - if (conn_state->crtc)
> - drm_connector_unreference(conn_state->connector);
> - conn_state->crtc = crtc;
> + drm_connector_reference(conn_state->connector);
> + conn_state->crtc = crtc;
>  
> - if (crtc)
>   DRM_DEBUG_ATOMIC("Link connector state %p to [CRTC:%d:%s]\n",
>conn_state, crtc->base.id, crtc->name);
> - else
> + } else {
>   DRM_DEBUG_ATOMIC("Link connector state %p to [NOCRTC]\n",
>conn_state);
> + }
>  
>   return 0;
>  }
> -- 
> 2.8.1
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 10:18:52AM +0100, Jon Hunter wrote:
> 
> On 17/05/16 18:36, Daniel Vetter wrote:
> > On Tue, May 17, 2016 at 7:29 PM, Jon Hunter  wrote:
>  @@ -764,6 +769,9 @@ tegra_dsi_connector_duplicate_state(struct 
>  drm_connector *connector)
>   if (!copy)
>   return NULL;
> 
>  +if (copy->base.crtc)
>  +drm_connector_reference(connector);
>  +
> >>>
> >>> Please use __drm_atomic_helper_connector_duplicate_state instead of
> >>> open-coding it.
> >>
> >> Unfortunately, tegra is allocating and duplicating memory for the entire
> >> tegra_dsi_state structure (of which drm_connector_state is a member) in
> >> this function and so I was not able to do that. However, may be Thierry
> >> can comment on whether that is completely necessary and if we can move
> >> to using __drm_atomic_helper_connector_duplicate_state() instead.
> > 
> > Check out how other drivers are using this helper - it is explicitly
> > for the case where you duplicate the entire struct, and it just
> > initializes the core part from drm. You can then add your own fixup
> > code afterwards. It also doesn't matter whether you do kmalloc or
> > kcalloc or kmemdup - it does a memcpy of its own to make sure state
> > gets copied.
> 
> I had a look but I don't see anyone using the
> __drm_atomic_helper_connector_duplicate_state() helper, I only see that
>  drivers are using drm_atomic_helper_connector_duplicate_state()
> directly.  
> 
> Yes I understand that this helper is doing an explicit copy of the
> entire drm_connector_state struct and yes I could do something like the
> following ...
> 
>  static struct drm_connector_state *
>  tegra_dsi_connector_duplicate_state(struct drm_connector *connector)
>  {
>  struct tegra_dsi_state *state = to_dsi_state(connector->state);
>  struct tegra_dsi_state *copy;
>  
>  copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
>  if (!copy)
>  return NULL;
> 
>  __drm_atomic_helper_connector_duplicate_state(connector,
>  ©->base);
>  
>  return ©->base;
>  }
> 
> ... however, this means that I am copying the drm_connector_state twice
> and this is what I was trying to avoid. Sorry if I am misunderstanding
> you here, but I don't see how I can avoid the 2nd copy if I use 
> __drm_atomic_helper_connector_duplicate_state().

The copying twice should be harmless - this function is only called when
changing connector states, i.e. full modeset. And modesets aren't fast
anyway.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH] Revert "drm/imx: Remove of_node assignment from ipuv3-crtc driver probe"

2016-05-18 Thread Fabio Estevam
Hi Philipp,

On Wed, May 18, 2016 at 5:38 AM, Philipp Zabel  
wrote:

> Could you also test https://patchwork.kernel.org/patch/9081661/ ?

With this patch applied I still do not get HDMI working on a mx6q sabresd board.

Thanks


[PATCH V2] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Jon Hunter
Commit d2307dea14a4 ("drm/atomic: use connector references (v3)") added
reference counting for DRM connectors and this caused a crash when
exercising system suspend on Tegra114 Dalmore.

The Tegra DSI driver implements a Tegra specific function,
tegra_dsi_connector_duplicate_state(), to duplicate the connector state
and destroys the state using the generic helper function,
drm_atomic_helper_connector_destroy_state(). Following commit
d2307dea14a4 ("drm/atomic: use connector references (v3)") there is
now an imbalance in the connector reference count because the Tegra
function to duplicate state does not take a reference when duplicating
the state information. However, the generic helper function to destroy
the state information assumes a reference has been taken and during
system suspend, when the connector state is destroyed, this leads to a
crash because we attempt to put the reference for an object that has
already been freed.

Fix this by calling __drm_atomic_helper_connector_duplicate_state() from
tegra_dsi_connector_duplicate_state() to ensure that we take a reference
on a connector if crtc is set. Note that this will also copy the
connector state a 2nd time, but this should be harmless.

By fixing tegra_dsi_connector_duplicate_state() to take a reference,
although a crash was no longer seen, it was then observed that after
each system suspend-resume cycle, the reference would be one greater
than before the suspend-resume cycle. Following commit d2307dea14a4
("drm/atomic: use connector references (v3)"), it was found that we
also need to put the reference when calling the function
tegra_dsi_connector_reset() before freeing the state. Fix this by
updating tegra_dsi_connector_reset() to call the function
__drm_atomic_helper_connector_destroy_state() in order to put the
reference for the connector.

Finally, add a warning if allocating memory for the state information
fails in tegra_dsi_connector_reset().

Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")

Signed-off-by: Jon Hunter 
---

V2 changes:
- Updated to next-20160518
- Replaced open coding of call to drm_connector_reference() with
  __drm_atomic_helper_connector_duplicate_state() per Daniel's feedback.

 drivers/gpu/drm/tegra/dsi.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 44e102799195..a49bb006182d 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -745,13 +745,17 @@ static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)

 static void tegra_dsi_connector_reset(struct drm_connector *connector)
 {
-   struct tegra_dsi_state *state =
-   kzalloc(sizeof(*state), GFP_KERNEL);
+   struct tegra_dsi_state *state = kzalloc(sizeof(*state), GFP_KERNEL);

-   if (state) {
+   if (WARN_ON(!state))
+   return;
+
+   if (connector->state) {
+   __drm_atomic_helper_connector_destroy_state(connector->state);
kfree(connector->state);
-   __drm_atomic_helper_connector_reset(connector, &state->base);
}
+
+   __drm_atomic_helper_connector_reset(connector, &state->base);
 }

 static struct drm_connector_state *
@@ -764,6 +768,9 @@ tegra_dsi_connector_duplicate_state(struct drm_connector 
*connector)
if (!copy)
return NULL;

+   __drm_atomic_helper_connector_duplicate_state(connector,
+ ©->base);
+
return ©->base;
 }

-- 
2.1.4



[PATCH] drm/vc4: Make pageflip completion handling more robust.

2016-05-18 Thread Mario Kleiner
Protect both the setup of the pageflip event and the
latching of the new requested displaylist head pointer
by the event lock, so we can't get into a situation
where vc4_atomic_flush latches the new display list via
HVS_WRITE, then immediately gets preempted before queueing
the pageflip event, then the page-flip completes in hw and
the vc4_crtc_handle_page_flip() runs and no-ops due to
lack of a pending pageflip event, then vc4_atomic_flush
continues and only then queues the pageflip event - after
the page flip handling already no-oped. This would cause
flip completion handling only at the next vblank - one
frame too late.

In vc4_crtc_handle_page_flip() check the actual DL head
pointer in SCALER_DISPLACTX against the requested pointer
for page flip to make sure that the flip actually really
completed in the current vblank and doesn't get deferred
to the next one because the DL head pointer was written
a bit too late into SCALER_DISPLISTX, after start of
vblank, and missed the boat. This avoids handling a
pageflip completion too early - one frame too early.

According to Eric, DL head pointer updates which were
written into the HVS DISPLISTX reg get committed to hardware
at the last pixel of active scanout. Our vblank interrupt
handler, as triggered by PV_INT_VFP_START irq, gets to run
earliest at the first pixel of HBLANK at the end of the
last scanline of active scanout, ie. vblank irq handling
runs at least 1 pixel duration after a potential pageflip
completion happened in hardware.

This ordering of events in the hardware, together with the
lock protection and SCALER_DISPLACTX sampling of this patch,
guarantees that pageflip completion handling only runs at
exactly the vblank irq of actual pageflip completion in all
cases.

Background info from Eric about the relative timing of
HVS, PV's and trigger points for interrupts, DL updates:

https://lists.freedesktop.org/archives/dri-devel/2016-May/107510.html

Tested on RPi 2B with hardware timing measurement equipment
and shown to no longer complete flips too early or too late.

Signed-off-by: Mario Kleiner 
Cc: Eric Anholt 
---
 drivers/gpu/drm/vc4/vc4_crtc.c | 28 ++--
 drivers/gpu/drm/vc4/vc4_regs.h |  4 
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index c34f2bb..1981ca3 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -456,14 +456,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,

WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);

-   HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
- vc4_state->mm.start);
-
-   if (debug_dump_regs) {
-   DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-   vc4_hvs_dump_state(dev);
-   }
-
if (crtc->state->event) {
unsigned long flags;

@@ -473,8 +465,20 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,

spin_lock_irqsave(&dev->event_lock, flags);
vc4_crtc->event = crtc->state->event;
-   spin_unlock_irqrestore(&dev->event_lock, flags);
crtc->state->event = NULL;
+
+   HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+ vc4_state->mm.start);
+
+   spin_unlock_irqrestore(&dev->event_lock, flags);
+   } else {
+   HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+ vc4_state->mm.start);
+   }
+
+   if (debug_dump_regs) {
+   DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+   vc4_hvs_dump_state(dev);
}
 }

@@ -500,10 +504,14 @@ static void vc4_crtc_handle_page_flip(struct vc4_crtc 
*vc4_crtc)
 {
struct drm_crtc *crtc = &vc4_crtc->base;
struct drm_device *dev = crtc->dev;
+   struct vc4_dev *vc4 = to_vc4_dev(dev);
+   struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+   u32 chan = vc4_crtc->channel;
unsigned long flags;

spin_lock_irqsave(&dev->event_lock, flags);
-   if (vc4_crtc->event) {
+   if (vc4_crtc->event &&
+   (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan {
drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
vc4_crtc->event = NULL;
drm_crtc_vblank_put(crtc);
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 6163b95..f99eece 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -341,6 +341,10 @@
 #define SCALER_DISPLACT00x0030
 #define SCALER_DISPLACT10x0034
 #define SCALER_DISPLACT20x0038
+#define SCALER_DISPLACTX(x)(SCALER_DISPLACT0 + \
+(x) * (SCALER_DISPLACT1 - \
+   

[PATCH V2] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 12:11:29PM +0100, Jon Hunter wrote:
> Commit d2307dea14a4 ("drm/atomic: use connector references (v3)") added
> reference counting for DRM connectors and this caused a crash when
> exercising system suspend on Tegra114 Dalmore.
> 
> The Tegra DSI driver implements a Tegra specific function,
> tegra_dsi_connector_duplicate_state(), to duplicate the connector state
> and destroys the state using the generic helper function,
> drm_atomic_helper_connector_destroy_state(). Following commit
> d2307dea14a4 ("drm/atomic: use connector references (v3)") there is
> now an imbalance in the connector reference count because the Tegra
> function to duplicate state does not take a reference when duplicating
> the state information. However, the generic helper function to destroy
> the state information assumes a reference has been taken and during
> system suspend, when the connector state is destroyed, this leads to a
> crash because we attempt to put the reference for an object that has
> already been freed.
> 
> Fix this by calling __drm_atomic_helper_connector_duplicate_state() from
> tegra_dsi_connector_duplicate_state() to ensure that we take a reference
> on a connector if crtc is set. Note that this will also copy the
> connector state a 2nd time, but this should be harmless.
> 
> By fixing tegra_dsi_connector_duplicate_state() to take a reference,
> although a crash was no longer seen, it was then observed that after
> each system suspend-resume cycle, the reference would be one greater
> than before the suspend-resume cycle. Following commit d2307dea14a4
> ("drm/atomic: use connector references (v3)"), it was found that we
> also need to put the reference when calling the function
> tegra_dsi_connector_reset() before freeing the state. Fix this by
> updating tegra_dsi_connector_reset() to call the function
> __drm_atomic_helper_connector_destroy_state() in order to put the
> reference for the connector.
> 
> Finally, add a warning if allocating memory for the state information
> fails in tegra_dsi_connector_reset().
> 
> Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")
> 
> Signed-off-by: Jon Hunter 

Reviewed-by: Daniel Vetter 

Thierry, since Dave hasn't pulled in the drm-misc pull with the
refactoring, should I apply this to drm-misc?
-Daniel


> ---
> 
> V2 changes:
> - Updated to next-20160518
> - Replaced open coding of call to drm_connector_reference() with
>   __drm_atomic_helper_connector_duplicate_state() per Daniel's feedback.
> 
>  drivers/gpu/drm/tegra/dsi.c | 15 +++
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
> index 44e102799195..a49bb006182d 100644
> --- a/drivers/gpu/drm/tegra/dsi.c
> +++ b/drivers/gpu/drm/tegra/dsi.c
> @@ -745,13 +745,17 @@ static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)
>  
>  static void tegra_dsi_connector_reset(struct drm_connector *connector)
>  {
> - struct tegra_dsi_state *state =
> - kzalloc(sizeof(*state), GFP_KERNEL);
> + struct tegra_dsi_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
>  
> - if (state) {
> + if (WARN_ON(!state))
> + return;
> +
> + if (connector->state) {
> + __drm_atomic_helper_connector_destroy_state(connector->state);
>   kfree(connector->state);
> - __drm_atomic_helper_connector_reset(connector, &state->base);
>   }
> +
> + __drm_atomic_helper_connector_reset(connector, &state->base);
>  }
>  
>  static struct drm_connector_state *
> @@ -764,6 +768,9 @@ tegra_dsi_connector_duplicate_state(struct drm_connector 
> *connector)
>   if (!copy)
>   return NULL;
>  
> + __drm_atomic_helper_connector_duplicate_state(connector,
> +   ©->base);
> +
>   return ©->base;
>  }
>  
> -- 
> 2.1.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH] Revert "drm/imx: Remove of_node assignment from ipuv3-crtc driver probe"

2016-05-18 Thread Philipp Zabel
Hi Fabio,

Am Mittwoch, den 18.05.2016, 07:51 -0300 schrieb Fabio Estevam:
> Hi Philipp,
> 
> On Wed, May 18, 2016 at 5:38 AM, Philipp Zabel  
> wrote:
> 
> > Could you also test https://patchwork.kernel.org/patch/9081661/ ?
> 
> With this patch applied I still do not get HDMI working on a mx6q sabresd 
> board.

Thank you for testing. The reason HDMI still doesn't work is that the
ipuv3-crtcs get probed after dw_hdmi-imx, which then calls
drm_of_find_possible_crtcs() in its .bind function. That expects
crtc->port to point to the of_node, which is set by the call to
imx_drm_add_crtc(), still to the crtc devices' of_node instead of the
of_node in platform data. I'll send a new version.

regards
Philipp



imx-drm: regression due to commit 503fe87bd0a8 ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading")

2016-05-18 Thread Philipp Zabel
Am Mittwoch, den 18.05.2016, 11:12 +0200 schrieb Lothar Waßmann:
> Hi,
> 
> On Fri, 13 May 2016 13:04:12 +0200 Philipp Zabel wrote:
> > Hi Lothar,
> > 
> > Am Freitag, den 13.05.2016, 12:33 +0200 schrieb Lothar Waßmann:
> > > Hi,
> > > 
> > > the commit 503fe87bd0a8 ("gpu: ipu-v3: Fix imx-ipuv3-crtc module 
> > > autoloading")
> > > indeed fixes the autoloading issue, but completely breaks the driver in
> > > non-modular mode (at least with the parallel-display driver I didn't
> > > yet check with the imx-ldb driver.
> > > Can anyone confirm that the imx-drm driver in current linux-next
> > > (next-20160512) works for them with any i.MX6 or i.MX53 board?
> > 
> > I have sent a patch: https://patchwork.kernel.org/patch/9081661/
> > that I'd appreciate your input on.
> > 
> This patch works for the parallel-display driver but not for imx-ldb
> (I didn't test the TV or HDMI drivers). It works when the DRM driver is
> built as modules, but when it is non-modular I get a framebuffer
> device which is useable from userspace, but no output on the LVDS
> interface.
> 
> When reverting 503fe87bd0a8346ba9d8b7f49115dcd0a4185226 instead of
> applying the above patch, the builtin driver works normally.

Thank you for testing, I'll send a new version.

regards
Philipp



[PATCH v2] drm/imx: Match imx-ipuv3-crtc components using device node in platform data

2016-05-18 Thread Philipp Zabel
The component master driver imx-drm-core matches component devices using
their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc
module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during
probing. Before that, of_node was set and caused an of: modalias to be
used instead of the platform: modalias, which broke module autoloading.

On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc
probe function calls component_add, component matching in imx-drm-core
fails. While dev->of_node will be set once the next component tries to
bring up the component master, imx-drm-core component binding will never
succeed if one of the crtc devices is probed last.

Add of_node to the component platform data and match against the
pdata->of_node instead of dev->of_node in imx-drm-core to work around
this problem.

Cc:  # 4.4.x
Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading")
Signed-off-by: Philipp Zabel 
---
Changes since v1:
 - Also set the crtc->port to the of_node from platform data
---
 drivers/gpu/drm/imx/imx-drm-core.c | 8 
 drivers/gpu/drm/imx/ipuv3-crtc.c   | 2 +-
 drivers/gpu/ipu-v3/ipu-common.c| 5 +++--
 include/video/imx-ipu-v3.h | 2 ++
 4 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-drm-core.c 
b/drivers/gpu/drm/imx/imx-drm-core.c
index e26dcde..05229b9 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "imx-drm.h"

@@ -444,6 +445,13 @@ static int compare_of(struct device *dev, void *data)
 {
struct device_node *np = data;

+   /* Special case for DI, dev->of_node may not be set yet */
+   if (strcmp(dev->driver->name, "imx-ipuv3-crtc") == 0) {
+   struct ipu_client_platformdata *pdata = dev->platform_data;
+
+   return pdata->of_node == np;
+   }
+
/* Special case for LDB, one device for two channels */
if (of_node_cmp(np->name, "lvds-channel") == 0) {
np = of_get_parent(np);
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index dee8e8b..b2c30b8 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -473,7 +473,7 @@ static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,

ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
&ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
-   ipu_crtc->dev->of_node);
+   pdata->of_node);
if (ret) {
dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
goto err_put_resources;
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index abb98c7..99dcacf 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -997,7 +997,7 @@ struct ipu_platform_reg {
 };

 /* These must be in the order of the corresponding device tree port nodes */
-static const struct ipu_platform_reg client_reg[] = {
+static struct ipu_platform_reg client_reg[] = {
{
.pdata = {
.csi = 0,
@@ -1048,7 +1048,7 @@ static int ipu_add_client_devices(struct ipu_soc *ipu, 
unsigned long ipu_base)
mutex_unlock(&ipu_client_id_mutex);

for (i = 0; i < ARRAY_SIZE(client_reg); i++) {
-   const struct ipu_platform_reg *reg = &client_reg[i];
+   struct ipu_platform_reg *reg = &client_reg[i];
struct platform_device *pdev;
struct device_node *of_node;

@@ -1070,6 +1070,7 @@ static int ipu_add_client_devices(struct ipu_soc *ipu, 
unsigned long ipu_base)

pdev->dev.parent = dev;

+   reg->pdata.of_node = of_node;
ret = platform_device_add_data(pdev, ®->pdata,
   sizeof(reg->pdata));
if (!ret)
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index ad66589..3a2a794 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 

@@ -345,6 +346,7 @@ struct ipu_client_platformdata {
int dc;
int dp;
int dma[2];
+   struct device_node *of_node;
 };

 #endif /* __DRM_IPU_H__ */
-- 
2.8.0.rc3



[Bug 95308] [radeonsi] Hangs after some minutes on Team Fortress 2

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95308

--- Comment #4 from reduxpl at gmail.com ---
Created attachment 123880
  --> https://bugs.freedesktop.org/attachment.cgi?id=123880&action=edit
glxinfo

Full output of glxinfo

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[Bug 95308] [radeonsi] Hangs after some minutes on Team Fortress 2

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95308

--- Comment #5 from reduxpl at gmail.com ---
Created attachment 123882
  --> https://bugs.freedesktop.org/attachment.cgi?id=123882&action=edit
lspci

Full output of lspci

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[Bug 95308] [radeonsi] Hangs after some minutes on Team Fortress 2

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95308

reduxpl at gmail.com changed:

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|DUPLICATE   |---

--- Comment #6 from reduxpl at gmail.com ---
The problem still persists on Ubuntu 16.04, Radeon R9 280X, kernel
4.6.0-xanmod1. Please let me know which logs should I provide in order to help
with finding an issue.
The video showing the glitch should be available in ~30-40 minutes here:
https://youtu.be/1iBkh6SYSZU

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[PATCH 0/5] drm: fixes for merge-window regressions

2016-05-18 Thread Arnd Bergmann
A couple of new warnings and build errors appeared through the DRM
tree in linux-next after the merge window opened. The first patch
here is for scripts/headers_check.pl, but as the bug is only
present in drm-next at the moment, it would be good to add all
five patches to that tree before they make it into mainline.

It's likely that some of these have already been fixed since
this morning's linux-next, so just ignore the ones are no
longer needed.

Arnd Bergmann (5):
  headers_check: don't warn about c++ guards
  drm: mediatek: add CONFIG_OF dependency
  drm: mediatek: fixup drm_gem_object_lookup API change
  drm: exynos: mark pm functions as __maybe_unused
  drm: remove unused dev variables

 drivers/gpu/drm/armada/armada_crtc.c   | 1 -
 drivers/gpu/drm/exynos/exynos_hdmi.c   | 6 ++
 drivers/gpu/drm/mediatek/Kconfig   | 1 +
 drivers/gpu/drm/mediatek/mtk_drm_fb.c  | 2 +-
 drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 +-
 drivers/gpu/drm/nouveau/nouveau_gem.c  | 1 -
 drivers/gpu/drm/nouveau/nv50_display.c | 1 -
 drivers/gpu/drm/radeon/radeon_cs.c | 1 -
 scripts/headers_check.pl   | 4 
 9 files changed, 9 insertions(+), 10 deletions(-)


Cc: Russell King 
Cc: Inki Dae 
Cc: Joonyoung Shim 
Cc: Seung-Woo Kim 
Cc: Kyungmin Park 
Cc: Kukjin Kim 
Cc: Krzysztof Kozlowski 
Cc: Matthias Brugger 
Cc: Ben Skeggs 
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: Arnd Bergmann 
Cc: dri-devel at lists.freedesktop.org
Cc: linux-kernel at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-samsung-soc at vger.kernel.org
Cc: linux-mediatek at lists.infradead.org
Cc: nouveau at lists.freedesktop.org

-- 
2.7.0



[PATCH] drm/i915/dp: Try to find proper bpc for DP->legacy converters. (v2)

2016-05-18 Thread Mario Kleiner
On 05/17/2016 08:51 AM, Daniel Vetter wrote:
> On Thu, May 12, 2016 at 06:43:58PM +0200, Mario Kleiner wrote:
>> This fixes a regression in output precision for DVI and VGA
>> video sinks connected to Intel hw via active DisplayPort->DVI/VGA
>> converters.
>>
>> The regression was indirectly introduced by commit 013dd9e03872
>> ("drm/i915/dp: fall back to 18 bpp when sink capability is unknown").
>>
>> Our current drm edid 1.3 handling can't reliably assign a proper
>> minimum supported display depth of 8 bpc to all DVI sinks, as
>> mandated by DVI 1.0 spec, section 2.2.11.2 "Monitor data format
>> support", but returns 0 bpc = "Don't know" instead. For analog VGA
>> sinks it also returns 0 bpc, although those sinks themselves have
>> infinite color depth, only restricted by the DAC resolution of
>> the encoder.
>>
>> If a VGA or dual-link DVI display is connected via DisplayPort
>> connector then due to above commit the driver would fall back to
>> only 6 bpc, which would cause degradation for DVI and VGA displays,
>> annoying in general, but especially harmful for application of display
>> devices used in neuroscience research and for medical diagnosic
>> which absolutely need native non-dithered 8 bpc at a minimum to
>> operate correctly.
>>
>> For DP connectors with bpc == 0 according to EDID, fix this problem
>> by checking the dpcd data to find out if a DP->legacy converter
>> is connected. If the converter is DP->DVI/HDMI assume 8 bpc
>> depth. If the converter is DP->VGA assume at least 8 bpc, but
>> try to get a more accurate value (8, 10, 12 or 16 bpc) if the
>> converter exposes this info.
>>
>> Only for a DP sink without downstream ports we assume it is a native DP
>> sink and apply the 6 bpc / 18 bpp fallback as required by the DP spec.
>>
>> As the "fall back to 18 bpp" patch was backported to stable we should
>> include this one also into stable to fix the regression in color
>> precision.
>>
>> Tested with MiniDP->DP adapter, MiniDP->HDMI adapter,
>> MiniDP->single-link DVI adapter, MiniDP->dual-link DVI active adapter,
>> and Apple MiniDP->VGA active adapter.
>>
>> v2: Take Ville's feedback into account: Fold the 18 bpp fallback into
>>  the detection function, so it only applies to native DP sinks.
>>  Rename intel_dp_legacy_bpc() to intel_dp_sink_bpc().
>>
>> Signed-off-by: Mario Kleiner 
>> Cc: Ville Syrjälä 
>> Cc: Daniel Vetter 
>> Cc: stable at vger.kernel.org
>> ---
>>   drivers/gpu/drm/i915/intel_display.c | 12 ++--
>>   drivers/gpu/drm/i915/intel_dp.c  | 59 
>> 
>>   drivers/gpu/drm/i915/intel_drv.h |  1 +
>>   3 files changed, 69 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>> b/drivers/gpu/drm/i915/intel_display.c
>> index a297e1f..7ef52db 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -12072,10 +12072,16 @@ connected_sink_compute_bpp(struct intel_connector 
>> *connector,
>>  int type = connector->base.connector_type;
>>  int clamp_bpp = 24;
>>
>> -/* Fall back to 18 bpp when DP sink capability is unknown. */
>> +/* On DisplayPort try harder to find sink bpc */
>>  if (type == DRM_MODE_CONNECTOR_DisplayPort ||
>> -type == DRM_MODE_CONNECTOR_eDP)
>> -clamp_bpp = 18;
>> +type == DRM_MODE_CONNECTOR_eDP) {
>> +int sink_bpc = intel_dp_sink_bpc(&connector->base);
>> +
>> +if (sink_bpc) {
>> +DRM_DEBUG_KMS("DP sink with bpc %d\n", 
>> sink_bpc);
>> +clamp_bpp = 3 * sink_bpc;
>> +}
>> +}
>>
>>  if (bpp > clamp_bpp) {
>>  DRM_DEBUG_KMS("clamping display bpp (was %d) to default 
>> limit of %d\n",
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c 
>> b/drivers/gpu/drm/i915/intel_dp.c
>> index f192f58..4dbb55b 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -6046,3 +6046,62 @@ void intel_dp_mst_resume(struct drm_device *dev)
>>  }
>>  }
>>   }
>> +
>> +/* XXX Needs work for more than 1 downstream port */
>> +int intel_dp_sink_bpc(struct drm_connector *connector)
>
> I think these kind of functions are pretty much why we have a dp helepr.
> Can you pls move it there (and add kerneldoc and all the usual
> bits&pieces). There's also other patches in-flight to add more downstream
> port handling ...
> -Daniel

I can factor out the parsing bit into a dp helper function. Getting the 
dpcd block seems to be driver specific, so a little bit of stub would be 
left in the kms driver.

However, is this then still fit/small/simple enough for backporting to 
stable kernels? Fixing the existing regression which reached stable 
kernels is important. In case not, we'd need some slight extra bits a la

1. A patch which reve

[Intel-gfx] [PATCH] drm: use seqlocks for vblank time/count

2016-05-18 Thread Mario Kleiner
On 05/09/2016 08:11 PM, Daniel Vetter wrote:
> On Mon, May 09, 2016 at 08:16:07PM +0300, Ville Syrjälä wrote:
>> On Mon, May 09, 2016 at 05:08:43PM +0100, Matthew Auld wrote:
>>> This patch aims to replace the roll-your-own seqlock implementation with
>>> full-blown seqlock'. We also remove the timestamp ring-buffer in favour
>>> of single timestamp/count pair protected by a seqlock. In turn this
>>> means we can now increment the vblank freely without the need for
>>> clamping.
>>
>> This will also change the behaviour to block new readers while the
>> writer has the lock, whereas the old code would allow readers to
>> proceed in parallel. We do the whole hw counter + scanout position
>> query while holding the lock so it's not exactly zero amount of work,
>> but I'm not sure that's a real problem.
>>
>> I guess we could reduce the scope of the seqlock, but then maybe we'd
>> need to keep the vblank_time_lock spinlock as well. The details escape
>> me now, so I'd have re-read the code again.
>>
>> Ccing Mario too.
>
> Yeah, my idea was to keep the spinlock, and only replace the stuff in
> store_vblank and the few do {} while (cur_vblank != get_vblank_counter)
> loops. Extending the seqlock stuff to everything seems indeed counter to
> Mario's locking scheme.
>
> So goal would be to really just replace the half-baked seqlock that we
> have already, and leave all other locking unchanged.
> -Daniel

+1 to that, for simplicity. I thought Ville already had a patch laying 
around somewhere which essentially does this?

-mario

>
>>
>>>
>>> Cc: Daniel Vetter 
>>> Cc: Ville Syrjälä 
>>> Signed-off-by: Matthew Auld 
>>> ---
>>>   drivers/gpu/drm/drm_irq.c | 111 
>>> +-
>>>   include/drm/drmP.h|  14 ++
>>>   2 files changed, 25 insertions(+), 100 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
>>> index 3c1a6f1..bfc6a8d 100644
>>> --- a/drivers/gpu/drm/drm_irq.c
>>> +++ b/drivers/gpu/drm/drm_irq.c
>>> @@ -42,10 +42,6 @@
>>>   #include 
>>>   #include 
>>>
>>> -/* Access macro for slots in vblank timestamp ringbuffer. */
>>> -#define vblanktimestamp(dev, pipe, count) \
>>> -   ((dev)->vblank[pipe].time[(count) % DRM_VBLANKTIME_RBSIZE])
>>> -
>>>   /* Retry timestamp calculation up to 3 times to satisfy
>>>* drm_timestamp_precision before giving up.
>>>*/
>>> @@ -82,29 +78,13 @@ static void store_vblank(struct drm_device *dev, 
>>> unsigned int pipe,
>>>  struct timeval *t_vblank, u32 last)
>>>   {
>>> struct drm_vblank_crtc *vblank = &dev->vblank[pipe];
>>> -   u32 tslot;
>>>
>>> -   assert_spin_locked(&dev->vblank_time_lock);
>>> +   assert_spin_locked(&dev->vblank_seqlock.lock);
>>>
>>> vblank->last = last;
>>>
>>> -   /* All writers hold the spinlock, but readers are serialized by
>>> -* the latching of vblank->count below.
>>> -*/
>>> -   tslot = vblank->count + vblank_count_inc;
>>> -   vblanktimestamp(dev, pipe, tslot) = *t_vblank;
>>> -
>>> -   /*
>>> -* vblank timestamp updates are protected on the write side with
>>> -* vblank_time_lock, but on the read side done locklessly using a
>>> -* sequence-lock on the vblank counter. Ensure correct ordering using
>>> -* memory barrriers. We need the barrier both before and also after the
>>> -* counter update to synchronize with the next timestamp write.
>>> -* The read-side barriers for this are in drm_vblank_count_and_time.
>>> -*/
>>> -   smp_wmb();
>>> +   vblank->time = *t_vblank;
>>> vblank->count += vblank_count_inc;
>>> -   smp_wmb();
>>>   }
>>>
>>>   /**
>>> @@ -127,7 +107,7 @@ static void drm_reset_vblank_timestamp(struct 
>>> drm_device *dev, unsigned int pipe
>>> struct timeval t_vblank;
>>> int count = DRM_TIMESTAMP_MAXRETRIES;
>>>
>>> -   spin_lock(&dev->vblank_time_lock);
>>> +   write_seqlock(&dev->vblank_seqlock);
>>>
>>> /*
>>>  * sample the current counter to avoid random jumps
>>> @@ -152,7 +132,7 @@ static void drm_reset_vblank_timestamp(struct 
>>> drm_device *dev, unsigned int pipe
>>>  */
>>> store_vblank(dev, pipe, 1, &t_vblank, cur_vblank);
>>>
>>> -   spin_unlock(&dev->vblank_time_lock);
>>> +   write_sequnlock(&dev->vblank_seqlock);
>>>   }
>>>
>>>   /**
>>> @@ -205,7 +185,7 @@ static void drm_update_vblank_count(struct drm_device 
>>> *dev, unsigned int pipe,
>>> const struct timeval *t_old;
>>> u64 diff_ns;
>>>
>>> -   t_old = &vblanktimestamp(dev, pipe, vblank->count);
>>> +   t_old = &vblank->time;
>>> diff_ns = timeval_to_ns(&t_vblank) - timeval_to_ns(t_old);
>>>
>>> /*
>>> @@ -239,49 +219,6 @@ static void drm_update_vblank_count(struct drm_device 
>>> *dev, unsigned int pipe,
>>> diff = 1;
>>> }
>>>
>>> -   /*
>>> -* FIMXE: Need to replace this hack with proper seqlocks.
>>> -*
>>> -* Restrict the bump of the software vblank counter to a safe ma

[PATCH v2] drm/imx: Match imx-ipuv3-crtc components using device node in platform data

2016-05-18 Thread Fabio Estevam
On Wed, May 18, 2016 at 9:56 AM, Philipp Zabel  
wrote:
> The component master driver imx-drm-core matches component devices using
> their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc
> module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during
> probing. Before that, of_node was set and caused an of: modalias to be
> used instead of the platform: modalias, which broke module autoloading.
>
> On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc
> probe function calls component_add, component matching in imx-drm-core
> fails. While dev->of_node will be set once the next component tries to
> bring up the component master, imx-drm-core component binding will never
> succeed if one of the crtc devices is probed last.
>
> Add of_node to the component platform data and match against the
> pdata->of_node instead of dev->of_node in imx-drm-core to work around
> this problem.
>
> Cc:  # 4.4.x
> Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading")
> Signed-off-by: Philipp Zabel 

Thanks, Philipp. With this patch HDMI is functional again:

Tested-by: Fabio Estevam 


[PATCH V2] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Thierry Reding
drm_atomic_helper_connector_duplicate_state(connector,
> +   ©->base);
> +
>   return ©->base;
>  }
>  

With the WARN_ON() dropped this looks good to me:

Acked-by: Thierry Reding 
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[PATCH] drm/i915/dp: Try to find proper bpc for DP->legacy converters. (v2)

2016-05-18 Thread Jani Nikula
On Wed, 18 May 2016, Mario Kleiner  wrote:
> On 05/17/2016 08:51 AM, Daniel Vetter wrote:
>> On Thu, May 12, 2016 at 06:43:58PM +0200, Mario Kleiner wrote:
>>> This fixes a regression in output precision for DVI and VGA
>>> video sinks connected to Intel hw via active DisplayPort->DVI/VGA
>>> converters.
>>>
>>> The regression was indirectly introduced by commit 013dd9e03872
>>> ("drm/i915/dp: fall back to 18 bpp when sink capability is unknown").
>>>
>>> Our current drm edid 1.3 handling can't reliably assign a proper
>>> minimum supported display depth of 8 bpc to all DVI sinks, as
>>> mandated by DVI 1.0 spec, section 2.2.11.2 "Monitor data format
>>> support", but returns 0 bpc = "Don't know" instead. For analog VGA
>>> sinks it also returns 0 bpc, although those sinks themselves have
>>> infinite color depth, only restricted by the DAC resolution of
>>> the encoder.
>>>
>>> If a VGA or dual-link DVI display is connected via DisplayPort
>>> connector then due to above commit the driver would fall back to
>>> only 6 bpc, which would cause degradation for DVI and VGA displays,
>>> annoying in general, but especially harmful for application of display
>>> devices used in neuroscience research and for medical diagnosic
>>> which absolutely need native non-dithered 8 bpc at a minimum to
>>> operate correctly.
>>>
>>> For DP connectors with bpc == 0 according to EDID, fix this problem
>>> by checking the dpcd data to find out if a DP->legacy converter
>>> is connected. If the converter is DP->DVI/HDMI assume 8 bpc
>>> depth. If the converter is DP->VGA assume at least 8 bpc, but
>>> try to get a more accurate value (8, 10, 12 or 16 bpc) if the
>>> converter exposes this info.
>>>
>>> Only for a DP sink without downstream ports we assume it is a native DP
>>> sink and apply the 6 bpc / 18 bpp fallback as required by the DP spec.
>>>
>>> As the "fall back to 18 bpp" patch was backported to stable we should
>>> include this one also into stable to fix the regression in color
>>> precision.
>>>
>>> Tested with MiniDP->DP adapter, MiniDP->HDMI adapter,
>>> MiniDP->single-link DVI adapter, MiniDP->dual-link DVI active adapter,
>>> and Apple MiniDP->VGA active adapter.
>>>
>>> v2: Take Ville's feedback into account: Fold the 18 bpp fallback into
>>>  the detection function, so it only applies to native DP sinks.
>>>  Rename intel_dp_legacy_bpc() to intel_dp_sink_bpc().
>>>
>>> Signed-off-by: Mario Kleiner 
>>> Cc: Ville Syrjälä 
>>> Cc: Daniel Vetter 
>>> Cc: stable at vger.kernel.org
>>> ---
>>>   drivers/gpu/drm/i915/intel_display.c | 12 ++--
>>>   drivers/gpu/drm/i915/intel_dp.c  | 59 
>>> 
>>>   drivers/gpu/drm/i915/intel_drv.h |  1 +
>>>   3 files changed, 69 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c 
>>> b/drivers/gpu/drm/i915/intel_display.c
>>> index a297e1f..7ef52db 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -12072,10 +12072,16 @@ connected_sink_compute_bpp(struct intel_connector 
>>> *connector,
>>> int type = connector->base.connector_type;
>>> int clamp_bpp = 24;
>>>
>>> -   /* Fall back to 18 bpp when DP sink capability is unknown. */
>>> +   /* On DisplayPort try harder to find sink bpc */
>>> if (type == DRM_MODE_CONNECTOR_DisplayPort ||
>>> -   type == DRM_MODE_CONNECTOR_eDP)
>>> -   clamp_bpp = 18;
>>> +   type == DRM_MODE_CONNECTOR_eDP) {
>>> +   int sink_bpc = intel_dp_sink_bpc(&connector->base);
>>> +
>>> +   if (sink_bpc) {
>>> +   DRM_DEBUG_KMS("DP sink with bpc %d\n", 
>>> sink_bpc);
>>> +   clamp_bpp = 3 * sink_bpc;
>>> +   }
>>> +   }
>>>
>>> if (bpp > clamp_bpp) {
>>> DRM_DEBUG_KMS("clamping display bpp (was %d) to default 
>>> limit of %d\n",
>>> diff --git a/drivers/gpu/drm/i915/intel_dp.c 
>>> b/drivers/gpu/drm/i915/intel_dp.c
>>> index f192f58..4dbb55b 100644
>>> --- a/drivers/gpu/drm/i915/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>>> @@ -6046,3 +6046,62 @@ void intel_dp_mst_resume(struct drm_device *dev)
>>> }
>>> }
>>>   }
>>> +
>>> +/* XXX Needs work for more than 1 downstream port */
>>> +int intel_dp_sink_bpc(struct drm_connector *connector)
>>
>> I think these kind of functions are pretty much why we have a dp helepr.
>> Can you pls move it there (and add kerneldoc and all the usual
>> bits&pieces). There's also other patches in-flight to add more downstream
>> port handling ...
>> -Daniel
>
> I can factor out the parsing bit into a dp helper function. Getting the 
> dpcd block seems to be driver specific, so a little bit of stub would be 
> left in the kms driver.
>
> However, is this then still fit/small/simple enough for backporting to 
> stable kernels? Fixing

[Bug 118431] New: kernel NULL pointer dereference with a Radeon HD 7970/8970 OEM / R9 280X

2016-05-18 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=118431

Bug ID: 118431
   Summary: kernel NULL pointer dereference with a Radeon HD
7970/8970 OEM / R9 280X
   Product: Drivers
   Version: 2.5
Kernel Version: 4.4.9-300.fc23.x86_64
  Hardware: Intel
OS: Linux
  Tree: Fedora
Status: NEW
  Severity: normal
  Priority: P1
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-dri at kernel-bugs.osdl.org
  Reporter: rafael.espindola at gmail.com
Regression: No

Created attachment 216531
  --> https://bugzilla.kernel.org/attachment.cgi?id=216531&action=edit
dmesg

There is a series of

trying to unbind memory from uninitialized GART

then what looks like a reset of the card followed by 

BUG: unable to handle kernel NULL pointer dereference at 0010

I have been seening the "uninitialized GART" for some time in this machine
(trash can mac pro) for some time, but I think this is the first time I see the
null pointer problem.

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[PATCH 00/24] drm/omap: DSS PLL work

2016-05-18 Thread Tomi Valkeinen
Hi,

The main goal of this work was to get AM5/DRA7 HDMI PLL usable for LCD outputs
(currently it's only usable for HDMI) and to get LCD2 output of AM5/DRA7
working (PLL config for LCD2 is not implemented).

The end result is, in my opinion, quite nice cleanup of the PLL related code,
which had lots of legacy code. Now it should be possible to use any of the PLL
clock setups the HW supports.

However, there's no way yet to configure which clock setup should be used.
There is just one setup, hardcoded in the driver. This setup works for most of
the use cases, but for some it needs to be changed.

That work will be in another series, as I have no idea yet how to implement it.
Even so, the state is much better after this series, as changing the setup only
means one or two simple changes to dpi.c.

 Tomi

Tomi Valkeinen (24):
  drm/omap: remove unused enum omap_hdmi_flags
  drm/omap: remove unused enum omap_overlay_manager_caps
  drm/omap: fix wrong variable type
  drm/omap: video-pll: add missing data for clkout2 & 3
  drm/omap: copy enum omap_dss_clk_source
  drm/omap: rename omap_dss_clk_source
  drm/omap: remove dss_feat_get_clk_source_name()
  drm/omap: rename dss_get_generic_clk_source_name()
  drm/omap: rename dss_clk_source enums
  drm/omap: Add missing clock sources
  drm/omap: add field for PLL type
  drm/omap: clean up the LCD clk mux code
  drm/omap: add PLL helper funcs
  drm/omap: cleanup dispc_mgr_lclk_rate()
  drm/omap: cleanup dispc_fclk_rate()
  drm/omap: cleanup DPI clock source handling
  drm/omap: fix DPI clkout index handling
  drm/omap: HDMI PLL: use runtime pm
  drm/omap: rename PLL calc functions
  drm/omap: move HDMI PLL calc function to pll.c
  drm/omap: generalize dss_pll_calc_b()
  drm/omap: add comments for PLL calculations
  drm/omap: support type B PLL for DPI
  drm/omap: DPI: rename "DSI" related names

 drivers/gpu/drm/omapdrm/dss/dispc.c|  91 ---
 drivers/gpu/drm/omapdrm/dss/dpi.c  | 133 ---
 drivers/gpu/drm/omapdrm/dss/dsi.c  |  55 ---
 drivers/gpu/drm/omapdrm/dss/dss.c  | 252 -
 drivers/gpu/drm/omapdrm/dss/dss.h  |  45 --
 drivers/gpu/drm/omapdrm/dss/dss_features.c |  43 -
 drivers/gpu/drm/omapdrm/dss/dss_features.h |   1 -
 drivers/gpu/drm/omapdrm/dss/hdmi.h |   3 +-
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|   6 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|   6 +-
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c |  75 ++---
 drivers/gpu/drm/omapdrm/dss/pll.c  | 126 ++-
 drivers/gpu/drm/omapdrm/dss/video-pll.c|   6 +
 drivers/video/fbdev/omap2/omapfb/dss/dss.h |  11 ++
 include/video/omapdss.h|  20 ---
 15 files changed, 505 insertions(+), 368 deletions(-)

-- 
2.5.0



[PATCH 01/24] drm/omap: remove unused enum omap_hdmi_flags

2016-05-18 Thread Tomi Valkeinen
'enum omap_hdmi_flags' is not used anywhere, remove it.

Signed-off-by: Tomi Valkeinen 
---
 include/video/omapdss.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 8e14ad7327c9..5b51789259c8 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -210,10 +210,6 @@ enum omap_dss_clk_source {
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,/* OMAP4: PLL2_CLK2 */
 };

-enum omap_hdmi_flags {
-   OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
-};
-
 enum omap_dss_output_id {
OMAP_DSS_OUTPUT_DPI = 1 << 0,
OMAP_DSS_OUTPUT_DBI = 1 << 1,
-- 
2.5.0



[PATCH 02/24] drm/omap: remove unused enum omap_overlay_manager_caps

2016-05-18 Thread Tomi Valkeinen
'enum omap_overlay_manager_caps' is not used anywhere, remove it.

Signed-off-by: Tomi Valkeinen 
---
 include/video/omapdss.h | 5 -
 1 file changed, 5 deletions(-)

diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 5b51789259c8..e4942d046f96 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -195,10 +195,6 @@ enum omap_overlay_caps {
OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
 };

-enum omap_overlay_manager_caps {
-   OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
-};
-
 enum omap_dss_clk_source {
OMAP_DSS_CLK_SRC_FCK = 0,   /* OMAP2/3: DSS1_ALWON_FCLK
 * OMAP4: DSS_FCLK */
@@ -459,7 +455,6 @@ struct omap_overlay_manager {
/* static fields */
const char *name;
enum omap_channel id;
-   enum omap_overlay_manager_caps caps;
struct list_head overlays;
enum omap_display_type supported_displays;
enum omap_dss_output_id supported_outputs;
-- 
2.5.0



[PATCH 03/24] drm/omap: fix wrong variable type

2016-05-18 Thread Tomi Valkeinen
'r' is supposed to be int, not u16, so fix it.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index 06e23a7c432c..efd40f940aaa 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -102,7 +102,7 @@ static int hdmi_pll_enable(struct dss_pll *dsspll)
 {
struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, 
pll);
struct hdmi_wp_data *wp = pll->wp;
-   u16 r = 0;
+   int r;

dss_ctrl_pll_enable(DSS_PLL_HDMI, true);

-- 
2.5.0



[PATCH 04/24] drm/omap: video-pll: add missing data for clkout2 & 3

2016-05-18 Thread Tomi Valkeinen
Video pll hw data is missing bitfield definitions for clkout2 and
clkout3. We don't use those clkouts at the moment, so this has not
caused any issues.

Add the bitfields.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/video-pll.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/video-pll.c 
b/drivers/gpu/drm/omapdrm/dss/video-pll.c
index b1ec59e42940..cc87eb4e2906 100644
--- a/drivers/gpu/drm/omapdrm/dss/video-pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/video-pll.c
@@ -124,6 +124,10 @@ static const struct dss_pll_hw dss_dra7_video_pll_hw = {
.mX_lsb[0] = 21,
.mX_msb[1] = 30,
.mX_lsb[1] = 26,
+   .mX_msb[2] = 4,
+   .mX_lsb[2] = 0,
+   .mX_msb[3] = 9,
+   .mX_lsb[3] = 5,

.has_refsel = true,
 };
-- 
2.5.0



[PATCH 06/24] drm/omap: rename omap_dss_clk_source

2016-05-18 Thread Tomi Valkeinen
'enum omap_dss_clk_source' is internal to dss. Let's rename it to
'dss_clk_source' match our naming convention.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c|  4 ++--
 drivers/gpu/drm/omapdrm/dss/dpi.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/dsi.c  |  2 +-
 drivers/gpu/drm/omapdrm/dss/dss.c  | 20 ++--
 drivers/gpu/drm/omapdrm/dss/dss.h  | 14 +++---
 drivers/gpu/drm/omapdrm/dss/dss_features.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/dss_features.h |  2 +-
 7 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index f83608b69e68..64c97af03eb4 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3426,7 +3426,7 @@ static unsigned long dispc_plane_lclk_rate(enum 
omap_plane plane)
 static void dispc_dump_clocks_channel(struct seq_file *s, enum omap_channel 
channel)
 {
int lcd, pcd;
-   enum omap_dss_clk_source lcd_clk_src;
+   enum dss_clk_source lcd_clk_src;

seq_printf(s, "- %s -\n", mgr_desc[channel].name);

@@ -3448,7 +3448,7 @@ void dispc_dump_clocks(struct seq_file *s)
 {
int lcd;
u32 l;
-   enum omap_dss_clk_source dispc_clk_src = dss_get_dispc_clk_source();
+   enum dss_clk_source dispc_clk_src = dss_get_dispc_clk_source();

if (dispc_runtime_get())
return;
diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 97ea60257884..f2e9638400f2 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -123,7 +123,7 @@ static struct dss_pll *dpi_get_pll(enum omap_channel 
channel)
}
 }

-static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
+static enum dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
 {
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 8730646a0cbb..82858950cad9 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -1484,7 +1484,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
 {
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo;
-   enum omap_dss_clk_source dispc_clk_src, dsi_clk_src;
+   enum dss_clk_source dispc_clk_src, dsi_clk_src;
int dsi_module = dsi->module_id;
struct dss_pll *pll = &dsi->pll;

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index f95ff319e68e..164a9b047971 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -91,9 +91,9 @@ static struct {
unsigned long   cache_prate;
struct dispc_clock_info cache_dispc_cinfo;

-   enum omap_dss_clk_source dsi_clk_source[MAX_NUM_DSI];
-   enum omap_dss_clk_source dispc_clk_source;
-   enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];
+   enum dss_clk_source dsi_clk_source[MAX_NUM_DSI];
+   enum dss_clk_source dispc_clk_source;
+   enum dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS];

boolctx_valid;
u32 ctx[DSS_SZ_REGS / sizeof(u32)];
@@ -353,7 +353,7 @@ void dss_sdi_disable(void)
REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
 }

-const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src)
+const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src)
 {
return dss_generic_clk_source_names[clk_src];
 }
@@ -402,7 +402,7 @@ static void dss_dump_regs(struct seq_file *s)
 #undef DUMPREG
 }

-static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
+static void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
 {
int b;
u8 start, end;
@@ -430,7 +430,7 @@ static void dss_select_dispc_clk_source(enum 
omap_dss_clk_source clk_src)
 }

 void dss_select_dsi_clk_source(int dsi_module,
-   enum omap_dss_clk_source clk_src)
+   enum dss_clk_source clk_src)
 {
int b, pos;

@@ -458,7 +458,7 @@ void dss_select_dsi_clk_source(int dsi_module,
 }

 void dss_select_lcd_clk_source(enum omap_channel channel,
-   enum omap_dss_clk_source clk_src)
+   enum dss_clk_source clk_src)
 {
int b, ix, pos;

@@ -494,17 +494,17 @@ void dss_select_lcd_clk_source(enum omap_channel channel,
dss.lcd_clk_source[ix] = clk_src;
 }

-enum omap_dss_clk_source dss_get_dispc_clk_source(void)
+enum dss_clk_source dss_get_dispc_clk_source(void)
 {
return dss.dispc_clk_source;
 }

-enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module)
+enum dss_clk_source dss_get_dsi_clk_source(int dsi_module)
 {
return dss.dsi_clk_source[dsi_module];
 }

-enum omap_dss_clk_source dss_get_lcd_c

[PATCH 09/24] drm/omap: rename dss_clk_source enums

2016-05-18 Thread Tomi Valkeinen
The names of the enum dss_clk_source's values are legacy names, only
correct for OMAP3 DSS. Rename the names to more generic ones.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 12 +--
 drivers/gpu/drm/omapdrm/dss/dpi.c   | 10 -
 drivers/gpu/drm/omapdrm/dss/dsi.c   | 30 +-
 drivers/gpu/drm/omapdrm/dss/dss.c   | 42 ++---
 drivers/gpu/drm/omapdrm/dss/dss.h   | 15 +++--
 5 files changed, 54 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index e3eaae945946..333a347f877b 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3303,17 +3303,17 @@ static unsigned long dispc_fclk_rate(void)
unsigned long r = 0;

switch (dss_get_dispc_clk_source()) {
-   case OMAP_DSS_CLK_SRC_FCK:
+   case DSS_CLK_SRC_FCK:
r = dss_get_dispc_clk_rate();
break;
-   case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
+   case DSS_CLK_SRC_PLL1_1:
pll = dss_pll_find("dsi0");
if (!pll)
pll = dss_pll_find("video0");

r = pll->cinfo.clkout[0];
break;
-   case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
+   case DSS_CLK_SRC_PLL2_1:
pll = dss_pll_find("dsi1");
if (!pll)
pll = dss_pll_find("video1");
@@ -3341,17 +3341,17 @@ static unsigned long dispc_mgr_lclk_rate(enum 
omap_channel channel)
lcd = FLD_GET(l, 23, 16);

switch (dss_get_lcd_clk_source(channel)) {
-   case OMAP_DSS_CLK_SRC_FCK:
+   case DSS_CLK_SRC_FCK:
r = dss_get_dispc_clk_rate();
break;
-   case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:
+   case DSS_CLK_SRC_PLL1_1:
pll = dss_pll_find("dsi0");
if (!pll)
pll = dss_pll_find("video0");

r = pll->cinfo.clkout[0];
break;
-   case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:
+   case DSS_CLK_SRC_PLL2_1:
pll = dss_pll_find("dsi1");
if (!pll)
pll = dss_pll_find("video1");
diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index f2e9638400f2..487d0549bd23 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -127,15 +127,15 @@ static enum dss_clk_source dpi_get_alt_clk_src(enum 
omap_channel channel)
 {
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
-   return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
+   return DSS_CLK_SRC_PLL1_1;
case OMAP_DSS_CHANNEL_LCD2:
-   return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
+   return DSS_CLK_SRC_PLL2_1;
case OMAP_DSS_CHANNEL_LCD3:
-   return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
+   return DSS_CLK_SRC_PLL2_1;
default:
/* this shouldn't happen */
WARN_ON(1);
-   return OMAP_DSS_CLK_SRC_FCK;
+   return DSS_CLK_SRC_FCK;
}
 }

@@ -465,7 +465,7 @@ static void dpi_display_disable(struct omap_dss_device 
*dssdev)
dss_mgr_disable(channel);

if (dpi->pll) {
-   dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK);
+   dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);
dss_pll_disable(dpi->pll);
}

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index b13257743059..290bd07520f6 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -1271,7 +1271,7 @@ static unsigned long dsi_fclk_rate(struct platform_device 
*dsidev)
unsigned long r;
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);

-   if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) {
+   if (dss_get_dsi_clk_source(dsi->module_id) == DSS_CLK_SRC_FCK) {
/* DSI FCLK source is DSS_CLK_FCK */
r = clk_get_rate(dsi->dss_clk);
} else {
@@ -1505,20 +1505,20 @@ static void dsi_dump_dsidev_clocks(struct 
platform_device *dsidev,

seq_printf(s,   "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n",
dss_get_clk_source_name(dsi_module == 0 ?
-   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC :
-   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC),
+   DSS_CLK_SRC_PLL1_1 :
+   DSS_CLK_SRC_PLL2_1),
cinfo->clkout[HSDIV_DISPC],
cinfo->mX[HSDIV_DISPC],
-   dispc_clk_src ==

[PATCH 05/24] drm/omap: copy enum omap_dss_clk_source

2016-05-18 Thread Tomi Valkeinen
At the moment 'enum omap_dss_clk_source' is in omapdss.h, shared by
omapdrm and omapfb. We're about to improve the omapdrm clock code, so we
need to make a separate copy of the enum for each driver.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dss.h  | 11 +++
 drivers/video/fbdev/omap2/omapfb/dss/dss.h | 11 +++
 include/video/omapdss.h| 11 ---
 3 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 38e6ab50142d..c35245c0fdc7 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -102,6 +102,17 @@ enum dss_writeback_channel {
DSS_WB_LCD3_MGR =   7,
 };

+enum omap_dss_clk_source {
+   OMAP_DSS_CLK_SRC_FCK = 0,   /* OMAP2/3: DSS1_ALWON_FCLK
+* OMAP4: DSS_FCLK */
+   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
+* OMAP4: PLL1_CLK1 */
+   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
+* OMAP4: PLL1_CLK2 */
+   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
+   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,/* OMAP4: PLL2_CLK2 */
+};
+
 enum dss_pll_id {
DSS_PLL_DSI1,
DSS_PLL_DSI2,
diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dss.h 
b/drivers/video/fbdev/omap2/omapfb/dss/dss.h
index 0184a8461df1..a3cc0ca8f9d2 100644
--- a/drivers/video/fbdev/omap2/omapfb/dss/dss.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.h
@@ -73,6 +73,17 @@
 #define FLD_MOD(orig, val, start, end) \
(((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))

+enum omap_dss_clk_source {
+   OMAP_DSS_CLK_SRC_FCK = 0,   /* OMAP2/3: DSS1_ALWON_FCLK
+* OMAP4: DSS_FCLK */
+   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
+* OMAP4: PLL1_CLK1 */
+   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
+* OMAP4: PLL1_CLK2 */
+   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
+   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,/* OMAP4: PLL2_CLK2 */
+};
+
 enum dss_io_pad_mode {
DSS_IO_PAD_MODE_RESET,
DSS_IO_PAD_MODE_RFBI,
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index e4942d046f96..6bd9d03b1030 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -195,17 +195,6 @@ enum omap_overlay_caps {
OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
 };

-enum omap_dss_clk_source {
-   OMAP_DSS_CLK_SRC_FCK = 0,   /* OMAP2/3: DSS1_ALWON_FCLK
-* OMAP4: DSS_FCLK */
-   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
-* OMAP4: PLL1_CLK1 */
-   OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
-* OMAP4: PLL1_CLK2 */
-   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
-   OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,/* OMAP4: PLL2_CLK2 */
-};
-
 enum omap_dss_output_id {
OMAP_DSS_OUTPUT_DPI = 1 << 0,
OMAP_DSS_OUTPUT_DBI = 1 << 1,
-- 
2.5.0



[PATCH 08/24] drm/omap: rename dss_get_generic_clk_source_name()

2016-05-18 Thread Tomi Valkeinen
Now that there is no "non-generic" version of the function to get the
clock source name, lets rename dss_get_generic_clk_source_name() to
dss_get_clk_source_name().

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c   | 6 +++---
 drivers/gpu/drm/omapdrm/dss/dss.c   | 4 ++--
 drivers/gpu/drm/omapdrm/dss/dss.h   | 2 +-
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 398cba588e8e..e3eaae945946 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3433,7 +3433,7 @@ static void dispc_dump_clocks_channel(struct seq_file *s, 
enum omap_channel chan
lcd_clk_src = dss_get_lcd_clk_source(channel);

seq_printf(s, "%s clk source = %s\n", mgr_desc[channel].name,
-   dss_get_generic_clk_source_name(lcd_clk_src));
+   dss_get_clk_source_name(lcd_clk_src));

dispc_mgr_get_lcd_divisor(channel, &lcd, &pcd);

@@ -3455,7 +3455,7 @@ void dispc_dump_clocks(struct seq_file *s)
seq_printf(s, "- DISPC -\n");

seq_printf(s, "dispc fclk source = %s\n",
-   dss_get_generic_clk_source_name(dispc_clk_src));
+   dss_get_clk_source_name(dispc_clk_src));

seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate());

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index f490f23b2bea..b13257743059 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -1504,7 +1504,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
cinfo->clkdco, cinfo->m);

seq_printf(s,   "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n",
-   dss_get_generic_clk_source_name(dsi_module == 0 ?
+   dss_get_clk_source_name(dsi_module == 0 ?
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC :
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC),
cinfo->clkout[HSDIV_DISPC],
@@ -1513,7 +1513,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
"off" : "on");

seq_printf(s,   "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n",
-   dss_get_generic_clk_source_name(dsi_module == 0 ?
+   dss_get_clk_source_name(dsi_module == 0 ?
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI :
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI),
cinfo->clkout[HSDIV_DSI],
@@ -1524,7 +1524,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
seq_printf(s,   "- DSI%d -\n", dsi_module + 1);

seq_printf(s,   "dsi fclk source = %s\n",
-   dss_get_generic_clk_source_name(dsi_clk_src));
+   dss_get_clk_source_name(dsi_clk_src));

seq_printf(s,   "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev));

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 7717948e1c4d..9de30ff4f537 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -353,7 +353,7 @@ void dss_sdi_disable(void)
REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
 }

-const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src)
+const char *dss_get_clk_source_name(enum dss_clk_source clk_src)
 {
return dss_generic_clk_source_names[clk_src];
 }
@@ -368,7 +368,7 @@ void dss_dump_clocks(struct seq_file *s)

seq_printf(s, "- DSS -\n");

-   fclk_name = dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_FCK);
+   fclk_name = dss_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK);
fclk_rate = clk_get_rate(dss.dss_clk);

seq_printf(s, "%s = %lu\n",
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 570641b6474d..5c54c9a808de 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -238,7 +238,7 @@ unsigned long dss_get_dispc_clk_rate(void);
 int dss_dpi_select_source(int port, enum omap_channel channel);
 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
-const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src);
+const char *dss_get_clk_source_name(enum dss_clk_source clk_src);
 void dss_dump_clocks(struct seq_file *s);

 /* DSS VIDEO PLL */
-- 
2.5.0



[PATCH 10/24] drm/omap: Add missing clock sources

2016-05-18 Thread Tomi Valkeinen
enum dss_clk_source does not have values for all clock sources available
on OMAP4+ DSS versions. Add the missing clock sources.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dss.c | 3 +++
 drivers/gpu/drm/omapdrm/dss/dss.h | 4 
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 58d20530059a..598a51b44e4a 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -108,8 +108,11 @@ static const char * const dss_generic_clk_source_names[] = 
{
[DSS_CLK_SRC_FCK]   = "FCK",
[DSS_CLK_SRC_PLL1_1]= "PLL1:1",
[DSS_CLK_SRC_PLL1_2]= "PLL1:2",
+   [DSS_CLK_SRC_PLL1_3]= "PLL1:3",
[DSS_CLK_SRC_PLL2_1]= "PLL2:1",
[DSS_CLK_SRC_PLL2_2]= "PLL2:2",
+   [DSS_CLK_SRC_PLL2_3]= "PLL2:3",
+   [DSS_CLK_SRC_HDMI_PLL]  = "HDMI PLL",
 };

 static bool dss_initialized;
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 56c2d277341a..38e77fac2078 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -107,9 +107,13 @@ enum dss_clk_source {

DSS_CLK_SRC_PLL1_1,
DSS_CLK_SRC_PLL1_2,
+   DSS_CLK_SRC_PLL1_3,

DSS_CLK_SRC_PLL2_1,
DSS_CLK_SRC_PLL2_2,
+   DSS_CLK_SRC_PLL2_3,
+
+   DSS_CLK_SRC_HDMI_PLL,
 };

 enum dss_pll_id {
-- 
2.5.0



[PATCH 11/24] drm/omap: add field for PLL type

2016-05-18 Thread Tomi Valkeinen
DSS uses two types of PLLs, type A (DSI & Video) and type B (HDMI). The
two types behave slightly differently, but we don't have the type of the
PLL available anywhere for the driver.

This patch adds an enum for the PLL type and a field in the PLL's HW
data to store it.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dsi.c   | 6 ++
 drivers/gpu/drm/omapdrm/dss/dss.h   | 7 +++
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c  | 4 
 drivers/gpu/drm/omapdrm/dss/video-pll.c | 2 ++
 4 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 290bd07520f6..5f96a1af138d 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -5147,6 +5147,8 @@ static const struct dss_pll_ops dsi_pll_ops = {
 };

 static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
+   .type = DSS_PLL_TYPE_A,
+
.n_max = (1 << 7) - 1,
.m_max = (1 << 11) - 1,
.mX_max = (1 << 4) - 1,
@@ -5172,6 +5174,8 @@ static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
 };

 static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
+   .type = DSS_PLL_TYPE_A,
+
.n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1,
@@ -5197,6 +5201,8 @@ static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
 };

 static const struct dss_pll_hw dss_omap5_dsi_pll_hw = {
+   .type = DSS_PLL_TYPE_A,
+
.n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1,
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 38e77fac2078..52895ba2d717 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -128,6 +128,11 @@ struct dss_pll;

 #define DSS_PLL_MAX_HSDIVS 4

+enum dss_pll_type {
+   DSS_PLL_TYPE_A,
+   DSS_PLL_TYPE_B,
+};
+
 /*
  * Type-A PLLs: clkout[]/mX[] refer to hsdiv outputs m4, m5, m6, m7.
  * Type-B PLLs: clkout[0] refers to m2.
@@ -154,6 +159,8 @@ struct dss_pll_ops {
 };

 struct dss_pll_hw {
+   enum dss_pll_type type;
+
unsigned n_max;
unsigned m_min;
unsigned m_max;
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index efd40f940aaa..110ed50d5ce1 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -130,6 +130,8 @@ static const struct dss_pll_ops dsi_pll_ops = {
 };

 static const struct dss_pll_hw dss_omap4_hdmi_pll_hw = {
+   .type = DSS_PLL_TYPE_B,
+
.n_max = 255,
.m_min = 20,
.m_max = 4095,
@@ -153,6 +155,8 @@ static const struct dss_pll_hw dss_omap4_hdmi_pll_hw = {
 };

 static const struct dss_pll_hw dss_omap5_hdmi_pll_hw = {
+   .type = DSS_PLL_TYPE_B,
+
.n_max = 255,
.m_min = 20,
.m_max = 2045,
diff --git a/drivers/gpu/drm/omapdrm/dss/video-pll.c 
b/drivers/gpu/drm/omapdrm/dss/video-pll.c
index cc87eb4e2906..c13e1accda17 100644
--- a/drivers/gpu/drm/omapdrm/dss/video-pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/video-pll.c
@@ -108,6 +108,8 @@ static const struct dss_pll_ops dss_pll_ops = {
 };

 static const struct dss_pll_hw dss_dra7_video_pll_hw = {
+   .type = DSS_PLL_TYPE_A,
+
.n_max = (1 << 8) - 1,
.m_max = (1 << 12) - 1,
.mX_max = (1 << 5) - 1,
-- 
2.5.0



[PATCH 12/24] drm/omap: clean up the LCD clk mux code

2016-05-18 Thread Tomi Valkeinen
The code to set the clock muxes for DISPC's LCD clock inputs is very
confusing. Especially on DRA7, there's an additional clock muxing that
needs to be done, which at the moment is done in dpi.c using
dss_ctrl_pll_set_control_mux().

Clean this all up by:
- Using dss_clk_source instead of dss_pll_id, as dss_pll_id doesn't
  specify the clock source quite correctly.
- Splitting the dss_select_lcd_clk_source() up into DSS version specific
  helper functions.
- Using dss_ctrl_pll_set_control_mux() from the helper functions, so
  that dpi.c doesn't have to call it.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c |   4 -
 drivers/gpu/drm/omapdrm/dss/dss.c | 186 +-
 drivers/gpu/drm/omapdrm/dss/dss.h |   2 -
 3 files changed, 141 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 487d0549bd23..d4fbc46536d9 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -606,10 +606,6 @@ static void dpi_init_pll(struct dpi_data *dpi)
if (!pll)
return;

-   /* On DRA7 we need to set a mux to use the PLL */
-   if (omapdss_get_version() == OMAPDSS_VER_DRA7xx)
-   dss_ctrl_pll_set_control_mux(pll->id, 
dpi->output.dispc_channel);
-
if (dpi_verify_dsi_pll(pll)) {
DSSWARN("DSI PLL not operational\n");
return;
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 598a51b44e4a..2937a2812690 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -75,6 +75,8 @@ struct dss_features {
const enum omap_display_type *ports;
int num_ports;
int (*dpi_select_source)(int port, enum omap_channel channel);
+   int (*select_lcd_source)(enum omap_channel channel,
+   enum dss_clk_source clk_src);
 };

 static struct {
@@ -205,68 +207,70 @@ void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool 
enable)
1 << shift, val << shift);
 }

-void dss_ctrl_pll_set_control_mux(enum dss_pll_id pll_id,
+static int dss_ctrl_pll_set_control_mux(enum dss_clk_source clk_src,
enum omap_channel channel)
 {
unsigned shift, val;

if (!dss.syscon_pll_ctrl)
-   return;
+   return -EINVAL;

switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
shift = 3;

-   switch (pll_id) {
-   case DSS_PLL_VIDEO1:
+   switch (clk_src) {
+   case DSS_CLK_SRC_PLL1_1:
val = 0; break;
-   case DSS_PLL_HDMI:
+   case DSS_CLK_SRC_HDMI_PLL:
val = 1; break;
default:
DSSERR("error in PLL mux config for LCD\n");
-   return;
+   return -EINVAL;
}

break;
case OMAP_DSS_CHANNEL_LCD2:
shift = 5;

-   switch (pll_id) {
-   case DSS_PLL_VIDEO1:
+   switch (clk_src) {
+   case DSS_CLK_SRC_PLL1_3:
val = 0; break;
-   case DSS_PLL_VIDEO2:
+   case DSS_CLK_SRC_PLL2_3:
val = 1; break;
-   case DSS_PLL_HDMI:
+   case DSS_CLK_SRC_HDMI_PLL:
val = 2; break;
default:
DSSERR("error in PLL mux config for LCD2\n");
-   return;
+   return -EINVAL;
}

break;
case OMAP_DSS_CHANNEL_LCD3:
shift = 7;

-   switch (pll_id) {
-   case DSS_PLL_VIDEO1:
-   val = 1; break;
-   case DSS_PLL_VIDEO2:
+   switch (clk_src) {
+   case DSS_CLK_SRC_PLL2_1:
val = 0; break;
-   case DSS_PLL_HDMI:
+   case DSS_CLK_SRC_PLL1_3:
+   val = 1; break;
+   case DSS_CLK_SRC_HDMI_PLL:
val = 2; break;
default:
DSSERR("error in PLL mux config for LCD3\n");
-   return;
+   return -EINVAL;
}

break;
default:
DSSERR("error in PLL mux config\n");
-   return;
+   return -EINVAL;
}

regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,
0x3 << shift, val << shift);
+
+   return 0;
 }

 void dss_sdi_init(int datapairs)
@@ -404,11 +408,34 @@ static void dss_dump_regs(struct seq_file *s)
 #undef DUMPREG
 }

+static int dss_get_channel_index(enum omap_channel channel)
+{
+   switch (channel) {
+   case OMAP_DSS_CHANNEL_LCD:
+   return 0;
+   case OMAP_DSS

[PATCH 14/24] drm/omap: cleanup dispc_mgr_lclk_rate()

2016-05-18 Thread Tomi Valkeinen
With the new PLL helpers, we can clean up the dispc_mgr_lclk_rate().
This will also make dispc_mgr_lclk_rate() support clock sources it
didn't support earlier.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 46 ++---
 1 file changed, 17 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 333a347f877b..01994d012ce4 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3330,43 +3330,31 @@ static unsigned long dispc_fclk_rate(void)

 static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
 {
-   struct dss_pll *pll;
int lcd;
unsigned long r;
-   u32 l;
-
-   if (dss_mgr_is_lcd(channel)) {
-   l = dispc_read_reg(DISPC_DIVISORo(channel));
+   enum dss_clk_source src;

-   lcd = FLD_GET(l, 23, 16);
+   /* for TV, LCLK rate is the FCLK rate */
+   if (!dss_mgr_is_lcd(channel))
+   return dispc_fclk_rate();

-   switch (dss_get_lcd_clk_source(channel)) {
-   case DSS_CLK_SRC_FCK:
-   r = dss_get_dispc_clk_rate();
-   break;
-   case DSS_CLK_SRC_PLL1_1:
-   pll = dss_pll_find("dsi0");
-   if (!pll)
-   pll = dss_pll_find("video0");
+   src = dss_get_lcd_clk_source(channel);

-   r = pll->cinfo.clkout[0];
-   break;
-   case DSS_CLK_SRC_PLL2_1:
-   pll = dss_pll_find("dsi1");
-   if (!pll)
-   pll = dss_pll_find("video1");
+   if (src == DSS_CLK_SRC_FCK) {
+   r = dss_get_dispc_clk_rate();
+   } else {
+   struct dss_pll *pll;
+   unsigned clkout_idx;

-   r = pll->cinfo.clkout[0];
-   break;
-   default:
-   BUG();
-   return 0;
-   }
+   pll = dss_pll_find_by_src(src);
+   clkout_idx = dss_pll_get_clkout_idx_for_src(src);

-   return r / lcd;
-   } else {
-   return dispc_fclk_rate();
+   r = pll->cinfo.clkout[clkout_idx];
}
+
+   lcd = REG_GET(DISPC_DIVISORo(channel), 23, 16);
+
+   return r / lcd;
 }

 static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)
-- 
2.5.0



[PATCH 17/24] drm/omap: fix DPI clkout index handling

2016-05-18 Thread Tomi Valkeinen
DPI driver uses a fixed clkout index, 0. This has worked fine as the
first clkout is usually used.

To generalize the code and to support additional clock sources, change
the code to use dss_pll_get_clkout_idx_for_src() to get the clkout
index.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 5a5065691cad..e24b9912c6d2 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -39,8 +39,6 @@
 #include "dss.h"
 #include "dss_features.h"

-#define HSDIV_DISPC0
-
 struct dpi_data {
struct platform_device *pdev;

@@ -128,6 +126,7 @@ static enum dss_clk_source dpi_get_clk_src(enum 
omap_channel channel)

 struct dpi_clk_calc_ctx {
struct dss_pll *pll;
+   unsigned clkout_idx;

/* inputs */

@@ -180,8 +179,8 @@ static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long 
dispc,
if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 1)
return false;

-   ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc;
-   ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc;
+   ctx->dsi_cinfo.mX[ctx->clkout_idx] = m_dispc;
+   ctx->dsi_cinfo.clkout[ctx->clkout_idx] = dispc;

return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
dpi_calc_dispc_cb, ctx);
@@ -222,6 +221,7 @@ static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned 
long pck,

memset(ctx, 0, sizeof(*ctx));
ctx->pll = dpi->pll;
+   ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src);
ctx->pck_min = pck - 1000;
ctx->pck_max = pck + 1000;

@@ -286,7 +286,7 @@ static int dpi_set_dsi_clk(struct dpi_data *dpi, enum 
omap_channel channel,

dpi->mgr_config.clock_info = ctx.dispc_cinfo;

-   *fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
+   *fck = ctx.dsi_cinfo.clkout[ctx.clkout_idx];
*lck_div = ctx.dispc_cinfo.lck_div;
*pck_div = ctx.dispc_cinfo.pck_div;

@@ -514,7 +514,7 @@ static int dpi_check_timings(struct omap_dss_device *dssdev,
if (!ok)
return -EINVAL;

-   fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
+   fck = ctx.dsi_cinfo.clkout[ctx.clkout_idx];
} else {
ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
if (!ok)
-- 
2.5.0



[PATCH 21/24] drm/omap: generalize dss_pll_calc_b()

2016-05-18 Thread Tomi Valkeinen
dss_pll_calc_b() takes HDMI TMDS clock rate as a parameter. To make
dss_pll_calc_b() usable for non-HDMI users, change the function to take
clkout rate as parameter, and also change the current users of
dss_pll_calc_b() to accommodate that.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dss.h   |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi4.c |  3 +++
 drivers/gpu/drm/omapdrm/dss/hdmi5.c |  3 +++
 drivers/gpu/drm/omapdrm/dss/pll.c   | 17 ++---
 4 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 11d9805e3ac3..4fd06dc41cb3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -443,7 +443,7 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned 
long clkin,
dss_pll_calc_func func, void *data);

 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
-   unsigned long target_tmds, struct dss_pll_clock_info *cinfo);
+   unsigned long target_clkout, struct dss_pll_clock_info *cinfo);

 int dss_pll_write_config_type_a(struct dss_pll *pll,
const struct dss_pll_clock_info *cinfo);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index eaf2bd6ffe7d..b1a8926c5b81 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -186,6 +186,9 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
if (p->double_pixel)
pc *= 2;

+   /* DSS_HDMI_TCLK is bitclk / 10 */
+   pc *= 10;
+
dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
pc, &hdmi_cinfo);

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 435061475c30..33998f7f51ab 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -198,6 +198,9 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
if (p->double_pixel)
pc *= 2;

+   /* DSS_HDMI_TCLK is bitclk / 10 */
+   pc *= 10;
+
dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
pc, &hdmi_cinfo);

diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c 
b/drivers/gpu/drm/omapdrm/dss/pll.c
index bdfc88a7caaf..6daf7bc3a67a 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -248,18 +248,21 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned 
long clkin,
return false;
 }

+/*
+ * This calculates a PLL config that will provide the target_clkout rate
+ * for clkout. Additionally clkdco rate will be the same as clkout rate
+ * when clkout rate is >= min_clkdco.
+ */
 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
-   unsigned long target_tmds, struct dss_pll_clock_info *cinfo)
+   unsigned long target_clkout, struct dss_pll_clock_info *cinfo)
 {
unsigned long fint, clkdco, clkout;
-   unsigned long target_bitclk, target_clkdco;
+   unsigned long target_clkdco;
unsigned long min_dco;
unsigned n, m, mf, m2, sd;
const struct dss_pll_hw *hw = pll->hw;

-   DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds);
-
-   target_bitclk = target_tmds * 10;
+   DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout);

/* Fint */
n = DIV_ROUND_UP(clkin, hw->fint_max);
@@ -267,11 +270,11 @@ bool dss_pll_calc_b(const struct dss_pll *pll, unsigned 
long clkin,

/* adjust m2 so that the clkdco will be high enough */
min_dco = roundup(hw->clkdco_min, fint);
-   m2 = DIV_ROUND_UP(min_dco, target_bitclk);
+   m2 = DIV_ROUND_UP(min_dco, target_clkout);
if (m2 == 0)
m2 = 1;

-   target_clkdco = target_bitclk * m2;
+   target_clkdco = target_clkout * m2;
m = target_clkdco / fint;

clkdco = fint * m;
-- 
2.5.0



[PATCH 22/24] drm/omap: add comments for PLL calculations

2016-05-18 Thread Tomi Valkeinen
Add comments showing how the PLL clock rates are calculated.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/pll.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c 
b/drivers/gpu/drm/omapdrm/dss/pll.c
index 6daf7bc3a67a..4768a85e6c73 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -207,6 +207,10 @@ bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, 
unsigned long clkdco,
return false;
 }

+/*
+ * clkdco = clkin / n * m * 2
+ * clkoutX = clkdco / mX
+ */
 bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
unsigned long pll_min, unsigned long pll_max,
dss_pll_calc_func func, void *data)
@@ -252,6 +256,9 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned 
long clkin,
  * This calculates a PLL config that will provide the target_clkout rate
  * for clkout. Additionally clkdco rate will be the same as clkout rate
  * when clkout rate is >= min_clkdco.
+ *
+ * clkdco = clkin / n * m + clkin / n * mf / 262144
+ * clkout = clkdco / m2
  */
 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
unsigned long target_clkout, struct dss_pll_clock_info *cinfo)
-- 
2.5.0



[PATCH 23/24] drm/omap: support type B PLL for DPI

2016-05-18 Thread Tomi Valkeinen
Type A and B PLLs require a bit different calculations for the clock
rates. DPI driver supports only type A PLLs.

This patch adds support for the type B PLL.

Type B PLLs are simpler than type A, as type B can produce a good clock
for almost any rate. Thus we can just ask it to produce the pixel clock
and use one as LCK and PCK dividers.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 31 ++-
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 7d70bfcf89c9..050ec4cd4d59 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -217,22 +217,35 @@ static bool dpi_dsi_clk_calc(struct dpi_data *dpi, 
unsigned long pck,
struct dpi_clk_calc_ctx *ctx)
 {
unsigned long clkin;
-   unsigned long pll_min, pll_max;

memset(ctx, 0, sizeof(*ctx));
ctx->pll = dpi->pll;
ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src);
-   ctx->pck_min = pck - 1000;
-   ctx->pck_max = pck + 1000;

-   pll_min = 0;
-   pll_max = 0;
+   clkin = clk_get_rate(dpi->pll->clkin);

-   clkin = clk_get_rate(ctx->pll->clkin);
+   if (dpi->pll->hw->type == DSS_PLL_TYPE_A) {
+   unsigned long pll_min, pll_max;

-   return dss_pll_calc_a(ctx->pll, clkin,
-   pll_min, pll_max,
-   dpi_calc_pll_cb, ctx);
+   ctx->pck_min = pck - 1000;
+   ctx->pck_max = pck + 1000;
+
+   pll_min = 0;
+   pll_max = 0;
+
+   return dss_pll_calc_a(ctx->pll, clkin,
+   pll_min, pll_max,
+   dpi_calc_pll_cb, ctx);
+   } else { /* DSS_PLL_TYPE_B */
+   dss_pll_calc_b(dpi->pll, clkin, pck, &ctx->dsi_cinfo);
+
+   ctx->dispc_cinfo.lck_div = 1;
+   ctx->dispc_cinfo.pck_div = 1;
+   ctx->dispc_cinfo.lck = ctx->dsi_cinfo.clkout[0];
+   ctx->dispc_cinfo.pck = ctx->dispc_cinfo.lck;
+
+   return true;
+   }
 }

 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
-- 
2.5.0



[PATCH 24/24] drm/omap: DPI: rename "DSI" related names

2016-05-18 Thread Tomi Valkeinen
Originally DSS only had DSI PLLs, and thus the DPI driver has functions
and variables that refer to DSI or DSI PLL. Now we support DSI, VIDEO
and HDMI PLLs, so it's time to remove the DSI references from the code.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 44 +++
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 050ec4cd4d59..db72b507384b 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -134,7 +134,7 @@ struct dpi_clk_calc_ctx {

/* outputs */

-   struct dss_pll_clock_info dsi_cinfo;
+   struct dss_pll_clock_info pll_cinfo;
unsigned long fck;
struct dispc_clock_info dispc_cinfo;
 };
@@ -179,8 +179,8 @@ static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long 
dispc,
if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 1)
return false;

-   ctx->dsi_cinfo.mX[ctx->clkout_idx] = m_dispc;
-   ctx->dsi_cinfo.clkout[ctx->clkout_idx] = dispc;
+   ctx->pll_cinfo.mX[ctx->clkout_idx] = m_dispc;
+   ctx->pll_cinfo.clkout[ctx->clkout_idx] = dispc;

return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
dpi_calc_dispc_cb, ctx);
@@ -193,10 +193,10 @@ static bool dpi_calc_pll_cb(int n, int m, unsigned long 
fint,
 {
struct dpi_clk_calc_ctx *ctx = data;

-   ctx->dsi_cinfo.n = n;
-   ctx->dsi_cinfo.m = m;
-   ctx->dsi_cinfo.fint = fint;
-   ctx->dsi_cinfo.clkdco = clkdco;
+   ctx->pll_cinfo.n = n;
+   ctx->pll_cinfo.m = m;
+   ctx->pll_cinfo.fint = fint;
+   ctx->pll_cinfo.clkdco = clkdco;

return dss_pll_hsdiv_calc_a(ctx->pll, clkdco,
ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
@@ -213,7 +213,7 @@ static bool dpi_calc_dss_cb(unsigned long fck, void *data)
dpi_calc_dispc_cb, ctx);
 }

-static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
+static bool dpi_pll_clk_calc(struct dpi_data *dpi, unsigned long pck,
struct dpi_clk_calc_ctx *ctx)
 {
unsigned long clkin;
@@ -237,11 +237,11 @@ static bool dpi_dsi_clk_calc(struct dpi_data *dpi, 
unsigned long pck,
pll_min, pll_max,
dpi_calc_pll_cb, ctx);
} else { /* DSS_PLL_TYPE_B */
-   dss_pll_calc_b(dpi->pll, clkin, pck, &ctx->dsi_cinfo);
+   dss_pll_calc_b(dpi->pll, clkin, pck, &ctx->pll_cinfo);

ctx->dispc_cinfo.lck_div = 1;
ctx->dispc_cinfo.pck_div = 1;
-   ctx->dispc_cinfo.lck = ctx->dsi_cinfo.clkout[0];
+   ctx->dispc_cinfo.lck = ctx->pll_cinfo.clkout[0];
ctx->dispc_cinfo.pck = ctx->dispc_cinfo.lck;

return true;
@@ -279,7 +279,7 @@ static bool dpi_dss_clk_calc(unsigned long pck, struct 
dpi_clk_calc_ctx *ctx)



-static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
+static int dpi_set_pll_clk(struct dpi_data *dpi, enum omap_channel channel,
unsigned long pck_req, unsigned long *fck, int *lck_div,
int *pck_div)
 {
@@ -287,11 +287,11 @@ static int dpi_set_dsi_clk(struct dpi_data *dpi, enum 
omap_channel channel,
int r;
bool ok;

-   ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
+   ok = dpi_pll_clk_calc(dpi, pck_req, &ctx);
if (!ok)
return -EINVAL;

-   r = dss_pll_set_config(dpi->pll, &ctx.dsi_cinfo);
+   r = dss_pll_set_config(dpi->pll, &ctx.pll_cinfo);
if (r)
return r;

@@ -299,7 +299,7 @@ static int dpi_set_dsi_clk(struct dpi_data *dpi, enum 
omap_channel channel,

dpi->mgr_config.clock_info = ctx.dispc_cinfo;

-   *fck = ctx.dsi_cinfo.clkout[ctx.clkout_idx];
+   *fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
*lck_div = ctx.dispc_cinfo.lck_div;
*pck_div = ctx.dispc_cinfo.pck_div;

@@ -341,7 +341,7 @@ static int dpi_set_mode(struct dpi_data *dpi)
int r = 0;

if (dpi->pll)
-   r = dpi_set_dsi_clk(dpi, channel, t->pixelclock, &fck,
+   r = dpi_set_pll_clk(dpi, channel, t->pixelclock, &fck,
&lck_div, &pck_div);
else
r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
@@ -418,7 +418,7 @@ static int dpi_display_enable(struct omap_dss_device 
*dssdev)
if (dpi->pll) {
r = dss_pll_enable(dpi->pll);
if (r)
-   goto err_dsi_pll_init;
+   goto err_pll_init;
}

r = dpi_set_mode(dpi);
@@ -441,7 +441,7 @@ err_mgr_enable:
 err_set_mode:
if (dpi->pll)
dss_pll_disable(dpi->pll);
-err_dsi_pll_init:
+err_pll_init:
 err_src_sel:
dispc_runtime_put();
 err_get_dispc:
@@ -523,11 +523,11 @@ st

[PATCH 07/24] drm/omap: remove dss_feat_get_clk_source_name()

2016-05-18 Thread Tomi Valkeinen
We have two functions to return a name for clock sources for debugging
purposes: dss_feat_get_clk_source_name() and
dss_get_generic_clk_source_name().

The former is supposed to return a DSS IP version specific name for the
clock source, and the latter is supposed to return a more generic name.

All this seems a bit pointless, so let's remove the former one.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c| 10 +++
 drivers/gpu/drm/omapdrm/dss/dsi.c  |  9 +++
 drivers/gpu/drm/omapdrm/dss/dss.c  |  7 +++--
 drivers/gpu/drm/omapdrm/dss/dss_features.c | 43 --
 drivers/gpu/drm/omapdrm/dss/dss_features.h |  1 -
 5 files changed, 11 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 64c97af03eb4..398cba588e8e 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3432,9 +3432,8 @@ static void dispc_dump_clocks_channel(struct seq_file *s, 
enum omap_channel chan

lcd_clk_src = dss_get_lcd_clk_source(channel);

-   seq_printf(s, "%s clk source = %s (%s)\n", mgr_desc[channel].name,
-   dss_get_generic_clk_source_name(lcd_clk_src),
-   dss_feat_get_clk_source_name(lcd_clk_src));
+   seq_printf(s, "%s clk source = %s\n", mgr_desc[channel].name,
+   dss_get_generic_clk_source_name(lcd_clk_src));

dispc_mgr_get_lcd_divisor(channel, &lcd, &pcd);

@@ -3455,9 +3454,8 @@ void dispc_dump_clocks(struct seq_file *s)

seq_printf(s, "- DISPC -\n");

-   seq_printf(s, "dispc fclk source = %s (%s)\n",
-   dss_get_generic_clk_source_name(dispc_clk_src),
-   dss_feat_get_clk_source_name(dispc_clk_src));
+   seq_printf(s, "dispc fclk source = %s\n",
+   dss_get_generic_clk_source_name(dispc_clk_src));

seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate());

diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 82858950cad9..f490f23b2bea 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -1504,7 +1504,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
cinfo->clkdco, cinfo->m);

seq_printf(s,   "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n",
-   dss_feat_get_clk_source_name(dsi_module == 0 ?
+   dss_get_generic_clk_source_name(dsi_module == 0 ?
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC :
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC),
cinfo->clkout[HSDIV_DISPC],
@@ -1513,7 +1513,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,
"off" : "on");

seq_printf(s,   "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n",
-   dss_feat_get_clk_source_name(dsi_module == 0 ?
+   dss_get_generic_clk_source_name(dsi_module == 0 ?
OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI :
OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI),
cinfo->clkout[HSDIV_DSI],
@@ -1523,9 +1523,8 @@ static void dsi_dump_dsidev_clocks(struct platform_device 
*dsidev,

seq_printf(s,   "- DSI%d -\n", dsi_module + 1);

-   seq_printf(s,   "dsi fclk source = %s (%s)\n",
-   dss_get_generic_clk_source_name(dsi_clk_src),
-   dss_feat_get_clk_source_name(dsi_clk_src));
+   seq_printf(s,   "dsi fclk source = %s\n",
+   dss_get_generic_clk_source_name(dsi_clk_src));

seq_printf(s,   "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev));

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 164a9b047971..7717948e1c4d 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -360,7 +360,7 @@ const char *dss_get_generic_clk_source_name(enum 
dss_clk_source clk_src)

 void dss_dump_clocks(struct seq_file *s)
 {
-   const char *fclk_name, *fclk_real_name;
+   const char *fclk_name;
unsigned long fclk_rate;

if (dss_runtime_get())
@@ -369,11 +369,10 @@ void dss_dump_clocks(struct seq_file *s)
seq_printf(s, "- DSS -\n");

fclk_name = dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_FCK);
-   fclk_real_name = dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK);
fclk_rate = clk_get_rate(dss.dss_clk);

-   seq_printf(s, "%s (%s) = %lu\n",
-   fclk_name, fclk_real_name,
+   seq_printf(s, "%s = %lu\n",
+   fclk_name,
fclk_rate);

dss_runtime_put();
diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c 
b/drivers/gpu/drm/omapdrm/dss/dss_features.c
index 0f2eee313ba8..c025d44ae164 100644
--- a/drive

[PATCH 13/24] drm/omap: add PLL helper funcs

2016-05-18 Thread Tomi Valkeinen
Add two PLL helper functions:

dss_pll_find_by_src() which returns the dss_pll for the given
dss_clk_source.

dss_pll_get_clkout_idx_for_src() which returns the clkout index for the
given dss_clk_source.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dss.h |  2 ++
 drivers/gpu/drm/omapdrm/dss/pll.c | 53 +++
 2 files changed, 55 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 1ef53bbdddea..57ee26e5d1cd 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -428,6 +428,8 @@ typedef bool (*dss_hsdiv_calc_func)(int m_dispc, unsigned 
long dispc,
 int dss_pll_register(struct dss_pll *pll);
 void dss_pll_unregister(struct dss_pll *pll);
 struct dss_pll *dss_pll_find(const char *name);
+struct dss_pll *dss_pll_find_by_src(enum dss_clk_source src);
+unsigned dss_pll_get_clkout_idx_for_src(enum dss_clk_source src);
 int dss_pll_enable(struct dss_pll *pll);
 void dss_pll_disable(struct dss_pll *pll);
 int dss_pll_set_config(struct dss_pll *pll,
diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c 
b/drivers/gpu/drm/omapdrm/dss/pll.c
index f974ddcd3b6e..c93233ed3601 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -76,6 +76,59 @@ struct dss_pll *dss_pll_find(const char *name)
return NULL;
 }

+struct dss_pll *dss_pll_find_by_src(enum dss_clk_source src)
+{
+   struct dss_pll *pll;
+
+   switch (src) {
+   default:
+   case DSS_CLK_SRC_FCK:
+   return NULL;
+
+   case DSS_CLK_SRC_HDMI_PLL:
+   return dss_pll_find("hdmi");
+
+   case DSS_CLK_SRC_PLL1_1:
+   case DSS_CLK_SRC_PLL1_2:
+   case DSS_CLK_SRC_PLL1_3:
+   pll = dss_pll_find("dsi0");
+   if (!pll)
+   pll = dss_pll_find("video0");
+   return pll;
+
+   case DSS_CLK_SRC_PLL2_1:
+   case DSS_CLK_SRC_PLL2_2:
+   case DSS_CLK_SRC_PLL2_3:
+   pll = dss_pll_find("dsi1");
+   if (!pll)
+   pll = dss_pll_find("video1");
+   return pll;
+   }
+}
+
+unsigned dss_pll_get_clkout_idx_for_src(enum dss_clk_source src)
+{
+   switch (src) {
+   case DSS_CLK_SRC_HDMI_PLL:
+   return 0;
+
+   case DSS_CLK_SRC_PLL1_1:
+   case DSS_CLK_SRC_PLL2_1:
+   return 0;
+
+   case DSS_CLK_SRC_PLL1_2:
+   case DSS_CLK_SRC_PLL2_2:
+   return 1;
+
+   case DSS_CLK_SRC_PLL1_3:
+   case DSS_CLK_SRC_PLL2_3:
+   return 2;
+
+   default:
+   return 0;
+   }
+}
+
 int dss_pll_enable(struct dss_pll *pll)
 {
int r;
-- 
2.5.0



[PATCH 15/24] drm/omap: cleanup dispc_fclk_rate()

2016-05-18 Thread Tomi Valkeinen
With the new PLL helpers, we can clean up the dispc_fclk_rate(). This
will also make dispc_fclk_rate() support clock sources it didn't support
earlier.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 31 +++
 1 file changed, 11 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c 
b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 01994d012ce4..7b78da6d51cf 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3299,30 +3299,21 @@ static void dispc_mgr_get_lcd_divisor(enum omap_channel 
channel, int *lck_div,

 static unsigned long dispc_fclk_rate(void)
 {
-   struct dss_pll *pll;
-   unsigned long r = 0;
+   unsigned long r;
+   enum dss_clk_source src;

-   switch (dss_get_dispc_clk_source()) {
-   case DSS_CLK_SRC_FCK:
+   src = dss_get_dispc_clk_source();
+
+   if (src == DSS_CLK_SRC_FCK) {
r = dss_get_dispc_clk_rate();
-   break;
-   case DSS_CLK_SRC_PLL1_1:
-   pll = dss_pll_find("dsi0");
-   if (!pll)
-   pll = dss_pll_find("video0");
+   } else {
+   struct dss_pll *pll;
+   unsigned clkout_idx;

-   r = pll->cinfo.clkout[0];
-   break;
-   case DSS_CLK_SRC_PLL2_1:
-   pll = dss_pll_find("dsi1");
-   if (!pll)
-   pll = dss_pll_find("video1");
+   pll = dss_pll_find_by_src(src);
+   clkout_idx = dss_pll_get_clkout_idx_for_src(src);

-   r = pll->cinfo.clkout[0];
-   break;
-   default:
-   BUG();
-   return 0;
+   r = pll->cinfo.clkout[clkout_idx];
}

return r;
-- 
2.5.0



[PATCH 16/24] drm/omap: cleanup DPI clock source handling

2016-05-18 Thread Tomi Valkeinen
We can clean up the DPI driver's clock source handling by using the
dss_clk_source instead of only a dss_pll pointer.

This will also make it possible to use additional clock sources, like
PLL1_3 or HDMI_PLL, which the code did not support earlier.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 48 +++
 1 file changed, 18 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index d4fbc46536d9..5a5065691cad 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -45,6 +45,7 @@ struct dpi_data {
struct platform_device *pdev;

struct regulator *vdds_dsi_reg;
+   enum dss_clk_source clk_src;
struct dss_pll *pll;

struct mutex lock;
@@ -69,7 +70,7 @@ static struct dpi_data *dpi_get_data_from_pdev(struct 
platform_device *pdev)
return dev_get_drvdata(&pdev->dev);
 }

-static struct dss_pll *dpi_get_pll(enum omap_channel channel)
+static enum dss_clk_source dpi_get_clk_src(enum omap_channel channel)
 {
/*
 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
@@ -83,58 +84,44 @@ static struct dss_pll *dpi_get_pll(enum omap_channel 
channel)
case OMAPDSS_VER_OMAP3630:
case OMAPDSS_VER_AM35xx:
case OMAPDSS_VER_AM43xx:
-   return NULL;
+   return DSS_CLK_SRC_FCK;

case OMAPDSS_VER_OMAP4430_ES1:
case OMAPDSS_VER_OMAP4430_ES2:
case OMAPDSS_VER_OMAP4:
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
-   return dss_pll_find("dsi0");
+   return DSS_CLK_SRC_PLL1_1;
case OMAP_DSS_CHANNEL_LCD2:
-   return dss_pll_find("dsi1");
+   return DSS_CLK_SRC_PLL2_1;
default:
-   return NULL;
+   return DSS_CLK_SRC_FCK;
}

case OMAPDSS_VER_OMAP5:
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
-   return dss_pll_find("dsi0");
+   return DSS_CLK_SRC_PLL1_1;
case OMAP_DSS_CHANNEL_LCD3:
-   return dss_pll_find("dsi1");
+   return DSS_CLK_SRC_PLL2_1;
+   case OMAP_DSS_CHANNEL_LCD2:
default:
-   return NULL;
+   return DSS_CLK_SRC_FCK;
}

case OMAPDSS_VER_DRA7xx:
switch (channel) {
case OMAP_DSS_CHANNEL_LCD:
+   return DSS_CLK_SRC_PLL1_1;
case OMAP_DSS_CHANNEL_LCD2:
-   return dss_pll_find("video0");
+   return DSS_CLK_SRC_PLL1_3;
case OMAP_DSS_CHANNEL_LCD3:
-   return dss_pll_find("video1");
+   return DSS_CLK_SRC_PLL2_1;
default:
-   return NULL;
+   return DSS_CLK_SRC_FCK;
}

default:
-   return NULL;
-   }
-}
-
-static enum dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
-{
-   switch (channel) {
-   case OMAP_DSS_CHANNEL_LCD:
-   return DSS_CLK_SRC_PLL1_1;
-   case OMAP_DSS_CHANNEL_LCD2:
-   return DSS_CLK_SRC_PLL2_1;
-   case OMAP_DSS_CHANNEL_LCD3:
-   return DSS_CLK_SRC_PLL2_1;
-   default:
-   /* this shouldn't happen */
-   WARN_ON(1);
return DSS_CLK_SRC_FCK;
}
 }
@@ -295,8 +282,7 @@ static int dpi_set_dsi_clk(struct dpi_data *dpi, enum 
omap_channel channel,
if (r)
return r;

-   dss_select_lcd_clk_source(channel,
-   dpi_get_alt_clk_src(channel));
+   dss_select_lcd_clk_source(channel, dpi->clk_src);

dpi->mgr_config.clock_info = ctx.dispc_cinfo;

@@ -602,7 +588,9 @@ static void dpi_init_pll(struct dpi_data *dpi)
if (dpi->pll)
return;

-   pll = dpi_get_pll(dpi->output.dispc_channel);
+   dpi->clk_src = dpi_get_clk_src(dpi->output.dispc_channel);
+
+   pll = dss_pll_find_by_src(dpi->clk_src);
if (!pll)
return;

-- 
2.5.0



[PATCH 18/24] drm/omap: HDMI PLL: use runtime pm

2016-05-18 Thread Tomi Valkeinen
To make it possible to use HDMI PLL for other video outputs than HDMI,
the HDMI PLL code needs to do runtime_get/put for the HDMI IP, so that
the IP (include the PLL) is enabled.

To do that we also need to store the HDMI pdev in the hdmi_pll_data.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi.h | 1 +
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 9 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h 
b/drivers/gpu/drm/omapdrm/dss/hdmi.h
index 53616b02b613..d8757abfa175 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi.h
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h
@@ -240,6 +240,7 @@ struct hdmi_pll_data {

void __iomem *base;

+   struct platform_device *pdev;
struct hdmi_wp_data *wp;
 };

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index 110ed50d5ce1..a9896e7454c5 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 

@@ -104,6 +105,9 @@ static int hdmi_pll_enable(struct dss_pll *dsspll)
struct hdmi_wp_data *wp = pll->wp;
int r;

+   r = pm_runtime_get_sync(&pll->pdev->dev);
+   WARN_ON(r < 0);
+
dss_ctrl_pll_enable(DSS_PLL_HDMI, true);

r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS);
@@ -117,10 +121,14 @@ static void hdmi_pll_disable(struct dss_pll *dsspll)
 {
struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, 
pll);
struct hdmi_wp_data *wp = pll->wp;
+   int r;

hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);

dss_ctrl_pll_enable(DSS_PLL_HDMI, false);
+
+   r = pm_runtime_put_sync(&pll->pdev->dev);
+   WARN_ON(r < 0 && r != -ENOSYS);
 }

 static const struct dss_pll_ops dsi_pll_ops = {
@@ -228,6 +236,7 @@ int hdmi_pll_init(struct platform_device *pdev, struct 
hdmi_pll_data *pll,
int r;
struct resource *res;

+   pll->pdev = pdev;
pll->wp = wp;

res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll");
-- 
2.5.0



[PATCH 19/24] drm/omap: rename PLL calc functions

2016-05-18 Thread Tomi Valkeinen
Add a "_a" postfix to the type A PLL calc functions, to differentiate
them from the type B PLL calculations which we will add shortly.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 4 ++--
 drivers/gpu/drm/omapdrm/dss/dsi.c | 8 
 drivers/gpu/drm/omapdrm/dss/dss.h | 4 ++--
 drivers/gpu/drm/omapdrm/dss/pll.c | 4 ++--
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index e24b9912c6d2..7d70bfcf89c9 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -198,7 +198,7 @@ static bool dpi_calc_pll_cb(int n, int m, unsigned long 
fint,
ctx->dsi_cinfo.fint = fint;
ctx->dsi_cinfo.clkdco = clkdco;

-   return dss_pll_hsdiv_calc(ctx->pll, clkdco,
+   return dss_pll_hsdiv_calc_a(ctx->pll, clkdco,
ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
dpi_calc_hsdiv_cb, ctx);
 }
@@ -230,7 +230,7 @@ static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned 
long pck,

clkin = clk_get_rate(ctx->pll->clkin);

-   return dss_pll_calc(ctx->pll, clkin,
+   return dss_pll_calc_a(ctx->pll, clkin,
pll_min, pll_max,
dpi_calc_pll_cb, ctx);
 }
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 5f96a1af138d..ee8bbfa468f3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -4461,7 +4461,7 @@ static bool dsi_cm_calc_pll_cb(int n, int m, unsigned 
long fint,
ctx->dsi_cinfo.fint = fint;
ctx->dsi_cinfo.clkdco = clkdco;

-   return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min,
+   return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
dsi_cm_calc_hsdiv_cb, ctx);
 }
@@ -4500,7 +4500,7 @@ static bool dsi_cm_calc(struct dsi_data *dsi,
pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4);
pll_max = cfg->hs_clk_max * 4;

-   return dss_pll_calc(ctx->pll, clkin,
+   return dss_pll_calc_a(ctx->pll, clkin,
pll_min, pll_max,
dsi_cm_calc_pll_cb, ctx);
 }
@@ -4759,7 +4759,7 @@ static bool dsi_vm_calc_pll_cb(int n, int m, unsigned 
long fint,
ctx->dsi_cinfo.fint = fint;
ctx->dsi_cinfo.clkdco = clkdco;

-   return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min,
+   return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
dsi_vm_calc_hsdiv_cb, ctx);
 }
@@ -4801,7 +4801,7 @@ static bool dsi_vm_calc(struct dsi_data *dsi,
pll_max = byteclk_max * 4 * 4;
}

-   return dss_pll_calc(ctx->pll, clkin,
+   return dss_pll_calc_a(ctx->pll, clkin,
pll_min, pll_max,
dsi_vm_calc_pll_cb, ctx);
 }
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 57ee26e5d1cd..6a4b718f234e 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -435,10 +435,10 @@ void dss_pll_disable(struct dss_pll *pll);
 int dss_pll_set_config(struct dss_pll *pll,
const struct dss_pll_clock_info *cinfo);

-bool dss_pll_hsdiv_calc(const struct dss_pll *pll, unsigned long clkdco,
+bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco,
unsigned long out_min, unsigned long out_max,
dss_hsdiv_calc_func func, void *data);
-bool dss_pll_calc(const struct dss_pll *pll, unsigned long clkin,
+bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
unsigned long pll_min, unsigned long pll_max,
dss_pll_calc_func func, void *data);
 int dss_pll_write_config_type_a(struct dss_pll *pll,
diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c 
b/drivers/gpu/drm/omapdrm/dss/pll.c
index c93233ed3601..0242917cb281 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -182,7 +182,7 @@ int dss_pll_set_config(struct dss_pll *pll, const struct 
dss_pll_clock_info *cin
return 0;
 }

-bool dss_pll_hsdiv_calc(const struct dss_pll *pll, unsigned long clkdco,
+bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, unsigned long clkdco,
unsigned long out_min, unsigned long out_max,
dss_hsdiv_calc_func func, void *data)
 {
@@ -207,7 +207,7 @@ bool dss_pll_hsdiv_calc(const struct dss_pll *pll, unsigned 
long clkdco,
return false;
 }

-bool dss_pll_calc(const struct dss_pll *pll, unsigned long clkin,
+bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
unsigned long pll_min, unsigned long pll_max,
dss_pll_calc_func func, void *data)
 {
-- 
2.5.0



[PATCH 20/24] drm/omap: move HDMI PLL calc function to pll.c

2016-05-18 Thread Tomi Valkeinen
Move hdmi_pll_compute(), used to calculate the config for HDMI PLL, from
hdmi_pll.c to pll.c, with the name of dss_pll_calc_b(), to make it
available to non-HDMI users.

Signed-off-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dss.h  |  4 +++
 drivers/gpu/drm/omapdrm/dss/hdmi.h |  2 --
 drivers/gpu/drm/omapdrm/dss/hdmi4.c|  3 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c|  3 +-
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 60 --
 drivers/gpu/drm/omapdrm/dss/pll.c  | 59 +
 6 files changed, 67 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h 
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 6a4b718f234e..11d9805e3ac3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -441,6 +441,10 @@ bool dss_pll_hsdiv_calc_a(const struct dss_pll *pll, 
unsigned long clkdco,
 bool dss_pll_calc_a(const struct dss_pll *pll, unsigned long clkin,
unsigned long pll_min, unsigned long pll_max,
dss_pll_calc_func func, void *data);
+
+bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
+   unsigned long target_tmds, struct dss_pll_clock_info *cinfo);
+
 int dss_pll_write_config_type_a(struct dss_pll *pll,
const struct dss_pll_clock_info *cinfo);
 int dss_pll_write_config_type_b(struct dss_pll *pll,
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h 
b/drivers/gpu/drm/omapdrm/dss/hdmi.h
index d8757abfa175..597ee204d699 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi.h
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h
@@ -307,8 +307,6 @@ phys_addr_t hdmi_wp_get_audio_dma_addr(struct hdmi_wp_data 
*wp);

 /* HDMI PLL funcs */
 void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s);
-void hdmi_pll_compute(struct hdmi_pll_data *pll,
-   unsigned long target_tmds, struct dss_pll_clock_info *pi);
 int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
struct hdmi_wp_data *wp);
 void hdmi_pll_uninit(struct hdmi_pll_data *hpll);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index f892ae157ff3..eaf2bd6ffe7d 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -186,7 +186,8 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
if (p->double_pixel)
pc *= 2;

-   hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
+   dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
+   pc, &hdmi_cinfo);

r = dss_pll_enable(&hdmi.pll.pll);
if (r) {
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index a43f7b10e113..435061475c30 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -198,7 +198,8 @@ static int hdmi_power_on_full(struct omap_dss_device 
*dssdev)
if (p->double_pixel)
pc *= 2;

-   hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
+   dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
+   pc, &hdmi_cinfo);

/* disable and clear irqs */
hdmi_wp_clear_irqenable(&hdmi.wp, 0x);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
index a9896e7454c5..ac866d23c2dc 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -39,66 +39,6 @@ void hdmi_pll_dump(struct hdmi_pll_data *pll, struct 
seq_file *s)
DUMPPLL(PLLCTRL_CFG4);
 }

-void hdmi_pll_compute(struct hdmi_pll_data *pll,
-   unsigned long target_tmds, struct dss_pll_clock_info *pi)
-{
-   unsigned long fint, clkdco, clkout;
-   unsigned long target_bitclk, target_clkdco;
-   unsigned long min_dco;
-   unsigned n, m, mf, m2, sd;
-   unsigned long clkin;
-   const struct dss_pll_hw *hw = pll->pll.hw;
-
-   clkin = clk_get_rate(pll->pll.clkin);
-
-   DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds);
-
-   target_bitclk = target_tmds * 10;
-
-   /* Fint */
-   n = DIV_ROUND_UP(clkin, hw->fint_max);
-   fint = clkin / n;
-
-   /* adjust m2 so that the clkdco will be high enough */
-   min_dco = roundup(hw->clkdco_min, fint);
-   m2 = DIV_ROUND_UP(min_dco, target_bitclk);
-   if (m2 == 0)
-   m2 = 1;
-
-   target_clkdco = target_bitclk * m2;
-   m = target_clkdco / fint;
-
-   clkdco = fint * m;
-
-   /* adjust clkdco with fractional mf */
-   if (WARN_ON(target_clkdco - clkdco > fint))
-   mf = 0;
-   else
-   mf = (u32)div_u64(262144ull * (target_clkdco - clkdco), fint);
-
-   if (mf > 0)
-   clkdco += (u32)div_u64((u64)mf * fint, 262144);
-
-   clkout = clkdco / m2;
-
-   /* sigma-delta */
-   sd = DIV_ROUND_UP(fint * m, 25000);
-
-   DSSDBG("N = %u, M = %u, M.f = %u, M2 = %u, SD = %u\n",
- 

[PATCH V3] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Jon Hunter
Commit d2307dea14a4 ("drm/atomic: use connector references (v3)") added
reference counting for DRM connectors and this caused a crash when
exercising system suspend on Tegra114 Dalmore.

The Tegra DSI driver implements a Tegra specific function,
tegra_dsi_connector_duplicate_state(), to duplicate the connector state
and destroys the state using the generic helper function,
drm_atomic_helper_connector_destroy_state(). Following commit
d2307dea14a4 ("drm/atomic: use connector references (v3)") there is
now an imbalance in the connector reference count because the Tegra
function to duplicate state does not take a reference when duplicating
the state information. However, the generic helper function to destroy
the state information assumes a reference has been taken and during
system suspend, when the connector state is destroyed, this leads to a
crash because we attempt to put the reference for an object that has
already been freed.

Fix this by calling __drm_atomic_helper_connector_duplicate_state() from
tegra_dsi_connector_duplicate_state() to ensure that we take a reference
on a connector if crtc is set. Note that this will also copy the
connector state a 2nd time, but this should be harmless.

By fixing tegra_dsi_connector_duplicate_state() to take a reference,
although a crash was no longer seen, it was then observed that after
each system suspend-resume cycle, the reference would be one greater
than before the suspend-resume cycle. Following commit d2307dea14a4
("drm/atomic: use connector references (v3)"), it was found that we
also need to put the reference when calling the function
tegra_dsi_connector_reset() before freeing the state. Fix this by
updating tegra_dsi_connector_reset() to call the function
__drm_atomic_helper_connector_destroy_state() in order to put the
reference for the connector.

Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")

Signed-off-by: Jon Hunter 
Reviewed-by: Daniel Vetter 
Acked-by: Thierry Reding 
---

V3 changes:
- Dropped WARN_ON

V2 changes:
- Updated to next-20160518
- Replaced open coding of call to drm_connector_reference() with
  __drm_atomic_helper_connector_duplicate_state() per Daniel's feedback.

 drivers/gpu/drm/tegra/dsi.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 44e102799195..d1239ebc190f 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -745,13 +745,17 @@ static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)

 static void tegra_dsi_connector_reset(struct drm_connector *connector)
 {
-   struct tegra_dsi_state *state =
-   kzalloc(sizeof(*state), GFP_KERNEL);
+   struct tegra_dsi_state *state = kzalloc(sizeof(*state), GFP_KERNEL);

-   if (state) {
+   if (!state)
+   return;
+
+   if (connector->state) {
+   __drm_atomic_helper_connector_destroy_state(connector->state);
kfree(connector->state);
-   __drm_atomic_helper_connector_reset(connector, &state->base);
}
+
+   __drm_atomic_helper_connector_reset(connector, &state->base);
 }

 static struct drm_connector_state *
@@ -764,6 +768,9 @@ tegra_dsi_connector_duplicate_state(struct drm_connector 
*connector)
if (!copy)
return NULL;

+   __drm_atomic_helper_connector_duplicate_state(connector,
+ ©->base);
+
return ©->base;
 }

-- 
2.1.4



[PATCH V3] drm/tegra: Fix crash caused by reference count imbalance

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 04:37:36PM +0100, Jon Hunter wrote:
> Commit d2307dea14a4 ("drm/atomic: use connector references (v3)") added
> reference counting for DRM connectors and this caused a crash when
> exercising system suspend on Tegra114 Dalmore.
> 
> The Tegra DSI driver implements a Tegra specific function,
> tegra_dsi_connector_duplicate_state(), to duplicate the connector state
> and destroys the state using the generic helper function,
> drm_atomic_helper_connector_destroy_state(). Following commit
> d2307dea14a4 ("drm/atomic: use connector references (v3)") there is
> now an imbalance in the connector reference count because the Tegra
> function to duplicate state does not take a reference when duplicating
> the state information. However, the generic helper function to destroy
> the state information assumes a reference has been taken and during
> system suspend, when the connector state is destroyed, this leads to a
> crash because we attempt to put the reference for an object that has
> already been freed.
> 
> Fix this by calling __drm_atomic_helper_connector_duplicate_state() from
> tegra_dsi_connector_duplicate_state() to ensure that we take a reference
> on a connector if crtc is set. Note that this will also copy the
> connector state a 2nd time, but this should be harmless.
> 
> By fixing tegra_dsi_connector_duplicate_state() to take a reference,
> although a crash was no longer seen, it was then observed that after
> each system suspend-resume cycle, the reference would be one greater
> than before the suspend-resume cycle. Following commit d2307dea14a4
> ("drm/atomic: use connector references (v3)"), it was found that we
> also need to put the reference when calling the function
> tegra_dsi_connector_reset() before freeing the state. Fix this by
> updating tegra_dsi_connector_reset() to call the function
> __drm_atomic_helper_connector_destroy_state() in order to put the
> reference for the connector.
> 
> Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")
> 
> Signed-off-by: Jon Hunter 
> Reviewed-by: Daniel Vetter 
> Acked-by: Thierry Reding 

Applied to drm-misc, thanks.
-Daniel

> ---
> 
> V3 changes:
> - Dropped WARN_ON
> 
> V2 changes:
> - Updated to next-20160518
> - Replaced open coding of call to drm_connector_reference() with
>   __drm_atomic_helper_connector_duplicate_state() per Daniel's feedback.
> 
>  drivers/gpu/drm/tegra/dsi.c | 15 +++
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
> index 44e102799195..d1239ebc190f 100644
> --- a/drivers/gpu/drm/tegra/dsi.c
> +++ b/drivers/gpu/drm/tegra/dsi.c
> @@ -745,13 +745,17 @@ static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)
>  
>  static void tegra_dsi_connector_reset(struct drm_connector *connector)
>  {
> - struct tegra_dsi_state *state =
> - kzalloc(sizeof(*state), GFP_KERNEL);
> + struct tegra_dsi_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
>  
> - if (state) {
> + if (!state)
> + return;
> +
> + if (connector->state) {
> + __drm_atomic_helper_connector_destroy_state(connector->state);
>   kfree(connector->state);
> - __drm_atomic_helper_connector_reset(connector, &state->base);
>   }
> +
> + __drm_atomic_helper_connector_reset(connector, &state->base);
>  }
>  
>  static struct drm_connector_state *
> @@ -764,6 +768,9 @@ tegra_dsi_connector_duplicate_state(struct drm_connector 
> *connector)
>   if (!copy)
>   return NULL;
>  
> + __drm_atomic_helper_connector_duplicate_state(connector,
> +   ©->base);
> +
>   return ©->base;
>  }
>  
> -- 
> 2.1.4
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH 0/5] drm: fixes for merge-window regressions

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 03:45:01PM +0200, Arnd Bergmann wrote:
> A couple of new warnings and build errors appeared through the DRM
> tree in linux-next after the merge window opened. The first patch
> here is for scripts/headers_check.pl, but as the bug is only
> present in drm-next at the moment, it would be good to add all
> five patches to that tree before they make it into mainline.
> 
> It's likely that some of these have already been fixed since
> this morning's linux-next, so just ignore the ones are no
> longer needed.
> 
> Arnd Bergmann (5):
>   headers_check: don't warn about c++ guards
>   drm: mediatek: add CONFIG_OF dependency
>   drm: mediatek: fixup drm_gem_object_lookup API change
>   drm: exynos: mark pm functions as __maybe_unused
>   drm: remove unused dev variables

None of the actual patches seems to have made it onto dri-devel. Stuck
somewhere?
-Daniel

> 
>  drivers/gpu/drm/armada/armada_crtc.c   | 1 -
>  drivers/gpu/drm/exynos/exynos_hdmi.c   | 6 ++
>  drivers/gpu/drm/mediatek/Kconfig   | 1 +
>  drivers/gpu/drm/mediatek/mtk_drm_fb.c  | 2 +-
>  drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 +-
>  drivers/gpu/drm/nouveau/nouveau_gem.c  | 1 -
>  drivers/gpu/drm/nouveau/nv50_display.c | 1 -
>  drivers/gpu/drm/radeon/radeon_cs.c | 1 -
>  scripts/headers_check.pl   | 4 
>  9 files changed, 9 insertions(+), 10 deletions(-)
> 
> 
> Cc: Russell King 
> Cc: Inki Dae 
> Cc: Joonyoung Shim 
> Cc: Seung-Woo Kim 
> Cc: Kyungmin Park 
> Cc: Kukjin Kim 
> Cc: Krzysztof Kozlowski 
> Cc: Matthias Brugger 
> Cc: Ben Skeggs 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: Arnd Bergmann 
> Cc: dri-devel at lists.freedesktop.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-samsung-soc at vger.kernel.org
> Cc: linux-mediatek at lists.infradead.org
> Cc: nouveau at lists.freedesktop.org
> 
> -- 
> 2.7.0
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[PATCH 0/5] drm: fixes for merge-window regressions

2016-05-18 Thread Arnd Bergmann
A couple of new warnings and build errors appeared through the DRM
tree in linux-next after the merge window opened. The first patch
here is for scripts/headers_check.pl, but as the bug is only
present in drm-next at the moment, it would be good to add all
five patches to that tree before they make it into mainline.

It's likely that some of these have already been fixed since
this morning's linux-next, so just ignore the ones are no
longer needed.

[resending because of missing Cc list for the actual patches,
 sorry about that]

Arnd Bergmann (5):
  headers_check: don't warn about c++ guards
  drm: mediatek: add CONFIG_OF dependency
  drm: mediatek: fixup drm_gem_object_lookup API change
  drm: exynos: mark pm functions as __maybe_unused
  drm: remove unused dev variables

 drivers/gpu/drm/armada/armada_crtc.c   | 1 -
 drivers/gpu/drm/exynos/exynos_hdmi.c   | 6 ++
 drivers/gpu/drm/mediatek/Kconfig   | 1 +
 drivers/gpu/drm/mediatek/mtk_drm_fb.c  | 2 +-
 drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 +-
 drivers/gpu/drm/nouveau/nouveau_gem.c  | 1 -
 drivers/gpu/drm/nouveau/nv50_display.c | 1 -
 drivers/gpu/drm/radeon/radeon_cs.c | 1 -
 scripts/headers_check.pl   | 4 
 9 files changed, 9 insertions(+), 10 deletions(-)


Cc: Russell King 
Cc: Inki Dae 
Cc: Joonyoung Shim 
Cc: Seung-Woo Kim 
Cc: Kyungmin Park 
Cc: Kukjin Kim 
Cc: Krzysztof Kozlowski 
Cc: Matthias Brugger 
Cc: Ben Skeggs 
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: Arnd Bergmann 
Cc: dri-devel at lists.freedesktop.org
Cc: linux-kernel at vger.kernel.org
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-samsung-soc at vger.kernel.org
Cc: linux-mediatek at lists.infradead.org
Cc: nouveau at lists.freedesktop.org

-- 
2.7.0



[PATCH 5/5] drm: remove unused dev variables

2016-05-18 Thread Arnd Bergmann
After drm_gem_object_lookup() was changed along with all its callers,
we have several drivers that have unused variables:

drm/armada/armada_crtc.c: In function 'armada_drm_crtc_cursor_set':
drm/armada/armada_crtc.c:900:21: error: unused variable 'dev' 
[-Werror=unused-variable]
drm/nouveau/nouveau_gem.c: In function 'validate_init':
drm/nouveau/nouveau_gem.c:371:21: error: unused variable 'dev' 
[-Werror=unused-variable]
drm/nouveau/nv50_display.c: In function 'nv50_crtc_cursor_set':
drm/nouveau/nv50_display.c:1308:21: error: unused variable 'dev' 
[-Werror=unused-variable]
drm/radeon/radeon_cs.c: In function 'radeon_cs_parser_relocs':
drm/radeon/radeon_cs.c:77:21: error: unused variable 'ddev' 
[-Werror=unused-variable]

This fixes all the instances I found with ARM randconfig builds so far.

Signed-off-by: Arnd Bergmann 
Fixes: a8ad0bd84f98 ("drm: Remove unused drm_device from 
drm_gem_object_lookup()")
---
 drivers/gpu/drm/armada/armada_crtc.c   | 1 -
 drivers/gpu/drm/nouveau/nouveau_gem.c  | 1 -
 drivers/gpu/drm/nouveau/nv50_display.c | 1 -
 drivers/gpu/drm/radeon/radeon_cs.c | 1 -
 4 files changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/armada/armada_crtc.c 
b/drivers/gpu/drm/armada/armada_crtc.c
index a9b7e0f36513..3130aa8bcdd0 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -897,7 +897,6 @@ static void cursor_update(void *data)
 static int armada_drm_crtc_cursor_set(struct drm_crtc *crtc,
struct drm_file *file, uint32_t handle, uint32_t w, uint32_t h)
 {
-   struct drm_device *dev = crtc->dev;
struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
struct armada_gem_object *obj = NULL;
int ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c 
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 445a9e2fb91a..a030e218adf7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -368,7 +368,6 @@ validate_init(struct nouveau_channel *chan, struct drm_file 
*file_priv,
  int nr_buffers, struct validate_op *op)
 {
struct nouveau_cli *cli = nouveau_cli(file_priv);
-   struct drm_device *dev = chan->drm->dev;
int trycnt = 0;
int ret, i;
struct nouveau_bo *res_bo = NULL;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 47761a92926e..ec2e67eb8980 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1305,7 +1305,6 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct 
drm_file *file_priv,
 uint32_t handle, uint32_t width, uint32_t height)
 {
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-   struct drm_device *dev = crtc->dev;
struct drm_gem_object *gem = NULL;
struct nouveau_bo *nvbo = NULL;
int ret = 0;
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c 
b/drivers/gpu/drm/radeon/radeon_cs.c
index 271652963fa1..510ea371dacc 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -74,7 +74,6 @@ static void radeon_cs_buckets_get_list(struct 
radeon_cs_buckets *b,

 static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
 {
-   struct drm_device *ddev = p->rdev->ddev;
struct radeon_cs_chunk *chunk;
struct radeon_cs_buckets buckets;
unsigned i;
-- 
2.7.0



[PATCH 2/5] drm: mediatek: add CONFIG_OF dependency

2016-05-18 Thread Arnd Bergmann
The mediatek DRM driver can be configured for compile testing with
CONFIG_OF disabled, but then fails to link:

drivers/gpu/built-in.o: In function `mtk_drm_bind':
analogix_dp_reg.c:(.text+0x52888): undefined reference to 
`of_find_device_by_node'
analogix_dp_reg.c:(.text+0x52930): undefined reference to 
`of_find_device_by_node'

This adds an explicit Kconfig dependency.

Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/mediatek/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 545973f6b743..67183e26971d 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -3,6 +3,7 @@ config DRM_MEDIATEK
depends on DRM
depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
depends on COMMON_CLK
+   depends on OF
select DRM_GEM_CMA_HELPER
select DRM_KMS_HELPER
select DRM_MIPI_DSI
-- 
2.7.0



[PATCH 4/5] drm: exynos: mark pm functions as __maybe_unused

2016-05-18 Thread Arnd Bergmann
The rework of the exynos DRM clock handling introduced
warnings for configurations that have CONFIG_PM disabled:

drivers/gpu/drm/exynos/exynos_hdmi.c:736:13: error: 'hdmi_clk_disable_gates' 
defined but not used [-Werror=unused-function]
 static void hdmi_clk_disable_gates(struct hdmi_context *hdata)
 ^~
drivers/gpu/drm/exynos/exynos_hdmi.c:717:12: error: 'hdmi_clk_enable_gates' 
defined but not used [-Werror=unused-function]
 static int hdmi_clk_enable_gates(struct hdmi_context *hdata)

The problem is that the PM functions themselves are inside of
an #ifdef, but some functions they call are not.

This patch removes the #ifdef and instead marks the PM functions
as __maybe_unused, which is a more reliable way to get it right.

Signed-off-by: Arnd Bergmann 
Fixes: 9be7e9898444 ("drm/exynos/hdmi: clock code re-factoring")
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 58de5a430508..ea4b2b7d7ad7 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1934,8 +1934,7 @@ static int hdmi_remove(struct platform_device *pdev)
return 0;
 }

-#ifdef CONFIG_PM
-static int exynos_hdmi_suspend(struct device *dev)
+static int __maybe_unused exynos_hdmi_suspend(struct device *dev)
 {
struct hdmi_context *hdata = dev_get_drvdata(dev);

@@ -1944,7 +1943,7 @@ static int exynos_hdmi_suspend(struct device *dev)
return 0;
 }

-static int exynos_hdmi_resume(struct device *dev)
+static int __maybe_unused exynos_hdmi_resume(struct device *dev)
 {
struct hdmi_context *hdata = dev_get_drvdata(dev);
int ret;
@@ -1955,7 +1954,6 @@ static int exynos_hdmi_resume(struct device *dev)

return 0;
 }
-#endif

 static const struct dev_pm_ops exynos_hdmi_pm_ops = {
SET_RUNTIME_PM_OPS(exynos_hdmi_suspend, exynos_hdmi_resume, NULL)
-- 
2.7.0



[PATCH 3/5] drm: mediatek: fixup drm_gem_object_lookup API change

2016-05-18 Thread Arnd Bergmann
The drm_gem_object_lookup() function prototype changed while this
driver was added, so it fails to build now:

drivers/gpu/drm/mediatek/mtk_drm_gem.c: In function 
'mtk_drm_gem_dumb_map_offset':
drivers/gpu/drm/mediatek/mtk_drm_gem.c:142:30: error: passing argument 1 of 
'drm_gem_object_lookup' from incompatible pointer type 
[-Werror=incompatible-pointer-types]
  obj = drm_gem_object_lookup(dev, file_priv, handle);

This fixes the new caller as well.

Signed-off-by: Arnd Bergmann 
Fixes: a8ad0bd84f98 ("drm: Remove unused drm_device from 
drm_gem_object_lookup()")
---
 drivers/gpu/drm/mediatek/mtk_drm_fb.c  | 2 +-
 drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_fb.c 
b/drivers/gpu/drm/mediatek/mtk_drm_fb.c
index 33d30c19f35f..147df85399ab 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_fb.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_fb.c
@@ -138,7 +138,7 @@ struct drm_framebuffer *mtk_drm_mode_fb_create(struct 
drm_device *dev,
if (drm_format_num_planes(cmd->pixel_format) != 1)
return ERR_PTR(-EINVAL);

-   gem = drm_gem_object_lookup(dev, file, cmd->handles[0]);
+   gem = drm_gem_object_lookup(file, cmd->handles[0]);
if (!gem)
return ERR_PTR(-ENOENT);

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c 
b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
index a773bfaea913..fa2ec0cd00e8 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
@@ -139,7 +139,7 @@ int mtk_drm_gem_dumb_map_offset(struct drm_file *file_priv,
struct drm_gem_object *obj;
int ret;

-   obj = drm_gem_object_lookup(dev, file_priv, handle);
+   obj = drm_gem_object_lookup(file_priv, handle);
if (!obj) {
DRM_ERROR("failed to lookup gem object.\n");
return -EINVAL;
-- 
2.7.0



[PATCH 1/5] headers_check: don't warn about c++ guards

2016-05-18 Thread Arnd Bergmann
A recent addition to the DRM tree for 4.7 added 'extern "C"' guards
for c++ to all the DRM headers, and that now causes warnings
in 'make headers_check':

usr/include/drm/amdgpu_drm.h:38: userspace cannot reference function or 
variable defined in the kernel
usr/include/drm/drm.h:63: userspace cannot reference function or variable 
defined in the kernel
usr/include/drm/drm.h:699: userspace cannot reference function or variable 
defined in the kernel
usr/include/drm/drm_fourcc.h:30: userspace cannot reference function or 
variable defined in the kernel
usr/include/drm/drm_mode.h:33: userspace cannot reference function or variable 
defined in the kernel
usr/include/drm/drm_sarea.h:38: userspace cannot reference function or variable 
defined in the kernel
usr/include/drm/exynos_drm.h:21: userspace cannot reference function or 
variable defined in the kernel
usr/include/drm/i810_drm.h:7: userspace cannot reference function or variable 
defined in the kernel

This changes the headers_check.pl script to not warn about this.
I'm listing the merge commit as introducing the problem, because
there are several patches in this branch that each do this for
one file.

Signed-off-by: Arnd Bergmann 
Fixes: 7c10ddf87472 ("Merge branch 'drm-uapi-extern-c-fixes' of 
https://github.com/evelikov/linux into drm-next")
---
 scripts/headers_check.pl | 4 
 1 file changed, 4 insertions(+)

diff --git a/scripts/headers_check.pl b/scripts/headers_check.pl
index 62320f93e903..8b2da054cdc3 100755
--- a/scripts/headers_check.pl
+++ b/scripts/headers_check.pl
@@ -69,6 +69,10 @@ sub check_declarations
if ($line =~ m/^void seqbuf_dump\(void\);/) {
return;
}
+   # drm headers are being C++ friendly
+   if ($line =~ m/^extern "C"/) {
+   return;
+   }
if ($line =~ m/^(\s*extern|unsigned|char|short|int|long|void)\b/) {
printf STDERR "$filename:$lineno: " .
  "userspace cannot reference function or " .
-- 
2.7.0



[PATCH 5/5] drm: remove unused dev variables

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 06:07:33PM +0200, Arnd Bergmann wrote:
> After drm_gem_object_lookup() was changed along with all its callers,
> we have several drivers that have unused variables:
> 
> drm/armada/armada_crtc.c: In function 'armada_drm_crtc_cursor_set':
> drm/armada/armada_crtc.c:900:21: error: unused variable 'dev' 
> [-Werror=unused-variable]
> drm/nouveau/nouveau_gem.c: In function 'validate_init':
> drm/nouveau/nouveau_gem.c:371:21: error: unused variable 'dev' 
> [-Werror=unused-variable]
> drm/nouveau/nv50_display.c: In function 'nv50_crtc_cursor_set':
> drm/nouveau/nv50_display.c:1308:21: error: unused variable 'dev' 
> [-Werror=unused-variable]
> drm/radeon/radeon_cs.c: In function 'radeon_cs_parser_relocs':
> drm/radeon/radeon_cs.c:77:21: error: unused variable 'ddev' 
> [-Werror=unused-variable]
> 
> This fixes all the instances I found with ARM randconfig builds so far.
> 
> Signed-off-by: Arnd Bergmann 
> Fixes: a8ad0bd84f98 ("drm: Remove unused drm_device from 
> drm_gem_object_lookup()")

Merged both fixup patches for the drm_gem_object_lookup change to
drm-misc. Sorry for the mess :(
-Daniel

> ---
>  drivers/gpu/drm/armada/armada_crtc.c   | 1 -
>  drivers/gpu/drm/nouveau/nouveau_gem.c  | 1 -
>  drivers/gpu/drm/nouveau/nv50_display.c | 1 -
>  drivers/gpu/drm/radeon/radeon_cs.c | 1 -
>  4 files changed, 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/armada/armada_crtc.c 
> b/drivers/gpu/drm/armada/armada_crtc.c
> index a9b7e0f36513..3130aa8bcdd0 100644
> --- a/drivers/gpu/drm/armada/armada_crtc.c
> +++ b/drivers/gpu/drm/armada/armada_crtc.c
> @@ -897,7 +897,6 @@ static void cursor_update(void *data)
>  static int armada_drm_crtc_cursor_set(struct drm_crtc *crtc,
>   struct drm_file *file, uint32_t handle, uint32_t w, uint32_t h)
>  {
> - struct drm_device *dev = crtc->dev;
>   struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
>   struct armada_gem_object *obj = NULL;
>   int ret;
> diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c 
> b/drivers/gpu/drm/nouveau/nouveau_gem.c
> index 445a9e2fb91a..a030e218adf7 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_gem.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
> @@ -368,7 +368,6 @@ validate_init(struct nouveau_channel *chan, struct 
> drm_file *file_priv,
> int nr_buffers, struct validate_op *op)
>  {
>   struct nouveau_cli *cli = nouveau_cli(file_priv);
> - struct drm_device *dev = chan->drm->dev;
>   int trycnt = 0;
>   int ret, i;
>   struct nouveau_bo *res_bo = NULL;
> diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
> b/drivers/gpu/drm/nouveau/nv50_display.c
> index 47761a92926e..ec2e67eb8980 100644
> --- a/drivers/gpu/drm/nouveau/nv50_display.c
> +++ b/drivers/gpu/drm/nouveau/nv50_display.c
> @@ -1305,7 +1305,6 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct 
> drm_file *file_priv,
>uint32_t handle, uint32_t width, uint32_t height)
>  {
>   struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
> - struct drm_device *dev = crtc->dev;
>   struct drm_gem_object *gem = NULL;
>   struct nouveau_bo *nvbo = NULL;
>   int ret = 0;
> diff --git a/drivers/gpu/drm/radeon/radeon_cs.c 
> b/drivers/gpu/drm/radeon/radeon_cs.c
> index 271652963fa1..510ea371dacc 100644
> --- a/drivers/gpu/drm/radeon/radeon_cs.c
> +++ b/drivers/gpu/drm/radeon/radeon_cs.c
> @@ -74,7 +74,6 @@ static void radeon_cs_buckets_get_list(struct 
> radeon_cs_buckets *b,
>  
>  static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
>  {
> - struct drm_device *ddev = p->rdev->ddev;
>   struct radeon_cs_chunk *chunk;
>   struct radeon_cs_buckets buckets;
>   unsigned i;
> -- 
> 2.7.0
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[pull] amdgpu drm-next-4.7

2016-05-18 Thread Alex Deucher
Hi Dave,

Some amdgpu fixes for 4.7:
- Various powerplay bug fixes
- Add some new polaris pci ids
- misc bug fixes and code cleanups

The following changes since commit b4eeed590deeff13a53db641129f0301d70248f3:

  drm/amd/powerplay: rewrite pp_sw_init to make code readable (2016-05-11 
13:30:33 -0400)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-next-4.7

for you to fetch changes up to 3b59c344ab6e2d00b0f4ad946024572618c87502:

  drm/amd/powerplay: fix bugs of checking if dpm is running on Tonga 
(2016-05-18 09:22:30 -0400)


Eric Huang (3):
  drm/amd/powerplay: fix a bug on updating sclk for Fiji
  drm/amd/powerplay: fix a bug on updating sclk for Tonga
  drm/amd/powerplay: fix bugs of checking if dpm is running on Tonga

Flora Cui (4):
  drm/amdgpu: add more Polaris10 DID
  drm/amdgpu: update Polaris10 golden setting
  drm/amdgpu: Add more Polaris 11 PCI IDs
  drm/amdgpu: update Polaris11 golden setting

Harish Kasiviswanathan (1):
  drm/amdgpu: Encapsulate some VM table update parameters (v2)

Marek Olšák (1):
  drm/amdgpu: fix TC cache flushing

Muhammad Falak R Wani (6):
  drm/amd/powerplay: use ARRAY_SIZE() to calculate array size.
  drm/amd/amdgpu : Remove unused variable
  drm/amd/amdgpu/cz_dpm: Remove unused variable
  drm/amd/amdgpu : Remove unused variable
  drm/amd/amdgpu : Remove unused variable
  drm/amd/amdgpu : Remove unused variable

Rex Zhu (4):
  drm/amd/powerplay: SCLK will have a big drop with low VDDC when PPlib was 
enabled.
  drm/amd/powerplay: fix NULL point check error
  drm/amd/powerplay: move asic unrelated function to hwmgr.c.
  drm/amdgpu: create fence slab once when amdgpu module init.

tom will (2):
  drm/radeon: fix array out of bounds
  drm/amdgpu: fix array out of bounds

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|  25 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  |  25 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 111 -
 drivers/gpu/drm/amd/amdgpu/cik_ih.c|   3 +-
 drivers/gpu/drm/amd/amdgpu/cz_dpm.c|  13 +--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c |   3 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |   4 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  |   7 +-
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c|   3 +-
 drivers/gpu/drm/amd/amdgpu/kv_dpm.c|   2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c |   2 +
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c  |   3 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c   |  39 +---
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c|  38 +++
 .../gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c  |  38 +--
 drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c  |  10 +-
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h  |   2 +-
 drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c   |   2 +-
 drivers/gpu/drm/radeon/kv_dpm.c|   2 +-
 20 files changed, 167 insertions(+), 167 deletions(-)


[PATCH 0/5] drm/i915: Additional PSR stuff

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

Some more PSR stuff. Some of this depends on Daniel's PSR fixes [1].

The most important thing here for my HSW HSB machine is the
drm_dp_psr_need_train_on_exit() check, since apparently the VBT on that
thing is no good.

[1] https://lists.freedesktop.org/archives/intel-gfx/2016-May/096048.html

Ville Syrjälä (5):
  drm/dp: Add drm_dp_psr_setup_time()
  drm/i915: Check PSR setup time vs. vblank length
  drm/dp: Add drm_dp_psr_need_train_on_exit()
  drm/i915: Ask the sink whether training is required when exiting PSR
main-link off mode
  drm/i915: Move psr.link_standby setup to intel_psr_match_conditions()

 drivers/gpu/drm/drm_dp_helper.c | 42 +
 drivers/gpu/drm/i915/intel_drv.h|  2 ++
 drivers/gpu/drm/i915/intel_psr.c| 63 -
 drivers/gpu/drm/i915/intel_sprite.c |  6 ++--
 include/drm/drm_dp_helper.h |  3 ++
 5 files changed, 91 insertions(+), 25 deletions(-)

-- 
2.7.4



[PATCH 1/5] drm/dp: Add drm_dp_psr_setup_time()

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

Add a small helper to parse the PSR setup time from the DPCD PSR
capabilities and return the value in microseconds.

Cc: Daniel Vetter 
Reviewed-by: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_dp_helper.c | 28 
 include/drm/drm_dp_helper.h |  2 ++
 2 files changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index eeaf5a7c3aa7..71309778f3d3 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -822,3 +822,31 @@ void drm_dp_aux_unregister(struct drm_dp_aux *aux)
i2c_del_adapter(&aux->ddc);
 }
 EXPORT_SYMBOL(drm_dp_aux_unregister);
+
+/**
+ * drm_dp_psr_setup_time() - PSR setup in time usec
+ * @psr_cap: PSR capabilities from DPCD
+ *
+ * Returns:
+ * PSR setup time for the panel in microseconds,  negative
+ * error code on failure.
+ */
+int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
+{
+   static const u16 psr_setup_time_us[] = {
+   [DP_PSR_SETUP_TIME_330] = 330,
+   [DP_PSR_SETUP_TIME_275] = 275,
+   [DP_PSR_SETUP_TIME_165] = 165,
+   [DP_PSR_SETUP_TIME_110] = 110,
+   [DP_PSR_SETUP_TIME_55] = 55,
+   [DP_PSR_SETUP_TIME_0] = 0,
+   };
+   int i;
+
+   i = psr_cap[1] & DP_PSR_SETUP_TIME_MASK;
+   if (i >= ARRAY_SIZE(psr_setup_time_us))
+   return -EINVAL;
+
+   return psr_setup_time_us[i];
+}
+EXPORT_SYMBOL(drm_dp_psr_setup_time);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 5a848e734422..6aa74f7d45b4 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -657,6 +657,8 @@ struct edp_vsc_psr {
 #define EDP_VSC_PSR_UPDATE_RFB (1<<1)
 #define EDP_VSC_PSR_CRC_VALUES_VALID   (1<<2)

+int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
+
 static inline int
 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
-- 
2.7.4



[PATCH 2/5] drm/i915: Check PSR setup time vs. vblank length

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

Bspec says:
"Restriction : SRD must not be enabled when the PSR Setup time from DPCD
00071h is greater than the time for vertical blank minus one line."

Let's check for that and disallow PSR if we exceed the limit.

Cc: Daniel Vetter 
Reviewed-by: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_drv.h|  2 ++
 drivers/gpu/drm/i915/intel_psr.c| 19 ++-
 drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
 3 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3536292babe0..35c3c0d57f1b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1676,6 +1676,8 @@ bool intel_sdvo_init(struct drm_device *dev,


 /* intel_sprite.c */
+int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
+int usecs);
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
  struct drm_file *file_priv);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index bebad90bea1f..3d172b91a469 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -330,6 +330,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
*intel_dp)
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_crtc *crtc = dig_port->base.base.crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   const struct drm_display_mode *adjusted_mode =
+   &intel_crtc->config->base.adjusted_mode;
+   int psr_setup_time;

lockdep_assert_held(&dev_priv->psr.lock);
WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
@@ -368,11 +371,25 @@ static bool intel_psr_match_conditions(struct intel_dp 
*intel_dp)
}

if (IS_HASWELL(dev) &&
-   intel_crtc->config->base.adjusted_mode.flags & 
DRM_MODE_FLAG_INTERLACE) {
+   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
return false;
}

+   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
+   if (psr_setup_time < 0) {
+   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
(0x%02x)\n",
+ intel_dp->psr_dpcd[1]);
+   return false;
+   }
+
+   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
+   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
+   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) too 
long\n",
+ psr_setup_time);
+   return false;
+   }
+
dev_priv->psr.source_ok = true;
return true;
 }
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 57eef129c597..22ebccb64065 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -53,8 +53,8 @@ format_is_yuv(uint32_t format)
}
 }

-static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
- int usecs)
+int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
+int usecs)
 {
/* paranoia */
if (!adjusted_mode->crtc_htotal)
@@ -93,7 +93,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
vblank_start = DIV_ROUND_UP(vblank_start, 2);

/* FIXME needs to be calibrated sensibly */
-   min = vblank_start - usecs_to_scanlines(adjusted_mode, 100);
+   min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, 100);
max = vblank_start - 1;

local_irq_disable();
-- 
2.7.4



[PATCH 3/5] drm/dp: Add drm_dp_psr_need_train_on_exit()

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

Add a small helper to parse from the DPCD whether link training
is required when exiting PSR main-link off mode.

Cc: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/drm_dp_helper.c | 14 ++
 include/drm/drm_dp_helper.h |  1 +
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 71309778f3d3..9c0a3e966d0d 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -850,3 +850,17 @@ int drm_dp_psr_setup_time(const u8 
psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
return psr_setup_time_us[i];
 }
 EXPORT_SYMBOL(drm_dp_psr_setup_time);
+
+/**
+ * drm_dp_psr_need_train_on_exit() - Indicate whether link training is needed 
on PSR exit
+ * @psr_cap: PSR capabilities from DPCD
+ *
+ * Returns:
+ * Whether link training is required when exiting PSR main-link off mode.
+ */
+bool drm_dp_psr_need_train_on_exit(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
+{
+   /* DP_PSR_NO_TRAIN_ON_EXIT is "don't care" for PSR2 capable devices */
+   return psr_cap[0] < 0x2 && (psr_cap[1] & DP_PSR_NO_TRAIN_ON_EXIT) == 0;
+}
+EXPORT_SYMBOL(drm_dp_psr_need_train_on_exit);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 6aa74f7d45b4..2437f1b6e776 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -658,6 +658,7 @@ struct edp_vsc_psr {
 #define EDP_VSC_PSR_CRC_VALUES_VALID   (1<<2)

 int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
+bool drm_dp_psr_need_train_on_exit(const u8 
psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);

 static inline int
 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
-- 
2.7.4



[PATCH 4/5] drm/i915: Ask the sink whether training is required when exiting PSR main-link off mode

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

The sink can tell us if link training needs to be performed when
exiting PSR main-link off mode. Currently we get that information
from the VBT, but at least on my HSW the VBT says one thing, the sink
another. And in practice the sink doesn't seem to notice any screen
updates unless we do the training.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_psr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 3d172b91a469..6cab66b1b26a 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -298,7 +298,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
else
val |= EDP_PSR_TP1_TP2_SEL;

-   if (!dev_priv->vbt.psr.require_aux_wakeup)
+   if (!dev_priv->vbt.psr.require_aux_wakeup &&
+   !drm_dp_psr_need_train_on_exit(intel_dp->psr_dpcd))
val |= EDP_PSR_SKIP_AUX_EXIT;

I915_WRITE(EDP_PSR_CTL, val);
-- 
2.7.4



[PATCH 5/5] drm/i915: Move psr.link_standby setup to intel_psr_match_conditions()

2016-05-18 Thread ville.syrj...@linux.intel.com
From: Ville Syrjälä 

Determine the value of psr.link_standby at runtime rather than at init
time. This helps in testing since you can change between link-off and
link-standby at runtime.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_psr.c | 41 
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 6cab66b1b26a..c814a4443749 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -339,6 +339,27 @@ static bool intel_psr_match_conditions(struct intel_dp 
*intel_dp)
WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
WARN_ON(!drm_modeset_is_locked(&crtc->mutex));

+   /* Set link_standby x link_off defaults */
+   if (IS_HASWELL(dev) || IS_BROADWELL(dev))
+   /* HSW and BDW require workarounds that we don't implement. */
+   dev_priv->psr.link_standby = false;
+   else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+   /* On VLV and CHV only standby mode is supported. */
+   dev_priv->psr.link_standby = true;
+   else
+   /* For new platforms let's respect VBT back again */
+   dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
+
+   /* Override link_standby x link_off defaults */
+   if (i915.enable_psr == 2 && !dev_priv->psr.link_standby) {
+   DRM_DEBUG_KMS("PSR: Forcing link standby\n");
+   dev_priv->psr.link_standby = true;
+   }
+   if (i915.enable_psr == 3 && dev_priv->psr.link_standby) {
+   DRM_DEBUG_KMS("PSR: Forcing main link off\n");
+   dev_priv->psr.link_standby = false;
+   }
+
dev_priv->psr.source_ok = false;

/*
@@ -831,26 +852,6 @@ void intel_psr_init(struct drm_device *dev)
i915.enable_psr = 0;
}

-   /* Set link_standby x link_off defaults */
-   if (IS_HASWELL(dev) || IS_BROADWELL(dev))
-   /* HSW and BDW require workarounds that we don't implement. */
-   dev_priv->psr.link_standby = false;
-   else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
-   /* On VLV and CHV only standby mode is supported. */
-   dev_priv->psr.link_standby = true;
-   else
-   /* For new platforms let's respect VBT back again */
-   dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
-
-   /* Override link_standby x link_off defaults */
-   if (i915.enable_psr == 2 && !dev_priv->psr.link_standby) {
-   DRM_DEBUG_KMS("PSR: Forcing link standby\n");
-   dev_priv->psr.link_standby = true;
-   }
-   if (i915.enable_psr == 3 && dev_priv->psr.link_standby) {
-   DRM_DEBUG_KMS("PSR: Forcing main link off\n");
-   dev_priv->psr.link_standby = false;
-   }

INIT_DELAYED_WORK(&dev_priv->psr.work, intel_psr_work);
mutex_init(&dev_priv->psr.lock);
-- 
2.7.4



[PATCH 4/5] drm/i915: Ask the sink whether training is required when exiting PSR main-link off mode

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 09:34:21PM +0300, ville.syrjala at linux.intel.com 
wrote:
> From: Ville Syrjälä 
> 
> The sink can tell us if link training needs to be performed when
> exiting PSR main-link off mode. Currently we get that information
> from the VBT, but at least on my HSW the VBT says one thing, the sink
> another. And in practice the sink doesn't seem to notice any screen
> updates unless we do the training.
> 
> Signed-off-by: Ville Syrjälä 

For 3&4: Reviewed-by: Daniel Vetter 

Need to make sure we merge this one together with mine, or just squash.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_psr.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> b/drivers/gpu/drm/i915/intel_psr.c
> index 3d172b91a469..6cab66b1b26a 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -298,7 +298,8 @@ static void hsw_psr_enable_source(struct intel_dp 
> *intel_dp)
>   else
>   val |= EDP_PSR_TP1_TP2_SEL;
>  
> - if (!dev_priv->vbt.psr.require_aux_wakeup)
> + if (!dev_priv->vbt.psr.require_aux_wakeup &&
> + !drm_dp_psr_need_train_on_exit(intel_dp->psr_dpcd))
>   val |= EDP_PSR_SKIP_AUX_EXIT;
>  
>   I915_WRITE(EDP_PSR_CTL, val);
> -- 
> 2.7.4
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[Intel-gfx] [PATCH 5/5] drm/i915: Move psr.link_standby setup to intel_psr_match_conditions()

2016-05-18 Thread Daniel Vetter
On Wed, May 18, 2016 at 09:34:22PM +0300, ville.syrjala at linux.intel.com 
wrote:
> From: Ville Syrjälä 
> 
> Determine the value of psr.link_standby at runtime rather than at init
> time. This helps in testing since you can change between link-off and
> link-standby at runtime.
> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 41 
> 
>  1 file changed, 21 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> b/drivers/gpu/drm/i915/intel_psr.c
> index 6cab66b1b26a..c814a4443749 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -339,6 +339,27 @@ static bool intel_psr_match_conditions(struct intel_dp 
> *intel_dp)
>   WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
>   WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
>  
> + /* Set link_standby x link_off defaults */
> + if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> + /* HSW and BDW require workarounds that we don't implement. */
> + dev_priv->psr.link_standby = false;
> + else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> + /* On VLV and CHV only standby mode is supported. */
> + dev_priv->psr.link_standby = true;
> + else
> + /* For new platforms let's respect VBT back again */
> + dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;

One thing we discussed here (well Rodrigo raised it) that by default we
shouldn't override the platform wa settings, in case the vbt is broken.
Instead when they're incompatible we should just disable PSR.

But that's definitely for another patch, and has a good chance to break
working setups. On this one:

Reviewed-by: Daniel Vetter 

> +
> + /* Override link_standby x link_off defaults */
> + if (i915.enable_psr == 2 && !dev_priv->psr.link_standby) {
> + DRM_DEBUG_KMS("PSR: Forcing link standby\n");
> + dev_priv->psr.link_standby = true;
> + }
> + if (i915.enable_psr == 3 && dev_priv->psr.link_standby) {
> + DRM_DEBUG_KMS("PSR: Forcing main link off\n");
> + dev_priv->psr.link_standby = false;
> + }
> +
>   dev_priv->psr.source_ok = false;
>  
>   /*
> @@ -831,26 +852,6 @@ void intel_psr_init(struct drm_device *dev)
>   i915.enable_psr = 0;
>   }
>  
> - /* Set link_standby x link_off defaults */
> - if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> - /* HSW and BDW require workarounds that we don't implement. */
> - dev_priv->psr.link_standby = false;
> - else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
> - /* On VLV and CHV only standby mode is supported. */
> - dev_priv->psr.link_standby = true;
> - else
> - /* For new platforms let's respect VBT back again */
> - dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
> -
> - /* Override link_standby x link_off defaults */
> - if (i915.enable_psr == 2 && !dev_priv->psr.link_standby) {
> - DRM_DEBUG_KMS("PSR: Forcing link standby\n");
> - dev_priv->psr.link_standby = true;
> - }
> - if (i915.enable_psr == 3 && dev_priv->psr.link_standby) {
> - DRM_DEBUG_KMS("PSR: Forcing main link off\n");
> - dev_priv->psr.link_standby = false;
> - }
>  
>   INIT_DELAYED_WORK(&dev_priv->psr.work, intel_psr_work);
>   mutex_init(&dev_priv->psr.lock);
> -- 
> 2.7.4
> 
> ___
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poor on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

Bug ID: 95474
   Summary: Bioshock Infinite and DiRT Showdown perform very poor
on any GPU with GCN >=1.1
   Product: Mesa
   Version: git
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: 0xe2.0x9a.0x9b at gmail.com
QA Contact: dri-devel at lists.freedesktop.org

See http://www.phoronix.com/scan.php?page=article&item=nv-amd-23ppw

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

Jan Ziak <0xe2.0x9a.0x9b at gmail.com> changed:

   What|Removed |Added

Summary|Bioshock Infinite and DiRT  |Bioshock Infinite and DiRT
   |Showdown perform very poor  |Showdown perform very
   |on any GPU with GCN >=1.1   |poorly on any GPU with GCN
   ||>=1.1

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #1 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
Does anybody know what the primary cause of the poor performance is?

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #2 from Alex Deucher  ---
Can you identify what component caused the regression?  mesa?  llvm?  kernel?

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[PATCH] drm: Nuke ->vblank_disable_allowed

2016-05-18 Thread Daniel Vetter
This was added in

commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
Author: Jesse Barnes 
Date:   Tue Sep 30 12:14:26 2008 -0700

drm: Rework vblank-wait handling to allow interrupt reduction.

to stay backwards-compatible with old UMS code that didn't even tell
the kernel when it did a modeset, so that the kernel could
save/restore vblank counters. At worst this means vblanks will be
somewhat funky on a setup that very likely no one still runs.

So let's just nuke it.

Plan B would be to set it unconditionally in drm_vblank_init for kms
drivers, instead of in each driver separately. So if this patch breaks
anything please only restore the hunks in drmP.h and drm_irq.c, plus
add a check for DRIVER_MODESET in drm_vblank_init.

Stumbled over this in a discussion on irc with Chris.

Cc: Chris Wilson 
Cc: Alex Deucher 
Cc: Liviu Dudau 
Cc: Russell King 
Cc: Thierry Reding 
Cc: Eric Anholt 
Cc: Laurent Pinchart 
Cc: Inki Dae 
Cc: Tomi Valkeinen 
Cc: Mark Yao 
Cc: Sascha Hauer 
Cc: Philipp Zabel 
Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 1 -
 drivers/gpu/drm/arm/hdlcd_drv.c | 1 -
 drivers/gpu/drm/armada/armada_drv.c | 1 -
 drivers/gpu/drm/drm_irq.c   | 6 --
 drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 ---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c   | 1 -
 drivers/gpu/drm/gma500/psb_drv.c| 1 -
 drivers/gpu/drm/i915/i915_dma.c | 3 ---
 drivers/gpu/drm/i915/intel_psr.c| 3 +++
 drivers/gpu/drm/imx/imx-drm-core.c  | 7 ---
 drivers/gpu/drm/radeon/radeon_irq_kms.c | 1 -
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 7 ---
 drivers/gpu/drm/tegra/drm.c | 1 -
 drivers/gpu/drm/vc4/vc4_kms.c   | 2 --
 include/drm/drmP.h  | 8 
 15 files changed, 3 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 9266c7b69808..835a3fa8d8df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -219,7 +219,6 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
if (r) {
return r;
}
-   adev->ddev->vblank_disable_allowed = true;

/* enable msi */
adev->irq.msi_enabled = false;
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
index 2112f0b105e3..4f909378d581 100644
--- a/drivers/gpu/drm/arm/hdlcd_drv.c
+++ b/drivers/gpu/drm/arm/hdlcd_drv.c
@@ -379,7 +379,6 @@ static int hdlcd_drm_bind(struct device *dev)
DRM_ERROR("failed to initialise vblank\n");
goto err_vblank;
}
-   drm->vblank_disable_allowed = true;

drm_mode_config_reset(drm);
drm_kms_helper_poll_init(drm);
diff --git a/drivers/gpu/drm/armada/armada_drv.c 
b/drivers/gpu/drm/armada/armada_drv.c
index 531fcb946346..cb21c0b6374a 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -113,7 +113,6 @@ static int armada_drm_load(struct drm_device *dev, unsigned 
long flags)
goto err_comp;

dev->irq_enabled = true;
-   dev->vblank_disable_allowed = 1;

ret = armada_fbdev_init(dev);
if (ret)
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index d1b5fc20b2f8..1a0ae89087e8 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -348,9 +348,6 @@ static void vblank_disable_fn(unsigned long arg)
unsigned int pipe = vblank->pipe;
unsigned long irqflags;

-   if (!dev->vblank_disable_allowed)
-   return;
-
spin_lock_irqsave(&dev->vbl_lock, irqflags);
if (atomic_read(&vblank->refcount) == 0 && vblank->enabled) {
DRM_DEBUG("disabling vblank on crtc %u\n", pipe);
@@ -437,8 +434,6 @@ int drm_vblank_init(struct drm_device *dev, unsigned int 
num_crtcs)
 "get_vblank_timestamp == NULL\n");
}

-   dev->vblank_disable_allowed = false;
-
return 0;

 err:
@@ -1555,7 +1550,6 @@ static void drm_legacy_vblank_post_modeset(struct 
drm_device *dev,

if (vblank->inmodeset) {
spin_lock_irqsave(&dev->vbl_lock, irqflags);
-   dev->vblank_disable_allowed = true;
drm_reset_vblank_timestamp(dev, pipe);
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 21c719e8e02b..2dd820e23b0c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -212,13 +212,6 @@ static int exynos_drm_load(struct drm_device *dev, 
unsigned long flags)
 */
dev->irq_enabled = true;

-   /*
-* with vblank_disable_allowed = true, vblank interrupt will be disabled
-* by drm timer once a current process gives up ownershi

[PULL] topic/drm-misc

2016-05-18 Thread Daniel Vetter
Hi Dave,

Update drm-misc pull with a few more fixes included, plus the two from
Arnd for the fallout from the drm_gem_object_lookup() refactor that I
failed to spot :(

Cheers, Daniel


The following changes since commit 99ee87295017e36abb6925e6139ca303cb55aee7:

  Merge tag 'topic/drm-misc-2016-05-13' of 
git://anongit.freedesktop.org/drm-intel into drm-next (2016-05-17 07:06:14 
+1000)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/topic/drm-misc-2016-05-18

for you to fetch changes up to c6740c9c9e914742fd2ec159142c40701f7df966:

  drm: remove unused dev variables (2016-05-18 19:16:24 +0200)


Arnd Bergmann (2):
  drm: mediatek: fixup drm_gem_object_lookup API change
  drm: remove unused dev variables

Chris Wilson (2):
  drm: Remove unused drm_device from drm_gem_object_lookup()
  drm: Avoid connector reference imbalance on error path

Dan Carpenter (1):
  drm/exynos/hdmi: add a missing tab

Daniel Vetter (4):
  drm: Drop crtc argument from __drm_atomic_helper_crtc_destroy_state
  drm: Drop plane argument from __drm_atomic_helper_plane_destroy_state
  drm: Drop connector argument from 
__drm_atomic_helper_connector_destroy_state
  drm: Fix error handling in drm_connector_register

Gerd Hoffmann (1):
  qxl: catch qxlfb_create_pinned_object failures

Jon Hunter (1):
  drm/tegra: Fix crash caused by reference count imbalance

Lyude (2):
  drm/i915/fbdev: Fix num_connector references in intel_fb_initial_config()
  drm/fb_helper: Fix references to dev->mode_config.num_connector

Noralf Trønnes (2):
  drm/fb-cma-helper: Use const for drm_framebuffer_funcs argument
  drm/fb-cma-helper: Add function drm_fb_cma_create_with_funcs()

 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c |  3 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 10 +++
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c  |  2 +-
 drivers/gpu/drm/armada/armada_crtc.c   |  3 +--
 drivers/gpu/drm/armada/armada_fb.c |  2 +-
 drivers/gpu/drm/armada/armada_gem.c|  6 ++---
 drivers/gpu/drm/armada/armada_gem.h|  4 +--
 drivers/gpu/drm/ast/ast_main.c |  4 +--
 drivers/gpu/drm/ast/ast_mode.c |  2 +-
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c |  2 +-
 drivers/gpu/drm/bochs/bochs_mm.c   |  4 +--
 drivers/gpu/drm/cirrus/cirrus_main.c   |  4 +--
 drivers/gpu/drm/drm_atomic.c   | 20 +++---
 drivers/gpu/drm/drm_atomic_helper.c| 25 +++--
 drivers/gpu/drm/drm_crtc.c |  4 +--
 drivers/gpu/drm/drm_fb_cma_helper.c| 37 +++---
 drivers/gpu/drm/drm_fb_helper.c|  5 ++--
 drivers/gpu/drm/drm_gem.c  | 14 +++---
 drivers/gpu/drm/drm_gem_cma_helper.c   |  2 +-
 drivers/gpu/drm/drm_prime.c|  2 +-
 drivers/gpu/drm/etnaviv/etnaviv_drv.c  |  8 +++---
 drivers/gpu/drm/exynos/exynos_drm_fb.c |  3 +--
 drivers/gpu/drm/exynos/exynos_drm_gem.c| 10 +++
 drivers/gpu/drm/exynos/exynos_drm_plane.c  |  2 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c   |  2 +-
 drivers/gpu/drm/gma500/framebuffer.c   |  2 +-
 drivers/gpu/drm/gma500/gem.c   |  2 +-
 drivers/gpu/drm/gma500/gma_display.c   |  2 +-
 drivers/gpu/drm/i915/i915_gem.c| 22 +++
 drivers/gpu/drm/i915/i915_gem_tiling.c |  4 +--
 drivers/gpu/drm/i915/intel_display.c   |  7 +++--
 drivers/gpu/drm/i915/intel_fbdev.c |  6 ++---
 drivers/gpu/drm/i915/intel_overlay.c   |  2 +-
 drivers/gpu/drm/mediatek/mtk_drm_crtc.c|  2 +-
 drivers/gpu/drm/mediatek/mtk_drm_fb.c  |  2 +-
 drivers/gpu/drm/mediatek/mtk_drm_gem.c |  2 +-
 drivers/gpu/drm/mediatek/mtk_drm_plane.c   |  2 +-
 drivers/gpu/drm/mgag200/mgag200_cursor.c   |  2 +-
 drivers/gpu/drm/mgag200/mgag200_main.c |  4 +--
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c   |  2 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c   |  2 +-
 drivers/gpu/drm/msm/msm_drv.c  |  6 ++---
 drivers/gpu/drm/msm/msm_fb.c   |  3 +--
 drivers/gpu/drm/msm/msm_gem.c  |  2 +-
 drivers/gpu/drm/nouveau/dispnv04/crtc.c|  2 +-
 drivers/gpu/drm/nouveau/nouveau_display.c  |  4 +--
 drivers/gpu/drm/nouveau/nouveau_gem.c  |  9 +++
 drivers/gpu/drm/nouveau/nv50_display.c |  3 +--
 drivers/gpu/drm/omapdrm/omap_drv.c |  6 ++---
 drivers/gpu/drm/omapdrm/omap_drv.h |  4 +--
 drivers/gpu/drm/omapdrm/omap_

[PATCH] drm: Nuke ->vblank_disable_allowed

2016-05-18 Thread Alex Deucher
On Wed, May 18, 2016 at 3:47 PM, Daniel Vetter  
wrote:
> This was added in
>
> commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
> Author: Jesse Barnes 
> Date:   Tue Sep 30 12:14:26 2008 -0700
>
> drm: Rework vblank-wait handling to allow interrupt reduction.
>
> to stay backwards-compatible with old UMS code that didn't even tell
> the kernel when it did a modeset, so that the kernel could
> save/restore vblank counters. At worst this means vblanks will be
> somewhat funky on a setup that very likely no one still runs.
>
> So let's just nuke it.
>
> Plan B would be to set it unconditionally in drm_vblank_init for kms
> drivers, instead of in each driver separately. So if this patch breaks
> anything please only restore the hunks in drmP.h and drm_irq.c, plus
> add a check for DRIVER_MODESET in drm_vblank_init.
>
> Stumbled over this in a discussion on irc with Chris.
>
> Cc: Chris Wilson 
> Cc: Alex Deucher 
> Cc: Liviu Dudau 
> Cc: Russell King 
> Cc: Thierry Reding 
> Cc: Eric Anholt 
> Cc: Laurent Pinchart 
> Cc: Inki Dae 
> Cc: Tomi Valkeinen 
> Cc: Mark Yao 
> Cc: Sascha Hauer 
> Cc: Philipp Zabel 
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 1 -
>  drivers/gpu/drm/arm/hdlcd_drv.c | 1 -
>  drivers/gpu/drm/armada/armada_drv.c | 1 -
>  drivers/gpu/drm/drm_irq.c   | 6 --
>  drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 ---
>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c   | 1 -
>  drivers/gpu/drm/gma500/psb_drv.c| 1 -
>  drivers/gpu/drm/i915/i915_dma.c | 3 ---
>  drivers/gpu/drm/i915/intel_psr.c| 3 +++
>  drivers/gpu/drm/imx/imx-drm-core.c  | 7 ---
>  drivers/gpu/drm/radeon/radeon_irq_kms.c | 1 -
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 7 ---
>  drivers/gpu/drm/tegra/drm.c | 1 -
>  drivers/gpu/drm/vc4/vc4_kms.c   | 2 --
>  include/drm/drmP.h  | 8 
>  15 files changed, 3 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 9266c7b69808..835a3fa8d8df 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -219,7 +219,6 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
> if (r) {
> return r;
> }
> -   adev->ddev->vblank_disable_allowed = true;
>
> /* enable msi */
> adev->irq.msi_enabled = false;
> diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> index 2112f0b105e3..4f909378d581 100644
> --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> @@ -379,7 +379,6 @@ static int hdlcd_drm_bind(struct device *dev)
> DRM_ERROR("failed to initialise vblank\n");
> goto err_vblank;
> }
> -   drm->vblank_disable_allowed = true;
>
> drm_mode_config_reset(drm);
> drm_kms_helper_poll_init(drm);
> diff --git a/drivers/gpu/drm/armada/armada_drv.c 
> b/drivers/gpu/drm/armada/armada_drv.c
> index 531fcb946346..cb21c0b6374a 100644
> --- a/drivers/gpu/drm/armada/armada_drv.c
> +++ b/drivers/gpu/drm/armada/armada_drv.c
> @@ -113,7 +113,6 @@ static int armada_drm_load(struct drm_device *dev, 
> unsigned long flags)
> goto err_comp;
>
> dev->irq_enabled = true;
> -   dev->vblank_disable_allowed = 1;
>
> ret = armada_fbdev_init(dev);
> if (ret)
> diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
> index d1b5fc20b2f8..1a0ae89087e8 100644
> --- a/drivers/gpu/drm/drm_irq.c
> +++ b/drivers/gpu/drm/drm_irq.c
> @@ -348,9 +348,6 @@ static void vblank_disable_fn(unsigned long arg)
> unsigned int pipe = vblank->pipe;
> unsigned long irqflags;
>
> -   if (!dev->vblank_disable_allowed)
> -   return;
> -
> spin_lock_irqsave(&dev->vbl_lock, irqflags);
> if (atomic_read(&vblank->refcount) == 0 && vblank->enabled) {
> DRM_DEBUG("disabling vblank on crtc %u\n", pipe);
> @@ -437,8 +434,6 @@ int drm_vblank_init(struct drm_device *dev, unsigned int 
> num_crtcs)
>  "get_vblank_timestamp == NULL\n");
> }
>
> -   dev->vblank_disable_allowed = false;
> -
> return 0;
>
>  err:
> @@ -1555,7 +1550,6 @@ static void drm_legacy_vblank_post_modeset(struct 
> drm_device *dev,
>
> if (vblank->inmodeset) {
> spin_lock_irqsave(&dev->vbl_lock, irqflags);
> -   dev->vblank_disable_allowed = true;
> drm_reset_vblank_timestamp(dev, pipe);
> spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
> b/drivers/gpu/drm/exynos/exynos_drm_drv.c
> index 21c719e8e02b..2dd820e23b0c 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_drv

[PATCH 1/5] headers_check: don't warn about c++ guards

2016-05-18 Thread Emil Velikov
On 18 May 2016 at 17:07, Arnd Bergmann  wrote:
> A recent addition to the DRM tree for 4.7 added 'extern "C"' guards
> for c++ to all the DRM headers, and that now causes warnings
> in 'make headers_check':
>
> usr/include/drm/amdgpu_drm.h:38: userspace cannot reference function or 
> variable defined in the kernel
> usr/include/drm/drm.h:63: userspace cannot reference function or variable 
> defined in the kernel
> usr/include/drm/drm.h:699: userspace cannot reference function or variable 
> defined in the kernel
> usr/include/drm/drm_fourcc.h:30: userspace cannot reference function or 
> variable defined in the kernel
> usr/include/drm/drm_mode.h:33: userspace cannot reference function or 
> variable defined in the kernel
> usr/include/drm/drm_sarea.h:38: userspace cannot reference function or 
> variable defined in the kernel
> usr/include/drm/exynos_drm.h:21: userspace cannot reference function or 
> variable defined in the kernel
> usr/include/drm/i810_drm.h:7: userspace cannot reference function or variable 
> defined in the kernel
>
> This changes the headers_check.pl script to not warn about this.
> I'm listing the merge commit as introducing the problem, because
> there are several patches in this branch that each do this for
> one file.
>
> Signed-off-by: Arnd Bergmann 
> Fixes: 7c10ddf87472 ("Merge branch 'drm-uapi-extern-c-fixes' of 
> https://github.com/evelikov/linux into drm-next")
Reviewed-by: Emil Velikov 

Thanks Arnd !

As Dave mentioned - the best solution would be to have the hunks
generated on the fly. Sadly Perl and me don't go hand in hand so if
you're interested I'll be really grateful.

-Emil


[RFC 2/3] drm/mediatek: add support for Mediatek SoC MT2701

2016-05-18 Thread Emil Velikov
On 18 May 2016 at 09:33, YT Shen  wrote:

>> > @@ -108,6 +108,10 @@ int mtk_drm_gem_dumb_create(struct drm_file 
>> > *file_priv, struct drm_device *dev,
>> > int ret;
>> >
>> > args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>> > +   /*
>> > +   * align to 8 bytes since Mali requires it.
>> > +   */
>> > +   args->pitch = ALIGN(args->pitch, 8);
>> Are you sure we need this, based on the line just above ?
> I think bpp stands for bits per pixel, so width * bpp / 8 simply transfer 
> from bits to bytes, which
> cannot guarantee align to 8.
>
You're absolutely correct. Reading the comment made me loose my mind
and completely misinterpret the division macro.

> I will remove this align part from the patch, this constraint is not from 
> display controller.
Thank you !

Regards
Emil


[PATCH] drm: Nuke ->vblank_disable_allowed

2016-05-18 Thread Daniel Vetter
This was added in

commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
Author: Jesse Barnes 
Date:   Tue Sep 30 12:14:26 2008 -0700

drm: Rework vblank-wait handling to allow interrupt reduction.

to stay backwards-compatible with old UMS code that didn't even tell
the kernel when it did a modeset, so that the kernel could
save/restore vblank counters. At worst this means vblanks will be
somewhat funky on a setup that very likely no one still runs.

So let's just nuke it.

Plan B would be to set it unconditionally in drm_vblank_init for kms
drivers, instead of in each driver separately. So if this patch breaks
anything please only restore the hunks in drmP.h and drm_irq.c, plus
add a check for DRIVER_MODESET in drm_vblank_init.

Stumbled over this in a discussion on irc with Chris.

v2: Remove leftover debug gunk from psr hacking (Alex).

Cc: Chris Wilson 
Cc: Alex Deucher 
Cc: Liviu Dudau 
Cc: Russell King 
Cc: Thierry Reding 
Cc: Eric Anholt 
Cc: Laurent Pinchart 
Cc: Inki Dae 
Cc: Tomi Valkeinen 
Cc: Mark Yao 
Cc: Sascha Hauer 
Cc: Philipp Zabel 
Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 1 -
 drivers/gpu/drm/arm/hdlcd_drv.c | 1 -
 drivers/gpu/drm/armada/armada_drv.c | 1 -
 drivers/gpu/drm/drm_irq.c   | 6 --
 drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 ---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c   | 1 -
 drivers/gpu/drm/gma500/psb_drv.c| 1 -
 drivers/gpu/drm/i915/i915_dma.c | 3 ---
 drivers/gpu/drm/imx/imx-drm-core.c  | 7 ---
 drivers/gpu/drm/radeon/radeon_irq_kms.c | 1 -
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 7 ---
 drivers/gpu/drm/tegra/drm.c | 1 -
 drivers/gpu/drm/vc4/vc4_kms.c   | 2 --
 include/drm/drmP.h  | 8 
 14 files changed, 47 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 9266c7b69808..835a3fa8d8df 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -219,7 +219,6 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
if (r) {
return r;
}
-   adev->ddev->vblank_disable_allowed = true;

/* enable msi */
adev->irq.msi_enabled = false;
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
index 2112f0b105e3..4f909378d581 100644
--- a/drivers/gpu/drm/arm/hdlcd_drv.c
+++ b/drivers/gpu/drm/arm/hdlcd_drv.c
@@ -379,7 +379,6 @@ static int hdlcd_drm_bind(struct device *dev)
DRM_ERROR("failed to initialise vblank\n");
goto err_vblank;
}
-   drm->vblank_disable_allowed = true;

drm_mode_config_reset(drm);
drm_kms_helper_poll_init(drm);
diff --git a/drivers/gpu/drm/armada/armada_drv.c 
b/drivers/gpu/drm/armada/armada_drv.c
index 531fcb946346..cb21c0b6374a 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -113,7 +113,6 @@ static int armada_drm_load(struct drm_device *dev, unsigned 
long flags)
goto err_comp;

dev->irq_enabled = true;
-   dev->vblank_disable_allowed = 1;

ret = armada_fbdev_init(dev);
if (ret)
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index d1b5fc20b2f8..1a0ae89087e8 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -348,9 +348,6 @@ static void vblank_disable_fn(unsigned long arg)
unsigned int pipe = vblank->pipe;
unsigned long irqflags;

-   if (!dev->vblank_disable_allowed)
-   return;
-
spin_lock_irqsave(&dev->vbl_lock, irqflags);
if (atomic_read(&vblank->refcount) == 0 && vblank->enabled) {
DRM_DEBUG("disabling vblank on crtc %u\n", pipe);
@@ -437,8 +434,6 @@ int drm_vblank_init(struct drm_device *dev, unsigned int 
num_crtcs)
 "get_vblank_timestamp == NULL\n");
}

-   dev->vblank_disable_allowed = false;
-
return 0;

 err:
@@ -1555,7 +1550,6 @@ static void drm_legacy_vblank_post_modeset(struct 
drm_device *dev,

if (vblank->inmodeset) {
spin_lock_irqsave(&dev->vbl_lock, irqflags);
-   dev->vblank_disable_allowed = true;
drm_reset_vblank_timestamp(dev, pipe);
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 21c719e8e02b..2dd820e23b0c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -212,13 +212,6 @@ static int exynos_drm_load(struct drm_device *dev, 
unsigned long flags)
 */
dev->irq_enabled = true;

-   /*
-* with vblank_disable_allowed = true, vblank interrupt will be disabled
-* by drm timer once a current process gives up ownership of
-   

[PATCH 1/1] drm/gma500: mdfld: avoid possible null pointer dereference

2016-05-18 Thread Patrik Jakobsson
On Wed, May 18, 2016 at 10:31 PM, Heinrich Schuchardt
 wrote:
> Only dereference sender after checking if sender is NULL.

Hi Heinrich

I think we had a patch that did something similar a while ago. Don't
remember what happened to it. We do check for !sender right before
calling this function (at only one call-site) so it cannot be NULL at
this point. I would be ok with your change if you also remove the
extra checks in mdfld_dsi_read_mcs(). That way we don't double check
and we check at the point where it actually matters.

Thanks
Patrik

>
> Signed-off-by: Heinrich Schuchardt 
> ---
>  drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 
> b/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c
> index 1616af2..c50534c 100644
> --- a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c
> +++ b/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c
> @@ -520,7 +520,7 @@ static int __read_panel_data(struct mdfld_dsi_pkg_sender 
> *sender, u8 data_type,
> u8 *data, u16 len, u32 *data_out, u16 len_out, bool 
> hs)
>  {
> unsigned long flags;
> -   struct drm_device *dev = sender->dev;
> +   struct drm_device *dev;
> int i;
> u32 gen_data_reg;
> int retry = MDFLD_DSI_READ_MAX_COUNT;
> @@ -530,6 +530,8 @@ static int __read_panel_data(struct mdfld_dsi_pkg_sender 
> *sender, u8 data_type,
> return -EINVAL;
> }
>
> +   dev = sender->dev;
> +
> /**
>  * do reading.
>  * 0) send out generic read request
> --
> 2.1.4
>


[PATCH 1/2] dma-buf/fence: add fence_collection fences

2016-05-18 Thread Gustavo Padovan
From: Gustavo Padovan 

struct fence_collection inherits from struct fence and carries a
collection of fences that needs to be waited together.

It is useful to translate a sync_file to a fence to remove the complexity
of dealing with sync_files on DRM drivers. So even if there are many
fences in the sync_file that needs to waited for a commit to happen,
they all get added to the fence_collection and passed for DRM use as
a standard struct fence.

That means that no changes needed to any driver besides supporting fences.

fence_collection's fence doesn't belong to any timeline context, so
fence_is_later() and fence_later() are not meant to be called with
fence_collections fences.

v2: Comments by Daniel Vetter:
- merge fence_collection_init() and fence_collection_add()
- only add callbacks at ->enable_signalling()
- remove fence_collection_put()
- check for type on to_fence_collection()
- adjust fence_is_later() and fence_later() to WARN_ON() if they
are used with collection fences.

v3: - Initialize fence_cb.node at fence init.

Comments by Chris Wilson:
- return "unbound" on fence_collection_get_timeline_name()
- don't stop adding callbacks if one fails
- remove redundant !! on fence_collection_enable_signaling()
- remove redundant () on fence_collection_signaled
- use fence_default_wait() instead

Cc: Alex Deucher 
Cc: Christian König 
Signed-off-by: Gustavo Padovan 
---
 drivers/dma-buf/Makefile   |   2 +-
 drivers/dma-buf/fence-collection.c | 139 +
 drivers/dma-buf/fence.c|   2 +-
 include/linux/fence-collection.h   |  73 +++
 include/linux/fence.h  |   9 +++
 5 files changed, 223 insertions(+), 2 deletions(-)
 create mode 100644 drivers/dma-buf/fence-collection.c
 create mode 100644 include/linux/fence-collection.h

diff --git a/drivers/dma-buf/Makefile b/drivers/dma-buf/Makefile
index d2d02fc..a8e8ecb 100644
--- a/drivers/dma-buf/Makefile
+++ b/drivers/dma-buf/Makefile
@@ -1,3 +1,3 @@
-obj-y := dma-buf.o fence.o reservation.o seqno-fence.o
+obj-y := dma-buf.o fence.o reservation.o seqno-fence.o fence-collection.o
 obj-$(CONFIG_SYNC_FILE)+= sync_file.o
 obj-$(CONFIG_SW_SYNC)  += sw_sync.o sync_debug.o
diff --git a/drivers/dma-buf/fence-collection.c 
b/drivers/dma-buf/fence-collection.c
new file mode 100644
index 000..432eb6b
--- /dev/null
+++ b/drivers/dma-buf/fence-collection.c
@@ -0,0 +1,139 @@
+/*
+ * fence-collection: aggregate fences to be waited together
+ *
+ * Copyright (C) 2016 Collabora Ltd
+ * Authors:
+ * Gustavo Padovan 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include 
+#include 
+#include 
+
+static const char *fence_collection_get_driver_name(struct fence *fence)
+{
+   struct fence_collection *collection = to_fence_collection(fence);
+   struct fence *f = collection->fences[0].fence;
+
+   return f->ops->get_driver_name(fence);
+}
+
+static const char *fence_collection_get_timeline_name(struct fence *fence)
+{
+   return "unbound";
+}
+
+static void collection_check_cb_func(struct fence *fence, struct fence_cb *cb)
+{
+   struct fence_collection_cb *f_cb;
+   struct fence_collection *collection;
+
+   f_cb = container_of(cb, struct fence_collection_cb, cb);
+   collection = f_cb->collection;
+
+   if (atomic_dec_and_test(&collection->num_pending_fences))
+   fence_signal(&collection->base);
+}
+
+static bool fence_collection_enable_signaling(struct fence *fence)
+{
+   struct fence_collection *collection = to_fence_collection(fence);
+   int i;
+
+   for (i = 0 ; i < collection->num_fences ; i++) {
+   if (fence_add_callback(collection->fences[i].fence,
+  &collection->fences[i].cb,
+  collection_check_cb_func)) {
+   atomic_dec(&collection->num_pending_fences);
+   }
+   }
+
+   return atomic_read(&collection->num_pending_fences);
+}
+
+static bool fence_collection_signaled(struct fence *fence)
+{
+   struct fence_collection *collection = to_fence_collection(fence);
+
+   return atomic_read(&collection->num_pending_fences) == 0;
+}
+
+static void fence_collection_release(struct fence *fence)
+{
+   struct fence_collection *collection = to_fence_collection(fence);
+   int i;
+
+   for (i = 0 ; i < collection->num_fences ; i++) {
+   fence_remove_callback(coll

[PATCH 2/2] Documentation: add fence-collection to kernel DocBook

2016-05-18 Thread Gustavo Padovan
From: Gustavo Padovan 

Include fence-collection files in the DocBook.

Signed-off-by: Gustavo Padovan 
---
 Documentation/DocBook/device-drivers.tmpl | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/DocBook/device-drivers.tmpl 
b/Documentation/DocBook/device-drivers.tmpl
index 509a187..68539e5 100644
--- a/Documentation/DocBook/device-drivers.tmpl
+++ b/Documentation/DocBook/device-drivers.tmpl
@@ -132,8 +132,10 @@ X!Edrivers/base/interface.c
 !Edrivers/dma-buf/dma-buf.c
 !Edrivers/dma-buf/fence.c
 !Edrivers/dma-buf/seqno-fence.c
+!Edrivers/dma-buf/fence-collection.c
 !Iinclude/linux/fence.h
 !Iinclude/linux/seqno-fence.h
+!Iinclude/linux/fence-collection.h
 !Edrivers/dma-buf/reservation.c
 !Iinclude/linux/reservation.h
 !Edrivers/dma-buf/sync_file.c
-- 
2.5.5



[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #3 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
(In reply to Alex Deucher from comment #2)
> Can you identify what component caused the regression?  mesa?  llvm?  kernel?

That is a good question, but I do not know the answer.

Data:

Kernel: 4.6.0
Kernel module: radeon.ko

Resolution: 1920x1080
Game quality setting: Ultra

CPU: A10-7850K
CPU utilization: 120% (kernel-space is about 10% CPU)

GPU: R9 390
GPU utilization (radeontop): >>>> 15% <<<<
GPU performance level: forced max clocks

Based on this, it seems that the user-space component (mesa + llvm) is the
bottleneck.

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #4 from Alex Deucher  ---
Can you try a different kernel or mesa version?

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #5 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
(In reply to Alex Deucher from comment #2)
> Can you identify what component caused the regression?  mesa?  llvm?  kernel?

Output from "perf report":

# Samples: 660K of event 'cycles'
# Event count (approx.): 568704142352
#
# Overhead  CommandShared Object  Symbol
 9.94%  G.26   radeonsi_dri.so[.] pb_cache_is_buffer_compat
 2.51%  G.26   libgcc_s.so.1  [.] __umoddi3
 1.66%  G.26   libc-2.22.so   [.] _int_malloc
 1.52%  G.26   libc-2.22.so   [.] _int_free
 1.42%  G.26   radeonsi_dri.so[.] radeon_drm_cs_add_buffer
 1.22%  bioshock.i386  radeonsi_dri.so[.] radeon_cs_context_cleanup
 1.14%  bioshock.i386  [kernel.vmlinux]   [k]
reservation_object_add_shared_fence
 1.02%  G.26   libc-2.22.so   [.] __libc_calloc
 0.93%  G.26   libpthread-2.22.so [.] pthread_mutex_lock
 0.81%  bioshock.i386  [kernel.vmlinux]   [k] __ww_mutex_lock_interruptible
 0.79%  G.26   bioshock.i386  [.] 0x001a8853
 0.79%  G.26   radeonsi_dri.so[.] pb_cache_reclaim_buffer
 0.78%  G.26   libpthread-2.22.so [.]
__pthread_mutex_unlock_usercnt
 0.74%  G.26   libc-2.22.so   [.] malloc
 0.72%  bioshock.i386  radeonsi_dri.so[.]
radeon_drm_cs_emit_ioctl_oneshot
 0.66%  bioshock.i386  [radeon]   [k] radeon_bo_list_validate
 0.60%  G.26   radeonsi_dri.so[.] __x86.get_pc_thunk.bx
 0.56%  G.26   bioshock.i386  [.] 0x001a8e53
 0.56%  G.26   radeonsi_dri.so[.] set_add
 0.55%  G.26   radeonsi_dri.so[.] ir_expression::accept
 0.54%  bioshock.i386  [ttm]  [k] ttm_bo_list_ref_sub
 0.54%  G.26   radeonsi_dri.so[.] _mesa_glsl_parse
 0.53%  G.26   radeonsi_dri.so[.] radeon_lookup_buffer
 0.52%  G.26   libc-2.22.so   [.] __memcmp_sse4_2
 0.48%  G.26   radeonsi_dri.so[.] visit_list_elements
 0.47%  bioshock.i386  [kernel.vmlinux]   [k]
reservation_object_reserve_shared
 0.46%  G.26   radeonsi_dri.so[.] si_reset_buffer_resources
 0.45%  G.26   radeonsi_dri.so[.] hash_table_search
 0.45%  bioshock.i386  [drm]  [k] drm_gem_object_lookup
 0.42%  G.26   libc-2.22.so   [.] malloc_consolidate
 0.41%  bioshock.i386  [radeon]   [k] radeon_sync_fence
 0.41%  G.26   radeonsi_dri.so[.] set_search
 0.40%  G.26   radeonsi_dri.so[.]
u_default_transfer_inline_write
 0.40%  bioshock.i386  [ttm]  [k] ttm_bo_add_to_lru
 0.38%  G.26   radeonsi_dri.so[.] st_validate_state
 0.36%  bioshock.i386  [ttm]  [k] ttm_bo_del_from_lru

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[Bug 95474] Bioshock Infinite and DiRT Showdown perform very poorly on any GPU with GCN >=1.1

2016-05-18 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=95474

--- Comment #6 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
(In reply to Alex Deucher from comment #4)
> Can you try a different kernel or mesa version?

I will try tomorrow.

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[PATCH] drm/etnaviv: enable GPU module level clock gating support

2016-05-18 Thread Christian Gmeiner
2016-05-18 10:46 GMT+02:00 Lucas Stach :
> From: Russell King 
>
> Enable GPU module level hardware clock gating, using the conditions
> found in the galcore v5 driver.
>
> v2 lst: Split out clock gating enable into separate function, as
> there might be more conditions needed for new hardware.
>
> Signed-off-by: Russell King 
> Signed-off-by: Lucas Stach 

Reviewed-by: Christian Gmeiner 

> ---
>  drivers/gpu/drm/etnaviv/etnaviv_gpu.c  | 44 
> ++
>  drivers/gpu/drm/etnaviv/state_hi.xml.h |  7 ++
>  2 files changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
> b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 049d00d8ded5..66d8cfbb75bb 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -487,6 +487,47 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
> return 0;
>  }
>
> +static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
> +{
> +   u32 pmc, ppc;
> +
> +   /* enable clock gating */
> +   ppc = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
> +   ppc |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
> +
> +   /* Disable stall module clock gating for 4.3.0.1 and 4.3.0.2 revs */
> +   if (gpu->identity.revision == 0x4301 ||
> +   gpu->identity.revision == 0x4302)
> +   ppc |= 
> VIVS_PM_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING;
> +
> +   gpu_write(gpu, VIVS_PM_POWER_CONTROLS, ppc);
> +
> +   pmc = gpu_read(gpu, VIVS_PM_MODULE_CONTROLS);
> +
> +   /* Disable PA clock gating for GC400+ except for GC420 */
> +   if (gpu->identity.model >= chipModel_GC400 &&
> +   gpu->identity.model != chipModel_GC420)
> +   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA;
> +
> +   /*
> +* Disable PE clock gating on revs < 5.0.0.0 when HZ is
> +* present without a bug fix.
> +*/
> +   if (gpu->identity.revision < 0x5000 &&
> +   gpu->identity.minor_features0 & chipMinorFeatures0_HZ &&
> +   !(gpu->identity.minor_features1 &
> + chipMinorFeatures1_DISABLE_PE_GATING))
> +   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE;
> +
> +   if (gpu->identity.revision < 0x5422)
> +   pmc |= BIT(15); /* Unknown bit */
> +
> +   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
> +   pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;
> +
> +   gpu_write(gpu, VIVS_PM_MODULE_CONTROLS, pmc);
> +}
> +
>  static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
>  {
> u16 prefetch;
> @@ -506,6 +547,9 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
> gpu_write(gpu, VIVS_MC_DEBUG_MEMORY, mc_memory_debug);
> }
>
> +   /* enable module-level clock gating */
> +   etnaviv_gpu_enable_mlcg(gpu);
> +
> /*
>  * Update GPU AXI cache atttribute to "cacheable, no allocate".
>  * This is necessary to prevent the iMX6 SoC locking up.
> diff --git a/drivers/gpu/drm/etnaviv/state_hi.xml.h 
> b/drivers/gpu/drm/etnaviv/state_hi.xml.h
> index 6a7de5f1454a..807a3d9e0dd5 100644
> --- a/drivers/gpu/drm/etnaviv/state_hi.xml.h
> +++ b/drivers/gpu/drm/etnaviv/state_hi.xml.h
> @@ -218,6 +218,13 @@ Copyright (C) 2015
>  #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_FE 0x0001
>  #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_DE 0x0002
>  #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE 0x0004
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH 0x0008
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA 0x0010
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE 0x0020
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA 0x0040
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX 0x0080
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ  
> 0x0001
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ  
> 0x0002
>
>  #define VIVS_PM_MODULE_STATUS  0x0108
>  #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE0x0001
> --
> 2.8.0.rc3
>


[PATCH] drm: Nuke ->vblank_disable_allowed

2016-05-18 Thread Alex Deucher
On Wed, May 18, 2016 at 4:29 PM, Daniel Vetter  
wrote:
> This was added in
>
> commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
> Author: Jesse Barnes 
> Date:   Tue Sep 30 12:14:26 2008 -0700
>
> drm: Rework vblank-wait handling to allow interrupt reduction.
>
> to stay backwards-compatible with old UMS code that didn't even tell
> the kernel when it did a modeset, so that the kernel could
> save/restore vblank counters. At worst this means vblanks will be
> somewhat funky on a setup that very likely no one still runs.
>
> So let's just nuke it.
>
> Plan B would be to set it unconditionally in drm_vblank_init for kms
> drivers, instead of in each driver separately. So if this patch breaks
> anything please only restore the hunks in drmP.h and drm_irq.c, plus
> add a check for DRIVER_MODESET in drm_vblank_init.
>
> Stumbled over this in a discussion on irc with Chris.
>
> v2: Remove leftover debug gunk from psr hacking (Alex).
>
> Cc: Chris Wilson 
> Cc: Alex Deucher 
> Cc: Liviu Dudau 
> Cc: Russell King 
> Cc: Thierry Reding 
> Cc: Eric Anholt 
> Cc: Laurent Pinchart 
> Cc: Inki Dae 
> Cc: Tomi Valkeinen 
> Cc: Mark Yao 
> Cc: Sascha Hauer 
> Cc: Philipp Zabel 
> Signed-off-by: Daniel Vetter 

Seems reasonable to me.

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 1 -
>  drivers/gpu/drm/arm/hdlcd_drv.c | 1 -
>  drivers/gpu/drm/armada/armada_drv.c | 1 -
>  drivers/gpu/drm/drm_irq.c   | 6 --
>  drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 ---
>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c   | 1 -
>  drivers/gpu/drm/gma500/psb_drv.c| 1 -
>  drivers/gpu/drm/i915/i915_dma.c | 3 ---
>  drivers/gpu/drm/imx/imx-drm-core.c  | 7 ---
>  drivers/gpu/drm/radeon/radeon_irq_kms.c | 1 -
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 7 ---
>  drivers/gpu/drm/tegra/drm.c | 1 -
>  drivers/gpu/drm/vc4/vc4_kms.c   | 2 --
>  include/drm/drmP.h  | 8 
>  14 files changed, 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 9266c7b69808..835a3fa8d8df 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -219,7 +219,6 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
> if (r) {
> return r;
> }
> -   adev->ddev->vblank_disable_allowed = true;
>
> /* enable msi */
> adev->irq.msi_enabled = false;
> diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> index 2112f0b105e3..4f909378d581 100644
> --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> @@ -379,7 +379,6 @@ static int hdlcd_drm_bind(struct device *dev)
> DRM_ERROR("failed to initialise vblank\n");
> goto err_vblank;
> }
> -   drm->vblank_disable_allowed = true;
>
> drm_mode_config_reset(drm);
> drm_kms_helper_poll_init(drm);
> diff --git a/drivers/gpu/drm/armada/armada_drv.c 
> b/drivers/gpu/drm/armada/armada_drv.c
> index 531fcb946346..cb21c0b6374a 100644
> --- a/drivers/gpu/drm/armada/armada_drv.c
> +++ b/drivers/gpu/drm/armada/armada_drv.c
> @@ -113,7 +113,6 @@ static int armada_drm_load(struct drm_device *dev, 
> unsigned long flags)
> goto err_comp;
>
> dev->irq_enabled = true;
> -   dev->vblank_disable_allowed = 1;
>
> ret = armada_fbdev_init(dev);
> if (ret)
> diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
> index d1b5fc20b2f8..1a0ae89087e8 100644
> --- a/drivers/gpu/drm/drm_irq.c
> +++ b/drivers/gpu/drm/drm_irq.c
> @@ -348,9 +348,6 @@ static void vblank_disable_fn(unsigned long arg)
> unsigned int pipe = vblank->pipe;
> unsigned long irqflags;
>
> -   if (!dev->vblank_disable_allowed)
> -   return;
> -
> spin_lock_irqsave(&dev->vbl_lock, irqflags);
> if (atomic_read(&vblank->refcount) == 0 && vblank->enabled) {
> DRM_DEBUG("disabling vblank on crtc %u\n", pipe);
> @@ -437,8 +434,6 @@ int drm_vblank_init(struct drm_device *dev, unsigned int 
> num_crtcs)
>  "get_vblank_timestamp == NULL\n");
> }
>
> -   dev->vblank_disable_allowed = false;
> -
> return 0;
>
>  err:
> @@ -1555,7 +1550,6 @@ static void drm_legacy_vblank_post_modeset(struct 
> drm_device *dev,
>
> if (vblank->inmodeset) {
> spin_lock_irqsave(&dev->vbl_lock, irqflags);
> -   dev->vblank_disable_allowed = true;
> drm_reset_vblank_timestamp(dev, pipe);
> spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
> b/drivers/gpu/drm/exynos/exynos_drm_drv.c
> index 21c719e8e02b..2dd820e23b0c 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
> +

[PATCH 1/2] dma-buf/fence: add fence_collection fences

2016-05-18 Thread Chris Wilson
On Wed, May 18, 2016 at 05:59:52PM -0300, Gustavo Padovan wrote:
> +static void collection_check_cb_func(struct fence *fence, struct fence_cb 
> *cb)
> +{
> + struct fence_collection_cb *f_cb;
> + struct fence_collection *collection;
> +
> + f_cb = container_of(cb, struct fence_collection_cb, cb);
> + collection = f_cb->collection;
> +
> + if (atomic_dec_and_test(&collection->num_pending_fences))
> + fence_signal(&collection->base);
> +}
> +
> +static bool fence_collection_enable_signaling(struct fence *fence)
> +{
> + struct fence_collection *collection = to_fence_collection(fence);
> + int i;
> +
> + for (i = 0 ; i < collection->num_fences ; i++) {
> + if (fence_add_callback(collection->fences[i].fence,
> +&collection->fences[i].cb,
> +collection_check_cb_func)) {
> + atomic_dec(&collection->num_pending_fences);
> + }
> + }

We don't always have a convenient means to preallocate an array of
fences to use. Keeping a list of fences in addition to the array would
be easier to user in many circumstances.

Just means we need a

struct fence_collection_entry {
struct fence *fence;
struct list_head link;
};

int fence_collection_add(struct fence *_collection,
 struct fence *fence)
{
struct fence_collection *collection =
to_fence_collection(_collection);
struct fence_collection_entry *entry;

entry = kmalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
return -ENOMEM;

entry->fence = fence_get(fence);
list_add_tail(&entry->link, &collection->fence_list);
atomic_inc(&collection->num_pending_fences);

return 0;
}

and a couple of list iterations as well as walking the arrays.

(This fence_collection_add() needs to be documented to only be valid
from the constructing thread before the fence is sealed for export/use.)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


drm/dp/mst: change MST detection scheme (v2)

2016-05-18 Thread Andrey Grodzovsky
From: Mykola Lysenko 

1. Get edid for all connected MST displays, not only on logical ports,
   in the same thread as MST topology detection is done:
 There are displays that have branches inside w/o logical ports.
 So in case another SST display connected downstream system can
 end-up in situation when 3 DOWN requests sent: two for
‘remote i2c read’ and one for ‘enum path resources’, making 
slots full.

2. Call notification callback in one place in the end of topology 
discovery/update:
 This is done to reduce number of events sent to userspace in case 
complex
 topology discovery is going, adding multiple number of connectors;

3. Remove notification callback call from short pulse interrupt processing 
function:
 This is done in order not to block interrupt processing function, in 
case any
 MST request will be made from it. Notification will be send from 
topology
 discovery/update work item.

v2: This change also includes tile property set fix which caused regression
in i915 driver.

Reviewed-by: Alex Deucher 
Signed-off-by: Mykola Lysenko 
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 36 +--
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 27fbd79..9971c46 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1159,13 +1159,9 @@ static void drm_dp_add_port(struct drm_dp_mst_branch 
*mstb,
drm_dp_put_port(port);
goto out;
}
-   if (port->port_num >= DP_MST_LOGICAL_PORT_0) {
-   port->cached_edid = drm_get_edid(port->connector, 
&port->aux.ddc);
-   drm_mode_connector_set_tile_property(port->connector);
-   }
+
(*mstb->mgr->cbs->register_connector)(port->connector);
}
-
 out:
/* put reference to this port */
drm_dp_put_port(port);
@@ -1190,8 +1186,8 @@ static void drm_dp_update_port(struct drm_dp_mst_branch 
*mstb,
port->ddps = conn_stat->displayport_device_plug_status;

if (old_ddps != port->ddps) {
+   dowork = true;
if (port->ddps) {
-   dowork = true;
} else {
port->available_pbn = 0;
}
@@ -1296,8 +1292,13 @@ static void drm_dp_check_and_send_link_address(struct 
drm_dp_mst_topology_mgr *m
if (port->input)
continue;

-   if (!port->ddps)
+   if (!port->ddps) {
+   if (port->cached_edid) {
+   kfree(port->cached_edid);
+   port->cached_edid = NULL;
+   }
continue;
+   }

if (!port->available_pbn)
drm_dp_send_enum_path_resources(mgr, mstb, port);
@@ -1308,6 +1309,13 @@ static void drm_dp_check_and_send_link_address(struct 
drm_dp_mst_topology_mgr *m
drm_dp_check_and_send_link_address(mgr, 
mstb_child);
drm_dp_put_mst_branch_device(mstb_child);
}
+   } else if (port->pdt == DP_PEER_DEVICE_SST_SINK ||
+   port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) {
+   if (!port->cached_edid) {
+   port->cached_edid =
+   drm_get_edid(port->connector, 
&port->aux.ddc);
+   
drm_mode_connector_set_tile_property(port->connector);
+   }
}
}
 }
@@ -1327,6 +1335,8 @@ static void drm_dp_mst_link_probe_work(struct work_struct 
*work)
drm_dp_check_and_send_link_address(mgr, mstb);
drm_dp_put_mst_branch_device(mstb);
}
+
+   (*mgr->cbs->hotplug)(mgr);
 }

 static bool drm_dp_validate_guid(struct drm_dp_mst_topology_mgr *mgr,
@@ -1586,7 +1596,6 @@ static void drm_dp_send_link_address(struct 
drm_dp_mst_topology_mgr *mgr,
for (i = 0; i < txmsg->reply.u.link_addr.nports; i++) {
drm_dp_add_port(mstb, mgr->dev, 
&txmsg->reply.u.link_addr.ports[i]);
}
-   (*mgr->cbs->hotplug)(mgr);
}
} else {
mstb->link_address_sent = false;
@@ -2283,8 +2292,6 @@ static int drm_dp_mst_handle_up_req(struct 
drm_dp_mst_topology_mgr *mgr)
drm_dp_update_port(mstb, &msg.u.conn_stat);

DRM_DEBUG_KMS("Got CSN: pn: %d ldps:%d ddps: %d mcs: %d 
ip: %d pdt: %d\n", msg.u.conn_stat.port_number, 
msg.u.conn_stat.legacy_device_plug_status, 
msg.u.conn_stat.displayport_de

[PATCH v2] drm/imx: Match imx-ipuv3-crtc components using device node in platform data

2016-05-18 Thread Lothar Waßmann
Hi,

On Wed, 18 May 2016 14:56:40 +0200 Philipp Zabel wrote:
> The component master driver imx-drm-core matches component devices using
> their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc
> module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during
> probing. Before that, of_node was set and caused an of: modalias to be
> used instead of the platform: modalias, which broke module autoloading.
> 
> On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc
> probe function calls component_add, component matching in imx-drm-core
> fails. While dev->of_node will be set once the next component tries to
> bring up the component master, imx-drm-core component binding will never
> succeed if one of the crtc devices is probed last.
> 
> Add of_node to the component platform data and match against the
> pdata->of_node instead of dev->of_node in imx-drm-core to work around
> this problem.
> 
> Cc:  # 4.4.x
> Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading")
> Signed-off-by: Philipp Zabel 
> ---
> Changes since v1:
>  - Also set the crtc->port to the of_node from platform data
> ---
>  drivers/gpu/drm/imx/imx-drm-core.c | 8 
>  drivers/gpu/drm/imx/ipuv3-crtc.c   | 2 +-
>  drivers/gpu/ipu-v3/ipu-common.c| 5 +++--
>  include/video/imx-ipu-v3.h | 2 ++
>  4 files changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/imx/imx-drm-core.c 
> b/drivers/gpu/drm/imx/imx-drm-core.c
> index e26dcde..05229b9 100644
> --- a/drivers/gpu/drm/imx/imx-drm-core.c
> +++ b/drivers/gpu/drm/imx/imx-drm-core.c
> @@ -25,6 +25,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "imx-drm.h"
>  
> @@ -444,6 +445,13 @@ static int compare_of(struct device *dev, void *data)
>  {
>   struct device_node *np = data;
>  
> + /* Special case for DI, dev->of_node may not be set yet */
> + if (strcmp(dev->driver->name, "imx-ipuv3-crtc") == 0) {
> + struct ipu_client_platformdata *pdata = dev->platform_data;
> +
> + return pdata->of_node == np;
> + }
> +
>   /* Special case for LDB, one device for two channels */
>   if (of_node_cmp(np->name, "lvds-channel") == 0) {
>   np = of_get_parent(np);
> diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c 
> b/drivers/gpu/drm/imx/ipuv3-crtc.c
> index dee8e8b..b2c30b8 100644
> --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
> +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
> @@ -473,7 +473,7 @@ static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
>  
>   ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
>   &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
> - ipu_crtc->dev->of_node);
> + pdata->of_node);
>   if (ret) {
>   dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
>   goto err_put_resources;
> diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
> index abb98c7..99dcacf 100644
> --- a/drivers/gpu/ipu-v3/ipu-common.c
> +++ b/drivers/gpu/ipu-v3/ipu-common.c
> @@ -997,7 +997,7 @@ struct ipu_platform_reg {
>  };
>  
>  /* These must be in the order of the corresponding device tree port nodes */
> -static const struct ipu_platform_reg client_reg[] = {
> +static struct ipu_platform_reg client_reg[] = {
>   {
>   .pdata = {
>   .csi = 0,
> @@ -1048,7 +1048,7 @@ static int ipu_add_client_devices(struct ipu_soc *ipu, 
> unsigned long ipu_base)
>   mutex_unlock(&ipu_client_id_mutex);
>  
>   for (i = 0; i < ARRAY_SIZE(client_reg); i++) {
> - const struct ipu_platform_reg *reg = &client_reg[i];
> + struct ipu_platform_reg *reg = &client_reg[i];
>   struct platform_device *pdev;
>   struct device_node *of_node;
>  
> @@ -1070,6 +1070,7 @@ static int ipu_add_client_devices(struct ipu_soc *ipu, 
> unsigned long ipu_base)
>  
>   pdev->dev.parent = dev;
>  
> + reg->pdata.of_node = of_node;
>   ret = platform_device_add_data(pdev, ®->pdata,
>  sizeof(reg->pdata));
>   if (!ret)
> diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
> index ad66589..3a2a794 100644
> --- a/include/video/imx-ipu-v3.h
> +++ b/include/video/imx-ipu-v3.h
> @@ -16,6 +16,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -345,6 +346,7 @@ struct ipu_client_platformdata {
>   int dc;
>   int dp;
>   int dma[2];
> + struct device_node *of_node;
>  };
>  
>  #endif /* __DRM_IPU_H__ */
>
This seems to be OK. I tested this patch with parallel-display and
imx-ldb modular and built-in.


Lothar Waßmann


[RFC 1/8] dma-buf/fence: add fence_collection fences

2016-05-18 Thread Gustavo Padovan
Hi Christian,

2016-05-18 Christian König :

> Am 15.04.2016 um 21:25 schrieb Daniel Vetter:
> > On Fri, Apr 15, 2016 at 11:27:50AM -0700, Gustavo Padovan wrote:
> > > 2016-04-15 Christian König :
> > > > Amdgpu also has an implementation for a fence collection which uses a a
> > > > hashtable to keep the fences grouped by context (e.g. only the latest 
> > > > fence
> > > > is keept for each context). See amdgpu_sync.c for reference.
> > > > 
> > > > We should either make the collection similar in a way that you can add 
> > > > as
> > > > many fences as you want (like the amdgpu implementation) or make it 
> > > > static
> > > > and only add a fixed number of fences right from the beginning.
> > > > 
> > > > I can certainly see use cases for both, but if you want to stick with a
> > > > static approach you should probably call the new object fence_array 
> > > > instead
> > > > of fence_collection and do as Daniel suggested.
> > > Maybe we can go for something in between. Have fence_collection_init()
> > > need at least two fences to create the fence_collection. Then
> > > fence_collection_add() would add more dinamically.
> > The problem with adding fences later on is that it makes it trivial to add
> > deadlocks and loops. Just add the fence collection to itself, boom. From
> > that pov it's an unsafe api, and hence something to avoid.
> > -Daniel
> 
> Any conclusion on this? Did any version of the patch made it upstream?
> 
> I'm in the need of an array based fence collection right now as well. Any
> objection that I just take the patch proposed here and fix the comments or
> are you still else working on this right now?

I have a new version of this patch that I didn't send upstream yet
because it is part of a bigger patchset. But I can split it and send
what I have for fence_collection later today.

Gustavo


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