omap4: how to get the HDMI core IRQ?
On 04/01/2016 09:35 AM, Tomi Valkeinen wrote:
>
> On 01/04/16 10:03, Tomi Valkeinen wrote:
>
>> So probably we could just fix hdmi_core_powerdown_disable(), so that it
>> sets PD to 1, which is what it was meant to do. This assumes that there
>> are no bad side effects having PD 1 even if the HDMI is blanked, which
>> is something we need to verify. I can do a few tests with that.
>
> I can't see any bad side effects with fixing the function. So here:
>
> From 5cddaa31e28c059ea99a21ab03c4c1864bf5e610 Mon Sep 17 00:00:00 2001
> From: Tomi Valkeinen
> Date: Fri, 1 Apr 2016 10:29:29 +0300
> Subject: [PATCH] drm/omap: fix OMAP4 hdmi_core_powerdown_disable()
>
> hdmi_core_powerdown_disable() is supposed to disable HDMI core's
> power-down mode. Howver, the function sets the power-down bit to 0,
> which means "enable power-down".
>
> This hasn't caused any issues as the PD seems to affect only interrupts
> from HDMI core, and none of those interrupts are used at the moment. CEC
> functionality requires core interrupts, and the PD mode needs to be
> fixed.
>
> This patch fixes hdmi_core_powerdown_disable() to actually disable the
> PD mode.
>
> Signed-off-by: Tomi Valkeinen
> Reported-by: Hans Verkuil
Tested-by: Hans Verkuil
Works like a charm!
Thanks!
Regards,
Hans
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
> b/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
> index fa72e735dad2..ef3afe99e487 100644
> --- a/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
> +++ b/drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
> @@ -211,7 +211,7 @@ static void hdmi_core_init(struct hdmi_core_video_config
> *video_cfg)
> static void hdmi_core_powerdown_disable(struct hdmi_core_data *core)
> {
> DSSDBG("Enter hdmi_core_powerdown_disable\n");
> - REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x0, 0, 0);
> + REG_FLD_MOD(core->base, HDMI_CORE_SYS_SYS_CTRL1, 0x1, 0, 0);
> }
>
> static void hdmi_core_swreset_release(struct hdmi_core_data *core)
>
[Bug 90481] Radeonsi driver, X crash while playing "Spec ops: the line"
https://bugs.freedesktop.org/show_bug.cgi?id=90481 --- Comment #9 from Daniel Scharrer --- I'm also seeing frequent lockups with VI using git Mesa and LLVM (X unresponsive, radeontop showing everything at 100%). Nothing in dmesg, but that's probably just because (afaik) gpu reset is not implemented for amdgpu in 4.5. GPU: R9 380X (tonga) Mesa 11.3.0-devel (git-715e97e) LLVM r265649 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160410/1523f323/attachment.html>
[PATCH 1/6] drm/amd: Mark some tables as const
This patch marks some compile-time constant tables 'const'.
The tables marked in this patch are the low hanging fruit
where little other changes were necesary to avoid casting
away constness etc. Also mark some tables that are private
to a file as static.
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 12 ++--
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.c | 10 +-
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c| 8
drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h| 2 +-
drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c | 2 +-
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +++---
drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 +-
13 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 66e51f9..5d05b5d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -2348,7 +2348,7 @@ static inline void amdgpu_unregister_atpx_handler(void) {}
* KMS
*/
extern const struct drm_ioctl_desc amdgpu_ioctls_kms[];
-extern int amdgpu_max_kms_ioctl;
+extern const int amdgpu_max_kms_ioctl;
int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags);
int amdgpu_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 0535095..c835abe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -596,20 +596,20 @@ const struct drm_mode_config_funcs amdgpu_mode_funcs = {
.output_poll_changed = amdgpu_output_poll_changed
};
-static struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
+static const struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
{ { UNDERSCAN_OFF, "off" },
{ UNDERSCAN_ON, "on" },
{ UNDERSCAN_AUTO, "auto" },
};
-static struct drm_prop_enum_list amdgpu_audio_enum_list[] =
+static const struct drm_prop_enum_list amdgpu_audio_enum_list[] =
{ { AMDGPU_AUDIO_DISABLE, "off" },
{ AMDGPU_AUDIO_ENABLE, "on" },
{ AMDGPU_AUDIO_AUTO, "auto" },
};
/* XXX support different dither options? spatial, temporal, both, etc. */
-static struct drm_prop_enum_list amdgpu_dither_enum_list[] =
+static const struct drm_prop_enum_list amdgpu_dither_enum_list[] =
{ { AMDGPU_FMT_DITHER_DISABLE, "off" },
{ AMDGPU_FMT_DITHER_ENABLE, "on" },
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index f1e17d6..2d9dbc2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -166,7 +166,7 @@ module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint,
0444);
MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
-static struct pci_device_id pciidlist[] = {
+static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_CIK
/* Kaveri */
{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 762cfdb..9266c7b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -498,7 +498,7 @@ static int amdgpu_irqdomain_map(struct irq_domain *d,
return 0;
}
-static struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
+static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
.map = amdgpu_irqdomain_map,
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 7805a87..1f9d318 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -754,4 +754,4 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
DRM_AUTH|DRM_RENDER_ALLOW),
};
-int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
+const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
index 025a3ed..55a006d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
@@ -95,23 +95,23 @@ enum DPM_EVENT_SRC {
/*
[PATCH 2/6] drm/amd/scheduler: Mark amdgpu_sched_ops const
This marks the struct amdgpu_sched_ops const and
adjusts amd_sched_init to take a const pointer
for the ops param. The ops member of
struct amd_gpu_scheduler is also changed to const.
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 +-
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 2 +-
drivers/gpu/drm/amd/scheduler/gpu_scheduler.h | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 5d05b5d..660213a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -748,7 +748,7 @@ enum amdgpu_ring_type {
AMDGPU_RING_TYPE_VCE
};
-extern struct amd_sched_backend_ops amdgpu_sched_ops;
+extern const struct amd_sched_backend_ops amdgpu_sched_ops;
int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
struct amdgpu_job **job);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index a052ac2..4eea2a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -198,7 +198,7 @@ err:
return fence;
}
-struct amd_sched_backend_ops amdgpu_sched_ops = {
+const struct amd_sched_backend_ops amdgpu_sched_ops = {
.dependency = amdgpu_job_dependency,
.run_job = amdgpu_job_run,
.begin_job = amd_sched_job_begin,
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 639c70d..c16248c 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -530,7 +530,7 @@ static int amd_sched_main(void *param)
* Return 0 on success, otherwise error code.
*/
int amd_sched_init(struct amd_gpu_scheduler *sched,
- struct amd_sched_backend_ops *ops,
+ const struct amd_sched_backend_ops *ops,
unsigned hw_submission, long timeout, const char *name)
{
int i;
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
index 95ebfd0..169f70f 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
@@ -123,7 +123,7 @@ enum amd_sched_priority {
* One scheduler is implemented for each hardware ring
*/
struct amd_gpu_scheduler {
- struct amd_sched_backend_ops*ops;
+ const struct amd_sched_backend_ops *ops;
uint32_thw_submission_limit;
longtimeout;
const char *name;
@@ -137,7 +137,7 @@ struct amd_gpu_scheduler {
};
int amd_sched_init(struct amd_gpu_scheduler *sched,
- struct amd_sched_backend_ops *ops,
+ const struct amd_sched_backend_ops *ops,
uint32_t hw_submission, long timeout, const char *name);
void amd_sched_fini(struct amd_gpu_scheduler *sched);
--
2.8.0.rc3
[PATCH 3/6] drm/amdgpu: Mark all instances of struct drm_info_list as const
All these are compile time constand and the
drm_debugfs_create/remove_files functions take a const
pointer argument.
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 2 +-
8 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 660213a..d1ad763 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1701,12 +1701,12 @@ static inline void amdgpu_mn_unregister(struct
amdgpu_bo *bo) {}
* Debugfs
*/
struct amdgpu_debugfs {
- struct drm_info_list*files;
+ const struct drm_info_list *files;
unsignednum_files;
};
int amdgpu_debugfs_add_files(struct amdgpu_device *adev,
-struct drm_info_list *files,
+const struct drm_info_list *files,
unsigned nfiles);
int amdgpu_debugfs_fence_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 00fa730..e3905c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2022,7 +2022,7 @@ void amdgpu_get_pcie_info(struct amdgpu_device *adev)
* Debugfs
*/
int amdgpu_debugfs_add_files(struct amdgpu_device *adev,
-struct drm_info_list *files,
+const struct drm_info_list *files,
unsigned nfiles)
{
unsigned i;
@@ -2193,7 +2193,7 @@ static int amdgpu_debugfs_print_status(struct seq_file
*m, void *data)
return 0;
}
-static struct drm_info_list amdgpu_debugfs_status_list[] = {
+static const struct drm_info_list amdgpu_debugfs_status_list[] = {
{"amdgpu_print_status", &amdgpu_debugfs_print_status, 0, NULL},
};
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index d81f1f4..100f4c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -639,7 +639,7 @@ static int amdgpu_debugfs_gpu_reset(struct seq_file *m,
void *data)
return 0;
}
-static struct drm_info_list amdgpu_debugfs_fence_list[] = {
+static const struct drm_info_list amdgpu_debugfs_fence_list[] = {
{"amdgpu_fence_info", &amdgpu_debugfs_fence_info, 0, NULL},
{"amdgpu_gpu_reset", &amdgpu_debugfs_gpu_reset, 0, NULL}
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index fa6a27b..0635bb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -797,7 +797,7 @@ static int amdgpu_debugfs_gem_info(struct seq_file *m, void
*data)
return 0;
}
-static struct drm_info_list amdgpu_debugfs_gem_list[] = {
+static const struct drm_info_list amdgpu_debugfs_gem_list[] = {
{"amdgpu_gem_info", &amdgpu_debugfs_gem_info, 0, NULL},
};
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 83973d0..0129617 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -329,7 +329,7 @@ static int amdgpu_debugfs_sa_info(struct seq_file *m, void
*data)
}
-static struct drm_info_list amdgpu_debugfs_sa_list[] = {
+static const struct drm_info_list amdgpu_debugfs_sa_list[] = {
{"amdgpu_sa_info", &amdgpu_debugfs_sa_info, 0, NULL},
};
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index ff9597c..6d44d4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1212,7 +1212,7 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m,
void *data)
return 0;
}
-static struct drm_info_list amdgpu_pm_info_list[] = {
+static const struct drm_info_list amdgpu_pm_info_list[] = {
{"amdgpu_pm_info", amdgpu_debugfs_pm_info, 0, NULL},
};
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index dd79243..7bd31ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -427,7 +427,7 @@ static int r600_uvd_index = offsetof(struct amdgpu_device,
uvd.ring);
static int si_vce1_index = offsetof(struct amdgpu_device, vce.ring[0]);
static int si_vce2_index = offsetof(struct amdgpu_device, vce.ring[1]);
-static struct drm_info_list amdgpu_debugfs_ring_info_list[] = {
+static const struct drm_info_list amdgpu_debugfs_rin
[PATCH 4/6] drm/amd/powerplay: Mark pem_event_action chains as const
As these arrays were of pointer to pointer type, they were
pointer to pointer to const. Make them pointer to const
pointer to const.
Signed-off-by: Nils Wallménius
---
.../drm/amd/powerplay/eventmgr/eventactionchains.c | 34 +++---
.../drm/amd/powerplay/eventmgr/eventmanagement.c | 2 +-
drivers/gpu/drm/amd/powerplay/inc/eventmgr.h | 2 +-
3 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
index 56856a2..d6635cc 100644
--- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
+++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
@@ -24,7 +24,7 @@
#include "eventactionchains.h"
#include "eventsubchains.h"
-static const pem_event_action *initialize_event[] = {
+static const pem_event_action * const initialize_event[] = {
block_adjust_power_state_tasks,
power_budget_tasks,
system_config_tasks,
@@ -45,7 +45,7 @@ const struct action_chain initialize_action_chain = {
initialize_event
};
-static const pem_event_action *uninitialize_event[] = {
+static const pem_event_action * const uninitialize_event[] = {
ungate_all_display_phys_tasks,
uninitialize_display_phy_access_tasks,
disable_gfx_voltage_island_power_gating_tasks,
@@ -64,7 +64,7 @@ const struct action_chain uninitialize_action_chain = {
uninitialize_event
};
-static const pem_event_action *power_source_change_event_pp_enabled[] = {
+static const pem_event_action * const power_source_change_event_pp_enabled[] =
{
set_power_source_tasks,
set_power_saving_state_tasks,
adjust_power_state_tasks,
@@ -79,7 +79,7 @@ const struct action_chain
power_source_change_action_chain_pp_enabled = {
power_source_change_event_pp_enabled
};
-static const pem_event_action *power_source_change_event_pp_disabled[] = {
+static const pem_event_action * const power_source_change_event_pp_disabled[]
= {
set_power_source_tasks,
set_nbmcu_state_tasks,
NULL
@@ -90,7 +90,7 @@ const struct action_chain
power_source_changes_action_chain_pp_disabled = {
power_source_change_event_pp_disabled
};
-static const pem_event_action *power_source_change_event_hardware_dc[] = {
+static const pem_event_action * const power_source_change_event_hardware_dc[]
= {
set_power_source_tasks,
set_power_saving_state_tasks,
adjust_power_state_tasks,
@@ -106,7 +106,7 @@ const struct action_chain
power_source_change_action_chain_hardware_dc = {
power_source_change_event_hardware_dc
};
-static const pem_event_action *suspend_event[] = {
+static const pem_event_action * const suspend_event[] = {
reset_display_phy_access_tasks,
unregister_interrupt_tasks,
disable_gfx_voltage_island_power_gating_tasks,
@@ -130,7 +130,7 @@ const struct action_chain suspend_action_chain = {
suspend_event
};
-static const pem_event_action *resume_event[] = {
+static const pem_event_action * const resume_event[] = {
unblock_hw_access_tasks,
resume_connected_standby_tasks,
notify_smu_resume_tasks,
@@ -164,7 +164,7 @@ const struct action_chain resume_action_chain = {
resume_event
};
-static const pem_event_action *complete_init_event[] = {
+static const pem_event_action * const complete_init_event[] = {
unblock_adjust_power_state_tasks,
adjust_power_state_tasks,
enable_gfx_clock_gating_tasks,
@@ -178,7 +178,7 @@ const struct action_chain complete_init_action_chain = {
complete_init_event
};
-static const pem_event_action *enable_gfx_clock_gating_event[] = {
+static const pem_event_action * const enable_gfx_clock_gating_event[] = {
enable_gfx_clock_gating_tasks,
NULL
};
@@ -188,7 +188,7 @@ const struct action_chain
enable_gfx_clock_gating_action_chain = {
enable_gfx_clock_gating_event
};
-static const pem_event_action *disable_gfx_clock_gating_event[] = {
+static const pem_event_action * const disable_gfx_clock_gating_event[] = {
disable_gfx_clock_gating_tasks,
NULL
};
@@ -198,7 +198,7 @@ const struct action_chain
disable_gfx_clock_gating_action_chain = {
disable_gfx_clock_gating_event
};
-static const pem_event_action *enable_cgpg_event[] = {
+static const pem_event_action * const enable_cgpg_event[] = {
enable_cgpg_tasks,
NULL
};
@@ -208,7 +208,7 @@ const struct action_chain enable_cgpg_action_chain = {
enable_cgpg_event
};
-static const pem_event_action *disable_cgpg_event[] = {
+static const pem_event_action * const disable_cgpg_event[] = {
disable_cgpg_tasks,
NULL
};
@@ -221,7 +221,7 @@ const struct action_chain disable_cgpg_action_chain = {
/* Enable user _2d performance and activate */
-static const pem_event_action *enable_user_state_event[] = {
+static const pem_event_action *
[PATCH 6/6] drm/amd: make some function-local tables static const
These tables were initialized on stack on each call, avoid that
and save a little bit of text size.
Signed-off-by: Nils Wallménius
---
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/ppevvmath.h | 8
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
index cd639c3..33e47a4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
@@ -141,7 +141,7 @@ out_cleanup:
void amdgpu_benchmark(struct amdgpu_device *adev, int test_number)
{
int i;
- int common_modes[AMDGPU_BENCHMARK_COMMON_MODES_N] = {
+ static const int common_modes[AMDGPU_BENCHMARK_COMMON_MODES_N] = {
640 * 480 * 4,
720 * 480 * 4,
800 * 600 * 4,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
index 119cdc2..60a0c9a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
@@ -439,7 +439,7 @@ static void amdgpu_connector_add_common_modes(struct
drm_encoder *encoder,
struct drm_display_mode *mode = NULL;
struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
int i;
- struct mode_size {
+ static const struct mode_size {
int w;
int h;
} common_modes[17] = {
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppevvmath.h
b/drivers/gpu/drm/amd/powerplay/hwmgr/ppevvmath.h
index b10df32..009bd59 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppevvmath.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppevvmath.h
@@ -127,8 +127,8 @@ fInt fExponential(fInt exponent)/*Can be used to
calculate e^exponent*/
fInt solution = fPositiveOne; /*Starting off with baseline of 1 */
fInt error_term;
- uint32_t k_array[11] = {55452, 27726, 13863, 6931, 4055, 2231, 1178,
606, 308, 155, 78};
- uint32_t expk_array[11] = {256, 16, 4, 2, 15000, 12500,
11250, 10625, 10313, 10156, 10078};
+ static const uint32_t k_array[11] = {55452, 27726, 13863, 6931, 4055,
2231, 1178, 606, 308, 155, 78};
+ static const uint32_t expk_array[11] = {256, 16, 4, 2,
15000, 12500, 11250, 10625, 10313, 10156, 10078};
if (GreaterThan(fZERO, exponent)) {
exponent = fNegate(exponent);
@@ -162,8 +162,8 @@ fInt fNaturalLog(fInt value)
fInt solution = ConvertToFraction(0); /*Starting off with baseline of 0
*/
fInt error_term;
- uint32_t k_array[10] = {16, 4, 2, 15000, 12500, 11250,
10625, 10313, 10156, 10078};
- uint32_t logk_array[10] = {27726, 13863, 6931, 4055, 2231, 1178, 606,
308, 155, 78};
+ static const uint32_t k_array[10] = {16, 4, 2, 15000,
12500, 11250, 10625, 10313, 10156, 10078};
+ static const uint32_t logk_array[10] = {27726, 13863, 6931, 4055, 2231,
1178, 606, 308, 155, 78};
while (GreaterThan(fAdd(value, fNegativeOne), upper_bound)) {
for (i = 0; i < 10; i++) {
--
2.8.0.rc3
[PATCH 5/6] drm/amd/powerplay: mark phm_master_table_* structs as const
Also adjust phm_construct_table to take a const pointer
Signed-off-by: Nils Wallménius
---
.../drm/amd/powerplay/hwmgr/cz_clockpowergating.c| 4 ++--
.../drm/amd/powerplay/hwmgr/cz_clockpowergating.h| 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 20 ++--
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_thermal.c | 8
drivers/gpu/drm/amd/powerplay/hwmgr/functiontables.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_thermal.c | 8
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h| 4 ++--
7 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
index ff08ce4..436fc16 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -237,7 +237,7 @@ int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
}
-static struct phm_master_table_item cz_enable_clock_power_gatings_list[] = {
+static const struct phm_master_table_item cz_enable_clock_power_gatings_list[]
= {
/*we don't need an exit table here, because there is only D3 cold on
Kv*/
{ phm_cf_want_uvd_power_gating, cz_tf_uvd_power_gating_initialize },
{ phm_cf_want_vce_power_gating, cz_tf_vce_power_gating_initialize },
@@ -245,7 +245,7 @@ static struct phm_master_table_item
cz_enable_clock_power_gatings_list[] = {
{ NULL, NULL }
};
-struct phm_master_table_header cz_phm_enable_clock_power_gatings_master = {
+const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master
= {
0,
PHM_MasterTableFlag_None,
cz_enable_clock_power_gatings_list
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
index bbbc057..35e1b36 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h
@@ -28,7 +28,7 @@
#include "pp_asicblocks.h"
extern int cz_phm_set_asic_block_gating(struct pp_hwmgr *hwmgr, enum
PHM_AsicBlock block, enum PHM_ClockGateSetting gating);
-extern struct phm_master_table_header cz_phm_enable_clock_power_gatings_master;
+extern const struct phm_master_table_header
cz_phm_enable_clock_power_gatings_master;
extern struct phm_master_table_header
cz_phm_disable_clock_power_gatings_master;
extern int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);
extern int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 5682490..648394f 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -915,7 +915,7 @@ static int cz_tf_update_low_mem_pstate(struct pp_hwmgr
*hwmgr,
return 0;
}
-static struct phm_master_table_item cz_set_power_state_list[] = {
+static const struct phm_master_table_item cz_set_power_state_list[] = {
{NULL, cz_tf_update_sclk_limit},
{NULL, cz_tf_set_deep_sleep_sclk_threshold},
{NULL, cz_tf_set_watermark_threshold},
@@ -925,13 +925,13 @@ static struct phm_master_table_item
cz_set_power_state_list[] = {
{NULL, NULL}
};
-static struct phm_master_table_header cz_set_power_state_master = {
+static const struct phm_master_table_header cz_set_power_state_master = {
0,
PHM_MasterTableFlag_None,
cz_set_power_state_list
};
-static struct phm_master_table_item cz_setup_asic_list[] = {
+static const struct phm_master_table_item cz_setup_asic_list[] = {
{NULL, cz_tf_reset_active_process_mask},
{NULL, cz_tf_upload_pptable_to_smu},
{NULL, cz_tf_init_sclk_limit},
@@ -943,7 +943,7 @@ static struct phm_master_table_item cz_setup_asic_list[] = {
{NULL, NULL}
};
-static struct phm_master_table_header cz_setup_asic_master = {
+static const struct phm_master_table_header cz_setup_asic_master = {
0,
PHM_MasterTableFlag_None,
cz_setup_asic_list
@@ -984,14 +984,14 @@ static int cz_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
return 0;
}
-static struct phm_master_table_item cz_power_down_asic_list[] = {
+static const struct phm_master_table_item cz_power_down_asic_list[] = {
{NULL, cz_tf_power_up_display_clock_sys_pll},
{NULL, cz_tf_clear_nb_dpm_flag},
{NULL, cz_tf_reset_cc6_data},
{NULL, NULL}
};
-static struct phm_master_table_header cz_power_down_asic_master = {
+static const struct phm_master_table_header cz_power_down_asic_master = {
0,
PHM_MasterTableFlag_None,
cz_power_down_asic_list
@@ -1095,19 +1095,19 @@ static int cz_tf_check_for_dpm_enabled(struct pp_hwmgr
*hwmgr,
return 0;
}
-static struct phm_master_table_item cz_disable_dpm_list[] = {
+static const struct phm_master_ta
[PATCH v3 13/19] drm: sun4i: Add DT bindings documentation
several devices on the > > first channel, because they would share the same timings, and I don't > > really see how it would work out. > > > > > > + > > > > +Endpoints optional property: > > > > + - allwinner,panel: boolean to indicate that the endpoint is a panel > > > > > > This can be determined by the endpoint not being TV Encoder (or HDMI). > > > > It wouldn't really scale if you start to consider the bridges > > too. Then, you would have to duplicate and maintain a list of all the > > bridges supported in Linux and a list of all the panels supported in > > Linux, and try to match that to see if it's a panel, a bridge or an > > element of our pipeline. > > So my concern is that no one else has needed this, so why do you? Based > on the above, you know that a panel is always connected to port 0, > endpoint 0. If it is an external bridge instead, then that can be > determined when the bridge driver is bound. Indeed, I'll try to use the panel and bridge API to retrieve the panel and bridges drivers, and try to derive the information from that instead of this DT property. > > > > +Display Engine Backend > > > > +-- > > > > + > > > > +The display engine backend exposes layers and sprites to the > > > > +system. > > > > + > > > > +Required properties: > > > > + - compatible: value must be one of: > > > > +* allwinner,sun5i-a13-display-backend > > > > + - reg: base address and size of the memory-mapped region. > > > > + - clocks: phandles to the clocks feeding the frontend and backend > > > > +* ahb: the backend interface clock > > > > +* mod: the backend module clock > > > > +* ram: the backend DRAM clock > > > > + - clock-names: the clock names mentioned above > > > > + - resets: phandles to the reset controllers driving the backend > > > > + > > > > +- ports: A ports node with endpoint definitions as defined in > > > > + Documentation/devicetree/bindings/media/video-interfaces.txt. The > > > > + first port should be the input endpoints, the second one the output > > > > + > > > > +Display Engine Frontend > > > > +--- > > > > + > > > > +The display engine frontend does formats conversion, scaling, > > > > +deinterlacing and color space conversion. > > > > + > > > > +Required properties: > > > > + - compatible: value must be one of: > > > > +* allwinner,sun5i-a13-display-frontend > > > > + - reg: base address and size of the memory-mapped region. > > > > + - interrupts: interrupt associated to this IP > > > > + - clocks: phandles to the clocks feeding the frontend and backend > > > > +* ahb: the backend interface clock > > > > +* mod: the backend module clock > > > > +* ram: the backend DRAM clock > > > > + - clock-names: the clock names mentioned above > > > > + - resets: phandles to the reset controllers driving the backend > > > > + > > > > +Display Engine Pipeline > > > > +--- > > > > + > > > > +The display engine pipeline (and its entry point, since it can be > > > > +either directly the backend or the frontend) is represented as an > > > > +extra node. > > > > + > > > > +Required properties: > > > > + - compatible: value must be one of: > > > > +* allwinner,sun5i-a13-display-engine > > > > + - allwinner,pipelines: list of phandle to the entry points of the > > > > +pipelines (either to the frontend or backend) > > > > > > Seems like using FE or BE would be a function of your framebuffers' > > > formats and shouldn't be defined in DT. > > > > Well, they are different IP blocks, so it should be defined in DT, > > shouldn't it? > > They should, but allwinner,sun5i-a13-display-engine is not really an IP > block. Again, what decides if you use the FE or not? I'd say we would always want to use it, but we don't have support for it right now. You can use the backend directly, and this is what we're doing right now. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160410/1c4b675d/attachment.sig>
[PATCH v3 01/19] clk: composite: Add unregister function
Hi Stephen, Mike, On Wed, Mar 23, 2016 at 05:38:24PM +0100, Maxime Ripard wrote: > The composite clock didn't have any unregistration function, which forced > us to use clk_unregister directly on it. > > While it was already not great from an API point of view, it also meant > that we were leaking the clk_composite structure allocated in > clk_register_composite. > > Add a clk_unregister_composite function to fix this. > > Signed-off-by: Maxime Ripard Any comment on this one ? (and the other clock patches) Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160410/9c1e564a/attachment.sig>
[Bug 116101] "RIP radeon_gem_va_ioctl+0x35/0x650", "Userspace still has active objects", and "trying to unbind memory from uninitialized GART !" when unbinding from radeon
https://bugzilla.kernel.org/show_bug.cgi?id=116101 Joe P. changed: What|Removed |Added Summary|"Userspace still has active |"RIP |objects" and "trying to |radeon_gem_va_ioctl+0x35/0x |unbind memory from |650", "Userspace still has |uninitialized GART !" when |active objects", and |unbinding from radeon |"trying to unbind memory ||from uninitialized GART !" ||when unbinding from radeon -- You are receiving this mail because: You are watching the assignee of the bug.
[Bug 93424] [amdgpu] [powerplay] [runpm] Card doesn't re-init when using powerplay and runpm
https://bugs.freedesktop.org/show_bug.cgi?id=93424 Mike Lothian changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #4 from Mike Lothian --- I'm not sure which commit it was - but this is now fixed for me Cheers :D -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160410/a6d497a7/attachment.html>
