[PATCH v13 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

[Daniel Kurtz]

Hi Jitao,

This patch looks really good now.
Just saw small nits below.

Other than these small items, for the series:
Reviewed-by: Daniel Kurtz 

On Thu, Mar 17, 2016 at 9:15 AM, Jitao Shi  wrote:
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi 
> ---
> Changes since v12:
>  - fix hw_chip_id build warning
>
> Changes since v11:
>  - Remove depends on I2C, add DRM depends
>  - Reuse ps8640_write_bytes() in ps8640_write_byte()
>  - Use timer check for polling like the routines in 
>  - Fix no drm_connector_unregister/drm_connector_cleanup when 
> ps8640_bridge_attach fail
>  - Check the ps8640 hardware id in ps8640_validate_firmware
>  - Remove fw_version check
>  - Move ps8640_validate_firmware before ps8640_enter_bl
>  - Add ddc_i2c unregister when probe fail and ps8640_remove
>
> The following patches are needed to support dsi host through none dsi bus:
> https://patchwork.kernel.org/patch/8289181/ ("drm/dsi: check for CONFIG_OF 
> when defining")
> https://patchwork.kernel.org/patch/8289051/ ("drm/dsi: Use 
> mipi_dsi_device_register_full for DSI device")
> https://patchwork.kernel.org/patch/8289081/ ("drm/dsi: Try to match non-DT 
> DSI devices")
> https://patchwork.kernel.org/patch/8289121/ ("drm/dsi: Add routine to 
> unregister a DSI device")
> https://patchwork.kernel.org/patch/8289091/ ("drm/dsi: Get DSI host by DT 
> device node")
> ---
>  drivers/gpu/drm/bridge/Kconfig |   12 +
>  drivers/gpu/drm/bridge/Makefile|1 +
>  drivers/gpu/drm/bridge/parade-ps8640.c | 1073 
> 
>  3 files changed, 1086 insertions(+)
>  create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c
>
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 27e2022..be6084e 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -40,4 +40,16 @@ config DRM_PARADE_PS8622
> ---help---
>   Parade eDP-LVDS bridge chip driver.
>
> +config DRM_PARADE_PS8640
> +   tristate "Parade PS8640 MIPI DSI to eDP Converter"
> +   depends on DRM
> +   depends on OF
> +   select DRM_KMS_HELPER
> +   select DRM_MIPI_DSI
> +   select DRM_PANEL
> +   ---help---
> + Choose this option if you have PS8640 for display
> + The PS8640 is a high-performance and low-power
> + MIPI DSI to eDP converter
> +
>  endmenu
> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> index f13c33d..fbe38dc 100644
> --- a/drivers/gpu/drm/bridge/Makefile
> +++ b/drivers/gpu/drm/bridge/Makefile
> @@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
>  obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
>  obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
>  obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> +obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c 
> b/drivers/gpu/drm/bridge/parade-ps8640.c
> new file mode 100644
> index 000..7bd5c12
> --- /dev/null
> +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> @@ -0,0 +1,1073 @@
> +/*
> + * Copyright (c) 2014 MediaTek Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define PAGE2_SPI_CFG3 0x82
> +#define I2C_TO_SPI_RESET   0x20
> +#define PAGE2_ROMADD_BYTE1 0x8e
> +#define PAGE2_ROMADD_BYTE2 0x8f
> +#define PAGE2_SWSPI_WDATA  0x90
> +#define PAGE2_SWSPI_RDATA  0x91
> +#define PAGE2_SWSPI_LEN0x92
> +#define PAGE2_SWSPI_CTL0x93
> +#define TRIGGER_NO_READBACK0x05
> +#define TRIGGER_READBACK   0x01
> +#define PAGE2_SPI_STATUS   0x9e
> +#define PAGE2_GPIO_L   0xa6
> +#define PAGE2_GPIO_H   0xa7
> +#define PS_GPIO9   BIT(1)
> +#define PAGE2_IROM_CTRL0xb0
> +#define IROM_ENABLE0xc0
> +#define IROM_DISABLE   0x80
> +#define PAGE2_SW_REST  0xbc

Is this supposed to be "PAGE2_SW_RESET"?


> +#define SPI_SW_RESET   BIT(7)
> +#define MPU_SW_RESET   BIT(6)
> +#define PAGE2_ENCTLSPI_WR  0xda
> +#define PAGE2_I2C_BYPASS   0xea
> +#define I2C_BYPASS_EN  0xd0
> +#define PAGE3_SET_ADD  0xfe
> +#define PAGE3_SET_VAL  0xff
> +#define VDO_CTL_ADD0

[PATCH v8 01/17] drm: exynos: dp: convert to drm bridge mode

[Inki Dae]

2015년 10월 28일 17:19에 Yakir Yang 이(가) 쓴 글:
> In order to move exynos dp code to bridge directory,
> we need to convert driver drm bridge mode first. As
> dp driver already have a ptn3460 bridge, so we need
> to move ptn bridge to the next bridge of dp bridge.
> 
> Tested-by: Javier Martinez Canillas 
> Signed-off-by: Yakir Yang 

Acked-by: Inki Dae 

Thanks,
Inki Dae

> ---
> Changes in v8: None
> Changes in v7: None
> Changes in v6:
> - Fix the wrong code in previous series, and test on Samsung snow Chromebook
>   successfully, here are the detail changes:
> =>
> -   if (!dp->panel && !dp->bridge) {
> +   if (!dp->panel && !dp->ptn_bridge) {
> ret = exynos_dp_dt_parse_panel(dp);
> if (ret)
> =>
> +   encoder->bridge = bridge;
>   bridge->driver_private = dp;
> bridge->encoder = encoder;
> bridge->funcs = &exynos_dp_bridge_funcs;
> ret = drm_bridge_attach(drm_dev, bridge);
> 
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Keep author name list no changed (Jingoo)
> 
>  drivers/gpu/drm/exynos/exynos_dp_core.c | 103 
> 
>  drivers/gpu/drm/exynos/exynos_dp_core.h |   1 +
>  2 files changed, 78 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
> b/drivers/gpu/drm/exynos/exynos_dp_core.c
> index 124fb9a..aedd074 100644
> --- a/drivers/gpu/drm/exynos/exynos_dp_core.c
> +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
> @@ -1009,9 +1009,9 @@ static int exynos_drm_attach_lcd_bridge(struct 
> exynos_dp_device *dp,
>  {
>   int ret;
>  
> - encoder->bridge = dp->bridge;
> - dp->bridge->encoder = encoder;
> - ret = drm_bridge_attach(encoder->dev, dp->bridge);
> + encoder->bridge->next = dp->ptn_bridge;
> + dp->ptn_bridge->encoder = encoder;
> + ret = drm_bridge_attach(encoder->dev, dp->ptn_bridge);
>   if (ret) {
>   DRM_ERROR("Failed to attach bridge to drm\n");
>   return ret;
> @@ -1020,14 +1020,15 @@ static int exynos_drm_attach_lcd_bridge(struct 
> exynos_dp_device *dp,
>   return 0;
>  }
>  
> -static int exynos_dp_create_connector(struct drm_encoder *encoder)
> +static int exynos_dp_bridge_attach(struct drm_bridge *bridge)
>  {
> - struct exynos_dp_device *dp = encoder_to_dp(encoder);
> + struct exynos_dp_device *dp = bridge->driver_private;
> + struct drm_encoder *encoder = &dp->encoder;
>   struct drm_connector *connector = &dp->connector;
>   int ret;
>  
>   /* Pre-empt DP connector creation if there's a bridge */
> - if (dp->bridge) {
> + if (dp->ptn_bridge) {
>   ret = exynos_drm_attach_lcd_bridge(dp, encoder);
>   if (!ret)
>   return 0;
> @@ -1052,22 +1053,9 @@ static int exynos_dp_create_connector(struct 
> drm_encoder *encoder)
>   return ret;
>  }
>  
> -static bool exynos_dp_mode_fixup(struct drm_encoder *encoder,
> -  const struct drm_display_mode *mode,
> -  struct drm_display_mode *adjusted_mode)
> -{
> - return true;
> -}
> -
> -static void exynos_dp_mode_set(struct drm_encoder *encoder,
> -struct drm_display_mode *mode,
> -struct drm_display_mode *adjusted_mode)
> -{
> -}
> -
> -static void exynos_dp_enable(struct drm_encoder *encoder)
> +static void exynos_dp_bridge_enable(struct drm_bridge *bridge)
>  {
> - struct exynos_dp_device *dp = encoder_to_dp(encoder);
> + struct exynos_dp_device *dp = bridge->driver_private;
>   struct exynos_drm_crtc *crtc = dp_to_crtc(dp);
>  
>   if (dp->dpms_mode == DRM_MODE_DPMS_ON)
> @@ -1092,9 +1080,9 @@ static void exynos_dp_enable(struct drm_encoder 
> *encoder)
>   dp->dpms_mode = DRM_MODE_DPMS_ON;
>  }
>  
> -static void exynos_dp_disable(struct drm_encoder *encoder)
> +static void exynos_dp_bridge_disable(struct drm_bridge *bridge)
>  {
> - struct exynos_dp_device *dp = encoder_to_dp(encoder);
> + struct exynos_dp_device *dp = bridge->driver_private;
>   struct exynos_drm_crtc *crtc = dp_to_crtc(dp);
>  
>   if (dp->dpms_mode != DRM_MODE_DPMS_ON)
> @@ -1123,6 +,69 @@ static void exynos_dp_disable(struct drm_encoder 
> *encoder)
>   dp->dpms_mode = DRM_MODE_DPMS_OFF;
>  }
>  
> +static void exynos_dp_bridge_nop(struct drm_bridge *bridge)
> +{
> + /* do nothing */
> +}
> +
> +static const struct drm_bridge_funcs exynos_dp_bridge_funcs = {
> + .enable = exynos_dp_bridge_enable,
> + .disable = exynos_dp_bridge_disable,
> + .pre_enable = exynos_dp_bridge_nop,
> + .post_disable = exynos_dp_bridge_nop,
> + .attach = exynos_dp_bridge_attach,
> +};
> +
> +static int exynos_dp_create_connector(struct drm_encoder *encoder)
> +{
> + struct exynos_dp_device *dp = encoder_to_dp(encoder);
> + struct drm_device *drm_dev = dp->

Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Inki Dae]

+ Ajay kumar with Samsung email

Hi,

2016년 03월 23일 07:12에 Heiko Stübner 이(가) 쓴 글:
> Hi,
> 
> Am Dienstag, 22. März 2016, 16:19:37 schrieb Javier Martinez Canillas:
>> On 03/18/2016 07:53 PM, Doug Anderson wrote:
>>> On Thu, Mar 17, 2016 at 11:41 PM, Caesar Wang >> gmail.com> 
> wrote:
>> Same here, this is the second time I tested this series (first time was
>> v6 on October 25 [2]) and I think that has been out there for too long.
>>
>>> Tested-by: Douglas Anderson 
>> Tested-by: Javier Martinez Canillas 
> 
> So we have 3 tests (Doug, Caesar and me) for the Rockchip side as well as 
> Javier for the Exynos side based on the most recent drm state.
> 
> As said by a lot of people it would be cool to get this merged soon - 
> hopefully directly after -rc1. The only remaining question is through which 
> tree it should go.
> 
> I guess there are two basic options:
> - Inki takes the series - we could see the Rockchip-Ack being implied but 
> maybe Mark can provide an explicit one
> - Mark takes the series with an Ack from Inki for the shared parts
> 
> Inki, Mark do you have a preference?

The problem would be that there is no drm bridge maintainer. I think the most 
suitable person as the maintainer would be Ajay Kumar who is an author of drm 
bridge framework.
Of course, I could take them and have pull-request again. But it seems a little 
late. Dave had already pull-request.

To Ajay,
How about adding you as a drm bridge maintainer? DRM SoC driver maintainers 
would need a person who can manage the drm bridge relevant pathes.

Thanks,
Inki Dae

> 
> Thanks
> Heiko
> 
> 

Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Inki Dae]

2016년 03월 23일 07:52에 Heiko Stübner 이(가) 쓴 글:
> Am Mittwoch, 23. März 2016, 07:44:59 schrieb Inki Dae:
>> + Ajay kumar with Samsung email
>>
>> Hi,
>>
>> 2016년 03월 23일 07:12에 Heiko Stübner 이(가) 쓴 글:
>>> Hi,
>>>
>>> Am Dienstag, 22. März 2016, 16:19:37 schrieb Javier Martinez Canillas:
 On 03/18/2016 07:53 PM, Doug Anderson wrote:
> On Thu, Mar 17, 2016 at 11:41 PM, Caesar Wang
> 
>>>
>>> wrote:
 Same here, this is the second time I tested this series (first time was
 v6 on October 25 [2]) and I think that has been out there for too long.

> Tested-by: Douglas Anderson 

 Tested-by: Javier Martinez Canillas 
>>>
>>> So we have 3 tests (Doug, Caesar and me) for the Rockchip side as well as
>>> Javier for the Exynos side based on the most recent drm state.
>>>
>>> As said by a lot of people it would be cool to get this merged soon -
>>> hopefully directly after -rc1. The only remaining question is through
>>> which
>>> tree it should go.
>>>
>>> I guess there are two basic options:
>>> - Inki takes the series - we could see the Rockchip-Ack being implied but
>>> maybe Mark can provide an explicit one
>>> - Mark takes the series with an Ack from Inki for the shared parts
>>>
>>> Inki, Mark do you have a preference?
>>
>> The problem would be that there is no drm bridge maintainer. I think the
>> most suitable person as the maintainer would be Ajay Kumar who is an author
>> of drm bridge framework. Of course, I could take them and have pull-request
>> again. But it seems a little late. Dave had already pull-request.
> 
> I really meant that for 4.7, not for the current merge window. I just want to 
> make sure it goes into a maintainer tree shortly after v4.6-rc1, before 
> something else changes the exynos-dp again :-).
> 
> 
>> To Ajay,
>> How about adding you as a drm bridge maintainer? DRM SoC driver maintainers
>> would need a person who can manage the drm bridge relevant pathes.
> 
> The previous example (dw_hdmi generalization between imx and rockchip) did 
> just go through the imx tree. So either the Samsung or Rockchip drm-trees 
> might be enough?

In this case, someone else may send an email again like you "who is going to 
merge?"
That would be why we need a maintainer.

drm panel is already managed well by Thierry Reding without such confusion. 

Thanks,
Inki Dae

> 
> 
> Heiko
> 
> 

Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Inki Dae]

2016년 03월 23일 08:39에 Russell King - ARM Linux 이(가) 쓴 글:
> On Wed, Mar 23, 2016 at 08:09:33AM +0900, Inki Dae wrote:
>> In this case, someone else may send an email again like you "who is going to 
>> merge?"
>> That would be why we need a maintainer.
>>
>> drm panel is already managed well by Thierry Reding without such confusion. 
> 
> You don't need a maintainer for every subdirectory just because it's
> a subdirectory...
> 
> Sometimes, having too many maintainers adds beaurocracy which becomes

Yes, but... if there is no someone who is responsible for maintainership, then 
we would receive such emails like Heiko sent "who is going to merge" 
I don't also want adding many maintainers unnecessary but drm bridge - although 
the framework is a thin and small - is used *over the ARM SoC* so that many 
confusions may happen for upstream.

So although it's small framework or just subdirectory, we would need someone 
who can manage the framework to avoid further confusion if necessary.

Thanks,
Inki Dae

> counter-productive.  dw_hdmi seems to be adequately managed so far
> without there needing to be a "DRM bridge maintainer".
> 

Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Russell King - ARM Linux]

On Wed, Mar 23, 2016 at 08:54:15AM +0900, Inki Dae wrote:
> 

Please wrap your long lines.

> 
> 2016년 03월 23일 08:39에 Russell King - ARM Linux 이(가) 쓴 글:
> > On Wed, Mar 23, 2016 at 08:09:33AM +0900, Inki Dae wrote:
> >> In this case, someone else may send an email again like you "who is going 
> >> to merge?"
> >> That would be why we need a maintainer.
> >>
> >> drm panel is already managed well by Thierry Reding without such 
> >> confusion. 
> > 
> > You don't need a maintainer for every subdirectory just because it's
> > a subdirectory...
> > 
> > Sometimes, having too many maintainers adds beaurocracy which becomes
> 
> Yes, but... if there is no someone who is responsible for maintainership,
> then we would receive such emails like Heiko sent "who is going to merge" 
> I don't also want adding many maintainers unnecessary but drm bridge -
> although the framework is a thin and small - is used *over the ARM SoC*
> so that many confusions may happen for upstream.

Just because someone asks doesn't mean someone needs to be appointed.
Maybe the question that should be asked instead is whether the original
author is willing to maintain their driver.

> So although it's small framework or just subdirectory, we would need
> someone who can manage the framework to avoid further confusion if
> necessary.

So maybe it just doesn't need a maintainer, and maybe those the owner
of the bridge driver should be responsible for choosing the tree which
it's merged through along with updates.  That's how dw-hdmi has been
managed on the whole.

It also means that the bridge driver maintainer is able to test changes
to the bridge driver, rather than having some over-arching bridge
subdirectory maintainer who doesn't have a clue whether the changes
work on the hardware.

IMHO, having bridge driver authors/maintainers look after their own
code has many advantages.

-- 
RMK's Patch system: http://www.arm.linux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

[PATCH] gma500: fix missing comma in dsi_errors array initializer

[One Thousand Gnomes]

On Tue, 22 Mar 2016 16:40:18 -0700
Joe Perches  wrote:

> On Tue, 2016-03-22 at 22:49 +, Colin King wrote:
> > From: Colin Ian King 
> > 
> > There is a missing comma between two strings in the dsi_errors[]
> > array initializer, causing two strings to be concatenated and the
> > array being incorrectly initialized.  Add in the missing comma.

I sent that a while ago, and there's also a patch to remove bogus code
from mdfld_dsi_dpi.c outstanding somewhere


Alan

[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

Michel D�nzer  changed:

   What|Removed |Added

 Attachment #122488|text/plain  |image/png
  mime type||

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[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

--- Comment #1 from Michel D�nzer  ---
Please attach the Xorg log and the stderr output of "LIBGL_DEBUG=verbose
DRI_PRIME=1 glxinfo".

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[PATCH 1/2] amdgpu: create only one IB for "all compute queues" tests

[Michel Dänzer]

On 18.03.2016 15:03, Michel Dänzer wrote:
> On 16.03.2016 21:56, Christian König wrote:
>> Can somebody with commit access push those two patches after the review?
>> I don't have write permission for libdrm.
> 
> Well, that should clearly get fixed. Daniel, can you add him, or who
> should we ask for this?

Daniel said on IRC that the libdrm repository uses the same group as the
Mesa one. Christian, what exactly is the problem when you try pushing to
the libdrm repository?


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer

[PATCH] Fix the drm AGP detection error message issue.

[HuangRan]

limit the AGP detect condition to VIA chips using DMA engine name before 
Chrome9 to avoid drm error message "[drm:via_driver_load [via]] *ERROR* Failed 
acquiring AGP device.". Verify this on old H1/H2 chip and VX800/VX900 chips.
---
 drivers/gpu/drm/via/via_drv.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index aee3a0c..f4562d8 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -349,7 +349,7 @@ via_driver_load(struct drm_device *dev, unsigned long 
chipset)
chip_revision_info(dev);

 #if __OS_HAS_AGP
-   if ((dev_priv->engine_type > VIA_ENG_H2) ||
+   if ((dev_priv->engine_type <= VIA_ENG_H2) ||
(dev->agp && drm_pci_device_is_agp(dev))) {
ret = via_detect_agp(dev);
if (!ret)
-- 
1.7.9.5

[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

--- Comment #2 from Michel D�nzer  ---
Is this a duplicate of bug 94581?

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Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Dave Airlie]

>
>> So although it's small framework or just subdirectory, we would need
>> someone who can manage the framework to avoid further confusion if
>> necessary.
>
> So maybe it just doesn't need a maintainer, and maybe those the owner
> of the bridge driver should be responsible for choosing the tree which
> it's merged through along with updates.  That's how dw-hdmi has been
> managed on the whole.
>
> It also means that the bridge driver maintainer is able to test changes
> to the bridge driver, rather than having some over-arching bridge
> subdirectory maintainer who doesn't have a clue whether the changes
> work on the hardware.
>
> IMHO, having bridge driver authors/maintainers look after their own
> code has many advantages.

The author just send me a pull request with acks from a git tree
that hopefully both people agreed and tested from. No need to
send this via another maintainer layer.

Dave.

[PATCH v14 09/17] drm: rockchip: dp: add rockchip platform dp driver

[Mark yao]

On 2016年02月15日 19:10, Yakir Yang wrote:
> Rockchip have three clocks for dp controller, we leave pclk_edp
> to analogix_dp driver control, and keep the sclk_edp_24m and
> sclk_edp in platform driver.
>
> Signed-off-by: Yakir Yang
> Tested-by: Javier Martinez Canillas

It looks good for me, I like it, So

Acked-by: Mark Yao 

-- 
ï¼­ark Yao

Who is going to merge it [Was: Re: [PATCH v14 0/17] Add Analogix Core Display Port Driver]

[Mark yao]

On 2016年03月23日 08:41, Dave Airlie wrote:
>>> So although it's small framework or just subdirectory, we would need
>>> someone who can manage the framework to avoid further confusion if
>>> necessary.
>> So maybe it just doesn't need a maintainer, and maybe those the owner
>> of the bridge driver should be responsible for choosing the tree which
>> it's merged through along with updates.  That's how dw-hdmi has been
>> managed on the whole.
>>
>> It also means that the bridge driver maintainer is able to test changes
>> to the bridge driver, rather than having some over-arching bridge
>> subdirectory maintainer who doesn't have a clue whether the changes
>> work on the hardware.
>>
>> IMHO, having bridge driver authors/maintainers look after their own
>> code has many advantages.
> The author just send me a pull request with acks from a git tree
> that hopefully both people agreed and tested from. No need to
> send this via another maintainer layer.
>
> Dave.
>
>
>

Sure, these patches looks cool, I think it's ready to be merged, I'd 
like to give a Acked-by on rockchip side.

-- 
ï¼­ark Yao

[PATCH v5 1/5] drm: add generic zpos property

[Benjamin Gaignard]

Hello Marek, Ville,

How can we progress in this ? and how can I help you to get this
generic zpos property merge into drm ?

Regards,
Benjamin

2016-02-29 16:12 GMT+01:00 Ville Syrjälä :
> On Wed, Jan 27, 2016 at 03:44:39PM +0100, Marek Szyprowski wrote:
>> This patch adds support for generic plane's zpos property property with
>> well-defined semantics:
>> - added zpos properties to drm core and plane state structures
>> - added helpers for normalizing zpos properties of given set of planes
>> - well defined semantics: planes are sorted by zpos values and then plane
>>   id value if zpos equals
>>
>> Normalized zpos values are calculated automatically when generic
>> muttable zpos property has been initialized. Drivers can simply use
>> plane_state->normalized_zpos in their atomic_check and/or plane_update
>> callbacks without any additional calls to DRM core.
>>
>> Signed-off-by: Marek Szyprowski 
>> Tested-by: Benjamin Gaignard 
>> ---
>>  Documentation/DocBook/gpu.tmpl  |  14 ++-
>>  drivers/gpu/drm/Makefile|   2 +-
>>  drivers/gpu/drm/drm_atomic.c|   4 +
>>  drivers/gpu/drm/drm_atomic_helper.c |   6 +
>>  drivers/gpu/drm/drm_blend.c | 227 
>> 
>>  drivers/gpu/drm/drm_crtc_internal.h |   3 +
>>  include/drm/drm_crtc.h  |  17 +++
>>  7 files changed, 270 insertions(+), 3 deletions(-)
>>  create mode 100644 drivers/gpu/drm/drm_blend.c
>>
>> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
>> index a8669330b456..ae7d913adf60 100644
>> --- a/Documentation/DocBook/gpu.tmpl
>> +++ b/Documentation/DocBook/gpu.tmpl
>> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>>   Description/Restrictions
>>   
>>   
>> - DRM
>> + DRM
>>   Generic
>>   “rotation”
>>   BITMASK
>> @@ -2068,7 +2068,7 @@ void intel_crt_init(struct drm_device *dev)
>>   property to suggest an Y offset for a connector
>>   
>>   
>> - Optional
>> + Optional
>>   “scaling mode”
>>   ENUM
>>   { "None", "Full", "Center", "Full aspect" }
>> @@ -2092,6 +2092,16 @@ void intel_crt_init(struct drm_device *dev)
>>   TBD
>>   
>>   
>> +  "zpos" 
>> + RANGE
>> + Min=0, Max= driver dependent
>> + Plane
>> + Plane's 'z' position during blending operation (0 
>> for background, highest for frontmost).
>> + If two planes assigned to same CRTC have equal zpos values, 
>> the plane with higher plane
>> + id is treated as closer to front. Can be IMMUTABLE if driver 
>> doesn't support changing
>> + planes' order. Exact value range is driver dependent.
>> + 
>> + 
>>   i915
>>   Generic
>>   "Broadcast RGB"
>> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
>> index 61766dec6a8d..eeefaba1c092 100644
>> --- a/drivers/gpu/drm/Makefile
>> +++ b/drivers/gpu/drm/Makefile
>> @@ -2,7 +2,7 @@
>>  # Makefile for the drm device driver.  This driver provides support for the
>>  # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
>>
>> -drm-y   :=   drm_auth.o drm_bufs.o drm_cache.o \
>> +drm-y   :=   drm_auth.o drm_bufs.o drm_blend.o drm_cache.o \
>>   drm_context.o drm_dma.o \
>>   drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
>>   drm_lock.o drm_memory.o drm_drv.o drm_vm.o \
>> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
>> index 3f74193885f1..a19201efb7d1 100644
>> --- a/drivers/gpu/drm/drm_atomic.c
>> +++ b/drivers/gpu/drm/drm_atomic.c
>> @@ -630,6 +630,8 @@ int drm_atomic_plane_set_property(struct drm_plane 
>> *plane,
>>   state->src_h = val;
>>   } else if (property == config->rotation_property) {
>>   state->rotation = val;
>> + } else if (property == config->zpos_property) {
>> + state->zpos = val;
>>   } else if (plane->funcs->atomic_set_property) {
>>   return plane->funcs->atomic_set_property(plane, state,
>>   property, val);
>> @@ -686,6 +688,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>>   *val = state->src_h;
>>   } else if (property == config->rotation_property) {
>>   *val = state->rotation;
>> + } else if (property == config->zpos_property) {
>> + *val = state->zpos;
>>   } else if (plane->funcs->atomic_get_property) {
>>   return plane->funcs->atomic_get_property(plane, state, 
>> property, val);
>>   } else {
>> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
>> b/drivers/gpu/drm/drm_atomic_helper.c
>> index 53db2d9120be..9fbfb672b317 100644
>> --- a/drivers/gpu/drm/drm_atomic_helper.c
>> +++ b/drivers/gpu/drm/drm_atomic_helper.c
>> @@ -32,6 +32,8 @@
>>  #include 
>>  #include 
>>
>> +#include "drm_crtc_internal.h"
>> +
>>  /**
>>   * DOC: overview
>>   *
>> @@ -530,6 +532,10 @@ drm_atomi

[PATCH 1/4 v3] drm: Rename drm_connector_unplug_all() to drm_connector_unregister_all()

[Boris Brezillon]

On Wed, 23 Mar 2016 11:42:54 +0300
Alexey Brodkin  wrote:

> Current name is a bit misleading because what that helper function
> really does it calls drm_connector_unregister() for all connectors.
> 
> This all has nothing to do with hotplugging so let's name things
> properly.
> 
> And while at it remove potentially dangerous locking around
> drm_connector_unregister() in rcar_du_remove() as mentioned
> in kerneldoc for drm_connector_unregister_all().
> 
> Signed-off-by: Alexey Brodkin 
> Cc: Daniel Vetter 
> Cc: David Airlie 
> Cc: Boris Brezillon 

Acked-by: Boris Brezillon 

> Cc: linux-renesas-soc at vger.kernel.org
> Acked-by: Laurent Pinchart 
> ---
> 
> Changes v2 -> v3:
>  * Updated title with capital after colon
>  * Updated kerneldoc description of drm_connector_unregister_all()
>so that it will match description of register_all() to be introduced
>in the next change
>  * Added ack from Laurent
> 
> Changes v1 -> v2:
>  * This patch was only introduced in v2.
> 
>  drivers/gpu/drm/drm_crtc.c| 18 +-
>  drivers/gpu/drm/rcar-du/rcar_du_drv.c |  5 +
>  drivers/gpu/drm/udl/udl_drv.c |  2 +-
>  include/drm/drm_crtc.h|  4 ++--
>  4 files changed, 13 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index 65258ac..65488a6 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1080,25 +1080,25 @@ void drm_connector_unregister(struct drm_connector 
> *connector)
>  }
>  EXPORT_SYMBOL(drm_connector_unregister);
>  
> -
>  /**
> - * drm_connector_unplug_all - unregister connector userspace interfaces
> + * drm_connector_unregister_all - unregister connector userspace interfaces
>   * @dev: drm device
>   *
> - * This function unregisters all connector userspace interfaces in sysfs. 
> Should
> - * be call when the device is disconnected, e.g. from an usb driver's
> - * ->disconnect callback.
> + * This functions unregisters all connectors from sysfs and other places so
> + * that userspace can no longer access them. Drivers should call this as the
> + * first step tearing down the device instace, or when the underlying
> + * physical device disappeared (e.g. USB unplug), right before calling
> + * drm_dev_unregister().
>   */
> -void drm_connector_unplug_all(struct drm_device *dev)
> +void drm_connector_unregister_all(struct drm_device *dev)
>  {
>   struct drm_connector *connector;
>  
>   /* FIXME: taking the mode config mutex ends up in a clash with sysfs */
> - list_for_each_entry(connector, &dev->mode_config.connector_list, head)
> + drm_for_each_connector(connector, dev)
>   drm_connector_unregister(connector);
> -
>  }
> -EXPORT_SYMBOL(drm_connector_unplug_all);
> +EXPORT_SYMBOL(drm_connector_unregister_all);
>  
>  /**
>   * drm_encoder_init - Init a preallocated encoder
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
> b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> index ed6006b..644db36 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> @@ -278,10 +278,7 @@ static int rcar_du_remove(struct platform_device *pdev)
>   struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
>   struct drm_device *ddev = rcdu->ddev;
>  
> - mutex_lock(&ddev->mode_config.mutex);
> - drm_connector_unplug_all(ddev);
> - mutex_unlock(&ddev->mode_config.mutex);
> -
> + drm_connector_unregister_all(ddev);
>   drm_dev_unregister(ddev);
>  
>   if (rcdu->fbdev)
> diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
> index 772ec9e..c204089 100644
> --- a/drivers/gpu/drm/udl/udl_drv.c
> +++ b/drivers/gpu/drm/udl/udl_drv.c
> @@ -94,7 +94,7 @@ static void udl_usb_disconnect(struct usb_interface 
> *interface)
>   struct drm_device *dev = usb_get_intfdata(interface);
>  
>   drm_kms_helper_poll_disable(dev);
> - drm_connector_unplug_all(dev);
> + drm_connector_unregister_all(dev);
>   udl_fbdev_unplug(dev);
>   udl_drop_usb(dev);
>   drm_unplug_dev(dev);
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 8c7fb3d..42d9f4d 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -2214,8 +2214,8 @@ void drm_connector_unregister(struct drm_connector 
> *connector);
>  
>  extern void drm_connector_cleanup(struct drm_connector *connector);
>  extern unsigned int drm_connector_index(struct drm_connector *connector);
> -/* helper to unplug all connectors from sysfs for device */
> -extern void drm_connector_unplug_all(struct drm_device *dev);
> +/* helper to unregister all connectors from sysfs for device */
> +extern void drm_connector_unregister_all(struct drm_device *dev);
>  
>  extern int drm_bridge_add(struct drm_bridge *bridge);
>  extern void drm_bridge_remove(struct drm_bridge *bridge);



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.

[PATCH 0/4 v3] drm: Introduce drm_connector_register_all() helper

[Alexey Brodkin]

As a pair to already existing drm_connector_unplug_all()
(which we'll rename in this series to drm_connector_unregister_all())
we're adding generic implementation of what is already done in some drivers
for registering all connectors.

After implementation of that new helper we're updating 2 drivers
that used to use it's own implementation:
 [1] atmel_hlcdc
 [2] rcar_du

And one driver that uses unregister():
 [1] udl

Other drivers still use load() callback and so should be first modified so
their load() gets called from their probe() explicitly.

Build- and run-tested on yet to be upstreamed ARC PGU (part of AXS10x board).

Changes v2 -> v3:
 * Added acks for 1, 3 and 4 patches
 * Updated kerneldoc descriptins of both register_ and unregister_all()
 * Updated commit messages (mostly spellos and grammar issues)

Changes v1 -> v2:
 * Rename drm_connector_unplug_all() to drm_connector_unregister_all()
 * Use drm_for_each_connector() instead of list_for_each_entry()
 * Updated kerneldoc for drm_dev_register()

Alexey Brodkin (4):
  drm: Rename drm_connector_unplug_all() to
drm_connector_unregister_all()
  drm: Introduce drm_connector_register_all() helper
  drm: atmel_hldc: Use generic drm_connector_register_all() helper
  drm: rcar-du: Use generic drm_connector_register_all() helper

 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 39 +-
 drivers/gpu/drm/drm_crtc.c   | 59 
 drivers/gpu/drm/drm_drv.c|  6 ++-
 drivers/gpu/drm/rcar-du/rcar_du_drv.c| 14 +--
 drivers/gpu/drm/udl/udl_drv.c|  2 +-
 include/drm/drm_crtc.h   |  5 ++-
 6 files changed, 64 insertions(+), 61 deletions(-)

Cc: Daniel Vetter 
Cc: David Airlie 
Cc: Boris Brezillon 
Cc: Laurent Pinchart 
Cc: linux-renesas-soc at vger.kernel.org
-- 
2.5.0

[PATCH 2/4 v3] drm: Introduce drm_connector_register_all() helper

[Alexey Brodkin]

As a pair to already existing drm_connector_unregister_all() we're adding
generic implementation of what is already done in some drivers.

Once this helper is implemented we'll be ready to switch existing
driver-specific implementations with the generic one.

Signed-off-by: Alexey Brodkin 
Cc: Daniel Vetter 
Cc: David Airlie 
---

Changes v2 -> v3:
 * Updated title with capital after colon
 * Simplified failure path with direct and unconditional invocation of
   unregister_all()
 * Updated kerneldoc description of the drm_connector_register_all()

Changes v1 -> v2:
 * Rename drm_connector_unplug_all() to drm_connector_unregister_all()
 * Use drm_for_each_connector() instead of list_for_each_entry()
 * Updated kerneldoc for drm_dev_register()

 drivers/gpu/drm/drm_crtc.c | 43 +++
 drivers/gpu/drm/drm_drv.c  |  6 +-
 include/drm/drm_crtc.h |  3 ++-
 3 files changed, 50 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 65488a6..21eea11 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1081,6 +1081,49 @@ void drm_connector_unregister(struct drm_connector 
*connector)
 EXPORT_SYMBOL(drm_connector_unregister);

 /**
+ * drm_connector_register_all - register all connectors
+ * @dev: drm device
+ *
+ * This function registers all connectors in sysfs and other places so that
+ * userspace can start to access them. Drivers can call it after calling
+ * drm_dev_register() to complete the device registration, if they don't call
+ * drm_connector_register() on each connector individually.
+ *
+ * When a device is unplugged and should be removed from userspace access,
+ * call drm_connector_unregister_all(), which is the inverse of this
+ * function.
+ *
+ * Returns:
+ * Zero on success, error code on failure.
+ */
+int drm_connector_register_all(struct drm_device *dev)
+{
+   struct drm_connector *connector;
+   int ret;
+
+   mutex_lock(&dev->mode_config.mutex);
+
+   drm_for_each_connector(connector, dev) {
+   ret = drm_connector_register(connector);
+   if (ret) {
+   /*
+* We may safely call unregister_all() here within
+* area locked with mutex because unregister_all()
+* doesn't use locks inside (see a comment in that
+* function).
+*/
+   drm_connector_unregister_all(dev);
+   return ret;
+   }
+   }
+
+   mutex_unlock(&dev->mode_config.mutex);
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_connector_register_all);
+
+/**
  * drm_connector_unregister_all - unregister connector userspace interfaces
  * @dev: drm device
  *
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 167c8d3..2c9a2b6 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -715,7 +715,11 @@ EXPORT_SYMBOL(drm_dev_unref);
  *
  * Register the DRM device @dev with the system, advertise device to user-space
  * and start normal device operation. @dev must be allocated via 
drm_dev_alloc()
- * previously.
+ * previously. Right after drm_dev_register() the driver should call
+ * drm_connector_register_all() to register all connectors in sysfs. This is
+ * a separate call for backward compatibility with drivers still using
+ * the deprecated ->load() callback, where connectors are registered from 
within
+ * the ->load() callback.
  *
  * Never call this twice on any device!
  *
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 42d9f4d..6a34117 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -2214,7 +2214,8 @@ void drm_connector_unregister(struct drm_connector 
*connector);

 extern void drm_connector_cleanup(struct drm_connector *connector);
 extern unsigned int drm_connector_index(struct drm_connector *connector);
-/* helper to unregister all connectors from sysfs for device */
+/* helpers to {un}register all connectors from sysfs for device */
+extern int drm_connector_register_all(struct drm_device *dev);
 extern void drm_connector_unregister_all(struct drm_device *dev);

 extern int drm_bridge_add(struct drm_bridge *bridge);
-- 
2.5.0

[PATCH 3/4 v3] drm: atmel_hldc: Use generic drm_connector_register_all() helper

[Alexey Brodkin]

This driver used to have its own implementation of connector_register_all()
which actually was taken as a prototype of drm_connector_register_all().

Now when drm_connector_register_all() exists reusing it here.

And while at it replace atmel_hlcdc_dc_connector_unplug_all()
with generic drm_connector_unregister_all().

Signed-off-by: Alexey Brodkin 
Cc: Daniel Vetter 
Cc: David Airlie 
Acked-by: Boris Brezillon 
---

Changes v2 -> v3:
 * Updated title with capital after colon
 * Added ack from Boris

No changes v1 -> v2.

 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 39 ++--
 1 file changed, 2 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 3d8d164..1c537e4 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -584,41 +584,6 @@ static void atmel_hlcdc_dc_unload(struct drm_device *dev)
destroy_workqueue(dc->wq);
 }

-static int atmel_hlcdc_dc_connector_plug_all(struct drm_device *dev)
-{
-   struct drm_connector *connector, *failed;
-   int ret;
-
-   mutex_lock(&dev->mode_config.mutex);
-   list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-   ret = drm_connector_register(connector);
-   if (ret) {
-   failed = connector;
-   goto err;
-   }
-   }
-   mutex_unlock(&dev->mode_config.mutex);
-   return 0;
-
-err:
-   list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-   if (failed == connector)
-   break;
-
-   drm_connector_unregister(connector);
-   }
-   mutex_unlock(&dev->mode_config.mutex);
-
-   return ret;
-}
-
-static void atmel_hlcdc_dc_connector_unplug_all(struct drm_device *dev)
-{
-   mutex_lock(&dev->mode_config.mutex);
-   drm_connector_unplug_all(dev);
-   mutex_unlock(&dev->mode_config.mutex);
-}
-
 static void atmel_hlcdc_dc_lastclose(struct drm_device *dev)
 {
struct atmel_hlcdc_dc *dc = dev->dev_private;
@@ -736,7 +701,7 @@ static int atmel_hlcdc_dc_drm_probe(struct platform_device 
*pdev)
if (ret)
goto err_unload;

-   ret = atmel_hlcdc_dc_connector_plug_all(ddev);
+   ret = drm_connector_register_all(ddev);
if (ret)
goto err_unregister;

@@ -758,7 +723,7 @@ static int atmel_hlcdc_dc_drm_remove(struct platform_device 
*pdev)
 {
struct drm_device *ddev = platform_get_drvdata(pdev);

-   atmel_hlcdc_dc_connector_unplug_all(ddev);
+   drm_connector_unregister_all(ddev);
drm_dev_unregister(ddev);
atmel_hlcdc_dc_unload(ddev);
drm_dev_unref(ddev);
-- 
2.5.0

[PATCH 1/4 v3] drm: Rename drm_connector_unplug_all() to drm_connector_unregister_all()

[Alexey Brodkin]

Current name is a bit misleading because what that helper function
really does it calls drm_connector_unregister() for all connectors.

This all has nothing to do with hotplugging so let's name things
properly.

And while at it remove potentially dangerous locking around
drm_connector_unregister() in rcar_du_remove() as mentioned
in kerneldoc for drm_connector_unregister_all().

Signed-off-by: Alexey Brodkin 
Cc: Daniel Vetter 
Cc: David Airlie 
Cc: Boris Brezillon 
Cc: linux-renesas-soc at vger.kernel.org
Acked-by: Laurent Pinchart 
---

Changes v2 -> v3:
 * Updated title with capital after colon
 * Updated kerneldoc description of drm_connector_unregister_all()
   so that it will match description of register_all() to be introduced
   in the next change
 * Added ack from Laurent

Changes v1 -> v2:
 * This patch was only introduced in v2.

 drivers/gpu/drm/drm_crtc.c| 18 +-
 drivers/gpu/drm/rcar-du/rcar_du_drv.c |  5 +
 drivers/gpu/drm/udl/udl_drv.c |  2 +-
 include/drm/drm_crtc.h|  4 ++--
 4 files changed, 13 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 65258ac..65488a6 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1080,25 +1080,25 @@ void drm_connector_unregister(struct drm_connector 
*connector)
 }
 EXPORT_SYMBOL(drm_connector_unregister);

-
 /**
- * drm_connector_unplug_all - unregister connector userspace interfaces
+ * drm_connector_unregister_all - unregister connector userspace interfaces
  * @dev: drm device
  *
- * This function unregisters all connector userspace interfaces in sysfs. 
Should
- * be call when the device is disconnected, e.g. from an usb driver's
- * ->disconnect callback.
+ * This functions unregisters all connectors from sysfs and other places so
+ * that userspace can no longer access them. Drivers should call this as the
+ * first step tearing down the device instace, or when the underlying
+ * physical device disappeared (e.g. USB unplug), right before calling
+ * drm_dev_unregister().
  */
-void drm_connector_unplug_all(struct drm_device *dev)
+void drm_connector_unregister_all(struct drm_device *dev)
 {
struct drm_connector *connector;

/* FIXME: taking the mode config mutex ends up in a clash with sysfs */
-   list_for_each_entry(connector, &dev->mode_config.connector_list, head)
+   drm_for_each_connector(connector, dev)
drm_connector_unregister(connector);
-
 }
-EXPORT_SYMBOL(drm_connector_unplug_all);
+EXPORT_SYMBOL(drm_connector_unregister_all);

 /**
  * drm_encoder_init - Init a preallocated encoder
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index ed6006b..644db36 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -278,10 +278,7 @@ static int rcar_du_remove(struct platform_device *pdev)
struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
struct drm_device *ddev = rcdu->ddev;

-   mutex_lock(&ddev->mode_config.mutex);
-   drm_connector_unplug_all(ddev);
-   mutex_unlock(&ddev->mode_config.mutex);
-
+   drm_connector_unregister_all(ddev);
drm_dev_unregister(ddev);

if (rcdu->fbdev)
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
index 772ec9e..c204089 100644
--- a/drivers/gpu/drm/udl/udl_drv.c
+++ b/drivers/gpu/drm/udl/udl_drv.c
@@ -94,7 +94,7 @@ static void udl_usb_disconnect(struct usb_interface 
*interface)
struct drm_device *dev = usb_get_intfdata(interface);

drm_kms_helper_poll_disable(dev);
-   drm_connector_unplug_all(dev);
+   drm_connector_unregister_all(dev);
udl_fbdev_unplug(dev);
udl_drop_usb(dev);
drm_unplug_dev(dev);
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 8c7fb3d..42d9f4d 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -2214,8 +2214,8 @@ void drm_connector_unregister(struct drm_connector 
*connector);

 extern void drm_connector_cleanup(struct drm_connector *connector);
 extern unsigned int drm_connector_index(struct drm_connector *connector);
-/* helper to unplug all connectors from sysfs for device */
-extern void drm_connector_unplug_all(struct drm_device *dev);
+/* helper to unregister all connectors from sysfs for device */
+extern void drm_connector_unregister_all(struct drm_device *dev);

 extern int drm_bridge_add(struct drm_bridge *bridge);
 extern void drm_bridge_remove(struct drm_bridge *bridge);
-- 
2.5.0

[PATCH v2 13/18] mm/compaction: support non-lru movable page migration

[Joonsoo Kim]

On Tue, Mar 22, 2016 at 11:55:45PM +0900, Minchan Kim wrote:
> On Tue, Mar 22, 2016 at 02:50:37PM +0900, Joonsoo Kim wrote:
> > On Mon, Mar 21, 2016 at 03:31:02PM +0900, Minchan Kim wrote:
> > > We have allowed migration for only LRU pages until now and it was
> > > enough to make high-order pages. But recently, embedded system(e.g.,
> > > webOS, android) uses lots of non-movable pages(e.g., zram, GPU memory)
> > > so we have seen several reports about troubles of small high-order
> > > allocation. For fixing the problem, there were several efforts
> > > (e,g,. enhance compaction algorithm, SLUB fallback to 0-order page,
> > > reserved memory, vmalloc and so on) but if there are lots of
> > > non-movable pages in system, their solutions are void in the long run.
> > > 
> > > So, this patch is to support facility to change non-movable pages
> > > with movable. For the feature, this patch introduces functions related
> > > to migration to address_space_operations as well as some page flags.
> > > 
> > > Basically, this patch supports two page-flags and two functions related
> > > to page migration. The flag and page->mapping stability are protected
> > > by PG_lock.
> > > 
> > >   PG_movable
> > >   PG_isolated
> > > 
> > >   bool (*isolate_page) (struct page *, isolate_mode_t);
> > >   void (*putback_page) (struct page *);
> > > 
> > > Duty of subsystem want to make their pages as migratable are
> > > as follows:
> > > 
> > > 1. It should register address_space to page->mapping then mark
> > > the page as PG_movable via __SetPageMovable.
> > > 
> > > 2. It should mark the page as PG_isolated via SetPageIsolated
> > > if isolation is sucessful and return true.
> > > 
> > > 3. If migration is successful, it should clear PG_isolated and
> > > PG_movable of the page for free preparation then release the
> > > reference of the page to free.
> > > 
> > > 4. If migration fails, putback function of subsystem should
> > > clear PG_isolated via ClearPageIsolated.
> > 
> > I think that this feature needs a separate document to describe
> > requirement of each step in more detail. For example, #1 can be
> > possible without holding a lock? I'm not sure because you lock
> > the page when implementing zsmalloc page migration in 15th patch.
> 
> Yes, we needs PG_lock because install page->mapping and PG_movable
> should be atomic and PG_lock protects it.
> 
> Better interface might be
> 
> void __SetPageMovable(struct page *page, sruct address_space *mapping);
> 
> > 
> > #3 also need more explanation. Before release, we need to
> > unregister address_space. I guess that it needs to be done
> > in migratepage() but there is no explanation.
> 
> Okay, we can unregister address_space in __ClearPageMovable.
> I will change it.
> 
> > 
> > > 
> > > Cc: Vlastimil Babka 
> > > Cc: Mel Gorman 
> > > Cc: Hugh Dickins 
> > > Cc: dri-devel at lists.freedesktop.org
> > > Cc: virtualization at lists.linux-foundation.org
> > > Signed-off-by: Gioh Kim 
> > > Signed-off-by: Minchan Kim 
> > > ---
> > >  Documentation/filesystems/Locking  |   4 +
> > >  Documentation/filesystems/vfs.txt  |   5 ++
> > >  fs/proc/page.c |   3 +
> > >  include/linux/fs.h |   2 +
> > >  include/linux/migrate.h|   2 +
> > >  include/linux/page-flags.h |  29 
> > >  include/uapi/linux/kernel-page-flags.h |   1 +
> > >  mm/compaction.c|  14 +++-
> > >  mm/migrate.c   | 132 
> > > +
> > >  9 files changed, 177 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/Documentation/filesystems/Locking 
> > > b/Documentation/filesystems/Locking
> > > index 619af9bfdcb3..0bb79560abb3 100644
> > > --- a/Documentation/filesystems/Locking
> > > +++ b/Documentation/filesystems/Locking
> > > @@ -195,7 +195,9 @@ unlocks and drops the reference.
> > >   int (*releasepage) (struct page *, int);
> > >   void (*freepage)(struct page *);
> > >   int (*direct_IO)(struct kiocb *, struct iov_iter *iter, loff_t offset);
> > > + bool (*isolate_page) (struct page *, isolate_mode_t);
> > >   int (*migratepage)(struct address_space *, struct page *, struct page 
> > > *);
> > > + void (*putback_page) (struct page *);
> > >   int (*launder_page)(struct page *);
> > >   int (*is_partially_uptodate)(struct page *, unsigned long, unsigned 
> > > long);
> > >   int (*error_remove_page)(struct address_space *, struct page *);
> > > @@ -219,7 +221,9 @@ invalidatepage:   yes
> > >  releasepage: yes
> > >  freepage:yes
> > >  direct_IO:
> > > +isolate_page:yes
> > >  migratepage: yes (both)
> > > +putback_page:yes
> > >  launder_page:yes
> > >  is_partially_uptodate:   yes
> > >  error_remove_page:   yes
> > > diff --git a/Documentation/filesystems/vfs.txt 
> > > b/Documentation/filesystems/vfs.txt
> > > index b02a7d598258..4c1b6c3b4bc8 1

[PATCH 4/4 v3] drm: rcar-du: Use generic drm_connector_register_all() helper

[Alexey Brodkin]

Now that a generic drm_connector_register_all() helper exists we may safely
substitute it for the driver-specific implementation of connectors plugging
in sysfs.

Signed-off-by: Alexey Brodkin 
Cc: Daniel Vetter 
Cc: David Airlie 
Cc: linux-renesas-soc at vger.kernel.org
Acked-by: Laurent Pinchart 
---

Changes v2 -> v3:
 * Updated title with capital after colon
 * Updated commit message with fixes of spellos and grammar issues
 * Added ack from Laurent

No changes v1 -> v2.

 drivers/gpu/drm/rcar-du/rcar_du_drv.c | 9 +
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c 
b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 644db36..0f251dc 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -361,14 +361,7 @@ static int rcar_du_probe(struct platform_device *pdev)
if (ret)
goto error;

-   mutex_lock(&ddev->mode_config.mutex);
-   drm_for_each_connector(connector, ddev) {
-   ret = drm_connector_register(connector);
-   if (ret < 0)
-   break;
-   }
-   mutex_unlock(&ddev->mode_config.mutex);
-
+   ret = drm_connector_register_all(ddev);
if (ret < 0)
goto error;

-- 
2.5.0

[Bug 115141] radeon kernel module hangs suspend

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=115141

Eugene Shalygin  changed:

   What|Removed |Added

 CC||eugene.shalygin at gmail.com

--- Comment #1 from Eugene Shalygin  ---
Have the same problem with radeon module and
01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI]
Neptune XT [Radeon HD 8970M] (prog-if 00 [VGA controller])
Subsystem: CLEVO/KAPOK Computer Neptune XT [Radeon HD 8970M]
Flags: bus master, fast devsel, latency 0, IRQ 34
Memory at e000 (64-bit, prefetchable) [size=256M]
Memory at f7b0 (64-bit, non-prefetchable) [size=256K]
I/O ports at e000 [size=256]
Expansion ROM at f7b4 [disabled] [size=128K]
Capabilities: [48] Vendor Specific Information: Len=08 
Capabilities: [50] Power Management version 3
Capabilities: [58] Express Legacy Endpoint, MSI 00
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010

Capabilities: [150] Advanced Error Reporting
Capabilities: [270] #19
Capabilities: [2b0] Address Translation Service (ATS)
Capabilities: [2c0] Page Request Interface (PRI)
Capabilities: [2d0] Process Address Space ID (PASID)
Kernel driver in use: radeon
Kernel modules: radeon
Blacklisting radeon makes suspend work. I use custom build kernel in Gentoo.
For me this is a regression from 4.4, where the same config worked.
Additionally (might be related?) in 4.5 external radeon card does not switch
off automatically when not used, I have now to
echo 'auto' > '/sys/bus/pci/devices/:01:00.0/power/control'
to turn it off.
BTW, When it is turned off, lspci shows:
# lspci -s 01:00 -v
01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI]
Neptune XT [Radeon HD 8970M] (rev ff) (prog-if ff)
!!! Unknown header type 7f
Kernel driver in use: radeon
Kernel modules: radeon

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[Bug 115141] radeon kernel module hangs suspend

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=115141

--- Comment #2 from Eugene Shalygin  ---
Created attachment 210331
  --> https://bugzilla.kernel.org/attachment.cgi?id=210331&action=edit
Kernel config

Config which worked with 4.4, processed by 'make oldconfig'.

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[Bug 115141] radeon kernel module hangs suspend

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=115141

Eugene Shalygin  changed:

   What|Removed |Added

 Attachment #210331|application/octet-stream|application/x-config
  mime type||

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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

Bug ID: 94671
   Summary: [radeonsi] Blue-ish textures in Shadow of Mordor
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: 0xe2.0x9a.0x9b at gmail.com
QA Contact: dri-devel at lists.freedesktop.org

Red fabric/cloth in Shadow of Mordor benchmark is rendered in blue color.

mesa-git built date: 2016-Mar-22 07:16:38 CET

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[PATCH 0/4 v3] drm: Introduce drm_connector_register_all() helper

[Daniel Vetter]

On Wed, Mar 23, 2016 at 11:42:53AM +0300, Alexey Brodkin wrote:
> As a pair to already existing drm_connector_unplug_all()
> (which we'll rename in this series to drm_connector_unregister_all())
> we're adding generic implementation of what is already done in some drivers
> for registering all connectors.
> 
> After implementation of that new helper we're updating 2 drivers
> that used to use it's own implementation:
>  [1] atmel_hlcdc
>  [2] rcar_du
> 
> And one driver that uses unregister():
>  [1] udl
> 
> Other drivers still use load() callback and so should be first modified so
> their load() gets called from their probe() explicitly.
> 
> Build- and run-tested on yet to be upstreamed ARC PGU (part of AXS10x board).
> 
> Changes v2 -> v3:
>  * Added acks for 1, 3 and 4 patches
>  * Updated kerneldoc descriptins of both register_ and unregister_all()
>  * Updated commit messages (mostly spellos and grammar issues)
> 
> Changes v1 -> v2:
>  * Rename drm_connector_unplug_all() to drm_connector_unregister_all()
>  * Use drm_for_each_connector() instead of list_for_each_entry()
>  * Updated kerneldoc for drm_dev_register()
> 
> Alexey Brodkin (4):
>   drm: Rename drm_connector_unplug_all() to
> drm_connector_unregister_all()
>   drm: Introduce drm_connector_register_all() helper
>   drm: atmel_hldc: Use generic drm_connector_register_all() helper
>   drm: rcar-du: Use generic drm_connector_register_all() helper

lgtm overall, but merge window is happening so don't want to throw 4.7
patches into drm-misc. So will let these soak for a while more, please
ping me after -rc1 is out that I don't forget them.

Thanks, Daniel

> 
>  drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 39 +-
>  drivers/gpu/drm/drm_crtc.c   | 59 
> 
>  drivers/gpu/drm/drm_drv.c|  6 ++-
>  drivers/gpu/drm/rcar-du/rcar_du_drv.c| 14 +--
>  drivers/gpu/drm/udl/udl_drv.c|  2 +-
>  include/drm/drm_crtc.h   |  5 ++-
>  6 files changed, 64 insertions(+), 61 deletions(-)
> 
> Cc: Daniel Vetter 
> Cc: David Airlie 
> Cc: Boris Brezillon 
> Cc: Laurent Pinchart 
> Cc: linux-renesas-soc at vger.kernel.org
> -- 
> 2.5.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

--- Comment #1 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
Created attachment 122494
  --> https://bugs.freedesktop.org/attachment.cgi?id=122494&action=edit
Screenshot: AMD OpenGL driver

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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

--- Comment #2 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
Created attachment 122495
  --> https://bugs.freedesktop.org/attachment.cgi?id=122495&action=edit
Screenshot: Mesa radeonsi OpenGL

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[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #124 from Daniel Exner  ---
Well there is this (still) highly experimental amdgpu f�r southern islands
branch. Perhaps I'll try that if I feel very lucky.

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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

--- Comment #3 from Jan Ziak <0xe2.0x9a.0x9b at gmail.com> ---
Further information:

- Linux kernel 4.5.0
- Kernel module: radeon

$ glxinfo | grep OpenGL
OpenGL vendor string: X.Org
OpenGL renderer string: Gallium 0.4 on AMD HAWAII (DRM 2.43.0, LLVM 3.8.0)
OpenGL core profile version string: 4.1 (Core Profile) Mesa 11.3.0-devel
(git-530593d)

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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

Jan Ziak <0xe2.0x9a.0x9b at gmail.com> changed:

   What|Removed |Added

   Hardware|Other   |x86-64 (AMD64)
 OS|All |Linux (All)

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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

Jan Ziak <0xe2.0x9a.0x9b at gmail.com> changed:

   What|Removed |Added

   Hardware|x86-64 (AMD64)  |All

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[PATCH 2/4 v3] drm: Introduce drm_connector_register_all() helper

[David Herrmann]

Hi

On Wed, Mar 23, 2016 at 9:42 AM, Alexey Brodkin
 wrote:
> As a pair to already existing drm_connector_unregister_all() we're adding
> generic implementation of what is already done in some drivers.
>
> Once this helper is implemented we'll be ready to switch existing
> driver-specific implementations with the generic one.
>
> Signed-off-by: Alexey Brodkin 
> Cc: Daniel Vetter 
> Cc: David Airlie 
> ---
>
> Changes v2 -> v3:
>  * Updated title with capital after colon
>  * Simplified failure path with direct and unconditional invocation of
>unregister_all()
>  * Updated kerneldoc description of the drm_connector_register_all()
>
> Changes v1 -> v2:
>  * Rename drm_connector_unplug_all() to drm_connector_unregister_all()
>  * Use drm_for_each_connector() instead of list_for_each_entry()
>  * Updated kerneldoc for drm_dev_register()
>
>  drivers/gpu/drm/drm_crtc.c | 43 +++
>  drivers/gpu/drm/drm_drv.c  |  6 +-
>  include/drm/drm_crtc.h |  3 ++-
>  3 files changed, 50 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index 65488a6..21eea11 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1081,6 +1081,49 @@ void drm_connector_unregister(struct drm_connector 
> *connector)
>  EXPORT_SYMBOL(drm_connector_unregister);
>
>  /**
> + * drm_connector_register_all - register all connectors
> + * @dev: drm device
> + *
> + * This function registers all connectors in sysfs and other places so that
> + * userspace can start to access them. Drivers can call it after calling
> + * drm_dev_register() to complete the device registration, if they don't call
> + * drm_connector_register() on each connector individually.
> + *
> + * When a device is unplugged and should be removed from userspace access,
> + * call drm_connector_unregister_all(), which is the inverse of this
> + * function.
> + *
> + * Returns:
> + * Zero on success, error code on failure.
> + */
> +int drm_connector_register_all(struct drm_device *dev)
> +{
> +   struct drm_connector *connector;
> +   int ret;
> +
> +   mutex_lock(&dev->mode_config.mutex);
> +
> +   drm_for_each_connector(connector, dev) {
> +   ret = drm_connector_register(connector);
> +   if (ret) {
> +   /*
> +* We may safely call unregister_all() here within
> +* area locked with mutex because unregister_all()
> +* doesn't use locks inside (see a comment in that
> +* function).
> +*/

Ugh? unregister_all() says:

/* FIXME: taking the mode config mutex ends up in a clash with sysfs */

This strongly contradicts your comment. Anyway, regardless how you
want to fix it: You better unlock the mode-config mutex before
returning below.

Thanks
David

> +   drm_connector_unregister_all(dev);
> +   return ret;
> +   }
> +   }
> +
> +   mutex_unlock(&dev->mode_config.mutex);
> +
> +   return 0;
> +}
> +EXPORT_SYMBOL(drm_connector_register_all);
> +
> +/**
>   * drm_connector_unregister_all - unregister connector userspace interfaces
>   * @dev: drm device
>   *
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 167c8d3..2c9a2b6 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -715,7 +715,11 @@ EXPORT_SYMBOL(drm_dev_unref);
>   *
>   * Register the DRM device @dev with the system, advertise device to 
> user-space
>   * and start normal device operation. @dev must be allocated via 
> drm_dev_alloc()
> - * previously.
> + * previously. Right after drm_dev_register() the driver should call
> + * drm_connector_register_all() to register all connectors in sysfs. This is
> + * a separate call for backward compatibility with drivers still using
> + * the deprecated ->load() callback, where connectors are registered from 
> within
> + * the ->load() callback.
>   *
>   * Never call this twice on any device!
>   *
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 42d9f4d..6a34117 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -2214,7 +2214,8 @@ void drm_connector_unregister(struct drm_connector 
> *connector);
>
>  extern void drm_connector_cleanup(struct drm_connector *connector);
>  extern unsigned int drm_connector_index(struct drm_connector *connector);
> -/* helper to unregister all connectors from sysfs for device */
> +/* helpers to {un}register all connectors from sysfs for device */
> +extern int drm_connector_register_all(struct drm_device *dev);
>  extern void drm_connector_unregister_all(struct drm_device *dev);
>
>  extern int drm_bridge_add(struct drm_bridge *bridge);
> --
> 2.5.0
>

[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

--- Comment #4 from Ernst Sj�strand  ---
I saw this too with Amdgpu Fury.

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[PATCH] dma-buf: Update docs for SYNC ioctl

[David Herrmann]

Hey

On Mon, Mar 21, 2016 at 6:14 PM, Daniel Vetter  wrote:
> On Mon, Mar 21, 2016 at 01:26:58PM +0100, David Herrmann wrote:
>> Hi
>>
>> On Mon, Mar 21, 2016 at 8:51 AM, Daniel Vetter  
>> wrote:
>> > Just a bit of wording polish plus mentioning that it can fail and must
>> > be restarted.
>> >
>> > Requested by Sumit.
>> >
>> > v2: Fix them typos (Hans).
>> >
>> > Cc: Chris Wilson 
>> > Cc: Tiago Vignatti 
>> > Cc: Stéphane Marchesin 
>> > Cc: David Herrmann 
>> > Cc: Sumit Semwal 
>> > Cc: Daniel Vetter 
>> > CC: linux-media at vger.kernel.org
>> > Cc: dri-devel at lists.freedesktop.org
>> > Cc: linaro-mm-sig at lists.linaro.org
>> > Cc: intel-gfx at lists.freedesktop.org
>> > Cc: devel at driverdev.osuosl.org
>> > Cc: Hans Verkuil 
>> > Acked-by: Sumit Semwal 
>> > Signed-off-by: Daniel Vetter 
>> > ---
>> >  Documentation/dma-buf-sharing.txt | 11 ++-
>> >  drivers/dma-buf/dma-buf.c |  2 +-
>> >  2 files changed, 7 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/Documentation/dma-buf-sharing.txt 
>> > b/Documentation/dma-buf-sharing.txt
>> > index 32ac32e773e1..ca44c5820585 100644
>> > --- a/Documentation/dma-buf-sharing.txt
>> > +++ b/Documentation/dma-buf-sharing.txt
>> > @@ -352,7 +352,8 @@ Being able to mmap an export dma-buf buffer object has 
>> > 2 main use-cases:
>> >
>> > No special interfaces, userspace simply calls mmap on the dma-buf fd, 
>> > making
>> > sure that the cache synchronization ioctl (DMA_BUF_IOCTL_SYNC) is 
>> > *always*
>> > -   used when the access happens. This is discussed next paragraphs.
>> > +   used when the access happens. Note that DMA_BUF_IOCTL_SYNC can fail 
>> > with
>> > +   -EAGAIN or -EINTR, in which case it must be restarted.
>>
>> What is "restart on EAGAIN" supposed to mean? Or more generally, what
>> does EAGAIN tell the caller?
>
> Do what drmIoctl does essentially.
>
> while (ret == -1 && (errno == EAGAIN || errno == EINTR)
> ret = ioctl();
>
> Typed from memery, too lazy to look it up in the source ;-) I'm trying to
> sell the idea of a real dma-buf manpage to Sumit, we should clarify this
> in detail there.

My question was rather about why we do this? Semantics for EINTR are
well defined, and with SA_RESTART (default on linux) user-space can
ignore it. However, looping on EAGAIN is very uncommon, and it is not
at all clear why it is needed?

Returning an error to user-space makes sense if user-space has a
reason to react to it. I fail to see how EAGAIN on a cache-flush/sync
operation helps user-space at all? As someone without insight into the
driver implementation, it is hard to tell why.. Any hints?

Thanks
David

[PATCH] dma-buf: Update docs for SYNC ioctl

[Chris Wilson]

On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
> My question was rather about why we do this? Semantics for EINTR are
> well defined, and with SA_RESTART (default on linux) user-space can
> ignore it. However, looping on EAGAIN is very uncommon, and it is not
> at all clear why it is needed?
> 
> Returning an error to user-space makes sense if user-space has a
> reason to react to it. I fail to see how EAGAIN on a cache-flush/sync
> operation helps user-space at all? As someone without insight into the
> driver implementation, it is hard to tell why.. Any hints?

The reason we return EAGAIN is to workaround a deadlock we face when
blocking on the GPU holding the struct_mutex (inside the client's
process), but the GPU is dead. As our locking is very, very coarse we
cannot restart the GPU without acquiring the struct_mutex being held by
the client so we wake the client up and tell them the resource they are
waiting on (the flush of the object from the GPU into the CPU domain) is
temporarily unavailable. If they try to immediately wait upon the ioctl
again, they are blocked waiting for the reset to occur before they may
complete their flush. There are a few other possible deadlocks that are
also avoided with EAGAIN (again, the issue is more or less the lack of
fine grained locking).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

[PATCH 02/23] ARM: dts: n950: add display support

[Jani Nikula]

On Thu, 17 Mar 2016, Sebastian Reichel  wrote:
> On Thu, Mar 17, 2016 at 02:14:26PM +0200, Laurent Pinchart wrote:
>> [...]
>> > +
>> > +  /* panel is 480x464 with top and bottom 5 lines not visible */
>> 
>> I assume you mean 480x864 ?
>
> Yes, nice catch. Basically the screen is 480x864, but only
> 480x854 are visible.

It's been a while, but I thought the full 480x864 was actually usable
and visible.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center

[PATCH 0/7] drm/exynos: HDMI and DECON fixes and enhancements

[Andrzej Hajda]

Hi Inki,

This set of patches provides set of different fixes and enhancements
for DECON -> HDMI path. It is based on:
- my HDMI patches which are not yet merged[1], could you look at them
  by the way, they were posted about 5 months ago :)
- IOMMU patches by Marek (for some mysterious reason HDMI path on 5433
  works only with IOMMU enabled),
- latest exynos-drm-next patches.

[1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/140109

Regards
Andrzej


Andrzej Hajda (7):
  drm/exynos/hdmi: fix PHY configuration sequence
  drm/exynos/hdmi: add PHY power off signal handling
  drm/exynos/hdmi: add core reset code
  drm/exynos/hdmi: remove registry dump
  drm/exynos/decon5433: fix DECON standalone update
  drm/exynos/decon5433: reset decon on start
  drm/exynos/decon5433: do not protect window in plane disable

 drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  22 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c  | 293 ++
 2 files changed, 29 insertions(+), 286 deletions(-)

-- 
1.9.1

[PATCH 4/7] drm/exynos/hdmi: remove registry dump

[Andrzej Hajda]

HDMI registry dump unnecessary spoils console and is not very helpful.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 263 ---
 1 file changed, 263 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 6faa104..49a5902 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -716,268 +716,6 @@ static int hdmiphy_reg_write_buf(struct hdmi_context 
*hdata,
}
 }

-static void hdmi_v13_regs_dump(struct hdmi_context *hdata, char *prefix)
-{
-#define DUMPREG(reg_id) \
-   DRM_DEBUG_KMS("%s:" #reg_id " = %08x\n", prefix, \
-   readl(hdata->regs + reg_id))
-   DRM_DEBUG_KMS("%s:  CONTROL REGISTERS \n", prefix);
-   DUMPREG(HDMI_INTC_FLAG);
-   DUMPREG(HDMI_INTC_CON);
-   DUMPREG(HDMI_HPD_STATUS);
-   DUMPREG(HDMI_V13_PHY_RSTOUT);
-   DUMPREG(HDMI_V13_PHY_VPLL);
-   DUMPREG(HDMI_V13_PHY_CMU);
-   DUMPREG(HDMI_V13_CORE_RSTOUT);
-
-   DRM_DEBUG_KMS("%s:  CORE REGISTERS \n", prefix);
-   DUMPREG(HDMI_CON_0);
-   DUMPREG(HDMI_CON_1);
-   DUMPREG(HDMI_CON_2);
-   DUMPREG(HDMI_SYS_STATUS);
-   DUMPREG(HDMI_V13_PHY_STATUS);
-   DUMPREG(HDMI_STATUS_EN);
-   DUMPREG(HDMI_HPD);
-   DUMPREG(HDMI_MODE_SEL);
-   DUMPREG(HDMI_V13_HPD_GEN);
-   DUMPREG(HDMI_V13_DC_CONTROL);
-   DUMPREG(HDMI_V13_VIDEO_PATTERN_GEN);
-
-   DRM_DEBUG_KMS("%s:  CORE SYNC REGISTERS \n", prefix);
-   DUMPREG(HDMI_H_BLANK_0);
-   DUMPREG(HDMI_H_BLANK_1);
-   DUMPREG(HDMI_V13_V_BLANK_0);
-   DUMPREG(HDMI_V13_V_BLANK_1);
-   DUMPREG(HDMI_V13_V_BLANK_2);
-   DUMPREG(HDMI_V13_H_V_LINE_0);
-   DUMPREG(HDMI_V13_H_V_LINE_1);
-   DUMPREG(HDMI_V13_H_V_LINE_2);
-   DUMPREG(HDMI_VSYNC_POL);
-   DUMPREG(HDMI_INT_PRO_MODE);
-   DUMPREG(HDMI_V13_V_BLANK_F_0);
-   DUMPREG(HDMI_V13_V_BLANK_F_1);
-   DUMPREG(HDMI_V13_V_BLANK_F_2);
-   DUMPREG(HDMI_V13_H_SYNC_GEN_0);
-   DUMPREG(HDMI_V13_H_SYNC_GEN_1);
-   DUMPREG(HDMI_V13_H_SYNC_GEN_2);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_1_0);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_1_1);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_1_2);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_2_0);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_2_1);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_2_2);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_3_0);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_3_1);
-   DUMPREG(HDMI_V13_V_SYNC_GEN_3_2);
-
-   DRM_DEBUG_KMS("%s:  TG REGISTERS \n", prefix);
-   DUMPREG(HDMI_TG_CMD);
-   DUMPREG(HDMI_TG_H_FSZ_L);
-   DUMPREG(HDMI_TG_H_FSZ_H);
-   DUMPREG(HDMI_TG_HACT_ST_L);
-   DUMPREG(HDMI_TG_HACT_ST_H);
-   DUMPREG(HDMI_TG_HACT_SZ_L);
-   DUMPREG(HDMI_TG_HACT_SZ_H);
-   DUMPREG(HDMI_TG_V_FSZ_L);
-   DUMPREG(HDMI_TG_V_FSZ_H);
-   DUMPREG(HDMI_TG_VSYNC_L);
-   DUMPREG(HDMI_TG_VSYNC_H);
-   DUMPREG(HDMI_TG_VSYNC2_L);
-   DUMPREG(HDMI_TG_VSYNC2_H);
-   DUMPREG(HDMI_TG_VACT_ST_L);
-   DUMPREG(HDMI_TG_VACT_ST_H);
-   DUMPREG(HDMI_TG_VACT_SZ_L);
-   DUMPREG(HDMI_TG_VACT_SZ_H);
-   DUMPREG(HDMI_TG_FIELD_CHG_L);
-   DUMPREG(HDMI_TG_FIELD_CHG_H);
-   DUMPREG(HDMI_TG_VACT_ST2_L);
-   DUMPREG(HDMI_TG_VACT_ST2_H);
-   DUMPREG(HDMI_TG_VSYNC_TOP_HDMI_L);
-   DUMPREG(HDMI_TG_VSYNC_TOP_HDMI_H);
-   DUMPREG(HDMI_TG_VSYNC_BOT_HDMI_L);
-   DUMPREG(HDMI_TG_VSYNC_BOT_HDMI_H);
-   DUMPREG(HDMI_TG_FIELD_TOP_HDMI_L);
-   DUMPREG(HDMI_TG_FIELD_TOP_HDMI_H);
-   DUMPREG(HDMI_TG_FIELD_BOT_HDMI_L);
-   DUMPREG(HDMI_TG_FIELD_BOT_HDMI_H);
-#undef DUMPREG
-}
-
-static void hdmi_v14_regs_dump(struct hdmi_context *hdata, char *prefix)
-{
-   int i;
-
-#define DUMPREG(reg_id) \
-   DRM_DEBUG_KMS("%s:" #reg_id " = %08x\n", prefix, \
-   readl(hdata->regs + reg_id))
-
-   DRM_DEBUG_KMS("%s:  CONTROL REGISTERS \n", prefix);
-   DUMPREG(HDMI_INTC_CON);
-   DUMPREG(HDMI_INTC_FLAG);
-   DUMPREG(HDMI_HPD_STATUS);
-   DUMPREG(HDMI_INTC_CON_1);
-   DUMPREG(HDMI_INTC_FLAG_1);
-   DUMPREG(HDMI_PHY_STATUS_0);
-   DUMPREG(HDMI_PHY_STATUS_PLL);
-   DUMPREG(HDMI_PHY_CON_0);
-   DUMPREG(HDMI_V14_PHY_RSTOUT);
-   DUMPREG(HDMI_PHY_VPLL);
-   DUMPREG(HDMI_PHY_CMU);
-   DUMPREG(HDMI_CORE_RSTOUT);
-
-   DRM_DEBUG_KMS("%s:  CORE REGISTERS \n", prefix);
-   DUMPREG(HDMI_CON_0);
-   DUMPREG(HDMI_CON_1);
-   DUMPREG(HDMI_CON_2);
-   DUMPREG(HDMI_SYS_STATUS);
-   DUMPREG(HDMI_PHY_STATUS_0);
-   DUMPREG(HDMI_STATUS_EN);
-   DUMPREG(HDMI_HPD);
-   DUMPREG(HDMI_MODE_SEL);
-   DUMPREG(HDMI_ENC_EN);
-   DUMPREG(HDMI_DC_CONTROL);
-   DUMPREG(HDMI_VIDEO_PATTERN_GEN);
-
-   DRM_DEBUG_KMS("%s:  CORE SYNC REGISTERS \n", prefix);
-   DUMPREG(HDMI_H_BLANK_0);
-   DUMPREG(HDMI_H_BLANK_1);
-   DUMPREG(HDMI_V2_BLANK_0);
-   DUMPR

[PATCH 3/7] drm/exynos/hdmi: add core reset code

[Andrzej Hajda]

To ensure HDMI-PHY reprogramming will not affect
HDMI the latter should be reset.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 16951f3..6faa104 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1662,6 +1662,10 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)

 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
+   hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, 0, 1);
+   usleep_range(1, 12000);
+   hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, ~0, 1);
+   usleep_range(1, 12000);
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
usleep_range(1, 12000);
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT);
-- 
1.9.1

[PATCH 7/7] drm/exynos/decon5433: do not protect window in plane disable

[Andrzej Hajda]

decon_atomic_begin and decon_atomic_flush protects all windows already.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 120efd8..c8c921c 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -329,12 +329,7 @@ static void decon_disable_plane(struct exynos_drm_crtc 
*crtc,
if (test_bit(BIT_SUSPENDED, &ctx->flags))
return;

-   decon_shadow_protect_win(ctx, win, true);
-
-   /* window disable */
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);
-
-   decon_shadow_protect_win(ctx, win, false);
 }

 static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
-- 
1.9.1

[PATCH 6/7] drm/exynos/decon5433: reset decon on start

[Andrzej Hajda]

Resetting IP at starting ensures that DECON will be in known state
regardless of changes by bootloader.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 7fec656..120efd8 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -400,6 +400,8 @@ static void decon_enable(struct exynos_drm_crtc *crtc)

set_bit(BIT_CLKS_ENABLED, &ctx->flags);

+   decon_swreset(ctx);
+
/* if vblank was enabled status, enable it again. */
if (test_and_clear_bit(BIT_IRQS_ENABLED, &ctx->flags))
decon_enable_vblank(ctx->crtc);
-- 
1.9.1

[PATCH 2/7] drm/exynos/hdmi: add PHY power off signal handling

[Andrzej Hajda]

HDMI-PHY power off bit defaults to 0 in older HDMI versions.
In case of Exynos5433 it defaults to 1. To make code
consistent across all versions this bit is always unset/set in
power on/off sequences.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 5c7dbfc..16951f3 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1757,6 +1757,8 @@ static void hdmi_enable(struct drm_encoder *encoder)

hdmi_set_refclk(hdata, true);

+   hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN);
+
hdmi_conf_apply(hdata);

hdata->powered = true;
@@ -1789,6 +1791,8 @@ static void hdmi_disable(struct drm_encoder *encoder)

cancel_delayed_work(&hdata->hotplug_work);

+   hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN);
+
hdmi_set_refclk(hdata, false);

regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
-- 
1.9.1

[PATCH 5/7] drm/exynos/decon5433: fix DECON standalone update

[Andrzej Hajda]

DECON should be updated after un-protecting windows and after changing
output parameters, otherwise image is not displayed in case of HDMI path.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index ab9154e..7fec656 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -191,6 +191,8 @@ static void decon_commit(struct exynos_drm_crtc *crtc)

/* enable output and display signal */
decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
+
+   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
 }

 static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
@@ -316,9 +318,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,

/* window enable */
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);
-
-   /* standalone update */
-   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
 }

 static void decon_disable_plane(struct exynos_drm_crtc *crtc,
@@ -336,9 +335,6 @@ static void decon_disable_plane(struct exynos_drm_crtc 
*crtc,
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);

decon_shadow_protect_win(ctx, win, false);
-
-   /* standalone update */
-   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
 }

 static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
@@ -352,6 +348,9 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
for (i = ctx->first_win; i < WINDOWS_NR; i++)
decon_shadow_protect_win(ctx, i, false);

+   /* standalone update */
+   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
+
if (ctx->out_type == IFTYPE_I80)
set_bit(BIT_WIN_UPDATED, &ctx->flags);
 }
@@ -463,8 +462,10 @@ static void decon_clear_channels(struct exynos_drm_crtc 
*crtc)
decon_shadow_protect_win(ctx, win, true);
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);
decon_shadow_protect_win(ctx, win, false);
-   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
}
+
+   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
+
/* TODO: wait for possible vsync */
msleep(50);

-- 
1.9.1

[PATCH 1/7] drm/exynos/hdmi: fix PHY configuration sequence

[Andrzej Hajda]

Proper PHY configuration should be as follow:
1. set HDMI clock parents to OSCCLK.
2. reconfigure PHY.
3. set HDMI clock parents to PHY.
4. wait for PLL stabilization.

The patch fixes it and consolidates the code.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 839ad70..5c7dbfc 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1657,15 +1657,11 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
else
hdmi_v14_mode_apply(hdata);

-   hdmiphy_wait_for_pll(hdata);
-   hdmi_clk_set_parents(hdata, true);
hdmi_start(hdata, true);
 }

 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
-   hdmi_clk_set_parents(hdata, false);
-
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
usleep_range(1, 12000);
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT);
@@ -1683,29 +1679,33 @@ static void hdmiphy_enable_mode_set(struct hdmi_context 
*hdata, bool enable)
 static void hdmiphy_conf_apply(struct hdmi_context *hdata)
 {
int ret;
-   int i;
+   const u8 *phy_conf;

-   i = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000);
-   if (i < 0) {
+   ret = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000);
+   if (ret < 0) {
DRM_ERROR("failed to find hdmiphy conf\n");
return;
}
+   phy_conf = hdata->drv_data->phy_confs.data[ret].conf;
+
+   hdmi_clk_set_parents(hdata, false);
+
+   hdmiphy_conf_reset(hdata);

hdmiphy_enable_mode_set(hdata, true);
-   ret = hdmiphy_reg_write_buf(hdata, 0,
-   hdata->drv_data->phy_confs.data[i].conf, 32);
+   ret = hdmiphy_reg_write_buf(hdata, 0, phy_conf, 32);
if (ret) {
DRM_ERROR("failed to configure hdmiphy\n");
return;
}
hdmiphy_enable_mode_set(hdata, false);
-
+   hdmi_clk_set_parents(hdata, true);
usleep_range(1, 12000);
+   hdmiphy_wait_for_pll(hdata);
 }

 static void hdmi_conf_apply(struct hdmi_context *hdata)
 {
-   hdmiphy_conf_reset(hdata);
hdmiphy_conf_apply(hdata);
hdmi_start(hdata, false);
hdmi_conf_init(hdata);
-- 
1.9.1

[PATCH 0/6] drm/exynos: add pipeline clock support

[Andrzej Hajda]

Hi Inki,

In case of some pipielines there is need to set clock in one component
by driver of another component, for example:
1. Decon and Mixer driver must enable HDMI-PHY clock before configuration.
2. DP driver must enable DP clock provided by FIMD.

This set of patches provide more generic solution for such problem
than currently present clock_enable callback. More details in particular
patches. The patchset is based on recently sent patchset with HDMI/DECON
path fixes[1].

[1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/149714

Regards
Andrzej


Andrzej Hajda (6):
  drm/exynos: add helper to get crtc from pipe
  drm/exynos: add support for pipeline clock to the framework
  drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock
  drm/exynos/decon5433: enable HDMI-PHY before configuring DECON
  drm/exynos/mixer: enable HDMI-PHY before configuring MIXER
  drm/exynos: convert clock_enable crtc callback to pipeline clock

 drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  4 ++
 drivers/gpu/drm/exynos/exynos_dp_core.c   |  8 +---
 drivers/gpu/drm/exynos/exynos_drm_crtc.c  | 10 ++--
 drivers/gpu/drm/exynos/exynos_drm_drv.h   | 25 --
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 27 ++-
 drivers/gpu/drm/exynos/exynos_hdmi.c  | 67 +++
 drivers/gpu/drm/exynos/exynos_mixer.c |  4 ++
 7 files changed, 95 insertions(+), 50 deletions(-)

-- 
1.9.1

[PATCH 1/6] drm/exynos: add helper to get crtc from pipe

[Andrzej Hajda]

The helper abstracts out conversion from pipeline
to crtc. Currently it is used in two places, but
there will be more uses in next patches.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_drm_crtc.c | 10 --
 drivers/gpu/drm/exynos/exynos_drm_drv.h  |  8 
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index e36579c..50dd33d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -157,9 +157,8 @@ err_crtc:

 int exynos_drm_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 {
-   struct exynos_drm_private *private = dev->dev_private;
-   struct exynos_drm_crtc *exynos_crtc =
-   to_exynos_crtc(private->crtc[pipe]);
+   struct exynos_drm_crtc *exynos_crtc = exynos_drm_crtc_from_pipe(dev,
+   pipe);

if (exynos_crtc->ops->enable_vblank)
return exynos_crtc->ops->enable_vblank(exynos_crtc);
@@ -169,9 +168,8 @@ int exynos_drm_crtc_enable_vblank(struct drm_device *dev, 
unsigned int pipe)

 void exynos_drm_crtc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 {
-   struct exynos_drm_private *private = dev->dev_private;
-   struct exynos_drm_crtc *exynos_crtc =
-   to_exynos_crtc(private->crtc[pipe]);
+   struct exynos_drm_crtc *exynos_crtc = exynos_drm_crtc_from_pipe(dev,
+   pipe);

if (exynos_crtc->ops->disable_vblank)
exynos_crtc->ops->disable_vblank(exynos_crtc);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 3f170ce..fcea940 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -232,6 +232,14 @@ struct exynos_drm_private {
wait_queue_head_t   wait;
 };

+static inline struct exynos_drm_crtc *
+exynos_drm_crtc_from_pipe(struct drm_device *dev, int pipe)
+{
+   struct exynos_drm_private *private = dev->dev_private;
+
+   return to_exynos_crtc(private->crtc[pipe]);
+}
+
 static inline struct device *to_dma_dev(struct drm_device *dev)
 {
struct exynos_drm_private *priv = dev->dev_private;
-- 
1.9.1

[PATCH 2/6] drm/exynos: add support for pipeline clock to the framework

[Andrzej Hajda]

Components belonging to the same pipeline often requires
synchronized clocks. Such clocks are sometimes provided
by external clock controller, but they can be also provided by
pipeline components. In latter case there should be a way
to access them from another component belonging to the same pipeline.
This is the case of:
- DECON,FIMD -> HDMI and HDMI-PHY clock,
- FIMD -> DP and DP clock in FIMD.
The latter case has been solved by clock_enable callback
in exynos_drm_crtc_ops. This solutin will not work with
HDMI path as in this case clock is provided by encoder.

This patch provides more generic solution allowing to register
pipeline clock during initialization in exynos_drm_crtc structure.
This way the clock will be easily accessible from both components.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_drm_drv.h | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index fcea940..6ee0b20 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -154,6 +154,10 @@ struct exynos_drm_crtc_ops {
void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable);
 };

+struct exynos_drm_clk {
+   void (*enable)(struct exynos_drm_clk *clk, bool enable);
+};
+
 /*
  * Exynos specific crtc structure.
  *
@@ -182,8 +186,16 @@ struct exynos_drm_crtc {
atomic_tpending_update;
const struct exynos_drm_crtc_ops*ops;
void*ctx;
+   struct exynos_drm_clk   *pipe_clk;
 };

+static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
+ bool enable)
+{
+   if (crtc->pipe_clk)
+   crtc->pipe_clk->enable(crtc->pipe_clk, enable);
+}
+
 struct exynos_drm_g2d_private {
struct device   *dev;
struct list_headinuse_cmdlist;
-- 
1.9.1

[PATCH 6/6] drm/exynos: convert clock_enable crtc callback to pipeline clock

[Andrzej Hajda]

clock_enable callback is used only by FIMD->DP pipeline. Similar but more
universal functionality provides pipeline clock.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_dp_core.c  |  8 ++--
 drivers/gpu/drm/exynos/exynos_drm_drv.h  |  5 -
 drivers/gpu/drm/exynos/exynos_drm_fimd.c | 27 +--
 3 files changed, 15 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index cff8dc7..ebb96eb 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1054,7 +1054,6 @@ static int exynos_dp_bridge_attach(struct drm_bridge 
*bridge)
 static void exynos_dp_bridge_enable(struct drm_bridge *bridge)
 {
struct exynos_dp_device *dp = bridge->driver_private;
-   struct exynos_drm_crtc *crtc = dp_to_crtc(dp);

if (dp->dpms_mode == DRM_MODE_DPMS_ON)
return;
@@ -1068,8 +1067,7 @@ static void exynos_dp_bridge_enable(struct drm_bridge 
*bridge)
}
}

-   if (crtc->ops->clock_enable)
-   crtc->ops->clock_enable(dp_to_crtc(dp), true);
+   exynos_drm_pipe_clk_enable(dp_to_crtc(dp), true);

phy_power_on(dp->phy);
exynos_dp_init_dp(dp);
@@ -1082,7 +1080,6 @@ static void exynos_dp_bridge_enable(struct drm_bridge 
*bridge)
 static void exynos_dp_bridge_disable(struct drm_bridge *bridge)
 {
struct exynos_dp_device *dp = bridge->driver_private;
-   struct exynos_drm_crtc *crtc = dp_to_crtc(dp);

if (dp->dpms_mode != DRM_MODE_DPMS_ON)
return;
@@ -1098,8 +1095,7 @@ static void exynos_dp_bridge_disable(struct drm_bridge 
*bridge)
flush_work(&dp->hotplug_work);
phy_power_off(dp->phy);

-   if (crtc->ops->clock_enable)
-   crtc->ops->clock_enable(dp_to_crtc(dp), false);
+   exynos_drm_pipe_clk_enable(dp_to_crtc(dp), false);

if (dp->panel) {
if (drm_panel_unprepare(dp->panel))
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 6ee0b20..1542910 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -129,10 +129,6 @@ struct exynos_drm_plane_config {
  * @disable_plane: disable hardware specific overlay.
  * @te_handler: trigger to transfer video image at the tearing effect
  * synchronization signal if there is a page flip request.
- * @clock_enable: optional function enabling/disabling display domain clock,
- * called from exynos-dp driver before powering up (with
- * 'enable' argument as true) and after powering down (with
- * 'enable' as false).
  */
 struct exynos_drm_crtc;
 struct exynos_drm_crtc_ops {
@@ -151,7 +147,6 @@ struct exynos_drm_crtc_ops {
  struct exynos_drm_plane *plane);
void (*atomic_flush)(struct exynos_drm_crtc *crtc);
void (*te_handler)(struct exynos_drm_crtc *crtc);
-   void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable);
 };

 struct exynos_drm_clk {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 51d484a..004bf57 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -102,6 +102,7 @@ struct fimd_driver_data {
unsigned int has_vidoutcon:1;
unsigned int has_vtsel:1;
unsigned int has_mic_bypass:1;
+   unsigned int has_dp_clk:1;
 };

 static struct fimd_driver_data s3c64xx_fimd_driver_data = {
@@ -145,6 +146,7 @@ static struct fimd_driver_data exynos5_fimd_driver_data = {
.has_shadowcon = 1,
.has_vidoutcon = 1,
.has_vtsel = 1,
+   .has_dp_clk = 1,
 };

 static struct fimd_driver_data exynos5420_fimd_driver_data = {
@@ -157,6 +159,7 @@ static struct fimd_driver_data exynos5420_fimd_driver_data 
= {
.has_vidoutcon = 1,
.has_vtsel = 1,
.has_mic_bypass = 1,
+   .has_dp_clk = 1,
 };

 struct fimd_context {
@@ -184,6 +187,7 @@ struct fimd_context {

struct fimd_driver_data *driver_data;
struct drm_encoder *encoder;
+   struct exynos_drm_clk   dp_clk;
 };

 static const struct of_device_id fimd_driver_dt_match[] = {
@@ -878,21 +882,12 @@ static void fimd_te_handler(struct exynos_drm_crtc *crtc)
drm_crtc_handle_vblank(&ctx->crtc->base);
 }

-static void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable)
+static void fimd_dp_clock_enable(struct exynos_drm_clk *clk, bool enable)
 {
-   struct fimd_context *ctx = crtc->ctx;
-   u32 val;
-
-   /*
-* Only Exynos 5250, 5260, 5410 and 542x requires enabling DP/MIE
-* clock. On these SoCs the bootloader may enable it but any
-* power domain off/on will reset it to disable state.
-*/
-   if (ctx->driver_data != &exynos5_fimd_driver_data ||
-   ctx->driver_data != &exyn

[PATCH 4/6] drm/exynos/decon5433: enable HDMI-PHY before configuring DECON

[Andrzej Hajda]

According to documentation and tests HDMI-PHY must be on prior
to MIXER configuration.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index c8c921c..26b582c 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -393,6 +393,8 @@ static void decon_enable(struct exynos_drm_crtc *crtc)

pm_runtime_get_sync(ctx->dev);

+   exynos_drm_pipe_clk_enable(crtc, true);
+
set_bit(BIT_CLKS_ENABLED, &ctx->flags);

decon_swreset(ctx);
@@ -424,6 +426,8 @@ static void decon_disable(struct exynos_drm_crtc *crtc)

clear_bit(BIT_CLKS_ENABLED, &ctx->flags);

+   exynos_drm_pipe_clk_enable(crtc, false);
+
pm_runtime_put_sync(ctx->dev);

set_bit(BIT_SUSPENDED, &ctx->flags);
-- 
1.9.1

[PATCH 3/6] drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock

[Andrzej Hajda]

HDMI-PHY clock should be accessible from other components in the pipeline.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 67 ++--
 1 file changed, 48 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 49a5902..0d1c2f0 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -146,6 +146,7 @@ struct hdmi_context {
struct clk  **clk_muxes;
struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
struct regulator*reg_hdmi_en;
+   struct exynos_drm_clk   phy_clk;
 };

 static inline struct hdmi_context *encoder_to_hdmi(struct drm_encoder *e)
@@ -1448,7 +1449,6 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)

 static void hdmi_conf_apply(struct hdmi_context *hdata)
 {
-   hdmiphy_conf_apply(hdata);
hdmi_start(hdata, false);
hdmi_conf_init(hdata);
hdmi_audio_init(hdata);
@@ -1481,10 +1481,8 @@ static void hdmi_set_refclk(struct hdmi_context *hdata, 
bool on)
   SYSREG_HDMI_REFCLK_INT_CLK, on ? ~0 : 0);
 }

-static void hdmi_enable(struct drm_encoder *encoder)
+static void hdmiphy_enable(struct hdmi_context *hdata)
 {
-   struct hdmi_context *hdata = encoder_to_hdmi(encoder);
-
if (hdata->powered)
return;

@@ -1500,11 +1498,40 @@ static void hdmi_enable(struct drm_encoder *encoder)

hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN);

-   hdmi_conf_apply(hdata);
+   hdmiphy_conf_apply(hdata);

hdata->powered = true;
 }

+static void hdmiphy_disable(struct hdmi_context *hdata)
+{
+   if (!hdata->powered)
+   return;
+
+   hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
+
+   hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN);
+
+   hdmi_set_refclk(hdata, false);
+
+   regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
+   PMU_HDMI_PHY_ENABLE_BIT, 0);
+
+   regulator_bulk_disable(ARRAY_SIZE(supply), hdata->regul_bulk);
+
+   pm_runtime_put_sync(hdata->dev);
+
+   hdata->powered = false;
+}
+
+static void hdmi_enable(struct drm_encoder *encoder)
+{
+   struct hdmi_context *hdata = encoder_to_hdmi(encoder);
+
+   hdmiphy_enable(hdata);
+   hdmi_conf_apply(hdata);
+}
+
 static void hdmi_disable(struct drm_encoder *encoder)
 {
struct hdmi_context *hdata = encoder_to_hdmi(encoder);
@@ -1528,22 +1555,9 @@ static void hdmi_disable(struct drm_encoder *encoder)
if (funcs && funcs->disable)
(*funcs->disable)(crtc);

-   hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
-
cancel_delayed_work(&hdata->hotplug_work);

-   hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN);
-
-   hdmi_set_refclk(hdata, false);
-
-   regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
-   PMU_HDMI_PHY_ENABLE_BIT, 0);
-
-   regulator_bulk_disable(ARRAY_SIZE(supply), hdata->regul_bulk);
-
-   pm_runtime_put_sync(hdata->dev);
-
-   hdata->powered = false;
+   hdmiphy_disable(hdata);
 }

 static const struct drm_encoder_helper_funcs exynos_hdmi_encoder_helper_funcs 
= {
@@ -1627,6 +1641,17 @@ static int hdmi_clk_init(struct hdmi_context *hdata)
return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
 }

+static void hdmiphy_clk_enable(struct exynos_drm_clk *clk, bool enable)
+{
+   struct hdmi_context *hdata = container_of(clk, struct hdmi_context,
+ phy_clk);
+
+   if (enable)
+   hdmiphy_enable(hdata);
+   else
+   hdmiphy_disable(hdata);
+}
+
 static int hdmi_resources_init(struct hdmi_context *hdata)
 {
struct device *dev = hdata->dev;
@@ -1710,6 +1735,10 @@ static int hdmi_bind(struct device *dev, struct device 
*master, void *data)
if (pipe < 0)
return pipe;

+   hdata->phy_clk.enable = hdmiphy_clk_enable;
+
+   exynos_drm_crtc_from_pipe(drm_dev, pipe)->pipe_clk = &hdata->phy_clk;
+
encoder->possible_crtcs = 1 << pipe;

DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
-- 
1.9.1

[PATCH 5/6] drm/exynos/mixer: enable HDMI-PHY before configuring MIXER

[Andrzej Hajda]

According to documentation HDMI-PHY must be on prior to MIXER configuration.

Signed-off-by: Andrzej Hajda 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 0a5a600..27f36c0 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -1065,6 +1065,8 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)

pm_runtime_get_sync(ctx->dev);

+   exynos_drm_pipe_clk_enable(crtc, true);
+
mixer_vsync_set_update(ctx, false);

mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
@@ -1094,6 +1096,8 @@ static void mixer_disable(struct exynos_drm_crtc *crtc)
for (i = 0; i < MIXER_WIN_NR; i++)
mixer_disable_plane(crtc, &ctx->planes[i]);

+   exynos_drm_pipe_clk_enable(crtc, false);
+
pm_runtime_put(ctx->dev);

clear_bit(MXR_BIT_POWERED, &ctx->flags);
-- 
1.9.1

[PATCH 2/4 v3] drm: Introduce drm_connector_register_all() helper

[Alexey Brodkin]

Hi David,

On Wed, 2016-03-23 at 12:13 +0100, David Herrmann wrote:
> Hi
> 
> On Wed, Mar 23, 2016 at 9:42 AM, Alexey Brodkin
>  wrote:
> > 
> > As a pair to already existing drm_connector_unregister_all() we're adding
> > generic implementation of what is already done in some drivers.
> > 
> > Once this helper is implemented we'll be ready to switch existing
> > driver-specific implementations with the generic one.
> > 
> > Signed-off-by: Alexey Brodkin 
> > Cc: Daniel Vetter 
> > Cc: David Airlie 
> > ---
> > 
> > Changes v2 -> v3:
> >  * Updated title with capital after colon
> >  * Simplified failure path with direct and unconditional invocation of
> >    unregister_all()
> >  * Updated kerneldoc description of the drm_connector_register_all()
> > 
> > Changes v1 -> v2:
> >  * Rename drm_connector_unplug_all() to drm_connector_unregister_all()
> >  * Use drm_for_each_connector() instead of list_for_each_entry()
> >  * Updated kerneldoc for drm_dev_register()
> > 
> >  drivers/gpu/drm/drm_crtc.c | 43 
> > +++
> >  drivers/gpu/drm/drm_drv.c  |  6 +-
> >  include/drm/drm_crtc.h     |  3 ++-
> >  3 files changed, 50 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> > index 65488a6..21eea11 100644
> > --- a/drivers/gpu/drm/drm_crtc.c
> > +++ b/drivers/gpu/drm/drm_crtc.c
> > @@ -1081,6 +1081,49 @@ void drm_connector_unregister(struct drm_connector 
> > *connector)
> >  EXPORT_SYMBOL(drm_connector_unregister);
> > 
> >  /**
> > + * drm_connector_register_all - register all connectors
> > + * @dev: drm device
> > + *
> > + * This function registers all connectors in sysfs and other places so that
> > + * userspace can start to access them. Drivers can call it after calling
> > + * drm_dev_register() to complete the device registration, if they don't 
> > call
> > + * drm_connector_register() on each connector individually.
> > + *
> > + * When a device is unplugged and should be removed from userspace access,
> > + * call drm_connector_unregister_all(), which is the inverse of this
> > + * function.
> > + *
> > + * Returns:
> > + * Zero on success, error code on failure.
> > + */
> > +int drm_connector_register_all(struct drm_device *dev)
> > +{
> > +       struct drm_connector *connector;
> > +       int ret;
> > +
> > +       mutex_lock(&dev->mode_config.mutex);
> > +
> > +       drm_for_each_connector(connector, dev) {
> > +               ret = drm_connector_register(connector);
> > +               if (ret) {
> > +                       /*
> > +                        * We may safely call 
> > unregister_all() here within
> > +                        * area locked with mutex 
> > because unregister_all()
> > +                        * doesn't use locks inside 
> > (see a comment in that
> > +                        * function).
> > +                        */
> Ugh? unregister_all() says:
> 
> /* FIXME: taking the mode config mutex ends up in a clash with sysfs */
> 
> This strongly contradicts your comment. Anyway, regardless how you
> want to fix it: You better unlock the mode-config mutex before
> returning below.

So good catch.
But what I really meant since we didn't get any further after registering
all "good" connections (see we're not releasing mutex still) the will be
no clashes with sysfs.

Still I;d like Daniel to comment on that separately.

-Alexey

[Bug 115141] radeon kernel module hangs suspend

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=115141

Alex Deucher  changed:

   What|Removed |Added

 CC||alexdeucher at gmail.com

--- Comment #3 from Alex Deucher  ---
Can you bisect?

-- 
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[Bug 94671] [radeonsi] Blue-ish textures in Shadow of Mordor

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94671

--- Comment #5 from Nicolai H�hnle  ---
Thank you for the report.

I suspect some of the BGR <-> RGB changes for shader image bitcasts are
responsible. Could one of you please provide an apitrace that shows the
problem? That would be very helpful.

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[PATCH] dma-buf/sync_file: de-stage sync_file

[Gustavo Padovan]

Hi Sumit,

2016-03-21 Sumit Semwal :

> Thanks for the patch, Gustavo!
> 
> On 18 March 2016 at 19:49, Gustavo Padovan  wrote:
> > From: Gustavo Padovan 
> >
> > sync_file is useful to connect one or more fences to the file. The file is
> > used by userspace to track fences.
> >
> I think it is worthwhile to add relevant bits to the Documentation as
> well - care to add relevant stuff to either Documentation/dma_buf.txt,
> or to a file of its own? (I'd prefer the former, but would leave it
> upto you.)

Sure, that is part of my plan. I'm currently trying to have a working
version of fences on DRM then I think I'll be able to add Documentation
for everything I have done.

Gustavo

[RFC 00/29] De-stage android's sync framework

[Tomeu Vizoso]

On 19 January 2016 at 17:12, John Harrison  wrote:
> On 19/01/2016 15:23, Gustavo Padovan wrote:
>>
>> Hi Daniel,
>>
>> 2016-01-19 Daniel Vetter :
>>
>>> On Fri, Jan 15, 2016 at 12:55:10PM -0200, Gustavo Padovan wrote:

 From: Gustavo Padovan 

 This patch series de-stage the sync framework, and in order to
 accomplish that
 a bunch of cleanups/improvements on the sync and fence were made.

 The sync framework contained some abstractions around struct fence and
 those
 were removed in the de-staging process among other changes:

 Userspace visible changes
 -

   * The sw_sync file was moved from /dev/sw_sync to
 /sync/sw_sync. No
   other change.

 Kernel API changes
 --

   * struct sync_timeline is now struct fence_timeline
   * sync_timeline_ops is now fence_timeline_ops and they now carry
 struct
   fence as parameter instead of struct sync_pt
   * a .cleanup() fence op was added to allow sync_fence to run a cleanup
 when
   the fence_timeline is destroyed
   * added fence_add_used_data() to pass a private point to struct fence.
 This
   pointer is sent back on the .cleanup op.
   * The sync timeline function were moved to be fence_timeline
 functions:
  - sync_timeline_create()   -> fence_timeline_create()
  - sync_timeline_get()  -> fence_timeline_get()
  - sync_timeline_put()  -> fence_timeline_put()
  - sync_timeline_destroy()  -> fence_timeline_destroy()
  - sync_timeline_signal()   -> fence_timeline_signal()

* sync_pt_create() was replaced be fence_create_on_timeline()

 Internal changes
 

   * fence_timeline_ops was removed in favor of direct use fence_ops
   * fence default functions were created for fence_ops
   * removed structs sync_pt, sw_sync_timeline and sw_sync_pt
>>>
>>> Bunch of fairly random comments all over:
>>>
>>> - include/uapi/linux/sw_sync.h imo should be dropped, it's just a private
>>>debugfs interface between fence fds and the testsuite. Since the plan
>>> is
>>>to have the testcases integrated into the kernel tree too we don't
>>> need
>>>a public header.
>>>
>>> - similar for include/linux/sw_sync.h Imo that should all be moved into
>>>sync_debug.c. Same for sw_sync.c, that should all land in sync_debug
>>>imo, and made optional with a Kconfig option. At least we should reuse
>>>CONFIG_DEBUGFS.
>>
>> These two items sounds reasonable to me.
>
>
> I have just posted our in-progress IGT for testing i915 syncs (with a CC of
> Gustavo). It uses the sw_sync mechanisms. Can you take a quick look and see
> if it is the kind of thing you would expect us to be doing? Or is it using
> interfaces that you are planning to remove and/or make kernel only?
>
> I'm not sure having a kernel only test is the best way to go. Having user
> land tests like IGT would be much more versatile.

Hi John,

I'm working on making the tests in igt useful for drivers other than
i915 and would love to have tests for the fence functionality. Have
you made any progress since you posted that RFC?

Thanks,

Tomeu

[PATCH] dma-buf: Update docs for SYNC ioctl

[David Herrmann]

Hi

On Wed, Mar 23, 2016 at 12:56 PM, Chris Wilson  
wrote:
> On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
>> My question was rather about why we do this? Semantics for EINTR are
>> well defined, and with SA_RESTART (default on linux) user-space can
>> ignore it. However, looping on EAGAIN is very uncommon, and it is not
>> at all clear why it is needed?
>>
>> Returning an error to user-space makes sense if user-space has a
>> reason to react to it. I fail to see how EAGAIN on a cache-flush/sync
>> operation helps user-space at all? As someone without insight into the
>> driver implementation, it is hard to tell why.. Any hints?
>
> The reason we return EAGAIN is to workaround a deadlock we face when
> blocking on the GPU holding the struct_mutex (inside the client's
> process), but the GPU is dead. As our locking is very, very coarse we
> cannot restart the GPU without acquiring the struct_mutex being held by
> the client so we wake the client up and tell them the resource they are
> waiting on (the flush of the object from the GPU into the CPU domain) is
> temporarily unavailable. If they try to immediately wait upon the ioctl
> again, they are blocked waiting for the reset to occur before they may
> complete their flush. There are a few other possible deadlocks that are
> also avoided with EAGAIN (again, the issue is more or less the lack of
> fine grained locking).

...so you hijacked EAGAIN for all DRM ioctls just for a driver
workaround? EAGAIN is universally used to signal the caller about a
blocking resource. It is very much linked to O_NONBLOCK. Why not use
EBUSY, ECANCELED, ECOMM, EDEADLOCK, EIO, EL3RST, ...

Anyhow, I guess that ship has sailed. But just mentioning EAGAIN in a
kernel-doc is way to vague for user-space to figure out they should
loop on it.

Thanks
David

[PATCH] dma-buf: Update docs for SYNC ioctl

[Chris Wilson]

On Wed, Mar 23, 2016 at 04:32:59PM +0100, David Herrmann wrote:
> Hi
> 
> On Wed, Mar 23, 2016 at 12:56 PM, Chris Wilson  
> wrote:
> > On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
> >> My question was rather about why we do this? Semantics for EINTR are
> >> well defined, and with SA_RESTART (default on linux) user-space can
> >> ignore it. However, looping on EAGAIN is very uncommon, and it is not
> >> at all clear why it is needed?
> >>
> >> Returning an error to user-space makes sense if user-space has a
> >> reason to react to it. I fail to see how EAGAIN on a cache-flush/sync
> >> operation helps user-space at all? As someone without insight into the
> >> driver implementation, it is hard to tell why.. Any hints?
> >
> > The reason we return EAGAIN is to workaround a deadlock we face when
> > blocking on the GPU holding the struct_mutex (inside the client's
> > process), but the GPU is dead. As our locking is very, very coarse we
> > cannot restart the GPU without acquiring the struct_mutex being held by
> > the client so we wake the client up and tell them the resource they are
> > waiting on (the flush of the object from the GPU into the CPU domain) is
> > temporarily unavailable. If they try to immediately wait upon the ioctl
> > again, they are blocked waiting for the reset to occur before they may
> > complete their flush. There are a few other possible deadlocks that are
> > also avoided with EAGAIN (again, the issue is more or less the lack of
> > fine grained locking).
> 
> ...so you hijacked EAGAIN for all DRM ioctls just for a driver
> workaround?

No, we utilized the fact that EAGAIN was already enshrined by libdrm as
the defacto mechanism for repeating the ioctl in order to repeat the
ioctl for a driver workaround.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

[PATCH v3] drm/radeon: don't include RADEON_HPD_NONE in HPD IRQ enable bitsets

[Alex Deucher]

On Tue, Mar 22, 2016 at 5:05 PM, Nicolai Stange  wrote:
> The values of all but the RADEON_HPD_NONE members of the radeon_hpd_id
> enum transform 1:1 into bit positions within the 'enabled' bitset as
> assembled by evergreen_hpd_init():
>
>   enabled |= 1 << radeon_connector->hpd.hpd;
>
> However, if ->hpd.hpd happens to equal RADEON_HPD_NONE == 0xff, UBSAN
> reports
>
>   UBSAN: Undefined behaviour in drivers/gpu/drm/radeon/evergreen.c:1867:16
>   shift exponent 255 is too large for 32-bit type 'int'
>   [...]
>   Call Trace:
>[] dump_stack+0xbc/0x117
>[] ? _atomic_dec_and_lock+0x169/0x169
>[] ubsan_epilogue+0xd/0x4e
>[] __ubsan_handle_shift_out_of_bounds+0x1fb/0x254
>[] ? atom_execute_table+0x3e/0x50 [radeon]
>[] ? __ubsan_handle_load_invalid_value+0x158/0x158
>[] ? radeon_get_pll_use_mask+0x130/0x130 [radeon]
>[] ? wake_up_klogd_work_func+0x60/0x60
>[] ? vprintk_default+0x3e/0x60
>[] evergreen_hpd_init+0x274/0x2d0 [radeon]
>[] ? evergreen_hpd_init+0x274/0x2d0 [radeon]
>[] radeon_modeset_init+0x8ce/0x18d0 [radeon]
>[] radeon_driver_load_kms+0x186/0x350 [radeon]
>[] drm_dev_register+0xc6/0x100 [drm]
>[] drm_get_pci_dev+0xe4/0x490 [drm]
>[] ? kfree+0x220/0x370
>[] radeon_pci_probe+0x112/0x140 [radeon]
>[...]
>   =
>   radeon :01:00.0: No connectors reported connected with modes
>
> At least on x86, there should be no user-visible impact as there
>
>   1 << 0xff == 1 << (0xff & 31) == 1 << 31
>
> holds and 31 > RADEON_MAX_HPD_PINS. Thus, this patch is a cosmetic one.
>
> All of the above applies analogously to evergreen_hpd_fini(),
> r100_hpd_init(), r100_hpd_fini(), r600_hpd_init(), r600_hpd_fini(),
> rs600_hpd_init() and rs600_hpd_fini()
>
> Silence UBSAN by checking ->hpd.hpd for RADEON_HPD_NONE before oring it
> into the 'enabled' bitset in the *_init()- or the 'disabled' bitset in
> the *_fini()-functions respectively.
>
> Signed-off-by: Nicolai Stange 

Applied.  thanks!

Alex



> ---
>  Applicable to linux-next-20160322.
>
>  WARNING: Apart from compilation, the changes to r100.c, r600.c and
>   rs600.c are untested!
>
>  v2 thread can be found here:
>http://lkml.kernel.org/g/1458562256-2882-1-git-send-email-nicstange at 
> gmail.com
>
>  Changes to v2:
>  - Fix the very same issue not only for evergreen, but for r100, r600
>and rs600 also.
>  - Change the commit's subject and description body accordingly.
>
>  Changes to v1:
>  - Turn commit message's impact part into a non-impact part.
>
>
>  drivers/gpu/drm/radeon/evergreen.c | 6 --
>  drivers/gpu/drm/radeon/r100.c  | 6 --
>  drivers/gpu/drm/radeon/r600.c  | 6 --
>  drivers/gpu/drm/radeon/rs600.c | 6 --
>  4 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c 
> b/drivers/gpu/drm/radeon/evergreen.c
> index 76c4bdf..6360717 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -1864,7 +1864,8 @@ void evergreen_hpd_init(struct radeon_device *rdev)
> break;
> }
> radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
> -   enabled |= 1 << radeon_connector->hpd.hpd;
> +   if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
> +   enabled |= 1 << radeon_connector->hpd.hpd;
> }
> radeon_irq_kms_enable_hpd(rdev, enabled);
>  }
> @@ -1907,7 +1908,8 @@ void evergreen_hpd_fini(struct radeon_device *rdev)
> default:
> break;
> }
> -   disabled |= 1 << radeon_connector->hpd.hpd;
> +   if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
> +   disabled |= 1 << radeon_connector->hpd.hpd;
> }
> radeon_irq_kms_disable_hpd(rdev, disabled);
>  }
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index 6e478a2..55687f3 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -592,7 +592,8 @@ void r100_hpd_init(struct radeon_device *rdev)
>
> list_for_each_entry(connector, &dev->mode_config.connector_list, 
> head) {
> struct radeon_connector *radeon_connector = 
> to_radeon_connector(connector);
> -   enable |= 1 << radeon_connector->hpd.hpd;
> +   if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
> +   enable |= 1 << radeon_connector->hpd.hpd;
> radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
> }
> radeon_irq_kms_enable_hpd(rdev, enable);
> @@ -614,7 +615,8 @@ void r100_hpd_fini(struct radeon_device *rdev)
>
> list_for_each_entry(connector, &dev->mode_config.connector_list, 
> head) {
> struct radeon_connector *radeon_connector = 
> to_radeon_connector(connector);
> -

[PATCH v3 00/19] drm: Add Allwinner A10 display engine support

[Maxime Ripard]

Hi everyone,

The Allwinner SoCs (except for the very latest ones) all share the
same set of controllers, loosely coupled together to form the display
pipeline.

Depending on the SoC, the number of instances of the controller will
change (2 instances of each in the A10, only one in the A13, for
example), and the output availables will change too (HDMI, composite,
VGA on the A20, none of them on the A13).

On most featured SoCs, it looks like that:

++
|RAM |
++
  ||  ||
  v|  |v
++ |  | ++
|Frontend| |  | |Frontend|
++ |  | ++
|  |  | |
v  |  | v
++ |  | ++
|Backend |<+  +>|Backend |
++  ++
|   |
v   v
++  ++---> LVDS
|  TCON  |  |  TCON  |---> RGB
++  ++
   |   +---+   +---+  |
   |   |   |  |
   v   v   v  v
++  ++  ++---> VGA
| TV Encoder |  |HDMI|  | TV Encoder |---> Composite
++  ++  ++

The current code only assumes that there is a single instance of all
the controllers. It also supports only the RGB and Composite
interfaces.

Let me know what you think,
Maxime

Changes from v2:
  - Rebased on top of next-20160318

  - Dropped the generic clock regmap conversion and implemented a
custom clock for our pixel clock, backed by a regmap
  - Added the reset bits for the tcon channel 0 and display clocks
  - Used the new generic gates compatible for the DRAM gates
  - Few clock fixes (missing iounmap, return error checks, etc)
  - Found out that the TCON channel 1 clock was not operating properly
because of some weird rounding down and up between the various
generic clocks involved. Rewrote it using custom operations

  - Removed some TODO that were still there
  - Converted our panel DT description to the OF graph instead of a
custom property
  - Tested the driver on a setup where U-Boot was not initialising the
display, or initialising it on a different output, and fixed a
number of associated bugs (mostly related to missing
initialisation bits, missing reset handles, and so on)
  - Fixed the layer code that was assuming that the X and Y
coordinates were in pixels, leading to a miscalculation of the
buffer address when those coordinates where set.
  - Added the missing EXPORT_SYMBOL calls

  - Fixed our VBLANK interrupt code that was completely broken (and
not usable, which is why it was unnoticed)

Changes from v1:
  - Rebased on top of 4.4

  - Merged the clock drivers for the display and TCON channel 0 clocks
  - Replaced the container_of calls in the display reset clocks to an
inline function
  - Checked the return code of of_clk_parent_fill in the clocks
drivers
  - Checked the return code of of_clk_add_provider in the tcon-ch1 and
PLL3 clocks
  - Added missing clocks headers
  - Created a composite clock unregister function

  - Moved the binding documentation to
Documentation/devicetree/bindings/display
  - Added the clocks binding documentation
  - Added the Olimex vendor to the list of DT vendors
  - Moved to the OF graph representation and the component framework

  - Moved the reset cells count check into the reset framework to
avoid duplicating the code in every xlate implementation.
  - Made the reset_ops const

  - Reworked the DRM cmdline mode parsing code to allow named mode
  - Fixed the TV mode lookup when the mode name is not present (for
example because it was given by the userspace)

  - Made the driver outputs optional (to avoid crashing when a board
doesn't have either a panel or a composite output enabled)
  - Added multiple plane support with transparency
  - Moved the backend registers writes commit in the CRTC atomic_flush
callback
  - Removed the load / unload functions
  - Removed the enabled booleans in my private structure and removed
the implicit call to disable_unused_functions in the DRM core to
push it in the drivers.
  - Fixed a few bitmasks on some bitfields definition
  - Fixed the RGB connector mode validation that was not testing the
right values

Maxime Ripard (19):
  clk: composite: Add unregister function
  clk: sunxi: Add display and TCON0 clocks driver
  clk: sunxi: Add PLL3 clock
  clk: sunxi: Add TCON channel1 clock
  dt-bindings: clk: sun5i: add DRAM gates compatible
  ARM: sun5i: dt: Add pll3 and pll7 clocks
  ARM: sun5i: a13: Ad

[PATCH v3 01/19] clk: composite: Add unregister function

[Maxime Ripard]

The composite clock didn't have any unregistration function, which forced
us to use clk_unregister directly on it.

While it was already not great from an API point of view, it also meant
that we were leaking the clk_composite structure allocated in
clk_register_composite.

Add a clk_unregister_composite function to fix this.

Signed-off-by: Maxime Ripard 
---
 drivers/clk/clk-composite.c  | 15 +++
 include/linux/clk-provider.h |  1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 1f903e1f86a2..b0f3b84ebd13 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -286,3 +286,18 @@ err:
kfree(composite);
return clk;
 }
+
+void clk_unregister_composite(struct clk *clk)
+{
+   struct clk_composite *composite;
+   struct clk_hw *hw;
+
+   hw = __clk_get_hw(clk);
+   if (!hw)
+   return;
+
+   composite = to_clk_composite(hw);
+
+   clk_unregister(clk);
+   kfree(composite);
+}
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index da95258127aa..26a8c9b7be71 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -603,6 +603,7 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
unsigned long flags);
+void clk_unregister_composite(struct clk *clk);

 /***
  * struct clk_gpio_gate - gpio gated clock
-- 
2.7.3

[PATCH v3 02/19] clk: sunxi: Add display and TCON0 clocks driver

[Maxime Ripard]

The A10 SoCs and its relatives has a special clock controller to drive the
display engines (both frontend and backend), that have a lot in common with
the clock to drive the first TCON channel.

Add a driver to support both.

Signed-off-by: Maxime Ripard 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/clock/sunxi.txt |   2 +
 drivers/clk/sunxi/Makefile|   1 +
 drivers/clk/sunxi/clk-sun4i-display.c | 262 ++
 3 files changed, 265 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk-sun4i-display.c

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 834436fbe83d..50e212bc8923 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -64,6 +64,7 @@ Required properties:
"allwinner,sun8i-h3-bus-gates-clk" - for the bus gates on H3
"allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80
"allwinner,sun4i-a10-dram-gates-clk" - for the DRAM gates on A10
+   "allwinner,sun4i-a10-display-clk" - for the display clocks on the A10
"allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
"allwinner,sun4i-a10-mmc-clk" - for the MMC clock
"allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
@@ -73,6 +74,7 @@ Required properties:
"allwinner,sun8i-a23-mbus-clk" - for the MBUS clock on A23
"allwinner,sun7i-a20-out-clk" - for the external output clocks
"allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
+   "allwinner,sun4i-a10-tcon-ch0-clk" - for the TCON channel 0 clock on 
the A10
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 3fd7901d48e4..37a6a642a037 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o
 obj-y += clk-a20-gmac.o
 obj-y += clk-mod0.o
 obj-y += clk-simple-gates.o
+obj-y += clk-sun4i-display.o
 obj-y += clk-sun8i-bus-gates.o
 obj-y += clk-sun8i-mbus.o
 obj-y += clk-sun9i-core.o
diff --git a/drivers/clk/sunxi/clk-sun4i-display.c 
b/drivers/clk/sunxi/clk-sun4i-display.c
new file mode 100644
index ..af7d1faebdec
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun4i-display.c
@@ -0,0 +1,262 @@
+/*
+ * Copyright 2015 Maxime Ripard
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct sun4i_a10_display_clk_data {
+   boolhas_div;
+   u8  has_rst;
+   u8  parents;
+
+   u8  offset_en;
+   u8  offset_div;
+   u8  offset_mux;
+   u8  offset_rst;
+
+   u8  width_div;
+   u8  width_mux;
+};
+
+struct reset_data {
+   void __iomem*reg;
+   spinlock_t  *lock;
+   struct reset_controller_dev rcdev;
+   u8  offset;
+};
+
+static DEFINE_SPINLOCK(sun4i_a10_display_lock);
+
+static inline struct reset_data *rcdev_to_reset_data(struct 
reset_controller_dev *rcdev)
+{
+   return container_of(rcdev, struct reset_data, rcdev);
+};
+
+static int sun4i_a10_display_assert(struct reset_controller_dev *rcdev,
+   unsigned long id)
+{
+   struct reset_data *data = rcdev_to_reset_data(rcdev);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(data->lock, flags);
+
+   reg = readl(data->reg);
+   writel(reg & ~BIT(data->offset + id), data->reg);
+
+   spin_unlock_irqrestore(data->lock, flags);
+
+   return 0;
+}
+
+static int sun4i_a10_display_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+   struct reset_data *data = rcdev_to_reset_data(rcdev);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(data->lock, flags);
+
+   reg = readl(data->reg);
+   writel(reg | BIT(data->offset + id), data->reg);
+
+   spin_unlock_irqrestore(data->lock, flags);
+
+   return 0;
+}
+
+static int sun4i_a10_display_status(struct reset_controller_dev *rcdev,
+   unsigned long id)
+{
+   struct reset_data *data = r

[PATCH v3 03/19] clk: sunxi: Add PLL3 clock

[Maxime Ripard]

The A10 SoCs and relatives have a PLL controller to drive the PLL3 and
PLL7, clocked from a 3MHz oscillator, that drives the display related
clocks (GPU, display engine, TCON, etc.)

Add a driver for it.

Acked-by: Rob Herring 
Acked-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
 drivers/clk/sunxi/Makefile|  1 +
 drivers/clk/sunxi/clk-sun4i-pll3.c| 98 +++
 3 files changed, 100 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk-sun4i-pll3.c

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 50e212bc8923..0e1e2c0eee61 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -10,6 +10,7 @@ Required properties:
"allwinner,sun4i-a10-pll1-clk" - for the main PLL clock and PLL4
"allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
"allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
+   "allwinner,sun4i-a10-pll3-clk" - for the video PLL clock on A10
"allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
"allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
"allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 37a6a642a037..244defcfa5db 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -12,6 +12,7 @@ obj-y += clk-a20-gmac.o
 obj-y += clk-mod0.o
 obj-y += clk-simple-gates.o
 obj-y += clk-sun4i-display.o
+obj-y += clk-sun4i-pll3.o
 obj-y += clk-sun8i-bus-gates.o
 obj-y += clk-sun8i-mbus.o
 obj-y += clk-sun9i-core.o
diff --git a/drivers/clk/sunxi/clk-sun4i-pll3.c 
b/drivers/clk/sunxi/clk-sun4i-pll3.c
new file mode 100644
index ..f66267e77d9c
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun4i-pll3.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2015 Maxime Ripard
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SUN4I_A10_PLL3_GATE_BIT31
+#define SUN4I_A10_PLL3_DIV_WIDTH   7
+#define SUN4I_A10_PLL3_DIV_SHIFT   0
+
+static DEFINE_SPINLOCK(sun4i_a10_pll3_lock);
+
+static void __init sun4i_a10_pll3_setup(struct device_node *node)
+{
+   const char *clk_name = node->name, *parent;
+   struct clk_multiplier *mult;
+   struct clk_gate *gate;
+   struct resource res;
+   void __iomem *reg;
+   struct clk *clk;
+   int ret;
+
+   of_property_read_string(node, "clock-output-names", &clk_name);
+   parent = of_clk_get_parent_name(node, 0);
+
+   reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+   if (IS_ERR(reg)) {
+   pr_err("%s: Could not map the clock registers\n", clk_name);
+   return;
+   }
+
+   gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+   if (!gate)
+   goto err_unmap;
+
+   gate->reg = reg;
+   gate->bit_idx = SUN4I_A10_PLL3_GATE_BIT;
+   gate->lock = &sun4i_a10_pll3_lock;
+
+   mult = kzalloc(sizeof(*mult), GFP_KERNEL);
+   if (!mult)
+   goto err_free_gate;
+
+   mult->reg = reg;
+   mult->shift = SUN4I_A10_PLL3_DIV_SHIFT;
+   mult->width = SUN4I_A10_PLL3_DIV_WIDTH;
+   mult->lock = &sun4i_a10_pll3_lock;
+
+   clk = clk_register_composite(NULL, clk_name,
+&parent, 1,
+NULL, NULL,
+&mult->hw, &clk_multiplier_ops,
+&gate->hw, &clk_gate_ops,
+0);
+   if (IS_ERR(clk)) {
+   pr_err("%s: Couldn't register the clock\n", clk_name);
+   goto err_free_mult;
+   }
+
+   ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+   if (ret) {
+   pr_err("%s: Couldn't register DT provider\n",
+  clk_name);
+   goto err_clk_unregister;
+   }
+
+   return;
+
+err_clk_unregister:
+   clk_unregister_composite(clk);
+err_free_mult:
+   kfree(mult);
+err_free_gate:
+   kfree(gate);
+err_unmap:
+   iounmap(reg);
+   of_address_to_resource(node, 0, &res);
+   release_mem_region(res.start, resource_size(&res));
+}
+
+CLK_OF_DECLARE(sun4i_a10_pll3, "allwinner,sun4i-a10-pll3-clk",
+  

[PATCH v3 04/19] clk: sunxi: Add TCON channel1 clock

[Maxime Ripard]

The TCON is a controller generating the timings to output videos signals,
acting like both a CRTC and an encoder.

It has two channels depending on the output, each channel being driven by
its own clock (and own clock controller).

Add a driver for the channel 1 clock.

Signed-off-by: Maxime Ripard 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/clock/sunxi.txt |   1 +
 drivers/clk/sunxi/Makefile|   1 +
 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c| 300 ++
 3 files changed, 302 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 0e1e2c0eee61..54192c1a98dc 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -76,6 +76,7 @@ Required properties:
"allwinner,sun7i-a20-out-clk" - for the external output clocks
"allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
"allwinner,sun4i-a10-tcon-ch0-clk" - for the TCON channel 0 clock on 
the A10
+   "allwinner,sun4i-a10-tcon-ch1-clk" - for the TCON channel 1 clock on 
the A10
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 244defcfa5db..39d2044a1f49 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -13,6 +13,7 @@ obj-y += clk-mod0.o
 obj-y += clk-simple-gates.o
 obj-y += clk-sun4i-display.o
 obj-y += clk-sun4i-pll3.o
+obj-y += clk-sun4i-tcon-ch1.o
 obj-y += clk-sun8i-bus-gates.o
 obj-y += clk-sun8i-mbus.o
 obj-y += clk-sun9i-core.o
diff --git a/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 
b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
new file mode 100644
index ..98a4582de56a
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright 2015 Maxime Ripard
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define TCON_CH1_SCLK2_PARENTS 4
+
+#define TCON_CH1_SCLK2_GATE_BITBIT(31)
+#define TCON_CH1_SCLK2_MUX_MASK3
+#define TCON_CH1_SCLK2_MUX_SHIFT   24
+#define TCON_CH1_SCLK2_DIV_MASK0xf
+#define TCON_CH1_SCLK2_DIV_SHIFT   0
+
+#define TCON_CH1_SCLK1_GATE_BITBIT(15)
+#define TCON_CH1_SCLK1_HALF_BITBIT(11)
+
+struct tcon_ch1_clk {
+   struct clk_hw   hw;
+   spinlock_t  lock;
+   void __iomem*reg;
+};
+
+#define hw_to_tclk(hw) container_of(hw, struct tcon_ch1_clk, hw)
+
+static void tcon_ch1_disable(struct clk_hw *hw)
+{
+   struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(&tclk->lock, flags);
+   reg = readl(tclk->reg);
+   reg &= ~(TCON_CH1_SCLK2_GATE_BIT | TCON_CH1_SCLK1_GATE_BIT);
+   writel(reg, tclk->reg);
+   spin_unlock_irqrestore(&tclk->lock, flags);
+}
+
+static int tcon_ch1_enable(struct clk_hw *hw)
+{
+   struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(&tclk->lock, flags);
+   reg = readl(tclk->reg);
+   reg |= TCON_CH1_SCLK2_GATE_BIT | TCON_CH1_SCLK1_GATE_BIT;
+   writel(reg, tclk->reg);
+   spin_unlock_irqrestore(&tclk->lock, flags);
+
+   return 0;
+}
+
+static int tcon_ch1_is_enabled(struct clk_hw *hw)
+{
+   struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
+   u32 reg;
+
+   reg = readl(tclk->reg);
+   return reg & (TCON_CH1_SCLK2_GATE_BIT | TCON_CH1_SCLK1_GATE_BIT);
+}
+
+static u8 tcon_ch1_get_parent(struct clk_hw *hw)
+{
+   struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
+   int num_parents = clk_hw_get_num_parents(hw);
+   u32 reg;
+
+   reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT;
+   reg &= reg >> TCON_CH1_SCLK2_MUX_MASK;
+
+   if (reg >= num_parents)
+   return -EINVAL;
+
+   return reg;
+}
+
+static int tcon_ch1_set_parent(struct clk_hw *hw, u8 index)
+{
+   struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
+   unsigned long flags;
+   u32 reg;
+
+   spin_lock_irqsave(&tclk->lock, flags);
+   reg = readl(tclk->reg);
+   reg &= ~

[PATCH v3 05/19] dt-bindings: clk: sun5i: add DRAM gates compatible

[Maxime Ripard]

The Allwinner SoCs have a gate controller to gate the access to the DRAM
clock to the some devices that need to access the DRAM directly (mostly
display / image related IPs).

Use a simple gates driver to support the one found in the A13 / R8 SoCs.

Signed-off-by: Maxime Ripard 
Acked-by: Chen-Yu Tsai 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index 54192c1a98dc..e194cda2f469 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -66,6 +66,7 @@ Required properties:
"allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80
"allwinner,sun4i-a10-dram-gates-clk" - for the DRAM gates on A10
"allwinner,sun4i-a10-display-clk" - for the display clocks on the A10
+   "allwinner,sun5i-a13-dram-gates-clk" - for the DRAM gates on A13
"allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
"allwinner,sun4i-a10-mmc-clk" - for the MMC clock
"allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
-- 
2.7.3

[PATCH v3 18/19] ARM: sun5i: r8: Add display blocks to the DTSI

[Maxime Ripard]

The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.

Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it should be moved to sun5i.dtsi

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-r8.dtsi | 137 
 1 file changed, 137 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 691d3de75b35..df20b3b3ecfb 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -57,4 +57,141 @@
status = "disabled";
};
};
+
+   soc at 01c0 {
+   tve0: tv-encoder at 01c0a000 {
+   compatible = "allwinner,sun4i-a10-tv-encoder";
+   reg = <0x01c0a000 0x1000>;
+   clocks = <&ahb_gates 34>;
+   resets = <&tcon_ch0_clk 0>;
+   status = "disabled";
+
+   port {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   tve0_in_tcon0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <&tcon0_out_tve0>;
+   };
+   };
+   };
+
+   tcon0: lcd-controller at 01c0c000 {
+   compatible = "allwinner,sun5i-a13-tcon";
+   reg = <0x01c0c000 0x1000>;
+   interrupts = <44>;
+   resets = <&tcon_ch0_clk 1>;
+   reset-names = "lcd";
+   clocks = <&ahb_gates 36>,
+<&tcon_ch0_clk>,
+<&tcon_ch1_clk>;
+   clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+   clock-output-names = "tcon-pixel-clock";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   tcon0_in: port at 0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+
+   tcon0_in_be0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = 
<&be0_out_tcon0>;
+   };
+   };
+
+   tcon0_out: port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   tcon0_out_tve0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = 
<&tve0_in_tcon0>;
+   };
+   };
+   };
+   };
+
+   fe0: display-frontend at 01e0 {
+   compatible = "allwinner,sun5i-a13-display-frontend";
+   reg = <0x01e0 0x2>;
+   interrupts = <47>;
+   clocks = <&ahb_gates 46>, <&de_fe_clk>,
+<&dram_gates 25>;
+   clock-names = "ahb", "mod",
+ "ram";
+   resets = <&de_fe_clk>;
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   fe0_out: port at 0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <0>;
+
+   fe0_out_be0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <&be0_in_fe0>;
+   };
+   };
+   };
+   };
+
+   be0: display-backend at 01e6 {
+   compatible = "allwinner,sun5i-a13-display-backend";
+   reg = <0x01e6 0x1>;
+   clocks = <&ahb_gates 44>, <&de_be_clk>,
+<&dram_gates 26>;
+

[PATCH v3 06/19] ARM: sun5i: dt: Add pll3 and pll7 clocks

[Maxime Ripard]

Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.

Signed-off-by: Maxime Ripard 
Acked-by: Chen-Yu Tsai 
---
 arch/arm/boot/dts/sun5i.dtsi | 43 +++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 59a9426e3bd4..0840612b5ed6 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -88,6 +88,15 @@
clock-output-names = "osc24M";
};

+   osc3M: osc3M_clk {
+   compatible = "fixed-factor-clock";
+   #clock-cells = <0>;
+   clock-div = <8>;
+   clock-mult = <1>;
+   clocks = <&osc24M>;
+   clock-output-names = "osc3M";
+   };
+
osc32k: clk at 0 {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -112,6 +121,23 @@
 "pll2-4x", "pll2-8x";
};

+   pll3: clk at 01c20010 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun4i-a10-pll3-clk";
+   reg = <0x01c20010 0x4>;
+   clocks = <&osc3M>;
+   clock-output-names = "pll3";
+   };
+
+   pll3x2: pll3x2_clk {
+   compatible = "fixed-factor-clock";
+   #clock-cells = <0>;
+   clock-div = <1>;
+   clock-mult = <2>;
+   clocks = <&pll3>;
+   clock-output-names = "pll3-2x";
+   };
+
pll4: clk at 01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
@@ -136,6 +162,23 @@
clock-output-names = "pll6_sata", "pll6_other", "pll6";
};

+   pll7: clk at 01c20030 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun4i-a10-pll3-clk";
+   reg = <0x01c20030 0x4>;
+   clocks = <&osc3M>;
+   clock-output-names = "pll7";
+   };
+
+   pll7x2: pll7x2_clk {
+   compatible = "fixed-factor-clock";
+   #clock-cells = <0>;
+   clock-div = <1>;
+   clock-mult = <2>;
+   clocks = <&pll7>;
+   clock-output-names = "pll7-2x";
+   };
+
/* dummy is 200M */
cpu: cpu at 01c20054 {
#clock-cells = <0>;
-- 
2.7.3

[PATCH v3 17/19] drm: sun4i: tv: Add NTSC output standard

[Maxime Ripard]

Add the settings to support the NTSC standard.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_tv.c | 45 
 1 file changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index ccf275a90132..bc047f923508 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -178,24 +178,69 @@ struct sun4i_tv {
struct sun4i_drv*drv;
 };

+struct video_levels ntsc_video_levels = {
+   .black = 282,   .blank = 240,
+};
+
 struct video_levels pal_video_levels = {
.black = 252,   .blank = 252,
 };

+struct burst_levels ntsc_burst_levels = {
+   .cb = 79,   .cr = 0,
+};
+
 struct burst_levels pal_burst_levels = {
.cb = 40,   .cr = 40,
 };

+struct color_gains ntsc_color_gains = {
+   .cb = 160,  .cr = 160,
+};
+
 struct color_gains pal_color_gains = {
.cb = 224,  .cr = 224,
 };

+struct resync_parameters ntsc_resync_parameters = {
+   .field = false, .line = 14, .pixel = 12,
+};
+
 struct resync_parameters pal_resync_parameters = {
.field = true,  .line = 13, .pixel = 12,
 };

 struct tv_mode tv_modes[] = {
{
+   .name   = "NTSC",
+   .mode   = SUN4I_TVE_CFG0_RES_480i,
+   .chroma_freq= 0x21f07c1f,
+   .yc_en  = true,
+   .dac3_en= true,
+   .dac_bit25_en   = true,
+
+   .back_porch = 118,
+   .front_porch= 32,
+   .line_number= 525,
+
+   .hdisplay   = 720,
+   .hfront_porch   = 18,
+   .hsync_len  = 2,
+   .hback_porch= 118,
+
+   .vdisplay   = 480,
+   .vfront_porch   = 26,
+   .vsync_len  = 2,
+   .vback_porch= 17,
+
+   .vblank_level   = 240,
+
+   .color_gains= &ntsc_color_gains,
+   .burst_levels   = &ntsc_burst_levels,
+   .video_levels   = &ntsc_video_levels,
+   .resync_params  = &ntsc_resync_parameters,
+   },
+   {
.name   = "PAL",
.mode   = SUN4I_TVE_CFG0_RES_576i,
.chroma_freq= 0x2a098acb,
-- 
2.7.3

[PATCH v3 19/19] ARM: sun5i: chip: Enable the TV Encoder

[Maxime Ripard]

The CHIP has a composite output available muxed with the microphone in the
micro-jack plug.

Enable the composite output in its DTS.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-r8-chip.dts | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts 
b/arch/arm/boot/dts/sun5i-r8-chip.dts
index f6898c6b84d4..a8d8b4582397 100644
--- a/arch/arm/boot/dts/sun5i-r8-chip.dts
+++ b/arch/arm/boot/dts/sun5i-r8-chip.dts
@@ -66,6 +66,10 @@
};
 };

+&be0 {
+   status = "okay";
+};
+
 &codec {
status = "okay";
 };
@@ -188,6 +192,14 @@
status = "okay";
 };

+&tcon0 {
+   status = "okay";
+};
+
+&tve0 {
+   status = "okay";
+};
+
 &uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_b>;
-- 
2.7.3

[PATCH v3 08/19] ARM: sun5i: Add DRAM gates

[Maxime Ripard]

The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.

Enable it.

Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 22 +-
 arch/arm/boot/dts/sun5i-r8.dtsi  |  2 +-
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 9669b03f20f3..d3d2b19c97f1 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -62,7 +62,7 @@
 "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
-<&tcon_ch0_clk>;
+<&tcon_ch0_clk>, <&dram_gates 26>;
status = "disabled";
};
};
@@ -151,6 +151,26 @@
 "apb1_uart3";
};

+   dram_gates: clk at 01c20100 {
+   #clock-cells = <1>;
+   compatible = "allwinner,sun5i-a13-dram-gates-clk",
+"allwinner,sun4i-a10-gates-clk";
+   reg = <0x01c20100 0x4>;
+   clocks = <&pll5 0>;
+   clock-indices = <0>,
+   <1>,
+   <25>,
+   <26>,
+   <29>,
+   <31>;
+   clock-output-names = "dram_ve",
+"dram_csi",
+"dram_de_fe",
+"dram_de_be",
+"dram_ace",
+"dram_iep";
+   };
+
de_be_clk: clk at 01c20104 {
#clock-cells = <0>;
#reset-cells = <0>;
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index b1e4e0170d51..691d3de75b35 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -53,7 +53,7 @@
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ahb_gates 34>, <&ahb_gates 36>,
 <&ahb_gates 44>, <&de_be_clk>,
-<&tcon_ch1_clk>;
+<&tcon_ch1_clk>, <&dram_gates 26>;
status = "disabled";
};
};
-- 
2.7.3

[PATCH v3 09/19] ARM: sun5i: Add TV encoder gate to the DTSI

[Maxime Ripard]

It turns out that the A13 / R8 also have a tve encoder block, and a gate
for it.

Add it to the DT.

Signed-off-by: Maxime Ripard 
Acked-by: Chen-Yu Tsai 
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d3d2b19c97f1..263d46dbc7e6 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -111,8 +111,8 @@
<10>, <13>,
<14>, <20>,
<21>, <22>,
-   <28>, <32>, <36>,
-   <40>, <44>,
+   <28>, <32>, <34>,
+   <36>, <40>, <44>,
<46>, <51>,
<52>;
clock-output-names = "ahb_usbotg", "ahb_ehci",
@@ -121,8 +121,8 @@
 "ahb_mmc2", "ahb_nand",
 "ahb_sdram", "ahb_spi0",
 "ahb_spi1", "ahb_spi2",
-"ahb_stimer", "ahb_ve", "ahb_lcd",
-"ahb_csi", "ahb_de_be",
+"ahb_stimer", "ahb_ve", "ahb_tve",
+"ahb_lcd", "ahb_csi", "ahb_de_be",
 "ahb_de_fe", "ahb_iep",
 "ahb_mali400";
};
-- 
2.7.3

[PATCH v3 13/19] drm: sun4i: Add DT bindings documentation

[Maxime Ripard]

The display pipeline of the Allwinner A10 is involving several loosely
coupled components.

Add a documentation for the bindings.

Signed-off-by: Maxime Ripard 
---
 .../bindings/display/sunxi/sun4i-drm.txt   | 254 +
 1 file changed, 254 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt 
b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
new file mode 100644
index ..378edb919eae
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -0,0 +1,254 @@
+Allwinner A10 Display Pipeline
+==
+
+The Allwinner A10 Display pipeline is composed of several components
+that are going to be documented below:
+
+TV Encoder
+--
+
+The TV Encoder supports the composite and VGA output. It is one end of
+the pipeline.
+
+Required properties:
+ - compatible: value should be "allwinner,sun4i-a10-tv-encoder".
+ - reg: base address and size of memory-mapped region
+ - clocks: the clocks driving the TV encoder
+ - resets: phandle to the reset controller driving the encoder
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoint.
+
+TCON
+
+
+The TCON acts as a timing controller for RGB, LVDS and TV interfaces.
+
+Required properties:
+ - compatible: value should be "allwinner,sun5i-a13-tcon".
+ - reg: base address and size of memory-mapped region
+ - interrupts: interrupt associated to this IP
+ - clocks: phandles to the clocks feeding the TCON. Three are needed:
+   - 'ahb': the interface clocks
+   - 'tcon-ch0': The clock driving the TCON channel 0
+   - 'tcon-ch1': The clock driving the TCON channel 1
+ - resets: phandles to the reset controllers driving the encoder
+   - "lcd": the reset line for the TCON channel 0
+
+ - clock-names: the clock names mentioned above
+ - reset-names: the reset names mentioned above
+ - clock-output-names: Name of the pixel clock created
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoint, the second one the output
+
+Endpoints optional property:
+  - allwinner,panel: boolean to indicate that the endpoint is a panel
+
+
+Display Engine Backend
+--
+
+The display engine backend exposes layers and sprites to the
+system.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun5i-a13-display-backend
+  - reg: base address and size of the memory-mapped region.
+  - clocks: phandles to the clocks feeding the frontend and backend
+* ahb: the backend interface clock
+* mod: the backend module clock
+* ram: the backend DRAM clock
+  - clock-names: the clock names mentioned above
+  - resets: phandles to the reset controllers driving the backend
+
+- ports: A ports node with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt. The
+  first port should be the input endpoints, the second one the output
+
+Display Engine Frontend
+---
+
+The display engine frontend does formats conversion, scaling,
+deinterlacing and color space conversion.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun5i-a13-display-frontend
+  - reg: base address and size of the memory-mapped region.
+  - interrupts: interrupt associated to this IP
+  - clocks: phandles to the clocks feeding the frontend and backend
+* ahb: the backend interface clock
+* mod: the backend module clock
+* ram: the backend DRAM clock
+  - clock-names: the clock names mentioned above
+  - resets: phandles to the reset controllers driving the backend
+
+Display Engine Pipeline
+---
+
+The display engine pipeline (and its entry point, since it can be
+either directly the backend or the frontend) is represented as an
+extra node.
+
+Required properties:
+  - compatible: value must be one of:
+* allwinner,sun5i-a13-display-engine
+  - allwinner,pipelines: list of phandle to the entry points of the
+pipelines (either to the frontend or backend)
+
+Example:
+
+panel: panel {
+   compatible = "olimex,lcd-olinuxino-43-ts";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port at 0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   panel_input: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <&tcon0_out_panel>;
+   };
+   };
+};
+
+tve0: tv-encoder at 01c0a000 {
+   compatible = "allwinner,sun4i-a10-tv-encoder";
+   reg = <0x01c0a000 0x1000>;
+   clocks = <&ahb_gates 34>;
+   resets = <&tcon_ch0_clk 0>;
+
+   port {
+  

[PATCH v3 07/19] ARM: sun5i: a13: Add display and TCON clocks

[Maxime Ripard]

Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.

Acked-by: Chen-Yu Tsai 
Signed-off-by: Maxime Ripard 
---
 arch/arm/boot/dts/sun5i-a13.dtsi | 38 +-
 arch/arm/boot/dts/sun5i-r8.dtsi  |  5 +++--
 2 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d910d3a6c41c..9669b03f20f3 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -61,7 +61,8 @@
compatible = "allwinner,simple-framebuffer",
 "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
-   clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+   clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
+<&tcon_ch0_clk>;
status = "disabled";
};
};
@@ -149,6 +150,41 @@
 "apb1_i2c2", "apb1_uart1",
 "apb1_uart3";
};
+
+   de_be_clk: clk at 01c20104 {
+   #clock-cells = <0>;
+   #reset-cells = <0>;
+   compatible = "allwinner,sun4i-a10-display-clk";
+   reg = <0x01c20104 0x4>;
+   clocks = <&pll3>, <&pll7>, <&pll5 1>;
+   clock-output-names = "de-be";
+   };
+
+   de_fe_clk: clk at 01c2010c {
+   #clock-cells = <0>;
+   #reset-cells = <0>;
+   compatible = "allwinner,sun4i-a10-display-clk";
+   reg = <0x01c2010c 0x4>;
+   clocks = <&pll3>, <&pll7>, <&pll5 1>;
+   clock-output-names = "de-fe";
+   };
+
+   tcon_ch0_clk: clk at 01c20118 {
+   #clock-cells = <0>;
+   #reset-cells = <1>;
+   compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
+   reg = <0x01c20118 0x4>;
+   clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+   clock-output-names = "tcon-ch0-sclk";
+   };
+
+   tcon_ch1_clk: clk at 01c2012c {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
+   reg = <0x01c2012c 0x4>;
+   clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+   clock-output-names = "tcon-ch1-sclk";
+   };
};

soc at 01c0 {
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 0ef865601ac9..b1e4e0170d51 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -51,8 +51,9 @@
compatible = "allwinner,simple-framebuffer",
 "simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
-   clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
-<&ahb_gates 44>;
+   clocks = <&ahb_gates 34>, <&ahb_gates 36>,
+<&ahb_gates 44>, <&de_be_clk>,
+<&tcon_ch1_clk>;
status = "disabled";
};
};
-- 
2.7.3

[PATCH v3 14/19] drm: sun4i: Add RGB output

[Maxime Ripard]

One of the A10 display pipeline possible output is an RGB interface to
drive LCD panels directly. This is done through the first channel of the
TCON that will output our video signals directly.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/Makefile |   1 +
 drivers/gpu/drm/sun4i/sun4i_drv.c  |   7 ++
 drivers/gpu/drm/sun4i/sun4i_rgb.c  | 234 +
 drivers/gpu/drm/sun4i/sun4i_rgb.h  |  18 +++
 drivers/gpu/drm/sun4i/sun4i_tcon.c |  48 +++-
 drivers/gpu/drm/sun4i/sun4i_tcon.h |   2 +
 6 files changed, 309 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_rgb.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_rgb.h

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 6df3ef32732d..830abb9b2b74 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -2,6 +2,7 @@ sun4i-drm-y += sun4i_crtc.o
 sun4i-drm-y += sun4i_drv.o
 sun4i-drm-y += sun4i_framebuffer.o
 sun4i-drm-y += sun4i_layer.o
+sun4i-drm-y += sun4i_rgb.o

 sun4i-tcon-y += sun4i_tcon.o
 sun4i-tcon-y += sun4i_dotclock.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c 
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 5c64d2105dc7..5ba66ca5258b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -244,6 +244,13 @@ static int sun4i_drv_add_endpoints(struct device *dev,
}

for_each_available_child_of_node(port, ep) {
+   /*
+* If the node is a panel, don't register it into the
+* component framework
+*/
+   if (of_property_read_bool(ep, "allwinner,panel"))
+   continue;
+
remote = of_graph_get_remote_port_parent(ep);
if (!remote) {
DRM_DEBUG_DRIVER("Error retrieving the output node\n");
diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c 
b/drivers/gpu/drm/sun4i/sun4i_rgb.c
new file mode 100644
index ..dd0dcc6cdc26
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -0,0 +1,234 @@
+/*
+ * Copyright (C) 2015 Free Electrons
+ * Copyright (C) 2015 NextThing Co
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sun4i_drv.h"
+#include "sun4i_tcon.h"
+
+struct sun4i_rgb {
+   struct drm_connectorconnector;
+   struct drm_encoder  encoder;
+
+   struct sun4i_drv*drv;
+};
+
+static inline struct sun4i_rgb *
+drm_connector_to_sun4i_rgb(struct drm_connector *connector)
+{
+   return container_of(connector, struct sun4i_rgb,
+   connector);
+}
+
+static inline struct sun4i_rgb *
+drm_encoder_to_sun4i_rgb(struct drm_encoder *encoder)
+{
+   return container_of(encoder, struct sun4i_rgb,
+   encoder);
+}
+
+static int sun4i_rgb_get_modes(struct drm_connector *connector)
+{
+   struct sun4i_rgb *rgb =
+   drm_connector_to_sun4i_rgb(connector);
+   struct sun4i_drv *drv = rgb->drv;
+   struct sun4i_tcon *tcon = drv->tcon;
+
+   return drm_panel_get_modes(tcon->panel);
+}
+
+static int sun4i_rgb_mode_valid(struct drm_connector *connector,
+   struct drm_display_mode *mode)
+{
+   u32 hsync = mode->hsync_end - mode->hsync_start;
+   u32 vsync = mode->vsync_end - mode->vsync_start;
+
+   DRM_DEBUG_DRIVER("Validating modes...\n");
+
+   if ((hsync < 1) || (hsync > 0x3ff) ||
+   (mode->htotal < 1) || (mode->htotal > 0xfff))
+   return MODE_H_ILLEGAL;
+
+   DRM_DEBUG_DRIVER("Horizontal parameters OK\n");
+
+   if ((vsync < 1) || (vsync > 0x3ff) ||
+   (mode->vtotal < 1) || (mode->vtotal > 0xfff))
+   return MODE_V_ILLEGAL;
+
+   DRM_DEBUG_DRIVER("Vertical parameters OK\n");
+
+   return MODE_OK;
+}
+
+static struct drm_encoder *
+sun4i_rgb_best_encoder(struct drm_connector *connector)
+{
+   struct sun4i_rgb *rgb =
+   drm_connector_to_sun4i_rgb(connector);
+
+   return &rgb->encoder;
+}
+
+static struct drm_connector_helper_funcs sun4i_rgb_con_helper_funcs = {
+   .get_modes  = sun4i_rgb_get_modes,
+   .mode_valid = sun4i_rgb_mode_valid,
+   .best_encoder   = sun4i_rgb_best_encoder,
+};
+
+static enum drm_connector_status
+sun4i_rgb_connector_detect(struct drm_connector *connector, bool force)
+{
+   return connector_status_connected;
+}
+
+static void
+sun4i_rgb_connector_destroy(struct drm_connector *connector)
+{
+   struct sun4i_rgb *rgb = drm_connector_to_sun4i_rgb(connector);
+   struct sun4i_drv *drv = rgb->drv;
+   struct sun4i_tcon *tcon = drv->tcon;
+
+   drm_panel_

[PATCH v3 15/19] drm: sun4i: Add composite output

[Maxime Ripard]

Some Allwinner SoCs have an IP called the TV encoder that is used to output
composite and VGA signals. In such a case, we need to use the second TCON
channel.

Add support for that TV encoder.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/Makefile   |   2 +
 drivers/gpu/drm/sun4i/sun4i_tv.c | 621 +++
 2 files changed, 623 insertions(+)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.c

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 830abb9b2b74..c93498f6a795 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -9,3 +9,5 @@ sun4i-tcon-y += sun4i_dotclock.o

 obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o
 obj-$(CONFIG_DRM_SUN4I)+= sun4i_backend.o
+
+obj-$(CONFIG_DRM_SUN4I)+= sun4i_tv.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
new file mode 100644
index ..78634dfc0f77
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -0,0 +1,621 @@
+/*
+ * Copyright (C) 2015 Free Electrons
+ * Copyright (C) 2015 NextThing Co
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sun4i_backend.h"
+#include "sun4i_drv.h"
+#include "sun4i_tcon.h"
+
+#define SUN4I_TVE_EN_REG   0x000
+#define SUN4I_TVE_EN_DAC_MAP_MASK  GENMASK(19, 4)
+#define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4)
+#define SUN4I_TVE_EN_ENABLEBIT(0)
+
+#define SUN4I_TVE_CFG0_REG 0x004
+#define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26)
+#define SUN4I_TVE_CFG0_CORE_DATAPATH_54M   BIT(25)
+#define SUN4I_TVE_CFG0_CORE_CONTROL_54MBIT(24)
+#define SUN4I_TVE_CFG0_YC_EN   BIT(17)
+#define SUN4I_TVE_CFG0_COMP_EN BIT(16)
+#define SUN4I_TVE_CFG0_RES(x)  ((x) & 0xf)
+#define SUN4I_TVE_CFG0_RES_480iSUN4I_TVE_CFG0_RES(0)
+#define SUN4I_TVE_CFG0_RES_576iSUN4I_TVE_CFG0_RES(1)
+
+#define SUN4I_TVE_DAC0_REG 0x008
+#define SUN4I_TVE_DAC0_CLOCK_INVERTBIT(24)
+#define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20)
+#define SUN4I_TVE_DAC0_LUMA_0_4SUN4I_TVE_DAC0_LUMA(3)
+#define SUN4I_TVE_DAC0_CHROMA(x)   (((x) & 3) << 18)
+#define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3)
+#define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16)
+#define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS  SUN4I_TVE_DAC0_INTERNAL_DAC(3)
+#define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac)
+
+#define SUN4I_TVE_NOTCH_REG0x00c
+#define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x)((4 - (x)) << (dac * 3))
+
+#define SUN4I_TVE_CHROMA_FREQ_REG  0x010
+
+#define SUN4I_TVE_PORCH_REG0x014
+#define SUN4I_TVE_PORCH_BACK(x)((x) << 16)
+#define SUN4I_TVE_PORCH_FRONT(x)   (x)
+
+#define SUN4I_TVE_LINE_REG 0x01c
+#define SUN4I_TVE_LINE_FIRST(x)((x) << 16)
+#define SUN4I_TVE_LINE_NUMBER(x)   (x)
+
+#define SUN4I_TVE_LEVEL_REG0x020
+#define SUN4I_TVE_LEVEL_BLANK(x)   ((x) << 16)
+#define SUN4I_TVE_LEVEL_BLACK(x)   (x)
+
+#define SUN4I_TVE_DAC1_REG 0x024
+#define SUN4I_TVE_DAC1_AMPLITUDE(dac, x)   ((x) << (dac * 8))
+
+#define SUN4I_TVE_DETECT_STA_REG   0x038
+#define SUN4I_TVE_DETECT_STA_DAC(dac)  BIT((dac * 8))
+#define SUN4I_TVE_DETECT_STA_UNCONNECTED   0
+#define SUN4I_TVE_DETECT_STA_CONNECTED 1
+#define SUN4I_TVE_DETECT_STA_GROUND2
+
+#define SUN4I_TVE_CB_CR_LVL_REG0x10c
+#define SUN4I_TVE_CB_CR_LVL_CR_BURST(x)((x) << 8)
+#define SUN4I_TVE_CB_CR_LVL_CB_BURST(x)(x)
+
+#define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110
+#define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x)   (x)
+
+#define SUN4I_TVE_BURST_WIDTH_REG  0x114
+#define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16)
+#define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x)   ((x) << 8)
+#define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x)   (x)
+
+#define SUN4I_TVE_CB_CR_GAIN_REG   0x118
+#define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8)
+#define SUN4I_TVE_CB_CR_GAIN_CB(x) (x)
+
+#define SUN4I_TVE_SYNC_VBI_REG 0x11c
+#define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16)
+#define SUN4I_TVE_SYNC_VBI_VBLANK(x)   (x)
+
+#define SUN4I_TVE_ACTIVE_LINE_REG  0x124
+#define SUN4I_TVE_ACTIVE_LINE(x)   (x

[PATCH v3 11/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS

[Maxime Ripard]

Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.

It is a 480x272 panel connected through a 24-bits RGB interface.

Signed-off-by: Maxime Ripard 
Acked-by: Rob Herring 
---
 .../display/panel/olimex,lcd-olinuxino-43-ts.txt   |  7 ++
 drivers/gpu/drm/panel/panel-simple.c   | 26 ++
 2 files changed, 33 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino-43-ts.txt

diff --git 
a/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino-43-ts.txt
 
b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino-43-ts.txt
new file mode 100644
index ..74540a090669
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino-43-ts.txt
@@ -0,0 +1,7 @@
+Olimex 4.3" TFT LCD panel
+
+Required properties:
+- compatible: should be "olimex,lcd-olinuxino-43-ts"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c 
b/drivers/gpu/drm/panel/panel-simple.c
index ceb20486dacf..f95abdbde147 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1084,6 +1084,29 @@ static const struct panel_desc okaya_rs800480t_7x0gp = {
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
 };

+static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = {
+   .clock = 9000,
+   .hdisplay = 480,
+   .hsync_start = 480 + 5,
+   .hsync_end = 480 + 5 + 30,
+   .htotal = 480 + 5 + 30 + 10,
+   .vdisplay = 272,
+   .vsync_start = 272 + 8,
+   .vsync_end = 272 + 8 + 5,
+   .vtotal = 272 + 8 + 5 + 3,
+   .vrefresh = 60,
+};
+
+static const struct panel_desc olimex_lcd_olinuxino_43ts = {
+   .modes = &olimex_lcd_olinuxino_43ts_mode,
+   .num_modes = 1,
+   .size = {
+   .width = 105,
+   .height = 67,
+   },
+   .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
 static const struct drm_display_mode ortustech_com43h4m85ulc_mode  = {
.clock = 25000,
.hdisplay = 480,
@@ -1329,6 +1352,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "okaya,rs800480t-7x0gp",
.data = &okaya_rs800480t_7x0gp,
}, {
+   .compatible = "olimex,lcd-olinuxino-43-ts",
+   .data = &olimex_lcd_olinuxino_43ts,
+   }, {
.compatible = "ortustech,com43h4m85ulc",
.data = &ortustech_com43h4m85ulc,
}, {
-- 
2.7.3

[PATCH v3 10/19] drm: fb: Add seq_file definition

[Maxime Ripard]

Otherwise, building with DEBUG_FS enabled will trigger a build warning
because we're using a structure that has not been declared.

Signed-off-by: Maxime Ripard 
---
 include/drm/drm_fb_cma_helper.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/drm/drm_fb_cma_helper.h b/include/drm/drm_fb_cma_helper.h
index be62bd321e75..ae49c24fbf50 100644
--- a/include/drm/drm_fb_cma_helper.h
+++ b/include/drm/drm_fb_cma_helper.h
@@ -24,6 +24,8 @@ struct drm_gem_cma_object *drm_fb_cma_get_gem_obj(struct 
drm_framebuffer *fb,
unsigned int plane);

 #ifdef CONFIG_DEBUG_FS
+struct seq_file;
+
 int drm_fb_cma_debugfs_show(struct seq_file *m, void *arg);
 #endif

-- 
2.7.3

[PATCH v3 12/19] drm: Add Allwinner A10 Display Engine support

[Maxime Ripard]

The Allwinner A10 and subsequent SoCs share the same display pipeline, with
variations in the number of controllers (1 or 2), or the presence or not of
some output (HDMI, TV, VGA) or not.

Add a driver with a limited set of features for now, and we will hopefully
support all of them eventually

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/Kconfig   |   2 +
 drivers/gpu/drm/Makefile  |   3 +-
 drivers/gpu/drm/sun4i/Kconfig |  14 +
 drivers/gpu/drm/sun4i/Makefile|  10 +
 drivers/gpu/drm/sun4i/sun4i_backend.c | 364 ++
 drivers/gpu/drm/sun4i/sun4i_backend.h | 165 ++
 drivers/gpu/drm/sun4i/sun4i_crtc.c| 120 
 drivers/gpu/drm/sun4i/sun4i_crtc.h|  30 ++
 drivers/gpu/drm/sun4i/sun4i_dotclock.c| 160 ++
 drivers/gpu/drm/sun4i/sun4i_dotclock.h|  21 ++
 drivers/gpu/drm/sun4i/sun4i_drv.c | 319 +++
 drivers/gpu/drm/sun4i/sun4i_drv.h |  30 ++
 drivers/gpu/drm/sun4i/sun4i_framebuffer.c |  54 
 drivers/gpu/drm/sun4i/sun4i_framebuffer.h |  19 ++
 drivers/gpu/drm/sun4i/sun4i_layer.c   | 161 ++
 drivers/gpu/drm/sun4i/sun4i_layer.h   |  30 ++
 drivers/gpu/drm/sun4i/sun4i_tcon.c| 492 ++
 drivers/gpu/drm/sun4i/sun4i_tcon.h| 184 +++
 18 files changed, 2177 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/sun4i/Kconfig
 create mode 100644 drivers/gpu/drm/sun4i/Makefile
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_backend.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_backend.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_crtc.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_crtc.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_dotclock.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_dotclock.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_drv.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_drv.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_framebuffer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_framebuffer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_layer.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_layer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_tcon.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_tcon.h

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index f2a74d0b68ae..420779064e49 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -252,6 +252,8 @@ source "drivers/gpu/drm/rcar-du/Kconfig"

 source "drivers/gpu/drm/shmobile/Kconfig"

+source "drivers/gpu/drm/sun4i/Kconfig"
+
 source "drivers/gpu/drm/omapdrm/Kconfig"

 source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 6eb94fc561dc..e163fd3cd604 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -1,4 +1,4 @@
-#
+
 # Makefile for the drm device driver.  This driver provides support for the
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.

@@ -65,6 +65,7 @@ obj-$(CONFIG_DRM_ATMEL_HLCDC) += atmel-hlcdc/
 obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/
 obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
 obj-y  += omapdrm/
+obj-$(CONFIG_DRM_SUN4I) += sun4i/
 obj-y  += tilcdc/
 obj-$(CONFIG_DRM_QXL) += qxl/
 obj-$(CONFIG_DRM_BOCHS) += bochs/
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
new file mode 100644
index ..99510e64e91a
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -0,0 +1,14 @@
+config DRM_SUN4I
+   tristate "DRM Support for Allwinner A10 Display Engine"
+   depends on DRM && ARM
+   depends on ARCH_SUNXI || COMPILE_TEST
+   select DRM_GEM_CMA_HELPER
+   select DRM_KMS_HELPER
+   select DRM_KMS_CMA_HELPER
+   select DRM_PANEL
+   select REGMAP_MMIO
+   select VIDEOMODE_HELPERS
+   help
+ Choose this option if you have an Allwinner SoC with a
+ Display Engine. If M is selected the module will be called
+ sun4i-drm.
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
new file mode 100644
index ..6df3ef32732d
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -0,0 +1,10 @@
+sun4i-drm-y += sun4i_crtc.o
+sun4i-drm-y += sun4i_drv.o
+sun4i-drm-y += sun4i_framebuffer.o
+sun4i-drm-y += sun4i_layer.o
+
+sun4i-tcon-y += sun4i_tcon.o
+sun4i-tcon-y += sun4i_dotclock.o
+
+obj-$(CONFIG_DRM_SUN4I)+= sun4i-drm.o sun4i-tcon.o
+obj-$(CONFIG_DRM_SUN4I)+= sun4i_backend.o
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c 
b/drivers/gpu/drm/sun4i/sun4i_backend.c
new file mode 100644
index ..f7a15c1a93bf
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -0,0 +1,364 @@
+/*
+ * Copyright (C) 2015 Free Electrons
+ * Copyright (C) 2015 NextThing Co
+ *
+ * Maxime Ripard 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it un

[PATCH v3 16/19] drm: sun4i: tv: Add PAL output standard

[Maxime Ripard]

Now that we have support for the composite output, we can start adding new
supported standards. Start with PAL, and we will add other eventually.

Signed-off-by: Maxime Ripard 
---
 drivers/gpu/drm/sun4i/sun4i_tv.c | 42 
 1 file changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 78634dfc0f77..ccf275a90132 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -178,7 +178,49 @@ struct sun4i_tv {
struct sun4i_drv*drv;
 };

+struct video_levels pal_video_levels = {
+   .black = 252,   .blank = 252,
+};
+
+struct burst_levels pal_burst_levels = {
+   .cb = 40,   .cr = 40,
+};
+
+struct color_gains pal_color_gains = {
+   .cb = 224,  .cr = 224,
+};
+
+struct resync_parameters pal_resync_parameters = {
+   .field = true,  .line = 13, .pixel = 12,
+};
+
 struct tv_mode tv_modes[] = {
+   {
+   .name   = "PAL",
+   .mode   = SUN4I_TVE_CFG0_RES_576i,
+   .chroma_freq= 0x2a098acb,
+
+   .back_porch = 138,
+   .front_porch= 24,
+   .line_number= 625,
+
+   .hdisplay   = 720,
+   .hfront_porch   = 3,
+   .hsync_len  = 2,
+   .hback_porch= 139,
+
+   .vdisplay   = 576,
+   .vfront_porch   = 28,
+   .vsync_len  = 2,
+   .vback_porch= 19,
+
+   .vblank_level   = 252,
+
+   .color_gains= &pal_color_gains,
+   .burst_levels   = &pal_burst_levels,
+   .video_levels   = &pal_video_levels,
+   .resync_params  = &pal_resync_parameters,
+   },
 };

 static inline struct sun4i_tv *
-- 
2.7.3

[PATCH] drm: Add support for EDID injection.

[Marius Vlad]

Allow the possibility to return an copy of the injected EDID when the connector
has been forced and an EDID has been specified over the debugfs interface.

Signed-off-by: Marius Vlad 
---
 drivers/gpu/drm/drm_edid.c | 23 ---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 414d7f6..239f9b1 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1075,6 +1075,19 @@ static bool drm_edid_is_zero(const u8 *in_edid, int 
length)
return true;
 }

+static struct edid *
+drm_do_get_override_edid(struct drm_connector *connector)
+{
+   struct edid *edid = NULL;
+
+   if (connector->override_edid && connector->edid_blob_ptr->data) {
+   edid = kmemdup(connector->edid_blob_ptr->data,
+  connector->edid_blob_ptr->length, GFP_KERNEL);
+   }
+
+   return edid;
+}
+
 /**
  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
  * @raw_edid: pointer to raw EDID block
@@ -1385,10 +1398,14 @@ struct edid *drm_get_edid(struct drm_connector 
*connector,
 {
struct edid *edid;

-   if (!drm_probe_ddc(adapter))
-   return NULL;
+   if (!connector->override_edid) {
+   if (!drm_probe_ddc(adapter))
+   return NULL;
+   edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, 
adapter);
+   } else {
+   edid = drm_do_get_override_edid(connector);
+   }

-   edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
if (edid)
drm_get_displayid(connector, edid);
return edid;
-- 
2.5.0

[RFC 1/5] drm: Add DRM support for tiny LCD displays

[Noralf Trønnes]

Den 18.03.2016 18:47, skrev Daniel Vetter:
> On Thu, Mar 17, 2016 at 10:51:55PM +0100, Noralf Trønnes wrote:
>> Den 16.03.2016 16:11, skrev Daniel Vetter:
>>> On Wed, Mar 16, 2016 at 02:34:15PM +0100, Noralf Trønnes wrote:
 tinydrm provides a very simplified view of DRM for displays that has
 onboard video memory and is connected through a slow bus like SPI/I2C.

 Signed-off-by: Noralf Trønnes 
>>> Yay, it finally happens! I already made a comment on the cover letter
>>> about the fbdev stuff, I think that's the biggest part to split out from
>>> tinydrm here. I'm not entirely sure a detailed code review makes sense
>>> before that part is done (and hey we can start merging already), so just a
>>> high level review for now:
[...]
>
>>> In the case of tinydrm I think that means we should have a bunch of new
>>> drm helpers, or extensions for existing ones:
>>> - fbdev deferred io support using ->dirtyfb in drm_fb_helper.c.
>> Are you thinking something like this?
>>
>> struct drm_fb_helper_funcs {
>>  int (*dirtyfb)(struct drm_fb_helper *fb_helper,
>> struct drm_clip_rect *clip);
> We already have a dirty_fb function in
> dev->mode_config->funcs->dirty_fb(). This is the official interface native
> drm/kms userspace is supposed to use to flush frontbuffer rendering. The
> xfree86-video-modesetting driver uses it.

I couldn't find this dirty_fb() function, but I assume you mean
drm_framebuffer_funcs.dirty().

>> };
>>
>> struct drm_fb_helper {
>>  spinlock_t dirty_lock;
>>  struct drm_clip_rect *dirty_clip;
>> };
> Yeah, this part is needed for the delayed work for the fbdev helper.

> struct work dirty_fb_work; is missing.

This confuses me.
If we have this then there's no need for a fb->funcs->dirty() call,
the driver can just add a work function here instead.

Possible fb dirty() call chain:
Calls to drm_fb_helper_sys_* or mmap page writes will schedule
fb_info->deferred_work. The worker func fb_deferred_io_work() calls
fb_info->fbdefio->deferred_io().
Then deferred_io() can call fb_helper->fb->funcs->dirty().

In my use-case this dirty() function would schedule a delayed_work to run
immediately since it has already been deferred collecting changes.
The regular drm side framebuffer dirty() collects damage and schedules
the same worker to run deferred.

I don't see an easy way for a driver to set the dirty() function in
drm_fb_cma_helper apart from doing this:

  struct drm_fbdev_cma {
  struct drm_fb_helperfb_helper;
  struct drm_fb_cma   *fb;
+int (*dirty)(struct drm_framebuffer *framebuffer,
+ struct drm_file *file_priv, unsigned flags,
+ unsigned color, struct drm_clip_rect *clips,
+ unsigned num_clips);
  };


>> Initially I used drm_fb_cma_helper.c with some added deferred code.
>> This worked fine for fbcon, but the deferred mmap part didn't work well.
>> For instance when using fbtest, I got short random horizontal lines on the
>> display that didn't contain the latest pixels. I had to write several times
>> to /dev/fb1 to trigger a display update to get all the previous pixels to go
>> away and get the current image. Maybe it's some caching issue, I don't know.
>> The Raspberry Pi doesn't support 16-bit SPI, so tinydrm does a byte swap to
>> a new buffer before sending it using 8-bit.
>> Maybe I need to call some kind of DMA sync function?
> drm_fb_cma_helper is for creating drm_framebuffer backed by cma allocator
> objects. How you create drm_framebuffer is orthogonal to whether you have
> a ->dirty_fb hook (and hence needed defio support in fbdev) or not. E.g.
> maybe some SPI device has a dma engine, and hence you want to allocate
> drm_framebuffer using cma. On others with an i2c bus you want to just
> allocate kernel memory, since the cpu will copy the data anyway.
>
> That's why I think we need to make sure this split is still maintained.
>
>> The dumb buffer uses drm_gem_cma_dumb_create() which is backed by cma, and
>> that works just fine (I have only tested with David Herrmann's modeset[1]).
>> A similar byte swapping happens here.
>>
>> I also had to do this for the deferred io to work:
>>
>> info->fix.smem_start = __pa(info->screen_base);
>>
>> drm_fb_cma_helper assigns the dma address to smem_start, but at least on
>> the Raspberry Pi this bus address can't be used by deferred_io
>> (fb_deferred_io_fault()). And the ARM version of __pa states that it
>> shouldn't be used by drivers, so when my vmalloc version worked, I went
>> with that. But I see that there's a virt_to_phys() function that doesn't
>> have that statement about not being used by drivers, so maybe this isn't
>> a show stopper after all?
>>
>> Any thoughts on this problem? I would rather have a cma backed fbdev
>> framebuffer since that would give me the same type of memory both for
>> fbdev and DRM.
> Hm, tbh I have no clear idea who fbdev fb memory mapping workings. The
> above comme

[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

--- Comment #3 from Vladislav Kamenev  ---
(In reply to Michel D�nzer from comment #2)
> Is this a duplicate of bug 94581?

Nope. That was my failure.
I used DRI3 instead of DRI2 at that time and managed to pass that problem.
Now i got artifacts without any feedback from kernel\xorg

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[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

--- Comment #4 from Vladislav Kamenev  ---
Created attachment 122502
  --> https://bugs.freedesktop.org/attachment.cgi?id=122502&action=edit
stderr of $ LIBGL_DEBUG=verbose DRI_PRIME=1 glxinfo 2> stderr

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[Bug 94667] Artifacts on applications on discrete

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=94667

--- Comment #5 from Vladislav Kamenev  ---
Created attachment 122503
  --> https://bugs.freedesktop.org/attachment.cgi?id=122503&action=edit
Xorg.0.log

Logged into Steam.
Waited till artifacts appear.
Published log

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Upstreaming DAL

[Alex Deucher]

Our goal is to transition to our new DAL display stack.  It is the
path we are validating internally for both the open and hybrid stacks
and will be the only display stack we support going forward with new
asics.  When we initially released the patches, there were some rough
edges and quite a few things were pointed out that need to be fixed.
Some are relatively easy to fix, others will take time.  Our goal is
to make those changes.  We'd like to target 4.7 for upstreaming DAL.
To that end, I think it would be easier to review and track our
progress if I maintained a public DAL branch and send out patches
against that branch rather than respinning giant squashed patches
every time we fix something.  It's much harder to track what progress
has been made.  DAL is currently at ~400 patches.  We previously tried
to squash that down into a bunch of larger commits, but I'm not sure
that is particularly easy to review.  I'm also not sure it's worth
spamming the list with 400 patches.  I've posted our current DAL tree
here for review:
https://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.7-wip-dal
I can certainly send out the patches if that is preferred.  We will be
sending out all new patches to the list as the further clean up tasks
and new features are implemented.

Our goal is to fix the following items in time for 4.7.  Additional
fixes and re-factoring will continue as we work to address all of the
comments and concerns.

Tasks to be completed for 4.7:
- Remove (malloc/free/sleep/delay/etc.) wrappers for building DAL in
userspace (done)
- Switch to using Linux i2c subsystem (done)
- Switch to using Linux drm aux interface (in progress)
- Convert cursors to planes API (in progress)
- Switch to native drm EDID fetching (in progress)

Tasks post 4.7 (we will attempt to fix these sooner as time permits):
- Using common Linux infoframe infrastructure
- Migrating to common logging infrastructure
- Refactoring DC

Current DAL status:
- DCE8 Support (Hawaii, Bonaire)
- DCE10 Support (Fiji, Tonga)
- DCE11 Support (CZ, ST)
- DP support (SST, MST, Audio)
- HDMI Support
- HDMI 2.0 Support (on supported asics)
- DVI Support
- Full integration with power management
- Atomic KMS support
- Solid 4K at 60 Support

Thanks,

Alex

[RFC 1/5] drm: Add DRM support for tiny LCD displays

[Daniel Vetter]

On Wed, Mar 23, 2016 at 06:07:56PM +0100, Noralf Trønnes wrote:
> 
> Den 18.03.2016 18:47, skrev Daniel Vetter:
> >On Thu, Mar 17, 2016 at 10:51:55PM +0100, Noralf Trønnes wrote:
> >>Den 16.03.2016 16:11, skrev Daniel Vetter:
> >>>On Wed, Mar 16, 2016 at 02:34:15PM +0100, Noralf Trønnes wrote:
> tinydrm provides a very simplified view of DRM for displays that has
> onboard video memory and is connected through a slow bus like SPI/I2C.
> 
> Signed-off-by: Noralf Trønnes 
> >>>Yay, it finally happens! I already made a comment on the cover letter
> >>>about the fbdev stuff, I think that's the biggest part to split out from
> >>>tinydrm here. I'm not entirely sure a detailed code review makes sense
> >>>before that part is done (and hey we can start merging already), so just a
> >>>high level review for now:
> [...]
> >
> >>>In the case of tinydrm I think that means we should have a bunch of new
> >>>drm helpers, or extensions for existing ones:
> >>>- fbdev deferred io support using ->dirtyfb in drm_fb_helper.c.
> >>Are you thinking something like this?
> >>
> >>struct drm_fb_helper_funcs {
> >> int (*dirtyfb)(struct drm_fb_helper *fb_helper,
> >>struct drm_clip_rect *clip);
> >We already have a dirty_fb function in
> >dev->mode_config->funcs->dirty_fb(). This is the official interface native
> >drm/kms userspace is supposed to use to flush frontbuffer rendering. The
> >xfree86-video-modesetting driver uses it.
> 
> I couldn't find this dirty_fb() function, but I assume you mean
> drm_framebuffer_funcs.dirty().

Yup.

> >>};
> >>
> >>struct drm_fb_helper {
> >> spinlock_t dirty_lock;
> >> struct drm_clip_rect *dirty_clip;
> >>};
> >Yeah, this part is needed for the delayed work for the fbdev helper.
> 
> >struct work dirty_fb_work; is missing.
> 
> This confuses me.
> If we have this then there's no need for a fb->funcs->dirty() call,
> the driver can just add a work function here instead.
> 
> Possible fb dirty() call chain:
> Calls to drm_fb_helper_sys_* or mmap page writes will schedule
> fb_info->deferred_work. The worker func fb_deferred_io_work() calls
> fb_info->fbdefio->deferred_io().
> Then deferred_io() can call fb_helper->fb->funcs->dirty().
> 
> In my use-case this dirty() function would schedule a delayed_work to run
> immediately since it has already been deferred collecting changes.
> The regular drm side framebuffer dirty() collects damage and schedules
> the same worker to run deferred.
> 
> I don't see an easy way for a driver to set the dirty() function in
> drm_fb_cma_helper apart from doing this:
> 
>  struct drm_fbdev_cma {
>  struct drm_fb_helperfb_helper;
>  struct drm_fb_cma   *fb;
> +int (*dirty)(struct drm_framebuffer *framebuffer,
> + struct drm_file *file_priv, unsigned flags,
> + unsigned color, struct drm_clip_rect *clips,
> + unsigned num_clips);
>  };

Well my point is that drm core already has a canonical interface
(drm_framebuffer_funcs.dirty) to flush out rendering. And it's supposed to
be called from process context, and userspace is supposed to batch up
dirty updates.

What I'd like is that the fbdev emulation uses exactly that interface,
without requiring drivers to write any additional fbdev code (like qxl and
udl currently have). Since the drm_framebuffer_funcs.dirty is already
expected to run in process context I think the only bit we need is the
deferred_work you already added in fbdev, so that we can schedule the
driver's ->dirty() function.

There shouldn't be any need to have another ->dirty() function anywhere
else.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #125 from Vladislav Kamenev  ---
How to get dmesg log during lockup?
Got this on r600 driver (AMD Radeon hd6650m TURKS)

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[RFC 1/5] drm: Add DRM support for tiny LCD displays

[David Herrmann]

Hey

On Wed, Mar 16, 2016 at 2:34 PM, Noralf Trønnes  wrote:
> tinydrm provides a very simplified view of DRM for displays that has
> onboard video memory and is connected through a slow bus like SPI/I2C.
>
> Signed-off-by: Noralf Trønnes 
> ---
>  drivers/gpu/drm/Kconfig|   2 +
>  drivers/gpu/drm/Makefile   |   1 +
>  drivers/gpu/drm/tinydrm/Kconfig|  11 +
>  drivers/gpu/drm/tinydrm/Makefile   |   1 +
>  drivers/gpu/drm/tinydrm/core/Makefile  |   8 +
>  drivers/gpu/drm/tinydrm/core/internal.h|  43 +++
>  drivers/gpu/drm/tinydrm/core/tinydrm-core.c| 194 
>  drivers/gpu/drm/tinydrm/core/tinydrm-crtc.c| 203 
>  drivers/gpu/drm/tinydrm/core/tinydrm-deferred.c| 116 +++
>  drivers/gpu/drm/tinydrm/core/tinydrm-fbdev.c   | 345 
> +
>  drivers/gpu/drm/tinydrm/core/tinydrm-framebuffer.c | 112 +++
>  drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c |  97 ++
>  drivers/gpu/drm/tinydrm/core/tinydrm-plane.c   |  50 +++
>  include/drm/tinydrm/tinydrm.h  | 142 +
>  14 files changed, 1325 insertions(+)
>  create mode 100644 drivers/gpu/drm/tinydrm/Kconfig
>  create mode 100644 drivers/gpu/drm/tinydrm/Makefile
>  create mode 100644 drivers/gpu/drm/tinydrm/core/Makefile
>  create mode 100644 drivers/gpu/drm/tinydrm/core/internal.h
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-core.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-crtc.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-deferred.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-fbdev.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-framebuffer.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c
>  create mode 100644 drivers/gpu/drm/tinydrm/core/tinydrm-plane.c
>  create mode 100644 include/drm/tinydrm/tinydrm.h
>
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index c4bf9a1..3f8ede0 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -266,3 +266,5 @@ source "drivers/gpu/drm/amd/amdkfd/Kconfig"
>  source "drivers/gpu/drm/imx/Kconfig"
>
>  source "drivers/gpu/drm/vc4/Kconfig"
> +
> +source "drivers/gpu/drm/tinydrm/Kconfig"
> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
> index 1e9ff4c..c7c5c16 100644
> --- a/drivers/gpu/drm/Makefile
> +++ b/drivers/gpu/drm/Makefile
> @@ -75,3 +75,4 @@ obj-y += i2c/
>  obj-y  += panel/
>  obj-y  += bridge/
>  obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/
> +obj-$(CONFIG_DRM_TINYDRM) += tinydrm/
> diff --git a/drivers/gpu/drm/tinydrm/Kconfig b/drivers/gpu/drm/tinydrm/Kconfig
> new file mode 100644
> index 000..f290045
> --- /dev/null
> +++ b/drivers/gpu/drm/tinydrm/Kconfig
> @@ -0,0 +1,11 @@
> +menuconfig DRM_TINYDRM
> +   tristate "Support for small TFT LCD display modules"
> +   depends on DRM
> +   select DRM_KMS_HELPER
> +   select DRM_KMS_CMA_HELPER
> +   select DRM_GEM_CMA_HELPER
> +   select DRM_PANEL
> +   select VIDEOMODE_HELPERS
> +   help
> + Choose this option if you have a tinydrm supported display.
> + If M is selected the module will be called tinydrm.
> diff --git a/drivers/gpu/drm/tinydrm/Makefile 
> b/drivers/gpu/drm/tinydrm/Makefile
> new file mode 100644
> index 000..7476ed1
> --- /dev/null
> +++ b/drivers/gpu/drm/tinydrm/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_DRM_TINYDRM)  += core/
> diff --git a/drivers/gpu/drm/tinydrm/core/Makefile 
> b/drivers/gpu/drm/tinydrm/core/Makefile
> new file mode 100644
> index 000..03309f4
> --- /dev/null
> +++ b/drivers/gpu/drm/tinydrm/core/Makefile
> @@ -0,0 +1,8 @@
> +obj-$(CONFIG_DRM_TINYDRM)  += tinydrm.o
> +tinydrm-y  += tinydrm-core.o
> +tinydrm-y  += tinydrm-crtc.o
> +tinydrm-y  += tinydrm-framebuffer.o
> +tinydrm-y  += tinydrm-plane.o
> +tinydrm-y  += tinydrm-helpers.o
> +tinydrm-y  += tinydrm-deferred.o
> +tinydrm-$(CONFIG_DRM_KMS_FB_HELPER)+= tinydrm-fbdev.o
> diff --git a/drivers/gpu/drm/tinydrm/core/internal.h 
> b/drivers/gpu/drm/tinydrm/core/internal.h
> new file mode 100644
> index 000..a126658
> --- /dev/null
> +++ b/drivers/gpu/drm/tinydrm/core/internal.h
> @@ -0,0 +1,43 @@
> +/*
> + * Copyright (C) 2016 Noralf Trønnes
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +int tinydrm_crtc_create(struct tinydrm_device *tdev);
> +
> +static inline bool tinydrm_active(struct tinydrm

[PATCH 00/52] amdgpu Polaris support

[Alex Deucher]

This patch set adds kernel support for the new Polaris asics.  Patches
that add support for userspace and new firmware will be out momentarily.
Support is included for:
- GFX
- UVD
- VCE
- Power management
- Displays
The display support requires DAL and this patch set requires the core
dal support here:
https://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.7-wip-dal

I've also posted a Polaris git branch here:
https://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.7-wip-polaris

Thanks,

Alex

Alex Deucher (17):
  drm/amd: add DCE 11.2 register headers
  drm/amdgpu: add ELM/BAF asic types
  drm/amdgpu: add ELM/BAF DCE11 configs
  drm/amdgpu: update atombios.h (v2)
  drm/amdgpu/atom: add SetDCEClock helper
  drm/amdgpu/atom: add support for new SetPixelClock table
  drm/amdgpu/atom: add support for new DIGxEncoderControl cmd table
  drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd table
  drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll
  drm/amdgpu/dce11: update pll programming for ELM/BAF
  drm/amdgpu/dce11: add dce clock setting for ELM/BAF
  drm/amdgpu: add an interface to get gfx constants from atombios
  drm/amd/amdgpu: add query GFX cu info in CGS query system info
  drm/amd/dal: add core support for Polaris family (v2)
  drm/amd/dal/dm: add polaris support
  drm/amdgpu: add dal support for polaris
  drm/amd/dal: Enable Polaris support in the Kconfig

Eric Huang (9):
  drm/amd/powerplay: add thermal control for elm/baf
  drm/amd/powerplay: add UVD&VCE DPM and powergating support for elm/baf
  drm/amd/powerplay: add all blocks clockgating support through
SMU/powerplay
  drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF
  drm/amd/powerplay: add GFX per cu powergating support through
SMU/powerplay
  drm/amd/powerplay: add GFX per cu powergating for Baffin
  drm/amd/amdgpu: add medium grain powergating support for Baffin
  drm/amd/amdgpu: add power gating initialization support for GFX8.0
  drm/amd/amdgpu: add power gating init for Baffin

Flora Cui (11):
  drm/amdgpu: add GMC support for ELM/BAF
  drm/amdgpu: add DCE golden setting for ELM/BAF
  drm/amdgpu: add SDMA support for ELM/BAF
  drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3D
  drm/amdgpu: add GFX support for ELM/BAF
  drm/amd/powerplay: add default clockgating handling
  drm/amdgpu: ungate SMC clockgating first before suspend
  drm/amdgpu: update the core VI support for ELM/BAF
  drm/amdgpu: add ELM/BAF pci ids
  drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
  drm/amdgpu: add polaris10/11 smc fw declaration

Rex Zhu (8):
  drm/amd/powerplay: enable dpm for baffin.
  drm/amd/powerplay: init hwmgr for ELM/BAF
  drm/amd/powerplay: enable powerplay for baffin.
  drm/amd/powerplay: print gpu loading and uvd/vce power gate enablement
for polaris10/11.
  drm/amd/powerplay: fix mclk in high clock for baffin
  drm/amd/powrplay: fix issue that get wrong enable flag.
  drm/amd/powerplay: enable set lowest mclk clock on baffin.
  drm/amd/powerplay: Disable Spread Spectrum on DPM 0 on baffin as SPLL
Shut Down feature is enabled.

Sonny Jiang (2):
  drm/amdgpu: add UVD support for ELM/BAF
  drm/amdgpu: add VCE support to ELM/BAF

rezhu (2):
  drm/amd/powerplay: add header files for ellesmere smu manager.
  drm/amd/powerplay: add smu support for ellesmere/baffin

yanyang1 (3):
  drm/amd/amdgpu: Add smc_sk firmware in baffin & ellesmere.
  drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.
  drm/amd/powerplay: update baffin & ellesmere smc_sk firmware.

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|14 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c   |30 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h   | 2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c|24 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |25 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|10 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c  | 4 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c|10 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c|10 +
 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c |98 +-
 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h | 2 +
 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c |93 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c |   103 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  |  1224 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  |35 +
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c |47 +
 drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_vi.h | 1 +
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c  | 6 +-
 drivers/gpu/drm/amd/amdgpu/vi.c|   171 +
 drivers/gpu/drm/amd/dal/Kconfig|10 +
 drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c  |20 +
 drivers/gpu/drm/amd/dal/dc/Makefile| 4 +
 drivers/gpu/drm/amd/dal/dc/adapter/Makefile| 4 +
 .../gpu

[PATCH 08/52] drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd table

[Alex Deucher]

New uniphy transmitter setup table for elm/baf.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 51 +-
 1 file changed, 50 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
index 213103c..a873780 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
@@ -752,11 +752,12 @@ union dig_transmitter_control {
DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3;
DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4;
DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 v5;
+   DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_6 v6;
 };

 void
 amdgpu_atombios_encoder_setup_dig_transmitter(struct drm_encoder *encoder, int 
action,
-  uint8_t lane_num, uint8_t lane_set)
+ uint8_t lane_num, uint8_t 
lane_set)
 {
struct drm_device *dev = encoder->dev;
struct amdgpu_device *adev = dev->dev_private;
@@ -1108,6 +1109,54 @@ amdgpu_atombios_encoder_setup_dig_transmitter(struct 
drm_encoder *encoder, int a
args.v5.ucDigEncoderSel = 1 << dig_encoder;
args.v5.ucDPLaneSet = lane_set;
break;
+   case 6:
+   args.v6.ucAction = action;
+   if (is_dp)
+   args.v6.ulSymClock = cpu_to_le32(dp_clock / 10);
+   else
+   args.v6.ulSymClock = 
cpu_to_le32(amdgpu_encoder->pixel_clock / 10);
+
+   switch (amdgpu_encoder->encoder_id) {
+   case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+   if (dig->linkb)
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYB;
+   else
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYA;
+   break;
+   case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+   if (dig->linkb)
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYD;
+   else
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYC;
+   break;
+   case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+   if (dig->linkb)
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYF;
+   else
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYE;
+   break;
+   case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
+   args.v6.ucPhyId = ATOM_PHY_ID_UNIPHYG;
+   break;
+   }
+   if (is_dp)
+   args.v6.ucLaneNum = dp_lane_count;
+   else if (amdgpu_dig_monitor_is_duallink(encoder, 
amdgpu_encoder->pixel_clock))
+   args.v6.ucLaneNum = 8;
+   else
+   args.v6.ucLaneNum = 4;
+   args.v6.ucConnObjId = connector_object_id;
+   if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH)
+   args.v6.ucDPLaneSet = lane_set;
+   else
+   args.v6.ucDigMode = 
amdgpu_atombios_encoder_get_encoder_mode(encoder);
+
+   if (hpd_id == AMDGPU_HPD_NONE)
+   args.v6.ucHPDSel = 0;
+   else
+   args.v6.ucHPDSel = hpd_id + 1;
+   args.v6.ucDigEncoderSel = 1 << dig_encoder;
+   break;
default:
DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
break;
-- 
2.5.0

[PATCH 09/52] drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll

[Alex Deucher]

New PLL scheme on ELM/BAF.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index cf6d87b50..b9fb44c 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2384,6 +2384,18 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
u32 pll_in_use;
int pll;

+   if ((adev->asic_type == CHIP_ELLESMERE) ||
+   (adev->asic_type == CHIP_BAFFIN)) {
+   if 
(ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder)))
+   return ATOM_DP_DTO;
+   /* use the same PPLL for all monitors with the same clock */
+   pll = amdgpu_pll_get_shared_nondp_ppll(crtc);
+   if (pll != ATOM_PPLL_INVALID)
+   return pll;
+
+   return ATOM_COMBOPHY_PLL0 + amdgpu_crtc->crtc_id;
+   }
+
if 
(ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder)))
 {
if (adev->clock.dp_extclk)
/* skip PPLL programming if using ext clock */
-- 
2.5.0

[PATCH 03/52] drm/amdgpu: add ELM/BAF DCE11 configs

[Alex Deucher]

Add support for the display configuration on elm/baf.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 24 +++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 0c7b93e..cf6d87b50 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -1580,7 +1580,19 @@ static int dce_v11_0_audio_init(struct amdgpu_device 
*adev)

adev->mode_info.audio.enabled = true;

-   adev->mode_info.audio.num_pins = 7;
+   switch (adev->asic_type) {
+   case CHIP_CARRIZO:
+   adev->mode_info.audio.num_pins = 7;
+   break;
+   case CHIP_ELLESMERE:
+   adev->mode_info.audio.num_pins = 8;
+   break;
+   case CHIP_BAFFIN:
+   adev->mode_info.audio.num_pins = 6;
+   break;
+   default:
+   return -EINVAL;
+   }

for (i = 0; i < adev->mode_info.audio.num_pins; i++) {
adev->mode_info.audio.pin[i].channels = -1;
@@ -2900,6 +2912,16 @@ static int dce_v11_0_early_init(void *handle)
adev->mode_info.num_hpd = 6;
adev->mode_info.num_dig = 9;
break;
+   case CHIP_ELLESMERE:
+   adev->mode_info.num_crtc = 6;
+   adev->mode_info.num_hpd = 6;
+   adev->mode_info.num_dig = 6;
+   break;
+   case CHIP_BAFFIN:
+   adev->mode_info.num_crtc = 5;
+   adev->mode_info.num_hpd = 5;
+   adev->mode_info.num_dig = 5;
+   break;
default:
/* FIXME: not supported yet */
return -EINVAL;
-- 
2.5.0

[PATCH 04/52] drm/amdgpu: update atombios.h (v2)

[Alex Deucher]

update to internal version 893

v2: Pull in gfx_info changes from 898

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/include/atombios.h | 663 ++---
 1 file changed, 619 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/atombios.h 
b/drivers/gpu/drm/amd/include/atombios.h
index eaf451e..296def3 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -79,9 +79,23 @@
 #define ATOM_PPLL02
 #define ATOM_PPLL33

+#define ATOM_PHY_PLL0 4
+#define ATOM_PHY_PLL1 5
+
 #define ATOM_EXT_PLL1 8
+#define ATOM_GCK_DFS  8
 #define ATOM_EXT_PLL2 9
+#define ATOM_FCH_CLK  9
 #define ATOM_EXT_CLOCK10
+#define ATOM_DP_DTO   11
+
+#define ATOM_COMBOPHY_PLL020
+#define ATOM_COMBOPHY_PLL121
+#define ATOM_COMBOPHY_PLL222
+#define ATOM_COMBOPHY_PLL323
+#define ATOM_COMBOPHY_PLL424
+#define ATOM_COMBOPHY_PLL525
+
 #define ATOM_PPLL_INVALID 0xFF

 #define ENCODER_REFCLK_SRC_P1PLL   0
@@ -224,6 +238,31 @@ typedef struct _ATOM_ROM_HEADER
   UCHAR  ucReserved;
 }ATOM_ROM_HEADER;

+
+typedef struct _ATOM_ROM_HEADER_V2_1
+{
+  ATOM_COMMON_TABLE_HEADER  sHeader;
+  UCHAR  uaFirmWareSignature[4];//Signature to distinguish between 
Atombios and non-atombios,
+//atombios should init it as "ATOM", don't 
change the position
+  USHORT usBiosRuntimeSegmentAddress;
+  USHORT usProtectedModeInfoOffset;
+  USHORT usConfigFilenameOffset;
+  USHORT usCRC_BlockOffset;
+  USHORT usBIOS_BootupMessageOffset;
+  USHORT usInt10Offset;
+  USHORT usPciBusDevInitCode;
+  USHORT usIoBaseAddress;
+  USHORT usSubsystemVendorID;
+  USHORT usSubsystemID;
+  USHORT usPCI_InfoOffset;
+  USHORT usMasterCommandTableOffset;//Offest for SW to get all command table 
offsets, Don't change the position
+  USHORT usMasterDataTableOffset;   //Offest for SW to get all data table 
offsets, Don't change the position
+  UCHAR  ucExtendedFunctionCode;
+  UCHAR  ucReserved;
+  ULONG  ulPSPDirTableOffset;
+}ATOM_ROM_HEADER_V2_1;
+
+
 //==Command Table 
Portion


@@ -272,12 +311,12 @@ typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
   USHORT GetSCLKOverMCLKRatio;   //Atomic Table,  only used by 
Bios
   USHORT SetCRTC_Timing; //Atomic Table,  directly 
used by various SW components,latest version 1.1
   USHORT SetCRTC_OverScan;   //Atomic Table,  used by 
various SW components,latest version 1.1
-  USHORT SetCRTC_Replication;//Atomic Table,  used only by 
Bios
+  USHORT GetSMUClockInfo; //Atomic Table,  used only 
by Bios
   USHORT SelectCRTC_Source;  //Atomic Table,  directly 
used by various SW components,latest version 1.1
   USHORT EnableGraphSurfaces;//Atomic Table,  used only by 
Bios
   USHORT UpdateCRTC_DoubleBufferRegisters;   //Atomic Table,  used only by 
Bios
   USHORT LUT_AutoFill;   //Atomic Table,  only used by 
Bios
-  USHORT EnableHW_IconCursor;//Atomic Table,  only used by 
Bios
+  USHORT SetDCEClock;//Atomic Table,  start from 
DCE11.1, shared by driver and VBIOS, change DISPCLK and DPREFCLK
   USHORT GetMemoryClock; //Atomic Table,  directly 
used by various SW components,latest version 1.1
   USHORT GetEngineClock; //Atomic Table,  directly 
used by various SW components,latest version 1.1
   USHORT SetCRTC_UsingDTDTiming; //Atomic Table,  directly 
used by various SW components,latest version 1.1
@@ -292,7 +331,7 @@ typedef struct _ATOM_MASTER_LIST_OF_COMMAND_TABLES{
   USHORT PowerConnectorDetection;//Atomic Table,  directly 
used by various SW components,latest version 1.1
   USHORT MC_Synchronization; //Atomic Table,  indirectly 
used by various SW components,called from SetMemoryClock
   USHORT ComputeMemoryEnginePLL; //Atomic Table,  indirectly 
used by various SW components,called from SetMemory/EngineClock
-  USHORT MemoryRefreshConversion;//Atomic Table,  indirectly 
used by various SW components,called from SetMemory or SetEngineClock
+  USHORT Gfx_Init;   //Atomic Table,  indirectly 
used by various SW components,called from SetMemory or SetEngineClock
   USHORT VRAM_GetCurrentInfoBlock;   //Atomic Table,  used only by 
Bios
   USHORT DynamicMemorySettings;  //Atomic Table,  indirectly 
used by various SW components,called from SetMemoryClock
   USHORT MemoryTraining; //Atomic Table,  used only by 
Bios
@@ -333,6 +372,10 @@ typedef struct _ATOM

[PATCH 05/52] drm/amdgpu/atom: add SetDCEClock helper

[Alex Deucher]

New cmd table for ELM/BAF for setting the dispclock or
dprefclock.

Signed-off-by: Alex Deucher 
Reviewed-by: Christian König 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c | 45 +-
 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h |  2 ++
 2 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
index 49aa350..bd6c530 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
@@ -467,7 +467,7 @@ union set_pixel_clock {
  * required disp clk.
  */
 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
-   u32 dispclk)
+  u32 dispclk)
 {
u8 frev, crev;
int index;
@@ -510,6 +510,49 @@ void amdgpu_atombios_crtc_set_disp_eng_pll(struct 
amdgpu_device *adev,
amdgpu_atom_execute_table(adev->mode_info.atom_context, index, 
(uint32_t *)&args);
 }

+union set_dce_clock {
+   SET_DCE_CLOCK_PS_ALLOCATION_V1_1 v1_1;
+   SET_DCE_CLOCK_PS_ALLOCATION_V2_1 v2_1;
+};
+
+u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev,
+  u32 freq, u8 clk_type, u8 clk_src)
+{
+   u8 frev, crev;
+   int index;
+   union set_dce_clock args;
+   u32 ret_freq = 0;
+
+   memset(&args, 0, sizeof(args));
+
+   index = GetIndexIntoMasterTable(COMMAND, SetDCEClock);
+   if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, 
&frev,
+  &crev))
+   return 0;
+
+   switch (frev) {
+   case 2:
+   switch (crev) {
+   case 1:
+   args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 
10kHz units */
+   args.v2_1.asParam.ucDCEClkType = clk_type;
+   args.v2_1.asParam.ucDCEClkSrc = clk_src;
+   amdgpu_atom_execute_table(adev->mode_info.atom_context, 
index, (uint32_t *)&args);
+   ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) 
* 10;
+   break;
+   default:
+   DRM_ERROR("Unknown table version %d %d\n", frev, crev);
+   return 0;
+   }
+   break;
+   default:
+   DRM_ERROR("Unknown table version %d %d\n", frev, crev);
+   return 0;
+   }
+
+   return ret_freq;
+}
+
 static bool is_pixel_clock_source_from_pll(u32 encoder_mode, int pll_id)
 {
if (ENCODER_MODE_IS_DP(encoder_mode)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h 
b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
index c670833..0eeda8e 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
@@ -37,6 +37,8 @@ void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc 
*crtc,
  struct drm_display_mode *mode);
 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
u32 dispclk);
+u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev,
+  u32 freq, u8 clk_type, u8 clk_src);
 void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,
   u32 crtc_id,
   int pll_id,
-- 
2.5.0

[PATCH 06/52] drm/amdgpu/atom: add support for new SetPixelClock table

[Alex Deucher]

New version of the SetPixelClock table for elm/baf.  The
new table calculates the pll dividers and handles spread
spectrum calculations and setup.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c | 53 +++---
 1 file changed, 41 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
index bd6c530..49a39b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
@@ -461,6 +461,7 @@ union set_pixel_clock {
PIXEL_CLOCK_PARAMETERS_V3 v3;
PIXEL_CLOCK_PARAMETERS_V5 v5;
PIXEL_CLOCK_PARAMETERS_V6 v6;
+   PIXEL_CLOCK_PARAMETERS_V7 v7;
 };

 /* on DCE5, make sure the voltage is high enough to support the
@@ -566,18 +567,18 @@ static bool is_pixel_clock_source_from_pll(u32 
encoder_mode, int pll_id)
 }

 void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,
-  u32 crtc_id,
-  int pll_id,
-  u32 encoder_mode,
-  u32 encoder_id,
-  u32 clock,
-  u32 ref_div,
-  u32 fb_div,
-  u32 frac_fb_div,
-  u32 post_div,
-  int bpc,
-  bool ss_enabled,
-  struct amdgpu_atom_ss *ss)
+ u32 crtc_id,
+ int pll_id,
+ u32 encoder_mode,
+ u32 encoder_id,
+ u32 clock,
+ u32 ref_div,
+ u32 fb_div,
+ u32 frac_fb_div,
+ u32 post_div,
+ int bpc,
+ bool ss_enabled,
+ struct amdgpu_atom_ss *ss)
 {
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
@@ -695,6 +696,34 @@ void amdgpu_atombios_crtc_program_pll(struct drm_crtc 
*crtc,
args.v6.ucEncoderMode = encoder_mode;
args.v6.ucPpll = pll_id;
break;
+   case 7:
+   args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 
hz units */
+   args.v7.ucMiscInfo = 0;
+   if ((encoder_mode == ATOM_ENCODER_MODE_DVI) &&
+   (clock > 165000))
+   args.v7.ucMiscInfo |= 
PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN;
+   args.v7.ucCRTC = crtc_id;
+   if (encoder_mode == ATOM_ENCODER_MODE_HDMI) {
+   switch (bpc) {
+   case 8:
+   default:
+   args.v7.ucDeepColorRatio = 
PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS;
+   break;
+   case 10:
+   args.v7.ucDeepColorRatio = 
PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4;
+   break;
+   case 12:
+   args.v7.ucDeepColorRatio = 
PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2;
+   break;
+   case 16:
+   args.v7.ucDeepColorRatio = 
PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1;
+   break;
+   }
+   }
+   args.v7.ucTransmitterID = encoder_id;
+   args.v7.ucEncoderMode = encoder_mode;
+   args.v7.ucPpll = pll_id;
+   break;
default:
DRM_ERROR("Unknown table version %d %d\n", frev, crev);
return;
-- 
2.5.0

[PATCH 07/52] drm/amdgpu/atom: add support for new DIGxEncoderControl cmd table

[Alex Deucher]

New digital encoder setup table for elm/baf.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 42 ++
 1 file changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
index 1e0bba2..213103c 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
@@ -563,6 +563,7 @@ union dig_encoder_control {
DIG_ENCODER_CONTROL_PARAMETERS_V2 v2;
DIG_ENCODER_CONTROL_PARAMETERS_V3 v3;
DIG_ENCODER_CONTROL_PARAMETERS_V4 v4;
+   DIG_ENCODER_CONTROL_PARAMETERS_V5 v5;
 };

 void
@@ -690,6 +691,47 @@ amdgpu_atombios_encoder_setup_dig_encoder(struct 
drm_encoder *encoder,
else
args.v4.ucHPD_ID = hpd_id + 1;
break;
+   case 5:
+   switch (action) {
+   case ATOM_ENCODER_CMD_SETUP_PANEL_MODE:
+   args.v5.asDPPanelModeParam.ucAction = action;
+   args.v5.asDPPanelModeParam.ucPanelMode = 
panel_mode;
+   args.v5.asDPPanelModeParam.ucDigId = 
dig->dig_encoder;
+   break;
+   case ATOM_ENCODER_CMD_STREAM_SETUP:
+   args.v5.asStreamParam.ucAction = action;
+   args.v5.asStreamParam.ucDigId = 
dig->dig_encoder;
+   args.v5.asStreamParam.ucDigMode =
+   
amdgpu_atombios_encoder_get_encoder_mode(encoder);
+   if 
(ENCODER_MODE_IS_DP(args.v5.asStreamParam.ucDigMode))
+   args.v5.asStreamParam.ucLaneNum = 
dp_lane_count;
+   else if (amdgpu_dig_monitor_is_duallink(encoder,
+   
amdgpu_encoder->pixel_clock))
+   args.v5.asStreamParam.ucLaneNum = 8;
+   else
+   args.v5.asStreamParam.ucLaneNum = 4;
+   args.v5.asStreamParam.ulPixelClock =
+   cpu_to_le32(amdgpu_encoder->pixel_clock 
/ 10);
+   args.v5.asStreamParam.ucBitPerColor =
+   
amdgpu_atombios_encoder_get_bpc(encoder);
+   args.v5.asStreamParam.ucLinkRateIn270Mhz = 
dp_clock / 27000;
+   break;
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_START:
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1:
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2:
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN3:
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN4:
+   case ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE:
+   case ATOM_ENCODER_CMD_DP_VIDEO_OFF:
+   case ATOM_ENCODER_CMD_DP_VIDEO_ON:
+   args.v5.asCmdParam.ucAction = action;
+   args.v5.asCmdParam.ucDigId = dig->dig_encoder;
+   break;
+   default:
+   DRM_ERROR("Unsupported action 0x%x\n", action);
+   break;
+   }
+   break;
default:
DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
break;
-- 
2.5.0

[PATCH 10/52] drm/amdgpu/dce11: update pll programming for ELM/BAF

[Alex Deucher]

SetPixelClock table handles pll divider calculation and
spread spectrum setup, so no need to use calculate the
dividers and call the ss enable cmd table.

Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Reviewed-by: Jammy Zhou 
---
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 31 +--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index b9fb44c..5217bdf 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2751,7 +2751,17 @@ static void dce_v11_0_crtc_disable(struct drm_crtc *crtc)
case ATOM_PPLL2:
/* disable the ppll */
amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, 
amdgpu_crtc->pll_id,
- 0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, 
false, &ss);
+0, 0, ATOM_DISABLE, 0, 0, 0, 
0, 0, false, &ss);
+   break;
+   case ATOM_COMBOPHY_PLL0:
+   case ATOM_COMBOPHY_PLL1:
+   case ATOM_COMBOPHY_PLL2:
+   case ATOM_COMBOPHY_PLL3:
+   case ATOM_COMBOPHY_PLL4:
+   case ATOM_COMBOPHY_PLL5:
+   /* disable the ppll */
+   amdgpu_atombios_crtc_program_pll(crtc, ATOM_CRTC_INVALID, 
amdgpu_crtc->pll_id,
+0, 0, ATOM_DISABLE, 0, 0, 0, 
0, 0, false, &ss);
break;
default:
break;
@@ -2769,11 +2779,28 @@ static int dce_v11_0_crtc_mode_set(struct drm_crtc 
*crtc,
  int x, int y, struct drm_framebuffer *old_fb)
 {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
+   struct drm_device *dev = crtc->dev;
+   struct amdgpu_device *adev = dev->dev_private;

if (!amdgpu_crtc->adjusted_clock)
return -EINVAL;

-   amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);
+   if ((adev->asic_type == CHIP_ELLESMERE) ||
+   (adev->asic_type == CHIP_BAFFIN)) {
+   struct amdgpu_encoder *amdgpu_encoder =
+   to_amdgpu_encoder(amdgpu_crtc->encoder);
+   int encoder_mode =
+   
amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder);
+
+   /* SetPixelClock calculates the plls and ss values now */
+   amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id,
+amdgpu_crtc->pll_id,
+encoder_mode, 
amdgpu_encoder->encoder_id,
+adjusted_mode->clock, 0, 0, 0, 
0,
+amdgpu_crtc->bpc, 
amdgpu_crtc->ss_enabled, &amdgpu_crtc->ss);
+   } else {
+   amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);
+   }
amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);
dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);
-- 
2.5.0