[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594
--- Comment #8 from Marek Olšák ---
I've captured one of the problematic draw calls, which used this fragment
shader:
FRAG
DCL IN[0], GENERIC[9], PERSPECTIVE
DCL OUT[0], COLOR
DCL SAMP[0]
DCL SVIEW[0], 2D, FLOAT
DCL CONST[0..13]
DCL CONST[15]
DCL TEMP[0..3], LOCAL
IMM[0] FLT32 {1., 0., 0.2500, 4.}
0: MOV TEMP[0].xy, IN[0].xyyy
1: TEX TEMP[0].w, TEMP[0], SAMP[0], 2D
2: MUL TEMP[0].x, TEMP[0]., IN[0].
3: MAD TEMP[1].x, TEMP[0]., CONST[1]., CONST[1].
4: MOV_SAT TEMP[1].x, TEMP[1].
5: MOV TEMP[0].w, TEMP[1].
6: FSLT TEMP[1].x, TEMP[1]., CONST[0].
7: AND TEMP[1].x, TEMP[1]., IMM[0].
8: KILL_IF -TEMP[1].
9: MAD TEMP[0].x, IN[0]., CONST[0]., CONST[0].
10: MOV_SAT TEMP[1].x, TEMP[0].
11: DDX TEMP[2].x, TEMP[1].
12: ABS TEMP[2].x, TEMP[2].
13: MUL TEMP[3], CONST[15]., TEMP[1].
14: DDY TEMP[3].x, TEMP[3]
15: ABS TEMP[3].x, TEMP[3].
16: ADD TEMP[2].x, TEMP[2]., TEMP[3].
17: MAD TEMP[0].x, TEMP[2]., IMM[0]., TEMP[1].
18: MUL TEMP[1].x, TEMP[0]., TEMP[0].
19: ADD TEMP[1].x, TEMP[0]., -TEMP[1].
20: MUL TEMP[1].x, IMM[0]., TEMP[1].
21: ADD TEMP[1].x, IMM[0]., -TEMP[1].
22: MOV TEMP[0].y, TEMP[1].
23: MOV TEMP[0].z, IMM[0].
24: MOV OUT[0], TEMP[0]
25: END
If KILL_IF masks out some but not all invocations in a 2x2 quad, the subsequent
DDX and DDY opcodes can result in undefined values, resulting in garbage on the
output.
The simple solution is to move KILL_IF to the end of the shader. I've verified
that it works, but it's inefficient. The best solution would be to:
- save the resulting EXEC mask after KILL_IF
- use S_WQM on the exec mask to get a whole-quad mask
- execute DDX and DDY
- restore the EXEC mask (this must be done after both DDX & DDY but before PS
exports)
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[Bug 94186] Immediate crash when launching World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186
Bug ID: 94186
Summary: Immediate crash when launching World of Warcraft with
RV790
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/Gallium/r600
Assignee: dri-devel at lists.freedesktop.org
Reporter: rankincj at googlemail.com
QA Contact: dri-devel at lists.freedesktop.org
Warcraft has suddenly started to crash on launch with git Mesa on my RV790.
Bisection has identified this commit:
61ed09c7ea41e559219c772f18ea00942d54d30a is the first bad commit
commit 61ed09c7ea41e559219c772f18ea00942d54d30a
Author: Samuel Pitoiset
Date: Mon Jan 4 23:56:08 2016 +0100
gallium/cso: add support for compute shaders
Changes from v2:
- removed cso_{save,restore}_compute_shader() functions and the
compute_shader_saved variable because disabling compute shaders for
meta ops is not currently needed
However, I'm not sure I trust bisection here because I have built Mesa from
this revision *twice* and while WoW always crashes with one build, it never
crashes with the other?!
WoW's crash dump only implies that Mesa is trying to read from a null pointer;
I can find no useful stack trace.
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[Bug 94186] Immediate crash when launching World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 --- Comment #1 from Chris Rankin --- For reference, I shall assume that this is the first "good" commit: OpenGL core profile version string: 3.3 Mesa 11.2.0-devel (git-fe14110) These commits have definitely crashed for me at some point: git-04085af git-7410c60 git-61ed09c git-e2a1ec5 git-4360ba0 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/ec05daad/attachment.html>
[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594 --- Comment #9 from Michel Dänzer --- (In reply to Marek Olšák from comment #8) > If KILL_IF masks out some but not all invocations in a 2x2 quad, the > subsequent DDX and DDY opcodes can result in undefined values, resulting in > garbage on the output. I think Nicolai is making some improvements for the EXEC mask handling for shader images. Maybe that'll help for this as well. Note that AFAIK using things like derivatives in non-uniform control flow isn't supported by GLSL. What's the original GLSL shader? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/2a25f4d5/attachment.html>
Lenovo W541, windows 10 and ACPI PM
So we got a bug filed in Fedora 23 that the nvidia GPU wasn't stalling on resume from runtime poweroff. When we looked into it, we noticed the GPU wasn't powering off and the delay was from things going to hell after that. I dug out the DSDT and noticed it has special Windows 10 handling code for the SB.PCI0.PEG.VID device. Adding acpi_osi="!Windows 2013" made things work again and everyone rejoiced and had battery life again. Now what to do about this? I doubt this is restricted to the W541 laptop, I assume all Optimus laptops that support windows 10 will have this problem, so I'm not sure blacklisting on a case by case basis is going to help. More information from investigation: On Win7/8 paths, the way to poweroff the GPU is to call an ACPI _DSM on the VID device that sets a magic bit, then the next time you go into D3 the _PS3 method gets called and powers the device down. This is to make up for the lack of D3cold in Windows at the time I suspect. Now with Win10, the PCI0.PEG device has power resource methods, specifically PR3 which enables D3cold. However nouveau is bound to the VID device not the PEG device, so never attempts to power it down using those methods. I've hacked up the attached patch, and it does indeed power the device down, but I've no idea how this is meant to work in real world. Dave. -- next part -- A non-text attachment was scrubbed... Name: 0001-nouveau-hack-the-parent-power-down-so-the-GPU-powers.patch Type: text/x-patch Size: 1887 bytes Desc: not available URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/56a1d5e3/attachment.bin>
[Bug 94179] Marching cubes geometry shader locks GPU
https://bugs.freedesktop.org/show_bug.cgi?id=94179 Michel D�nzer changed: What|Removed |Added Attachment #121789|text/plain |application/zip mime type|| -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/f8b8a526/attachment-0001.html>
[Bug 94179] Marching cubes geometry shader locks GPU
https://bugs.freedesktop.org/show_bug.cgi?id=94179 --- Comment #1 from Michel D�nzer --- Does the valgrind output contain anything interesting? How to build the test case? Please don't expect others to run downloaded binaries. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/f32db8a2/attachment.html>
[Bug 94179] Marching cubes geometry shader locks GPU
https://bugs.freedesktop.org/show_bug.cgi?id=94179 --- Comment #2 from Timothy Arceri --- This is a bug report following on from a GLSL compiler bug that was fixed. I built the application in that bug with: gcc mc.c mc_table.c -lGL -lepoxy -lglfw I also had to add #include to mc.c -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/ded70da0/attachment.html>
[Bug 94179] Marching cubes geometry shader locks GPU
https://bugs.freedesktop.org/show_bug.cgi?id=94179 --- Comment #3 from pavol at klacansky.com --- Thanks Timothy. Only this, since I did not build mesa in debug mode. ==8065== Conditional jump or move depends on uninitialised value(s) ==8065==at 0xA986CE4: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA988E14: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA98A899: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA96C910: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA9766C2: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA978FA6: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA8CAD66: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA7268CE: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0xA6F6379: ??? (in /usr/lib64/mesa/r600g_dri.so) ==8065==by 0x402701: main (mc.c:244) -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/b94b0d74/attachment.html>
[git pull] drm fixes
Hi Linus, This has two main sets of fixse, A bunch of Exynos fixes, mainly for their MIC component. vblank regression fixes from Mario, apparantly some changes in 4.4 caused some vblank breakage on radeon/nouveau, this set fixes all the issues seen. There is also a revert of one of the MST changse, that I was overzealous in including, that broke 30" MST monitors, and two qxl fixes. Dave. The following changes since commit 65c23c65bee479faceb042a52f5a7278dfa8d972: Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6 (2016-02-16 10:52:59 -0800) are available in the git repository at: git://people.freedesktop.org/~airlied/linux drm-fixes for you to fetch changes up to dada168b3b76439d83aff34f8fbd9c512c2d136a: drm/qxl: fix erroneous return value (2016-02-17 15:39:35 +1000) Andrzej Hajda (1): drm/exynos/decon: fix disable clocks order Anton Protopopov (1): drm/qxl: fix erroneous return value Dave Airlie (2): Revert "drm/dp/mst: change MST detection scheme" Merge branch 'exynos-drm-fixes' of git://git.kernel.org/.../daeinki/drm-exynos into drm-fixes Gerd Hoffmann (1): drm/qxl: use kmalloc_array to alloc reloc_info in qxl_process_single_command Joonyoung Shim (1): drm/exynos: depend on ARCH_EXYNOS for DRM_EXYNOS Marek Szyprowski (9): drm/exynos: ipp: fix incorrect format specifiers in debug messages drm/exynos: fix types for compilation on 64bit architectures drm/exynos: mic: use devm_clk interface drm/exynos: mic: convert to component framework drm/exynos: mic: make all functions static drm/exynos: dsi: restore support for drm bridge drm/exynos: exynos5433_decon: fix wrong state assignment in decon_enable drm/exynos: exynos5433_decon: fix wrong state in decon_vblank_enable drm/exynos: fix incorrect cpu address for dma_mmap_attrs() Mario Kleiner (6): drm: No-Op redundant calls to drm_vblank_off() (v2) drm: Prevent vblank counter bumps > 1 with active vblank clients. (v2) drm: Fix drm_vblank_pre/post_modeset regression from Linux 4.4 drm: Fix treatment of drm_vblank_offdelay in drm_vblank_on() (v2) drm/radeon/pm: Handle failure of drm_vblank_get. drm/nouveau/display: Enable vblank irqs after display engine is on again. drivers/gpu/drm/drm_dp_mst_topology.c | 37 +++--- drivers/gpu/drm/drm_irq.c | 73 +-- drivers/gpu/drm/exynos/Kconfig| 2 +- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 8 ++- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1 + drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_g2d.c | 5 +- drivers/gpu/drm/exynos/exynos_drm_gem.c | 4 +- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 32 ++-- drivers/gpu/drm/exynos/exynos_drm_mic.c | 72 +++--- drivers/gpu/drm/exynos/exynos_drm_rotator.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 8 +-- drivers/gpu/drm/nouveau/nouveau_display.c | 8 +-- drivers/gpu/drm/qxl/qxl_ioctl.c | 3 +- drivers/gpu/drm/qxl/qxl_prime.c | 2 +- drivers/gpu/drm/radeon/radeon_pm.c| 8 ++- 18 files changed, 178 insertions(+), 93 deletions(-)
[PATCH 3/5] drm/dp/mst: change MST detection scheme
On 23 January 2016 at 08:07, Harry Wentland wrote:
> From: Mykola Lysenko
>
> 1. Get edid for all connected MST displays, not only on logical ports,
>in the same thread as MST topology detection is done:
> There are displays that have branches inside w/o logical ports.
> So in case another SST display connected downstream system can
> end-up in situation when 3 DOWN requests sent: two for
> âremote i2c readâ and one for âenum path resourcesâ, making slots
> full.
>
> 2. Call notification callback in one place in the end of topology
> discovery/update:
> This is done to reduce number of events sent to userspace in case complex
> topology discovery is going, adding multiple number of connectors;
>
> 3. Remove notification callback call from short pulse interrupt processing
> function:
> This is done in order not to block interrupt processing function, in
> case any
> MST request will be made from it. Notification will be send from topology
> discovery/update work item.
I've had to pull this out, as I did some more indepth testing with
i915 and a Dell 30"
and this broke things.
The main thing it broke is setting the tiling property that userspace
needs to see
those dual-panel monitors as one.
you should be able to see xrandr --props if the tile property is
correct if you test.
I'm also not sure about some other bits in this patch, so I probably need to dig
a bit deeper into it.
Dave.
>
> Signed-off-by: Mykola Lysenko
> Reviewed-by: Harry Wentland
> Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 37
> ++-
> 1 file changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
> b/drivers/gpu/drm/drm_dp_mst_topology.c
> index 041597b7a7c6..052c20ca35ee 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -1130,13 +1130,11 @@ static void drm_dp_add_port(struct drm_dp_mst_branch
> *mstb,
> drm_dp_put_port(port);
> goto out;
> }
> - if (port->port_num >= DP_MST_LOGICAL_PORT_0) {
> - port->cached_edid = drm_get_edid(port->connector,
> &port->aux.ddc);
> - drm_mode_connector_set_tile_property(port->connector);
> - }
> +
> + drm_mode_connector_set_tile_property(port->connector);
> +
> (*mstb->mgr->cbs->register_connector)(port->connector);
> }
> -
> out:
> /* put reference to this port */
> drm_dp_put_port(port);
> @@ -1161,9 +1159,9 @@ static void drm_dp_update_port(struct drm_dp_mst_branch
> *mstb,
> port->ddps = conn_stat->displayport_device_plug_status;
>
> if (old_ddps != port->ddps) {
> + dowork = true;
> if (port->ddps) {
> drm_dp_check_port_guid(mstb, port);
> - dowork = true;
> } else {
> port->guid_valid = false;
> port->available_pbn = 0;
> @@ -1271,8 +1269,13 @@ static void drm_dp_check_and_send_link_address(struct
> drm_dp_mst_topology_mgr *m
> if (port->input)
> continue;
>
> - if (!port->ddps)
> + if (!port->ddps) {
> + if (port->cached_edid) {
> + kfree(port->cached_edid);
> + port->cached_edid = NULL;
> + }
> continue;
> + }
>
> if (!port->available_pbn)
> drm_dp_send_enum_path_resources(mgr, mstb, port);
> @@ -1283,6 +1286,12 @@ static void drm_dp_check_and_send_link_address(struct
> drm_dp_mst_topology_mgr *m
> drm_dp_check_and_send_link_address(mgr,
> mstb_child);
> drm_dp_put_mst_branch_device(mstb_child);
> }
> + } else if (port->pdt == DP_PEER_DEVICE_SST_SINK ||
> + port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV) {
> + if (!port->cached_edid) {
> + port->cached_edid =
> + drm_get_edid(port->connector,
> &port->aux.ddc);
> + }
> }
> }
> }
> @@ -1302,6 +1311,8 @@ static void drm_dp_mst_link_probe_work(struct
> work_struct *work)
> drm_dp_check_and_send_link_address(mgr, mstb);
> drm_dp_put_mst_branch_device(mstb);
> }
> +
> + (*mgr->cbs->hotplug)(mgr);
> }
>
> static bool drm_dp_validate_guid(struct drm_dp_mst_topology_mgr *mgr,
> @@ -1558,7 +1569,6 @@ static void drm_dp_send_link_address(struct
> drm_dp_mst_topology_mgr *mgr,
> for (i = 0; i < txmsg->reply.u.link_add
[Bug 94153] Unresponsive system on boot with radeon + HD 3870
https://bugs.freedesktop.org/show_bug.cgi?id=94153 --- Comment #4 from Andriy Dmytruk --- (In reply to Michel D�nzer from comment #3) > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/ > ?id=96ea47c0ec8c012509116bee8c57414281428fc4 > > might help. Sorry for my English. I am newbie. I do not know if I can patch the kernel. Can you tell me ? This patch is included in the kernel 4.3? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/b894503b/attachment.html>
[Bug 93801] GRID Autosport hang on logo (startup)
https://bugs.freedesktop.org/show_bug.cgi?id=93801 --- Comment #14 from Maxim Sheviakov --- (In reply to Michel D�nzer from comment #13) > There's no trace of the driver being involved in the hanging state. Based on > that and Jos�'s comments, let's assume that this is a game bug. Damn, that's interesting. I will try to attach gdb to game running with that line in its Steam options and search for anything different. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/7e44437a/attachment.html>
[Bug 88541] Resume of HDMI port fails
https://bugzilla.kernel.org/show_bug.cgi?id=88541 --- Comment #1 from Harald Brennich --- Some new results with openSuse 13.2 : Kernel 3.16.7-32-desktop: suspend/resume work outs of the box Kernel 3.16.7-32-vanilla: external monitor connected via HDMI stays black after resume from suspend -- You are receiving this mail because: You are watching the assignee of the bug.
[PATCH 11/16] drm/atmel-hldcd: removed optional dummy crtc mode_fixup function.
Thanks Boris.
@Daniel, do you want me to resend this patch or will you fix it directly in
mode-fixup git branch?
On 16-02-2016 16:58, Boris Brezillon wrote:
> On Tue, 16 Feb 2016 14:19:06 +
> Carlos Palminha wrote:
>
>> This patch set nukes all the dummy crtc mode_fixup implementations.
>> (made on top of Daniel topic/drm-misc branch)
>
> There's 2 typos in the subject line (s/hldcd/hlcdc/ and
> s/removed/remove/), and you're removing an empty line after
> atmel_hlcdc_crtc_create() definition (which is correct, but I'm not
> sure it should be part of the same patch).
> Otherwise it looks good to me.
> Once you've fixed those 2 things, you can add my
>
> Acked-by: Boris Brezillon
>
>>
>> Signed-off-by: Carlos Palminha
>> ---
>> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 9 -
>> 1 file changed, 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
>> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
>> index 9863291..58c4f78 100644
>> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
>> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
>> @@ -121,13 +121,6 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct
>> drm_crtc *c)
>> cfg);
>> }
>>
>> -static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
>> -const struct drm_display_mode *mode,
>> -struct drm_display_mode *adjusted_mode)
>> -{
>> -return true;
>> -}
>> -
>> static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
>> {
>> struct drm_device *dev = c->dev;
>> @@ -261,7 +254,6 @@ static void atmel_hlcdc_crtc_atomic_flush(struct
>> drm_crtc *crtc,
>> }
>>
>> static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
>> -.mode_fixup = atmel_hlcdc_crtc_mode_fixup,
>> .mode_set = drm_helper_crtc_mode_set,
>> .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
>> .mode_set_base = drm_helper_crtc_mode_set_base,
>> @@ -349,4 +341,3 @@ fail:
>> atmel_hlcdc_crtc_destroy(&crtc->base);
>> return ret;
>> }
>> -
>
>
[Bug 94186] Immediate crash when launching World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 --- Comment #2 from Samuel Pitoiset --- Hi, Thanks for the report, I'll have a look later today. Are you sure you can't make an useful backtrace? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/dd1a9a6e/attachment.html>
[PATCH v10 10/13] clk: mediatek: make dpi0_sel propagate rate changes
Hi Michael,
thank you for the comments.
Am Montag, den 15.02.2016, 15:14 -0800 schrieb Michael Turquette:
> Quoting Philipp Zabel (2016-02-03 11:25:59)
> > This mux is supposed to select a fitting divider after the PLL
> > is already set to the correct rate.
> >
> > Signed-off-by: Philipp Zabel
> > Acked-by: James Liao
> > ---
> > drivers/clk/mediatek/clk-mt8173.c | 2 +-
> > drivers/clk/mediatek/clk-mtk.h| 7 +--
> > 2 files changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/clk/mediatek/clk-mt8173.c
> > b/drivers/clk/mediatek/clk-mt8173.c
> > index 227e356..682b275 100644
> > --- a/drivers/clk/mediatek/clk-mt8173.c
> > +++ b/drivers/clk/mediatek/clk-mt8173.c
> > @@ -558,7 +558,7 @@ static const struct mtk_composite top_muxes[]
> > __initconst = {
> > MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2,
> > 23),
> > MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents,
> > 0x0090, 24, 4, 31),
> > /* CLK_CFG_6 */
> > - MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3,
> > 7),
> > + MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0,
> > 0, 3, 7, 0),
>
> So the only instance of MUX_GATE that should not propagate it's request
> up to the parent is dpi0_sel? Are you sure?
The other way around. This is the only clock I'm sure of that it
shouldn't propagate. For the others I don't know, so I want to leave
them as they are.
> I hope so because this patch changes all MUX_GATE clks to propagate
> their requests up to their parents, which is sort of a big change.
The MUX_GATE macro previously unconditionally set the
CLK_SET_RATE_PARENT, so nothing should have changed there. See (way)
below.
> Also, the name game is a bit confusing. I can see that you're trying to
> prevent having a huge patch that touches every MUX_GATE initialization.
> However it isn't obvious from the name "MUX_GATE()" that the macro will
> enable CLK_SET_RATE_PARENT functionality. Maybe put a comment above it
> just to make it extra clear?
I can do that.
> > MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2,
> > 15),
> > MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0,
> > 16, 3, 23),
> > MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24,
> > 2, 31),
> > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> > index 32d2e45..b607996 100644
> > --- a/drivers/clk/mediatek/clk-mtk.h
> > +++ b/drivers/clk/mediatek/clk-mtk.h
> > @@ -83,7 +83,7 @@ struct mtk_composite {
> > signed char num_parents;
> > };
> >
> > -#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) { \
> > +#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
> > _flags) {\
> > .id = _id, \
> > .name = _name, \
> > .mux_reg = _reg,\
> > @@ -94,9 +94,12 @@ struct mtk_composite {
> > .divider_shift = -1,\
> > .parent_names = _parents, \
> > .num_parents = ARRAY_SIZE(_parents),\
> > - .flags = CLK_SET_RATE_PARENT, \
> > + .flags = _flags,\
This.
> > }
> >
> > +#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate)\
> > + MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
> > CLK_SET_RATE_PARENT)
> > +
> > #define MUX(_id, _name, _parents, _reg, _shift, _width) { \
> > .id = _id, \
> > .name = _name, \
> > --
> > 2.7.0.rc3
best regards
Philipp
[PATCH v2 3/3] drm/layerscape: Add HDMI driver for freescale DCU
Hi Stefan, Thanks for pointing out those error, and I will fix them later, as I am the newcomer of Linux world, hope you don't mind some stupid mistake I made. Best Regards, Yi
[PATCH 1/2] dt-bindings: Add LG lp120up1 panel bindings
Add documentation for lp120up1 panel Signed-off-by: Jitao Shi --- .../bindings/display/panel/lg,lp120up1.txt |7 +++ 1 file changed, 7 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/lg,lp120up1.txt diff --git a/Documentation/devicetree/bindings/display/panel/lg,lp120up1.txt b/Documentation/devicetree/bindings/display/panel/lg,lp120up1.txt new file mode 100644 index 000..ff0b6c6 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,lp120up1.txt @@ -0,0 +1,7 @@ +LG 12.0" (1920x1280 pixels) TFT LCD panel + +Required properties: +- compatible: should be "lg,lp120up1" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. -- 1.7.9.5
VirtIO-GPU 3D OpenGL Hardware Acceleration for VMs
Hello! I tried to test virtGL on nouveau, and found few surprizes. First, new quemu (commit commit a5af12871fd4601c44f08d9e49131e9ca13ef102, Merge remote-tracking branch 'remotes/sstabellini/tags/xen-2016-02-12' into staging) failed to link wih gcc 4.9 if I specified -march=i486, switching to -march=i686 fixed this. I found this solution while search for specific error message: http://stackoverflow.com/questions/23065501/stdatomicunsiged-long-long-undefined-reference-to-atomic-fetch-add-8 error message in my case was "undefined reference to `__atomic_load_8' " Second, I found my Xserver (1.12.4 patched with some patches from later Xservers, excluding most of glx stuff) was too old, for host side. Qemu just crashed at the moment guest loaded drm driver. Upgrading to 1.18.1 fixed this, but I assume anything from 1.13.0 should be minimally enough ? (due to GLX_ARB_create_context, GLX_ARB_create_context_profile stuff) Next, I found even 1.18.1 by default builds without glamor support. There was configure swicth --enable-glamor, but it was, unlike dri3 stuff, off by default. Switching it on allowed guest to finally have 3d as in working glxinfo. glxgears still segfaulted. making /dev/shm user (ok, world-) writable fixed this. Found by strace-ing glxgears, and launching glxgears from root, where it worked. DRI3 stuff on host, where I also tried it, segfaulted similary, but I can live with DRI2/EXA here, especially because nouveau still have issues with glamor/modesetting, on both nv50, and nvc0, as I was told on #nouveau. I also tried few MESA debug environment variables in aempt to get rid of artefacts inside VM, but sadly they remained there. ESA_EXTENSION_MAX_YEAR=2001 ./x86_64-softmmu/qemu-system-x86_64 -cdrom /home/admin/slaxdvd-4.5.0-x64-test.iso -m 512 -display sdl,gl=on -enable-kvm -soundhw es1370 -usb -vga virtio -usbdevice mouse -cpu host for example not resulted in any improvements. MESA_GL_VERSION_OVERRIDE=3.0 and any version below (on host) resulted, like with old X server, in crashed qemu: gl_version 0 - compat profile WARNING: running without ARB robustness in place may crash qemu-system-x86_64: Couldn't find current GLX or EGL context. (note gl_version 0 thing - libepoxy bug? I use 1.3.1) So, I assume right now host 3D driver must support OpenGL 3.1 or up? Image links: http://ibin.co/2XC09wl34cuT http://ibin.co/2XCIj5vhR9l8 #nouveau log from 16-02-2016: https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=nouveau&date=2016-02-16 I hope it will help someone!
[PATCH 2/2] drm/panel: Add support for LG lp120up1 panel
The LG lp120up1 panel is a 12.0" 1920x1280 panel,
which can be supported by the simple panel driver
Signed-off-by: Jitao Shi
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index f88a631..2030c37 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -982,6 +982,29 @@ static const struct panel_desc lg_lb070wv8 = {
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
};
+static const struct drm_display_mode lg_lp120up1_mode = {
+ .clock = 162300,
+ .hdisplay = 1920,
+ .hsync_start = 1920 + 40,
+ .hsync_end = 1920 + 40 + 40,
+ .htotal = 1920 + 40 + 40+ 80,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 4,
+ .vsync_end = 1280 + 4 + 4,
+ .vtotal = 1280 + 4 + 4 + 12,
+ .vrefresh = 60,
+};
+
+static const struct panel_desc lg_lp120up1 = {
+ .modes = &lg_lp120up1_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 267,
+ .height = 183,
+ },
+};
+
static const struct drm_display_mode lg_lp129qe_mode = {
.clock = 285250,
.hdisplay = 2560,
@@ -1256,6 +1279,9 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "lg,lb070wv8",
.data = &lg_lb070wv8,
}, {
+ .compatible = "lg,lp120up1",
+ .data = &lg_lp120up1,
+ }, {
.compatible = "lg,lp129qe",
.data = &lg_lp129qe,
}, {
--
1.7.9.5
[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver
https://bugs.freedesktop.org/show_bug.cgi?id=94043 --- Comment #8 from Erik Brangs --- Thanks for your help. I don't think that it's a regression but I don't actually know for sure. I don't have a working version of the stack that I could revert to. I can't try reverting the Battle.net App because it's proprietary and automatically updates to the latest version. What I was able to find out is the following: On the Wine side, bug #37347 ( https://bugs.winehq.org/show_bug.cgi?id=37347 ) describes the same problem that I'm having. Although the bug title mentions only Intel, comment #16 by Peter Harris says that he has the problem with an ATI Radeon X1600. As mentioned above, I've got a Radeon X1400. Later, somebody from the Wine community reported Freedesktop bug #84651 ( https://bugs.freedesktop.org/show_bug.cgi?id=84651 ) which I linked above. A fix for Intel drivers was produced and according to comment #18 at the freedesktop bug it is in commit 0008d0e59eff365079323918508ffc87355a6bfd . AFAIK the associated mesa version has long been released to distributions (at least ones updating as often as Ubuntu, which I'm using). Wine closed the bug and all its duplicates as resolved upstream. Unfortunately, there wasn't any feedback on the Wine bug from Peter Harris or anybody else with a non-Intel graphics cards. That's why I have the strong suspicion that a very similar problem to the one in the Intel driver exists in whatever part is responsible for this when using my graphics cards. I'm not sure if it's helpful but there are some duplicates of the Wine bug ( https://bugs.winehq.org/show_bug.cgi?id=37786 , https://bugs.winehq.org/show_bug.cgi?id=37289 ) where Anastasius Focht mentions that "All apps built with MSVC Qt5 SDK using ANGLE graphics layer were affected." . -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/7330aa4d/attachment-0001.html>
[Bug 94186] Immediate crash when launching World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 --- Comment #3 from Chris Rankin --- Hi, WoW isn't creating a backtrace, but I've now noticed that glxinfo is core-dumping for me too! So perhaps this will help? Program received signal SIGSEGV, Segmentation fault. 0x in ?? () (gdb) bt #0 0x in ?? () #1 0x7236764f in cso_destroy_context (ctx=0x558d3960) at cso_cache/cso_context.c:343 #2 0x72238747 in st_destroy_context_priv (st=0x558bbed0) at state_tracker/st_context.c:185 #3 0x722388f2 in st_destroy_context (st=0x558bbed0) at state_tracker/st_context.c:460 #4 0x7233bb8d in dri_destroy_context (cPriv=) at dri_context.c:188 #5 0x7233ad73 in driDestroyContext (pcp=0x5583aa00) at dri_util.c:479 #6 0x77bb1b4f in dri2_destroy_context (context=0x55779540) at dri2_glx.c:129 #7 0x77b90279 in MakeContextCurrent (dpy=0x55760010, draw=25165835, read=25165835, gc_user=0x558c3c80) at glxcurrent.c:250 #8 0x8c03 in print_screen_info () #9 0x6f88 in main () -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/47b134ba/attachment.html>
[PATCH v11 00/14] MT8173 DRM support
Hi,
this MT8173 DRM update is rebased onto v9 of the MT8173 IOMMU SUPPORT
series and contains a few fixes as well as device tree changes to
hopefully enable HDMI on the MT8173 EVB.
Changes since v10:
- keep the plane's pending.enable state when disabling them initially
- add mipi dsi host to pass the dsi lane number, video format,
and mode_flag to dsi
- order od device tree node at the correct address
- add comments about MUX_GATE rate change propagation
The following patch are needed to cleanly apply the device tree changes on
top of v4.5-rc1:
https://patchwork.kernel.org/patch/8335451/ ("dts: mt8173: Add iommu/smi nodes
for mt8173")
And to build:
https://patchwork.kernel.org/patch/8335391/ ("dt-bindings: mediatek: Add smi
dts binding")
https://patchwork.kernel.org/patch/8335421/ ("memory: mediatek: Add SMI driver")
regards
Philipp
CK Hu (5):
dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
drm/mediatek: Add DSI sub driver
arm64: dts: mt8173: Add display subsystem related nodes
arm64: dts: mt8173: Add HDMI related nodes
Jie Qiu (3):
drm/mediatek: Add DPI sub driver
drm/mediatek: Add HDMI support
drm/mediatek: enable hdmi output control bit
Philipp Zabel (6):
dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding
clk: mediatek: make dpi0_sel propagate rate changes
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation
clk: mediatek: remove hdmitx_dig_cts from TOP clocks
arm64: dts: mt8173-evb: enable HDMI output
.../bindings/display/connector/hdmi-connector.txt | 1 +
.../bindings/display/mediatek/mediatek,disp.txt| 203 +
.../bindings/display/mediatek/mediatek,dpi.txt | 35 +
.../bindings/display/mediatek/mediatek,dsi.txt | 60 ++
.../bindings/display/mediatek/mediatek,hdmi.txt| 148
arch/arm64/boot/dts/mediatek/mt8173-evb.dts| 38 +
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 304 +++
drivers/clk/mediatek/clk-mt8173.c | 12 +-
drivers/clk/mediatek/clk-mtk.h | 15 +-
drivers/gpu/drm/Kconfig| 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/mediatek/Kconfig | 21 +
drivers/gpu/drm/mediatek/Makefile | 23 +
drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++
drivers/gpu/drm/mediatek/mtk_cec.h | 25 +
drivers/gpu/drm/mediatek/mtk_disp_ovl.c| 302 +++
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 240 ++
drivers/gpu/drm/mediatek/mtk_dpi.c | 757 +
drivers/gpu/drm/mediatek/mtk_dpi.h | 85 ++
drivers/gpu/drm/mediatek/mtk_dpi_regs.h| 228 +
drivers/gpu/drm/mediatek/mtk_drm_crtc.c| 580 +
drivers/gpu/drm/mediatek/mtk_drm_crtc.h| 32 +
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 355
drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 41 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c| 225 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h| 150
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 583 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 56 ++
drivers/gpu/drm/mediatek/mtk_drm_fb.c | 165
drivers/gpu/drm/mediatek/mtk_drm_fb.h | 23 +
drivers/gpu/drm/mediatek/mtk_drm_gem.c | 266 ++
drivers/gpu/drm/mediatek/mtk_drm_gem.h | 59 ++
drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c| 579 +
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 240 ++
drivers/gpu/drm/mediatek/mtk_drm_plane.h | 59 ++
drivers/gpu/drm/mediatek/mtk_dsi.c | 942 +
drivers/gpu/drm/mediatek/mtk_hdmi.c| 479 +++
drivers/gpu/drm/mediatek/mtk_hdmi.h| 221 +
drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c| 362
drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 664 +++
drivers/gpu/drm/mediatek/mtk_hdmi_hw.h | 73 ++
drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 222 +
drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 +++
drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 505 +++
include/dt-bindings/clock/mt8173-clk.h | 3 +-
45 files changed, 10111 insertions(+), 5 deletions(-)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
create mode 100644 drivers/gpu/drm/mediatek/Kconf
[PATCH v11 01/14] dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
From: CK Hu
Add device tree binding documentation for the display subsystem in
Mediatek MT8173 SoCs.
Signed-off-by: CK Hu
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,disp.txt| 203 +
.../bindings/display/mediatek/mediatek,dpi.txt | 35
.../bindings/display/mediatek/mediatek,dsi.txt | 60 ++
3 files changed, 298 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
new file mode 100644
index 000..db6e77e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -0,0 +1,203 @@
+Mediatek display subsystem
+==
+
+The Mediatek display subsystem consists of various DISP function blocks in the
+MMSYS register space. The connections between them can be configured by output
+and input selectors in the MMSYS_CONFIG register space. Pixel clock and start
+of frame signal are distributed to the other function blocks by a DISP_MUTEX
+function block.
+
+All DISP device tree nodes must be siblings to the central MMSYS_CONFIG node.
+For a description of the MMSYS_CONFIG binding, see
+Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt.
+
+DISP function blocks
+
+
+A display stream starts at a source function block that reads pixel data from
+memory and ends with a sink function block that drives pixels on a display
+interface, or writes pixels back to memory. All DISP function blocks have
+their own register space, interrupt, and clock gate. The blocks that can
+access memory additionally have to list the IOMMU and local arbiter they are
+connected to.
+
+For a description of the display interface sink function blocks, see
+Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt and
+Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
+
+Required properties (all function blocks):
+- compatible: "mediatek,-disp-", one of
+ "mediatek,-disp-ovl" - overlay (4 layers, blending, csc)
+ "mediatek,-disp-rdma" - read DMA / line buffer
+ "mediatek,-disp-wdma" - write DMA
+ "mediatek,-disp-color" - color processor
+ "mediatek,-disp-aal" - adaptive ambient light controller
+ "mediatek,-disp-gamma" - gamma correction
+ "mediatek,-disp-merge" - merge streams from two RDMA sources
+ "mediatek,-disp-split" - split stream to two encoders
+ "mediatek,-disp-ufoe" - data compression engine
+ "mediatek,-dsi"- DSI controller, see mediatek,dsi.txt
+ "mediatek,-dpi"- DPI controller, see mediatek,dpi.txt
+ "mediatek,-disp-mutex" - display mutex
+ "mediatek,-disp-od"- overdrive
+- reg: Physical base address and length of the function block register space
+- interrupts: The interrupt signal from the function block (required, except
for
+ merge and split function blocks).
+- clocks: device clocks
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+ For most function blocks this is just a single clock input. Only the DSI and
+ DPI controller nodes have multiple clock inputs. These are documented in
+ mediatek,dsi.txt and mediatek,dpi.txt, respectively.
+
+Required properties (DMA function blocks):
+- compatible: Should be one of
+ "mediatek,-disp-ovl"
+ "mediatek,-disp-rdma"
+ "mediatek,-disp-wdma"
+- larb: Should contain a phandle pointing to the local arbiter device as
defined
+ in Documentation/devicetree/bindings/soc/mediatek/mediatek,smi-larb.txt
+- iommus: Should point to the respective IOMMU block with master port as
+ argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+ for details.
+
+Examples:
+
+mmsys: clock-controller at 1400 {
+ compatible = "mediatek,mt8173-mmsys", "syscon";
+ reg = <0 0x1400 0 0x1000>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ #clock-cells = <1>;
+};
+
+ovl0: ovl at 1400c000 {
+ compatible = "mediatek,mt8173-disp-ovl";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = ;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ iommus = <&iommu M4U_PORT_DISP_OVL0>;
+ mediatek,larb = <&larb0>;
+};
+
+ovl1: ovl at 1400d000 {
+ compatible = "mediatek,mt8173-disp-ovl";
+ reg = <0 0x1400d000 0 0x1000>;
+ interrupts = ;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ clocks = <&mmsys CLK_MM_DISP_OVL1>;
+ iommus = <&iommu M4U_PORT_DISP_OVL1>;
+ mediatek,larb = <&larb4>;
+};
+
+rdma0: rdma
[PATCH v11 03/14] drm/mediatek: Add DSI sub driver
From: CK Hu
This patch add a drm encoder/connector driver for the MIPI DSI function
block of the Mediatek display subsystem and a phy driver for the MIPI TX
D-PHY control module.
Signed-off-by: Jitao Shi
Signed-off-by: Philipp Zabel
--
Changes since v10:
- add mipi dsi host to pass the dsi lane number, video format,
and mode_flag to dsi.
---
drivers/gpu/drm/mediatek/Kconfig | 2 +
drivers/gpu/drm/mediatek/Makefile | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +
drivers/gpu/drm/mediatek/mtk_dsi.c | 942 +
drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 +
6 files changed, 1438 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_dsi.c
create mode 100644 drivers/gpu/drm/mediatek/mtk_mipi_tx.c
diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig
index 8dad892..0c49a94 100644
--- a/drivers/gpu/drm/mediatek/Kconfig
+++ b/drivers/gpu/drm/mediatek/Kconfig
@@ -3,6 +3,8 @@ config DRM_MEDIATEK
depends on DRM
depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST)
select DRM_KMS_HELPER
+ select DRM_MIPI_DSI
+ select DRM_PANEL
select IOMMU_DMA
select MTK_SMI
help
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index d4bde7c..e781db5a 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -6,6 +6,8 @@ mediatek-drm-y := mtk_disp_ovl.o \
mtk_drm_drv.o \
mtk_drm_fb.o \
mtk_drm_gem.o \
- mtk_drm_plane.o
+ mtk_drm_plane.o \
+ mtk_dsi.o \
+ mtk_mipi_tx.o
obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index d268e5d..ed8bc3c 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -538,6 +538,8 @@ static struct platform_driver * const mtk_drm_drivers[] = {
&mtk_drm_platform_driver,
&mtk_disp_ovl_driver,
&mtk_disp_rdma_driver,
+ &mtk_dsi_driver,
+ &mtk_mipi_tx_driver,
};
static int __init mtk_drm_init(void)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index 7a5cb17..2cd04e0 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -49,5 +49,7 @@ struct mtk_drm_private {
extern struct platform_driver mtk_disp_ovl_driver;
extern struct platform_driver mtk_disp_rdma_driver;
+extern struct platform_driver mtk_dsi_driver;
+extern struct platform_driver mtk_mipi_tx_driver;
#endif /* MTK_DRM_DRV_H */
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
new file mode 100644
index 000..463d389
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -0,0 +1,942 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "mtk_drm_ddp_comp.h"
+
+#define DSI_VIDEO_FIFO_DEPTH (1920 / 4)
+#define DSI_HOST_FIFO_DEPTH64
+
+#define DSI_START 0x00
+
+#define DSI_CON_CTRL 0x10
+#define DSI_RESET BIT(0)
+#define DSI_EN BIT(1)
+
+#define DSI_MODE_CTRL 0x14
+#define MODE (3)
+#define CMD_MODE 0
+#define SYNC_PULSE_MODE1
+#define SYNC_EVENT_MODE2
+#define BURST_MODE 3
+#define FRM_MODE BIT(16)
+#define MIX_MODE BIT(17)
+
+#define DSI_TXRX_CTRL 0x18
+#define VC_NUM (2 << 0)
+#define LANE_NUM (0xf << 2)
+#define DIS_EOTBIT(6)
+#define NULL_ENBIT(7)
+#define TE_FREERUN BIT(8)
+#define EXT_TE_EN BIT(9)
+#define EXT_TE_EDGEBIT(10)
+#define MAX_RTN_SIZE (0xf << 12)
+#define HSTX_CKLP_EN BIT(16)
+
+#define DSI_PSCTRL 0x1c
+#define DSI_PS_WC 0x3fff
+#define DSI_PS_SEL (3 << 16)
+#define PACKED_PS_16BIT_RGB565 (0 << 16)
+#define LOOSELY_PS_18B
[PATCH v11 05/14] dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding
Add the device tree binding documentation for Mediatek HDMI,
HDMI PHY and HDMI DDC devices.
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,hdmi.txt| 148 +
1 file changed, 148 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
new file mode 100644
index 000..7b12424
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt
@@ -0,0 +1,148 @@
+Mediatek HDMI Encoder
+=
+
+The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
+its parallel input.
+
+Required properties:
+- compatible: Should be "mediatek,-hdmi".
+- reg: Physical base address and length of the controller's registers
+- interrupts: The interrupt signal from the function block.
+- clocks: device clocks
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- clock-names: must contain "pixel", "pll", "bclk", and "spdif".
+- phys: phandle link to the HDMI PHY node.
+ See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
+- phy-names: must contain "hdmi"
+- mediatek,syscon-hdmi: phandle link and register offset to the system
+ configuration registers. For mt8173 this must be offset 0x900 into the
+ MMSYS_CONFIG region: <&mmsys 0x900>.
+- ports: A node containing input and output port nodes with endpoint
+ definitions as documented in Documentation/devicetree/bindings/graph.txt.
+- port at 0: The input port in the ports node should be connected to a DPI
output
+ port.
+- port at 1: The output port in the ports node should be connected to the input
+ port of a connector node that contains a ddc-i2c-bus property, or to the
+ input port of an attached bridge chip, such as a SlimPort transmitter.
+
+HDMI CEC
+
+
+The HDMI CEC controller handles hotplug detection and CEC communication.
+
+Required properties:
+- compatible: Should be "mediatek,-cec"
+- reg: Physical base address and length of the controller's registers
+- interrupts: The interrupt signal from the function block.
+- clocks: device clock
+
+HDMI DDC
+
+
+The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
+The Mediatek's I2C controller is used to interface with I2C devices.
+
+Required properties:
+- compatible: Should be "mediatek,-hdmi-ddc"
+- reg: Physical base address and length of the controller's registers
+- clocks: device clock
+- clock-names: Should be "ddc-i2c".
+
+HDMI PHY
+
+
+The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
+output and drives the HDMI pads.
+
+Required properties:
+- compatible: "mediatek,-hdmi-phy"
+- reg: Physical base address and length of the module's registers
+- clocks: PLL reference clock
+- clock-names: must contain "pll_ref"
+- clock-output-names: must be "hdmitx_dig_cts" on mt8173
+- #phy-cells: must be <0>
+- #clock-cells: must be <0>
+
+Optional properties:
+- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
+- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
+
+Example:
+
+cec: cec at 10013000 {
+ compatible = "mediatek,mt8173-cec";
+ reg = <0 0x10013000 0 0xbc>;
+ interrupts = ;
+ clocks = <&infracfg CLK_INFRA_CEC>;
+};
+
+hdmi_phy: hdmi-phy at 10209100 {
+ compatible = "mediatek,mt8173-hdmi-phy";
+ reg = <0 0x10209100 0 0x24>;
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
+ clock-names = "pll_ref";
+ clock-output-names = "hdmitx_dig_cts";
+ mediatek,ibias = <0xa>;
+ mediatek,ibias_up = <0x1c>;
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+};
+
+hdmi_ddc0: i2c at 11012000 {
+ compatible = "mediatek,mt8173-hdmi-ddc";
+ reg = <0 0x11012000 0 0x1c>;
+ interrupts = ;
+ clocks = <&pericfg CLK_PERI_I2C5>;
+ clock-names = "ddc-i2c";
+};
+
+hdmi0: hdmi at 14025000 {
+ compatible = "mediatek,mt8173-hdmi";
+ reg = <0 0x14025000 0 0x400>;
+ interrupts = ;
+ clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
+<&mmsys CLK_MM_HDMI_PLLCK>,
+<&mmsys CLK_MM_HDMI_AUDIO>,
+<&mmsys CLK_MM_HDMI_SPDIF>;
+ clock-names = "pixel", "pll", "bclk", "spdif";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pin>;
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi";
+ mediatek,syscon-hdmi = <&mmsys 0x900>;
+ assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;
+ assigned-clock-parents = <&hdmi_phy>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ hdmi0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+
[PATCH v11 02/14] drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
From: CK Hu This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu Signed-off-by: YT Shen Signed-off-by: Daniel Kurtz Signed-off-by: Bibby Hsieh Signed-off-by: Mao Huang Signed-off-by: Philipp Zabel --- Changes since v10: - Keep the plane's pending.enable state when disabling them initially. --- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile| 1 + drivers/gpu/drm/mediatek/Kconfig| 12 + drivers/gpu/drm/mediatek/Makefile | 11 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 302 +++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c| 240 drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 580 drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 32 ++ drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 355 + drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 41 ++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 225 +++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 150 +++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 579 +++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 53 +++ drivers/gpu/drm/mediatek/mtk_drm_fb.c | 165 drivers/gpu/drm/mediatek/mtk_drm_fb.h | 23 ++ drivers/gpu/drm/mediatek/mtk_drm_gem.c | 266 + drivers/gpu/drm/mediatek/mtk_drm_gem.h | 59 +++ drivers/gpu/drm/mediatek/mtk_drm_plane.c| 240 drivers/gpu/drm/mediatek/mtk_drm_plane.h| 59 +++ 20 files changed, 3395 insertions(+) create mode 100644 drivers/gpu/drm/mediatek/Kconfig create mode 100644 drivers/gpu/drm/mediatek/Makefile create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl.c create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.h diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 8ae7ab6..f7b0d79 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -269,3 +269,5 @@ source "drivers/gpu/drm/imx/Kconfig" source "drivers/gpu/drm/vc4/Kconfig" source "drivers/gpu/drm/etnaviv/Kconfig" + +source "drivers/gpu/drm/mediatek/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 61766de..7b0d1ab 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_DRM_MSM) += msm/ obj-$(CONFIG_DRM_TEGRA) += tegra/ obj-$(CONFIG_DRM_STI) += sti/ obj-$(CONFIG_DRM_IMX) += imx/ +obj-$(CONFIG_DRM_MEDIATEK) += mediatek/ obj-y += i2c/ obj-y += panel/ obj-y += bridge/ diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig new file mode 100644 index 000..8dad892 --- /dev/null +++ b/drivers/gpu/drm/mediatek/Kconfig @@ -0,0 +1,12 @@ +config DRM_MEDIATEK + tristate "DRM Support for Mediatek SoCs" + depends on DRM + depends on ARCH_MEDIATEK || (ARM && COMPILE_TEST) + select DRM_KMS_HELPER + select IOMMU_DMA + select MTK_SMI + help + Choose this option if you have a Mediatek SoCs. + The module will be called mediatek-drm + This driver provides kernel mode setting and + buffer management to userspace. diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile new file mode 100644 index 000..d4bde7c --- /dev/null +++ b/drivers/gpu/drm/mediatek/Makefile @@ -0,0 +1,11 @@ +mediatek-drm-y := mtk_disp_ovl.o \ + mtk_disp_rdma.o \ + mtk_drm_crtc.o \ + mtk_drm_ddp.o \ + mtk_drm_ddp_comp.o \ + mtk_drm_drv.o \ + mtk_drm_fb.o \ + mtk_drm_gem.o \ + mtk_drm_plane.o + +obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c new file mode 100644 index 000..8f62671f --- /dev/null +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -0,0 +1,302 @@ +/* + * Copyright
[PATCH v11 04/14] drm/mediatek: Add DPI sub driver
From: Jie Qiu
Add DPI connector/encoder to support HDMI output via the
attached HDMI bridge.
Signed-off-by: Jie Qiu
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_dpi.c | 757
drivers/gpu/drm/mediatek/mtk_dpi.h | 85
drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 228 ++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
6 files changed, 1074 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.c
create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.h
create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi_regs.h
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index e781db5a..5fcf58e 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -8,6 +8,7 @@ mediatek-drm-y := mtk_disp_ovl.o \
mtk_drm_gem.o \
mtk_drm_plane.o \
mtk_dsi.o \
- mtk_mipi_tx.o
+ mtk_mipi_tx.o \
+ mtk_dpi.o
obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
b/drivers/gpu/drm/mediatek/mtk_dpi.c
new file mode 100644
index 000..ae81906
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -0,0 +1,757 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Jie Qiu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "mtk_dpi.h"
+#include "mtk_dpi_regs.h"
+
+enum mtk_dpi_polarity {
+ MTK_DPI_POLARITY_RISING,
+ MTK_DPI_POLARITY_FALLING,
+};
+
+enum mtk_dpi_power_ctl {
+ DPI_POWER_START = BIT(0),
+ DPI_POWER_ENABLE = BIT(1),
+ DPI_POWER_RESUME = BIT(2),
+};
+
+struct mtk_dpi_polarities {
+ enum mtk_dpi_polarity de_pol;
+ enum mtk_dpi_polarity ck_pol;
+ enum mtk_dpi_polarity hsync_pol;
+ enum mtk_dpi_polarity vsync_pol;
+};
+
+struct mtk_dpi_sync_param {
+ u32 sync_width;
+ u32 front_porch;
+ u32 back_porch;
+ bool shift_half_line;
+};
+
+struct mtk_dpi_yc_limit {
+ u16 y_top;
+ u16 y_bottom;
+ u16 c_top;
+ u16 c_bottom;
+};
+
+static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
+{
+ u32 tmp = readl(dpi->regs + offset) & ~mask;
+
+ tmp |= (val & mask);
+ writel(tmp, dpi->regs + offset);
+}
+
+static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
+{
+ mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
+}
+
+static void mtk_dpi_enable(struct mtk_dpi *dpi)
+{
+ mtk_dpi_mask(dpi, DPI_EN, EN, EN);
+}
+
+static void mtk_dpi_disable(struct mtk_dpi *dpi)
+{
+ mtk_dpi_mask(dpi, DPI_EN, 0, EN);
+}
+
+static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
+struct mtk_dpi_sync_param *sync)
+{
+ mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
+sync->sync_width << HPW, HPW_MASK);
+ mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
+sync->back_porch << HBP, HBP_MASK);
+ mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
+HFP_MASK);
+}
+
+static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
+struct mtk_dpi_sync_param *sync,
+u32 width_addr, u32 porch_addr)
+{
+ mtk_dpi_mask(dpi, width_addr,
+sync->sync_width << VSYNC_WIDTH_SHIFT,
+VSYNC_WIDTH_MASK);
+ mtk_dpi_mask(dpi, width_addr,
+sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
+VSYNC_HALF_LINE_MASK);
+ mtk_dpi_mask(dpi, porch_addr,
+sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
+VSYNC_BACK_PORCH_MASK);
+ mtk_dpi_mask(dpi, porch_addr,
+sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
+VSYNC_FRONT_PORCH_MASK);
+}
+
+static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
+ struct mtk_dpi_sync_param *sync)
+{
+ mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
+}
+
+static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
+ struct mtk_dpi_sync_param *sync)
+{
+ mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
+DPI_TGEN_VPORCH_LEVEN);
+}
+
+static void
[PATCH v11 06/14] drm/mediatek: Add HDMI support
From: Jie Qiu This patch adds drivers for the HDMI bridge connected to the DPI0 display subsystem function block, for the HDMI DDC block, and for the HDMI PHY to support HDMI output. Signed-off-by: Jie Qiu Signed-off-by: Philipp Zabel --- drivers/gpu/drm/mediatek/Kconfig | 7 + drivers/gpu/drm/mediatek/Makefile | 9 + drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++ drivers/gpu/drm/mediatek/mtk_cec.h | 25 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 + drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c| 579 ++ drivers/gpu/drm/mediatek/mtk_hdmi.c| 479 ++ drivers/gpu/drm/mediatek/mtk_hdmi.h| 221 + drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c| 362 ++ drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 652 + drivers/gpu/drm/mediatek/mtk_hdmi_hw.h | 73 +++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 221 + drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 505 +++ 13 files changed, 3379 insertions(+) create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.c create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c diff --git a/drivers/gpu/drm/mediatek/Kconfig b/drivers/gpu/drm/mediatek/Kconfig index 0c49a94..e2ff158 100644 --- a/drivers/gpu/drm/mediatek/Kconfig +++ b/drivers/gpu/drm/mediatek/Kconfig @@ -12,3 +12,10 @@ config DRM_MEDIATEK The module will be called mediatek-drm This driver provides kernel mode setting and buffer management to userspace. + +config DRM_MEDIATEK_HDMI + tristate "DRM HDMI Support for Mediatek SoCs" + depends on DRM_MEDIATEK + select GENERIC_PHY + help + DRM/KMS HDMI driver for Mediatek SoCs diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile index 5fcf58e..6d53bee 100644 --- a/drivers/gpu/drm/mediatek/Makefile +++ b/drivers/gpu/drm/mediatek/Makefile @@ -12,3 +12,12 @@ mediatek-drm-y := mtk_disp_ovl.o \ mtk_dpi.o obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o + +mediatek-drm-hdmi-objs := mtk_cec.o \ + mtk_drm_hdmi_drv.o \ + mtk_hdmi.o \ + mtk_hdmi_ddc_drv.o \ + mtk_hdmi_hw.o \ + mtk_mt8173_hdmi_phy.o + +obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c b/drivers/gpu/drm/mediatek/mtk_cec.c new file mode 100644 index 000..cba3647 --- /dev/null +++ b/drivers/gpu/drm/mediatek/mtk_cec.c @@ -0,0 +1,245 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Jie Qiu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include + +#include "mtk_cec.h" + +#define TR_CONFIG 0x00 +#define CLEAR_CEC_IRQ BIT(15) + +#define CEC_CKGEN 0x04 +#define CEC_32K_PDNBIT(19) +#define PDNBIT(16) + +#define RX_EVENT 0x54 +#define HDMI_PORD BIT(25) +#define HDMI_HTPLG BIT(24) +#define HDMI_PORD_INT_EN BIT(9) +#define HDMI_HTPLG_INT_EN BIT(8) + +#define RX_GEN_WD 0x58 +#define HDMI_PORD_INT_32K_STATUS BIT(26) +#define RX_RISC_INT_32K_STATUS BIT(25) +#define HDMI_HTPLG_INT_32K_STATUS BIT(24) +#define HDMI_PORD_INT_32K_CLR BIT(18) +#define RX_INT_32K_CLR BIT(17) +#define HDMI_HTPLG_INT_32K_CLR BIT(16) +#define HDMI_PORD_INT_32K_STA_MASK BIT(10) +#define RX_RISC_INT_32K_STA_MASK BIT(9) +#define HDMI_HTPLG_INT_32K_STA_MASKBIT(8) +#define HDMI_PORD_INT_32K_EN BIT(2) +#define RX_INT_32K_EN BIT(1) +#define HDMI_HTPLG_INT_32K_EN BIT(0) + +#define NORMAL_INT_CTRL0x5C +#define HDMI_HTPLG_INT_STA BIT(0) +#define HDMI_PORD_INT_STA BIT(1) +#define HDMI_HTPLG_INT_CLR BIT(16) +#de
[PATCH v11 10/14] clk: mediatek: make dpi0_sel propagate rate changes
This mux is supposed to select a fitting divider after the PLL
is already set to the correct rate.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
---
Changes since v10:
- Add comments about MUX_GATE rate change propagation
---
drivers/clk/mediatek/clk-mt8173.c | 6 +-
drivers/clk/mediatek/clk-mtk.h| 15 +--
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/clk/mediatek/clk-mt8173.c
index 227e356..85c0bfc 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -558,7 +558,11 @@ static const struct mtk_composite top_muxes[] __initconst
= {
MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090,
24, 4, 31),
/* CLK_CFG_6 */
- MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7),
+ /*
+* The dpi0_sel clock should not propagate rate changes to its parent
+* clock so the dpi driver can have full control over PLL and divider.
+*/
+ MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0,
3, 7, 0),
MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2, 15),
MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0, 16,
3, 23),
MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24, 2,
31),
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 32d2e45..9f24fcf 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -83,7 +83,11 @@ struct mtk_composite {
signed char num_parents;
};
-#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) { \
+/*
+ * In case the rate change propagation to parent clocks is undesirable,
+ * this macro allows to specify the clock flags manually.
+ */
+#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
_flags) {\
.id = _id, \
.name = _name, \
.mux_reg = _reg,\
@@ -94,9 +98,16 @@ struct mtk_composite {
.divider_shift = -1,\
.parent_names = _parents, \
.num_parents = ARRAY_SIZE(_parents),\
- .flags = CLK_SET_RATE_PARENT, \
+ .flags = _flags,\
}
+/*
+ * Unless necessary, all MUX_GATE clocks propagate rate changes to their
+ * parent clock by default.
+ */
+#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate)\
+ MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
CLK_SET_RATE_PARENT)
+
#define MUX(_id, _name, _parents, _reg, _shift, _width) { \
.id = _id, \
.name = _name, \
--
2.7.0
[PATCH v11 08/14] arm64: dts: mt8173: Add display subsystem related nodes
From: CK Hu
This patch adds the device nodes for the DISP function blocks
comprising the display subsystem.
Signed-off-by: CK Hu
Signed-off-by: Cawa Cheng
Signed-off-by: Jie Qiu
Signed-off-by: Daniel Kurtz
Signed-off-by: Philipp Zabel
---
Changes since v10:
- reordered nodes by address
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 235 +++
1 file changed, 235 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 8048811..4ff666d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -26,6 +26,23 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ ovl0 = &ovl0;
+ ovl1 = &ovl1;
+ rdma0 = &rdma0;
+ rdma1 = &rdma1;
+ rdma2 = &rdma2;
+ wdma0 = &wdma0;
+ wdma1 = &wdma1;
+ color0 = &color0;
+ color1 = &color1;
+ split0 = &split0;
+ split1 = &split1;
+ dpi0 = &dpi0;
+ dsi0 = &dsi0;
+ dsi1 = &dsi1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -295,6 +312,26 @@
#clock-cells = <1>;
};
+ mipi_tx0: mipi-dphy at 10215000 {
+ compatible = "mediatek,mt8173-mipi-tx";
+ reg = <0 0x10215000 0 0x1000>;
+ clocks = <&clk26m>;
+ clock-output-names = "mipi_tx0_pll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ mipi_tx1: mipi-dphy at 10216000 {
+ compatible = "mediatek,mt8173-mipi-tx";
+ reg = <0 0x10216000 0 0x1000>;
+ clocks = <&clk26m>;
+ clock-output-names = "mipi_tx1_pll";
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller at 1022 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -441,6 +478,14 @@
status = "disabled";
};
+ hdmiddc0: i2c at 11012000 {
+ compatible = "mediatek,mt8173-hdmi-ddc";
+ interrupts = ;
+ reg = <0 0x11012000 0 0x1C>;
+ clocks = <&pericfg CLK_PERI_I2C5>;
+ clock-names = "ddc-i2c";
+ };
+
i2c6: i2c at 11013000 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x11013000 0 0x70>,
@@ -576,7 +621,183 @@
mmsys: clock-controller at 1400 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
#clock-cells = <1>;
+
+ /* FIXME - remove iommus here */
+ iommus = <&iommu M4U_PORT_DISP_OVL0>,
+<&iommu M4U_PORT_DISP_OVL1>;
+ };
+
+ ovl0: ovl at 1400c000 {
+ compatible = "mediatek,mt8173-disp-ovl";
+ reg = <0 0x1400c000 0 0x1000>;
+ interrupts = ;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ clocks = <&mmsys CLK_MM_DISP_OVL0>;
+ iommus = <&iommu M4U_PORT_DISP_OVL0>;
+ mediatek,larb = <&larb0>;
+ };
+
+ ovl1: ovl at 1400d000 {
+ compatible = "mediatek,mt8173-disp-ovl";
+ reg = <0 0x1400d000 0 0x1000>;
+ interrupts = ;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ clocks = <&mmsys CLK_MM_DISP_OVL1>;
+ iommus = <&iommu M4U_PORT_DISP_OVL1>;
+ mediatek,larb = <&larb4>;
+ };
+
+ rdma0: rdma at 1400e000 {
+ compatible = "mediatek,mt8173-disp-rdma";
+ reg = <0 0x1400e000 0 0x1000>;
+ interrupts = ;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+ clocks = <&mmsys CLK_MM_DISP_RDMA0>;
+ iommus = <&iommu M4U_PORT_DISP_RDMA0>;
+ mediatek,larb = <&larb0>;
+ };
+
+ rdma1: rdma at 1400f000 {
+ compatible = "mediatek,mt8173-disp-rdma";
+
[PATCH v11 11/14] clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
---
drivers/clk/mediatek/clk-mt8173.c | 5 +
include/dt-bindings/clock/mt8173-clk.h | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/clk/mediatek/clk-mt8173.c
index 85c0bfc..cf4fcb6 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -1095,6 +1095,11 @@ static void __init mtk_apmixedsys_init(struct
device_node *node)
clk_data->clks[cku->id] = clk;
}
+ clk = clk_register_divider(NULL, "hdmi_ref", "tvdpll_594m", 0,
+ base + 0x40, 16, 3, CLK_DIVIDER_POWER_OF_TWO,
+ NULL);
+ clk_data->clks[CLK_APMIXED_HDMI_REF] = clk;
+
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
diff --git a/include/dt-bindings/clock/mt8173-clk.h
b/include/dt-bindings/clock/mt8173-clk.h
index 7956ba1..6094bf7 100644
--- a/include/dt-bindings/clock/mt8173-clk.h
+++ b/include/dt-bindings/clock/mt8173-clk.h
@@ -176,7 +176,8 @@
#define CLK_APMIXED_LVDSPLL13
#define CLK_APMIXED_MSDCPLL2 14
#define CLK_APMIXED_REF2USB_TX 15
-#define CLK_APMIXED_NR_CLK 16
+#define CLK_APMIXED_HDMI_REF 16
+#define CLK_APMIXED_NR_CLK 17
/* INFRA_SYS */
--
2.7.0
[PATCH v11 12/14] dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation
Add an optional ddc-i2c-bus phandle property that points to an I2C master controller that handles the connector DDC pins. Signed-off-by: Philipp Zabel Acked-by: Rob Herring --- Documentation/devicetree/bindings/display/connector/hdmi-connector.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt index acd5668..508aee4 100644 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt @@ -8,6 +8,7 @@ Required properties: Optional properties: - label: a symbolic name for the connector - hpd-gpios: HPD GPIO number +- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing Required nodes: - Video port for HDMI input -- 2.7.0
[PATCH v11 13/14] clk: mediatek: remove hdmitx_dig_cts from TOP clocks
The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m,
but is routed out of the HDMI PHY module.
Signed-off-by: Philipp Zabel
---
drivers/clk/mediatek/clk-mt8173.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/clk/mediatek/clk-mt8173.c
index cf4fcb6..10c9860 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -61,7 +61,6 @@ static const struct mtk_fixed_factor top_divs[] __initconst =
{
FACTOR(CLK_TOP_CLKRTC_INT, "clkrtc_int", "clk26m", 1, 793),
FACTOR(CLK_TOP_FPC, "fpc_ck", "clk26m", 1, 1),
- FACTOR(CLK_TOP_HDMITX_DIG_CTS, "hdmitx_dig_cts", "tvdpll_445p5m", 1, 3),
FACTOR(CLK_TOP_HDMITXPLL_D2, "hdmitxpll_d2", "hdmitx_dig_cts", 1, 2),
FACTOR(CLK_TOP_HDMITXPLL_D3, "hdmitxpll_d3", "hdmitx_dig_cts", 1, 3),
--
2.7.0
[PATCH v11 14/14] arm64: dts: mt8173-evb: enable HDMI output
Add an HDMI connector node and enable the devices that are part of the
HDMI display path: cec, dpi0, hdmi_phy, and hdmi0.
Signed-off-by: Philipp Zabel
---
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 38 +
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index e427f04..5ee7f24 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -42,6 +42,44 @@
gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "d";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi0_out>;
+ };
+ };
+ };
+};
+
+&cec {
+ status = "okay";
+};
+
+&dpi0 {
+ status = "okay";
+};
+
+&hdmi_phy {
+ status = "okay";
+};
+
+&hdmi0 {
+ status = "okay";
+
+ ports {
+ port at 1 {
+ reg = <1>;
+
+ hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
};
&i2c1 {
--
2.7.0
[PATCH v11 07/14] drm/mediatek: enable hdmi output control bit
From: Jie Qiu
MT8173 HDMI hardware has a output control bit to enable/disable HDMI
output. Because of security reason, so this bit can ONLY be controlled
in ARM supervisor mode. Now the only way to enter ARM supervisor is the
ARM trusted firmware. So atf provides a API for HDMI driver to call to
setup this HDMI control bit to enable HDMI output in supervisor mode.
Signed-off-by: Jie Qiu
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 12
drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
index 99c7ffc..ea4e35f 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_hw.c
@@ -15,6 +15,7 @@
#include "mtk_hdmi_regs.h"
#include "mtk_hdmi.h"
+#include
#include
#include
#include
@@ -50,6 +51,17 @@ void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi,
void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
{
+ struct arm_smccc_res res;
+
+ /*
+* MT8173 HDMI hardware has an output control bit to enable/disable HDMI
+* output. This bit can only be controlled in ARM supervisor mode.
+* The ARM trusted firmware provides an API for the HDMI driver to set
+* this control bit to enable HDMI output in supervisor mode.
+*/
+ arm_smccc_smc(MTK_SIP_SET_AUTHORIZED_SECURE_REG, 0x14000904, 0x8000,
+ 0, 0, 0, 0, 0, &res);
+
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
HDMI_PCLK_FREE_RUN, enable ? HDMI_PCLK_FREE_RUN : 0);
regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
index 8c1d318..d88279f 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_regs.h
@@ -218,4 +218,5 @@
#define MHL_SYNC_AUTO_EN BIT(30)
#define HDMI_PCLK_FREE_RUN BIT(31)
+#define MTK_SIP_SET_AUTHORIZED_SECURE_REG 0x8201
#endif
--
2.7.0
[PATCH v11 09/14] arm64: dts: mt8173: Add HDMI related nodes
From: CK Hu
This patch adds the device nodes for the HDMI encoder, HDMI PHY,
and HDMI CEC modules.
Signed-off-by: CK Hu
Signed-off-by: Cawa Cheng
Signed-off-by: Jie Qiu
Signed-off-by: Daniel Kurtz
Signed-off-by: Philipp Zabel
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 69
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 4ff666d..9fb32a1 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -199,6 +199,16 @@
,
;
+ hdmi_pin: xxx {
+
+ /*hdmi htplg pin*/
+ pins1 {
+ pinmux =
;
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
i2c0_pins_a: i2c0 {
pins1 {
pinmux =
,
@@ -286,6 +296,14 @@
clock-names = "spi", "wrap";
};
+ cec: cec at 10013000 {
+ compatible = "mediatek,mt8173-cec";
+ reg = <0 0x10013000 0 0xbc>;
+ interrupts = ;
+ clocks = <&infracfg CLK_INFRA_CEC>;
+ status = "disabled";
+ };
+
sysirq: intpol-controller at 10200620 {
compatible = "mediatek,mt8173-sysirq",
"mediatek,mt6577-sysirq";
@@ -312,6 +330,19 @@
#clock-cells = <1>;
};
+ hdmi_phy: hdmi-phy at 10209100 {
+ compatible = "mediatek,mt8173-hdmi-phy";
+ reg = <0 0x10209100 0 0x24>;
+ clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
+ clock-names = "pll_ref";
+ clock-output-names = "hdmitx_dig_cts";
+ mediatek,ibias = <0xa>;
+ mediatek,ibias_up = <0x1c>;
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
mipi_tx0: mipi-dphy at 10215000 {
compatible = "mediatek,mt8173-mipi-tx";
reg = <0 0x10215000 0 0x1000>;
@@ -798,6 +829,12 @@
<&apmixedsys CLK_APMIXED_TVDPLL>;
clock-names = "pixel", "engine", "pll";
status = "disabled";
+
+ port {
+ dpi0_out: endpoint {
+ remote-endpoint = <&hdmi0_in>;
+ };
+ };
};
pwm0: pwm at 1401e000 {
@@ -855,6 +892,38 @@
clocks = <&mmsys CLK_MM_DISP_OD>;
};
+ hdmi0: hdmi at 14025000 {
+ compatible = "mediatek,mt8173-hdmi";
+ reg = <0 0x14025000 0 0x400>;
+ interrupts = ;
+ clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
+<&mmsys CLK_MM_HDMI_PLLCK>,
+<&mmsys CLK_MM_HDMI_AUDIO>,
+<&mmsys CLK_MM_HDMI_SPDIF>;
+ clock-names = "pixel", "pll", "bclk", "spdif";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pin>;
+ phys = <&hdmi_phy>;
+ phy-names = "hdmi";
+ mediatek,syscon-hdmi = <&mmsys 0x900>;
+ assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;
+ assigned-clock-parents = <&hdmi_phy>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+
+ hdmi0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+ };
+ };
+
larb4: larb at 14027000 {
compatible = "mediatek,mt8173-smi-larb";
reg = <0 0x14027000 0 0x1000>;
--
2.7.0
[Bug 94186] Crash when launching glxinfo and World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 Chris Rankin changed: What|Removed |Added Summary|Immediate crash when|Crash when launching |launching World of Warcraft |glxinfo and World of |with RV790 |Warcraft with RV790 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/8da83a27/attachment.html>
[PATCH v4 03/11] drm/hisilicon: Add crtc driver for ADE
On 8 February 2016 at 18:59, Archit Taneja wrote: > > > On 02/06/2016 08:54 AM, Xinliang Liu wrote: >> >> Add crtc funcs and helper funcs for ADE. >> >> v4: None. >> v3: >> - Make ade as the master driver. >> - Use port to connect with encoder. >> - A few cleanup. >> v2: >> - Remove abtraction layer. >> >> Signed-off-by: Xinliang Liu >> --- >> drivers/gpu/drm/hisilicon/kirin/Makefile| 3 +- >> drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 280 +++ >> drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 458 >> >> drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 15 + >> drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h | 8 + >> 5 files changed, 763 insertions(+), 1 deletion(-) >> create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h >> create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c >> >> diff --git a/drivers/gpu/drm/hisilicon/kirin/Makefile >> b/drivers/gpu/drm/hisilicon/kirin/Makefile >> index cb346de47d48..2a61ab006ddb 100644 >> --- a/drivers/gpu/drm/hisilicon/kirin/Makefile >> +++ b/drivers/gpu/drm/hisilicon/kirin/Makefile >> @@ -1,3 +1,4 @@ >> -kirin-drm-y := kirin_drm_drv.o >> +kirin-drm-y := kirin_drm_drv.o \ >> + kirin_drm_ade.o >> >> obj-$(CONFIG_DRM_HISI_KIRIN) += kirin-drm.o >> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h >> b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h >> new file mode 100644 >> index ..78020747abfe >> --- /dev/null >> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h >> @@ -0,0 +1,280 @@ >> +/* >> + * Copyright (c) 2016 Linaro Limited. >> + * Copyright (c) 2014-2016 Hisilicon Limited. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + * >> + */ >> + >> +#ifndef __KIRIN_ADE_REG_H__ >> +#define __KIRIN_ADE_REG_H__ >> + >> +/* >> + * ADE Registers >> + */ >> +#define MASK(x)(BIT(x) - 1) >> + >> +#define ADE_CTRL 0x0004 >> +#define FRM_END_START_OFST 0 >> +#define FRM_END_START_MASK MASK(2) >> +#define ADE_CTRL1 0x008C >> +#define AUTO_CLK_GATE_EN_OFST 0 >> +#define AUTO_CLK_GATE_EN BIT(0) >> +#define ADE_ROT_SRC_CFG0x0010 >> +#define ADE_DISP_SRC_CFG 0x0018 >> +#define ADE_WDMA2_SRC_CFG 0x001C >> +#define ADE_SEC_OVLY_SRC_CFG 0x0020 >> +#define ADE_WDMA3_SRC_CFG 0x0024 >> +#define ADE_OVLY1_TRANS_CFG0x002C >> +#define ADE_EN 0x0100 >> +#define ADE_DISABLE0 >> +#define ADE_ENABLE 1 >> +#define INTR_MASK_CPU(x) (0x0C10 + (x) * 0x4) >> +#define ADE_FRM_DISGARD_CTRL 0x00A4 >> +/* reset and reload regs */ >> +#define ADE_SOFT_RST_SEL(x)(0x0078 + (x) * 0x4) >> +#define ADE_RELOAD_DIS(x) (0x00AC + (x) * 0x4) >> +#define RDMA_OFST 0 >> +#define CLIP_OFST 15 >> +#define SCL_OFST 21 >> +#define CTRAN_OFST 24 >> +#define OVLY_OFST 37 /* 32+5 */ >> +/* channel regs */ >> +#define RD_CH_PE(x)(0x1000 + (x) * 0x80) >> +#define RD_CH_CTRL(x) (0x1004 + (x) * 0x80) >> +#define RD_CH_ADDR(x) (0x1008 + (x) * 0x80) >> +#define RD_CH_SIZE(x) (0x100C + (x) * 0x80) >> +#define RD_CH_STRIDE(x)(0x1010 + (x) * 0x80) >> +#define RD_CH_SPACE(x) (0x1014 + (x) * 0x80) >> +#define RD_CH_PARTIAL_SIZE(x) (0x1018 + (x) * 0x80) >> +#define RD_CH_PARTIAL_SPACE(x) (0x101C + (x) * 0x80) >> +#define RD_CH_EN(x)(0x1020 + (x) * 0x80) >> +#define RD_CH_STATUS(x)(0x1024 + (x) * 0x80) >> +#define RD_CH_DISP_CTRL0x1404 >> +#define RD_CH_DISP_ADDR0x1408 >> +#define RD_CH_DISP_SIZE0x140C >> +#define RD_CH_DISP_STRIDE 0x1410 >> +#define RD_CH_DISP_SPACE 0x1414 >> +#define RD_CH_DISP_EN 0x142C >> +/* clip regs */ >> +#define ADE_CLIP_DISABLE(x)(0x6800 + (x) * 0x100) >> +#define ADE_CLIP_SIZE0(x) (0x6804 + (x) * 0x100) >> +#define ADE_CLIP_SIZE1(x) (0x6808 + (x) * 0x100) >> +#define ADE_CLIP_SIZE2(x) (0x680C + (x) * 0x100) >> +#define ADE_CLIP_CFG_OK(x) (0x6810 + (x) * 0x100) >> +/* scale regs */ >> +#define ADE_SCL1_MUX_CFG 0x000C >> +#define ADE_SCL2_SRC_CFG 0x0014 >> +#define ADE_SCL3_MUX_CFG 0x0008 >> +#define ADE_SCL_CTRL(x)(0x3000 + (x) * 0x800) >> +#define ADE_SCL_HSP(x) (0x3004
[PATCH v4 01/11] drm/hisilicon: Add device tree binding for hi6220 display subsystem
On 8 February 2016 at 18:43, Archit Taneja wrote:
> Hi,
>
>
> On 02/06/2016 08:54 AM, Xinliang Liu wrote:
>>
>> Add ADE display controller binding doc.
>> Add DesignWare DSI Host Controller v1.20a binding doc.
>>
>> v4:
>> - Describe more specific of clocks and ports.
>> - Fix indentation.
>> v3:
>> - Make ade as the drm master node.
>> - Use assigned-clocks to set clock rate.
>> - Use ports to connect display relavant nodes.
>> v2:
>> - Move dt binding docs to bindings/display/hisilicon directory.
>>
>> Signed-off-by: Xinwei Kong
>> Signed-off-by: Xinliang Liu
>> ---
>> .../bindings/display/hisilicon/dw-dsi.txt | 77
>> ++
>> .../bindings/display/hisilicon/hisi-ade.txt| 69
>> +++
>> 2 files changed, 146 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
>> create mode 100644
>> Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
>>
>> diff --git
>> a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
>> b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
>> new file mode 100644
>> index ..af6d702f3282
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
>> @@ -0,0 +1,77 @@
>> +Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
>> +
>> +A DSI Host Controller resides in the middle of display controller and
>> external
>> +HDMI converter.
>> +
>> +Required properties:
>> +- compatible: value should be "hisilicon,hi6220-dsi".
>> +- reg: physical base address and length of dsi controller's registers.
>> +- clocks: the clocks needed.
>> +- clock-names: the name of the clocks.
>> +- ports: contains DSI controller input and output sub port.
>> + The input port connects to ADE output port with the reg value "0".
>> + The output port with the reg value "1", it could connect to panel or
>> + any other bridge endpoints. And the reg value for bridge endpoint is
>> "0",
>> + other values for panel endpoint.
>> + See Documentation/devicetree/bindings/graph.txt for more device graph
>> info.
>> +
>> +A example of HiKey board hi6220 SoC and board specific DT entry:
>> +Example:
>> +
>> +SoC specific:
>> + dsi: dsi at f4107800 {
>> + compatible = "hisilicon,hi6220-dsi";
>> + reg = <0x0 0xf4107800 0x0 0x100>;
>> + clocks = <&media_ctrl HI6220_DSI_PCLK>;
>> + clock-names = "pclk_dsi";
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + /* 0 for input port */
>> + port at 0 {
>> + reg = <0>;
>> + dsi_in: endpoint {
>> + remote-endpoint = <&ade_out>;
>> + };
>> + };
>> + };
>> + };
>> +
>> +
>> +Board specific:
>> + &dsi {
>> + status = "ok";
>> +
>> + ports {
>> + /* 1 for output port */
>> + port at 1 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <1>;
>> +
>> + /* 0 for bridge, other value for panel */
>> + dsi_out0: endpoint at 0 {
>> + reg = <0>;
>> + remote-endpoint = <&adv7533_in>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + &i2c2 {
>> + ...
>> +
>> + adv7533: adv7533 at 39 {
>> + ...
>> +
>> + port {
>> + adv7533_in: endpoint {
>> + remote-endpoint = <&dsi_out0>;
>> + };
>> + };
>> + };
>> + };
>> +
>> diff --git
>> a/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
>> b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
>> new file mode 100644
>> index ..1eff5a41b98d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
>> @@ -0,0 +1,69 @@
>> +Device-Tree bindings for hisilicon ADE display controller driver
>> +
>> +ADE (Advanced Display Engine) is the display controller which grab image
>> +data from memory, do composition, do post image processing, generate RGB
>> +timing stream and transfer to DSI.
>> +
>> +Required properties:
>> +- compatible: value should be "hisilicon,hi6220-ade".
>> +- reg: physical base address and length of the controller's registers.
>> + Three reg ranges are used in ADE driver:
>> + ADE reg range,
[PATCH] drm/udl: Use module_usb_driver
Macro module_usb_driver is used for drivers whose init and exit paths
only register and unregister to usb API. So remove boilerplate code to
make code simpler by using module_usb_driver.
This change was made with the help of the following Coccinelle
semantic patch:
//
@a@
identifier f, x;
@@
-static f(...) { return usb_register(&x); }
@b depends on a@
identifier e, a.x;
@@
-static e(...) { usb_deregister(&x); }
@c depends on a && b@
identifier a.f;
declarer name module_init;
@@
-module_init(f);
@d depends on a && b && c@
identifier b.e, a.x;
declarer name module_exit;
declarer name module_usb_driver;
@@
-module_exit(e);
+module_usb_driver(x);
//
Signed-off-by: Amitoj Kaur Chawla
---
drivers/gpu/drm/udl/udl_drv.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
index d5728ec..772ec9e 100644
--- a/drivers/gpu/drm/udl/udl_drv.c
+++ b/drivers/gpu/drm/udl/udl_drv.c
@@ -125,17 +125,5 @@ static struct usb_driver udl_driver = {
.disconnect = udl_usb_disconnect,
.id_table = id_table,
};
-
-static int __init udl_init(void)
-{
- return usb_register(&udl_driver);
-}
-
-static void __exit udl_exit(void)
-{
- usb_deregister(&udl_driver);
-}
-
-module_init(udl_init);
-module_exit(udl_exit);
+module_usb_driver(udl_driver);
MODULE_LICENSE("GPL");
--
1.9.1
[Bug 112491] Radeon: HD 7400G / A4-4355M System overheats with 3D graphics active.
https://bugzilla.kernel.org/show_bug.cgi?id=112491 --- Comment #7 from Dionisus Torimens --- Created attachment 203781 --> https://bugzilla.kernel.org/attachment.cgi?id=203781&action=edit Temperature Graph 1 I'm having some doubts about the temperature hypothesis now. With DPM active, there seem to be higher temperatures during boot up than during the freezes or reboots. (visible by the gaps, 5 seconds intervals between measurements). So with DPM there seems to be another issue than without it. I've tried disabling hyperz, to no avail. -- You are receiving this mail because: You are watching the assignee of the bug.
[PATCH 11/16] drm/atmel-hldcd: removed optional dummy crtc mode_fixup function.
On Wed, Feb 17, 2016 at 09:02:44AM +, Carlos Palminha wrote:
> Thanks Boris.
>
> @Daniel, do you want me to resend this patch or will you fix it directly in
> mode-fixup git branch?
I can fix the typos, but I'm meh on the whitespace change ;-) Imo that
doesn't need a resend.
-Daniel
>
> On 16-02-2016 16:58, Boris Brezillon wrote:
> > On Tue, 16 Feb 2016 14:19:06 +
> > Carlos Palminha wrote:
> >
> >> This patch set nukes all the dummy crtc mode_fixup implementations.
> >> (made on top of Daniel topic/drm-misc branch)
> >
> > There's 2 typos in the subject line (s/hldcd/hlcdc/ and
> > s/removed/remove/), and you're removing an empty line after
> > atmel_hlcdc_crtc_create() definition (which is correct, but I'm not
> > sure it should be part of the same patch).
> > Otherwise it looks good to me.
> > Once you've fixed those 2 things, you can add my
> >
> > Acked-by: Boris Brezillon
> >
> >>
> >> Signed-off-by: Carlos Palminha
> >> ---
> >> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 9 -
> >> 1 file changed, 9 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> >> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> >> index 9863291..58c4f78 100644
> >> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> >> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> >> @@ -121,13 +121,6 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct
> >> drm_crtc *c)
> >> cfg);
> >> }
> >>
> >> -static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
> >> - const struct drm_display_mode *mode,
> >> - struct drm_display_mode *adjusted_mode)
> >> -{
> >> - return true;
> >> -}
> >> -
> >> static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
> >> {
> >>struct drm_device *dev = c->dev;
> >> @@ -261,7 +254,6 @@ static void atmel_hlcdc_crtc_atomic_flush(struct
> >> drm_crtc *crtc,
> >> }
> >>
> >> static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
> >> - .mode_fixup = atmel_hlcdc_crtc_mode_fixup,
> >>.mode_set = drm_helper_crtc_mode_set,
> >>.mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
> >>.mode_set_base = drm_helper_crtc_mode_set_base,
> >> @@ -349,4 +341,3 @@ fail:
> >>atmel_hlcdc_crtc_destroy(&crtc->base);
> >>return ret;
> >> }
> >> -
> >
> >
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
[PATCH] drm/udl: Use module_usb_driver
On Wed, Feb 17, 2016 at 05:43:27PM +0530, Amitoj Kaur Chawla wrote:
> Macro module_usb_driver is used for drivers whose init and exit paths
> only register and unregister to usb API. So remove boilerplate code to
> make code simpler by using module_usb_driver.
>
> This change was made with the help of the following Coccinelle
> semantic patch:
>
> //
> @a@
> identifier f, x;
> @@
> -static f(...) { return usb_register(&x); }
>
> @b depends on a@
> identifier e, a.x;
> @@
> -static e(...) { usb_deregister(&x); }
>
> @c depends on a && b@
> identifier a.f;
> declarer name module_init;
> @@
> -module_init(f);
>
> @d depends on a && b && c@
> identifier b.e, a.x;
> declarer name module_exit;
> declarer name module_usb_driver;
> @@
> -module_exit(e);
> +module_usb_driver(x);
> //
>
> Signed-off-by: Amitoj Kaur Chawla
Applied to drm-misc, thanks.
-Daniel
> ---
> drivers/gpu/drm/udl/udl_drv.c | 14 +-
> 1 file changed, 1 insertion(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
> index d5728ec..772ec9e 100644
> --- a/drivers/gpu/drm/udl/udl_drv.c
> +++ b/drivers/gpu/drm/udl/udl_drv.c
> @@ -125,17 +125,5 @@ static struct usb_driver udl_driver = {
> .disconnect = udl_usb_disconnect,
> .id_table = id_table,
> };
> -
> -static int __init udl_init(void)
> -{
> - return usb_register(&udl_driver);
> -}
> -
> -static void __exit udl_exit(void)
> -{
> - usb_deregister(&udl_driver);
> -}
> -
> -module_init(udl_init);
> -module_exit(udl_exit);
> +module_usb_driver(udl_driver);
> MODULE_LICENSE("GPL");
> --
> 1.9.1
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
[PATCH] drm/exynos/dsi: use core helper to create DSI packet
Core provides generic helper to create DSI packet, use it instead of
custom code.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 69 +++--
1 file changed, 23 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 77e17ae..f17be93 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -10,6 +10,8 @@
* published by the Free Software Foundation.
*/
+#include
+
#include
#include
#include
@@ -222,12 +224,8 @@ struct exynos_dsi_transfer {
struct list_head list;
struct completion completed;
int result;
- u8 data_id;
- u8 data[2];
+ struct mipi_dsi_packet packet;
u16 flags;
-
- const u8 *tx_payload;
- u16 tx_len;
u16 tx_done;
u8 *rx_payload;
@@ -322,6 +320,7 @@ enum reg_idx {
static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx,
u32 val)
{
+
writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]);
}
@@ -983,13 +982,14 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi
*dsi,
struct exynos_dsi_transfer *xfer)
{
struct device *dev = dsi->dev;
- const u8 *payload = xfer->tx_payload + xfer->tx_done;
- u16 length = xfer->tx_len - xfer->tx_done;
+ struct mipi_dsi_packet *pkt = &xfer->packet;
+ const u8 *payload = pkt->payload + xfer->tx_done;
+ u16 length = pkt->payload_length - xfer->tx_done;
bool first = !xfer->tx_done;
u32 reg;
dev_dbg(dev, "< xfer %p: tx len %u, done %u, rx len %u, done %u\n",
- xfer, xfer->tx_len, xfer->tx_done, xfer->rx_len, xfer->rx_done);
+ xfer, length, xfer->tx_done, xfer->rx_len, xfer->rx_done);
if (length > DSI_TX_FIFO_SIZE)
length = DSI_TX_FIFO_SIZE;
@@ -998,8 +998,7 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi,
/* Send payload */
while (length >= 4) {
- reg = (payload[3] << 24) | (payload[2] << 16)
- | (payload[1] << 8) | payload[0];
+ reg = get_unaligned_le32(payload);
exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg);
payload += 4;
length -= 4;
@@ -1017,16 +1016,13 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi
*dsi,
reg |= payload[0];
exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg);
break;
- case 0:
- /* Do nothing */
- break;
}
/* Send packet header */
if (!first)
return;
- reg = (xfer->data[1] << 16) | (xfer->data[0] << 8) | xfer->data_id;
+ reg = get_unaligned_le32(pkt->header);
if (exynos_dsi_wait_for_hdr_fifo(dsi)) {
dev_err(dev, "waiting for header FIFO timed out\n");
return;
@@ -1147,13 +1143,14 @@ again:
spin_unlock_irqrestore(&dsi->transfer_lock, flags);
- if (xfer->tx_len && xfer->tx_done == xfer->tx_len)
+ if (xfer->packet.payload_length &&
+ xfer->tx_done == xfer->packet.payload_length)
/* waiting for RX */
return;
exynos_dsi_send_to_fifo(dsi, xfer);
- if (xfer->tx_len || xfer->rx_len)
+ if (xfer->packet.payload_length || xfer->rx_len)
return;
xfer->result = 0;
@@ -1189,10 +1186,11 @@ static bool exynos_dsi_transfer_finish(struct
exynos_dsi *dsi)
spin_unlock_irqrestore(&dsi->transfer_lock, flags);
dev_dbg(dsi->dev,
- "> xfer %p, tx_len %u, tx_done %u, rx_len %u, rx_done %u\n",
- xfer, xfer->tx_len, xfer->tx_done, xfer->rx_len, xfer->rx_done);
+ "> xfer %p, tx_len %lu, tx_done %u, rx_len %u, rx_done %u\n",
+ xfer, xfer->packet.payload_length, xfer->tx_done, xfer->rx_len,
+ xfer->rx_done);
- if (xfer->tx_done != xfer->tx_len)
+ if (xfer->tx_done != xfer->packet.payload_length)
return true;
if (xfer->rx_done != xfer->rx_len)
@@ -1263,9 +1261,10 @@ static int exynos_dsi_transfer(struct exynos_dsi *dsi,
wait_for_completion_timeout(&xfer->completed,
msecs_to_jiffies(DSI_XFER_TIMEOUT_MS));
if (xfer->result == -ETIMEDOUT) {
+ struct mipi_dsi_packet *pkt = &xfer->packet;
exynos_dsi_remove_transfer(dsi, xfer);
- dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 2, xfer->data,
- xfer->tx_len, xfer->tx_payload);
+ dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 4, pkt->header,
+ (int)pkt->payload_length, pkt->payload);
return -ETIMEDOUT;
}
@@ -1438,12 +1
[PATCH] drm/vc4: improve throughput by pipelining binning and rendering jobs
The hardware provides us with separate threads for binning and
rendering, and the existing model waits for them both to complete
before submitting the next job.
Splitting the binning and rendering submissions reduces idle time
and gives us approx 20-30% speedup with several x11perf tests.
Thanks to anholt for suggesting this.
Signed-off-by: Varad Gautam
---
drivers/gpu/drm/vc4/vc4_drv.h | 37 +++
drivers/gpu/drm/vc4/vc4_gem.c | 108 ++
drivers/gpu/drm/vc4/vc4_irq.c | 58 +++
3 files changed, 156 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 4c734d0..9c2304b 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -52,7 +52,7 @@ struct vc4_dev {
/* Protects bo_cache and the BO stats. */
struct mutex bo_lock;
- /* Sequence number for the last job queued in job_list.
+ /* Sequence number for the last job queued in bin_job_list.
* Starts at 0 (no jobs emitted).
*/
uint64_t emit_seqno;
@@ -62,11 +62,19 @@ struct vc4_dev {
*/
uint64_t finished_seqno;
- /* List of all struct vc4_exec_info for jobs to be executed.
-* The first job in the list is the one currently programmed
-* into ct0ca/ct1ca for execution.
+ /* List of all struct vc4_exec_info for jobs to be executed in
+* the binner. The first job in the list is the one currently
+* programmed into ct0ca for execution.
*/
- struct list_head job_list;
+ struct list_head bin_job_list;
+
+ /* List of all struct vc4_exec_info for jobs that have
+* completed binning and are ready for rendering. The first
+* job in the list is the one currently programmed into ct1ca
+* for execution.
+*/
+ struct list_head render_job_list;
+
/* List of the finished vc4_exec_infos waiting to be freed by
* job_done_work.
*/
@@ -276,11 +284,20 @@ struct vc4_exec_info {
};
static inline struct vc4_exec_info *
-vc4_first_job(struct vc4_dev *vc4)
+vc4_first_bin_job(struct vc4_dev *vc4)
+{
+ if (list_empty(&vc4->bin_job_list))
+ return NULL;
+ return list_first_entry(&vc4->bin_job_list, struct vc4_exec_info, head);
+}
+
+static inline struct vc4_exec_info *
+vc4_first_render_job(struct vc4_dev *vc4)
{
- if (list_empty(&vc4->job_list))
+ if (list_empty(&vc4->render_job_list))
return NULL;
- return list_first_entry(&vc4->job_list, struct vc4_exec_info, head);
+ return list_first_entry(&vc4->render_job_list,
+ struct vc4_exec_info, head);
}
/**
@@ -394,7 +411,9 @@ int vc4_wait_seqno_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int vc4_wait_bo_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
-void vc4_submit_next_job(struct drm_device *dev);
+void vc4_submit_next_bin_job(struct drm_device *dev);
+void vc4_submit_next_render_job(struct drm_device *dev);
+void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info
*exec);
int vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno,
uint64_t timeout_ns, bool interruptible);
void vc4_job_handle_completed(struct vc4_dev *vc4);
diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
index 48ce30a..b08f74b 100644
--- a/drivers/gpu/drm/vc4/vc4_gem.c
+++ b/drivers/gpu/drm/vc4/vc4_gem.c
@@ -140,10 +140,10 @@ vc4_save_hang_state(struct drm_device *dev)
struct vc4_dev *vc4 = to_vc4_dev(dev);
struct drm_vc4_get_hang_state *state;
struct vc4_hang_state *kernel_state;
- struct vc4_exec_info *exec;
+ struct vc4_exec_info *exec[2];
struct vc4_bo *bo;
unsigned long irqflags;
- unsigned int i, unref_list_count;
+ unsigned int i, j, unref_list_count, prev_idx;
kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
if (!kernel_state)
@@ -152,37 +152,55 @@ vc4_save_hang_state(struct drm_device *dev)
state = &kernel_state->user_state;
spin_lock_irqsave(&vc4->job_lock, irqflags);
- exec = vc4_first_job(vc4);
- if (!exec) {
+ exec[0] = vc4_first_bin_job(vc4);
+ exec[1] = vc4_first_render_job(vc4);
+ if (!exec[0] && !exec[1]) {
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
return;
}
- unref_list_count = 0;
- list_for_each_entry(bo, &exec->unref_list, unref_head)
- unref_list_count++;
+ /* Get the bos from both binner and renderer into hang state. */
+ state->bo_count = 0;
+ for (i = 0; i < 2; i++) {
+ if (!exec[i])
+ continue;
+
+ unref_list_count = 0;
+ list_
RFC: group maintainership for misc drm trees
On Tue, Feb 16, 2016 at 10:44 PM, Daniel Vetter wrote: > On Tue, Feb 16, 2016 at 11:44:52AM +1000, Dave Airlie wrote: >> On 15 February 2016 at 20:06, Daniel Vetter >> wrote: >> > Hi all, >> > >> > I've already chatted with some of you in private, here's the entire idea >> > with a >> > bit more thought. My motiviation for group maintainership of drm-misc was >> > that I >> > got a bit a guilty feeling the last few vacations/conferences when folks >> > pinged >> > about reviewed/tested pretty patches not landing. But also just increasing >> > the >> > bus factor and sharing the load better is good. And finally a shared misc >> > drm >> > tree would allow fringe drivers to get faster into Dave's drm-next by >> > piggy-packing on top of the one pull request train. And it would also >> > reduce a >> > bit tree proliferation (at one point we had >> > drm-misc/-bridge/-panel/-trivial and >> > may more even). And at least everyone I chatted with seems to like the >> > idea in >> > principle. >> > >> > But what's still open is how to do it exactly. One big change with group >> > maintainership is that you can't rebase a tree anymore. And right now I >> > need to >> > rebase drm-misc fairly often to throw out bad apples again. I think >> > solving that >> > is the important bit to make a shared drm-misc work. A few ideas: >> >> This is kinda what I don't like. I don't want a tree that can't rebase >> out bad stuff >> coming to me that often. If we are being too over eager in merging >> stuff the answer >> is to merge less not try and merge more. If we have a tree where things >> are thrown until they stick I'm not sure the history will ever be nice >> to pull from. >> >> I'd rather consider a staging tree where everything from patchwork can >> get thrown >> into, CIed, but that we cherry-pick fixes things to go back to me from the >> what >> works category. > > I fully agree on your concern that drm-misc could become a mess - that's > why I think everything bigger than e.g. 2 patches or touching drivers > needs to soak first in a topic branch. We could still get it into drm-misc > with cherry-picks to avoid too many merges. > > The other part where I often had to squash in fixups is build fail on arm. > But I fixed myself with some decent cross-compile toolchain, so I'm > positive that won't happen any more. > > I think a good idea would be that I test-drive this process a bit without > adding more maintainers, i.e. > - no more rebases for drm-misc > - topic branches for everything big > - dutifully testing arm before pushing > > I'll do that over the next few weeks, then we can see how bad it would > look and whether we need more to avoid bad history. > >> I'm finding with i915 for example there is a massive latency in the pipeline >> now >> waiting for fixes, and the pipeline to the end of drm-intel-next is >> very long and >> hard to figure out what fixes should be pulled back, and how much of the >> driver has been rewritten between the -next and the -fixes pulls. >> >> > - I think CI is super-important. We're starting to finally roll that out >> > for >> > real for i915, and it's catching an awful lot of stuff already. Not yet >> > ready >> > for prime-time on public mailing lists, and for misc we probably can't >> > test >> > every patch before they land like we do for i915. But CI should have veto >> > power before a pull request goes to Dave imo. >> > >> > For non-i915 Daniel Stone and others are working on ARM CI using the >> > generic >> > igt testcases for kms. And I'm open to merging driver-specific tests >> > into igt >> > too, if it makes sense, and e.g. Eric has already pushed some vc4 tests. >> > >> > - Stuff needs to at least compile cleanly before pushing. I've been really >> > bad >> > at that wrt arm drivers with my own drm-misc, but turns out it's fairly >> > easy >> > to get this right: >> > http://blog.ffwll.ch/2016/02/arm-kernel-cross-compiling.html >> > >> > - Bad apples need to be kicked out with reverts, not rebases. I think >> > that's >> > fine for simple patches, and hence those can go directly to drm-misc. >> > But a >> > bunch of subsystem-wide refactorings go in through mis trees, and for >> > those >> > constantly mass-reverting until it's all solid is silly. And ime you >> > need some >> > soak time in a shared tree to iron out bugs with those kind of >> > endeavours. We >> > can address that with ad-hoc&short-lived topic branches which are then >> > again >> > owned by a single maintainer, but automatically pulled into an >> > integration >> > tree. After some soaking time to give CI systems time to crunch through >> > those >> > topic branches can then be merged into the main drm-misc and removed. >> >> I think integration trees are probably the way forward, but I >> understand they come >> with a massive overhead for constant merging, I like the idea of topic >> branches until >> it becomes my turn to spaghetti m
[PATCH] i915: Fix an overflow in __i915_wait_request
The timeout is 64bit but the maths against it is done 32bit wrapped. Force 64bit. Signed-off-by: Alan Cox --- drivers/gpu/drm/i915/i915_gem.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index de57e7f..dc81045 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1358,9 +1358,9 @@ out: * bit of mismatch in the jiffies<->nsecs<->ktime loop. So patch * things up to make the test happy. We allow up to 1 jiffy. * -* This is a regrssion from the timespec->ktime conversion. +* This is a regression from the timespec->ktime conversion. */ - if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000) + if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000ULL) *timeout = 0; }
[PATCH] i915: cast before shifting in i915_pte_count
Otherwise a pde_shift big enough to overflow a u32 will be truncated before
assignment
Signed-off-by: Alan Cox
---
drivers/gpu/drm/i915/i915_gem_gtt.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 66a6da2..368d111 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -418,7 +418,7 @@ static inline uint32_t i915_pte_index(uint64_t address,
uint32_t pde_shift)
static inline uint32_t i915_pte_count(uint64_t addr, size_t length,
uint32_t pde_shift)
{
- const uint64_t mask = ~((1 << pde_shift) - 1);
+ const uint64_t mask = ~((1ULL << pde_shift) - 1);
uint64_t end;
WARN_ON(length == 0);
[PATCH] nouveau: Fix missing types on shift
Shifting 1 into a u64 doesn't do what you might expect. Force the width
before shifting.
Signed-off-by: Alan Cox
---
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
index 7ac507c..6867746 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
@@ -103,7 +103,7 @@ static void
gf100_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
{
- u64 next = 1 << (vma->node->type - 8);
+ u64 next = 1ULL << (vma->node->type - 8);
phys = gf100_vm_addr(vma, phys, mem->memtype, 0);
pte <<= 3;
[Bug 112491] Radeon: HD 7400G / A4-4355M System overheats with 3D graphics active.
https://bugzilla.kernel.org/show_bug.cgi?id=112491 --- Comment #8 from Dionisus Torimens --- Created attachment 203791 --> https://bugzilla.kernel.org/attachment.cgi?id=203791&action=edit Temperature Graph BAPM=1 It looks like with BAPM it might more likely be overheating. But I can't reproduce the lockups/sudden reboots at all at the moment. -- You are receiving this mail because: You are watching the assignee of the bug.
[PATCH v1 03/10] lib/uuid: introduce few more generic helpers for UUID
There are new helpers in this patch:
uuid_is_valid checks if a UUID is valid
uuid_be_to_bin converts from string to binary (big endian)
uuid_le_to_bin converts from string to binary (little endian)
They will be used in future, i.e. in the following patches in the series.
This also moves indices arrays to lib/uuid.c to be shared accross modules.
Signed-off-by: Andy Shevchenko
---
include/linux/uuid.h | 13 ++
lib/uuid.c | 70
lib/vsprintf.c | 9 +++
3 files changed, 87 insertions(+), 5 deletions(-)
diff --git a/include/linux/uuid.h b/include/linux/uuid.h
index 91c2b6d..616347f 100644
--- a/include/linux/uuid.h
+++ b/include/linux/uuid.h
@@ -22,6 +22,11 @@
#include
+/*
+ * The length of a UUID string ("----")
+ * not including trailing NUL.
+ */
+#defineUUID_STRING_LEN 36
static inline int uuid_le_cmp(const uuid_le u1, const uuid_le u2)
{
@@ -38,4 +43,12 @@ void generate_random_uuid(unsigned char uuid[16]);
extern void uuid_le_gen(uuid_le *u);
extern void uuid_be_gen(uuid_be *u);
+int __must_check uuid_is_valid(const char *uuid);
+
+extern const u8 uuid_le_index[16];
+extern const u8 uuid_be_index[16];
+
+int uuid_le_to_bin(const char *uuid, uuid_le *u);
+int uuid_be_to_bin(const char *uuid, uuid_be *u);
+
#endif
diff --git a/lib/uuid.c b/lib/uuid.c
index 6c81c0b..995865c 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -19,10 +19,17 @@
*/
#include
+#include
+#include
#include
#include
#include
+const u8 uuid_le_index[16] = {3,2,1,0,5,4,7,6,8,9,10,11,12,13,14,15};
+EXPORT_SYMBOL(uuid_le_index);
+const u8 uuid_be_index[16] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+EXPORT_SYMBOL(uuid_be_index);
+
/***
* Random UUID interface
*
@@ -65,3 +72,66 @@ void uuid_be_gen(uuid_be *bu)
bu->b[6] = (bu->b[6] & 0x0F) | 0x40;
}
EXPORT_SYMBOL_GPL(uuid_be_gen);
+
+/**
+ * uuid_is_valid - checks if UUID string valid
+ * @uuid: UUID string to check
+ *
+ * Description:
+ * It checks if the UUID string is following the format:
+ *----
+ * where x is a hex digit.
+ *
+ * Return: 0 on success, %-EINVAL otherwise.
+ */
+int uuid_is_valid(const char *uuid)
+{
+ unsigned int i;
+
+ if (strnlen(uuid, UUID_STRING_LEN) < UUID_STRING_LEN)
+ return -EINVAL;
+
+ for (i = 0; i < UUID_STRING_LEN; i++) {
+ if (i == 8 || i == 13 || i == 18 || i == 23) {
+ if (uuid[i] != '-')
+ return -EINVAL;
+ } else if (!isxdigit(uuid[i])) {
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(uuid_is_valid);
+
+static int __uuid_to_bin(const char *uuid, __u8 b[16], const u8 ei[16])
+{
+ static const u8 si[16] = {0,2,4,6,9,11,14,16,19,21,24,26,28,30,32,34};
+ unsigned int i;
+ int ret;
+
+ ret = uuid_is_valid(uuid);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < 16; i++) {
+ int hi = hex_to_bin(uuid[si[i]] + 0);
+ int lo = hex_to_bin(uuid[si[i]] + 1);
+
+ b[ei[i]] = (hi << 4) | lo;
+ }
+
+ return 0;
+}
+
+int uuid_le_to_bin(const char *uuid, uuid_le *u)
+{
+ return __uuid_to_bin(uuid, u->b, uuid_le_index);
+}
+EXPORT_SYMBOL(uuid_le_to_bin);
+
+int uuid_be_to_bin(const char *uuid, uuid_be *u)
+{
+ return __uuid_to_bin(uuid, u->b, uuid_be_index);
+}
+EXPORT_SYMBOL(uuid_be_to_bin);
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 17d976b..752e78d 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_BLOCK
#include
@@ -1304,19 +1305,17 @@ static noinline_for_stack
char *uuid_string(char *buf, char *end, const u8 *addr,
struct printf_spec spec, const char *fmt)
{
- char uuid[sizeof("----")];
+ char uuid[UUID_STRING_LEN + 1];
char *p = uuid;
int i;
- static const u8 be[16] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
- static const u8 le[16] = {3,2,1,0,5,4,7,6,8,9,10,11,12,13,14,15};
- const u8 *index = be;
+ const u8 *index = uuid_be_index;
bool uc = false;
switch (*(++fmt)) {
case 'L':
uc = true; /* fall-through */
case 'l':
- index = le;
+ index = uuid_le_index;
break;
case 'B':
uc = true;
--
2.7.0
[PATCH v1 00/10] uuid: convert users to generic UUID API
There are few fumctions here and there along with type definitions that provide UUID API. This series consolidates everything under one hood and converts current users. This has been tested for a while internally, however it doesn't mean we covered all possible cases (especially accuracy of UUID constants after conversion). So, please test this as much as you can and provide your tag. We appreciate the effort. Andy Shevchenko (10): lib/vsprintf: simplify UUID printing lib/uuid: move generate_random_uuid() to uuid.c lib/uuid: introduce few more generic helpers for UUID lib/uuid: remove FSF address ACPI: switch to use generic UUID API device property: switch to use UUID API sysctl: drop away useless label sysctl: use generic UUID library efi: redefine type, constant, macro from generic code efivars: use generic UUID library drivers/acpi/acpi_extlog.c| 8 +- drivers/acpi/bus.c| 29 +-- drivers/acpi/nfit.c | 34 drivers/acpi/nfit.h | 3 +- drivers/acpi/property.c | 18 ++--- drivers/acpi/utils.c | 4 +- drivers/char/random.c | 21 + drivers/char/tpm/tpm_crb.c| 9 +-- drivers/char/tpm/tpm_ppi.c| 20 ++--- drivers/gpu/drm/i915/intel_acpi.c | 14 ++-- drivers/gpu/drm/nouveau/nouveau_acpi.c| 20 +++-- drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c| 9 +-- drivers/hid/i2c-hid/i2c-hid.c | 9 +-- drivers/iommu/dmar.c | 11 ++- drivers/pci/pci-acpi.c| 11 ++- drivers/pci/pci-label.c | 4 +- drivers/thermal/int340x_thermal/int3400_thermal.c | 6 +- drivers/usb/host/xhci-pci.c | 9 +-- fs/btrfs/volumes.c| 2 +- fs/efivarfs/inode.c | 40 +- fs/ext4/ioctl.c | 1 + fs/f2fs/file.c| 2 +- fs/reiserfs/objectid.c| 2 +- fs/ubifs/sb.c | 2 +- include/acpi/acpi_bus.h | 10 ++- include/linux/acpi.h | 2 +- include/linux/efi.h | 14 +--- include/linux/pci-acpi.h | 2 +- include/linux/random.h| 1 - include/linux/uuid.h | 21 +++-- include/uapi/linux/uuid.h | 4 - kernel/sysctl_binary.c| 30 +++ lib/uuid.c| 96 +-- lib/vsprintf.c| 21 ++--- sound/soc/intel/skylake/skl-nhlt.c| 7 +- 35 files changed, 237 insertions(+), 259 deletions(-) -- 2.7.0
[PATCH v1 05/10] ACPI: switch to use generic UUID API
Instead of opencoding the existing library functions let's use them directly.
The conversion fixes a potential bug in int340x_thermal as well since we have
to use memcmp() on binary data.
Signed-off-by: Andy Shevchenko
---
drivers/acpi/acpi_extlog.c| 8 +++---
drivers/acpi/bus.c| 29 ++-
drivers/acpi/nfit.c | 34 +++
drivers/acpi/nfit.h | 3 +-
drivers/acpi/utils.c | 4 +--
drivers/char/tpm/tpm_crb.c| 9 +++---
drivers/char/tpm/tpm_ppi.c| 20 ++---
drivers/gpu/drm/i915/intel_acpi.c | 14 --
drivers/gpu/drm/nouveau/nouveau_acpi.c| 20 ++---
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c| 9 +++---
drivers/hid/i2c-hid/i2c-hid.c | 9 +++---
drivers/iommu/dmar.c | 11
drivers/pci/pci-acpi.c| 11
drivers/pci/pci-label.c | 4 +--
drivers/thermal/int340x_thermal/int3400_thermal.c | 6 ++--
drivers/usb/host/xhci-pci.c | 9 +++---
include/acpi/acpi_bus.h | 10 ---
include/linux/acpi.h | 2 +-
include/linux/pci-acpi.h | 2 +-
sound/soc/intel/skylake/skl-nhlt.c| 7 +++--
20 files changed, 92 insertions(+), 129 deletions(-)
diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
index b3842ff..a3a25ec 100644
--- a/drivers/acpi/acpi_extlog.c
+++ b/drivers/acpi/acpi_extlog.c
@@ -45,7 +45,9 @@ struct extlog_l1_head {
static int old_edac_report_status;
-static u8 extlog_dsm_uuid[] __initdata =
"663E35AF-CC10-41A4-88EA-5470AF055295";
+static uuid_le extlog_dsm_uuid __initdata =
+ UUID_LE(0x663E35AF, 0xCC10, 0x41A4,
+ 0x88, 0xEA, 0x54, 0x70, 0xAF, 0x05, 0x52, 0x95);
/* L1 table related physical address */
static u64 elog_base;
@@ -182,12 +184,10 @@ out:
static bool __init extlog_get_l1addr(void)
{
- u8 uuid[16];
+ uuid_le *uuid = &extlog_dsm_uuid;
acpi_handle handle;
union acpi_object *obj;
- acpi_str_to_uuid(extlog_dsm_uuid, uuid);
-
if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
return false;
if (!acpi_check_dsm(handle, uuid, EXTLOG_DSM_REV, 1 << EXTLOG_FN_ADDR))
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 891c42d..80db48b 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -192,42 +192,19 @@ static void acpi_print_osc_error(acpi_handle handle,
printk("\n");
}
-acpi_status acpi_str_to_uuid(char *str, u8 *uuid)
-{
- int i;
- static int opc_map_to_uuid[16] = {6, 4, 2, 0, 11, 9, 16, 14, 19, 21,
- 24, 26, 28, 30, 32, 34};
-
- if (strlen(str) != 36)
- return AE_BAD_PARAMETER;
- for (i = 0; i < 36; i++) {
- if (i == 8 || i == 13 || i == 18 || i == 23) {
- if (str[i] != '-')
- return AE_BAD_PARAMETER;
- } else if (!isxdigit(str[i]))
- return AE_BAD_PARAMETER;
- }
- for (i = 0; i < 16; i++) {
- uuid[i] = hex_to_bin(str[opc_map_to_uuid[i]]) << 4;
- uuid[i] |= hex_to_bin(str[opc_map_to_uuid[i] + 1]);
- }
- return AE_OK;
-}
-EXPORT_SYMBOL_GPL(acpi_str_to_uuid);
-
acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context)
{
acpi_status status;
struct acpi_object_list input;
union acpi_object in_params[4];
union acpi_object *out_obj;
- u8 uuid[16];
+ uuid_le uuid;
u32 errors;
struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
if (!context)
return AE_ERROR;
- if (ACPI_FAILURE(acpi_str_to_uuid(context->uuid_str, uuid)))
+ if (uuid_le_to_bin(context->uuid_str, &uuid))
return AE_ERROR;
context->ret.length = ACPI_ALLOCATE_BUFFER;
context->ret.pointer = NULL;
@@ -237,7 +214,7 @@ acpi_status acpi_run_osc(acpi_handle handle, struct
acpi_osc_context *context)
input.pointer = in_params;
in_params[0].type = ACPI_TYPE_BUFFER;
in_params[0].buffer.length = 16;
- in_params[0].buffer.pointer = uuid;
+ in_params[0].buffer.pointer = (char *)&uuid;
in_params[1].type = ACPI_TYPE_INTEGER;
in_params[1].integer.value = context->rev;
in_params[2].type = ACPI_TYPE_INTEGER;
diff --git a/drivers/acpi/nfit.c b/drivers/acpi/nfit.c
index ad6d8c6..3beb99b 100644
--- a/drivers/acpi/nfit.c
+++ b/drivers/acpi/nfit.c
@@ -43,11 +43,11 @@ struct nfit_table_prev {
struct list_head flushes;
};
-static
[Bug 112491] Radeon: HD 7400G / A4-4355M System overheats with 3D graphics active.
https://bugzilla.kernel.org/show_bug.cgi?id=112491 --- Comment #9 from Dionisus Torimens --- Booting with radeon.hard_reset=1 I get this error at the point where I usually get a hang: GPU lockup (current fence id 0x4aa1 last fence id 0x4aa8 on ring 0) -- You are receiving this mail because: You are watching the assignee of the bug.
[PATCH RFC v5 0/8] Implement generic ASoC HDMI codec and use it in tda998x
There is very little change to this series since the RFC v4, but because of the recent interest on the hdmi-codec patch I decided to send another version of the series. Changes since RFC v4, - Rebased on top of the latest drm-next branch - Split the hdmi-codec abort functionality into a separate patch for better visibility of what it is all about - This does not affect the tda998x patches as the abort functionality is not used - Drop S18_3* formats from I2S_FORMATS and add a comment about formats not supported by HDMI There was also some comments about the DT ports binding for tda998x by Jean-Francois Moine. However I did not have time to come up with alternative approach. All in all my tda998x patches should be considered more as a proof of concept for the hdmi-codec part, rather than a serious attempt to get those patches in. However, all comments to those patch are more than welcome as they will help me to come up with something that could finally get merged. Changes since RFC v3, ASoC side: - Add "ALSA: pcm: add IEC958 channel status helper for hw_params" - Add "tda998x: Improve tda998x_configure_audio() audio related pdata" - use snd_pcm_create_iec958_consumer_hw_params() to construct the stream header - Remove set_clk() callback from hdmi-codec. It is not needed for now. - Refer to stream header in AIF as specified in HDMI standard - Set current_stream to NULL only after video side audio_shutdown() has been called. Avoid potential race if video side attempts to abort audio at the same time. - No need to have video side device pointer in the hdmi codec's pdata as it is found from dev->parent. - Fix hdmi-codec enum: DAI_ID_I2C > DAI_ID_I2S - Improve audio_startup API comment - Make improved checkpatch happy - BUG_ON > WARN_ON - put */ ending the block comment to a separate line DRM side: - Fix tda998x get_eld() locking - Change tda998x audio parameters in pdata to more generic, that can be readily used in tda998x_audio_config() - Rename and restructure audio port related private data members to be more descriptive - Require audio configuration trough ASoC hdmi-codec if HDMI audio is configured trough DT binding. DTS: - Increase McASP fifo usage form 1 to 32 The binding for tda998x is taken from Jean Francois' patch series[1] on the same subject. The implementation of the of-node parsing has some minor changes from my self. Here is what I think at least could or should still be done, but non of that stuff does not sounds critical right now. Missing from tda998x driver side - hdmi_codec_ops audio_startup() implementation for audio abort support - multi channel audio support (I would need specs and preferably some HW to test for this). Missing from ASoC side generic implementation: - channel_allocation handling is completely left for the video side driver, see if ASoC side could help in any way - snd_soc_jack functionality to handle hdmi cable plug/unplug events [1] http://mailman.alsa-project.org/pipermail/alsa-devel/2015-July/095596.html Best regards, Jyri Jean-Francois Moine (1): drm/i2c: tda998x: Add support of a DT graph of ports Jyri Sarha (7): ALSA: pcm: add IEC958 channel status helper for hw_params ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encoders ASoC: hdmi-codec: Add audio abort() callback for video side to use drm/i2c: tda998x: Remove include/sound/tda998x.h and fix graph parsing drm/i2c: tda998x: Improve tda998x_configure_audio() audio related pdata drm/i2c: tda998x: Register ASoC HDMI codec for audio functionality ARM: dts: am335x-boneblack: Add HDMI audio support .../devicetree/bindings/display/bridge/tda998x.txt | 51 +++ arch/arm/boot/dts/am335x-boneblack.dts | 90 - drivers/gpu/drm/i2c/Kconfig| 1 + drivers/gpu/drm/i2c/tda998x_drv.c | 300 --- include/drm/i2c/tda998x.h | 24 +- include/sound/hdmi-codec.h | 104 ++ include/sound/pcm_iec958.h | 2 + sound/core/pcm_iec958.c| 52 ++- sound/soc/codecs/Kconfig | 6 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/hdmi-codec.c | 411 + 11 files changed, 964 insertions(+), 79 deletions(-) create mode 100644 include/sound/hdmi-codec.h create mode 100644 sound/soc/codecs/hdmi-codec.c -- 1.9.1
[PATCH RFC v5 1/8] ALSA: pcm: add IEC958 channel status helper for hw_params
Add IEC958 channel status helper that gets the audio properties from
snd_pcm_hw_params instead of snd_pcm_runtime. This is needed to
produce the channel status bits already in audio stream configuration
phase.
Signed-off-by: Jyri Sarha
---
include/sound/pcm_iec958.h | 2 ++
sound/core/pcm_iec958.c| 52 +++---
2 files changed, 37 insertions(+), 17 deletions(-)
diff --git a/include/sound/pcm_iec958.h b/include/sound/pcm_iec958.h
index 0eed397..36f023a 100644
--- a/include/sound/pcm_iec958.h
+++ b/include/sound/pcm_iec958.h
@@ -6,4 +6,6 @@
int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
size_t len);
+int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
+u8 *cs, size_t len);
#endif
diff --git a/sound/core/pcm_iec958.c b/sound/core/pcm_iec958.c
index 36b2d7a..c9f8b66 100644
--- a/sound/core/pcm_iec958.c
+++ b/sound/core/pcm_iec958.c
@@ -9,30 +9,18 @@
#include
#include
#include
+#include
#include
-/**
- * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel
status
- * @runtime: pcm runtime structure with ->rate filled in
- * @cs: channel status buffer, at least four bytes
- * @len: length of channel status buffer
- *
- * Create the consumer format channel status data in @cs of maximum size
- * @len corresponding to the parameters of the PCM runtime @runtime.
- *
- * Drivers may wish to tweak the contents of the buffer after creation.
- *
- * Returns: length of buffer, or negative error code if something failed.
- */
-int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
- size_t len)
+static int create_iec958_consumer(uint rate, uint sample_width,
+ u8 *cs, size_t len)
{
unsigned int fs, ws;
if (len < 4)
return -EINVAL;
- switch (runtime->rate) {
+ switch (rate) {
case 32000:
fs = IEC958_AES3_CON_FS_32000;
break;
@@ -59,7 +47,7 @@ int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime
*runtime, u8 *cs,
}
if (len > 4) {
- switch (snd_pcm_format_width(runtime->format)) {
+ switch (sample_width) {
case 16:
ws = IEC958_AES4_CON_WORDLEN_20_16;
break;
@@ -92,4 +80,34 @@ int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime
*runtime, u8 *cs,
return len;
}
+
+/**
+ * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel
status
+ * @runtime: pcm runtime structure with ->rate filled in
+ * @cs: channel status buffer, at least four bytes
+ * @len: length of channel status buffer
+ *
+ * Create the consumer format channel status data in @cs of maximum size
+ * @len corresponding to the parameters of the PCM runtime @runtime.
+ *
+ * Drivers may wish to tweak the contents of the buffer after creation.
+ *
+ * Returns: length of buffer, or negative error code if something failed.
+ */
+int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
+ size_t len)
+{
+ return create_iec958_consumer(runtime->rate,
+ snd_pcm_format_width(runtime->format),
+ cs, len);
+}
EXPORT_SYMBOL(snd_pcm_create_iec958_consumer);
+
+
+int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
+u8 *cs, size_t len)
+{
+ return create_iec958_consumer(params_rate(params), params_width(params),
+ cs, len);
+}
+EXPORT_SYMBOL(snd_pcm_create_iec958_consumer_hw_params);
--
1.9.1
[PATCH RFC v5 2/8] ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encoders
The hdmi-codec is a platform device driver to be registered from
drivers of external HDMI encoders with I2S and/or spdif interface. The
driver in turn registers an ASoC codec for the HDMI encoder's audio
functionality.
The structures and definitions in the API header are mostly redundant
copies of similar structures in ASoC headers. This is on purpose to
avoid direct dependencies to ASoC structures in video side driver.
Signed-off-by: Jyri Sarha
---
include/sound/hdmi-codec.h| 100 +++
sound/soc/codecs/Kconfig | 6 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/hdmi-codec.c | 393 ++
4 files changed, 501 insertions(+)
create mode 100644 include/sound/hdmi-codec.h
create mode 100644 sound/soc/codecs/hdmi-codec.c
diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h
new file mode 100644
index 000..fc3a481
--- /dev/null
+++ b/include/sound/hdmi-codec.h
@@ -0,0 +1,100 @@
+/*
+ * hdmi-codec.h - HDMI Codec driver API
+ *
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Jyri Sarha
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef __HDMI_CODEC_H__
+#define __HDMI_CODEC_H__
+
+#include
+#include
+#include
+#include
+
+/*
+ * Protocol between ASoC cpu-dai and HDMI-encoder
+ */
+struct hdmi_codec_daifmt {
+ enum {
+ HDMI_I2S,
+ HDMI_RIGHT_J,
+ HDMI_LEFT_J,
+ HDMI_DSP_A,
+ HDMI_DSP_B,
+ HDMI_AC97,
+ HDMI_SPDIF,
+ } fmt;
+ int bit_clk_inv:1;
+ int frame_clk_inv:1;
+ int bit_clk_master:1;
+ int frame_clk_master:1;
+};
+
+/*
+ * HDMI audio parameters
+ */
+struct hdmi_codec_params {
+ struct hdmi_audio_infoframe cea;
+ struct snd_aes_iec958 iec;
+ int sample_rate;
+ int sample_width;
+ int channels;
+};
+
+struct hdmi_codec_ops {
+ /*
+* Called when ASoC starts an audio stream setup.
+* Optional
+*/
+ int (*audio_startup)(struct device *dev);
+
+ /*
+* Configures HDMI-encoder for audio stream.
+* Mandatory
+*/
+ int (*hw_params)(struct device *dev,
+struct hdmi_codec_daifmt *fmt,
+struct hdmi_codec_params *hparms);
+
+ /*
+* Shuts down the audio stream.
+* Mandatory
+*/
+ void (*audio_shutdown)(struct device *dev);
+
+ /*
+* Mute/unmute HDMI audio stream.
+* Optional
+*/
+ int (*digital_mute)(struct device *dev, bool enable);
+
+ /*
+* Provides EDID-Like-Data from connected HDMI device.
+* Optional
+*/
+ int (*get_eld)(struct device *dev, uint8_t *buf, size_t len);
+};
+
+/* HDMI codec initalization data */
+struct hdmi_codec_pdata {
+ const struct hdmi_codec_ops *ops;
+ uint i2s:1;
+ uint spdif:1;
+ int max_i2s_channels;
+};
+
+#define HDMI_CODEC_DRV_NAME "hdmi-audio-codec"
+
+#endif /* __HDMI_CODEC_H__ */
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index cfdafc4..4d5915e 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -82,6 +82,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_MC13783 if MFD_MC13XXX
select SND_SOC_ML26124 if I2C
select SND_SOC_NAU8825 if I2C
+ select SND_SOC_HDMI_CODEC
select SND_SOC_PCM1681 if I2C
select SND_SOC_PCM1792A if SPI_MASTER
select SND_SOC_PCM3008
@@ -454,6 +455,11 @@ config SND_SOC_BT_SCO
config SND_SOC_DMIC
tristate
+config SND_SOC_HDMI_CODEC
+ tristate
+ select SND_PCM_ELD
+ select SND_PCM_IEC958
+
config SND_SOC_ES8328
tristate "Everest Semi ES8328 CODEC"
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index f632fc4..49c1824 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -75,6 +75,7 @@ snd-soc-max9850-objs := max9850.o
snd-soc-mc13783-objs := mc13783.o
snd-soc-ml26124-objs := ml26124.o
snd-soc-nau8825-objs := nau8825.o
+snd-soc-hdmi-codec-objs := hdmi-codec.o
snd-soc-pcm1681-objs := pcm1681.o
snd-soc-pcm1792a-codec-objs := pcm1792a.o
snd-soc-pcm3008-objs := pcm3008.o
@@ -270,6 +271,7 @@ obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o
obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o
obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o
obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o
+obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdm
[PATCH RFC v5 3/8] ASoC: hdmi-codec: Add audio abort() callback for video side to use
Add audio abort() callback, that is provided at audio stream start,
for video side. This is for video side to use in case there is a
pressing need to tear down the audio playback for some reason.
Signed-off-by: Jyri Sarha
---
include/sound/hdmi-codec.h| 8 ++--
sound/soc/codecs/hdmi-codec.c | 20 +++-
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h
index fc3a481..15fe70f 100644
--- a/include/sound/hdmi-codec.h
+++ b/include/sound/hdmi-codec.h
@@ -55,10 +55,14 @@ struct hdmi_codec_params {
struct hdmi_codec_ops {
/*
-* Called when ASoC starts an audio stream setup.
+* Called when ASoC starts an audio stream setup. The call
+* provides an audio abort callback for stoping an ongoing
+* stream from video side driver if the HDMI audio becomes
+* unavailable.
* Optional
*/
- int (*audio_startup)(struct device *dev);
+ int (*audio_startup)(struct device *dev,
+void (*abort_cb)(struct device *dev));
/*
* Configures HDMI-encoder for audio stream.
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index bc47b9a..cc08097 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -47,6 +47,23 @@ enum {
DAI_ID_SPDIF,
};
+static void hdmi_codec_abort(struct device *dev)
+{
+ struct hdmi_codec_priv *hcp = dev_get_drvdata(dev);
+
+ dev_dbg(dev, "%s()\n", __func__);
+
+ mutex_lock(&hcp->current_stream_lock);
+ if (hcp->current_stream && hcp->current_stream->runtime &&
+ snd_pcm_running(hcp->current_stream)) {
+ dev_info(dev, "HDMI audio playback aborted\n");
+ snd_pcm_stream_lock_irq(hcp->current_stream);
+ snd_pcm_stop(hcp->current_stream, SNDRV_PCM_STATE_DISCONNECTED);
+ snd_pcm_stream_unlock_irq(hcp->current_stream);
+ }
+ mutex_unlock(&hcp->current_stream_lock);
+}
+
static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
@@ -78,7 +95,8 @@ static int hdmi_codec_startup(struct snd_pcm_substream
*substream,
return ret;
if (hcp->hcd.ops->audio_startup) {
- ret = hcp->hcd.ops->audio_startup(dai->dev->parent);
+ ret = hcp->hcd.ops->audio_startup(dai->dev->parent,
+ hdmi_codec_abort);
if (ret) {
mutex_lock(&hcp->current_stream_lock);
hcp->current_stream = NULL;
--
1.9.1
[PATCH RFC v5 4/8] drm/i2c: tda998x: Add support of a DT graph of ports
From: Jean-Francois Moine
Two kinds of ports may be declared in a DT graph of ports: video and audio.
This patch accepts the port value from a video port as an alternative
to the video-ports property.
It also accepts audio ports in the case the transmitter is not used as
a slave encoder.
The new file include/sound/tda998x.h prepares to the definition of
a tda998x CODEC.
Signed-off-by: Jean-Francois Moine
Signed-off-by: Jyri Sarha
---
.../devicetree/bindings/display/bridge/tda998x.txt | 51
drivers/gpu/drm/i2c/tda998x_drv.c | 90 +++---
include/sound/tda998x.h| 8 ++
3 files changed, 140 insertions(+), 9 deletions(-)
create mode 100644 include/sound/tda998x.h
diff --git a/Documentation/devicetree/bindings/display/bridge/tda998x.txt
b/Documentation/devicetree/bindings/display/bridge/tda998x.txt
index e9e4bce..35f6a80 100644
--- a/Documentation/devicetree/bindings/display/bridge/tda998x.txt
+++ b/Documentation/devicetree/bindings/display/bridge/tda998x.txt
@@ -16,6 +16,35 @@ Optional properties:
- video-ports: 24 bits value which defines how the video controller
output is wired to the TDA998x input - default: <0x230145>
+ This property is not used when ports are defined.
+
+Optional nodes:
+
+ - port: up to three ports.
+ The ports are defined according to [1].
+
+Video port.
+ There may be only one video port.
+ This one must contain the following property:
+
+ - port-type: must be "rgb"
+
+ and may contain the optional property:
+
+ - reg: 24 bits value which defines how the video controller
+ output is wired to the TDA998x input (video pins)
+ When absent, the default value is <0x230145>.
+
+Audio ports.
+ There may be one or two audio ports.
+ These ones must contain the following properties:
+
+ - port-type: must be "i2s" or "spdif"
+
+ - reg: 8 bits value which defines how the audio controller
+ output is wired to the TDA998x input (audio pins)
+
+[1] Documentation/devicetree/bindings/graph.txt
Example:
@@ -26,4 +55,26 @@ Example:
interrupts = <27 2>;/* falling edge */
pinctrl-0 = <&pmx_camera>;
pinctrl-names = "default";
+
+ port at 230145 {
+ port-type = "rgb";
+ reg = <0x230145>;
+ hdmi_0: endpoint {
+ remote-endpoint = <&lcd0_0>;
+ };
+ };
+ port at 3 { /* AP1 = I2S */
+ port-type = "i2s";
+ reg = <0x03>;
+ tda998x_i2s: endpoint {
+ remote-endpoint = <&audio1_i2s>;
+ };
+ };
+ port at 4 { /* AP2 = S/PDIF */
+ port-type = "spdif";
+ reg = <0x04>;
+ tda998x_spdif: endpoint {
+ remote-endpoint = <&audio1_spdif1>;
+ };
+ };
};
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index 34e3874..6db1663 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
@@ -53,6 +54,8 @@ struct tda998x_priv {
struct drm_encoder encoder;
struct drm_connector connector;
+
+ struct tda998x_audio audio;
};
#define conn_to_tda998x_priv(x) \
@@ -821,6 +824,8 @@ static void tda998x_encoder_set_config(struct tda998x_priv
*priv,
(p->mirr_f ? VIP_CNTRL_2_MIRR_F : 0);
priv->params = *p;
+ priv->audio.port_types[0] = p->audio_format;
+ priv->audio.ports[0] = p->audio_cfg;
}
static void tda998x_encoder_dpms(struct drm_encoder *encoder, int mode)
@@ -1199,9 +1204,57 @@ static void tda998x_destroy(struct tda998x_priv *priv)
/* I2C driver functions */
+static int tda998x_parse_ports(struct tda998x_priv *priv,
+ struct device_node *np)
+{
+ struct device_node *of_port;
+ const char *port_type;
+ int ret, audio_index, reg, afmt;
+
+ audio_index = 0;
+ for_each_child_of_node(np, of_port) {
+ if (!of_port->name
+|| of_node_cmp(of_port->name, "port") != 0)
+ continue;
+ ret = of_property_read_string(of_port, "port-type",
+ &port_type);
+ if (ret < 0)
+ continue;
+ ret = of_property_read_u32(of_port, "reg", ®);
+ if (strcmp(port_type, "rgb") == 0) {
+ if (!ret) { /* video r
[PATCH RFC v5 5/8] drm/i2c: tda998x: Remove include/sound/tda998x.h and fix graph parsing
Move struct tda998x_audio definition to tda998x_drv.c and remove
include/sound/tda998x.h. There is no external use for struct
tda998x_audio.
Fix graph parsing to allow ports to be inside a separate "ports"-node as
specified in Documentation/devicetree/bindings/graph.txt.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/i2c/tda998x_drv.c | 59 +--
include/sound/tda998x.h | 8 --
2 files changed, 32 insertions(+), 35 deletions(-)
delete mode 100644 include/sound/tda998x.h
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index 6db1663..b534f94 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -27,10 +27,14 @@
#include
#include
#include
-#include
#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
+struct tda998x_audio {
+ u8 ports[2];/* AP value */
+ u8 port_types[2]; /* AFMT_xxx */
+};
+
struct tda998x_priv {
struct i2c_client *cec;
struct i2c_client *hdmi;
@@ -1209,9 +1213,10 @@ static int tda998x_parse_ports(struct tda998x_priv *priv,
{
struct device_node *of_port;
const char *port_type;
- int ret, audio_index, reg, afmt;
+ int ret, audio_index, reg, afmt, rgb_initialized;
audio_index = 0;
+ rgb_initialized = 0;
for_each_child_of_node(np, of_port) {
if (!of_port->name
|| of_node_cmp(of_port->name, "port") != 0)
@@ -1221,11 +1226,17 @@ static int tda998x_parse_ports(struct tda998x_priv
*priv,
if (ret < 0)
continue;
ret = of_property_read_u32(of_port, "reg", ®);
+ if (ret < 0) {
+ dev_err(&priv->hdmi->dev, "missing reg for %s\n",
+ port_type);
+ return ret;
+ }
if (strcmp(port_type, "rgb") == 0) {
if (!ret) { /* video reg is optional */
priv->vip_cntrl_0 = reg >> 16;
priv->vip_cntrl_1 = reg >> 8;
priv->vip_cntrl_2 = reg;
+ rgb_initialized = 1;
}
continue;
}
@@ -1235,11 +1246,6 @@ static int tda998x_parse_ports(struct tda998x_priv *priv,
afmt = AFMT_SPDIF;
else
continue;
- if (ret < 0) {
- dev_err(&priv->hdmi->dev, "missing reg for %s\n",
- port_type);
- return ret;
- }
if (audio_index >= ARRAY_SIZE(priv->audio.ports)) {
dev_err(&priv->hdmi->dev, "too many audio ports\n");
break;
@@ -1248,13 +1254,13 @@ static int tda998x_parse_ports(struct tda998x_priv
*priv,
priv->audio.port_types[audio_index] = afmt;
audio_index++;
}
- return 0;
+ return rgb_initialized;
}
static int tda998x_create(struct i2c_client *client, struct tda998x_priv *priv)
{
struct device_node *np = client->dev.of_node;
- struct device_node *of_port;
+ struct device_node *ports;
u32 video;
int rev_lo, rev_hi, ret;
unsigned short cec_addr;
@@ -1364,24 +1370,15 @@ static int tda998x_create(struct i2c_client *client,
struct tda998x_priv *priv)
/* get the device tree parameters */
if (np) {
- of_port = of_get_child_by_name(np, "port");
- if (of_port) { /* graph of ports */
- of_node_put(of_port);
- ret = tda998x_parse_ports(priv, np);
- if (ret < 0)
- goto fail;
-
- /* initialize the default audio configuration */
- if (priv->audio.ports[0]) {
- priv->params.audio_cfg = priv->audio.ports[0];
- priv->params.audio_format =
- priv->audio.port_types[0];
- priv->params.audio_clk_cfg =
- priv->params.audio_format ==
- AFMT_SPDIF ? 0 : 1;
- }
- } else {
-
+ ports = of_get_child_by_name(np, "ports");
+ if (!ports)
+ ports = of_node_get(np);
+ /* graph of ports */
+ ret = tda998x_parse_ports(priv, ports);
+ of_node_put(ports);
+ if (ret < 0)
+ goto fail;
+ if (ret == 0) {
/* optional video properties */
[PATCH RFC v5 6/8] drm/i2c: tda998x: Improve tda998x_configure_audio() audio related pdata
Declare struct tda998x_audio_params in include/drm/i2c/tda998x.h and
use it in pdata and for tda998x_configure_audio() parameters. Also
updates tda998x_write_aif() to take struct hdmi_audio_infoframe *
directly as a parameter.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/i2c/tda998x_drv.c | 106 +-
include/drm/i2c/tda998x.h | 23 +
2 files changed, 73 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index b534f94..42d256a 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -46,7 +46,7 @@ struct tda998x_priv {
u8 vip_cntrl_0;
u8 vip_cntrl_1;
u8 vip_cntrl_2;
- struct tda998x_encoder_params params;
+ struct tda998x_audio_params audio_params;
wait_queue_head_t wq_edid;
volatile int wq_edid_wait;
@@ -673,26 +673,16 @@ tda998x_write_if(struct tda998x_priv *priv, u8 bit, u16
addr,
reg_set(priv, REG_DIP_IF_FLAGS, bit);
}
-static void
-tda998x_write_aif(struct tda998x_priv *priv, struct tda998x_encoder_params *p)
+static int tda998x_write_aif(struct tda998x_priv *priv,
+struct hdmi_audio_infoframe *cea)
{
union hdmi_infoframe frame;
- hdmi_audio_infoframe_init(&frame.audio);
-
- frame.audio.channels = p->audio_frame[1] & 0x07;
- frame.audio.channel_allocation = p->audio_frame[4];
- frame.audio.level_shift_value = (p->audio_frame[5] & 0x78) >> 3;
- frame.audio.downmix_inhibit = (p->audio_frame[5] & 0x80) >> 7;
-
- /*
-* L-PCM and IEC61937 compressed audio shall always set sample
-* frequency to "refer to stream". For others, see the HDMI
-* specification.
-*/
- frame.audio.sample_frequency = (p->audio_frame[2] & 0x1c) >> 2;
+ frame.audio = *cea;
tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, &frame);
+
+ return 0;
}
static void
@@ -717,19 +707,20 @@ static void tda998x_audio_mute(struct tda998x_priv *priv,
bool on)
}
}
-static void
+static int
tda998x_configure_audio(struct tda998x_priv *priv,
- struct drm_display_mode *mode, struct tda998x_encoder_params *p)
+ struct tda998x_audio_params *params,
+ unsigned mode_clock)
{
u8 buf[6], clksel_aip, clksel_fs, cts_n, adiv;
u32 n;
/* Enable audio ports */
- reg_write(priv, REG_ENA_AP, p->audio_cfg);
- reg_write(priv, REG_ENA_ACLK, p->audio_clk_cfg);
+ reg_write(priv, REG_ENA_AP, params->config);
+ reg_write(priv, REG_ENA_ACLK, params->format == AFMT_SPDIF ? 0 : 1);
/* Set audio input source */
- switch (p->audio_format) {
+ switch (params->format) {
case AFMT_SPDIF:
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_SPDIF);
clksel_aip = AIP_CLKSEL_AIP_SPDIF;
@@ -741,12 +732,25 @@ tda998x_configure_audio(struct tda998x_priv *priv,
reg_write(priv, REG_MUX_AP, MUX_AP_SELECT_I2S);
clksel_aip = AIP_CLKSEL_AIP_I2S;
clksel_fs = AIP_CLKSEL_FS_ACLK;
- cts_n = CTS_N_M(3) | CTS_N_K(3);
+ switch (params->sample_width) {
+ case 16:
+ cts_n = CTS_N_M(3) | CTS_N_K(1);
+ break;
+ case 18:
+ case 20:
+ case 24:
+ cts_n = CTS_N_M(3) | CTS_N_K(2);
+ break;
+ default:
+ case 32:
+ cts_n = CTS_N_M(3) | CTS_N_K(3);
+ break;
+ }
break;
default:
BUG();
- return;
+ return -EINVAL;
}
reg_write(priv, REG_AIP_CLKSEL, clksel_aip);
@@ -762,11 +766,11 @@ tda998x_configure_audio(struct tda998x_priv *priv,
* assume 100MHz requires larger divider.
*/
adiv = AUDIO_DIV_SERCLK_8;
- if (mode->clock > 10)
+ if (mode_clock > 10)
adiv++; /* AUDIO_DIV_SERCLK_16 */
/* S/PDIF asks for a larger divider */
- if (p->audio_format == AFMT_SPDIF)
+ if (params->format == AFMT_SPDIF)
adiv++; /* AUDIO_DIV_SERCLK_16 or _32 */
reg_write(priv, REG_AUDIO_DIV, adiv);
@@ -775,7 +779,7 @@ tda998x_configure_audio(struct tda998x_priv *priv,
* This is the approximate value of N, which happens to be
* the recommended values for non-coherent clocks.
*/
- n = 128 * p->audio_sample_rate / 1000;
+ n = 128 * params->sample_rate / 1000;
/* Write the CTS and N values */
buf[0] = 0x44;
@@ -794,19 +798,13 @@ tda998x_configure_audio(struct tda998x_priv *priv,
reg_clear(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_CTS);
/* Wri
[PATCH RFC v5 7/8] drm/i2c: tda998x: Register ASoC HDMI codec for audio functionality
Register ASoC HDMI codec for audio functionality. This is an initial
ASoC audio implementation for tda998x driver and it does not use all
the features provided by hdmi-codec.
HDMI audio info-frame and audio stream header is generated by the ASoC
HDMI codec. The codec also applies constraints for available
sample-rates.
Implementation of audio_startup for hdmi_codec_ops would enable
tda998x driver to abort ongoing playback if the HDMI cable is
unplugged or re-plugged to a device without audio capability.
Signed-off-by: Jyri Sarha
---
drivers/gpu/drm/i2c/Kconfig | 1 +
drivers/gpu/drm/i2c/tda998x_drv.c | 179 +++---
include/drm/i2c/tda998x.h | 1 +
3 files changed, 148 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i2c/Kconfig b/drivers/gpu/drm/i2c/Kconfig
index 22c7ed6..088f278 100644
--- a/drivers/gpu/drm/i2c/Kconfig
+++ b/drivers/gpu/drm/i2c/Kconfig
@@ -28,6 +28,7 @@ config DRM_I2C_SIL164
config DRM_I2C_NXP_TDA998X
tristate "NXP Semiconductors TDA998X HDMI encoder"
default m if DRM_TILCDC
+ select SND_SOC_HDMI_CODEC if SND_SOC
help
Support for NXP Semiconductors TDA998X HDMI encoders.
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c
b/drivers/gpu/drm/i2c/tda998x_drv.c
index 42d256a..b3b9559 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
@@ -30,9 +31,9 @@
#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
-struct tda998x_audio {
- u8 ports[2];/* AP value */
- u8 port_types[2]; /* AFMT_xxx */
+struct tda998x_audio_port {
+ u8 format; /* AFMT_xxx */
+ u8 config; /* AP value */
};
struct tda998x_priv {
@@ -48,6 +49,8 @@ struct tda998x_priv {
u8 vip_cntrl_2;
struct tda998x_audio_params audio_params;
+ struct platform_device *audio_pdev;
+
wait_queue_head_t wq_edid;
volatile int wq_edid_wait;
@@ -59,7 +62,7 @@ struct tda998x_priv {
struct drm_encoder encoder;
struct drm_connector connector;
- struct tda998x_audio audio;
+ struct tda998x_audio_port audio_port[2];
};
#define conn_to_tda998x_priv(x) \
@@ -749,7 +752,7 @@ tda998x_configure_audio(struct tda998x_priv *priv,
break;
default:
- BUG();
+ dev_err(&priv->hdmi->dev, "Unsupported I2S format\n");
return -EINVAL;
}
@@ -1070,7 +1073,7 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder,
tda998x_write_avi(priv, adjusted_mode);
- if (priv->audio_params.config) {
+ if (priv->audio_params.format != AFMT_UNUSED) {
tda998x_configure_audio(priv,
&priv->audio_params,
adjusted_mode->clock);
@@ -1174,6 +1177,8 @@ static int tda998x_connector_get_modes(struct
drm_connector *connector)
drm_mode_connector_update_edid_property(connector, edid);
n = drm_add_edid_modes(connector, edid);
priv->is_hdmi_sink = drm_detect_hdmi_monitor(edid);
+ drm_edid_to_eld(connector, edid);
+
kfree(edid);
return n;
@@ -1195,6 +1200,9 @@ static void tda998x_destroy(struct tda998x_priv *priv)
cec_write(priv, REG_CEC_RXSHPDINTENA, 0);
reg_clear(priv, REG_INT_FLAGS_2, INT_FLAGS_2_EDID_BLK_RD);
+ if (priv->audio_pdev)
+ platform_device_unregister(priv->audio_pdev);
+
if (priv->hdmi->irq)
free_irq(priv->hdmi->irq, priv);
@@ -1204,6 +1212,133 @@ static void tda998x_destroy(struct tda998x_priv *priv)
i2c_unregister_device(priv->cec);
}
+static int tda998x_audio_hw_params(struct device *dev,
+ struct hdmi_codec_daifmt *daifmt,
+ struct hdmi_codec_params *params)
+{
+ struct tda998x_priv *priv = dev_get_drvdata(dev);
+ int i, ret;
+ struct tda998x_audio_params audio = {
+ .sample_width = params->sample_width,
+ .sample_rate = params->sample_rate,
+ .cea = params->cea,
+ };
+
+ if (!priv->encoder.crtc)
+ return -ENODEV;
+
+ memcpy(audio.status, params->iec.status,
+ min(sizeof(audio.status), sizeof(params->iec.status)));
+
+ switch (daifmt->fmt) {
+ case HDMI_I2S:
+ if (daifmt->bit_clk_inv || daifmt->frame_clk_inv ||
+ daifmt->bit_clk_master || daifmt->frame_clk_master) {
+ dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__,
+ daifmt->bit_clk_inv, daifmt->frame_clk_inv,
+ daifmt->bit_clk_master,
+ daifmt->frame_clk_master);
+
[PATCH RFC v5 8/8] ARM: dts: am335x-boneblack: Add HDMI audio support
Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
follow the new binding.
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/am335x-boneblack.dts | 90 --
1 file changed, 86 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
b/arch/arm/boot/dts/am335x-boneblack.dts
index eadbba3..05347dc 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -64,6 +64,16 @@
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 |
AM33XX_PIN_OUTPUT */
>;
};
+
+ mcasp0_pins: mcasp0_pins {
+ pinctrl-single,pins = <
+ 0x1ac (PIN_INPUT_PULLUP | MUX_MODE0)/*
mcasp0_ahclkx.mcasp0_ahclkx */
+ 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /*
mcasp0_ahclkr.mcasp0_axr2 */
+ 0x194 (PIN_OUTPUT_PULLUP | MUX_MODE0) /*
mcasp0_fsx.mcasp0_fsx */
+ 0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /*
mcasp0_aclkx.mcasp0_aclkx */
+ 0x06c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /*
gpmc_a11.GPIO1_27 */
+ >;
+ };
};
&lcdc {
@@ -76,17 +86,89 @@
};
&i2c0 {
- tda19988 {
+ tda19988: tda19988 {
compatible = "nxp,tda998x";
reg = <0x70>;
+
+ #sound-dai-cells = <0>;
+
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
- port {
- hdmi_0: endpoint at 0 {
- remote-endpoint = <&lcdc_0>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ port-type = "rgb";
+ reg = <0x230145>;
+ hdmi_0: endpoint at 0 {
+ remote-endpoint = <&lcdc_0>;
+ };
};
+ port at 1 {
+ port-type = "i2s";
+ reg = <0x03>;
+ tda19988_i2s: endpoint {
+ remote-endpoint = <&mcasp0_i2s>;
+ };
+ };
+ };
+ };
+};
+
+&rtc {
+ system-power-controller;
+};
+
+&mcasp0{
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp0_pins>;
+ status = "okay";
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 0
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+
+ port {
+ mcasp0_i2s: endpoint {
+ remote-endpoint = <&tda19988_i2s>;
+ };
+ };
+};
+
+/ {
+ clk_mcasp0_fixed: clk_mcasp0_fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
+ clk_mcasp0: clk_mcasp0 {
+ #clock-cells = <0>;
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_mcasp0_fixed>;
+ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on
GPIO1_27 */
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "TI BeagleBone Black";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink0_master>;
+ simple-audio-card,frame-master = <&dailink0_master>;
+
+ dailink0_master: simple-audio-card,cpu {
+ sound-dai = <&mcasp0>;
+ clocks = <&clk_mcasp0>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&tda19988>;
};
};
};
--
1.9.1
[PATCH 06/16] drm/rcar-du: removed optional dummy crtc mode_fixup function.
Hi Carlos,
Thank you for the patch.
On Tuesday 16 February 2016 14:18:00 Carlos Palminha wrote:
> This patch set nukes all the dummy crtc mode_fixup implementations.
> (made on top of Daniel topic/drm-misc branch)
>
> Signed-off-by: Carlos Palminha
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 9 -
> 1 file changed, 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 4ec80ae..627abc80 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -468,14 +468,6 @@ static void rcar_du_crtc_disable(struct drm_crtc *crtc)
> rcrtc->outputs = 0;
> }
>
> -static bool rcar_du_crtc_mode_fixup(struct drm_crtc *crtc,
> - const struct drm_display_mode *mode,
> - struct drm_display_mode *adjusted_mode)
> -{
> - /* TODO Fixup modes */
> - return true;
> -}
> -
> static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc,
> struct drm_crtc_state *old_crtc_state)
> {
> @@ -502,7 +494,6 @@ static void rcar_du_crtc_atomic_flush(struct drm_crtc
> *crtc, }
>
> static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
> - .mode_fixup = rcar_du_crtc_mode_fixup,
> .disable = rcar_du_crtc_disable,
> .enable = rcar_du_crtc_enable,
> .atomic_begin = rcar_du_crtc_atomic_begin,
--
Regards,
Laurent Pinchart
[PATCH 07/16] drm/omapdrm: removed optional dummy crtc mode_fixup function.
Hi Carlos,
Thank you for the patch.
On Tuesday 16 February 2016 14:18:12 Carlos Palminha wrote:
> This patch set nukes all the dummy crtc mode_fixup implementations.
> (made on top of Daniel topic/drm-misc branch)
>
> Signed-off-by: Carlos Palminha
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/omapdrm/omap_crtc.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c
> b/drivers/gpu/drm/omapdrm/omap_crtc.c index d38fcbc..483acdb 100644
> --- a/drivers/gpu/drm/omapdrm/omap_crtc.c
> +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
> @@ -330,13 +330,6 @@ static void omap_crtc_destroy(struct drm_crtc *crtc)
> kfree(omap_crtc);
> }
>
> -static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
> - const struct drm_display_mode *mode,
> - struct drm_display_mode *adjusted_mode)
> -{
> - return true;
> -}
> -
> static void omap_crtc_enable(struct drm_crtc *crtc)
> {
> struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
> @@ -451,7 +444,6 @@ static const struct drm_crtc_funcs omap_crtc_funcs = {
> };
>
> static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
> - .mode_fixup = omap_crtc_mode_fixup,
> .mode_set_nofb = omap_crtc_mode_set_nofb,
> .disable = omap_crtc_disable,
> .enable = omap_crtc_enable,
--
Regards,
Laurent Pinchart
[PATCH 09/16] drm/shmobile: removed optional dummy crtc mode_fixup function.
Hi Carlos,
Thank you for the patch.
On Tuesday 16 February 2016 14:18:40 Carlos Palminha wrote:
> This patch set nukes all the dummy crtc mode_fixup implementations.
> (made on top of Daniel topic/drm-misc branch)
>
> Signed-off-by: Carlos Palminha
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c index 27342fd..88643ab 100644
> --- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> +++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> @@ -359,13 +359,6 @@ static void shmob_drm_crtc_dpms(struct drm_crtc *crtc,
> int mode) scrtc->dpms = mode;
> }
>
> -static bool shmob_drm_crtc_mode_fixup(struct drm_crtc *crtc,
> - const struct drm_display_mode *mode,
> - struct drm_display_mode *adjusted_mode)
> -{
> - return true;
> -}
> -
> static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc)
> {
> shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
> @@ -431,7 +424,6 @@ static int shmob_drm_crtc_mode_set_base(struct drm_crtc
> *crtc, int x, int y,
>
> static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
> .dpms = shmob_drm_crtc_dpms,
> - .mode_fixup = shmob_drm_crtc_mode_fixup,
> .prepare = shmob_drm_crtc_mode_prepare,
> .commit = shmob_drm_crtc_mode_commit,
> .mode_set = shmob_drm_crtc_mode_set,
--
Regards,
Laurent Pinchart
[PATCH] i915: Fix an overflow in __i915_wait_request
On Wed, Feb 17, 2016 at 02:20:35PM +, Alan wrote: > The timeout is 64bit but the maths against it is done 32bit wrapped. Force > 64bit. Where does this wrap? Iirc the lowest HZ we have is 100, and that should still comfortably fit into 32 bits. I assume this is due to some overenthusiastic static checker. If so ok if I adjust the commit message to make it clear it never wrapped, and we only shut up a real tool here? Thanks, Daniel > > Signed-off-by: Alan Cox > --- > drivers/gpu/drm/i915/i915_gem.c |4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index de57e7f..dc81045 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -1358,9 +1358,9 @@ out: >* bit of mismatch in the jiffies<->nsecs<->ktime loop. So patch >* things up to make the test happy. We allow up to 1 jiffy. >* > - * This is a regrssion from the timespec->ktime conversion. > + * This is a regression from the timespec->ktime conversion. >*/ > - if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000) > + if (ret == -ETIME && *timeout < jiffies_to_usecs(1)*1000ULL) > *timeout = 0; > } > > > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch
[PATCH] i915: cast before shifting in i915_pte_count
On Wed, Feb 17, 2016 at 02:20:46PM +, Alan wrote:
> Otherwise a pde_shift big enough to overflow a u32 will be truncated before
> assignment
>
> Signed-off-by: Alan Cox
Applied to drm-intel-next-queued, with a note why we never hit this bug
currently. But the units here are quite confused ...
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.h |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
> b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 66a6da2..368d111 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -418,7 +418,7 @@ static inline uint32_t i915_pte_index(uint64_t address,
> uint32_t pde_shift)
> static inline uint32_t i915_pte_count(uint64_t addr, size_t length,
> uint32_t pde_shift)
> {
> - const uint64_t mask = ~((1 << pde_shift) - 1);
> + const uint64_t mask = ~((1ULL << pde_shift) - 1);
> uint64_t end;
>
> WARN_ON(length == 0);
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
[Bug 112491] Radeon: HD 7400G / A4-4355M System overheats with 3D graphics active.
https://bugzilla.kernel.org/show_bug.cgi?id=112491 --- Comment #10 from Dionisus Torimens --- Created attachment 203801 --> https://bugzilla.kernel.org/attachment.cgi?id=203801&action=edit Temperature Graph Hard off radeon.fastfb=1 radeon.pcie_gen2=1 radeon.audio=0 radeon.hard_reset=1 Ok, hard turning off reproduced. It reaches almost 110°. -- You are receiving this mail because: You are watching the assignee of the bug.
[Bug 94186] Crash when launching glxinfo and World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 Samuel Pitoiset changed: What|Removed |Added CC||samuel.pitoiset at gmail.com --- Comment #4 from Samuel Pitoiset --- Created attachment 121819 --> https://bugs.freedesktop.org/attachment.cgi?id=121819&action=edit fix Could you please give a shot at the attached patch and tell me if it fixes the issue? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/5a31d146/attachment.html>
[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594 --- Comment #10 from Marek Olšák --- (In reply to Michel Dänzer from comment #9) > Note that AFAIK using things like derivatives in non-uniform control flow > isn't supported by GLSL. What's the original GLSL shader? True. The GLSL shader is using discard followed by fwidth. This is undefined behavior. Therefore, it's an application bug. The easy workaround would be to disable register allocation in st/mesa to get a quasi-SSA form and trivially move KILL_IF to the end of the shader if the app is detected to be Talos Principle. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/ed729f11/attachment.html>
[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594 --- Comment #11 from Marek Olšák --- Also, I think we shouldn't do anything in the shader compiler. A simple workaround in Mesa should be enough. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/e5a9c78c/attachment.html>
[PATCH v1 05/10] ACPI: switch to use generic UUID API
On Wed, Feb 17, 2016 at 4:17 AM, Andy Shevchenko
wrote:
> Instead of opencoding the existing library functions let's use them directly.
>
> The conversion fixes a potential bug in int340x_thermal as well since we have
> to use memcmp() on binary data.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/acpi/acpi_extlog.c| 8 +++---
> drivers/acpi/bus.c| 29 ++-
> drivers/acpi/nfit.c | 34
> +++
> drivers/acpi/nfit.h | 3 +-
> drivers/acpi/utils.c | 4 +--
> drivers/char/tpm/tpm_crb.c| 9 +++---
> drivers/char/tpm/tpm_ppi.c| 20 ++---
> drivers/gpu/drm/i915/intel_acpi.c | 14 --
> drivers/gpu/drm/nouveau/nouveau_acpi.c| 20 ++---
> drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c| 9 +++---
> drivers/hid/i2c-hid/i2c-hid.c | 9 +++---
> drivers/iommu/dmar.c | 11
> drivers/pci/pci-acpi.c| 11
> drivers/pci/pci-label.c | 4 +--
> drivers/thermal/int340x_thermal/int3400_thermal.c | 6 ++--
> drivers/usb/host/xhci-pci.c | 9 +++---
> include/acpi/acpi_bus.h | 10 ---
> include/linux/acpi.h | 2 +-
> include/linux/pci-acpi.h | 2 +-
> sound/soc/intel/skylake/skl-nhlt.c| 7 +++--
> 20 files changed, 92 insertions(+), 129 deletions(-)
>
[..]
> diff --git a/drivers/acpi/nfit.c b/drivers/acpi/nfit.c
> index ad6d8c6..3beb99b 100644
> --- a/drivers/acpi/nfit.c
> +++ b/drivers/acpi/nfit.c
> @@ -43,11 +43,11 @@ struct nfit_table_prev {
> struct list_head flushes;
> };
>
> -static u8 nfit_uuid[NFIT_UUID_MAX][16];
> +static uuid_le nfit_uuid[NFIT_UUID_MAX];
>
> -const u8 *to_nfit_uuid(enum nfit_uuids id)
> +const uuid_le *to_nfit_uuid(enum nfit_uuids id)
> {
> - return nfit_uuid[id];
> + return &nfit_uuid[id];
> }
> EXPORT_SYMBOL(to_nfit_uuid);
>
> @@ -83,7 +83,7 @@ static int acpi_nfit_ctl(struct nvdimm_bus_descriptor
> *nd_desc,
> const char *cmd_name, * dimm_name;
> unsigned long dsm_mask;
> acpi_handle handle;
> - const u8 *uuid;
> + const uuid_le *uuid;
> u32 offset;
> int rc, i;
>
> @@ -225,7 +225,7 @@ static int nfit_spa_type(struct acpi_nfit_system_address
> *spa)
> int i;
>
> for (i = 0; i < NFIT_UUID_MAX; i++)
> - if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
> + if (!uuid_le_cmp(*to_nfit_uuid(i), *(uuid_le
> *)spa->range_guid))
> return i;
> return -1;
> }
> @@ -829,7 +829,7 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc
> *acpi_desc,
> {
> struct acpi_device *adev, *adev_dimm;
> struct device *dev = acpi_desc->dev;
> - const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
> + const uuid_le *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
> int i;
>
> nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
> @@ -909,7 +909,7 @@ static int acpi_nfit_register_dimms(struct acpi_nfit_desc
> *acpi_desc)
> static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
> {
> struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
> - const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
> + const uuid_le *uuid = to_nfit_uuid(NFIT_DEV_BUS);
> struct acpi_device *adev;
> int i;
>
> @@ -2079,16 +2079,16 @@ static __init int nfit_init(void)
> BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
> BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
>
> - acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
> - acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
> - acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
> - acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
> - acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK,
> nfit_uuid[NFIT_SPA_VDISK]);
> - acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
> - acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK,
> nfit_uuid[NFIT_SPA_PDISK]);
> - acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
> - acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
> - acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
> + uuid_le_to_bin(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]);
> + uuid_le_to_bin(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]);
> + uuid_le_to_bin(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]);
> + uuid_le_to_bin(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]);
> + uuid_le_to_bin(UUID_VOLATI
RFC: group maintainership for misc drm trees
quest goes to Dave imo. > > > > For non-i915 Daniel Stone and others are working on ARM CI using the > > generic > > igt testcases for kms. And I'm open to merging driver-specific tests into > > igt > > too, if it makes sense, and e.g. Eric has already pushed some vc4 tests. > > > > - Stuff needs to at least compile cleanly before pushing. I've been really > > bad > > at that wrt arm drivers with my own drm-misc, but turns out it's fairly > > easy > > to get this right: > > http://blog.ffwll.ch/2016/02/arm-kernel-cross-compiling.html > > > > - Bad apples need to be kicked out with reverts, not rebases. I think that's > > fine for simple patches, and hence those can go directly to drm-misc. But > > a > > bunch of subsystem-wide refactorings go in through mis trees, and for > > those > > constantly mass-reverting until it's all solid is silly. And ime you need > > some > > soak time in a shared tree to iron out bugs with those kind of > > endeavours. We > > can address that with ad-hoc&short-lived topic branches which are then > > again > > owned by a single maintainer, but automatically pulled into an integration > > tree. After some soaking time to give CI systems time to crunch through > > those > > topic branches can then be merged into the main drm-misc and removed. > > I think integration trees are probably the way forward, but I > understand they come > with a massive overhead for constant merging, I like the idea of topic > branches until > it becomes my turn to spaghetti merge 3-4 features at once. At that > point I still > fallback to the slow things down, pick one feature merge it, back the > others off, > and I think this is something we should do more off, the pile everything in > and > hope that magical CI will stabilise things doesn't seem to be a responsible > process to me. > > so I'd like CI to be happening but I'd like it to be happening before the git > history is baked into stone. I think topic branches work very well for this case. For Tegra I've been maintaining an assortment of topic branches in a development tree that I rebase onto linux-next (almost) on a daily basis. With the right scripts this is fairly easy to do. It has the big advantage that you can keep topic branches separate and merge them into one tree to test out the result. Once the feature is ready you can "promote" it to one of the stable branches. I think for DRM this could work very well. There could be a single tree for integration where almost everything gets pulled in. There could be separate branches for the drivers, plus topic branches that track the development of new features. Once a feature is ready, or maintainers think that the driver code is done, the branches can either be cherry- picked or merged into some stable branch that is the base for all other development branches. Once patches are promoted to the stable branch(es) the whole tree can be rebased and the promoted patches will simply be rebased out of the respective branches. This is all quite a bit of maintenance work, but I think with the right tooling it could be made fairly painless. Group maintainership will also help spread the load. Thierry -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/cdefe6b1/attachment.sig>
[PATCH RFC v5 8/8] ARM: dts: am335x-boneblack: Add HDMI audio support
On Wed, Feb 17, 2016 at 8:49 AM, Jyri Sarha wrote:
> Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
> clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
> follow the new binding.
>
> Signed-off-by: Jyri Sarha
> ---
> arch/arm/boot/dts/am335x-boneblack.dts | 90
> --
> 1 file changed, 86 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
> b/arch/arm/boot/dts/am335x-boneblack.dts
> index eadbba3..05347dc 100644
> --- a/arch/arm/boot/dts/am335x-boneblack.dts
> +++ b/arch/arm/boot/dts/am335x-boneblack.dts
> @@ -64,6 +64,16 @@
> 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 |
> AM33XX_PIN_OUTPUT */
> >;
> };
> +
> + mcasp0_pins: mcasp0_pins {
> + pinctrl-single,pins = <
> + 0x1ac (PIN_INPUT_PULLUP | MUX_MODE0)/*
> mcasp0_ahclkx.mcasp0_ahclkx */
> + 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /*
> mcasp0_ahclkr.mcasp0_axr2 */
> + 0x194 (PIN_OUTPUT_PULLUP | MUX_MODE0) /*
> mcasp0_fsx.mcasp0_fsx */
> + 0x190 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /*
> mcasp0_aclkx.mcasp0_aclkx */
> + 0x06c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /*
> gpmc_a11.GPIO1_27 */
Hi Jyri,
We've switched to AM33XX_IOPAD, please squash this in here:
AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /*
mcasp0_ahcklx.mcasp0_ahclkx */
AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /*
mcasp0_ahclkr.mcasp0_axr2*/
AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /*
mcasp0_aclkx.mcasp0_aclkx */
AM33XX_IOPAD(0x86c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.GPIO1_27 */
Regards,
--
Robert Nelson
https://rcn-ee.com/
[pull] radeon and amdgpu drm-fixes-4.5
Hi Dave, Just two small fixes in the ttm_tt_populate error handling; one for radeon, one for amdgpu. The following changes since commit bdbe58e6c60e49930d9c33e7d2b9a7789ed8c1a9: Merge tag 'drm-intel-fixes-2016-02-12' of git://anongit.freedesktop.org/drm-intel into drm-fixes (2016-02-15 06:54:50 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-4.5 for you to fetch changes up to bc3f5d8c4ca01555820617eb3b6c0857e4df710d: drm/radeon: use post-decrement in error handling (2016-02-16 10:05:50 -0500) Rasmus Villemoes (2): drm/amdgpu: use post-decrement in error handling drm/radeon: use post-decrement in error handling drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +- drivers/gpu/drm/radeon/radeon_ttm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
[PATCH 0/3] Deferr load of radeon/amdgpu until amdkfd is loaded
On Sun, Feb 14, 2016 at 4:16 AM, Oded Gabbay wrote: > Following Daniel's request, I spent some time removing the hard requirement > that radeon and amdgpu will always appear _after_ amdkfd in the drm Makefile. > > This was done by modifing radeon/amdgpu to defer their loading if they detect > that amdkfd is not loaded yet, in case the drivers are built inside the > kernel image. > > See the patch's individiual commit messages for more explanation. > > This patch-set was tested on a KAVERI machine, with multiple configurations: > > 1. radeon + amdgpu (CIK disabled) + amdkfd as kernel modules > 2. radeon + amdgpu (CIK disabled) + amdkfd inside the kernel image > 3. amdgpu (CIK enabled) + amdkfd inside the kernel image (radeon not compiled) > 4. amdgpu (CIK enabled) inside the kernel image (radeon + amdkfd not compiled) > 5. radeon + amdgpu (CIK disabled) as kernel modules (amdkfd not compiled) For the series: Reviewed-by: Alex Deucher > > Thanks, > > Oded > > Oded Gabbay (3): > drm/amdkfd: Track when module's init is complete > drm/radeon: Return -EPROBE_DEFER when amdkfd not loaded > drm/amdgpu: Return -EPROBE_DEFER when amdkfd not loaded > > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 57 > + > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 10 - > drivers/gpu/drm/amd/amdkfd/kfd_module.c | 15 +-- > drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 2 +- > drivers/gpu/drm/radeon/radeon_drv.c | 10 - > drivers/gpu/drm/radeon/radeon_kfd.c | 25 ++- > drivers/gpu/drm/radeon/radeon_kfd.h | 2 +- > 8 files changed, 64 insertions(+), 59 deletions(-) > > -- > 2.5.0 >
[PATCH v8.1 1/2] drm/rockchip: hdmi: add Innosilicon HDMI support
Am Mittwoch, 3. Februar 2016, 17:44:57 schrieb Yakir Yang: > The Innosilicon HDMI is a low power HDMI 1.4 transmitter > IP, and it have been integrated on some rockchip CPUs > (like RK3036, RK312x). > > Signed-off-by: Yakir Yang On a Kylin board against 4.5-rc Tested-by: Heiko Stuebner @Mark: While testing I noticed a black box around my cursor. It moves with the cursor, so seems to be the plane itself - the hdmi driver is of course innocent. May there exist an issue with plane transparency? Heiko
[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594 --- Comment #12 from Roland Scheidegger --- (In reply to Marek Olšák from comment #10) > The GLSL shader is using discard followed by fwidth. This is undefined > behavior. > > Therefore, it's an application bug. I wasn't aware of this difference, but seeing this bug made me suspicious, and indeed d3d10 is saying for discard: https://msdn.microsoft.com/en-us/library/windows/desktop/hh446968%28v=vs.85%29.aspx "This instruction flags the current pixel as terminated, while continuing execution, so that other pixels executing in parallel may obtain derivatives if necessary. Even though execution continues, all Pixel Shader output writes before or after the discard instruction are discarded." That's very interesting... gallium docs don't actually say anything about this neither naturally. (I think it should work in llvmpipe, because indeed we only update the pixel alive mask.) Due to d3d10 being different there, I wouldn't be surprised if other apps make the same mistake. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/040f179f/attachment-0001.html>
[Bug 94186] Crash when launching glxinfo and World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 --- Comment #5 from Chris Rankin --- (In reply to Samuel Pitoiset from comment #4) > Could you please give a shot at the attached patch and tell me if it fixes > the issue? Yes, that patch fixes both WoW and glxinfo. Thanks. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/a2967212/attachment.html>
[Bug 93594] Flickering Shadows in The Talos Principle
https://bugs.freedesktop.org/show_bug.cgi?id=93594 --- Comment #13 from Marek Olšák --- (In reply to Roland Scheidegger from comment #12) > Due to d3d10 being different there, I wouldn't be surprised if other apps > make the same mistake. For performance, it's better to execute KILL as soon as possible, because it allows us to skip texture loads and possibly even input loads. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/9efde49c/attachment.html>
[Bug 94186] Crash when launching glxinfo and World of Warcraft with RV790
https://bugs.freedesktop.org/show_bug.cgi?id=94186 --- Comment #6 from Samuel Pitoiset --- Cool, thanks. I have sent the fix on mesa-dev. It should be upstream soon. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/e5b38492/attachment.html>
[PATCH v11 10/14] clk: mediatek: make dpi0_sel propagate rate changes
Quoting Philipp Zabel (2016-02-17 03:28:50)
> This mux is supposed to select a fitting divider after the PLL
> is already set to the correct rate.
>
> Signed-off-by: Philipp Zabel
> Acked-by: James Liao
Looks good to me.
Regards,
Mike
> ---
> Changes since v10:
> - Add comments about MUX_GATE rate change propagation
> ---
> drivers/clk/mediatek/clk-mt8173.c | 6 +-
> drivers/clk/mediatek/clk-mtk.h| 15 +--
> 2 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8173.c
> b/drivers/clk/mediatek/clk-mt8173.c
> index 227e356..85c0bfc 100644
> --- a/drivers/clk/mediatek/clk-mt8173.c
> +++ b/drivers/clk/mediatek/clk-mt8173.c
> @@ -558,7 +558,11 @@ static const struct mtk_composite top_muxes[]
> __initconst = {
> MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
> MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090,
> 24, 4, 31),
> /* CLK_CFG_6 */
> - MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0, 3, 7),
> + /*
> +* The dpi0_sel clock should not propagate rate changes to its parent
> +* clock so the dpi driver can have full control over PLL and divider.
> +*/
> + MUX_GATE_FLAGS(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x00a0, 0,
> 3, 7, 0),
> MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2,
> 15),
> MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x00a0,
> 16, 3, 23),
> MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24,
> 2, 31),
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index 32d2e45..9f24fcf 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -83,7 +83,11 @@ struct mtk_composite {
> signed char num_parents;
> };
>
> -#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) { \
> +/*
> + * In case the rate change propagation to parent clocks is undesirable,
> + * this macro allows to specify the clock flags manually.
> + */
> +#define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
> _flags) {\
> .id = _id, \
> .name = _name, \
> .mux_reg = _reg,\
> @@ -94,9 +98,16 @@ struct mtk_composite {
> .divider_shift = -1,\
> .parent_names = _parents, \
> .num_parents = ARRAY_SIZE(_parents),\
> - .flags = CLK_SET_RATE_PARENT, \
> + .flags = _flags,\
> }
>
> +/*
> + * Unless necessary, all MUX_GATE clocks propagate rate changes to their
> + * parent clock by default.
> + */
> +#define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate)\
> + MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, _gate,
> CLK_SET_RATE_PARENT)
> +
> #define MUX(_id, _name, _parents, _reg, _shift, _width) { \
> .id = _id, \
> .name = _name, \
> --
> 2.7.0
>
[PATCH 2/6] drm: introduce color correction properties
On Tue, Feb 09, 2016 at 12:19:14PM +, Lionel Landwerlin wrote:
> Patch based on a previous series by Shashank Sharma.
>
> v2: Register LUT size properties as range
>
> v3: Fix round in drm_color_lut_get_value() helper
> More docs on how degamma/gamma properties are used
>
> v4: Update contributors
A couple minor notes:
* In the kerneldoc, you might want to spell out the first use of the
acronyms for clarity. I.e., Color Transformation Matrix, Lookup
Table.
* You might want to add DRM_DEBUG_KMS() calls to some of the error
conditions (e.g., when the blob has an invalid size) so that it will
be more apparent why we failed when looking at kernel logs.
* Looks like one minor whitespace error, noted below.
* One minor helper note below.
Aside from those,
Reviewed-by: Matt Roper
Also, somewhere (probably as a followup patch to this series), I think
we need some kerneldoc text that describes the relationship between this
color management work and the old legacy gamma ioctl. I.e., what
happens if you intermix calls to the legacy ioctl with updates to the
color manager properties.
Matt
>
> Signed-off-by: Shashank Sharma
> Signed-off-by: Lionel Landwerlin
> Signed-off-by: Kumar, Kiran S
> Signed-off-by: Kausal Malladi
...
> @@ -419,8 +472,47 @@ int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
> ret = drm_atomic_set_mode_prop_for_crtc(state, mode);
> drm_property_unreference_blob(mode);
> return ret;
> - }
> - else if (crtc->funcs->atomic_set_property)
> + } else if (property == config->degamma_lut_property) {
> + bool replaced = false;
> + uint64_t lut_size = 0;
> +
> + ret = drm_object_property_get_value(&crtc->base,
> + config->degamma_lut_size_property,
> + &lut_size);
> + if (ret == 0)
> + ret = drm_atomic_replace_property_blob_from_id(crtc,
> + &state->degamma_lut,
> + val,
> + lut_size * sizeof(struct drm_color_lut),
> + &replaced);
> + state->color_mgmt_changed = replaced;
> + return ret;
> + } else if (property == config->ctm_matrix_property) {
> + bool replaced = false;
> +
> + ret = drm_atomic_replace_property_blob_from_id(crtc,
> + &state->ctm_matrix,
> + val,
> + sizeof(struct drm_color_ctm),
> +&replaced);
Looks like there might be something off with the whitespace here.
> + state->color_mgmt_changed = replaced;
> + return ret;
> + } else if (property == config->gamma_lut_property) {
> + bool replaced = false;
> + uint64_t lut_size = 0;
> +
> + ret = drm_object_property_get_value(&crtc->base,
> + config->gamma_lut_size_property,
> + &lut_size);
> + if (ret == 0)
> + ret = drm_atomic_replace_property_blob_from_id(crtc,
> + &state->gamma_lut,
> + val,
> + lut_size * sizeof(struct drm_color_lut),
> + &replaced);
> + state->color_mgmt_changed = replaced;
> + return ret;
> + } else if (crtc->funcs->atomic_set_property)
> return crtc->funcs->atomic_set_property(crtc, state, property,
> val);
> else
> return -EINVAL;
> @@ -456,6 +548,12 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc,
> *val = state->active;
> else if (property == config->prop_mode_id)
> *val = (state->mode_blob) ? state->mode_blob->base.id : 0;
> + else if (property == config->degamma_lut_property)
> + *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0;
> + else if (property == config->ctm_matrix_property)
> + *val = (state->ctm_matrix) ? state->ctm_matrix->base.id : 0;
> + else if (property == config->gamma_lut_property)
> + *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
> else if (crtc->funcs->atomic_get_property)
> return crtc->funcs->atomic_get_property(crtc, state, property,
> val);
> else
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c
> index 2b430b0..d13dfd8 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -2513,10 +2513,17 @@ void __drm_atomic_helper_crtc_duplicate_state(struct
> drm_crtc *crtc,
>
> if (state->mode_blob)
>
[Intel-gfx] [PATCH 3/6] drm/i915: enable CSC for pipe C
On Tue, Feb 09, 2016 at 12:19:15PM +, Lionel Landwerlin wrote:
> Patch based on a previous series by Shashank Sharma.
>
> v2: Update contributors
Is this patch actually necessary? If I recall correctly, _MMIO_PIPE()
will support any number of pipes if the delta between register offsets
for each pipe is constant (in that case, you only need to know the
offset of the first two pipes' registers to calculate the offset of any
subsequent pipe's register). I think _MMIO_PIPE3 is necessary only if
the difference between register offsets is non-constant and thus all
three offsets need to be specified individually.
Same comment for patch #4 of your series.
Matt
>
> Signed-off-by: Shashank Sharma
> Signed-off-by: Lionel Landwerlin
> Signed-off-by: Kumar, Kiran S
> Signed-off-by: Kausal Malladi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 40 +++-
> 1 file changed, 27 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 188ad5d..7ba8a99 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7634,19 +7634,33 @@ enum skl_disp_power_wells {
> #define _PIPE_B_CSC_POSTOFF_ME 0x49144
> #define _PIPE_B_CSC_POSTOFF_LO 0x49148
>
> -#define PIPE_CSC_COEFF_RY_GY(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY)
> -#define PIPE_CSC_COEFF_BY(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY)
> -#define PIPE_CSC_COEFF_RU_GU(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU)
> -#define PIPE_CSC_COEFF_BU(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_BU, _PIPE_B_CSC_COEFF_BU)
> -#define PIPE_CSC_COEFF_RV_GV(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_RV_GV, _PIPE_B_CSC_COEFF_RV_GV)
> -#define PIPE_CSC_COEFF_BV(pipe) _MMIO_PIPE(pipe,
> _PIPE_A_CSC_COEFF_BV, _PIPE_B_CSC_COEFF_BV)
> -#define PIPE_CSC_MODE(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_MODE,
> _PIPE_B_CSC_MODE)
> -#define PIPE_CSC_PREOFF_HI(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_HI,
> _PIPE_B_CSC_PREOFF_HI)
> -#define PIPE_CSC_PREOFF_ME(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_ME,
> _PIPE_B_CSC_PREOFF_ME)
> -#define PIPE_CSC_PREOFF_LO(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_LO,
> _PIPE_B_CSC_PREOFF_LO)
> -#define PIPE_CSC_POSTOFF_HI(pipe)_MMIO_PIPE(pipe,
> _PIPE_A_CSC_POSTOFF_HI, _PIPE_B_CSC_POSTOFF_HI)
> -#define PIPE_CSC_POSTOFF_ME(pipe)_MMIO_PIPE(pipe,
> _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME)
> -#define PIPE_CSC_POSTOFF_LO(pipe)_MMIO_PIPE(pipe,
> _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO)
> +#define _PIPE_C_CSC_COEFF_RY_GY 0x49210
> +#define _PIPE_C_CSC_COEFF_BY 0x49214
> +#define _PIPE_C_CSC_COEFF_RU_GU 0x49218
> +#define _PIPE_C_CSC_COEFF_BU 0x4921c
> +#define _PIPE_C_CSC_COEFF_RV_GV 0x49220
> +#define _PIPE_C_CSC_COEFF_BV 0x49224
> +#define _PIPE_C_CSC_MODE 0x49228
> +#define _PIPE_C_CSC_PREOFF_HI0x49230
> +#define _PIPE_C_CSC_PREOFF_ME0x49234
> +#define _PIPE_C_CSC_PREOFF_LO0x49238
> +#define _PIPE_C_CSC_POSTOFF_HI 0x49240
> +#define _PIPE_C_CSC_POSTOFF_ME 0x49244
> +#define _PIPE_C_CSC_POSTOFF_LO 0x49248
> +
> +#define PIPE_CSC_COEFF_RY_GY(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY, _PIPE_C_CSC_COEFF_RY_GY)
> +#define PIPE_CSC_COEFF_BY(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY, _PIPE_C_CSC_COEFF_BY)
> +#define PIPE_CSC_COEFF_RU_GU(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU, _PIPE_C_CSC_COEFF_RU_GU)
> +#define PIPE_CSC_COEFF_BU(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_BU, _PIPE_B_CSC_COEFF_BU, _PIPE_C_CSC_COEFF_BU)
> +#define PIPE_CSC_COEFF_RV_GV(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_RV_GV, _PIPE_B_CSC_COEFF_RV_GV, _PIPE_C_CSC_COEFF_RV_GV)
> +#define PIPE_CSC_COEFF_BV(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_COEFF_BV, _PIPE_B_CSC_COEFF_BV, _PIPE_C_CSC_COEFF_BV)
> +#define PIPE_CSC_MODE(pipe) _MMIO_PIPE3(pipe, _PIPE_A_CSC_MODE,
> _PIPE_B_CSC_MODE, _PIPE_C_CSC_MODE)
> +#define PIPE_CSC_PREOFF_HI(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_PREOFF_HI, _PIPE_B_CSC_PREOFF_HI, _PIPE_C_CSC_PREOFF_HI)
> +#define PIPE_CSC_PREOFF_ME(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_PREOFF_ME, _PIPE_B_CSC_PREOFF_ME, _PIPE_C_CSC_PREOFF_ME)
> +#define PIPE_CSC_PREOFF_LO(pipe) _MMIO_PIPE3(pipe,
> _PIPE_A_CSC_PREOFF_LO, _PIPE_B_CSC_PREOFF_LO, _PIPE_C_CSC_PREOFF_LO)
> +#define PIPE_CSC_POSTOFF_HI(pipe)_MMIO_PIPE3(pipe,
> _PIPE_A_CSC_POSTOFF_HI, _PIPE_B_CSC_POSTOFF_HI, _PIPE_C_CSC_POSTOFF_HI)
> +#define PIPE_CSC_POSTOFF_ME(pipe)_MMIO_PIPE3(pipe,
> _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME, _PIPE_C_CSC_POSTOFF_ME)
> +#define PIPE_CSC_POSTOFF_LO(pipe)_MMIO_PIPE3(pipe,
> _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO, _PIP
[GIT PULL] drm/vc4: changes for drm-next.
These changes have been on the list for just under 2 weeks (and sitting under a lot of the other development I've been doing), so I think they're ready to go for -next. They're also a big deal for getting multiple encoders going, which I'm hoping will happen soon. The following changes since commit 5443ce86fa37e7d3cc63d2067d05e3388fdeec17: drm: virtio-gpu: set atomic flag (2016-02-11 08:56:23 +1000) are available in the git repository at: git at github.com:anholt/linux.git tags/drm-vc4-next-2016-02-17 for you to fetch changes up to fc04023fafecf19ebd09278d8d67dc5ed1f68b46: drm/vc4: Add support for YUV planes. (2016-02-16 11:24:08 -0800) This pull request brings in overlay plane support for vc4. Eric Anholt (10): drm/vc4: Improve comments on vc4_plane_state members. drm/vc4: Add missing __iomem annotation to hw_dlist. drm/vc4: Move the plane clipping/scaling setup to a separate function. drm/vc4: Add a proper short-circut path for legacy cursor updates. drm/vc4: Make the CRTCs cooperate on allocating display lists. drm/vc4: Add more display planes to each CRTC. drm/vc4: Fix which value is being used for source image size. drm/vc4: Add support for scaling of display planes. drm/vc4: Add support a few more RGB display plane formats. drm/vc4: Add support for YUV planes. drivers/gpu/drm/vc4/vc4_crtc.c | 171 +++- drivers/gpu/drm/vc4/vc4_drv.h | 12 +- drivers/gpu/drm/vc4/vc4_hvs.c | 97 +++ drivers/gpu/drm/vc4/vc4_kms.c | 9 + drivers/gpu/drm/vc4/vc4_plane.c | 603 drivers/gpu/drm/vc4/vc4_regs.h | 102 ++- 6 files changed, 872 insertions(+), 122 deletions(-)
[GIT PULL] drm/vc4: changes for drm-fixes
These changes have been on the list for over a week without comment, so I think it might be an appropriate time to pull (without an active development community, getting review will probably be hard). I'm also curious when your window for taking fixes would close -- the modesetting series I sent yesterday covers what most users have been running into. The following changes since commit 388f7b1d6e8ca06762e2454d28d6c3c55ad0fe95: Linux 4.5-rc3 (2016-02-07 15:38:30 -0800) are available in the git repository at: git at github.com:anholt/linux.git tags/drm-vc4-fixes-2016-02-17 for you to fetch changes up to 36cb6253f9383fd9a59ee7b8458c6232ef48577c: drm/vc4: Use runtime PM to power cycle the device when the GPU hangs. (2016-02-16 12:21:01 -0800) This pull request fixes GPU reset (which was disabled shortly after V3D integration due to build breakage) and waits for idle in the presence of signals (which X likes to do a lot). Eric Anholt (8): drm/vc4: Validate that WAIT_BO padding is cleared. drm/vc4: Fix the clear color for the first tile rendered. drm/vc4: Return an ERR_PTR from BO creation instead of NULL. drm/vc4: Fix -ERESTARTSYS error return from BO waits. drm/vc4: Drop error message on seqno wait timeouts. drm/vc4: Fix spurious GPU resets due to BO reuse. drm/vc4: Enable runtime PM. drm/vc4: Use runtime PM to power cycle the device when the GPU hangs. drivers/gpu/drm/vc4/vc4_bo.c| 16 - drivers/gpu/drm/vc4/vc4_drv.h | 13 ++-- drivers/gpu/drm/vc4/vc4_gem.c | 65 - drivers/gpu/drm/vc4/vc4_irq.c | 2 +- drivers/gpu/drm/vc4/vc4_render_cl.c | 22 ++--- drivers/gpu/drm/vc4/vc4_v3d.c | 48 --- drivers/gpu/drm/vc4/vc4_validate.c | 4 +-- 7 files changed, 118 insertions(+), 52 deletions(-)
[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver
https://bugs.freedesktop.org/show_bug.cgi?id=94043 Mike Lothian changed: What|Removed |Added CC||mike at fireburn.co.uk --- Comment #7 from Mike Lothian --- If this is a regression try and find which part of the stack that's regressed. It could be the kernel, mesa, wine or Battle.net itself. Once you've found which component run a git bisect - there's plenty of instructions on how to do so. When you've found which commit that's caused the regression report back here. Hopefully from there a solution can be found -obv is the issue is in wine you'll need to report there and if it's in Battle.net itself - good luck... -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/60c7725c/attachment.html>
[Bug 60879] [radeonsi] X11 can't start with acceleration enabled
https://bugs.freedesktop.org/show_bug.cgi?id=60879 Michel D�nzer changed: What|Removed |Added CC|michel at daenzer.net | --- Comment #132 from Michel D�nzer --- I get updates to this report via the dri-devel mailing list, please don't add me to the CC list. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/e4afcb6f/attachment.html>
[Bug 93801] GRID Autosport hang on logo (startup)
https://bugs.freedesktop.org/show_bug.cgi?id=93801 Michel D�nzer changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |NOTOURBUG --- Comment #13 from Michel D�nzer --- There's no trace of the driver being involved in the hanging state. Based on that and Jos�'s comments, let's assume that this is a game bug. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160217/da3ef577/attachment.html>
