[PATCH V8 00/14] drm/exynos: few patches to enhance bridge chip support
On 2015ë 01ì 02ì¼ 22:14, Ajay kumar wrote: > Hi Daniel, > > This series is sitting out there since long without any ACKs. > If people can ACK this series, I am ready to rebase and send ASAP. Acked-by: Inki Dae And, for [PATCH V8 5/14] drm/exynos: dp: support drm_bridge, Signed-off-by: Inki Dae Thanks, Inki Dae > > Regards, > Ajay Kumar > > On Fri, Jan 2, 2015 at 6:40 PM, Daniel Stone wrote: >> Hi Ajay, >> >> On 17 December 2014 at 09:31, Javier Martinez Canillas >> wrote: >>> >>> On 12/16/2014 12:37 AM, Laurent Pinchart wrote: > You asked Ajay to change his series to use the video port and enpoints > DT > bindings instead of phandles, could you please review his latest > version? > > I guess is now too late for 3.19 since we are in the middle of the > merge > window but it would be great if this series can at least made it to > 3.20. I don't have time to review the series in details right now, but I'm happy with the DT bindings, and have no big issue with the rest of the patches. I don't really like the of_drm_find_bridge() concept introduced in 03/14 but I won't nack it given lack of time to implement an alternative proposal. It's an internal API, it can always be reworked later anyway. >>> >>> Thanks a lot for taking the time to look at the DT bindings, then I guess >>> that the series are finally ready to be merged? >>> >>> Ajay's series don't apply cleanly anymore because it has been a while >>> since >>> he posted it but he can rebase on top of 3.19-rc1 once it is released and >>> re-resend. >> >> >> Do you have any plans to rebase this so it's ready for merging? >> >> Thierry, Daniel, Dave - whose tree would this be best to merge through? >> >> Cheers, >> Daniel > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" > in > the body of a message to majordomo at vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
[PATCH 1/3] ARM: dts: add fimd device support for exynos3250-rinato
On 2014ë
11ì 28ì¼ 20:39, Inki Dae wrote:
> This patch adds fimd device node which is a display controller
> for Exynos3250 Rinato board.
Hi Kukjin,
Please, ping~
Thanks,
Inki Dae
>
> Signed-off-by: Inki Dae
> Acked-by: Kyungmin Park
> ---
> arch/arm/boot/dts/exynos3250-rinato.dts | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
> b/arch/arm/boot/dts/exynos3250-rinato.dts
> index 80aa8b4..79aa916 100644
> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
> @@ -125,6 +125,17 @@
> };
> };
>
> +&fimd {
> + status = "okay";
> +
> + i80-if-timings {
> + cs-setup = <0>;
> + wr-setup = <0>;
> + wr-act = <1>;
> + wr-hold = <0>;
> + };
> +};
> +
> &i2c_0 {
> #address-cells = <1>;
> #size-cells = <0>;
>
[PATCH 3/3] ARM: dts: add Panel device support for exynos3250-rinato
On 2014ë
11ì 28ì¼ 20:39, Inki Dae wrote:
> This patch adds MIPI-DSI and MIPI-DSI based S6E63J0X03 AMOLED panel
> device nodes for Exynos3250 Rinato board.
Hi Mr. Kukjin,
Please, ping~
Thanks,
Inki Dae
>
> Signed-off-by: Inki Dae
> Acked-by: Kyungmin Park
> ---
> arch/arm/boot/dts/exynos3250-rinato.dts | 59
> +++
> 1 file changed, 59 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts
> b/arch/arm/boot/dts/exynos3250-rinato.dts
> index 79aa916..6e0e90d 100644
> --- a/arch/arm/boot/dts/exynos3250-rinato.dts
> +++ b/arch/arm/boot/dts/exynos3250-rinato.dts
> @@ -125,6 +125,65 @@
> };
> };
>
> +&dsi_0 {
> + vddcore-supply = <&ldo6_reg>;
> + vddio-supply = <&ldo6_reg>;
> + samsung,pll-clock-frequency = <2400>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 1 {
> + reg = <1>;
> +
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in>;
> + samsung,burst-clock-frequency = <25000>;
> + samsung,esc-clock-frequency = <2000>;
> + };
> + };
> + };
> +
> + panel at 0 {
> + compatible = "samsung,s6e63j0x03";
> + reg = <0>;
> + vdd3-supply = <&ldo16_reg>;
> + vci-supply = <&ldo20_reg>;
> + reset-gpios = <&gpe0 1 0>;
> + te-gpios = <&gpx0 6 0>;
> + power-on-delay= <30>;
> + power-off-delay= <120>;
> + reset-delay = <5>;
> + init-delay = <100>;
> + flip-horizontal;
> + flip-vertical;
> + panel-width-mm = <29>;
> + panel-height-mm = <29>;
> +
> + display-timings {
> + timing-0 {
> + clock-frequency = <0>;
> + hactive = <320>;
> + vactive = <320>;
> + hfront-porch = <1>;
> + hback-porch = <1>;
> + hsync-len = <1>;
> + vfront-porch = <150>;
> + vback-porch = <1>;
> + vsync-len = <2>;
> + };
> + };
> +
> + port {
> + dsi_in: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> &fimd {
> status = "okay";
>
>
[PATCH] drm/radeon: Fix kernel panic when plugging a HDMI w/o SAD
A BUG_ON() call in dce3_2_afmt_write_sad_regs() is triggered when a
HDMI monitor without SAD is plugged as the case sad_count = 0 is
overlooked in the code:
kernel BUG at ../drivers/gpu/drm/radeon/dce3_1_afmt.c:110!
invalid opcode: [#1] PREEMPT SMP
CPU: 2 PID: 967 Comm: Xorg Tainted: PO 3.16.7-7-desktop #1
Hardware name: System manufacturer System Product Name/M4A77T, BIOS 2401
05/18/2011
task: 8800cea86350 ti: 8800c188 task.ti: 8800c188
RIP: 0010:[] dce3_1_hdmi_setmode+0x570/0x5a0 [radeon]
Call Trace:
[] drm_crtc_helper_set_mode+0x346/0x520 [drm_kms_helper]
[] drm_crtc_helper_set_config+0x8a8/0xad0 [drm_kms_helper]
[] radeon_crtc_set_config+0x3f/0x110 [radeon]
[] drm_mode_set_config_internal+0x61/0xe0 [drm]
[] restore_fbdev_mode+0xab/0xd0 [drm_kms_helper]
[] drm_fb_helper_restore_fbdev_mode_unlocked+0x1e/0x30
[drm_kms_helper]
[] drm_fb_helper_set_par+0x22/0x60 [drm_kms_helper]
[] drm_fb_helper_hotplug_event+0x8b/0xe0 [drm_kms_helper]
[] drm_fb_helper_set_par+0x3a/0x60 [drm_kms_helper]
[] fb_set_var+0x15e/0x3b0
[] fbcon_blank+0x1cb/0x2b0
[] do_unblank_screen+0xa1/0x1b0
[] complete_change_console+0x53/0xe0
[] vt_ioctl+0xf49/0x10d0
[] tty_ioctl+0x26c/0xb70
[] do_vfs_ioctl+0x2e7/0x4c0
[] SyS_ioctl+0x81/0xa0
[] system_call_fastpath+0x1a/0x1f
[<7f2fae8c6397>] 0x7f2fae8c6396
This patch fixes it by covering sad_count = 0 in the error check
properly, too.
Bugzilla: https://bugzilla.opensuse.org/show_bug.cgi?id=911356
Cc:
Signed-off-by: Takashi Iwai
---
IMO, BUG_ON() call itself is exaggerated there, but we may change it later
independently from this fix.
drivers/gpu/drm/radeon/dce3_1_afmt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/dce3_1_afmt.c
b/drivers/gpu/drm/radeon/dce3_1_afmt.c
index 2fe8cfc966d9..bafdf92a5732 100644
--- a/drivers/gpu/drm/radeon/dce3_1_afmt.c
+++ b/drivers/gpu/drm/radeon/dce3_1_afmt.c
@@ -103,7 +103,7 @@ static void dce3_2_afmt_write_sad_regs(struct drm_encoder
*encoder)
}
sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
- if (sad_count < 0) {
+ if (sad_count <= 0) {
DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
return;
}
--
2.2.0
[PATCH] drm/radeon: Fix kernel panic when plugging a HDMI w/o SAD
At Sat, 3 Jan 2015 09:27:52 +0100,
Takashi Iwai wrote:
>
> A BUG_ON() call in dce3_2_afmt_write_sad_regs() is triggered when a
> HDMI monitor without SAD is plugged as the case sad_count = 0 is
> overlooked in the code:
>
> kernel BUG at ../drivers/gpu/drm/radeon/dce3_1_afmt.c:110!
> invalid opcode: [#1] PREEMPT SMP
> CPU: 2 PID: 967 Comm: Xorg Tainted: PO 3.16.7-7-desktop #1
> Hardware name: System manufacturer System Product Name/M4A77T, BIOS 2401
> 05/18/2011
> task: 8800cea86350 ti: 8800c188 task.ti: 8800c188
> RIP: 0010:[] dce3_1_hdmi_setmode+0x570/0x5a0 [radeon]
> Call Trace:
> [] drm_crtc_helper_set_mode+0x346/0x520 [drm_kms_helper]
> [] drm_crtc_helper_set_config+0x8a8/0xad0 [drm_kms_helper]
> [] radeon_crtc_set_config+0x3f/0x110 [radeon]
> [] drm_mode_set_config_internal+0x61/0xe0 [drm]
> [] restore_fbdev_mode+0xab/0xd0 [drm_kms_helper]
> [] drm_fb_helper_restore_fbdev_mode_unlocked+0x1e/0x30
> [drm_kms_helper]
> [] drm_fb_helper_set_par+0x22/0x60 [drm_kms_helper]
> [] drm_fb_helper_hotplug_event+0x8b/0xe0 [drm_kms_helper]
> [] drm_fb_helper_set_par+0x3a/0x60 [drm_kms_helper]
> [] fb_set_var+0x15e/0x3b0
> [] fbcon_blank+0x1cb/0x2b0
> [] do_unblank_screen+0xa1/0x1b0
> [] complete_change_console+0x53/0xe0
> [] vt_ioctl+0xf49/0x10d0
> [] tty_ioctl+0x26c/0xb70
> [] do_vfs_ioctl+0x2e7/0x4c0
> [] SyS_ioctl+0x81/0xa0
> [] system_call_fastpath+0x1a/0x1f
> [<7f2fae8c6397>] 0x7f2fae8c6396
>
> This patch fixes it by covering sad_count = 0 in the error check
> properly, too.
>
> Bugzilla: https://bugzilla.opensuse.org/show_bug.cgi?id=911356
> Cc:
> Signed-off-by: Takashi Iwai
> ---
>
> IMO, BUG_ON() call itself is exaggerated there, but we may change it later
> independently from this fix.
>
> drivers/gpu/drm/radeon/dce3_1_afmt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/dce3_1_afmt.c
> b/drivers/gpu/drm/radeon/dce3_1_afmt.c
> index 2fe8cfc966d9..bafdf92a5732 100644
> --- a/drivers/gpu/drm/radeon/dce3_1_afmt.c
> +++ b/drivers/gpu/drm/radeon/dce3_1_afmt.c
> @@ -103,7 +103,7 @@ static void dce3_2_afmt_write_sad_regs(struct drm_encoder
> *encoder)
> }
>
> sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
> - if (sad_count < 0) {
> + if (sad_count <= 0) {
> DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
> return;
> }
Looking back at this fix again, this seems suboptimal, as it prints
the error even in the correct case (sad_count = 0), and it doesn't set
the register in the later code. I'm going to post a revised patch.
Takashi
[PATCH v2] drm/radeon: Fix kernel panic with HDMI w/o SAD
A BUG_ON() call in dce3_2_afmt_write_sad_regs() is triggered when a
HDMI monitor without audio is plugged:
kernel BUG at ../drivers/gpu/drm/radeon/dce3_1_afmt.c:110!
invalid opcode: [#1] PREEMPT SMP
CPU: 2 PID: 967 Comm: Xorg Tainted: PO 3.16.7-7-desktop #1
Hardware name: System manufacturer System Product Name/M4A77T, BIOS 2401
05/18/2011
task: 8800cea86350 ti: 8800c188 task.ti: 8800c188
RIP: 0010:[] dce3_1_hdmi_setmode+0x570/0x5a0 [radeon]
Call Trace:
[] drm_crtc_helper_set_mode+0x346/0x520 [drm_kms_helper]
[] drm_crtc_helper_set_config+0x8a8/0xad0 [drm_kms_helper]
[] radeon_crtc_set_config+0x3f/0x110 [radeon]
[] drm_mode_set_config_internal+0x61/0xe0 [drm]
[] restore_fbdev_mode+0xab/0xd0 [drm_kms_helper]
[] drm_fb_helper_restore_fbdev_mode_unlocked+0x1e/0x30
[drm_kms_helper]
[] drm_fb_helper_set_par+0x22/0x60 [drm_kms_helper]
[] drm_fb_helper_hotplug_event+0x8b/0xe0 [drm_kms_helper]
[] drm_fb_helper_set_par+0x3a/0x60 [drm_kms_helper]
[] fb_set_var+0x15e/0x3b0
[] fbcon_blank+0x1cb/0x2b0
[] do_unblank_screen+0xa1/0x1b0
[] complete_change_console+0x53/0xe0
[] vt_ioctl+0xf49/0x10d0
[] tty_ioctl+0x26c/0xb70
[] do_vfs_ioctl+0x2e7/0x4c0
[] SyS_ioctl+0x81/0xa0
[] system_call_fastpath+0x1a/0x1f
[<7f2fae8c6397>] 0x7f2fae8c6396
Actually the BUG_ON() check is wrong, since sads may be NULL when
sad_count is zero. This patch removes the BUG_ON() and adds the
proper NULL initialization of sads.
Bugzilla: https://bugzilla.opensuse.org/show_bug.cgi?id=911356
Cc:
Signed-off-by: Takashi Iwai
---
drivers/gpu/drm/radeon/dce3_1_afmt.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/dce3_1_afmt.c
b/drivers/gpu/drm/radeon/dce3_1_afmt.c
index 2fe8cfc966d9..7ca23f45829e 100644
--- a/drivers/gpu/drm/radeon/dce3_1_afmt.c
+++ b/drivers/gpu/drm/radeon/dce3_1_afmt.c
@@ -72,7 +72,7 @@ static void dce3_2_afmt_write_sad_regs(struct drm_encoder
*encoder)
struct radeon_device *rdev = encoder->dev->dev_private;
struct drm_connector *connector;
struct radeon_connector *radeon_connector = NULL;
- struct cea_sad *sads;
+ struct cea_sad *sads = NULL;
int i, sad_count;
static const u16 eld_reg_to_type[][2] = {
@@ -107,7 +107,6 @@ static void dce3_2_afmt_write_sad_regs(struct drm_encoder
*encoder)
DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
return;
}
- BUG_ON(!sads);
for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {
u32 value = 0;
--
2.2.0
WARNING: at drivers/gpu/drm/i915/intel_display.c:11375 [i915] in 3.19-rc2
On Fri, Jan 02, 2015 at 09:42:01AM +0200, Jani Nikula wrote: > On Thu, 01 Jan 2015, Andrey Skvortsov wrote: > > Hi, > > > > this warning does not exist in 3.19-rc1, but it happens every boot in > > 3.19-rc2. If you need any other information or data, I would be glad > > to help to debug it. > > Hmm, at a glance I can't find a commit that could be the culprit. Can > you bisect between rc1 and rc2 to find the bad commit? Sorry, my first message was not fully correct. As I tested this more, it happens unfortunately not every boot. And this is not a regression, because it happened couple of times with 3.19-rc1 too. This warning seems to depend on the previously booted kernel. If I boot the same kernel every time, it occurs very seldom. To reproduce the warning I booted v3.19-rc2 and v3.19-rc1-g08b022a965 one after another many times. In this case the warning happens with probability around 50%. > > [ 12.848428] [ cut here ] > > [ 12.848479] WARNING: CPU: 1 PID: 328 at > > drivers/gpu/drm/i915/intel_display.c:11375 > > intel_crtc_set_config+0x3de/0xb36 [i915]() > > [ 12.848482] WARN_ON(!set->fb && (set->num_connectors != 0)) -- Best regards, Andrey Skvortsov Secure e-mail with gnupg: See http://www.gnupg.org/ PGP Key ID: 0x57A3AEAD -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150103/173c2c48/attachment.sig>
WARNING: at drivers/gpu/drm/i915/intel_display.c:11375 [i915] in 3.19-rc2
On Fri, Jan 02, 2015 at 08:27:29PM +0530, Sudip Mukherjee wrote: > On Thu, Jan 01, 2015 at 05:22:15PM +0300, Andrey Skvortsov wrote: > > Hi, > > > > this warning does not exist in 3.19-rc1, but it happens every boot in > > 3.19-rc2. If you need any other information or data, I would be glad > > to help to debug it. > > mine is also i915, but i am not seeing any warning. if you send me your > .config, then i can try booting using that. > the current kernel version is : 3.19.0-rc2-next-20141231+ > Sorry, my first message was not fully correct. As I tried to bisect this, I noticed that this warning happens unfortunately not every boot. And I noticed another strange behavior. If the same kernel is always booted, the warning happens very seldom. To make it appear more frequently I booted v3.19-rc2 and v3.19-rc1-g08b022a9655bf one after another many times. In this case it happens with probability around 50% during the boot. my config is attached. -- Best regards, Andrey Skvortsov Secure e-mail with gnupg: See http://www.gnupg.org/ PGP Key ID: 0x57A3AEAD -- next part -- A non-text attachment was scrubbed... Name: config.xz Type: application/octet-stream Size: 23408 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150103/6dff4cc9/attachment-0001.obj> -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150103/6dff4cc9/attachment-0001.sig>
[PATCH v2 0/7] Add SDMA user-mode queues support to amdkfd
Although I didn't get any replies on v1, I still decided to send this v2, because: a. Alex and I decided to move some H/W initialization functionallity into radeon. b. The next patch-set that I intend to send (prepare to support future AMD GPUs) is based on this patch-set. Therefore, I wanted to quickly publish the most updated version of this patch-set. The only change in this version is moving initialization of H/W registers into radeon driver, instead of putting it in the interface file. It is detailed in the relevant commits. Link to cover letter of original version: http://lists.freedesktop.org/archives/dri-devel/2014-December/073934.html Oded Gabbay Ben Goz (7): drm/amd: Add SDMA functions to kfd-->kgd interface drm/radeon: Implement SDMA interface functions drm/amdkfd: Add SDMA mqd support drm/amdkfd: Add SDMA user-mode queues support to QCM drm/amdkfd: Identify SDMA queue in create queue ioctl drm/amdkfd: Pass queue type to pqm_create_queue() drm/radeon: Enable sdma preemption drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 6 +- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 159 ++-- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 5 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 121 + drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 8 + .../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 2 +- drivers/gpu/drm/amd/include/kgd_kfd_interface.h| 13 +- drivers/gpu/drm/radeon/cik_reg.h | 200 - drivers/gpu/drm/radeon/cik_sdma.c | 29 +++ drivers/gpu/drm/radeon/radeon_kfd.c| 115 +++- 10 files changed, 640 insertions(+), 18 deletions(-) -- 2.1.0
[PATCH v2 1/7] drm/amd: Add SDMA functions to kfd-->kgd interface
From: Ben Goz
This patch adds three new functions to the kfd2kgd interface:
- hqd_sdma_load() - Loads SDMA mqd to a H/W SDMA hqd slot. Used only in no HWS
mode.
- hqd_sdma_is_occupied() - Checks if an SDMA hqd slot is occupied. Used only
in no HWS mode.
- hqd_sdma_destroy() - Destructs and preempts the SDMA queue assigned to
that SDMA hqd slot. Used only in no HWS mode.
These functions are needed to support SDMA queues scheduling when using no HWS
mode (used for debug or bring-up).
v2: Removed init_sdma_engines() from interface. Initialization is done in
radeon.
Signed-off-by: Ben Goz
Reviewed-by: Oded Gabbay
---
drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
index 9c729dd..6daa984 100644
--- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h
@@ -133,10 +133,18 @@ struct kgd2kfd_calls {
* @hqd_load: Loads the mqd structure to a H/W hqd slot. used only for no cp
* sceduling mode.
*
+ * @hqd_sdma_load: Loads the SDMA mqd structure to a H/W SDMA hqd slot.
+ * used only for no HWS mode.
+ *
* @hqd_is_occupies: Checks if a hqd slot is occupied.
*
* @hqd_destroy: Destructs and preempts the queue assigned to that hqd slot.
*
+ * @hqd_sdma_is_occupied: Checks if an SDMA hqd slot is occupied.
+ *
+ * @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
+ * SDMA hqd slot.
+ *
* This structure contains function pointers to services that the kgd driver
* provides to amdkfd driver.
*
@@ -169,13 +177,16 @@ struct kfd2kgd_calls {
int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
uint32_t queue_id, uint32_t __user *wptr);
-
+ int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd);
bool (*hqd_is_occupies)(struct kgd_dev *kgd, uint64_t queue_address,
uint32_t pipe_id, uint32_t queue_id);
int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
unsigned int timeout, uint32_t pipe_id,
uint32_t queue_id);
+ bool (*hqd_sdma_is_occupied)(struct kgd_dev *kgd, void *mqd);
+ int (*hqd_sdma_destroy)(struct kgd_dev *kgd, void *mqd,
+ unsigned int timeout);
};
bool kgd2kfd_init(unsigned interface_version,
--
2.1.0
[PATCH v2 2/7] drm/radeon: Implement SDMA interface functions
From: Ben Goz This patch implements the new SDMA interface functions. It also adds defines and structures related to SDMA registers. v2: Removed init_sdma_engines() from interface. Initialization is done in radeon. Signed-off-by: Ben Goz --- drivers/gpu/drm/radeon/cik_reg.h| 200 +++- drivers/gpu/drm/radeon/radeon_kfd.c | 115 - 2 files changed, 312 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik_reg.h b/drivers/gpu/drm/radeon/cik_reg.h index 79c45e8..5008964 100644 --- a/drivers/gpu/drm/radeon/cik_reg.h +++ b/drivers/gpu/drm/radeon/cik_reg.h @@ -147,10 +147,73 @@ #define CIK_LB_DESKTOP_HEIGHT 0x6b0c +#define KFD_CIK_SDMA_QUEUE_OFFSET 0x200 + +#define SQ_IND_INDEX 0x8DE0 +#define SQ_CMD 0x8DEC +#define SQ_IND_DATA0x8DE4 + +#define TCP_WATCH0_ADDR_H (0x32A0*4) +#define TCP_WATCH1_ADDR_H (0x32A3*4) +#define TCP_WATCH2_ADDR_H (0x32A6*4) +#define TCP_WATCH3_ADDR_H (0x32A9*4) +#define TCP_WATCH0_ADDR_L (0x32A1*4) +#define TCP_WATCH1_ADDR_L (0x32A4*4) +#define TCP_WATCH2_ADDR_L (0x32A7*4) +#define TCP_WATCH3_ADDR_L (0x32AA*4) +#define TCP_WATCH0_CNTL(0x32A2*4) +#define TCP_WATCH1_CNTL(0x32A5*4) +#define TCP_WATCH2_CNTL(0x32A8*4) +#define TCP_WATCH3_CNTL(0x32AB*4) + #define CP_HQD_IQ_RPTR 0xC970u #define AQL_ENABLE (1U << 0) - -#define IDLE (1 << 2) +#define SDMA0_RLC0_RB_CNTL 0xD400u +#defineRB_ENABLE (1 << 0) +#defineRB_SIZE(x) (x << 1) +#defineRB_SWAP_ENABLE (1 << 9) +#defineRPTR_WRITEBACK_ENABLE (1 << 12) +#defineRPTR_WRITEBACK_SWAP_ENABLE (1 << 13) +#defineRPTR_WRITEBACK_TIMER(x) (x << 16) +#defineRB_VMID(x) (x << 24) +#defineSDMA0_RLC0_RB_BASE 0xD404u +#defineSDMA0_RLC0_RB_BASE_HI 0xD408u +#defineSDMA0_RLC0_RB_RPTR 0xD40Cu +#defineSDMA0_RLC0_RB_WPTR 0xD410u +#defineSDMA0_RLC0_RB_WPTR_POLL_CNTL0xD414u +#defineSDMA0_RLC0_RB_WPTR_POLL_ADDR_HI 0xD418u +#defineSDMA0_RLC0_RB_WPTR_POLL_ADDR_LO 0xD41Cu +#defineSDMA0_RLC0_RB_RPTR_ADDR_HI 0xD420u +#defineSDMA0_RLC0_RB_RPTR_ADDR_LO 0xD424u +#defineSDMA0_RLC0_IB_CNTL 0xD428u +#defineSDMA0_RLC0_IB_RPTR 0xD42Cu +#defineSDMA0_RLC0_IB_OFFSET0xD430u +#defineSDMA0_RLC0_IB_BASE_LO 0xD434u +#defineSDMA0_RLC0_IB_BASE_HI 0xD438u +#defineSDMA0_RLC0_IB_SIZE 0xD43Cu +#defineSDMA0_RLC0_SKIP_CNTL0xD440u +#defineSDMA0_RLC0_CONTEXT_STATUS 0xD444u +#defineSELECTED(1 << 0) +#defineIDLE(1 << 2) +#defineEXPIRED (1 << 3) +#defineEXCEPTION (1 << 4) +#defineCTXSW_ABLE (1 << 7) +#defineCTXSW_READY (1 << 8) +#defineSDMA0_RLC0_DOORBELL 0xD448u +#defineOFFSET(x) (x << 0) +#defineDB_ENABLE (1 << 28) +#defineCAPTURED(1 << 30) +#defineSDMA0_RLC0_VIRTUAL_ADDR 0xD49Cu +#defineATC (1 << 0) +#defineVA_PTR32(1 << 4) +#defineVA_SHARED_BASE(x) (x << 8) +#defineVM_HOLE (1 << 30) +#defineSDMA0_RLC0_APE1_CNTL0xD4A0u +#defineSDMA0_RLC0_DOORBELL_LO
[PATCH v2 3/7] drm/amdkfd: Add SDMA mqd support
From: Ben Goz
This patch adds support for SDMA mqd operations:
- init_mqd_sdma
- uninit_mqd_sdma
- load_mqd_sdma
- update_mqd_sdma
- destroy_mqd_sdma
- is_occupied_sdma
It also adds SDMA queue information to some private structures of amdkfd.
Signed-off-by: Ben Goz
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 121 +++
drivers/gpu/drm/amd/amdkfd/kfd_priv.h| 8 ++
2 files changed, 129 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
index adc3147..9eda956 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
@@ -111,6 +111,37 @@ static int init_mqd(struct mqd_manager *mm, void **mqd,
return retval;
}
+static int init_mqd_sdma(struct mqd_manager *mm, void **mqd,
+ struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
+ struct queue_properties *q)
+{
+ int retval;
+ struct cik_sdma_rlc_registers *m;
+
+ BUG_ON(!mm || !mqd || !mqd_mem_obj);
+
+ retval = kfd2kgd->allocate_mem(mm->dev->kgd,
+ sizeof(struct cik_sdma_rlc_registers),
+ 256,
+ KFD_MEMPOOL_SYSTEM_WRITECOMBINE,
+ (struct kgd_mem **) mqd_mem_obj);
+
+ if (retval != 0)
+ return -ENOMEM;
+
+ m = (struct cik_sdma_rlc_registers *) (*mqd_mem_obj)->cpu_ptr;
+
+ memset(m, 0, sizeof(struct cik_sdma_rlc_registers));
+
+ *mqd = m;
+ if (gart_addr != NULL)
+ *gart_addr = (*mqd_mem_obj)->gpu_addr;
+
+ retval = mm->update_mqd(mm, m, q);
+
+ return retval;
+}
+
static void uninit_mqd(struct mqd_manager *mm, void *mqd,
struct kfd_mem_obj *mqd_mem_obj)
{
@@ -118,11 +149,24 @@ static void uninit_mqd(struct mqd_manager *mm, void *mqd,
kfd2kgd->free_mem(mm->dev->kgd, (struct kgd_mem *) mqd_mem_obj);
}
+static void uninit_mqd_sdma(struct mqd_manager *mm, void *mqd,
+ struct kfd_mem_obj *mqd_mem_obj)
+{
+ BUG_ON(!mm || !mqd);
+ kfd2kgd->free_mem(mm->dev->kgd, (struct kgd_mem *) mqd_mem_obj);
+}
+
static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id,
uint32_t queue_id, uint32_t __user *wptr)
{
return kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id, wptr);
+}
+static int load_mqd_sdma(struct mqd_manager *mm, void *mqd,
+ uint32_t pipe_id, uint32_t queue_id,
+ uint32_t __user *wptr)
+{
+ return kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd);
}
static int update_mqd(struct mqd_manager *mm, void *mqd,
@@ -170,6 +214,41 @@ static int update_mqd(struct mqd_manager *mm, void *mqd,
return 0;
}
+static int update_mqd_sdma(struct mqd_manager *mm, void *mqd,
+ struct queue_properties *q)
+{
+ struct cik_sdma_rlc_registers *m;
+
+ BUG_ON(!mm || !mqd || !q);
+
+ m = get_sdma_mqd(mqd);
+ m->sdma_rlc_rb_cntl =
+ RB_SIZE((ffs(q->queue_size / sizeof(unsigned int |
+ RB_VMID(q->vmid) |
+ RPTR_WRITEBACK_ENABLE |
+ RPTR_WRITEBACK_TIMER(6);
+
+ m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8);
+ m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8);
+ m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
+ m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
+ m->sdma_rlc_doorbell = OFFSET(q->doorbell_off) | DB_ENABLE;
+ m->sdma_rlc_virtual_addr = q->sdma_vm_addr;
+
+ m->sdma_engine_id = q->sdma_engine_id;
+ m->sdma_queue_id = q->sdma_queue_id;
+
+ q->is_active = false;
+ if (q->queue_size > 0 &&
+ q->queue_address != 0 &&
+ q->queue_percent > 0) {
+ m->sdma_rlc_rb_cntl |= RB_ENABLE;
+ q->is_active = true;
+ }
+
+ return 0;
+}
+
static int destroy_mqd(struct mqd_manager *mm, void *mqd,
enum kfd_preempt_type type,
unsigned int timeout, uint32_t pipe_id,
@@ -179,6 +258,18 @@ static int destroy_mqd(struct mqd_manager *mm, void *mqd,
pipe_id, queue_id);
}
+/*
+ * preempt type here is ignored because there is only one way
+ * to preempt sdma queue
+ */
+static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd,
+ enum kfd_preempt_type type,
+ unsigned int timeout, uint32_t pipe_id,
+ uint32_t queue_id)
+{
+ return kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout);
+}
+
static bool is_occupied(struct mqd_manager *mm, voi
[PATCH v2 4/7] drm/amdkfd: Add SDMA user-mode queues support to QCM
From: Ben Goz
This patch adds support for SDMA user-mode queues to the QCM - the Queue
management system that manages queues-per-device and queues-per-process.
v2: Remove calls to interface function that initializes sdma engines.
Signed-off-by: Ben Goz
Signed-off-by: Oded Gabbay
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 159 +++--
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 5 +
.../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 2 +-
3 files changed, 154 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 924e90c..5c60ac5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -46,9 +46,24 @@ static int set_pasid_vmid_mapping(struct
device_queue_manager *dqm,
static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
struct queue *q,
struct qcm_process_device *qpd);
+
static int execute_queues_cpsch(struct device_queue_manager *dqm, bool lock);
static int destroy_queues_cpsch(struct device_queue_manager *dqm, bool lock);
+static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
+ struct queue *q,
+ struct qcm_process_device *qpd);
+
+static void deallocate_sdma_queue(struct device_queue_manager *dqm,
+ unsigned int sdma_queue_id);
+
+static inline
+enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
+{
+ if (type == KFD_QUEUE_TYPE_SDMA)
+ return KFD_MQD_TYPE_CIK_SDMA;
+ return KFD_MQD_TYPE_CIK_CP;
+}
static inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
{
@@ -190,7 +205,10 @@ static int create_queue_nocpsch(struct
device_queue_manager *dqm,
*allocated_vmid = qpd->vmid;
q->properties.vmid = qpd->vmid;
- retval = create_compute_queue_nocpsch(dqm, q, qpd);
+ if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
+ retval = create_compute_queue_nocpsch(dqm, q, qpd);
+ if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
+ retval = create_sdma_queue_nocpsch(dqm, q, qpd);
if (retval != 0) {
if (list_empty(&qpd->queues_list)) {
@@ -203,7 +221,8 @@ static int create_queue_nocpsch(struct device_queue_manager
*dqm,
list_add(&q->list, &qpd->queues_list);
dqm->queue_count++;
-
+ if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
+ dqm->sdma_queue_count++;
mutex_unlock(&dqm->lock);
return 0;
}
@@ -280,8 +299,7 @@ static int destroy_queue_nocpsch(struct
device_queue_manager *dqm,
struct queue *q)
{
int retval;
- struct mqd_manager *mqd;
-
+ struct mqd_manager *mqd, *mqd_sdma;
BUG_ON(!dqm || !q || !q->mqd || !qpd);
retval = 0;
@@ -295,6 +313,12 @@ static int destroy_queue_nocpsch(struct
device_queue_manager *dqm,
goto out;
}
+ mqd_sdma = dqm->get_mqd_manager(dqm, KFD_MQD_TYPE_CIK_SDMA);
+ if (mqd_sdma == NULL) {
+ mutex_unlock(&dqm->lock);
+ return -ENOMEM;
+ }
+
retval = mqd->destroy_mqd(mqd, q->mqd,
KFD_PREEMPT_TYPE_WAVEFRONT,
QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS,
@@ -303,7 +327,12 @@ static int destroy_queue_nocpsch(struct
device_queue_manager *dqm,
if (retval != 0)
goto out;
- deallocate_hqd(dqm, q);
+ if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
+ deallocate_hqd(dqm, q);
+ else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
+ dqm->sdma_queue_count--;
+ deallocate_sdma_queue(dqm, q->sdma_id);
+ }
mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
@@ -324,7 +353,7 @@ static int update_queue(struct device_queue_manager *dqm,
struct queue *q)
BUG_ON(!dqm || !q || !q->mqd);
mutex_lock(&dqm->lock);
- mqd = dqm->get_mqd_manager(dqm, KFD_MQD_TYPE_CIK_COMPUTE);
+ mqd = dqm->get_mqd_manager(dqm, q->properties.type);
if (mqd == NULL) {
mutex_unlock(&dqm->lock);
return -ENOMEM;
@@ -527,7 +556,6 @@ static int init_pipelines(struct device_queue_manager *dqm,
return 0;
}
-
static int init_scheduler(struct device_queue_manager *dqm)
{
int retval;
@@ -557,6 +585,7 @@ static int initialize_nocpsch(struct device_queue_manager
*dqm)
mutex_init(&dqm->lock);
INIT_LIST_HEAD(&dqm->queues);
dqm->queue_count = dqm->next_pipe_to_allocate = 0;
+ dqm->sdma_queue_count = 0;
dqm->allocated_queues = kcalloc(get_pipes_num(dqm),
[PATCH v2 5/7] drm/amdkfd: Identify SDMA queue in create queue ioctl
From: Ben Goz This patch adds a check to the create queue ioctl path, which identifies SDMA queue type that is sent by userspace. Signed-off-by: Ben Goz Reviewed-by: Oded Gabbay --- drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c index 4f7b275..f9a2a58 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c @@ -196,6 +196,8 @@ static int set_queue_properties_from_user(struct queue_properties *q_properties, if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE || args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL) q_properties->type = KFD_QUEUE_TYPE_COMPUTE; + else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA) + q_properties->type = KFD_QUEUE_TYPE_SDMA; else return -ENOTSUPP; -- 2.1.0
[PATCH v2 6/7] drm/amdkfd: Pass queue type to pqm_create_queue()
From: Ben Goz This patch passes the correct queue type to pqm_create_queue() instead of a fixed KFD_QUEUE_TYPE_COMPUTE type. Signed-off-by: Ben Goz Reviewed-by: Oded Gabbay --- drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c index f9a2a58..1d9a447 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c @@ -264,8 +264,8 @@ static long kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p, p->pasid, dev->id); - err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, 0, - KFD_QUEUE_TYPE_COMPUTE, &queue_id); + err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, + 0, q_properties.type, &queue_id); if (err != 0) goto err_create_queue; -- 2.1.0
[PATCH v2 7/7] drm/radeon: Enable sdma preemption
From: Ben Goz
This patch adds to radeon the enablement of sdma preemption.
This is needed to support HWS of SDMA user-mode queues.
Signed-off-by: Ben Goz
Acked-by: Oded Gabbay
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik_sdma.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c
b/drivers/gpu/drm/radeon/cik_sdma.c
index dde5c7e..1f4ded1 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -283,6 +283,33 @@ static void cik_sdma_rlc_stop(struct radeon_device *rdev)
}
/**
+ * cik_sdma_ctx_switch_enable - enable/disable sdma engine preemption
+ *
+ * @rdev: radeon_device pointer
+ * @enable: enable/disable preemption.
+ *
+ * Halt or unhalt the async dma engines (CIK).
+ */
+void cik_sdma_ctx_switch_enable(struct radeon_device *rdev, bool enable)
+{
+ uint32_t reg_offset, value;
+ int i;
+
+ for (i = 0; i < 2; i++) {
+ if (i == 0)
+ reg_offset = SDMA0_REGISTER_OFFSET;
+ else
+ reg_offset = SDMA1_REGISTER_OFFSET;
+ value = RREG32(SDMA0_CNTL + reg_offset);
+ if (enable)
+ value |= AUTO_CTXSW_ENABLE;
+ else
+ value &= ~AUTO_CTXSW_ENABLE;
+ WREG32(SDMA0_CNTL + reg_offset, value);
+ }
+}
+
+/**
* cik_sdma_enable - stop the async dma engines
*
* @rdev: radeon_device pointer
@@ -312,6 +339,8 @@ void cik_sdma_enable(struct radeon_device *rdev, bool
enable)
me_cntl |= SDMA_HALT;
WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl);
}
+
+ cik_sdma_ctx_switch_enable(rdev, enable);
}
/**
--
2.1.0
