[RFC] drm/exynos: abort commit when framebuffer is removed from plane
2014-06-20 0:13 GMT+09:00 Rahul Sharma :
> This situation arises when userspace remove the frambuffer object
> and call setmode ioctl.
>
> drm_mode_rmfb --> drm_plane_force_disable --> plane->crtc = NULL;
> and
> drm_mode_setcrtc --> exynos_plane_commit --> passes plane->crtc to
> exynos_drm_crtc_plane_commit which is NULL.
If user process requested drm_mode_rmfb with a fb_id, fb object to the
fb_id must be removed from crtc_idr table. So drm_mode_setcrtc should
be failed because there is no the fb object in the crtc_idr table
anymore.
I cannot understand how exynos_drm_crtc_plane_commit function could be
called. Can you give me more details?
Thanks,
Inki Dae
>
> This crashes the system.
>
> Signed-off-by: Rahul Sharma
> ---
> This works fine but I am not confident on the correctness of the
> solution.
>
> drivers/gpu/drm/exynos/exynos_drm_crtc.c |6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> index 95c9435..da4efe4 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
> @@ -165,6 +165,12 @@ static int exynos_drm_crtc_mode_set_commit(struct
> drm_crtc *crtc, int x, int y,
> return -EPERM;
> }
>
> + /* when framebuffer is removed, commit should not proceed. */
> + if(!plane->fb){
> + DRM_ERROR("framebuffer has been removed from plane.\n");
> + return -EFAULT;
> + }
> +
> crtc_w = crtc->primary->fb->width - x;
> crtc_h = crtc->primary->fb->height - y;
>
> --
> 1.7.9.5
>
> --
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> in
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[PATCH] drm/exynos: fimd: Keep power enabled during fimd_bind
Thanks for patch. 2014-07-04 19:33 GMT+09:00 Tushar Behera : > Under some conditions (when IOMMU is enabled), fimd_bind() accesses > hardware registers and power-domain should be enabled during that time. > > fimd_bind --> fimd_mgr_initialize --> fimd_clear_channel > > If the power-domain is disabled by that time, we get a boot-time crash. > It would be better to keep power-domain enabled explicitly. > > Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0180034 > Internal error: : 1008 [#1] PREEMPT SMP ARM > ... > PC is at fimd_bind+0x84/0x134 > LR is at component_bind_all+0xb4/0x1d8 > > Signed-off-by: Tushar Behera > --- > drivers/gpu/drm/exynos/exynos_drm_fimd.c |4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c > b/drivers/gpu/drm/exynos/exynos_drm_fimd.c > index 33161ad..34275fb 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c > @@ -888,11 +888,15 @@ static int fimd_bind(struct device *dev, struct device > *master, void *data) > struct fimd_context *ctx = fimd_manager.ctx; > struct drm_device *drm_dev = data; > > + pm_runtime_get_sync(dev); > + fimd driver has no runtime pm interfaces so pm_runtime_get_sync call will enable lcd0 power domain. So shouldn't fimd clock also be enabled? > fimd_mgr_initialize(&fimd_manager, drm_dev); And here would be good to call clk_disable_unprepare() and pm_runtime_put_sync(). Below codes don't access any fimd register. Or move these function calls into fimd_mgr_initialize(). Thanks, Inki Dae > exynos_drm_crtc_create(&fimd_manager); > if (ctx->display) > exynos_drm_create_enc_conn(drm_dev, ctx->display); > > + pm_runtime_put_sync(dev); > + > return 0; > > } > -- > 1.7.9.5 > > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v5 06/14] drm/exynos: fimd: support LCD I80 interface
2014-07-08 9:39 GMT+09:00 YoungJun Cho :
> To support MIPI command mode based I80 interface panel,
> FIMD should do followings:
> - Sets LCD I80 interface timings configuration.
> - Uses "lcd_sys" as an IRQ resource and sets relevant IRQ configuration.
> - Sets LCD block configuration for I80 interface.
> - Sets ideal(pixel) clock is 2 times faster than the original one
> to generate frame done IRQ prior to the next TE signal.
> - Implements trigger feature that transfers image data if there is page
> flip request, and implements TE handler to call trigger function.
>
> Signed-off-by: YoungJun Cho
> Acked-by: Inki Dae
> Acked-by: Kyungmin Park
> ---
> drivers/gpu/drm/exynos/Kconfig | 1 +
> drivers/gpu/drm/exynos/exynos_drm_fimd.c | 276
> ++-
> include/video/samsung_fimd.h | 3 +-
> 3 files changed, 235 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
> index 178d2a9..9ba1aae 100644
> --- a/drivers/gpu/drm/exynos/Kconfig
> +++ b/drivers/gpu/drm/exynos/Kconfig
> @@ -28,6 +28,7 @@ config DRM_EXYNOS_FIMD
> bool "Exynos DRM FIMD"
> depends on DRM_EXYNOS && !FB_S3C
> select FB_MODE_HELPERS
> + select MFD_SYSCON
> help
> Choose this option if you want to use Exynos FIMD for DRM.
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 33161ad..207872d 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -20,6 +20,8 @@
> #include
> #include
> #include
> +#include
> +#include
>
> #include
> #include
> @@ -61,6 +63,24 @@
> /* color key value register for hardware window 1 ~ 4. */
> #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
>
> +/* I80 / RGB trigger control register */
> +#define TRIGCON0x1A4
> +#define TRGMODE_I80_RGB_ENABLE_I80 (1 << 0)
> +#define SWTRGCMD_I80_RGB_ENABLE(1 << 1)
> +
> +/* display mode change control register except exynos4 */
> +#define VIDOUT_CON 0x000
> +#define VIDOUT_CON_F_I80_LDI0 (0x2 << 8)
> +
> +/* I80 interface control for main LDI register */
> +#define I80IFCONFAx(x) (0x1B0 + (x) * 4)
> +#define I80IFCONFBx(x) (0x1B8 + (x) * 4)
> +#define LCD_CS_SETUP(x)((x) << 16)
> +#define LCD_WR_SETUP(x)((x) << 12)
> +#define LCD_WR_ACTIVE(x) ((x) << 8)
> +#define LCD_WR_HOLD(x) ((x) << 4)
> +#define I80IFEN_ENABLE (1 << 0)
> +
> /* FIMD has totally five hardware windows. */
> #define WINDOWS_NR 5
>
> @@ -68,10 +88,14 @@
>
> struct fimd_driver_data {
> unsigned int timing_base;
> + unsigned int lcdblk_offset;
> + unsigned int lcdblk_vt_shift;
> + unsigned int lcdblk_bypass_shift;
>
> unsigned int has_shadowcon:1;
> unsigned int has_clksel:1;
> unsigned int has_limited_fmt:1;
> + unsigned int has_vidoutcon:1;
> };
>
> static struct fimd_driver_data s3c64xx_fimd_driver_data = {
> @@ -82,12 +106,19 @@ static struct fimd_driver_data s3c64xx_fimd_driver_data
> = {
>
> static struct fimd_driver_data exynos4_fimd_driver_data = {
> .timing_base = 0x0,
> + .lcdblk_offset = 0x210,
> + .lcdblk_vt_shift = 10,
> + .lcdblk_bypass_shift = 1,
> .has_shadowcon = 1,
> };
>
> static struct fimd_driver_data exynos5_fimd_driver_data = {
> .timing_base = 0x2,
> + .lcdblk_offset = 0x214,
> + .lcdblk_vt_shift = 24,
> + .lcdblk_bypass_shift = 15,
> .has_shadowcon = 1,
> + .has_vidoutcon = 1,
> };
>
> struct fimd_win_data {
> @@ -112,15 +143,22 @@ struct fimd_context {
> struct clk *bus_clk;
> struct clk *lcd_clk;
> void __iomem*regs;
> + struct regmap *sysreg;
> struct drm_display_mode mode;
> struct fimd_win_datawin_data[WINDOWS_NR];
> unsigned intdefault_win;
> unsigned long irq_flags;
> + u32 vidcon0;
> u32 vidcon1;
> + u32 vidout_con;
> + u32 i80ifcon;
> + booli80_if;
> boolsuspended;
> int pipe;
> wait_queue_head_t wait_vsync_queue;
> atomic_twait_vsync_event;
> + atomic_twin_updated;
> + atomic_ttriggering;
>
> struct exynos_drm_panel_info panel;
> struct fimd_driver_data *driv
[PATCH] exynos: Put a stop to the userptr heresy.
2014-07-08 22:37 GMT+09:00 Daniel Vetter : > On Wed, Jul 02, 2014 at 11:25:19AM -0400, Jerome Glisse wrote: >> Anyway as this is upstream i guess you can keep it. This is just an horrible >> API that allow to circumvant any limit set by memcg for page locking and all. >> But anyway GPU driver never played in the same ballpark as other driver. > > I agree that exynos userptr as-is should be removed since as opposed to > the i915 implementation it doesn't play nice with the core mm Can you give me more details why you think so? > and allos > unpriviledged userspace to exceed all mlock limits. we can make the userptr ioctl to have master permission for the meantime. Thanks, Inki Dae > > I've taken considerable amounts of internal heat for rejecting i915 > userptr until the mmu notifier stuff was implemented and so really want > exynos to fix this up asap. > > Dave? > > Thanks, Daniel > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v5 06/14] drm/exynos: fimd: support LCD I80 interface
To support MIPI command mode based I80 interface panel,
FIMD should do followings:
- Sets LCD I80 interface timings configuration.
- Uses "lcd_sys" as an IRQ resource and sets relevant IRQ configuration.
- Sets LCD block configuration for I80 interface.
- Sets ideal(pixel) clock is 2 times faster than the original one
to generate frame done IRQ prior to the next TE signal.
- Implements trigger feature that transfers image data if there is page
flip request, and implements TE handler to call trigger function.
Signed-off-by: YoungJun Cho
Acked-by: Inki Dae
Acked-by: Kyungmin Park
---
drivers/gpu/drm/exynos/Kconfig | 1 +
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 276 ++-
include/video/samsung_fimd.h | 3 +-
3 files changed, 235 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 178d2a9..9ba1aae 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -28,6 +28,7 @@ config DRM_EXYNOS_FIMD
bool "Exynos DRM FIMD"
depends on DRM_EXYNOS && !FB_S3C
select FB_MODE_HELPERS
+ select MFD_SYSCON
help
Choose this option if you want to use Exynos FIMD for DRM.
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 33161ad..28a3168 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -20,6 +20,8 @@
#include
#include
#include
+#include
+#include
#include
#include
@@ -61,6 +63,24 @@
/* color key value register for hardware window 1 ~ 4. */
#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
+/* I80 / RGB trigger control register */
+#define TRIGCON0x1A4
+#define TRGMODE_I80_RGB_ENABLE_I80 (1 << 0)
+#define SWTRGCMD_I80_RGB_ENABLE(1 << 1)
+
+/* display mode change control register except exynos4 */
+#define VIDOUT_CON 0x000
+#define VIDOUT_CON_F_I80_LDI0 (0x2 << 8)
+
+/* I80 interface control for main LDI register */
+#define I80IFCONFAx(x) (0x1B0 + (x) * 4)
+#define I80IFCONFBx(x) (0x1B8 + (x) * 4)
+#define LCD_CS_SETUP(x)((x) << 16)
+#define LCD_WR_SETUP(x)((x) << 12)
+#define LCD_WR_ACTIVE(x) ((x) << 8)
+#define LCD_WR_HOLD(x) ((x) << 4)
+#define I80IFEN_ENABLE (1 << 0)
+
/* FIMD has totally five hardware windows. */
#define WINDOWS_NR 5
@@ -68,10 +88,14 @@
struct fimd_driver_data {
unsigned int timing_base;
+ unsigned int lcdblk_offset;
+ unsigned int lcdblk_vt_shift;
+ unsigned int lcdblk_bypass_shift;
unsigned int has_shadowcon:1;
unsigned int has_clksel:1;
unsigned int has_limited_fmt:1;
+ unsigned int has_vidoutcon:1;
};
static struct fimd_driver_data s3c64xx_fimd_driver_data = {
@@ -82,12 +106,19 @@ static struct fimd_driver_data s3c64xx_fimd_driver_data = {
static struct fimd_driver_data exynos4_fimd_driver_data = {
.timing_base = 0x0,
+ .lcdblk_offset = 0x210,
+ .lcdblk_vt_shift = 10,
+ .lcdblk_bypass_shift = 1,
.has_shadowcon = 1,
};
static struct fimd_driver_data exynos5_fimd_driver_data = {
.timing_base = 0x2,
+ .lcdblk_offset = 0x214,
+ .lcdblk_vt_shift = 24,
+ .lcdblk_bypass_shift = 15,
.has_shadowcon = 1,
+ .has_vidoutcon = 1,
};
struct fimd_win_data {
@@ -112,15 +143,22 @@ struct fimd_context {
struct clk *bus_clk;
struct clk *lcd_clk;
void __iomem*regs;
+ struct regmap *sysreg;
struct drm_display_mode mode;
struct fimd_win_datawin_data[WINDOWS_NR];
unsigned intdefault_win;
unsigned long irq_flags;
+ u32 vidcon0;
u32 vidcon1;
+ u32 vidout_con;
+ u32 i80ifcon;
+ booli80_if;
boolsuspended;
int pipe;
wait_queue_head_t wait_vsync_queue;
atomic_twait_vsync_event;
+ atomic_twin_updated;
+ atomic_ttriggering;
struct exynos_drm_panel_info panel;
struct fimd_driver_data *driver_data;
@@ -243,6 +281,14 @@ static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
unsigned long ideal_clk = mode->htotal * mode->vtotal * mode->vrefresh;
u32 clkdiv;
+ if (ctx->i80_if) {
+ /*
+* The frame done interrupt should be occur
[Bug 65963] screen goes blank, Linux hangs - Radeon 7870, Gallium, Glamor
https://bugs.freedesktop.org/show_bug.cgi?id=65963 --- Comment #9 from Michel D?nzer --- (In reply to comment #6) > Not an LLVM issue, just hung with a downgraded LLVM 3.4. Note that it's not really supported for the radeonsi driver to run against a version of LLVM older than the one it was built against. It might be good to confirm that old Mesa with LLVM 3.4.2 isn't affected by the problem. > So the problem has to be in mesa. I will now try to find the latest working > version of mesa. Starting from 10.1.4 for now. Thanks, but FWIW, the most helpful thing you could do would be to bisect the problem from upstream Mesa Git. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/355131cc/attachment.html>
[Bug 65963] screen goes blank, Linux hangs - Radeon 7870, Gallium, Glamor
https://bugs.freedesktop.org/show_bug.cgi?id=65963 --- Comment #10 from Damian Nowak --- I will bisect once I have the earliest version of mesa that causes the problem. By the way, 10.1.4 is proved working, and I'll be trying out so 10.2.x version in the next days. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/919f50f0/attachment.html>
[Bug 65963] screen goes blank, Linux hangs - Radeon 7870, Gallium, Glamor
https://bugs.freedesktop.org/show_bug.cgi?id=65963 --- Comment #11 from Damian Nowak --- s/so// -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/f0c376cf/attachment.html>
[Bug 80878] [r600g][regression] Metro: Last Light freezes when trying to kill stealthily
https://bugs.freedesktop.org/show_bug.cgi?id=80878 --- Comment #4 from Michel D?nzer --- (In reply to comment #3) > I managed to build x86_64 mesa, but it broke steam and Metro:LL which are > 32-bit apps. Weird, the 64 bit binaries normally shouldn't have any effect on 32 bit apps. What's the breakage? > Is there any guide for building i386 mesa? I get the following error: > > /usr/bin/ld: cannot find -ldrm_intel > [...] Looks like the lib*.so symlinks are missing for the 32 bit libraries (located probably in /usr/lib/i386-linux-gnu/). If you can't install the corresponding 32 bit development packages, you can create the symlinks manually. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/4809c00b/attachment.html>
[PATCH V4 00/10] drm: exynos: few patches to enhance bridge chip support
Hi Daniel, Thierry and Rob, Currently, the following boards are working fine with the bridge chip series: - snow - spring - peach_pit - peach_pi And, I did change my original patchset based on your comments here: (1) [RFC V2 0/3] drm/bridge: panel and chaining http://www.spinics.net/lists/linux-samsung-soc/msg30160.html (2) [RFC V3 0/3] drm/bridge: panel and chaining http://www.spinics.net/lists/linux-samsung-soc/msg30507.html If you think this is not the right way of doing it, please come forward with more suggestions, or kindly ACK it. I am just wondering how long can I keep waiting for comments? Regards, Ajay
[PATCH V3 1/7] drm/exynos: Support DP CLKCON register in FIMD driver
ping
On Mon, Jun 30, 2014 at 9:39 PM, Inki Dae wrote:
> 2014-06-30 14:31 GMT+09:00 Andrzej Hajda :
>> On 06/30/2014 03:14 AM, Jingoo Han wrote:
>>> On Friday, June 27, 2014 10:03 PM, Ajay kumar wrote:
On Fri, Jun 27, 2014 at 6:14 PM, Andrzej Hajda
wrote:
> On 06/27/2014 01:48 PM, Ajay kumar wrote:
>> On Fri, Jun 27, 2014 at 4:52 PM, Andrzej Hajda
>> wrote:
>>> +CC DT
>>>
>>> On 06/27/2014 12:12 PM, Ajay Kumar wrote:
Add the missing setting for DP CLKCON register.
This register is present on Exynos5 based FIMD controllers,
and needs to be set if we are using DP.
Signed-off-by: Ajay Kumar
---
.../devicetree/bindings/video/samsung-fimd.txt |1 +
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 23
include/video/samsung_fimd.h |4
3 files changed, 28 insertions(+)
>>> [.]
>>>
static const struct of_device_id fimd_driver_dt_match[] = {
@@ -331,6 +341,10 @@ static void fimd_commit(struct exynos_drm_manager
*mgr)
if (clkdiv > 1)
val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
+ if (ctx->driver_data->has_dp_clkcon &&
+ ctx->exynos_fimd_output_type == EXYNOS_FIMD_OUTPUT_DP)
+ writel(DP_CLK_ENABLE, ctx->regs + DP_CLKCON);
+
writel(val, ctx->regs + VIDCON0);
> New code should not split VIDCON0 related code.It should be moved few
> lines above or few lines below.
Ok, for better readability.
> Anyway this code should be rather placed in power related functions of
> dp encoder, as it enables dp. The only question
> is if DP_CLKCON update can be performed after VIDCON0 update. If yes the
> solution of the whole problem
I will check this.
> seems to be simple:
> - fimd should provide function fimd_set_dp_clk_gate or sth similar,
> - this function should be called in exynos_dp_poweron/exynos_dp_poweroff.
> I hope I have not missed anything this time.
But, it won't look good to export a FIMD function which sets a FIMD
register,
and call it in DP driver!
What does Inki/Jingoo have to say about this?
>>> I agree with Ajay Kumar's opinion.
>>> It doesn't look good to export the function to set FIMD register
>>> and call it by DP driver.
>>
>> DP_CLKCON HW register shows clearly there is direct hardware dependency
>> between DP and FIMD.
>> Reflecting this dependency in drivers is just a consequence of HW design.
>
> Right, and I cannot understand why mDNIe and DP clock enable bit
> exists in FIMD ip. :(
>
>> Moreover the register gates also clock for MDNIE, this solution can be
>> used there as well.
>>
>> Anyway the most important is that we should avoid adding DT bindings for
>> things we can evaluate in drivers.
>>
>
> It wouldn't be best way only to avoid adding DT binding. DT binding
> could be good way to handle complicated hardware pipelines if needed.
> Of course, if driver can handle it simply, it would be better to avoid
> adding DT binding. However, Exynos SoC are complicated.
>
> Exynos SoC have more IPs to should be considered; SMIES, mDNIe and MIE
> as image enhancement devices, and eDP, MIPI-DSI, and DPI (FIMD
> connected to panel directly) as Display bus devices and parallel panel
> device. And image enhancement device and Display bus device can be
> used together.
>
> FIMD Panel
> FIMD Display bus device Panel
> FIMD image enhancement device Panel
> FIMD image enhancement device FIMD-Lite Panel
> FIMD image enhancement device Display bus device
> Panel
> FIMD image enhancement device FIMD-Lite
> Display bus device Panel
>
> And Display bus devices and parallel device couldn't be switched in
> runtime since kernel has been booted. However, image enhancement
> devices can be enabled or disabled in runtime so the output path of
> FIMD can be changed to another path dynamically - actually, I had
> handled such scenarios. So if Exynos drm driver should be considered
> for above all cases, it'd make Eyxnos drm driver too complicated.
>
> If DT people and other SoC maintainers give us your opinions, it would
> be helpful for us. I will look into other SoC how they are handling
> similar cases.
>
> Thanks,
> Inki Dae
>
>> Regards
>> Andrzej
>>
>>>
>>> Best regards,
>>> Jingoo Han
Regards,
Ajay
>>> []
>>>
>>>
>>
>> ___
>> dri-devel mailing list
>> dri-devel at lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 80419] XCOM: Enemy Unknown Causes lockup
https://bugs.freedesktop.org/show_bug.cgi?id=80419 --- Comment #37 from Michel D?nzer --- (In reply to comment #36) > I have put the file here http://dl.free.fr/htMkkwBOy That runs into what looks like bug 80673 to me. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/15ace0cf/attachment.html>
[PATCH] modesetting: Support native primary plane rotation
With the advent of universal drm planes and the introduction of generic
plane properties for rotations, we can query and program the hardware
for native rotation support.
NOTE: this depends upon the next release of libdrm to remove some
opencoded defines.
Signed-off-by: Chris Wilson
---
configure.ac | 2 +-
src/drmmode_display.c | 223 +++---
src/drmmode_display.h | 7 +-
3 files changed, 199 insertions(+), 33 deletions(-)
diff --git a/configure.ac b/configure.ac
index 1c1a36d..0b4e857 100644
--- a/configure.ac
+++ b/configure.ac
@@ -74,7 +74,7 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test "$HAVE_XEXTPROTO_71"
= "yes" ])
# Checks for header files.
AC_HEADER_STDC
-PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46])
+PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.54]) #.55 required for universal planes
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10])
AM_CONDITIONAL(DRM, test "x$DRM" = xyes)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index c533324..aaeda39 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -56,6 +56,11 @@
#include "driver.h"
+#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
+#define DRM_PLANE_TYPE_OVERLAY 0
+#define DRM_PLANE_TYPE_PRIMARY 1
+#define DRM_PLANE_TYPE_CURSOR 2
+
static struct dumb_bo *dumb_bo_create(int fd,
const unsigned width, const unsigned height,
const unsigned bpp)
@@ -300,6 +305,136 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
#endif
+static unsigned
+rotation_index(unsigned rotation)
+{
+#if _SVID_SOURCE || _BSD_SOURCE || _POSIX_C_SOURCE >= 200809L || _XOPEN_SOURCE
>= 700
+ return ffs(rotation) - 1;
+#else
+ int i;
+
+ for (i = 0; i < 32; i++) {
+ if ((1 << i) == rotation)
+ break;
+ }
+
+ return i;
+#endif
+}
+
+static void
+rotation_init(xf86CrtcPtr crtc)
+{
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+ drmModePlaneRes *plane_resources;
+ int i, j, k;
+
+ drmSetClientCap(drmmode->fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1);
+
+ plane_resources = drmModeGetPlaneResources(drmmode->fd);
+ if (plane_resources == NULL)
+ return;
+
+ for (i = 0; i < plane_resources->count_planes; i++) {
+ drmModePlane *drm_plane;
+ drmModeObjectPropertiesPtr proplist;
+ int type = -1;
+
+ drm_plane = drmModeGetPlane(drmmode->fd,
+ plane_resources->planes[i]);
+ if (drm_plane == NULL)
+ continue;
+
+ if (!(drm_plane->possible_crtcs & (1 << drmmode_crtc->index)))
+ goto free_plane;
+
+ proplist = drmModeObjectGetProperties(drmmode->fd,
+ drm_plane->plane_id,
+ DRM_MODE_OBJECT_PLANE);
+ if (proplist == NULL)
+ goto free_plane;
+
+ for (j = 0; type == -1 && j < proplist->count_props; j++) {
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+ if (strcmp(prop->name, "type") == 0)
+ type = proplist->prop_values[j];
+
+ drmModeFreeProperty(prop);
+ }
+
+ if (type == DRM_PLANE_TYPE_PRIMARY) {
+ drmmode_crtc->primary_plane_id = drm_plane->plane_id;
+
+ for (j = 0; drmmode_crtc->rotation_prop_id == 0 && j <
proplist->count_props; j++) {
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+ if (strcmp(prop->name, "rotation") == 0) {
+ drmmode_crtc->rotation_prop_id =
proplist->props[j];
+ drmmode_crtc->current_rotation =
proplist->prop_values[j];
+ for (k = 0; k < prop->count_enums; k++)
{
+ int rr = -1;
+ if (strcmp(prop->enums[k].name,
"rotate-0") == 0)
+ rr = RR_Rotate_0;
+ else if
(strcmp(prop->enums[k].name, "rotate-90") == 0)
+ rr = RR_Rotate_90;
+ else if
(strcmp(prop->enums[k].name, "rotate-180") == 0)
+
[RESEND PATCH v3 05/11] drm: add Atmel HLCDC Display Controller support
Hi Matt, On Tue, 8 Jul 2014 16:51:24 -0700 Matt Roper wrote: > Hi Boris. > > I haven't really looked at any of your driver in depth, but from a quick > glance it looks like you're registering a cursor drm_plane (i.e., making > use of the new universal plane infrastructure), but you're also > providing an implementation of the legacy cursor ioctls (cursor_set and > cursor_move). There's some patches working their way through the > pipeline that should make this unnecessary and hopefully simplify your > life a bit: > > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=c394c2b08e247c32ef292b75fd8b34312465f8ae > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=b36552b32aa9c69e83a3a20bda56379fb9e52435 > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=161d0dc1dccb17ff7a38f462c7c0d4ef8bcc5662 > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=fc1d3e44ef7c1db93384150fdbf8948dcf949f15 > > The third patch there is the one that's really important for your work. > When a driver provides a cursor plane via the universal plane interface, > cursor_set and cursor_move are automatically implemented for you by > drm_mode_cursor_universal() in drivers/gpu/drm/drm_crtc.c and your > legacy handlers will never get called. drm_mode_cursor_universal() will > take care of wrapping the bo's into a drm_framebuffer for you. > > When I added the universal cursor stuff, I wanted to make sure that as > soon as a driver starts supporting universal planes it can stop > supporting the legacy ioctls directly; otherwise handling refcounting > when userspace switches back and forth between calling legacy ioctl's > and calling setplane() on a cursor plane would be a nightmare. > > I think those patches are only available in drm-intel-nightly at the > moment and haven't moved on to drm-next and such yet, since i915 is the > only driver that currently has patches to make use of cursors via the > univeral plane interface (probably landing for kernel 3.17). That's great news. I knew there were some work in progress on this topic, but didn't know it was planned for 3.17. I'll move to this solution. Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
[PATCH] modesetting: Support native primary plane rotation
On Wed, Jul 09, 2014 at 10:44:17AM +0300, Pekka Paalanen wrote: > On Wed, 9 Jul 2014 08:00:21 +0100 > Chris Wilson wrote: > > > With the advent of universal drm planes and the introduction of generic > > plane properties for rotations, we can query and program the hardware > > for native rotation support. > > > > NOTE: this depends upon the next release of libdrm to remove some > > opencoded defines. > > > > Signed-off-by: Chris Wilson > > --- > > configure.ac | 2 +- > > src/drmmode_display.c | 223 > > +++--- > > src/drmmode_display.h | 7 +- > > 3 files changed, 199 insertions(+), 33 deletions(-) > > > > diff --git a/configure.ac b/configure.ac > > index 1c1a36d..0b4e857 100644 > > --- a/configure.ac > > +++ b/configure.ac > > @@ -74,7 +74,7 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test > > "$HAVE_XEXTPROTO_71" = "yes" ]) > > # Checks for header files. > > AC_HEADER_STDC > > > > -PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46]) > > +PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.54]) #.55 required for universal > > planes > > PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10]) > > AM_CONDITIONAL(DRM, test "x$DRM" = xyes) > > > > diff --git a/src/drmmode_display.c b/src/drmmode_display.c > > index c533324..aaeda39 100644 > > --- a/src/drmmode_display.c > > +++ b/src/drmmode_display.c > > @@ -56,6 +56,11 @@ > > > > #include "driver.h" > > > > +#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 > > +#define DRM_PLANE_TYPE_OVERLAY 0 > > +#define DRM_PLANE_TYPE_PRIMARY 1 > > +#define DRM_PLANE_TYPE_CURSOR 2 > > Hi, > > is this really something that is guaranteed to be kernel ABI stable? > > I mean, the 'type' property is an enum. I have never seen the enum > (numerical) values being defined in any public ABI header. Instead, > the property system has a mechanism for listing the enum values by > name string. > > I have assumed that the name string is what is guaranteed ABI, and > the numerical value is just an arbitrary handle. When I added > universal planes support to Weston (not merged yet), I look up the > numerical value by the name, instead of hardcoding the numerical > value. > > Should you do the same here, or are the numerical values really > (going to be) part of the ABI? Oops, I was trying to keep it generic and only use enum names and overlooked that the plane type was an enum. -Chris -- Chris Wilson, Intel Open Source Technology Centre
[RESEND PATCH v3 05/11] drm: add Atmel HLCDC Display Controller support
On Mon, 7 Jul 2014 23:45:54 -0400
Rob Clark wrote:
> On Mon, Jul 7, 2014 at 12:42 PM, Boris BREZILLON
> wrote:
> > The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
> > at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
> > controller device.
> >
> > This display controller supports at least one primary plane and might
> > provide several overlays and an hardware cursor depending on the IP
> > version.
> >
> > At the moment, this driver only implements an RGB connector to interface
> > with LCD panels, but support for other kind of external devices (like DRM
> > bridges) might be added later.
> >
> > Signed-off-by: Boris BREZILLON
> > ---
> > drivers/gpu/drm/Kconfig | 2 +
> > drivers/gpu/drm/Makefile| 1 +
> > drivers/gpu/drm/atmel-hlcdc/Kconfig | 11 +
> > drivers/gpu/drm/atmel-hlcdc/Makefile| 7 +
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 469 +++
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c| 474 +++
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h| 210 +++
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c | 706
> > +++
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.h | 422 ++
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_panel.c | 351
> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 729
> >
> > 11 files changed, 3382 insertions(+)
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/Kconfig
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/Makefile
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.h
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_panel.c
> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> >
> > diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> > index d1cc2f6..df6f0c1 100644
> > --- a/drivers/gpu/drm/Kconfig
> > +++ b/drivers/gpu/drm/Kconfig
> > @@ -182,6 +182,8 @@ source "drivers/gpu/drm/cirrus/Kconfig"
> >
[...]
> > +/**
> > + * Atmel HLCDC Layer GEM flip garbage collector structure
> > + *
> > + * This structure is used to schedule GEM object release when we are in
> > + * interrupt context (within atmel_hlcdc_layer_irq function).
> > + *
> > + *@list: GEM flip objects to release
> > + *@list_lock: lock to access the GEM flip list
> > + *@work: work queue scheduled when there are GEM flip to collect
> > + *@finished: action to execute the GEM flip and all attached objects have
> > been
> > + * released
> > + *@finished_data: data passed to the finished callback
> > + *@finished_lock: lock to access finished related fields
> > + */
> > +struct atmel_hlcdc_layer_gem_flip_gc {
> > + struct list_head list;
> > + spinlock_t list_lock;
> > + struct work_struct work;
> > +};
>
>
> Please have a look at drm_flip_work.. I think that should simplify
> post-flip cleanup for you..
>
Now I remember why I didn't make use of drm_flip_work helpers:
I have to specify a fifo size when initializing the
drm_flip_work structure (drm_flip_work_init) and I don't know exactly
what I should choose here.
You might have noticed that I'm queuing the unref work to be done within
the irq handler (which means I'm in irq context), and, AFAIU,
drm_flip_work_queue will execute the function if the FIFO is full
(AFAIK calling drm_framebuffer_unreference in irq context is not safe).
This leaves the following solutions if I ever want to use drm_flip_work:
- use a threaded irq. Meaning the next frame (or the pending plane
update) might take a bit longer to be displayed.
- increase the fifo size, so that it's never entirely filled (relying
on the assumption that the flip work queue will be executed at least
as much as the plane update requests)
- rely on the assumption that work_queue will be executed at least
once per fb flip. This is true for the primary plane because we're
using page_flip and only one page_flip can take place at a given
time, but AFAIK this is not true for plane updates.
My approach is to use a simple list instead of a kfifo to queue fb
flip unref work, this way I don't have to bother about whether the fifo
is full or not.
ITOH, this means I might keep fb references longer than I would when
using drm_flip_work, and potentially get out of resources if plane
updates occurs more often than my unref work queue is called.
Please, let me know what's the preferred solution here.
Best Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[PATCH] modesetting: Support native primary plane rotation
With the advent of universal drm planes and the introduction of generic
plane properties for rotations, we can query and program the hardware
for native rotation support.
NOTE: this depends upon the next release of libdrm to remove one
opencoded define.
v2: Use enum to determine primary plane, suggested by Pekka Paalanen.
Use libobj for replacement ffs(), suggested by walter harms
Signed-off-by: Chris Wilson
Cc: Pekka Paalanen
Cc: walter harms
---
configure.ac | 5 +-
libobj/ffs.c | 14
src/drmmode_display.c | 216 ++
src/drmmode_display.h | 10 ++-
4 files changed, 212 insertions(+), 33 deletions(-)
create mode 100644 libobj/ffs.c
diff --git a/configure.ac b/configure.ac
index 1c1a36d..1694465 100644
--- a/configure.ac
+++ b/configure.ac
@@ -74,10 +74,13 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test
"$HAVE_XEXTPROTO_71" = "yes" ])
# Checks for header files.
AC_HEADER_STDC
-PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46])
+PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.47])
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10])
AM_CONDITIONAL(DRM, test "x$DRM" = xyes)
+AC_CONFIG_LIBOBJ_DIR(libobj)
+AC_REPLACE_FUNCS(ffs)
+
PKG_CHECK_MODULES(UDEV, [libudev], [udev=yes], [udev=no])
if test x"$udev" = xyes; then
AC_DEFINE(HAVE_UDEV,1,[Enable udev-based monitor hotplug detection])
diff --git a/libobj/ffs.c b/libobj/ffs.c
new file mode 100644
index 000..2d44dcc
--- /dev/null
+++ b/libobj/ffs.c
@@ -0,0 +1,14 @@
+extern int ffs(unsigned int value);
+
+int ffs(unsigned int value)
+{
+ int bit;
+
+ if (value == 0)
+ return 0;
+
+ bit = 0;
+ while ((value & (1 << bit++)) == 0)
+ ;
+ return bit;
+}
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index c533324..e854502 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -56,6 +56,8 @@
#include "driver.h"
+#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 /* from libdrm 2.4.55 */
+
static struct dumb_bo *dumb_bo_create(int fd,
const unsigned width, const unsigned height,
const unsigned bpp)
@@ -300,6 +302,132 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
#endif
+static unsigned
+rotation_index(unsigned rotation)
+{
+ return ffs(rotation) - 1;
+}
+
+static void
+rotation_init(xf86CrtcPtr crtc)
+{
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+ drmModePlaneRes *plane_resources;
+ int i, j, k;
+
+ drmSetClientCap(drmmode->fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1);
+
+ plane_resources = drmModeGetPlaneResources(drmmode->fd);
+ if (plane_resources == NULL)
+ return;
+
+ for (i = 0; drmmode_crtc->primary_plane_id == 0 && i <
plane_resources->count_planes; i++) {
+ drmModePlane *drm_plane;
+ drmModeObjectPropertiesPtr proplist;
+ int is_primary = -1;
+
+ drm_plane = drmModeGetPlane(drmmode->fd,
+ plane_resources->planes[i]);
+ if (drm_plane == NULL)
+ continue;
+
+ if (!(drm_plane->possible_crtcs & (1 << drmmode_crtc->index)))
+ goto free_plane;
+
+ proplist = drmModeObjectGetProperties(drmmode->fd,
+ drm_plane->plane_id,
+ DRM_MODE_OBJECT_PLANE);
+ if (proplist == NULL)
+ goto free_plane;
+
+ for (j = 0; is_primary == -1 && j < proplist->count_props; j++)
{
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+ if (strcmp(prop->name, "type") == 0) {
+ for (k = 0; k < prop->count_enums; k++) {
+ if (prop->enums[k].value !=
proplist->prop_values[j])
+ continue;
+
+ is_primary =
strcmp(prop->enums[k].name, "Primary") == 0;
+ break;
+ }
+ }
+
+ drmModeFreeProperty(prop);
+ }
+
+ if (is_primary) {
+ drmmode_crtc->primary_plane_id = drm_plane->plane_id;
+
+ for (j = 0; drmmode_crtc->rotation_prop_id == 0 && j <
proplist->count_props; j++) {
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+
[Bug 81045] [r600] Unreal Engine 4 demo crashed kernel
https://bugs.freedesktop.org/show_bug.cgi?id=81045 --- Comment #1 from Thomas Rohloff --- I tried the Effects Cave Demo on a Radeon HD 6950: After it loaded the sound played but the screen was going into standby and the system wasn't even reacting to MagSysRq keys. Would love to give logs but they where wiped with the system reset. OpenGL renderer string: Gallium 0.4 on AMD CAYMAN OpenGL core profile version string: 3.3 (Core Profile) Mesa 10.3.0-devel (git-3c77d2a) Kernel 3.15.3 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/0dc335e5/attachment.html>
[PULL] drm-intel-fixes
Hi Dave, Fixes for regressions and black screens, cc: stable where applicapable (the last minute rebase was to sprinkle missing stable tags). A bit more than what I'd wish for, but excluding vlv and that the first 3 patches are just quirks for 1 regression it looks much better. There's still a "oops, lost dithering" issue on older platforms open. I'm working on a fix for that now but didn't want to delay this pile. Cheers, Daniel The following changes since commit dfd7aecfd6d227831d77719379d4c7137f444fee: Merge tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-intel (2014-07-06 07:49:59 +1000) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/drm-intel-fixes-2014-07-09 for you to fetch changes up to 01527b3127997ef6370d5ad4fa25d96847fbf12a: drm/i915/vlv: T12 eDP panel timing enforcement during reboot (2014-07-09 09:52:14 +0200) Clint Taylor (1): drm/i915/vlv: T12 eDP panel timing enforcement during reboot Daniel Vetter (1): drm/i915: Only unbind vgacon, not other console drivers Scot Doyle (3): drm/i915: quirk asserts controllable backlight presence, overriding VBT drm/i915: Acer C720 and C720P have controllable backlights drm/i915: Toshiba CB35 has a controllable backlight Shobhit Kumar (2): drm/i915/vlv: DPI FIFO empty check is not needed drm/i915/vlv: Update the DSI ULPS entry/exit sequence Ville Syrj?l? (1): drm/i915: Don't clobber the GTT when it's within stolen memory drivers/gpu/drm/i915/i915_dma.c| 5 ++-- drivers/gpu/drm/i915/i915_drv.h| 1 + drivers/gpu/drm/i915/i915_gem_stolen.c | 44 ++ drivers/gpu/drm/i915/i915_reg.h| 3 +++ drivers/gpu/drm/i915/intel_display.c | 14 +++ drivers/gpu/drm/i915/intel_dp.c| 42 drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_dsi.c | 29 +++--- drivers/gpu/drm/i915/intel_dsi_cmd.c | 6 - drivers/gpu/drm/i915/intel_panel.c | 8 +-- 10 files changed, 130 insertions(+), 24 deletions(-) -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
[Bug 81045] [r600] Unreal Engine 4 demo crashed kernel
https://bugs.freedesktop.org/show_bug.cgi?id=81045 --- Comment #2 from Thomas Rohloff --- Now I tried Mobile Temple Demo, too, which played no sound and showed vertical blue lines (garbage I guess) only till the watchdog kicked in. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/2dc0b1f7/attachment.html>
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #21 from Michel D?nzer --- Created attachment 102470 --> https://bugs.freedesktop.org/attachment.cgi?id=102470&action=edit radeonsi: Handle sampler depth compare mode This Mesa patch seems to fix the apitrace for me. Can you confirm? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/9fa6f0e5/attachment-0001.html>
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #22 from Michel D?nzer --- Note that this patch is radeonsi specific, I'm afraid the same approach is not possible with r600g. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/dca9a1c3/attachment.html>
[PATCH] exynos: Put a stop to the userptr heresy.
On Tue, Jul 8, 2014 at 6:20 PM, Inki Dae wrote: > 2014-07-08 22:37 GMT+09:00 Daniel Vetter : >> On Wed, Jul 02, 2014 at 11:25:19AM -0400, Jerome Glisse wrote: >>> Anyway as this is upstream i guess you can keep it. This is just an horrible >>> API that allow to circumvant any limit set by memcg for page locking and >>> all. >>> But anyway GPU driver never played in the same ballpark as other driver. >> >> I agree that exynos userptr as-is should be removed since as opposed to >> the i915 implementation it doesn't play nice with the core mm > > Can you give me more details why you think so? >From a very quick look there's two pieces: - The implementation with the vma tricks looks _really_ scary. You'd need to have Al Viro's opinion on it though. - If I'm reading the code correctly userspace can pin unlimted amounts of memory, but I've gotten a bit lost in the code. In i915 we have shrinkers and mmu notifier to make sure that if the vm needs this memory again we'll make it available. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
[PATCH RFC 06/15] drm/armada: move variant initialisation to CRTC init
On Sun, Jul 06, 2014 at 11:46:56AM +0200, Sebastian Hesselbarth wrote: > On 07/05/2014 02:21 PM, Russell King - ARM Linux wrote: > > There's also the issue whether the output can cope with fractional > > clock-skipping dividers - entirely synchronous display systems can > > (such as synchronously clocked LCD panels), but asynchronous display > > systems (such as HDMI, TV out, etc) can't. That said, the other > > parameter that needs to be taken account of here is that even with the > > fractional divider, the minimum output clock period isn't the average > > frequency, but the maximum frequency, which may violate a panel's minimum > > clock period specification. > > Yeah, the fractional divider isn't made for external HDMI transmitters > for sure. I have seen from your branch that there is some Armada 610 > stub for OLPC, do they have a dumb panel directly connected? I believe they do have a dumb panel connected directly. I've asked Jon what the status of OLPC is with mainline kernels, and how difficult it would be to get to the stage where the 610 stuff could be finished off. -- FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly improving, and getting towards what was expected from it.
[PATCH] modesetting: Support native primary plane rotation
On Wed, Jul 09, 2014 at 12:57:12PM +0300, Pekka Paalanen wrote:
> On Wed, 9 Jul 2014 09:19:08 +0100
> Chris Wilson wrote:
>
> > With the advent of universal drm planes and the introduction of generic
> > plane properties for rotations, we can query and program the hardware
> > for native rotation support.
> >
> > NOTE: this depends upon the next release of libdrm to remove one
> > opencoded define.
> >
> > v2: Use enum to determine primary plane, suggested by Pekka Paalanen.
> > Use libobj for replacement ffs(), suggested by walter harms
> >
> > Signed-off-by: Chris Wilson
> > Cc: Pekka Paalanen
> > Cc: walter harms
>
> My concerns have been addressed. On a second read, I found another
> suspicious thing below.
>
> > + if (strcmp(prop->name, "rotation") == 0) {
> > + drmmode_crtc->rotation_prop_id =
> > proplist->props[j];
> > + drmmode_crtc->current_rotation =
> > proplist->prop_values[j];
> > + for (k = 0; k < prop->count_enums; k++)
> > {
> > + int rr = -1;
> > + if (strcmp(prop->enums[k].name,
> > "rotate-0") == 0)
> > + rr = RR_Rotate_0;
> > + else if
> > (strcmp(prop->enums[k].name, "rotate-90") == 0)
> > + rr = RR_Rotate_90;
> > + else if
> > (strcmp(prop->enums[k].name, "rotate-180") == 0)
> > + rr = RR_Rotate_180;
> > + else if
> > (strcmp(prop->enums[k].name, "rotate-270") == 0)
> > + rr = RR_Rotate_270;
> > + else if
> > (strcmp(prop->enums[k].name, "reflect-x") == 0)
> > + rr = RR_Reflect_X;
> > + else if
> > (strcmp(prop->enums[k].name, "reflect-y") == 0)
> > + rr = RR_Reflect_Y;
> > + if (rr != -1) {
> > +
> > drmmode_crtc->map_rotations[rotation_index(rr)] = 1 << prop->enums[k].value;
> > +
> > drmmode_crtc->supported_rotations |= rr;
>
> Comparing the above assignments to...
>
> > +static Bool
> > +rotation_set(xf86CrtcPtr crtc, unsigned rotation)
> > +{
> > + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
> > + drmmode_ptr drmmode = drmmode_crtc->drmmode;
> > +
> > + if (drmmode_crtc->current_rotation == rotation)
> > + return TRUE;
> > +
> > + if ((drmmode_crtc->supported_rotations & rotation) == 0)
> > + return FALSE;
> > +
> > + if (drmModeObjectSetProperty(drmmode->fd,
> > +drmmode_crtc->primary_plane_id,
> > +DRM_MODE_OBJECT_PLANE,
> > +drmmode_crtc->rotation_prop_id,
> > +
> > drmmode_crtc->map_rotations[rotation_index(rotation)]))
>
> ...the use here, it does not look like you are passing
> prop->enums[k].value here. It is like you are missing ffs() here or
> having a 1<< too much in the assignment.
It doesn't take the enum.value but 1 << enum.value.
> Btw. would it be possible to do e.g. rotate-90 with reflect?
Indeed. That's an issue from only using the first index...
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #23 from smoki --- (In reply to comment #21) > Created attachment 102470 [details] [review] > radeonsi: Handle sampler depth compare mode > > This Mesa patch seems to fix the apitrace for me. Can you confirm? I can confirm :) i tried this patch and this works fine for me on Kabini (Radeon 8400), 'glretrace -b -S 5670984' produce same image as Catalyst. Cool :). -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/ace73bba/attachment.html>
[GIT PULL] msm drm update for component changes
On Wed, Jul 9, 2014 at 5:34 AM, Russell King wrote: > David, > > Please incorporate the latest msm drm update for component changes, which can > be found at: > > git://ftp.arm.linux.org.uk/~rmk/linux-arm.git component-for-drm > > with SHA1 84448288546d13d7e06fd6638fb78ddff559b399. > > This updates the MSM's DRM driver for the updates merged in Greg's > driver-core tree, converting MSM to use the pre-declared array of > matches rather than walking the device tree each time we try to bind. Hey Russell, do you want me to take this for my v3.17 pull req? I expect there will be some minor conflicts with the DT support I'm working on at the moment. Or does this need to be applied together with the rest of the series? In which case, maybe it should go first, and then I'd rebase msm-next on top. BR, -R > This will update the following files: > > drivers/base/component.c | 192 > ++ > drivers/gpu/drm/msm/msm_drv.c | 83 -- > include/linux/component.h | 7 ++ > 3 files changed, 199 insertions(+), 83 deletions(-) > > through these changes: > > Russell King (5): > component: fix missed cleanup in case of devres failure > component: ignore multiple additions of the same component > component: add support for component match array > component: fix bug with legacy API > drm: msm: update to use component match support > > Many thanks.
[RFC] drm/exynos: abort commit when framebuffer is removed from plane
On 8 July 2014 21:25, Inki Dae wrote: > 2014-06-20 0:13 GMT+09:00 Rahul Sharma : >> This situation arises when userspace remove the frambuffer object >> and call setmode ioctl. >> >> drm_mode_rmfb --> drm_plane_force_disable --> plane->crtc = NULL; >> and >> drm_mode_setcrtc --> exynos_plane_commit --> passes plane->crtc to >> exynos_drm_crtc_plane_commit which is NULL. > > If user process requested drm_mode_rmfb with a fb_id, fb object to the > fb_id must be removed from crtc_idr table. So drm_mode_setcrtc should > be failed because there is no the fb object in the crtc_idr table > anymore. > I cannot understand how exynos_drm_crtc_plane_commit function could be > called. Can you give me more details? Inki, These logs should clarify more about the problem: localhost ~ # halt localhost ~ # [ 130.570309] init: debugd main process (781) killed by TERM signal [ 130.602453] init: lid_touchpad_helper main process (2100) killed by TERM signal [ 131.374955] CPU: 2 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ #623 [ 131.380558] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) [ 131.388327] [] (show_stack) from [] (dump_stack+0x7c/0x98) [ 131.395522] [] (dump_stack) from [] (exynos_drm_crtc_plane_commit+0x20/0x40) [ 131.404263] [] (exynos_drm_crtc_plane_commit) from [] (exynos_plane_commit+0x24/0x28) [ 131.413779] [] (exynos_plane_commit) from [] (exynos_drm_crtc_commit+0x2c/0x54) [ 131.422802] [] (exynos_drm_crtc_commit) from [] (exynos_drm_crtc_mode_set_commit.isra.1+0x8c/0xa0) [ 131.433468] [] (exynos_drm_crtc_mode_set_commit.isra.1) from [] (exynos_drm_crtc_page_flip+0x100/0x174) [ 131.444587] [] (exynos_drm_crtc_page_flip) from [] (drm_mode_page_flip_ioctl+0x1f0/0x2b0) -->> [ 131.454460] [] (drm_mode_page_flip_ioctl) from [] (drm_ioctl+0x270/0x44c) [ 131.462966] [] (drm_ioctl) from [] (do_vfs_ioctl+0x4e4/0x5a0) [ 131.470397] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x5c/0x84) [ 131.477728] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x30) [ 131.762797] CPU: 1 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ #623 [ 131.768378] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) [ 131.776151] [] (show_stack) from [] (dump_stack+0x7c/0x98) [ 131.783315] [] (dump_stack) from [] (drm_plane_force_disable+0x5c/0x68) [ 131.791658] [] (drm_plane_force_disable) from [] (drm_framebuffer_remove+0xe4/0x110) [ 131.801070] [] (drm_framebuffer_remove) from [] (drm_mode_rmfb+0xd4/0xfc) -->> [ 131.809597] [] (drm_mode_rmfb) from [] (drm_ioctl+0x270/0x44c) [ 131.817135] [] (drm_ioctl) from [] (do_vfs_ioctl+0x4e4/0x5a0) [ 131.824609] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x5c/0x84) [ 131.831884] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x30) [ 132.077803] CPU: 0 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ #623 [ 132.083413] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) [ 132.09] [] (show_stack) from [] (dump_stack+0x7c/0x98) [ 132.098343] [] (dump_stack) from [] (exynos_drm_crtc_plane_commit+0x20/0x40) [ 132.107098] [] (exynos_drm_crtc_plane_commit) from [] (exynos_plane_commit+0x24/0x28) [ 132.116631] [] (exynos_plane_commit) from [] (exynos_drm_crtc_commit+0x2c/0x54) [ 132.125660] [] (exynos_drm_crtc_commit) from [] (exynos_drm_crtc_mode_set_commit.isra.1+0x8c/0xa0) [ 132.136330] [] (exynos_drm_crtc_mode_set_commit.isra.1) from [] (exynos_drm_crtc_mode_set_base+0x18/0x1c) [ 132.147605] [] (exynos_drm_crtc_mode_set_base) from [] (drm_crtc_helper_set_config+0x828/0x8a4) [ 132.158029] [] (drm_crtc_helper_set_config) from [] (drm_mode_set_config_internal+0x58/0xc0) [ 132.168155] [] (drm_mode_set_config_internal) from [] (drm_mode_setcrtc+0x388/0x4ac) -->> [ 132.177630] [] (drm_mode_setcrtc) from [] (drm_ioctl+0x270/0x44c) [ 132.185417] [] (drm_ioctl) from [] (do_vfs_ioctl+0x4e4/0x5a0) [ 132.192897] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x5c/0x84) [ 132.200138] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x30) [ 132.207735] Unable to handle kernel NULL pointer dereference at virtual address 032c .. .. [ 132.510786] ff80: b6ebdeb8 bee1d5e8 c06864a2 0036 c000e5a4 ecf0e000 ecf0ffa8 [ 132.518941] ffa0: c000e380 c01130f4 b6ebdeb8 bee1d5e8 0005 c06864a2 bee1d5e8 0001 [ 132.527095] ffc0: b6ebdeb8 bee1d5e8 c06864a2 0036 b85d4a74 b8702a60 bee1d688 [ 132.535250] ffe0: b6a82f30 bee1d5cc b6a75cff b6bce50c 0010 0005 e1a0c00d e92dd800 [ 132.543408] [] (exynos_drm_crtc_plane_commit) from [] (exynos_plane_commit+0x24/0x28) [ 132.552949] [] (exynos_plane_commit) from [] (exynos_drm_crtc_commit+0x2c/0x54) [ 132.561971] [] (exynos_drm_crtc_commit) from [] (exynos_drm_crtc_mode_set_commit.isra.1+0x8c/0xa0) [ 132.572641] [] (exynos_drm_crtc_mode_set_commit.isra.1) from [] (exynos_drm_crtc_mode_set_base+0x18/0x1c) [ 132.583919] [] (exynos_drm_crtc_mode_set_base) from [] (drm_crtc_helper_set_config+0x828/0x8a4) [ 132.594329] [] (drm_crtc_helper_set_config) from [] (drm_mode_set_config_internal+0x58/0xc0) [ 132.604478]
[PATCH] modesetting: Support native primary plane rotation
With the advent of universal drm planes and the introduction of generic
plane properties for rotations, we can query and program the hardware
for native rotation support.
NOTE: this depends upon the next release of libdrm to remove one
opencoded define.
v2: Use enum to determine primary plane, suggested by Pekka Paalanen.
Use libobj for replacement ffs(), suggested by walter harms
v3: Support combinations of rotations and reflections
Eliminate use of ffs() and so remove need for libobj
Signed-off-by: Chris Wilson
Cc: Pekka Paalanen
Cc: walter harms
---
configure.ac | 2 +-
src/drmmode_display.c | 258 --
src/drmmode_display.h | 10 +-
3 files changed, 237 insertions(+), 33 deletions(-)
diff --git a/configure.ac b/configure.ac
index 1c1a36d..783c243 100644
--- a/configure.ac
+++ b/configure.ac
@@ -74,7 +74,7 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test "$HAVE_XEXTPROTO_71"
= "yes" ])
# Checks for header files.
AC_HEADER_STDC
-PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46])
+PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.47])
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10])
AM_CONDITIONAL(DRM, test "x$DRM" = xyes)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index c533324..93c48ac 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -56,6 +56,8 @@
#include "driver.h"
+#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 /* from libdrm 2.4.55 */
+
static struct dumb_bo *dumb_bo_create(int fd,
const unsigned width, const unsigned height,
const unsigned bpp)
@@ -300,6 +302,171 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
#endif
+static void
+rotation_init(xf86CrtcPtr crtc)
+{
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+ drmModePlaneRes *plane_resources;
+ int i, j, k;
+
+ drmSetClientCap(drmmode->fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1);
+
+ plane_resources = drmModeGetPlaneResources(drmmode->fd);
+ if (plane_resources == NULL)
+ return;
+
+ for (i = 0; drmmode_crtc->primary_plane_id == 0 && i <
plane_resources->count_planes; i++) {
+ drmModePlane *drm_plane;
+ drmModeObjectPropertiesPtr proplist;
+ int is_primary = -1;
+
+ drm_plane = drmModeGetPlane(drmmode->fd,
+ plane_resources->planes[i]);
+ if (drm_plane == NULL)
+ continue;
+
+ if (!(drm_plane->possible_crtcs & (1 << drmmode_crtc->index)))
+ goto free_plane;
+
+ proplist = drmModeObjectGetProperties(drmmode->fd,
+ drm_plane->plane_id,
+ DRM_MODE_OBJECT_PLANE);
+ if (proplist == NULL)
+ goto free_plane;
+
+ for (j = 0; is_primary == -1 && j < proplist->count_props; j++)
{
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+ if (strcmp(prop->name, "type") == 0) {
+ for (k = 0; k < prop->count_enums; k++) {
+ if (prop->enums[k].value !=
proplist->prop_values[j])
+ continue;
+
+ is_primary =
strcmp(prop->enums[k].name, "Primary") == 0;
+ break;
+ }
+ }
+
+ drmModeFreeProperty(prop);
+ }
+
+ if (is_primary) {
+ drmmode_crtc->primary_plane_id = drm_plane->plane_id;
+
+ for (j = 0; drmmode_crtc->rotation_prop_id == 0 && j <
proplist->count_props; j++) {
+ drmModePropertyPtr prop;
+
+ prop = drmModeGetProperty(drmmode->fd,
proplist->props[j]);
+ if (!prop)
+ continue;
+
+ if (strcmp(prop->name, "rotation") == 0) {
+ drmmode_crtc->rotation_prop_id =
proplist->props[j];
+ drmmode_crtc->current_rotation =
proplist->prop_values[j];
+ for (k = 0; k < prop->count_enums; k++)
{
+ int rr = -1;
+ if (strcmp(prop->enums[k].name,
"rotate-0") == 0)
+ rr = 0; /* RR_Rotate_0
*/
+ else if
(strc
[RESEND PATCH v3 05/11] drm: add Atmel HLCDC Display Controller support
On Wed, Jul 9, 2014 at 4:18 AM, Boris BREZILLON
wrote:
> On Mon, 7 Jul 2014 23:45:54 -0400
> Rob Clark wrote:
>
>> On Mon, Jul 7, 2014 at 12:42 PM, Boris BREZILLON
>> wrote:
>> > The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
>> > at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
>> > controller device.
>> >
>> > This display controller supports at least one primary plane and might
>> > provide several overlays and an hardware cursor depending on the IP
>> > version.
>> >
>> > At the moment, this driver only implements an RGB connector to interface
>> > with LCD panels, but support for other kind of external devices (like DRM
>> > bridges) might be added later.
>> >
>> > Signed-off-by: Boris BREZILLON
>> > ---
>> > drivers/gpu/drm/Kconfig | 2 +
>> > drivers/gpu/drm/Makefile| 1 +
>> > drivers/gpu/drm/atmel-hlcdc/Kconfig | 11 +
>> > drivers/gpu/drm/atmel-hlcdc/Makefile| 7 +
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 469 +++
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c| 474 +++
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h| 210 +++
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c | 706
>> > +++
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.h | 422 ++
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_panel.c | 351
>> > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 729
>> >
>> > 11 files changed, 3382 insertions(+)
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/Kconfig
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/Makefile
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.h
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_panel.c
>> > create mode 100644 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> >
>> > diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
>> > index d1cc2f6..df6f0c1 100644
>> > --- a/drivers/gpu/drm/Kconfig
>> > +++ b/drivers/gpu/drm/Kconfig
>> > @@ -182,6 +182,8 @@ source "drivers/gpu/drm/cirrus/Kconfig"
>> >
>
> [...]
>
>> > +/**
>> > + * Atmel HLCDC Layer GEM flip garbage collector structure
>> > + *
>> > + * This structure is used to schedule GEM object release when we are in
>> > + * interrupt context (within atmel_hlcdc_layer_irq function).
>> > + *
>> > + *@list: GEM flip objects to release
>> > + *@list_lock: lock to access the GEM flip list
>> > + *@work: work queue scheduled when there are GEM flip to collect
>> > + *@finished: action to execute the GEM flip and all attached objects have
>> > been
>> > + * released
>> > + *@finished_data: data passed to the finished callback
>> > + *@finished_lock: lock to access finished related fields
>> > + */
>> > +struct atmel_hlcdc_layer_gem_flip_gc {
>> > + struct list_head list;
>> > + spinlock_t list_lock;
>> > + struct work_struct work;
>> > +};
>>
>>
>> Please have a look at drm_flip_work.. I think that should simplify
>> post-flip cleanup for you..
>>
>
> Now I remember why I didn't make use of drm_flip_work helpers:
>
> I have to specify a fifo size when initializing the
> drm_flip_work structure (drm_flip_work_init) and I don't know exactly
> what I should choose here.
>
> You might have noticed that I'm queuing the unref work to be done within
> the irq handler (which means I'm in irq context), and, AFAIU,
> drm_flip_work_queue will execute the function if the FIFO is full
> (AFAIK calling drm_framebuffer_unreference in irq context is not safe).
yeah, the place where it is used so far, it has been ok just to size
the FIFO a couple times bigger than it should ever need to be..
Possibly dynamically growing the FIFO would make it a bit more robust.
I was trying to avoid a list so we didn't have restrictions about what
can be queued up (and didn't have issues queuing something up multiple
times)
> This leaves the following solutions if I ever want to use drm_flip_work:
> - use a threaded irq. Meaning the next frame (or the pending plane
>update) might take a bit longer to be displayed.
> - increase the fifo size, so that it's never entirely filled (relying
>on the assumption that the flip work queue will be executed at least
>as much as the plane update requests)
> - rely on the assumption that work_queue will be executed at least
>once per fb flip. This is true for the primary plane because we're
>using page_flip and only one page_flip can take place at a given
>time, but AFAIK this is not true for plane updates.
At least some of the hw can only do plane updates on
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #24 from Marek Ol??k --- Hi Michel, I'm going to switch all sampler descriptors to vNi32, so it would be nice if the code used that type instead of vNi8. Also, the function deserves a comment explaining how it works. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/1715e57e/attachment.html>
[GIT PULL] msm drm update for component changes
On Wed, Jul 09, 2014 at 06:56:14AM -0400, Rob Clark wrote: > On Wed, Jul 9, 2014 at 5:34 AM, Russell King wrote: > > David, > > > > Please incorporate the latest msm drm update for component changes, which > > can be found at: > > > > git://ftp.arm.linux.org.uk/~rmk/linux-arm.git component-for-drm > > > > with SHA1 84448288546d13d7e06fd6638fb78ddff559b399. > > > > This updates the MSM's DRM driver for the updates merged in Greg's > > driver-core tree, converting MSM to use the pre-declared array of > > matches rather than walking the device tree each time we try to bind. > > Hey Russell, do you want me to take this for my v3.17 pull req? I > expect there will be some minor conflicts with the DT support I'm > working on at the moment. > > Or does this need to be applied together with the rest of the series? > In which case, maybe it should go first, and then I'd rebase msm-next > on top. The patch for MSM is dependent on the component changes, which have already been merged by Greg for the driver-core tree. I don't have anything following this, so if you instead want to merge my component-for-driver branch (which is what Greg's pulled, which is a sub-set of this pull), and then add this patch on top of your development, that's fine too. The only reason it's a pull request and not a single patch is to ensure that the previous component commits don't end up being duplicated with different commit IDs across several trees by being applied independently as patches (which can end up causing unnecessary git conflicts.) -- FTTC broadband for 0.8mile line: now at 9.5Mbps down 400kbps up.
[PATCH 00/17] Convert TTM to the new fence interface.
This series applies on top of the driver-core-next branch of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git Before converting ttm to the new fence interface I had to fix some drivers to require a reservation before poking with fence_obj. After flipping the switch RCU becomes available instead, and the extra reservations can be dropped again. :-) I've done at least basic testing on all the drivers I've converted at some point, but more testing is definitely welcomed! --- Maarten Lankhorst (17): drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers drm/ttm: kill off some members to ttm_validate_buffer drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep drm/nouveau: require reservations for nouveau_fence_sync and nouveau_bo_fence drm/ttm: call ttm_bo_wait while inside a reservation drm/ttm: kill fence_lock drm/nouveau: rework to new fence interface drm/radeon: add timeout argument to radeon_fence_wait_seq drm/radeon: use common fence implementation for fences drm/qxl: rework to new fence interface drm/vmwgfx: get rid of different types of fence_flags entirely drm/vmwgfx: rework to new fence interface drm/ttm: flip the switch, and convert to dma_fence drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep drm/radeon: use rcu waits in some ioctls drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab drm/ttm: use rcu in core ttm drivers/gpu/drm/nouveau/core/core/event.c |4 drivers/gpu/drm/nouveau/nouveau_bo.c | 59 +--- drivers/gpu/drm/nouveau/nouveau_display.c | 25 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 431 +++-- drivers/gpu/drm/nouveau/nouveau_fence.h | 22 + drivers/gpu/drm/nouveau/nouveau_gem.c | 55 +--- drivers/gpu/drm/nouveau/nv04_fence.c |4 drivers/gpu/drm/nouveau/nv10_fence.c |4 drivers/gpu/drm/nouveau/nv17_fence.c |2 drivers/gpu/drm/nouveau/nv50_fence.c |2 drivers/gpu/drm/nouveau/nv84_fence.c | 11 - drivers/gpu/drm/qxl/Makefile |2 drivers/gpu/drm/qxl/qxl_cmd.c |7 drivers/gpu/drm/qxl/qxl_debugfs.c | 16 + drivers/gpu/drm/qxl/qxl_drv.h | 20 - drivers/gpu/drm/qxl/qxl_fence.c | 91 -- drivers/gpu/drm/qxl/qxl_kms.c |1 drivers/gpu/drm/qxl/qxl_object.c |2 drivers/gpu/drm/qxl/qxl_object.h |6 drivers/gpu/drm/qxl/qxl_release.c | 172 ++-- drivers/gpu/drm/qxl/qxl_ttm.c | 93 -- drivers/gpu/drm/radeon/radeon.h | 15 - drivers/gpu/drm/radeon/radeon_cs.c| 10 + drivers/gpu/drm/radeon/radeon_device.c| 60 drivers/gpu/drm/radeon/radeon_display.c | 21 + drivers/gpu/drm/radeon/radeon_fence.c | 283 +++ drivers/gpu/drm/radeon/radeon_gem.c | 19 + drivers/gpu/drm/radeon/radeon_object.c|8 - drivers/gpu/drm/radeon/radeon_ttm.c | 34 -- drivers/gpu/drm/radeon/radeon_uvd.c | 10 - drivers/gpu/drm/radeon/radeon_vm.c| 16 + drivers/gpu/drm/ttm/ttm_bo.c | 187 ++--- drivers/gpu/drm/ttm/ttm_bo_util.c | 28 -- drivers/gpu/drm/ttm/ttm_bo_vm.c |3 drivers/gpu/drm/ttm/ttm_execbuf_util.c| 146 +++--- drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c| 47 --- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h |1 drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 24 -- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 329 -- drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 35 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 43 +-- include/drm/ttm/ttm_bo_api.h |7 include/drm/ttm/ttm_bo_driver.h | 29 -- include/drm/ttm/ttm_execbuf_util.h| 22 + 44 files changed, 1256 insertions(+), 1150 deletions(-) delete mode 100644 drivers/gpu/drm/qxl/qxl_fence.c -- Signature
[PATCH 01/17] drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers
It seems some drivers really want this as a parameter,
like vmwgfx.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/qxl/qxl_release.c|2 +-
drivers/gpu/drm/radeon/radeon_object.c |2 +-
drivers/gpu/drm/radeon/radeon_uvd.c |2 +-
drivers/gpu/drm/radeon/radeon_vm.c |2 +-
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 22 +-
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c |7 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c |2 +-
include/drm/ttm/ttm_execbuf_util.h |9 +
8 files changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_release.c
b/drivers/gpu/drm/qxl/qxl_release.c
index 14e776f1d14e..2b43e5deb051 100644
--- a/drivers/gpu/drm/qxl/qxl_release.c
+++ b/drivers/gpu/drm/qxl/qxl_release.c
@@ -159,7 +159,7 @@ int qxl_release_reserve_list(struct qxl_release *release,
bool no_intr)
if (list_is_singular(&release->bos))
return 0;
- ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos);
+ ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos, !no_intr);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_object.c
b/drivers/gpu/drm/radeon/radeon_object.c
index 6c717b257d6d..a3ed725ea641 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -438,7 +438,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev,
u64 bytes_moved = 0, initial_bytes_moved;
u64 bytes_moved_threshold = radeon_bo_get_threshold_for_moves(rdev);
- r = ttm_eu_reserve_buffers(ticket, head);
+ r = ttm_eu_reserve_buffers(ticket, head, true);
if (unlikely(r != 0)) {
return r;
}
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/radeon/radeon_uvd.c
index a4ad270e8261..67b2a367df40 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -620,7 +620,7 @@ static int radeon_uvd_send_msg(struct radeon_device *rdev,
INIT_LIST_HEAD(&head);
list_add(&tv.head, &head);
- r = ttm_eu_reserve_buffers(&ticket, &head);
+ r = ttm_eu_reserve_buffers(&ticket, &head, true);
if (r)
return r;
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c
b/drivers/gpu/drm/radeon/radeon_vm.c
index eecff6bbd341..4c68852c3e72 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -364,7 +364,7 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev,
INIT_LIST_HEAD(&head);
list_add(&tv.head, &head);
-r = ttm_eu_reserve_buffers(&ticket, &head);
+r = ttm_eu_reserve_buffers(&ticket, &head, true);
if (r)
return r;
diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
index e8dac8758528..39a11bbd2bac 100644
--- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
+++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
@@ -112,7 +112,7 @@ EXPORT_SYMBOL(ttm_eu_backoff_reservation);
*/
int ttm_eu_reserve_buffers(struct ww_acquire_ctx *ticket,
- struct list_head *list)
+ struct list_head *list, bool intr)
{
struct ttm_bo_global *glob;
struct ttm_validate_buffer *entry;
@@ -140,7 +140,7 @@ retry:
if (entry->reserved)
continue;
- ret = __ttm_bo_reserve(bo, true, (ticket == NULL), true,
+ ret = __ttm_bo_reserve(bo, intr, (ticket == NULL), true,
ticket);
if (ret == -EDEADLK) {
@@ -153,13 +153,17 @@ retry:
ttm_eu_backoff_reservation_locked(list);
spin_unlock(&glob->lru_lock);
ttm_eu_list_ref_sub(list);
- ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock,
- ticket);
- if (unlikely(ret != 0)) {
- if (ret == -EINTR)
- ret = -ERESTARTSYS;
- goto err_fini;
- }
+
+ if (intr) {
+ ret =
ww_mutex_lock_slow_interruptible(&bo->resv->lock,
+ ticket);
+ if (unlikely(ret != 0)) {
+ if (ret == -EINTR)
+ ret = -ERESTARTSYS;
+ goto err_fini;
+ }
+ } else
+ ww_mutex_lock_slow(&bo->resv->lock, ticket);
entry->reserved = true;
if (unlikely(atomic_read(&bo->cpu_writers) > 0)) {
diff --git a/drivers/gpu
[PATCH 02/17] drm/ttm: kill off some members to ttm_validate_buffer
This reorders the list to keep track of what buffers are reserved,
so previous members are always unreserved.
This gets rid of some bookkeeping that's no longer needed,
while simplifying the code some.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/qxl/qxl_release.c |1
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 142 +++
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c |1
include/drm/ttm/ttm_execbuf_util.h |3 -
4 files changed, 50 insertions(+), 97 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_release.c
b/drivers/gpu/drm/qxl/qxl_release.c
index 2b43e5deb051..e85c4d274dc0 100644
--- a/drivers/gpu/drm/qxl/qxl_release.c
+++ b/drivers/gpu/drm/qxl/qxl_release.c
@@ -350,7 +350,6 @@ void qxl_release_fence_buffer_objects(struct qxl_release
*release)
ttm_bo_add_to_lru(bo);
__ttm_bo_unreserve(bo);
- entry->reserved = false;
}
spin_unlock(&bdev->fence_lock);
spin_unlock(&glob->lru_lock);
diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
index 39a11bbd2bac..6db47a72667e 100644
--- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
+++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
@@ -32,20 +32,12 @@
#include
#include
-static void ttm_eu_backoff_reservation_locked(struct list_head *list)
+static void ttm_eu_backoff_reservation_reverse(struct list_head *list,
+ struct ttm_validate_buffer *entry)
{
- struct ttm_validate_buffer *entry;
-
- list_for_each_entry(entry, list, head) {
+ list_for_each_entry_continue_reverse(entry, list, head) {
struct ttm_buffer_object *bo = entry->bo;
- if (!entry->reserved)
- continue;
- entry->reserved = false;
- if (entry->removed) {
- ttm_bo_add_to_lru(bo);
- entry->removed = false;
- }
__ttm_bo_unreserve(bo);
}
}
@@ -56,27 +48,9 @@ static void ttm_eu_del_from_lru_locked(struct list_head
*list)
list_for_each_entry(entry, list, head) {
struct ttm_buffer_object *bo = entry->bo;
- if (!entry->reserved)
- continue;
+ unsigned put_count = ttm_bo_del_from_lru(bo);
- if (!entry->removed) {
- entry->put_count = ttm_bo_del_from_lru(bo);
- entry->removed = true;
- }
- }
-}
-
-static void ttm_eu_list_ref_sub(struct list_head *list)
-{
- struct ttm_validate_buffer *entry;
-
- list_for_each_entry(entry, list, head) {
- struct ttm_buffer_object *bo = entry->bo;
-
- if (entry->put_count) {
- ttm_bo_list_ref_sub(bo, entry->put_count, true);
- entry->put_count = 0;
- }
+ ttm_bo_list_ref_sub(bo, put_count, true);
}
}
@@ -91,11 +65,18 @@ void ttm_eu_backoff_reservation(struct ww_acquire_ctx
*ticket,
entry = list_first_entry(list, struct ttm_validate_buffer, head);
glob = entry->bo->glob;
+
spin_lock(&glob->lru_lock);
- ttm_eu_backoff_reservation_locked(list);
+ list_for_each_entry(entry, list, head) {
+ struct ttm_buffer_object *bo = entry->bo;
+
+ ttm_bo_add_to_lru(bo);
+ __ttm_bo_unreserve(bo);
+ }
+ spin_unlock(&glob->lru_lock);
+
if (ticket)
ww_acquire_fini(ticket);
- spin_unlock(&glob->lru_lock);
}
EXPORT_SYMBOL(ttm_eu_backoff_reservation);
@@ -121,64 +102,55 @@ int ttm_eu_reserve_buffers(struct ww_acquire_ctx *ticket,
if (list_empty(list))
return 0;
- list_for_each_entry(entry, list, head) {
- entry->reserved = false;
- entry->put_count = 0;
- entry->removed = false;
- }
-
entry = list_first_entry(list, struct ttm_validate_buffer, head);
glob = entry->bo->glob;
if (ticket)
ww_acquire_init(ticket, &reservation_ww_class);
-retry:
+
list_for_each_entry(entry, list, head) {
struct ttm_buffer_object *bo = entry->bo;
- /* already slowpath reserved? */
- if (entry->reserved)
- continue;
-
ret = __ttm_bo_reserve(bo, intr, (ticket == NULL), true,
ticket);
+ if (!ret && unlikely(atomic_read(&bo->cpu_writers) > 0)) {
+ __ttm_bo_unreserve(bo);
- if (ret == -EDEADLK) {
- /* uh oh, we lost out, drop every reservation and try
-* to only reserve this buffer, then start over if
-* this succeeds.
-*/
- BUG_ON(ticket == NULL);
-
[PATCH 03/17] drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep
Apart from some code inside ttm itself and nouveau_bo_vma_del,
this is the only place where ttm_bo_wait is used without a reservation.
Fix this so we can remove the fence_lock later on.
After the switch to rcu the reservation lock will be
removed again.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/nouveau/nouveau_gem.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index c90c0dc0afe8..6e1c58a880fe 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -886,17 +886,31 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void
*data,
struct drm_gem_object *gem;
struct nouveau_bo *nvbo;
bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
- int ret = -EINVAL;
+ int ret;
+ struct nouveau_fence *fence = NULL;
gem = drm_gem_object_lookup(dev, file_priv, req->handle);
if (!gem)
return -ENOENT;
nvbo = nouveau_gem_object(gem);
- spin_lock(&nvbo->bo.bdev->fence_lock);
- ret = ttm_bo_wait(&nvbo->bo, true, true, no_wait);
- spin_unlock(&nvbo->bo.bdev->fence_lock);
+ ret = ttm_bo_reserve(&nvbo->bo, true, false, false, 0);
+ if (!ret) {
+ spin_lock(&nvbo->bo.bdev->fence_lock);
+ ret = ttm_bo_wait(&nvbo->bo, true, true, true);
+ if (!no_wait && ret)
+ fence = nouveau_fence_ref(nvbo->bo.sync_obj);
+ spin_unlock(&nvbo->bo.bdev->fence_lock);
+
+ ttm_bo_unreserve(&nvbo->bo);
+ }
drm_gem_object_unreference_unlocked(gem);
+
+ if (fence) {
+ ret = nouveau_fence_wait(fence, true, no_wait);
+ nouveau_fence_unref(&fence);
+ }
+
return ret;
}
[PATCH 04/17] drm/nouveau: require reservations for nouveau_fence_sync and nouveau_bo_fence
This will ensure we always hold the required lock when calling those functions.
---
drivers/gpu/drm/nouveau/nouveau_bo.c |2 ++
drivers/gpu/drm/nouveau/nouveau_display.c | 17 +
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index b6dc85c614be..33eb7164525a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1431,6 +1431,8 @@ nouveau_bo_fence(struct nouveau_bo *nvbo, struct
nouveau_fence *fence)
struct nouveau_fence *new_fence = nouveau_fence_ref(fence);
struct nouveau_fence *old_fence = NULL;
+ lockdep_assert_held(&nvbo->bo.resv->lock.base);
+
spin_lock(&nvbo->bo.bdev->fence_lock);
old_fence = nvbo->bo.sync_obj;
nvbo->bo.sync_obj = new_fence;
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 47ad74255bf1..826b66c44235 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -716,6 +716,9 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct
drm_framebuffer *fb,
}
mutex_lock(&chan->cli->mutex);
+ ret = ttm_bo_reserve(&new_bo->bo, true, false, false, NULL);
+ if (ret)
+ goto fail_unpin;
/* synchronise rendering channel with the kernel's channel */
spin_lock(&new_bo->bo.bdev->fence_lock);
@@ -723,12 +726,18 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct
drm_framebuffer *fb,
spin_unlock(&new_bo->bo.bdev->fence_lock);
ret = nouveau_fence_sync(fence, chan);
nouveau_fence_unref(&fence);
- if (ret)
+ if (ret) {
+ ttm_bo_unreserve(&new_bo->bo);
goto fail_unpin;
+ }
- ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
- if (ret)
- goto fail_unpin;
+ if (new_bo != old_bo) {
+ ttm_bo_unreserve(&new_bo->bo);
+
+ ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
+ if (ret)
+ goto fail_unpin;
+ }
/* Initialize a page flip struct */
*s = (struct nouveau_page_flip_state)
[PATCH 05/17] drm/ttm: call ttm_bo_wait while inside a reservation
This is the last remaining function that doesn't use the reservation
lock completely to fence off access to a buffer.
---
drivers/gpu/drm/ttm/ttm_bo.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 4ab9f7171c4f..d7d34336f108 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -502,17 +502,6 @@ static int ttm_bo_cleanup_refs_and_unlock(struct
ttm_buffer_object *bo,
if (ret)
return ret;
- /*
-* remove sync_obj with ttm_bo_wait, the wait should be
-* finished, and no new wait object should have been added.
-*/
- spin_lock(&bdev->fence_lock);
- ret = ttm_bo_wait(bo, false, false, true);
- WARN_ON(ret);
- spin_unlock(&bdev->fence_lock);
- if (ret)
- return ret;
-
spin_lock(&glob->lru_lock);
ret = __ttm_bo_reserve(bo, false, true, false, 0);
@@ -528,8 +517,16 @@ static int ttm_bo_cleanup_refs_and_unlock(struct
ttm_buffer_object *bo,
spin_unlock(&glob->lru_lock);
return 0;
}
- } else
- spin_unlock(&bdev->fence_lock);
+
+ /*
+* remove sync_obj with ttm_bo_wait, the wait should be
+* finished, and no new wait object should have been added.
+*/
+ spin_lock(&bdev->fence_lock);
+ ret = ttm_bo_wait(bo, false, false, true);
+ WARN_ON(ret);
+ }
+ spin_unlock(&bdev->fence_lock);
if (ret || unlikely(list_empty(&bo->ddestroy))) {
__ttm_bo_unreserve(bo);
@@ -1539,6 +1536,8 @@ int ttm_bo_wait(struct ttm_buffer_object *bo,
void *sync_obj;
int ret = 0;
+ lockdep_assert_held(&bo->resv->lock.base);
+
if (likely(bo->sync_obj == NULL))
return 0;
[PATCH 06/17] drm/ttm: kill fence_lock
No users are left, kill it off! :D
Conversion to the reservation api is next on the list, after
that the functionality can be restored with rcu.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 25 +++---
drivers/gpu/drm/nouveau/nouveau_display.c |6 --
drivers/gpu/drm/nouveau/nouveau_gem.c | 16 +-
drivers/gpu/drm/qxl/qxl_cmd.c |2 -
drivers/gpu/drm/qxl/qxl_fence.c |4 --
drivers/gpu/drm/qxl/qxl_object.h |2 -
drivers/gpu/drm/qxl/qxl_release.c |2 -
drivers/gpu/drm/radeon/radeon_display.c | 12 +++--
drivers/gpu/drm/radeon/radeon_object.c|2 -
drivers/gpu/drm/ttm/ttm_bo.c | 75 +++--
drivers/gpu/drm/ttm/ttm_bo_util.c |5 --
drivers/gpu/drm/ttm/ttm_bo_vm.c |3 -
drivers/gpu/drm/ttm/ttm_execbuf_util.c|2 -
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c|4 --
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 17 ++-
include/drm/ttm/ttm_bo_api.h |5 --
include/drm/ttm/ttm_bo_driver.h |3 -
17 files changed, 45 insertions(+), 140 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 33eb7164525a..e98af2e9a1cb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1196,9 +1196,7 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
bool intr,
}
/* Fallback to software copy. */
- spin_lock(&bo->bdev->fence_lock);
ret = ttm_bo_wait(bo, true, intr, no_wait_gpu);
- spin_unlock(&bo->bdev->fence_lock);
if (ret == 0)
ret = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
@@ -1425,26 +1423,19 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
ttm_pool_unpopulate(ttm);
}
+static void
+nouveau_bo_fence_unref(void **sync_obj)
+{
+ nouveau_fence_unref((struct nouveau_fence **)sync_obj);
+}
+
void
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
{
- struct nouveau_fence *new_fence = nouveau_fence_ref(fence);
- struct nouveau_fence *old_fence = NULL;
-
lockdep_assert_held(&nvbo->bo.resv->lock.base);
- spin_lock(&nvbo->bo.bdev->fence_lock);
- old_fence = nvbo->bo.sync_obj;
- nvbo->bo.sync_obj = new_fence;
- spin_unlock(&nvbo->bo.bdev->fence_lock);
-
- nouveau_fence_unref(&old_fence);
-}
-
-static void
-nouveau_bo_fence_unref(void **sync_obj)
-{
- nouveau_fence_unref((struct nouveau_fence **)sync_obj);
+ nouveau_bo_fence_unref(&nvbo->bo.sync_obj);
+ nvbo->bo.sync_obj = nouveau_fence_ref(fence);
}
static void *
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 826b66c44235..7928f8f07334 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -721,11 +721,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct
drm_framebuffer *fb,
goto fail_unpin;
/* synchronise rendering channel with the kernel's channel */
- spin_lock(&new_bo->bo.bdev->fence_lock);
- fence = nouveau_fence_ref(new_bo->bo.sync_obj);
- spin_unlock(&new_bo->bo.bdev->fence_lock);
- ret = nouveau_fence_sync(fence, chan);
- nouveau_fence_unref(&fence);
+ ret = nouveau_fence_sync(new_bo->bo.sync_obj, chan);
if (ret) {
ttm_bo_unreserve(&new_bo->bo);
goto fail_unpin;
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 6e1c58a880fe..6cd5298cbb53 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -105,9 +105,7 @@ nouveau_gem_object_unmap(struct nouveau_bo *nvbo, struct
nouveau_vma *vma)
list_del(&vma->head);
if (mapped) {
- spin_lock(&nvbo->bo.bdev->fence_lock);
fence = nouveau_fence_ref(nvbo->bo.sync_obj);
- spin_unlock(&nvbo->bo.bdev->fence_lock);
}
if (fence) {
@@ -432,17 +430,11 @@ retry:
static int
validate_sync(struct nouveau_channel *chan, struct nouveau_bo *nvbo)
{
- struct nouveau_fence *fence = NULL;
+ struct nouveau_fence *fence = nvbo->bo.sync_obj;
int ret = 0;
- spin_lock(&nvbo->bo.bdev->fence_lock);
- fence = nouveau_fence_ref(nvbo->bo.sync_obj);
- spin_unlock(&nvbo->bo.bdev->fence_lock);
-
- if (fence) {
+ if (fence)
ret = nouveau_fence_sync(fence, chan);
- nouveau_fence_unref(&fence);
- }
return ret;
}
@@ -661,9 +653,7 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli,
data |= r->vor;
}
- spin_lock(&nvbo->bo.bdev->fence_lock);
ret = ttm_bo_wait(&nvbo->bo, false, false, false);
- spin_
[PATCH 07/17] drm/nouveau: rework to new fence interface
From: Maarten Lankhorst
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/nouveau/core/core/event.c |4
drivers/gpu/drm/nouveau/nouveau_bo.c |6
drivers/gpu/drm/nouveau/nouveau_display.c |4
drivers/gpu/drm/nouveau/nouveau_fence.c | 435 -
drivers/gpu/drm/nouveau/nouveau_fence.h | 20 +
drivers/gpu/drm/nouveau/nouveau_gem.c | 17 -
drivers/gpu/drm/nouveau/nv04_fence.c |4
drivers/gpu/drm/nouveau/nv10_fence.c |4
drivers/gpu/drm/nouveau/nv17_fence.c |2
drivers/gpu/drm/nouveau/nv50_fence.c |2
drivers/gpu/drm/nouveau/nv84_fence.c | 11 -
11 files changed, 330 insertions(+), 179 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/core/event.c
b/drivers/gpu/drm/nouveau/core/core/event.c
index ae81d3b5d8b7..5ddc28ec7660 100644
--- a/drivers/gpu/drm/nouveau/core/core/event.c
+++ b/drivers/gpu/drm/nouveau/core/core/event.c
@@ -139,14 +139,14 @@ nouveau_event_ref(struct nouveau_eventh *handler, struct
nouveau_eventh **ref)
void
nouveau_event_trigger(struct nouveau_event *event, u32 types, int index)
{
- struct nouveau_eventh *handler;
+ struct nouveau_eventh *handler, *next;
unsigned long flags;
if (WARN_ON(index >= event->index_nr))
return;
spin_lock_irqsave(&event->list_lock, flags);
- list_for_each_entry(handler, &event->list[index], head) {
+ list_for_each_entry_safe(handler, next, &event->list[index], head) {
if (!test_bit(NVKM_EVENT_ENABLE, &handler->flags))
continue;
if (!(handler->types & types))
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index e98af2e9a1cb..84aba3fa1bd0 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -959,7 +959,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int
evict, bool intr,
}
mutex_lock_nested(&chan->cli->mutex, SINGLE_DEPTH_NESTING);
- ret = nouveau_fence_sync(bo->sync_obj, chan);
+ ret = nouveau_fence_sync(nouveau_bo(bo), chan);
if (ret == 0) {
ret = drm->ttm.move(chan, bo, &bo->mem, new_mem);
if (ret == 0) {
@@ -1432,10 +1432,12 @@ nouveau_bo_fence_unref(void **sync_obj)
void
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
{
- lockdep_assert_held(&nvbo->bo.resv->lock.base);
+ struct reservation_object *resv = nvbo->bo.resv;
nouveau_bo_fence_unref(&nvbo->bo.sync_obj);
nvbo->bo.sync_obj = nouveau_fence_ref(fence);
+
+ reservation_object_add_excl_fence(resv, &fence->base);
}
static void *
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 7928f8f07334..2c4798750b20 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -660,7 +660,7 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,
spin_unlock_irqrestore(&dev->event_lock, flags);
/* Synchronize with the old framebuffer */
- ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
+ ret = nouveau_fence_sync(old_bo, chan);
if (ret)
goto fail;
@@ -721,7 +721,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct
drm_framebuffer *fb,
goto fail_unpin;
/* synchronise rendering channel with the kernel's channel */
- ret = nouveau_fence_sync(new_bo->bo.sync_obj, chan);
+ ret = nouveau_fence_sync(new_bo, chan);
if (ret) {
ttm_bo_unreserve(&new_bo->bo);
goto fail_unpin;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c
b/drivers/gpu/drm/nouveau/nouveau_fence.c
index ab5ea3b0d666..d24f8ce4341a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -32,91 +32,139 @@
#include "nouveau_drm.h"
#include "nouveau_dma.h"
#include "nouveau_fence.h"
+#include
#include
-struct fence_work {
- struct work_struct base;
- struct list_head head;
- void (*func)(void *);
- void *data;
-};
+static const struct fence_ops nouveau_fence_ops_uevent;
+static const struct fence_ops nouveau_fence_ops_legacy;
static void
nouveau_fence_signal(struct nouveau_fence *fence)
{
- struct fence_work *work, *temp;
+ fence_signal_locked(&fence->base);
+ list_del(&fence->head);
+
+ if (fence->base.ops == &nouveau_fence_ops_uevent &&
+ fence->event.head.next) {
+ struct nouveau_event *event;
- list_for_each_entry_safe(work, temp, &fence->work, head) {
- schedule_work(&work->base);
- list_del(&work->head);
+ list_del(&fence->event.head);
+ fence->event.head.next = NULL;
+
+ event = container_of(fence->base.lock, typeof(*event),
list_lock);
+ nou
[PATCH 08/17] drm/radeon: add timeout argument to radeon_fence_wait_seq
This makes it possible to wait for a specific amount of time,
rather than wait until infinity.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon_fence.c | 60 ++---
1 file changed, 40 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c
b/drivers/gpu/drm/radeon/radeon_fence.c
index 913787085dfa..6435719fd45b 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -283,28 +283,35 @@ static bool radeon_fence_any_seq_signaled(struct
radeon_device *rdev, u64 *seq)
}
/**
- * radeon_fence_wait_seq - wait for a specific sequence numbers
+ * radeon_fence_wait_seq_timeout - wait for a specific sequence numbers
*
* @rdev: radeon device pointer
* @target_seq: sequence number(s) we want to wait for
* @intr: use interruptable sleep
+ * @timeout: maximum time to wait, or MAX_SCHEDULE_TIMEOUT for infinite wait
*
* Wait for the requested sequence number(s) to be written by any ring
* (all asics). Sequnce number array is indexed by ring id.
* @intr selects whether to use interruptable (true) or non-interruptable
* (false) sleep when waiting for the sequence number. Helper function
* for radeon_fence_wait_*().
- * Returns 0 if the sequence number has passed, error for all other cases.
+ * Returns remaining time if the sequence number has passed, 0 when
+ * the wait timeout, or an error for all other cases.
* -EDEADLK is returned when a GPU lockup has been detected.
*/
-static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 *target_seq,
-bool intr)
+static long radeon_fence_wait_seq_timeout(struct radeon_device *rdev,
+ u64 *target_seq, bool intr,
+ long timeout)
{
uint64_t last_seq[RADEON_NUM_RINGS];
bool signaled;
- int i, r;
+ int i;
while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {
+ long r, waited;
+
+ waited = timeout < RADEON_FENCE_JIFFIES_TIMEOUT ?
+timeout : RADEON_FENCE_JIFFIES_TIMEOUT;
/* Save current sequence values, used to check for GPU lockups
*/
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
@@ -319,11 +326,11 @@ static int radeon_fence_wait_seq(struct radeon_device
*rdev, u64 *target_seq,
if (intr) {
r = wait_event_interruptible_timeout(rdev->fence_queue,
(
(signaled = radeon_fence_any_seq_signaled(rdev,
target_seq))
-|| rdev->needs_reset),
RADEON_FENCE_JIFFIES_TIMEOUT);
+|| rdev->needs_reset), waited);
} else {
r = wait_event_timeout(rdev->fence_queue, (
(signaled = radeon_fence_any_seq_signaled(rdev,
target_seq))
-|| rdev->needs_reset),
RADEON_FENCE_JIFFIES_TIMEOUT);
+|| rdev->needs_reset), waited);
}
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
@@ -337,6 +344,14 @@ static int radeon_fence_wait_seq(struct radeon_device
*rdev, u64 *target_seq,
if (unlikely(r < 0))
return r;
+ timeout -= waited - r;
+
+ /*
+* If this is a timed wait and the wait completely timed out
just return.
+*/
+ if (!timeout)
+ break;
+
if (unlikely(!signaled)) {
if (rdev->needs_reset)
return -EDEADLK;
@@ -379,14 +394,14 @@ static int radeon_fence_wait_seq(struct radeon_device
*rdev, u64 *target_seq,
}
}
}
- return 0;
+ return timeout;
}
/**
* radeon_fence_wait - wait for a fence to signal
*
* @fence: radeon fence object
- * @intr: use interruptable sleep
+ * @intr: use interruptible sleep
*
* Wait for the requested fence to signal (all asics).
* @intr selects whether to use interruptable (true) or non-interruptable
@@ -396,7 +411,7 @@ static int radeon_fence_wait_seq(struct radeon_device
*rdev, u64 *target_seq,
int radeon_fence_wait(struct radeon_fence *fence, bool intr)
{
uint64_t seq[RADEON_NUM_RINGS] = {};
- int r;
+ long r;
if (fence == NULL) {
WARN(1, "Querying an invalid fence : %p !\n", fence);
@@ -407,9 +422,10 @@ int radeon_fence_wait(struct radeon_fence *fence, bool
intr)
if (seq[fence->ring] == RADEON_FENCE_SIGNALED_SEQ)
return 0;
- r = radeon_fence_wait_seq(fence->rdev, seq, intr);
- if (r)
+ r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr,
MAX_SCHEDULE_TIMEOUT);
+ if (r < 0) {
return r;
+
[PATCH 09/17] drm/radeon: use common fence implementation for fences
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/radeon/radeon.h| 15 +-
drivers/gpu/drm/radeon/radeon_device.c | 60 -
drivers/gpu/drm/radeon/radeon_fence.c | 223 ++--
3 files changed, 248 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 29d9cc04c04e..03a5567f2c2f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -64,6 +64,7 @@
#include
#include
#include
+#include
#include
#include
@@ -116,9 +117,6 @@ extern int radeon_deep_color;
#define RADEONFB_CONN_LIMIT4
#define RADEON_BIOS_NUM_SCRATCH8
-/* fence seq are set to this number when signaled */
-#define RADEON_FENCE_SIGNALED_SEQ 0LL
-
/* internal ring indices */
/* r1xx+ has gfx CP ring */
#define RADEON_RING_TYPE_GFX_INDEX 0
@@ -350,12 +348,15 @@ struct radeon_fence_driver {
};
struct radeon_fence {
+ struct fence base;
+
struct radeon_device*rdev;
- struct kref kref;
/* protected by radeon_fence.lock */
uint64_tseq;
/* RB, DMA, etc. */
unsignedring;
+
+ wait_queue_t fence_wake;
};
int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);
@@ -2268,6 +2269,7 @@ struct radeon_device {
struct radeon_mman mman;
struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
wait_queue_head_t fence_queue;
+ unsignedfence_context;
struct mutexring_lock;
struct radeon_ring ring[RADEON_NUM_RINGS];
boolib_pool_ready;
@@ -2358,11 +2360,6 @@ u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32
index);
void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v);
/*
- * Cast helper
- */
-#define to_radeon_fence(p) ((struct radeon_fence *)(p))
-
-/*
* Registers read & write functions.
*/
#define RREG8(reg) readb((rdev->rmmio) + (reg))
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index 03686fab842d..86699df7c8f3 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1213,6 +1213,7 @@ int radeon_device_init(struct radeon_device *rdev,
for (i = 0; i < RADEON_NUM_RINGS; i++) {
rdev->ring[i].idx = i;
}
+ rdev->fence_context = fence_context_alloc(RADEON_NUM_RINGS);
DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X
0x%04X:0x%04X).\n",
radeon_family_name[rdev->family], pdev->vendor, pdev->device,
@@ -1607,6 +1608,54 @@ int radeon_resume_kms(struct drm_device *dev, bool
resume, bool fbcon)
return 0;
}
+static uint32_t radeon_gpu_mask_sw_irq(struct radeon_device *rdev)
+{
+ uint32_t mask = 0;
+ int i;
+
+ if (!rdev->ddev->irq_enabled)
+ return mask;
+
+ /*
+* increase refcount on sw interrupts for all rings to stop
+* enabling interrupts in radeon_fence_enable_signaling during
+* gpu reset.
+*/
+
+ for (i = 0; i < RADEON_NUM_RINGS; ++i) {
+ if (!rdev->ring[i].ready)
+ continue;
+
+ atomic_inc(&rdev->irq.ring_int[i]);
+ mask |= 1 << i;
+ }
+ return mask;
+}
+
+static void radeon_gpu_unmask_sw_irq(struct radeon_device *rdev, uint32_t mask)
+{
+ unsigned long irqflags;
+ int i;
+
+ if (!mask)
+ return;
+
+ /*
+* undo refcount increase, and reset irqs to correct value.
+*/
+
+ for (i = 0; i < RADEON_NUM_RINGS; ++i) {
+ if (!(mask & (1 << i)))
+ continue;
+
+ atomic_dec(&rdev->irq.ring_int[i]);
+ }
+
+ spin_lock_irqsave(&rdev->irq.lock, irqflags);
+ radeon_irq_set(rdev);
+ spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
+}
+
/**
* radeon_gpu_reset - reset the asic
*
@@ -1624,6 +1673,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
int i, r;
int resched;
+ uint32_t sw_mask;
down_write(&rdev->exclusive_lock);
@@ -1637,6 +1687,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
radeon_save_bios_scratch_regs(rdev);
/* block TTM */
resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
+ sw_mask = radeon_gpu_mask_sw_irq(rdev);
radeon_pm_suspend(rdev);
radeon_suspend(rdev);
@@ -1686,13 +1737,20 @@ retry:
radeon_pm_resume(rdev);
drm_helper_resume_force_mode(rdev->ddev);
+ radeon_gpu_unmask_sw_irq(rdev, sw_mask);
ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
if (r) {
/* bad news, how to tell
[PATCH 10/17] drm/qxl: rework to new fence interface
Final driver! \o/
This is not a proper dma_fence because the hardware may never signal
anything, so don't use dma-buf with qxl, ever.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/qxl/Makefile |2
drivers/gpu/drm/qxl/qxl_cmd.c |5 -
drivers/gpu/drm/qxl/qxl_debugfs.c | 12 ++-
drivers/gpu/drm/qxl/qxl_drv.h | 22 ++---
drivers/gpu/drm/qxl/qxl_fence.c | 87 ---
drivers/gpu/drm/qxl/qxl_kms.c |2
drivers/gpu/drm/qxl/qxl_object.c |2
drivers/gpu/drm/qxl/qxl_release.c | 166 -
drivers/gpu/drm/qxl/qxl_ttm.c | 97 --
9 files changed, 220 insertions(+), 175 deletions(-)
delete mode 100644 drivers/gpu/drm/qxl/qxl_fence.c
diff --git a/drivers/gpu/drm/qxl/Makefile b/drivers/gpu/drm/qxl/Makefile
index ea046ba691d2..ac0d74852e11 100644
--- a/drivers/gpu/drm/qxl/Makefile
+++ b/drivers/gpu/drm/qxl/Makefile
@@ -4,6 +4,6 @@
ccflags-y := -Iinclude/drm
-qxl-y := qxl_drv.o qxl_kms.o qxl_display.o qxl_ttm.o qxl_fb.o qxl_object.o
qxl_gem.o qxl_cmd.o qxl_image.o qxl_draw.o qxl_debugfs.o qxl_irq.o qxl_dumb.o
qxl_ioctl.o qxl_fence.o qxl_release.o
+qxl-y := qxl_drv.o qxl_kms.o qxl_display.o qxl_ttm.o qxl_fb.o qxl_object.o
qxl_gem.o qxl_cmd.o qxl_image.o qxl_draw.o qxl_debugfs.o qxl_irq.o qxl_dumb.o
qxl_ioctl.o qxl_release.o
obj-$(CONFIG_DRM_QXL)+= qxl.o
diff --git a/drivers/gpu/drm/qxl/qxl_cmd.c b/drivers/gpu/drm/qxl/qxl_cmd.c
index 45fad7b45486..97823644d347 100644
--- a/drivers/gpu/drm/qxl/qxl_cmd.c
+++ b/drivers/gpu/drm/qxl/qxl_cmd.c
@@ -620,11 +620,6 @@ static int qxl_reap_surf(struct qxl_device *qdev, struct
qxl_bo *surf, bool stal
if (ret == -EBUSY)
return -EBUSY;
- if (surf->fence.num_active_releases > 0 && stall == false) {
- qxl_bo_unreserve(surf);
- return -EBUSY;
- }
-
if (stall)
mutex_unlock(&qdev->surf_evict_mutex);
diff --git a/drivers/gpu/drm/qxl/qxl_debugfs.c
b/drivers/gpu/drm/qxl/qxl_debugfs.c
index c3c2bbdc6674..0d144e0646d6 100644
--- a/drivers/gpu/drm/qxl/qxl_debugfs.c
+++ b/drivers/gpu/drm/qxl/qxl_debugfs.c
@@ -57,11 +57,21 @@ qxl_debugfs_buffers_info(struct seq_file *m, void *data)
struct qxl_device *qdev = node->minor->dev->dev_private;
struct qxl_bo *bo;
+ spin_lock(&qdev->release_lock);
list_for_each_entry(bo, &qdev->gem.objects, list) {
+ struct reservation_object_list *fobj;
+ int rel;
+
+ rcu_read_lock();
+ fobj = rcu_dereference(bo->tbo.resv->fence);
+ rel = fobj ? fobj->shared_count : 0;
+ rcu_read_unlock();
+
seq_printf(m, "size %ld, pc %d, sync obj %p, num releases %d\n",
(unsigned long)bo->gem_base.size, bo->pin_count,
- bo->tbo.sync_obj, bo->fence.num_active_releases);
+ bo->tbo.sync_obj, rel);
}
+ spin_unlock(&qdev->release_lock);
return 0;
}
diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h
index 36ed40ba773f..d547cbdebeb4 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -31,6 +31,7 @@
* Definitions taken from spice-protocol, plus kernel driver specific bits.
*/
+#include
#include
#include
#include
@@ -95,13 +96,6 @@ enum {
QXL_INTERRUPT_IO_CMD |\
QXL_INTERRUPT_CLIENT_MONITORS_CONFIG)
-struct qxl_fence {
- struct qxl_device *qdev;
- uint32_t num_active_releases;
- uint32_t *release_ids;
- struct radix_tree_root tree;
-};
-
struct qxl_bo {
/* Protected by gem.mutex */
struct list_headlist;
@@ -113,13 +107,13 @@ struct qxl_bo {
unsignedpin_count;
void*kptr;
int type;
+
/* Constant after initialization */
struct drm_gem_object gem_base;
bool is_primary; /* is this now a primary surface */
bool hw_surf_alloc;
struct qxl_surface surf;
uint32_t surface_id;
- struct qxl_fence fence; /* per bo fence - list of releases */
struct qxl_release *surf_create;
};
#define gem_to_qxl_bo(gobj) container_of((gobj), struct qxl_bo, gem_base)
@@ -191,6 +185,8 @@ enum {
* spice-protocol/qxl_dev.h */
#define QXL_MAX_RES 96
struct qxl_release {
+ struct fence base;
+
int id;
int type;
uint32_t release_offset;
@@ -284,7 +280,11 @@ struct qxl_device {
uint8_t slot_gen_bits;
uint64_tva_slot_mask;
+ /* XXX: when rcu becomes available, release_lock can be killed */
+ spinlock_t release_lock;
+ spinlock_t fence_lock;
struct idr release_idr;
+ uint32_trelease_seqno;
spinlock_t release_idr_lock;
struct mutexasync_
[PATCH 11/17] drm/vmwgfx: get rid of different types of fence_flags entirely
Only one type was ever used. This is needed to simplify the fence
support in the next commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c |5 +--
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h |1 -
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 14 ++---
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 50 ---
drivers/gpu/drm/vmwgfx/vmwgfx_fence.h |8 +
5 files changed, 26 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
index 4a36bb1dc525..f15718cc631d 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
@@ -792,15 +792,12 @@ static int vmw_sync_obj_flush(void *sync_obj)
static bool vmw_sync_obj_signaled(void *sync_obj)
{
- return vmw_fence_obj_signaled((struct vmw_fence_obj *) sync_obj,
- DRM_VMW_FENCE_FLAG_EXEC);
-
+ return vmw_fence_obj_signaled((struct vmw_fence_obj *) sync_obj);
}
static int vmw_sync_obj_wait(void *sync_obj, bool lazy, bool interruptible)
{
return vmw_fence_obj_wait((struct vmw_fence_obj *) sync_obj,
- DRM_VMW_FENCE_FLAG_EXEC,
lazy, interruptible,
VMW_FENCE_WAIT_TIMEOUT);
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 6b252a887ae2..f217e9723b9e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -332,7 +332,6 @@ struct vmw_sw_context{
uint32_t *cmd_bounce;
uint32_t cmd_bounce_size;
struct list_head resource_list;
- uint32_t fence_flags;
struct ttm_buffer_object *cur_query_bo;
struct list_head res_relocations;
uint32_t *buf_start;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index f8b25bc4e634..db30b790ad24 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -350,8 +350,6 @@ static int vmw_bo_to_validate_list(struct vmw_sw_context
*sw_context,
vval_buf->validate_as_mob = validate_as_mob;
}
- sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
-
if (p_val_node)
*p_val_node = val_node;
@@ -2308,13 +2306,9 @@ int vmw_execbuf_fence_commands(struct drm_file
*file_priv,
if (p_handle != NULL)
ret = vmw_user_fence_create(file_priv, dev_priv->fman,
- sequence,
- DRM_VMW_FENCE_FLAG_EXEC,
- p_fence, p_handle);
+ sequence, p_fence, p_handle);
else
- ret = vmw_fence_create(dev_priv->fman, sequence,
- DRM_VMW_FENCE_FLAG_EXEC,
- p_fence);
+ ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
if (unlikely(ret != 0 && !synced)) {
(void) vmw_fallback_wait(dev_priv, false, false,
@@ -2387,8 +2381,7 @@ vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
ttm_ref_object_base_unref(vmw_fp->tfile,
fence_handle, TTM_REF_USAGE);
DRM_ERROR("Fence copy error. Syncing.\n");
- (void) vmw_fence_obj_wait(fence, fence->signal_mask,
- false, false,
+ (void) vmw_fence_obj_wait(fence, false, false,
VMW_FENCE_WAIT_TIMEOUT);
}
}
@@ -2438,7 +2431,6 @@ int vmw_execbuf_process(struct drm_file *file_priv,
sw_context->fp = vmw_fpriv(file_priv);
sw_context->cur_reloc = 0;
sw_context->cur_val_buf = 0;
- sw_context->fence_flags = 0;
INIT_LIST_HEAD(&sw_context->resource_list);
sw_context->cur_query_bo = dev_priv->pinned_bo;
sw_context->last_query_ctx = NULL;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
index 436b013b4231..05b9eea8e875 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
@@ -207,9 +207,7 @@ void vmw_fence_manager_takedown(struct vmw_fence_manager
*fman)
}
static int vmw_fence_obj_init(struct vmw_fence_manager *fman,
- struct vmw_fence_obj *fence,
- u32 seqno,
- uint32_t mask,
+ struct vmw_fence_obj *fence, u32 seqno,
void (*destroy) (struct vmw_fence_obj *fence))
{
unsigned long irq_flags;
@@ -220,7 +218,6 @@ static int vmw_fence_obj_init(struct vmw_fence_manager
*fman,
INIT_LIST_HEAD(&fence->seq_passed_actions);
fence->fman = fman;
[PATCH 12/17] drm/vmwgfx: rework to new fence interface
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c |2
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c| 299 ++
drivers/gpu/drm/vmwgfx/vmwgfx_fence.h| 29 ++-
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c |9 -
4 files changed, 200 insertions(+), 139 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index db30b790ad24..f3f8caa09cc8 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -2360,7 +2360,7 @@ vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
BUG_ON(fence == NULL);
fence_rep.handle = fence_handle;
- fence_rep.seqno = fence->seqno;
+ fence_rep.seqno = fence->base.seqno;
vmw_update_seqno(dev_priv, &dev_priv->fifo);
fence_rep.passed_seqno = dev_priv->last_read_seqno;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
index 05b9eea8e875..77f416b7552c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
@@ -46,6 +46,7 @@ struct vmw_fence_manager {
bool goal_irq_on; /* Protected by @goal_irq_mutex */
bool seqno_valid; /* Protected by @lock, and may not be set to true
without the @goal_irq_mutex held. */
+ unsigned ctx;
};
struct vmw_user_fence {
@@ -80,6 +81,12 @@ struct vmw_event_fence_action {
uint32_t *tv_usec;
};
+static struct vmw_fence_manager *
+fman_from_fence(struct vmw_fence_obj *fence)
+{
+ return container_of(fence->base.lock, struct vmw_fence_manager, lock);
+}
+
/**
* Note on fencing subsystem usage of irqs:
* Typically the vmw_fences_update function is called
@@ -102,25 +109,130 @@ struct vmw_event_fence_action {
* objects with actions attached to them.
*/
-static void vmw_fence_obj_destroy_locked(struct kref *kref)
+static void vmw_fence_obj_destroy(struct fence *f)
{
struct vmw_fence_obj *fence =
- container_of(kref, struct vmw_fence_obj, kref);
+ container_of(f, struct vmw_fence_obj, base);
- struct vmw_fence_manager *fman = fence->fman;
- unsigned int num_fences;
+ struct vmw_fence_manager *fman = fman_from_fence(fence);
+ unsigned long irq_flags;
+ spin_lock_irqsave(&fman->lock, irq_flags);
list_del_init(&fence->head);
- num_fences = --fman->num_fence_objects;
- spin_unlock_irq(&fman->lock);
- if (fence->destroy)
- fence->destroy(fence);
- else
- kfree(fence);
+ --fman->num_fence_objects;
+ spin_unlock_irqrestore(&fman->lock, irq_flags);
+ fence->destroy(fence);
+}
- spin_lock_irq(&fman->lock);
+static const char *vmw_fence_get_driver_name(struct fence *f)
+{
+ return "vmwgfx";
+}
+
+static const char *vmw_fence_get_timeline_name(struct fence *f)
+{
+ return "svga";
+}
+
+static bool vmw_fence_enable_signaling(struct fence *f)
+{
+ struct vmw_fence_obj *fence =
+ container_of(f, struct vmw_fence_obj, base);
+
+ struct vmw_fence_manager *fman = fman_from_fence(fence);
+
+ __le32 __iomem *fifo_mem = fman->dev_priv->mmio_virt;
+ u32 seqno = ioread32(fifo_mem + SVGA_FIFO_FENCE);
+ if (seqno - fence->base.seqno < VMW_FENCE_WRAP)
+ return false;
+
+ vmw_fifo_ping_host(fman->dev_priv, SVGA_SYNC_GENERIC);
+
+ return true;
+}
+
+struct vmwgfx_wait_cb {
+ struct fence_cb base;
+ struct task_struct *task;
+};
+
+static void
+vmwgfx_wait_cb(struct fence *fence, struct fence_cb *cb)
+{
+ struct vmwgfx_wait_cb *wait =
+ container_of(cb, struct vmwgfx_wait_cb, base);
+
+ wake_up_process(wait->task);
}
+static void __vmw_fences_update(struct vmw_fence_manager *fman);
+
+static long vmw_fence_wait(struct fence *f, bool intr, signed long timeout)
+{
+ struct vmw_fence_obj *fence =
+ container_of(f, struct vmw_fence_obj, base);
+
+ struct vmw_fence_manager *fman = fman_from_fence(fence);
+ struct vmw_private *dev_priv = fman->dev_priv;
+ struct vmwgfx_wait_cb cb;
+ long ret = timeout;
+ unsigned long irq_flags;
+
+ if (likely(vmw_fence_obj_signaled(fence)))
+ return timeout;
+
+ vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
+ vmw_seqno_waiter_add(dev_priv);
+
+ spin_lock_irqsave(f->lock, irq_flags);
+
+ if (intr && signal_pending(current)) {
+ ret = -ERESTARTSYS;
+ goto out;
+ }
+
+ cb.base.func = vmwgfx_wait_cb;
+ cb.task = current;
+ list_add(&cb.base.node, &f->cb_list);
+
+ while (ret > 0) {
+ __vmw_fences_update(fman);
+ if (test_bit(FENCE_FLAG_SIGNALED_BIT, &f->flags))
+ break;
+
+
[PATCH 13/17] drm/ttm: flip the switch, and convert to dma_fence
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 48 +---
drivers/gpu/drm/nouveau/nouveau_fence.c | 24 +---
drivers/gpu/drm/nouveau/nouveau_fence.h |2
drivers/gpu/drm/nouveau/nouveau_gem.c| 16 ++-
drivers/gpu/drm/qxl/qxl_debugfs.c|6 +
drivers/gpu/drm/qxl/qxl_drv.h|2
drivers/gpu/drm/qxl/qxl_kms.c|1
drivers/gpu/drm/qxl/qxl_object.h |4 -
drivers/gpu/drm/qxl/qxl_release.c|3 -
drivers/gpu/drm/qxl/qxl_ttm.c| 104 --
drivers/gpu/drm/radeon/radeon_cs.c | 10 +-
drivers/gpu/drm/radeon/radeon_display.c | 25 +++-
drivers/gpu/drm/radeon/radeon_object.c |4 -
drivers/gpu/drm/radeon/radeon_ttm.c | 34 --
drivers/gpu/drm/radeon/radeon_uvd.c |8 +
drivers/gpu/drm/radeon/radeon_vm.c | 14 ++
drivers/gpu/drm/ttm/ttm_bo.c | 171 +-
drivers/gpu/drm/ttm/ttm_bo_util.c| 23 +---
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 10 --
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c | 40 ---
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 14 +-
include/drm/ttm/ttm_bo_api.h |2
include/drm/ttm/ttm_bo_driver.h | 26 -
include/drm/ttm/ttm_execbuf_util.h | 10 +-
24 files changed, 208 insertions(+), 393 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 84aba3fa1bd0..5b8ccc39a282 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -92,13 +92,13 @@ nv10_bo_get_tile_region(struct drm_device *dev, int i)
static void
nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
- struct nouveau_fence *fence)
+ struct fence *fence)
{
struct nouveau_drm *drm = nouveau_drm(dev);
if (tile) {
spin_lock(&drm->tile.lock);
- tile->fence = nouveau_fence_ref(fence);
+ tile->fence = nouveau_fence_ref((struct nouveau_fence *)fence);
tile->used = false;
spin_unlock(&drm->tile.lock);
}
@@ -965,7 +965,8 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int
evict, bool intr,
if (ret == 0) {
ret = nouveau_fence_new(chan, false, &fence);
if (ret == 0) {
- ret = ttm_bo_move_accel_cleanup(bo, fence,
+ ret = ttm_bo_move_accel_cleanup(bo,
+ &fence->base,
evict,
no_wait_gpu,
new_mem);
@@ -1151,8 +1152,9 @@ nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
{
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct drm_device *dev = drm->dev;
+ struct fence *fence = reservation_object_get_excl(bo->resv);
- nv10_bo_put_tile_region(dev, *old_tile, bo->sync_obj);
+ nv10_bo_put_tile_region(dev, *old_tile, fence);
*old_tile = new_tile;
}
@@ -1423,47 +1425,14 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
ttm_pool_unpopulate(ttm);
}
-static void
-nouveau_bo_fence_unref(void **sync_obj)
-{
- nouveau_fence_unref((struct nouveau_fence **)sync_obj);
-}
-
void
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
{
struct reservation_object *resv = nvbo->bo.resv;
- nouveau_bo_fence_unref(&nvbo->bo.sync_obj);
- nvbo->bo.sync_obj = nouveau_fence_ref(fence);
-
reservation_object_add_excl_fence(resv, &fence->base);
}
-static void *
-nouveau_bo_fence_ref(void *sync_obj)
-{
- return nouveau_fence_ref(sync_obj);
-}
-
-static bool
-nouveau_bo_fence_signalled(void *sync_obj)
-{
- return nouveau_fence_done(sync_obj);
-}
-
-static int
-nouveau_bo_fence_wait(void *sync_obj, bool lazy, bool intr)
-{
- return nouveau_fence_wait(sync_obj, lazy, intr);
-}
-
-static int
-nouveau_bo_fence_flush(void *sync_obj)
-{
- return 0;
-}
-
struct ttm_bo_driver nouveau_bo_driver = {
.ttm_tt_create = &nouveau_ttm_tt_create,
.ttm_tt_populate = &nouveau_ttm_tt_populate,
@@ -1474,11 +1443,6 @@ struct ttm_bo_driver nouveau_bo_driver = {
.move_notify = nouveau_bo_move_ntfy,
.move = nouveau_bo_move,
.verify_access = nouveau_bo_verify_access,
- .sync_obj_signaled = nouveau_bo_fence_signalled,
- .sync_obj_wait = nouveau_bo_fence_wait,
- .sync_obj_flush = nouveau_bo_fence_flush,
- .sync_obj_unref = nouveau_bo_fence_unref,
- .sync_obj_ref = nouveau_bo_fence_ref,
.fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
.io_mem_reserve = &nouveau_ttm_io_mem_reserve,
.io_mem_free = &nouvea
[PATCH 14/17] drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep
With the conversion to the reservation api this should be safe.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/nouveau/nouveau_gem.c | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c
b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 4beaa897adad..c2ca894f6507 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -863,33 +863,29 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void
*data,
struct drm_gem_object *gem;
struct nouveau_bo *nvbo;
bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
+ bool write = !!(req->flags & NOUVEAU_GEM_CPU_PREP_WRITE);
int ret;
- struct nouveau_fence *fence = NULL;
gem = drm_gem_object_lookup(dev, file_priv, req->handle);
if (!gem)
return -ENOENT;
nvbo = nouveau_gem_object(gem);
- ret = ttm_bo_reserve(&nvbo->bo, true, false, false, 0);
- if (!ret) {
- ret = ttm_bo_wait(&nvbo->bo, true, true, true);
- if (!no_wait && ret) {
- struct fence *excl;
-
- excl = reservation_object_get_excl(nvbo->bo.resv);
- fence = nouveau_fence_ref((struct nouveau_fence *)excl);
- }
+ if (no_wait)
+ ret = reservation_object_test_signaled_rcu(nvbo->bo.resv,
write) ? 0 : -EBUSY;
+ else {
+ long lret;
- ttm_bo_unreserve(&nvbo->bo);
+ lret = reservation_object_wait_timeout_rcu(nvbo->bo.resv,
write, true, 30 * HZ);
+ if (!lret)
+ ret = -EBUSY;
+ else if (lret > 0)
+ ret = 0;
+ else
+ ret = lret;
}
drm_gem_object_unreference_unlocked(gem);
- if (fence) {
- ret = nouveau_fence_wait(fence, true, no_wait);
- nouveau_fence_unref(&fence);
- }
-
return ret;
}
[PATCH 15/17] drm/radeon: use rcu waits in some ioctls
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/radeon/radeon_gem.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c
b/drivers/gpu/drm/radeon/radeon_gem.c
index d09650c1d720..7ba883843668 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -107,9 +107,12 @@ static int radeon_gem_set_domain(struct drm_gem_object
*gobj,
}
if (domain == RADEON_GEM_DOMAIN_CPU) {
/* Asking for cpu access wait for object idle */
- r = radeon_bo_wait(robj, NULL, false);
- if (r) {
- printk(KERN_ERR "Failed to wait for object !\n");
+ r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true,
true, 30 * HZ);
+ if (!r)
+ r = -EBUSY;
+
+ if (r < 0 && r != -EINTR) {
+ printk(KERN_ERR "Failed to wait for object: %i\n", r);
return r;
}
}
@@ -357,14 +360,20 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev,
void *data,
struct drm_radeon_gem_wait_idle *args = data;
struct drm_gem_object *gobj;
struct radeon_bo *robj;
- int r;
+ int r = 0;
+ long ret;
gobj = drm_gem_object_lookup(dev, filp, args->handle);
if (gobj == NULL) {
return -ENOENT;
}
robj = gem_to_radeon_bo(gobj);
- r = radeon_bo_wait(robj, NULL, false);
+ ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true,
30 * HZ);
+ if (ret == 0)
+ r = -EBUSY;
+ else if (ret < 0)
+ r = ret;
+
/* callback hw specific functions if any */
if (rdev->asic->ioctl_wait_idle)
robj->rdev->asic->ioctl_wait_idle(rdev, robj);
[PATCH 16/17] drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index 20a1a866ceeb..79e950df3018 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -567,13 +567,16 @@ static int vmw_user_dmabuf_synccpu_grab(struct
vmw_user_dma_buffer *user_bo,
int ret;
if (flags & drm_vmw_synccpu_allow_cs) {
- ret = ttm_bo_reserve(bo, true, !!(flags &
drm_vmw_synccpu_dontblock), false, 0);
- if (!ret) {
- ret = ttm_bo_wait(bo, false, true,
- !!(flags &
drm_vmw_synccpu_dontblock));
- ttm_bo_unreserve(bo);
- }
- return ret;
+ long lret;
+ if (flags & drm_vmw_synccpu_dontblock)
+ return reservation_object_test_signaled_rcu(bo->resv,
true) ? 0 : -EBUSY;
+
+ lret = reservation_object_wait_timeout_rcu(bo->resv, true,
true, MAX_SCHEDULE_TIMEOUT);
+ if (!lret)
+ return -EBUSY;
+ else if (lret < 0)
+ return lret;
+ return 0;
}
ret = ttm_bo_synccpu_write_grab
[PATCH 17/17] drm/ttm: use rcu in core ttm
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/ttm/ttm_bo.c | 76 +++---
1 file changed, 13 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 31c4a6dd722d..6fe1f4bf37ed 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -466,66 +466,6 @@ static void ttm_bo_cleanup_refs_or_queue(struct
ttm_buffer_object *bo)
((HZ / 100) < 1) ? 1 : HZ / 100);
}
-static int ttm_bo_unreserve_and_wait(struct ttm_buffer_object *bo,
-bool interruptible)
-{
- struct ttm_bo_global *glob = bo->glob;
- struct reservation_object_list *fobj;
- struct fence *excl = NULL;
- struct fence **shared = NULL;
- u32 shared_count = 0, i;
- int ret = 0;
-
- fobj = reservation_object_get_list(bo->resv);
- if (fobj && fobj->shared_count) {
- shared = kmalloc(sizeof(*shared) * fobj->shared_count,
-GFP_KERNEL);
-
- if (!shared) {
- ret = -ENOMEM;
- __ttm_bo_unreserve(bo);
- spin_unlock(&glob->lru_lock);
- return ret;
- }
-
- for (i = 0; i < fobj->shared_count; ++i) {
- if (!fence_is_signaled(fobj->shared[i])) {
- fence_get(fobj->shared[i]);
- shared[shared_count++] = fobj->shared[i];
- }
- }
- if (!shared_count) {
- kfree(shared);
- shared = NULL;
- }
- }
-
- excl = reservation_object_get_excl(bo->resv);
- if (excl && !fence_is_signaled(excl))
- fence_get(excl);
- else
- excl = NULL;
-
- __ttm_bo_unreserve(bo);
- spin_unlock(&glob->lru_lock);
-
- if (excl) {
- ret = fence_wait(excl, interruptible);
- fence_put(excl);
- }
-
- if (shared_count > 0) {
- for (i = 0; i < shared_count; ++i) {
- if (!ret)
- ret = fence_wait(shared[i], interruptible);
- fence_put(shared[i]);
- }
- kfree(shared);
- }
-
- return ret;
-}
-
/**
* function ttm_bo_cleanup_refs_and_unlock
* If bo idle, remove from delayed- and lru lists, and unref.
@@ -549,9 +489,19 @@ static int ttm_bo_cleanup_refs_and_unlock(struct
ttm_buffer_object *bo,
ret = ttm_bo_wait(bo, false, false, true);
if (ret && !no_wait_gpu) {
- ret = ttm_bo_unreserve_and_wait(bo, interruptible);
- if (ret)
- return ret;
+ long lret;
+ ww_mutex_unlock(&bo->resv->lock);
+ spin_unlock(&glob->lru_lock);
+
+ lret = reservation_object_wait_timeout_rcu(bo->resv,
+ true,
+ interruptible,
+ 30 * HZ);
+
+ if (lret < 0)
+ return lret;
+ else if (lret == 0)
+ return -EBUSY;
spin_lock(&glob->lru_lock);
ret = __ttm_bo_reserve(bo, false, true, false, 0);
drm/vmwgfx: Fix compat shader namespace
Hello Thomas Hellstrom,
The patch 18e4a4669c50: "drm/vmwgfx: Fix compat shader namespace"
from Jun 9, 2014, leads to the following static checker warning:
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c:477 vmw_cmd_res_reloc_add()
warn: missing error code here? 'kzalloc()' failed.
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
468
469 ret = vmw_resource_context_res_add(dev_priv,
sw_context, res);
470 if (unlikely(ret != 0))
471 goto out_err;
472 node->staged_bindings =
473 kzalloc(sizeof(*node->staged_bindings),
GFP_KERNEL);
474 if (node->staged_bindings == NULL) {
475 DRM_ERROR("Failed to allocate context binding "
476"information.\n");
477 goto out_err;
This should just be "return -ENOMEM;". The goto is misleading because
you expect it to do something useful.
Soon checkpatch.pl will start complaining about the extra DRM_ERROR()
because kzalloc() has a more useful printk builtin and this just wastes
memory and makes the code more verbose.
Speaking of verbose, all the likely/unlikely annotations should be
removed. If the code were more readable then the missing error code
would have been more noticeable. This code is buggy because it is ugly;
there is a direct cause effect relationship.
478 }
479 INIT_LIST_HEAD(&node->staged_bindings->list);
480 }
481
482 if (p_val)
483 *p_val = node;
484
485 out_err:
486 return ret;
487 }
regards,
dan carpenter
[PATCH 00/17] Convert TTM to the new fence interface.
Hi Maarten Will this stop the stuttering I've been seeing with DRI3 and PRIME? Or will other patches / plumbing be required Cheers Mike On 9 Jul 2014 13:29, "Maarten Lankhorst" wrote: > This series applies on top of the driver-core-next branch of > git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git > > Before converting ttm to the new fence interface I had to fix some > drivers to require a reservation before poking with fence_obj. > After flipping the switch RCU becomes available instead, and > the extra reservations can be dropped again. :-) > > I've done at least basic testing on all the drivers I've converted > at some point, but more testing is definitely welcomed! > > --- > > Maarten Lankhorst (17): > drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers > drm/ttm: kill off some members to ttm_validate_buffer > drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep > drm/nouveau: require reservations for nouveau_fence_sync and > nouveau_bo_fence > drm/ttm: call ttm_bo_wait while inside a reservation > drm/ttm: kill fence_lock > drm/nouveau: rework to new fence interface > drm/radeon: add timeout argument to radeon_fence_wait_seq > drm/radeon: use common fence implementation for fences > drm/qxl: rework to new fence interface > drm/vmwgfx: get rid of different types of fence_flags entirely > drm/vmwgfx: rework to new fence interface > drm/ttm: flip the switch, and convert to dma_fence > drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep > drm/radeon: use rcu waits in some ioctls > drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab > drm/ttm: use rcu in core ttm > > drivers/gpu/drm/nouveau/core/core/event.c |4 > drivers/gpu/drm/nouveau/nouveau_bo.c | 59 +--- > drivers/gpu/drm/nouveau/nouveau_display.c | 25 +- > drivers/gpu/drm/nouveau/nouveau_fence.c | 431 > +++-- > drivers/gpu/drm/nouveau/nouveau_fence.h | 22 + > drivers/gpu/drm/nouveau/nouveau_gem.c | 55 +--- > drivers/gpu/drm/nouveau/nv04_fence.c |4 > drivers/gpu/drm/nouveau/nv10_fence.c |4 > drivers/gpu/drm/nouveau/nv17_fence.c |2 > drivers/gpu/drm/nouveau/nv50_fence.c |2 > drivers/gpu/drm/nouveau/nv84_fence.c | 11 - > drivers/gpu/drm/qxl/Makefile |2 > drivers/gpu/drm/qxl/qxl_cmd.c |7 > drivers/gpu/drm/qxl/qxl_debugfs.c | 16 + > drivers/gpu/drm/qxl/qxl_drv.h | 20 - > drivers/gpu/drm/qxl/qxl_fence.c | 91 -- > drivers/gpu/drm/qxl/qxl_kms.c |1 > drivers/gpu/drm/qxl/qxl_object.c |2 > drivers/gpu/drm/qxl/qxl_object.h |6 > drivers/gpu/drm/qxl/qxl_release.c | 172 ++-- > drivers/gpu/drm/qxl/qxl_ttm.c | 93 -- > drivers/gpu/drm/radeon/radeon.h | 15 - > drivers/gpu/drm/radeon/radeon_cs.c| 10 + > drivers/gpu/drm/radeon/radeon_device.c| 60 > drivers/gpu/drm/radeon/radeon_display.c | 21 + > drivers/gpu/drm/radeon/radeon_fence.c | 283 +++ > drivers/gpu/drm/radeon/radeon_gem.c | 19 + > drivers/gpu/drm/radeon/radeon_object.c|8 - > drivers/gpu/drm/radeon/radeon_ttm.c | 34 -- > drivers/gpu/drm/radeon/radeon_uvd.c | 10 - > drivers/gpu/drm/radeon/radeon_vm.c| 16 + > drivers/gpu/drm/ttm/ttm_bo.c | 187 ++--- > drivers/gpu/drm/ttm/ttm_bo_util.c | 28 -- > drivers/gpu/drm/ttm/ttm_bo_vm.c |3 > drivers/gpu/drm/ttm/ttm_execbuf_util.c| 146 +++--- > drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c| 47 --- > drivers/gpu/drm/vmwgfx/vmwgfx_drv.h |1 > drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 24 -- > drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 329 -- > drivers/gpu/drm/vmwgfx/vmwgfx_fence.h | 35 +- > drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 43 +-- > include/drm/ttm/ttm_bo_api.h |7 > include/drm/ttm/ttm_bo_driver.h | 29 -- > include/drm/ttm/ttm_execbuf_util.h| 22 + > 44 files changed, 1256 insertions(+), 1150 deletions(-) > delete mode 100644 drivers/gpu/drm/qxl/qxl_fence.c > > -- > Signature > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel > -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/bd03dd6a/attachment-0001.html>
[PATCH 09/17] drm/radeon: use common fence implementation for fences
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankhorst at canonical.com]
> Sent: Wednesday, July 09, 2014 8:30 AM
> To: airlied at linux.ie
> Cc: thellstrom at vmware.com; nouveau at lists.freedesktop.org; linux-
> kernel at vger.kernel.org; dri-devel at lists.freedesktop.org;
> bskeggs at redhat.com; Deucher, Alexander; Koenig, Christian
> Subject: [PATCH 09/17] drm/radeon: use common fence implementation for
> fences
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/radeon/radeon.h| 15 +-
> drivers/gpu/drm/radeon/radeon_device.c | 60 -
> drivers/gpu/drm/radeon/radeon_fence.c | 223
> ++--
> 3 files changed, 248 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h
> b/drivers/gpu/drm/radeon/radeon.h
> index 29d9cc04c04e..03a5567f2c2f 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -64,6 +64,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -116,9 +117,6 @@ extern int radeon_deep_color;
> #define RADEONFB_CONN_LIMIT 4
> #define RADEON_BIOS_NUM_SCRATCH 8
>
> -/* fence seq are set to this number when signaled */
> -#define RADEON_FENCE_SIGNALED_SEQ0LL
> -
> /* internal ring indices */
> /* r1xx+ has gfx CP ring */
> #define RADEON_RING_TYPE_GFX_INDEX 0
> @@ -350,12 +348,15 @@ struct radeon_fence_driver {
> };
>
> struct radeon_fence {
> + struct fence base;
> +
> struct radeon_device*rdev;
> - struct kref kref;
> /* protected by radeon_fence.lock */
> uint64_tseq;
> /* RB, DMA, etc. */
> unsignedring;
> +
> + wait_queue_t fence_wake;
> };
>
> int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);
> @@ -2268,6 +2269,7 @@ struct radeon_device {
> struct radeon_mman mman;
> struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
> wait_queue_head_t fence_queue;
> + unsignedfence_context;
> struct mutexring_lock;
> struct radeon_ring ring[RADEON_NUM_RINGS];
> boolib_pool_ready;
> @@ -2358,11 +2360,6 @@ u32 cik_mm_rdoorbell(struct radeon_device
> *rdev, u32 index);
> void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v);
>
> /*
> - * Cast helper
> - */
> -#define to_radeon_fence(p) ((struct radeon_fence *)(p))
> -
> -/*
> * Registers read & write functions.
> */
> #define RREG8(reg) readb((rdev->rmmio) + (reg))
> diff --git a/drivers/gpu/drm/radeon/radeon_device.c
> b/drivers/gpu/drm/radeon/radeon_device.c
> index 03686fab842d..86699df7c8f3 100644
> --- a/drivers/gpu/drm/radeon/radeon_device.c
> +++ b/drivers/gpu/drm/radeon/radeon_device.c
> @@ -1213,6 +1213,7 @@ int radeon_device_init(struct radeon_device
> *rdev,
> for (i = 0; i < RADEON_NUM_RINGS; i++) {
> rdev->ring[i].idx = i;
> }
> + rdev->fence_context =
> fence_context_alloc(RADEON_NUM_RINGS);
>
> DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X
> 0x%04X:0x%04X).\n",
> radeon_family_name[rdev->family], pdev->vendor, pdev-
> >device,
> @@ -1607,6 +1608,54 @@ int radeon_resume_kms(struct drm_device *dev,
> bool resume, bool fbcon)
> return 0;
> }
>
> +static uint32_t radeon_gpu_mask_sw_irq(struct radeon_device *rdev)
> +{
> + uint32_t mask = 0;
> + int i;
> +
> + if (!rdev->ddev->irq_enabled)
> + return mask;
> +
> + /*
> + * increase refcount on sw interrupts for all rings to stop
> + * enabling interrupts in radeon_fence_enable_signaling during
> + * gpu reset.
> + */
> +
> + for (i = 0; i < RADEON_NUM_RINGS; ++i) {
> + if (!rdev->ring[i].ready)
> + continue;
> +
> + atomic_inc(&rdev->irq.ring_int[i]);
> + mask |= 1 << i;
> + }
> + return mask;
> +}
> +
> +static void radeon_gpu_unmask_sw_irq(struct radeon_device *rdev,
> uint32_t mask)
> +{
> + unsigned long irqflags;
> + int i;
> +
> + if (!mask)
> + return;
> +
> + /*
> + * undo refcount increase, and reset irqs to correct value.
> + */
> +
> + for (i = 0; i < RADEON_NUM_RINGS; ++i) {
> + if (!(mask & (1 << i)))
> + continue;
> +
> + atomic_dec(&rdev->irq.ring_int[i]);
> + }
> +
> + spin_lock_irqsave(&rdev->irq.lock, irqflags);
> + radeon_irq_set(rdev);
> + spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
> +}
> +
> /**
> * radeon_gpu_reset - reset the asic
> *
> @@ -1624,6 +1673,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
>
> int i, r;
> int resched;
> + uint32_t sw_mask;
>
> down_write(&rde
[PATCH 00/17] Convert TTM to the new fence interface.
op 09-07-14 15:09, Mike Lothian schreef: > Hi Maarten > > Will this stop the stuttering I've been seeing with DRI3 and PRIME? Or will > other patches / plumbing be required > No, that testing was with the whole series including the parts where you synchronized intel with radeon (iirc). Although it might if lucky, I noticed that I missed a int to long conversion, which resulted in a success being reported as error, disabling graphics acceleration entirely. The series here simply convert the drivers to a common fence infrastructure, but shouldn't cause any regressions or any major behavioral changes. A separate series is needed to make intel and radeon synchronized, and for that series the support on the intel side is a hack. It should be possible to get the the radeon/nouveau changes upstreamed, but this conversion is required for that. ~Maarten
[PATCH v2 09/17] drm/radeon: use common fence implementation for fences
op 09-07-14 14:57, Deucher, Alexander schreef:
>>
>> +static const char *radeon_fence_get_timeline_name(struct fence *f)
>> +{
>> +struct radeon_fence *fence = to_radeon_fence(f);
>> +switch (fence->ring) {
>> +case RADEON_RING_TYPE_GFX_INDEX: return "radeon.gfx";
>> +case CAYMAN_RING_TYPE_CP1_INDEX: return "radeon.cp1";
>> +case CAYMAN_RING_TYPE_CP2_INDEX: return "radeon.cp2";
>> +case R600_RING_TYPE_DMA_INDEX: return "radeon.dma";
>> +case CAYMAN_RING_TYPE_DMA1_INDEX: return "radeon.dma1";
>> +case R600_RING_TYPE_UVD_INDEX: return "radeon.uvd";
> Radeon supports vce rings on newer ascis. Probably want to add the case for
> those here too.
>
> Alex
>
Indeed, how about this?
--8<---
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/radeon/radeon.h| 15 +--
drivers/gpu/drm/radeon/radeon_device.c | 60 -
drivers/gpu/drm/radeon/radeon_fence.c | 225 +++--
3 files changed, 250 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 29d9cc04c04e..03a5567f2c2f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -64,6 +64,7 @@
#include
#include
#include
+#include
#include
#include
@@ -116,9 +117,6 @@ extern int radeon_deep_color;
#define RADEONFB_CONN_LIMIT4
#define RADEON_BIOS_NUM_SCRATCH8
-/* fence seq are set to this number when signaled */
-#define RADEON_FENCE_SIGNALED_SEQ 0LL
-
/* internal ring indices */
/* r1xx+ has gfx CP ring */
#define RADEON_RING_TYPE_GFX_INDEX 0
@@ -350,12 +348,15 @@ struct radeon_fence_driver {
};
struct radeon_fence {
+ struct fence base;
+
struct radeon_device*rdev;
- struct kref kref;
/* protected by radeon_fence.lock */
uint64_tseq;
/* RB, DMA, etc. */
unsignedring;
+
+ wait_queue_t fence_wake;
};
int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);
@@ -2268,6 +2269,7 @@ struct radeon_device {
struct radeon_mman mman;
struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
wait_queue_head_t fence_queue;
+ unsignedfence_context;
struct mutexring_lock;
struct radeon_ring ring[RADEON_NUM_RINGS];
boolib_pool_ready;
@@ -2358,11 +2360,6 @@ u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32
index);
void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v);
/*
- * Cast helper
- */
-#define to_radeon_fence(p) ((struct radeon_fence *)(p))
-
-/*
* Registers read & write functions.
*/
#define RREG8(reg) readb((rdev->rmmio) + (reg))
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index 03686fab842d..86699df7c8f3 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1213,6 +1213,7 @@ int radeon_device_init(struct radeon_device *rdev,
for (i = 0; i < RADEON_NUM_RINGS; i++) {
rdev->ring[i].idx = i;
}
+ rdev->fence_context = fence_context_alloc(RADEON_NUM_RINGS);
DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X
0x%04X:0x%04X).\n",
radeon_family_name[rdev->family], pdev->vendor, pdev->device,
@@ -1607,6 +1608,54 @@ int radeon_resume_kms(struct drm_device *dev, bool
resume, bool fbcon)
return 0;
}
+static uint32_t radeon_gpu_mask_sw_irq(struct radeon_device *rdev)
+{
+ uint32_t mask = 0;
+ int i;
+
+ if (!rdev->ddev->irq_enabled)
+ return mask;
+
+ /*
+* increase refcount on sw interrupts for all rings to stop
+* enabling interrupts in radeon_fence_enable_signaling during
+* gpu reset.
+*/
+
+ for (i = 0; i < RADEON_NUM_RINGS; ++i) {
+ if (!rdev->ring[i].ready)
+ continue;
+
+ atomic_inc(&rdev->irq.ring_int[i]);
+ mask |= 1 << i;
+ }
+ return mask;
+}
+
+static void radeon_gpu_unmask_sw_irq(struct radeon_device *rdev, uint32_t mask)
+{
+ unsigned long irqflags;
+ int i;
+
+ if (!mask)
+ return;
+
+ /*
+* undo refcount increase, and reset irqs to correct value.
+*/
+
+ for (i = 0; i < RADEON_NUM_RINGS; ++i) {
+ if (!(mask & (1 << i)))
+ continue;
+
+ atomic_dec(&rdev->irq.ring_int[i]);
+ }
+
+ spin_lock_irqsave(&rdev->irq.lock, irqflags);
+ radeon_irq_set(rdev);
+ spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
+}
+
/**
* radeon_gpu_reset - reset the asic
*
@@ -1624,6 +1673,7 @@ int radeon_gpu_reset(struct ra
[PATCH] Reenabling SS on Cayman
On Tue, Jul 8, 2014 at 10:27 PM, Alexandre Demers
wrote:
> It reverts commit c745fe611ca42295c9d91d8e305d27983e9132ef now that
> Cayman is stable since VDDCI fix. Spread spectrum was not the culprit.
>
> Signed-off-by: Alexandre Demers
Applied. thanks!
Alex
>
> ---
> drivers/gpu/drm/radeon/rv770_dpm.c | 6 --
> 1 file changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c
> b/drivers/gpu/drm/radeon/rv770_dpm.c
> index da041a4..3c76e1d 100644
> --- a/drivers/gpu/drm/radeon/rv770_dpm.c
> +++ b/drivers/gpu/drm/radeon/rv770_dpm.c
> @@ -2329,12 +2329,6 @@ void rv770_get_engine_memory_ss(struct radeon_device
> *rdev)
> pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss,
>
> ASIC_INTERNAL_MEMORY_SS, 0);
>
> - /* disable ss, causes hangs on some cayman boards */
> - if (rdev->family == CHIP_CAYMAN) {
> - pi->sclk_ss = false;
> - pi->mclk_ss = false;
> - }
> -
> if (pi->sclk_ss || pi->mclk_ss)
> pi->dynamic_ss = true;
> else
> --
> 2.0.1
>
[GIT PULL] msm drm update for component changes
On Wed, Jul 9, 2014 at 8:26 AM, Russell King - ARM Linux wrote: > On Wed, Jul 09, 2014 at 06:56:14AM -0400, Rob Clark wrote: >> On Wed, Jul 9, 2014 at 5:34 AM, Russell King wrote: >> > David, >> > >> > Please incorporate the latest msm drm update for component changes, which >> > can be found at: >> > >> > git://ftp.arm.linux.org.uk/~rmk/linux-arm.git component-for-drm >> > >> > with SHA1 84448288546d13d7e06fd6638fb78ddff559b399. >> > >> > This updates the MSM's DRM driver for the updates merged in Greg's >> > driver-core tree, converting MSM to use the pre-declared array of >> > matches rather than walking the device tree each time we try to bind. >> >> Hey Russell, do you want me to take this for my v3.17 pull req? I >> expect there will be some minor conflicts with the DT support I'm >> working on at the moment. >> >> Or does this need to be applied together with the rest of the series? >> In which case, maybe it should go first, and then I'd rebase msm-next >> on top. > > The patch for MSM is dependent on the component changes, which have > already been merged by Greg for the driver-core tree. I don't have > anything following this, so if you instead want to merge my > component-for-driver branch (which is what Greg's pulled, which is a > sub-set of this pull), and then add this patch on top of your > development, that's fine too. ok, it sounds like it is probably easiest for Dave to take your pull req after drm-next picks up the driver-core updates? anyways, if needed, I can coordinate with Dave about that. Sounds easiest if I rebase my stuff on top of that before sending my pull req for 3.17. > The only reason it's a pull request and not a single patch is to ensure > that the previous component commits don't end up being duplicated with > different commit IDs across several trees by being applied independently > as patches (which can end up causing unnecessary git conflicts.) sure, no prob about a pull-req.. just wanted to sort out what order things get merged in BR, -R > -- > FTTC broadband for 0.8mile line: now at 9.5Mbps down 400kbps up.
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #25 from smoki --- (In reply to comment #23) > (In reply to comment #21) > > Created attachment 102470 [details] [review] [review] > > radeonsi: Handle sampler depth compare mode > > > > This Mesa patch seems to fix the apitrace for me. Can you confirm? > > > I can confirm :) i tried this patch and this works fine for me on Kabini > (Radeon 8400), 'glretrace -b -S 5670984' produce same image as Catalyst. > Cool :). BTW just to be aware of i see some side effects of this patch, for example performance in Unigine Sanctuary goes down by ~40% for me :). -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/f554f666/attachment.html>
[RESEND PATCH v3 05/11] drm: add Atmel HLCDC Display Controller support
On Wed, Jul 09, 2014 at 09:14:24AM +0200, Boris BREZILLON wrote: > Hi Matt, > > On Tue, 8 Jul 2014 16:51:24 -0700 > Matt Roper wrote: > > > Hi Boris. > > > > I haven't really looked at any of your driver in depth, but from a quick > > glance it looks like you're registering a cursor drm_plane (i.e., making > > use of the new universal plane infrastructure), but you're also > > providing an implementation of the legacy cursor ioctls (cursor_set and > > cursor_move). There's some patches working their way through the > > pipeline that should make this unnecessary and hopefully simplify your > > life a bit: > > > > > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=c394c2b08e247c32ef292b75fd8b34312465f8ae > > > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=b36552b32aa9c69e83a3a20bda56379fb9e52435 > > > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=161d0dc1dccb17ff7a38f462c7c0d4ef8bcc5662 > > > > http://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=fc1d3e44ef7c1db93384150fdbf8948dcf949f15 > > > > The third patch there is the one that's really important for your work. > > When a driver provides a cursor plane via the universal plane interface, > > cursor_set and cursor_move are automatically implemented for you by > > drm_mode_cursor_universal() in drivers/gpu/drm/drm_crtc.c and your > > legacy handlers will never get called. drm_mode_cursor_universal() will > > take care of wrapping the bo's into a drm_framebuffer for you. > > > > When I added the universal cursor stuff, I wanted to make sure that as > > soon as a driver starts supporting universal planes it can stop > > supporting the legacy ioctls directly; otherwise handling refcounting > > when userspace switches back and forth between calling legacy ioctl's > > and calling setplane() on a cursor plane would be a nightmare. > > > > I think those patches are only available in drm-intel-nightly at the > > moment and haven't moved on to drm-next and such yet, since i915 is the > > only driver that currently has patches to make use of cursors via the > > univeral plane interface (probably landing for kernel 3.17). > > That's great news. I knew there were some work in progress on this > topic, but didn't know it was planned for 3.17. > > I'll move to this solution. As of today those patches have landed in Dave's drm-next branch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
[Bug 81066] [r600g] Second Life causes GPU to lock up sometimes with DRI_PRIME
: 0002 RBX: RCX: 0002 [ 1371.160008] RDX: RSI: 0001 RDI: 0002 [ 1371.160008] RBP: 880250f7fac0 R08: 00ff R09: 0692 [ 1371.160008] R10: 2000 R11: 2e29303030303430 R12: 8000 [ 1371.160008] R13: 00ff R14: R15: [ 1371.160008] FS: 7f08a40cf9c0() GS:88025bc0() knlGS: [ 1371.160008] CS: 0010 DS: ES: CR0: 8005003b [ 1371.160008] CR2: 7f6a7aca7000 CR3: 00024f7a2000 CR4: 000427f0 [ 1371.160008] Stack: [ 1371.160008] 88009d104000 00020200 88009d104000 c352 [ 1371.160008] cb52 0000 880250f7fb18 [ 1371.160008] a019a52c [ 1371.160008] Call Trace: [ 1371.160008] [] r600_startup+0x85c/0x16e0 [radeon] [ 1371.160008] [] r600_resume+0x33/0x70 [radeon] [ 1371.160008] [] radeon_gpu_reset+0x131/0x2c0 [radeon] [ 1371.160008] [] radeon_cs_ioctl+0x2ef/0x720 [radeon] [ 1371.160008] [] drm_ioctl+0x1df/0x680 [drm] [ 1371.160008] [] ? __do_page_fault+0x29c/0x580 [ 1371.160008] [] radeon_drm_ioctl+0x4c/0x80 [radeon] [ 1371.160008] [] do_vfs_ioctl+0x2d0/0x4b0 [ 1371.160008] [] SyS_ioctl+0x81/0xa0 [ 1371.160008] [] system_call_fastpath+0x16/0x1b [ 1371.160008] Code: b6 ed 45 09 c5 41 80 fd ff 45 0f 44 e8 d3 e7 89 7d d4 44 89 ef e8 97 ff ff ff 8b 4d d4 41 29 c7 44 39 f9 72 6c 89 c8 31 d2 89 cf <41> f7 f7 44 0f af f8 89 c6 48 8b 45 c8 44 29 ff 83 b8 70 01 00 [ 1371.160008] RIP [] r6xx_remap_render_backend+0x6a/0xe0 [radeon] [ 1371.160008] RSP [ 1371.405115] ---[ end trace e07978cfec9678e4 ]--- We go no further, X is locked up, and I have to do a cold poweroff since systemd doesn't shut it down ever cleanly from ssh console. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/a70e8ddb/attachment-0001.html>
[Bug 79011] GPU lockup, screen freeze with Radeon HD7770
https://bugzilla.kernel.org/show_bug.cgi?id=79011 --- Comment #15 from Fabian Pas --- (In reply to Paul Menzel from comment #13) > (In reply to Fabian Pas from comment #0) > > > I am running 64 bit Arch Linux on kernel 3.15, the bug also occured with > > 3.14, with Intel i5 processor and a AMD Radeon HD7770 graphics card. After a > > while (randomly), both monitors go to sleep. Sometimes, they wake up after > > 10-20 seconds and I can continue using the computer, but more often they > > won't and it requires a hard reboot. > > Can you get the monitors working again by plugging their power cable out and > back in? > > [?] That doesn't work either. -- You are receiving this mail because: You are watching the assignee of the bug.
[RFC] drm/exynos: abort commit when framebuffer is removed from plane
On 2014? 07? 09? 20:06, Rahul Sharma wrote: > On 8 July 2014 21:25, Inki Dae wrote: >> 2014-06-20 0:13 GMT+09:00 Rahul Sharma : >>> This situation arises when userspace remove the frambuffer object >>> and call setmode ioctl. >>> >>> drm_mode_rmfb --> drm_plane_force_disable --> plane->crtc = NULL; >>> and >>> drm_mode_setcrtc --> exynos_plane_commit --> passes plane->crtc to >>> exynos_drm_crtc_plane_commit which is NULL. >> >> If user process requested drm_mode_rmfb with a fb_id, fb object to the >> fb_id must be removed from crtc_idr table. So drm_mode_setcrtc should >> be failed because there is no the fb object in the crtc_idr table >> anymore. >> I cannot understand how exynos_drm_crtc_plane_commit function could be >> called. Can you give me more details? > > Inki, > > These logs should clarify more about the problem: Thanks. And how can I reenact below problem? if we could reenact this problem, we may find out fundamental problem and resolve it in more generic. Can I get example code? Thanks, Inki Dae > > localhost ~ # halt > localhost ~ # [ 130.570309] init: debugd main process (781) killed by > TERM signal > [ 130.602453] init: lid_touchpad_helper main process (2100) killed by > TERM signal > [ 131.374955] CPU: 2 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ > #623 > [ 131.380558] [] (unwind_backtrace) from [] > (show_stack+0x20/0x24) > [ 131.388327] [] (show_stack) from [] > (dump_stack+0x7c/0x98) > [ 131.395522] [] (dump_stack) from [] > (exynos_drm_crtc_plane_commit+0x20/0x40) > [ 131.404263] [] (exynos_drm_crtc_plane_commit) from > [] (exynos_plane_commit+0x24/0x28) > [ 131.413779] [] (exynos_plane_commit) from [] > (exynos_drm_crtc_commit+0x2c/0x54) > [ 131.422802] [] (exynos_drm_crtc_commit) from [] > (exynos_drm_crtc_mode_set_commit.isra.1+0x8c/0xa0) > [ 131.433468] [] (exynos_drm_crtc_mode_set_commit.isra.1) > from [] (exynos_drm_crtc_page_flip+0x100/0x174) > [ 131.444587] [] (exynos_drm_crtc_page_flip) from > [] (drm_mode_page_flip_ioctl+0x1f0/0x2b0) > -->> [ 131.454460] [] (drm_mode_page_flip_ioctl) from > [] (drm_ioctl+0x270/0x44c) > [ 131.462966] [] (drm_ioctl) from [] > (do_vfs_ioctl+0x4e4/0x5a0) > [ 131.470397] [] (do_vfs_ioctl) from [] > (SyS_ioctl+0x5c/0x84) > [ 131.477728] [] (SyS_ioctl) from [] > (ret_fast_syscall+0x0/0x30) > [ 131.762797] CPU: 1 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ > #623 > [ 131.768378] [] (unwind_backtrace) from [] > (show_stack+0x20/0x24) > [ 131.776151] [] (show_stack) from [] > (dump_stack+0x7c/0x98) > [ 131.783315] [] (dump_stack) from [] > (drm_plane_force_disable+0x5c/0x68) > [ 131.791658] [] (drm_plane_force_disable) from > [] (drm_framebuffer_remove+0xe4/0x110) > [ 131.801070] [] (drm_framebuffer_remove) from [] > (drm_mode_rmfb+0xd4/0xfc) > -->> [ 131.809597] [] (drm_mode_rmfb) from [] > (drm_ioctl+0x270/0x44c) > [ 131.817135] [] (drm_ioctl) from [] > (do_vfs_ioctl+0x4e4/0x5a0) > [ 131.824609] [] (do_vfs_ioctl) from [] > (SyS_ioctl+0x5c/0x84) > [ 131.831884] [] (SyS_ioctl) from [] > (ret_fast_syscall+0x0/0x30) > [ 132.077803] CPU: 0 PID: 834 Comm: X Tainted: GW 3.16.0-rc1+ > #623 > [ 132.083413] [] (unwind_backtrace) from [] > (show_stack+0x20/0x24) > [ 132.09] [] (show_stack) from [] > (dump_stack+0x7c/0x98) > [ 132.098343] [] (dump_stack) from [] > (exynos_drm_crtc_plane_commit+0x20/0x40) > [ 132.107098] [] (exynos_drm_crtc_plane_commit) from > [] (exynos_plane_commit+0x24/0x28) > [ 132.116631] [] (exynos_plane_commit) from [] > (exynos_drm_crtc_commit+0x2c/0x54) > [ 132.125660] [] (exynos_drm_crtc_commit) from [] > (exynos_drm_crtc_mode_set_commit.isra.1+0x8c/0xa0) > [ 132.136330] [] (exynos_drm_crtc_mode_set_commit.isra.1) > from [] (exynos_drm_crtc_mode_set_base+0x18/0x1c) > [ 132.147605] [] (exynos_drm_crtc_mode_set_base) from > [] (drm_crtc_helper_set_config+0x828/0x8a4) > [ 132.158029] [] (drm_crtc_helper_set_config) from > [] (drm_mode_set_config_internal+0x58/0xc0) > [ 132.168155] [] (drm_mode_set_config_internal) from > [] (drm_mode_setcrtc+0x388/0x4ac) > -->> [ 132.177630] [] (drm_mode_setcrtc) from [] > (drm_ioctl+0x270/0x44c) > [ 132.185417] [] (drm_ioctl) from [] > (do_vfs_ioctl+0x4e4/0x5a0) > [ 132.192897] [] (do_vfs_ioctl) from [] > (SyS_ioctl+0x5c/0x84) > [ 132.200138] [] (SyS_ioctl) from [] > (ret_fast_syscall+0x0/0x30) > [ 132.207735] Unable to handle kernel NULL pointer dereference at > virtual address 032c > .. > .. > [ 132.510786] ff80: b6ebdeb8 bee1d5e8 c06864a2 0036 c000e5a4 > ecf0e000 ecf0ffa8 > [ 132.518941] ffa0: c000e380 c01130f4 b6ebdeb8 bee1d5e8 0005 > c06864a2 bee1d5e8 0001 > [ 132.527095] ffc0: b6ebdeb8 bee1d5e8 c06864a2 0036 b85d4a74 > b8702a60 bee1d688 > [ 132.535250] ffe0: b6a82f30 bee1d5cc b6a75cff b6bce50c 0010 > 0005 e1a0c00d e92dd800 > [ 132.543408] [] (exynos_drm_crtc_plane_commit) from > [] (exynos_plane_commit+0x24/0x28) > [ 132.552949] [] (exynos_plane_commit) from []
[PATCH 00/12] drm/exynos/ipp: image post processing improvements, part three
On 2014? 07? 03? 22:10, Andrzej Hajda wrote: > This set of independent patches contains various improvement and fixes > for exynos_drm ipp framework. > The patchset is based on exynos-drm-next branch. > Did you test ipp module using libdrm? If so, can you share the app? I would try to test this patch series before merging them. Mainline libdrm has no any ipp interfaces. Thanks, Inki Dae > Regards > Andrzej > > > Andrzej Hajda (12): > drm/exynos/ipp: remove type casting > drm/exynos/ipp: remove unused field from exynos_drm_ipp_private > drm/exynos/ipp: remove struct exynos_drm_ipp_private > drm/exynos/ipp: correct address type > drm/exynos/ipp: remove temporary variable > drm/exynos/ipp: remove incorrect checks of list_first_entry result > drm/exynos/ipp: simplify memory check function > drm/exynos/ipp: remove useless registration checks > drm/exynos/ipp: simplify ipp_find_obj > drm/exynos/ipp: remove redundant messages > drm/exynos/ipp: simplify ipp_create_id > drm/exynos/ipp: simplify ipp_find_driver > > drivers/gpu/drm/exynos/exynos_drm_drv.h | 7 +- > drivers/gpu/drm/exynos/exynos_drm_ipp.c | 259 > +--- > drivers/gpu/drm/exynos/exynos_drm_ipp.h | 4 +- > 3 files changed, 73 insertions(+), 197 deletions(-) >
[PATCH RFC] drm: add of_graph endpoint helper to find possible CRTCs
On Thu, Jul 03, 2014 at 06:36:47PM -0400, Rob Clark wrote: > On Thu, Jul 3, 2014 at 12:49 PM, Russell King > wrote: > > Add a helper to allow encoders to find their possible CRTCs from the > > OF graph without having to re-implement this functionality. We add a > > device_node to drm_crtc which corresponds with the port node in the > > DT description of the CRTC device. > > > > We can then scan the DRM device list for CRTCs to find their index, > > matching the appropriate CRTC using the port device_node, thus building > > up the possible CRTC mask. > > > > Signed-off-by: Russell King > > --- > > This helper will be shared between imx-drm and Armada DRM, and should > > be useful for other OF-based drivers. At the moment, this is being > > sent for comments and acks; I need to build upon this patch in order > > to convert Armada DRM to DT. > > > > drivers/gpu/drm/Makefile | 1 + > > drivers/gpu/drm/drm_of.c | 65 > > > > include/drm/drm_crtc.h | 2 ++ > > include/drm/drm_of.h | 18 ++ > > oh, probably also should get links in Documentation/DocBook/drm.tmpl Hmm... can you advise a suitable location... I've never touched that stuff before, and it seems I can't even get it to build on my machine: Warning(.../include/drm/drm_flip_work.h:68): No description found for parameter ')' Warning(.../include/drm/drm_flip_work.h:68): Excess struct/union/enum/typedef member 'fifo' description in 'drm_flip_work' Warning(.../include/drm/drm_flip_work.h:68): No description found for parameter ')' Warning(.../include/drm/drm_flip_work.h:68): Excess struct/union/enum/typedef member 'fifo' description in 'drm_flip_work' DOCPROC Documentation/DocBook/w1.xml DOCPROC Documentation/DocBook/writing_musb_glue_layer.xml PDF Documentation/DocBook/z8530book.pdf Making portrait pages on A4 paper (210mmx297mm) sh: /usr/share/xmlto/format/docbook/../fo/pdf: No such file or directory make[2]: *** [Documentation/DocBook/z8530book.pdf] Error 1 make[2]: *** Waiting for unfinished jobs make[1]: *** [pdfdocs] Error 2 make: *** [sub-make] Error 2 I guess my install is too old for it. Thanks. -- FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up according to speedtest.net.
[PATCH v5 05/14] drm/exynos: dsi: add pass TE host ops to support LCD I80 interface
On Tue, Jul 08, 2014 at 09:39:38AM +0900, YoungJun Cho wrote:
> To support LCD I80 interface, the DSI host calls this function
> to notify the panel tearing effect synchronization signal to
> the CRTC device manager to trigger to transfer video image.
>
> Signed-off-by: YoungJun Cho
> Acked-by: Inki Dae
> Acked-by: Kyungmin Park
> ---
> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 11 +++
> include/drm/drm_mipi_dsi.h | 7 +++
> 2 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> index dad543a..76e34ca 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> @@ -24,6 +24,7 @@
> #include
> #include
>
> +#include "exynos_drm_crtc.h"
> #include "exynos_drm_drv.h"
>
> /* returns true iff both arguments logically differs */
> @@ -1041,10 +1042,20 @@ static ssize_t exynos_dsi_host_transfer(struct
> mipi_dsi_host *host,
> return (ret < 0) ? ret : xfer.rx_done;
> }
>
> +static void exynos_dsi_host_pass_te(struct mipi_dsi_host *host)
> +{
> + struct exynos_dsi *dsi = host_to_dsi(host);
> + struct drm_encoder *encoder = dsi->encoder;
> +
> + if (dsi->state & DSIM_STATE_ENABLED)
> + exynos_drm_crtc_te_handler(encoder->crtc);
> +}
> +
> static const struct mipi_dsi_host_ops exynos_dsi_ops = {
> .attach = exynos_dsi_host_attach,
> .detach = exynos_dsi_host_detach,
> .transfer = exynos_dsi_host_transfer,
> + .pass_te = exynos_dsi_host_pass_te,
> };
>
> static int exynos_dsi_poweron(struct exynos_dsi *dsi)
> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
> index 944f33f..3f21bea 100644
> --- a/include/drm/drm_mipi_dsi.h
> +++ b/include/drm/drm_mipi_dsi.h
> @@ -49,6 +49,12 @@ struct mipi_dsi_msg {
> * @detach: detach DSI device from DSI host
> * @transfer: send and/or receive DSI packet, return number of received
> bytes,
> * or error
> + * @pass_te: call the crtc te_handler() callback from DSI host.
> + *The panel generates tearing effect synchronization signal between
> + *MCU and FB to display video images. And the display controller
> + *should trigger to transfer video image at this signal. So the panel
> + *receives the TE IRQ, then calls this function to notify it to the
> + *display controller.
> */
> struct mipi_dsi_host_ops {
> int (*attach)(struct mipi_dsi_host *host,
> @@ -57,6 +63,7 @@ struct mipi_dsi_host_ops {
> struct mipi_dsi_device *dsi);
> ssize_t (*transfer)(struct mipi_dsi_host *host,
> struct mipi_dsi_msg *msg);
> + void (*pass_te)(struct mipi_dsi_host *host);
I've objected to this particular change before and that objection still
stands. I don't see how this is related to DSI. It seems like an
implementation detail of this particular setup and I think it should be
handled differently (within the Exynos DSI controller implementation
possibly).
Laurent also asked you to split this up into two patches, one for the
core part, the other for the Exynos driver parts, yet this patch
contains both changes.
Thierry
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[PATCH v5 00/14] drm/exynos: support LCD I80 interface display
On Thu, Jul 10, 2014 at 12:07:08AM +0900, Inki Dae wrote: > On 2014? 07? 08? 09:39, YoungJun Cho wrote: > > Hi, > > > > This series adds LCD I80 interface display support for Exynos DRM driver. > > The FIMD(display controller) specification describes it as "LCD I80 > > interface" > > and the DSI specification describes it as "Command mode interface". > > > > This is based on exynos-drm-next branch. > > Thanks for contributions. Picked them up. I'd prefer if you didn't pick them up. See comments to patch 5. Thierry -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/1015550e/attachment.sig>
[Bug 80141] Fails to page flip multiple time, queue overflows waiting for one to finish that never does crashing entire system.
https://bugs.freedesktop.org/show_bug.cgi?id=80141 Aaron B changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |DUPLICATE --- Comment #17 from Aaron B --- Seems to be a duplicate of Bug #79980. *** This bug has been marked as a duplicate of bug 79980 *** -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/3e475957/attachment.html>
[Bug 79980] Random radeonsi crashes
https://bugs.freedesktop.org/show_bug.cgi?id=79980 Aaron B changed: What|Removed |Added CC||aaronbottegal at gmail.com --- Comment #25 from Aaron B --- *** Bug 80141 has been marked as a duplicate of this bug. *** -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/ca281615/attachment-0001.html>
[Bug 79980] Random radeonsi crashes
https://bugs.freedesktop.org/show_bug.cgi?id=79980 --- Comment #26 from Aaron B --- (In reply to comment #24) > This bug is still present in 3.16 rc4, and 3.15.4. This sounds exactly like the bug I talk about in Bug #80141. I'll mark my bug as duplicate of it. Could Mesa commit c8011c1885003b79c9f0c6530e46ae6cb0e69575 have anything to do with what made 370184e813b25b463ad3dc9ca814231c98b95864 need to happen? Think that could be re-enabled for our GPU's now or not? Also, would the geometry shaders have any effect on our GPU's as Mesa just patched a couple leaks on those. These 2 fixes look like good ones fore this problem, as this problem was very random and sporadic, and that is the definition of a good, small leak. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/0ed56bcd/attachment.html>
[Bug 79980] Random radeonsi crashes
https://bugs.freedesktop.org/show_bug.cgi?id=79980 --- Comment #27 from darkbasic --- This bug is so annoying that I switched to Catalyst :-( -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/b7ad32d8/attachment.html>
[PATCH 1/2] drm/radeon: enable display scaling on all connectors
This enables the display scaler on all connectors for r5xx
and newer asics. Previously we only enabled the scaler for
fixed mode displays (eDP or LVDS) since they have to use the
scaler to support non-native modes. Most other displays
are multi-sync or have a built in scaler to support non-native
modes. The default scaling mode for non-fixed displays is
none which will use the scaler in the monitor. Note that
we do not populate any fake modes like we do for fixed
displays so it will only use the modes in the edid. For
other modes, you'll need to populate them manually.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=80868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_encoders.c | 10 +--
drivers/gpu/drm/radeon/radeon_connectors.c | 97 +-
2 files changed, 86 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c
b/drivers/gpu/drm/radeon/atombios_encoders.c
index 2b29084..f27f0f7 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -327,12 +327,10 @@ static bool radeon_atom_mode_fixup(struct drm_encoder
*encoder,
&& (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay
+ 2;
- /* get the native mode for LVDS */
- if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT))
+ /* get the native mode for scaling */
+ if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
radeon_panel_mode_fixup(encoder, adjusted_mode);
-
- /* get the native mode for TV */
- if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
+ } else if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
struct radeon_encoder_atom_dac *tv_dac =
radeon_encoder->enc_priv;
if (tv_dac) {
if (tv_dac->tv_std == TV_STD_NTSC ||
@@ -342,6 +340,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder
*encoder,
else
radeon_atom_get_tv_timings(rdev, 1,
adjusted_mode);
}
+ } else if (radeon_encoder->rmx_type != RMX_OFF) {
+ radeon_panel_mode_fixup(encoder, adjusted_mode);
}
if (ASIC_IS_DCE3(rdev) &&
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 4483119..05d9d06 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -285,6 +285,19 @@ static struct drm_encoder
*radeon_best_single_encoder(struct drm_connector *conn
return NULL;
}
+static void radeon_get_native_mode(struct drm_connector *connector)
+{
+ struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+ struct drm_display_mode *preferred_mode =
+ list_first_entry(&connector->probed_modes,
+struct drm_display_mode, head);
+
+ if (preferred_mode && encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ radeon_encoder->native_mode = *preferred_mode;
+ }
+}
+
/*
* radeon_connector_analog_encoder_conflict_solve
* - search for other connectors sharing this encoder
@@ -585,6 +598,31 @@ static int radeon_connector_set_property(struct
drm_connector *connector, struct
radeon_property_change_mode(&radeon_encoder->base);
}
+ if (property == dev->mode_config.scaling_mode_property) {
+ enum radeon_rmx_type rmx_type;
+
+ if (connector->encoder)
+ radeon_encoder = to_radeon_encoder(connector->encoder);
+ else {
+ struct drm_connector_helper_funcs *connector_funcs =
connector->helper_private;
+ radeon_encoder =
to_radeon_encoder(connector_funcs->best_encoder(connector));
+ }
+
+ switch (val) {
+ default:
+ case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
+ case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
+ case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
+ case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
+ }
+ if (radeon_encoder->rmx_type == rmx_type)
+ return 0;
+
+ radeon_encoder->rmx_type = rmx_type;
+
+ radeon_property_change_mode(&radeon_encoder->base);
+ }
+
return 0;
}
@@ -802,6 +840,9 @@ static int radeon_vga_get_modes(struct drm_connector
*connector)
ret = radeon_ddc_get_modes(radeon_connector);
+ if (ret)
+ radeon_get_native_mode(connector);
+
return ret;
}
@@ -1005,6 +1046,10 @@ static int radeon_dvi_get_modes(struct drm_connector
*connector)
i
[PATCH 1/2] drm/radeon: enable display scaling on all connectors
This enables the display scaler on all connectors for r5xx
and newer asics. Previously we only enabled the scaler for
fixed mode displays (eDP or LVDS) since they have to use the
scaler to support non-native modes. Most other displays
are multi-sync or have a built in scaler to support non-native
modes. The default scaling mode for non-fixed displays is
none which will use the scaler in the monitor. Note that
we do not populate any fake modes like we do for fixed
displays so it will only use the modes in the edid. For
other modes, you'll need to populate them manually.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=80868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_encoders.c | 10 +--
drivers/gpu/drm/radeon/radeon_connectors.c | 97 +-
2 files changed, 86 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c
b/drivers/gpu/drm/radeon/atombios_encoders.c
index 2b29084..f27f0f7 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -327,12 +327,10 @@ static bool radeon_atom_mode_fixup(struct drm_encoder
*encoder,
&& (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay
+ 2;
- /* get the native mode for LVDS */
- if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT))
+ /* get the native mode for scaling */
+ if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
radeon_panel_mode_fixup(encoder, adjusted_mode);
-
- /* get the native mode for TV */
- if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
+ } else if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
struct radeon_encoder_atom_dac *tv_dac =
radeon_encoder->enc_priv;
if (tv_dac) {
if (tv_dac->tv_std == TV_STD_NTSC ||
@@ -342,6 +340,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder
*encoder,
else
radeon_atom_get_tv_timings(rdev, 1,
adjusted_mode);
}
+ } else if (radeon_encoder->rmx_type != RMX_OFF) {
+ radeon_panel_mode_fixup(encoder, adjusted_mode);
}
if (ASIC_IS_DCE3(rdev) &&
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 4483119..05d9d06 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -285,6 +285,19 @@ static struct drm_encoder
*radeon_best_single_encoder(struct drm_connector *conn
return NULL;
}
+static void radeon_get_native_mode(struct drm_connector *connector)
+{
+ struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+ struct drm_display_mode *preferred_mode =
+ list_first_entry(&connector->probed_modes,
+struct drm_display_mode, head);
+
+ if (preferred_mode && encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ radeon_encoder->native_mode = *preferred_mode;
+ }
+}
+
/*
* radeon_connector_analog_encoder_conflict_solve
* - search for other connectors sharing this encoder
@@ -585,6 +598,31 @@ static int radeon_connector_set_property(struct
drm_connector *connector, struct
radeon_property_change_mode(&radeon_encoder->base);
}
+ if (property == dev->mode_config.scaling_mode_property) {
+ enum radeon_rmx_type rmx_type;
+
+ if (connector->encoder)
+ radeon_encoder = to_radeon_encoder(connector->encoder);
+ else {
+ struct drm_connector_helper_funcs *connector_funcs =
connector->helper_private;
+ radeon_encoder =
to_radeon_encoder(connector_funcs->best_encoder(connector));
+ }
+
+ switch (val) {
+ default:
+ case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
+ case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
+ case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
+ case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
+ }
+ if (radeon_encoder->rmx_type == rmx_type)
+ return 0;
+
+ radeon_encoder->rmx_type = rmx_type;
+
+ radeon_property_change_mode(&radeon_encoder->base);
+ }
+
return 0;
}
@@ -802,6 +840,9 @@ static int radeon_vga_get_modes(struct drm_connector
*connector)
ret = radeon_ddc_get_modes(radeon_connector);
+ if (ret)
+ radeon_get_native_mode(connector);
+
return ret;
}
@@ -1005,6 +1046,10 @@ static int radeon_dvi_get_modes(struct drm_connector
*connector)
i
[PATCH 2/2] drm/radeon: consolidate vga and dvi get_modes functions
They are identical.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 05d9d06..9bcd243 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1040,19 +1040,6 @@ static const struct drm_connector_funcs
radeon_tv_connector_funcs = {
.set_property = radeon_connector_set_property,
};
-static int radeon_dvi_get_modes(struct drm_connector *connector)
-{
- struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
- int ret;
-
- ret = radeon_ddc_get_modes(radeon_connector);
-
- if (ret)
- radeon_get_native_mode(connector);
-
- return ret;
-}
-
static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
@@ -1355,7 +1342,7 @@ static int radeon_dvi_mode_valid(struct drm_connector
*connector,
}
static const struct drm_connector_helper_funcs
radeon_dvi_connector_helper_funcs = {
- .get_modes = radeon_dvi_get_modes,
+ .get_modes = radeon_vga_get_modes,
.mode_valid = radeon_dvi_mode_valid,
.best_encoder = radeon_dvi_encoder,
};
--
1.8.3.1
[Bug 80868] Support screen scaling modes for external monitors
https://bugs.freedesktop.org/show_bug.cgi?id=80868 Alex Deucher changed: What|Removed |Added Attachment #102216|0 |1 is obsolete|| --- Comment #10 from Alex Deucher --- Created attachment 102491 --> https://bugs.freedesktop.org/attachment.cgi?id=102491&action=edit working patch This patch works for me. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/bc332a87/attachment.html>
[PATCH RFC] drm: add of_graph endpoint helper to find possible CRTCs
On Wed, Jul 9, 2014 at 11:16 AM, Russell King - ARM Linux wrote: > On Thu, Jul 03, 2014 at 06:36:47PM -0400, Rob Clark wrote: >> On Thu, Jul 3, 2014 at 12:49 PM, Russell King >> wrote: >> > Add a helper to allow encoders to find their possible CRTCs from the >> > OF graph without having to re-implement this functionality. We add a >> > device_node to drm_crtc which corresponds with the port node in the >> > DT description of the CRTC device. >> > >> > We can then scan the DRM device list for CRTCs to find their index, >> > matching the appropriate CRTC using the port device_node, thus building >> > up the possible CRTC mask. >> > >> > Signed-off-by: Russell King >> > --- >> > This helper will be shared between imx-drm and Armada DRM, and should >> > be useful for other OF-based drivers. At the moment, this is being >> > sent for comments and acks; I need to build upon this patch in order >> > to convert Armada DRM to DT. >> > >> > drivers/gpu/drm/Makefile | 1 + >> > drivers/gpu/drm/drm_of.c | 65 >> > >> > include/drm/drm_crtc.h | 2 ++ >> > include/drm/drm_of.h | 18 ++ >> >> oh, probably also should get links in Documentation/DocBook/drm.tmpl > > Hmm... can you advise a suitable location... I've never touched that > stuff before, and it seems I can't even get it to build on my machine: > > Warning(.../include/drm/drm_flip_work.h:68): No description found for > parameter ')' > Warning(.../include/drm/drm_flip_work.h:68): Excess struct/union/enum/typedef > member 'fifo' description in 'drm_flip_work' > Warning(.../include/drm/drm_flip_work.h:68): No description found for > parameter ')' > Warning(.../include/drm/drm_flip_work.h:68): Excess struct/union/enum/typedef > member 'fifo' description in 'drm_flip_work' > DOCPROC Documentation/DocBook/w1.xml > DOCPROC Documentation/DocBook/writing_musb_glue_layer.xml > PDF Documentation/DocBook/z8530book.pdf > Making portrait pages on A4 paper (210mmx297mm) > sh: /usr/share/xmlto/format/docbook/../fo/pdf: No such file or directory > make[2]: *** [Documentation/DocBook/z8530book.pdf] Error 1 > make[2]: *** Waiting for unfinished jobs > make[1]: *** [pdfdocs] Error 2 > make: *** [sub-make] Error 2 hmm, I usually use 'make htmldocs'.. hadn't really bothered to try to build pdf docs. It was a while ago, but I think 'xmlto-tex' would be what you need for fedora to get docs to build. Hopefully the package has a similar name on other distros. There are unfortunately a lot of warnings.. the headerdoc stuff is not always as clever as you would like. BR, -R > I guess my install is too old for it. > > Thanks. > > -- > FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up > according to speedtest.net.
[PATCH 2/3] drm/radeon: add readonly flag to radeon_gart_set_page
From: Christian K?nig
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/r100.c| 2 +-
drivers/gpu/drm/radeon/r300.c| 8 ++--
drivers/gpu/drm/radeon/radeon.h | 8
drivers/gpu/drm/radeon/radeon_asic.h | 8
drivers/gpu/drm/radeon/radeon_gart.c | 4 ++--
drivers/gpu/drm/radeon/rs400.c | 9 +++--
drivers/gpu/drm/radeon/rs600.c | 8 ++--
7 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index ed1c53e..bffbb14 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -682,7 +682,7 @@ void r100_pci_gart_disable(struct radeon_device *rdev)
}
void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
- uint64_t addr)
+ uint64_t addr, bool readonly)
{
u32 *gtt = rdev->gart.ptr;
gtt[i] = cpu_to_le32(lower_32_bits(addr));
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 8d14e66..2ea3d29 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -73,13 +73,17 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
#define R300_PTE_READABLE (1 << 3)
void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
- uint64_t addr)
+ uint64_t addr, bool readonly)
{
void __iomem *ptr = rdev->gart.ptr;
addr = (lower_32_bits(addr) >> 8) |
((upper_32_bits(addr) & 0xff) << 24) |
- R300_PTE_WRITEABLE | R300_PTE_READABLE;
+ R300_PTE_READABLE;
+
+ if (!readonly)
+ addr |= R300_PTE_WRITEABLE;
+
/* on x86 we want this to be CPU endian, on powerpc
* on powerpc without HW swappers, it'll get swapped on way
* into VRAM - so no need for cpu_to_le32 on VRAM tables */
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index c16652a..283b496 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -855,8 +855,8 @@ struct radeon_mec {
#define R600_PTE_FRAG_256KB(6 << 7)
/* flags used for GART page table entries on R600+ */
-#define R600_PTE_GART ( R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED \
- | R600_PTE_READABLE | R600_PTE_WRITEABLE)
+#define R600_PTE_GART ( R600_PTE_VALID | R600_PTE_SYSTEM | \
+ R600_PTE_SNOOPED | R600_PTE_READABLE )
struct radeon_vm_pt {
struct radeon_bo*bo;
@@ -1776,7 +1776,7 @@ struct radeon_asic {
struct {
void (*tlb_flush)(struct radeon_device *rdev);
void (*set_page)(struct radeon_device *rdev, unsigned i,
-uint64_t addr);
+uint64_t addr, bool readonly);
} gart;
struct {
int (*init)(struct radeon_device *rdev);
@@ -2703,7 +2703,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t
v);
#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev),
(state))
#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
-#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart.set_page((rdev),
(i), (p))
+#define radeon_gart_set_page(rdev, i, p, r)
(rdev)->asic->gart.set_page((rdev), (i), (p), (r))
#define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev))
#define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev))
#define radeon_asic_vm_set_page(rdev, ib, pe, addr, count, incr, flags)
((rdev)->asic->vm.set_page((rdev), (ib), (pe), (addr), (count), (incr),
(flags)))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
b/drivers/gpu/drm/radeon/radeon_asic.h
index 01e7c0a..1e0cb0c2 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -68,7 +68,7 @@ int r100_asic_reset(struct radeon_device *rdev);
u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
- uint64_t addr);
+ uint64_t addr, bool readonly);
void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
int r100_irq_set(struct radeon_device *rdev);
int r100_irq_process(struct radeon_device *rdev);
@@ -173,7 +173,7 @@ extern void r300_fence_ring_emit(struct radeon_device *rdev,
extern int r300_cs_parse(struct radeon_cs_parser *p);
extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
-uint64_t addr);
+uint64_t addr, bool readonly);
extern void rv370_set_pcie_lanes(struct radeon_d
[PATCH 3/3] drm/radeon: add user pointer support v3
From: Christian K?nig
This patch adds an IOCTL for turning a pointer supplied by
userspace into a buffer object.
It imposes several restrictions upon the memory being mapped:
1. It must be page aligned (both start/end addresses, i.e ptr and size).
2. It must be normal system memory, not a pointer into another map of IO
space (e.g. it must not be a GTT mmapping of another object).
3. The BO is mapped into GTT, so the maximum amount of memory mapped at
all times is still the GTT limit.
4. The BO is only mapped readonly for now, so no write support.
5. List of backing pages is only acquired once, so they represent a
snapshot of the first use.
Exporting and sharing as well as mapping of buffer objects created by
this function is forbidden and results in an -EPERM.
v2: squash all previous changes into first public version
v3: fix tabs, map readonly, don't use MM callback any more
Signed-off-by: Christian K?nig
---
drivers/gpu/drm/radeon/radeon.h| 6 +-
drivers/gpu/drm/radeon/radeon_cs.c | 25 +++-
drivers/gpu/drm/radeon/radeon_drv.c| 5 +-
drivers/gpu/drm/radeon/radeon_gart.c | 5 +-
drivers/gpu/drm/radeon/radeon_gem.c| 67
drivers/gpu/drm/radeon/radeon_kms.c| 1 +
drivers/gpu/drm/radeon/radeon_object.c | 3 +
drivers/gpu/drm/radeon/radeon_prime.c | 10 +++
drivers/gpu/drm/radeon/radeon_ttm.c| 109 -
drivers/gpu/drm/radeon/radeon_vm.c | 3 +
include/uapi/drm/radeon_drm.h | 11
11 files changed, 237 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 283b496..ba73209 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -613,7 +613,7 @@ void radeon_gart_unbind(struct radeon_device *rdev,
unsigned offset,
int pages);
int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
int pages, struct page **pagelist,
-dma_addr_t *dma_addr);
+dma_addr_t *dma_addr, bool readonly);
/*
@@ -2111,6 +2111,8 @@ int radeon_gem_info_ioctl(struct drm_device *dev, void
*data,
struct drm_file *filp);
int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
+int radeon_gem_import_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp);
int radeon_gem_pin_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int radeon_gem_unpin_ioctl(struct drm_device *dev, void *data,
@@ -2802,6 +2804,8 @@ extern void radeon_legacy_set_clock_gating(struct
radeon_device *rdev, int enabl
extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int
enable);
extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32
domain);
extern bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo);
+extern int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t userptr);
+extern bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm);
extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc
*mc, u64 base);
extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc
*mc);
extern int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c
b/drivers/gpu/drm/radeon/radeon_cs.c
index 71a1434..be65311 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -78,7 +78,8 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
struct radeon_cs_chunk *chunk;
struct radeon_cs_buckets buckets;
unsigned i, j;
- bool duplicate;
+ bool duplicate, need_mmap_lock = false;
+ int r;
if (p->chunk_relocs_idx == -1) {
return 0;
@@ -164,6 +165,19 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser
*p)
p->relocs[i].allowed_domains = domain;
}
+ if (radeon_ttm_tt_has_userptr(p->relocs[i].robj->tbo.ttm)) {
+ uint32_t domain = p->relocs[i].prefered_domains;
+ if (!(domain & RADEON_GEM_DOMAIN_GTT)) {
+ DRM_ERROR("Only RADEON_GEM_DOMAIN_GTT is "
+ "allowed for userptr BOs\n");
+ return -EINVAL;
+ }
+ need_mmap_lock = true;
+ domain = RADEON_GEM_DOMAIN_GTT;
+ p->relocs[i].prefered_domains = domain;
+ p->relocs[i].allowed_domains = domain;
+ }
+
p->relocs[i].tv.bo = &p->relocs[i].robj->tbo;
p->relocs[i].handle = r->handle;
@@ -176,8 +190,15 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser
[PATCH 1/3] drm/radeon: Remove radeon_gart_restore()
From: Michel D?nzer
Doesn't seem necessary, the GART table memory should be persistent.
Signed-off-by: Michel D?nzer
---
drivers/gpu/drm/radeon/cik.c | 1 -
drivers/gpu/drm/radeon/evergreen.c | 1 -
drivers/gpu/drm/radeon/ni.c | 1 -
drivers/gpu/drm/radeon/r100.c| 1 -
drivers/gpu/drm/radeon/r300.c| 1 -
drivers/gpu/drm/radeon/r600.c| 1 -
drivers/gpu/drm/radeon/radeon.h | 1 -
drivers/gpu/drm/radeon/radeon_gart.c | 27 ---
drivers/gpu/drm/radeon/rs400.c | 1 -
drivers/gpu/drm/radeon/rs600.c | 1 -
drivers/gpu/drm/radeon/rv770.c | 1 -
drivers/gpu/drm/radeon/si.c | 1 -
12 files changed, 38 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index dcd4518..0cb363a 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5401,7 +5401,6 @@ static int cik_pcie_gart_enable(struct radeon_device
*rdev)
r = radeon_gart_table_vram_pin(rdev);
if (r)
return r;
- radeon_gart_restore(rdev);
/* Setup TLB control */
WREG32(MC_VM_MX_L1_TLB_CNTL,
(0xA << 7) |
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index e2f6052..8471f32 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2424,7 +2424,6 @@ static int evergreen_pcie_gart_enable(struct
radeon_device *rdev)
r = radeon_gart_table_vram_pin(rdev);
if (r)
return r;
- radeon_gart_restore(rdev);
/* Setup L2 cache */
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 5a33ca6..327b85f 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1229,7 +1229,6 @@ static int cayman_pcie_gart_enable(struct radeon_device
*rdev)
r = radeon_gart_table_vram_pin(rdev);
if (r)
return r;
- radeon_gart_restore(rdev);
/* Setup TLB control */
WREG32(MC_VM_MX_L1_TLB_CNTL,
(0xA << 7) |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 1544efc..ed1c53e 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -652,7 +652,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev)
{
uint32_t tmp;
- radeon_gart_restore(rdev);
/* discard memory request outside of configured range */
tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
WREG32(RADEON_AIC_CNTL, tmp);
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3c21d77..8d14e66 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -120,7 +120,6 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
r = radeon_gart_table_vram_pin(rdev);
if (r)
return r;
- radeon_gart_restore(rdev);
/* discard memory request outside of configured range */
tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c66952d..e1be5ce 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -968,7 +968,6 @@ static int r600_pcie_gart_enable(struct radeon_device *rdev)
r = radeon_gart_table_vram_pin(rdev);
if (r)
return r;
- radeon_gart_restore(rdev);
/* Setup L2 cache */
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 29d9cc0..c16652a 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -614,7 +614,6 @@ void radeon_gart_unbind(struct radeon_device *rdev,
unsigned offset,
int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
int pages, struct page **pagelist,
dma_addr_t *dma_addr);
-void radeon_gart_restore(struct radeon_device *rdev);
/*
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c
b/drivers/gpu/drm/radeon/radeon_gart.c
index 2e72365..b7d3e84 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -298,33 +298,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned
offset,
}
/**
- * radeon_gart_restore - bind all pages in the gart page table
- *
- * @rdev: radeon_device pointer
- *
- * Binds all pages in the gart page table (all asics).
- * Used to rebuild the gart table on device startup or resume.
- */
-void radeon_gart_restore(struct radeon_device *rdev)
-{
- int i, j, t;
- u64 page_base;
-
- if (!rdev->gart.ptr) {
- return;
- }
-
[PATCH RFC] drm: add of_graph endpoint helper to find possible CRTCs
On Wed, Jul 09, 2014 at 02:11:18PM -0400, Rob Clark wrote: > On Wed, Jul 9, 2014 at 11:16 AM, Russell King - ARM Linux > wrote: > > Warning(.../include/drm/drm_flip_work.h:68): No description found for > > parameter ')' > > Warning(.../include/drm/drm_flip_work.h:68): Excess > > struct/union/enum/typedef member 'fifo' description in 'drm_flip_work' > > Warning(.../include/drm/drm_flip_work.h:68): No description found for > > parameter ')' > > Warning(.../include/drm/drm_flip_work.h:68): Excess > > struct/union/enum/typedef member 'fifo' description in 'drm_flip_work' > > DOCPROC Documentation/DocBook/w1.xml > > DOCPROC Documentation/DocBook/writing_musb_glue_layer.xml > > PDF Documentation/DocBook/z8530book.pdf > > Making portrait pages on A4 paper (210mmx297mm) > > sh: /usr/share/xmlto/format/docbook/../fo/pdf: No such file or directory > > make[2]: *** [Documentation/DocBook/z8530book.pdf] Error 1 > > make[2]: *** Waiting for unfinished jobs > > make[1]: *** [pdfdocs] Error 2 > > make: *** [sub-make] Error 2 > > hmm, I usually use 'make htmldocs'.. hadn't really bothered to try to > build pdf docs. It was a while ago, but I think 'xmlto-tex' would be > what you need for fedora to get docs to build. Hopefully the package > has a similar name on other distros. > > There are unfortunately a lot of warnings.. the headerdoc stuff is > not always as clever as you would like. Thanks, that helps it get a bit further, but it spits out a whole truck load of errors before it gets anywhere near DRM stuff. Either this stuff isn't maintained, or it's for a newer flavour of TEX. From what I read on the web, this kind of problem is fairly typical where TEX stuff goes (no two tex versions are compatible.) I think I'll leave the kerneldoc stuff to someone who knows (a) how to deal with it. -- FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up according to speedtest.net.
[PATCH 1/3] drm/radeon: Remove radeon_gart_restore()
On Wed, Jul 9, 2014 at 2:15 PM, Christian K?nig
wrote:
> From: Michel D?nzer
>
> Doesn't seem necessary, the GART table memory should be persistent.
>
> Signed-off-by: Michel D?nzer
Reviewed-by: Alex Deucher
I'll add this one to my drm-next tree. Separate comments on the other patches.
Alex
> ---
> drivers/gpu/drm/radeon/cik.c | 1 -
> drivers/gpu/drm/radeon/evergreen.c | 1 -
> drivers/gpu/drm/radeon/ni.c | 1 -
> drivers/gpu/drm/radeon/r100.c| 1 -
> drivers/gpu/drm/radeon/r300.c| 1 -
> drivers/gpu/drm/radeon/r600.c| 1 -
> drivers/gpu/drm/radeon/radeon.h | 1 -
> drivers/gpu/drm/radeon/radeon_gart.c | 27 ---
> drivers/gpu/drm/radeon/rs400.c | 1 -
> drivers/gpu/drm/radeon/rs600.c | 1 -
> drivers/gpu/drm/radeon/rv770.c | 1 -
> drivers/gpu/drm/radeon/si.c | 1 -
> 12 files changed, 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index dcd4518..0cb363a 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -5401,7 +5401,6 @@ static int cik_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
>(0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/evergreen.c
> b/drivers/gpu/drm/radeon/evergreen.c
> index e2f6052..8471f32 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2424,7 +2424,6 @@ static int evergreen_pcie_gart_enable(struct
> radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index 5a33ca6..327b85f 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -1229,7 +1229,6 @@ static int cayman_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
>(0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index 1544efc..ed1c53e 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -652,7 +652,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev)
> {
> uint32_t tmp;
>
> - radeon_gart_restore(rdev);
> /* discard memory request outside of configured range */
> tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
> WREG32(RADEON_AIC_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 3c21d77..8d14e66 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -120,7 +120,6 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* discard memory request outside of configured range */
> tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
> WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index c66952d..e1be5ce 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -968,7 +968,6 @@ static int r600_pcie_gart_enable(struct radeon_device
> *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
>
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 29d9cc0..c16652a 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -614,7 +614,6 @@ void radeon_gart_unbind(struct radeon_device *rdev,
> unsigned offset,
> int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
> int pages, struct page **pagelist,
> dma_addr_t *dma_addr);
> -void radeon_gart_restore(struct radeon_device *rdev);
>
>
> /*
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c
> b/drivers/gpu/drm/radeon/radeon_gart.c
> index 2e72365..b7d3e84 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -298,33 +298,6 @@ int radeon_gart_bind(struct radeon_device *rdev,
> unsigned offset,
> }
>
>
[PATCH 2/3] drm/radeon: add readonly flag to radeon_gart_set_page
On Wed, Jul 9, 2014 at 2:15 PM, Christian K?nig
wrote:
> From: Christian K?nig
>
> Signed-off-by: Christian K?nig
> ---
> drivers/gpu/drm/radeon/r100.c| 2 +-
> drivers/gpu/drm/radeon/r300.c| 8 ++--
> drivers/gpu/drm/radeon/radeon.h | 8
> drivers/gpu/drm/radeon/radeon_asic.h | 8
> drivers/gpu/drm/radeon/radeon_gart.c | 4 ++--
> drivers/gpu/drm/radeon/rs400.c | 9 +++--
> drivers/gpu/drm/radeon/rs600.c | 8 ++--
> 7 files changed, 30 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index ed1c53e..bffbb14 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -682,7 +682,7 @@ void r100_pci_gart_disable(struct radeon_device *rdev)
> }
>
> void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
> - uint64_t addr)
> + uint64_t addr, bool readonly)
> {
> u32 *gtt = rdev->gart.ptr;
> gtt[i] = cpu_to_le32(lower_32_bits(addr));
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 8d14e66..2ea3d29 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -73,13 +73,17 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
> #define R300_PTE_READABLE (1 << 3)
>
> void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
> - uint64_t addr)
> + uint64_t addr, bool readonly)
> {
> void __iomem *ptr = rdev->gart.ptr;
>
> addr = (lower_32_bits(addr) >> 8) |
>((upper_32_bits(addr) & 0xff) << 24) |
> - R300_PTE_WRITEABLE | R300_PTE_READABLE;
> + R300_PTE_READABLE;
> +
> + if (!readonly)
> + addr |= R300_PTE_WRITEABLE;
> +
> /* on x86 we want this to be CPU endian, on powerpc
> * on powerpc without HW swappers, it'll get swapped on way
> * into VRAM - so no need for cpu_to_le32 on VRAM tables */
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index c16652a..283b496 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -855,8 +855,8 @@ struct radeon_mec {
> #define R600_PTE_FRAG_256KB(6 << 7)
>
> /* flags used for GART page table entries on R600+ */
> -#define R600_PTE_GART ( R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED
> \
> - | R600_PTE_READABLE | R600_PTE_WRITEABLE)
> +#define R600_PTE_GART ( R600_PTE_VALID | R600_PTE_SYSTEM | \
> + R600_PTE_SNOOPED | R600_PTE_READABLE )
>
> struct radeon_vm_pt {
> struct radeon_bo*bo;
> @@ -1776,7 +1776,7 @@ struct radeon_asic {
> struct {
> void (*tlb_flush)(struct radeon_device *rdev);
> void (*set_page)(struct radeon_device *rdev, unsigned i,
> -uint64_t addr);
> +uint64_t addr, bool readonly);
I think it would be better to add a page_flags parameter rather than a
boolean for each attribute. At some point we may want write-only or
non-snooped.
Alex
> } gart;
> struct {
> int (*init)(struct radeon_device *rdev);
> @@ -2703,7 +2703,7 @@ void radeon_ring_write(struct radeon_ring *ring,
> uint32_t v);
> #define radeon_vga_set_state(rdev, state)
> (rdev)->asic->vga_set_state((rdev), (state))
> #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
> #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
> -#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart.set_page((rdev),
> (i), (p))
> +#define radeon_gart_set_page(rdev, i, p, r)
> (rdev)->asic->gart.set_page((rdev), (i), (p), (r))
> #define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev))
> #define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev))
> #define radeon_asic_vm_set_page(rdev, ib, pe, addr, count, incr, flags)
> ((rdev)->asic->vm.set_page((rdev), (ib), (pe), (addr), (count), (incr),
> (flags)))
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h
> b/drivers/gpu/drm/radeon/radeon_asic.h
> index 01e7c0a..1e0cb0c2 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.h
> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
> @@ -68,7 +68,7 @@ int r100_asic_reset(struct radeon_device *rdev);
> u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
> void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
> void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
> - uint64_t addr);
> + uint64_t addr, bool readonly);
> void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
> int r100_irq_set(struct radeon_device *rdev);
> int r100_irq_process(struct radeon_device *rdev);
> @@ -173,7 +173,7 @@ extern vo
[Intel-gfx] [PATCH 1/3] drm/crtc: Add property for aspect ratio
Daniel, looks like this series has some r-bs; iirc this fixed some Asus
HDMI monitors too (and who knows how many TVs).
Jesse
On Thu, 22 May 2014 16:50:48 +0530
Vandana Kannan wrote:
> Added a property to enable user space to set aspect ratio.
> This patch contains declaration of the property and code to create the
> property.
>
> Signed-off-by: Vandana Kannan
> Cc: dri-devel at lists.freedesktop.org
> ---
> drivers/gpu/drm/drm_crtc.c | 31 +++
> include/drm/drm_crtc.h | 2 ++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index 37a3e07..84d359e 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -139,6 +139,12 @@ static const struct drm_prop_enum_list
> drm_scaling_mode_enum_list[] =
> { DRM_MODE_SCALE_ASPECT, "Full aspect" },
> };
>
> +static const struct drm_prop_enum_list drm_aspect_ratio_enum_list[] = {
> + { HDMI_PICTURE_ASPECT_NONE, "Automatic" },
> + { HDMI_PICTURE_ASPECT_4_3, "4:3" },
> + { HDMI_PICTURE_ASPECT_16_9, "16:9" },
> +};
> +
> /*
> * Non-global properties, but "required" for certain connectors.
> */
> @@ -1344,6 +1350,31 @@ int drm_mode_create_scaling_mode_property(struct
> drm_device *dev)
> EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
>
> /**
> + * drm_mode_create_aspect_ratio_property - create aspect ratio property
> + * @dev: DRM device
> + *
> + * Called by a driver the first time it's needed, must be attached to desired
> + * connectors.
> + */
> +int drm_mode_create_aspect_ratio_property(struct drm_device *dev)
> +{
> + struct drm_property *aspect_ratio;
> +
> + if (dev->mode_config.aspect_ratio_property)
> + return 0;
> +
> + aspect_ratio =
> + drm_property_create_enum(dev, 0, "aspect ratio",
> + drm_aspect_ratio_enum_list,
> + ARRAY_SIZE(drm_aspect_ratio_enum_list));
> +
> + dev->mode_config.aspect_ratio_property = aspect_ratio;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
> +
> +/**
> * drm_mode_create_dirty_property - create dirty property
> * @dev: DRM device
> *
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 5c1c31c..1149617 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -801,6 +801,7 @@ struct drm_mode_config {
>
> /* Optional properties */
> struct drm_property *scaling_mode_property;
> + struct drm_property *aspect_ratio_property;
> struct drm_property *dirty_info_property;
>
> /* dumb ioctl parameters */
> @@ -971,6 +972,7 @@ extern int drm_mode_create_dvi_i_properties(struct
> drm_device *dev);
> extern int drm_mode_create_tv_properties(struct drm_device *dev, int
> num_formats,
>char *formats[]);
> extern int drm_mode_create_scaling_mode_property(struct drm_device *dev);
> +extern int drm_mode_create_aspect_ratio_property(struct drm_device *dev);
> extern int drm_mode_create_dirty_info_property(struct drm_device *dev);
> extern const char *drm_get_encoder_name(const struct drm_encoder *encoder);
>
--
Jesse Barnes, Intel Open Source Technology Center
drm/vmwgfx: Fix compat shader namespace
On 2014-07-09 14:48, Dan Carpenter wrote:
> Hello Thomas Hellstrom,
>
> The patch 18e4a4669c50: "drm/vmwgfx: Fix compat shader namespace"
> from Jun 9, 2014, leads to the following static checker warning:
>
> drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c:477 vmw_cmd_res_reloc_add()
> warn: missing error code here? 'kzalloc()' failed.
>
> drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
> 468
> 469 ret = vmw_resource_context_res_add(dev_priv,
> sw_context, res);
> 470 if (unlikely(ret != 0))
> 471 goto out_err;
> 472 node->staged_bindings =
> 473 kzalloc(sizeof(*node->staged_bindings),
> GFP_KERNEL);
> 474 if (node->staged_bindings == NULL) {
> 475 DRM_ERROR("Failed to allocate context
> binding "
> 476"information.\n");
> 477 goto out_err;
>
> This should just be "return -ENOMEM;". The goto is misleading because
> you expect it to do something useful.
Indeed. Thanks for pointing that out. Since this is old code being
reorganized, the goto slipped through. The missing error code has been
around for a while, though. I'll put together a patch for that.
>
> Soon checkpatch.pl will start complaining about the extra DRM_ERROR()
> because kzalloc() has a more useful printk builtin and this just wastes
> memory and makes the code more verbose.
Noted.
>
> Speaking of verbose, all the likely/unlikely annotations should be
> removed.
Is this your personal opinion or has there been some kind of kernel
developer agreement not to add this annotation and remove it from the
kernel tree? If not, I prefer to keep it.
>If the code were more readable then the missing error code
> would have been more noticeable. This code is buggy because it is ugly;
> there is a direct cause effect relationship.
I think ugliness in this case is in the eye of the beholder. The bug
likely entered long ago like these bugs tend to do because you're not
100% focused when the code is written. I find this statement a bit
incoherent because there's no branch prediction hint in the if statement
preceding the bug and although the error message may be redundant in
this case, I can't see why an error message would make the code ugly or
be the cause of a bug.
>
> 478 }
> 479 INIT_LIST_HEAD(&node->staged_bindings->list);
> 480 }
> 481
> 482 if (p_val)
> 483 *p_val = node;
> 484
> 485 out_err:
> 486 return ret;
> 487 }
>
> regards,
> dan carpenter
Thanks,
Thomas
[Bug 66067] Trine 2's fragment normal buffer is mixtextured on Radeon HD 6770 (Juniper)
https://bugs.freedesktop.org/show_bug.cgi?id=66067 --- Comment #26 from Nicholas Miell --- (In reply to comment #25) > BTW just to be aware of i see some side effects of this patch, for example > performance in Unigine Sanctuary goes down by ~40% for me :). Probably because it adds a branch to every single sampler. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140709/0554e843/attachment.html>
[Bug 78661] GPU sometimes locks up after boot and/or resume
https://bugzilla.kernel.org/show_bug.cgi?id=78661 --- Comment #11 from Nikolaus Waxweiler --- Created attachment 142621 --> https://bugzilla.kernel.org/attachment.cgi?id=142621&action=edit Got a temporary hang again on boot-up, managed to reboot... -- You are receiving this mail because: You are watching the assignee of the bug.
[PATCH] modesetting: Support native primary plane rotation
On Wed, 9 Jul 2014 08:00:21 +0100
Chris Wilson wrote:
> With the advent of universal drm planes and the introduction of generic
> plane properties for rotations, we can query and program the hardware
> for native rotation support.
>
> NOTE: this depends upon the next release of libdrm to remove some
> opencoded defines.
>
> Signed-off-by: Chris Wilson
> ---
> configure.ac | 2 +-
> src/drmmode_display.c | 223
> +++---
> src/drmmode_display.h | 7 +-
> 3 files changed, 199 insertions(+), 33 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index 1c1a36d..0b4e857 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -74,7 +74,7 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test
> "$HAVE_XEXTPROTO_71" = "yes" ])
> # Checks for header files.
> AC_HEADER_STDC
>
> -PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46])
> +PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.54]) #.55 required for universal planes
> PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10])
> AM_CONDITIONAL(DRM, test "x$DRM" = xyes)
>
> diff --git a/src/drmmode_display.c b/src/drmmode_display.c
> index c533324..aaeda39 100644
> --- a/src/drmmode_display.c
> +++ b/src/drmmode_display.c
> @@ -56,6 +56,11 @@
>
> #include "driver.h"
>
> +#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
> +#define DRM_PLANE_TYPE_OVERLAY 0
> +#define DRM_PLANE_TYPE_PRIMARY 1
> +#define DRM_PLANE_TYPE_CURSOR 2
Hi,
is this really something that is guaranteed to be kernel ABI stable?
I mean, the 'type' property is an enum. I have never seen the enum
(numerical) values being defined in any public ABI header. Instead,
the property system has a mechanism for listing the enum values by
name string.
I have assumed that the name string is what is guaranteed ABI, and
the numerical value is just an arbitrary handle. When I added
universal planes support to Weston (not merged yet), I look up the
numerical value by the name, instead of hardcoding the numerical
value.
Should you do the same here, or are the numerical values really
(going to be) part of the ABI?
Thanks,
pq
> +static void
> +rotation_init(xf86CrtcPtr crtc)
> +{
> + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
> + drmmode_ptr drmmode = drmmode_crtc->drmmode;
> + drmModePlaneRes *plane_resources;
> + int i, j, k;
> +
> + drmSetClientCap(drmmode->fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1);
> +
> + plane_resources = drmModeGetPlaneResources(drmmode->fd);
> + if (plane_resources == NULL)
> + return;
> +
> + for (i = 0; i < plane_resources->count_planes; i++) {
> + drmModePlane *drm_plane;
> + drmModeObjectPropertiesPtr proplist;
> + int type = -1;
> +
> + drm_plane = drmModeGetPlane(drmmode->fd,
> + plane_resources->planes[i]);
> + if (drm_plane == NULL)
> + continue;
> +
> + if (!(drm_plane->possible_crtcs & (1 << drmmode_crtc->index)))
> + goto free_plane;
> +
> + proplist = drmModeObjectGetProperties(drmmode->fd,
> + drm_plane->plane_id,
> + DRM_MODE_OBJECT_PLANE);
> + if (proplist == NULL)
> + goto free_plane;
> +
> + for (j = 0; type == -1 && j < proplist->count_props; j++) {
> + drmModePropertyPtr prop;
> +
> + prop = drmModeGetProperty(drmmode->fd,
> proplist->props[j]);
> + if (!prop)
> + continue;
> +
> + if (strcmp(prop->name, "type") == 0)
> + type = proplist->prop_values[j];
> +
> + drmModeFreeProperty(prop);
> + }
> +
> + if (type == DRM_PLANE_TYPE_PRIMARY) {
> + drmmode_crtc->primary_plane_id = drm_plane->plane_id;
> +
> + for (j = 0; drmmode_crtc->rotation_prop_id == 0 && j <
> proplist->count_props; j++) {
> + drmModePropertyPtr prop;
> +
> + prop = drmModeGetProperty(drmmode->fd,
> proplist->props[j]);
> + if (!prop)
> + continue;
> +
> + if (strcmp(prop->name, "rotation") == 0) {
> + drmmode_crtc->rotation_prop_id =
> proplist->props[j];
> + drmmode_crtc->current_rotation =
> proplist->prop_values[j];
> + for (k = 0; k < prop->count_enums; k++)
> {
> + int rr = -1;
> + if (strcmp(prop->enums[k].name,
> "rotate-0") == 0)
> + rr = RR_Rotate_0;
> +
[PATCH 1/1] drm/tilcdc: Fix build breakage
Commit 34ea3d386347 ("drm: add register and unregister functions
for connectors") probably missed out converting the
drm_sysfs_connector_remove instances in the following files.
Without this patch we get the following compilation error:
ERROR: "drm_sysfs_connector_remove" [drivers/gpu/drm/tilcdc/tilcdc.ko]
undefined!
Signed-off-by: Sachin Kamat
CC: Thomas Wood
CC: David Herrmann
CC: Daniel Vetter
---
Only compile tested.
---
drivers/gpu/drm/tilcdc/tilcdc_panel.c |2 +-
drivers/gpu/drm/tilcdc/tilcdc_slave.c |2 +-
drivers/gpu/drm/tilcdc/tilcdc_tfp410.c |2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
index 8ff72c8ad06b..4c7aa1d8134f 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
@@ -151,7 +151,7 @@ struct panel_connector {
static void panel_connector_destroy(struct drm_connector *connector)
{
struct panel_connector *panel_connector = to_panel_connector(connector);
- drm_sysfs_connector_remove(connector);
+ drm_connector_unregister(connector);
drm_connector_cleanup(connector);
kfree(panel_connector);
}
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
index f02cb7c02f7f..3775fd49dac4 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
@@ -166,7 +166,7 @@ struct slave_connector {
static void slave_connector_destroy(struct drm_connector *connector)
{
struct slave_connector *slave_connector = to_slave_connector(connector);
- drm_sysfs_connector_remove(connector);
+ drm_connector_unregister(connector);
drm_connector_cleanup(connector);
kfree(slave_connector);
}
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
index 82fb5204565f..354c47ca6374 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
@@ -167,7 +167,7 @@ struct tfp410_connector {
static void tfp410_connector_destroy(struct drm_connector *connector)
{
struct tfp410_connector *tfp410_connector =
to_tfp410_connector(connector);
- drm_sysfs_connector_remove(connector);
+ drm_connector_unregister(connector);
drm_connector_cleanup(connector);
kfree(tfp410_connector);
}
--
1.7.9.5
[PATCH] radeon: add HDMI/DP sink description to ELD like data
Provide monitor name and product/manufacturer id to alsa hda driver. The output
matches the fglrx settings, short of the port_id. As the latter is not
standardized,
leave it out for now.
Corresponding alsa code is already in place.
Signed-off-by: Stefan Br?ns
---
The fglrx register settings where retrieved using Rafal Mileckis gdb script.
After applying the patch fglrx and radeon register settings for sink info match,
short of the port_id.
Regarding port id, see comment by Takashi Iwai, 14 Nov 2013:
http://www.spinics.net/linux/fedora/alsa-user/msg12453.html
and RFC by Stephen Warren (NVidia), 25 May 2011:
http://lists.freedesktop.org/pipermail/xorg/2011-May/052893.html
drivers/gpu/drm/radeon/dce6_afmt.c | 67 +
drivers/gpu/drm/radeon/evergreen_hdmi.c | 2 +
2 files changed, 69 insertions(+)
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c
b/drivers/gpu/drm/radeon/dce6_afmt.c
index 0a65dc7..1adf95a 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -273,6 +273,73 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder)
kfree(sads);
}
+void dce6_afmt_write_sinkinfo(struct drm_encoder *encoder)
+{
+ struct radeon_device *rdev = encoder->dev->dev_private;
+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+ struct drm_connector *connector;
+ u32 tmp = 0, offset;
+ char description[18];
+ uint8_t *eld;
+
+ if (!dig || !dig->afmt || !dig->afmt->pin)
+ return;
+
+ offset = dig->afmt->pin->offset;
+
+ list_for_each_entry(connector,
&encoder->dev->mode_config.connector_list, head) {
+ if (connector->encoder == encoder)
+ break;
+ }
+
+ if (!connector) {
+ DRM_ERROR("Couldn't find encoder's connector\n");
+ return;
+ }
+
+ if (!connector->eld[0]) {
+ DRM_ERROR("Connector has no ELD\n");
+ return;
+ }
+
+ eld = connector->eld;
+
+ tmp = MANUFACTURER_ID(eld[16]<<8 | eld[17]) | PRODUCT_ID(eld[18]<<8 |
eld[19]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO0, tmp);
+
+ tmp = SINK_DESCRIPTION_LEN(strlen(&eld[20])) + 1;
+ tmp = (tmp > 19) ? 19 : tmp;
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO1, tmp);
+
+ strncpy(description, &eld[20], 18);
+
+ tmp = PORT_ID0(0x1);
+ //WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO2, tmp);
+
+ tmp = PORT_ID1(0x100);
+ //WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO3, tmp);
+
+ tmp = DESCRIPTION0(description[0]) | DESCRIPTION1(description[1]) |
+ DESCRIPTION2(description[2]) | DESCRIPTION3(description[3]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO4, tmp);
+
+ tmp = DESCRIPTION4(description[4]) | DESCRIPTION5(description[5]) |
+ DESCRIPTION6(description[6]) | DESCRIPTION7(description[7]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO5, tmp);
+
+ tmp = DESCRIPTION8(description[8]) | DESCRIPTION9(description[9]) |
+ DESCRIPTION10(description[10]) | DESCRIPTION11(description[11]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO6, tmp);
+
+ tmp = DESCRIPTION12(description[12]) | DESCRIPTION13(description[13]) |
+ DESCRIPTION14(description[14]) | DESCRIPTION15(description[15]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO7, tmp);
+
+ tmp = DESCRIPTION16(description[16]) | DESCRIPTION17(description[17]);
+ WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO8, tmp);
+}
+
static int dce6_audio_chipset_supported(struct radeon_device *rdev)
{
return !ASIC_IS_NODCE(rdev);
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c
b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 1ec0e6e..b04ec3b 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -37,6 +37,7 @@ extern void dce6_afmt_write_sad_regs(struct drm_encoder
*encoder);
extern void dce6_afmt_select_pin(struct drm_encoder *encoder);
extern void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
struct drm_display_mode *mode);
+extern void dce6_afmt_write_sinkinfo(struct drm_encoder *encoder);
/*
* update the N and CTS parameters for a given pixel clock rate
@@ -425,6 +426,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder,
struct drm_display_mode
dce6_afmt_select_pin(encoder);
dce6_afmt_write_sad_regs(encoder);
dce6_afmt_write_latency_fields(encoder, mode);
+ dce6_afmt_write_sinkinfo(encoder);
} else {
evergreen_hdmi_write_sad_regs(encoder);
dce4_afmt_write_la
randconfig build error with next-20140709, in drivers/gpu/drm/drm_dp_mst_topology.c
Building with the attached random configuration file, drivers/gpu/drm/drm_dp_mst_topology.c: In function ?drm_dp_mst_dump_mstb?: drivers/gpu/drm/drm_dp_mst_topology.c:2431:2: error: implicit declaration of function ?seq_printf? [-Werror=implicit-function-declaration] seq_printf(m, "%smst: %p, %d\n", prefix, mstb, mstb->num_ports); ^ cc1: some warnings being treated as errors make[3]: *** [drivers/gpu/drm/drm_dp_mst_topology.o] Error 1 -- next part -- # # Automatically generated file; DO NOT EDIT. # Linux/x86 3.16.0-rc4 Kernel Configuration # # CONFIG_64BIT is not set CONFIG_X86_32=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf32-i386" CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_MMU=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_HWEIGHT=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y # CONFIG_ZONE_DMA32 is not set # CONFIG_AUDIT_ARCH is not set CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_X86_32_LAZY_GS=y CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_EXTABLE_SORT=y # # General setup # CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="" CONFIG_COMPILE_TEST=y CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SWAP is not set CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y # CONFIG_CROSS_MEMORY_ATTACH is not set # CONFIG_FHANDLE is not set CONFIG_USELIB=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_KTIME_SCALAR=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_IRQ_TIME_ACCOUNTING is not set # CONFIG_BSD_PROCESS_ACCT is not set # # RCU Subsystem # CONFIG_TINY_RCU=y # CONFIG_PREEMPT_RCU is not set # CONFIG_RCU_STALL_COMMON is not set # CONFIG_TREE_RCU_TRACE is not set CONFIG_BUILD_BIN2C=y # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y CONFIG_CGROUPS=y CONFIG_CGROUP_DEBUG=y # CONFIG_CGROUP_FREEZER is not set # CONFIG_CGROUP_DEVICE is not set # CONFIG_CPUSETS is not set CONFIG_CGROUP_CPUACCT=y CONFIG_RESOURCE_COUNTERS=y CONFIG_MEMCG=y # CONFIG_MEMCG_KMEM is not set CONFIG_CGROUP_PERF=y # CONFIG_CGROUP_SCHED is not set CONFIG_BLK_CGROUP=y CONFIG_DEBUG_BLK_CGROUP=y # CONFIG_CHECKPOINT_RESTORE is not set CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_IPC_NS=y # CONFIG_USER_NS is not set # CONFIG_PID_NS is not set # CONFIG_SCHED_AUTOGROUP is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y CONFIG_RD_LZ4=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LTO_MENU=y # CONFIG_LTO_DISABLE is not set CONFIG_LTO=y # CONFIG_LTO_DEBUG is not set CONFIG_LTO_CP_CLONE=y CONFIG_SYSCTL=y CONFIG_ANON_INODES=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y # CONFIG_SYSCTL_SYSCALL is not set CONFIG_KALLSYMS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_PCI_QUIRKS=y # CONFIG
[PATCH] modesetting: Support native primary plane rotation
On Wed, 9 Jul 2014 09:19:08 +0100
Chris Wilson wrote:
> With the advent of universal drm planes and the introduction of generic
> plane properties for rotations, we can query and program the hardware
> for native rotation support.
>
> NOTE: this depends upon the next release of libdrm to remove one
> opencoded define.
>
> v2: Use enum to determine primary plane, suggested by Pekka Paalanen.
> Use libobj for replacement ffs(), suggested by walter harms
>
> Signed-off-by: Chris Wilson
> Cc: Pekka Paalanen
> Cc: walter harms
My concerns have been addressed. On a second read, I found another
suspicious thing below.
> ---
> configure.ac | 5 +-
> libobj/ffs.c | 14
> src/drmmode_display.c | 216
> ++
> src/drmmode_display.h | 10 ++-
> 4 files changed, 212 insertions(+), 33 deletions(-)
> create mode 100644 libobj/ffs.c
>
> diff --git a/configure.ac b/configure.ac
> index 1c1a36d..1694465 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -74,10 +74,13 @@ AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test
> "$HAVE_XEXTPROTO_71" = "yes" ])
> # Checks for header files.
> AC_HEADER_STDC
>
> -PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.46])
> +PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.47])
> PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10])
> AM_CONDITIONAL(DRM, test "x$DRM" = xyes)
>
> +AC_CONFIG_LIBOBJ_DIR(libobj)
> +AC_REPLACE_FUNCS(ffs)
> +
> PKG_CHECK_MODULES(UDEV, [libudev], [udev=yes], [udev=no])
> if test x"$udev" = xyes; then
> AC_DEFINE(HAVE_UDEV,1,[Enable udev-based monitor hotplug detection])
> diff --git a/libobj/ffs.c b/libobj/ffs.c
> new file mode 100644
> index 000..2d44dcc
> --- /dev/null
> +++ b/libobj/ffs.c
> @@ -0,0 +1,14 @@
> +extern int ffs(unsigned int value);
> +
> +int ffs(unsigned int value)
> +{
> + int bit;
> +
> + if (value == 0)
> + return 0;
> +
> + bit = 0;
> + while ((value & (1 << bit++)) == 0)
> + ;
> + return bit;
> +}
> diff --git a/src/drmmode_display.c b/src/drmmode_display.c
> index c533324..e854502 100644
> --- a/src/drmmode_display.c
> +++ b/src/drmmode_display.c
> @@ -56,6 +56,8 @@
>
> #include "driver.h"
>
> +#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 /* from libdrm 2.4.55 */
> +
> static struct dumb_bo *dumb_bo_create(int fd,
> const unsigned width, const unsigned height,
> const unsigned bpp)
> @@ -300,6 +302,132 @@ create_pixmap_for_fbcon(drmmode_ptr drmmode,
>
> #endif
>
> +static unsigned
> +rotation_index(unsigned rotation)
> +{
> + return ffs(rotation) - 1;
> +}
> +
> +static void
> +rotation_init(xf86CrtcPtr crtc)
> +{
> + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
> + drmmode_ptr drmmode = drmmode_crtc->drmmode;
> + drmModePlaneRes *plane_resources;
> + int i, j, k;
> +
> + drmSetClientCap(drmmode->fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 1);
> +
> + plane_resources = drmModeGetPlaneResources(drmmode->fd);
> + if (plane_resources == NULL)
> + return;
> +
> + for (i = 0; drmmode_crtc->primary_plane_id == 0 && i <
> plane_resources->count_planes; i++) {
> + drmModePlane *drm_plane;
> + drmModeObjectPropertiesPtr proplist;
> + int is_primary = -1;
> +
> + drm_plane = drmModeGetPlane(drmmode->fd,
> + plane_resources->planes[i]);
> + if (drm_plane == NULL)
> + continue;
> +
> + if (!(drm_plane->possible_crtcs & (1 << drmmode_crtc->index)))
> + goto free_plane;
> +
> + proplist = drmModeObjectGetProperties(drmmode->fd,
> + drm_plane->plane_id,
> + DRM_MODE_OBJECT_PLANE);
> + if (proplist == NULL)
> + goto free_plane;
> +
> + for (j = 0; is_primary == -1 && j < proplist->count_props; j++)
> {
> + drmModePropertyPtr prop;
> +
> + prop = drmModeGetProperty(drmmode->fd,
> proplist->props[j]);
> + if (!prop)
> + continue;
> +
> + if (strcmp(prop->name, "type") == 0) {
> + for (k = 0; k < prop->count_enums; k++) {
> + if (prop->enums[k].value !=
> proplist->prop_values[j])
> + continue;
> +
> + is_primary =
> strcmp(prop->enums[k].name, "Primary") == 0;
> + break;
> + }
> + }
> +
> + drmModeFreeProperty(prop);
> + }
> +
> + if (is_primary) {
> + drmmode_crtc->primary_plane_id = drm_plane->plane_id;
> +
> +
[PATCH v3 01/11] mfd: add atmel-hlcdc driver
On Mon, 07 Jul 2014, Boris BREZILLON wrote:
> The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> family or sama5d3 family) exposes 2 subdevices:
> - a display controller (controlled by a DRM driver)
> - a PWM chip
>
> The MFD device provides a regmap and several clocks (those connected
> to this hardware block) to its subdevices.
>
> This way concurrent accesses to the iomem range are handled by the regmap
> framework, and each subdevice can safely access HLCDC registers.
>
> Signed-off-by: Boris BREZILLON
> ---
> drivers/mfd/Kconfig | 12
> drivers/mfd/Makefile| 1 +
> drivers/mfd/atmel-hlcdc.c | 119
>
> include/linux/mfd/atmel-hlcdc.h | 78 ++
> 4 files changed, 210 insertions(+)
> create mode 100644 drivers/mfd/atmel-hlcdc.c
> create mode 100644 include/linux/mfd/atmel-hlcdc.h
[...]
> +static const struct mfd_cell atmel_hlcdc_cells[] = {
> + {
> + .name = "atmel-hlcdc-pwm",
> + .of_compatible = "atmel,hlcdc-pwm",
> + },
> + {
> + .name = "atmel-hlcdc-dc",
> + .of_compatible = "atmel,hlcdc-dc",
'dc' is a little ambiguous.
Would be more transparent if s/dc/disp or similar.
> + },
> +};
[...]
> +static struct platform_driver atmel_hlcdc_driver = {
> + .probe = atmel_hlcdc_probe,
> + .remove = atmel_hlcdc_remove,
> + .driver = {
> + .name = "atmel-hlcdc",
> + .owner = THIS_MODULE,
Remove this line, it's not required.
> + .of_match_table = atmel_hlcdc_match,
> + },
> +};
> +module_platform_driver(atmel_hlcdc_driver);
Once those minor points are addressed, resubmit with my:
Acked-by: Lee Jones
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
[GIT PULL] msm drm update for component changes
David, Please incorporate the latest msm drm update for component changes, which can be found at: git://ftp.arm.linux.org.uk/~rmk/linux-arm.git component-for-drm with SHA1 84448288546d13d7e06fd6638fb78ddff559b399. This updates the MSM's DRM driver for the updates merged in Greg's driver-core tree, converting MSM to use the pre-declared array of matches rather than walking the device tree each time we try to bind. This will update the following files: drivers/base/component.c | 192 ++ drivers/gpu/drm/msm/msm_drv.c | 83 -- include/linux/component.h | 7 ++ 3 files changed, 199 insertions(+), 83 deletions(-) through these changes: Russell King (5): component: fix missed cleanup in case of devres failure component: ignore multiple additions of the same component component: add support for component match array component: fix bug with legacy API drm: msm: update to use component match support Many thanks.
