rules for merging patches to libdrm
Since we seemed to have some confusion over this I'll state it clearly here. You should not merge kernel interface and ioctls to libdrm until they have appeared in a git commit upstream with a stable id, this generally means drm-next, but can also mean drm-intel-next. You shouldn't assume that stuff is in a kernel somewhere, you should take the 5-10 minutes to ask me and/or check yourself, its not like kernel trees are a hidden thing, This rule is something we learned the hard way a long time ago, I'm sorry my reverting libdrm broke the mesa build, but really if you own a feature you need to make sure all the parts of it get your attention. Dave.
[Bug 69341] [radeonsi] KDE 4.11 is EXTREMELY slow with Raster QT backend
https://bugs.freedesktop.org/show_bug.cgi?id=69341 --- Comment #32 from Denis M. (Phr33d0m) --- (In reply to comment #28) > Using perf, I noticed it spent all of its > time in a memcpy, and using gdb I found it was copying memory between > textures in glamor. With latest kernel 3.12.0, mesa 9.2.2 and ati 7.2 color corruption mostly disappeared with the Native KDE backend and OpenGL 2.0 selected. Although, every couple of seconds (every ~2-3 sec) my desktop lags for a moment, using `perf top` I see: 45.08% [kernel] [k] radeon_vm_bo_set_addr which stays like that all the time. The desktop is pretty much usable, but watching a HD movie is almost impossible with all that lagging every few seconds. > I'm using Gentoo with an HD7970. Gentoo + HD7870 here. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/3541e24b/attachment.html>
[PATCH 00/11] drm/gma500: Minnowboard support
This set of patches add the pieces needed to get SDVO running on the Minnowboard. The Minnowboard has a special PCI device with it's own io that needs to be programmed in addition to the usual places when dealing with SDVO. The SDVO changes have been tested on Poulsbo and should cause no problems. Oaktrail on the other hand might be affected by LVDS and watermark changes. Patrik Jakobsson (11): drm/gma500: Add chip specific sdvo masks drm/gma500: Add support for aux pci vdc device drm/gma500: Add aux device support for gmbus drm/gma500/mrst: Add SDVO clock calculation drm/gma500/mrst: Add aux register writes when programming pipe drm/gma500/mrst: Properly route oaktrail hdmi hooks drm/gma500/mrst: Add aux register writes to SDVO drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD drm/gma500/mrst: Setup GMBUS for oaktrail/mrst drm/gma500/mrst: Don't blindly guess a mode for LVDS drm/gma500/mrst: Add SDVO to output init drivers/gpu/drm/gma500/cdv_device.c | 1 + drivers/gpu/drm/gma500/framebuffer.c | 2 +- drivers/gpu/drm/gma500/intel_gmbus.c | 90 --- drivers/gpu/drm/gma500/oaktrail_crtc.c | 433 +++ drivers/gpu/drm/gma500/oaktrail_device.c | 6 + drivers/gpu/drm/gma500/oaktrail_lvds.c | 30 +-- drivers/gpu/drm/gma500/psb_device.c | 1 + drivers/gpu/drm/gma500/psb_drv.c | 32 ++- drivers/gpu/drm/gma500/psb_drv.h | 49 +++- drivers/gpu/drm/gma500/psb_intel_sdvo.c | 59 +++-- 10 files changed, 447 insertions(+), 256 deletions(-) -- 1.8.3.2
[PATCH 04/11] drm/gma500/mrst: Add SDVO clock calculation
We start off by adding SDVO limits and converting all limits to the
generic gma_limit_t stuct. Then we separate clock calculations for
LVDS and SDVO. This will be cleaned up later but keep it simple for now.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/oaktrail_crtc.c | 175 -
1 file changed, 126 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c
b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 54c9896..bde3065 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -26,24 +26,10 @@
#include "gma_display.h"
#include "power.h"
-struct psb_intel_range_t {
- int min, max;
-};
-
-struct oaktrail_limit_t {
- struct psb_intel_range_t dot, m, p1;
-};
-
-struct oaktrail_clock_t {
- /* derived values */
- int dot;
- int m;
- int p1;
-};
-
-#define MRST_LIMIT_LVDS_100L 0
-#define MRST_LIMIT_LVDS_83 1
-#define MRST_LIMIT_LVDS_1002
+#define MRST_LIMIT_LVDS_100L 0
+#define MRST_LIMIT_LVDS_83 1
+#define MRST_LIMIT_LVDS_1002
+#define MRST_LIMIT_SDVO3
#define MRST_DOT_MIN 19750
#define MRST_DOT_MAX 12
@@ -57,21 +43,40 @@ struct oaktrail_clock_t {
#define MRST_P1_MAX_0 7
#define MRST_P1_MAX_1 8
-static const struct oaktrail_limit_t oaktrail_limits[] = {
+static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
+ struct drm_crtc *crtc, int target,
+ int refclk, struct gma_clock_t *best_clock);
+
+static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
+ struct drm_crtc *crtc, int target,
+ int refclk, struct gma_clock_t *best_clock);
+
+static const struct gma_limit_t mrst_limits[] = {
{ /* MRST_LIMIT_LVDS_100L */
.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
.m = {.min = MRST_M_MIN_100L, .max = MRST_M_MAX_100L},
.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
+.find_pll = mrst_lvds_find_best_pll,
},
{ /* MRST_LIMIT_LVDS_83L */
.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
.m = {.min = MRST_M_MIN_83, .max = MRST_M_MAX_83},
.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_0},
+.find_pll = mrst_lvds_find_best_pll,
},
{ /* MRST_LIMIT_LVDS_100 */
.dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
.m = {.min = MRST_M_MIN_100, .max = MRST_M_MAX_100},
.p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
+.find_pll = mrst_lvds_find_best_pll,
+},
+ { /* MRST_LIMIT_SDVO */
+.vco = {.min = 140, .max = 280},
+.n = {.min = 3, .max = 7},
+.m = {.min = 80, .max = 137},
+.p1 = {.min = 1, .max = 2},
+.p2 = {.dot_limit = 20, .p2_slow = 10, .p2_fast = 10},
+.find_pll = mrst_sdvo_find_best_pll,
},
};
@@ -82,9 +87,10 @@ static const u32 oaktrail_m_converts[] = {
0x12, 0x09, 0x24, 0x32, 0x39, 0x1c,
};
-static const struct oaktrail_limit_t *oaktrail_limit(struct drm_crtc *crtc)
+static const struct gma_limit_t *mrst_limit(struct drm_crtc *crtc,
+ int refclk)
{
- const struct oaktrail_limit_t *limit = NULL;
+ const struct gma_limit_t *limit = NULL;
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
@@ -92,45 +98,100 @@ static const struct oaktrail_limit_t
*oaktrail_limit(struct drm_crtc *crtc)
|| gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {
switch (dev_priv->core_freq) {
case 100:
- limit = &oaktrail_limits[MRST_LIMIT_LVDS_100L];
+ limit = &mrst_limits[MRST_LIMIT_LVDS_100L];
break;
case 166:
- limit = &oaktrail_limits[MRST_LIMIT_LVDS_83];
+ limit = &mrst_limits[MRST_LIMIT_LVDS_83];
break;
case 200:
- limit = &oaktrail_limits[MRST_LIMIT_LVDS_100];
+ limit = &mrst_limits[MRST_LIMIT_LVDS_100];
break;
}
+ } else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
+ limit = &mrst_limits[MRST_LIMIT_SDVO];
} else {
limit = NULL;
- dev_err(dev->dev, "oaktrail_limit Wrong display type.\n");
+ dev_err(dev->dev, "mrst_limit Wrong display type.\n");
}
return limit;
}
/** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
-static void oaktrail_clock(int refclk, struct oaktrail_clock_t *clock)
+
[PATCH 05/11] drm/gma500/mrst: Add aux register writes when programming pipe
On SDVO pipes (always Pipe B on mrst) we have to sequentially write the
aux vdc. We might be able to skip programming the primary vdc in
some/most places but we don't care about that now.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/oaktrail_crtc.c | 241 ++---
drivers/gpu/drm/gma500/psb_drv.h | 27
2 files changed, 162 insertions(+), 106 deletions(-)
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c
b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index bde3065..ef4f076 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -227,6 +227,8 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int
mode)
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 temp;
+ int i;
+ int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
if (pipe == 1) {
oaktrail_crtc_hdmi_dpms(crtc, mode);
@@ -243,35 +245,45 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int
mode)
case DRM_MODE_DPMS_ON:
case DRM_MODE_DPMS_STANDBY:
case DRM_MODE_DPMS_SUSPEND:
- /* Enable the DPLL */
- temp = REG_READ(map->dpll);
- if ((temp & DPLL_VCO_ENABLE) == 0) {
- REG_WRITE(map->dpll, temp);
- REG_READ(map->dpll);
- /* Wait for the clocks to stabilize. */
- udelay(150);
- REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
- REG_READ(map->dpll);
- /* Wait for the clocks to stabilize. */
- udelay(150);
- REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
- REG_READ(map->dpll);
- /* Wait for the clocks to stabilize. */
- udelay(150);
- }
- /* Enable the pipe */
- temp = REG_READ(map->conf);
- if ((temp & PIPEACONF_ENABLE) == 0)
- REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
- /* Enable the plane */
- temp = REG_READ(map->cntr);
- if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
- REG_WRITE(map->cntr,
- temp | DISPLAY_PLANE_ENABLE);
- /* Flush the plane changes */
- REG_WRITE(map->base, REG_READ(map->base));
- }
+ for (i = 0; i <= need_aux; i++) {
+ /* Enable the DPLL */
+ temp = REG_READ_WITH_AUX(map->dpll, i);
+ if ((temp & DPLL_VCO_ENABLE) == 0) {
+ REG_WRITE_WITH_AUX(map->dpll, temp, i);
+ REG_READ_WITH_AUX(map->dpll, i);
+ /* Wait for the clocks to stabilize. */
+ udelay(150);
+ REG_WRITE_WITH_AUX(map->dpll,
+ temp | DPLL_VCO_ENABLE, i);
+ REG_READ_WITH_AUX(map->dpll, i);
+ /* Wait for the clocks to stabilize. */
+ udelay(150);
+ REG_WRITE_WITH_AUX(map->dpll,
+ temp | DPLL_VCO_ENABLE, i);
+ REG_READ_WITH_AUX(map->dpll, i);
+ /* Wait for the clocks to stabilize. */
+ udelay(150);
+ }
+
+ /* Enable the pipe */
+ temp = REG_READ_WITH_AUX(map->conf, i);
+ if ((temp & PIPEACONF_ENABLE) == 0) {
+ REG_WRITE_WITH_AUX(map->conf,
+ temp | PIPEACONF_ENABLE, i);
+ }
+ /* Enable the plane */
+ temp = REG_READ_WITH_AUX(map->cntr, i);
+ if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
+ REG_WRITE_WITH_AUX(map->cntr,
+ temp | DISPLAY_PLANE_ENABLE,
+ i);
+ /* Flush the plane changes */
+ REG_WRITE_WITH_AUX(map->base,
+ REG_READ_WITH_AUX(map->base, i), i);
+ }
+
+ }
gma_crtc_load_lut(crtc);
/* Give the overlay scaler a chance to enable
@@ -283,35 +295,40 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int
mode)
* if it's on this pipe */
/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
- /* Dis
[PATCH 02/11] drm/gma500: Add support for aux pci vdc device
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/psb_drv.c | 32 +++-
drivers/gpu/drm/gma500/psb_drv.h | 21 -
2 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index 679f953..1199180 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -251,6 +251,12 @@ static int psb_driver_unload(struct drm_device *dev)
iounmap(dev_priv->sgx_reg);
dev_priv->sgx_reg = NULL;
}
+ if (dev_priv->aux_reg) {
+ iounmap(dev_priv->aux_reg);
+ dev_priv->aux_reg = NULL;
+ }
+ if (dev_priv->aux_pdev)
+ pci_dev_put(dev_priv->aux_pdev);
/* Destroy VBT data */
psb_intel_destroy_bios(dev);
@@ -266,7 +272,7 @@ static int psb_driver_unload(struct drm_device *dev)
static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
{
struct drm_psb_private *dev_priv;
- unsigned long resource_start;
+ unsigned long resource_start, resource_len;
unsigned long irqflags;
int ret = -ENOMEM;
struct drm_connector *connector;
@@ -296,6 +302,30 @@ static int psb_driver_load(struct drm_device *dev,
unsigned long chipset)
if (!dev_priv->sgx_reg)
goto out_err;
+ if (IS_MRST(dev)) {
+ dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
+
+ if (dev_priv->aux_pdev) {
+ resource_start = pci_resource_start(dev_priv->aux_pdev,
+ PSB_AUX_RESOURCE);
+ resource_len = pci_resource_len(dev_priv->aux_pdev,
+ PSB_AUX_RESOURCE);
+ dev_priv->aux_reg = ioremap_nocache(resource_start,
+ resource_len);
+ if (!dev_priv->aux_reg)
+ goto out_err;
+
+ DRM_DEBUG_KMS("Found aux vdc");
+ } else {
+ /* Couldn't find the aux vdc so map to primary vdc */
+ dev_priv->aux_reg = dev_priv->vdc_reg;
+ DRM_DEBUG_KMS("Couldn't find aux pci device");
+ }
+ dev_priv->gmbus_reg = dev_priv->aux_reg;
+ } else {
+ dev_priv->gmbus_reg = dev_priv->vdc_reg;
+ }
+
psb_intel_opregion_setup(dev);
ret = dev_priv->ops->chip_setup(dev);
diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index fd93756..dc7a8de 100644
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -75,6 +75,7 @@ enum {
* PCI resource identifiers
*/
#define PSB_MMIO_RESOURCE 0
+#define PSB_AUX_RESOURCE0
#define PSB_GATT_RESOURCE 2
#define PSB_GTT_RESOURCE3
/*
@@ -455,6 +456,7 @@ struct psb_ops;
struct drm_psb_private {
struct drm_device *dev;
+ struct pci_dev *aux_pdev; /* Currently only used by mrst */
const struct psb_ops *ops;
const struct psb_offset *regmap;
@@ -486,6 +488,7 @@ struct drm_psb_private {
uint8_t __iomem *sgx_reg;
uint8_t __iomem *vdc_reg;
+ uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
uint32_t gatt_free_offset;
/*
@@ -532,6 +535,7 @@ struct drm_psb_private {
/* gmbus */
struct intel_gmbus *gmbus;
+ uint8_t __iomem *gmbus_reg;
/* Used by SDVO */
int crt_ddc_pin;
@@ -928,16 +932,31 @@ static inline uint32_t REGISTER_READ(struct drm_device
*dev, uint32_t reg)
return ioread32(dev_priv->vdc_reg + reg);
}
+static inline uint32_t REGISTER_READ_AUX(struct drm_device *dev, uint32_t reg)
+{
+ struct drm_psb_private *dev_priv = dev->dev_private;
+ return ioread32(dev_priv->aux_reg + reg);
+}
+
#define REG_READ(reg) REGISTER_READ(dev, (reg))
+#define REG_READ_AUX(reg) REGISTER_READ_AUX(dev, (reg))
static inline void REGISTER_WRITE(struct drm_device *dev, uint32_t reg,
- uint32_t val)
+ uint32_t val)
{
struct drm_psb_private *dev_priv = dev->dev_private;
iowrite32((val), dev_priv->vdc_reg + (reg));
}
+static inline void REGISTER_WRITE_AUX(struct drm_device *dev, uint32_t reg,
+ uint32_t val)
+{
+ struct drm_psb_private *dev_priv = dev->dev_private;
+ iowrite32((val), dev_priv->aux_reg + (reg));
+}
+
#define REG_WRITE(reg, val)REGISTER_WRITE(dev, (reg), (val))
+#define REG_WRITE_AUX(reg, val)REGISTER_WRITE_AUX(dev, (reg), (val))
static inline void REGISTER_WRITE16(struct drm_d
[PATCH 06/11] drm/gma500/mrst: Properly route oaktrail hdmi hooks
Since we can have SDVO on Pipe B we better check the output type instead
of pipe number for Oaktrail HDMI.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/oaktrail_crtc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c
b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index ef4f076..25bf206 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -230,7 +230,7 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int
mode)
int i;
int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- if (pipe == 1) {
+ if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {
oaktrail_crtc_hdmi_dpms(crtc, mode);
return;
}
@@ -387,7 +387,7 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
int i;
int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- if (pipe == 1)
+ if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI))
return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode,
x, y, old_fb);
if (!gma_power_begin(dev, true))
--
1.8.3.2
[PATCH 01/11] drm/gma500: Add chip specific sdvo masks
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/cdv_device.c | 1 +
drivers/gpu/drm/gma500/framebuffer.c | 2 +-
drivers/gpu/drm/gma500/oaktrail_device.c | 1 +
drivers/gpu/drm/gma500/psb_device.c | 1 +
drivers/gpu/drm/gma500/psb_drv.h | 1 +
5 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/gma500/cdv_device.c
b/drivers/gpu/drm/gma500/cdv_device.c
index 162f686..5a9a6a3 100644
--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -634,6 +634,7 @@ const struct psb_ops cdv_chip_ops = {
.crtcs = 2,
.hdmi_mask = (1 << 0) | (1 << 1),
.lvds_mask = (1 << 1),
+ .sdvo_mask = (1 << 0),
.cursor_needs_phys = 0,
.sgx_offset = MRST_SGX_OFFSET,
.chip_setup = cdv_chip_setup,
diff --git a/drivers/gpu/drm/gma500/framebuffer.c
b/drivers/gpu/drm/gma500/framebuffer.c
index 01dd7d2..94b3fec 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -714,7 +714,7 @@ static void psb_setup_outputs(struct drm_device *dev)
clone_mask = (1 << INTEL_OUTPUT_ANALOG);
break;
case INTEL_OUTPUT_SDVO:
- crtc_mask = ((1 << 0) | (1 << 1));
+ crtc_mask = dev_priv->ops->sdvo_mask;
clone_mask = (1 << INTEL_OUTPUT_SDVO);
break;
case INTEL_OUTPUT_LVDS:
diff --git a/drivers/gpu/drm/gma500/oaktrail_device.c
b/drivers/gpu/drm/gma500/oaktrail_device.c
index 08747fd..8079851 100644
--- a/drivers/gpu/drm/gma500/oaktrail_device.c
+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
@@ -546,6 +546,7 @@ const struct psb_ops oaktrail_chip_ops = {
.crtcs = 2,
.hdmi_mask = (1 << 1),
.lvds_mask = (1 << 0),
+ .sdvo_mask = (1 << 1),
.cursor_needs_phys = 0,
.sgx_offset = MRST_SGX_OFFSET,
diff --git a/drivers/gpu/drm/gma500/psb_device.c
b/drivers/gpu/drm/gma500/psb_device.c
index 6976786..23fb33f 100644
--- a/drivers/gpu/drm/gma500/psb_device.c
+++ b/drivers/gpu/drm/gma500/psb_device.c
@@ -373,6 +373,7 @@ const struct psb_ops psb_chip_ops = {
.crtcs = 2,
.hdmi_mask = (1 << 0),
.lvds_mask = (1 << 1),
+ .sdvo_mask = (1 << 0),
.cursor_needs_phys = 1,
.sgx_offset = PSB_SGX_OFFSET,
.chip_setup = psb_chip_setup,
diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index b26d029..fd93756 100644
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -672,6 +672,7 @@ struct psb_ops {
int sgx_offset; /* Base offset of SGX device */
int hdmi_mask; /* Mask of HDMI CRTCs */
int lvds_mask; /* Mask of LVDS CRTCs */
+ int sdvo_mask; /* Mask of SDVO CRTCs */
int cursor_needs_phys; /* If cursor base reg need physical address */
/* Sub functions */
--
1.8.3.2
[PATCH 08/11] drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD
For the minnowboard to work the values found in EMGD are required. This might break Oaktrail but without hardware to test with I cannot really tell (and do not really care). Signed-off-by: Patrik Jakobsson --- drivers/gpu/drm/gma500/oaktrail_crtc.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c index 25bf206..8195e85 100644 --- a/drivers/gpu/drm/gma500/oaktrail_crtc.c +++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c @@ -332,16 +332,15 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode) break; } - /*Set FIFO Watermarks*/ - REG_WRITE(DSPARB, 0x3FFF); - REG_WRITE(DSPFW1, 0x3F88080A); - REG_WRITE(DSPFW2, 0x0b060808); + /* Set FIFO Watermarks (values taken from EMGD) */ + REG_WRITE(DSPARB, 0x3f80); + REG_WRITE(DSPFW1, 0x3f8f0404); + REG_WRITE(DSPFW2, 0x04040f04); REG_WRITE(DSPFW3, 0x0); - REG_WRITE(DSPFW4, 0x08030404); + REG_WRITE(DSPFW4, 0x04040404); REG_WRITE(DSPFW5, 0x04040404); REG_WRITE(DSPFW6, 0x78); - REG_WRITE(0x70400, REG_READ(0x70400) | 0x4000); - /* Must write Bit 14 of the Chicken Bit Register */ + REG_WRITE(DSPCHICKENBIT, REG_READ(DSPCHICKENBIT) | 0xc040); gma_power_end(dev); } -- 1.8.3.2
[PATCH 11/11] drm/gma500/mrst: Add SDVO to output init
Signed-off-by: Patrik Jakobsson --- drivers/gpu/drm/gma500/oaktrail_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/gma500/oaktrail_device.c b/drivers/gpu/drm/gma500/oaktrail_device.c index d7c54b2..27d3875 100644 --- a/drivers/gpu/drm/gma500/oaktrail_device.c +++ b/drivers/gpu/drm/gma500/oaktrail_device.c @@ -40,6 +40,9 @@ static int oaktrail_output_init(struct drm_device *dev) dev_err(dev->dev, "DSI is not supported\n"); if (dev_priv->hdmi_priv) oaktrail_hdmi_init(dev, &dev_priv->mode_dev); + + psb_intel_sdvo_init(dev, SDVOB); + return 0; } -- 1.8.3.2
[PATCH 10/11] drm/gma500/mrst: Don't blindly guess a mode for LVDS
Previously we always had something hooked up to LVDS so we tried very
hard to get a mode. With the Minnowboard this is no longer the case.
If no mode can be found over DDC or the firmware we just ignore LVDS.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/oaktrail_lvds.c | 30 +++---
1 file changed, 3 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c
b/drivers/gpu/drm/gma500/oaktrail_lvds.c
index e77d721..4c17c93 100644
--- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
@@ -218,30 +218,6 @@ static const struct drm_encoder_helper_funcs
oaktrail_lvds_helper_funcs = {
.commit = oaktrail_lvds_commit,
};
-static struct drm_display_mode lvds_configuration_modes[] = {
- /* hard coded fixed mode for TPO LTPS LPJ040K001A */
- { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 33264, 800, 836,
- 846, 1056, 0, 480, 489, 491, 525, 0, 0) },
- /* hard coded fixed mode for LVDS 800x480 */
- { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 30994, 800, 801,
- 802, 1024, 0, 480, 481, 482, 525, 0, 0) },
- /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600 at 75 */
- { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1072,
- 1104, 1184, 0, 600, 603, 604, 608, 0, 0) },
- /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600 at 75 */
- { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1104,
- 1136, 1184, 0, 600, 603, 604, 608, 0, 0) },
- /* hard coded fixed mode for Sharp wsvga LVDS 1024x600 */
- { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 48885, 1024, 1124,
- 1204, 1312, 0, 600, 607, 610, 621, 0, 0) },
- /* hard coded fixed mode for LVDS 1024x768 */
- { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
- 1184, 1344, 0, 768, 771, 777, 806, 0, 0) },
- /* hard coded fixed mode for LVDS 1366x768 */
- { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 77500, 1366, 1430,
- 1558, 1664, 0, 768, 769, 770, 776, 0, 0) },
-};
-
/* Returns the panel fixed mode from configuration. */
static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
@@ -303,10 +279,10 @@ static void oaktrail_lvds_get_configuration_mode(struct
drm_device *dev,
mode_dev->panel_fixed_mode =
drm_mode_duplicate(dev,
dev_priv->lfp_lvds_vbt_mode);
- /* Then guess */
+
+ /* If we still got no mode then bail */
if (mode_dev->panel_fixed_mode == NULL)
- mode_dev->panel_fixed_mode
- = drm_mode_duplicate(dev, &lvds_configuration_modes[2]);
+ return;
drm_mode_set_name(mode_dev->panel_fixed_mode);
drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0);
--
1.8.3.2
[PATCH 09/11] drm/gma500/mrst: Setup GMBUS for oaktrail/mrst
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/oaktrail_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/gma500/oaktrail_device.c
b/drivers/gpu/drm/gma500/oaktrail_device.c
index 8079851..d7c54b2 100644
--- a/drivers/gpu/drm/gma500/oaktrail_device.c
+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
@@ -526,6 +526,7 @@ static int oaktrail_chip_setup(struct drm_device *dev)
psb_intel_opregion_init(dev);
psb_intel_init_bios(dev);
}
+ gma_intel_setup_gmbus(dev);
oaktrail_hdmi_setup(dev);
return 0;
}
@@ -534,6 +535,7 @@ static void oaktrail_teardown(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = dev->dev_private;
+ gma_intel_teardown_gmbus(dev);
oaktrail_hdmi_teardown(dev);
if (!dev_priv->has_gct)
psb_intel_destroy_bios(dev);
--
1.8.3.2
[PATCH 03/11] drm/gma500: Add aux device support for gmbus
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/intel_gmbus.c | 90
1 file changed, 49 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/gma500/intel_gmbus.c
b/drivers/gpu/drm/gma500/intel_gmbus.c
index 62cd42e..566d330 100644
--- a/drivers/gpu/drm/gma500/intel_gmbus.c
+++ b/drivers/gpu/drm/gma500/intel_gmbus.c
@@ -51,6 +51,9 @@
#define wait_for(COND, MS) _wait_for(COND, MS, 1)
#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
+#define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg))
+#define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg))
+
/* Intel GPIO access functions */
#define I2C_RISEFALL_TIME 20
@@ -71,7 +74,8 @@ struct intel_gpio {
void
gma_intel_i2c_reset(struct drm_device *dev)
{
- REG_WRITE(GMBUS0, 0);
+ struct drm_psb_private *dev_priv = dev->dev_private;
+ GMBUS_REG_WRITE(GMBUS0, 0);
}
static void intel_i2c_quirk_set(struct drm_psb_private *dev_priv, bool enable)
@@ -98,11 +102,10 @@ static void intel_i2c_quirk_set(struct drm_psb_private
*dev_priv, bool enable)
static u32 get_reserved(struct intel_gpio *gpio)
{
struct drm_psb_private *dev_priv = gpio->dev_priv;
- struct drm_device *dev = dev_priv->dev;
u32 reserved = 0;
/* On most chips, these bits must be preserved in software. */
- reserved = REG_READ(gpio->reg) &
+ reserved = GMBUS_REG_READ(gpio->reg) &
(GPIO_DATA_PULLUP_DISABLE |
GPIO_CLOCK_PULLUP_DISABLE);
@@ -113,29 +116,26 @@ static int get_clock(void *data)
{
struct intel_gpio *gpio = data;
struct drm_psb_private *dev_priv = gpio->dev_priv;
- struct drm_device *dev = dev_priv->dev;
u32 reserved = get_reserved(gpio);
- REG_WRITE(gpio->reg, reserved | GPIO_CLOCK_DIR_MASK);
- REG_WRITE(gpio->reg, reserved);
- return (REG_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
+ GMBUS_REG_WRITE(gpio->reg, reserved | GPIO_CLOCK_DIR_MASK);
+ GMBUS_REG_WRITE(gpio->reg, reserved);
+ return (GMBUS_REG_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
}
static int get_data(void *data)
{
struct intel_gpio *gpio = data;
struct drm_psb_private *dev_priv = gpio->dev_priv;
- struct drm_device *dev = dev_priv->dev;
u32 reserved = get_reserved(gpio);
- REG_WRITE(gpio->reg, reserved | GPIO_DATA_DIR_MASK);
- REG_WRITE(gpio->reg, reserved);
- return (REG_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
+ GMBUS_REG_WRITE(gpio->reg, reserved | GPIO_DATA_DIR_MASK);
+ GMBUS_REG_WRITE(gpio->reg, reserved);
+ return (GMBUS_REG_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
}
static void set_clock(void *data, int state_high)
{
struct intel_gpio *gpio = data;
struct drm_psb_private *dev_priv = gpio->dev_priv;
- struct drm_device *dev = dev_priv->dev;
u32 reserved = get_reserved(gpio);
u32 clock_bits;
@@ -145,15 +145,14 @@ static void set_clock(void *data, int state_high)
clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
GPIO_CLOCK_VAL_MASK;
- REG_WRITE(gpio->reg, reserved | clock_bits);
- REG_READ(gpio->reg); /* Posting */
+ GMBUS_REG_WRITE(gpio->reg, reserved | clock_bits);
+ GMBUS_REG_READ(gpio->reg); /* Posting */
}
static void set_data(void *data, int state_high)
{
struct intel_gpio *gpio = data;
struct drm_psb_private *dev_priv = gpio->dev_priv;
- struct drm_device *dev = dev_priv->dev;
u32 reserved = get_reserved(gpio);
u32 data_bits;
@@ -163,8 +162,8 @@ static void set_data(void *data, int state_high)
data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
GPIO_DATA_VAL_MASK;
- REG_WRITE(gpio->reg, reserved | data_bits);
- REG_READ(gpio->reg);
+ GMBUS_REG_WRITE(gpio->reg, reserved | data_bits);
+ GMBUS_REG_READ(gpio->reg);
}
static struct i2c_adapter *
@@ -251,7 +250,6 @@ gmbus_xfer(struct i2c_adapter *adapter,
struct intel_gmbus,
adapter);
struct drm_psb_private *dev_priv = adapter->algo_data;
- struct drm_device *dev = dev_priv->dev;
int i, reg_offset;
if (bus->force_bit)
@@ -260,28 +258,30 @@ gmbus_xfer(struct i2c_adapter *adapter,
reg_offset = 0;
- REG_WRITE(GMBUS0 + reg_offset, bus->reg0);
+ GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0);
for (i = 0; i < num; i++) {
u16 len = msgs[i].len;
u8 *buf = msgs[i].buf;
if (msgs[i].flags & I2C_M_RD) {
- REG_WRITE(GMBUS1 + reg_offset,
- GMBUS_CYCLE_WAIT | (i + 1 == num ?
GMBUS_CYCLE_STOP : 0) |
- (len
[PATCH 07/11] drm/gma500/mrst: Add aux register writes to SDVO
This turned out to be tricky. Writing to SDVOB on the primary vdc also
writes to SDVOB on the aux vdc, but reading it back on the primary vdc
always fails. Basically we never read from the primary vdc since we
will end up trashing the aux vdc.
Signed-off-by: Patrik Jakobsson
---
drivers/gpu/drm/gma500/psb_intel_sdvo.c | 59 +
1 file changed, 38 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index 6f01cdf..07d3a9e 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -228,24 +228,26 @@ static void psb_intel_sdvo_write_sdvox(struct
psb_intel_sdvo *psb_intel_sdvo, u3
{
struct drm_device *dev = psb_intel_sdvo->base.base.dev;
u32 bval = val, cval = val;
- int i;
+ int i, j;
+ int need_aux = IS_MRST(dev) ? 1 : 0;
- if (psb_intel_sdvo->sdvo_reg == SDVOB) {
- cval = REG_READ(SDVOC);
- } else {
- bval = REG_READ(SDVOB);
- }
- /*
-* Write the registers twice for luck. Sometimes,
-* writing them only once doesn't appear to 'stick'.
-* The BIOS does this too. Yay, magic
-*/
- for (i = 0; i < 2; i++)
- {
- REG_WRITE(SDVOB, bval);
- REG_READ(SDVOB);
- REG_WRITE(SDVOC, cval);
- REG_READ(SDVOC);
+ for (j = 0; j <= need_aux; j++) {
+ if (psb_intel_sdvo->sdvo_reg == SDVOB)
+ cval = REG_READ_WITH_AUX(SDVOC, j);
+ else
+ bval = REG_READ_WITH_AUX(SDVOB, j);
+
+ /*
+ * Write the registers twice for luck. Sometimes,
+ * writing them only once doesn't appear to 'stick'.
+ * The BIOS does this too. Yay, magic
+ */
+ for (i = 0; i < 2; i++) {
+ REG_WRITE_WITH_AUX(SDVOB, bval, j);
+ REG_READ_WITH_AUX(SDVOB, j);
+ REG_WRITE_WITH_AUX(SDVOC, cval, j);
+ REG_READ_WITH_AUX(SDVOC, j);
+ }
}
}
@@ -995,6 +997,7 @@ static void psb_intel_sdvo_mode_set(struct drm_encoder
*encoder,
struct psb_intel_sdvo_dtd input_dtd;
int pixel_multiplier =
psb_intel_mode_get_pixel_multiplier(adjusted_mode);
int rate;
+ int need_aux = IS_MRST(dev) ? 1 : 0;
if (!mode)
return;
@@ -1060,7 +1063,11 @@ static void psb_intel_sdvo_mode_set(struct drm_encoder
*encoder,
return;
/* Set the SDVO control regs. */
- sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
+ if (need_aux)
+ sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
+ else
+ sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
+
switch (psb_intel_sdvo->sdvo_reg) {
case SDVOB:
sdvox &= SDVOB_PRESERVE_MASK;
@@ -1090,6 +1097,8 @@ static void psb_intel_sdvo_dpms(struct drm_encoder
*encoder, int mode)
struct drm_device *dev = encoder->dev;
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
u32 temp;
+ int i;
+ int need_aux = IS_MRST(dev) ? 1 : 0;
switch (mode) {
case DRM_MODE_DPMS_ON:
@@ -1108,19 +1117,27 @@ static void psb_intel_sdvo_dpms(struct drm_encoder
*encoder, int mode)
psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo,
mode);
if (mode == DRM_MODE_DPMS_OFF) {
- temp = REG_READ(psb_intel_sdvo->sdvo_reg);
+ if (need_aux)
+ temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
+ else
+ temp = REG_READ(psb_intel_sdvo->sdvo_reg);
+
if ((temp & SDVO_ENABLE) != 0) {
psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp
& ~SDVO_ENABLE);
}
}
} else {
bool input1, input2;
- int i;
u8 status;
- temp = REG_READ(psb_intel_sdvo->sdvo_reg);
+ if (need_aux)
+ temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
+ else
+ temp = REG_READ(psb_intel_sdvo->sdvo_reg);
+
if ((temp & SDVO_ENABLE) == 0)
psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp |
SDVO_ENABLE);
+
for (i = 0; i < 2; i++)
gma_wait_for_vblank(dev);
--
1.8.3.2
[Mesa-dev] rules for merging patches to libdrm
>> How does this interact with the rule that kernel interfaces require an >> open source userspace? Is "here are the mesa/libdrm patches that use >> it" sufficient to get the kernel interface merged? > > That's my understanding: open source userspace needs to exist, but it > doesn't need to be merged upstream yet. Having an opensource userspace and having it committed to a final repo are different things, as Daniel said patches on the mesa-list were sufficient, they're was no hurry to merge them considering a kernel release with the code wasn't close, esp with a 3 month release window if the kernel merge window is close to that anyways. >> libdrm is easy to change and its releases are cheap. What problem does >> committing code that uses an in-progress kernel interface to libdrm >> cause? I guess I'm not understanding something. > Releases are cheap, but ABI breaks aren't so you can't just go release a libdrm with an ABI for mesa then decide later it was a bad plan. > Introducing new kernel API usually involves assigning numbers for things > - a new ioctl number, new #defines for bitfield members, and so on. > > Multiple patches can be in flight at the same time. For example, Abdiel > and I both defined execbuf2 flags: > > #define I915_EXEC_RS (1 << 13) (Abdiel's code) > #define I915_EXEC_OA (1 << 13) (my code) > > These obviously conflict. One of the two will land, and the second > patch author will need to switch to (1 << 14) and resubmit. > > If we both decide to push to libdrm, we might get the order backwards, > or maybe one series won't get pushed at all (in this case, I'm planning > to drop my patch). Waiting until one lands in the kernel avoids that > problem. Normally, I believe we copy the kernel headers to userspace > and fix them up a bit. > > Dave may have other reasons; this is just the one I thought of. But mostly this, we've been stung by this exact thing happening before, and we made the process to stop it from happening again. Dave.
[pull] radeon drm-next-3.13
2013/11/8 Alex Deucher : > Revert "drm/radeon/audio: don't set speaker allocation on DCE4+" What about that hangs people reported? Has anything changed meanwhile? Did you fix them with some another commit? 2013/10/28 Deucher, Alexander : >> Did you get any reports about that? Or is that based only on mine comment: > > Yes, I had some reports of hangs on newer chips for some people as well. I'm > not sure if it was directly correlated, but seemed like the safe thing to at > this point in the kernel cycle.
[Intel-gfx] [PATCH v2 0/7] drm/i915: Baytrail MIPI DSI support Updated
On Sat, Nov 09, 2013 at 03:19:01PM +0530, Shobhit Kumar wrote: > Hi All - > These patches enhance the current support for MIPI DSI for Baytrail. They > continue on the sub-encoder design and adds few more dev_ops to handle > sequence correctly. Major changes are - > > 1. DSI Clock calculation based on pixel clock > 2. Add new dev_ops for better sequencing the enable/disable path > 3. Parameterized the hardcoded DSI parameters. These also forms building >block for the generic MIPI driver to come in future based on enhancements >in VBT. All these parameters are initialized or computed in the sub-encoder >driver. Some of them might look unneccesary for now. > > I am also aware of the drm_bridge support now comming in and will in future > migrate from sub-encoder design to drm_bridge. Just a quick aside: Thierry Reding from nvidia is also working on a DSI design for the tegra driver. Atm he seems to aim for a full-blown DSI bus based on his drm_panel patches for getting the panel metadata out of an ARM DT (we'd use VBT instead). Iirc there's no patches anywhere yet, but maybe Thierry could share a git branch somewhere with the wip stuff? Cc'ing Thierry and dri-devel in case a bigger discussion develops. Cheers, Daniel > > This DSI sequence has been validated with couple of test panels and is > working now. > Still no sub-encoder driver is included and this support will be mostly be > disabled > untill a panel sub-encoder driver is added. Proper detection or VBT is still > pending. > > v2: Mostly changes from review comments from Jani Nikula and Ville Syrjala > - Split the parameters into new patch > - Split the dsi_clk computation and m-n-p modification in separate patches > - The DSI sequence refactoring has been splitted into multiple patches > and also > few code changes are not needed after reworking/relooking at them and > have been > removed > - Backlight enabling has been removed as that depends on platform PMIC > driver which > is not yet there in upstream kernel. Will be added later. > - Other general code cleanup as suggested > - drm/i915: Use FLISDSI interface for band gap reset - has no changes and > is included > for completeness of the patch set > > Regards > Shobhit > > Shobhit Kumar (7): > drm/i915: Add more dev ops for MIPI sub encoder > drm/i915: Use FLISDSI interface for band gap reset > drm/i915: Compute dsi_clk from pixel clock > drm/i915: Try harder to get best m,n,p values with minimal error > drm/i915: Reorganize the DSI enable/disable sequence > drm/i915: Remove redundant DSI PLL enabling > drm/i915: Parametrize the dphy and other spec specific parameters > > drivers/gpu/drm/i915/i915_drv.h | 13 +++ > drivers/gpu/drm/i915/i915_reg.h |1 + > drivers/gpu/drm/i915/intel_dsi.c | 187 > ++--- > drivers/gpu/drm/i915/intel_dsi.h | 21 > drivers/gpu/drm/i915/intel_dsi_pll.c | 72 ++--- > drivers/gpu/drm/i915/intel_sideband.c | 14 +++ > 6 files changed, 209 insertions(+), 99 deletions(-) > > -- > 1.7.9.5 > > ___ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
[Bug 63997] Artifacts using a HD7480D on a A4-5300 APU
https://bugs.freedesktop.org/show_bug.cgi?id=63997 --- Comment #35 from Tony Ducrocq --- I confirm this bug with Radeon HD 7480D on AMD A4-4000 APU. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/507d2ed0/attachment.html>
[Bug 63101] Hard lockup whel launching games like TF2 on kernels 3.11.5 and 3.12 rc4 and above if radeon.dpm=1 is used
https://bugzilla.kernel.org/show_bug.cgi?id=63101 Kertesz Laszlo changed: What|Removed |Added Kernel Version|3.11.5 |3.12.0 Regression|No |Yes -- You are receiving this mail because: You are watching the assignee of the bug.
[Bug 63997] Artifacts using a HD7480D on a A4-5300 APU
https://bugs.freedesktop.org/show_bug.cgi?id=63997 --- Comment #36 from Tony Ducrocq --- I would like to test this patch : https://bugs.freedesktop.org/attachment.cgi?id=86939 but before I would like to know if my device is one of the one matching the condition (eg. 4hw contexts). How can I know my value for rdev->pdev->device ? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/2c115b24/attachment.html>
[PATCH 05/12] drm: shmob_drm: Convert to clk_prepare/unprepare
Hi Dave,
Could you please pick this patch up ?
On Monday 28 October 2013 23:49:22 Laurent Pinchart wrote:
> Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
> clk_disable_unprepare() to get ready for the migration to the common
> clock framework.
>
> Cc: David Airlie
> Cc: dri-devel at lists.freedesktop.org
> Signed-off-by: Laurent Pinchart
> ---
> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c index 54bad98..562f9a4 100644
> --- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> +++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
> @@ -40,7 +40,7 @@
> static void shmob_drm_clk_on(struct shmob_drm_device *sdev)
> {
> if (sdev->clock)
> - clk_enable(sdev->clock);
> + clk_prepare_enable(sdev->clock);
> #if 0
> if (sdev->meram_dev && sdev->meram_dev->pdev)
> pm_runtime_get_sync(&sdev->meram_dev->pdev->dev);
> @@ -54,7 +54,7 @@ static void shmob_drm_clk_off(struct shmob_drm_device
> *sdev) pm_runtime_put_sync(&sdev->meram_dev->pdev->dev);
> #endif
> if (sdev->clock)
> - clk_disable(sdev->clock);
> + clk_disable_unprepare(sdev->clock);
> }
>
> /*
> ---
--
Regards,
Laurent Pinchart
[Bug 71431] radeon graphics stopped working since kernel 3.10 on AMD a4-3300
https://bugs.freedesktop.org/show_bug.cgi?id=71431 --- Comment #1 from ka.nick at mail.ru --- Created attachment 88936 --> https://bugs.freedesktop.org/attachment.cgi?id=88936&action=edit dmesg output X11 doesn't work on my dual-graphics AMD laptop with kernels 3.10.X - 3.12.X, on 3.9.X and earlier kernels does. Upon startup lxdm shows a garbage instead of normal picture (but the colors are from the picture), X restarts every few seconds, but kernel itself works fine - I can ssh into the comp or restart using the magic key. Have been trying different combinations: EXA/Glamor, various xorg options with basically the same result: in some cases I can see the normal working mouse over the garbage, in some cases I get "GPU stall" message in dmesg, or EQ overflow in Xorg.0.log... R600_DEBUG=sdsafemath - improves a picture a bit; ColorTiling off - makes things even better - in this case about 70% of the screen are drawn correctly, but at wrong position on the screen; NoAccel on - works as with 3.9.X kernel - windows and lxdm screen - ok, background with errors. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/b2958bef/attachment.html>
[Bug 71431] radeon graphics stopped working since kernel 3.10 on AMD a4-3300
https://bugs.freedesktop.org/show_bug.cgi?id=71431 --- Comment #2 from ka.nick at mail.ru --- Created attachment 88937 --> https://bugs.freedesktop.org/attachment.cgi?id=88937&action=edit Xorg.0.log -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/8bed37ce/attachment.html>
[Bug 71431] radeon graphics stopped working since kernel 3.10 on AMD a4-3300
https://bugs.freedesktop.org/show_bug.cgi?id=71431 --- Comment #3 from ka.nick at mail.ru --- Created attachment 88939 --> https://bugs.freedesktop.org/attachment.cgi?id=88939&action=edit lspci output -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/c4dc572f/attachment.html>
[PATCH 1/2] drm: radeon: ni_dpm: Fix unused variable warning when CONFIG_ACPI=n
From: Fabio Estevam
With CONFIG_ACPI=n the following build warning is seen:
drivers/gpu/drm/radeon/ni_dpm.c:3448:31: warning: unused variable 'eg_pi'
[-Wunused-variable]
Move the definition of eg_pi inside the CONFIG_ACPI 'if' block.
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/radeon/ni_dpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index f263390..cdc0030 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -3445,9 +3445,9 @@ static int ni_enable_smc_cac(struct radeon_device *rdev,
static int ni_pcie_performance_request(struct radeon_device *rdev,
u8 perf_req, bool advertise)
{
+#if defined(CONFIG_ACPI)
struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
-#if defined(CONFIG_ACPI)
if ((perf_req == PCIE_PERF_REQ_PECI_GEN1) ||
(perf_req == PCIE_PERF_REQ_PECI_GEN2)) {
if (eg_pi->pcie_performance_request_registered == false)
--
1.8.1.2
[PATCH 2/2] drm: radeon: cypress_dpm: Fix unused variable warning when CONFIG_ACPI=n
From: Fabio Estevam
With CONFIG_ACPI=n the following build warning is seen:
drivers/gpu/drm/radeon/cypress_dpm.c:302:31: warning: unused variable 'eg_pi'
[-Wunused-variable]
Move the definition of eg_pi inside the CONFIG_ACPI 'if' block.
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/radeon/cypress_dpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c
b/drivers/gpu/drm/radeon/cypress_dpm.c
index 91bb470..a231c59 100644
--- a/drivers/gpu/drm/radeon/cypress_dpm.c
+++ b/drivers/gpu/drm/radeon/cypress_dpm.c
@@ -299,7 +299,6 @@ void cypress_program_response_times(struct radeon_device
*rdev)
static int cypress_pcie_performance_request(struct radeon_device *rdev,
u8 perf_req, bool advertise)
{
- struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
u32 tmp;
udelay(10);
@@ -308,6 +307,7 @@ static int cypress_pcie_performance_request(struct
radeon_device *rdev,
return 0;
#if defined(CONFIG_ACPI)
+ struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
if ((perf_req == PCIE_PERF_REQ_PECI_GEN1) ||
(perf_req == PCIE_PERF_REQ_PECI_GEN2)) {
eg_pi->pcie_performance_request_registered = true;
--
1.8.1.2
[Bug 63101] Hard lockup whel launching games like TF2 on kernels 3.11.5 and 3.12 rc4 and above if radeon.dpm=1 is used
https://bugzilla.kernel.org/show_bug.cgi?id=63101 --- Comment #16 from Kertesz Laszlo --- It seems that it does work after a day or so uptime. I had 1 day and 6 or 8 hours uptime and i could play the game just fine. Previously i did use programs that used quite some memory (eclipse, virtual machines, browsers). Any ideas why this might be happening? -- You are receiving this mail because: You are watching the assignee of the bug.
[Mesa-dev] rules for merging patches to libdrm
On 11/09/2013 12:11 AM, Dave Airlie wrote: >>> How does this interact with the rule that kernel interfaces require an >>> open source userspace? Is "here are the mesa/libdrm patches that use >>> it" sufficient to get the kernel interface merged? >> >> That's my understanding: open source userspace needs to exist, but it >> doesn't need to be merged upstream yet. > > Having an opensource userspace and having it committed to a final repo > are different things, as Daniel said patches on the mesa-list were > sufficient, they're was no hurry to merge them considering a kernel > release with the code wasn't close, esp with a 3 month release window > if the kernel merge window is close to that anyways. > >>> libdrm is easy to change and its releases are cheap. What problem does >>> committing code that uses an in-progress kernel interface to libdrm >>> cause? I guess I'm not understanding something. >> > > Releases are cheap, but ABI breaks aren't so you can't just go release > a libdrm with an ABI for mesa then decide later it was a bad plan. > >> Introducing new kernel API usually involves assigning numbers for things >> - a new ioctl number, new #defines for bitfield members, and so on. >> >> Multiple patches can be in flight at the same time. For example, Abdiel >> and I both defined execbuf2 flags: >> >> #define I915_EXEC_RS (1 << 13) (Abdiel's code) >> #define I915_EXEC_OA (1 << 13) (my code) >> >> These obviously conflict. One of the two will land, and the second >> patch author will need to switch to (1 << 14) and resubmit. >> >> If we both decide to push to libdrm, we might get the order backwards, >> or maybe one series won't get pushed at all (in this case, I'm planning >> to drop my patch). Waiting until one lands in the kernel avoids that >> problem. Normally, I believe we copy the kernel headers to userspace >> and fix them up a bit. >> >> Dave may have other reasons; this is just the one I thought of. > > But mostly this, we've been stung by this exact thing happening > before, and we made the process to stop it from happening again. Then in all honestly, commits to libdrm should be controlled by either a single person or a small cabal... just like the kernel and the xserver. We're clearly in an uncomfortable middle area where we have a stringent set of restrictions but no way to actually enforce them. > Dave. > ___ > dri-devel mailing list > dri-devel at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 71448] New: [UVD] qvdpautest is very slow on radeonsi (HD 7950)
https://bugs.freedesktop.org/show_bug.cgi?id=71448 Priority: medium Bug ID: 71448 Assignee: dri-devel at lists.freedesktop.org Summary: [UVD] qvdpautest is very slow on radeonsi (HD 7950) Severity: normal Classification: Unclassified OS: All Reporter: darkbasic at linuxsystems.it Hardware: Other Status: NEW Version: XOrg CVS Component: DRM/Radeon Product: DRI http://bpaste.net/show/148239/ kernel is 3.13 (~agd5f drm-next-3.13). The whole graphic stack is from git except xorg-server which is 1.14.3. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20131109/39703791/attachment.html>
[patch] drm/tegra: small leak on error in tegra_fb_alloc()
If we don't have enough memory for ->planes then we leak "fb".
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index 490f771..1362d78 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -98,8 +98,10 @@ static struct tegra_fb *tegra_fb_alloc(struct drm_device
*drm,
return ERR_PTR(-ENOMEM);
fb->planes = kzalloc(num_planes * sizeof(*planes), GFP_KERNEL);
- if (!fb->planes)
- return ERR_PTR(-ENOMEM);
+ if (!fb->planes) {
+ err = -ENOMEM;
+ goto free_fb;
+ }
fb->num_planes = num_planes;
@@ -112,12 +114,17 @@ static struct tegra_fb *tegra_fb_alloc(struct drm_device
*drm,
if (err < 0) {
dev_err(drm->dev, "failed to initialize framebuffer: %d\n",
err);
- kfree(fb->planes);
- kfree(fb);
- return ERR_PTR(err);
+ goto free_planes;
}
return fb;
+
+free_planes:
+ kfree(fb->planes);
+free_fb:
+ kfree(fb);
+
+ return ERR_PTR(err);
}
static struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
