[Bug 36327] fujitsu siemens amilo li1718: ati radeon x200m does not resume from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=36327 Karesz L. changed: What|Removed |Added Attachment #46931|0 |1 is obsolete|| --- Comment #17 from Karesz L. 2011-05-20 00:23:32 PDT --- Created an attachment (id=46933) --> (https://bugs.freedesktop.org/attachment.cgi?id=46933) failed resume attempts log I've just typed the image above. Hopefuly it's more help this way. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 37168] Regression: Kernel hard-lock when running Second Life
https://bugs.freedesktop.org/show_bug.cgi?id=37168 --- Comment #3 from Sean McNamara 2011-05-20 00:36:13 PDT --- Followup: I also get the following messages spewed to dmesg every single frame, regardless if I'm using Mesa 7.10.2 or git master or anything in between. I'm not sure if this is related to the problem or just noise. But I suspect that it's unrelated, because I don't experience any symptoms of failure (crash, OOM) with 7.10.2, and the messages still get spewed. The frequency is about once every frame, or a bit more often. Maybe as frequently as once per kernel tick (~1000 Hz timer). [ 564.159042] DRHD: handling fault status reg 2 [ 564.159248] DMAR:[DMA Write] Request device [04:00.0] fault addr 44bc [ 564.159249] DMAR:[fault reason 05] PTE Write access is not set The DRHD line appears less frequently, but the DMAR lines are always grouped together like that. I tried running other GL apps and it doesn't happen there. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 01/18] drm/radeon/kms: DCE4.1 DIG encoders are fully routeable just like DCE3.2
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c | 13 +
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 9947748..b2e0b58 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -931,10 +931,10 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
else
args.v3.ucLaneNum = 4;
- if (dig->linkb) {
+ if (dig->linkb)
args.v3.acConfig.ucLinkSel = 1;
+ if (dig->dig_encoder & 1)
args.v3.acConfig.ucEncoderSel = 1;
- }
/* Select the PLL for the PHY
* DP PHY should be clocked from external src if there is
@@ -1601,12 +1601,9 @@ static int radeon_atom_pick_dig_encoder(struct
drm_encoder *encoder)
/* DCE4/5 */
if (ASIC_IS_DCE4(rdev)) {
dig = radeon_encoder->enc_priv;
- if (ASIC_IS_DCE41(rdev)) {
- if (dig->linkb)
- return 1;
- else
- return 0;
- } else {
+ if (ASIC_IS_DCE41(rdev))
+ return radeon_crtc->crtc_id;
+ else {
switch (radeon_encoder->encoder_id) {
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
if (dig->linkb)
--
1.7.1.1
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[PATCH 02/18] drm/radeon/kms: properly handle bpc >8 in atom command tables
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 38 ++--
drivers/gpu/drm/radeon/radeon_encoders.c | 70 -
2 files changed, 101 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 529a3a7..608b1c2 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -512,6 +512,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
struct radeon_device *rdev = dev->dev_private;
struct drm_encoder *encoder = NULL;
struct radeon_encoder *radeon_encoder = NULL;
+ struct drm_connector *connector = NULL;
u32 adjusted_clock = mode->clock;
int encoder_mode = 0;
u32 dp_clock = mode->clock;
@@ -546,9 +547,11 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
if (encoder->crtc == crtc) {
radeon_encoder = to_radeon_encoder(encoder);
+ connector = radeon_get_connector_for_encoder(encoder);
+ if (connector)
+ bpc = connector->display_info.bpc;
encoder_mode = atombios_get_encoder_mode(encoder);
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) {
- struct drm_connector *connector =
radeon_get_connector_for_encoder(encoder);
if (connector) {
struct radeon_connector
*radeon_connector = to_radeon_connector(connector);
struct radeon_connector_atom_dig
*dig_connector =
@@ -754,7 +757,8 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc,
u32 ref_div,
u32 fb_div,
u32 frac_fb_div,
- u32 post_div)
+ u32 post_div,
+ int bpc)
{
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
@@ -812,6 +816,15 @@ static void atombios_crtc_program_pll(struct drm_crtc
*crtc,
args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div *
10);
args.v5.ucPostDiv = post_div;
args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
+ switch (bpc) {
+ case 8:
+ default:
+ args.v5.ucMiscInfo |=
PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
+ break;
+ case 10:
+ args.v5.ucMiscInfo |=
PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
+ break;
+ }
args.v5.ucTransmitterID = encoder_id;
args.v5.ucEncoderMode = encoder_mode;
args.v5.ucPpll = pll_id;
@@ -824,6 +837,21 @@ static void atombios_crtc_program_pll(struct drm_crtc
*crtc,
args.v6.ulFbDivDecFrac = cpu_to_le32(frac_fb_div *
10);
args.v6.ucPostDiv = post_div;
args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */
+ switch (bpc) {
+ case 8:
+ default:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_24BPP;
+ break;
+ case 10:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_30BPP;
+ break;
+ case 12:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_36BPP;
+ break;
+ case 16:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_48BPP;
+ break;
+ }
args.v6.ucTransmitterID = encoder_id;
args.v6.ucEncoderMode = encoder_mode;
args.v6.ucPpll = pll_id;
@@ -855,6 +883,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
int encoder_mode = 0;
struct radeon_atom_ss ss;
bool ss_enabled = false;
+ int bpc = 8;
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
if (encoder->crtc == crtc) {
@@ -891,6 +920,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
int dp_clock;
+
[PATCH 03/18] drm/radeon/kms: spread spectrum fixes
- properly mask the ss type
- don't enable ss if type is external or percentage is 0
- if ss enabled and type is external, set ref_div_src to ext clock
- prefer ASIC_INTERNAL_SS_ON_DP to LCD_Info SS_Id for eDP
- fix ss amount calculation
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 52 ++--
1 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 608b1c2..ff0d1ca 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -420,7 +420,7 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc,
if (ASIC_IS_DCE5(rdev)) {
args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0);
- args.v3.ucSpreadSpectrumType = ss->type;
+ args.v3.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
switch (pll_id) {
case ATOM_PPLL1:
args.v3.ucSpreadSpectrumType |=
ATOM_PPLL_SS_TYPE_V3_P1PLL;
@@ -441,9 +441,11 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc,
return;
}
args.v2.ucEnable = enable;
+ if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK))
+ args.v3.ucEnable = ATOM_DISABLE;
} else if (ASIC_IS_DCE4(rdev)) {
args.v2.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.v2.ucSpreadSpectrumType = ss->type;
+ args.v2.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
switch (pll_id) {
case ATOM_PPLL1:
args.v2.ucSpreadSpectrumType |=
ATOM_PPLL_SS_TYPE_V2_P1PLL;
@@ -464,32 +466,36 @@ static void atombios_crtc_program_ss(struct drm_crtc
*crtc,
return;
}
args.v2.ucEnable = enable;
+ if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK))
+ args.v2.ucEnable = ATOM_DISABLE;
} else if (ASIC_IS_DCE3(rdev)) {
args.v1.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.v1.ucSpreadSpectrumType = ss->type;
+ args.v1.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.v1.ucSpreadSpectrumStep = ss->step;
args.v1.ucSpreadSpectrumDelay = ss->delay;
args.v1.ucSpreadSpectrumRange = ss->range;
args.v1.ucPpll = pll_id;
args.v1.ucEnable = enable;
} else if (ASIC_IS_AVIVO(rdev)) {
- if (enable == ATOM_DISABLE) {
+ if ((enable == ATOM_DISABLE) || (ss->percentage == 0) ||
+ (ss->type & ATOM_EXTERNAL_SS_MASK)) {
atombios_disable_ss(crtc);
return;
}
args.lvds_ss_2.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.lvds_ss_2.ucSpreadSpectrumType = ss->type;
+ args.lvds_ss_2.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.lvds_ss_2.ucSpreadSpectrumStep = ss->step;
args.lvds_ss_2.ucSpreadSpectrumDelay = ss->delay;
args.lvds_ss_2.ucSpreadSpectrumRange = ss->range;
args.lvds_ss_2.ucEnable = enable;
} else {
- if (enable == ATOM_DISABLE) {
+ if ((enable == ATOM_DISABLE) || (ss->percentage == 0) ||
+ (ss->type & ATOM_EXTERNAL_SS_MASK)) {
atombios_disable_ss(crtc);
return;
}
args.lvds_ss.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.lvds_ss.ucSpreadSpectrumType = ss->type;
+ args.lvds_ss.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.lvds_ss.ucSpreadSpectrumStepSize_Delay = (ss->step & 3) <<
2;
args.lvds_ss.ucSpreadSpectrumStepSize_Delay |= (ss->delay & 7)
<< 4;
args.lvds_ss.ucEnable = enable;
@@ -615,7 +621,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
args.v1.usPixelClock = cpu_to_le16(mode->clock
/ 10);
args.v1.ucTransmitterID =
radeon_encoder->encoder_id;
args.v1.ucEncodeMode = encoder_mode;
- if (ss_enabled)
+ if (ss_enabled && ss->percentage)
args.v1.ucConfig |=
ADJUST_DISPLAY_CONFIG_SS_ENABLE;
@@ -628,7 +634,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
args.v3.sInput.ucTransmitterID =
radeon_encoder->en
[PATCH 04/18] drm/radeon/kms: fix up DP clock programming on DCE4/5
In DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
depending on the asic. The crtc virtual pixel clock is derived from
the DP ref clock.
- DCE4: PPLL or ext clock
- DCE5: DCPLL or ext clock
Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip
PPLL/DCPLL programming and only program the DP DTO for the
crtc virtual pixel clock.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 12 ++--
drivers/gpu/drm/radeon/radeon_encoders.c | 11 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index ff0d1ca..9770aff 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1443,11 +1443,19 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
uint32_t pll_in_use = 0;
if (ASIC_IS_DCE4(rdev)) {
- /* if crtc is driving DP and we have an ext clock, use that */
list_for_each_entry(test_encoder,
&dev->mode_config.encoder_list, head) {
if (test_encoder->crtc && (test_encoder->crtc == crtc))
{
+ /* in DP mode, the DP ref clock can come from
PPLL, DCPLL, or ext clock,
+* depending on the asic:
+* DCE4: PPLL or ext clock
+* DCE5: DCPLL or ext clock
+*
+* Setting ATOM_PPLL_INVALID will cause
SetPixelClock to skip
+* PPLL/DCPLL programming and only program the
DP DTO for the
+* crtc virtual pixel clock.
+*/
if (atombios_get_encoder_mode(test_encoder) ==
ATOM_ENCODER_MODE_DP) {
- if (rdev->clock.dp_extclk)
+ if (ASIC_IS_DCE5(rdev) ||
rdev->clock.dp_extclk)
return ATOM_PPLL_INVALID;
}
}
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 6c6793e..4d66e24 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -988,11 +988,16 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
}
if (ASIC_IS_DCE5(rdev)) {
- if (is_dp && rdev->clock.dp_extclk)
- args.v4.acConfig.ucRefClkSource = 3; /*
external src */
- else
+ /* On DCE5 DCPLL usually generates the DP ref clock */
+ if (is_dp) {
+ if (rdev->clock.dp_extclk)
+ args.v4.acConfig.ucRefClkSource =
ENCODER_REFCLK_SRC_EXTCLK;
+ else
+ args.v4.acConfig.ucRefClkSource =
ENCODER_REFCLK_SRC_DCPLL;
+ } else
args.v4.acConfig.ucRefClkSource = pll_id;
} else {
+ /* On DCE4, if there is an external clock, it generates
the DP ref clock */
if (is_dp && rdev->clock.dp_extclk)
args.v3.acConfig.ucRefClkSource = 2; /*
external src */
else
--
1.7.1.1
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[PATCH 05/18] drm/radeon/kms: adjust eDP handling (v2)
eDP is usually used as an LVDS replacement, so treat
it more like LVDS from the user perspective.
v2: encoder mode is always DP for eDP.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 30 +++
drivers/gpu/drm/radeon/radeon_encoders.c |3 +-
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 5f45fa1..a7bdcc7 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1314,7 +1314,6 @@ radeon_add_atom_connector(struct drm_device *dev,
connector->doublescan_allowed = false;
break;
case DRM_MODE_CONNECTOR_DisplayPort:
- case DRM_MODE_CONNECTOR_eDP:
radeon_dig_connector = kzalloc(sizeof(struct
radeon_connector_atom_dig), GFP_KERNEL);
if (!radeon_dig_connector)
goto failed;
@@ -1324,10 +1323,7 @@ radeon_add_atom_connector(struct drm_device *dev,
drm_connector_helper_add(&radeon_connector->base,
&radeon_dp_connector_helper_funcs);
if (i2c_bus->valid) {
/* add DP i2c bus */
- if (connector_type == DRM_MODE_CONNECTOR_eDP)
- radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
- else
- radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
+ radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
if (!radeon_dig_connector->dp_i2c_bus)
DRM_ERROR("DP: Failed to assign dp ddc bus!
Check dmesg for i2c errors.\n");
radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
@@ -1353,6 +1349,30 @@ radeon_add_atom_connector(struct drm_device *dev,
/* in theory with a DP to VGA converter... */
connector->doublescan_allowed = false;
break;
+ case DRM_MODE_CONNECTOR_eDP:
+ radeon_dig_connector = kzalloc(sizeof(struct
radeon_connector_atom_dig), GFP_KERNEL);
+ if (!radeon_dig_connector)
+ goto failed;
+ radeon_dig_connector->igp_lane_info = igp_lane_info;
+ radeon_connector->con_priv = radeon_dig_connector;
+ drm_connector_init(dev, &radeon_connector->base,
&radeon_dp_connector_funcs, connector_type);
+ drm_connector_helper_add(&radeon_connector->base,
&radeon_dp_connector_helper_funcs);
+ if (i2c_bus->valid) {
+ /* add DP i2c bus */
+ radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
+ if (!radeon_dig_connector->dp_i2c_bus)
+ DRM_ERROR("DP: Failed to assign dp ddc bus!
Check dmesg for i2c errors.\n");
+ radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
+ if (!radeon_connector->ddc_bus)
+ DRM_ERROR("DP: Failed to assign ddc bus! Check
dmesg for i2c errors.\n");
+ }
+ drm_connector_attach_property(&radeon_connector->base,
+
dev->mode_config.scaling_mode_property,
+ DRM_MODE_SCALE_FULLSCREEN);
+ subpixel_order = SubPixelHorizontalRGB;
+ connector->interlace_allowed = false;
+ connector->doublescan_allowed = false;
+ break;
case DRM_MODE_CONNECTOR_SVIDEO:
case DRM_MODE_CONNECTOR_Composite:
case DRM_MODE_CONNECTOR_9PinDIN:
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 4d66e24..49fcd60 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -668,7 +668,6 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
return ATOM_ENCODER_MODE_LVDS;
break;
case DRM_MODE_CONNECTOR_DisplayPort:
- case DRM_MODE_CONNECTOR_eDP:
dig_connector = radeon_connector->con_priv;
if ((dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
(dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
@@ -682,6 +681,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
} else
return ATOM_ENCODER_MODE_DVI;
break;
+ case DRM_MODE_CONNECTOR_eDP:
+ return ATOM_ENCODER_MODE_DP;
case DRM_MODE_CONNECTOR_DVIA:
case DRM_MODE_CONNECTOR_VGA:
return ATOM_ENCODER_MODE_CRT;
--
1.7.1.1
___
[PATCH 06/18] drm/radeon/kms: fix eDP panel power function
need to wait for the panel to power up.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c | 24 +++-
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 49fcd60..cdac739 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1095,7 +1095,7 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
}
-void
+bool
atombios_set_edp_panel_power(struct drm_connector *connector, int action)
{
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
@@ -1106,23 +1106,37 @@ atombios_set_edp_panel_power(struct drm_connector
*connector, int action)
uint8_t frev, crev;
if (connector->connector_type != DRM_MODE_CONNECTOR_eDP)
- return;
+ goto done;
if (!ASIC_IS_DCE4(rdev))
- return;
+ goto done;
if ((action != ATOM_TRANSMITTER_ACTION_POWER_ON) &&
(action != ATOM_TRANSMITTER_ACTION_POWER_OFF))
- return;
+ goto done;
if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
&crev))
- return;
+ goto done;
memset(&args, 0, sizeof(args));
args.v1.ucAction = action;
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
+
+ /* wait for the panel to power up */
+ if (action == ATOM_TRANSMITTER_ACTION_POWER_ON) {
+ int i;
+
+ for (i = 0; i < 300; i++) {
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
+ return true;
+ mdelay(1);
+ }
+ return false;
+ }
+done:
+ return true;
}
union external_encoder_control {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index 9c57538..e4d3237 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -545,7 +545,7 @@ struct drm_encoder
*radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, i
extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
-extern void atombios_set_edp_panel_power(struct drm_connector *connector, int
action);
+extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int
action);
extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
--
1.7.1.1
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[PATCH 07/18] drm/radeon/kms: make sure eDP panel is on for modesetting
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index cdac739..fd0087f 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1936,11 +1936,17 @@ static void radeon_atom_encoder_prepare(struct
drm_encoder *encoder)
radeon_atom_output_lock(encoder, true);
radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
- /* select the clock/data port if it uses a router */
if (connector) {
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
+
+ /* select the clock/data port if it uses a router */
if (radeon_connector->router.cd_valid)
radeon_router_select_cd_port(radeon_connector);
+
+ /* turn eDP panel on for mode set */
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+ atombios_set_edp_panel_power(connector,
+
ATOM_TRANSMITTER_ACTION_POWER_ON);
}
/* this is needed for the pll/ss setup to work correctly in some cases
*/
--
1.7.1.1
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[PATCH 08/18] drm/radeon/kms: add some dp encoder/connector helper funcs
Used for dp1.2 support and for dp bridges.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 71
drivers/gpu/drm/radeon/radeon_encoders.c | 23 +
drivers/gpu/drm/radeon/radeon_mode.h |5 ++
3 files changed, 99 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index a7bdcc7..9f3c650 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1068,6 +1068,77 @@ static int radeon_dp_get_modes(struct drm_connector
*connector)
return ret;
}
+bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector)
+{
+ struct drm_mode_object *obj;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
+ int i;
+ bool found = false;
+
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ if (connector->encoder_ids[i] == 0)
+ break;
+
+ obj = drm_mode_object_find(connector->dev,
connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
+ if (!obj)
+ continue;
+
+ encoder = obj_to_encoder(obj);
+ radeon_encoder = to_radeon_encoder(encoder);
+
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ found = true;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return found;
+}
+
+bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
+{
+ struct drm_mode_object *obj;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
+ int i;
+ bool found = false;
+
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ if (connector->encoder_ids[i] == 0)
+ break;
+
+ obj = drm_mode_object_find(connector->dev,
connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
+ if (!obj)
+ continue;
+
+ encoder = obj_to_encoder(obj);
+ radeon_encoder = to_radeon_encoder(encoder);
+ if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
+ found = true;
+ }
+
+ return found;
+}
+
+bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct radeon_device *rdev = dev->dev_private;
+
+ if (ASIC_IS_DCE5(rdev) &&
+ (rdev->clock.dp_extclk >= 53900) &&
+ radeon_connector_encoder_is_hbr2(connector)) {
+ return true;
+ }
+
+ return false;
+}
+
static enum drm_connector_status
radeon_dp_detect(struct drm_connector *connector, bool force)
{
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index fd0087f..1c064e7 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -250,6 +250,25 @@ struct drm_encoder
*radeon_atom_get_external_encoder(struct drm_encoder *encoder
return NULL;
}
+bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder)
+{
+ struct drm_encoder *other_encoder =
radeon_atom_get_external_encoder(encoder);
+
+ if (other_encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(other_encoder);
+
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ return true;
+ default:
+ return false;
+ }
+ }
+
+ return false;
+}
+
void radeon_panel_mode_fixup(struct drm_encoder *encoder,
struct drm_display_mode *adjusted_mode)
{
@@ -621,6 +640,10 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *dig_connector;
+ /* dp bridges are always DP */
+ if (radeon_encoder_is_dp_bridge(encoder))
+ return ATOM_ENCODER_MODE_DP;
+
connector = radeon_get_connector_for_encoder(encoder);
if (!connector) {
switch (radeon_encoder->encoder_id) {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index e4d3237..7a3cfa0 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -464,6 +464,11 @@ radeon_atombios_get_tv_info(struct radeon_device *rdev);
extern struct drm_connector *
radeon_get_connector_for_encoder(struct drm_encoder *encoder);
+extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder);
+extern bool radeon_connector_encoder_i
[PATCH 10/18] drm/radeon/kms: improve DP detect logic
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index e9493d7..356feea 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1142,6 +1142,8 @@ bool radeon_connector_is_dp12_capable(struct
drm_connector *connector)
static enum drm_connector_status
radeon_dp_detect(struct drm_connector *connector, bool force)
{
+ struct drm_device *dev = connector->dev;
+ struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
enum drm_connector_status ret = connector_status_disconnected;
struct radeon_connector_atom_dig *radeon_dig_connector =
radeon_connector->con_priv;
@@ -1164,12 +1166,18 @@ radeon_dp_detect(struct drm_connector *connector, bool
force)
ATOM_TRANSMITTER_ACTION_POWER_OFF);
} else {
radeon_dig_connector->dp_sink_type =
radeon_dp_getsinktype(radeon_connector);
- if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) {
- if (radeon_dp_getdpcd(radeon_connector))
- ret = connector_status_connected;
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
+ ret = connector_status_connected;
+ if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT)
+ radeon_dp_getdpcd(radeon_connector);
} else {
- if (radeon_ddc_probe(radeon_connector))
- ret = connector_status_connected;
+ if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+ if (radeon_dp_getdpcd(radeon_connector))
+ ret = connector_status_connected;
+ } else {
+ if (radeon_ddc_probe(radeon_connector))
+ ret = connector_status_connected;
+ }
}
}
--
1.7.1.1
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[PATCH 11/18] drm/radeon/kms: improve aux error handling
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 234 ++
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
2 files changed, 151 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 695de9a..0f72f4d 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -327,23 +327,23 @@ union aux_channel_transaction {
};
/* radeon aux chan functions */
-bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
- int num_bytes, u8 *read_byte,
- u8 read_buf_len, u8 delay)
+static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
+u8 *send, int send_bytes,
+u8 *recv, int recv_size,
+u8 delay, u8 *ack)
{
struct drm_device *dev = chan->dev;
struct radeon_device *rdev = dev->dev_private;
union aux_channel_transaction args;
int index = GetIndexIntoMasterTable(COMMAND,
ProcessAuxChannelTransaction);
unsigned char *base;
- int retry_count = 0;
+ int recv_bytes;
memset(&args, 0, sizeof(args));
base = (unsigned char *)rdev->mode_info.atom_context->scratch;
-retry:
- memcpy(base, req_bytes, num_bytes);
+ memcpy(base, send, send_bytes);
args.v1.lpAuxRequest = 0;
args.v1.lpDataOut = 16;
@@ -355,75 +355,103 @@ retry:
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
- if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) {
- if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10)
- goto retry;
- DRM_DEBUG_KMS("failed to get auxch %02x%02x %02x %02x 0x%02x
%02x after %d retries\n",
- req_bytes[1], req_bytes[0], req_bytes[2],
req_bytes[3],
- chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count);
- return false;
+ *ack = args.v1.ucReplyStatus;
+
+ /* timeout */
+ if (args.v1.ucReplyStatus == 1) {
+ DRM_DEBUG_KMS("dp_aux_ch timeout\n");
+ return -ETIMEDOUT;
}
- if (args.v1.ucDataOutLen && read_byte && read_buf_len) {
- if (read_buf_len < args.v1.ucDataOutLen) {
- DRM_ERROR("Buffer to small for return answer %d %d\n",
- read_buf_len, args.v1.ucDataOutLen);
- return false;
- }
- {
- int len = min(read_buf_len, args.v1.ucDataOutLen);
- memcpy(read_byte, base + 16, len);
- }
+ /* flags not zero */
+ if (args.v1.ucReplyStatus == 2) {
+ DRM_DEBUG_KMS("dp_aux_ch flags not zero\n");
+ return -EBUSY;
}
- return true;
+
+ /* error */
+ if (args.v1.ucReplyStatus == 3) {
+ DRM_DEBUG_KMS("dp_aux_ch error\n");
+ return -EIO;
+ }
+
+ recv_bytes = args.v1.ucDataOutLen;
+ if (recv_bytes > recv_size)
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+ memcpy(recv, base + 16, recv_bytes);
+
+ return recv_bytes;
}
-bool radeon_dp_aux_native_write(struct radeon_connector *radeon_connector,
uint16_t address,
- uint8_t send_bytes, uint8_t *send)
+static int radeon_dp_aux_native_write(struct radeon_connector
*radeon_connector,
+ u16 address, u8 *send, u8 send_bytes, u8
delay)
{
struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
+ int ret;
u8 msg[20];
- u8 msg_len, dp_msg_len;
- bool ret;
+ int msg_bytes = send_bytes + 4;
+ u8 ack;
+
+ if (send_bytes > 16)
+ return -1;
- dp_msg_len = 4;
msg[0] = address;
msg[1] = address >> 8;
msg[2] = AUX_NATIVE_WRITE << 4;
- dp_msg_len += send_bytes;
- msg[3] = (dp_msg_len << 4) | (send_bytes - 1);
+ msg[3] = (msg_bytes << 4) | (send_bytes - 1);
+ memcpy(&msg[4], send, send_bytes);
- if (send_bytes > 16)
- return false;
+ while (1) {
+ ret = radeon_process_aux_ch(dig_connector->dp_i2c_bus,
+ msg, msg_bytes, NULL, 0, delay,
&ack);
+ if (ret < 0)
+ return ret;
+ if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
+ break;
+ else if ((ack & AUX_NATIVE_REPLY_MASK) ==
AUX_NATIVE_REPLY_DEFER)
+ udelay(400);
+ else
+ return -EIO;
+ }
- memcpy(&msg[4], send, send_bytes);
- msg_len = 4 + s
[PATCH 09/18] drm/radeon/kms: handle DP bridges
Fusion hardware often has DP to VGA/LVDS/TMDS bridges to
handle non-DP encoders. Internally we treat them mostly
like DP.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c |6 +-
drivers/gpu/drm/radeon/radeon_connectors.c | 433
drivers/gpu/drm/radeon/radeon_encoders.c |5 +-
3 files changed, 263 insertions(+), 181 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9770aff..dab06fb 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -557,7 +557,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (connector)
bpc = connector->display_info.bpc;
encoder_mode = atombios_get_encoder_mode(encoder);
- if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) {
+ if ((radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) ||
+ radeon_encoder_is_dp_bridge(encoder)) {
if (connector) {
struct radeon_connector
*radeon_connector = to_radeon_connector(connector);
struct radeon_connector_atom_dig
*dig_connector =
@@ -637,7 +638,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (ss_enabled && ss->percentage)
args.v3.sInput.ucDispPllConfig |=
DISPPLL_CONFIG_SS_ENABLE;
- if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT)) {
+ if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT) ||
+ radeon_encoder_is_dp_bridge(encoder)) {
struct radeon_encoder_atom_dig *dig =
radeon_encoder->enc_priv;
if (encoder_mode ==
ATOM_ENCODER_MODE_DP) {
args.v3.sInput.ucDispPllConfig
|=
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 9f3c650..e9493d7 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1222,8 +1222,11 @@ radeon_add_atom_connector(struct drm_device *dev,
struct drm_connector *connector;
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *radeon_dig_connector;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
uint32_t subpixel_order = SubPixelNone;
bool shared_ddc = false;
+ bool is_dp_bridge = false;
if (connector_type == DRM_MODE_CONNECTOR_Unknown)
return;
@@ -1255,6 +1258,21 @@ radeon_add_atom_connector(struct drm_device *dev,
}
}
+ /* check if it's a dp bridge */
+ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+ radeon_encoder = to_radeon_encoder(encoder);
+ if (radeon_encoder->devices & supported_device) {
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ is_dp_bridge = true;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+
radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
if (!radeon_connector)
return;
@@ -1272,61 +1290,39 @@ radeon_add_atom_connector(struct drm_device *dev,
if (!radeon_connector->router_bus)
DRM_ERROR("Failed to assign router i2c bus! Check dmesg
for i2c errors.\n");
}
- switch (connector_type) {
- case DRM_MODE_CONNECTOR_VGA:
- drm_connector_init(dev, &radeon_connector->base,
&radeon_vga_connector_funcs, connector_type);
- drm_connector_helper_add(&radeon_connector->base,
&radeon_vga_connector_helper_funcs);
- if (i2c_bus->valid) {
- radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
- if (!radeon_connector->ddc_bus)
- DRM_ERROR("VGA: Failed to assign ddc bus! Check
dmesg for i2c errors.\n");
- }
- radeon_connector->dac_load_detect = true;
- drm_connector_attach_property(&radeon_connector->base,
-
rdev->mode_info.load_detect_property,
- 1);
- /* no HPD on analog connectors */
[PATCH 12/18] drm/dp: add some new DP regs for DP 1.2
Signed-off-by: Alex Deucher --- include/drm/drm_dp_helper.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 83a389e..91567bb 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -53,6 +53,7 @@ #define DP_MAX_LANE_COUNT 0x002 # define DP_MAX_LANE_COUNT_MASK0x1f +# define DP_TPS3_SUPPORTED (1 << 6) # define DP_ENHANCED_FRAME_CAP (1 << 7) #define DP_MAX_DOWNSPREAD 0x003 @@ -71,10 +72,13 @@ #define DP_MAIN_LINK_CHANNEL_CODING 0x006 +#define DP_TRAINING_AUX_RD_INTERVAL 0x00e + /* link configuration */ #defineDP_LINK_BW_SET 0x100 # define DP_LINK_BW_1_62 0x06 # define DP_LINK_BW_2_70x0a +# define DP_LINK_BW_5_40x14 #define DP_LANE_COUNT_SET 0x101 # define DP_LANE_COUNT_MASK0x0f @@ -84,6 +88,7 @@ # define DP_TRAINING_PATTERN_DISABLE 0 # define DP_TRAINING_PATTERN_1 1 # define DP_TRAINING_PATTERN_2 2 +# define DP_TRAINING_PATTERN_3 3 # define DP_TRAINING_PATTERN_MASK 0x3 # define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2) -- 1.7.1.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 13/18] drm/radeon/kms: atombios.h updates for DP panel mode
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios.h | 22 --
1 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index 7fd8849..49611e2 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -726,6 +726,7 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V2
#define ATOM_ENCODER_CMD_DP_VIDEO_ON 0x0d
#define ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS0x0e
#define ATOM_ENCODER_CMD_SETUP0x0f
+#define ATOM_ENCODER_CMD_SETUP_PANEL_MODE 0x10
// ucStatus
#define ATOM_ENCODER_STATUS_LINK_TRAINING_COMPLETE0x10
@@ -765,13 +766,19 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V3
USHORT usPixelClock; // in 10KHz; for bios convenient
ATOM_DIG_ENCODER_CONFIG_V3 acConfig;
UCHAR ucAction;
- UCHAR ucEncoderMode;
+ union {
+UCHAR ucEncoderMode;
// =0: DP encoder
// =1: LVDS encoder
// =2: DVI encoder
// =3: HDMI encoder
// =4: SDVO encoder
// =5: DP audio
+UCHAR ucPanelMode; // only valid when ucAction ==
ATOM_ENCODER_CMD_SETUP_PANEL_MODE
+ // =0: external DP
+ // =1: internal DP2
+ // =0x11: internal DP1 for NutMeg/Travis DP
translator
+ };
UCHAR ucLaneNum; // how many lanes to enable
UCHAR ucBitPerColor; // only valid for DP mode when ucAction =
ATOM_ENCODER_CMD_SETUP
UCHAR ucReserved;
@@ -816,13 +823,19 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V4
UCHAR ucConfig;
};
UCHAR ucAction;
- UCHAR ucEncoderMode;
+ union {
+UCHAR ucEncoderMode;
// =0: DP encoder
// =1: LVDS encoder
// =2: DVI encoder
// =3: HDMI encoder
// =4: SDVO encoder
// =5: DP audio
+UCHAR ucPanelMode; // only valid when ucAction ==
ATOM_ENCODER_CMD_SETUP_PANEL_MODE
+ // =0: external DP
+ // =1: internal DP2
+ // =0x11: internal DP1 for NutMeg/Travis DP
translator
+ };
UCHAR ucLaneNum; // how many lanes to enable
UCHAR ucBitPerColor; // only valid for DP mode when ucAction =
ATOM_ENCODER_CMD_SETUP
UCHAR ucHPD_ID; // HPD ID (1-6). =0 means to skip HDP programming.
New comparing to previous version
@@ -836,6 +849,11 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V4
#define PANEL_12BIT_PER_COLOR0x04
#define PANEL_16BIT_PER_COLOR0x05
+//define ucPanelMode
+#define DP_PANEL_MODE_EXTERNAL_DP_MODE 0x00
+#define DP_PANEL_MODE_INTERNAL_DP2_MODE 0x01
+#define DP_PANEL_MODE_INTERNAL_DP1_MODE 0x11
+
//
// Structures used by UNIPHYTransmitterControlTable
//LVTMATransmitterControlTable
--
1.7.1.1
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[PATCH 14/18] drm/radeon/kms/atom: add support for setting DP panel mode
Required for proper operation with DP bridges.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c |8
drivers/gpu/drm/radeon/radeon_encoders.c | 19 +++
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
3 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 0f72f4d..444954d 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -662,9 +662,9 @@ void dp_link_train(struct drm_encoder *encoder,
dp_set_downspread(radeon_connector, 0);
if (ASIC_IS_DCE4(rdev)) {
/* start training on the source */
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_START);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_START, 0);
/* set training pattern 1 on the source */
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1, 0);
} else {
/* start training on the source */
radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START,
@@ -733,7 +733,7 @@ void dp_link_train(struct drm_encoder *encoder,
dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2);
/* set training pattern 2 on the source */
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2, 0);
else
radeon_dp_encoder_service(rdev,
ATOM_DP_ACTION_TRAINING_PATTERN_SEL,
dig_connector->dp_clock, enc_id, 1);
@@ -777,7 +777,7 @@ void dp_link_train(struct drm_encoder *encoder,
/* disable the training pattern on the source */
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE, 0);
else
radeon_dp_encoder_service(rdev,
ATOM_DP_ACTION_TRAINING_COMPLETE,
dig_connector->dp_clock, enc_id, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 43c001b..11d7b33 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -771,7 +771,7 @@ union dig_encoder_control {
};
void
-atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
+atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int
panel_mode)
{
struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private;
@@ -817,7 +817,10 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder,
int action)
args.v1.ucAction = action;
args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
- args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
+ if (action == ATOM_ENCODER_CMD_SETUP_PANEL_MODE)
+ args.v3.ucPanelMode = panel_mode;
+ else
+ args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
(args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST))
@@ -1416,7 +1419,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int
mode)
}
dp_link_train(encoder, connector);
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_ON);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
}
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
@@ -1429,7 +1432,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int
mode)
struct drm_connector *connector =
radeon_get_connector_for_encoder(encoder);
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_OFF);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
if (connector &&
(connector->connector_type ==
DRM_MODE_CONNECTOR_eDP)) {
struct radeon_connector
*radeon_connector = to_radeon_connector(conne
[PATCH 15/18] drm/radeon/kms: rewrite DP handling
- reorganize the functions based on use
- clean up function naming
- rework link training to better match what we use internally
- add initial support for DP 1.2 (no MST yet)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 1094 +++-
drivers/gpu/drm/radeon/radeon_connectors.c |4 +-
drivers/gpu/drm/radeon/radeon_encoders.c |4 +-
drivers/gpu/drm/radeon/radeon_mode.h |6 +-
4 files changed, 584 insertions(+), 524 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 444954d..5f2ddcd 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -43,158 +43,242 @@ static char *pre_emph_names[] = {
"0dB", "3.5dB", "6dB", "9.5dB"
};
-static const int dp_clocks[] = {
- 54000, /* 1 lane, 1.62 Ghz */
- 9, /* 1 lane, 2.70 Ghz */
- 108000, /* 2 lane, 1.62 Ghz */
- 18, /* 2 lane, 2.70 Ghz */
- 216000, /* 4 lane, 1.62 Ghz */
- 36, /* 4 lane, 2.70 Ghz */
+/* radeon AUX functions */
+union aux_channel_transaction {
+ PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1;
+ PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2;
};
-static const int num_dp_clocks = sizeof(dp_clocks) / sizeof(int);
+static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
+u8 *send, int send_bytes,
+u8 *recv, int recv_size,
+u8 delay, u8 *ack)
+{
+ struct drm_device *dev = chan->dev;
+ struct radeon_device *rdev = dev->dev_private;
+ union aux_channel_transaction args;
+ int index = GetIndexIntoMasterTable(COMMAND,
ProcessAuxChannelTransaction);
+ unsigned char *base;
+ int recv_bytes;
+
+ memset(&args, 0, sizeof(args));
-/* common helper functions */
-static int dp_lanes_for_mode_clock(u8 dpcd[DP_DPCD_SIZE], int mode_clock)
+ base = (unsigned char *)rdev->mode_info.atom_context->scratch;
+
+ memcpy(base, send, send_bytes);
+
+ args.v1.lpAuxRequest = 0;
+ args.v1.lpDataOut = 16;
+ args.v1.ucDataOutLen = 0;
+ args.v1.ucChannelID = chan->rec.i2c_id;
+ args.v1.ucDelay = delay / 10;
+ if (ASIC_IS_DCE4(rdev))
+ args.v2.ucHPD_ID = chan->rec.hpd;
+
+ atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
+
+ *ack = args.v1.ucReplyStatus;
+
+ /* timeout */
+ if (args.v1.ucReplyStatus == 1) {
+ DRM_DEBUG_KMS("dp_aux_ch timeout\n");
+ return -ETIMEDOUT;
+ }
+
+ /* flags not zero */
+ if (args.v1.ucReplyStatus == 2) {
+ DRM_DEBUG_KMS("dp_aux_ch flags not zero\n");
+ return -EBUSY;
+ }
+
+ /* error */
+ if (args.v1.ucReplyStatus == 3) {
+ DRM_DEBUG_KMS("dp_aux_ch error\n");
+ return -EIO;
+ }
+
+ recv_bytes = args.v1.ucDataOutLen;
+ if (recv_bytes > recv_size)
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+ memcpy(recv, base + 16, recv_bytes);
+
+ return recv_bytes;
+}
+
+static int radeon_dp_aux_native_write(struct radeon_connector
*radeon_connector,
+ u16 address, u8 *send, u8 send_bytes, u8
delay)
{
- int i;
- u8 max_link_bw;
- u8 max_lane_count;
+ struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
+ int ret;
+ u8 msg[20];
+ int msg_bytes = send_bytes + 4;
+ u8 ack;
- if (!dpcd)
- return 0;
+ if (send_bytes > 16)
+ return -1;
- max_link_bw = dpcd[DP_MAX_LINK_RATE];
- max_lane_count = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
+ msg[0] = address;
+ msg[1] = address >> 8;
+ msg[2] = AUX_NATIVE_WRITE << 4;
+ msg[3] = (msg_bytes << 4) | (send_bytes - 1);
+ memcpy(&msg[4], send, send_bytes);
- switch (max_link_bw) {
- case DP_LINK_BW_1_62:
- default:
- for (i = 0; i < num_dp_clocks; i++) {
- if (i % 2)
- continue;
- switch (max_lane_count) {
- case 1:
- if (i > 1)
- return 0;
- break;
- case 2:
- if (i > 3)
- return 0;
- break;
- case 4:
- default:
- break;
- }
- if (dp_clocks[i] > mode_clock) {
- if (i < 2)
- return 1;
- else i
[PATCH 16/18] drm/radeon/kms: simplify hotplug handler logic
In the hotplug handler, just use the drm dpms functions.
If the monitor is plugged in, turn it on, if it's not,
turn it off. This also reduces power usage by turning
off the encoder and crtc when the monitor is unplugged.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 12
drivers/gpu/drm/radeon/radeon_connectors.c | 19 +++
drivers/gpu/drm/radeon/radeon_mode.h |1 -
3 files changed, 7 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 5f2ddcd..8c0f9e3 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -613,18 +613,6 @@ static bool radeon_dp_get_link_status(struct
radeon_connector *radeon_connector,
return true;
}
-bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
-{
- struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
- u8 link_status[DP_LINK_STATUS_SIZE];
-
- if (!radeon_dp_get_link_status(radeon_connector, link_status))
- return false;
- if (dp_channel_eq_ok(link_status, dig_connector->dp_lane_count))
- return false;
- return true;
-}
-
struct radeon_dp_link_train_info {
struct radeon_device *rdev;
struct drm_encoder *encoder;
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 6c9e17f..5947871 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -50,20 +50,15 @@ void radeon_connector_hotplug(struct drm_connector
*connector)
struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
- if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
- radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
-
- if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
- (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
- if ((radeon_dp_getsinktype(radeon_connector) ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
- (radeon_dp_getsinktype(radeon_connector) ==
CONNECTOR_OBJECT_ID_eDP)) {
- if (radeon_dp_needs_link_train(radeon_connector)) {
- if (connector->encoder)
-
radeon_dp_link_train(connector->encoder, connector);
- }
- }
- }
+ radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+ /* pre-r600 did not always have the hpd pins mapped accurately to
connectors */
+ if (rdev->family >= CHIP_R600) {
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+ else
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+ }
}
static void radeon_property_change_mode(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index 37f57ba..88257bc 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -470,7 +470,6 @@ extern bool radeon_connector_encoder_is_hbr2(struct
drm_connector *connector);
extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
extern void radeon_connector_hotplug(struct drm_connector *connector);
-extern bool radeon_dp_needs_link_train(struct radeon_connector
*radeon_connector);
extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
struct drm_display_mode *mode);
extern void radeon_dp_set_link_config(struct drm_connector *connector,
--
1.7.1.1
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[PATCH 17/18] drm/radeon/kms: bail early for eDP in hotplug callback
Don't try and en/disable the port as it may be a hpd event from
powering up/down the panel during a modeset or dpms.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 5947871..532f17d 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -52,6 +52,12 @@ void radeon_connector_hotplug(struct drm_connector
*connector)
radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+ /* powering up/down the eDP panel generates hpd events which
+* can interfere with modesetting.
+*/
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+ return;
+
/* pre-r600 did not always have the hpd pins mapped accurately to
connectors */
if (rdev->family >= CHIP_R600) {
if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
--
1.7.1.1
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[PATCH 18/18] drm/radeon/kms: fixup eDP connector handling
It's more like LVDS then DP in some ways.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 80 +---
1 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 532f17d..ee1dccb 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1055,16 +1055,44 @@ static int radeon_dp_get_modes(struct drm_connector
*connector)
int ret;
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder;
+ struct drm_display_mode *mode;
+
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_ON);
- }
- ret = radeon_ddc_get_modes(radeon_connector);
- if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ ret = radeon_ddc_get_modes(radeon_connector);
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_OFF);
- }
+
+ if (ret > 0) {
+ encoder = radeon_best_single_encoder(connector);
+ if (encoder) {
+ radeon_fixup_lvds_native_mode(encoder,
connector);
+ /* add scaled modes */
+ radeon_add_common_modes(encoder, connector);
+ }
+ return ret;
+ }
+
+ encoder = radeon_best_single_encoder(connector);
+ if (!encoder)
+ return 0;
+
+ /* we have no EDID modes */
+ mode = radeon_fp_native_mode(encoder);
+ if (mode) {
+ ret = 1;
+ drm_mode_probed_add(connector, mode);
+ /* add the width/height from vbios tables if available
*/
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+ /* add scaled modes */
+ radeon_add_common_modes(encoder, connector);
+ }
+ } else
+ ret = radeon_ddc_get_modes(radeon_connector);
return ret;
}
@@ -1155,6 +1183,15 @@ radeon_dp_detect(struct drm_connector *connector, bool
force)
}
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder =
radeon_best_single_encoder(connector);
+ if (encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ struct drm_display_mode *native_mode =
&radeon_encoder->native_mode;
+
+ /* check if panel is valid */
+ if (native_mode->hdisplay >= 320 &&
native_mode->vdisplay >= 240)
+ ret = connector_status_connected;
+ }
/* eDP is always DP */
radeon_dig_connector->dp_sink_type =
CONNECTOR_OBJECT_ID_DISPLAYPORT;
if (!radeon_dig_connector->edp_on)
@@ -1194,11 +1231,38 @@ static int radeon_dp_mode_valid(struct drm_connector
*connector,
/* XXX check mode bandwidth */
- if ((radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
- (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
- return radeon_dp_mode_valid_helper(connector, mode);
- else
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder =
radeon_best_single_encoder(connector);
+
+ if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
+ return MODE_PANEL;
+
+ if (encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ struct drm_display_mode *native_mode =
&radeon_encoder->native_mode;
+
+ /* AVIVO hardware supports downscaling modes larger than the
panel
+* to the panel size, but I'm not sure this is
desirable.
+*/
+ if ((mode->hdisplay > native_mode->hdisplay) ||
+ (mode->vdisplay > native_mode->vdisplay))
+ return MODE_PANEL;
+
+ /* if scaling is disabled, block non-native modes */
+ if (radeon_encoder->rmx_type == RMX_OFF) {
+ if ((mode->hdisplay != native_mode->hdisplay) ||
+ (mode->vdisplay
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #6 from Michel Dänzer 2011-05-20 12:11:38 --- (In reply to comment #1) > Anyway, things are *way* better with 2.6.38 than with 2.6.39, as with 2.6.39 > the kernel doesn't even get the colors correctly---everything that should be > red becomes blue and so forth (any kind of endianness problem?). That's probably nothing to do with the kernel directly but endianness bugs in the X driver when acceleration is not available. It would be interesting if you could bisect what broke acceleration with radeon.agpmode=-1. Note that you should boot with radeon.no_wb=1 as well for this, as CP writeback was only fixed during the 2.6.39 cycle (in commit dc66b325f161bb651493c7d96ad44876b629cf6a). -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27517] KMS breaks 3D on R200
https://bugs.freedesktop.org/show_bug.cgi?id=27517 --- Comment #8 from Keith 2011-05-20 07:16:50 PDT --- Yes, some time around the introduction of KMS, acceleration stopped working. I had it fine on Debian before squeeze and Ubuntu Maveric but recently upgraded to Natty and it stopped working. Starting compiz gives the old GLX_EXT_texture_pixmap not available error. It also complains about GL version 1.4+ whereas glxinfo reports version 1.4 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #7 from Michel Dänzer 2011-05-20 14:31:00 --- I was able to reproduce the acceleration initialization failure with the Debian 2.6.39-rc7-powerpc kernel, but not with a self-built 2.6.39 kernel. So this was probably just an intermittent problem during the 2.6.39 cycle, e.g. due to the intermittent broken usage of the DMA API by TTM. As for the GPU lockups, does radeon.dynclks=1 help for those? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
output on external video projector broken with 2.6.39 with intel
Hi everyone,
(please cc)
laptop: sony vaio vgn-z11
graphics hardware: GM45
X: 7.6 (Debian: 1:7.6+6)
X intel driver: 2:15.0 (Debian: 2:2.15.0-3)
system: Debian sid up2date
I regularly build kernels from git, but haven't tried a video projector
for some time now. I found that in recent kernels I have problems with
the output to the external screen.
After inital connection everything works and I have a BIG virtual
screen covering both units. Then I want to switch it to
Same image on both screens
and at that time one of the screens, most of the times the external
ones, sometimes both, fall into pieces with vertical stripes and
colors.
Waiting 25sec my program (xrandr or gnome screen props) resets the
setting and I am back to two screens showing independent images.
Is that a driver issue, a kernel issue, or anything else?
If you need more information, dmesg, X logs, or I should try some
patches, whatever please let me know.
Best wishes
Norbert
Norbert Preiningpreining@{jaist.ac.jp, logic.at, debian.org}
JAIST, Japan TeX Live & Debian Developer
DSA: 0x09C5B094 fp: 14DF 2E6C 0307 BE6D AD76 A9C0 D2BF 4AA3 09C5 B094
GLENWHILLY (n. Scots)
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[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #6 from Sergey Kondakov 2011-05-20 14:42:06 --- Created an attachment (id=58732) --> (https://bugzilla.kernel.org/attachment.cgi?id=58732) 2.6.39-overview_small.jpg this is how screen looks like with this glitch since 2.6.38. all is ok on another PC with r300. -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #7 from Sergey Kondakov 2011-05-20 14:43:16 --- Created an attachment (id=58742) --> (https://bugzilla.kernel.org/attachment.cgi?id=58742) 2.6.39-X_small.jpg this is all that X manages to draw with >=2.6.38 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #8 from Sergey Kondakov 2011-05-20 14:48:45 --- Created an attachment (id=58752) --> (https://bugzilla.kernel.org/attachment.cgi?id=58752) 2.6.39-close-up_small.jpg close-up on radeondrmfb area where stuff is drawable at all (it always like that when TV is connected via S-video=>Composite cabling) -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #9 from Sergey Kondakov 2011-05-20 14:51:08 --- Created an attachment (id=58762) --> (https://bugzilla.kernel.org/attachment.cgi?id=58762) Xorg.0.log_2.6.37 X log with normal kernel -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #10 from Sergey Kondakov 2011-05-20 14:53:25 --- Created an attachment (id=58782) --> (https://bugzilla.kernel.org/attachment.cgi?id=58782) Xorg.0.log_2.6.39 X log with bad kernel -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 1/2] drm/radeon/kms: properly set num banks for fusion asics
Needed by userspace for 2D tiled buffer alignment Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen.c |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 296e6ec..7c37638 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1936,8 +1936,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev) rdev->config.evergreen.tile_config |= (3 << 0); break; } - rdev->config.evergreen.tile_config |= - ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; + /* num banks is 8 on all fusion asics */ + if (rdev->flags & RADEON_IS_IGP) + rdev->config.evergreen.tile_config |= 8 << 4; + else + rdev->config.evergreen.tile_config |= + ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; rdev->config.evergreen.tile_config |= ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; rdev->config.evergreen.tile_config |= -- 1.7.1.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/2] drm/radeon/kms: bump kms version number
- proper bank size for fusion for 2D tiling. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 63d2de8..1d33060 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -50,9 +50,10 @@ * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query + * 2.10.0 - fusion 2D tiling */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 9 +#define KMS_DRIVER_MINOR 10 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); -- 1.7.1.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
For DP/eDP, always use the standard DP SS indices.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 42 +--
1 files changed, 12 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index dab06fb..bbd6c59 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -940,42 +940,24 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
case ATOM_ENCODER_MODE_DP:
/* DP/eDP */
dp_clock = dig_connector->dp_clock / 10;
- if (radeon_encoder->active_device &
(ATOM_DEVICE_LCD_SUPPORT)) {
- if (ASIC_IS_DCE4(rdev)) {
- /* first try ASIC_INTERNAL_SS_ON_DP */
+ if (ASIC_IS_DCE4(rdev))
+ ss_enabled =
+ radeon_atombios_get_asic_ss_info(rdev,
&ss,
+
ASIC_INTERNAL_SS_ON_DP,
+
dp_clock);
+ else {
+ if (dp_clock == 16200) {
ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
ASIC_INTERNAL_SS_ON_DP,
-
dp_clock);
+
radeon_atombios_get_ppll_ss_info(rdev, &ss,
+
ATOM_DP_SS_ID2);
if (!ss_enabled)
ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
dig->lcd_ss_id,
-
dp_clock);
+
radeon_atombios_get_ppll_ss_info(rdev, &ss,
+
ATOM_DP_SS_ID1);
} else
ss_enabled =
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
dig->lcd_ss_id);
- } else {
- if (ASIC_IS_DCE4(rdev))
- ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
ASIC_INTERNAL_SS_ON_DP,
-
dp_clock);
- else {
- if (dp_clock == 16200) {
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID2);
- if (!ss_enabled)
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID1);
- } else
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID1);
- }
+
ATOM_DP_SS_ID1);
}
break;
case ATOM_ENCODER_MODE_LVDS:
--
1.7.1.1
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[PATCH] drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices
If the ss clock is external, the CLK_REF bit needs to be set in the SetPixelClock parameters. This should fix DP failures in the channel equalization loop. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/atombios_crtc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index bbd6c59..48f5ff0 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -815,6 +815,8 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc, args.v3.ucPostDiv = post_div; args.v3.ucPpll = pll_id; args.v3.ucMiscInfo = (pll_id << 2); + if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK)) + args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC; args.v3.ucTransmitterId = encoder_id; args.v3.ucEncoderMode = encoder_mode; break; -- 1.7.1.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #46 from Alex Deucher 2011-05-20 09:47:58 PDT --- Please try the new patches I sent out last night. you can find them here: http://people.freedesktop.org/~agd5f/dp_rewrite/ You may have to apply Jesse's bpc patches first (in the bpc firectory) depending on what kernel you are using. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #47 from Alex Deucher 2011-05-20 09:49:43 PDT --- Please don't drag in Mac EFI issues, this bug is about DP link training problems. For Mac's stick to the legacy bios rather than trying to run in EFI mode. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #48 from Alex Deucher 2011-05-20 09:55:24 PDT --- Travis, please try this latest patch set. I was finally able to reproduce a problem similar to yours on a new board I got. The problem was actually with the way the spread spectrum interaction with the PPLL was set up. That should be fixed in this patch set. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm: i915: correct return status in intel_hdmi_mode_valid()
Signed-off-by: Nicolas Kaiser --- Untested: just looks to me like the intention might be to return MODE_CLOCK_LOW here, is that correct? drivers/gpu/drm/i915/intel_hdmi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f289b86..655bbd9 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -194,7 +194,7 @@ static int intel_hdmi_mode_valid(struct drm_connector *connector, if (mode->clock > 165000) return MODE_CLOCK_HIGH; if (mode->clock < 2) - return MODE_CLOCK_HIGH; + return MODE_CLOCK_LOW; if (mode->flags & DRM_MODE_FLAG_DBLSCAN) return MODE_NO_DBLESCAN; -- 1.7.5.rc3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #49 from Travis Glenn Hansen 2011-05-20 10:07:39 PDT --- Alex I will try as soon as I get back to the office (early next week). What version should these be applied against or do you have a git repo I should use? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #50 from Alex Deucher 2011-05-20 10:20:03 PDT --- Dave's drm-next or drm-fixes trees should work: http://git.kernel.org/?p=linux/kernel/git/airlied/drm-2.6.git;a=summary if you use drm-fixes, you'll need to apply Jesse's bpc patches (in the bpc directly in by server) first. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #51 from Travis Glenn Hansen 2011-05-20 10:34:10 PDT --- I'll just simply use drm-next then when I test. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #52 from Alex Deucher 2011-05-20 10:44:25 PDT --- Looks like Dave pushed a new drm-radeon-testing, so you can use that and then you'll only need to apply patches 0019 and 0020. http://git.kernel.org/?p=linux/kernel/git/airlied/drm-2.6.git;a=shortlog;h=refs/heads/drm-radeon-testing -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 37417] New: No Alpha Channel for all XPixmaps with KWin+GLES
https://bugs.freedesktop.org/show_bug.cgi?id=37417 Summary: No Alpha Channel for all XPixmaps with KWin+GLES Product: Mesa Version: 7.10 Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r600 AssignedTo: dri-devel@lists.freedesktop.org ReportedBy: mgraess...@kde.org Created an attachment (id=46961) --> (https://bugs.freedesktop.org/attachment.cgi?id=46961) ARGB window without alpha channel After updating mesa on Debian Testing to package version 7.10.2-2 everything mapped from a XPixmap lost the Alpha Channel. ARGB windows are no longer translucent (screenshot attached) as well everything else mapped from an XPixmap. This only affects OpenGL ES/EGL build of KWin, building against desktop GL/GLX does not show the symptoms. Debug output of KWin with GLES: OpenGL vendor string: X.Org OpenGL renderer string: Gallium 0.4 on AMD RV710 OpenGL version string: OpenGL ES 2.0 Mesa 7.10.2 OpenGL shading language version string: OpenGL ES GLSL ES 1.0.16 Driver: R600G GPU class: R700 OpenGL version: 2.0 GLSL version: 1.0.16 Mesa version: 7.10.2 X server version: 1.10.1 Linux kernel version: 2.6.38 Direct rendering: yes Requires strict binding:yes GLSL shaders: yes Texture NPOT support: yes Debug output of KWin with GLX: OpenGL vendor string: Advanced Micro Devices, Inc. OpenGL renderer string: Mesa DRI R600 (RV710 954F) 20090101 TCL DRI2 OpenGL version string: 2.1 Mesa 7.10.2 OpenGL shading language version string: 1.20 Driver: R600C GPU class: R700 OpenGL version: 2.1 GLSL version: 1.20 Mesa version: 7.10.2 X server version: 1.10.1 Linux kernel version: 2.6.38 Direct rendering: yes Requires strict binding:no GLSL shaders: yes Texture NPOT support: yes This worked fine until update of the package. KWin has not changed (recent master, build from today). If you need any help to investigate, please ask. We want to push the GLES build of KWin with our upcoming release (beta 1 next week). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 28876] [radeon HD4250] Frequent lockups while screen locked
https://bugs.freedesktop.org/show_bug.cgi?id=28876 Yann Dirson changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED --- Comment #4 from Yann Dirson 2011-05-20 13:09:04 PDT --- This has not occured since quite some time now, fixed. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: Major 2.6.38 regression ignored?
On Friday, May 20, 2011, Ray Lee wrote: > [ Adding Chris Wilson (author of the problematic patch) and Rafael Wysocki > to the message ] It is on the list of known regressions from 2.6.37, but we're not tracking them any more now that 2.6.39 is out. Thanks, Rafael > On Fri, May 20, 2011 at 10:06 AM, Luke-Jr wrote: > > > I submitted https://bugzilla.kernel.org/show_bug.cgi?id=33662 a month ago > > against 2.6.38. Now 2.6.39 was just released without the regression being > > addressed. This bug makes the system unusable... Some guys on IRC suggested > > I > > email, so here it is. > > > > See the bugzilla entry for the bisection history. > > ~r. > ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #8 from Andreas Schwab 2011-05-20 20:58:03 --- radeon.dynclks=1 causes the wrong resolution to be selected. It thinks something is conncted to the S-video port with a max resolution of 800x600, so it selects this instead of the native resolution (1024x768). -<6>Console: switching to colour frame buffer device 128x48 +<6>[drm] crtc 1 is connected to a TV +<6>Console: switching to colour frame buffer device 100x37 +(II) RADEON(0): Printing probed modes for output S-video +(II) RADEON(0): Modeline "800x600"x59.9 38.25 800 832 912 1024 600 603 607 624 -hsync +vsync (37.4 kHz) +(II) RADEON(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) +(II) RADEON(0): Modeline "320x240"x60.1 12.59 320 328 376 400 240 245 246 262 doublescan -hsync -vsync (31.5 kHz) (II) RADEON(0): Output LVDS connected (II) RADEON(0): Output VGA-0 disconnected -(II) RADEON(0): Output S-video disconnected +(II) RADEON(0): Output S-video connected (II) RADEON(0): Using exact sizes for initial modes -(II) RADEON(0): Output LVDS using initial mode 1024x768 +(II) RADEON(0): Output LVDS using initial mode 800x600 +(II) RADEON(0): Output S-video using initial mode 800x600 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list dri-de...@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC] Standardize YUV support in the fbdev API
Hi Laurent,
On 05/17/2011 10:07 PM, Laurent Pinchart wrote:
Hi everybody,
I need to implement support for a YUV frame buffer in an fbdev driver. As the
fbdev API doesn't support this out of the box, I've spent a couple of days
reading fbdev (and KMS) code and thinking about how we could cleanly add YUV
support to the API. I'd like to share my findings and thoughts, and hopefully
receive some comments back.
Thanks. I think you did already a good job, hope we can get it done this time.
Given the overlap between the KMS, V4L2 and fbdev APIs, the need to share data
and buffers between those subsystems, and the planned use of V4L2 FCCs in the
KMS overlay API, I believe using V4L2 FCCs to identify fbdev formats would be
a wise decision.
I agree.
To select a frame buffer YUV format, the fb_var_screeninfo structure will need
to be extended with a format field. The fbdev API and ABI must not be broken,
which prevents us from changing the current structure layout and replacing the
existing format selection mechanism (through the red, green, blue and alpha
bitfields) completely.
I agree.
- Other solutions are possible, such as adding new ioctls. Those solutions are
more intrusive, and require larger changes to both userspace and kernelspace
code.
I'm against (ab)using the nonstd field (probably the only sane thing we can do
with it is declare it non-standard which interpretation is completely dependent
on the specific driver) or requiring previously unused fields to have a special
value so I'd like to suggest a different method:
I remembered an earlier discussion:
[ http://marc.info/?l=linux-fbdev&m=129896686208130&w=2 ]
On 03/01/2011 08:07 AM, Geert Uytterhoeven wrote:
> On Tue, Mar 1, 2011 at 04:13, Damian wrote:
>> On 2011/02/24 15:05, Geert Uytterhoeven wrote:
>>> For YUV (do you mean YCbCr?), I'm inclined to suggest adding a new
>>> FB_VISUAL_*
>>> type instead, which indicates the fb_var_screeninfo.{red,green,blue}
>>> fields are
>>> YCbCr instead of RGB.
>>> Depending on the frame buffer organization, you also need new
>>> FB_TYPE_*/FB_AUX_*
>>> types.
>>
>> I just wanted to clarify here. Is your comment about these new flags in
>> specific reference to this patch or to Magnus' "going forward" comment? It
>
> About new flags.
>
>> seems like the beginnings of a method to standardize YCbCr support in fbdev
>> across all platforms.
>> Also, do I understand correctly that FB_VISUAL_ would specify the colorspace
>
> FB_VISUAL_* specifies how pixel values (which may be tuples) are mapped to
> colors on the screen, so to me it looks like the sensible way to set up YCbCr.
>
>> (RGB, YCbCr), FB_TYPE_* would be a format specifier (i.e. planar,
>> semiplanar, interleaved, etc)? I'm not really sure what you are referring
>> to with the FB_AUX_* however.
>
> Yep, FB_TYPE_* specifies how pixel values/tuples are laid out in frame buffer
> memory.
>
> FB_AUX_* is only used if a specific value of FB_TYPE_* needs an additional
> parameter (e.g. the interleave value for interleaved bitplanes).
Adding new standard values for these fb_fix_screeninfo fields would solve the
issue for framebuffers which only support a single format. If you have the need
to switch I guess it would be a good idea to add a new flag to the vmode
bitfield in fb_var_screeninfo which looks like a general purpose modifier for
the videomode. You could than reuse any RGB-specific field you like to pass more
information.
Maybe we should also use this chance to declare one of the fix_screeninfo
reserved fields to be used for capability flags or an API version as we can
assume that those are 0 (at least in sane drivers).
Good luck,
Florian Tobias Schandinat
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[PATCH] agp/uninorth: Fix lockups with radeon KMS and >1x.
On Thu, 2011-05-19 at 16:08 +0200, Michel D?nzer wrote:
> From: Michel D?nzer
>
> This was based on a description by Ben Herrenschmidt:
>
> > I've removed that SBA reset from the normal TLB invalidation path and
> > left it only once after turning AGP on.
>
> About six months ago, he said:
>
> > I did it a bit differently, but yeah, you get the idea. I'm doing a
> > patch series so don't bother pushing things too hard yet.
>
> But I haven't seen anything from him about this since then, and people are
> regularly hitting these lockups, so here we are...
>
> Signed-off-by: Michel D?nzer
Oops. I do have a pile of patches, but I never got something "stable"
enough and got distracted by more important stuff. Dave, please merge
this for now.
Acked-by: Benjamin Herrenschmidt
Thanks !
Cheers,
Ben.
> ---
> drivers/char/agp/uninorth-agp.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/char/agp/uninorth-agp.c b/drivers/char/agp/uninorth-agp.c
> index 47c2218..55af723 100644
> --- a/drivers/char/agp/uninorth-agp.c
> +++ b/drivers/char/agp/uninorth-agp.c
> @@ -80,7 +80,7 @@ static void uninorth_tlbflush(struct agp_memory *mem)
> ctrl | UNI_N_CFG_GART_INVAL);
> pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL, ctrl);
>
> - if (uninorth_rev <= 0x30) {
> + if (!mem && uninorth_rev <= 0x30) {
> pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
> ctrl | UNI_N_CFG_GART_2xRESET);
> pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
[Bug 35472] New: [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 Summary: [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730) Product: Drivers Version: 2.5 Kernel Version: 2.6.38 Platform: All OS/Version: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) AssignedTo: drivers_video-dri at kernel-bugs.osdl.org ReportedBy: virtuousfox at gmail.com Regression: Yes with 2.6.37 it's all OK but since 2.6.38 from very framebuffer initialization screen is filled with dense grey lines looking like ugly grid. also per every 3cm on my 1920x1080/23' screen there is a distinctive whitish vertical line. when X try to startup i can see cursor and can move it around for a while (that grey grid is there too) but kdm does not starting up and GPU locks up. it is the same with 2.6.39. here is `dmesg|grep drm` for 2.6.39: [0.462282] [drm] Initialized drm 1.1.0 20060810 [0.462315] [drm] radeon defaulting to kernel modesetting. [0.462337] [drm] radeon kernel modesetting enabled. [0.462575] [drm] initializing kernel modesetting (RV770 0x1002:0x944E). [0.462608] [drm] register mmio base: 0xFDFE [0.462630] [drm] register mmio size: 65536 [0.463313] [drm] Detected VRAM RAM=512M, BAR=256M [0.463343] [drm] RAM width 128bits DDR [0.463526] [drm] radeon: 512M of VRAM memory ready [0.463549] [drm] radeon: 512M of GTT memory ready. [0.463571] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010). [0.463594] [drm] Driver supports precise vblank timestamp query. [0.463708] [drm] radeon: irq initialized. [0.463733] [drm] GART: num cpu pages 131072, num gpu pages 131072 [0.465260] [drm] Loading RV770 Microcode [0.512429] [drm] ring test succeeded in 1 usecs [0.512544] [drm] radeon: ib pool ready. [0.512584] [drm] ib test succeeded in 0 usecs [0.512609] [drm] Enabling audio support [0.512805] [drm] Radeon Display Connectors [0.512827] [drm] Connector 0: [0.512847] [drm] DVI-I [0.512868] [drm] HPD2 [0.512889] [drm] DDC: 0x7e60 0x7e60 0x7e64 0x7e64 0x7e68 0x7e68 0x7e6c 0x7e6c [0.512915] [drm] Encoders: [0.512936] [drm] DFP1: INTERNAL_UNIPHY [0.512957] [drm] CRT2: INTERNAL_KLDSCP_DAC2 [0.512979] [drm] Connector 1: [0.512999] [drm] DIN [0.513028] [drm] Encoders: [0.513049] [drm] TV1: INTERNAL_KLDSCP_DAC2 [0.513070] [drm] Connector 2: [0.513091] [drm] DVI-I [0.513111] [drm] HPD1 [0.513132] [drm] DDC: 0x7e20 0x7e20 0x7e24 0x7e24 0x7e28 0x7e28 0x7e2c 0x7e2c [0.513158] [drm] Encoders: [0.513179] [drm] CRT1: INTERNAL_KLDSCP_DAC1 [0.513201] [drm] DFP2: INTERNAL_KLDSCP_LVTMA [0.577285] [drm] Internal thermal controller without fan control [0.578307] [drm] radeon: power management initialized [0.657478] [drm] fb mappable at 0xD0142000 [0.657500] [drm] vram apper at 0xD000 [0.657521] [drm] size 8294400 [0.657541] [drm] fb depth is 24 [0.657562] [drm]pitch is 7680 [0.657632] fbcon: radeondrmfb (fb0) is primary device [1.073319] fb0: radeondrmfb frame buffer device [1.073349] drm: registered panic notifier [1.073379] [drm] Initialized radeon 2.9.0 20080528 for :01:00.0 on minor 0 [ 252.565034] WARNING: at drivers/gpu/drm/radeon/radeon_fence.c:246 radeon_fence_wait+0x3a6/0x400() [ 252.565102] [] ? drm_ioctl+0x394/0x450 [ 252.565145] [drm] Disabling audio support [ 252.731618] [drm] ring test succeeded in 1 usecs [ 252.908838] [drm:r600_ib_test] *ERROR* radeon: ib test failed (scratch(0x8504)=0xCAFEDEAD) [ 252.908841] [drm:rv770_resume] *ERROR* radeon: failed testing IB (-22). [ 267.523039] WARNING: at drivers/gpu/drm/radeon/radeon_fence.c:246 radeon_fence_wait+0x3a6/0x400() [ 267.523107] [] ? drm_ioctl+0x394/0x450 [ 268.216464] [drm] ring test succeeded in 1 usecs [ 268.216473] [drm] ib test succeeded in 1 usecs [ 268.216475] [drm] Enabling audio support [ 273.719044] WARNING: at drivers/gpu/drm/radeon/radeon_fence.c:246 radeon_fence_wait+0x3a6/0x400() [ 273.719114] [] ? drm_ioctl+0x394/0x450 [ 273.719159] [drm] Disabling audio support [ 274.411517] [drm] ring test succeeded in 1 usecs [ 274.588784] [drm:r600_ib_test] *ERROR* radeon: ib test failed (scratch(0x8504)=0xCAFEDEAD) [ 274.588787] [drm:rv770_resume] *ERROR* radeon: failed testing IB (-22). [ 290.090036] WARNING: at drivers/gpu/drm/radeon/radeon_fence.c:246 radeon_fence_wait+0x3a6/0x400() [ 290.090103] [] ? drm_ioctl+0x394/0x450 [ 290.779828] [drm] ring test succeeded in 1 usecs [ 290.957091] [drm:r600_ib_test] *ERROR* radeon: ib test failed (scratch(0x8504)=0xCAFEDEAD) [ 290.957094] [drm:rv770_resume] *ERROR* radeon: failed testing IB (-22). [ 306.459037] WARNING: at drivers/gpu/drm/radeon
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #1 from Sergey Kondakov 2011-05-20 04:05:41 --- Created an attachment (id=58692) --> (https://bugzilla.kernel.org/attachment.cgi?id=58692) full dmesg from 2.6.39 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #2 from Sergey Kondakov 2011-05-20 04:08:40 --- Created an attachment (id=58702) --> (https://bugzilla.kernel.org/attachment.cgi?id=58702) .config from 2.6.39 created via `make oldconfig` and based on .config from working 2.6.37 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 Alex Deucher changed: What|Removed |Added CC||alexdeucher at gmail.com --- Comment #3 from Alex Deucher 2011-05-20 04:12:58 --- Can you bisect? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #4 from Sergey Kondakov 2011-05-20 04:15:58 --- Created an attachment (id=58712) --> (https://bugzilla.kernel.org/attachment.cgi?id=58712) full dmesg from 2.6.37 dmesg from working kernel -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #5 from Sergey Kondakov 2011-05-20 05:01:00 --- you mean like taking kernel's git and bisecting entire commit range between 2.6.37 and 2.6.38 (or, more likely, 2.6.37.4 and 2.6.38-rc4 which i think i've tested) while rebooting every time ? i'm not sure if i up for it but if i am then it may take quite a while. meanwhile i will also try to get a photograph of the screen. but also not today, probably. any easily gathered info, however, i can drop anytime. -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Commit 7f58aabc36901 causes boot hang
Sorry for the late test; my laptop didn't need rebooting. But when I installed a recent kernel (-rc7, actually; I just missed the .39 release), it hung hard (no caps-lock or Alt-SysRq) partway through boot after printing: Linux agpgart interface v0.103 agpgart-intel :00:00.0: Intel 945GM Chipset agpgart-intel :00:00.0: detected gtt size: 262144K total, 262144K mappable agpgart-intel :00:00.0: detected 8192K stolen memory agpgart-intel :00:00.0: AGP aperture is 256M @ 0xd000 [drm] Initialized drm 1.1.0 20060810 i915 :00:02.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 i915 :00:02.0: setting latency timer to 64 [drm] Supports vblank timestamp caching Rev 1 (10.10.2010). [drm] Driver supports precise vblank timestamp query. composite sync not supported vgaarb: device changed decodes: PCI::00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem [drm] initialized overlay support composite sync not supported fbcon: inteldrmfb (fb0) is primary device Console: switching to colour frame buffer device 180x56 fb0: inteldrmfb frame buffer device drm: registered panic notifier [drm] Initialized i915 1.6.0 20080730 for :00:02.0 on minor 0 loop: module loaded [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 4 [i915 gmbus dpc] After some bisecting, I found that reverting 7f58aabc36901 (drm/i915: Reset GMBUS controller after NAK) resulted in a successful boot, which replaced the above hang with: [drm] Initialized i915 1.6.0 20080730 for :00:02.0 on minor 0 loop: module loaded [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] [drm] GMBUS timed out, falling back to bit banging on pin 0 [i915 gmbus disabled] ata_piix :00:1f.2: version 2.13 ata_piix :00:1f.2: PCI INT B -> GSI 17 (level, low) -> IRQ 17 ata_piix :00:1f.2: MAP [ P0 P2 IDE IDE ] ata_piix :00:1f.2: setting latency timer to 64 scsi0 : ata_piix scsi1 : ata_piix ata1: SATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xbfa0 irq 14 ata2: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0xbfa8 irq 15 b44 :02:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17 [etc...] The PCI devices on this laptop (Dell Inspirion E1405) are: 00:00.0 Host bridge [0600]: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub [8086:27a0] (rev 03) 00:02.0 VGA compatible controller [0300]: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller [8086:27a2] (rev 03) 00:02.1 Display controller [0380]: Intel Corporation Mobile 945GM/GMS/GME, 943/940GML Express Integrated Graphics Controller [8086:27a6] (rev 03) 00:1b.0 Audio device [0403]: Intel Corporation N10/ICH 7 Family High Definition Audio Controller [8086:27d8] (rev 01) 00:1c.0 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 1 [8086:27d0] (rev 01) 00:1c.1 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 2 [8086:27d2] (rev 01) 00:1c.3 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 4 [8086:27d6] (rev 01) 00:1d.0 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #1 [8086:27c8] (rev 01) 00:1d.1 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 [8086:27c9] (rev 01) 00:1d.2 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 [8086:27ca] (rev 01) 00:1d.3 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 [8086:27cb] (rev 01) 00:1d.7 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller [8086:27cc] (rev 01) 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e1) 00:1f.0 ISA bridge [0601]: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge [8086:27b9] (rev 01) 00:1f.2 IDE interface [0101]:
[Bug 36327] fujitsu siemens amilo li1718: ati radeon x200m does not resume from suspend
https://bugs.freedesktop.org/show_bug.cgi?id=36327 Karesz L. changed: What|Removed |Added Attachment #46931|0 |1 is obsolete|| --- Comment #17 from Karesz L. 2011-05-20 00:23:32 PDT --- Created an attachment (id=46933) --> (https://bugs.freedesktop.org/attachment.cgi?id=46933) failed resume attempts log I've just typed the image above. Hopefuly it's more help this way. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 37168] Regression: Kernel hard-lock when running Second Life
https://bugs.freedesktop.org/show_bug.cgi?id=37168 --- Comment #3 from Sean McNamara 2011-05-20 00:36:13 PDT --- Followup: I also get the following messages spewed to dmesg every single frame, regardless if I'm using Mesa 7.10.2 or git master or anything in between. I'm not sure if this is related to the problem or just noise. But I suspect that it's unrelated, because I don't experience any symptoms of failure (crash, OOM) with 7.10.2, and the messages still get spewed. The frequency is about once every frame, or a bit more often. Maybe as frequently as once per kernel tick (~1000 Hz timer). [ 564.159042] DRHD: handling fault status reg 2 [ 564.159248] DMAR:[DMA Write] Request device [04:00.0] fault addr 44bc [ 564.159249] DMAR:[fault reason 05] PTE Write access is not set The DRHD line appears less frequently, but the DMAR lines are always grouped together like that. I tried running other GL apps and it doesn't happen there. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH 01/18] drm/radeon/kms: DCE4.1 DIG encoders are fully routeable just like DCE3.2
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c | 13 +
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 9947748..b2e0b58 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -931,10 +931,10 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
else
args.v3.ucLaneNum = 4;
- if (dig->linkb) {
+ if (dig->linkb)
args.v3.acConfig.ucLinkSel = 1;
+ if (dig->dig_encoder & 1)
args.v3.acConfig.ucEncoderSel = 1;
- }
/* Select the PLL for the PHY
* DP PHY should be clocked from external src if there is
@@ -1601,12 +1601,9 @@ static int radeon_atom_pick_dig_encoder(struct
drm_encoder *encoder)
/* DCE4/5 */
if (ASIC_IS_DCE4(rdev)) {
dig = radeon_encoder->enc_priv;
- if (ASIC_IS_DCE41(rdev)) {
- if (dig->linkb)
- return 1;
- else
- return 0;
- } else {
+ if (ASIC_IS_DCE41(rdev))
+ return radeon_crtc->crtc_id;
+ else {
switch (radeon_encoder->encoder_id) {
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
if (dig->linkb)
--
1.7.1.1
[PATCH 02/18] drm/radeon/kms: properly handle bpc >8 in atom command tables
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 38 ++--
drivers/gpu/drm/radeon/radeon_encoders.c | 70 -
2 files changed, 101 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 529a3a7..608b1c2 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -512,6 +512,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
struct radeon_device *rdev = dev->dev_private;
struct drm_encoder *encoder = NULL;
struct radeon_encoder *radeon_encoder = NULL;
+ struct drm_connector *connector = NULL;
u32 adjusted_clock = mode->clock;
int encoder_mode = 0;
u32 dp_clock = mode->clock;
@@ -546,9 +547,11 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
if (encoder->crtc == crtc) {
radeon_encoder = to_radeon_encoder(encoder);
+ connector = radeon_get_connector_for_encoder(encoder);
+ if (connector)
+ bpc = connector->display_info.bpc;
encoder_mode = atombios_get_encoder_mode(encoder);
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) {
- struct drm_connector *connector =
radeon_get_connector_for_encoder(encoder);
if (connector) {
struct radeon_connector
*radeon_connector = to_radeon_connector(connector);
struct radeon_connector_atom_dig
*dig_connector =
@@ -754,7 +757,8 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc,
u32 ref_div,
u32 fb_div,
u32 frac_fb_div,
- u32 post_div)
+ u32 post_div,
+ int bpc)
{
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
@@ -812,6 +816,15 @@ static void atombios_crtc_program_pll(struct drm_crtc
*crtc,
args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div *
10);
args.v5.ucPostDiv = post_div;
args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
+ switch (bpc) {
+ case 8:
+ default:
+ args.v5.ucMiscInfo |=
PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
+ break;
+ case 10:
+ args.v5.ucMiscInfo |=
PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
+ break;
+ }
args.v5.ucTransmitterID = encoder_id;
args.v5.ucEncoderMode = encoder_mode;
args.v5.ucPpll = pll_id;
@@ -824,6 +837,21 @@ static void atombios_crtc_program_pll(struct drm_crtc
*crtc,
args.v6.ulFbDivDecFrac = cpu_to_le32(frac_fb_div *
10);
args.v6.ucPostDiv = post_div;
args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */
+ switch (bpc) {
+ case 8:
+ default:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_24BPP;
+ break;
+ case 10:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_30BPP;
+ break;
+ case 12:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_36BPP;
+ break;
+ case 16:
+ args.v6.ucMiscInfo |=
PIXEL_CLOCK_V6_MISC_HDMI_48BPP;
+ break;
+ }
args.v6.ucTransmitterID = encoder_id;
args.v6.ucEncoderMode = encoder_mode;
args.v6.ucPpll = pll_id;
@@ -855,6 +883,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
int encoder_mode = 0;
struct radeon_atom_ss ss;
bool ss_enabled = false;
+ int bpc = 8;
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
if (encoder->crtc == crtc) {
@@ -891,6 +920,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
int dp_clock;
+
[PATCH 03/18] drm/radeon/kms: spread spectrum fixes
- properly mask the ss type
- don't enable ss if type is external or percentage is 0
- if ss enabled and type is external, set ref_div_src to ext clock
- prefer ASIC_INTERNAL_SS_ON_DP to LCD_Info SS_Id for eDP
- fix ss amount calculation
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 52 ++--
1 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 608b1c2..ff0d1ca 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -420,7 +420,7 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc,
if (ASIC_IS_DCE5(rdev)) {
args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0);
- args.v3.ucSpreadSpectrumType = ss->type;
+ args.v3.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
switch (pll_id) {
case ATOM_PPLL1:
args.v3.ucSpreadSpectrumType |=
ATOM_PPLL_SS_TYPE_V3_P1PLL;
@@ -441,9 +441,11 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc,
return;
}
args.v2.ucEnable = enable;
+ if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK))
+ args.v3.ucEnable = ATOM_DISABLE;
} else if (ASIC_IS_DCE4(rdev)) {
args.v2.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.v2.ucSpreadSpectrumType = ss->type;
+ args.v2.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
switch (pll_id) {
case ATOM_PPLL1:
args.v2.ucSpreadSpectrumType |=
ATOM_PPLL_SS_TYPE_V2_P1PLL;
@@ -464,32 +466,36 @@ static void atombios_crtc_program_ss(struct drm_crtc
*crtc,
return;
}
args.v2.ucEnable = enable;
+ if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK))
+ args.v2.ucEnable = ATOM_DISABLE;
} else if (ASIC_IS_DCE3(rdev)) {
args.v1.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.v1.ucSpreadSpectrumType = ss->type;
+ args.v1.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.v1.ucSpreadSpectrumStep = ss->step;
args.v1.ucSpreadSpectrumDelay = ss->delay;
args.v1.ucSpreadSpectrumRange = ss->range;
args.v1.ucPpll = pll_id;
args.v1.ucEnable = enable;
} else if (ASIC_IS_AVIVO(rdev)) {
- if (enable == ATOM_DISABLE) {
+ if ((enable == ATOM_DISABLE) || (ss->percentage == 0) ||
+ (ss->type & ATOM_EXTERNAL_SS_MASK)) {
atombios_disable_ss(crtc);
return;
}
args.lvds_ss_2.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.lvds_ss_2.ucSpreadSpectrumType = ss->type;
+ args.lvds_ss_2.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.lvds_ss_2.ucSpreadSpectrumStep = ss->step;
args.lvds_ss_2.ucSpreadSpectrumDelay = ss->delay;
args.lvds_ss_2.ucSpreadSpectrumRange = ss->range;
args.lvds_ss_2.ucEnable = enable;
} else {
- if (enable == ATOM_DISABLE) {
+ if ((enable == ATOM_DISABLE) || (ss->percentage == 0) ||
+ (ss->type & ATOM_EXTERNAL_SS_MASK)) {
atombios_disable_ss(crtc);
return;
}
args.lvds_ss.usSpreadSpectrumPercentage =
cpu_to_le16(ss->percentage);
- args.lvds_ss.ucSpreadSpectrumType = ss->type;
+ args.lvds_ss.ucSpreadSpectrumType = ss->type &
ATOM_SS_CENTRE_SPREAD_MODE_MASK;
args.lvds_ss.ucSpreadSpectrumStepSize_Delay = (ss->step & 3) <<
2;
args.lvds_ss.ucSpreadSpectrumStepSize_Delay |= (ss->delay & 7)
<< 4;
args.lvds_ss.ucEnable = enable;
@@ -615,7 +621,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
args.v1.usPixelClock = cpu_to_le16(mode->clock
/ 10);
args.v1.ucTransmitterID =
radeon_encoder->encoder_id;
args.v1.ucEncodeMode = encoder_mode;
- if (ss_enabled)
+ if (ss_enabled && ss->percentage)
args.v1.ucConfig |=
ADJUST_DISPLAY_CONFIG_SS_ENABLE;
@@ -628,7 +634,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
args.v3.sInput.ucTransmitterID =
radeon_encoder->enco
[PATCH 04/18] drm/radeon/kms: fix up DP clock programming on DCE4/5
In DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,
depending on the asic. The crtc virtual pixel clock is derived from
the DP ref clock.
- DCE4: PPLL or ext clock
- DCE5: DCPLL or ext clock
Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip
PPLL/DCPLL programming and only program the DP DTO for the
crtc virtual pixel clock.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 12 ++--
drivers/gpu/drm/radeon/radeon_encoders.c | 11 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index ff0d1ca..9770aff 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1443,11 +1443,19 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
uint32_t pll_in_use = 0;
if (ASIC_IS_DCE4(rdev)) {
- /* if crtc is driving DP and we have an ext clock, use that */
list_for_each_entry(test_encoder,
&dev->mode_config.encoder_list, head) {
if (test_encoder->crtc && (test_encoder->crtc == crtc))
{
+ /* in DP mode, the DP ref clock can come from
PPLL, DCPLL, or ext clock,
+* depending on the asic:
+* DCE4: PPLL or ext clock
+* DCE5: DCPLL or ext clock
+*
+* Setting ATOM_PPLL_INVALID will cause
SetPixelClock to skip
+* PPLL/DCPLL programming and only program the
DP DTO for the
+* crtc virtual pixel clock.
+*/
if (atombios_get_encoder_mode(test_encoder) ==
ATOM_ENCODER_MODE_DP) {
- if (rdev->clock.dp_extclk)
+ if (ASIC_IS_DCE5(rdev) ||
rdev->clock.dp_extclk)
return ATOM_PPLL_INVALID;
}
}
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 6c6793e..4d66e24 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -988,11 +988,16 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
}
if (ASIC_IS_DCE5(rdev)) {
- if (is_dp && rdev->clock.dp_extclk)
- args.v4.acConfig.ucRefClkSource = 3; /*
external src */
- else
+ /* On DCE5 DCPLL usually generates the DP ref clock */
+ if (is_dp) {
+ if (rdev->clock.dp_extclk)
+ args.v4.acConfig.ucRefClkSource =
ENCODER_REFCLK_SRC_EXTCLK;
+ else
+ args.v4.acConfig.ucRefClkSource =
ENCODER_REFCLK_SRC_DCPLL;
+ } else
args.v4.acConfig.ucRefClkSource = pll_id;
} else {
+ /* On DCE4, if there is an external clock, it generates
the DP ref clock */
if (is_dp && rdev->clock.dp_extclk)
args.v3.acConfig.ucRefClkSource = 2; /*
external src */
else
--
1.7.1.1
[PATCH 05/18] drm/radeon/kms: adjust eDP handling (v2)
eDP is usually used as an LVDS replacement, so treat
it more like LVDS from the user perspective.
v2: encoder mode is always DP for eDP.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 30 +++
drivers/gpu/drm/radeon/radeon_encoders.c |3 +-
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 5f45fa1..a7bdcc7 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1314,7 +1314,6 @@ radeon_add_atom_connector(struct drm_device *dev,
connector->doublescan_allowed = false;
break;
case DRM_MODE_CONNECTOR_DisplayPort:
- case DRM_MODE_CONNECTOR_eDP:
radeon_dig_connector = kzalloc(sizeof(struct
radeon_connector_atom_dig), GFP_KERNEL);
if (!radeon_dig_connector)
goto failed;
@@ -1324,10 +1323,7 @@ radeon_add_atom_connector(struct drm_device *dev,
drm_connector_helper_add(&radeon_connector->base,
&radeon_dp_connector_helper_funcs);
if (i2c_bus->valid) {
/* add DP i2c bus */
- if (connector_type == DRM_MODE_CONNECTOR_eDP)
- radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
- else
- radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
+ radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
if (!radeon_dig_connector->dp_i2c_bus)
DRM_ERROR("DP: Failed to assign dp ddc bus!
Check dmesg for i2c errors.\n");
radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
@@ -1353,6 +1349,30 @@ radeon_add_atom_connector(struct drm_device *dev,
/* in theory with a DP to VGA converter... */
connector->doublescan_allowed = false;
break;
+ case DRM_MODE_CONNECTOR_eDP:
+ radeon_dig_connector = kzalloc(sizeof(struct
radeon_connector_atom_dig), GFP_KERNEL);
+ if (!radeon_dig_connector)
+ goto failed;
+ radeon_dig_connector->igp_lane_info = igp_lane_info;
+ radeon_connector->con_priv = radeon_dig_connector;
+ drm_connector_init(dev, &radeon_connector->base,
&radeon_dp_connector_funcs, connector_type);
+ drm_connector_helper_add(&radeon_connector->base,
&radeon_dp_connector_helper_funcs);
+ if (i2c_bus->valid) {
+ /* add DP i2c bus */
+ radeon_dig_connector->dp_i2c_bus =
radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
+ if (!radeon_dig_connector->dp_i2c_bus)
+ DRM_ERROR("DP: Failed to assign dp ddc bus!
Check dmesg for i2c errors.\n");
+ radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
+ if (!radeon_connector->ddc_bus)
+ DRM_ERROR("DP: Failed to assign ddc bus! Check
dmesg for i2c errors.\n");
+ }
+ drm_connector_attach_property(&radeon_connector->base,
+
dev->mode_config.scaling_mode_property,
+ DRM_MODE_SCALE_FULLSCREEN);
+ subpixel_order = SubPixelHorizontalRGB;
+ connector->interlace_allowed = false;
+ connector->doublescan_allowed = false;
+ break;
case DRM_MODE_CONNECTOR_SVIDEO:
case DRM_MODE_CONNECTOR_Composite:
case DRM_MODE_CONNECTOR_9PinDIN:
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 4d66e24..49fcd60 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -668,7 +668,6 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
return ATOM_ENCODER_MODE_LVDS;
break;
case DRM_MODE_CONNECTOR_DisplayPort:
- case DRM_MODE_CONNECTOR_eDP:
dig_connector = radeon_connector->con_priv;
if ((dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
(dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
@@ -682,6 +681,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
} else
return ATOM_ENCODER_MODE_DVI;
break;
+ case DRM_MODE_CONNECTOR_eDP:
+ return ATOM_ENCODER_MODE_DP;
case DRM_MODE_CONNECTOR_DVIA:
case DRM_MODE_CONNECTOR_VGA:
return ATOM_ENCODER_MODE_CRT;
--
1.7.1.1
[PATCH 07/18] drm/radeon/kms: make sure eDP panel is on for modesetting
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index cdac739..fd0087f 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1936,11 +1936,17 @@ static void radeon_atom_encoder_prepare(struct
drm_encoder *encoder)
radeon_atom_output_lock(encoder, true);
radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
- /* select the clock/data port if it uses a router */
if (connector) {
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
+
+ /* select the clock/data port if it uses a router */
if (radeon_connector->router.cd_valid)
radeon_router_select_cd_port(radeon_connector);
+
+ /* turn eDP panel on for mode set */
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+ atombios_set_edp_panel_power(connector,
+
ATOM_TRANSMITTER_ACTION_POWER_ON);
}
/* this is needed for the pll/ss setup to work correctly in some cases
*/
--
1.7.1.1
[PATCH 06/18] drm/radeon/kms: fix eDP panel power function
need to wait for the panel to power up.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_encoders.c | 24 +++-
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 49fcd60..cdac739 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1095,7 +1095,7 @@ atombios_dig_transmitter_setup(struct drm_encoder
*encoder, int action, uint8_t
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
}
-void
+bool
atombios_set_edp_panel_power(struct drm_connector *connector, int action)
{
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
@@ -1106,23 +1106,37 @@ atombios_set_edp_panel_power(struct drm_connector
*connector, int action)
uint8_t frev, crev;
if (connector->connector_type != DRM_MODE_CONNECTOR_eDP)
- return;
+ goto done;
if (!ASIC_IS_DCE4(rdev))
- return;
+ goto done;
if ((action != ATOM_TRANSMITTER_ACTION_POWER_ON) &&
(action != ATOM_TRANSMITTER_ACTION_POWER_OFF))
- return;
+ goto done;
if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
&crev))
- return;
+ goto done;
memset(&args, 0, sizeof(args));
args.v1.ucAction = action;
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
+
+ /* wait for the panel to power up */
+ if (action == ATOM_TRANSMITTER_ACTION_POWER_ON) {
+ int i;
+
+ for (i = 0; i < 300; i++) {
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
+ return true;
+ mdelay(1);
+ }
+ return false;
+ }
+done:
+ return true;
}
union external_encoder_control {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index 9c57538..e4d3237 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -545,7 +545,7 @@ struct drm_encoder
*radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, i
extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
-extern void atombios_set_edp_panel_power(struct drm_connector *connector, int
action);
+extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int
action);
extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
--
1.7.1.1
[PATCH 08/18] drm/radeon/kms: add some dp encoder/connector helper funcs
Used for dp1.2 support and for dp bridges.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 71
drivers/gpu/drm/radeon/radeon_encoders.c | 23 +
drivers/gpu/drm/radeon/radeon_mode.h |5 ++
3 files changed, 99 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index a7bdcc7..9f3c650 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1068,6 +1068,77 @@ static int radeon_dp_get_modes(struct drm_connector
*connector)
return ret;
}
+bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector)
+{
+ struct drm_mode_object *obj;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
+ int i;
+ bool found = false;
+
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ if (connector->encoder_ids[i] == 0)
+ break;
+
+ obj = drm_mode_object_find(connector->dev,
connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
+ if (!obj)
+ continue;
+
+ encoder = obj_to_encoder(obj);
+ radeon_encoder = to_radeon_encoder(encoder);
+
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ found = true;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return found;
+}
+
+bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
+{
+ struct drm_mode_object *obj;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
+ int i;
+ bool found = false;
+
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ if (connector->encoder_ids[i] == 0)
+ break;
+
+ obj = drm_mode_object_find(connector->dev,
connector->encoder_ids[i], DRM_MODE_OBJECT_ENCODER);
+ if (!obj)
+ continue;
+
+ encoder = obj_to_encoder(obj);
+ radeon_encoder = to_radeon_encoder(encoder);
+ if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
+ found = true;
+ }
+
+ return found;
+}
+
+bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct radeon_device *rdev = dev->dev_private;
+
+ if (ASIC_IS_DCE5(rdev) &&
+ (rdev->clock.dp_extclk >= 53900) &&
+ radeon_connector_encoder_is_hbr2(connector)) {
+ return true;
+ }
+
+ return false;
+}
+
static enum drm_connector_status
radeon_dp_detect(struct drm_connector *connector, bool force)
{
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index fd0087f..1c064e7 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -250,6 +250,25 @@ struct drm_encoder
*radeon_atom_get_external_encoder(struct drm_encoder *encoder
return NULL;
}
+bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder)
+{
+ struct drm_encoder *other_encoder =
radeon_atom_get_external_encoder(encoder);
+
+ if (other_encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(other_encoder);
+
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ return true;
+ default:
+ return false;
+ }
+ }
+
+ return false;
+}
+
void radeon_panel_mode_fixup(struct drm_encoder *encoder,
struct drm_display_mode *adjusted_mode)
{
@@ -621,6 +640,10 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *dig_connector;
+ /* dp bridges are always DP */
+ if (radeon_encoder_is_dp_bridge(encoder))
+ return ATOM_ENCODER_MODE_DP;
+
connector = radeon_get_connector_for_encoder(encoder);
if (!connector) {
switch (radeon_encoder->encoder_id) {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index e4d3237..7a3cfa0 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -464,6 +464,11 @@ radeon_atombios_get_tv_info(struct radeon_device *rdev);
extern struct drm_connector *
radeon_get_connector_for_encoder(struct drm_encoder *encoder);
+extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder);
+extern bool radeon_connector_encoder_is_dp
[PATCH 10/18] drm/radeon/kms: improve DP detect logic
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index e9493d7..356feea 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1142,6 +1142,8 @@ bool radeon_connector_is_dp12_capable(struct
drm_connector *connector)
static enum drm_connector_status
radeon_dp_detect(struct drm_connector *connector, bool force)
{
+ struct drm_device *dev = connector->dev;
+ struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
enum drm_connector_status ret = connector_status_disconnected;
struct radeon_connector_atom_dig *radeon_dig_connector =
radeon_connector->con_priv;
@@ -1164,12 +1166,18 @@ radeon_dp_detect(struct drm_connector *connector, bool
force)
ATOM_TRANSMITTER_ACTION_POWER_OFF);
} else {
radeon_dig_connector->dp_sink_type =
radeon_dp_getsinktype(radeon_connector);
- if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) {
- if (radeon_dp_getdpcd(radeon_connector))
- ret = connector_status_connected;
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
+ ret = connector_status_connected;
+ if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT)
+ radeon_dp_getdpcd(radeon_connector);
} else {
- if (radeon_ddc_probe(radeon_connector))
- ret = connector_status_connected;
+ if (radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+ if (radeon_dp_getdpcd(radeon_connector))
+ ret = connector_status_connected;
+ } else {
+ if (radeon_ddc_probe(radeon_connector))
+ ret = connector_status_connected;
+ }
}
}
--
1.7.1.1
[PATCH 11/18] drm/radeon/kms: improve aux error handling
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 234 ++
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
2 files changed, 151 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 695de9a..0f72f4d 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -327,23 +327,23 @@ union aux_channel_transaction {
};
/* radeon aux chan functions */
-bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
- int num_bytes, u8 *read_byte,
- u8 read_buf_len, u8 delay)
+static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
+u8 *send, int send_bytes,
+u8 *recv, int recv_size,
+u8 delay, u8 *ack)
{
struct drm_device *dev = chan->dev;
struct radeon_device *rdev = dev->dev_private;
union aux_channel_transaction args;
int index = GetIndexIntoMasterTable(COMMAND,
ProcessAuxChannelTransaction);
unsigned char *base;
- int retry_count = 0;
+ int recv_bytes;
memset(&args, 0, sizeof(args));
base = (unsigned char *)rdev->mode_info.atom_context->scratch;
-retry:
- memcpy(base, req_bytes, num_bytes);
+ memcpy(base, send, send_bytes);
args.v1.lpAuxRequest = 0;
args.v1.lpDataOut = 16;
@@ -355,75 +355,103 @@ retry:
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
- if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) {
- if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10)
- goto retry;
- DRM_DEBUG_KMS("failed to get auxch %02x%02x %02x %02x 0x%02x
%02x after %d retries\n",
- req_bytes[1], req_bytes[0], req_bytes[2],
req_bytes[3],
- chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count);
- return false;
+ *ack = args.v1.ucReplyStatus;
+
+ /* timeout */
+ if (args.v1.ucReplyStatus == 1) {
+ DRM_DEBUG_KMS("dp_aux_ch timeout\n");
+ return -ETIMEDOUT;
}
- if (args.v1.ucDataOutLen && read_byte && read_buf_len) {
- if (read_buf_len < args.v1.ucDataOutLen) {
- DRM_ERROR("Buffer to small for return answer %d %d\n",
- read_buf_len, args.v1.ucDataOutLen);
- return false;
- }
- {
- int len = min(read_buf_len, args.v1.ucDataOutLen);
- memcpy(read_byte, base + 16, len);
- }
+ /* flags not zero */
+ if (args.v1.ucReplyStatus == 2) {
+ DRM_DEBUG_KMS("dp_aux_ch flags not zero\n");
+ return -EBUSY;
}
- return true;
+
+ /* error */
+ if (args.v1.ucReplyStatus == 3) {
+ DRM_DEBUG_KMS("dp_aux_ch error\n");
+ return -EIO;
+ }
+
+ recv_bytes = args.v1.ucDataOutLen;
+ if (recv_bytes > recv_size)
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+ memcpy(recv, base + 16, recv_bytes);
+
+ return recv_bytes;
}
-bool radeon_dp_aux_native_write(struct radeon_connector *radeon_connector,
uint16_t address,
- uint8_t send_bytes, uint8_t *send)
+static int radeon_dp_aux_native_write(struct radeon_connector
*radeon_connector,
+ u16 address, u8 *send, u8 send_bytes, u8
delay)
{
struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
+ int ret;
u8 msg[20];
- u8 msg_len, dp_msg_len;
- bool ret;
+ int msg_bytes = send_bytes + 4;
+ u8 ack;
+
+ if (send_bytes > 16)
+ return -1;
- dp_msg_len = 4;
msg[0] = address;
msg[1] = address >> 8;
msg[2] = AUX_NATIVE_WRITE << 4;
- dp_msg_len += send_bytes;
- msg[3] = (dp_msg_len << 4) | (send_bytes - 1);
+ msg[3] = (msg_bytes << 4) | (send_bytes - 1);
+ memcpy(&msg[4], send, send_bytes);
- if (send_bytes > 16)
- return false;
+ while (1) {
+ ret = radeon_process_aux_ch(dig_connector->dp_i2c_bus,
+ msg, msg_bytes, NULL, 0, delay,
&ack);
+ if (ret < 0)
+ return ret;
+ if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
+ break;
+ else if ((ack & AUX_NATIVE_REPLY_MASK) ==
AUX_NATIVE_REPLY_DEFER)
+ udelay(400);
+ else
+ return -EIO;
+ }
- memcpy(&msg[4], send, send_bytes);
- msg_len = 4 + send_bytes;
-
[PATCH 09/18] drm/radeon/kms: handle DP bridges
Fusion hardware often has DP to VGA/LVDS/TMDS bridges to
handle non-DP encoders. Internally we treat them mostly
like DP.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c |6 +-
drivers/gpu/drm/radeon/radeon_connectors.c | 433
drivers/gpu/drm/radeon/radeon_encoders.c |5 +-
3 files changed, 263 insertions(+), 181 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9770aff..dab06fb 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -557,7 +557,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (connector)
bpc = connector->display_info.bpc;
encoder_mode = atombios_get_encoder_mode(encoder);
- if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) {
+ if ((radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT
| ATOM_DEVICE_DFP_SUPPORT)) ||
+ radeon_encoder_is_dp_bridge(encoder)) {
if (connector) {
struct radeon_connector
*radeon_connector = to_radeon_connector(connector);
struct radeon_connector_atom_dig
*dig_connector =
@@ -637,7 +638,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (ss_enabled && ss->percentage)
args.v3.sInput.ucDispPllConfig |=
DISPPLL_CONFIG_SS_ENABLE;
- if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT)) {
+ if (radeon_encoder->devices &
(ATOM_DEVICE_DFP_SUPPORT) ||
+ radeon_encoder_is_dp_bridge(encoder)) {
struct radeon_encoder_atom_dig *dig =
radeon_encoder->enc_priv;
if (encoder_mode ==
ATOM_ENCODER_MODE_DP) {
args.v3.sInput.ucDispPllConfig
|=
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 9f3c650..e9493d7 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1222,8 +1222,11 @@ radeon_add_atom_connector(struct drm_device *dev,
struct drm_connector *connector;
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *radeon_dig_connector;
+ struct drm_encoder *encoder;
+ struct radeon_encoder *radeon_encoder;
uint32_t subpixel_order = SubPixelNone;
bool shared_ddc = false;
+ bool is_dp_bridge = false;
if (connector_type == DRM_MODE_CONNECTOR_Unknown)
return;
@@ -1255,6 +1258,21 @@ radeon_add_atom_connector(struct drm_device *dev,
}
}
+ /* check if it's a dp bridge */
+ list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+ radeon_encoder = to_radeon_encoder(encoder);
+ if (radeon_encoder->devices & supported_device) {
+ switch (radeon_encoder->encoder_id) {
+ case ENCODER_OBJECT_ID_TRAVIS:
+ case ENCODER_OBJECT_ID_NUTMEG:
+ is_dp_bridge = true;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+
radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
if (!radeon_connector)
return;
@@ -1272,61 +1290,39 @@ radeon_add_atom_connector(struct drm_device *dev,
if (!radeon_connector->router_bus)
DRM_ERROR("Failed to assign router i2c bus! Check dmesg
for i2c errors.\n");
}
- switch (connector_type) {
- case DRM_MODE_CONNECTOR_VGA:
- drm_connector_init(dev, &radeon_connector->base,
&radeon_vga_connector_funcs, connector_type);
- drm_connector_helper_add(&radeon_connector->base,
&radeon_vga_connector_helper_funcs);
- if (i2c_bus->valid) {
- radeon_connector->ddc_bus = radeon_i2c_lookup(rdev,
i2c_bus);
- if (!radeon_connector->ddc_bus)
- DRM_ERROR("VGA: Failed to assign ddc bus! Check
dmesg for i2c errors.\n");
- }
- radeon_connector->dac_load_detect = true;
- drm_connector_attach_property(&radeon_connector->base,
-
rdev->mode_info.load_detect_property,
- 1);
- /* no HPD on analog connectors */
-
[PATCH 12/18] drm/dp: add some new DP regs for DP 1.2
Signed-off-by: Alex Deucher --- include/drm/drm_dp_helper.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 83a389e..91567bb 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -53,6 +53,7 @@ #define DP_MAX_LANE_COUNT 0x002 # define DP_MAX_LANE_COUNT_MASK0x1f +# define DP_TPS3_SUPPORTED (1 << 6) # define DP_ENHANCED_FRAME_CAP (1 << 7) #define DP_MAX_DOWNSPREAD 0x003 @@ -71,10 +72,13 @@ #define DP_MAIN_LINK_CHANNEL_CODING 0x006 +#define DP_TRAINING_AUX_RD_INTERVAL 0x00e + /* link configuration */ #defineDP_LINK_BW_SET 0x100 # define DP_LINK_BW_1_62 0x06 # define DP_LINK_BW_2_70x0a +# define DP_LINK_BW_5_40x14 #define DP_LANE_COUNT_SET 0x101 # define DP_LANE_COUNT_MASK0x0f @@ -84,6 +88,7 @@ # define DP_TRAINING_PATTERN_DISABLE 0 # define DP_TRAINING_PATTERN_1 1 # define DP_TRAINING_PATTERN_2 2 +# define DP_TRAINING_PATTERN_3 3 # define DP_TRAINING_PATTERN_MASK 0x3 # define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2) -- 1.7.1.1
[PATCH 13/18] drm/radeon/kms: atombios.h updates for DP panel mode
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios.h | 22 --
1 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index 7fd8849..49611e2 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -726,6 +726,7 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V2
#define ATOM_ENCODER_CMD_DP_VIDEO_ON 0x0d
#define ATOM_ENCODER_CMD_QUERY_DP_LINK_TRAINING_STATUS0x0e
#define ATOM_ENCODER_CMD_SETUP0x0f
+#define ATOM_ENCODER_CMD_SETUP_PANEL_MODE 0x10
// ucStatus
#define ATOM_ENCODER_STATUS_LINK_TRAINING_COMPLETE0x10
@@ -765,13 +766,19 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V3
USHORT usPixelClock; // in 10KHz; for bios convenient
ATOM_DIG_ENCODER_CONFIG_V3 acConfig;
UCHAR ucAction;
- UCHAR ucEncoderMode;
+ union {
+UCHAR ucEncoderMode;
// =0: DP encoder
// =1: LVDS encoder
// =2: DVI encoder
// =3: HDMI encoder
// =4: SDVO encoder
// =5: DP audio
+UCHAR ucPanelMode; // only valid when ucAction ==
ATOM_ENCODER_CMD_SETUP_PANEL_MODE
+ // =0: external DP
+ // =1: internal DP2
+ // =0x11: internal DP1 for NutMeg/Travis DP
translator
+ };
UCHAR ucLaneNum; // how many lanes to enable
UCHAR ucBitPerColor; // only valid for DP mode when ucAction =
ATOM_ENCODER_CMD_SETUP
UCHAR ucReserved;
@@ -816,13 +823,19 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V4
UCHAR ucConfig;
};
UCHAR ucAction;
- UCHAR ucEncoderMode;
+ union {
+UCHAR ucEncoderMode;
// =0: DP encoder
// =1: LVDS encoder
// =2: DVI encoder
// =3: HDMI encoder
// =4: SDVO encoder
// =5: DP audio
+UCHAR ucPanelMode; // only valid when ucAction ==
ATOM_ENCODER_CMD_SETUP_PANEL_MODE
+ // =0: external DP
+ // =1: internal DP2
+ // =0x11: internal DP1 for NutMeg/Travis DP
translator
+ };
UCHAR ucLaneNum; // how many lanes to enable
UCHAR ucBitPerColor; // only valid for DP mode when ucAction =
ATOM_ENCODER_CMD_SETUP
UCHAR ucHPD_ID; // HPD ID (1-6). =0 means to skip HDP programming.
New comparing to previous version
@@ -836,6 +849,11 @@ typedef struct _DIG_ENCODER_CONTROL_PARAMETERS_V4
#define PANEL_12BIT_PER_COLOR0x04
#define PANEL_16BIT_PER_COLOR0x05
+//define ucPanelMode
+#define DP_PANEL_MODE_EXTERNAL_DP_MODE 0x00
+#define DP_PANEL_MODE_INTERNAL_DP2_MODE 0x01
+#define DP_PANEL_MODE_INTERNAL_DP1_MODE 0x11
+
//
// Structures used by UNIPHYTransmitterControlTable
//LVTMATransmitterControlTable
--
1.7.1.1
[PATCH 14/18] drm/radeon/kms/atom: add support for setting DP panel mode
Required for proper operation with DP bridges.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c |8
drivers/gpu/drm/radeon/radeon_encoders.c | 19 +++
drivers/gpu/drm/radeon/radeon_mode.h |2 +-
3 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 0f72f4d..444954d 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -662,9 +662,9 @@ void dp_link_train(struct drm_encoder *encoder,
dp_set_downspread(radeon_connector, 0);
if (ASIC_IS_DCE4(rdev)) {
/* start training on the source */
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_START);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_START, 0);
/* set training pattern 1 on the source */
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN1, 0);
} else {
/* start training on the source */
radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START,
@@ -733,7 +733,7 @@ void dp_link_train(struct drm_encoder *encoder,
dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2);
/* set training pattern 2 on the source */
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_PATTERN2, 0);
else
radeon_dp_encoder_service(rdev,
ATOM_DP_ACTION_TRAINING_PATTERN_SEL,
dig_connector->dp_clock, enc_id, 1);
@@ -777,7 +777,7 @@ void dp_link_train(struct drm_encoder *encoder,
/* disable the training pattern on the source */
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_LINK_TRAINING_COMPLETE, 0);
else
radeon_dp_encoder_service(rdev,
ATOM_DP_ACTION_TRAINING_COMPLETE,
dig_connector->dp_clock, enc_id, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c
b/drivers/gpu/drm/radeon/radeon_encoders.c
index 43c001b..11d7b33 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -771,7 +771,7 @@ union dig_encoder_control {
};
void
-atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
+atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int
panel_mode)
{
struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private;
@@ -817,7 +817,10 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder,
int action)
args.v1.ucAction = action;
args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
- args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
+ if (action == ATOM_ENCODER_CMD_SETUP_PANEL_MODE)
+ args.v3.ucPanelMode = panel_mode;
+ else
+ args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
(args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST))
@@ -1416,7 +1419,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int
mode)
}
dp_link_train(encoder, connector);
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_ON);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
}
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
@@ -1429,7 +1432,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int
mode)
struct drm_connector *connector =
radeon_get_connector_for_encoder(encoder);
if (ASIC_IS_DCE4(rdev))
- atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_OFF);
+ atombios_dig_encoder_setup(encoder,
ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
if (connector &&
(connector->connector_type ==
DRM_MODE_CONNECTOR_eDP)) {
struct radeon_connector
*radeon_connector = to_radeon_connector(connector)
[PATCH 15/18] drm/radeon/kms: rewrite DP handling
- reorganize the functions based on use
- clean up function naming
- rework link training to better match what we use internally
- add initial support for DP 1.2 (no MST yet)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 1094 +++-
drivers/gpu/drm/radeon/radeon_connectors.c |4 +-
drivers/gpu/drm/radeon/radeon_encoders.c |4 +-
drivers/gpu/drm/radeon/radeon_mode.h |6 +-
4 files changed, 584 insertions(+), 524 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 444954d..5f2ddcd 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -43,158 +43,242 @@ static char *pre_emph_names[] = {
"0dB", "3.5dB", "6dB", "9.5dB"
};
-static const int dp_clocks[] = {
- 54000, /* 1 lane, 1.62 Ghz */
- 9, /* 1 lane, 2.70 Ghz */
- 108000, /* 2 lane, 1.62 Ghz */
- 18, /* 2 lane, 2.70 Ghz */
- 216000, /* 4 lane, 1.62 Ghz */
- 36, /* 4 lane, 2.70 Ghz */
+/* radeon AUX functions */
+union aux_channel_transaction {
+ PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1;
+ PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2;
};
-static const int num_dp_clocks = sizeof(dp_clocks) / sizeof(int);
+static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
+u8 *send, int send_bytes,
+u8 *recv, int recv_size,
+u8 delay, u8 *ack)
+{
+ struct drm_device *dev = chan->dev;
+ struct radeon_device *rdev = dev->dev_private;
+ union aux_channel_transaction args;
+ int index = GetIndexIntoMasterTable(COMMAND,
ProcessAuxChannelTransaction);
+ unsigned char *base;
+ int recv_bytes;
+
+ memset(&args, 0, sizeof(args));
-/* common helper functions */
-static int dp_lanes_for_mode_clock(u8 dpcd[DP_DPCD_SIZE], int mode_clock)
+ base = (unsigned char *)rdev->mode_info.atom_context->scratch;
+
+ memcpy(base, send, send_bytes);
+
+ args.v1.lpAuxRequest = 0;
+ args.v1.lpDataOut = 16;
+ args.v1.ucDataOutLen = 0;
+ args.v1.ucChannelID = chan->rec.i2c_id;
+ args.v1.ucDelay = delay / 10;
+ if (ASIC_IS_DCE4(rdev))
+ args.v2.ucHPD_ID = chan->rec.hpd;
+
+ atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t
*)&args);
+
+ *ack = args.v1.ucReplyStatus;
+
+ /* timeout */
+ if (args.v1.ucReplyStatus == 1) {
+ DRM_DEBUG_KMS("dp_aux_ch timeout\n");
+ return -ETIMEDOUT;
+ }
+
+ /* flags not zero */
+ if (args.v1.ucReplyStatus == 2) {
+ DRM_DEBUG_KMS("dp_aux_ch flags not zero\n");
+ return -EBUSY;
+ }
+
+ /* error */
+ if (args.v1.ucReplyStatus == 3) {
+ DRM_DEBUG_KMS("dp_aux_ch error\n");
+ return -EIO;
+ }
+
+ recv_bytes = args.v1.ucDataOutLen;
+ if (recv_bytes > recv_size)
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+ memcpy(recv, base + 16, recv_bytes);
+
+ return recv_bytes;
+}
+
+static int radeon_dp_aux_native_write(struct radeon_connector
*radeon_connector,
+ u16 address, u8 *send, u8 send_bytes, u8
delay)
{
- int i;
- u8 max_link_bw;
- u8 max_lane_count;
+ struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
+ int ret;
+ u8 msg[20];
+ int msg_bytes = send_bytes + 4;
+ u8 ack;
- if (!dpcd)
- return 0;
+ if (send_bytes > 16)
+ return -1;
- max_link_bw = dpcd[DP_MAX_LINK_RATE];
- max_lane_count = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
+ msg[0] = address;
+ msg[1] = address >> 8;
+ msg[2] = AUX_NATIVE_WRITE << 4;
+ msg[3] = (msg_bytes << 4) | (send_bytes - 1);
+ memcpy(&msg[4], send, send_bytes);
- switch (max_link_bw) {
- case DP_LINK_BW_1_62:
- default:
- for (i = 0; i < num_dp_clocks; i++) {
- if (i % 2)
- continue;
- switch (max_lane_count) {
- case 1:
- if (i > 1)
- return 0;
- break;
- case 2:
- if (i > 3)
- return 0;
- break;
- case 4:
- default:
- break;
- }
- if (dp_clocks[i] > mode_clock) {
- if (i < 2)
- return 1;
- else if (i <
[PATCH 16/18] drm/radeon/kms: simplify hotplug handler logic
In the hotplug handler, just use the drm dpms functions.
If the monitor is plugged in, turn it on, if it's not,
turn it off. This also reduces power usage by turning
off the encoder and crtc when the monitor is unplugged.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_dp.c | 12
drivers/gpu/drm/radeon/radeon_connectors.c | 19 +++
drivers/gpu/drm/radeon/radeon_mode.h |1 -
3 files changed, 7 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 5f2ddcd..8c0f9e3 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -613,18 +613,6 @@ static bool radeon_dp_get_link_status(struct
radeon_connector *radeon_connector,
return true;
}
-bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
-{
- struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
- u8 link_status[DP_LINK_STATUS_SIZE];
-
- if (!radeon_dp_get_link_status(radeon_connector, link_status))
- return false;
- if (dp_channel_eq_ok(link_status, dig_connector->dp_lane_count))
- return false;
- return true;
-}
-
struct radeon_dp_link_train_info {
struct radeon_device *rdev;
struct drm_encoder *encoder;
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 6c9e17f..5947871 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -50,20 +50,15 @@ void radeon_connector_hotplug(struct drm_connector
*connector)
struct radeon_device *rdev = dev->dev_private;
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
- if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
- radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
-
- if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
- (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
- if ((radeon_dp_getsinktype(radeon_connector) ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
- (radeon_dp_getsinktype(radeon_connector) ==
CONNECTOR_OBJECT_ID_eDP)) {
- if (radeon_dp_needs_link_train(radeon_connector)) {
- if (connector->encoder)
-
radeon_dp_link_train(connector->encoder, connector);
- }
- }
- }
+ radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+ /* pre-r600 did not always have the hpd pins mapped accurately to
connectors */
+ if (rdev->family >= CHIP_R600) {
+ if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
+ else
+ drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
+ }
}
static void radeon_property_change_mode(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index 37f57ba..88257bc 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -470,7 +470,6 @@ extern bool radeon_connector_encoder_is_hbr2(struct
drm_connector *connector);
extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
extern void radeon_connector_hotplug(struct drm_connector *connector);
-extern bool radeon_dp_needs_link_train(struct radeon_connector
*radeon_connector);
extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
struct drm_display_mode *mode);
extern void radeon_dp_set_link_config(struct drm_connector *connector,
--
1.7.1.1
[PATCH 17/18] drm/radeon/kms: bail early for eDP in hotplug callback
Don't try and en/disable the port as it may be a hpd event from
powering up/down the panel during a modeset or dpms.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 5947871..532f17d 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -52,6 +52,12 @@ void radeon_connector_hotplug(struct drm_connector
*connector)
radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+ /* powering up/down the eDP panel generates hpd events which
+* can interfere with modesetting.
+*/
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+ return;
+
/* pre-r600 did not always have the hpd pins mapped accurately to
connectors */
if (rdev->family >= CHIP_R600) {
if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
--
1.7.1.1
[PATCH 18/18] drm/radeon/kms: fixup eDP connector handling
It's more like LVDS then DP in some ways.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_connectors.c | 80 +---
1 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 532f17d..ee1dccb 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1055,16 +1055,44 @@ static int radeon_dp_get_modes(struct drm_connector
*connector)
int ret;
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder;
+ struct drm_display_mode *mode;
+
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_ON);
- }
- ret = radeon_ddc_get_modes(radeon_connector);
- if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ ret = radeon_ddc_get_modes(radeon_connector);
if (!radeon_dig_connector->edp_on)
atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_OFF);
- }
+
+ if (ret > 0) {
+ encoder = radeon_best_single_encoder(connector);
+ if (encoder) {
+ radeon_fixup_lvds_native_mode(encoder,
connector);
+ /* add scaled modes */
+ radeon_add_common_modes(encoder, connector);
+ }
+ return ret;
+ }
+
+ encoder = radeon_best_single_encoder(connector);
+ if (!encoder)
+ return 0;
+
+ /* we have no EDID modes */
+ mode = radeon_fp_native_mode(encoder);
+ if (mode) {
+ ret = 1;
+ drm_mode_probed_add(connector, mode);
+ /* add the width/height from vbios tables if available
*/
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+ /* add scaled modes */
+ radeon_add_common_modes(encoder, connector);
+ }
+ } else
+ ret = radeon_ddc_get_modes(radeon_connector);
return ret;
}
@@ -1155,6 +1183,15 @@ radeon_dp_detect(struct drm_connector *connector, bool
force)
}
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder =
radeon_best_single_encoder(connector);
+ if (encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ struct drm_display_mode *native_mode =
&radeon_encoder->native_mode;
+
+ /* check if panel is valid */
+ if (native_mode->hdisplay >= 320 &&
native_mode->vdisplay >= 240)
+ ret = connector_status_connected;
+ }
/* eDP is always DP */
radeon_dig_connector->dp_sink_type =
CONNECTOR_OBJECT_ID_DISPLAYPORT;
if (!radeon_dig_connector->edp_on)
@@ -1194,11 +1231,38 @@ static int radeon_dp_mode_valid(struct drm_connector
*connector,
/* XXX check mode bandwidth */
- if ((radeon_dig_connector->dp_sink_type ==
CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
- (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
- return radeon_dp_mode_valid_helper(connector, mode);
- else
+ if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+ struct drm_encoder *encoder =
radeon_best_single_encoder(connector);
+
+ if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
+ return MODE_PANEL;
+
+ if (encoder) {
+ struct radeon_encoder *radeon_encoder =
to_radeon_encoder(encoder);
+ struct drm_display_mode *native_mode =
&radeon_encoder->native_mode;
+
+ /* AVIVO hardware supports downscaling modes larger than the
panel
+* to the panel size, but I'm not sure this is
desirable.
+*/
+ if ((mode->hdisplay > native_mode->hdisplay) ||
+ (mode->vdisplay > native_mode->vdisplay))
+ return MODE_PANEL;
+
+ /* if scaling is disabled, block non-native modes */
+ if (radeon_encoder->rmx_type == RMX_OFF) {
+ if ((mode->hdisplay != native_mode->hdisplay) ||
+ (mode->vdisplay != n
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #6 from Michel D?nzer 2011-05-20 12:11:38 --- (In reply to comment #1) > Anyway, things are *way* better with 2.6.38 than with 2.6.39, as with 2.6.39 > the kernel doesn't even get the colors correctly---everything that should be > red becomes blue and so forth (any kind of endianness problem?). That's probably nothing to do with the kernel directly but endianness bugs in the X driver when acceleration is not available. It would be interesting if you could bisect what broke acceleration with radeon.agpmode=-1. Note that you should boot with radeon.no_wb=1 as well for this, as CP writeback was only fixed during the 2.6.39 cycle (in commit dc66b325f161bb651493c7d96ad44876b629cf6a). -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27517] KMS breaks 3D on R200
https://bugs.freedesktop.org/show_bug.cgi?id=27517 --- Comment #8 from Keith 2011-05-20 07:16:50 PDT --- Yes, some time around the introduction of KMS, acceleration stopped working. I had it fine on Debian before squeeze and Ubuntu Maveric but recently upgraded to Natty and it stopped working. Starting compiz gives the old GLX_EXT_texture_pixmap not available error. It also complains about GL version 1.4+ whereas glxinfo reports version 1.4 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #7 from Michel D?nzer 2011-05-20 14:31:00 --- I was able to reproduce the acceleration initialization failure with the Debian 2.6.39-rc7-powerpc kernel, but not with a self-built 2.6.39 kernel. So this was probably just an intermittent problem during the 2.6.39 cycle, e.g. due to the intermittent broken usage of the DMA API by TTM. As for the GPU lockups, does radeon.dynclks=1 help for those? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
output on external video projector broken with 2.6.39 with intel
Hi everyone,
(please cc)
laptop: sony vaio vgn-z11
graphics hardware: GM45
X: 7.6 (Debian: 1:7.6+6)
X intel driver: 2:15.0 (Debian: 2:2.15.0-3)
system: Debian sid up2date
I regularly build kernels from git, but haven't tried a video projector
for some time now. I found that in recent kernels I have problems with
the output to the external screen.
After inital connection everything works and I have a BIG virtual
screen covering both units. Then I want to switch it to
Same image on both screens
and at that time one of the screens, most of the times the external
ones, sometimes both, fall into pieces with vertical stripes and
colors.
Waiting 25sec my program (xrandr or gnome screen props) resets the
setting and I am back to two screens showing independent images.
Is that a driver issue, a kernel issue, or anything else?
If you need more information, dmesg, X logs, or I should try some
patches, whatever please let me know.
Best wishes
Norbert
Norbert Preiningpreining@{jaist.ac.jp, logic.at, debian.org}
JAIST, Japan TeX Live & Debian Developer
DSA: 0x09C5B094 fp: 14DF 2E6C 0307 BE6D AD76 A9C0 D2BF 4AA3 09C5 B094
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[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #6 from Sergey Kondakov 2011-05-20 14:42:06 --- Created an attachment (id=58732) --> (https://bugzilla.kernel.org/attachment.cgi?id=58732) 2.6.39-overview_small.jpg this is how screen looks like with this glitch since 2.6.38. all is ok on another PC with r300. -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #7 from Sergey Kondakov 2011-05-20 14:43:16 --- Created an attachment (id=58742) --> (https://bugzilla.kernel.org/attachment.cgi?id=58742) 2.6.39-X_small.jpg this is all that X manages to draw with >=2.6.38 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #8 from Sergey Kondakov 2011-05-20 14:48:45 --- Created an attachment (id=58752) --> (https://bugzilla.kernel.org/attachment.cgi?id=58752) 2.6.39-close-up_small.jpg close-up on radeondrmfb area where stuff is drawable at all (it always like that when TV is connected via S-video=>Composite cabling) -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #9 from Sergey Kondakov 2011-05-20 14:51:08 --- Created an attachment (id=58762) --> (https://bugzilla.kernel.org/attachment.cgi?id=58762) Xorg.0.log_2.6.37 X log with normal kernel -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 35472] [r600] radeondrmfb rendering is broken and running X makes GPU lock-up on RV770 CE (Radeon HD 4730)
https://bugzilla.kernel.org/show_bug.cgi?id=35472 --- Comment #10 from Sergey Kondakov 2011-05-20 14:53:25 --- Created an attachment (id=58782) --> (https://bugzilla.kernel.org/attachment.cgi?id=58782) Xorg.0.log_2.6.39 X log with bad kernel -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 1/2] drm/radeon/kms: properly set num banks for fusion asics
Needed by userspace for 2D tiled buffer alignment Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen.c |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 296e6ec..7c37638 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1936,8 +1936,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev) rdev->config.evergreen.tile_config |= (3 << 0); break; } - rdev->config.evergreen.tile_config |= - ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; + /* num banks is 8 on all fusion asics */ + if (rdev->flags & RADEON_IS_IGP) + rdev->config.evergreen.tile_config |= 8 << 4; + else + rdev->config.evergreen.tile_config |= + ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; rdev->config.evergreen.tile_config |= ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; rdev->config.evergreen.tile_config |= -- 1.7.1.1
[PATCH 2/2] drm/radeon/kms: bump kms version number
- proper bank size for fusion for 2D tiling. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_drv.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 63d2de8..1d33060 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -50,9 +50,10 @@ * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query + * 2.10.0 - fusion 2D tiling */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 9 +#define KMS_DRIVER_MINOR 10 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); -- 1.7.1.1
[PATCH] drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only
For DP/eDP, always use the standard DP SS indices.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 42 +--
1 files changed, 12 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index dab06fb..bbd6c59 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -940,42 +940,24 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
case ATOM_ENCODER_MODE_DP:
/* DP/eDP */
dp_clock = dig_connector->dp_clock / 10;
- if (radeon_encoder->active_device &
(ATOM_DEVICE_LCD_SUPPORT)) {
- if (ASIC_IS_DCE4(rdev)) {
- /* first try ASIC_INTERNAL_SS_ON_DP */
+ if (ASIC_IS_DCE4(rdev))
+ ss_enabled =
+ radeon_atombios_get_asic_ss_info(rdev,
&ss,
+
ASIC_INTERNAL_SS_ON_DP,
+
dp_clock);
+ else {
+ if (dp_clock == 16200) {
ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
ASIC_INTERNAL_SS_ON_DP,
-
dp_clock);
+
radeon_atombios_get_ppll_ss_info(rdev, &ss,
+
ATOM_DP_SS_ID2);
if (!ss_enabled)
ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
dig->lcd_ss_id,
-
dp_clock);
+
radeon_atombios_get_ppll_ss_info(rdev, &ss,
+
ATOM_DP_SS_ID1);
} else
ss_enabled =
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
dig->lcd_ss_id);
- } else {
- if (ASIC_IS_DCE4(rdev))
- ss_enabled =
-
radeon_atombios_get_asic_ss_info(rdev, &ss,
-
ASIC_INTERNAL_SS_ON_DP,
-
dp_clock);
- else {
- if (dp_clock == 16200) {
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID2);
- if (!ss_enabled)
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID1);
- } else
- ss_enabled =
-
radeon_atombios_get_ppll_ss_info(rdev, &ss,
-
ATOM_DP_SS_ID1);
- }
+
ATOM_DP_SS_ID1);
}
break;
case ATOM_ENCODER_MODE_LVDS:
--
1.7.1.1
[PATCH] drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices
If the ss clock is external, the CLK_REF bit needs to be set in the SetPixelClock parameters. This should fix DP failures in the channel equalization loop. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/atombios_crtc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index bbd6c59..48f5ff0 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -815,6 +815,8 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc, args.v3.ucPostDiv = post_div; args.v3.ucPpll = pll_id; args.v3.ucMiscInfo = (pll_id << 2); + if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK)) + args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC; args.v3.ucTransmitterId = encoder_id; args.v3.ucEncoderMode = encoder_mode; break; -- 1.7.1.1
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #46 from Alex Deucher 2011-05-20 09:47:58 PDT --- Please try the new patches I sent out last night. you can find them here: http://people.freedesktop.org/~agd5f/dp_rewrite/ You may have to apply Jesse's bpc patches first (in the bpc firectory) depending on what kernel you are using. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #47 from Alex Deucher 2011-05-20 09:49:43 PDT --- Please don't drag in Mac EFI issues, this bug is about DP link training problems. For Mac's stick to the legacy bios rather than trying to run in EFI mode. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #48 from Alex Deucher 2011-05-20 09:55:24 PDT --- Travis, please try this latest patch set. I was finally able to reproduce a problem similar to yours on a new board I got. The problem was actually with the way the spread spectrum interaction with the PPLL was set up. That should be fixed in this patch set. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[PATCH] drm: i915: correct return status in intel_hdmi_mode_valid()
Signed-off-by: Nicolas Kaiser --- Untested: just looks to me like the intention might be to return MODE_CLOCK_LOW here, is that correct? drivers/gpu/drm/i915/intel_hdmi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f289b86..655bbd9 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -194,7 +194,7 @@ static int intel_hdmi_mode_valid(struct drm_connector *connector, if (mode->clock > 165000) return MODE_CLOCK_HIGH; if (mode->clock < 2) - return MODE_CLOCK_HIGH; + return MODE_CLOCK_LOW; if (mode->flags & DRM_MODE_FLAG_DBLSCAN) return MODE_NO_DBLESCAN; -- 1.7.5.rc3
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #49 from Travis Glenn Hansen 2011-05-20 10:07:39 PDT --- Alex I will try as soon as I get back to the office (early next week). What version should these be applied against or do you have a git repo I should use? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #50 from Alex Deucher 2011-05-20 10:20:03 PDT --- Dave's drm-next or drm-fixes trees should work: http://git.kernel.org/?p=linux/kernel/git/airlied/drm-2.6.git;a=summary if you use drm-fixes, you'll need to apply Jesse's bpc patches (in the bpc directly in by server) first. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #51 from Travis Glenn Hansen 2011-05-20 10:34:10 PDT --- I'll just simply use drm-next then when I test. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
https://bugs.freedesktop.org/show_bug.cgi?id=27314 --- Comment #52 from Alex Deucher 2011-05-20 10:44:25 PDT --- Looks like Dave pushed a new drm-radeon-testing, so you can use that and then you'll only need to apply patches 0019 and 0020. http://git.kernel.org/?p=linux/kernel/git/airlied/drm-2.6.git;a=shortlog;h=refs/heads/drm-radeon-testing -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 37417] New: No Alpha Channel for all XPixmaps with KWin+GLES
https://bugs.freedesktop.org/show_bug.cgi?id=37417 Summary: No Alpha Channel for all XPixmaps with KWin+GLES Product: Mesa Version: 7.10 Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r600 AssignedTo: dri-devel at lists.freedesktop.org ReportedBy: mgraesslin at kde.org Created an attachment (id=46961) --> (https://bugs.freedesktop.org/attachment.cgi?id=46961) ARGB window without alpha channel After updating mesa on Debian Testing to package version 7.10.2-2 everything mapped from a XPixmap lost the Alpha Channel. ARGB windows are no longer translucent (screenshot attached) as well everything else mapped from an XPixmap. This only affects OpenGL ES/EGL build of KWin, building against desktop GL/GLX does not show the symptoms. Debug output of KWin with GLES: OpenGL vendor string: X.Org OpenGL renderer string: Gallium 0.4 on AMD RV710 OpenGL version string: OpenGL ES 2.0 Mesa 7.10.2 OpenGL shading language version string: OpenGL ES GLSL ES 1.0.16 Driver: R600G GPU class: R700 OpenGL version: 2.0 GLSL version: 1.0.16 Mesa version: 7.10.2 X server version: 1.10.1 Linux kernel version: 2.6.38 Direct rendering: yes Requires strict binding:yes GLSL shaders: yes Texture NPOT support: yes Debug output of KWin with GLX: OpenGL vendor string: Advanced Micro Devices, Inc. OpenGL renderer string: Mesa DRI R600 (RV710 954F) 20090101 TCL DRI2 OpenGL version string: 2.1 Mesa 7.10.2 OpenGL shading language version string: 1.20 Driver: R600C GPU class: R700 OpenGL version: 2.1 GLSL version: 1.20 Mesa version: 7.10.2 X server version: 1.10.1 Linux kernel version: 2.6.38 Direct rendering: yes Requires strict binding:no GLSL shaders: yes Texture NPOT support: yes This worked fine until update of the package. KWin has not changed (recent master, build from today). If you need any help to investigate, please ask. We want to push the GLES build of KWin with our upcoming release (beta 1 next week). -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
[Bug 28876] [radeon HD4250] Frequent lockups while screen locked
https://bugs.freedesktop.org/show_bug.cgi?id=28876 Yann Dirson changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED --- Comment #4 from Yann Dirson 2011-05-20 13:09:04 PDT --- This has not occured since quite some time now, fixed. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug.
Major 2.6.38 regression ignored?
On Friday, May 20, 2011, Ray Lee wrote: > [ Adding Chris Wilson (author of the problematic patch) and Rafael Wysocki > to the message ] It is on the list of known regressions from 2.6.37, but we're not tracking them any more now that 2.6.39 is out. Thanks, Rafael > On Fri, May 20, 2011 at 10:06 AM, Luke-Jr wrote: > > > I submitted https://bugzilla.kernel.org/show_bug.cgi?id=33662 a month ago > > against 2.6.38. Now 2.6.39 was just released without the regression being > > addressed. This bug makes the system unusable... Some guys on IRC suggested > > I > > email, so here it is. > > > > See the bugzilla entry for the bisection history. > > ~r. >
[Bug 34772] [radeon] [R300] GPU lockups with when KMS is enabled
https://bugzilla.kernel.org/show_bug.cgi?id=34772 --- Comment #8 from Andreas Schwab 2011-05-20 20:58:03 --- radeon.dynclks=1 causes the wrong resolution to be selected. It thinks something is conncted to the S-video port with a max resolution of 800x600, so it selects this instead of the native resolution (1024x768). -<6>Console: switching to colour frame buffer device 128x48 +<6>[drm] crtc 1 is connected to a TV +<6>Console: switching to colour frame buffer device 100x37 +(II) RADEON(0): Printing probed modes for output S-video +(II) RADEON(0): Modeline "800x600"x59.9 38.25 800 832 912 1024 600 603 607 624 -hsync +vsync (37.4 kHz) +(II) RADEON(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) +(II) RADEON(0): Modeline "320x240"x60.1 12.59 320 328 376 400 240 245 246 262 doublescan -hsync -vsync (31.5 kHz) (II) RADEON(0): Output LVDS connected (II) RADEON(0): Output VGA-0 disconnected -(II) RADEON(0): Output S-video disconnected +(II) RADEON(0): Output S-video connected (II) RADEON(0): Using exact sizes for initial modes -(II) RADEON(0): Output LVDS using initial mode 1024x768 +(II) RADEON(0): Output LVDS using initial mode 800x600 +(II) RADEON(0): Output S-video using initial mode 800x600 -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the assignee of the bug. -- What Every C/C++ and Fortran developer Should Know! Read this article and learn how Intel has extended the reach of its next-generation tools to help Windows* and Linux* C/C++ and Fortran developers boost performance applications - including clusters. http://p.sf.net/sfu/intel-dev2devmay -- ___ Dri-devel mailing list Dri-devel at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[RFC] Standardize YUV support in the fbdev API
Hi Laurent,
On 05/17/2011 10:07 PM, Laurent Pinchart wrote:
> Hi everybody,
>
> I need to implement support for a YUV frame buffer in an fbdev driver. As the
> fbdev API doesn't support this out of the box, I've spent a couple of days
> reading fbdev (and KMS) code and thinking about how we could cleanly add YUV
> support to the API. I'd like to share my findings and thoughts, and hopefully
> receive some comments back.
Thanks. I think you did already a good job, hope we can get it done this time.
> Given the overlap between the KMS, V4L2 and fbdev APIs, the need to share data
> and buffers between those subsystems, and the planned use of V4L2 FCCs in the
> KMS overlay API, I believe using V4L2 FCCs to identify fbdev formats would be
> a wise decision.
I agree.
> To select a frame buffer YUV format, the fb_var_screeninfo structure will need
> to be extended with a format field. The fbdev API and ABI must not be broken,
> which prevents us from changing the current structure layout and replacing the
> existing format selection mechanism (through the red, green, blue and alpha
> bitfields) completely.
I agree.
> - Other solutions are possible, such as adding new ioctls. Those solutions are
> more intrusive, and require larger changes to both userspace and kernelspace
> code.
I'm against (ab)using the nonstd field (probably the only sane thing we can do
with it is declare it non-standard which interpretation is completely dependent
on the specific driver) or requiring previously unused fields to have a special
value so I'd like to suggest a different method:
I remembered an earlier discussion:
[ http://marc.info/?l=linux-fbdev&m=129896686208130&w=2 ]
On 03/01/2011 08:07 AM, Geert Uytterhoeven wrote:
> On Tue, Mar 1, 2011 at 04:13, Damian wrote:
>> On 2011/02/24 15:05, Geert Uytterhoeven wrote:
>>> For YUV (do you mean YCbCr?), I'm inclined to suggest adding a new
>>> FB_VISUAL_*
>>> type instead, which indicates the fb_var_screeninfo.{red,green,blue}
>>> fields are
>>> YCbCr instead of RGB.
>>> Depending on the frame buffer organization, you also need new
>>> FB_TYPE_*/FB_AUX_*
>>> types.
>>
>> I just wanted to clarify here. Is your comment about these new flags in
>> specific reference to this patch or to Magnus' "going forward" comment? It
>
> About new flags.
>
>> seems like the beginnings of a method to standardize YCbCr support in fbdev
>> across all platforms.
>> Also, do I understand correctly that FB_VISUAL_ would specify the colorspace
>
> FB_VISUAL_* specifies how pixel values (which may be tuples) are mapped to
> colors on the screen, so to me it looks like the sensible way to set up
> YCbCr.
>
>> (RGB, YCbCr), FB_TYPE_* would be a format specifier (i.e. planar,
>> semiplanar, interleaved, etc)? I'm not really sure what you are referring
>> to with the FB_AUX_* however.
>
> Yep, FB_TYPE_* specifies how pixel values/tuples are laid out in frame buffer
> memory.
>
> FB_AUX_* is only used if a specific value of FB_TYPE_* needs an additional
> parameter (e.g. the interleave value for interleaved bitplanes).
Adding new standard values for these fb_fix_screeninfo fields would solve the
issue for framebuffers which only support a single format. If you have the need
to switch I guess it would be a good idea to add a new flag to the vmode
bitfield in fb_var_screeninfo which looks like a general purpose modifier for
the videomode. You could than reuse any RGB-specific field you like to pass
more
information.
Maybe we should also use this chance to declare one of the fix_screeninfo
reserved fields to be used for capability flags or an API version as we can
assume that those are 0 (at least in sane drivers).
Good luck,
Florian Tobias Schandinat
