[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #5 from Chris Rankin  2010-06-29 11:38:15 
PDT ---
(In reply to comment #4)
> I have committed some fixes, can you please test latest mesa git?

Backtrace:
=>0 0x (0x0039e9d0)
  1 0x7dd5b61d radeon_drm_bufmgr_set_tiling+0xbc() in r300_dri.so (0x0039e9d0)
  2 0x7dd6c1f2 r300_flush_cb+0x21(data=0x7d0fcce8)
[/home/chris/Programs/mesa/src/gallium/drivers/r300/r300_context.c:128] in
r300_dri.so (0x0039ea00)
  3 0x7dd5b61d radeon_drm_bufmgr_set_tiling+0xbc() in r300_dri.so (0x0039ea00)
  4 0x7d0fcce8 (0x0039ea20)
  5 0x7dd7652e r300_set_framebuffer_state+0x16d(pipe=0x7bacf7f8, state=(nil))
[/home/chris/Programs/mesa/src/gallium/drivers/r300/r300_state.c:625] in
r300_dri.so (0x0039ea20)
...

Nope, exactly the same crash as before.

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #6 from Chris Rankin  2010-06-29 12:05:36 
PDT ---
(In reply to comment #4)
> I believe the "data" pointer is not valid.

Or possibly the context.flush field has not been assigned? I am having curious
success with this simple patch:

--- a/src/gallium/drivers/r300/r300_context.c
+++ b/src/gallium/drivers/r300/r300_context.c
@@ -125,7 +125,9 @@ static void r300_flush_cb(void *data)
 {
 struct r300_context* const cs_context_copy = data;

-cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
+if (cs_context_copy->context.flush) {
+cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
+}
 }

 #define R300_INIT_ATOM(atomname, atomsize) \

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #7 from Chris Rankin  2010-06-29 13:37:28 
PDT ---
(In reply to comment #4)
> I believe the "data" pointer is not valid.

That data pointer looks like it *used* to belong to a r300_context object that
has since been destroyed. Basically, r300_create_context() stores a reference
to the newly-created r300_context object inside the radeon_libdrm_winsys
struct:

rws->set_flush_cb(r300->rws, r300_flush_cb, r300);

Warcraft then destroys the context again, but this reference inside the winsys
lingers somehow. And then Azeroth explodes when radeon_drm_bufmgr_set_tiling()
tries to flush the buffer data.

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[PATCH] drm/radeon/kms: add some missing regs to evergreen gpu init

2010-06-29 Thread Alex Deucher
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen.c  |   23 +++
 drivers/gpu/drm/radeon/evergreend.h |3 +++
 2 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c 
b/drivers/gpu/drm/radeon/evergreen.c
index 38c500e..e39d405 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1260,6 +1260,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
WREG32(VGT_GS_VERTEX_REUSE, 16);
WREG32(PA_SC_LINE_STIPPLE_STATE, 0);
 
+   WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14);
+   WREG32(VGT_OUT_DEALLOC_CNTL, 16);
+
WREG32(CB_PERF_CTR0_SEL_0, 0);
WREG32(CB_PERF_CTR0_SEL_1, 0);
WREG32(CB_PERF_CTR1_SEL_0, 0);
@@ -1269,6 +1272,26 @@ static void evergreen_gpu_init(struct radeon_device 
*rdev)
WREG32(CB_PERF_CTR3_SEL_0, 0);
WREG32(CB_PERF_CTR3_SEL_1, 0);
 
+   /* clear render buffer base addresses */
+   WREG32(CB_COLOR0_BASE, 0);
+   WREG32(CB_COLOR1_BASE, 0);
+   WREG32(CB_COLOR2_BASE, 0);
+   WREG32(CB_COLOR3_BASE, 0);
+   WREG32(CB_COLOR4_BASE, 0);
+   WREG32(CB_COLOR5_BASE, 0);
+   WREG32(CB_COLOR6_BASE, 0);
+   WREG32(CB_COLOR7_BASE, 0);
+   WREG32(CB_COLOR8_BASE, 0);
+   WREG32(CB_COLOR9_BASE, 0);
+   WREG32(CB_COLOR10_BASE, 0);
+   WREG32(CB_COLOR11_BASE, 0);
+
+   /* set the shader const cache sizes to 0 */
+   for (i = SQ_ALU_CONST_BUFFER_SIZE_PS_0; i < 0x28200; i += 4)
+   WREG32(i, 0);
+   for (i = SQ_ALU_CONST_BUFFER_SIZE_HS_0; i < 0x29000; i += 4)
+   WREG32(i, 0);
+
hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL);
WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);
 
diff --git a/drivers/gpu/drm/radeon/evergreend.h 
b/drivers/gpu/drm/radeon/evergreend.h
index 79683f6..a1cd621 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -713,6 +713,9 @@
 #define SQ_GSVS_RING_OFFSET_2  0x28930
 #define SQ_GSVS_RING_OFFSET_3  0x28934
 
+#define SQ_ALU_CONST_BUFFER_SIZE_PS_0  0x28140
+#define SQ_ALU_CONST_BUFFER_SIZE_HS_0  0x28f80
+
 #define SQ_ALU_CONST_CACHE_PS_00x28940
 #define SQ_ALU_CONST_CACHE_PS_10x28944
 #define SQ_ALU_CONST_CACHE_PS_20x28948
-- 
1.7.0.1

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #8 from Marek Olšák  2010-06-29 14:14:20 PDT ---
I think you are right. That seems to be the only logical explanation. The fix
is not trivial, I'll send you a patch when I have one.

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #9 from Marek Olšák  2010-06-29 15:27:09 PDT ---
OK so I've committed some fixes because they don't break anything. Please let
me know if they help.

PS: There is a new bug in the GLSL compiler in master. I hope you won't hit
that.

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[Bug 28774] RS780: No picture over HDMI

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28774

--- Comment #12 from Alex Deucher  2010-06-29 15:36:33 PDT ---
Created an attachment (id=36615)
 View: https://bugs.freedesktop.org/attachment.cgi?id=36615
 Review: https://bugs.freedesktop.org/review?bug=28774&attachment=36615

nb_misc pcie regs are only accessible via io ports

Does the attached patch help?

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[Bug 28627] 2.6.31.6 is the last kernel where KMS works well on an RV515 card for regular PCI

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28627

--- Comment #15 from Connor Behan  2010-06-29 16:48:19 
PDT ---
That's a good idea, if a lengthy one.

Is there a way to see a sequential list of commits in one of the "main"
branches? And is there a way to compile only the radeon module if I'm moving
from one kernel to a very similar one?

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[Bug 28627] 2.6.31.6 is the last kernel where KMS works well on an RV515 card for regular PCI

2010-06-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=28627

--- Comment #16 from Alex Deucher  2010-06-29 16:53:45 PDT ---
You can browse commits in via the git web interface:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git
You can also narrow the bisect range by just bisecting drm commits, e.g.,
git bisect start -- drivers/gpu/drm
Although this won't help if the problematic commit is not drm related.

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[PATCH] drm/radeon: add quirk to make HP nx6125 laptop resume.

2010-06-29 Thread Dave Airlie
From: Dave Airlie 

For some reason on resume, executing the BIOS scripts locks up the whole 
chipset, by avoiding the dynclk table the machine resumes properly and seems to 
function okay.

Signed-off-by: Dave Airlie 
---
 drivers/gpu/drm/radeon/radeon_combios.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_combios.c 
b/drivers/gpu/drm/radeon/radeon_combios.c
index 08e156a..392bc4d 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -3051,6 +3051,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
combios_write_ram_size(dev);
}
 
+   /* quirk for rs4xx HP nx6125 laptop to make it resume
+* - it hangs on resume inside the dynclk 1 table.
+*/
+   if (rdev->family == CHIP_RS480 &&
+   rdev->pdev->subsystem_vendor == 0x103c &&
+   rdev->pdev->subsystem_device == 0x308b)
+   return;
+
/* DYN CLK 1 */
table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
if (table)
-- 
1.7.1

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ttm use pages don't need to populate?

2010-06-29 Thread Yuan, Shengquan
ttm_tt_set_user has "ttm->state = tt_unbound" which will cause the
following ttm_tt_populate return directly because of bellow check:
if (ttm->state != tt_unpopulated)
return 0;

Does it mean we don't need to populate user pages?  Here is the patch
if it is not the case

Thanks
Austin



[PATCH] TTM: fix the issue that user buffers are not

2010-06-29 Thread Austin Yuan
populuated due to the wrong state

Signed-off-by: Austin Yuan 
Signed-off-by: Elaine Wang 
---
 drivers/gpu/drm/ttm/ttm_tt.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index a7bab87..4ea44c2 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -367,7 +367,7 @@ int ttm_tt_set_user(struct ttm_tt *ttm,

ttm->tsk = tsk;
ttm->start = start;
-   ttm->state = tt_unbound;
+   ttm->state = tt_unpopulated;

return 0;
 }
--
1.6.0.4


[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #5 from Chris Rankin  2010-06-29 
11:38:15 PDT ---
(In reply to comment #4)
> I have committed some fixes, can you please test latest mesa git?

Backtrace:
=>0 0x (0x0039e9d0)
  1 0x7dd5b61d radeon_drm_bufmgr_set_tiling+0xbc() in r300_dri.so (0x0039e9d0)
  2 0x7dd6c1f2 r300_flush_cb+0x21(data=0x7d0fcce8)
[/home/chris/Programs/mesa/src/gallium/drivers/r300/r300_context.c:128] in
r300_dri.so (0x0039ea00)
  3 0x7dd5b61d radeon_drm_bufmgr_set_tiling+0xbc() in r300_dri.so (0x0039ea00)
  4 0x7d0fcce8 (0x0039ea20)
  5 0x7dd7652e r300_set_framebuffer_state+0x16d(pipe=0x7bacf7f8, state=(nil))
[/home/chris/Programs/mesa/src/gallium/drivers/r300/r300_state.c:625] in
r300_dri.so (0x0039ea20)
...

Nope, exactly the same crash as before.

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #6 from Chris Rankin  2010-06-29 
12:05:36 PDT ---
(In reply to comment #4)
> I believe the "data" pointer is not valid.

Or possibly the context.flush field has not been assigned? I am having curious
success with this simple patch:

--- a/src/gallium/drivers/r300/r300_context.c
+++ b/src/gallium/drivers/r300/r300_context.c
@@ -125,7 +125,9 @@ static void r300_flush_cb(void *data)
 {
 struct r300_context* const cs_context_copy = data;

-cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
+if (cs_context_copy->context.flush) {
+cs_context_copy->context.flush(&cs_context_copy->context, 0, NULL);
+}
 }

 #define R300_INIT_ATOM(atomname, atomsize) \

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #7 from Chris Rankin  2010-06-29 
13:37:28 PDT ---
(In reply to comment #4)
> I believe the "data" pointer is not valid.

That data pointer looks like it *used* to belong to a r300_context object that
has since been destroyed. Basically, r300_create_context() stores a reference
to the newly-created r300_context object inside the radeon_libdrm_winsys
struct:

rws->set_flush_cb(r300->rws, r300_flush_cb, r300);

Warcraft then destroys the context again, but this reference inside the winsys
lingers somehow. And then Azeroth explodes when radeon_drm_bufmgr_set_tiling()
tries to flush the buffer data.

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[PATCH] drm/radeon/kms: add some missing regs to evergreen gpu init

2010-06-29 Thread Alex Deucher
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/radeon/evergreen.c  |   23 +++
 drivers/gpu/drm/radeon/evergreend.h |3 +++
 2 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c 
b/drivers/gpu/drm/radeon/evergreen.c
index 38c500e..e39d405 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1260,6 +1260,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
WREG32(VGT_GS_VERTEX_REUSE, 16);
WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

+   WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14);
+   WREG32(VGT_OUT_DEALLOC_CNTL, 16);
+
WREG32(CB_PERF_CTR0_SEL_0, 0);
WREG32(CB_PERF_CTR0_SEL_1, 0);
WREG32(CB_PERF_CTR1_SEL_0, 0);
@@ -1269,6 +1272,26 @@ static void evergreen_gpu_init(struct radeon_device 
*rdev)
WREG32(CB_PERF_CTR3_SEL_0, 0);
WREG32(CB_PERF_CTR3_SEL_1, 0);

+   /* clear render buffer base addresses */
+   WREG32(CB_COLOR0_BASE, 0);
+   WREG32(CB_COLOR1_BASE, 0);
+   WREG32(CB_COLOR2_BASE, 0);
+   WREG32(CB_COLOR3_BASE, 0);
+   WREG32(CB_COLOR4_BASE, 0);
+   WREG32(CB_COLOR5_BASE, 0);
+   WREG32(CB_COLOR6_BASE, 0);
+   WREG32(CB_COLOR7_BASE, 0);
+   WREG32(CB_COLOR8_BASE, 0);
+   WREG32(CB_COLOR9_BASE, 0);
+   WREG32(CB_COLOR10_BASE, 0);
+   WREG32(CB_COLOR11_BASE, 0);
+
+   /* set the shader const cache sizes to 0 */
+   for (i = SQ_ALU_CONST_BUFFER_SIZE_PS_0; i < 0x28200; i += 4)
+   WREG32(i, 0);
+   for (i = SQ_ALU_CONST_BUFFER_SIZE_HS_0; i < 0x29000; i += 4)
+   WREG32(i, 0);
+
hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL);
WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

diff --git a/drivers/gpu/drm/radeon/evergreend.h 
b/drivers/gpu/drm/radeon/evergreend.h
index 79683f6..a1cd621 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -713,6 +713,9 @@
 #define SQ_GSVS_RING_OFFSET_2  0x28930
 #define SQ_GSVS_RING_OFFSET_3  0x28934

+#define SQ_ALU_CONST_BUFFER_SIZE_PS_0  0x28140
+#define SQ_ALU_CONST_BUFFER_SIZE_HS_0  0x28f80
+
 #define SQ_ALU_CONST_CACHE_PS_00x28940
 #define SQ_ALU_CONST_CACHE_PS_10x28944
 #define SQ_ALU_CONST_CACHE_PS_20x28948
-- 
1.7.0.1



[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #8 from Marek Ol??k  2010-06-29 14:14:20 PDT 
---
I think you are right. That seems to be the only logical explanation. The fix
is not trivial, I'll send you a patch when I have one.

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[Bug 28630] [r300g] tiling / texture transfer crash in World of Warcraft

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28630

--- Comment #9 from Marek Ol??k  2010-06-29 15:27:09 PDT 
---
OK so I've committed some fixes because they don't break anything. Please let
me know if they help.

PS: There is a new bug in the GLSL compiler in master. I hope you won't hit
that.

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[Bug 28774] RS780: No picture over HDMI

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28774

--- Comment #12 from Alex Deucher  2010-06-29 15:36:33 PDT 
---
Created an attachment (id=36615)
 View: https://bugs.freedesktop.org/attachment.cgi?id=36615
 Review: https://bugs.freedesktop.org/review?bug=28774&attachment=36615

nb_misc pcie regs are only accessible via io ports

Does the attached patch help?

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[Bug 28627] 2.6.31.6 is the last kernel where KMS works well on an RV515 card for regular PCI

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28627

--- Comment #15 from Connor Behan  2010-06-29 
16:48:19 PDT ---
That's a good idea, if a lengthy one.

Is there a way to see a sequential list of commits in one of the "main"
branches? And is there a way to compile only the radeon module if I'm moving
from one kernel to a very similar one?

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[Bug 28627] 2.6.31.6 is the last kernel where KMS works well on an RV515 card for regular PCI

2010-06-29 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=28627

--- Comment #16 from Alex Deucher  2010-06-29 16:53:45 PDT 
---
You can browse commits in via the git web interface:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git
You can also narrow the bisect range by just bisecting drm commits, e.g.,
git bisect start -- drivers/gpu/drm
Although this won't help if the problematic commit is not drm related.

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