Re: [edk2-devel] [PATCH] ArmVirtPkg: Allow EFI memory attributes protocol to be disabled
W dniu 4.12.2023 o 13:58, Ard Biesheuvel pisze: On Mon, 4 Dec 2023 at 13:38, Alexander Graf wrote: On 04.12.23 13:20, Gerd Hoffmann wrote: I don't think it helps to go off on a tangent about why shim exists and why it is so terrible, as I don't think there is actually any disagreement about that. But now that we are, let me add my 2c as well :-) For the patch under discussion here, I think that Gerd's suggestion is to have both a PCD and a QEMU variable, and use the PCD unless the variable has a value. I'm on the fence here: I would like to accommodate users, but adding another control that the distros are just going to set and forget is just going to make the mess bigger. What is even worse: arm64 system firmware will have to deal with this as well, and disable the protocol in order to run distro installers. And once the tightened MS requirements for NX compat come into effect, they will have to add another workaround for this as well, and so we'll probably end up with generations of arm64 hardware with a 'enable memory attributes protocol' option in their BIOS menus. And guess what the default setting is likely to be? I am quite disappointed with the complete lack of involvement from the folks who develop and deploy shim, and instead, third parties (and users) are the ones chasing me and people like Gerd (who work on QEMU or EDK2 rather than shim) to clean up the mess. I use 'sbsa-ref' with QEMU and upstream EDK2. And cannot use either RHEL 9.3 nor CentOS Stream 9 installers because they hang. And this is not the only platform where upstream EDK2 is used. Sure, I can hack something, use Grub from Debian or Fedora and get things working but that's not solution. Adding flags in 'Broken OS support' section of EDK2 settings feels like bad idea. Especially when EFI app generating issues is developed by company known for FOSS work. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112073): https://edk2.groups.io/g/devel/message/112073 Mute This Topic: https://groups.io/mt/102967690/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms 0/1] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. If TF-A answer to SMC call would be not success then we assume that it is old version and go back to parsing DeviceTree data directly. Just now it is present in one place together with new code for handling SMC stuff. TF-A part: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 Marcin Juszkiewicz (1): SbsaQemu: get cpu information from TF-A Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 +- .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemuPlatformDxe.inf | 4 +- .../Library/FdtHelperLib/FdtHelperLib.inf | 33 --- .../Library/SbsaQemuSmc/SbsaQemuSmc.inf | 34 +++ .../Include/IndustryStandard/SbsaQemuSmc.h| 2 + .../SbsaQemu/Include/Library/FdtHelperLib.h | 36 .../SbsaQemu/Include/Library/SbsaQemuSmc.h| 45 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 16 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +- .../Library/FdtHelperLib/FdtHelperLib.c | 98 - .../Library/SbsaQemuSmc/SbsaQemuSmc.c | 204 ++ 14 files changed, 308 insertions(+), 197 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuSmc/SbsaQemuSmc.inf delete mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuSmc.h delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuSmc/SbsaQemuSmc.c -- 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113823): https://edk2.groups.io/g/devel/message/113823 Mute This Topic: https://groups.io/mt/103740602/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms 1/1] SbsaQemu: get cpu information from TF-A
As part of removing DeviceTree use we moved cpu related parts to TF-A. On EDK2 side we get values via SMC calls during platform initialization. Handled are: - get cpu cores count - get MPIDR - get NUMA node id If too old TF-A is used then cpu count and MPIDR are read directly from DeviceTree. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 +- .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemuPlatformDxe.inf | 4 +- .../Library/FdtHelperLib/FdtHelperLib.inf | 33 --- .../Library/SbsaQemuSmc/SbsaQemuSmc.inf | 34 +++ .../Include/IndustryStandard/SbsaQemuSmc.h| 2 + .../SbsaQemu/Include/Library/FdtHelperLib.h | 36 .../SbsaQemu/Include/Library/SbsaQemuSmc.h| 45 .../Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 16 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +- .../Library/FdtHelperLib/FdtHelperLib.c | 98 - .../Library/SbsaQemuSmc/SbsaQemuSmc.c | 204 ++ 14 files changed, 308 insertions(+), 197 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuSmc/SbsaQemuSmc.inf delete mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h create mode 100644 Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuSmc.h delete mode 100644 Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c create mode 100644 Silicon/Qemu/SbsaQemu/Library/SbsaQemuSmc/SbsaQemuSmc.c diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..231db11cb07b 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2023, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -126,7 +126,7 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf + SbsaQemuSmc|Silicon/Qemu/SbsaQemu/Library/SbsaQemuSmc/SbsaQemuSmc.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf # Debug Support diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf index a34f54d431d4..8e2bf8c512f1 100644 --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf @@ -3,7 +3,7 @@ # #Copyright (c) 2021, NUVIA Inc. All rights reserved. #Copyright (c) 2018, Hisilicon Limited. All rights reserved. -#Copyright (c) 2018, Linaro Limited. All rights reserved. +#Copyright (c) 2023, Linaro Ltd. All rights reserved. # #SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -29,8 +29,6 @@ [Packages] [LibraryClasses] BaseMemoryLib - FdtLib - FdtHelperLib IoLib PcdLib @@ -40,7 +38,6 @@ [Guids] [Pcd] gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease gArmTokenSpaceGuid.PcdSystemBiosRelease - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber @@ -56,3 +53,4 @@ [Pcd] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..d23b53586cd3 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuSmc UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 19534b7a274a..c8203a6ffc47 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu
Re: [edk2-devel] [PATCH edk2-platforms 1/1] SbsaQemu: get cpu information from TF-A
W dniu 15.01.2024 o 19:02, Leif Lindholm pisze: As part of removing DeviceTree use we moved cpu related parts to TF-A. On EDK2 side we get values via SMC calls during platform initialization. Could you split this into three patches?: - Adding new Library (Library name should have a Lib suffix.) - Using this library to check whether SMCs are supported, falling back to FdtHelperLib if not. - Dropping FdtHelperLib and the fallback paths. ? Will do. Thanks for suggestion. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113843): https://edk2.groups.io/g/devel/message/113843 Mute This Topic: https://groups.io/mt/103740603/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 32 +++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 + .../Include/Library/SbsaQemuHardwareInfoLib.h | 45 + .../SbsaQemuHardwareInfoLib.c | 100 5 files changed, 181 insertions(+), 1 deletion(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..8c2def1878e6 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + + [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..e33648ee1462 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -14,5 +14,7 @@ #define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) #define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) #define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index ..45262baf3511 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. + + @retvalMPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve NUMA node id for. + + @retvalNUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c new file mode 100644 index ..4df973fda75e --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c @@ -0,0 +1,100 @@ +/** @file +* +* Copyright (c) 2021, NUVIA Inc. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include
[edk2-devel] [PATCH edk2-platforms v2 0/4] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. If TF-A answer to SMC call would be not success then we assume that it is old version and go back to parsing DeviceTree data directly. Just now it is present in one place (SbsaQemuHardwareInfoLib) together with new code for handling SMC stuff. I hope that we can drop FdtHandler part as part of 202411 release. TF-A part: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 After this change the only place where DT data is parsed directly is checking for memory nodes. Patches for that code will be sent once we get SMC calls into TF-A. Signed-off-by: Marcin Juszkiewicz --- Marcin Juszkiewicz (4): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: read amount of cpus during init Platform/SbsaQemu: use PcdCoreCount directly Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 .../SbsaQemuHardwareInfoLib.inf | 34 .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 .../Include/Library/SbsaQemuHardwareInfoLib.h | 45 + Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 16 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 204 14 files changed, 308 insertions(+), 197 deletions(-) --- base-commit: a1598bbcd167f4a5cf61229156426ef6f0784ab3 change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113873): https://edk2.groups.io/g/devel/message/113873 Mute This Topic: https://groups.io/mt/103758013/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 2/4] Platform/SbsaQemu: read amount of cpus during init
We read it once and store in Pcd for future use. Signed-off-by: Marcin Juszkiewicz --- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +++- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 + 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 19534b7a274a..9752694a432b 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu platform configuration settings # -# Copyright (c) 2019, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -32,6 +32,7 @@ [LibraryClasses] PcdLib DebugLib NonDiscoverableDeviceRegistrationLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint [Pcd] @@ -46,6 +47,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount [Depex] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c index 4ebbe7c93a19..edd72e37f7f1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c @@ -1,7 +1,7 @@ /** @file -* FDT client protocol driver for qemu,mach-virt-ahci DT node +* SbsaQemu Platform Initialization * -* Copyright (c) 2019, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -12,13 +12,12 @@ #include #include #include +#include #include #include #include #include -#include - EFI_STATUS EFIAPI InitializeSbsaQemuPlatformDxe ( @@ -123,5 +122,7 @@ InitializeSbsaQemuPlatformDxe ( } } + SbsaQemuGetCpuCount(); + return EFI_SUCCESS; } -- 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113875): https://edk2.groups.io/g/devel/message/113875 Mute This Topic: https://groups.io/mt/103758015/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 3/4] Platform/SbsaQemu: use PcdCoreCount directly
During platform initialization we read amount of cpu cores and set
PcdCoreCount so there is no need to call FdtHandler.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 --
.../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 12 +++-
3 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..8e2bf8c512f1 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2023, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,8 +29,6 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
IoLib
PcdLib
@@ -40,7 +38,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
@@ -56,3 +53,4 @@ [Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..ab97768b5ddc 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,12 @@
#include
#include
#include
-#include
#include
#include
#include
#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +31,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < PcdGet32 (PcdCoreCount)) {
return TRUE;
}
@@ -76,7 +74,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = PcdGet32 (PcdCoreCount);
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +119,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return PcdGet32 (PcdCoreCount);
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..7ef314ae9f67 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -1,7 +1,7 @@
/** @file
* This file is an ACPI driver for the Qemu SBSA platform.
*
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -255,7 +255,7 @@ AddMadtTable (
// Initialize GIC Redistributor Structure
EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
- // Get CoreCount which was determined eariler after parsing device tree
+ // Get CoreCount which was determined earlier from TF-A
NumCores = PcdGet32 (PcdCoreCount);
// Calculate the new table size based on the number of cores
@@ -291,7 +291,7 @@ AddMadtTable (
New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
// Add new GICC structures for the Cores
- for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
+ for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
@@ -758,12 +758,6 @@ InitializeSbsaQemuAcpiDxe (
{
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL*AcpiTable;
- UINT32 NumCores;
-
- // Parse the device tree and get the number of CPUs
- NumCores = FdtHelperCountCpus ();
- Status = PcdSet32S (PcdCoreCount, NumCores);
- ASSERT_RETURN_ERROR (Status);
// Check if ACPI Table Protocol has been installed
Status = gBS->LocateProtocol (
--
2.43.0
-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 4/4] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib
There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed (used with too old TF-A). Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 --- .../SbsaQemuHardwareInfoLib.inf | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 104 8 files changed, 110 insertions(+), 172 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 07cb3490f4cf..bde61651da2e 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..9bf0a13de5d1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851.. --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION= 1.29 - BASE_NAME = FdtHelperLib - FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE= BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf index 8c2def1878e6..5358dd339eb3 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -27,6 +27,8 @@ [LibraryClasses] ArmSmcLib BaseMemoryLib DebugLib + FdtLib [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215.. --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. - - @retvalMPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number -of CPUs present in it. - -@return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu
[edk2-devel] [PATCH edk2-platforms 1/1] Platform/SbsaQemu: update doc a bit
We emulate XHCI controller already. No need to add it. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/Readme.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/Readme.md b/Platform/Qemu/SbsaQemu/Readme.md index 3355adebd4c6..883535dfd20e 100644 --- a/Platform/Qemu/SbsaQemu/Readme.md +++ b/Platform/Qemu/SbsaQemu/Readme.md @@ -113,9 +113,9 @@ Create a directory $WORKSPACE that would hold source code of the components. ``` $INSTALL_PATH/qemu-system-aarch64 -m 1024 -M sbsa-ref -pflash SBSA_FLASH0.fd -pflash SBSA_FLASH1.fd -serial stdio ``` - You can add XHCI controller with keyboard and mouse by: + You can keyboard and mouse by: ``` - -device qemu-xhci -device usb-mouse -device usb-kbd + -device usb-mouse -device usb-kbd ``` You can add the hard drive to platform AHCI controller by `hda` parameter: ``` -- 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113923): https://edk2.groups.io/g/devel/message/113923 Mute This Topic: https://groups.io/mt/103768126/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v2 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
W dniu 19.01.2024 o 20:18, Leif Lindholm pisze:
On Tue, Jan 16, 2024 at 08:48:32 +0100, Marcin Juszkiewicz wrote:
This library provides functions to check for hardware information.
For now it covers CPU ones:
- amount of cpu cores
- MPIDR value for cpu core
- NUMA node id for cpu core
Values are read from TF-A using platform specific SMC calls.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +-
.../SbsaQemuHardwareInfoLib.inf | 32 +++
.../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 +
.../Include/Library/SbsaQemuHardwareInfoLib.h | 45 +
.../SbsaQemuHardwareInfoLib.c | 100
5 files changed, 181 insertions(+), 1 deletion(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
new file mode 100644
index ..4df973fda75e
--- /dev/null
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -0,0 +1,100 @@
+/** @file
+*
+* Copyright (c) 2021, NUVIA Inc. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ Get CPU count from information passed by Qemu.
+
+**/
+VOID
+SbsaQemuGetCpuCount (
+ VOID
+ )
+{
+ UINTN Arg0;
+ UINTN SmcResult;
+ RETURN_STATUS Result;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_COUNT, &Arg0, NULL, NULL);
+ if (SmcResult != SMC_ARCH_CALL_SUCCESS) {
So, this may sound a little bit bonkers, but SMCCC doesn't define
return codes for SiP functions. And the SMC_ARCH_CALL_SUCCESS macro
denotes an Arm Architectural function.
Could you #define an SMC_SIP_CALL_SUCCESS *as* SMC_ARCH_CALL_SUCCESS
in some platform-specific header and then use that?
Added it in Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
and used.
+DEBUG ((DEBUG_INFO, "Too old TF-A. We have to get cpu info from DT.\n"));
We don't *know* the TF-A is too old. Rather print which call failed
(and that we need to attempt to get the cpu count from DT).
Changed:
DEBUG ((DEBUG_INFO, "SIP_SVC_GET_CPU_COUNT call failed. We have to
get cpu info from DT.\n"));
+Arg0 = FdtHelperCountCpus();
We should probably assert this as != 0? Or is that done in the function?
Added code to stop going if we do not have cpu information. In such case
we will not be back here with wrong info.
+ }
+
+ Result = PcdSet32S (PcdCoreCount, Arg0);
+ ASSERT_RETURN_ERROR (Result);
+
+ Arg0 = PcdGet32 (PcdCoreCount);
Seems redundant to re-set it to the value we know it already holds.
Done
+
+ DEBUG ((DEBUG_INFO, "We have %d cpus.\n", Arg0));
+}
+
+/**
+ Get MPIDR for a given cpu from device tree passed by Qemu.
+
+ @param [in] CpuIdIndex of cpu to retrieve MPIDR value for.
+
+ @retvalMPIDR value of CPU at index
+**/
+UINT64
+SbsaQemuGetMpidr (
+ IN UINTN CpuId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+
+ Arg0 = CpuId;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
+ if (SmcResult != SMC_ARCH_CALL_SUCCESS) {
+DEBUG ((DEBUG_INFO, "Too old TF-A. We have to get cpu info from DT.\n"));
We don't *know* the TF-A is too old. Rather print which call failed
(and that we need to attempt to get the cpu date from DT).
done
+UINT64
+SbsaQemuGetCpuNumaNode (
+ IN UINTN CpuId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+
+ Arg0 = CpuId;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_CPU_NODE, &Arg0, &Arg1, NULL);
It does seem a bit wasteful we're making the same call twice per core,
discarding one of the results.
Could we have an init function that allocates an array and
prepopulates it, with the Get-functions just returning values from the array?
good idea, will look into
+ if (SmcResult != SMC_ARCH_CALL_SUCCESS) {
+/* No fallback to DeviceTree as we did not had that info earlier. */
We don't *know* the TF-A is too old. Rather print which call failed
(and that we need to attempt to get the cpu count from DT).
done
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Re: [edk2-devel] [PATCH edk2-platforms v2 3/4] Platform/SbsaQemu: use PcdCoreCount directly
W dniu 19.01.2024 o 20:20, Leif Lindholm pisze: On Tue, Jan 16, 2024 at 08:48:34 +0100, Marcin Juszkiewicz wrote: During platform initialization we read amount of cpu cores and set PcdCoreCount so there is no need to call FdtHandler. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++ Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 -- .../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 12 +++- 3 files changed, 9 insertions(+), 19 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 9fb17151d7b8..7ef314ae9f67 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -255,7 +255,7 @@ AddMadtTable ( // Initialize GIC Redistributor Structure EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT(); - // Get CoreCount which was determined eariler after parsing device tree + // Get CoreCount which was determined earlier from TF-A Where we got the information from no longer matters, since we've abstracted that away. dropped comment -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114288): https://edk2.groups.io/g/devel/message/114288 Mute This Topic: https://groups.io/mt/103758016/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v3 1/5] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 32 +++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 15 ++- .../Include/Library/SbsaQemuHardwareInfoLib.h| 45 + .../SbsaQemuHardwareInfoLib.c| 98 5 files changed, 189 insertions(+), 4 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..8c2def1878e6 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + + [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..d9faee7fa5b2 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSIONSMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICSMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index ..ca52c6b27093 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. + + @retvalMPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve NUMA node id for. + + @retvalNUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c new file mode 100644 index
[edk2-devel] [PATCH edk2-platforms v3 2/5] Platform/SbsaQemu: read amount of cpus during init
We read it once and store in Pcd for future use. Signed-off-by: Marcin Juszkiewicz --- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +++- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 + 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 19534b7a274a..9752694a432b 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu platform configuration settings # -# Copyright (c) 2019, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -32,6 +32,7 @@ [LibraryClasses] PcdLib DebugLib NonDiscoverableDeviceRegistrationLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint [Pcd] @@ -46,6 +47,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount [Depex] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c index 4ebbe7c93a19..14e1ec7eab29 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c @@ -1,7 +1,7 @@ /** @file -* FDT client protocol driver for qemu,mach-virt-ahci DT node +* SbsaQemu Platform Initialization * -* Copyright (c) 2019, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -12,13 +12,12 @@ #include #include #include +#include #include #include #include #include -#include - EFI_STATUS EFIAPI InitializeSbsaQemuPlatformDxe ( @@ -123,5 +122,7 @@ InitializeSbsaQemuPlatformDxe ( } } + SbsaQemuGetCpuCount (); + return EFI_SUCCESS; } -- 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114296): https://edk2.groups.io/g/devel/message/114296 Mute This Topic: https://groups.io/mt/103931817/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v3 3/5] Platform/SbsaQemu: use PcdCoreCount directly
During platform initialization we read amount of cpu cores and set
PcdCoreCount so there is no need to call FdtHandler.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c| 10 --
.../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 11 ++-
3 files changed, 8 insertions(+), 19 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..8e2bf8c512f1 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2023, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,8 +29,6 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
IoLib
PcdLib
@@ -40,7 +38,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
@@ -56,3 +53,4 @@ [Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..ab97768b5ddc 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,12 @@
#include
#include
#include
-#include
#include
#include
#include
#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +31,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < PcdGet32 (PcdCoreCount)) {
return TRUE;
}
@@ -76,7 +74,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = PcdGet32 (PcdCoreCount);
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +119,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return PcdGet32 (PcdCoreCount);
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..59536ea9575e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -1,7 +1,7 @@
/** @file
* This file is an ACPI driver for the Qemu SBSA platform.
*
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -255,7 +255,6 @@ AddMadtTable (
// Initialize GIC Redistributor Structure
EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
- // Get CoreCount which was determined eariler after parsing device tree
NumCores = PcdGet32 (PcdCoreCount);
// Calculate the new table size based on the number of cores
@@ -291,7 +290,7 @@ AddMadtTable (
New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
// Add new GICC structures for the Cores
- for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
+ for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
@@ -758,12 +757,6 @@ InitializeSbsaQemuAcpiDxe (
{
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL*AcpiTable;
- UINT32 NumCores;
-
- // Parse the device tree and get the number of CPUs
- NumCores = FdtHelperCountCpus ();
- Status = PcdSet32S (PcdCoreCount, NumCores);
- ASSERT_RETURN_ERROR (Status);
// Check if ACPI Table Protocol has been installed
Status = gBS->LocateProtocol (
--
2.43.0
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[edk2-devel] [PATCH edk2-platforms v3 4/5] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib
There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed (used with too old TF-A). Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 --- .../SbsaQemuHardwareInfoLib.inf | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 2 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 104 8 files changed, 109 insertions(+), 171 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 07cb3490f4cf..bde61651da2e 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..9bf0a13de5d1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851.. --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION= 1.29 - BASE_NAME = FdtHelperLib - FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE= BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf index 8c2def1878e6..5358dd339eb3 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -27,6 +27,8 @@ [LibraryClasses] ArmSmcLib BaseMemoryLib DebugLib + FdtLib [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215.. --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. - - @retvalMPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number -of CPUs present in it. - -@return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe
[edk2-devel] [PATCH edk2-platforms v3 5/5] Platform/SbsaQemu: hang if there is no cpu information
In case we do not have cpu information (SMC call fails,
our minimal DT lacks info) we hang.
TODO: shutdown instead
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index 6315cce3fb7f..923997edb2f1 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -95,6 +95,9 @@ FdtHelperCountCpus (
Node = fdt_path_offset (DeviceTreeBase, "/cpus");
if (Node <= 0) {
DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in DeviceTree\n"));
+// as we do not have information about cpu count we panic here
+// TODO: shutdown rather than hang
+CpuDeadLoop();
return 0;
}
--
2.43.0
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[edk2-devel] [PATCH edk2-platforms v3 0/5] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. If TF-A answer to SMC call would be not success then we assume that it is old version and go back to parsing DeviceTree data directly. Just now it is present in one place (SbsaQemuHardwareInfoLib) together with new code for handling SMC stuff. I hope that we can drop FdtHandler part as part of 202411 release. TF-A part: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 After this change the only place where DT data is parsed directly is checking for memory nodes. Patches for that code will be sent once we get SMC calls into TF-A. Signed-off-by: Marcin Juszkiewicz --- Changes in v3: - added SMC_SIP_CALL_SUCCESS - on SMC call fail tell that SMC call failed instead of blaming TF-A - hang when there is no cpu information (TODO: shutdown instead) - Link to v2: https://openfw.io/edk2-devel/20240116-no-dt-for-cpu-v2-0-6cf078d9a...@linaro.org/T/#t --- Marcin Juszkiewicz (5): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: read amount of cpus during init Platform/SbsaQemu: use PcdCoreCount directly Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib Platform/SbsaQemu: hang if there is no cpu information Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 .../SbsaQemuHardwareInfoLib.inf | 34 .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 15 +- .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 .../Include/Library/SbsaQemuHardwareInfoLib.h | 45 + Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 13 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 205 14 files changed, 317 insertions(+), 199 deletions(-) --- base-commit: 82c4c4b038659843adb519d2e94ad83d77332c26 change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114295): https://edk2.groups.io/g/devel/message/114295 Mute This Topic: https://groups.io/mt/103931816/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v2 0/4] Provide XHCI USB controller only for newer hardware
W dniu 17.10.2023 o 13:46, Nhi Pham pisze:
Then looked again at code from
Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c and noticed
UpdateStatusMethodObject() function. Copied some code and it worked.
Could you please check whether we can replace the
UpdateStatusMethodObject() function with the
AcpiAmlObjectUpdateInteger() function provided by AcpiLib?
AcpiAmlObjectUpdateInteger() finds \\_SB.USB0._STA, checks Buffer[0] and
quits because it is AML_METHOD_OP while it only works for AML_NAME_OP.
So I went a way I had in meantime. Added AML variable into DSDT and then
have _STA method return it's value (as I set it to either 0xF or 0x0).
DSDT.asl snippet:
--
// USB XHCI Host Controller
Device (USB0) {
Name (_HID, "PNP0D10") // _HID: Hardware ID
Name (_UID, 0x00)// _UID: Unique ID
Name (_CCA, 0x01)// _CCA: Cache Coherency Attribute
Name (XHCI, 0xF)// will be set using AcpiLib
Method (_STA) {
Return (XHCI)
}
--
And then:
// UpdateStatusMethodObject (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0._STA", 0x0);
AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
With this change code works as expected. Thanks!
Will send v3.
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[edk2-devel] [PATCH edk2-platforms v3 0/4] Provide XHCI USB controller only for newer hardware
Platform version 0.3 introduced XHCI USB controller instead of EHCI one. But we did it in a way that there is no in-EDK2 check for platform version (XHCI is always given). This behaviour works with Linux as it complains about being unable to initialize EHCI and goes on. Free/Net/Open BSD systems hang in such situation. Now we check are we on Platform Version 0.3 at least and then initialize XHCI controller. Otherwise we disable it's node in DSDT table. I checked several ways to handle the situation. SSDT overlay enabling with LocateAndInstallAcpiFromFvConfitional() was first one but this function had only DBG2 and FACP tables. Then looked at trying to detect XHCI from _STA method. But this is sysbus device which is there or not without way to discover it. Next attempt was to have variable in DSDT and to use it in _STA. Too much trouble. Then looked again at code from Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c and noticed UpdateStatusMethodObject() function. Copied some code and it worked. Booting OpenBSD reminded me to update table checksum. Nhi Pham pointed me to AcpiLib/AcpiAmlObjectUpdateInteger() function. So v3 got AML variable (called XHCI) which is set to 0xF (enabled, working) by default or to 0x0 (disabled, ignore) on Platform Version below 0.3 one. This allowed to remove copy of UpdateStatusMethodObject() function. --- Changes in v3: - use AML variable in DSDT Changes in v2: - XHCI initialized only on PlatVer 0.3+ - XHCI disabled in DSDT for older platforms - no SSDT overlays for EHCI/XHCI - no EHCI at all (it does not work anyway) - no Pcd renaming --- Marcin Juszkiewicz (4): SbsaQemu: introduce macro to compare platform version SbsaQemu: add AcpiLib SbsaQemu: initialize XHCI only if it exists SbsaQemu: disable XHCI in DSDT if not present Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++ .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 60 .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 47 --- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +- 6 files changed, 118 insertions(+), 23 deletions(-) --- base-commit: 06f6274d56422084281886fad447ab117fd0e487 change-id: 20231013-ehci-xhci-fix-c529356a7a8f Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109681): https://edk2.groups.io/g/devel/message/109681 Mute This Topic: https://groups.io/mt/102017312/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v3 1/4] SbsaQemu: introduce macro to compare platform version
We want to check "if platver < 0.3" in an easy way. --- .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 1 file changed, 25 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h new file mode 100644 index ..dd2483787002 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h @@ -0,0 +1,25 @@ +/** @file +* +* Copyright (c) Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SBSAQEMUPLATFORM_VERSION_H +#define SBSAQEMUPLATFORM_VERSION_H + +/* + * Compare PlatformVersion + * + */ + +#define PLATFORM_VERSION_LESS_THAN(Major, Minor) ( \ + (\ +( PcdGet32 (PcdPlatformVersionMajor) < Major) || \ +( \ + ( PcdGet32 (PcdPlatformVersionMajor) == Major) && \ + ( PcdGet32 (PcdPlatformVersionMinor) < Minor)\ +) \ + )\ +) +#endif -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109682): https://edk2.groups.io/g/devel/message/109682 Mute This Topic: https://groups.io/mt/102017313/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v3 2/4] SbsaQemu: add AcpiLib
It will be needed for playing with disabling XHCI later. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 36723e21d7b5..1e650350cb63 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -172,6 +172,8 @@ [LibraryClasses.common] ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109683): https://edk2.groups.io/g/devel/message/109683 Mute This Topic: https://groups.io/mt/102017314/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v3 3/4] SbsaQemu: initialize XHCI only if it exists
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 47 +++-
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 36ada4270bbf..76a9cd62d4a4 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
@@ -57,28 +58,6 @@ InitializeSbsaQemuPlatformDxe (
return Status;
}
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
- ASSERT (Size != 0);
-
- DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
- __FUNCTION__, Base, Size));
-
- Status = RegisterNonDiscoverableMmioDevice (
- NonDiscoverableDeviceTypeXhci,
- NonDiscoverableDeviceDmaTypeCoherent,
- NULL,
- NULL,
- 1,
- Base, Size);
-
- if (EFI_ERROR(Status)) {
-DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
-__FUNCTION__, Base, Status));
-return Status;
- }
-
SmcResult = ArmCallSmc0 (SIP_SVC_VERSION, &Arg0, &Arg1, NULL);
if (SmcResult == SMC_ARCH_CALL_SUCCESS) {
Result = PcdSet32S (PcdPlatformVersionMajor, Arg0);
@@ -118,5 +97,29 @@ InitializeSbsaQemuPlatformDxe (
DEBUG ((DEBUG_INFO, "GICI base: 0x%x\n", Arg0));
+ if (! PLATFORM_VERSION_LESS_THAN(0, 3) ) {
+Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ASSERT (Base != NULL);
+Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ASSERT (Size != 0);
+
+DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+__FUNCTION__, Base, Size));
+
+Status = RegisterNonDiscoverableMmioDevice (
+ NonDiscoverableDeviceTypeXhci,
+ NonDiscoverableDeviceDmaTypeCoherent,
+ NULL,
+ NULL,
+ 1,
+ Base, Size);
+
+if (EFI_ERROR(Status)) {
+DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
+__FUNCTION__, Base, Status));
+return Status;
+}
+ }
+
return EFI_SUCCESS;
}
--
2.41.0
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[edk2-devel] [PATCH edk2-platforms v3 4/4] SbsaQemu: disable XHCI in DSDT if not present
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Set DSDT node to be disabled so operating system will not try
to initialize not-existing hardware.
Signed-off-by: Marcin Juszkiewicz
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 60
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +-
3 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 7c7e08e0fd3a..d5ded892d6ea 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -29,6 +29,7 @@ [Packages]
Silicon/Qemu/SbsaQemu/SbsaQemu.dec
[LibraryClasses]
+ AcpiLib
ArmLib
BaseMemoryLib
BaseLib
@@ -50,6 +51,8 @@ [Pcd]
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
[Depex]
gEfiAcpiTableProtocolGuid ## CONSUMES
@@ -59,6 +62,7 @@ [Guids]
[Protocols]
gEfiAcpiTableProtocolGuid ## CONSUMES
+ gEfiAcpiSdtProtocolGuid
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index fd849ca1594b..cf6e534ca3a0 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -682,6 +683,63 @@ AddGtdtTable (
return Status;
}
+EFI_STATUS
+DisableXhciOnOlderPlatVer (
+ VOID
+ )
+{
+ EFI_STATUSStatus;
+ EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTN TableKey;
+ UINTN TableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = EFI_SUCCESS;
+
+ if ( PLATFORM_VERSION_LESS_THAN(0, 3) ) {
+DEBUG ((DEBUG_ERROR, "Platform Version < 0.3 - disabling XHCI\n"));
+Status = gBS->LocateProtocol (
+&gEfiAcpiSdtProtocolGuid,
+NULL,
+(VOID **)&AcpiSdtProtocol
+);
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+}
+
+TableIndex = 0;
+Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+ EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ACPI DSDT table not found!\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
+
+AcpiSdtProtocol->Close (TableHandle);
+AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+ }
+
+ return Status;
+}
+
+
EFI_STATUS
EFIAPI
InitializeSbsaQemuAcpiDxe (
@@ -738,5 +796,7 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
}
+ Status = DisableXhciOnOlderPlatVer();
+
return EFI_SUCCESS;
}
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 543b5782580a..ba3eefc975a5 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -73,8 +73,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_HID, "PNP0D10") // _HID: Hardware ID
Name (_UID, 0x00)// _UID: Unique ID
Name (_CCA, 0x01)// _CCA: Cache Coherency Attribute
+Name (XHCI, 0xF)// will be set using AcpiLib
Method (_STA) {
- Return (0xF)
+ Return (XHCI)
}
Method (_CRS, 0x0, Serialized) {
Name (RBUF, ResourceTemplate() {
--
2.41.0
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Re: [edk2-devel] [PATCH edk2-platforms v3 4/4] SbsaQemu: disable XHCI in DSDT if not present
W dniu 18.10.2023 o 05:28, Nhi Pham pisze:
Hi Marcin,
There is a nitpicking below.
Other than, it looks good to me.
Acked-by: Nhi Pham
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index fd849ca1594b..cf6e534ca3a0 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -682,6 +683,63 @@ AddGtdtTable (
return Status;
}
+EFI_STATUS
+DisableXhciOnOlderPlatVer (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTN TableKey;
+ UINTN TableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = EFI_SUCCESS;
+
+ if ( PLATFORM_VERSION_LESS_THAN(0, 3) ) {
+ DEBUG ((DEBUG_ERROR, "Platform Version < 0.3 - disabling XHCI\n"));
+ Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiSdtProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+ }
+
+ TableIndex = 0;
+ Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+
EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ACPI DSDT table not found!\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+
+ Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+ }
+
+ AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
+
+ AcpiSdtProtocol->Close (TableHandle);
+ AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+ }
+
+ return Status;
+}
+
+
EFI_STATUS
EFIAPI
InitializeSbsaQemuAcpiDxe (
@@ -738,5 +796,7 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
}
+ Status = DisableXhciOnOlderPlatVer();
Nit: EDK2 Coding Style says that you need a space before (.
Ah, right. forgot to crucify the source.
Is it necessary to handle the result of Status?
EDK2 is full of handling Status on touching ACPI tables. So I followed.
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[edk2-devel] [PATCH edk2-platforms v4 0/4] Provide XHCI USB controller only for newer hardware
Platform version 0.3 introduced XHCI USB controller instead of EHCI one. But we did it in a way that there is no in-EDK2 check for platform version (XHCI is always given). This behaviour works with Linux as it complains about being unable to initialize EHCI and goes on. Free/Net/Open BSD systems hang in such situation. Now we check are we on Platform Version 0.3 at least and then initialize XHCI controller. Otherwise we disable it's node in DSDT table. I checked several ways to handle the situation. SSDT overlay enabling with LocateAndInstallAcpiFromFvConfitional() was first one but this function had only DBG2 and FACP tables. Then looked at trying to detect XHCI from _STA method. But this is sysbus device which is there or not without way to discover it. Next attempt was to have variable in DSDT and to use it in _STA. Too much trouble. Then looked again at code from Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c and noticed UpdateStatusMethodObject() function. Copied some code and it worked. Booting OpenBSD reminded me to update table checksum. Nhi Pham pointed me to AcpiLib/AcpiAmlObjectUpdateInteger() function. So v3 got AML variable (called XHCI) which is set to 0xF (enabled, working) by default or to 0x0 (disabled, ignore) on Platform Version below 0.3 one. This allowed to remove copy of UpdateStatusMethodObject() function. --- Changes in v4: - make use of DisableXhciOnOlderPlatVer() return value Changes in v3: - use AML variable in DSDT Changes in v2: - XHCI initialized only on PlatVer 0.3+ - XHCI disabled in DSDT for older platforms - no SSDT overlays for EHCI/XHCI - no EHCI at all (it does not work anyway) - no Pcd renaming --- Marcin Juszkiewicz (4): SbsaQemu: introduce macro to compare platform version SbsaQemu: add AcpiLib SbsaQemu: initialize XHCI only if it exists SbsaQemu: disable XHCI in DSDT if not present Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++ .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 66 +++- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 47 +++--- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +- 6 files changed, 123 insertions(+), 24 deletions(-) --- base-commit: 06f6274d56422084281886fad447ab117fd0e487 change-id: 20231013-ehci-xhci-fix-c529356a7a8f Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109719): https://edk2.groups.io/g/devel/message/109719 Mute This Topic: https://groups.io/mt/102035950/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v4 1/4] SbsaQemu: introduce macro to compare platform version
We want to check "if platver < 0.3" in an easy way. --- .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 1 file changed, 25 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h new file mode 100644 index ..dd2483787002 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h @@ -0,0 +1,25 @@ +/** @file +* +* Copyright (c) Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SBSAQEMUPLATFORM_VERSION_H +#define SBSAQEMUPLATFORM_VERSION_H + +/* + * Compare PlatformVersion + * + */ + +#define PLATFORM_VERSION_LESS_THAN(Major, Minor) ( \ + (\ +( PcdGet32 (PcdPlatformVersionMajor) < Major) || \ +( \ + ( PcdGet32 (PcdPlatformVersionMajor) == Major) && \ + ( PcdGet32 (PcdPlatformVersionMinor) < Minor)\ +) \ + )\ +) +#endif -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109720): https://edk2.groups.io/g/devel/message/109720 Mute This Topic: https://groups.io/mt/102035951/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v4 3/4] SbsaQemu: initialize XHCI only if it exists
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 47 +++-
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 36ada4270bbf..76a9cd62d4a4 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
@@ -57,28 +58,6 @@ InitializeSbsaQemuPlatformDxe (
return Status;
}
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
- ASSERT (Size != 0);
-
- DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
- __FUNCTION__, Base, Size));
-
- Status = RegisterNonDiscoverableMmioDevice (
- NonDiscoverableDeviceTypeXhci,
- NonDiscoverableDeviceDmaTypeCoherent,
- NULL,
- NULL,
- 1,
- Base, Size);
-
- if (EFI_ERROR(Status)) {
-DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
-__FUNCTION__, Base, Status));
-return Status;
- }
-
SmcResult = ArmCallSmc0 (SIP_SVC_VERSION, &Arg0, &Arg1, NULL);
if (SmcResult == SMC_ARCH_CALL_SUCCESS) {
Result = PcdSet32S (PcdPlatformVersionMajor, Arg0);
@@ -118,5 +97,29 @@ InitializeSbsaQemuPlatformDxe (
DEBUG ((DEBUG_INFO, "GICI base: 0x%x\n", Arg0));
+ if (! PLATFORM_VERSION_LESS_THAN(0, 3) ) {
+Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ASSERT (Base != NULL);
+Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ASSERT (Size != 0);
+
+DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+__FUNCTION__, Base, Size));
+
+Status = RegisterNonDiscoverableMmioDevice (
+ NonDiscoverableDeviceTypeXhci,
+ NonDiscoverableDeviceDmaTypeCoherent,
+ NULL,
+ NULL,
+ 1,
+ Base, Size);
+
+if (EFI_ERROR(Status)) {
+DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
+__FUNCTION__, Base, Status));
+return Status;
+}
+ }
+
return EFI_SUCCESS;
}
--
2.41.0
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[edk2-devel] [PATCH edk2-platforms v4 2/4] SbsaQemu: add AcpiLib
It will be needed for playing with disabling XHCI later. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 36723e21d7b5..1e650350cb63 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -172,6 +172,8 @@ [LibraryClasses.common] ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109722): https://edk2.groups.io/g/devel/message/109722 Mute This Topic: https://groups.io/mt/102035953/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v4 4/4] SbsaQemu: disable XHCI in DSDT if not present
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Set DSDT node to be disabled so operating system will not try
to initialize not-existing hardware.
Signed-off-by: Marcin Juszkiewicz
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 66 +++-
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +-
3 files changed, 71 insertions(+), 2 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 7c7e08e0fd3a..d5ded892d6ea 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -29,6 +29,7 @@ [Packages]
Silicon/Qemu/SbsaQemu/SbsaQemu.dec
[LibraryClasses]
+ AcpiLib
ArmLib
BaseMemoryLib
BaseLib
@@ -50,6 +51,8 @@ [Pcd]
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
[Depex]
gEfiAcpiTableProtocolGuid ## CONSUMES
@@ -59,6 +62,7 @@ [Guids]
[Protocols]
gEfiAcpiTableProtocolGuid ## CONSUMES
+ gEfiAcpiSdtProtocolGuid
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index fd849ca1594b..4d8a57d5a8e4 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -682,6 +683,69 @@ AddGtdtTable (
return Status;
}
+EFI_STATUS
+DisableXhciOnOlderPlatVer (
+ VOID
+ )
+{
+ EFI_STATUSStatus;
+ EFI_ACPI_SDT_PROTOCOL *AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTN TableKey;
+ UINTN TableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = EFI_SUCCESS;
+
+ if ( PLATFORM_VERSION_LESS_THAN(0, 3) ) {
+DEBUG ((DEBUG_ERROR, "Platform Version < 0.3 - disabling XHCI\n"));
+Status = gBS->LocateProtocol (
+&gEfiAcpiSdtProtocolGuid,
+NULL,
+(VOID **)&AcpiSdtProtocol
+);
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+}
+
+TableIndex = 0;
+Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+ EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ACPI DSDT table not found!\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to disable XHCI!\n"));
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+AcpiSdtProtocol->Close (TableHandle);
+AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+ }
+
+ return Status;
+}
+
+
EFI_STATUS
EFIAPI
InitializeSbsaQemuAcpiDxe (
@@ -738,5 +802,5 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
}
- return EFI_SUCCESS;
+ return DisableXhciOnOlderPlatVer ();
}
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 543b5782580a..ba3eefc975a5 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -73,8 +73,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_HID, "PNP0D10") // _HID: Hardware ID
Name (_UID, 0x00)// _UID: Unique ID
Name (_CCA, 0x01)// _CCA: Cache Coherency Attribute
+Name (XHCI, 0xF)// will be set using AcpiLib
Method (_STA) {
- Return (0xF)
+ Return (XHCI)
}
Re: [edk2-devel] [PATCH edk2-platforms v3 4/4] SbsaQemu: disable XHCI in DSDT if not present
W dniu 18.10.2023 o 10:47, Ard Biesheuvel pisze: Nit: EDK2 Coding Style says that you need a space before (. Ah, right. forgot to crucify the source. Is it necessary to handle the result of Status? EDK2 is full of handling Status on touching ACPI tables. So I followed. Can you just do 'return DisableXhciOnOlderPlatVer();' instead? Done. Sent v4. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109724): https://edk2.groups.io/g/devel/message/109724 Mute This Topic: https://groups.io/mt/102017316/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v3 1/4] SbsaQemu: introduce macro to compare platform version
W dniu 18.10.2023 o 10:46, Ard Biesheuvel pisze: I don't mind adding this here but it is slightly unidiomatic so I'd like Leif's take on this too. ... and it also lacks a s-o-b line Oops. Added in local copy. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109725): https://edk2.groups.io/g/devel/message/109725 Mute This Topic: https://groups.io/mt/102017313/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v4 4/4] SbsaQemu: disable XHCI in DSDT if not present
W dniu 18.10.2023 o 12:32, Nhi Pham pisze: Acked-by: Nhi Pham Nit: I think you want to run uncrustify for Patch 3 as well :) Done, will check other changes too. I have a strong feeling that Qemu part of EDK2 needs a bit bigger patch when it comes to formatting: Platform/Qemu/QemuOpenBoardPkg/Include/Library/QemuOpenFwCfgLib.h | 7 +- Platform/Qemu/QemuOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c | 33 +- Platform/Qemu/QemuOpenBoardPkg/Library/PlatformSecLib/Ia32/SecEntry.nasm | 99 ++- Platform/Qemu/QemuOpenBoardPkg/PlatformInitPei/Memory.c | 108 +-- Platform/Qemu/QemuOpenBoardPkg/PlatformInitPei/Pcie.c | 30 +- Platform/Qemu/QemuOpenBoardPkg/README.md | 43 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 78 +- Silicon/Qemu/SbsaQemu/AcpiTables/Dbg2.aslc | 31 +- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 808 +++- Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 14 +- Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 15 +- Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 37 +- Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 48 +- Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.c | 112 ++- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 86 +-- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h | 50 +- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 4 +- Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h | 2 +- Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c | 37 +- Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c | 23 +- Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 57 +- Silicon/Qemu/SbsaQemu/Library/SbsaQemuNorFlashLib/SbsaQemuNorFlashLib.c | 14 +- Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c | 76 +- 23 files changed, 982 insertions(+), 830 deletions(-) -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109728): https://edk2.groups.io/g/devel/message/109728 Mute This Topic: https://groups.io/mt/102035954/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v4 4/4] SbsaQemu: disable XHCI in DSDT if not present
W dniu 18.10.2023 o 13:23, Pedro Falcato pisze: On Wed, Oct 18, 2023 at 12:16 PM Marcin Juszkiewicz wrote: W dniu 18.10.2023 o 12:32, Nhi Pham pisze: Acked-by: Nhi Pham Nit: I think you want to run uncrustify for Patch 3 as well :) Done, will check other changes too. I have a strong feeling that Qemu part of EDK2 needs a bit bigger patch when it comes to formatting: Platform/Qemu/QemuOpenBoardPkg/Include/Library/QemuOpenFwCfgLib.h | 7 +- Platform/Qemu/QemuOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c | 33 +- Platform/Qemu/QemuOpenBoardPkg/Library/PlatformSecLib/Ia32/SecEntry.nasm | 99 ++- Platform/Qemu/QemuOpenBoardPkg/PlatformInitPei/Memory.c | 108 +-- Platform/Qemu/QemuOpenBoardPkg/PlatformInitPei/Pcie.c | 30 +- Platform/Qemu/QemuOpenBoardPkg/README.md | 43 +- Something must be wrong with your config because QemuOpenBoardPkg is and was, AFAIK, all formatted using uncrustify. And if I run it locally, it seems to agree with me. EDK2 expects some random version of uncrustify. It is not part of BaseTools so I use upstream version. And it looks like they format in different way using the same config file. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109731): https://edk2.groups.io/g/devel/message/109731 Mute This Topic: https://groups.io/mt/102035954/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v5 1/4] SbsaQemu: introduce macro to compare platform version
We want to check "if platver < 0.3" in an easy way. Signed-off-by: Marcin Juszkiewicz --- .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 1 file changed, 25 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h new file mode 100644 index ..dd2483787002 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h @@ -0,0 +1,25 @@ +/** @file +* +* Copyright (c) Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SBSAQEMUPLATFORM_VERSION_H +#define SBSAQEMUPLATFORM_VERSION_H + +/* + * Compare PlatformVersion + * + */ + +#define PLATFORM_VERSION_LESS_THAN(Major, Minor) ( \ + (\ +( PcdGet32 (PcdPlatformVersionMajor) < Major) || \ +( \ + ( PcdGet32 (PcdPlatformVersionMajor) == Major) && \ + ( PcdGet32 (PcdPlatformVersionMinor) < Minor)\ +) \ + )\ +) +#endif -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109735): https://edk2.groups.io/g/devel/message/109735 Mute This Topic: https://groups.io/mt/102037241/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v5 0/4] Provide XHCI USB controller only for newer hardware
Platform version 0.3 introduced XHCI USB controller instead of EHCI one. But we did it in a way that there is no in-EDK2 check for platform version (XHCI is always given). This behaviour works with Linux as it complains about being unable to initialize EHCI and goes on. Free/Net/Open BSD systems hang in such situation. Now we check are we on Platform Version 0.3 at least and then initialize XHCI controller. Otherwise we disable it's node in DSDT table. I checked several ways to handle the situation. SSDT overlay enabling with LocateAndInstallAcpiFromFvConfitional() was first one but this function had only DBG2 and FACP tables. Then looked at trying to detect XHCI from _STA method. But this is sysbus device which is there or not without way to discover it. Next attempt was to have variable in DSDT and to use it in _STA. Too much trouble. Then looked again at code from Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c and noticed UpdateStatusMethodObject() function. Copied some code and it worked. Booting OpenBSD reminded me to update table checksum. Nhi Pham pointed me to AcpiLib/AcpiAmlObjectUpdateInteger() function. So v3 got AML variable (called XHCI) which is set to 0xF (enabled, working) by default or to 0x0 (disabled, ignore) on Platform Version below 0.3 one. This allowed to remove copy of UpdateStatusMethodObject() function. --- Changes in v5: - added missing s-o-b lines - run uncrustify on changed code - fixed typos - added comments Changes in v4: - make use of DisableXhciOnOlderPlatVer() return value Changes in v3: - use AML variable in DSDT Changes in v2: - XHCI initialized only on PlatVer 0.3+ - XHCI disabled in DSDT for older platforms - no SSDT overlays for EHCI/XHCI - no EHCI at all (it does not work anyway) - no Pcd renaming --- Marcin Juszkiewicz (4): SbsaQemu: introduce macro to compare platform version SbsaQemu: add AcpiLib SbsaQemu: initialize XHCI only if it exists SbsaQemu: disable XHCI in DSDT if not present Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++ .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 +++ .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 68 +++- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 49 +++--- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +- 6 files changed, 127 insertions(+), 24 deletions(-) --- base-commit: 8b20188ced2318c970b3666d2a7c132c40aaee68 change-id: 20231013-ehci-xhci-fix-c529356a7a8f Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109734): https://edk2.groups.io/g/devel/message/109734 Mute This Topic: https://groups.io/mt/102037240/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v5 2/4] SbsaQemu: add AcpiLib
It will be needed for playing with disabling XHCI later. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 36723e21d7b5..1e650350cb63 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -172,6 +172,8 @@ [LibraryClasses.common] ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109736): https://edk2.groups.io/g/devel/message/109736 Mute This Topic: https://groups.io/mt/102037242/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v5 3/4] SbsaQemu: initialize XHCI only if it exists
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 49 +++-
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 36ada4270bbf..4ebbe7c93a19 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
@@ -57,28 +58,6 @@ InitializeSbsaQemuPlatformDxe (
return Status;
}
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
- ASSERT (Size != 0);
-
- DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
- __FUNCTION__, Base, Size));
-
- Status = RegisterNonDiscoverableMmioDevice (
- NonDiscoverableDeviceTypeXhci,
- NonDiscoverableDeviceDmaTypeCoherent,
- NULL,
- NULL,
- 1,
- Base, Size);
-
- if (EFI_ERROR(Status)) {
-DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
-__FUNCTION__, Base, Status));
-return Status;
- }
-
SmcResult = ArmCallSmc0 (SIP_SVC_VERSION, &Arg0, &Arg1, NULL);
if (SmcResult == SMC_ARCH_CALL_SUCCESS) {
Result = PcdSet32S (PcdPlatformVersionMajor, Arg0);
@@ -118,5 +97,31 @@ InitializeSbsaQemuPlatformDxe (
DEBUG ((DEBUG_INFO, "GICI base: 0x%x\n", Arg0));
+ if (!PLATFORM_VERSION_LESS_THAN (0, 3)) {
+Base = (VOID *)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ASSERT (Base != NULL);
+Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ASSERT (Size != 0);
+
+DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+__FUNCTION__, Base, Size));
+
+Status = RegisterNonDiscoverableMmioDevice (
+NonDiscoverableDeviceTypeXhci,
+
NonDiscoverableDeviceDmaTypeCoherent,
+NULL,
+NULL,
+1,
+Base,
+Size
+);
+
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device
@%p (Status == %r)\n",
+ __FUNCTION__, Base, Status));
+ return Status;
+}
+ }
+
return EFI_SUCCESS;
}
--
2.41.0
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[edk2-devel] [PATCH edk2-platforms v5 4/4] SbsaQemu: disable XHCI in DSDT if not present
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Set DSDT node to be disabled so operating system will not try
to initialize not-existing hardware.
Signed-off-by: Marcin Juszkiewicz
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 68 +++-
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +-
3 files changed, 73 insertions(+), 2 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 7c7e08e0fd3a..291743b19115 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -29,6 +29,7 @@ [Packages]
Silicon/Qemu/SbsaQemu/SbsaQemu.dec
[LibraryClasses]
+ AcpiLib
ArmLib
BaseMemoryLib
BaseLib
@@ -49,6 +50,8 @@ [Pcd]
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
[Depex]
@@ -58,6 +61,7 @@ [Guids]
gEdkiiPlatformHasAcpiGuid
[Protocols]
+ gEfiAcpiSdtProtocolGuid
gEfiAcpiTableProtocolGuid ## CONSUMES
[FixedPcd]
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index fd849ca1594b..464119de1457 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -682,6 +683,71 @@ AddGtdtTable (
return Status;
}
+/*
+ * A function to disable XHCI node on Platform Version lower than 0.3
+ */
+EFI_STATUS
+DisableXhciOnOlderPlatVer (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL*AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTNTableKey;
+ UINTNTableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = EFI_SUCCESS;
+
+ if ( PLATFORM_VERSION_LESS_THAN (0, 3)) {
+DEBUG ((DEBUG_ERROR, "Platform Version < 0.3 - disabling XHCI\n"));
+Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiSdtProtocol
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+}
+
+Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+
EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ACPI DSDT table not found!\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to disable XHCI!\n"));
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+AcpiSdtProtocol->Close (TableHandle);
+AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+ }
+
+ return Status;
+}
+
+
EFI_STATUS
EFIAPI
InitializeSbsaQemuAcpiDxe (
@@ -738,5 +804,5 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
}
- return EFI_SUCCESS;
+ return DisableXhciOnOlderPlatVer ();
}
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 543b5782580a..ba3eefc975a5 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -73,8 +73,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_HID, "PNP0D10") // _HID: Hardware ID
Name (_UID, 0x00)// _UID: Unique ID
Name (_CCA, 0x01)// _CCA: Cache Coherency Attribute
+
[edk2-devel] [PATCH edk2-platforms 1/1] SbsaQemu: PCI node in DSDT does not need _ADR
190: Device (PCI0) Warning 3073 -
Multiple types ^ (Device object requires either a _HID or _ADR, but not both)
PCI Firmware specification does not require _ADR for Host bridges.
Signed-off-by: Marcin Juszkiewicz
---
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 1 -
1 file changed, 1 deletion(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index ba3eefc975a5..b55ad6c5cc07 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -191,7 +191,6 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_CID, EISAID ("PNP0A03")) // Compatible PCI Root Bridge
Name (_SEG, Zero) // PCI Segment Group number
Name (_BBN, Zero) // PCI Base Bus Number
- Name (_ADR, Zero)
Name (_UID, "PCI0")
Name (_CCA, One)// Initially mark the PCI coherent (for JunoR1)
--
2.41.0
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Re: [edk2-devel] [PATCH edk2-platforms v4 4/4] SbsaQemu: disable XHCI in DSDT if not present
W dniu 18.10.2023 o 15:36, Laszlo Ersek pisze:
EDK2 expects some random version of uncrustify.
It is not part of BaseTools so I use upstream version. And it looks like
they format in different way using the same config file.
Project URL (to clone and build):
https://projec...@dev.azure.com/projectmu/Uncrustify/_git/Uncrustify
Command line options to pass to the binary:
-c ${EDK2_ROOT}/.pytool/Plugin/UncrustifyCheck/uncrustify.cfg \
--replace \
--no-backup \
--if-changed \
You can specify the pathnames to reformat as operands, or you can
additionally pass the "-F -" option, and then the pathnames will be read
from stdin.
Make sure you have committed or at least staged your changes, before
running this command, because these options will update the files in-place.
The only really important option is of course the "-c" one.
Thanks!
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[edk2-devel] [PATCH edk2-platforms v6 0/4] Provide XHCI USB controller only for newer hardware
Platform version 0.3 introduced XHCI USB controller instead of EHCI one. But we did it in a way that there is no in-EDK2 check for platform version (XHCI is always given). This behaviour works with Linux as it complains about being unable to initialize EHCI and goes on. Free/Net/Open BSD systems hang in such situation. Now we check are we on Platform Version 0.3 at least and then initialize XHCI controller. Otherwise we disable it's node in DSDT table. I checked several ways to handle the situation. SSDT overlay enabling with LocateAndInstallAcpiFromFvConfitional() was first one but this function had only DBG2 and FACP tables. Then looked at trying to detect XHCI from _STA method. But this is sysbus device which is there or not without way to discover it. Next attempt was to have variable in DSDT and to use it in _STA. Too much trouble. Then looked again at code from Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiDsdt.c and noticed UpdateStatusMethodObject() function. Copied some code and it worked. Booting OpenBSD reminded me to update table checksum. Nhi Pham pointed me to AcpiLib/AcpiAmlObjectUpdateInteger() function. So v3 got AML variable (called XHCI) which is set to 0xF (enabled, working) by default or to 0x0 (disabled, ignore) on Platform Version below 0.3 one. This allowed to remove copy of UpdateStatusMethodObject() function. --- Changes in v6: - made DisableXhciOnOlderPlatVer() static - added usual "if EFI_ERROR(Status)" dance Changes in v5: - added missing s-o-b lines - run uncrustify on changed code - fixed typos - added comments Changes in v4: - make use of DisableXhciOnOlderPlatVer() return value Changes in v3: - use AML variable in DSDT Changes in v2: - XHCI initialized only on PlatVer 0.3+ - XHCI disabled in DSDT for older platforms - no SSDT overlays for EHCI/XHCI - no EHCI at all (it does not work anyway) - no Pcd renaming --- Marcin Juszkiewicz (4): SbsaQemu: introduce macro to compare platform version SbsaQemu: add AcpiLib SbsaQemu: initialize XHCI only if it exists SbsaQemu: disable XHCI in DSDT if not present Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++ .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 +++ .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 74 +++- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 49 +++-- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +- 6 files changed, 133 insertions(+), 24 deletions(-) --- base-commit: 74b9eacfd453c56b8bcc5ac68b3bf5ca243d60a9 change-id: 20231013-ehci-xhci-fix-c529356a7a8f Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110133): https://edk2.groups.io/g/devel/message/110133 Mute This Topic: https://groups.io/mt/102205079/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v6 2/4] SbsaQemu: add AcpiLib
It will be needed for playing with disabling XHCI later. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 806651fc55a0..fa85bd8dab89 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -172,6 +172,8 @@ [LibraryClasses.common] ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110135): https://edk2.groups.io/g/devel/message/110135 Mute This Topic: https://groups.io/mt/102205081/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v6 3/4] SbsaQemu: initialize XHCI only if it exists
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 49 +++-
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index 36ada4270bbf..4ebbe7c93a19 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
@@ -57,28 +58,6 @@ InitializeSbsaQemuPlatformDxe (
return Status;
}
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
- ASSERT (Size != 0);
-
- DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
- __FUNCTION__, Base, Size));
-
- Status = RegisterNonDiscoverableMmioDevice (
- NonDiscoverableDeviceTypeXhci,
- NonDiscoverableDeviceDmaTypeCoherent,
- NULL,
- NULL,
- 1,
- Base, Size);
-
- if (EFI_ERROR(Status)) {
-DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p
(Staus == %r)\n",
-__FUNCTION__, Base, Status));
-return Status;
- }
-
SmcResult = ArmCallSmc0 (SIP_SVC_VERSION, &Arg0, &Arg1, NULL);
if (SmcResult == SMC_ARCH_CALL_SUCCESS) {
Result = PcdSet32S (PcdPlatformVersionMajor, Arg0);
@@ -118,5 +97,31 @@ InitializeSbsaQemuPlatformDxe (
DEBUG ((DEBUG_INFO, "GICI base: 0x%x\n", Arg0));
+ if (!PLATFORM_VERSION_LESS_THAN (0, 3)) {
+Base = (VOID *)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ASSERT (Base != NULL);
+Size = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ASSERT (Size != 0);
+
+DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+__FUNCTION__, Base, Size));
+
+Status = RegisterNonDiscoverableMmioDevice (
+NonDiscoverableDeviceTypeXhci,
+
NonDiscoverableDeviceDmaTypeCoherent,
+NULL,
+NULL,
+1,
+Base,
+Size
+);
+
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device
@%p (Status == %r)\n",
+ __FUNCTION__, Base, Status));
+ return Status;
+}
+ }
+
return EFI_SUCCESS;
}
--
2.41.0
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[edk2-devel] [PATCH edk2-platforms v6 4/4] SbsaQemu: disable XHCI in DSDT if not present
We need platform version to be at least 0.3 to have XHCI
in virtual hardware. On older platforms there is non-working
EHCI which we ignore.
Set DSDT node to be disabled so operating system will not try
to initialize not-existing hardware.
Signed-off-by: Marcin Juszkiewicz
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 74 +++-
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl| 3 +-
3 files changed, 79 insertions(+), 2 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 7c7e08e0fd3a..291743b19115 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -29,6 +29,7 @@ [Packages]
Silicon/Qemu/SbsaQemu/SbsaQemu.dec
[LibraryClasses]
+ AcpiLib
ArmLib
BaseMemoryLib
BaseLib
@@ -49,6 +50,8 @@ [Pcd]
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase
[Depex]
@@ -58,6 +61,7 @@ [Guids]
gEdkiiPlatformHasAcpiGuid
[Protocols]
+ gEfiAcpiSdtProtocolGuid
gEfiAcpiTableProtocolGuid ## CONSUMES
[FixedPcd]
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index fd849ca1594b..523d9035e0c1 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -682,6 +683,72 @@ AddGtdtTable (
return Status;
}
+/*
+ * A function to disable XHCI node on Platform Version lower than 0.3
+ */
+STATIC
+EFI_STATUS
+DisableXhciOnOlderPlatVer (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_SDT_PROTOCOL*AcpiSdtProtocol;
+ EFI_ACPI_DESCRIPTION_HEADER *Table;
+ UINTNTableKey;
+ UINTNTableIndex;
+ EFI_ACPI_HANDLE TableHandle;
+
+ Status = EFI_SUCCESS;
+
+ if ( PLATFORM_VERSION_LESS_THAN (0, 3)) {
+DEBUG ((DEBUG_ERROR, "Platform Version < 0.3 - disabling XHCI\n"));
+Status = gBS->LocateProtocol (
+ &gEfiAcpiSdtProtocolGuid,
+ NULL,
+ (VOID **)&AcpiSdtProtocol
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to locate ACPI table protocol\n"));
+ return Status;
+}
+
+Status = AcpiLocateTableBySignature (
+ AcpiSdtProtocol,
+
EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ &TableIndex,
+ &Table,
+ &TableKey
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "ACPI DSDT table not found!\n"));
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
+Status = AcpiSdtProtocol->OpenSdt (TableKey, &TableHandle);
+if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+Status = AcpiAmlObjectUpdateInteger (AcpiSdtProtocol, TableHandle,
"\\_SB.USB0.XHCI", 0x0);
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to disable XHCI!\n"));
+ ASSERT_EFI_ERROR (Status);
+ AcpiSdtProtocol->Close (TableHandle);
+ return Status;
+}
+
+AcpiSdtProtocol->Close (TableHandle);
+AcpiUpdateChecksum ((UINT8 *)Table, Table->Length);
+ }
+
+ return Status;
+}
+
+
EFI_STATUS
EFIAPI
InitializeSbsaQemuAcpiDxe (
@@ -738,5 +805,10 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
}
- return EFI_SUCCESS;
+ Status = DisableXhciOnOlderPlatVer ();
+ if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "Failed to handle XHCI enablement\n"));
+ }
+
+ return Status;
}
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 6661bc8195ee..b55ad6c5cc07 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -73,8 +73,9 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Name (_HID, "PNP0D10") // _H
[edk2-devel] [PATCH edk2-platforms v6 1/4] SbsaQemu: introduce macro to compare platform version
We want to check "if platver < 0.3" in an easy way. Signed-off-by: Marcin Juszkiewicz --- .../IndustryStandard/SbsaQemuPlatformVersion.h | 25 1 file changed, 25 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h new file mode 100644 index ..dd2483787002 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuPlatformVersion.h @@ -0,0 +1,25 @@ +/** @file +* +* Copyright (c) Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SBSAQEMUPLATFORM_VERSION_H +#define SBSAQEMUPLATFORM_VERSION_H + +/* + * Compare PlatformVersion + * + */ + +#define PLATFORM_VERSION_LESS_THAN(Major, Minor) ( \ + (\ +( PcdGet32 (PcdPlatformVersionMajor) < Major) || \ +( \ + ( PcdGet32 (PcdPlatformVersionMajor) == Major) && \ + ( PcdGet32 (PcdPlatformVersionMinor) < Minor)\ +) \ + )\ +) +#endif -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110134): https://edk2.groups.io/g/devel/message/110134 Mute This Topic: https://groups.io/mt/102205080/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] edk2 uncrustify update (73.0.8)?
W dniu 13.11.2023 o 12:58, Laszlo Ersek pisze:
Note that 73.0.3 indents the subexpression to the "//" comment on the
previous line, while 73.0.8 ignores the comment -- which I think is
justified here.
I believe this improvement may come from uncrustify commit 239c4fad745b
("Prevent endless indentation scenario in struct assignment",
2022-07-29). I think it's worth having in edk2.
I like this.
CC: stewards, Pedro (commit 6ded9f50c3aa), Marcin (traditionally a big
fan of uncrustify :))
I prefer to have source formatter than not having it. Especially in
projects which have code style far from mine.
Still a fan of adding edk2-uncrustify to BaseTools. If we are expected
to use it then let it get installed at same moment as "build" command is.
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[edk2-devel] [PATCH edk2-platforms 1/1] set WritePolicyValid for all cache types
acpiview complains:
ERROR: On Arm based systems, all cache properties must be provided in
the cache type structure. Missing 'Write Policy Valid' flag.
ACPI specification says:
> Set to 1 if the write policy attribute described is valid. A value
> of 0 indicates that, where possible, processor architecture specific
> discovery mechanisms should be used to ascertain the value of this
> attribute.
Signed-off-by: Marcin Juszkiewicz
---
Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 2 +-
Platform/RaspberryPi/AcpiTables/Pptt.aslc | 2 +-
Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc | 2 +-
Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc | 2 +-
Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc | 2 +-
Silicon/Socionext/SynQuacer/AcpiTables/Pptt.aslc | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
index 983d17f6fa50..61d8bce8c959 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h
@@ -126,7 +126,7 @@ typedef struct {
1, /* AssociativityValid */
\
1, /* AllocationTypeValid */
\
1, /* CacheTypeValid */
\
- 0, /* WritePolicyValid */
\
+ 1, /* WritePolicyValid */
\
1, /* LineSizeValid */
\
},
\
0, /* NextLevelOfCache */
\
diff --git a/Platform/RaspberryPi/AcpiTables/Pptt.aslc
b/Platform/RaspberryPi/AcpiTables/Pptt.aslc
index a52bc5a31adf..b80f5ff1e057 100644
--- a/Platform/RaspberryPi/AcpiTables/Pptt.aslc
+++ b/Platform/RaspberryPi/AcpiTables/Pptt.aslc
@@ -114,7 +114,7 @@ typedef struct {
1, /* AssociativityValid */
\
1, /* AllocationTypeValid */
\
1, /* CacheTypeValid */
\
- 0, /* WritePolicyValid */
\
+ 1, /* WritePolicyValid */
\
1, /* LineSizeValid */
\
},
\
0,/* NextLevelOfCache */
\
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc
b/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc
index e03bfcd6211d..f3a9b90fb564 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Pptt.aslc
@@ -94,7 +94,7 @@ typedef struct {
1, /* AssociativityValid */
\
1, /* AllocationTypeValid */
\
1, /* CacheTypeValid */
\
- 0, /* WritePolicyValid */
\
+ 1, /* WritePolicyValid */
\
1, /* LineSizeValid */
\
},
\
0,/* NextLevelOfCache */
\
diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc
b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc
index f37c7511134d..3793cbbca0b5 100644
--- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc
+++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Pptt.aslc
@@ -94,7 +94,7 @@ typedef struct {
1, /* AssociativityValid */
\
1, /* AllocationTypeValid */
\
1, /* CacheTypeValid */
\
- 0, /* WritePolicyValid */
\
+ 1, /* WritePolicyValid */
\
1, /* LineSizeValid */
\
},
\
0,/* NextLevelOfCache */
\
diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc
b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc
index ae1a21df23b9..04652653563e 100644
--- a/Silic
[edk2-devel] [PATCH edk2-platforms 1/1] Maintainers: fix Phytium entry
Signed-off-by: Marcin Juszkiewicz --- Maintainers.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index affb2632e0db..7bfd3c850a30 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -407,7 +407,7 @@ M: Daniel Schaefer Phytium platforms and silicon F: Platform/Phytium/ -F: Silicon/silicon/ +F: Silicon/Phytium/ M: Leif Lindholm R: Peng Xie R: Ling Jia -- 2.41.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111271): https://edk2.groups.io/g/devel/message/111271 Mute This Topic: https://groups.io/mt/102603863/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-discuss] [edk2-devel] Soft Feature Freeze starts now for edk2-stable202311
W dniu 22.11.2023 o 13:26, Leif Lindholm pisze: On 2023-11-22 11:11, Sami Mujawar wrote: [SAMI] The proposal above looks good to me. This may be slightly off topic, but can we also enable edk2-platform upstream CI as well, please? This would be helpful to catch issues much earlier. [/SAMI] Yes, this is a problem we need to solve, but we don't have the time or resources to set up an upstream CI. What we've been thinking of is to let maintainers set up their own CI infrastructure and then have that perform any target-specific tasks and report back to upstream CI. It's been a few months since I last discussed this with Mike, but I think we were looking at https://docs.github.com/en/actions/hosting-your-own-runners/managing-self-hosted-runners/about-self-hosted-runners as a possible tool. This is probably not something we would like to tie into the edk2 mergify workflow (it would add too much delay), but localised to edk2-platforms. Any help with implementing that would be most appreciated :) I can write CI jobs which would run tests for QEMU platforms: - virt/x86-64 (i440fx/q35) - virt/aarch64 - sbsa-ref/aarch64 Sbsa-ref is something I am working on daily. If Github Actions is all what's needed then it can be done using platform provided runners (no self-hosted needed). -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111604): https://edk2.groups.io/g/devel/message/111604 Mute This Topic: https://groups.io/mt/102746762/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: Update TF-A binaries to v2.10
Update the TF-A binaries:
- v2.10 release
- Neoverse-N2 errata fix
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24936
(check for SCU before accessing DSU registers)
v2.10 brought change on how we enable cpu features to have one binary
working on v8.0 (a57/a72), v8.2 (n1), v8.4 (v1) and v9.0 (n2) cpu cores.
Base setup is v8.0 with all newer features enabled with runtime checks.
Neoverse-N2 fix makes sure that there presence of DSU is checked before
used (QEMU does not emulate DSU).
With all those changes we have all cores booting into Linux and *BSD.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/Sbsa/bl1.bin | Bin 22933 -> 23029 bytes
Platform/Qemu/Sbsa/fip.bin | Bin 82722 -> 82722 bytes
2 files changed, 0 insertions(+), 0 deletions(-)
mode change 100755 => 100644 Platform/Qemu/Sbsa/bl1.bin
diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
old mode 100755
new mode 100644
index
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GIT binary patch
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Re: [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
W dniu 31.01.2024 o 2:15 PM, Xiong Yining pisze:
Add support to create SRAT(System resource affinity table) for
sbsa platform at runtime.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 27 ++
.../Include/Library/SbsaQemuHardwareInfoLib.h | 11 +++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 92 +++
.../SbsaQemuHardwareInfoLib.c | 36
4 files changed, 166 insertions(+)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
index 7595df4c8a2d..b8c29b803b81 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
@@ -63,4 +63,31 @@ typedef struct {
++#define SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT(
\
+ ProximtyDomain, ACPIProcessorUID, Flags, ClockDomain)
\
s/ProximtyDomain/ProximityDomain/ please
Applied it on top of 20240131120507.2829117-1-xiongyining1...@phytium.com.cn
series ("get rid of DeviceTree from SbsaQemu v5" one).
Code boots but only memory from the first node is listed by both EDK2 and Linux.
QEMU arguments:
-smp 4,sockets=4,maxcpus=4
-m 4G,slots=2,maxmem=5G
-object memory-backend-ram,size=1G,id=m0
-object memory-backend-ram,size=3G,id=m1
-numa node,nodeid=0,cpus=0-1,memdev=m0
-numa node,nodeid=1,cpus=2,memdev=m1
-numa node,nodeid=2,cpus=3
EDK2 memmap:
Type StartEnd # Pages Attributes
Available 0100-01003841AFFF 0003841B 000E
LoaderCode 01003841B000-0100384F 00E5 000E
RT_Code01003850-01003857 0080 800E
RT_Data01003858-01003861 00A0 800E
RT_Code01003862-01003866 0050 800E
ACPI_Recl 01003867-0100386D 0070 000E
RT_Code0100386E-01003872 0050 800E
Available 01003873-01003A00DFFF 18DE 000E
BS_Data01003A00E000-01003A02BFFF 001E 000E
Available 01003A02C000-01003A039FFF 000E 000E
BS_Data01003A03A000-01003A056FFF 001D 000E
Available 01003A057000-01003A057FFF 0001 000E
BS_Data01003A058000-01003B623FFF 15CC 000E
Available 01003B624000-01003B7D3FFF 01B0 000E
BS_Code01003B7D4000-01003BBF 042C 000E
RT_Code01003BC0-01003BD8 0190 800E
RT_Data01003BD9-01003BFD 0250 800E
Available 01003BFE-01003BFFEFFF 001F 000E
BS_Data01003BFFF000-01003C01 0021 000E
Available 01003C02-01003F7D4FFF 37B5 000E
BS_Data01003F7D5000-01003F7F5FFF 0021 000E
BS_Code01003F7F6000-01003F83CFFF 0047 000E
BS_Data01003F83D000-01003FFD9FFF 079D 000E
BS_Code01003FFDA000-01003FFF7FFF 001E 000E
BS_Data01003FFF8000-01003FFF 0008 000E
MMIO 1000-106B 06C0 8001
MMIO 6001-60010FFF 0001 8001
Reserved : 0 Pages (0 Bytes)
LoaderCode:229 Pages (937,984 Bytes)
LoaderData: 0 Pages (0 Bytes)
BS_Code : 1,169 Pages (4,788,224 Bytes)
BS_Data : 7,662 Pages (31,383,552 Bytes)
RT_Code :688 Pages (2,818,048 Bytes)
RT_Data :752 Pages (3,080,192 Bytes)
ACPI_Recl :112 Pages (458,752 Bytes)
ACPI_NVS : 0 Pages (0 Bytes)
MMIO : 1,729 Pages (7,081,984 Bytes)
MMIO_Port : 0 Pages (0 Bytes)
PalCode : 0 Pages (0 Bytes)
Available :251,532 Pages (1,030,275,072 Bytes)
Persistent: 0 Pages (0 Bytes)
--
Total Memory: 1,024 MB (1,073,741,824 Bytes)
SRAT table shows both memory nodes:
--- SRAT Table ---
Address : 0x100386DFD18
Length : 200
: 53 52 41 54 C8 00 00 00 - 03 48 4C 49 4E 41 52 4F SRAT.HLINARO
0010 : 53 42 53 41 51 45 4D 55 - 10 08 20 20 4C 4E 52 4F SBSAQEMU.. LNRO
0020 : 01 00 00 00 01 00 00 00 - 00 00 00 00 00 00 00 00
0030 : 01 28 01 00 00 00 00 00 - 00 00 00 40 00 01 00 00 .(.@
0040
Re: [edk2-devel] Merge commit in edk2-non-osi
W dniu 21.02.2024 o 2:49 AM, Nate DeSimone pisze: I would like to remind everyone that we generally don't accept submissions via PRs yet. At the very least please click "Rebase and merge" when closing the PR instead of "Merge pull request". Since that merge commit is currently at the top of the tree, can we delete it? You can configure repository on github to not have merge commits on PR merge. Settings allow to choose and you can leave 'allow rebase merging' as the only option. Pull requests functionality cannot be disabled but there are pages describing how to reply and close/reject automatically. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115720): https://edk2.groups.io/g/devel/message/115720 Mute This Topic: https://groups.io/mt/104481195/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
W dniu 20.02.2024 o 9:03 AM, Xiong Yining pisze: This is beacuse UEFI only allocates the first memory node memory space for SbsaQemu platform, i refer to implemet of "OvmfPkg/Fdt/HighMemDxe" and add the support for other memory nodes via GCD services. Maybe you can apply patch "support multi memory nodes" together with this patch. Collected patches: 6ea06a5ae4c9 (tag: multi-node-v3) SbsaQemu: add memory space for the high memory nodes 6cad2691e06e (tag: srat-v2) SbsaQemu: AcpiDxe: Create SRAT table at runtime 86c5fc908bd4 Platform/SbsaQemu: add DeviceTree fallbacks to parse memory information a2e8ffb1e046 Platform/SbsaQemu: get the information of memory via SMC calls 6007fcaae876 Platform/SbsaQemu: hang if there is no cpu information dc9360e2e2c8 Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib 5a0a7fa00139 Platform/SbsaQemu: use PcdCoreCount directly 9bebc3a2a7b9 Platform/SbsaQemu: read amount of cpus during init e7ec1d2d346b (tag: nodt-v5) Platform/SbsaQemu: add SbsaQemuHardwareInfoLib And effect is nice. QEMU args: -smp 4,sockets=4,maxcpus=4 -m 4G,slots=2,maxmem=5G -object memory-backend-ram,size=1G,id=m0 -object memory-backend-ram,size=3G,id=m1 -numa node,nodeid=0,cpus=0-1,memdev=m0 -numa node,nodeid=1,cpus=2,memdev=m1 -numa node,nodeid=2,cpus=3 EDK2 reports 4GB ram, Linux gets 4GB ram too. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115724): https://edk2.groups.io/g/devel/message/115724 Mute This Topic: https://groups.io/mt/104074353/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v3 1/1] SbsaQemu: add memory space for the high memory nodes
W dniu 20.02.2024 o 8:33 AM, Xiong Yining pisze: To support more memory nodes, we refer to the implement of "OvmfPkg/Fdt/HighMemDxe" to add memory space for the high memory nodes except the first one. Signed-off-by: Xiong Yining Signed-off-by: Chen Baozi Tested-by: Marcin Juszkiewicz EDK2 reported memory from both NUMA nodes, Linux got whole memory too (with SRAT table patch). -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115725): https://edk2.groups.io/g/devel/message/115725 Mute This Topic: https://groups.io/mt/104463710/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 0/2] ArmPkg/ArmLib: add functions to read system registers
My ArmCpuInfo tool reads system registers to check which features are supported by AArch64 cores in host system. I am updating it for 2023-12 update of "Arm A-profile Architecture Registers" document [1] and had to add reading of several new system registers. 1. https://developer.arm.com/documentation/ddi0601/2023-12/ While I can keep them in my application, they may be useful for someone else too. ArmLib build requirements need bump to 'armv8-a+sme' to get access to SVE/SME related system registers. Marcin Juszkiewicz (2): ArmPkg/ArmLib: Add functions to read SVE/SME system registers ArmPkg/ArmLib: Add functions to read future system registers ArmPkg/Library/ArmLib/ArmBaseLib.inf | 4 ++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h| 46 +-- .../Library/ArmLib/AArch64/AArch64Support.S | 42 + 3 files changed, 88 insertions(+), 4 deletions(-) -- 2.43.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115879): https://edk2.groups.io/g/devel/message/115879 Mute This Topic: https://groups.io/mt/104526093/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 2/2] ArmPkg/ArmLib: Add functions to read future system registers
https://developer.arm.com/documentation/ddi0601/2023-12/ lists more system registers than EDK2 supports now. ISAR3, MMFR3, MMFR4, PFR2, FPFR0 were added. Signed-off-by: Marcin Juszkiewicz --- ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h| 34 --- .../Library/ArmLib/AArch64/AArch64Support.S | 31 + 2 files changed, 61 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h index 2fd256f4acc8..172b73f7acad 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -50,6 +50,12 @@ ArmReadIdAA64Dfr1 ( VOID ); +UINTN +EFIAPI +ArmReadIdAA64Fpfr0 ( + VOID + ); + UINTN EFIAPI ArmReadIdAA64Isar0 ( @@ -68,6 +74,12 @@ ArmReadIdAA64Isar2 ( VOID ); +UINTN +EFIAPI +ArmReadIdAA64Isar3 ( + VOID + ); + UINTN EFIAPI ArmReadIdAA64Mmfr0 ( @@ -80,16 +92,24 @@ ArmReadIdAA64Mmfr1 ( VOID ); -/** Reads the ID_AA64MMFR2_EL1 register. - - @return The contents of the ID_AA64MMFR2_EL1 register. -**/ UINTN EFIAPI ArmReadIdAA64Mmfr2 ( VOID ); +UINTN +EFIAPI +ArmReadIdAA64Mmfr3 ( + VOID + ); + +UINTN +EFIAPI +ArmReadIdAA64Mmfr4 ( + VOID + ); + UINTN EFIAPI ArmReadIdAA64Pfr0 ( @@ -102,6 +122,12 @@ ArmReadIdAA64Pfr1 ( VOID ); +UINTN +EFIAPI +ArmReadIdAA64Pfr2 ( + VOID + ); + UINTN EFIAPI ArmReadIdAA64Smfr0 ( diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 0e8e7b5cf0e6..b007aef67adf 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -485,6 +485,12 @@ ASM_FUNC(ArmReadIdAA64Dfr1) ret +ASM_FUNC(ArmReadIdAA64Fpfr0) + mrs x0, s3_0_c0_c4_7 +# mrs x0, ID_AA64FPFR0_EL1 + ret + + ASM_FUNC(ArmReadIdAA64Isar0) mrs x0, ID_AA64ISAR0_EL1 ret @@ -500,6 +506,12 @@ ASM_FUNC(ArmReadIdAA64Isar2) ret +ASM_FUNC(ArmReadIdAA64Isar3) + mrs x0, s3_0_c0_c6_3 +# mrs x0, ID_AA64ISAR3_EL1 + ret + + ASM_FUNC(ArmReadIdAA64Mmfr0) mrs x0, ID_AA64MMFR0_EL1 ret @@ -515,6 +527,18 @@ ASM_FUNC(ArmReadIdAA64Mmfr2) ret +ASM_FUNC(ArmReadIdAA64Mmfr3) + mrs x0, s3_0_c0_c7_3 +# mrs x0, ID_AA64MMFR3_EL1 + ret + + +ASM_FUNC(ArmReadIdAA64Mmfr4) + mrs x0, s3_0_c0_c7_4 +# mrs x0, ID_AA64MMFR4_EL1 + ret + + ASM_FUNC(ArmReadIdAA64Pfr0) mrs x0, ID_AA64PFR0_EL1 ret @@ -524,6 +548,13 @@ ASM_FUNC(ArmReadIdAA64Pfr1) mrs x0, ID_AA64PFR1_EL1 ret + +ASM_FUNC(ArmReadIdAA64Pfr2) + mrs x0, s3_0_c0_c4_2 +# mrs x0, ID_AA64PFR2_EL1 + ret + + ASM_FUNC(ArmReadIdAA64Smfr0) mrs x0, ID_AA64SMFR0_EL1 ret -- 2.43.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115880): https://edk2.groups.io/g/devel/message/115880 Mute This Topic: https://groups.io/mt/104526094/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/2] ArmPkg/ArmLib: Add functions to read SVE/SME system registers
There are functions to read DFR, MMFR, PFR system registers. So let add ones for SMFR0 and ZFR0 ones too. ArmReadIdAA64Zfr0() uses s3_0_c0_c4_4 notation as clang 17 on my system does not recognize normal name. Bumps build flags to "armv8-a+sme" to get access to both registers. Signed-off-by: Marcin Juszkiewicz --- ArmPkg/Library/ArmLib/ArmBaseLib.inf | 4 ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 12 ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 11 +++ 3 files changed, 27 insertions(+) diff --git a/ArmPkg/Library/ArmLib/ArmBaseLib.inf b/ArmPkg/Library/ArmLib/ArmBaseLib.inf index e37d85bee471..2e8812e8a386 100644 --- a/ArmPkg/Library/ArmLib/ArmBaseLib.inf +++ b/ArmPkg/Library/ArmLib/ArmBaseLib.inf @@ -48,3 +48,7 @@ [Packages] [FeaturePcd.ARM] gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride + +[BuildOptions] + GCC:*_*_AARCH64_ASM_FLAGS = -march=armv8-a+sme + CLANGDWARF:*_*_AARCH64_ASM_FLAGS = -march=armv8-a+sme diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h index 6380a019ddc5..2fd256f4acc8 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -102,4 +102,16 @@ ArmReadIdAA64Pfr1 ( VOID ); +UINTN +EFIAPI +ArmReadIdAA64Smfr0 ( + VOID + ); + +UINTN +EFIAPI +ArmReadIdAA64Zfr0 ( + VOID + ); + #endif // AARCH64_LIB_H_ diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index a7111e51882c..0e8e7b5cf0e6 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -524,4 +524,15 @@ ASM_FUNC(ArmReadIdAA64Pfr1) mrs x0, ID_AA64PFR1_EL1 ret +ASM_FUNC(ArmReadIdAA64Smfr0) + mrs x0, ID_AA64SMFR0_EL1 + ret + + +ASM_FUNC(ArmReadIdAA64Zfr0) + mrs x0, s3_0_c0_c4_4 +# mrs x0, ID_AA64ZFR0_EL1 + ret + + ASM_FUNCTION_REMOVE_IF_UNREFERENCED -- 2.43.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115878): https://edk2.groups.io/g/devel/message/115878 Mute This Topic: https://groups.io/mt/104526092/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v6 0/7] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together with new code for handling SMC stuff. If TF-A answer to SMC call would be not success then we go back to parsing DeviceTree data directly. There is no DT parsing elsewhere. I hope that we can drop FdtHandler part as part of 202411 release. TF-A part: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 Signed-off-by: Marcin Juszkiewicz --- Changes in v6 (Marcin Juszkiewicz): - patch 5 now shutdowns system in case of no CPU information Changes in v5 (Xiong Yining): - added missing patch - Link to v5: https://openfw.io/edk2-devel/20240131132400.3022662-1-xiongyining1...@phytium.com.cn/ Changes in v4 (Xiong Yining): - patch 6 add the support for getting the hardware information of memory via SMC calls. - patch 7 add the callback of DeviceTree when SMC calls defined on patch 6 failled. - replace FdtHelperGetMpidr() with SbsaQemuGetMpidr() on patch 4 to compile successfully. - Link to v4: https://openfw.io/edk2-devel/20240131100027.2538549-1-xiongyining1...@phytium.com.cn/ Changes in v3: - added SMC_SIP_CALL_SUCCESS - on SMC call fail tell that SMC call failed instead of blaming TF-A - hang when there is no cpu information (TODO: shutdown instead) - Link to v3: https://openfw.io/edk2-devel/20240124-no-dt-for-cpu-v3-0-5375fcf09...@linaro.org/ --- Marcin Juszkiewicz (5): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: read amount of cpus during init Platform/SbsaQemu: use PcdCoreCount directly Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib Platform/SbsaQemu: hang if there is no cpu information Xiong Yining (2): Platform/SbsaQemu: get the information of memory via SMC calls Platform/SbsaQemu: add DeviceTree fallbacks to parse memory information Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 -- .../SbsaQemuHardwareInfoLib.inf | 36 ++ .../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf| 2 +- .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 17 +- .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 -- .../Include/Library/SbsaQemuHardwareInfoLib.h | 73 Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 15 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 352 .../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 +-- 16 files changed, 511 insertions(+), 242 deletions(-) --- base-commit: fe41713668d42b20a2370dab27de3269e877e454 change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116425): https://edk2.groups.io/g/devel/message/116425 Mute This Topic: https://groups.io/mt/104763761/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v6 1/7] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 32 +++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 15 ++- .../Include/Library/SbsaQemuHardwareInfoLib.h| 45 + .../SbsaQemuHardwareInfoLib.c| 98 5 files changed, 189 insertions(+), 4 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..8c2def1878e6 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + + [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..d9faee7fa5b2 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSIONSMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICSMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index ..ca52c6b27093 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +VOID +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. + + @retvalMPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve NUMA node id for. + + @retvalNUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c new file mode 100644 index
[edk2-devel] [PATCH edk2-platforms v6 2/7] Platform/SbsaQemu: read amount of cpus during init
We read it once and store in Pcd for future use. Signed-off-by: Marcin Juszkiewicz --- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf | 4 +++- .../SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 9 + 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 19534b7a274a..9752694a432b 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu platform configuration settings # -# Copyright (c) 2019, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -32,6 +32,7 @@ [LibraryClasses] PcdLib DebugLib NonDiscoverableDeviceRegistrationLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint [Pcd] @@ -46,6 +47,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount [Depex] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c index 4ebbe7c93a19..14e1ec7eab29 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c @@ -1,7 +1,7 @@ /** @file -* FDT client protocol driver for qemu,mach-virt-ahci DT node +* SbsaQemu Platform Initialization * -* Copyright (c) 2019, Linaro Ltd. All rights reserved. +* Copyright (c) Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -12,13 +12,12 @@ #include #include #include +#include #include #include #include #include -#include - EFI_STATUS EFIAPI InitializeSbsaQemuPlatformDxe ( @@ -123,5 +122,7 @@ InitializeSbsaQemuPlatformDxe ( } } + SbsaQemuGetCpuCount (); + return EFI_SUCCESS; } -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116427): https://edk2.groups.io/g/devel/message/116427 Mute This Topic: https://groups.io/mt/104763764/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v6 3/7] Platform/SbsaQemu: use PcdCoreCount directly
During platform initialization we read amount of cpu cores and set
PcdCoreCount so there is no need to call FdtHandler.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c| 10 --
.../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 11 ++-
3 files changed, 8 insertions(+), 19 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..8e2bf8c512f1 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2023, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,8 +29,6 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
IoLib
PcdLib
@@ -40,7 +38,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
@@ -56,3 +53,4 @@ [Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..ab97768b5ddc 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,12 @@
#include
#include
#include
-#include
#include
#include
#include
#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +31,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < PcdGet32 (PcdCoreCount)) {
return TRUE;
}
@@ -76,7 +74,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = PcdGet32 (PcdCoreCount);
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +119,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return PcdGet32 (PcdCoreCount);
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..59536ea9575e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -1,7 +1,7 @@
/** @file
* This file is an ACPI driver for the Qemu SBSA platform.
*
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -255,7 +255,6 @@ AddMadtTable (
// Initialize GIC Redistributor Structure
EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
- // Get CoreCount which was determined eariler after parsing device tree
NumCores = PcdGet32 (PcdCoreCount);
// Calculate the new table size based on the number of cores
@@ -291,7 +290,7 @@ AddMadtTable (
New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
// Add new GICC structures for the Cores
- for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
+ for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
@@ -758,12 +757,6 @@ InitializeSbsaQemuAcpiDxe (
{
EFI_STATUS Status;
EFI_ACPI_TABLE_PROTOCOL*AcpiTable;
- UINT32 NumCores;
-
- // Parse the device tree and get the number of CPUs
- NumCores = FdtHelperCountCpus ();
- Status = PcdSet32S (PcdCoreCount, NumCores);
- ASSERT_RETURN_ERROR (Status);
// Check if ACPI Table Protocol has been installed
Status = gBS->LocateProtocol (
--
2.44.0
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[edk2-devel] [PATCH edk2-platforms v6 4/7] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib
There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Library fallbacks to parsing DT if needed. Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 --- .../SbsaQemuHardwareInfoLib.inf | 2 + .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 4 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 -- .../SbsaQemuHardwareInfoLib.c | 104 8 files changed, 110 insertions(+), 172 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 07cb3490f4cf..bde61651da2e 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 291743b19115..9bf0a13de5d1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver modifies ACPI tables for the Qemu SBSA platform # -# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,9 +35,9 @@ [LibraryClasses] BaseLib DebugLib DxeServicesLib - FdtHelperLib PcdLib PrintLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint UefiLib UefiRuntimeServicesTableLib diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851.. --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION= 1.29 - BASE_NAME = FdtHelperLib - FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE= BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf index 8c2def1878e6..5358dd339eb3 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -27,6 +27,8 @@ [LibraryClasses] ArmSmcLib BaseMemoryLib DebugLib + FdtLib [Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215.. --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. - - @retvalMPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number -of CPUs present in it. - -@return The number of CPUs present. -**/ -EFIAPI -UINT32 -FdtHelperCountCpus ( - VOID - ); - -#endif /* FDT_HELPER_LIB_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu
[edk2-devel] [PATCH edk2-platforms v6 5/7] Platform/SbsaQemu: hang if there is no cpu information
In case we do not have cpu information (SMC call fails,
our minimal DT lacks info) we shutdown system.
Signed-off-by: Marcin Juszkiewicz
---
.../Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf| 2 ++
.../SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
index 5358dd339eb3..acf91225b4c7 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
@@ -21,6 +21,7 @@ [Packages]
ArmPkg/ArmPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
Silicon/Qemu/SbsaQemu/SbsaQemu.dec
[LibraryClasses]
@@ -28,6 +29,7 @@ [LibraryClasses]
BaseMemoryLib
DebugLib
FdtLib
+ ResetSystemLib
[Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index 6315cce3fb7f..e1f1a9588b19 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -95,7 +96,7 @@ FdtHelperCountCpus (
Node = fdt_path_offset (DeviceTreeBase, "/cpus");
if (Node <= 0) {
DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in DeviceTree\n"));
-return 0;
+ResetShutdown();
}
CpuCount = 0;
--
2.44.0
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[edk2-devel] [PATCH edk2-platforms v6 6/7] Platform/SbsaQemu: get the information of memory via SMC calls
From: Xiong Yining
Provide functions to check for memory information:
- amount of memory nodes
- memory address
- NUMA node id for memory
Values are read from TF-A using platform specific SMC calls.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 2 +-
.../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 +
.../Include/Library/SbsaQemuHardwareInfoLib.h| 28 ++
.../SbsaQemuHardwareInfoLib.c| 47 +
.../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 +---
5 files changed, 91 insertions(+), 42 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index c067a80cc715..fb856efe4c27 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -32,9 +32,9 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
- FdtLib
MemoryAllocationLib
PcdLib
+ SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index d9faee7fa5b2..e7bf54978d4e 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -16,6 +16,8 @@
#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101)
#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
+#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
+#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
/*
* SMCC does not define return codes for SiP functions.
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
index ca52c6b27093..0b71a3f7e6eb 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
@@ -9,6 +9,12 @@
#ifndef SBSA_QEMU_HARDWARE_INFO_
#define SBSA_QEMU_HARDWARE_INFO_
+typedef struct{
+ UINT32 NodeId;
+ UINT64 AddressBase;
+ UINT64 AddressSize;
+} MemoryInfo;
+
/**
Get CPU count from information passed by Qemu.
@@ -42,4 +48,26 @@ SbsaQemuGetCpuNumaNode (
IN UINTN CpuId
);
+/**
+ Get the number of memory node from device tree passed by Qemu.
+
+ @retval the number of memory nodes.
+**/
+UINT32
+SbsaQemuGetMemNodeCount (
+ VOID
+ );
+
+/**
+ Get memory infomation(node-id, addressbase, addresssize) for a given memory
node from device tree passed by Qemu.
+
+ @param [in] MemoryIdIndex of memory to retrieve memory information.
+
+ @retval memory infomation for given memory node.
+**/
+MemoryInfo
+SbsaQemuGetMemInfo (
+ IN UINTN MemoryId
+ );
+
#endif /* SBSA_QEMU_HARDWARE_INFO_ */
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index e1f1a9588b19..88b50e46c072 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -201,3 +201,50 @@ SbsaQemuGetCpuNumaNode (
return Arg0;
}
+
+UINT32
+SbsaQemuGetMemNodeCount (
+ VOID
+ )
+{
+ UINTNSmcResult;
+ UINTNArg0;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE_COUNT call failed.\n"));
+ }
+
+ DEBUG(( DEBUG_INFO, "The number of the memory nodes is %ld\n", Arg0));
+ return (UINT32)Arg0;
+}
+
+MemoryInfo
+SbsaQemuGetMemInfo (
+ IN UINTN MemoryId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ MemoryInfo MemInfo;
+
+ Arg0 = MemoryId;
+
+ SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE call failed.\n"));
+ } else {
+MemInfo.NodeId = Arg0;
+MemInfo.AddressBase = Arg1;
+MemInfo.AddressSize = Arg2;
+ }
+
+ DEBUG(( DEBUG_INFO, "NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
+ MemInfo.NodeId,
+ MemInfo.AddressBase,
+ MemInfo.AddressBase + MemInfo.AddressSize -1 ));
+
+ return MemInfo;
+}
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
index 8c2eb0b6a028..5a418a461174 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
@@ -12,7 +12,7 @@
#include
#include
#
[edk2-devel] [PATCH edk2-platforms v6 7/7] Platform/SbsaQemu: add DeviceTree fallbacks to parse memory information
From: Xiong Yining
Add the DeviceTree fallbacks to parsing the information about memory
if the related SMC calls Failed.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
---
.../SbsaQemuHardwareInfoLib.c | 106 +++-
1 file changed, 104 insertions(+), 2 deletions(-)
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index 88b50e46c072..d63cfbf7d5ef 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -118,6 +118,106 @@ FdtHelperCountCpus (
return CpuCount;
}
+/**
+ Walks through the Device Tree created by Qemu and counts the number of
Memory node present in it.
+
+ @retval the number of memory nodes.
+**/
+UINT32
+FdtHelperMemNodeCount (
+ VOID
+ )
+{
+ VOID *DeviceTreeBase;
+ CONST CHAR8 *Type;
+ UINT32MemNodeCount;
+ INT32 Node;
+ INT32 Prev;
+ INT32 Len;
+
+ DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
+ ASSERT (DeviceTreeBase != NULL);
+
+ // Make sure we have a valid device tree blob
+ ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+ MemNodeCount = 0;
+ for (Prev = 0;; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0){
+ break;
+}
+
+Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
+if (Type && AsciiStrnCmp (Type, "memory", Len) == 0) {
+ MemNodeCount++;
+}
+ }
+
+ return MemNodeCount;
+}
+
+/** Walks through the Device Tree created by Qemu and counts the adress、size
and node-id of the Memory node present in it.
+
+ @param [in] MemoryIdIndex of memory to retrieve memory information.
+
+ @retval memory infomation for given memory node.
+**/
+MemoryInfo
+FdtHelperGetMemInfo (
+ IN UINTN MemoryId
+)
+{
+ VOID *DeviceTreeBase;
+ CONST UINT64 *RegProp;
+ CONST UINT32 *NodeProp;
+ CONST CHAR8 *Type;
+ INT64 MemNodeCount;
+ INT32 Len;
+ INT32 Node;
+ INT32 Prev;
+ MemoryInfoMemInfo = {0};
+
+ DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
+ ASSERT (DeviceTreeBase != NULL);
+
+ // Make sure we have a valid device tree blob
+ ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+ MemNodeCount = 0;
+
+ for (Prev = 0;; Prev = Node){
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0){
+ break;
+}
+
+Type = fdt_getprop (DeviceTreeBase, Node, "device_type", &Len);
+if (Type && AsciiStrnCmp (Type, "memory", Len) == 0){
+ if (MemoryId == MemNodeCount){
+RegProp = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
+if (RegProp != 0 && Len == (2 * sizeof (UINT64))) {
+MemInfo.AddressBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
+MemInfo.AddressSize= fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));
+} else {
+ DEBUG ((DEBUG_ERROR, "Failed to find the address and size of the
memory"));
+}
+
+NodeProp= fdt_getprop (DeviceTreeBase, Node, "numa-node-id", &Len);
+if (NodeProp){
+ MemInfo.NodeId= fdt32_to_cpu (ReadUnaligned32 (NodeProp));
+} else {
+ DEBUG ((DEBUG_ERROR, "Failed to find the node-id of the memory"));
+}
+ }
+
+ MemNodeCount ++;
+}
+ }
+
+ return MemInfo;
+}
+
/**
Get CPU count from information passed by Qemu.
@@ -212,7 +312,8 @@ SbsaQemuGetMemNodeCount (
SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
if (SmcResult != SMC_SIP_CALL_SUCCESS) {
-DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE_COUNT call failed.\n"));
+DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We have
to get the number of memory nodes from DT.\n"));
+Arg0 = FdtHelperMemNodeCount();
}
DEBUG(( DEBUG_INFO, "The number of the memory nodes is %ld\n", Arg0));
@@ -234,7 +335,8 @@ SbsaQemuGetMemInfo (
SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
if (SmcResult != SMC_SIP_CALL_SUCCESS) {
-DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE call failed.\n"));
+DEBUG ((DEBUG_ERROR, "SIP_SVC_GET_MEMORY_NODE call failed. We have to get
memory info from DT.\n"));
+MemInfo = FdtHelperGetMemInfo(MemoryId);
} else {
MemInfo.NodeId = Arg0;
MemInfo.AddressBase = Arg1;
--
2.44.0
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[edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries to get needed SMC calls
We want to stop parsing DeviceTree (in EDK2) to gather hardware information.
Instead we ask TF-A for those details using SMC calls. On real hardware
platform it could be asking on-board Embedded Controller.
Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together
with new code for handling SMC stuff. If TF-A answer to SMC call would be not
success then we go back to parsing DeviceTree data directly. There is no DT
parsing elsewhere.
This change brings TF-A with all changes needed for it.
---
Platform/Qemu/Sbsa/Readme.md | 60 ---
Platform/Qemu/Sbsa/bl1.bin | Bin 23029 -> 23365 bytes
Platform/Qemu/Sbsa/fip.bin | Bin 82722 -> 82722 bytes
3 files changed, 28 insertions(+), 32 deletions(-)
mode change 100644 => 100755 Platform/Qemu/Sbsa/bl1.bin
diff --git a/Platform/Qemu/Sbsa/Readme.md b/Platform/Qemu/Sbsa/Readme.md
index b8759403bf05..5ed05f0f3021 100644
--- a/Platform/Qemu/Sbsa/Readme.md
+++ b/Platform/Qemu/Sbsa/Readme.md
@@ -4,55 +4,51 @@ Qemu SBSA TF-A binaries
These binaries have been created from the mainline TF-A
code checked out at the following commit ID:
-commit 84de50c7d8ca416e504aedb228bb4cab6eed806f (HEAD -> master,
origin/master, origin/integration, origin/HEAD)
-Merge: 1e038c94d 4796d2d9b
-Author: Olivier Deprez
-Date: Tue Sep 19 18:15:12 2023 +0200
+commit f36faa71578a14a8c9910aaa57e761f0256ccd52 (HEAD -> master,
origin/master, origin/integration, origin/HEAD)
+Merge: 8dad296d6 57ab6d897
+Author: Lauren Wehrmeister
+Date: Tue Mar 12 19:17:49 2024 +0100
-Merge "feat(ethos-n): update npu error handling" into integration
+Merge "fix(cpus): fix a defect in Cortex-A715 erratum 2561034" into
integration
This ensures that the following features for qemu_sbsa platform are
merged upstream and included in the build:
-commit 408cde8a59080ac2caa11c4d99474b2ef09f90df
+commit 42925c15bee09162c6dfc8c2204843ffac6201c1
Author: Marcin Juszkiewicz
-Date: Mon Sep 18 12:47:45 2023 +0200
+Date: Tue Nov 21 14:53:26 2023 +0100
-fix(qemu_sbsa): align FIP base to BL1 size
+feat(qemu-sbsa): handle CPU information
-RME patch series shown that we can build larger BL1 than we can run:
+We want to remove use of DeviceTree from EDK2. So we move
+functions to TF-A:
-NOTICE: Booting Trusted Firmware
-NOTICE: BL1: v2.9(debug):v2.9.0-736-g0854a
-NOTICE: BL1: Built : 12:10:39, Sep 18 2023
-INFO:BL1: RAM 0x3ffee000 - 0x3fffb000
-INFO:BL1: Loading BL2
-WARNING: Firmware Image Package header check failed.
+- counting cpu cores
+- checking NUMA node id
+- checking MPIDR
-RME pushed debug build BL1 over 0x8000 in size.
-This exposed an error where FIP_BASE (supposed to be at BL1_SIZE offset
-from start of flash) was actually 0x8000 and not 0x12000.
-Make sure we have space for BL1 by deriving FIP_BASE from it.
+And then it gets passed to EDK2 via SMC calls.
-Note: this is a breaking change for edk2 FD image generation, which had
-similarly hardcoded a 0x8000 offset. These images must be updated in
-lock-step.
-
-Change-Id: I8a1a85e82319945a4412c424467d818d5b6e4ecd
+Change-Id: I1c7fc234ba90ba32433b6e4aa2cf127f26da00fd
Signed-off-by: Marcin Juszkiewicz
-commit 408f9cb485796a73c5b87da70644665a13c685e4
-Author: Marcin Juszkiewicz
-Date: Fri Sep 15 22:44:04 2023 +0200
+commit 8b7dd8397dd017b61ecda8447e8956a1d9d6d5d3
+Author: Xiong Yining
+Date: Fri Jan 12 10:47:03 2024 +
-feat(qemu): add "neoverse-n2" cpu support
+feat(qemu-sbsa): handle memory information
-Add support to qemu "neoverse-n2" cpu for "qemu" platform.
-This one has 2^48 address space so will be used by both systems.
+As a part of removing DeviceTree from EDK2, we move functions to TF-A:
+
+- counting the number of memory nodes
+- checking NUMA node id
+- checking the memory address
+
+Signed-off-by: Xiong Yining
+Signed-off-by: Chen Baozi
+Change-Id: Ib7bce3a65c817a5b3bef6c9e0a459c7ce76c7e35
-Signed-off-by: Marcin Juszkiewicz
-Change-Id: I9f0fa23a4934d9464379495225e08adc121325b4
NOTE: No modifications to the source code have been done.
The binaries have been generated for the AARCH64 platform
diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
old mode 100644
new mode 100755
index
e436d077113b340c606069b575c0717775fa6d82..8eac6204b64be03036c6aabe84618a7c979e78e0
GIT binary patch
delta 7064
zcmb7HdsI_b*54-y5P4`qf*}GX0R(vp@=~-C5J#-|03+IJHKD#x>lC$vvuY>7>Wr(U
zGhR>D(1-nsqwNQL_FGoeDP8RpT05J%7OXVgUC7
z{O%Ka3P>xBAe*(%1cSR*sc-$8l387%;&)4`N=3Rr|
zn@UJEsi4-Q0^3^jqpT1tuu@jh3WZ+LrKOt{@%ipZq1K;FpZXAr7{3VZ5C%5^%~wSx*O%>DGc3E!dYv(N%!r%_?cNIBgY<|Mc1S7CEVH?@Q>BrnsN@Hynq^yTmz
z@;Lnz|8AfW5r?J?@Eil`_8)L6EVuc3S-VLMwaoxF%&#?Hr|(46kpWsbaRnJ@`}M?3
z;uKWic12p-$xmF}ia)x#O|W;c1nQ
Re: [edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries to get needed SMC calls
W dniu 14.03.2024 o 15:17, Marcin Juszkiewicz via groups.io pisze: We want to stop parsing DeviceTree (in EDK2) to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together with new code for handling SMC stuff. If TF-A answer to SMC call would be not success then we go back to parsing DeviceTree data directly. There is no DT parsing elsewhere. This change brings TF-A with all changes needed for it. Signed-off-by: Marcin Juszkiewicz I really need to enable it to be automatic... -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116753): https://edk2.groups.io/g/devel/message/116753 Mute This Topic: https://groups.io/mt/104927188/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v6 1/7] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
W dniu 14.03.2024 o 16:14, Ard Biesheuvel pisze: +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,32 @@ +#/* @file +# +# Copyright (c) Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + This is a new library class, so you should name it and define it in the associated .DEC file (which does not exist yet) You can look at Platform/Qemu/QemuOpenBoardPkg/QemuOpenBoardPkg.dec for inspiration (but please use 1.27 and not 0x00010005 for the version) Just noticed there is already a .DEC in Silicon/Qemu/SbsaQemu/ so better to put it there. I based on other libraries in Silicon/Qemu/SbsaQemu/Library/ directory. One C source file, one INF and then a line in Platform/Qemu/SbsaQemu/SbsaQemu.dsc file to tell where it is. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116814): https://edk2.groups.io/g/devel/message/116814 Mute This Topic: https://groups.io/mt/104763762/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v6 2/7] Platform/SbsaQemu: read amount of cpus during init
W dniu 14.03.2024 o 16:13, Ard Biesheuvel pisze: +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -1,7 +1,7 @@ ## @file # This driver effectuates SbsaQemu platform configuration settings # -# Copyright (c) 2019, Linaro Ltd. All rights reserved. +# Copyright (c) Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -32,6 +32,7 @@ [LibraryClasses] PcdLib DebugLib NonDiscoverableDeviceRegistrationLib + SbsaQemuHardwareInfoLib UefiDriverEntryPoint [Pcd] @@ -46,6 +47,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount [Depex] How is it guaranteed that other components will only see the correct core count? DXE dispatch is ordered using a dependency graph, so all users of this PCD should never execute before this driver. SbsaQemuPlatformDxe is a DXE, right? So it is called on platform init. At the end of initialization it calls SbsaQemuGetCpuCount() from SbsaQemuHardwareInfoLib to SET this PCD. It does not use it during platform init cause it does not require this information. But calls function to make sure that amount of cpus is known to whatever will be called later. Sure, maybe SbsaQemuHardwareInfoLib should be something else (DXE, Protocol or other EDK2 magic thing) but it is set of functions to be called from other places of EDK2. This is why PCDs suck for dynamic information, to be honest. Much better to use a protocol (DEPEXes declare dependencies on protocols, so a driver will never run before the protocols it depends on have been made available) I am still learning. Will look at other platforms. Given that this is intended as reference code, I think it is very important to get this right. Fully agree. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116815): https://edk2.groups.io/g/devel/message/116815 Mute This Topic: https://groups.io/mt/104763764/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v6 2/7] Platform/SbsaQemu: read amount of cpus during init
W dniu 15.03.2024 o 12:49, Marcin Juszkiewicz pisze: W dniu 14.03.2024 o 16:13, Ard Biesheuvel pisze: How is it guaranteed that other components will only see the correct core count? DXE dispatch is ordered using a dependency graph, so all users of this PCD should never execute before this driver. SbsaQemuPlatformDxe is a DXE, right? So it is called on platform init. At the end of initialization it calls SbsaQemuGetCpuCount() from SbsaQemuHardwareInfoLib to SET this PCD. It does not use it during platform init cause it does not require this information. But calls function to make sure that amount of cpus is known to whatever will be called later. Sure, maybe SbsaQemuHardwareInfoLib should be something else (DXE, Protocol or other EDK2 magic thing) but it is set of functions to be called from other places of EDK2. EDK2 starts and one of the first DXE called is SbsaQemuPlatformDxe one: InitializeSbsaQemuPlatformDxe: InitializeSbsaQemuPlatformDxe called InitializeSbsaQemuPlatformDxe: Got platform AHCI 6010 65536 INFO:SMC call: (0xc201) (function id: 1) INFO:Platform version requested Platform version: 0.3 INFO:SMC call: (0xc264) (function id: 100) GICD base: 0x4006 GICR base: 0x4008 INFO:SMC call: (0xc265) (function id: 101) GICI base: 0x44081000 InitializeSbsaQemuPlatformDxe: Got platform XHCI 6011 65536 INFO:SMC call: (0xc2c8) (function id: 200) We have 4 cpus. It does: - AHCI init - Platform version - GIC addresses - GIC ITS address - XHCI init - CPU count Then system boot continues with gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount being set to proper value. If replacing use of Pcd with calls to SbsaQemuGetCpuCount() look better then I can change code to make it happen. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116890): https://edk2.groups.io/g/devel/message/116890 Mute This Topic: https://groups.io/mt/104763764/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v6 2/7] Platform/SbsaQemu: read amount of cpus during init
W dniu 19.03.2024 o 12:02, Ard Biesheuvel pisze: EDK2 starts and one of the first DXE called is SbsaQemuPlatformDxe one: How is this guaranteed? DXE are generally dispatched in the order in which they appear in the FDF, but only if all DEPEX dependencies are satisfied. DEPEXes are compiled from the DXE .inf along with all its [recursive] library dependencies, so upstream changes could affect the DEPEX of SbsaQemuPlatformDxe, and therefore where it appears in the dispatch order. OK. Than it will be safer to call SbsaQemuGetCpuCount() in each place which needs CoreCount. Will adapt code. Thanks. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116892): https://edk2.groups.io/g/devel/message/116892 Mute This Topic: https://groups.io/mt/104763764/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v7 0/4] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together with new code for handling SMC stuff. There is no DT parsing anywhere. TF-A part is merged already (and we have it in edk2-non-osi): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 Patch 4 needs work to pass MemInfo as reference. Signed-off-by: Marcin Juszkiewicz --- Changes in v7: - dropped CoreCount Pcd - code calls SbsaQemuGetCpuCount() instead - dropped DT fallbacks - we have up-to-date TF-A in edk2-non-osi - system shutdowns when there is no cpu or memory information - SbsaQemuHardwareInfoLib debug calls show function names - Link to v6: https://openfw.io/edk2-devel/20240306-no-dt-for-cpu-v6-0-acd8727a1...@linaro.org Changes in v6 (Marcin Juszkiewicz): - patch 5 now shutdowns system in case of no CPU information Changes in v5 (Xiong Yining): - added missing patch - Link to v5: https://openfw.io/edk2-devel/20240131132400.3022662-1-xiongyining1...@phytium.com.cn/ Changes in v4 (Xiong Yining): - patch 6 add the support for getting the hardware information of memory via SMC calls. - patch 7 add the callback of DeviceTree when SMC calls defined on patch 6 failled. - replace FdtHelperGetMpidr() with SbsaQemuGetMpidr() on patch 4 to compile successfully. - Link to v4: https://openfw.io/edk2-devel/20240131100027.2538549-1-xiongyining1...@phytium.com.cn/ Changes in v3: - added SMC_SIP_CALL_SUCCESS - on SMC call fail tell that SMC call failed instead of blaming TF-A - hang when there is no cpu information (TODO: shutdown instead) - Link to v3: https://openfw.io/edk2-devel/20240124-no-dt-for-cpu-v3-0-5375fcf09...@linaro.org/ --- Marcin Juszkiewicz (3): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Platform/SbsaQemu: drop FdtHandlerLib Xiong Yining (1): Platform/SbsaQemu: get the information of memory via SMC calls Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 - .../SbsaQemuHardwareInfoLib.inf | 31 + .../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf| 4 +- .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 19 ++- .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 - .../Include/Library/SbsaQemuHardwareInfoLib.h | 73 ++ Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 21 +-- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 - .../SbsaQemuHardwareInfoLib.c | 146 .../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 ++-- 14 files changed, 298 insertions(+), 243 deletions(-) --- base-commit: 80ee8b861edb6a8b02a100f63bbb435499f8741a change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116895): https://edk2.groups.io/g/devel/message/116895 Mute This Topic: https://groups.io/mt/105024008/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v7 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 31 +++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 17 +++- .../Include/Library/SbsaQemuHardwareInfoLib.h| 45 + .../SbsaQemuHardwareInfoLib.c| 96 5 files changed, 187 insertions(+), 5 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..07cb3490f4cf 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..e621c422bd40 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,31 @@ +#/* @file +# +# Copyright (c) 2024, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + BaseMemoryLib + DebugLib + ResetSystemLib diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..2317c1f0ae69 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2023, Linaro Ltd. All rights reserved. +* Copyright (c) 2023-2024, Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSIONSMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICSMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h new file mode 100644 index ..2654bc823e07 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) 2024, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef SBSA_QEMU_HARDWARE_INFO_ +#define SBSA_QEMU_HARDWARE_INFO_ + +/** + Get CPU count from information passed by Qemu. + +**/ +UINT32 +SbsaQemuGetCpuCount ( + VOID + ); + +/** + Get MPIDR for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. + + @retvalMPIDR value of CPU at index +**/ +UINT64 +SbsaQemuGetMpidr ( + IN UINTN CpuId + ); + +/** + Get NUMA node id for a given cpu from device tree passed by Qemu. + + @param [in] CpuIdIndex of cpu to retrieve NUMA node id for. + + @retvalNUMA node id for CPU at index +**/ +UINT64 +SbsaQemuGetCpuNumaNode ( + IN UINTN CpuId + ); + +#endif /* SBSA_QEMU_HARDWARE_INFO_ */ diff
[edk2-devel] [PATCH edk2-platforms v7 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information
We have SbsaQemuHardwareInfoLib to ask for hardware details. No need to
parse DeviceTree anymore.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 ++---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 4 ++--
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +-
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 21 +++-
5 files changed, 18 insertions(+), 29 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..b09ccf93fa63 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2018-2024, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,10 +29,9 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
IoLib
PcdLib
+ SbsaQemuHardwareInfoLib
[Guids]
gZeroGuid
@@ -40,7 +39,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 291743b19115..fded56c3f17e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -1,7 +1,7 @@
## @file
# This driver modifies ACPI tables for the Qemu SBSA platform
#
-# Copyright (c) 2020, Linaro Ltd. All rights reserved.
+# Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -35,16 +35,15 @@ [LibraryClasses]
BaseLib
DebugLib
DxeServicesLib
- FdtHelperLib
PcdLib
PrintLib
+ SbsaQemuHardwareInfoLib
UefiDriverEntryPoint
UefiLib
UefiRuntimeServicesTableLib
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdGicDistributorBase
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index c067a80cc715..07e6bc4e9b11 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -1,6 +1,6 @@
#/* @file
#
-# Copyright (c) 2019, Linaro Limited. All rights reserved.
+# Copyright (c) 2019-2024, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -32,9 +32,9 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
- FdtLib
MemoryAllocationLib
PcdLib
+ SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..2cfd2a7c6469 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,13 @@
#include
#include
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +32,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < SbsaQemuGetCpuCount ()) {
return TRUE;
}
@@ -76,7 +75,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = SbsaQemuGetCpuCount ();
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +120,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return SbsaQemuGetCpuCount ();
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..54f00ae83672 100644
--- a/Silicon/Qemu/Sbsa
[edk2-devel] [PATCH edk2-platforms v7 3/4] Platform/SbsaQemu: drop FdtHandlerLib
There is no need for EDK2 to know that there is DeviceTree around.
All hardware information is read using functions from
SbsaQemuHardwareInfoLib library.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 -
.../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 ---
Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h | 36 ---
.../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c | 98
4 files changed, 168 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index 07cb3490f4cf..bde61651da2e 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -126,7 +126,6 @@ [LibraryClasses.common]
# ARM PL011 UART Driver
PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
- FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
deleted file mode 100644
index 9c059f3e5851..
--- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
+++ /dev/null
@@ -1,33 +0,0 @@
-#/** @file
-#
-# Component description file for FdtHelperLib module
-#
-# Copyright (c) 2021, NUVIA Inc. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-#**/
-
-[Defines]
- INF_VERSION= 1.29
- BASE_NAME = FdtHelperLib
- FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875
- MODULE_TYPE= BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = FdtHelperLib
-
-[Sources.common]
- FdtHelperLib.c
-
-[Packages]
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
- Silicon/Qemu/SbsaQemu/SbsaQemu.dec
-
-[LibraryClasses]
- DebugLib
- FdtLib
- PcdLib
-
-[FixedPcd]
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
deleted file mode 100644
index ea9159857215..
--- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/** @file
-* FdtHelperLib.h
-*
-* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#ifndef FDT_HELPER_LIB_
-#define FDT_HELPER_LIB_
-
-/**
- Get MPIDR for a given cpu from device tree passed by Qemu.
-
- @param [in] CpuIdIndex of cpu to retrieve MPIDR value for.
-
- @retvalMPIDR value of CPU at index
-**/
-UINT64
-FdtHelperGetMpidr (
- IN UINTN CpuId
- );
-
-/** Walks through the Device Tree created by Qemu and counts the number
-of CPUs present in it.
-
-@return The number of CPUs present.
-**/
-EFIAPI
-UINT32
-FdtHelperCountCpus (
- VOID
- );
-
-#endif /* FDT_HELPER_LIB_ */
diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
deleted file mode 100644
index 7fdfb055db76..
--- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/** @file
-* FdtHelperLib.c
-*
-* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include
-#include
-#include
-#include
-#include
-
-STATIC INT32 mFdtFirstCpuOffset;
-STATIC INT32 mFdtCpuNodeSize;
-
-/**
- Get MPIDR for a given cpu from device tree passed by Qemu.
-
- @param [in] CpuIdIndex of cpu to retrieve MPIDR value for.
-
- @retvalMPIDR value of CPU at index
-**/
-UINT64
-FdtHelperGetMpidr (
- IN UINTN CpuId
- )
-{
- VOID *DeviceTreeBase;
- CONST UINT64 *RegVal;
- INT32 Len;
-
- DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
- ASSERT (DeviceTreeBase != NULL);
-
- RegVal = fdt_getprop (DeviceTreeBase,
- mFdtFirstCpuOffset + (CpuId * mFdtCpuNodeSize),
- "reg",
- &Len);
- if (!RegVal) {
-DEBUG ((DEBUG_ERROR, "Couldn't find reg property for CPU:%d\n", CpuId));
-return 0;
- }
-
- return (fdt64_to_cpu (ReadUnaligned64 (RegVal)));
-}
-
-/** Walks through the Device Tree created by Qemu and counts the number
-of CPUs present in it.
-
-@return The number of CPUs present.
-**/
-EFIAPI
-UINT32
-FdtHelperCountCpus (
- VOID
- )
-{
- VOID *DeviceTreeBase;
- INT32 Node;
- INT32 Prev;
- INT32 CpuNode;
- UINT32 CpuCount;
-
- DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
- ASSERT (DeviceTreeBase != NULL);
-
- // Make sure we have a val
[edk2-devel] [PATCH edk2-platforms v7 4/4] Platform/SbsaQemu: get the information of memory via SMC calls
From: Xiong Yining
Provide functions to check for memory information:
- amount of memory nodes
- memory address
- NUMA node id for memory
Values are read from TF-A using platform specific SMC calls.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 +
.../Include/Library/SbsaQemuHardwareInfoLib.h| 28 ++
.../SbsaQemuHardwareInfoLib.c| 50 ++
.../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 +---
4 files changed, 93 insertions(+), 41 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index 2317c1f0ae69..e3092007d27d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -16,6 +16,8 @@
#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101)
#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
+#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
+#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
/*
* SMCC does not define return codes for SiP functions.
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
index 2654bc823e07..c896c6a77436 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
@@ -9,6 +9,12 @@
#ifndef SBSA_QEMU_HARDWARE_INFO_
#define SBSA_QEMU_HARDWARE_INFO_
+typedef struct{
+ UINT32 NodeId;
+ UINT64 AddressBase;
+ UINT64 AddressSize;
+} MemoryInfo;
+
/**
Get CPU count from information passed by Qemu.
@@ -42,4 +48,26 @@ SbsaQemuGetCpuNumaNode (
IN UINTN CpuId
);
+/**
+ Get the number of memory node from device tree passed by Qemu.
+
+ @retval the number of memory nodes.
+**/
+UINT32
+SbsaQemuGetMemNodeCount (
+ VOID
+ );
+
+/**
+ Get memory infomation(node-id, addressbase, addresssize) for a given memory
node from device tree passed by Qemu.
+
+ @param [in] MemoryIdIndex of memory to retrieve memory information.
+
+ @retval memory infomation for given memory node.
+**/
+MemoryInfo
+SbsaQemuGetMemInfo (
+ IN UINTN MemoryId
+ );
+
#endif /* SBSA_QEMU_HARDWARE_INFO_ */
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index a1c208647818..a94fdcb55bb9 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -94,3 +94,53 @@ SbsaQemuGetCpuNumaNode (
return Arg0;
}
+
+UINT32
+SbsaQemuGetMemNodeCount (
+ VOID
+ )
+{
+ UINTNSmcResult;
+ UINTNArg0;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We
have no memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ }
+
+ DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n",
__FUNCTION__, Arg0));
+ return (UINT32)Arg0;
+}
+
+MemoryInfo
+SbsaQemuGetMemInfo (
+ IN UINTN MemoryId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ MemoryInfo MemInfo;
+
+ Arg0 = MemoryId;
+
+ SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have no
memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ } else {
+MemInfo.NodeId = Arg0;
+MemInfo.AddressBase = Arg1;
+MemInfo.AddressSize = Arg2;
+ }
+
+ DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
+ __FUNCTION__,
+ MemInfo.NodeId,
+ MemInfo.AddressBase,
+ MemInfo.AddressBase + MemInfo.AddressSize -1 ));
+
+ return MemInfo;
+}
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
index 8c2eb0b6a028..5a418a461174 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c
@@ -12,7 +12,7 @@
#include
#include
#include
-#include
+#include
// Number of Virtual Memory Map Descriptors
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
@@ -23,53 +23,25 @@ SbsaQemuLibConstructor (
VOID
)
{
- VOID *DeviceTreeBase;
- INT32 Node, Prev;
UINT64
Re: [edk2-devel] [PATCH edk2-platforms v7 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
W dniu 19.03.2024 o 17:53, Ard Biesheuvel pisze: new file mode 100644 index ..e621c422bd40 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,31 @@ +#/* @file +# +# Copyright (c) 2024, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + Please define a suitable library class and add it to the Silicon/Qemu/SbsaQemu/SbsaQemu.dec, as I mentioned in the previous round of review. I have to admit that after looking at edk2 wiki [1] I start to wonder is there any useful documentation for doing things in EDK2. 1. https://github.com/tianocore/tianocore.github.io/wiki There are fat specs describing fields in DSC/DEC/DFD/FDF/ETC/INF/WTH files, info how to clone and setup code from repo, how to build it. https://github.com/tianocore/tianocore.github.io/wiki/EDK2-Libraries is terrible. Written by someone who knows EDK2 but do not know how to write any useful documentation. There should be examples with complete code. Even if it is PrintHelloWorld library class. After doing some experiments I have a feeling that LIBRARY_CLASS field in INF file is only checked for presence. If I use HaveNoIdeaWhatToWriteHere as value then code builds and works the same as it was with ArmPlatformLib. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116935): https://edk2.groups.io/g/devel/message/116935 Mute This Topic: https://groups.io/mt/105024010/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v8 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 2 + Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 29 ++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 17 +++- .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 45 + .../SbsaQemuHardwareInfoLib.c| 96 6 files changed, 187 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 913d1d75ef29..427ff8b31aac 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -12,6 +12,8 @@ [Defines] PACKAGE_GUID = 8db32c5a-2821-43e2-b4ac-bc148e2b0b05 PACKAGE_VERSION= 0.1 +[LibraryClasses] +HardwareInfoLib|Include/Library/HardwareInfoLib.h # # Include Section - list of Include Paths that are provided by this package. diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..3c3d2449bff4 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..2acb2a1e7c76 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,29 @@ +#/* @file +# +# Copyright (c) 2024, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = HardwareInfoLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + ResetSystemLib diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..2317c1f0ae69 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2023, Linaro Ltd. All rights reserved. +* Copyright (c) 2023-2024, Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSIONSMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICSMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h new file mode 100644 index ..9c7281f123d2 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) 2024, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef HARDWARE_INFO_LIB +#define HARDWARE_INFO_LIB + +/** + Get CPU count from information passed by Qemu. + +**/ +UINT32 +GetCpuCount ( + VOID
[edk2-devel] [PATCH edk2-platforms v8 0/4] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together with new code for handling SMC stuff. There is no DT parsing anywhere. TF-A part is merged already (and we have it in edk2-non-osi): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 Patch 4 needs work to pass MemInfo as reference. Signed-off-by: Marcin Juszkiewicz --- Changes in v8: - added HardwareInfoLib library class - created SbsaQemuHardwareInfoLib as HardwareInfoLib - dropped SbsaQemu from functions (to keep HardwareInfoLib class generic) - Link to v7: https://openfw.io/edk2-devel/20240319-no-dt-for-cpu-v7-0-ac0a57a23...@linaro.org Changes in v7: - dropped CoreCount Pcd - code calls SbsaQemuGetCpuCount() instead - dropped DT fallbacks - we have up-to-date TF-A in edk2-non-osi - system shutdowns when there is no cpu or memory information - SbsaQemuHardwareInfoLib debug calls show function names - Link to v6: https://openfw.io/edk2-devel/20240306-no-dt-for-cpu-v6-0-acd8727a1...@linaro.org Changes in v6 (Marcin Juszkiewicz): - patch 5 now shutdowns system in case of no CPU information Changes in v5 (Xiong Yining): - added missing patch - Link to v5: https://openfw.io/edk2-devel/20240131132400.3022662-1-xiongyining1...@phytium.com.cn/ Changes in v4 (Xiong Yining): - patch 6 add the support for getting the hardware information of memory via SMC calls. - patch 7 add the callback of DeviceTree when SMC calls defined on patch 6 failled. - replace FdtHelperGetMpidr() with SbsaQemuGetMpidr() on patch 4 to compile successfully. - Link to v4: https://openfw.io/edk2-devel/20240131100027.2538549-1-xiongyining1...@phytium.com.cn/ Changes in v3: - added SMC_SIP_CALL_SUCCESS - on SMC call fail tell that SMC call failed instead of blaming TF-A - hang when there is no cpu information (TODO: shutdown instead) - Link to v3: https://openfw.io/edk2-devel/20240124-no-dt-for-cpu-v3-0-5375fcf09...@linaro.org/ --- Marcin Juszkiewicz (3): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Platform/SbsaQemu: drop FdtHandlerLib Xiong Yining (1): Platform/SbsaQemu: get the information of memory via SMC calls Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 2 + Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 4 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 +- .../SbsaQemuHardwareInfoLib.inf | 29 .../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf| 5 +- .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 19 ++- .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 73 ++ Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 21 +-- .../SbsaQemuHardwareInfoLib.c | 146 .../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 ++-- 12 files changed, 298 insertions(+), 77 deletions(-) --- base-commit: 80ee8b861edb6a8b02a100f63bbb435499f8741a change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116937): https://edk2.groups.io/g/devel/message/116937 Mute This Topic: https://groups.io/mt/105044059/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v8 3/4] Platform/SbsaQemu: drop FdtHandlerLib
There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 - 1 file changed, 1 deletion(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 3c3d2449bff4..5ed6b684c246 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -126,7 +126,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116938): https://edk2.groups.io/g/devel/message/116938 Mute This Topic: https://groups.io/mt/105044062/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v8 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information
We have SbsaQemuHardwareInfoLib to ask for hardware details. No need to
parse DeviceTree anymore.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 ++---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 4 ++--
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +-
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 21 +++-
5 files changed, 18 insertions(+), 29 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..f959d8e0e4ee 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2018-2024, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,8 +29,7 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
+ HardwareInfoLib
IoLib
PcdLib
@@ -40,7 +39,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 291743b19115..727c8e82d16e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -1,7 +1,7 @@
## @file
# This driver modifies ACPI tables for the Qemu SBSA platform
#
-# Copyright (c) 2020, Linaro Ltd. All rights reserved.
+# Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -35,7 +35,7 @@ [LibraryClasses]
BaseLib
DebugLib
DxeServicesLib
- FdtHelperLib
+ HardwareInfoLib
PcdLib
PrintLib
UefiDriverEntryPoint
@@ -44,7 +44,6 @@ [LibraryClasses]
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdGicDistributorBase
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index c067a80cc715..07e6bc4e9b11 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -1,6 +1,6 @@
#/* @file
#
-# Copyright (c) 2019, Linaro Limited. All rights reserved.
+# Copyright (c) 2019-2024, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -32,9 +32,9 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
- FdtLib
MemoryAllocationLib
PcdLib
+ SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..854f6f4072d5 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,13 @@
#include
#include
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +32,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < GetCpuCount ()) {
return TRUE;
}
@@ -76,7 +75,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = GetCpuCount ();
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +120,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return GetCpuCount ();
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..4ebe2a445344 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/Sbsa
[edk2-devel] [PATCH edk2-platforms v8 4/4] Platform/SbsaQemu: get the information of memory via SMC calls
From: Xiong Yining
Provide functions to check for memory information:
- amount of memory nodes
- memory address
- NUMA node id for memory
Values are read from TF-A using platform specific SMC calls.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 3 +-
.../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 +
.../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 28 ++
.../SbsaQemuHardwareInfoLib.c| 50 ++
.../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 +---
5 files changed, 94 insertions(+), 43 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index 07e6bc4e9b11..384cbb349200 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -32,14 +32,13 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
+ HardwareInfoLib
MemoryAllocationLib
PcdLib
- SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
[FixedPcd]
gArmTokenSpaceGuid.PcdFdBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index 2317c1f0ae69..e3092007d27d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -16,6 +16,8 @@
#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101)
#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
+#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
+#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
/*
* SMCC does not define return codes for SiP functions.
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
index 9c7281f123d2..c7d397c590a8 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
@@ -9,6 +9,12 @@
#ifndef HARDWARE_INFO_LIB
#define HARDWARE_INFO_LIB
+typedef struct{
+ UINT32 NodeId;
+ UINT64 AddressBase;
+ UINT64 AddressSize;
+} MemoryInfo;
+
/**
Get CPU count from information passed by Qemu.
@@ -42,4 +48,26 @@ GetCpuNumaNode (
IN UINTN CpuId
);
+/**
+ Get the number of memory node from device tree passed by Qemu.
+
+ @retval the number of memory nodes.
+**/
+UINT32
+GetMemNodeCount (
+ VOID
+ );
+
+/**
+ Get memory infomation(node-id, addressbase, addresssize) for a given memory
node from device tree passed by Qemu.
+
+ @param [in] MemoryIdIndex of memory to retrieve memory information.
+
+ @retval memory infomation for given memory node.
+**/
+MemoryInfo
+GetMemInfo (
+ IN UINTN MemoryId
+ );
+
#endif /* HARDWARE_INFO_LIB */
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index e96328978a55..4f49ae7e1862 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -94,3 +94,53 @@ GetCpuNumaNode (
return Arg0;
}
+
+UINT32
+GetMemNodeCount (
+ VOID
+ )
+{
+ UINTNSmcResult;
+ UINTNArg0;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We
have no memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ }
+
+ DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n",
__FUNCTION__, Arg0));
+ return (UINT32)Arg0;
+}
+
+MemoryInfo
+GetMemInfo (
+ IN UINTN MemoryId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ MemoryInfo MemInfo;
+
+ Arg0 = MemoryId;
+
+ SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have no
memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ } else {
+MemInfo.NodeId = Arg0;
+MemInfo.AddressBase = Arg1;
+MemInfo.AddressSize = Arg2;
+ }
+
+ DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
+ __FUNCTION__,
+ MemInfo.NodeId,
+ MemInfo.AddressBase,
+ MemInfo.AddressBase + MemInfo.AddressSize -1 ));
+
[edk2-devel] [PATCH edk2-platforms v9 0/4] get rid of DeviceTree from SbsaQemu
We want to stop parsing DeviceTree to gather hardware information. Instead we ask TF-A for those details using SMC calls. On real hardware platform it could be asking on-board Embedded Controller. Hardware information (CPU, Memory) is now in SbsaQemuHardwareInfoLib together with new code for handling SMC stuff. There is no DT parsing anywhere. TF-A part is merged already (and we have it in edk2-non-osi): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25707 Patch 4 needs work to pass MemInfo as reference. Signed-off-by: Marcin Juszkiewicz --- Changes in v9: - recreated 3rd patch to drop all traces of Device Tree use - Link to v8: https://openfw.io/edk2-devel/20240320-no-dt-for-cpu-v8-0-599ba9986...@linaro.org Changes in v8: - added HardwareInfoLib library class - created SbsaQemuHardwareInfoLib as HardwareInfoLib - dropped SbsaQemu from functions (to keep HardwareInfoLib class generic) - Link to v7: https://openfw.io/edk2-devel/20240319-no-dt-for-cpu-v7-0-ac0a57a23...@linaro.org Changes in v7: - dropped CoreCount Pcd - code calls SbsaQemuGetCpuCount() instead - dropped DT fallbacks - we have up-to-date TF-A in edk2-non-osi - system shutdowns when there is no cpu or memory information - SbsaQemuHardwareInfoLib debug calls show function names - Link to v6: https://openfw.io/edk2-devel/20240306-no-dt-for-cpu-v6-0-acd8727a1...@linaro.org Changes in v6 (Marcin Juszkiewicz): - patch 5 now shutdowns system in case of no CPU information Changes in v5 (Xiong Yining): - added missing patch - Link to v5: https://openfw.io/edk2-devel/20240131132400.3022662-1-xiongyining1...@phytium.com.cn/ Changes in v4 (Xiong Yining): - patch 6 add the support for getting the hardware information of memory via SMC calls. - patch 7 add the callback of DeviceTree when SMC calls defined on patch 6 failled. - replace FdtHelperGetMpidr() with SbsaQemuGetMpidr() on patch 4 to compile successfully. - Link to v4: https://openfw.io/edk2-devel/20240131100027.2538549-1-xiongyining1...@phytium.com.cn/ Changes in v3: - added SMC_SIP_CALL_SUCCESS - on SMC call fail tell that SMC call failed instead of blaming TF-A - hang when there is no cpu information (TODO: shutdown instead) - Link to v3: https://openfw.io/edk2-devel/20240124-no-dt-for-cpu-v3-0-5375fcf09...@linaro.org/ --- Marcin Juszkiewicz (3): Platform/SbsaQemu: add SbsaQemuHardwareInfoLib Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information Platform/SbsaQemu: drop use of DeviceTree Xiong Yining (1): Platform/SbsaQemu: get the information of memory via SMC calls Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 3 +- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 9 +- Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf| 6 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 +- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 - .../SbsaQemuHardwareInfoLib.inf | 29 .../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf| 5 +- .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 19 ++- .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h| 36 - .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 73 ++ Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 21 +-- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 2 - .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c| 98 - .../SbsaQemuHardwareInfoLib.c | 146 .../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 ++-- 16 files changed, 298 insertions(+), 252 deletions(-) --- base-commit: 80ee8b861edb6a8b02a100f63bbb435499f8741a change-id: 20240115-no-dt-for-cpu-2c511393df93 Best regards, -- Marcin Juszkiewicz -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117056): https://edk2.groups.io/g/devel/message/117056 Mute This Topic: https://groups.io/mt/105088434/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v9 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
This library provides functions to check for hardware information. For now it covers CPU ones: - amount of cpu cores - MPIDR value for cpu core - NUMA node id for cpu core Values are read from TF-A using platform specific SMC calls. Signed-off-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 2 + Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 +- .../SbsaQemuHardwareInfoLib.inf | 29 ++ .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 17 +++- .../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 45 + .../SbsaQemuHardwareInfoLib.c| 96 6 files changed, 187 insertions(+), 5 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 913d1d75ef29..427ff8b31aac 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -12,6 +12,8 @@ [Defines] PACKAGE_GUID = 8db32c5a-2821-43e2-b4ac-bc148e2b0b05 PACKAGE_VERSION= 0.1 +[LibraryClasses] +HardwareInfoLib|Include/Library/HardwareInfoLib.h # # Include Section - list of Include Paths that are provided by this package. diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 378600050df9..3c3d2449bff4 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -1,6 +1,6 @@ # # Copyright (c) 2021, NUVIA Inc. All rights reserved. -# Copyright (c) 2019, Linaro Limited. All rights reserved. +# Copyright (c) 2019-2024, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -128,6 +128,7 @@ [LibraryClasses.common] FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf + HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf # Debug Support PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf new file mode 100644 index ..2acb2a1e7c76 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -0,0 +1,29 @@ +#/* @file +# +# Copyright (c) 2024, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION= 0x0001001c + BASE_NAME = SbsaQemuHardwareInfoLib + FILE_GUID = 6454006f-6502-46e2-9be4-4bba8d4b29fb + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = HardwareInfoLib + +[Sources] + SbsaQemuHardwareInfoLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmSmcLib + ResetSystemLib diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7934875e4aba..2317c1f0ae69 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2023, Linaro Ltd. All rights reserved. +* Copyright (c) 2023-2024, Linaro Ltd. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -11,8 +11,17 @@ #include -#define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) -#define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) -#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_VERSIONSMC_SIP_FUNCTION_ID(1) +#define SIP_SVC_GET_GICSMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101) +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200) +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201) + +/* + * SMCC does not define return codes for SiP functions. + * We use Architecture ones then. + */ + +#define SMC_SIP_CALL_SUCCESS SMC_ARCH_CALL_SUCCESS #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h new file mode 100644 index ..9c7281f123d2 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h @@ -0,0 +1,45 @@ +/** @file +* +* Copyright (c) 2024, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#ifndef HARDWARE_INFO_LIB +#define HARDWARE_INFO_LIB + +/** + Get CPU count from information passed by Qemu. + +**/ +UINT32 +GetCpuCount ( + VOID
[edk2-devel] [PATCH edk2-platforms v9 2/4] Platform/SbsaQemu: use SbsaQemuHardwareInfoLib for cpu information
We have SbsaQemuHardwareInfoLib to ask for hardware details. No need to
parse DeviceTree anymore.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 5 ++---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 4 ++--
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 11 +-
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c| 21 +++-
5 files changed, 18 insertions(+), 29 deletions(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
index a34f54d431d4..f959d8e0e4ee 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -3,7 +3,7 @@
#
#Copyright (c) 2021, NUVIA Inc. All rights reserved.
#Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2018, Linaro Limited. All rights reserved.
+#Copyright (c) 2018-2024, Linaro Ltd. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,8 +29,7 @@ [Packages]
[LibraryClasses]
BaseMemoryLib
- FdtLib
- FdtHelperLib
+ HardwareInfoLib
IoLib
PcdLib
@@ -40,7 +39,6 @@ [Guids]
[Pcd]
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemBiosRelease
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
index 291743b19115..727c8e82d16e 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
@@ -1,7 +1,7 @@
## @file
# This driver modifies ACPI tables for the Qemu SBSA platform
#
-# Copyright (c) 2020, Linaro Ltd. All rights reserved.
+# Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -35,7 +35,7 @@ [LibraryClasses]
BaseLib
DebugLib
DxeServicesLib
- FdtHelperLib
+ HardwareInfoLib
PcdLib
PrintLib
UefiDriverEntryPoint
@@ -44,7 +44,6 @@ [LibraryClasses]
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdGicDistributorBase
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index c067a80cc715..07e6bc4e9b11 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -1,6 +1,6 @@
#/* @file
#
-# Copyright (c) 2019, Linaro Limited. All rights reserved.
+# Copyright (c) 2019-2024, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -32,9 +32,9 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
- FdtLib
MemoryAllocationLib
PcdLib
+ SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
index c38f2851904f..854f6f4072d5 100644
--- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -2,7 +2,7 @@
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+* Copyright (c) 2020-2024, Linaro Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -12,14 +12,13 @@
#include
#include
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
-#include
/** Returns whether the specified processor is present or not.
@@ -33,7 +32,7 @@ OemIsProcessorPresent (
UINTN ProcessorIndex
)
{
- if (ProcessorIndex < FdtHelperCountCpus ()) {
+ if (ProcessorIndex < GetCpuCount ()) {
return TRUE;
}
@@ -76,7 +75,7 @@ OemGetProcessorInformation (
{
UINT16 ProcessorCount;
- ProcessorCount = FdtHelperCountCpus ();
+ ProcessorCount = GetCpuCount ();
if (ProcessorIndex < ProcessorCount) {
ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
@@ -121,7 +120,7 @@ OemGetMaxProcessors (
VOID
)
{
- return FdtHelperCountCpus ();
+ return GetCpuCount ();
}
/** Gets information about the cache at the specified cache level.
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 9fb17151d7b8..4ebe2a445344 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/Sbsa
[edk2-devel] [PATCH edk2-platforms v9 3/4] Platform/SbsaQemu: drop use of DeviceTree
There is no need for EDK2 to know that there is DeviceTree around. All hardware information is read using functions from SbsaQemuHardwareInfoLib library. Signed-off-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 1 - Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 -- .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf | 33 --- Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h | 36 --- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c| 2 - .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c | 98 6 files changed, 176 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 427ff8b31aac..8f3533800767 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -36,7 +36,6 @@ [PcdsFixedAtBuild.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x1|UINT32|0x0002 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x0003 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x1|UINT32|0x0004 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x100|UINT64|0x0005 # PCDs complementing PCIe layout pulled into ACPI tables # Limit = Base + Size - 1 diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 3c3d2449bff4..3d748e289b51 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -80,7 +80,6 @@ [LibraryClasses.common] FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf - FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf @@ -126,7 +125,6 @@ [LibraryClasses.common] # ARM PL011 UART Driver PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf - FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf HardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf @@ -430,9 +428,6 @@ [PcdsFixedAtBuild.common] # gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 - # Initial Device Tree Location - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x100 - # Non discoverable devices (AHCI,XHCI) gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0x6010 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x0001 @@ -731,7 +726,6 @@ [Components.common] # ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf - EmbeddedPkg/Library/FdtLib/FdtLib.inf MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuSmbiosDxe/SbsaQemuSmbiosDxe.inf diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf deleted file mode 100644 index 9c059f3e5851.. --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# -# Component description file for FdtHelperLib module -# -# Copyright (c) 2021, NUVIA Inc. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -#**/ - -[Defines] - INF_VERSION= 1.29 - BASE_NAME = FdtHelperLib - FILE_GUID = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875 - MODULE_TYPE= BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = FdtHelperLib - -[Sources.common] - FdtHelperLib.c - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - Silicon/Qemu/SbsaQemu/SbsaQemu.dec - -[LibraryClasses] - DebugLib - FdtLib - PcdLib - -[FixedPcd] - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h deleted file mode 100644 index ea9159857215.. --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* FdtHelperLib.h -* -* Copyright (c) 2021, NUVIA Inc. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#ifndef FDT_HELPER_LIB_ -#define FDT_HELPER_LIB_ - -/** - Get MPIDR for a given cpu from device tree passed by Qemu. - - @param [in] CpuIdIndex of cpu to retrieve MPIDR value for. - - @retvalMPIDR value of CPU at index -**/ -UINT64 -FdtHelperGetMpidr ( - IN UINTN CpuId - ); - -/** Walks through the Device Tree created by Qemu and counts the number
[edk2-devel] [PATCH edk2-platforms v9 4/4] Platform/SbsaQemu: get the information of memory via SMC calls
From: Xiong Yining
Provide functions to check for memory information:
- amount of memory nodes
- memory address
- NUMA node id for memory
Values are read from TF-A using platform specific SMC calls.
Signed-off-by: Xiong Yining
Signed-off-by: Chen Baozi
Signed-off-by: Marcin Juszkiewicz
---
.../SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf | 3 +-
.../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h | 2 +
.../Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h | 28 ++
.../SbsaQemuHardwareInfoLib.c| 50 ++
.../Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c | 54 +---
5 files changed, 94 insertions(+), 43 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
index 07e6bc4e9b11..384cbb349200 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf
@@ -32,14 +32,13 @@ [LibraryClasses]
ArmLib
BaseMemoryLib
DebugLib
+ HardwareInfoLib
MemoryAllocationLib
PcdLib
- SbsaQemuHardwareInfoLib
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
[FixedPcd]
gArmTokenSpaceGuid.PcdFdBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
index 2317c1f0ae69..e3092007d27d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
+++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
@@ -16,6 +16,8 @@
#define SIP_SVC_GET_GIC_ITSSMC_SIP_FUNCTION_ID(101)
#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
+#define SIP_SVC_GET_MEMORY_NODE_COUNT SMC_SIP_FUNCTION_ID(300)
+#define SIP_SVC_GET_MEMORY_NODE SMC_SIP_FUNCTION_ID(301)
/*
* SMCC does not define return codes for SiP functions.
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
index 9c7281f123d2..c7d397c590a8 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/HardwareInfoLib.h
@@ -9,6 +9,12 @@
#ifndef HARDWARE_INFO_LIB
#define HARDWARE_INFO_LIB
+typedef struct{
+ UINT32 NodeId;
+ UINT64 AddressBase;
+ UINT64 AddressSize;
+} MemoryInfo;
+
/**
Get CPU count from information passed by Qemu.
@@ -42,4 +48,26 @@ GetCpuNumaNode (
IN UINTN CpuId
);
+/**
+ Get the number of memory node from device tree passed by Qemu.
+
+ @retval the number of memory nodes.
+**/
+UINT32
+GetMemNodeCount (
+ VOID
+ );
+
+/**
+ Get memory infomation(node-id, addressbase, addresssize) for a given memory
node from device tree passed by Qemu.
+
+ @param [in] MemoryIdIndex of memory to retrieve memory information.
+
+ @retval memory infomation for given memory node.
+**/
+MemoryInfo
+GetMemInfo (
+ IN UINTN MemoryId
+ );
+
#endif /* HARDWARE_INFO_LIB */
diff --git
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index e96328978a55..4f49ae7e1862 100644
---
a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++
b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -94,3 +94,53 @@ GetCpuNumaNode (
return Arg0;
}
+
+UINT32
+GetMemNodeCount (
+ VOID
+ )
+{
+ UINTNSmcResult;
+ UINTNArg0;
+
+ SmcResult = ArmCallSmc0 (SIP_SVC_GET_MEMORY_NODE_COUNT, &Arg0, NULL, NULL);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE_COUNT call failed. We
have no memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ }
+
+ DEBUG (( DEBUG_INFO, "%a: The number of the memory nodes is %ld\n",
__FUNCTION__, Arg0));
+ return (UINT32)Arg0;
+}
+
+MemoryInfo
+GetMemInfo (
+ IN UINTN MemoryId
+ )
+{
+ UINTN SmcResult;
+ UINTN Arg0;
+ UINTN Arg1;
+ UINTN Arg2;
+ MemoryInfo MemInfo;
+
+ Arg0 = MemoryId;
+
+ SmcResult = ArmCallSmc1 (SIP_SVC_GET_MEMORY_NODE, &Arg0, &Arg1, &Arg2);
+ if (SmcResult != SMC_SIP_CALL_SUCCESS) {
+DEBUG ((DEBUG_ERROR, "%a: SIP_SVC_GET_MEMORY_NODE call failed. We have no
memory information.\n", __FUNCTION__));
+ResetShutdown ();
+ } else {
+MemInfo.NodeId = Arg0;
+MemInfo.AddressBase = Arg1;
+MemInfo.AddressSize = Arg2;
+ }
+
+ DEBUG(( DEBUG_INFO, "%a: NUMA node for System RAM:%d = 0x%lx - 0x%lx\n",
+ __FUNCTION__,
+ MemInfo.NodeId,
+ MemInfo.AddressBase,
+ MemInfo.AddressBase + MemInfo.AddressSize -1 ));
+
[edk2-devel] [PATCH edk2-platforms 1/1] Maintainers.txt: add myself as QemuSbsa maintainer
With all changes going around sbsa-ref/QemuSbsa platform Leif suggested that I should become maintainer as well. My GitHub account name is "hrw". Signed-off-by: Marcin Juszkiewicz --- Maintainers.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index e57c32f16a05..a37fc9e60723 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -383,8 +383,8 @@ F: Platform/Qemu/SbsaQemu/ F: Silicon/Qemu/SbsaQemu/ M: Ard Biesheuvel M: Leif Lindholm +M: Marcin Juszkiewicz R: Graeme Gregory -R: Marcin Juszkiewicz Raspberry Pi platforms and silicon F: Platform/RaspberryPi/ -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117107): https://edk2.groups.io/g/devel/message/117107 Mute This Topic: https://groups.io/mt/105155999/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 1/1] Maintainers.txt: add myself as QemuSbsa maintainer
With all changes going around sbsa-ref/QemuSbsa platform Leif suggested that I should become maintainer as well. My GitHub account name is "hrw". Signed-off-by: Marcin Juszkiewicz --- Maintainers.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Maintainers.txt b/Maintainers.txt index e57c32f16a05..ca36aa679470 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -383,8 +383,8 @@ F: Platform/Qemu/SbsaQemu/ F: Silicon/Qemu/SbsaQemu/ M: Ard Biesheuvel M: Leif Lindholm +M: Marcin Juszkiewicz [hrw] R: Graeme Gregory -R: Marcin Juszkiewicz Raspberry Pi platforms and silicon F: Platform/RaspberryPi/ -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117110): https://edk2.groups.io/g/devel/message/117110 Mute This Topic: https://groups.io/mt/105156582/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v3 1/1] SbsaQemu: add memory space for the high memory nodes
W dniu 20.02.2024 o 08:33, Xiong Yining pisze: To support more memory nodes, we refer to the implement of "OvmfPkg/Fdt/HighMemDxe" to add memory space for the high memory nodes except the first one. Signed-off-by: Xiong Yining Signed-off-by: Chen Baozi Needs rebase on top of "get rid of DeviceTree from SbsaQemu" series. Rename SbsaQemuHardwareInfoLib to HardwareInfoLib and use newer function names. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117120): https://edk2.groups.io/g/devel/message/117120 Mute This Topic: https://groups.io/mt/104463710/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
W dniu 20.02.2024 o 08:47, Xiong Yining pisze: Add support to create SRAT(System resource affinity table) for sbsa platform at runtime. Signed-off-by: Xiong Yining Signed-off-by: Chen Baozi Needs rebase on top of "get rid of DeviceTree from SbsaQemu" series. Rename SbsaQemuHardwareInfoLib to HardwareInfoLib and use newer function names. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117121): https://edk2.groups.io/g/devel/message/117121 Mute This Topic: https://groups.io/mt/104463805/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v4 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
W dniu 28.03.2024 o 07:19, Xiong Yining pisze: Add support to create SRAT(System resource affinity table) for sbsa platform at runtime. Signed-off-by: Xiong Yining Reviewed-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm When you send a new version of patch, with changes done compared to previous one you drop "Reviewed-by" tags because it is not code anyone saw before. You add/copy "Reviewed-by" only if patch is in the same version as the one reviewed. And only if someone really added that tag in review, not when they looked and commented (I never gave "Reviewed-by" tag to any version of this patch). -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117211): https://edk2.groups.io/g/devel/message/117211 Mute This Topic: https://groups.io/mt/105192387/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] ACPI table generators and ConfigurationManagerProtocol
W dniu 8.10.2023 o 19:25, Marcin Juszkiewicz via groups.io pisze: I hate replying to myself after half a year of not seeing any answer. So added some people from repo to Cc: Can someone point me to documentation on how to use ACPI table generators and ConfigurationManagerProtocol? https://github.com/tianocore/edk2/blob/master/DynamicTablesPkg/Readme.md tells the story and points to presentation from 2018 with some pictures in it. Looks like the only documentation is the code itself. Is checkout of some old tree and looking change by change how it was done on some platform the easiest way to find out how to use it? And tell which of platforms is a good example of using those? Juno, FVP, Morello, N1SDP, one NXP platform and ArmVirt use them. Probably the last one would be best to look at but who knows... From first look it seems like using ACPI table generators may allow to simplify code by not creating tables by hand (or in ASL). I would like to do some changes around SBSA Reference Platform without rewriting ASL into C again. In meantime I rewrote some ASL into C. Again. Now need a way to generate DSDT for PCIe buses. Can write something in C again. But do I really need to? I am aware that moving platform to use configuration manager may require even more work. The more I look at */ConfigurationManager.[ch] the more I do not like the amount of static structures there. All those EDKII_PLATFORM_REPOSITORY_INFO covering 1000 lines looks like "how the hell I will find what to change in other piece of code". Any doc pointers? Recommendations (other than "change your job")? -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117666): https://edk2.groups.io/g/devel/message/117666 Mute This Topic: https://groups.io/mt/105481311/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] ACPI table generators and ConfigurationManagerProtocol
W dniu 12.04.2024 o 14:43, Marcin Juszkiewicz via groups.io pisze: W dniu 8.10.2023 o 19:25, Marcin Juszkiewicz via groups.io pisze: I hate replying to myself after half a year of not seeing any answer. So added some people from repo to Cc: Can someone point me to documentation on how to use ACPI table generators and ConfigurationManagerProtocol? https://github.com/tianocore/edk2/blob/master/DynamicTablesPkg/Readme.md tells the story and points to presentation from 2018 with some pictures in it. Looks like the only documentation is the code itself. Is checkout of some old tree and looking change by change how it was done on some platform the easiest way to find out how to use it? The more I look at */ConfigurationManager.[ch] the more I do not like the amount of static structures there. All those EDKII_PLATFORM_REPOSITORY_INFO covering 1000 lines looks like "how the hell I will find what to change in other piece of code". Any doc pointers? Recommendations (other than "change your job")? I have spent two days on trying ConfigurationManager and finally gave up. The idea behind may look interesting but implementation of it is terrible. And there is no documentation for it. Edk2_Platform_Repo_Info struct full of other structs can be one thousand lines long. Then are functions to query those structs - which can take almost another thousand lines. For hardware where amount of system components is known and does not change it may be tempting. For those like sbsa-ref/QemuSbsa it means extra code to fill struct of structs with hardware details (cpu nodes, gic nodes, cpu topology/hierarchy/cache info etc). So I am going back to how "my" platform is done. Probably will learn AmlLib to create DSDT from C code. And if someone considers using ConfigurationManager for their platform: please reconsider it as it may not be worth your time. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117856): https://edk2.groups.io/g/devel/message/117856 Mute This Topic: https://groups.io/mt/105481311/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] ACPI table generators and ConfigurationManagerProtocol
W dniu 16.04.2024 o 09:38, Marcin Juszkiewicz via groups.io pisze: And if someone considers using ConfigurationManager for their platform: please reconsider it as it may not be worth your time. Wrote blog post about my adventure with CM: https://marcin.juszkiewicz.com.pl/2024/04/16/configurationmanager-in-edk2-just-say-no/ -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117868): https://edk2.groups.io/g/devel/message/117868 Mute This Topic: https://groups.io/mt/105481311/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms] SbsaQemu: move code outside of methods in DSDT
IASL complained that DSDT is not optimal:
Dsdt.
83: Name (RBUF, ResourceTemplate() {
Remark 2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.USB0._CRS)
Dsdt.
377: Name (RBUF, ResourceTemplate () {
Remark 2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.PCI0._CRS)
---
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index b55ad6c5cc07..60c72fecc74f 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -77,13 +77,13 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Method (_STA) {
Return (XHCI)
}
+Name (RBUF, ResourceTemplate() {
+Memory32Fixed (ReadWrite,
+ FixedPcdGet32 (PcdPlatformXhciBase),
+ FixedPcdGet32 (PcdPlatformXhciSize))
+Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
+})
Method (_CRS, 0x0, Serialized) {
-Name (RBUF, ResourceTemplate() {
-Memory32Fixed (ReadWrite,
- FixedPcdGet32 (PcdPlatformXhciBase),
- FixedPcdGet32 (PcdPlatformXhciSize))
-Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
43 }
-})
Return (RBUF)
}
@@ -371,7 +371,6 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
})
// Root complex resources
- Method (_CRS, 0, Serialized) {
Name (RBUF, ResourceTemplate () {
WordBusNumber ( // Bus numbers assigned to this root
ResourceProducer,
@@ -418,10 +417,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
FixedPcdGet32 (PcdPciIoSize),// Length
,,,TypeTranslation
)
-}) // Name(RBUF)
-
+ }) // Name(RBUF)
+ Method (_CRS, 0, Serialized) {
Return (RBUF)
- } // Method(_CRS)
+ }
Device (RES0)
{
--
2.44.0
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[edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries for QEMU v9.0+
QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
designs. Now it will use value present in CNTFRQ_EL0 register (set by
QEMU).
Enable FEAT_ECV for QEMU v9.0+ to get access to CNTPOFF register.
Signed-off-by: Marcin Juszkiewicz
---
Platform/Qemu/Sbsa/Readme.md | 55 ++-
Platform/Qemu/Sbsa/bl1.bin | Bin 23365 -> 23349 bytes
Platform/Qemu/Sbsa/fip.bin | Bin 82722 -> 82722 bytes
3 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/Platform/Qemu/Sbsa/Readme.md b/Platform/Qemu/Sbsa/Readme.md
index 5ed05f0f3021..b1351043d2b4 100644
--- a/Platform/Qemu/Sbsa/Readme.md
+++ b/Platform/Qemu/Sbsa/Readme.md
@@ -4,50 +4,51 @@ Qemu SBSA TF-A binaries
These binaries have been created from the mainline TF-A
code checked out at the following commit ID:
-commit f36faa71578a14a8c9910aaa57e761f0256ccd52 (HEAD -> master,
origin/master, origin/integration, origin/HEAD)
-Merge: 8dad296d6 57ab6d897
-Author: Lauren Wehrmeister
-Date: Tue Mar 12 19:17:49 2024 +0100
+commit 56b263cb2a25892038761acea8c2b57a638d19bf (HEAD -> integration,
origin/integration, gerrit/integration)
+Merge: 09d3fd141 e769f830d
+Author: Yann Gautier
+Date: Tue Apr 23 10:42:01 2024 +0200
-Merge "fix(cpus): fix a defect in Cortex-A715 erratum 2561034" into
integration
+Merge "feat(qemu): allow ARM_ARCH_MAJOR/MINOR override" into integration
This ensures that the following features for qemu_sbsa platform are
merged upstream and included in the build:
-commit 42925c15bee09162c6dfc8c2204843ffac6201c1
+commit 5436047a0e1f32543042d6de9f1f6a3edcd47591
Author: Marcin Juszkiewicz
-Date: Tue Nov 21 14:53:26 2023 +0100
+Date: Mon Apr 22 17:27:56 2024 +0200
-feat(qemu-sbsa): handle CPU information
+refactor(qemu): do not hardcode counter frequency
-We want to remove use of DeviceTree from EDK2. So we move
-functions to TF-A:
+From QEMU change:
-- counting cpu cores
-- checking NUMA node id
-- checking MPIDR
+> In previous versions of the Arm architecture, the frequency of the
+> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
+> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
+> In Armv8.6, the architecture standardized this frequency to 1GHz.
-And then it gets passed to EDK2 via SMC calls.
+This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
+stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
+cores and 1GHz on newer ones.
-Change-Id: I1c7fc234ba90ba32433b6e4aa2cf127f26da00fd
+Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
Signed-off-by: Marcin Juszkiewicz
-commit 8b7dd8397dd017b61ecda8447e8956a1d9d6d5d3
-Author: Xiong Yining
-Date: Fri Jan 12 10:47:03 2024 +
+commit 1b694c77c497cb8272c97417ef1fa4f5f9c869c1
+Author: Jean-Philippe Brucker
+Date: Mon Apr 15 14:28:11 2024 +0100
-feat(qemu-sbsa): handle memory information
+feat(qemu): enable FEAT_ECV when present
-As a part of removing DeviceTree from EDK2, we move functions to TF-A:
+QEMU supports FEAT_ECV since commit 2808d3b38a52 ("target/arm: Implement
+FEAT_ECV CNTPOFF_EL2 handling"), in the v9.0.0 release. Enable
+auto-detecting the feature on the QEMU platforms, in order to set
+SCR.ECVEN. Without this, EL2 gets undefined instruction exceptions when
+trying to access the new CNTPOFF register.
-- counting the number of memory nodes
-- checking NUMA node id
-- checking the memory address
-
-Signed-off-by: Xiong Yining
-Signed-off-by: Chen Baozi
-Change-Id: Ib7bce3a65c817a5b3bef6c9e0a459c7ce76c7e35
+Change-Id: I555a5f9a9a84fd23e64ca85219ed1599204c6bb2
+Signed-off-by: Jean-Philippe Brucker
NOTE: No modifications to the source code have been done.
diff --git a/Platform/Qemu/Sbsa/bl1.bin b/Platform/Qemu/Sbsa/bl1.bin
index
8eac6204b64be03036c6aabe84618a7c979e78e0..6ad39377a464050dcc714d1316ff8981ad637ded
100755
GIT binary patch
delta 4429
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z{Na4c100yo(oK6qp&U6rc?eSBGu4zGjgFLQ1-q~^@RMFl&
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zPg61!wk7JIx&@$&@-RsTJ-#3QsK!``3nJo`hASdcBL?GS1zyp_JlkZ{x9*KdWrD-i
z
[edk2-devel] [PATCH edk2-platforms v2 0/2] SbsaQemu: some cleanups
I am working on some changes to SbsaQemu and got some cleanups in meantime. First patch gets rid of setting Pcds for Timer interrupts. ArmPkg does it for us so we do not have to. Second changes DSDT nodes so iasl does not complain. Marcin Juszkiewicz (2): SbsaQemu: do not set Timer interrupts SbsaQemu: remove some methods from DSDT Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 10 -- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 23 --- 2 files changed, 8 insertions(+), 25 deletions(-) -- 2.44.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118205): https://edk2.groups.io/g/devel/message/118205 Mute This Topic: https://groups.io/mt/105707991/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH edk2-platforms v2 2/2] SbsaQemu: remove some methods from DSDT
IASL complained that DSDT is not optimal:
Dsdt.
83: Name (RBUF, ResourceTemplate() {
Remark 2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.USB0._CRS)
Dsdt.
377: Name (RBUF, ResourceTemplate () {
Remark 2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.PCI0._CRS)
Simplified some _CRS nodes.
Signed-off-by: Marcin Juszkiewicz
---
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index b55ad6c5cc07..c134fb66e860 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -77,15 +77,12 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
Method (_STA) {
Return (XHCI)
}
-Method (_CRS, 0x0, Serialized) {
-Name (RBUF, ResourceTemplate() {
-Memory32Fixed (ReadWrite,
- FixedPcdGet32 (PcdPlatformXhciBase),
- FixedPcdGet32 (PcdPlatformXhciSize))
-Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
43 }
-})
-Return (RBUF)
-}
+Name (_CRS, ResourceTemplate() {
+Memory32Fixed (ReadWrite,
+ FixedPcdGet32 (PcdPlatformXhciBase),
+ FixedPcdGet32 (PcdPlatformXhciSize))
+Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
+})
// Root Hub
Device (RHUB) {
@@ -371,8 +368,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
})
// Root complex resources
- Method (_CRS, 0, Serialized) {
- Name (RBUF, ResourceTemplate () {
+ Name (_CRS, ResourceTemplate () {
WordBusNumber ( // Bus numbers assigned to this root
ResourceProducer,
MinFixed, MaxFixed, PosDecode,
@@ -418,10 +414,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
FixedPcdGet32 (PcdPciIoSize),// Length
,,,TypeTranslation
)
-}) // Name(RBUF)
-
-Return (RBUF)
- } // Method(_CRS)
+ }) // Name(_CRS)
Device (RES0)
{
--
2.44.0
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