Re: [edk2-devel] [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as False
Reviewed-by: Ray Ni > -Original Message- > From: Liu, Zhiguang > Sent: Tuesday, April 25, 2023 2:37 PM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Desimone, Nathaniel L > ; Ni, Ray > Subject: [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as > False > > In BoardX58Ich10 platform, MSR 0x1f2 (ia32_smrr_physbase) and MSR 0x1f3 > (ia32_smrr_physmask) are both unimplemented. So set the PcdSmrrEnable > as disable to avoid access SMRR > > Cc: Nate DeSimone > Cc: Ray Ni > Signed-off-by: Zhiguang Liu > --- > .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 1 + > 1 file changed, 1 insertion(+) > > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds > c > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds > c > index 472318cc44..732d95e44f 100644 > --- > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds > c > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds > c > @@ -39,6 +39,7 @@ >gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE >gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE >gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|FALSE > + gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|FALSE > >## ># Platform Configuration > -- > 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103526): https://edk2.groups.io/g/devel/message/103526 Mute This Topic: https://groups.io/mt/98488012/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10
Reviewed-by: Ray Ni > -Original Message- > From: Liu, Zhiguang > Sent: Tuesday, April 25, 2023 2:40 PM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Desimone, Nathaniel L > ; Ni, Ray > Subject: [PATCH 1/3] SimicsOpenBoardPkg: Support 64-bit Pei BoardX58Ich10 > > Create a new platform build configure file, build_config_x64.cfg. > It enables 64-bit Pei BoardX58Ich10. > > Cc: Nate DeSimone > Cc: Ray Ni > Signed-off-by: Zhiguang Liu > --- > .../BoardX58Ich10/OpenBoardPkg.dsc| 8 ++--- > .../BoardX58Ich10/OpenBoardPkg.fdf| 2 +- > .../BoardX58Ich10/build_config_x64.cfg| 31 +++ > Platform/Intel/build.cfg | 1 + > .../Intel/SimicsX58SktPkg/SktSecInclude.fdf | 2 +- > 5 files changed, 36 insertions(+), 8 deletions(-) > create mode 100644 > Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg > > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > index 64c3af2584..c02804c19c 100644 > --- > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > @@ -72,9 +72,7 @@ > ### > # Component Includes > ### > -# @todo: Change below line to [Components.$(PEI_ARCH)] after > https://bugzilla.tianocore.org/show_bug.cgi?id=2308 > -#is completed > -[Components.IA32] > +[Components.$(PEI_ARCH)] > !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc > !include $(SKT_PKG)/SktPkgPei.dsc > > @@ -175,9 +173,7 @@ > ### > # PEI Components > ### > -# @todo: Change below line to [Components.$(PEI_ARCH)] after > https://bugzilla.tianocore.org/show_bug.cgi?id=2308 > -#is completed > -[Components.IA32] > +[Components.$(PEI_ARCH)] >### ># Edk2 Packages >### > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > index 844f9b6dcf..ccb7fe7e59 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > @@ -121,7 +121,7 @@ READ_LOCK_CAP = TRUE > READ_LOCK_STATUS = TRUE > FvNameGuid = 229EEDCE-8E76-4809-B233-EC36BFBF6989 > > -INF RuleOverride=RESET_SECMAIN USE = IA32 > $(BOARD_PKG)/SecCore/SecMain.inf > +INF RuleOverride=RESET_SECMAIN USE = $(PEI_ARCH) > $(BOARD_PKG)/SecCore/SecMain.inf > !include $(SKT_PKG)/SktSecInclude.fdf > > [FV.FvPreMemory] > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg > new file mode 100644 > index 00..b80415208a > --- /dev/null > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg > @@ -0,0 +1,31 @@ > +# @ build_config.cfg > +# This is the BoardX58Ich10 board specific build settings enabling 64bit PEI. > +# > +# Copyright (c) 2019, Intel Corporation. All rights reserved. > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > + > +[CONFIG] > +WORKSPACE_PLATFORM_BIN = edk2-non-osi/Platform/Intel > +EDK_SETUP_OPTION = > +openssl_path = > +PLATFORM_BOARD_PACKAGE = SimicsOpenBoardPkg > +PROJECT = SimicsOpenBoardPkg/BoardX58Ich10 > +BOARD = BoardX58Ich10 > +FLASH_MAP_FDF = > SimicsOpenBoardPkg/BoardX58Ich10/Include/Fdf/FlashMapInclude.fdf > +PROJECT_DSC = SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > +BOARD_PKG_PCD_DSC = > SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc > +PrepRELEASE = DEBUG > +SILENT_MODE = FALSE > +EXT_CONFIG_CLEAR = > +CapsuleBuild = FALSE > +EXT_BUILD_FLAGS = -D PEI_ARCH=X64 > +CAPSULE_BUILD = 0 > +TARGET = DEBUG > +TARGET_SHORT = D > +PERFORMANCE_BUILD = FALSE > +FSP_WRAPPER_BUILD = FALSE > +FSP_BINARY_BUILD = FALSE > +FSP_TEST_RELEASE = FALSE > +SECURE_BOOT_ENABLE = FALSE > diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg > index 8d480f27dc..fe0ddb7a1e 100644 > --- a/Platform/Intel/build.cfg > +++ b/Platform/Intel/build.cfg > @@ -57,6 +57,7 @@ BIOS_INFO_GUID = > # board_name = path_to_board_build_config.cfg > BoardMtOlympus = > PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg > BoardX58Ich10 = SimicsOpenBoardPkg/BoardX58Ich10/build_config.cfg > +BoardX58Ich10X64 = > SimicsOpenBoardPkg/BoardX58Ich10/build_config_x64.cfg > AspireVn7Dash572G = > KabylakeOpenBoardPkg/AspireVn7Dash572G/build_config.cfg > GalagoPro3 = KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg > KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg > diff --git a/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf > b/Silicon/Intel/SimicsX58SktPkg/SktSecInclude.fdf > index dafca1ad36..
[edk2-devel] [PATCH 0/5] refine Smm range code in BoardX58Ich10
In BoardX58Ich10 platform, two modules has hard-code about how SMM range should be, and this causes a issue since PEI phase may change SMM ranges now. This patch set refine Smm range related code. Zhiguang Liu (5): SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect SimicsOpenBoardPkg: Use SmmAccessLib instead of SmmAccessPei.inf SimicsOpenBoardPkg: Use another SmmAccess Driver SimicsX58SktPkg: Remove unused Smm related modules .../BoardX58Ich10/OpenBoardPkg.dsc| 9 +- .../BoardX58Ich10/OpenBoardPkg.fdf| 1 - .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 124 +++ .../SimicsPei/SimicsPei.inf | 3 + .../SimicsX58SktPkg/SktUefiBootInclude.fdf| 2 +- .../Smm/Access/SmmAccess2Dxe.c| 148 .../Smm/Access/SmmAccess2Dxe.inf | 54 --- .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 346 -- .../Smm/Access/SmmAccessPei.inf | 65 .../Smm/Access/SmramInternal.c| 200 -- .../Smm/Access/SmramInternal.h| 82 - 11 files changed, 64 insertions(+), 970 deletions(-) delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103528): https://edk2.groups.io/g/devel/message/103528 Mute This Topic: https://groups.io/mt/98488190/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 1/5] SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path
gEfiSmmSmramMemoryGuid Hob is needed for SmmRelocation feature
even for S3 path. So in MemDetect.c, remove specical code path
for S3 about creating gEfiSmmSmramMemoryGuid Hob and adding some
memory descriptor, which does no harm in S3 path.
Cc: Nate DeSimone
Cc: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 107 +++---
1 file changed, 42 insertions(+), 65 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index 127afffc00..d80ac1d213 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -405,79 +405,56 @@ QemuInitializeRam (
LowerMemorySize = GetSystemMemorySizeBelow4gb ();
UpperMemorySize = GetSystemMemorySizeAbove4gb ();
- if (mBootMode == BOOT_ON_S3_RESUME) {
-//
-// Create the following memory HOB as an exception on the S3 boot path.
-//
-// Normally we'd create memory HOBs only on the normal boot path. However,
-// CpuMpPei specifically needs such a low-memory HOB on the S3 path as
-// well, for "borrowing" a subset of it temporarily, for the AP startup
-// vector.
-//
-// CpuMpPei saves the original contents of the borrowed area in permanent
-// PEI RAM, in a backup buffer allocated with the normal PEI services.
-// CpuMpPei restores the original contents ("returns" the borrowed area) at
-// End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before
-// transferring control to the OS's wakeup vector in the FACS.
-//
-// We expect any other PEIMs that "borrow" memory similarly to CpuMpPei to
-// restore the original contents. Furthermore, we expect all such PEIMs
-// (CpuMpPei included) to claim the borrowed areas by producing memory
-// allocation HOBs, and to honor preexistent memory allocation HOBs when
-// looking for an area to borrow.
-//
-AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
- } else {
-//
-// Create memory HOBs
-//
-AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
+ //
+ // Create memory HOBs
+ //
+ AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
-if (FeaturePcdGet (PcdSmmSmramRequire)) {
- UINT32 TsegSize;
+ if (FeaturePcdGet (PcdSmmSmramRequire)) {
+UINT32 TsegSize;
- TsegSize = mX58TsegMbytes * SIZE_1MB;
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
- AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
-TRUE);
+TsegSize = mX58TsegMbytes * SIZE_1MB;
+AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
+AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
+ TRUE);
- BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
- SmramRanges = 1;
+BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
+SmramRanges = 1;
- Hob.Raw = BuildGuidHob(
- &gEfiSmmSmramMemoryGuid,
- BufferSize
- );
- ASSERT(Hob.Raw);
-
- SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
- SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
-
- SmramIndex = 0;
- for (Index = 0; Index < SmramRanges; Index++) {
-//
-// This is an SMRAM range, create an SMRAM descriptor
-//
-SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
LowerMemorySize - TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
LowerMemorySize - TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =
TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
EFI_SMRAM_CLOSED | EFI_CACHEABLE;
-SmramIndex++;
- }
+Hob.Raw = BuildGuidHob(
+&gEfiSmmSmramMemoryGuid,
+BufferSize
+);
+ASSERT(Hob.Raw);
-} else {
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
-}
+SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
+SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
-//
-// If QEMU presents an E820 map, then create memory HOBs for the >=4GB RAM
-// entries. Otherwise, create a single memory HOB with the flat >=4GB
-// memory size read from the CMOS.
-//
-if (UpperMemorySize != 0) {
- AddMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
+SmramIndex = 0;
+for (Index = 0; Index < SmramRanges; Index++) {
+ //
+ // This is an SMRAM range, create an SMRAM descriptor
+ //
+ SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
LowerMemorySize - TsegSize;
+ SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
LowerMemorySize - TsegSize;
+ SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = TsegSize;
+ SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
EFI_SMRAM_CLOSED | EFI_CACHEABLE;
[edk2-devel] [PATCH 2/5] SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect
Currently, MemDetect create gEfiSmmSmramMemoryGuid Hob containing one
descriptor, which should be updated later, when AcpiVariableGuid hob
use some buffer from SmRam. However, the Hob doesn't get updated, and
this is a bug.
Move the logic creating AcpiVariableGuid hob from PEIM SmmAccessPei.inf
to MemDetect, so that in the same file, it has both knowleage about
the smmram and the acpi data structure. So it can create the
gEfiSmmSmramMemoryGuid Hob containing two descriptors.
Cc: Nate DeSimone
Cc: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 36 +++
.../SimicsPei/SimicsPei.inf | 1 +
.../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 8 -
.../Smm/Access/SmmAccessPei.inf | 3 --
4 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index d80ac1d213..13ee415f40 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -391,11 +391,10 @@ QemuInitializeRam (
UINT64 LowerMemorySize;
UINT64 UpperMemorySize;
UINTN BufferSize;
- UINT8 SmramIndex;
UINT8 SmramRanges;
EFI_PEI_HOB_POINTERS Hob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK*SmramHobDescriptorBlock;
- UINT8 Index;
+ VOID *GuidHob;
DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
@@ -418,8 +417,8 @@ QemuInitializeRam (
AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
TRUE);
-BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
-SmramRanges = 1;
+SmramRanges = 2;
+BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (SmramRanges - 1) *
sizeof(EFI_SMRAM_DESCRIPTOR);
Hob.Raw = BuildGuidHob(
&gEfiSmmSmramMemoryGuid,
@@ -430,18 +429,25 @@ QemuInitializeRam (
SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
-SmramIndex = 0;
-for (Index = 0; Index < SmramRanges; Index++) {
- //
- // This is an SMRAM range, create an SMRAM descriptor
- //
- SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
LowerMemorySize - TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
LowerMemorySize - TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
EFI_SMRAM_CLOSED | EFI_CACHEABLE;
- SmramIndex++;
-}
+//
+// Create first SMRAM descriptor, which contains data structures used in
S3 resume.
+// One page is enough for the data structure
+//
+SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = LowerMemorySize -
TsegSize;
+SmramHobDescriptorBlock->Descriptor[0].CpuStart = LowerMemorySize -
TsegSize;
+SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE | EFI_ALLOCATED;
+GuidHob = BuildGuidHob (&gEfiAcpiVariableGuid,
sizeof(EFI_SMRAM_DESCRIPTOR));
+ASSERT (GuidHob != NULL);
+CopyMem (GuidHob, &SmramHobDescriptorBlock->Descriptor[0],
sizeof(EFI_SMRAM_DESCRIPTOR));
+//
+// Create second SMRAM descriptor, which is free and will be used by SMM
foundation.
+//
+SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].CpuStart =
SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].PhysicalSize = TsegSize -
EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE;
} else {
AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index 710fa680be..618ad4075f 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -40,6 +40,7 @@
[Guids]
gEfiMemoryTypeInformationGuid
gEfiSmmSmramMemoryGuid ## CONSUMES
+ gEfiAcpiVariableGuid
[LibraryClasses]
BaseLib
diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
index c54026b4d1..d489cc7513 100644
--- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
+++ b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
@@ -241,7 +241,6 @@ SmmAccessPeiEntryPoint (
[edk2-devel] [PATCH 3/5] SimicsOpenBoardPkg: Use SmmAccessLib instead of SmmAccessPei.inf
SmmAccessPei.inf is a PEIM we should deleted, here is the reason:
1. It programs registers MCH_TOLUD to set the Low Usable DRAM,
but reading LMCH_TOLUD always return zere in QSP platforms
2. It programs/reads MCH_TSEGMB to implemte some Smm Access service
such as open/close/lock. However, this reading LMCH_TOLUD also always
return zere in QSP platforms
3. It returns the hard-code Smm range information. However, there are
two improper things about this. One is that we already have the hard
code value about T-Seg base/size in MemDetect. The other Smm range
informaton is already saved in gEfiSmmSmramMemoryGuid Hob. No need
hard-code value.
So, this patch uses another way, calling PeiInstallSmmAccessPpi from
SmmAccessLib. The lib instance we choose will use the
gEfiSmmSmramMemoryGuid Hob information.
In a word, with the patch, we can avoid additional hard-code, and
avoid programing unimplemented registers.
Cc: Nate DeSimone
Cc: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc| 7 +--
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf| 1 -
Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 9 +
.../Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 2 ++
4 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 7b98baf764..fcae343146 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -142,6 +142,7 @@
# Silicon Package
#
ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf
#
# Platform Package
@@ -190,12 +191,6 @@
###
# Silicon Initialization Package
###
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(SKT_PKG)/Smm/Access/SmmAccessPei.inf {
-
- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
- }
-!endif
#
# Platform Package
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 221706ae03..844f9b6dcf 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -165,7 +165,6 @@ INF
MinPlatformPkg/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
!include MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
-INF $(SKT_PKG)/Smm/Access/SmmAccessPei.inf
# S3 SMM PEI driver
#INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index 13ee415f40..f9a5487365 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
@@ -472,6 +473,8 @@ InitializeRamRegions (
VOID
)
{
+ EFI_STATUS Status;
+
QemuInitializeRam ();
if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
@@ -544,4 +547,10 @@ InitializeRamRegions (
);
}
}
+
+ //
+ // Install EFI_PEI_MM_ACCESS_PPI for S3 resume case
+ //
+ Status = PeiInstallSmmAccessPpi ();
+ ASSERT_EFI_ERROR (Status);
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index 618ad4075f..cdc30ad582 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -36,6 +36,7 @@
SimicsX58SktPkg/SktPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
BoardModulePkg/BoardModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
[Guids]
gEfiMemoryTypeInformationGuid
@@ -55,6 +56,7 @@
MtrrLib
PcdLib
CmosAccessLib
+ SmmAccessLib
[Pcd]
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase
--
2.31.1.windows.1
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[edk2-devel] [PATCH 4/5] SimicsOpenBoardPkg: Use another SmmAccess Driver
Because of the similiar reason I mentioned in last commit, the SmmAccess2Dxe.inf driver should be deleted and the replacement will avoid hard-code and use gEfiSmmSmramMemoryGuid Hob to get Smm Range information. This can fix an exsiting bug, when gSmmBaseHobGuid may allocate buffer from smm range, and update gEfiSmmSmramMemoryGuid Hob. Current driver will return hard-code smm range and the buffer used by gSmmBaseHobGuid is marked as free range by mistake. Cc: Nate DeSimone Cc: Ray Ni Signed-off-by: Zhiguang Liu --- .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 2 +- Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf| 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index fcae343146..64c3af2584 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -278,7 +278,7 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE $(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf $(PCH_PKG)/Spi/Smm/PchSpiSmm.inf - $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf + IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf !endif diff --git a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf index fdcb4fb9a7..ca3706578b 100644 --- a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf +++ b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf @@ -8,7 +8,7 @@ ## !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE - INF $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf + INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf !endif INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103532): https://edk2.groups.io/g/devel/message/103532 Mute This Topic: https://groups.io/mt/98488194/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 5/5] SimicsX58SktPkg: Remove unused Smm related modules
In last two commit, I replace the two SMM related modules, and now
no platform will use these two moduels. Remove them
Cc: Nate DeSimone
Cc: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../Smm/Access/SmmAccess2Dxe.c| 148
.../Smm/Access/SmmAccess2Dxe.inf | 54 ---
.../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 338 --
.../Smm/Access/SmmAccessPei.inf | 62
.../Smm/Access/SmramInternal.c| 200 ---
.../Smm/Access/SmramInternal.h| 82 -
6 files changed, 884 deletions(-)
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h
diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
deleted file mode 100644
index 5d3b2c14aa..00
--- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/** @file
- A DXE_DRIVER providing SMRAM access by producing EFI_SMM_ACCESS2_PROTOCOL.
-
- X58 TSEG is expected to have been verified and set up by the SmmAccessPei
- driver.
-
- Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-#include
-#include
-#include
-
-#include "SmramInternal.h"
-
-/**
- Opens the SMRAM area to be accessible by a boot-service driver.
-
- This function "opens" SMRAM so that it is visible while not inside of SMM.
- The function should return EFI_UNSUPPORTED if the hardware does not support
- hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the SMRAM
- configuration is locked.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The operation was successful.
- @retval EFI_UNSUPPORTED The system does not support opening and closing of
-SMRAM.
- @retval EFI_DEVICE_ERROR SMRAM cannot be opened, perhaps because it is
-locked.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeOpen (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessOpen (&This->LockState, &This->OpenState);
-}
-
-/**
- Inhibits access to the SMRAM.
-
- This function "closes" SMRAM so that it is not visible while outside of SMM.
- The function should return EFI_UNSUPPORTED if the hardware does not support
- hiding of SMRAM.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The operation was successful.
- @retval EFI_UNSUPPORTED The system does not support opening and closing of
-SMRAM.
- @retval EFI_DEVICE_ERROR SMRAM cannot be closed.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeClose (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessClose (&This->LockState, &This->OpenState);
-}
-
-/**
- Inhibits access to the SMRAM.
-
- This function prohibits access to the SMRAM region. This function is usually
- implemented such that it is a write-once operation.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The device was successfully locked.
- @retval EFI_UNSUPPORTED The system does not support locking of SMRAM.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeLock (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessLock (&This->LockState, &This->OpenState);
-}
-
-/**
- Queries the memory controller for the possible regions that will support
- SMRAM.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
- @param[in,out] SmramMapSize A pointer to the size, in bytes, of the
-SmramMemoryMap buffer.
- @param[in,out] SmramMap A pointer to the buffer in which firmware
-places the current memory map.
-
- @retval EFI_SUCCESS The chipset supported the given resource.
- @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small. The
-current buffer size needed to hold the memory
-map is returned in SmramMapSize.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeGetCapabilities (
- IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
- IN OUT UINTN *SmramMapSize,
- IN OUT EFI_SMRAM_DESCRIPTOR*SmramMap
- )
-{
- return SmramAccessGetCapabilities (This->LockState, This->OpenState,
- SmramMapSize, SmramMap);
-}
-
-//
-// LockState and OpenState will be filled in by the entry p
Re: [edk2-devel] [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD PcdSimicsSecPageTablesBase
Reviewed-by: Ray Ni > -Original Message- > From: Liu, Zhiguang > Sent: Tuesday, April 25, 2023 2:40 PM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Desimone, Nathaniel L > ; Ni, Ray > Subject: [PATCH 3/3] SimicsOpenBoardPkg: Remove unused PCD > PcdSimicsSecPageTablesBase > > Currently, for 64-bit PEI, pagetable is created in reset vector and > stored in SPI flash. No need this PCD now > > Cc: Nate DeSimone > Cc: Ray Ni > Signed-off-by: Zhiguang Liu > --- > .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 3 --- > Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec| 1 - > Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c | 8 > Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf | 1 - > Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 1 - > 5 files changed, 14 deletions(-) > > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > index ccb7fe7e59..a74c355e09 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf > @@ -79,9 +79,6 @@ ErasePolarity = 1 > BlockSize = 0x1 > NumBlocks = 0xB0 > > -0x00|0x006000 > - > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|gSimic > sOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize > - > 0x006000|0x001000 > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase|gSimi > csOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize > > diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec > b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec > index 421c464023..e8aefdd893 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec > +++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec > @@ -38,7 +38,6 @@ > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBa > se|0x0|UINT32|0xd > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkin > gBase|0x0|UINT32|0xe > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT3 > 2|0xf > - > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UI > NT32|0x11 > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UI > NT32|0x12 > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0| > UINT32|0x13 > > gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0| > UINT32|0x14 > diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c > b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c > index 6b572b38a8..39e879e922 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c > +++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c > @@ -759,14 +759,6 @@ SecCoreStartupWithStack ( > >AsmWriteIdtr (&IdtDescriptor); > > -#if defined (MDE_CPU_X64) > - // > - // ASSERT that the Page Tables were set by the reset vector code to > - // the address we expect. > - // > - ASSERT (AsmReadCr3 () == (UINTN) PcdGet32 > (PcdSimicsSecPageTablesBase)); > -#endif > - >// >// |-| <-- TopOfCurrentStack >// | Stack | 32k > diff --git a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf > b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf > index 1de3d012a7..af1c0f2b55 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf > +++ b/Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf > @@ -62,7 +62,6 @@ >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize > - gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize >gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress > diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf > b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf > index cdc30ad582..49f441fe9d 100644 > --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf > +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf > @@ -65,7 +65,6 @@ >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsLockBoxStorageSize > - gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPageTablesBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamBase >gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsSecPeiTempRamSize >gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress > -- > 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103534): https://edk2.groups.io/g/devel/message/103534 Mute This Topic: https://groups.io/mt/98488023/21656 Group
[edk2-devel] [Patch V2 0/2] Update ProcTrace feature code for new requirements.
In V2 patch set: 1.Remove the patch to set MTC to 0. 2.Updated 'Update code to support enable ProcTrace only on BSP' based on Ray's comments. PCD name is updated to PcdCpuProcTraceBspOnly and cache the value in ConfigData. Use MemRegionBaseAddr and TopaTableBaseAddr instead of the unused local variable to record buffer address. 3.Updated 'Update PT code to support enable collect performance' based on Ray's comments. PCD name is updated to PcdCpuProcTracePerformanceCollecting and cache the value in ConfigData Also, if CYC packet is supported is checked in Support function and recorded in ProcTraceData->ProcessorData Dun Tan (2): UefiCpuPkg: Update code to support enable ProcTrace only on BSP UefiCpuPkg: Update PT code to support enable collect performance UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 12 +++- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 200 +--- UefiCpuPkg/UefiCpuPkg.dec| 15 +++ 3 files changed, 155 insertions(+), 72 deletions(-) -- 2.39.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103535): https://edk2.groups.io/g/devel/message/103535 Mute This Topic: https://groups.io/mt/98489086/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V2 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP
Update code to support enable ProcTrace only on BSP. Add a new
dynamic PCD to indicate if enable ProcTrace only on BSP. In
ProcTrace.c code, if this new PCD is true, only allocate buffer
and set CtrlReg.Bits.TraceEn to 1 for BSP.
Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Xiao X Chen
---
UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 3 ++-
UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 168
UefiCpuPkg/UefiCpuPkg.dec| 7 +++
3 files changed, 113 insertions(+), 65 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 7fbcd8da0e..d803012ce2 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -4,7 +4,7 @@
# This library registers CPU features defined in Intel(R) 64 and IA-32
# Architectures Software Developer's Manual.
#
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -62,3 +62,4 @@
gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
index 04e6a60728..367a9f9cfe 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
@@ -1,7 +1,7 @@
/** @file
Intel Processor Trace feature.
- Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -46,6 +46,8 @@ typedef struct {
UINTN*TopaMemArray;
+ BOOLEAN EnableOnBspOnly;
+
PROC_TRACE_PROCESSOR_DATA*ProcessorData;
} PROC_TRACE_DATA;
@@ -77,6 +79,7 @@ ProcTraceGetConfigData (
ConfigData->NumberOfProcessors= (UINT32)NumberOfProcessors;
ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize);
ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme);
+ ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly);
return ConfigData;
}
@@ -188,6 +191,7 @@ ProcTraceInitialize (
MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg;
MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg;
RTIT_TOPA_TABLE_ENTRY*TopaEntryPtr;
+ BOOLEAN IsBsp;
//
// The scope of the MSR_IA32_RTIT_* is core for below processor type, only
program
@@ -236,6 +240,12 @@ ProcTraceInitialize (
return RETURN_SUCCESS;
}
+ IsBsp = (CpuInfo->ProcessorInfo.StatusFlag & PROCESSOR_AS_BSP_BIT) ? TRUE :
FALSE;
+
+ if (ProcTraceData->EnableOnBspOnly && !IsBsp) {
+return RETURN_SUCCESS;
+ }
+
MemRegionBaseAddr = 0;
FirstIn = FALSE;
@@ -260,43 +270,59 @@ ProcTraceInitialize (
// address base in MSR, IA32_RTIT_OUTPUT_BASE (560h) bits 47:12. Note
that all regions must be
// aligned based on their size, not just 4K. Thus a 2M region must have
bits 20:12 cleared.
//
-ThreadMemRegionTable = (UINTN *)AllocatePool
(ProcTraceData->NumberOfProcessors * sizeof (UINTN *));
-if (ThreadMemRegionTable == NULL) {
- DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable
Failed\n"));
- return RETURN_OUT_OF_RESOURCES;
-}
-ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable;
-
-for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++,
ProcTraceData->AllocatedThreads++) {
- Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
- Alignment = MemRegionSize;
- AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
- if (AlignedAddress == 0) {
-DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d
threads\n", ProcTraceData->AllocatedThreads));
-if (Index == 0) {
- //
- // Could not allocate for BSP even
- //
- FreePool ((VOID *)ThreadMemRegionTable);
- ThreadMemRegionTable = NULL;
- return RETURN_OUT_OF_RESOURCES;
+Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
+Alignme
[edk2-devel] [Patch V2 2/2] UefiCpuPkg: Update PT code to support enable collect performance
Update ProcTrace feature code to support enable collect performance
data by generating CYC and TSC packets. Add a new dynamic
PCD to indicate if enable performance collecting. In ProcTrace.c
code, if this new PCD is true, after check cpuid, CYC and TSC
packets will be generated by setting the corresponding MSR bits
feilds if supported.
Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Xiao X Chen
---
UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 11
++-
UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 34
++
UefiCpuPkg/UefiCpuPkg.dec| 8
3 files changed, 44 insertions(+), 9 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index d803012ce2..1b823155b1 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -58,8 +58,9 @@
LocalApicLib
[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTracePerformanceCollecting ##
SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
index 367a9f9cfe..92926486df 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
@@ -33,6 +33,7 @@ typedef struct {
MSR_IA32_RTIT_CTL_REGISTER RtitCtrl;
MSR_IA32_RTIT_OUTPUT_BASE_REGISTER RtitOutputBase;
MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTERRtitOutputMaskPtrs;
+ BOOLEANCycPacketSupported;
} PROC_TRACE_PROCESSOR_DATA;
typedef struct {
@@ -47,6 +48,7 @@ typedef struct {
UINTN*TopaMemArray;
BOOLEAN EnableOnBspOnly;
+ BOOLEAN EnablePerformanceCollecting;
PROC_TRACE_PROCESSOR_DATA*ProcessorData;
} PROC_TRACE_DATA;
@@ -76,10 +78,11 @@ ProcTraceGetConfigData (
ASSERT (ConfigData != NULL);
ConfigData->ProcessorData = (PROC_TRACE_PROCESSOR_DATA *)((UINT8
*)ConfigData + sizeof (PROC_TRACE_DATA));
- ConfigData->NumberOfProcessors= (UINT32)NumberOfProcessors;
- ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize);
- ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme);
- ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly);
+ ConfigData->NumberOfProcessors = (UINT32)NumberOfProcessors;
+ ConfigData->ProcTraceMemSize= PcdGet32 (PcdCpuProcTraceMemSize);
+ ConfigData->ProcTraceOutputScheme = PcdGet8
(PcdCpuProcTraceOutputScheme);
+ ConfigData->EnableOnBspOnly = PcdGetBool
(PcdCpuProcTraceBspOnly);
+ ConfigData->EnablePerformanceCollecting = PcdGetBool
(PcdCpuProcTracePerformanceCollecting);
return ConfigData;
}
@@ -112,6 +115,7 @@ ProcTraceSupport (
PROC_TRACE_DATA *ProcTraceData;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx;
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECXEcx;
+ CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBXMainLeafEbx;
//
// Check if ProcTraceMemorySize option is enabled (0xFF means disable by
user)
@@ -141,6 +145,12 @@ ProcTraceSupport (
ProcTraceData->ProcessorData[ProcessorNumber].RtitCtrl.Uint64 =
AsmReadMsr64 (MSR_IA32_RTIT_CTL);
ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputBase.Uint64 =
AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_BASE);
ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputMaskPtrs.Uint64 =
AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_MASK_PTRS);
+
+if (ProcTraceData->EnablePerformanceCollecting) {
+ AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE,
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &MainLeafEbx.Uint32, NULL, NULL);
+ ProcTraceData->ProcessorData[ProcessorNumber].CycPacketSupported =
(BOOLEAN)(Main
Re: [edk2-devel] [PATCH 1/1] DynamicTablesPkg/SsdtCpuTopology: Allow multi-packages topologies
Hi Pierre,
Thank you for this patch.
These changes look good to me, other than the change-id in the commit
message (which I will drop before merging the change).
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 09/03/2023 03:32 pm, pierre.gond...@arm.com wrote:
From: Pierre Gondois
The topology of a platform is represented in ACPI using the PPTT
table. It is possible to append information to CPUs/processor
containers using their associated AML nodes in a SSDT
table.
A platform might have multiple 'physical packages' (or top-level
nodes) in their PPTT topology representation. It can be assumed
from [1] that a 'physical packages' is always a 'top-level node',
and conversely.
The SSDT topology generator doesn't support having multiple top-level
nodes. The top-level node is also not generated in the SSDT topology
representation.
Add support to generate multiple top-level nodes in the SSDT topology
generator and generate an AML node for this top-level node. This will
allow to have matching PPTT and SSDT topology representations. Prior
to this patch, this top-level AML node was not generated.
Also factorize the flag checking in CheckProcNode() and add more
checks.
This patch takes inspiration from the discussion at:
- v1: https://edk2.groups.io/g/devel/message/99410
- v2: https://edk2.groups.io/g/devel/message/99615
[1]
ACPI 6.5, 5.2.30.1 Processor hierarchy node structure (Type 0):
- "Multiple trees may be described, covering for example multiple
packages. For the root of a tree, the parent pointer should be 0.""
- "Each valid processor must belong to exactly one package. That is,
the leaf must itself be a physical package or have an ancestor
marked as a physical package."
Change-Id: I48452e623906628f44b7e2c69a34ed7b30276e92
Suggested-by: Jeff Brasen
Signed-off-by: Pierre Gondois
---
.../SsdtCpuTopologyGenerator.c| 131 +++---
.../SsdtCpuTopologyGenerator.h| 4 +
2 files changed, 84 insertions(+), 51 deletions(-)
diff --git
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index c24da8ec71ad..6fb131b66482 100644
---
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
+++
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
@@ -805,6 +805,57 @@ CreateAmlProcessorContainer (
return Status;
}
+/** Check flags and topology of a ProcNode.
+
+ @param [in] NodeFlagsFlags of the ProcNode to check.
+ @param [in] IsLeaf The ProcNode is a leaf.
+ @param [in] NodeTokenNodeToken of the ProcNode.
+ @param [in] ParentNodeToken Parent NodeToken of the ProcNode.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CheckProcNode (
+ UINT32 NodeFlags,
+ BOOLEAN IsLeaf,
+ CM_OBJECT_TOKEN NodeToken,
+ CM_OBJECT_TOKEN ParentNodeToken
+ )
+{
+ BOOLEAN InvalidFlags;
+ BOOLEAN HasPhysicalPackageBit;
+ BOOLEAN IsTopLevelNode;
+
+ HasPhysicalPackageBit = (NodeFlags & EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL) ==
+ EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL;
+ IsTopLevelNode = (ParentNodeToken == CM_NULL_TOKEN);
+
+ // A top-level node is a Physical Package and conversely.
+ InvalidFlags = HasPhysicalPackageBit ^ IsTopLevelNode;
+
+ // Check Leaf specific flags.
+ if (IsLeaf) {
+InvalidFlags |= ((NodeFlags & PPTT_LEAF_MASK) != PPTT_LEAF_MASK);
+ } else {
+InvalidFlags |= ((NodeFlags & PPTT_LEAF_MASK) != 0);
+ }
+
+ if (InvalidFlags) {
+DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: SSDT-CPU-TOPOLOGY: Invalid flags for ProcNode: 0x%p.\n",
+ (VOID *)NodeToken
+ ));
+ASSERT (0);
+return EFI_INVALID_PARAMETER;
+ }
+
+ return EFI_SUCCESS;
+}
+
/** Create an AML representation of the Cpu topology.
A processor container is by extension any non-leave device in the cpu
topology.
@@ -814,7 +865,6 @@ CreateAmlProcessorContainer (
Protocol Interface.
@param [in] NodeToken Token of the CM_ARM_PROC_HIERARCHY_INFO
currently handled.
- Cannot be CM_NULL_TOKEN.
@param [in] ParentNode Parent node to attach the created
node to.
@param [in,out] ProcContainerIndex Pointer to the current processor
container
@@ -838,6 +888,7 @@ CreateAmlCpuTopologyTree (
EFI_STATUS Status;
UINT32 Index;
UINT32 CpuIndex;
+ UINT32 ProcContainerName;
AML_OBJECT_NODE_HANDLE ProcContainerNode;
UINT32 Uid;
UINT16 Name;
@@ -846,11 +897,11 @@ CreateAmlCpuTopologyTree (
ASSERT (G
[edk2-devel] [PATCH v2 1/1] ArmPkg/PlatformBootManagerLib: Add path to boot UEFI Shell over UiApp
From: Pierre Gondois
The UEFI Shell is a non-active boot option, at the opposite of UiApp.
If no valid boot option is found, UiApp is selected. UiApp requires a
human interaction. When installing a new EDKII image in CIs or when
scripting is required, this is problematic.
If no valid boot option is discovered, add a path to directly go to
the UEFI Shell where the startup.nsh script is automatically executed.
The UEFI Shell is launched after connecting possible devices, but
before the reset that is meant to automatically make them visible.
The new PcdUefiShellDefaultBootEnable must be set to TRUE to enable
this behaviour. The Pcd is set to false by default.
Signed-off-by: Pierre Gondois
Tested-by: Patrik Berglund
---
Notes:
v2:
- Remove infinite loop when trying to boot the UEFI shell. [Ard]
- Add comment about the location of the UiApp and UEFI shell
in FV. [Ard]
ArmPkg/ArmPkg.dec | 9 ++-
.../PlatformBootManagerLib/PlatformBm.c | 72 ++-
.../PlatformBootManagerLib.inf| 4 +-
3 files changed, 82 insertions(+), 3 deletions(-)
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index f17ba913e6de..257ae58a 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,7 @@
# ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2023, ARM Limited. All rights reserved.
# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
#
#SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -221,6 +221,13 @@ [PcdsFixedAtBuild.common]
#
gArmTokenSpaceGuid.PcdArmDmaDeviceOffset|0x0|UINT64|0x044
+ #
+ # Boot the Uefi Shell instead of UiApp when no valid boot option is found.
+ # This is useful in CI environment so that startup.nsh can be launched.
+ # The default value is FALSE.
+ #
+ gArmTokenSpaceGuid.PcdUefiShellDefaultBootEnable|FALSE|BOOLEAN|0x052
+
[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x002B
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x002D
diff --git a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
index 08998ffe4d17..ea093bb72523 100644
--- a/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -2,7 +2,7 @@
Implementation for PlatformBootManagerLib library class interfaces.
Copyright (C) 2015-2016, Red Hat, Inc.
- Copyright (c) 2014 - 2021, ARM Ltd. All rights reserved.
+ Copyright (c) 2014 - 2023, Arm Ltd. All rights reserved.
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
Copyright (c) 2016, Linaro Ltd. All rights reserved.
Copyright (c) 2021, Semihalf All rights reserved.
@@ -470,6 +470,64 @@ PlatformRegisterFvBootOption (
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
}
+/** Boot a Fv Boot Option.
+
+ This function is useful for booting the UEFI Shell as it is loaded
+ as a non active boot option.
+
+ @param[in] FileGuid The File GUID.
+ @param[in] Description String describing the Boot Option.
+
+**/
+STATIC
+VOID
+PlatformBootFvBootOption (
+ IN CONST EFI_GUID *FileGuid,
+ IN CHAR16 *Description
+ )
+{
+ EFI_STATUS Status;
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ Status = gBS->HandleProtocol (
+ gImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **)&LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // The UEFI Shell was registered in PlatformRegisterFvBootOption ()
+ // previously, thus it must still be available in this FV.
+ //
+ EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
+ DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
+ ASSERT (DevicePath != NULL);
+ DevicePath = AppendDevicePathNode (
+ DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *)&FileNode
+ );
+ ASSERT (DevicePath != NULL);
+
+ Status = EfiBootManagerInitializeLoadOption (
+ &NewOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ LOAD_OPTION_ACTIVE,
+ Description,
+ DevicePath,
+ NULL,
+ 0
+ );
+ ASSERT_EFI_ERROR (Status);
+ FreePool (DevicePath);
+
+ EfiBootManagerBoot (&NewOption);
+}
+
STATIC
VOID
GetPlatformOptions (
@@ -1075,6 +1133,18 @@ PlatformBootManagerUnableToBoot (
EfiBootManagerConnectAll ();
EfiBootManagerRefreshAllBootOption ();
+ //
+ // Boot the 'UEFI Shell'. If the Pcd is not set, the UEFI Shell is not
+ // an active boot option
Re: [edk2-devel] [PATCH v5 00/13] BaseTools,CryptoPkg,EmulatorPkg,MdePkg,others: Delete CLANG35,CLANG38,VS2008-2013,EBC, deprecate GCC48,GCC49,GCC5, add GCC and GCCNOLTO, update CLANGDWARF
I've merged the OBJCOPY fix. My understanding is that you're seeing a problem on Windows with an internal build: if you could share part of the log file with filenames etc. changed to protect proprietary information that could be useful so we can try and find where the program is trying to be run that needs quotes around it. -- Rebecca Cran On 4/24/23 00:14, Michael D Kinney wrote: Hi Rebecca, I have seen some issues with CLANGDWARF and need a little time to investigate further. Mike -Original Message- From: Rebecca Cran Sent: Friday, April 21, 2023 10:15 AM To: devel@edk2.groups.io; Gao, Liming ; Feng, Bob C ; Chen, Christine ; Kinney, Michael D ; Michael Kubacki ; Sean Brogan ; Chiu, Chasel ; Desimone, Nathaniel L ; Zeng, Star ; Andrew Fish Cc: Rebecca Cran ; Ni, Ray ; Leif Lindholm ; Liu, Zhiguang ; Wang, Jian J ; Lu, Xiaoyu1 ; Jiang, Guomin ; Guo, Gua ; Ard Biesheuvel ; Pedro Falcato ; Gerd Hoffmann ; Marvin Häuser Subject: [PATCH v5 00/13] BaseTools,CryptoPkg,EmulatorPkg,MdePkg,others: Delete CLANG35,CLANG38,VS2008-2013,EBC, deprecate GCC48,GCC49,GCC5, add GCC and GCCNOLTO, update CLANGDWARF Update the toolchain definitions: - Delete the CLANG35 and CLANG38 toolchains, and replace CLANG38 with CLANGDWARF, updating it to support ARM and AARCH64 in addition to X64 and IA32. - Mark GCC48, GCC49 and GCC5 as deprecated. - Add GCC and GCCNOLTO toolchain definitions. - Remove VS2008, VS2010, VS2012 and VS2013. - Remove EBC compiler definitions. Full removal of EBC support from the various packages etc. will be done in a follow-up patch series. - Remove unused IPHONE_TOOLS and SOURCERY_CYGWIN_TOOLS definitions. - Remove unused CYGWIN_ definitions. Personal GitHub PR: https://github.com/tianocore/edk2/pull/4240 GitHub branch: https://github.com/bcran/edk2/tree/clangdwarf Note: CI is now passing. Changes from v1 to v2 = - Added a commit to delete GCC48 and GCC49, rename GCC5 to GCC and update the flags for other toolchains to work with the new GCC definitions. - Bumped VERSION from 2.00 to 3.00 to inform users that they should update their Conf/tools_def.txt. Changes from v2 to v3 = - Keep GCC48, GCC49 and GCC5 but mark them deprecated, including with warnings at the start and end of running a build. - Dropped the commit fixing the IA32 build of UefiPayloadPkg, because it causes CI to fail due to building both IA32 and X64 at the same time: "Module built under multiple ARCHs [IA32, X64]. Not able to determine which output to put into flash for Module..." - Added more information to the VERSION section in tools_def.template. - Various fixes to the CLANGDWARF flags. Changes from v3 to v4 = - Use lld for -a ARM -t CLANGDWARF. Changes from v4 to v5 = - Fixed CLANGDWARF on Windows when llvm is installed with the llvm.org installer and isn't installed in Visual Studio: use llvm-objcopy and the tools prefix. - Added flags for GCCNOLTO to UnitTestFrameworkPkgHost.dsc.inc - Added GCC flags to CryptoPkg/Library/OpensslLib/*.inf Rebecca Cran (13): BaseTools,CryptoPkg: Update CLANGDWARF, remove CLANG 35/38 toolchains BaseTools: Remove VS2008, 2010, 2012 and 2013 toolchain definitions BaseTools: Remove VS2008-VS2013 remnants MdePkg: Remove VS2008-VS2013 remnants edksetup.bat: Remove VS2008-VS2013 remnants BaseTools: Remove unused IPHONE_TOOLS and SOURCERY_CYGWIN_TOOLS defs BaseTools: Remove EBC (EFI Byte Code) compiler definitions BaseTools: Update VS toolchain descriptions in tools_def.txt.template BaseTools/Conf/tools_def.template: Add GCC and GCCNOLTO toolchains BaseTools: Only call LoadConfiguration once in build.py BaseTools: Add a deprecation warning for GCC48,GCC49,GCC5 to build.py BaseTools/Conf/tools_def.template: Add section for deprecated toolchains BaseTools/Conf/tools_def.template: Bump VERSION to 3.00 UnitTestFrameworkPkg/UnitTestFrameworkPkgHost.dsc.inc |4 IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc |9 - CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf |3 +-- CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf |3 +-- CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf |3 +-- CryptoPkg/Library/BaseCryptLib/SecCryptLib.inf |3 +-- CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf |3 +-- CryptoPkg/Library/BaseCryptLib/UnitTestHostBaseCryptLib.inf |3 +-- CryptoPkg/Library/OpensslLib/OpensslLib.inf |4 ++-- CryptoPkg/Library/OpensslLib/OpensslLibAccel.inf|4 ++-- CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf |4 ++-- CryptoPkg/Library/OpensslLib/OpensslLibFull.inf |4 ++-- CryptoPkg/Library/OpensslLib/OpensslLibFullAccel.inf|5 +++-- EmulatorPkg/Unix/Host/Host.inf
Re: [edk2-devel] [PATCH 1/5] SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path
Zhiguang,
Can you please keep the comments that explain why below 1MB memory resource
should be added for QSP platform?
Another question not related to your changes:
why "AddMemoryRangeHob (BASE_1MB, LowerMemorySize);" is only called when
PcdSmmSmramRequire is FALSE?
Thanks,
Ray
> -Original Message-
> From: Liu, Zhiguang
> Sent: Tuesday, April 25, 2023 3:03 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang ; Desimone, Nathaniel L
> ; Ni, Ray
> Subject: [PATCH 1/5] SimicsOpenBoardPkg: Build
> gEfiSmmSmramMemoryGuid Hob in S3 path
>
> gEfiSmmSmramMemoryGuid Hob is needed for SmmRelocation feature
> even for S3 path. So in MemDetect.c, remove specical code path
> for S3 about creating gEfiSmmSmramMemoryGuid Hob and adding some
> memory descriptor, which does no harm in S3 path.
>
> Cc: Nate DeSimone
> Cc: Ray Ni
> Signed-off-by: Zhiguang Liu
> ---
> .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 107 +++---
> 1 file changed, 42 insertions(+), 65 deletions(-)
>
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> index 127afffc00..d80ac1d213 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> @@ -405,79 +405,56 @@ QemuInitializeRam (
>LowerMemorySize = GetSystemMemorySizeBelow4gb ();
>UpperMemorySize = GetSystemMemorySizeAbove4gb ();
>
> - if (mBootMode == BOOT_ON_S3_RESUME) {
> -//
> -// Create the following memory HOB as an exception on the S3 boot path.
> -//
> -// Normally we'd create memory HOBs only on the normal boot path.
> However,
> -// CpuMpPei specifically needs such a low-memory HOB on the S3 path as
> -// well, for "borrowing" a subset of it temporarily, for the AP startup
> -// vector.
> -//
> -// CpuMpPei saves the original contents of the borrowed area in
> permanent
> -// PEI RAM, in a backup buffer allocated with the normal PEI services.
> -// CpuMpPei restores the original contents ("returns" the borrowed area)
> at
> -// End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before
> -// transferring control to the OS's wakeup vector in the FACS.
> -//
> -// We expect any other PEIMs that "borrow" memory similarly to
> CpuMpPei to
> -// restore the original contents. Furthermore, we expect all such PEIMs
> -// (CpuMpPei included) to claim the borrowed areas by producing
> memory
> -// allocation HOBs, and to honor preexistent memory allocation HOBs
> when
> -// looking for an area to borrow.
> -//
> -AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
> - } else {
> -//
> -// Create memory HOBs
> -//
> -AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
> + //
> + // Create memory HOBs
> + //
> + AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
>
> -if (FeaturePcdGet (PcdSmmSmramRequire)) {
> - UINT32 TsegSize;
> + if (FeaturePcdGet (PcdSmmSmramRequire)) {
> +UINT32 TsegSize;
>
> - TsegSize = mX58TsegMbytes * SIZE_1MB;
> - AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
> - AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize,
> TsegSize,
> -TRUE);
> +TsegSize = mX58TsegMbytes * SIZE_1MB;
> +AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
> +AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize,
> TsegSize,
> + TRUE);
>
> - BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> - SmramRanges = 1;
> +BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> +SmramRanges = 1;
>
> - Hob.Raw = BuildGuidHob(
> - &gEfiSmmSmramMemoryGuid,
> - BufferSize
> - );
> - ASSERT(Hob.Raw);
> -
> - SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
> *)(Hob.Raw);
> - SmramHobDescriptorBlock->NumberOfSmmReservedRegions =
> SmramRanges;
> -
> - SmramIndex = 0;
> - for (Index = 0; Index < SmramRanges; Index++) {
> -//
> -// This is an SMRAM range, create an SMRAM descriptor
> -//
> -SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
> LowerMemorySize - TsegSize;
> -SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
> LowerMemorySize - TsegSize;
> -SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =
> TsegSize;
> -SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> -SmramIndex++;
> - }
> +Hob.Raw = BuildGuidHob(
> +&gEfiSmmSmramMemoryGuid,
> +BufferSize
> +);
> +ASSERT(Hob.Raw);
>
> -} else {
> - AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
> -}
> +SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
> *)(Hob.Raw);
> +SmramHobDescriptorBlock->NumberOfSmmReservedRegions =
> SmramRanges;
>
> -//
> -// If QEMU presents an E820 map, then
Re: [edk2-devel] [PATCH 1/5] SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path
Please ignore my 2nd question.
I saw " AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);" when
PcdSmmSmramRequire is TRUE.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Ni, Ray
> Sent: Tuesday, April 25, 2023 9:49 PM
> To: Liu, Zhiguang ; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L
> Subject: Re: [edk2-devel] [PATCH 1/5] SimicsOpenBoardPkg: Build
> gEfiSmmSmramMemoryGuid Hob in S3 path
>
> Zhiguang,
> Can you please keep the comments that explain why below 1MB memory
> resource
> should be added for QSP platform?
>
> Another question not related to your changes:
> why "AddMemoryRangeHob (BASE_1MB, LowerMemorySize);" is only
> called when
> PcdSmmSmramRequire is FALSE?
>
> Thanks,
> Ray
>
> > -Original Message-
> > From: Liu, Zhiguang
> > Sent: Tuesday, April 25, 2023 3:03 PM
> > To: devel@edk2.groups.io
> > Cc: Liu, Zhiguang ; Desimone, Nathaniel L
> > ; Ni, Ray
> > Subject: [PATCH 1/5] SimicsOpenBoardPkg: Build
> > gEfiSmmSmramMemoryGuid Hob in S3 path
> >
> > gEfiSmmSmramMemoryGuid Hob is needed for SmmRelocation feature
> > even for S3 path. So in MemDetect.c, remove specical code path
> > for S3 about creating gEfiSmmSmramMemoryGuid Hob and adding some
> > memory descriptor, which does no harm in S3 path.
> >
> > Cc: Nate DeSimone
> > Cc: Ray Ni
> > Signed-off-by: Zhiguang Liu
> > ---
> > .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 107 +++---
> > 1 file changed, 42 insertions(+), 65 deletions(-)
> >
> > diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> > b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> > index 127afffc00..d80ac1d213 100644
> > --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> > +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> > @@ -405,79 +405,56 @@ QemuInitializeRam (
> >LowerMemorySize = GetSystemMemorySizeBelow4gb ();
> >UpperMemorySize = GetSystemMemorySizeAbove4gb ();
> >
> > - if (mBootMode == BOOT_ON_S3_RESUME) {
> > -//
> > -// Create the following memory HOB as an exception on the S3 boot
> path.
> > -//
> > -// Normally we'd create memory HOBs only on the normal boot path.
> > However,
> > -// CpuMpPei specifically needs such a low-memory HOB on the S3 path
> as
> > -// well, for "borrowing" a subset of it temporarily, for the AP startup
> > -// vector.
> > -//
> > -// CpuMpPei saves the original contents of the borrowed area in
> > permanent
> > -// PEI RAM, in a backup buffer allocated with the normal PEI services.
> > -// CpuMpPei restores the original contents ("returns" the borrowed
> area)
> > at
> > -// End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before
> > -// transferring control to the OS's wakeup vector in the FACS.
> > -//
> > -// We expect any other PEIMs that "borrow" memory similarly to
> > CpuMpPei to
> > -// restore the original contents. Furthermore, we expect all such PEIMs
> > -// (CpuMpPei included) to claim the borrowed areas by producing
> > memory
> > -// allocation HOBs, and to honor preexistent memory allocation HOBs
> > when
> > -// looking for an area to borrow.
> > -//
> > -AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
> > - } else {
> > -//
> > -// Create memory HOBs
> > -//
> > -AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
> > + //
> > + // Create memory HOBs
> > + //
> > + AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
> >
> > -if (FeaturePcdGet (PcdSmmSmramRequire)) {
> > - UINT32 TsegSize;
> > + if (FeaturePcdGet (PcdSmmSmramRequire)) {
> > +UINT32 TsegSize;
> >
> > - TsegSize = mX58TsegMbytes * SIZE_1MB;
> > - AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
> > - AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize,
> > TsegSize,
> > -TRUE);
> > +TsegSize = mX58TsegMbytes * SIZE_1MB;
> > +AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
> > +AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize,
> > TsegSize,
> > + TRUE);
> >
> > - BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> > - SmramRanges = 1;
> > +BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> > +SmramRanges = 1;
> >
> > - Hob.Raw = BuildGuidHob(
> > - &gEfiSmmSmramMemoryGuid,
> > - BufferSize
> > - );
> > - ASSERT(Hob.Raw);
> > -
> > - SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
> > *)(Hob.Raw);
> > - SmramHobDescriptorBlock->NumberOfSmmReservedRegions =
> > SmramRanges;
> > -
> > - SmramIndex = 0;
> > - for (Index = 0; Index < SmramRanges; Index++) {
> > -//
> > -// This is an SMRAM range, create an SMRAM descriptor
> > -//
> > -SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
> > LowerMemorySize - TsegSize;
> > -SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
> > LowerMemo
Re: [edk2-devel] [PATCH 2/5] SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect
Reviewed-by: Ray Ni
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of
> Zhiguang Liu
> Sent: Tuesday, April 25, 2023 3:03 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang ; Desimone, Nathaniel L
> ; Ni, Ray
> Subject: [edk2-devel] [PATCH 2/5] SimicsOpenBoardPkg: Move
> AcpiVariableGuid hob to MemDetect
>
> Currently, MemDetect create gEfiSmmSmramMemoryGuid Hob containing
> one
> descriptor, which should be updated later, when AcpiVariableGuid hob
> use some buffer from SmRam. However, the Hob doesn't get updated, and
> this is a bug.
>
> Move the logic creating AcpiVariableGuid hob from PEIM SmmAccessPei.inf
> to MemDetect, so that in the same file, it has both knowleage about
> the smmram and the acpi data structure. So it can create the
> gEfiSmmSmramMemoryGuid Hob containing two descriptors.
>
> Cc: Nate DeSimone
> Cc: Ray Ni
> Signed-off-by: Zhiguang Liu
> ---
> .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 36 +++
> .../SimicsPei/SimicsPei.inf | 1 +
> .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 8 -
> .../Smm/Access/SmmAccessPei.inf | 3 --
> 4 files changed, 22 insertions(+), 26 deletions(-)
>
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> index d80ac1d213..13ee415f40 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> @@ -391,11 +391,10 @@ QemuInitializeRam (
>UINT64 LowerMemorySize;
>UINT64 UpperMemorySize;
>UINTN BufferSize;
> - UINT8 SmramIndex;
>UINT8 SmramRanges;
>EFI_PEI_HOB_POINTERS Hob;
>EFI_SMRAM_HOB_DESCRIPTOR_BLOCK*SmramHobDescriptorBlock;
> - UINT8 Index;
> + VOID *GuidHob;
>
>DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
>
> @@ -418,8 +417,8 @@ QemuInitializeRam (
> AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize,
> TsegSize,
>TRUE);
>
> -BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> -SmramRanges = 1;
> +SmramRanges = 2;
> +BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) +
> (SmramRanges - 1) * sizeof(EFI_SMRAM_DESCRIPTOR);
>
> Hob.Raw = BuildGuidHob(
> &gEfiSmmSmramMemoryGuid,
> @@ -430,18 +429,25 @@ QemuInitializeRam (
> SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
> *)(Hob.Raw);
> SmramHobDescriptorBlock->NumberOfSmmReservedRegions =
> SmramRanges;
>
> -SmramIndex = 0;
> -for (Index = 0; Index < SmramRanges; Index++) {
> - //
> - // This is an SMRAM range, create an SMRAM descriptor
> - //
> - SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
> LowerMemorySize - TsegSize;
> - SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
> LowerMemorySize - TsegSize;
> - SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =
> TsegSize;
> - SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> - SmramIndex++;
> -}
> +//
> +// Create first SMRAM descriptor, which contains data structures used in
> S3 resume.
> +// One page is enough for the data structure
> +//
> +SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> LowerMemorySize - TsegSize;
> +SmramHobDescriptorBlock->Descriptor[0].CpuStart = LowerMemorySize -
> TsegSize;
> +SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[0].RegionState =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE | EFI_ALLOCATED;
> +GuidHob = BuildGuidHob (&gEfiAcpiVariableGuid,
> sizeof(EFI_SMRAM_DESCRIPTOR));
> +ASSERT (GuidHob != NULL);
> +CopyMem (GuidHob, &SmramHobDescriptorBlock->Descriptor[0],
> sizeof(EFI_SMRAM_DESCRIPTOR));
>
> +//
> +// Create second SMRAM descriptor, which is free and will be used by
> SMM foundation.
> +//
> +SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
> SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].CpuStart =
> SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].PhysicalSize = TsegSize -
> EFI_PAGE_SIZE;
> +SmramHobDescriptorBlock->Descriptor[1].RegionState =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE;
>} else {
> AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
>}
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> index 710fa680be..618ad4075f 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> +++ b/Platform/Intel/SimicsOpen
Re: [edk2-devel] [PATCH 3/5] SimicsOpenBoardPkg: Use SmmAccessLib instead of SmmAccessPei.inf
Can you fix some typos in the commit message?
With that, Reviewed-by: Ray Ni
> -Original Message-
> From: Liu, Zhiguang
> Sent: Tuesday, April 25, 2023 3:03 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang ; Desimone, Nathaniel L
> ; Ni, Ray
> Subject: [PATCH 3/5] SimicsOpenBoardPkg: Use SmmAccessLib instead of
> SmmAccessPei.inf
>
> SmmAccessPei.inf is a PEIM we should deleted, here is the reason:
> 1. It programs registers MCH_TOLUD to set the Low Usable DRAM,
> but reading LMCH_TOLUD always return zere in QSP platforms
> 2. It programs/reads MCH_TSEGMB to implemte some Smm Access service
> such as open/close/lock. However, this reading LMCH_TOLUD also always
> return zere in QSP platforms
> 3. It returns the hard-code Smm range information. However, there are
> two improper things about this. One is that we already have the hard
> code value about T-Seg base/size in MemDetect. The other Smm range
> informaton is already saved in gEfiSmmSmramMemoryGuid Hob. No need
> hard-code value.
>
> So, this patch uses another way, calling PeiInstallSmmAccessPpi from
> SmmAccessLib. The lib instance we choose will use the
> gEfiSmmSmramMemoryGuid Hob information.
> In a word, with the patch, we can avoid additional hard-code, and
> avoid programing unimplemented registers.
>
> Cc: Nate DeSimone
> Cc: Ray Ni
> Signed-off-by: Zhiguang Liu
> ---
> .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc| 7 +--
> .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf| 1 -
> Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 9
> +
> .../Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 2 ++
> 4 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> index 7b98baf764..fcae343146 100644
> ---
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
> @@ -142,6 +142,7 @@
># Silicon Package
>#
>
> ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLi
> b.inf
> +
> SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLi
> b/PeiSmmAccessLib.inf
>
>#
># Platform Package
> @@ -190,12 +191,6 @@
>###
># Silicon Initialization Package
>###
> -!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
> - $(SKT_PKG)/Smm/Access/SmmAccessPei.inf {
> -
> - PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
> - }
> -!endif
>
>#
># Platform Package
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> index 221706ae03..844f9b6dcf 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
> @@ -165,7 +165,6 @@ INF
> MinPlatformPkg/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
> !include MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
>
> INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
> -INF $(SKT_PKG)/Smm/Access/SmmAccessPei.inf
> # S3 SMM PEI driver
> #INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
>
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> index 13ee415f40..f9a5487365 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
> @@ -25,6 +25,7 @@
> #include
> #include
> #include
> +#include
>
> #include
>
> @@ -472,6 +473,8 @@ InitializeRamRegions (
>VOID
>)
> {
> + EFI_STATUS Status;
> +
>QemuInitializeRam ();
>
>if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
> @@ -544,4 +547,10 @@ InitializeRamRegions (
> );
> }
>}
> +
> + //
> + // Install EFI_PEI_MM_ACCESS_PPI for S3 resume case
> + //
> + Status = PeiInstallSmmAccessPpi ();
> + ASSERT_EFI_ERROR (Status);
> }
> diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> index 618ad4075f..cdc30ad582 100644
> --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
> @@ -36,6 +36,7 @@
>SimicsX58SktPkg/SktPkg.dec
>SimicsIch10Pkg/Ich10Pkg.dec
>BoardModulePkg/BoardModulePkg.dec
> + IntelSiliconPkg/IntelSiliconPkg.dec
>
> [Guids]
>gEfiMemoryTypeInformationGuid
> @@ -55,6 +56,7 @@
>MtrrLib
>PcdLib
>CmosAccessLib
> + SmmAccessLib
>
> [Pcd]
>gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBas
Re: [edk2-devel] [PATCH 4/5] SimicsOpenBoardPkg: Use another SmmAccess Driver
The code change looks good to me. Can you refine your commit message a bit to explain what the bug is? Thanks, Ray > -Original Message- > From: Liu, Zhiguang > Sent: Tuesday, April 25, 2023 3:03 PM > To: devel@edk2.groups.io > Cc: Liu, Zhiguang ; Desimone, Nathaniel L > ; Ni, Ray > Subject: [PATCH 4/5] SimicsOpenBoardPkg: Use another SmmAccess Driver > > Because of the similiar reason I mentioned in last commit, the > SmmAccess2Dxe.inf driver should be deleted and the replacement > will avoid hard-code and use gEfiSmmSmramMemoryGuid Hob to get > Smm Range information. > > This can fix an exsiting bug, when gSmmBaseHobGuid may allocate buffer > from smm range, and update gEfiSmmSmramMemoryGuid Hob. Current > driver will return hard-code smm range and the buffer used > by gSmmBaseHobGuid is marked as free range by mistake. > > Cc: Nate DeSimone > Cc: Ray Ni > Signed-off-by: Zhiguang Liu > --- > .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 2 +- > Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf| 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > index fcae343146..64c3af2584 100644 > --- > a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > +++ > b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc > @@ -278,7 +278,7 @@ > !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE >$(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf >$(PCH_PKG)/Spi/Smm/PchSpiSmm.inf > - $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf > + IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf >IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf > !endif > > diff --git a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf > b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf > index fdcb4fb9a7..ca3706578b 100644 > --- a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf > +++ b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf > @@ -8,7 +8,7 @@ > ## > > !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE > - INF $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf > + INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf >INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf > !endif > INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf > -- > 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103545): https://edk2.groups.io/g/devel/message/103545 Mute This Topic: https://groups.io/mt/98488194/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 5/5] SimicsX58SktPkg: Remove unused Smm related modules
Reviewed-by: Ray Ni
> -Original Message-
> From: Liu, Zhiguang
> Sent: Tuesday, April 25, 2023 3:03 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang ; Desimone, Nathaniel L
> ; Ni, Ray
> Subject: [PATCH 5/5] SimicsX58SktPkg: Remove unused Smm related
> modules
>
> In last two commit, I replace the two SMM related modules, and now
> no platform will use these two moduels. Remove them
>
> Cc: Nate DeSimone
> Cc: Ray Ni
> Signed-off-by: Zhiguang Liu
> ---
> .../Smm/Access/SmmAccess2Dxe.c| 148
> .../Smm/Access/SmmAccess2Dxe.inf | 54 ---
> .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 338 --
> .../Smm/Access/SmmAccessPei.inf | 62
> .../Smm/Access/SmramInternal.c| 200 ---
> .../Smm/Access/SmramInternal.h| 82 -
> 6 files changed, 884 deletions(-)
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c
> delete mode 100644
> Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h
>
> diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
> b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
> deleted file mode 100644
> index 5d3b2c14aa..00
> --- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
> +++ /dev/null
> @@ -1,148 +0,0 @@
> -/** @file
> - A DXE_DRIVER providing SMRAM access by producing
> EFI_SMM_ACCESS2_PROTOCOL.
> -
> - X58 TSEG is expected to have been verified and set up by the
> SmmAccessPei
> - driver.
> -
> - Copyright (C) 2013, 2015, Red Hat, Inc.
> - Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
> -
> - SPDX-License-Identifier: BSD-2-Clause-Patent
> -**/
> -
> -#include
> -#include
> -#include
> -#include
> -
> -#include "SmramInternal.h"
> -
> -/**
> - Opens the SMRAM area to be accessible by a boot-service driver.
> -
> - This function "opens" SMRAM so that it is visible while not inside of SMM.
> - The function should return EFI_UNSUPPORTED if the hardware does not
> support
> - hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the
> SMRAM
> - configuration is locked.
> -
> - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
> -
> - @retval EFI_SUCCESS The operation was successful.
> - @retval EFI_UNSUPPORTED The system does not support opening and
> closing of
> -SMRAM.
> - @retval EFI_DEVICE_ERROR SMRAM cannot be opened, perhaps because
> it is
> -locked.
> -**/
> -STATIC
> -EFI_STATUS
> -EFIAPI
> -SmmAccess2DxeOpen (
> - IN EFI_SMM_ACCESS2_PROTOCOL *This
> - )
> -{
> - return SmramAccessOpen (&This->LockState, &This->OpenState);
> -}
> -
> -/**
> - Inhibits access to the SMRAM.
> -
> - This function "closes" SMRAM so that it is not visible while outside of
> SMM.
> - The function should return EFI_UNSUPPORTED if the hardware does not
> support
> - hiding of SMRAM.
> -
> - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
> -
> - @retval EFI_SUCCESS The operation was successful.
> - @retval EFI_UNSUPPORTED The system does not support opening and
> closing of
> -SMRAM.
> - @retval EFI_DEVICE_ERROR SMRAM cannot be closed.
> -**/
> -STATIC
> -EFI_STATUS
> -EFIAPI
> -SmmAccess2DxeClose (
> - IN EFI_SMM_ACCESS2_PROTOCOL *This
> - )
> -{
> - return SmramAccessClose (&This->LockState, &This->OpenState);
> -}
> -
> -/**
> - Inhibits access to the SMRAM.
> -
> - This function prohibits access to the SMRAM region. This function is
> usually
> - implemented such that it is a write-once operation.
> -
> - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
> -
> - @retval EFI_SUCCESS The device was successfully locked.
> - @retval EFI_UNSUPPORTED The system does not support locking of
> SMRAM.
> -**/
> -STATIC
> -EFI_STATUS
> -EFIAPI
> -SmmAccess2DxeLock (
> - IN EFI_SMM_ACCESS2_PROTOCOL *This
> - )
> -{
> - return SmramAccessLock (&This->LockState, &This->OpenState);
> -}
> -
> -/**
> - Queries the memory controller for the possible regions that will support
> - SMRAM.
> -
> - @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
> - @param[in,out] SmramMapSize A pointer to the size, in bytes, of the
> -SmramMemoryMap buffer.
> - @param[in,out] SmramMap A pointer to the buffer in which firmware
> -places the current memory map.
> -
> - @retval EFI_SUCCESS The chipset supported the given resource.
> - @retval EFI_BUFFER_TOO_SMALL The SmramMap
Re: [edk2-devel] [Patch V2 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP
> +if (ProcTraceData->EnableOnBspOnly) {
1. can you please add comments here to remind reader that
this is also the first and only time ProcTraceInitialize() runs?
Similar comments in the next chunk code.
> + MemRegionBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages,
> Alignment);
> + if (MemRegionBaseAddr == 0) {
> +//
> +// Could not allocate for BSP even
> +//
> +DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate
> buffer for BSP\n"));
> +return RETURN_OUT_OF_RESOURCES;
> + }
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Re: [edk2-devel] [Patch V2 2/2] UefiCpuPkg: Update PT code to support enable collect performance
> @@ -112,6 +115,7 @@ ProcTraceSupport (
>PROC_TRACE_DATA *ProcTraceData;
>CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx;
>CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECXEcx;
> + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBXMainLeafEbx;
1. can you update the "Ecx" to "ProcTraceEcx", and "MainLeafEbx" to
"ProcTraceEbx"?
>
>//
>// Check if ProcTraceMemorySize option is enabled (0xFF means disable by
> user)
> @@ -141,6 +145,12 @@ ProcTraceSupport (
> ProcTraceData->ProcessorData[ProcessorNumber].RtitCtrl.Uint64 =
> AsmReadMsr64 (MSR_IA32_RTIT_CTL);
> ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputBase.Uint64
> = AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_BASE);
> ProcTraceData-
> >ProcessorData[ProcessorNumber].RtitOutputMaskPtrs.Uint64 =
> AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_MASK_PTRS);
> +
> +if (ProcTraceData->EnablePerformanceCollecting) {
> + AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE,
> CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &MainLeafEbx.Uint32,
> NULL, NULL);
2. There is an existing Cpuid call earlier. Can you get the "EBX" value in the
existing
Cpuid call? And you don't even need to check "EnablePerformanceCollecting"
here
for the capability detection.
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Re: [edk2-devel] [PATCH v5 00/13] BaseTools,CryptoPkg,EmulatorPkg,MdePkg,others: Delete CLANG35,CLANG38,VS2008-2013,EBC, deprecate GCC48,GCC49,GCC5, add GCC and GCCNOLTO, update CLANGDWARF
Made some progress on root cause. Related to rename of CLANG38 to CLANGDWARF definitions for IA32. Wil give an update in a few hours after some more testing. Mike > -Original Message- > From: devel@edk2.groups.io On Behalf Of Rebecca Cran > Sent: Tuesday, April 25, 2023 6:10 AM > To: devel@edk2.groups.io; Kinney, Michael D ; > Gao, Liming ; Feng, Bob C > ; Chen, Christine ; Michael > Kubacki ; Sean Brogan > ; Chiu, Chasel ; Desimone, > Nathaniel L ; Zeng, > Star ; Andrew Fish > Cc: Ni, Ray ; Leif Lindholm ; > Liu, Zhiguang ; Wang, Jian J > ; Lu, Xiaoyu1 ; Jiang, Guomin > ; Guo, Gua > ; Ard Biesheuvel ; Pedro Falcato > ; Gerd Hoffmann > ; Marvin Häuser > Subject: Re: [edk2-devel] [PATCH v5 00/13] > BaseTools,CryptoPkg,EmulatorPkg,MdePkg,others: Delete CLANG35,CLANG38,VS2008- > 2013,EBC, deprecate GCC48,GCC49,GCC5, add GCC and GCCNOLTO, update CLANGDWARF > > I've merged the OBJCOPY fix. My understanding is that you're seeing a > problem on Windows with an internal build: if you could share part of > the log file with filenames etc. changed to protect proprietary > information that could be useful so we can try and find where the > program is trying to be run that needs quotes around it. > > > -- > > Rebecca Cran > > > On 4/24/23 00:14, Michael D Kinney wrote: > > Hi Rebecca, > > > > I have seen some issues with CLANGDWARF and need a little time to > > investigate further. > > > > Mike > > > >> -Original Message- > >> From: Rebecca Cran > >> Sent: Friday, April 21, 2023 10:15 AM > >> To: devel@edk2.groups.io; Gao, Liming ; Feng, > >> Bob C ; Chen, Christine > >> ; Kinney, Michael D ; > >> Michael Kubacki ; Sean > >> Brogan ; Chiu, Chasel ; > >> Desimone, Nathaniel L > >> ; Zeng, Star ; Andrew > >> Fish > >> Cc: Rebecca Cran ; Ni, Ray ; Leif > >> Lindholm ; Liu, Zhiguang > >> ; Wang, Jian J ; Lu, > >> Xiaoyu1 ; Jiang, Guomin > >> ; Guo, Gua ; Ard Biesheuvel > >> ; Pedro Falcato > >> ; Gerd Hoffmann ; Marvin > >> Häuser > >> Subject: [PATCH v5 00/13] BaseTools,CryptoPkg,EmulatorPkg,MdePkg,others: > >> Delete CLANG35,CLANG38,VS2008-2013,EBC, deprecate > >> GCC48,GCC49,GCC5, add GCC and GCCNOLTO, update CLANGDWARF > >> > >> Update the toolchain definitions: > >> > >> - Delete the CLANG35 and CLANG38 toolchains, and replace CLANG38 with > >>CLANGDWARF, updating it to support ARM and AARCH64 in addition to X64 > >> and IA32. > >> > >> - Mark GCC48, GCC49 and GCC5 as deprecated. > >> > >> - Add GCC and GCCNOLTO toolchain definitions. > >> > >> - Remove VS2008, VS2010, VS2012 and VS2013. > >> > >> - Remove EBC compiler definitions. Full removal of EBC support from the > >>various packages etc. will be done in a follow-up patch series. > >> > >> - Remove unused IPHONE_TOOLS and SOURCERY_CYGWIN_TOOLS definitions. > >> > >> - Remove unused CYGWIN_ definitions. > >> > >> Personal GitHub PR: https://github.com/tianocore/edk2/pull/4240 > >> GitHub branch: https://github.com/bcran/edk2/tree/clangdwarf > >> > >> Note: CI is now passing. > >> > >> Changes from v1 to v2 > >> = > >> > >> - Added a commit to delete GCC48 and GCC49, rename GCC5 to GCC and > >>update the flags for other toolchains to work with the new GCC > >>definitions. > >> > >> - Bumped VERSION from 2.00 to 3.00 to inform users that they should > >>update their Conf/tools_def.txt. > >> > >> Changes from v2 to v3 > >> = > >> > >> - Keep GCC48, GCC49 and GCC5 but mark them deprecated, including with > >>warnings at the start and end of running a build. > >> > >> - Dropped the commit fixing the IA32 build of UefiPayloadPkg, because it > >>causes CI to fail due to building both IA32 and X64 at the same time: > >> > >>"Module built under multiple ARCHs [IA32, X64]. Not able to determine > >> which output to put into flash for Module..." > >> > >> - Added more information to the VERSION section in tools_def.template. > >> > >> - Various fixes to the CLANGDWARF flags. > >> > >> Changes from v3 to v4 > >> = > >> > >> - Use lld for -a ARM -t CLANGDWARF. > >> > >> Changes from v4 to v5 > >> = > >> > >> - Fixed CLANGDWARF on Windows when llvm is installed with the llvm.org > >>installer and isn't installed in Visual Studio: use llvm-objcopy and the > >>tools prefix. > >> > >> - Added flags for GCCNOLTO to UnitTestFrameworkPkgHost.dsc.inc > >> > >> - Added GCC flags to CryptoPkg/Library/OpensslLib/*.inf > >> > >> Rebecca Cran (13): > >>BaseTools,CryptoPkg: Update CLANGDWARF, remove CLANG 35/38 toolchains > >>BaseTools: Remove VS2008, 2010, 2012 and 2013 toolchain definitions > >>BaseTools: Remove VS2008-VS2013 remnants > >>MdePkg: Remove VS2008-VS2013 remnants > >>edksetup.bat: Remove VS2008-VS2013 remnants > >>BaseTools: Remove unused IPHONE_TOOLS and SOURCERY_CYGWIN_TOOLS defs > >>BaseTools: Remove EBC (EFI Byte Code) compiler definitions > >>BaseTools: Update VS toolcha
[edk2-devel] [RFC PATCH v1 05/30] ArmPkg & ArmVirtPkg: Make PcdMonitorConduitHvc a dynamic PCD
The monitor call conduit is fixed for a platform firmware in
most scenarios. For a normal virtual machine guest firmware,
the default conduit is HVC. However, for Arm CCA the Realm
code must use SMC as the conduit.
To have a common code base for Guest/Virtual firmware to be used
by both normal VMs and Realm VMs, make PcdMonitorConduitHvc as a
dynamic PCD. This allows the firmware to detect if it is running
in a Realm and it can configure the PcdMonitorConduitHvc as FALSE
(i.e. to use SMC as the conduit when running in a Realm).
Also update the ArmVirtPkg/ArmVirtKvmTool.dsc workspace to move
the PcdMonitorConduitHvc in the PcdsDynamic section to prevent
the build from breaking.
Signed-off-by: Sami Mujawar
---
ArmPkg/ArmPkg.dec| 10 +-
ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c | 4 ++--
ArmVirtPkg/ArmVirtKvmTool.dsc| 4 ++--
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index
f17ba913e6de1326d49b93d6a15378ff2f522d24..0730533e512d60fcba19c4cfa84944061d16f02e
100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -139,11 +139,6 @@ [PcdsFeatureFlag.common]
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x0042
- ## Define the conduit to use for monitor calls.
- # Default PcdMonitorConduitHvc = FALSE, conduit = SMC
- # If PcdMonitorConduitHvc = TRUE, conduit = HVC
- gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x0047
-
[PcdsFeatureFlag.ARM]
# Whether to map normal memory as non-shareable. FALSE is the safe choice,
but
# TRUE may be appropriate to fix performance problems if you don't care about
@@ -393,6 +388,11 @@ [PcdsFixedAtBuild.common, PcdsDynamic.common]
gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x0059
gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x005A
+ ## Define the conduit to use for monitor calls.
+ # Default PcdMonitorConduitHvc = FALSE, conduit = SMC
+ # If PcdMonitorConduitHvc = TRUE, conduit = HVC
+ gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x0047
+
[PcdsDynamicEx]
#
# This dynamic PCD hold the GUID of a firmware FFS which contains
diff --git a/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
index
741f5c615744dc5cc5381ff3848078f93858dd2b..221724125ce3a8f351a55a81f441409a99bcb5cf
100644
--- a/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
+++ b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
@@ -1,7 +1,7 @@
/** @file
Arm Monitor Library.
- Copyright (c) 2022, Arm Limited. All rights reserved.
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -26,7 +26,7 @@ ArmMonitorCall (
IN OUT ARM_MONITOR_ARGS *Args
)
{
- if (FeaturePcdGet (PcdMonitorConduitHvc)) {
+ if (PcdGetBool (PcdMonitorConduitHvc)) {
ArmCallHvc ((ARM_HVC_ARGS *)Args);
} else {
ArmCallSmc ((ARM_SMC_ARGS *)Args);
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index
d2228a95726b24fe5c2edfbc84b1f5c23a85feba..467e5c166e1bbad3acbae78f53c225f5bac525a9
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -117,8 +117,6 @@ [PcdsFeatureFlag.common]
# Use MMIO for accessing RTC controller registers.
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|TRUE
- gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
-
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F
@@ -237,6 +235,8 @@ [PcdsDynamicDefault.common]
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0
+ gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
+
#
# Components Section - list of all EDK II Modules needed by this Platform
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 01/30] ArmVirtPkg: kvmtool: Add Emulated Runtime variable support
Although Kvmtool supports a CFI flash interface, it is currently
implemented using file backed support on the Host. This scenario
requires the VMM to be within the trust boundary.
In Confidential Compute Architecture the VMM is outside the trust
boundary. For such architectures Emulated Runtime variable storage
is desirable.
Therefore, make Emulated Runtime variable storage as the default
option and add a build flag ENABLE_CFI_FLASH to configure the
firmware build to use the CFI Flash as the Variable storage.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtKvmTool.dsc | 22 +++-
ArmVirtPkg/ArmVirtKvmTool.fdf | 4 +++-
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index
d0afe1b49e250c554313c2077b89650d6f6d67cb..d2228a95726b24fe5c2edfbc84b1f5c23a85feba
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -1,7 +1,7 @@
# @file
# Workspace file for KVMTool virtual platform.
#
-# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -50,7 +50,9 @@ [LibraryClasses.common]
ArmVirtMemInfoLib|ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+!ifdef ENABLE_CFI_FLASH
VirtNorFlashPlatformLib|ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtoolLib.inf
+!endif
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
@@ -156,6 +158,13 @@ [PcdsFixedAtBuild.common]
#
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
+!ifndef ENABLE_CFI_FLASH
+ # Emulate Runtime Variable storage
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
+!endif
+
[PcdsPatchableInModule.common]
#
# This will be overridden in the code
@@ -211,6 +220,7 @@ [PcdsDynamicDefault.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
+!ifdef ENABLE_CFI_FLASH
# Setup Flash storage variables
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x4
@@ -218,6 +228,10 @@ [PcdsDynamicDefault.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x4
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x4
+!else
+ # Emulate Runtime Variable storage
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
+!endif
## RTC Register address in MMIO space.
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0
@@ -263,7 +277,9 @@ [Components.common]
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+!ifdef ENABLE_CFI_FLASH
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+!endif
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
@@ -271,7 +287,9 @@ [Components.common]
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf {
+!ifdef ENABLE_CFI_FLASH
NULL|ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtoolLib.inf
+!endif
}
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
@@ -296,11 +314,13 @@ [Components.common]
NULL|ArmVirtPkg/Library/ArmVirtTimerFdtClientLib/ArmVirtTimerFdtClientLib.inf
}
+!ifdef ENABLE_CFI_FLASH
OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf {
# don't use unaligned CopyMem () on the UEFI varstore NOR flash region
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
+!endif
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.fdf b/ArmVirtPkg/ArmVirtKvmTool.fdf
index
82aff47673cb3085c91c1dd7431683c8353c16e6..8ccbccd71e134e0ea97d49380293687aca43e8b9
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.fdf
+++ b/ArmVirtPkg/ArmVirtKvmTool.fdf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -154,7 +154,9 @@ [FV.FvMain]
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+!ifdef ENABLE_CFI_FLASH
INF OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf
+!endif
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 06/30] ArmVirtPkg: Add Arm CCA Realm Service Interface Library
The Realm Management Monitor (RMM) is a software component which
forms part of a system which implements the Arm Confidential Compute
Architecture (CCA) and is responsible for management of Realms.
The RMM specification defines a Realm Service Interface (RSI) that
the Guest can use to request services from the RMM.
Therefore, add a library that implements the RSI interfaces to:
- query the RSI version
- get the Realm configuration.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtPkg.dec| 1 +
ArmVirtPkg/Include/Library/ArmCcaRsiLib.h| 72 ++
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h | 40 ++
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 145
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf | 29
5 files changed, 287 insertions(+)
diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index
4645c91a83756603141717baadd9f3e9b482cdb2..0bc7d697428636d42ffb27e8e92fca947665a79e
100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -26,6 +26,7 @@ [Includes.common]
Include# Root include for the package
[LibraryClasses]
+ ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h
ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
[Guids.common]
diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
new file mode 100644
index
..ab70240b3ab2979996f20190ddf669b53183556b
--- /dev/null
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -0,0 +1,72 @@
+/** @file
+ Library that implements the Arm CCA Realm Service Interface calls.
+
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+
+ @par Reference(s):
+ - Realm Management Monitor (RMM) Specification, version A-bet0
+ (https://developer.arm.com/documentation/den0137/)
+**/
+
+#ifndef ARM_CCA_RSI_LIB_
+#define ARM_CCA_RSI_LIB_
+
+#include
+
+/**
+ A macro defining the size of a Realm Granule.
+ See Section A2.2, RMM Specification, version A-bet0
+ DNBXXX A Granule is a unit of physical memory whose size is 4KB.
+*/
+#define REALM_GRANULE_SIZE SIZE_4KB
+
+/** A structure describing the Realm Configuration.
+ See Section B4.4.4 RsiRealmConfig type, RMM Specification, version A-bet0
+ The width of the RsiRealmConfig structure is 4096 (0x1000) bytes.
+*/
+typedef struct RealmConfig {
+ // Width of IPA in bits.
+ UINT64IpaWidth;
+ // Unused bits of the RsiRealmConfig structure should be zero.
+ UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
+} REALM_CONFIG;
+
+/**
+ Read the Realm Configuration.
+
+ @param [out] Config Pointer to the address of the buffer to retrieve
+ the Realm configuration.
+
+ Note: The buffer to retrieve the Realm configuration must be aligned to the
+Realm granule size.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetRealmConfig (
+ IN REALM_CONFIG *Config
+ );
+
+/**
+ Get the version of the RSI implementation.
+
+ @param [out] Major The major version of the RSI implementation.
+ @param [out] Minor The minor version of the RSI implementation.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ */
+RETURN_STATUS
+EFIAPI
+RsiGetVersion (
+ OUT UINT16 *CONST Major,
+ OUT UINT16 *CONST Minor
+ );
+
+#endif // ARM_CCA_RSI_LIB_
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
new file mode 100644
index
..90e9dbb609679c82cd8e8ee8081428fd97021f97
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -0,0 +1,40 @@
+/** @file
+ Definitions for Arm CCA Realm Service Interface.
+
+ Copyright (c) 2022 - 2023, ARM Ltd. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+
+ @par Reference(s):
+ - Realm Management Monitor (RMM) Specification, version A-bet0
+ (https://developer.arm.com/documentation/den0137/)
+**/
+
+#ifndef ARM_CCA_RSI_H_
+#define ARM_CCA_RSI_H_
+
+// FIDs for Realm Service Interface calls.
+#define FID_RSI_REALM_CONFIG 0xC4000196
+#define FID_RSI_VERSION 0xC4000190
+
+/** RSI Command Return codes
+ See Section B4.4.1, RMM Specification, version A-bet0.
+ The width of the RsiCommandReturnCode enumeration is 64 bits.
+*/
+#define RSI_SUCCESS 0ULL
+#define RSI_ERROR_INPUT 1ULL
+#define RSI_ERROR_STATE 2ULL
+#define RSI_INCOMPLETE 3ULL
+
+/** RSI interface Version
+ See Section B4.4.3, RMM Specification, version A-bet0.
+ The width of the RsiInterfaceVe
[edk2-devel] [RFC PATCH v1 08/30] ArmVirtPkg: ArmCcaRsiLib: Add an interface to get an attestation token
A CCA attestation token is a collection of claims about the state of a
Realm and of the CCA platform on which the Realm is running.
A CCA attestation token consists of two parts:
* Realm token - Contains attributes of the Realm, including:
# Realm Initial Measurement
# Realm Extensible Measurements
* CCA platform token - Contains attributes of the CCA platform
on which the Realm is running, including:
# CCA platform identity
# CCA platform life cycle state
# CCA platform software component measurements
The CCA attestation token is used by a verification service to validate
these claims.
The Realm Service Interface defines the following interfaces to retrieve
an attestation token from the Realm Management Monitor (RMM).
- RSI_ATTESTATION_TOKEN_INIT
- RSI_ATTESTATION_TOKEN_CONTINUE
Therefore, update the ArmCcaRsiLib to add an interface to get an
attestation token from the RMM.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 42 +
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h| 10 +-
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 193
3 files changed, 241 insertions(+), 4 deletions(-)
diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index
ae798a2feb9c3c417f06b7c2dfdb49479731df52..fe176d83c4b11d3f7bb35c97ec8ef00a4f47f981
100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -31,6 +31,19 @@
*/
#define RIPAS_TYPE_MASK 0xFF
+/* Maximum attestation token size
+ RBXKKY The size of an attestation token is no larger than 4KB.
+*/
+#define MAX_ATTESTATION_TOKEN_SIZE SIZE_4KB
+
+/* Maximum challenge data size in bits.
+*/
+#define MAX_CHALLENGE_DATA_SIZE_BITS 512
+
+/* Minimum recommended challenge data size in bits.
+*/
+#define MIN_CHALLENGE_DATA_SIZE_BITS 256
+
/** An enum describing the RSI RIPAS.
See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
*/
@@ -51,6 +64,35 @@ typedef struct RealmConfig {
UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
} REALM_CONFIG;
+/**
+ Retrieve an attestation token from the RMM.
+
+ @param [in] ChallengeData Pointer to the challenge data to be
+ included in the attestation token.
+ @param [in] ChallengeDataSizeBits Size of the challenge data in bits.
+ @param [out] TokenBuffer Pointer to a buffer to store the
+ retrieved attestation token.
+ @param [in, out] TokenBufferSize Size of the token buffer on input and
+ number of bytes stored in token
buffer
+ on return.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_ABORTEDThe operation was aborted as the state
+of the Realm or REC does not match the
+state expected by the command.
+ @retval RETURN_NOT_READY The operation requested by the command
+is not complete.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetAttestationToken (
+ IN CONST UINT8 *CONST ChallengeData,
+ INUINT64 ChallengeDataSizeBits,
+ OUT UINT8 *CONST TokenBuffer,
+ IN OUTUINT64 *CONST TokenBufferSize
+ );
+
/**
Returns the IPA state for the page pointed by the address.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index
9cc12bc5a70b457367077d0b26011c3b91fa63c9..325234d06695befc840dcf37e951130dfe0550c3
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -18,10 +18,12 @@
#define ARM_CCA_RSI_H_
// FIDs for Realm Service Interface calls.
-#define FID_RSI_IPA_STATE_GET 0xC4000198
-#define FID_RSI_IPA_STATE_SET 0xC4000197
-#define FID_RSI_REALM_CONFIG 0xC4000196
-#define FID_RSI_VERSION0xC4000190
+#define FID_RSI_ATTESTATION_TOKEN_CONTINUE 0xC4000195
+#define FID_RSI_ATTESTATION_TOKEN_INIT 0xC4000194
+#define FID_RSI_IPA_STATE_GET 0xC4000198
+#define FID_RSI_IPA_STATE_SET 0xC4000197
+#define FID_RSI_REALM_CONFIG0xC4000196
+#define FID_RSI_VERSION 0xC4000190
/** RSI Command Return codes
See Section B4.4.1, RMM Specification, version A-bet0.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index
546df9a94cb86533b37fef7e42fdaf7b8563052d..01ecee3a6798c0e5cefd9fb4f48788d3063c94cd
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -82,6 +82,199 @@ AddrIsGranuleAligned (
return TRUE;
}
+/**
+ Continue the operation to retrieve an attesta
[edk2-devel] [RFC PATCH v1 07/30] ArmVirtPkg: ArmCcaRsiLib: Add interfaces to manage the Realm IPA state
The IPA space of a Realm is divided into two halves: Protected IPA space
and Unprotected IPA space. Software in a Realm should treat the most
significant bit of an IPA as a protection attribute. A Protected IPA is
an address in the lower half of a Realm's IPA space. An Unprotected IPA
is an address in the upper half of a Realm's IPA space.
A Protected IPA has an associated Realm IPA state (RIPAS). The RIPAS
values are:
* EMPTY - Unused address
* RAM- Private code or data owned by the Realm.
Software in the Realm needs to share memory with the host to communicate
with the outside world, e.g. network, disk image, etc.
To share memory, the software in the Realm first transitions the RIPAS
of memory region it wants to share with the host from RAM to EMPTY. The
Realm software can then access the shared memory region using the
Unprotected IPA address.
The RMM specification defines the following Realm Service Interfaces for
managing the IPA state:
* RSI_IPA_STATE_GET
* RSI_IPA_STATE_SET
Therefore, update the ArmCcaRsiLib to add interfaces to get and set the
IPA state of Realm memory pages.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 50 +++
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h| 7 +-
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 92
3 files changed, 147 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index
ab70240b3ab2979996f20190ddf669b53183556b..ae798a2feb9c3c417f06b7c2dfdb49479731df52
100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -6,6 +6,7 @@
- Rsi or RSI - Realm Service Interface
- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
@par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -24,6 +25,21 @@
*/
#define REALM_GRANULE_SIZE SIZE_4KB
+/**
+ A macro defining the mask for the RSI RIPAS type.
+ See Section B4.4.5 RsiRipas type, RMM Specification, version A-bet0.
+*/
+#define RIPAS_TYPE_MASK 0xFF
+
+/** An enum describing the RSI RIPAS.
+ See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0
+*/
+typedef enum Ripas {
+ RIPAS_EMPTY, ///< Unused IPA location.
+ RIPAS_RAM,///< Private code or data owned by the Realm.
+ RIPAS_MAX ///< A valid RIPAS type value is less than RIPAS_MAX.
+} RIPAS;
+
/** A structure describing the Realm Configuration.
See Section B4.4.4 RsiRealmConfig type, RMM Specification, version A-bet0
The width of the RsiRealmConfig structure is 4096 (0x1000) bytes.
@@ -35,6 +51,40 @@ typedef struct RealmConfig {
UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
} REALM_CONFIG;
+/**
+ Returns the IPA state for the page pointed by the address.
+
+ @param [in] Address Address to retrive IPA state.
+ @param [out] State The RIPAS state for the address specified.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiGetIpaState (
+ IN UINT64 *Address,
+ OUT RIPAS *State
+ );
+
+/**
+ Sets the IPA state for the pages pointed by the memory range.
+
+ @param [in] Address Address to the start of the memory range.
+ @param [in] SizeLength of the memory range.
+ @param [in] State The RIPAS state to be configured.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiSetIpaState (
+ IN UINT64 *Address,
+ IN UINT64 Size,
+ IN RIPAS State
+ );
+
/**
Read the Realm Configuration.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index
90e9dbb609679c82cd8e8ee8081428fd97021f97..9cc12bc5a70b457367077d0b26011c3b91fa63c9
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -7,6 +7,7 @@
@par Glossary:
- Rsi or RSI - Realm Service Interface
- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
@par Reference(s):
- Realm Management Monitor (RMM) Specification, version A-bet0
@@ -17,8 +18,10 @@
#define ARM_CCA_RSI_H_
// FIDs for Realm Service Interface calls.
-#define FID_RSI_REALM_CONFIG 0xC4000196
-#define FID_RSI_VERSION 0xC4000190
+#define FID_RSI_IPA_STATE_GET 0xC4000198
+#define FID_RSI_IPA_STATE_SET 0xC4000197
+#define FID_RSI_REALM_CONFIG 0xC4000196
+#define FID_RSI_VERSION0xC4000190
/** RSI Command Return codes
See Section B4.4.1, RMM Specification, version A-bet0.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index
42b99fb7a71c8b38512a2f7472f9bc8a034fe1e9..546df9a94cb86533b37fef7e42fdaf7b8563052d
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib
[edk2-devel] [RFC PATCH v1 11/30] ArmVirtPkg: Define a GUID HOB for IPA width of a Realm
The IPA width of a Realm is read from the Realm Config by invoking
the RSI call RSI_REALM_CONFIG to read the Realm Config. The IPA width
is then stored in a GUID HOB gArmCcaIpaWidthGuid for subsequent use.
This GUID HOB is also useful to pass the IPA width of the Realm to the
DXE phase.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtPkg.dec | 1 +
1 file changed, 1 insertion(+)
diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index
0bc7d697428636d42ffb27e8e92fca947665a79e..ebdb9629fa2754e6f8b59f23750ea50cf702d8fd
100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -34,6 +34,7 @@ [Guids.common]
gEarlyPL011BaseAddressGuid = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80,
0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
gEarly16550UartBaseAddressGuid = { 0xea67ca3e, 0x1f54, 0x436b, { 0x97,
0x88, 0xd4, 0xeb, 0x29, 0xc3, 0x42, 0x67 } }
gArmVirtSystemMemorySizeGuid = { 0x504eccb9, 0x1bf0, 0x4420, { 0x86,
0x5d, 0xdc, 0x66, 0x06, 0xd4, 0x13, 0xbf } }
+ gArmCcaIpaWidthGuid = { 0xbdb66787, 0xfc8a, 0x412e, { 0xa0,
0x9b, 0x84, 0x96, 0x61, 0x81, 0x72, 0xc0 } }
[PcdsFeatureFlag]
#
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 09/30] ArmVirtPkg: ArmCcaRsiLib: Add interfaces to get/extend REMs
The Section A2.1.3 Realm attributes, RMM Specification, version A-bet0 introduces the concept of REMs as described below: DGRFCS - A Realm Extensible Measurement (REM) is a measurement value which can be extended during the lifetime of a Realm. IFMPYL - Attributes of a Realm include an array of measurement values. The first entry in this array is a RIM. The remaining entries in this array are REMs. The Realm Service Interface commands defined in section B4.3.7 RSI_MEASUREMENT_READ and B4.3.6 RSI_MEASUREMENT_EXTEND specify the interfaces to read and extend measurements to REMs. Therefore, update ArmCcaRsiLib to add interfaces to get and extend REMs. Signed-off-by: Sami Mujawar --- ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 53 ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h| 2 + ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 91 3 files changed, 146 insertions(+) diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h index fe176d83c4b11d3f7bb35c97ec8ef00a4f47f981..51527071ab87aa82efa9ddc3064bb88803d5ba13 100644 --- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h +++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h @@ -7,6 +7,8 @@ - Rsi or RSI - Realm Service Interface - IPA - Intermediate Physical Address - RIPAS- Realm IPA state +- RIM - Realm Initial Measurement +- REM - Realm Extensible Measurement @par Reference(s): - Realm Management Monitor (RMM) Specification, version A-bet0 @@ -44,6 +46,21 @@ */ #define MIN_CHALLENGE_DATA_SIZE_BITS 256 +/* Maximum measurement data size in bytes. + See Section C1.11 RmmRealmMeasurement type, RMM Specification, version A-bet0 + The width of the RmmRealmMeasurement type is 512 bits. +*/ +#define MAX_MEASUREMENT_DATA_SIZE_BYTES 64 + +/* Minimum and Maximum indices for REMs + See Section A2.1.3 Realm attributes, RMM Specification, version A-bet0 + IFMPYL - Attributes of a Realm include an array of measurement values. The + first entry in this array is a RIM. The remaining entries in this array are + REMs. +*/ +#define MIN_REM_INDEX 1 +#define MAX_REM_INDEX 4 + /** An enum describing the RSI RIPAS. See Section A5.2.2 Realm IPA state, RMM Specification, version A-bet0 */ @@ -127,6 +144,42 @@ RsiSetIpaState ( IN RIPAS State ); +/** + Extends a measurement to a REM. + + @param [in] MeasurementIndex Index of the REM. + @param [in] Measurement Pointer to the measurement buffer. + @param [in] MeasurementSize Size of the measurement data. + + @retval RETURN_SUCCESSSuccess. + @retval RETURN_INVALID_PARAMETER A parameter is invalid. +**/ +RETURN_STATUS +EFIAPI +RsiExtendMeasurement ( + INUINTN MeasurementIndex, + IN CONST UINT8 *CONST Measurement, + INUINTN MeasurementSize + ); + +/** + Read the measurement value from a REM. + + @param [in] MeasurementIndex Index of the REM. + @param [out] MeasurementBuffer Pointer to store the measurement data. + @param [in] MeasurementBufferSize Size of the measurement buffer. + + @retval RETURN_SUCCESSSuccess. + @retval RETURN_INVALID_PARAMETER A parameter is invalid. +**/ +RETURN_STATUS +EFIAPI +RsiReadMeasurement ( + INUINTN MeasurementIndex, + OUT UINT8 *CONST MeasurementBuffer, + INUINTN MeasurementBufferSize + ); + /** Read the Realm Configuration. diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h index 325234d06695befc840dcf37e951130dfe0550c3..6f0ee3061ade5a4a99b717a52d5a241e0e446270 100644 --- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h +++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h @@ -22,6 +22,8 @@ #define FID_RSI_ATTESTATION_TOKEN_INIT 0xC4000194 #define FID_RSI_IPA_STATE_GET 0xC4000198 #define FID_RSI_IPA_STATE_SET 0xC4000197 +#define FID_RSI_MEASUREMENT_EXTEND 0xC4000193 +#define FID_RSI_MEASUREMENT_READ0xC4000192 #define FID_RSI_REALM_CONFIG0xC4000196 #define FID_RSI_VERSION 0xC4000190 diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c index 01ecee3a6798c0e5cefd9fb4f48788d3063c94cd..fd29fc61caf880bcaf96d982f3a4d973e7ebb70f 100644 --- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c +++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c @@ -8,6 +8,7 @@ - Rsi or RSI - Realm Service Interface - IPA - Intermediate Physical Address - RIPAS- Realm IPA state +- REM - Realm Extensible Measurement @par Reference(s): - Realm Management Monitor (RMM) Specification, version A-bet0 @@ -366,6 +367,96 @@ RsiSetIpaState ( return Status; } +/** + Extends a measurement to a REM. + + @param [in] Measurement
[edk2-devel] [RFC PATCH v1 16/30] ArmVirtPkg: Define an interface to configure MMIO regions for Arm CCA
The IPA space of a Realm is divided into two halves: - Protected IPA space and - Unprotected IPA space. Software in a Realm should treat the most significant bit of an IPA as a protection attribute. The Unprotected IPA space is used for sharing memory and for performing MMIO accesses with the Host. An Unprotected IPA is an address in the upper half of a Realm's IPA space. The most significant bit of an Unprotected IPA is 1. Therefore, the page tables for the MMIO regions must be updated to set the most significant bit of the IPA space. To facilitate this define ArmCcaConfigureMmio () that can be called during the early firmware startup. Signed-off-by: Sami Mujawar --- ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h index 7812c2e28657ca9525880dcc0d16d7bca90cc334..b70a96ed923e8c2654e51c9714074744a4d5f0c2 100644 --- a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h +++ b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2011-2013, ARM Limited. All rights reserved. + Copyright (c) 2011-2023, Arm Limited. All rights reserved. Copyright (c) 2017, Linaro, Ltd. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -32,4 +32,21 @@ ArmVirtGetMemoryMap ( OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap ); +/** + Configure the MMIO regions as shared with the VMM. + + Set the protection attribute for the MMIO regions as Unprotected IPA. + + @param[in]IpaWidth IPA width of the Realm. + + @retval RETURN_SUCCESSSuccess. + @retval RETURN_INVALID_PARAMETER A parameter is invalid. + @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm. +**/ +EFI_STATUS +EFIAPI +ArmCcaConfigureMmio ( + IN UINT64 IpaWidth + ); + #endif -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103559): https://edk2.groups.io/g/devel/message/103559 Mute This Topic: https://groups.io/mt/98495964/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [RFC PATCH v1 17/30] ArmVirtPkg: CloudHv: Add a NULL implementation of ArmCcaConfigureMmio
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.
Since, Arm CCA has not been enabled for the Cloud Hypervisor guest
firmware, update the CloudHvVirtMemInfoLib library to add a NULL
implementation for ArmCcaConfigureMmio () that returns
RETURN_UNSUPPORTED.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c | 22
+++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
index
98cc13870599c10bfab5029de9f7730a67099b72..c47ddc4a16caf9b3755617627718789098aa2f26
100644
--- a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2022, Arm Limited. All rights reserved.
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -241,3 +241,23 @@ ArmVirtGetMemoryMap (
*VirtualMemoryMap = VirtualMemoryTable;
}
+
+/**
+ Configure the MMIO regions as shared with the VMM.
+
+ Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+ @param[in]IpaWidth IPA width of the Realm.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+ IN UINT64 IpaWidth
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 19/30] ArmVirtPkg: Xen: Add a NULL implementation of ArmCcaConfigureMmio
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.
Since, Arm CCA has not been enabled for the Xen guest firmware,
update the XenVirtMemInfoLib library to add a NULL implementation
for ArmCcaConfigureMmio () that returns RETURN_UNSUPPORTED.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c | 21
1 file changed, 21 insertions(+)
diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
index
ac0c75aecfe54090788836f2eea097f4abb112a3..8a9f6e1e1eee91ec2fc1418b342c0966548e8a6c
100644
--- a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c
@@ -1,6 +1,7 @@
/** @file
Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+ Copyright (c) 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -55,3 +56,23 @@ ArmVirtGetMemoryMap (
*VirtualMemoryMap = mVirtualMemoryTable;
}
+
+/**
+ Configure the MMIO regions as shared with the VMM.
+
+ Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+ @param[in]IpaWidth IPA width of the Realm.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+ IN UINT64 IpaWidth
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 10/30] ArmVirtPkg: ArmCcaRsiLib: Add an interface to make a RSI Host Call
The Section A4.5 Host call, RMM Specification, version A-bet0
describes the programming model for Realm communication with
the Host and specifies the following:
DYDJWT - A Host call is a call made by the Realm to the Host, by
execution of the RSI_HOST_CALL command.
IXNFKZ - A Host call can be used by a Realm to make a hypercall.
DYDJWT - A Host call is a call made by the Realm to the Host, by
execution of the RSI_HOST_CALL command.
Therefore, introduce definition of HOST_CALL_ARGS structure that
represents the arguments to the RSI_HOST_CALL command as defined
in Section B4.3.3 RSI_HOST_CALL command.
Also update the ArmCcaRsiLib library to add a new interface
RsiHostCall () to make a Host call.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Include/Library/ArmCcaRsiLib.h | 36 ++
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h| 1 +
ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c | 40
3 files changed, 77 insertions(+)
diff --git a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
index
51527071ab87aa82efa9ddc3064bb88803d5ba13..5468b2506522bbc9a1467045df0eed6fc70f24de
100644
--- a/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
+++ b/ArmVirtPkg/Include/Library/ArmCcaRsiLib.h
@@ -81,6 +81,21 @@ typedef struct RealmConfig {
UINT8 Reserved[SIZE_4KB - sizeof (UINT64)];
} REALM_CONFIG;
+/** A structure describing the Host Call arguments
+See Section 4.4.2 RsiHostCall type, RMM Specification, version A-bet0
+*/
+typedef struct HostCallArgs {
+ UINT64Imm;
+ UINT64Gprs0;
+ UINT64Gprs1;
+ UINT64Gprs2;
+ UINT64Gprs3;
+ UINT64Gprs4;
+ UINT64Gprs5;
+ UINT64Gprs6;
+ UINT8 Reserved[0x1000 - (sizeof (UINT64) * 8)];
+} HOST_CALL_ARGS;
+
/**
Retrieve an attestation token from the RMM.
@@ -198,6 +213,27 @@ RsiGetRealmConfig (
IN REALM_CONFIG *Config
);
+/**
+ Make a Host Call.
+
+ A Host call can be used by a Realm to make a hypercall.
+ On Realm execution of HVC, an Unknown exception is taken to the Realm.
+
+ @param [in] ArgsPointer to the IPA of the Host call data
+ structure.
+
+ Note: The IPA of the Host call arguments data structure must be aligned
+ to the Realm granule size.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiHostCall (
+ IN HOST_CALL_ARGS *Args
+ );
+
/**
Get the version of the RSI implementation.
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
index
6f0ee3061ade5a4a99b717a52d5a241e0e446270..70e84a20711f04c32a5850230cc907a6d231f50b
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsi.h
@@ -20,6 +20,7 @@
// FIDs for Realm Service Interface calls.
#define FID_RSI_ATTESTATION_TOKEN_CONTINUE 0xC4000195
#define FID_RSI_ATTESTATION_TOKEN_INIT 0xC4000194
+#define FID_RSI_HOST_CALL 0xC4000199
#define FID_RSI_IPA_STATE_GET 0xC4000198
#define FID_RSI_IPA_STATE_SET 0xC4000197
#define FID_RSI_MEASUREMENT_EXTEND 0xC4000193
diff --git a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
index
fd29fc61caf880bcaf96d982f3a4d973e7ebb70f..5b04c8af890fead113b827030f86af5f07698354
100644
--- a/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
+++ b/ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.c
@@ -489,6 +489,46 @@ RsiGetRealmConfig (
return RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
}
+/**
+ Make a Host Call.
+
+ A Host call can be used by a Realm to make a hypercall.
+ On Realm execution of HVC, an Unknown exception is taken to the Realm.
+
+ @param [in] ArgsPointer to the IPA of the Host call data
+ structure.
+
+ Note: The IPA of the Host call arguments data structure must be aligned
+ to the Realm granule size.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+RsiHostCall (
+ IN HOST_CALL_ARGS *Args
+ )
+{
+ ARM_SMC_ARGS SmcCmd;
+
+ if ((Args == NULL) || (!AddrIsGranuleAligned ((UINT64 *)Args))) {
+return RETURN_INVALID_PARAMETER;
+ }
+
+ STATIC_ASSERT (sizeof (HOST_CALL_ARGS) == SIZE_4KB);
+
+ // Clear the reserved fields
+ ZeroMem (&Args->Reserved, sizeof (Args->Reserved));
+
+ ZeroMem (&SmcCmd, sizeof (SmcCmd));
+ SmcCmd.Arg0 = FID_RSI_HOST_CALL;
+ SmcCmd.Arg1 = (UINTN)Args;
+
+ ArmCallSmc (&SmcCmd);
+ return RsiCmdStatusToEfiStatus (SmcCmd.Arg0);
+}
+
/**
Get the version of the RSI implementation.
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 13/30] ArmVirtPkg: Add NULL instance of ArmCcaInitPeiLib
Add a NULL instance of ArmCcaInitPeiLib library that guest firmware
for VMMs that do not implement Arm CCA Realms can use.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirt.dsc.inc | 2 +
ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c | 59
ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf | 27 +
3 files changed, 88 insertions(+)
diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index
5b18184be2631ce6d158b471c055af9e6e07f4a0..409749297263a13696885d17c6d5554d07c195e4
100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -189,6 +189,8 @@ [LibraryClasses.common.SEC]
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+
ArmCcaInitPeiLib|ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
+
[LibraryClasses.common.PEI_CORE]
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c
b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c
new file mode 100644
index
..5b606208dbcf4f0494cde79dd8923ef80fa0137b
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.c
@@ -0,0 +1,59 @@
+/** @file
+ Library that implements a NULL implementation of the ArmCcaInitPeiLib.
+
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ Configure the System Memory region as Protected RAM.
+
+ When a VMM creates a Realm, a small amount of DRAM (which contains the
+ firmware image) and the initial content is configured as Protected RAM.
+ The remaining System Memory is in the Protected Empty state. The firmware
+ must then initialise the remaining System Memory as Protected RAM before
+ it can be accessed.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+ VOID
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
+
+/**
+ Perform Arm CCA specific initialisations.
+
+ @retval EFI_SUCCESS Success or execution context is not a
Realm.
+ @retval EFI_OUT_OF_RESOURCES Out of resources.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaInitialize (
+ VOID
+ )
+{
+ // Noting to do as the execution context is not a Realm.
+ return EFI_SUCCESS;
+}
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
new file mode 100644
index
..f039c7abdb6d5391f792179546ff9947086fe541
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLibNull/ArmCcaInitPeiLibNull.inf
@@ -0,0 +1,27 @@
+## @file
+# Library that implements a NULL implementation of the ArmCcaInitPeiLib.
+#
+# Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001B
+ BASE_NAME = ArmCcaInitPeiLib
+ FILE_GUID = 60686C60-8433-49EE-9F2C-DDC424A95652
+ MODULE_TYPE= BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmCcaInitPeiLib
+
+[Sources]
+ ArmCcaInitPeiLibNull.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmVirtPkg/ArmVirtPkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ BaseLib
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 18/30] ArmVirtPkg: Qemu: Add a NULL implementation of ArmCcaConfigureMmio
To support Arm CCA, a hook function ArmCcaConfigureMmio () has
been added to the ArmVirtMemInfoLib library.
Since, Arm CCA has not been enabled for the Qemu guest firmware,
update the QemuVirtMemInfoLib library to add a NULL implementation
for ArmCcaConfigureMmio () that returns RETURN_UNSUPPORTED.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 21
1 file changed, 21 insertions(+)
diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
index
23bd0fe68ef79d98c0b934b73b61c098bc04397b..4db41f5fde3d35182692269bd3645b0e0bf6dc9e
100644
--- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
@@ -1,6 +1,7 @@
/** @file
Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+ Copyright (c) 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -122,3 +123,23 @@ ArmVirtGetMemoryMap (
*VirtualMemoryMap = VirtualMemoryTable;
}
+
+/**
+ Configure the MMIO regions as shared with the VMM.
+
+ Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+ @param[in]IpaWidth IPA width of the Realm.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+ IN UINT64 IpaWidth
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
--
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[edk2-devel] [RFC PATCH v1 15/30] ArmVirtPkg: Add Null instance of ArmCcaLib
Add a Null instance of ArmCcaLib so that guest firmware that does
not support Arm CCA can link to this Null version of the library.
Also include it in ArmVirt.dsc.inc so that it is linked for the
non-Arm CCA firmware builds.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirt.dsc.inc | 4 +-
ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c | 117
ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.inf | 28 +
3 files changed, 148 insertions(+), 1 deletion(-)
diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index
409749297263a13696885d17c6d5554d07c195e4..88dd74e7bb0e1352a8867727a33ae80498a9ea98
100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2023, ARM Limited. All rights reserved.
# Copyright (c) 2014, Linaro Limited. All rights reserved.
# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
# Copyright (c) Microsoft Corporation.
@@ -178,6 +178,8 @@ [LibraryClasses.common]
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
+ ArmCcaLib|ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.inf
+
[LibraryClasses.common.SEC]
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c
b/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c
new file mode 100644
index
..e5e645e148d485fc324e060ec27fbc3607fe8aae
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaLibNull/ArmCcaLibNull.c
@@ -0,0 +1,117 @@
+/** @file
+ Null implemmentation of the ArmCcaLib library.
+
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+#include
+
+/**
+ Check if running in a Realm.
+
+@retval TRUEThe execution is within the context of a Realm.
+@retval FALSE The execution is not within the context of a Realm.
+**/
+BOOLEAN
+EFIAPI
+IsRealm (
+ VOID
+ )
+{
+ return FALSE;
+}
+
+/**
+ Configure the protection attribute for the page tables
+ describing the memory region.
+
+ The IPA space of a Realm is divided into two halves:
+- Protected IPA space and
+- Unprotected IPA space.
+
+ Software in a Realm should treat the most significant bit of an
+ IPA as a protection attribute.
+
+ A Protected IPA is an address in the lower half of a Realms IPA
+ space. The most significant bit of a Protected IPA is 0.
+
+ An Unprotected IPA is an address in the upper half of a Realms
+ IPA space. The most significant bit of an Unprotected IPA is 1.
+
+ Note:
+ - Configuring the memory region as Unprotected IPA enables the
+Realm to share the memory region with the Host.
+ - This function updates the page table entries to reflect the
+protection attribute.
+ - A separate call to transition the memory range using the Realm
+Service Interface (RSI) RSI_IPA_STATE_SET command is additionally
+required and is expected to be done outside this function.
+
+@param [in] BaseAddress Base address of the memory region.
+@param [in] Length Length of the memory region.
+@param [in] IpaWidth IPA width of the Realm.
+@param [in] ShareIf TRUE, set the most significant
+ bit of the IPA to configure the memory
+ region as Unprotected IPA.
+ If FALSE, clear the most significant
+ bit of the IPA to configure the memory
+ region as Protected IPA.
+
+@retval RETURN_SUCCESSIPA protection attribute updated.
+@retval RETURN_INVALID_PARAMETER A parameter is invalid.
+@retval RETURN_UNSUPPORTEDThe request is not initiated in a
+ Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaSetMemoryProtectAttribute (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64Length,
+ IN UINT64IpaWidth,
+ IN BOOLEAN Share
+ )
+{
+ return RETURN_UNSUPPORTED;
+}
+
+/**
+ Return the IPA width of the Realm.
+
+ The IPA width of the Realm is used to configure the protection attribute
+ for memory regions, see ArmCcaSetMemoryProtectAttribute().
+
+ The IPA width of the Realm is present in the Realm config which is read
+ when the ArmCcaInitPeiLib library hook function ArmCcaInitialize () is
+ called in the PrePi phase. ArmCcaInitialize () stores the IPA width of
+ the Realm in a GUID HOB gArmCcaIpaWidthGuid.
+
+ This function searches the GUID HOB gArmCcaIpaWidthGuid and returns the
+ IPA width value stored th
[edk2-devel] [RFC PATCH v1 20/30] ArmVirtPkg: Configure the MMIO regions for Arm CCA
The IPA space of a Realm is divided into two halves:
- Protected IPA space and
- Unprotected IPA space.
Software in a Realm should treat the most significant bit of an
IPA as a protection attribute.
The Unprotected IPA space is used for sharing memory and for performing
MMIO accesses with the Host.
An Unprotected IPA is an address in the upper half of a Realm's
IPA space. The most significant bit of an Unprotected IPA is 1.
The page tables for the MMIO regions must be updated to set the most
significant bit of the IPA space.
Therefore, implement ArmCcaConfigureMmio () which configures the MMIO
regions as Unprotected IPA by setting the protection attribute in the
page tables for the MMIO regions.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c | 39
+++-
ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf | 3 +-
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
index
79412897f2251712fafa4a9633b44235f2d7bb9b..a4fee904a43ccb8844ceaea992698a99df2a8b3c
100644
--- a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.c
@@ -1,14 +1,16 @@
/** @file
Kvmtool virtual memory map library.
- Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+ Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include
+#include
#include
+#include
#include
#include
#include
@@ -96,3 +98,38 @@ ArmVirtGetMemoryMap (
*VirtualMemoryMap = VirtualMemoryTable;
}
+
+/**
+ Configure the MMIO regions as shared with the VMM.
+
+ Set the protection attribute for the MMIO regions as Unprotected IPA.
+
+ @param[in]IpaWidth IPA width of the Realm.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaConfigureMmio (
+ IN UINT64 IpaWidth
+ )
+{
+ EFI_STATUS Status;
+
+ if (!IsRealm ()) {
+return RETURN_UNSUPPORTED;
+ }
+
+ // Set the protection attribute for the Peripheral memory.
+ // Peripheral space before DRAM
+ Status = ArmCcaSetMemoryProtectAttribute (
+ 0,
+ PcdGet64 (PcdSystemMemoryBase),
+ IpaWidth,
+ TRUE
+ );
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
diff --git a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
index
a354e734ab1b7308a3e52b4e2b4885ef29592681..8e157a44dc9d11b9258d3f6182d5b169ec97ae9c
100644
--- a/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
+++ b/ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/KvmtoolVirtMemInfoLib.inf
@@ -1,7 +1,7 @@
## @file
# Kvmtool virtual memory map library.
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -26,6 +26,7 @@ [Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
+ ArmCcaLib
ArmLib
BaseLib
BaseMemoryLib
--
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[edk2-devel] [RFC PATCH v1 14/30] ArmVirtPkg: Add library for Arm CCA helper functions
Introduce ArmCcaLib library that implements helper functions to: - probe if the code is executing in a Realm context - configure the protection attribute in page tables for the memory regions shared with the host - get the IPA width of the Realm which was stored in the GUID HOB gArmCcaIpaWidthGuid. Signed-off-by: Sami Mujawar --- ArmVirtPkg/ArmVirtPkg.dec | 1 + ArmVirtPkg/Include/Library/ArmCcaLib.h | 114 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.c | 190 ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf | 34 4 files changed, 339 insertions(+) diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec index c270d4a1ee268fb57a5338fd71487ed54699f496..c61ed9c492e97aa00ba9dbab1a5544354b6e7de7 100644 --- a/ArmVirtPkg/ArmVirtPkg.dec +++ b/ArmVirtPkg/ArmVirtPkg.dec @@ -27,6 +27,7 @@ [Includes.common] [LibraryClasses] ArmCcaInitPeiLib|Include/Library/ArmCcaInitPeiLib.h + ArmCcaLib|Include/Library/ArmCcaLib.h ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h diff --git a/ArmVirtPkg/Include/Library/ArmCcaLib.h b/ArmVirtPkg/Include/Library/ArmCcaLib.h new file mode 100644 index ..a47e14b507f1bfd1feece636063eb2ba83357a5b --- /dev/null +++ b/ArmVirtPkg/Include/Library/ArmCcaLib.h @@ -0,0 +1,114 @@ +/** @file + Library that implements the Arm CCA helper functions. + + Copyright (c) 2022 - 2023, Arm Ltd. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +- Rsi or RSI - Realm Service Interface +- IPA - Intermediate Physical Address +- RIPAS- Realm IPA state +**/ + +#ifndef ARM_CCA_LIB_ +#define ARM_CCA_LIB_ + +#include +#include + +/** + Check if running in a Realm. + +@retval TRUEThe execution is within the context of a Realm. +@retval FALSE The execution is not within the context of a Realm. +**/ +BOOLEAN +EFIAPI +IsRealm ( + VOID + ); + +/** + Configure the protection attribute for the page tables + describing the memory region. + + The IPA space of a Realm is divided into two halves: +- Protected IPA space and +- Unprotected IPA space. + + Software in a Realm should treat the most significant bit of an + IPA as a protection attribute. + + A Protected IPA is an address in the lower half of a Realms IPA + space. The most significant bit of a Protected IPA is 0. + + An Unprotected IPA is an address in the upper half of a Realms + IPA space. The most significant bit of an Unprotected IPA is 1. + + Note: + - Configuring the memory region as Unprotected IPA enables the +Realm to share the memory region with the Host. + - This function updates the page table entries to reflect the +protection attribute. + - A separate call to transition the memory range using the Realm +Service Interface (RSI) RSI_IPA_STATE_SET command is additionally +required and is expected to be done outside this function. + +@param [in] BaseAddress Base address of the memory region. +@param [in] Length Length of the memory region. +@param [in] IpaWidth IPA width of the Realm. +@param [in] ShareIf TRUE, set the most significant + bit of the IPA to configure the memory + region as Unprotected IPA. + If FALSE, clear the most significant + bit of the IPA to configure the memory + region as Protected IPA. + +@retval RETURN_SUCCESSIPA protection attribute updated. +@retval RETURN_INVALID_PARAMETER A parameter is invalid. +@retval RETURN_UNSUPPORTEDThe request is not initiated in a + Realm. +**/ +RETURN_STATUS +EFIAPI +ArmCcaSetMemoryProtectAttribute ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64Length, + IN UINT64IpaWidth, + IN BOOLEAN Share + ); + +/** + Return the IPA width of the Realm. + + The IPA width of the Realm is used to configure the protection attribute + for memory regions, see ArmCcaSetMemoryProtectAttribute(). + + The IPA width of the Realm is present in the Realm config which is read + when the ArmCcaInitPeiLib library hook function ArmCcaInitialize () is + called in the PrePi phase. ArmCcaInitialize () stores the IPA width of + the Realm in a GUID HOB gArmCcaIpaWidthGuid. + + This function searches the GUID HOB gArmCcaIpaWidthGuid and returns the + IPA width value stored therein. + + Note: + - This function must only be called after ArmCcaInitialize () has setup +the GUID HOB gArmCcaIpaWidthGuid. + +@param [out] IpaWidth IPA width of the Realm. + +@retval RETURN_SUCCESSSuccess. +@retval RETURN_INVALID_PARAMETER A parameter is invalid. +@retval RETURN_NOT_FOUND The GUID HOB gArmCcaIpaWidthGuid is no
[edk2-devel] [RFC PATCH v1 23/30] ArmVirtPkg: Arm CCA configure system memory in early Pei
When a VMM creates a Realm, a small amount of DRAM (which contains the firmware image) and the initial content is configured as Protected RAM. The remaining System Memory is in the Protected Empty state. The firmware must then initialise the remaining System Memory as Protected RAM before it can be accessed. Therefore, call the ArmCcaConfigureSystemMemory () in the early Pei phase so that the System Memory is configured as Protected RAM. Note: ArmCcaConfigureSystemMemory () is implemented in ArmCcaInitPeiLib for which a Null implementation is provided. Therefore, this change should not have an impact for non-Arm CCA enabled systems. Signed-off-by: Sami Mujawar --- ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 6 +- ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 3 ++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S index 01623b6b3591242778a5c76df5d401b1ce71834f..03bef60dd408e787cbeb912d95639821714f 100644 --- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S +++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S @@ -1,5 +1,5 @@ // -// Copyright (c) 2011-2013, ARM Limited. All rights reserved. +// Copyright (c) 2011-2023, Arm Limited. All rights reserved. // Copyright (c) 2015-2016, Linaro Limited. All rights reserved. // // SPDX-License-Identifier: BSD-2-Clause-Patent @@ -11,6 +11,10 @@ ASM_FUNC(_ModuleEntryPoint) blASM_PFX(DiscoverDramFromDt) + // Check if we are in a Realm and configure + // the System Memory as Protected RAM. + blASM_PFX(ArmCcaConfigureSystemMemory) + // Get ID of this CPU in Multicore system blASM_PFX(ArmReadMpidr) // Keep a copy of the MpId register value diff --git a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf index 7edf5018089d0710564159a06e3f50b8890d2795..afa9b686eed60d894af6933e3b2fd5a82ebae951 100755 --- a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf +++ b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf @@ -1,6 +1,6 @@ #/** @file # -# Copyright (c) 2011-2015, ARM Ltd. All rights reserved. +# Copyright (c) 2011-2023, Arm Limited. All rights reserved. # Copyright (c) 2015, Linaro Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -37,6 +37,7 @@ [Packages] ArmVirtPkg/ArmVirtPkg.dec [LibraryClasses] + ArmCcaInitPeiLib BaseLib DebugLib FdtLib -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103568): https://edk2.groups.io/g/devel/message/103568 Mute This Topic: https://groups.io/mt/98495977/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [RFC PATCH v1 21/30] ArmVirtPkg: Kvmtool: Use Null version of DebugLib in PrePi
The patch at "6c8a08bd8a680 ArmVirtPkg/PrePi: Ensure timely
execution of library constructors" moved the processing of
library constructors before the MMU is initialised.
This resulted in the BaseDebugLibSerialPort library constructor
BaseDebugLibSerialPortConstructor () which initialises the serial
port, being invoked before the MMU is enabled.
However, the Realm Code requires the protection attribute of
the MMIO regions to be configured as unprotected (shared with
the host), which requires the MMU to be enabled. Otherwise,
accesses to the MMIO region result in a synchronous external
abort being reflected to the Realm by the RMM.
Therefore, link the Null version of DebugLib in PrePi stage.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtKvmTool.dsc | 1 +
1 file changed, 1 insertion(+)
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index
467e5c166e1bbad3acbae78f53c225f5bac525a9..1cfd9e7ed8a6d2b0b054e130a84c66c2fec54e57
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -248,6 +248,7 @@ [Components.common]
#
ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf {
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 24/30] ArmVirtPkg: Perform Arm CCA initialisation in the Pei phase
Add ArmCcaInitialize () to perform Arm CCA specific initialisation
like:
- Reading the Realm Config by calling the RSI interface.
- Storing the IPA width of the Realm in PcdArmCcaEarlyIpaWidth.
- Configuring the MMIO regions to update the page tables to set
the protection attribute as Unprotected IPA.
Note: ArmCcaInitialize () is implemented in ArmCcaInitPeiLib for
which a Null implementation is provided. Therefore, this change
should not break existing platforms that do not implement the
Arm CCA.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/PrePi/PrePi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/ArmVirtPkg/PrePi/PrePi.c b/ArmVirtPkg/PrePi/PrePi.c
index
3d943b2138d3fe8a03322262111d5f7df3e39d39..7ece1e07152ebc395c1f21dfabd78df2020cf052
100755
--- a/ArmVirtPkg/PrePi/PrePi.c
+++ b/ArmVirtPkg/PrePi/PrePi.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -9,6 +9,7 @@
#include
#include
+#include
#include
#include
#include
@@ -40,6 +41,7 @@ PrePiMain (
CHAR8 Buffer[100];
UINTN CharCount;
UINTN StacksSize;
+ RETURN_STATUS RetStatus;
// Initialize the architecture specific bits
ArchInitialize ();
@@ -67,6 +69,12 @@ PrePiMain (
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32
(PcdSystemMemoryUefiRegionSize));
ASSERT_EFI_ERROR (Status);
+ // Perform the Arm CCA specific initialisations.
+ RetStatus = ArmCcaInitialize ();
+ if (RETURN_ERROR (RetStatus)) {
+CpuDeadLoop ();
+ }
+
// Initialize the Serial Port
SerialPortInitialize ();
CharCount = AsciiSPrint (
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 12/30] ArmVirtPkg: Add library for Arm CCA initialisation in PEI
Add ArmCcaInitPeiLib library that performs the Arm CCA specific
initialisation in the PEI phase like:
- Configuring the system memory as Protected RAM.
- Reading the Realm Config and storing the IPA width in
a GUID HOB i.e., gArmCcaIpaWidthGuid for subsequent use.
- Calling ArmCcaConfigureMmio () to configure the MMIO regions
by setting the Unprotected IPA attribute in the page tables.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtPkg.dec| 1 +
ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h| 49 +
ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c | 116
ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.inf | 39 +++
4 files changed, 205 insertions(+)
diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index
ebdb9629fa2754e6f8b59f23750ea50cf702d8fd..c270d4a1ee268fb57a5338fd71487ed54699f496
100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -26,6 +26,7 @@ [Includes.common]
Include# Root include for the package
[LibraryClasses]
+ ArmCcaInitPeiLib|Include/Library/ArmCcaInitPeiLib.h
ArmCcaRsiLib|Include/Library/ArmCcaRsiLib.h
ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
diff --git a/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h
b/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h
new file mode 100644
index
..439a70a54a218badd4cd4d6c419df58f57271cc2
--- /dev/null
+++ b/ArmVirtPkg/Include/Library/ArmCcaInitPeiLib.h
@@ -0,0 +1,49 @@
+/** @file
+ Library that implements the Arm CCA helper functions.
+
+ Copyright (c) 2022 2023, Arm Ltd. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+
+#ifndef ARM_CCA_INIT_PEI_LIB_
+#define ARM_CCA_INIT_PEI_LIB_
+
+#include
+
+/**
+ Configure the System Memory region as Protected RAM.
+
+ When a VMM creates a Realm, a small amount of DRAM (which contains the
+ firmware image) and the initial content is configured as Protected RAM.
+ The remaining System Memory is in the Protected Empty state. The firmware
+ must then initialise the remaining System Memory as Protected RAM before
+ it can be accessed.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+ VOID
+ );
+
+/**
+ Perform Arm CCA specific initialisations.
+
+ @retval RETURN_SUCCESS Success or execution context is not a
Realm.
+ @retval RETURN_OUT_OF_RESOURCES Out of resources.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaInitialize (
+ VOID
+ );
+
+#endif // ARM_CCA_LIB_
diff --git a/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
new file mode 100644
index
..2b1ed4c3eaa18a5519edce2d3d4f143d08adb53e
--- /dev/null
+++ b/ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.c
@@ -0,0 +1,116 @@
+/** @file
+ Library that implements the Arm CCA initialisation in PEI phase.
+
+ Copyright (c) 2022 2023, Arm Limited. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+- Rsi or RSI - Realm Service Interface
+- IPA - Intermediate Physical Address
+- RIPAS- Realm IPA state
+**/
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ Configure the System Memory region as Protected RAM.
+
+ When a VMM creates a Realm, a small amount of DRAM (which contains the
+ firmware image) and the initial content is configured as Protected RAM.
+ The remaining System Memory is in the Protected Empty state. The firmware
+ must then initialise the remaining System Memory as Protected RAM before
+ it can be accessed.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval RETURN_UNSUPPORTEDThe execution context is not in a Realm.
+**/
+RETURN_STATUS
+EFIAPI
+ArmCcaConfigureSystemMemory (
+ VOID
+ )
+{
+ RETURN_STATUS Status;
+
+ if (!IsRealm ()) {
+return RETURN_UNSUPPORTED;
+ }
+
+ Status = RsiSetIpaState (
+ (UINT64 *)PcdGet64 (PcdSystemMemoryBase),
+ PcdGet64 (PcdSystemMemorySize),
+ RIPAS_RAM
+ );
+ if (RETURN_ERROR (Status)) {
+// Panic
+CpuDeadLoop ();
+ }
+
+ return Status;
+}
+
+/**
+ Perform Arm CCA specific initialisations.
+
+ @retval RETURN_SUCCESS Success or execution context is not a
Realm.
+ @retval RETURN_OUT_OF_RESOURCES Out of resources.
+ @ret
[edk2-devel] [RFC PATCH v1 22/30] ArmVirtPkg: Add Arm CCA libraries for Kvmtool guest firmware
The following libraries have been introduced for Arm CCA: * ArmCcaInitPeiLib - provides functions for ARM CCA initialisations in early PEI phase. * ArmCcaLib- provides the necessary helper functions for Arm CCA * ArmCcaRsiLib - implements functions to call the Realm Service Interface. Therefore, add these libraries in the Kvmtool guest firmware workspace as part of enabling support for Arm CCA. Signed-off-by: Sami Mujawar --- ArmVirtPkg/ArmVirtKvmTool.dsc | 7 +++ 1 file changed, 7 insertions(+) diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc index 1cfd9e7ed8a6d2b0b054e130a84c66c2fec54e57..9bc857ea88d00431bf4223f588f908eab7561a19 100644 --- a/ArmVirtPkg/ArmVirtKvmTool.dsc +++ b/ArmVirtPkg/ArmVirtKvmTool.dsc @@ -86,11 +86,18 @@ [LibraryClasses.common] ArmMonitorLib|ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf ArmTrngLib|ArmPkg/Library/ArmTrngLib/ArmTrngLib.inf +[LibraryClasses.AARCH64] + ArmCcaLib|ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf + ArmCcaRsiLib|ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf + [LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM] PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf PlatformHookLib|ArmVirtPkg/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +[LibraryClasses.AARCH64.SEC, LibraryClasses.AARCH64.PEI_CORE, LibraryClasses.AARCH64.PEIM] + ArmCcaInitPeiLib|ArmVirtPkg/Library/ArmCcaInitPeiLib/ArmCcaInitPeiLib.inf + [LibraryClasses.common.UEFI_DRIVER] UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103571): https://edk2.groups.io/g/devel/message/103571 Mute This Topic: https://groups.io/mt/98495980/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [RFC PATCH v1 28/30] ArmVirtPkg: Enable Virtio communication for Arm CCA
Arm CCA Realms protect the access to memory from outside the Realm. For Virtio to work the Realm Guest and the Host should be able to share buffers. Realm Aperture Management protocol (RAMP) manages the sharing of buffers between the Realm Guest and the Host, while the ArmCcaIoMmuDxe implements the EDKII_IOMMU_PROTOCOL which provides the necessary hooks so that DMA accesses can be performed by bouncing buffers using pages shared with the host. Therefore, enable the support for Realm Aperture Management Protocol and ArmCcaIoMmuDxe for Kvmtool Guest firmware. Note: The ArmCcaIoMmuDxe and RAMP check if the code is executing in a Realm before installing the respective protocols. If the code is not executing in a Realm the gIoMmuAbsentProtocolGuid is installed, thereby allowing the same firmware to be used both for normal and Realm Guest firmware. Signed-off-by: Sami Mujawar --- ArmVirtPkg/ArmVirtKvmTool.dsc | 10 ++ ArmVirtPkg/ArmVirtKvmTool.fdf | 10 ++ 2 files changed, 20 insertions(+) diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc index acf4ede48da2d33d50b5593a857f3815f427707c..d9dd7a67307ffed5da16837301f18e7715187450 100644 --- a/ArmVirtPkg/ArmVirtKvmTool.dsc +++ b/ArmVirtPkg/ArmVirtKvmTool.dsc @@ -411,3 +411,13 @@ [Components.AARCH64] ArmVirtPkg/KvmtoolCfgMgrDxe/ConfigurationManagerDxe.inf ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf + + # + # Realm Aperture Management + # + ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf + + # + # IoMMU support for Arm CCA + # + ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf diff --git a/ArmVirtPkg/ArmVirtKvmTool.fdf b/ArmVirtPkg/ArmVirtKvmTool.fdf index 68bd0e9d82dc83a337d8127a598018381888d894..c04a1f1f381410d2eccb781b2de99898d5da9578 100644 --- a/ArmVirtPkg/ArmVirtKvmTool.fdf +++ b/ArmVirtPkg/ArmVirtKvmTool.fdf @@ -224,6 +224,16 @@ [FV.FvMain] !include DynamicTablesPkg/DynamicTables.fdf.inc INF ArmVirtPkg/KvmtoolCfgMgrDxe/ConfigurationManagerDxe.inf + + # + # Realm Aperture Management + # + INF ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf + + # + # IoMMU support for Arm CCA + # + INF ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf !endif # -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103572): https://edk2.groups.io/g/devel/message/103572 Mute This Topic: https://groups.io/mt/98495983/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [RFC PATCH v1 26/30] ArmVirtPkg: Introduce Realm Aperture Management Protocol
The Realm Aperture Management Protocol (RAMP) is used to manage
the sharing of buffers between the Guest and Host. It configures
the memory regions as Protected EMPTY or Protected RAM by calling
RSI_IPA_STATE_SET command. The RAMP provides interfaces that device
drivers can use to open/close apertures for sharing buffers.
The RAMP also keeps track of the apertures that have been opened
and closes them on ExitBootServices. It also registers for reset
notification and closes all open apertures before the platform
resets the system.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtPkg.dec
| 3 +
ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
| 103 +++
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.c
| 656
ArmVirtPkg/RealmApertureManagementProtocolDxe/RealmApertureManagementProtocolDxe.inf
| 48 ++
4 files changed, 810 insertions(+)
diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index
c61ed9c492e97aa00ba9dbab1a5544354b6e7de7..5f5fb0f0d911f871ffdf0d8e7d1d181d31093679
100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -44,6 +44,9 @@ [PcdsFeatureFlag]
#
gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x0004
+[Protocols]
+ gEfiRealmApertureManagementProtocolGuid = { 0x585c00be, 0xcf7c, 0x4db8, {
0x8a, 0xa2, 0x49, 0xd, 0x67, 0xf5, 0xf6, 0xe6 } }
+
[PcdsFixedAtBuild, PcdsPatchableInModule]
#
# This is the physical address where the device tree is expected to be stored
diff --git a/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
b/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
new file mode 100644
index
..0f45fd296fd54ec536ed3d4bd7725350ab487295
--- /dev/null
+++ b/ArmVirtPkg/Include/Protocol/RealmApertureManagementProtocol.h
@@ -0,0 +1,103 @@
+/** @file
+ Realm Aperture Management Protocol (RAMP)
+ On Arm CCA Systems the Realm protects access and visibility of Guest memory
+ and code execution from software outside the realm.
+
+ However, software executing in a Realm needs to interact with the external
+ world. This may be done using virtualised disk, network interfaces, etc.
+ The drivers for these virtualised devices need to share buffers with the host
+ OS to exchange information/data.
+
+ Since the Guest memory is protected by the Realm, the host cannot access
these
+ buffers unless the IPA state of the buffers is changed to Protected EMPTY by
+ the software executing in the Realm.
+
+ By enabling the sharing of the buffers, we are essentially opening an
+ aperture so that the host OS can access the range of pages that are shared.
+
+ The virtual firmware (Guest firmware) needs a mechanism to manage the sharing
+ of buffers. The Realm Aperture Management Protocol provides an interface that
+ UEFI drivers/modules can use to enable/disable the sharing of buffers with
the
+ Host. The protocol also tracks open apertures and ensures they are shut on
+ ExitBootServices.
+
+ Copyright (c) 2022 - 2023, ARM Ltd. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Glossary:
+- RAMP - Realm Aperture Management Protocol
+**/
+
+#ifndef REALM_APERTURE_MANAGEMENT_PROTOCOL_H_
+#define REALM_APERTURE_MANAGEMENT_PROTOCOL_H_
+
+/** This macro defines the Realm Aperture Management Protocol GUID.
+
+ GUID: {585C00BE-CF7C-4DB8-8AA2-490D67F5F6E6}
+*/
+#define EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_GUID \
+ { 0x585c00be, 0xcf7c, 0x4db8, \
+{ 0x8a, 0xa2, 0x49, 0xd, 0x67, 0xf5, 0xf6, 0xe6 } \
+ };
+
+/** This macro defines the Realm Aperture Management Protocol Revision.
+*/
+#define EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_REVISION 0x0001
+
+#pragma pack(1)
+
+/** Enables sharing of the memory buffers with the host.
+
+ @param [in] Memory Pointer to the page start address.
+ @param [in] Pages Number of pages to share.
+ @param [out] ApertureReference Reference to the opened aperture.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_OUT_OF_RESOURCESMemory allocation failed.
+ @retval EFI_ACCESS_DENIED Aperture already open over memory region.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL_OPEN_APERTURE)(
+ IN CONST EFI_PHYSICAL_ADDRESSMemory,
+ IN CONST UINTN Pages,
+ OUT EFI_HANDLE *CONST ApertureReference
+ );
+
+/** Disables the sharing of the buffers.
+
+ @param [in] ApertureReference Reference to the aperture for closing.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The r
[edk2-devel] [RFC PATCH v1 30/30] ArmVirtPkg: Kvmtool: Switch to use BaseRng for AArch64
The kvmtool guest firmware is using the default RNG library
defined in ArmVirtPkg.dsc.inc which is BaseRngLibTimerLib.
BaseRngLibTimerLib is only present to use for test purposes on
platforms that do not have a suitable RNG source and must not be
used for production purposes.
Armv8.5 introduces random number instructions (e.g., RNDR) which
return a 64-bit random number. Although, this feature is optional,
it can be assumed that most modern platforms will implement this
support. This feature i.e. FEAT_RNG can be discovered by examining
the processor feature registers.
It is therefore desirable to use the RNDR instructions instead of
using the default BaseRngLibTimerLib which is unsafe.
The BaseRngLib in MdePkg already implements the RNG support using
RNDR. However, it is worth noting that FEAT_RNG is supported in
AArch64 state only. Therefore, switch to using the BaseRngLib
instance for AArch64 firmware builds. The AArch32 firmware builds
will continue to use BaseRngLibTimerLib.
Note: The guest firmware already supports Virtio RNG. So, should
the processor not implement FEAT_RNG, the guest firmware can fall
back to use Virtio RNG.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmVirtKvmTool.dsc | 5 +
1 file changed, 5 insertions(+)
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index
d9dd7a67307ffed5da16837301f18e7715187450..829a378a8dcfdbb5045db3610104a0f5c43431dc
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -89,6 +89,7 @@ [LibraryClasses.common]
[LibraryClasses.AARCH64]
ArmCcaLib|ArmVirtPkg/Library/ArmCcaLib/ArmCcaLib.inf
ArmCcaRsiLib|ArmVirtPkg/Library/ArmCcaRsiLib/ArmCcaRsiLib.inf
+ RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf
[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE,
LibraryClasses.common.PEIM]
PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
@@ -170,6 +171,10 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
!endif
+ # Define a UUID that represents the CPU based RNG algorithm implemented by
RNDR
+ # {BABE3B70-6474-4C0C-AFD8-3B8A32482C40}
+ gEfiSecurityPkgTokenSpaceGuid.PcdCpuRngSupportedAlgorithm|{ 0xba, 0xbe,
0x3b, 0x70, 0x64, 0x74, 0x4c, 0x0c, 0xaf, 0xd8, 0x3b, 0x8a, 0x32, 0x48, 0x2c,
0x40}
+
[PcdsPatchableInModule.common]
#
# This will be overridden in the code
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 29/30] MdePkg: Warn if AArch64 RNDR instruction is not supported
The BaseRngLib library constructor for AArch64 asserts if the
RNDR instruction is not supported by the CPU. This approach to
warn about the unsupported instruction may be suitable for the
host platform firmware. However, for a guest firmware the only
mechanism to discover the supported RNG interface is by probing
the processor feature registers.
The guest firmware may therefore assume that RNDR instruction
is supported and if the probe fails, fall back to an alternate
RNG source, e.g. Virtio RNG.
Therefore, replace the assert with a warning message to allow
the guest firmware to progress.
Note:
- If RNDR instruction is not supported, the GetRandomNumberXXX
functions will return FALSE to indicate that the random number
generation has failed. It is expected that the calling function
checks the status and handles this error appropriately.
- This change should not have any side effect as the behaviour
will be similar to that of release builds where the asserts
would be removed.
Signed-off-by: Sami Mujawar
---
MdePkg/Library/BaseRngLib/AArch64/Rndr.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
index
20811bf3ebf3e82d4037a617e0ff3c0336495a51..991adbf896bbb7b2b7d2cea03c75ecee0f284973
100644
--- a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
+++ b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c
@@ -48,9 +48,13 @@ BaseRngLibConstructor (
// MSR. A non-zero value indicates that the processor supports the RNDR
instruction.
//
Isar0 = ArmReadIdIsar0 ();
- ASSERT ((Isar0 & RNDR_MASK) != 0);
-
mRndrSupported = ((Isar0 & RNDR_MASK) != 0);
+ if (!mRndrSupported) {
+DEBUG ((
+ DEBUG_WARN,
+ "WARNING: BaseRngLib: RNDR instruction not supported by the processor.\n"
+ ));
+ }
return EFI_SUCCESS;
}
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 25/30] ArmVirtPkg: Add ArmCcaDxe for early DXE phase initialisation
Add ArmCcaDxe for early DXE phase initialisation like setting
up the monitor call conduit for Realm code
The Realm code should use SMC as the conduit for monitor calls.
Therefore, set the PcdMonitorConduitHvc to FALSE if the code is
running in a Realm.
Note: ArmCcaDxe is configured as an APRIORI DXE so that the DXE
dispatcher can schedule this to be loaded at the very beginning
of the Dxe phase. The DevicePathDxe.inf and Pcd.inf modules have
also been included to satisfy the required dependencies.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.c | 50
ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf | 39 +++
ArmVirtPkg/ArmVirtKvmTool.dsc | 5 +-
ArmVirtPkg/ArmVirtKvmTool.fdf | 10
4 files changed, 102 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.c b/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.c
new file mode 100644
index
..36a74f2521d2d92d404c42e86d5d37dd31a1972d
--- /dev/null
+++ b/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.c
@@ -0,0 +1,50 @@
+/** @file
+ ArmCcaDxe
+
+ Copyright (c) 2022 - 2023, ARM Ltd. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/** Entrypoint of Arm CCA Dxe.
+
+ @param [in] ImageHandle Image handle of this driver.
+ @param [in] SystemTable Pointer to the EFI System Table.
+
+ @retval RETURN_SUCCESS Success.
+ @retval EFI_NOT_FOUNDRequired HOB not found.
+**/
+EFI_STATUS
+EFIAPI
+ArmCcaDxe (
+ IN EFI_HANDLEImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ if (!IsRealm ()) {
+// Nothing to do here, return SUCCESS.
+return EFI_SUCCESS;
+ }
+
+ // Setup the conduit to be used by Realm code to SMC.
+ Status = PcdSetBoolS (PcdMonitorConduitHvc, FALSE);
+ if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "ERROR - Failed to set PcdMonitorConduitHvc\n"));
+ASSERT (0);
+return Status;
+ }
+
+ return Status;
+}
diff --git a/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
b/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
new file mode 100644
index
..df110ae54ce54f792fe9cf9420334dd1e6a3fc2c
--- /dev/null
+++ b/ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
@@ -0,0 +1,39 @@
+## @file
+# ArmCcaDxe
+#
+# Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001B
+ BASE_NAME = ArmCcaDxe
+ FILE_GUID = 6E474F73-7D50-46A8-9AEB-996B71599FE9
+ MODULE_TYPE= DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT= ArmCcaDxe
+
+[Sources]
+ ArmCcaDxe.c
+
+[LibraryClasses]
+ ArmCcaLib
+ BaseLib
+ DebugLib
+ HobLib
+ PcdLib
+ UefiDriverEntryPoint
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmVirtPkg/ArmVirtPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[Pcd]
+ gArmTokenSpaceGuid.PcdMonitorConduitHvc
+
+[Depex]
+ TRUE
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index
9bc857ea88d00431bf4223f588f908eab7561a19..acf4ede48da2d33d50b5593a857f3815f427707c
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -404,9 +404,10 @@ [Components.common]
#
SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
-!if $(ARCH) == AARCH64
+[Components.AARCH64]
#
# ACPI Support
#
ArmVirtPkg/KvmtoolCfgMgrDxe/ConfigurationManagerDxe.inf
-!endif
+
+ ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.fdf b/ArmVirtPkg/ArmVirtKvmTool.fdf
index
8ccbccd71e134e0ea97d49380293687aca43e8b9..68bd0e9d82dc83a337d8127a598018381888d894
100644
--- a/ArmVirtPkg/ArmVirtKvmTool.fdf
+++ b/ArmVirtPkg/ArmVirtKvmTool.fdf
@@ -117,6 +117,16 @@ [FV.FvMain]
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
+!if $(ARCH) == AARCH64
+ APRIORI DXE {
+INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+INF ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
+ }
+
+ INF ArmVirtPkg/ArmCcaDxe/ArmCcaDxe.inf
+!endif
+
INF MdeModulePkg/Core/Dxe/DxeMain.inf
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
INF OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf
--
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[edk2-devel] [RFC PATCH v1 27/30] ArmVirtPkg: IoMMU driver to DMA from Realms
On Arm CCA systems the access to pages inside the Realm is protected.
However, software executing in a Realm needs to interact with the
external world. This may be done using para virtualisation of the
disk, network interfaces, etc. For this to work the buffers in the
Realm need to be shared with the Host. The sharing and management
of the Realm buffers is done by the Realm Aperture Management
Protocol, which invokes the necessary Realm Service Interfaces
to transition the buffers from Protected IPA to Unprotected IPA.
The ArmCcaIoMmu driver provides the necessary hooks so that DMA
operations can be performed by bouncing buffers using pages shared
with the Host. It uses the Realm Aperture Management protocol to
share the buffers with the Host.
Signed-off-by: Sami Mujawar
---
ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c | 813
ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.h | 66 ++
ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.c | 59 ++
ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmuDxe.inf | 45 ++
4 files changed, 983 insertions(+)
diff --git a/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
new file mode 100644
index
..cf52b82218bb9ece7bfedcb6e3a2ced00eff5e92
--- /dev/null
+++ b/ArmVirtPkg/ArmCcaIoMmuDxe/ArmCcaIoMmu.c
@@ -0,0 +1,813 @@
+/** @file
+ The protocol provides support to allocate, free, map and umap a DMA buffer
+ for bus master (e.g PciHostBridge). When the execution context is a Realm,
+ the DMA operations must be performed on buffers that are shared with the
Host.
+ Hence the RAMP protocol is used to manage the sharing of the DMA buffers or
+ in some cases to bounce the buffers.
+
+ Copyright (c) 2017, AMD Inc. All rights reserved.
+ Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2022 - 2023, Arm Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "ArmCcaIoMmu.h"
+
+/** List of the MAP_INFO structures that have been set up by IoMmuMap() and not
+yet torn down by IoMmuUnmap(). The list represents the full set of mappings
+currently in effect.
+*/
+STATIC LIST_ENTRY mMapInfos = INITIALIZE_LIST_HEAD_VARIABLE (mMapInfos);
+
+#if !defined (MDEPKG_NDEBUG)
+
+/** ASCII names for EDKII_IOMMU_OPERATION constants, for debug logging.
+*/
+STATIC CONST CHAR8 *CONST
+mBusMasterOperationName[EdkiiIoMmuOperationMaximum] = {
+ "Read",
+ "Write",
+ "CommonBuffer",
+ "Read64",
+ "Write64",
+ "CommonBuffer64"
+};
+#endif
+
+/** Pointer to the Realm Aperture Management Protocol
+*/
+extern EDKII_REALM_APERTURE_MANAGEMENT_PROTOCOL *mRamp;
+
+/**
+ Given the host address find a mapping node in the linked list.
+
+ @param [in] HostAddress Host address.
+
+ @return Pointer to the MapInfo node if found, otherwise NULL.
+**/
+STATIC
+MAP_INFO *
+EFIAPI
+FindMappingByHostAddress (
+ INVOID *HostAddress
+ )
+{
+ LIST_ENTRY *Node;
+ LIST_ENTRY *NextNode;
+ MAP_INFO*MapInfo;
+
+ for (Node = GetFirstNode (&mMapInfos); Node != &mMapInfos; Node = NextNode) {
+NextNode = GetNextNode (&mMapInfos, Node);
+MapInfo = CR (Node, MAP_INFO, Link, MAP_INFO_SIG);
+if (MapInfo->HostAddress == HostAddress) {
+ return MapInfo;
+}
+ }
+
+ return NULL;
+}
+
+/**
+ Map a shared buffer
+
+ @param [in] Operation IoMMU operation to perform.
+ @param [in] HostAddress Pointer to the Host buffer.
+ @param [in] NumberOfBytes Number of bytes to map.
+ @param [in] BbAddress Bounce buffer address.
+ @param [in] BbPages Number of pages covering the bounce buffer.
+ @param [out] Mapping Pointer to the MapInfo node.
+
+ @retval RETURN_SUCCESSSuccess.
+ @retval RETURN_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+MapSharedBuffer (
+ INEDKII_IOMMU_OPERATION Operation,
+ INVOID *HostAddress,
+ INUINTN NumberOfBytes,
+ INEFI_PHYSICAL_ADDRESS BbAddress,
+ INUINTN BbPages,
+ OUT MAP_INFO **Mapping
+ )
+{
+ EFI_STATUS Status;
+ MAP_INFO*MapInfo;
+
+ if (BbPages != EFI_SIZE_TO_PAGES (NumberOfBytes)) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ // Allocate a MAP_INFO structure to remember the mapping when Unmap() is
+ // called later.
+ MapInfo = AllocateZeroPool (sizeof (MAP_INFO));
+ if (MapInfo == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ InitializeListHead (&MapInfo->Link);
+
+ // Initialize the MAP_INFO structure, except the NonParAddress field
+ MapInfo->Signature = MAP_INFO_SIG;
+ MapInfo->Operation = Operation;
+ MapInfo->NumberOfBytes = NumberOfBytes;
+ MapInfo->NumberOfPages = BbPages;
+ MapInfo->HostAddress = HostAddress;
+ MapInfo->BbAddress = BbAddress;
+
+ // Open aperture here
+ Status = mRamp->OpenAperture (
+
[edk2-devel] [RFC PATCH v1 02/30] ArmPkg: Add helper function to detect RME
Add helper function to check if the Realm Management
Extension (RME) is implemented by the hardware.
Signed-off-by: Sami Mujawar
---
ArmPkg/Include/Chipset/AArch64.h | 3 ++-
ArmPkg/Include/Library/ArmLib.h| 15 ++-
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 16 +++-
3 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index
bfd2859f51310993a42057a4c68604d492d8d7a8..47ef4d85656f1da32e3b924b18cf21ee83be8206
100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -27,6 +27,7 @@
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
+#define AARCH64_PFR0_RME (0xFULL << 52)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index
fb1ae57b35221b2e96bc6c671398c526a6813fa7..27a6070feaa68ad03f256bcd7c2be751fdaea6b0
100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
+ Copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -783,6 +783,19 @@ ArmHasSecurityExtensions (
VOID
);
+#else
+
+/** Checks if RME is implemented.
+
+ @retval TRUE RME is implemented.
+ @retval FALSE RME is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasRme (
+ VOID
+ );
+
#endif // MDE_CPU_ARM
#endif // ARM_LIB_H_
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index
7ab28e3e05fe77333b8f315f3754164c4cd30a39..0f36b090effeb9f3eec21177105704a001102fc6
100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Portions copyright (c) 2011 - 2023, Arm Limited. All rights reserved.
Copyright (c) 2021, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -104,3 +104,17 @@ ArmHasCcidx (
Mmfr2 = ArmReadIdAA64Mmfr2 ();
return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
}
+
+/** Checks if RME is implemented.
+
+ @retval TRUE RME is implemented.
+ @retval FALSE RME is not implemented.
+**/
+BOOLEAN
+EFIAPI
+ArmHasRme (
+ VOID
+ )
+{
+ return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_RME) != 0);
+}
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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[edk2-devel] [RFC PATCH v1 03/30] ArmPkg: Export SetMemoryRegionAttribute in ArmMmuLib
Arm CCA requires the software in a Realm to treat the most significant bit of an IPA as a protection attribute. To enable/disable sharing of memory regions with the host, the protection attribute needs to be set/cleared accordingly. Instead of implementing the functionality to Set/Clear the protection attribute in ArmMmuLib, defer this to an Arm CCA specific library so that additional dependencies for ArmMmuLib can be avoided. Therefore, export the SetMemoryRegionAttribute () in ArmMmuLib so that the Realm software can configure the protection attribute. Signed-off-by: Sami Mujawar --- ArmPkg/Include/Library/ArmMmuLib.h | 22 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 16 -- 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h index 4cf59a1e376b123c036f80b0f545245334f87dcd..97e44b49f45728693d2cf147c416b96643596df0 100644 --- a/ArmPkg/Include/Library/ArmMmuLib.h +++ b/ArmPkg/Include/Library/ArmMmuLib.h @@ -1,6 +1,7 @@ /** @file Copyright (c) 2015 - 2016, Linaro Ltd. All rights reserved. + Copyright (c) 2023, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -99,4 +100,25 @@ ArmSetMemoryAttributes ( IN UINT64Attributes ); +/** + Set the attributes for the memory region. + + @param[in] BaseAddress Start address of the memory region. + @param[in] Length Length memory region. + @param[in] Attributes Attributes to set for the memory region. + @param[in] BlockEntryMask Mask to be used for the block entry. + + @retval EFI_SUCCESSSuccess. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +EFI_STATUS +EFIAPI +SetMemoryRegionAttribute ( + IN EFI_PHYSICAL_ADDRESS BaseAddress, + IN UINT64Length, + IN UINT64Attributes, + IN UINT64BlockEntryMask + ); + #endif // ARM_MMU_LIB_H_ diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 7ed758fbbc699732a720149ffce6078d312f27c3..defe266a6c5afe6cbeaf89b11c7304665b98f011 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -1,7 +1,7 @@ /** @file * File managing the MMU for ARMv8 architecture * -* Copyright (c) 2011-2020, ARM Limited. All rights reserved. +* Copyright (c) 2011-2023, ARM Limited. All rights reserved. * Copyright (c) 2016, Linaro Limited. All rights reserved. * Copyright (c) 2017, Intel Corporation. All rights reserved. * @@ -502,8 +502,20 @@ ArmSetMemoryAttributes ( ); } -STATIC +/** + Set the attributes for the memory region. + + @param[in] BaseAddress Start address of the memory region. + @param[in] Length Length memory region. + @param[in] Attributes Attributes to set for the memory region. + @param[in] BlockEntryMask Mask to be used for the block entry. + + @retval EFI_SUCCESSSuccess. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ EFI_STATUS +EFIAPI SetMemoryRegionAttribute ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64Length, -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103579): https://edk2.groups.io/g/devel/message/103579 Mute This Topic: https://groups.io/mt/98496026/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [RFC PATCH v1 04/30] ArmPkg: Extend number of parameter registers in SMC call
The Realm Service Interface (RSI) commands use registers between
X1-X10 as parameters and between X0-X8 as return values for SMC
calls.
According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
When an SMC32/HVC32 call is made from AArch32:
- Arguments are passed in registers R1-R7.
- Results are returned in R0-R7.
When an SMC32/HVC32 call is made from AArch64:
- Arguments are passed in registers W1-W7.
- Results are returned in W0-W7.
According to SMCCC Section 2.7 SMC64/HVC64 argument passing
When an SMC64/HVC64 call is made from AArch64:
- Arguments are passed in registers X1-X17.
- Results are returned in X0-X17.
This means SMC calls can take up to 7/17 arguments and return up
to 7/17 return values.
However, for the current use-case(s):
- SMC32/HVC32 calls made from AArch32/AArch64 require up to 7
arguments and 4 return values.
- SMC64/HVC64 calls made from AArch64 require up to 10 arguments
and 9 return values.
Therefore, for SMC32/HVC32 calls made from AArch32/AArch64 there is
no update required. However, for AMC64/HVC64 calls made from AArch64,
extend the ArmCallSmc () to use registers X1-X11 as parameters and
return values for SMC call.
Signed-off-by: Sami Mujawar
---
ArmPkg/Include/Library/ArmSmcLib.h| 50 ++--
ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 22 ++---
2 files changed, 62 insertions(+), 10 deletions(-)
diff --git a/ArmPkg/Include/Library/ArmSmcLib.h
b/ArmPkg/Include/Library/ArmSmcLib.h
index
beef0175c35ce86aac9e465f9062bf8052b08dfb..e80b74671a6424723323bab95917fb3909771759
100644
--- a/ArmPkg/Include/Library/ArmSmcLib.h
+++ b/ArmPkg/Include/Library/ArmSmcLib.h
@@ -1,10 +1,13 @@
/** @file
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
-* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+* Copyright (c) 2012-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
+* @par Reference(s):
+* - SMC Calling Convention (SMCCC), ARM DEN 0028E, EAC0, 1.4
+* (https://developer.arm.com/documentation/den0028/e/)
**/
#ifndef ARM_SMC_LIB_H_
@@ -13,6 +16,18 @@
/**
* The size of the SMC arguments are different between AArch64 and AArch32.
* The native size is used for the arguments.
+ * According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
+ * When an SMC32/HVC32 call is made from AArch32:
+ * - Arguments are passed in registers R1-R7.
+ * - Results are returned in R0-R7.
+ * When an SMC32/HVC32 call is made from AArch64:
+ * - Arguments are passed in registers W1-W7.
+ * - Results are returned in W0-W7.
+ *
+ * According to SMCCC Section 2.7 SMC64/HVC64 argument passing
+ * When an SMC64/HVC64 call is made from AArch64:
+ * - Arguments are passed in registers X1-X17.
+ * - Results are returned in X0-X17.
*/
typedef struct {
UINTNArg0;
@@ -23,13 +38,42 @@ typedef struct {
UINTNArg5;
UINTNArg6;
UINTNArg7;
+ #ifdef MDE_CPU_AARCH64
+ UINTNArg8;
+ UINTNArg9;
+ UINTNArg10;
+ UINTNArg11;
+ #endif
} ARM_SMC_ARGS;
/**
Trigger an SMC call
- SMC calls can take up to 7 arguments and return up to 4 return values.
- Therefore, the 4 first fields in the ARM_SMC_ARGS structure are used
+ According to the SMCCC Section 2.6 SMC32/HVC32 argument passing
+ When an SMC32/HVC32 call is made from AArch32:
+ - Arguments are passed in registers R1-R7.
+ - Results are returned in R0-R7.
+ When an SMC32/HVC32 call is made from AArch64:
+ - Arguments are passed in registers W1-W7.
+ - Results are returned in W0-W7.
+
+ According to SMCCC Section 2.7 SMC64/HVC64 argument passing
+ When an SMC64/HVC64 call is made from AArch64:
+ - Arguments are passed in registers X1-X17.
+ - Results are returned in X0-X17.
+
+ This means SMC calls can take up to 7/17 arguments and return up
+ to 7/17 return values.
+
+ However, the current use-case:
+ - For SMC32/HVC32 calls made from AArch32/AArch64 up to 7 arguments
+and 4 return values are required. Therefore, limit the maximum
+arguments to 7 and return values to 4.
+ - For AMC64/HVC64 calls made from AArch64 up to 11 arguments and
+return values are required. Therefore, limit the maximum arguments
+and return values to 11.
+
+ The fields in the ARM_SMC_ARGS structure are used
for both input and output values.
**/
diff --git a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
index
4a8c2a8f59eab3e5b66dda2515d5bbced131af13..299d612dc5e1ebfeaf69a356b400c511905d72fe
100644
--- a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
+++ b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
@@ -1,8 +1,11 @@
//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
+// Copyright (c) 2012-2023, Arm Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
+// @par Reference(s):
+// - SMC Calling Convention (SMCCC), ARM DEN 0028E, EAC0, 1.4
+// (https://dev
[edk2-devel] [RFC PATCH v1 00/30] Support for Arm CCA guest firmware
We are happy to announce an early RFC version of the Arm Confidential Compute Architecture (CCA) support for the Kvmtool guest firmware. The intention is to seek early feedback in the following areas: * Integration of the Arm CCA in ArmVirtPkg * Generalise the operations wherever possible with other Confidential Compute solutions and Virtual Machine Managers (VMMs) * Guest firmware support for Realms. Introduction Arm Confidential Compute Architecture (CCA) --- Arm CCA is a reference software architecture and implementation that builds on the Realm Management Extension (RME), enabling the execution of Virtual machines (VMs), while preventing access by more privileged software, such as hypervisor. Arm CCA allows the hypervisor to control the VM, but removes the right for access to the code, register state or data used by VM. More information on the architecture is available here [0]. Realm World ||Normal World || Secure World || ||| |||| EL0 x-x|| xx | x--x |||| | Realm ||| || | | | |||| | VM*||| | VM | | | | |||| |x---x||| || | | | |||| || |||| || | | H | |||| || Guest |||| || | | | |||| || OS ||||-||---| o |-|||| || |||| || | | | |||| |x---x||| || | | s | |||| |^||| || | | | |||| ||||| || | | t | |||| |+---+||| || | | | |||| || REALM |||| || | | | |||| || GUEST |||| || | | O | |||| || UEFI |||| || | | | |||| |+---+||| || | | S | |||| EL1 x-x|| xx | | | |||| ^ ||| | | |||| | ||| | | |||| R*||--| |-|||| S || | | |||| I || x-->| | |||| | || | | | |||| | || | x--x |||| | || | ^|||| v || SMC ||||| x---x || | x--x |||| | RMM* | || | | HOST | |||| x---x || | | UEFI | |||| ^ || | x--x |||| EL2 | || ||||| | || ||||| =|=| | | x--- *RMI* ---x EL3 Root World EL3 Firmware === Where: RMM - Realm Management Monitor RMI - Realm Management Interface RSI - Realm Service Interface SMC - Secure Monitor Call RME introduces two added additional worlds, "Realm world" and "Root World" in addition to the traditional Secure world and Normal world. The Arm CCA defines a new component, Realm Management Monitor (RMM) that runs at R-EL2. This is a standard piece of firmware, verified, installed and loaded by the EL3 firmware (e.g., TF-A), at system boot. The RMM provides a standard interface Realm Management Interface (RMI) to the Normal world hypervisor to manage the VMs running in the Realm world (also called Realms). These are exposed via SMC and are routed through the EL3 firmware. The RMM also provides certain services to the Realms via SMC, called the Realm Service Interface (RSI). These include: - Realm Guest Configuration - Attestation & Measurement services - Managing the state of an Intermediate Physical Address (IPA aka GPA) page - Host Call service (Communication with the Normal world Hypervisor). The specification for the RMM software is currently at *v1.0-eac0* and the latest version is available here [1]. The Trusted Firmware foundation has an implementation of the RMM - TF-RMM - available here [3]. Implementation == This version of the Realm Guest UEFI firmware is intended to be used with the Linux Kernel RFC stack[6][11] and is based on the RMM specification v1.0-BET0[2]. We plan to update the Guest UEFI Firmware to support the latest versi
[edk2-devel][PATCH v1 1/2] UefiPayloadPkg: Define RngLibTimerLib for systems without RDRAND
From: Benjamin Doron Presently, `ArchIsRngSupported()` always returns TRUE, per https://github.com/tianocore/edk2/blob/1eeca0750af5af2f0e78437bf791ac2de74bde74/MdePkg/Library/BaseRngLib/Rand/RdRand.c#L124-L125. Therefore, `BaseRngLibConstructor()` should continue to assert RDRAND support. However, older platforms do not support RDRAND, such as QEMU in some configurations. Therefore, define an RngLib library class for such systems, using a new flag. Maintain current behaviour by default. Note that this is less secure behaviour, and should be avoided in production. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Benjamin Doron --- UefiPayloadPkg/UefiPayloadPkg.dsc | 5 + 1 file changed, 5 insertions(+) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index 9847f189fff5..1e803ba01567 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -130,6 +130,7 @@ # This is how BaseCpuTimerLib works, and a recommended way to get Frequence, so set the default value as TRUE. # Note: for emulation platform such as QEMU, this may not work and should set it as FALSE DEFINE CPU_TIMER_LIB_ENABLE = TRUE + DEFINE CPU_RNG_ENABLE= TRUE DEFINE MULTIPLE_DEBUG_PORT_SUPPORT = FALSE @@ -204,7 +205,11 @@ !endif IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf +!if $(CPU_RNG_ENABLE) == TRUE RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf +!else + RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf +!endif HobLib|UefiPayloadPkg/Library/DxeHobLib/DxeHobLib.inf # -- 2.39.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103583): https://edk2.groups.io/g/devel/message/103583 Mute This Topic: https://groups.io/mt/98497421/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel][PATCH v1 2/2] UefiPayloadPkg: Enable RNG support
From: Benjamin Doron Uses CPU RDRAND support and installs the EfiRngProtocol. The protocol may be used by iPXE or the Linux kernel to gather entropy. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Benjamin Doron --- UefiPayloadPkg/UefiPayloadPkg.dsc | 3 +++ UefiPayloadPkg/UefiPayloadPkg.fdf | 3 +++ 2 files changed, 6 insertions(+) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index 1e803ba01567..486af2396731 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -634,6 +634,9 @@ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf !endif UefiCpuPkg/CpuDxe/CpuDxe.inf +!if $(CPU_RNG_ENABLE) == TRUE + SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf +!endif MdeModulePkg/Universal/BdsDxe/BdsDxe.inf !if $(BOOTSPLASH_IMAGE) MdeModulePkg/Logo/LogoDxe.inf diff --git a/UefiPayloadPkg/UefiPayloadPkg.fdf b/UefiPayloadPkg/UefiPayloadPkg.fdf index f8c2aa8c4a02..53add65a6a40 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.fdf +++ b/UefiPayloadPkg/UefiPayloadPkg.fdf @@ -157,6 +157,9 @@ INF CryptoPkg/Driver/CryptoDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf !endif INF UefiCpuPkg/CpuDxe/CpuDxe.inf +!if $(CPU_RNG_ENABLE) == TRUE +INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf +!endif INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf -- 2.39.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103584): https://edk2.groups.io/g/devel/message/103584 Mute This Topic: https://groups.io/mt/98497422/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [Patch V3 0/8] Create page table by CpuPageTableLib in DxeIpl
On Tue, 25 Apr 2023 at 03:45, Ni, Ray wrote: > > > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Ard > > Biesheuvel > > Sent: Tuesday, April 25, 2023 2:07 AM > > To: Kinney, Michael D > > Cc: devel@edk2.groups.io; Tan, Dun > > Subject: Re: [edk2-devel] [Patch V3 0/8] Create page table by > > CpuPageTableLib in DxeIpl > > > > On Mon, 24 Apr 2023 at 19:51, Kinney, Michael D > > wrote: > > > > > > Hi Ard, > > > > > > Thanks for the feedback. Let's work on this approach. > > > > > > Are there similar needs for CPU related services in the DXE Core before > > > the CPU AP is loaded? > > > > > > If we are going to define a new lib class to abstract DXE IPL > > > requirements, > > > it would be good to cover DXE Core requirements too. > > > > > > > Yeah, excellent point. > > > > The problem I have had to work around in my strict permissions series > > (which includes the linked patch) is that there is a window from the > > moment DXE core is dispatched until the moment the CPU arch protocol > > DXE driver is dispatched where we don't have an architectural means to > > manipulate memory permissions. > > > > So what we'd need here is a library version of the following method > > > > typedef > > EFI_STATUS > > (EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)( > > IN EFI_CPU_ARCH_PROTOCOL *This, > > IN EFI_PHYSICAL_ADDRESS BaseAddress, > > IN UINT64Length, > > IN UINT64Attributes > > ); > > What's your idea here? > Besides HandOffToDxeCore(), you require a 2nd lib API as above for > early DXE phase before CPU AP is available? > > Why do we want to combine two APIs into one lib class? > If combined, what lib class name do you think is proper to describe the lib > purpose? > > It seems to me lacking of CPU AP in early DXE phase is acknowledged by PI > spec. > Having the 2nd API for DXE early phase is like a workaround to fix PI spec > gap, do you think so? > Perhaps. Maybe the problem here is that there setting memory permissions is not part of the PEI CPU arch protocol. It would make sense for shadowed PEIMs as well as the DXE core to be mapped with strict permissions at dispatch time (if the section alignment permits it). For XIP PEIMs, nothing would change, and if PEI executes in place from DRAM, the whole FV can be mapped read-only. Or perhaps this should be a separate PPI altogether, and we could define it as one that is callable from DXE core if the CPU arch protocol has not been dispatched yet. I don't really care whether or not we add this to the PI spec tbh > > > > *However*, I am aware that the X86 DXE IPL code deviates from this, as > > it needs to build long mode compatible page tables before switching > > from IA32 to X64, right? > > DXEIPL creates long mode page table with following characteristics: > * 1:1 mapping to cover the entire memory space > * Set the bottom 4K of BSP stack as not-present - prevent stack overflow > * Set the entire BSP stack as NX - prevent buffer overflow attack > * Set the [0-4k] region as not-present - null protection > > But it doesn't set DxeCore code region as RO, or data region as NX. > > I describe the X86 DXEIPL page table behavior as above. Because I hope > you could explain a bit more on your thoughts. I don't quite understand > your above wordings. > I guess the long mode switch is sufficiently special that it will be very hard to define a sane API that covers all of this. OTOH, it seems like a missed opportunity to rely on DXE IPL to create all these restricted mappings, and invent something completely new just to remap the DXE core text and data sections RO / XP. And note that, for arm64, this should occur before the code is actually called, since the restricted mode we would like to enable for EDK2 does not permit memory that is both writable and executable at all. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103586): https://edk2.groups.io/g/devel/message/103586 Mute This Topic: https://groups.io/mt/98466782/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 1/2] SecurityPkg: Add RNG support
Please see https://edk2.groups.io/g/devel/message/103583 and https://edk2.groups.io/g/devel/message/103584. Thanks. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103585): https://edk2.groups.io/g/devel/message/103585 Mute This Topic: https://groups.io/mt/89353220/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 0/6] edksetup.bat, BaseTools: Improve Windows environment setup and BaseTools C compilation
There are remnants of Python 2 support in BaseTools/toolsetup.bat that it's probably time to remove since we only support Python 3.9 and newer these days. So, remove the variables that enable Python3 support and simplify the batch script. I've also seen errors where after running edksetup.bat the build command isn't available because PYTHONPATH wasn't being set, so fix that when the Pip BaseTools are being used. At the same time, let's add a check that we meet the minimum version requirement so we don't end up failing with an obscure error. Building BaseTools causes a warning about threading.currentThread being deprecated, so update code in NmakeSubdirs.py to switch to threading.current_thread. There needs to be further work, because if PYTHON_COMMAND isn't specified then it defaults to "py -3", where py is C:\Windows\py.exe, which doesn't work if you're using a virtualenv since it installs python.exe and pythonw.exe in venv\Scripts. toolsetup.bat therefore fails to detect the Pip BaseTools and uses the in-source Basetools. GitHub PR: https://github.com/tianocore/edk2/pull/4302 GitHub branch: https://github.com/bcran/edk2/tree/py3 Rebecca Cran (6): BaseTools: Remove Python2/Python3 detection from toolset.bat BaseTools: use threading.current_thread in NmakeSubdirs.py edksetup.bat: if toolsetup.bat fails, just exit BaseTools: Update toolsetup.bat and Tests/PythonTest.py to check ver BaseTools: Update toolsetup.bat to not use BASETOOLS_PYTHON_SOURCE BaseTools: only print the environment once in toolsetup.bat BaseTools/Source/C/Makefiles/NmakeSubdirs.py | 2 +- BaseTools/Tests/PythonTest.py| 21 ++- BaseTools/toolsetup.bat | 157 edksetup.bat | 1 + 4 files changed, 85 insertions(+), 96 deletions(-) -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103587): https://edk2.groups.io/g/devel/message/103587 Mute This Topic: https://groups.io/mt/98497580/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 1/6] BaseTools: Remove Python2/Python3 detection from toolset.bat
Since Python3 is now required, we can remove the checks for PYTHON3_ENABLE and PYTHON3 and simplify the code in toolsetup.bat. Also, remove the leftover from when we supported freezing Python code. While here, fix a couple of typos and improve error messages. Signed-off-by: Rebecca Cran --- BaseTools/toolsetup.bat | 64 +--- 1 file changed, 16 insertions(+), 48 deletions(-) diff --git a/BaseTools/toolsetup.bat b/BaseTools/toolsetup.bat index 58fd26a4b585..29a630b9035c 100755 --- a/BaseTools/toolsetup.bat +++ b/BaseTools/toolsetup.bat @@ -323,18 +323,8 @@ goto check_build_environment ) :defined_python -if defined PYTHON_COMMAND if not defined PYTHON3_ENABLE ( - goto check_python_available -) -if defined PYTHON3_ENABLE ( - if "%PYTHON3_ENABLE%" EQU "TRUE" ( -set PYTHON_COMMAND=py -3 -goto check_python_available - ) else ( -goto check_python2 - ) -) -if not defined PYTHON_COMMAND if not defined PYTHON3_ENABLE ( + +if not defined PYTHON_COMMAND ( set PYTHON_COMMAND=py -3 py -3 %BASE_TOOLS_PATH%\Tests\PythonTest.py >PythonCheck.txt 2>&1 setlocal enabledelayedexpansion @@ -346,56 +336,40 @@ if not defined PYTHON_COMMAND if not defined PYTHON3_ENABLE ( set PYTHON_COMMAND= echo. echo !!! ERROR !!! Binary python tools are missing. - echo PYTHON_COMMAND, PYTHON3_ENABLE or PYTHON_HOME - echo Environment variable is not set successfully. - echo They is required to build or execute the python tools. + echo PYTHON_COMMAND or PYTHON_HOME + echo Environment variable is not set correctly. + echo They are required to build or execute the python tools. echo. goto end -) else ( - goto check_python2 ) - ) else ( -goto check_freezer_path ) ) -:check_python2 endlocal + if defined PYTHON_HOME ( if EXIST "%PYTHON_HOME%" ( set PYTHON_COMMAND=%PYTHON_HOME%\python.exe -goto check_python_available + ) else ( +echo . +echo !!! ERROR !!! PYTHON_HOME="%PYTHON_HOME%" does not exist. +echo . +goto end ) ) -if defined PYTHONHOME ( - if EXIST "%PYTHONHOME%" ( -set PYTHON_HOME=%PYTHONHOME% -set PYTHON_COMMAND=%PYTHON_HOME%\python.exe -goto check_python_available - ) -) -echo. -echo !!! ERROR !!! PYTHON_HOME is not defined or The value of this variable does not exist -echo. -goto end -:check_python_available + %PYTHON_COMMAND% %BASE_TOOLS_PATH%\Tests\PythonTest.py >PythonCheck.txt 2>&1 setlocal enabledelayedexpansion set /p PythonCheck=<"PythonCheck.txt" del PythonCheck.txt if "!PythonCheck!" NEQ "TRUE" ( echo. -echo ! ERROR ! "%PYTHON_COMMAND%" is not installed or added to environment variables +echo ! ERROR ! PYTHON_COMMAND="%PYTHON_COMMAND%" is not installed or added to environment variables echo. goto end - ) else ( -goto check_freezer_path - ) +) - - -:check_freezer_path - endlocal +endlocal %PYTHON_COMMAND% -c "import edk2basetools" >NUL 2>NUL if %ERRORLEVEL% EQU 0 ( @@ -422,13 +396,7 @@ goto end :print_python_info echoPATH = %PATH% - if defined PYTHON3_ENABLE if "%PYTHON3_ENABLE%" EQU "TRUE" ( -echo PYTHON3_ENABLE = %PYTHON3_ENABLE% -echo PYTHON3 = %PYTHON_COMMAND% - ) else ( -echo PYTHON3_ENABLE = FALSE -echo PYTHON_COMMAND = %PYTHON_COMMAND% - ) + echo PYTHON_COMMAND = %PYTHON_COMMAND% echo PYTHONPATH = %PYTHONPATH% echo. -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103588): https://edk2.groups.io/g/devel/message/103588 Mute This Topic: https://groups.io/mt/98497581/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 2/6] BaseTools: use threading.current_thread in NmakeSubdirs.py
threading.currentThread is a deprecated alias for threading.current_thread, and causes a warning to be displayed when it's called. Update NmakeSubdirs.py to use the latter method instead. Signed-off-by: Rebecca Cran --- BaseTools/Source/C/Makefiles/NmakeSubdirs.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Source/C/Makefiles/NmakeSubdirs.py b/BaseTools/Source/C/Makefiles/NmakeSubdirs.py index 1f4a45004f4b..7860c040afa0 100644 --- a/BaseTools/Source/C/Makefiles/NmakeSubdirs.py +++ b/BaseTools/Source/C/Makefiles/NmakeSubdirs.py @@ -132,7 +132,7 @@ class ThreadControl(object): break self.runningLock.acquire(True) -self.running.remove(threading.currentThread()) +self.running.remove(threading.current_thread()) self.runningLock.release() def Run(): -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103589): https://edk2.groups.io/g/devel/message/103589 Mute This Topic: https://groups.io/mt/98497583/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 3/6] edksetup.bat: if toolsetup.bat fails, just exit
If toolsetup.bat fails (i.e. exits with a non-zero %ERRORLEVEL%), don't try and carry on but just quit. Signed-off-by: Rebecca Cran --- edksetup.bat | 1 + 1 file changed, 1 insertion(+) diff --git a/edksetup.bat b/edksetup.bat index 7ad137bb3e9b..b63b57fc873e 100755 --- a/edksetup.bat +++ b/edksetup.bat @@ -86,6 +86,7 @@ if exist %EDK_TOOLS_PATH%\Source set BASE_TOOLS_PATH=%EDK_TOOLS_PATH% :checkBaseTools IF NOT EXIST "%EDK_TOOLS_PATH%\toolsetup.bat" goto BadBaseTools call %EDK_TOOLS_PATH%\toolsetup.bat %* +if %ERRORLEVEL% NEQ 0 goto end if /I "%1"=="Reconfig" shift goto check_NASM goto check_cygwin -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103590): https://edk2.groups.io/g/devel/message/103590 Mute This Topic: https://groups.io/mt/98497585/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 4/6] BaseTools: Update toolsetup.bat and Tests/PythonTest.py to check ver
Update toolsetup.bat and Tests/PythonTest.py to check if we're running a
version of Python that's compatible with BaseTools and the Pip
BaseTools.
Since edk2-pytool-extensions
(https://pypi.org/project/edk2-pytool-extensions/) requires Python 3.9
or newer, set that as the minimum version EDK2 requires.
Signed-off-by: Rebecca Cran
---
BaseTools/Tests/PythonTest.py | 21 ++-
BaseTools/toolsetup.bat | 61 +++-
2 files changed, 53 insertions(+), 29 deletions(-)
diff --git a/BaseTools/Tests/PythonTest.py b/BaseTools/Tests/PythonTest.py
index ec44c7947086..1716f78b5217 100644
--- a/BaseTools/Tests/PythonTest.py
+++ b/BaseTools/Tests/PythonTest.py
@@ -1,9 +1,26 @@
## @file
-# Test whether PYTHON_COMMAND is available
+# Test whether PYTHON_COMMAND is available and the
+# minimum Python version is installed.
#
# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
+import sys
+
if __name__ == '__main__':
-print('TRUE')
+# Check if the major and minor versions required were specified.
+if len(sys.argv) >= 3:
+req_major_version = int(sys.argv[1])
+req_minor_version = int(sys.argv[2])
+else:
+# If the minimum version wasn't specified on the command line,
+# default to 3.9 which was the minimum required on 2023-04-24.
+req_major_version = 3
+req_minor_version = 9
+
+if sys.version_info.major == req_major_version and \
+ sys.version_info.minor >= req_minor_version:
+sys.exit(0)
+else:
+sys.exit(1)
diff --git a/BaseTools/toolsetup.bat b/BaseTools/toolsetup.bat
index 29a630b9035c..66df628eac5f 100755
--- a/BaseTools/toolsetup.bat
+++ b/BaseTools/toolsetup.bat
@@ -12,6 +12,8 @@
@echo off
pushd .
set SCRIPT_ERROR=0
+set PYTHON_VER_MAJOR=3
+set PYTHON_VER_MINOR=9
@REM ##
@REM # You should not have to modify anything below this line
@@ -322,17 +324,19 @@ goto check_build_environment
)
)
-:defined_python
+@REM Check Python environment
if not defined PYTHON_COMMAND (
set PYTHON_COMMAND=py -3
- py -3 %BASE_TOOLS_PATH%\Tests\PythonTest.py >PythonCheck.txt 2>&1
- setlocal enabledelayedexpansion
- set /p PythonCheck=<"PythonCheck.txt"
- del PythonCheck.txt
- if "!PythonCheck!" NEQ "TRUE" (
+ py -3 %BASE_TOOLS_PATH%\Tests\PythonTest.py %PYTHON_VER_MAJOR%
%PYTHON_VER_MINOR% >NUL 2>NUL
+ if %ERRORLEVEL% EQU 1 (
+echo.
+echo !!! ERROR !!! Python %PYTHON_VER_MAJOR%.%PYTHON_VER_MINOR% or newer
is required.
+echo.
+goto end
+ )
+ if %ERRORLEVEL% NEQ 0 (
if not defined PYTHON_HOME if not defined PYTHONHOME (
- endlocal
set PYTHON_COMMAND=
echo.
echo !!! ERROR !!! Binary python tools are missing.
@@ -345,8 +349,6 @@ if not defined PYTHON_COMMAND (
)
)
-endlocal
-
if defined PYTHON_HOME (
if EXIST "%PYTHON_HOME%" (
set PYTHON_COMMAND=%PYTHON_HOME%\python.exe
@@ -358,27 +360,30 @@ if defined PYTHON_HOME (
)
)
-%PYTHON_COMMAND% %BASE_TOOLS_PATH%\Tests\PythonTest.py >PythonCheck.txt 2>&1
- setlocal enabledelayedexpansion
- set /p PythonCheck=<"PythonCheck.txt"
- del PythonCheck.txt
- if "!PythonCheck!" NEQ "TRUE" (
-echo.
-echo ! ERROR ! PYTHON_COMMAND="%PYTHON_COMMAND%" is not installed or
added to environment variables
-echo.
-goto end
+%PYTHON_COMMAND% %BASE_TOOLS_PATH%\Tests\PythonTest.py %PYTHON_VER_MAJOR%
%PYTHON_VER_MINOR% >NUL 2>NUL
+if %ERRORLEVEL% EQU 1 (
+ echo.
+ echo !!! ERROR !!! Python %PYTHON_VER_MAJOR%.%PYTHON_VER_MINOR% or newer is
required.
+ echo.
+ goto end
+)
+if %ERRORLEVEL% NEQ 0 (
+ echo.
+ echo !!! ERROR !!! PYTHON_COMMAND="%PYTHON_COMMAND%" does not exist or is
not a Python interpreter.
+ echo.
+ goto end
)
endlocal
- %PYTHON_COMMAND% -c "import edk2basetools" >NUL 2>NUL
- if %ERRORLEVEL% EQU 0 (
-goto use_pip_basetools
- ) else (
-REM reset ERRORLEVEL
-type nul>nul
-goto use_builtin_basetools
- )
+%PYTHON_COMMAND% -c "import edk2basetools" >NUL 2>NUL
+if %ERRORLEVEL% EQU 0 (
+ goto use_pip_basetools
+) else (
+ REM reset ERRORLEVEL
+ type nul>nul
+ goto use_builtin_basetools
+)
:use_builtin_basetools
@echo Using EDK2 in-source Basetools
@@ -466,5 +471,7 @@ set VS2015=
set VS2013=
set VS2012=
set VSTool=
+set PYTHON_VER_MAJOR=
+set PYTHON_VER_MINOR=
+set SCRIPT_ERROR=
popd
-
--
2.40.0.windows.1
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[edk2-devel] [PATCH 5/6] BaseTools: Update toolsetup.bat to not use BASETOOLS_PYTHON_SOURCE
The BASETOOLS_PYTHON_SOURCE environment variable is only used temporarily to set PYTHONPATH. Since it doesn't help improve clarity, remove it. While here, make sure we set PYTHONPATH when we're using Pip BaseTools so that build etc. can be found. Signed-off-by: Rebecca Cran --- BaseTools/toolsetup.bat | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/BaseTools/toolsetup.bat b/BaseTools/toolsetup.bat index 66df628eac5f..80aa2992ba80 100755 --- a/BaseTools/toolsetup.bat +++ b/BaseTools/toolsetup.bat @@ -389,14 +389,13 @@ if %ERRORLEVEL% EQU 0 ( @echo Using EDK2 in-source Basetools if defined BASETOOLS_PYTHON_SOURCE goto print_python_info set "PATH=%BASE_TOOLS_PATH%\BinWrappers\WindowsLike;%PATH%" - set BASETOOLS_PYTHON_SOURCE=%BASE_TOOLS_PATH%\Source\Python - set PYTHONPATH=%BASETOOLS_PYTHON_SOURCE%;%PYTHONPATH% + set PYTHONPATH=%BASE_TOOLS_PATH%\Source\Python;%PYTHONPATH% goto print_python_info :use_pip_basetools @echo Using Pip Basetools set "PATH=%BASE_TOOLS_PATH%\BinPipWrappers\WindowsLike;%PATH%" - set BASETOOLS_PYTHON_SOURCE=edk2basetools + set PYTHONPATH=%BASE_TOOLS_PATH%\Source\Python;%PYTHONPATH% goto print_python_info :print_python_info -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103592): https://edk2.groups.io/g/devel/message/103592 Mute This Topic: https://groups.io/mt/98497588/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 6/6] BaseTools: only print the environment once in toolsetup.bat
Avoid printing %PATH% twice: move the printing of the environment down to print_python_info. Signed-off-by: Rebecca Cran --- BaseTools/toolsetup.bat | 35 +--- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/BaseTools/toolsetup.bat b/BaseTools/toolsetup.bat index 80aa2992ba80..6edfa3074f80 100755 --- a/BaseTools/toolsetup.bat +++ b/BaseTools/toolsetup.bat @@ -268,24 +268,6 @@ if NOT exist %CONF_PATH%\build_rule.txt ( if defined RECONFIG copy /Y %EDK_TOOLS_PATH%\Conf\build_rule.template %CONF_PATH%\build_rule.txt > nul ) -echo PATH = %PATH% -echo. -if defined WORKSPACE ( - echo WORKSPACE = %WORKSPACE% -) -if defined PACKAGES_PATH ( - echo PACKAGES_PATH = %PACKAGES_PATH% -) -echo EDK_TOOLS_PATH = %EDK_TOOLS_PATH% -if defined BASE_TOOLS_PATH ( - echo BASE_TOOLS_PATH = %BASE_TOOLS_PATH% -) -if defined EDK_TOOLS_BIN ( - echo EDK_TOOLS_BIN = %EDK_TOOLS_BIN% -) -echo CONF_PATH = %CONF_PATH% -echo. - :skip_reconfig @REM @@ -399,7 +381,22 @@ if %ERRORLEVEL% EQU 0 ( goto print_python_info :print_python_info - echoPATH = %PATH% + echo PATH = %PATH% + echo. + if defined WORKSPACE ( +echo WORKSPACE = %WORKSPACE% + ) + if defined PACKAGES_PATH ( +echo PACKAGES_PATH = %PACKAGES_PATH% + ) + echo EDK_TOOLS_PATH = %EDK_TOOLS_PATH% + if defined BASE_TOOLS_PATH ( +echo BASE_TOOLS_PATH = %BASE_TOOLS_PATH% + ) + if defined EDK_TOOLS_BIN ( +echo EDK_TOOLS_BIN = %EDK_TOOLS_BIN% + ) + echo CONF_PATH = %CONF_PATH% echo PYTHON_COMMAND = %PYTHON_COMMAND% echo PYTHONPATH = %PYTHONPATH% echo. -- 2.40.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103593): https://edk2.groups.io/g/devel/message/103593 Mute This Topic: https://groups.io/mt/98497589/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [V1 PATCH 1/1] MdePkg: TDX: Correct TDCALL_INFO_RETURN_DATA layout
On Wed, Feb 15, 2023 at 4:10 PM Xu, Min M wrote:
>
> On February 16, 2023 3:51 AM, Vishal Annapurve wrote:
> >
> > TDCALL_INFO should return num_vcpus as lower 4 bytes of r8 register
> > according to the tdx spec, so reorder num_vcpus and max_vcpus fields to
> > match the spec.
> >
> > Reference: Table 22.210 TDG.VP.INFO output operands
> > https://cdrdv2.intel.com/v1/dl/getContent/733568
> >
> > Signed-off-by: Vishal Annapurve
> > ---
> > MdePkg/Include/IndustryStandard/Tdx.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/MdePkg/Include/IndustryStandard/Tdx.h
> > b/MdePkg/Include/IndustryStandard/Tdx.h
> > index 81df136184..a17be61353 100644
> > --- a/MdePkg/Include/IndustryStandard/Tdx.h
> > +++ b/MdePkg/Include/IndustryStandard/Tdx.h
> > @@ -111,8 +111,8 @@ typedef struct {
> > typedef struct {
> >UINT64Gpaw;
> >UINT64Attributes;
> > - UINT32MaxVcpus;
> >UINT32NumVcpus;
> > + UINT32MaxVcpus;
> >UINT64Resv[3];
> > } TDCALL_INFO_RETURN_DATA;
> >
> Thanks much for the correction.
> Reviewed-by: Min Xu
Hi Michael, Liming, Zhiguang,
Can you help review this patch?
Thanks,
Vishal
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Re: [edk2-devel] [PATCH v7 0/3] RISC-V SBI-backed SerialLib
Thanks for the review. I believe this patch set is ready for merging. Sunil had one comment on the contents of the UNI file, which I clarified. Sunil, anything else you wanted from this patch set or is it good to go? A > -Original Message- > From: Kinney, Michael D > Sent: Friday, April 7, 2023 5:09 PM > To: devel@edk2.groups.io; Warkentin, Andrei > > Cc: Kinney, Michael D > Subject: RE: [edk2-devel] [PATCH v7 0/3] RISC-V SBI-backed SerialLib > > Reviewed-by: Michael D Kinney > > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Andrei > > Warkentin > > Sent: Friday, April 7, 2023 2:44 PM > > To: devel@edk2.groups.io > > Cc: Warkentin, Andrei > > Subject: [edk2-devel] [PATCH v7 0/3] RISC-V SBI-backed SerialLib > > > > Hello, > > > > Here are three patches that provide a SerialLib backed by SBI console. > > Both legacy and DBCN mechanisms are supported in various execution > > environments and have been tested with UART and HTIF consoles. > > > > MdePkg reviewers: please review MdePkg.dsc changes. > > > > This is also available at > > https://github.com/andreiw/edk2-rv-wip/tree/patchset-2 > > > > A CI run is at https://github.com/tianocore/edk2/pull/4252 > > > > Compared to v6: > > > > - Unify the two SerialLib implementations under one directory and > > factor out the code somewhat. > > - Sunil's feedback on correctness. > > > > Compared to v5: > > > > Rename components as per Michael Kinney's suggestions. > > > > Compared to v4: > > > > (not sent out). CC MdePkg maintainers, fix copyright date in SecMain.c. > > > > Compared to v3 > > > > EccCheck fixes. Add MdePkg infs to DSC. > > > > Compared to v2: > > - Probes legacy extension as well. > > - Encode supported module types in the INF file. This is done using > LIBRARY_CLASS, > > as MODULE_TYPE cannot encode multiple types, so MODULE_TYPE is > retained as BASE. > > - Update INF version and generate brand new GUIDs instead of editing > them. > > - Checked that all patches retain ^M endings. > > > > Andrei Warkentin (3): > > MdePkg: BaseRiscVSbiLib: make more useful to consumers > > MdePkg: add SBI-based SerialPortLib for RISC-V > > OvmfPkg: RiscVVirt: Add missing SerialPortInitialize to Sec > > > > MdePkg/MdePkg.dsc > > | 2 + > > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.in > f| 40 +++ > > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRa > m.inf | 37 +++ > > OvmfPkg/RiscVVirt/Sec/SecMain.inf > > | 1 + > > MdePkg/Include/Library/BaseRiscVSbiLib.h > > | 40 ++- > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/Common.h > > | > 41 +++ > > OvmfPkg/RiscVVirt/Sec/SecMain.h > > | 1 + > > MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c > > | 3 > +- > > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.c > | 208 ++ > > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRa > m.c | 289 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/Common.c > > | > 132 + > > OvmfPkg/RiscVVirt/Sec/SecMain.c > > | 4 +- > > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.u > ni| 16 ++ > > 13 files changed, 808 insertions(+), 6 deletions(-) create mode > > 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiL > > ib.inf create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiL > > ibRam.inf create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/Common.h > > create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiL > > ib.c create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiL > > ibRam.c create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/Common.c > > create mode 100644 > > MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiL > > ib.uni > > > > -- > > 2.25.1 > > > > > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103595): https://edk2.groups.io/g/devel/message/103595 Mute This Topic: https://groups.io/mt/98133911/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 0/4] Fixes for SEV-SNP CC blob and CPUID table handling
(Mainly a resend of v1, but rolled in Gerd's Acked-by's, addressed new coding style check in the CI, and updated Cc list) Here are a number of fixes related to OVMF handling of the SEV-SNP Confidential Computing blob and CPUID table. Patch #1 is a fix for recently-reported issue that can cause significant problems with some SEV-SNP guest operating systems. Please consider applying this patch directly if the other patches in this series are held up for any reason. Patches 2-4 are minor changes for things that aren't currently triggered in practice, but make OVMF's SEV-SNP implementation more robust for different build/hypervisor environments in the future. Patch #2 was submitted previously, but refreshed here to apply cleanly on top of Patch #1, with no other functional changes since the initial review. v2: - rebased/retested on latest master - replaced usage of __FUNCTION__ with __func__ to comply with new CI test cases Michael Roth (4): OvmfPkg/AmdSevDxe: Allocate SEV-SNP CC blob as EfiACPIReclaimMemory OvmfPkg/AmdSevDxe: Update ConfidentialComputing blob struct definition OvmfPkg/CcExitLib: Fix SEV-SNP XSave area size calculation OvmfPkg/CcExitLib: Use documented XSave area base size for SEV-SNP OvmfPkg/AmdSevDxe/AmdSevDxe.c | 64 ++-- OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h | 6 -- OvmfPkg/Library/CcExitLib/CcExitVcHandler.c| 13 + 3 files changed, 59 insertions(+), 24 deletions(-) -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103596): https://edk2.groups.io/g/devel/message/103596 Mute This Topic: https://groups.io/mt/98501793/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/4] OvmfPkg/AmdSevDxe: Allocate SEV-SNP CC blob as EfiACPIReclaimMemory
The SEV-SNP Confidential Computing blob contains metadata that should
remain accessible for the life of the guest. Allocate it as
EfiACPIReclaimMemory to ensure the memory isn't overwritten by the guest
operating system later.
Reported-by: Dov Murik
Suggested-by: Dov Murik
Reviewed-by: Dov Murik
Reviewed-by: Tom Lendacky
Acked-by: Gerd Hoffmann
Signed-off-by: Michael Roth
---
OvmfPkg/AmdSevDxe/AmdSevDxe.c | 62 +++
1 file changed, 48 insertions(+), 14 deletions(-)
diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.c b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
index 05b728d32a..df807066fa 100644
--- a/OvmfPkg/AmdSevDxe/AmdSevDxe.c
+++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
@@ -28,15 +28,36 @@
// Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h
#define EFI_MEMORY_INTERNAL_MASK 0x0700ULL
-STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION mSnpBootDxeTable = {
- SIGNATURE_32 ('A','M', 'D', 'E'),
- 1,
- 0,
- (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),
- FixedPcdGet32 (PcdOvmfSnpSecretsSize),
- (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),
- FixedPcdGet32 (PcdOvmfCpuidSize),
-};
+STATIC
+EFI_STATUS
+AllocateConfidentialComputingBlob (
+ OUT CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION **CcBlobPtr
+ )
+{
+ EFI_STATUSStatus;
+ CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION *CcBlob;
+
+ Status = gBS->AllocatePool (
+ EfiACPIReclaimMemory,
+ sizeof (CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION),
+ (VOID **)&CcBlob
+ );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ CcBlob->Header = SIGNATURE_32 ('A', 'M', 'D', 'E');
+ CcBlob->Version= 1;
+ CcBlob->Reserved1 = 0;
+ CcBlob->SecretsPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32
(PcdOvmfSnpSecretsBase);
+ CcBlob->SecretsSize= FixedPcdGet32 (PcdOvmfSnpSecretsSize);
+ CcBlob->CpuidPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32
(PcdOvmfCpuidBase);
+ CcBlob->CpuidLSize = FixedPcdGet32 (PcdOvmfCpuidSize);
+
+ *CcBlobPtr = CcBlob;
+
+ return EFI_SUCCESS;
+}
STATIC EFI_HANDLE mAmdSevDxeHandle = NULL;
@@ -175,10 +196,11 @@ AmdSevDxeEntryPoint (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
- UINTNNumEntries;
- UINTNIndex;
+ EFI_STATUSStatus;
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
+ UINTN NumEntries;
+ UINTN Index;
+ CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION *SnpBootDxeTable;
//
// Do nothing when SEV is not enabled
@@ -284,6 +306,18 @@ AmdSevDxeEntryPoint (
}
}
+ Status = AllocateConfidentialComputingBlob (&SnpBootDxeTable);
+ if (EFI_ERROR (Status)) {
+DEBUG ((
+ DEBUG_ERROR,
+ "%a: AllocateConfidentialComputingBlob(): %r\n",
+ __func__,
+ Status
+ ));
+ASSERT (FALSE);
+CpuDeadLoop ();
+ }
+
if (MemEncryptSevSnpIsEnabled ()) {
//
// Memory acceptance began being required in SEV-SNP, so install the
@@ -321,7 +355,7 @@ AmdSevDxeEntryPoint (
//
return gBS->InstallConfigurationTable (
&gConfidentialComputingSevSnpBlobGuid,
- &mSnpBootDxeTable
+ SnpBootDxeTable
);
}
--
2.25.1
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[edk2-devel] [PATCH v2 2/4] OvmfPkg/AmdSevDxe: Update ConfidentialComputing blob struct definition
The Confidential Computing blob defined here is intended to match the
definition defined by linux guest kernel. Previously, both definitions
relied on natural alignment, but that relies on both OVMF and kernel
being compiled as 64-bit. While there aren't currently any plans to
enable SNP support for 32-bit compilations, the kernel definition has
since been updated to use explicit padding/reserved fields to avoid
this dependency. Update OVMF to match that definition.
While at it, also fix up the Reserved fields to match the numbering
used in the kernel.
No functional changes (for currently-supported environments, at least).
Reviewed-by: Tom Lendacky
Acked-by: Jiewen Yao
Acked-by: Gerd Hoffmann
Signed-off-by: Michael Roth
---
OvmfPkg/AmdSevDxe/AmdSevDxe.c | 4 +++-
OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h | 6 --
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/OvmfPkg/AmdSevDxe/AmdSevDxe.c b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
index df807066fa..db3675ae86 100644
--- a/OvmfPkg/AmdSevDxe/AmdSevDxe.c
+++ b/OvmfPkg/AmdSevDxe/AmdSevDxe.c
@@ -48,11 +48,13 @@ AllocateConfidentialComputingBlob (
CcBlob->Header = SIGNATURE_32 ('A', 'M', 'D', 'E');
CcBlob->Version= 1;
- CcBlob->Reserved1 = 0;
+ CcBlob->Reserved = 0;
CcBlob->SecretsPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32
(PcdOvmfSnpSecretsBase);
CcBlob->SecretsSize= FixedPcdGet32 (PcdOvmfSnpSecretsSize);
+ CcBlob->Reserved1 = 0;
CcBlob->CpuidPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32
(PcdOvmfCpuidBase);
CcBlob->CpuidLSize = FixedPcdGet32 (PcdOvmfCpuidSize);
+ CcBlob->Reserved2 = 0;
*CcBlobPtr = CcBlob;
diff --git a/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
index b328310fd0..83620e31b8 100644
--- a/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
+++ b/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
@@ -18,14 +18,16 @@
{ 0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42 }, \
}
-typedef struct {
+typedef PACKED struct {
UINT32Header;
UINT16Version;
- UINT16Reserved1;
+ UINT16Reserved;
UINT64SecretsPhysicalAddress;
UINT32SecretsSize;
+ UINT32Reserved1;
UINT64CpuidPhysicalAddress;
UINT32CpuidLSize;
+ UINT32Reserved2;
} CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION;
extern EFI_GUID gConfidentialComputingSevSnpBlobGuid;
--
2.25.1
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[edk2-devel] [PATCH v2 3/4] OvmfPkg/CcExitLib: Fix SEV-SNP XSave area size calculation
CPUID leaf 0xD sub-leafs 0x0 and 0x1 contain cumulative sizes for the
enabled XSave areas. Those sizes are calculated by tallying up all the
other sub-leafs that contain per-area size information for XSave areas
that are currently enabled in XCr0/XSS. The current check has the logic
inverted. Fix that.
This doesn't seem to cause problems currently, but could in the future
if OVMF made more extensive use of XSave areas. It was noticed while
implementing SNP-related tests for KVM Unit Tests, which re-uses the
OVMF #VC handler in some cases.
Reported-by: Pavan Kumar Paluri
Cc: Pavan Kumar Paluri
Reviewed-by: Tom Lendacky
Acked-by: Jiewen Yao
Acked-by: Gerd Hoffmann
Signed-off-by: Michael Roth
---
OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 7fe11c5324..94f0c4872c 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -1145,9 +1145,7 @@ GetCpuidXSaveSize (
for (Idx = 0; Idx < CpuidInfo->Count; Idx++) {
SEV_SNP_CPUID_FUNCTION *CpuidFn = &CpuidInfo->function[Idx];
-if (!((CpuidFn->EaxIn == 0xD) &&
- ((CpuidFn->EcxIn == 0) || (CpuidFn->EcxIn == 1
-{
+if (!((CpuidFn->EaxIn == 0xD) && (CpuidFn->EcxIn > 1))) {
continue;
}
--
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[edk2-devel] [PATCH v2 4/4] OvmfPkg/CcExitLib: Use documented XSave area base size for SEV-SNP
Currently OVMF tries to rely on the base size advertised via the CPUID
table entries corresponding to leaf 0xD, sub-leafs 0x0/0x1. This will
generally work for KVM guests, but might not for other SEV-SNP
hypervisor implementations. Make the handling more robust by simply
using the base area size documented by the APM.
Reviewed-by: Tom Lendacky
Acked-by: Jiewen Yao
Acked-by: Gerd Hoffmann
Signed-off-by: Michael Roth
---
OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 94f0c4872c..0fc30f7bc4 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -1114,8 +1114,6 @@ SnpEnabled (
@param[in] XFeaturesEnabled Bit-mask of enabled XSAVE features/areas as
indicated by XCR0/MSR_IA32_XSS bits
- @param[in] XSaveBaseSize Base/legacy XSAVE area size (e.g. when
-XCR0 is 1)
@param[in, out] XSaveSize Pointer to storage for calculated XSAVE
area
size
@param[in] Compacted Whether or not the calculation is for the
@@ -1130,7 +1128,6 @@ STATIC
BOOLEAN
GetCpuidXSaveSize (
IN UINT64 XFeaturesEnabled,
- IN UINT32 XSaveBaseSize,
IN OUT UINT32 *XSaveSize,
IN BOOLEAN Compacted
)
@@ -1139,7 +1136,10 @@ GetCpuidXSaveSize (
UINT64 XFeaturesFound = 0;
UINT32 Idx;
- *XSaveSize = XSaveBaseSize;
+ //
+ // The base/legacy XSave size is documented to be 0x240 in the APM.
+ //
+ *XSaveSize = 0x240;
CpuidInfo = (SEV_SNP_CPUID_INFO *)(UINT64)PcdGet32 (PcdOvmfCpuidBase);
for (Idx = 0; Idx < CpuidInfo->Count; Idx++) {
@@ -1355,7 +1355,6 @@ GetCpuidFw (
if (!GetCpuidXSaveSize (
XCr0 | XssMsr.Uint64,
- *Ebx,
&XSaveSize,
Compacted
))
--
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[edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - Tuesday, April 25, 2023 #cal-reminder
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Re: [edk2-devel] [Patch V2 2/2] UefiCpuPkg: Update PT code to support enable collect performance
Thanks for the comments. I'll update the code in next version patch.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Tuesday, April 25, 2023 10:14 PM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann ; Chen, Xiao X
Subject: RE: [Patch V2 2/2] UefiCpuPkg: Update PT code to support enable
collect performance
> @@ -112,6 +115,7 @@ ProcTraceSupport (
>PROC_TRACE_DATA *ProcTraceData;
>CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx;
>CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECXEcx;
> + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBXMainLeafEbx;
1. can you update the "Ecx" to "ProcTraceEcx", and "MainLeafEbx" to
"ProcTraceEbx"?
>
>//
>// Check if ProcTraceMemorySize option is enabled (0xFF means
> disable by
> user)
> @@ -141,6 +145,12 @@ ProcTraceSupport (
> ProcTraceData->ProcessorData[ProcessorNumber].RtitCtrl.Uint64 =
> AsmReadMsr64 (MSR_IA32_RTIT_CTL);
>
> ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputBase.Uint64
> = AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_BASE);
> ProcTraceData-
> >ProcessorData[ProcessorNumber].RtitOutputMaskPtrs.Uint64 =
> AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_MASK_PTRS);
> +
> +if (ProcTraceData->EnablePerformanceCollecting) {
> + AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE,
> CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &MainLeafEbx.Uint32,
> NULL, NULL);
2. There is an existing Cpuid call earlier. Can you get the "EBX" value in the
existing
Cpuid call? And you don't even need to check "EnablePerformanceCollecting"
here
for the capability detection.
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Re: [edk2-devel] [Patch V2 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP
Thanks for the comments. I'll add comments to explain it.
Thanks,
Dun
-Original Message-
From: Ni, Ray
Sent: Tuesday, April 25, 2023 10:10 PM
To: devel@edk2.groups.io; Tan, Dun
Cc: Dong, Eric ; Kumar, Rahul R ;
Gerd Hoffmann ; Chen, Xiao X
Subject: RE: [edk2-devel] [Patch V2 1/2] UefiCpuPkg: Update code to support
enable ProcTrace only on BSP
> +if (ProcTraceData->EnableOnBspOnly) {
1. can you please add comments here to remind reader that
this is also the first and only time ProcTraceInitialize() runs?
Similar comments in the next chunk code.
> + MemRegionBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages,
> Alignment);
> + if (MemRegionBaseAddr == 0) {
> +//
> +// Could not allocate for BSP even
> +//
> +DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate
> buffer for BSP\n"));
> +return RETURN_OUT_OF_RESOURCES;
> + }
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[edk2-devel] [Patch V3 0/2] Update ProcTrace feature code for new requirements.
In V3 patch set: 1. Add more comments in 'Update code to support enable ProcTrace only on BSP' 2. Rename some local varibles and remove a uneeded if check in 'Update PT code to support enable collect performance' Dun Tan (2): UefiCpuPkg: Update code to support enable ProcTrace only on BSP UefiCpuPkg: Update PT code to support enable collect performance UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 12 +++- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 210 +++--- UefiCpuPkg/UefiCpuPkg.dec| 15 +++ 3 files changed, 161 insertions(+), 76 deletions(-) -- 2.39.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103605): https://edk2.groups.io/g/devel/message/103605 Mute This Topic: https://groups.io/mt/98506880/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V3 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP
Update code to support enable ProcTrace only on BSP. Add a new
dynamic PCD to indicate if enable ProcTrace only on BSP. In
ProcTrace.c code, if this new PCD is true, only allocate buffer
and set CtrlReg.Bits.TraceEn to 1 for BSP.
Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Xiao X Chen
---
UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 3 ++-
UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 174
++
UefiCpuPkg/UefiCpuPkg.dec| 7 +++
3 files changed, 119 insertions(+), 65 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 7fbcd8da0e..d803012ce2 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -4,7 +4,7 @@
# This library registers CPU features defined in Intel(R) 64 and IA-32
# Architectures Software Developer's Manual.
#
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -62,3 +62,4 @@
gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
index 04e6a60728..92d6f54b42 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
@@ -1,7 +1,7 @@
/** @file
Intel Processor Trace feature.
- Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -46,6 +46,8 @@ typedef struct {
UINTN*TopaMemArray;
+ BOOLEAN EnableOnBspOnly;
+
PROC_TRACE_PROCESSOR_DATA*ProcessorData;
} PROC_TRACE_DATA;
@@ -77,6 +79,7 @@ ProcTraceGetConfigData (
ConfigData->NumberOfProcessors= (UINT32)NumberOfProcessors;
ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize);
ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme);
+ ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly);
return ConfigData;
}
@@ -188,6 +191,7 @@ ProcTraceInitialize (
MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg;
MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg;
RTIT_TOPA_TABLE_ENTRY*TopaEntryPtr;
+ BOOLEAN IsBsp;
//
// The scope of the MSR_IA32_RTIT_* is core for below processor type, only
program
@@ -236,6 +240,12 @@ ProcTraceInitialize (
return RETURN_SUCCESS;
}
+ IsBsp = (CpuInfo->ProcessorInfo.StatusFlag & PROCESSOR_AS_BSP_BIT) ? TRUE :
FALSE;
+
+ if (ProcTraceData->EnableOnBspOnly && !IsBsp) {
+return RETURN_SUCCESS;
+ }
+
MemRegionBaseAddr = 0;
FirstIn = FALSE;
@@ -260,43 +270,62 @@ ProcTraceInitialize (
// address base in MSR, IA32_RTIT_OUTPUT_BASE (560h) bits 47:12. Note
that all regions must be
// aligned based on their size, not just 4K. Thus a 2M region must have
bits 20:12 cleared.
//
-ThreadMemRegionTable = (UINTN *)AllocatePool
(ProcTraceData->NumberOfProcessors * sizeof (UINTN *));
-if (ThreadMemRegionTable == NULL) {
- DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable
Failed\n"));
- return RETURN_OUT_OF_RESOURCES;
-}
-ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable;
-
-for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++,
ProcTraceData->AllocatedThreads++) {
- Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
- Alignment = MemRegionSize;
- AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
- if (AlignedAddress == 0) {
-DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d
threads\n", ProcTraceData->AllocatedThreads));
-if (Index == 0) {
- //
- // Could not allocate for BSP even
- //
- FreePool ((VOID *)ThreadMemRegionTable);
- ThreadMemRegionTable = NULL;
- return RETURN_OUT_OF_RESOURCES;
+Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
+A
[edk2-devel] [Patch V3 2/2] UefiCpuPkg: Update PT code to support enable collect performance
Update ProcTrace feature code to support enable collect performance
data by generating CYC and TSC packets. Add a new dynamic
PCD to indicate if enable performance collecting. In ProcTrace.c
code, if this new PCD is true, after check cpuid, CYC and TSC
packets will be generated by setting the corresponding MSR bits
feilds if supported.
Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423
Signed-off-by: Dun Tan
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Xiao X Chen
---
UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 11
++-
UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 38
++
UefiCpuPkg/UefiCpuPkg.dec| 8
3 files changed, 44 insertions(+), 13 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index d803012ce2..1b823155b1 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -58,8 +58,9 @@
LocalApicLib
[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ##
SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTracePerformanceCollecting ##
SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
index 92d6f54b42..a4510eb802 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c
@@ -33,6 +33,7 @@ typedef struct {
MSR_IA32_RTIT_CTL_REGISTER RtitCtrl;
MSR_IA32_RTIT_OUTPUT_BASE_REGISTER RtitOutputBase;
MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTERRtitOutputMaskPtrs;
+ BOOLEANCycPacketSupported;
} PROC_TRACE_PROCESSOR_DATA;
typedef struct {
@@ -47,6 +48,7 @@ typedef struct {
UINTN*TopaMemArray;
BOOLEAN EnableOnBspOnly;
+ BOOLEAN EnablePerformanceCollecting;
PROC_TRACE_PROCESSOR_DATA*ProcessorData;
} PROC_TRACE_DATA;
@@ -76,10 +78,11 @@ ProcTraceGetConfigData (
ASSERT (ConfigData != NULL);
ConfigData->ProcessorData = (PROC_TRACE_PROCESSOR_DATA *)((UINT8
*)ConfigData + sizeof (PROC_TRACE_DATA));
- ConfigData->NumberOfProcessors= (UINT32)NumberOfProcessors;
- ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize);
- ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme);
- ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly);
+ ConfigData->NumberOfProcessors = (UINT32)NumberOfProcessors;
+ ConfigData->ProcTraceMemSize= PcdGet32 (PcdCpuProcTraceMemSize);
+ ConfigData->ProcTraceOutputScheme = PcdGet8
(PcdCpuProcTraceOutputScheme);
+ ConfigData->EnableOnBspOnly = PcdGetBool
(PcdCpuProcTraceBspOnly);
+ ConfigData->EnablePerformanceCollecting = PcdGetBool
(PcdCpuProcTracePerformanceCollecting);
return ConfigData;
}
@@ -111,7 +114,8 @@ ProcTraceSupport (
{
PROC_TRACE_DATA *ProcTraceData;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx;
- CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECXEcx;
+ CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECXProcTraceEcx;
+ CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBXProcTraceEbx;
//
// Check if ProcTraceMemorySize option is enabled (0xFF means disable by
user)
@@ -132,15 +136,17 @@ ProcTraceSupport (
return FALSE;
}
- AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE,
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, NULL, &Ecx.Uint32, NULL);
- ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported=
(BOOLEAN)(Ecx.Bits.RTIT == 1);
- ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported =
(BOOLEAN)(Ecx.Bits.SingleRangeOutput == 1);
+ AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE,
CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &ProcTraceEbx.Uint32,
&ProcTraceEcx.Uint32, NULL);
+ ProcTraceData->ProcessorData[ProcessorNumber].TopaSupport
Re: [edk2-devel] [Patch V3 0/2] Update ProcTrace feature code for new requirements.
Reviewed-by: Ray Ni > -Original Message- > From: devel@edk2.groups.io On Behalf Of duntan > Sent: Wednesday, April 26, 2023 9:54 AM > To: devel@edk2.groups.io > Subject: [edk2-devel] [Patch V3 0/2] Update ProcTrace feature code for new > requirements. > > In V3 patch set: > 1. Add more comments in 'Update code to support enable ProcTrace only on > BSP' > 2. Rename some local varibles and remove a uneeded if check in 'Update PT > code to support enable collect performance' > > Dun Tan (2): > UefiCpuPkg: Update code to support enable ProcTrace only on BSP > UefiCpuPkg: Update PT code to support enable collect performance > > UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | > 12 +++- > UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 210 > ++ > ++ > +++- > -- > UefiCpuPkg/UefiCpuPkg.dec| 15 > +++ > 3 files changed, 161 insertions(+), 76 deletions(-) > > -- > 2.39.1.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103608): https://edk2.groups.io/g/devel/message/103608 Mute This Topic: https://groups.io/mt/98506880/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v3 2/3] MdePkg: Support FDT library.
Hello, Since platform may also define other FDT structures, this EDK2 library may not be able to convert all the FDT structures to little endian. We might define a generic MACRO in library like CONVERT_FDT_DATA_TO_LITTLE_ENDIAN which can be used for all structure data, but it will be almost like calling SwapBytes** directly. Any other suggestion? Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Michael D > Kinney > Sent: Monday, April 24, 2023 10:41 AM > To: Leif Lindholm ; devel@edk2.groups.io > Cc: Lin, Benny ; Leif Lindholm > ; Gao, Liming ; Liu, > Zhiguang ; Pedro Falcato ; > Kinney, Michael D > Subject: Re: [edk2-devel] [PATCH v3 2/3] MdePkg: Support FDT library. > > Hi Leif, > > Do you have a proposal or small example on what you want to see > in the library? > > Mike > > > -Original Message- > > From: Leif Lindholm > > Sent: Monday, April 24, 2023 10:29 AM > > To: devel@edk2.groups.io; Kinney, Michael D > > Cc: Lin, Benny ; Leif Lindholm > ; Gao, Liming ; Liu, > > Zhiguang ; Pedro Falcato > > > Subject: Re: [edk2-devel] [PATCH v3 2/3] MdePkg: Support FDT library. > > > > Apologies, I was refactoring a git tree and switched off the world :) > > > > Well, being a bit late to the party ... my view is it would be > > preferable if we put the byteswapping in the library. > > > > The DT format is *defined* to be big-endian, 32-bit cells. So frankly, > > I have no problems with pushing responsibility onto individual > > platforms if they have decided to be "clever" by ignoring that - > > if that gets rid of a bunch of boilerplate for sensibly behaving platforms. > > > > Maybe another excuse for getting > > https://github.com/tianocore/edk2- > platforms/blob/master/Silicon/NXP/Library/IoAccessLib/IoAccessLib.c > > into MdePkg? > > > > / > > Leif > > > > On Thu, Apr 20, 2023 at 16:44:03 +, Michael D Kinney wrote: > > > Hi Leif, > > > > > > What is your opinion on FDT being big endian. > > > > > > Do we want the lib to help with that aspect, or leave it up to the > > > consumer of > the lib to > > > convert as needed? Seems like an area that could be very error prone if > > > we > are not > > > careful. > > > > > > Mike > > > > > > > -Original Message- > > > > From: Lin, Benny > > > > Sent: Wednesday, April 19, 2023 9:25 PM > > > > To: Kinney, Michael D ; > devel@edk2.groups.io > > > > Cc: Gao, Liming ; Liu, Zhiguang > ; Pedro Falcato > > > > Subject: RE: [PATCH v3 2/3] MdePkg: Support FDT library. > > > > > > > > > > > > > > > > >-Original Message- > > > > >From: Kinney, Michael D > > > > >Sent: Thursday, April 20, 2023 5:04 AM > > > > >To: Lin, Benny ; devel@edk2.groups.io > > > > >Cc: Gao, Liming ; Liu, Zhiguang > ; Pedro Falcato > > ; Kinney, > > > > Michael D > > > > >Subject: RE: [PATCH v3 2/3] MdePkg: Support FDT library. > > > > > > > > > >Responses below > > > > > > > > > >Mike > > > > > > > > > >> -Original Message- > > > > >> From: Lin, Benny > > > > >> Sent: Wednesday, April 19, 2023 10:12 AM > > > > >> To: Kinney, Michael D ; > > > > >> devel@edk2.groups.io > > > > >> Cc: Gao, Liming ; Liu, Zhiguang > > > > >> ; Pedro Falcato > > > > >> Subject: RE: [PATCH v3 2/3] MdePkg: Support FDT library. > > > > >> > > > > >> Please find my feedback below. > > > > >> We can remove FDT_RESERVE_ENTRY but keep FDT_NODE_HEADER, > what do you think? > > > > >> > > > > >> QQQ > > > > >> Benny > > > > >> > > > > >> >-Original Message- > > > > >> >From: Kinney, Michael D > > > > >> >Sent: Wednesday, April 19, 2023 11:54 PM > > > > >> >To: Lin, Benny ; devel@edk2.groups.io > > > > >> >Cc: Gao, Liming ; Liu, Zhiguang > > > > >> >; Pedro Falcato ; > > > > >> >Kinney, > > > > >> Michael D > > > > >> >Subject: RE: [PATCH v3 2/3] MdePkg: Support FDT library. > > > > >> > > > > > >> >A few comments below. > > > > >> > > > > > >> >Mike > > > > >> > > > > > >> >> -Original Message- > > > > >> >> From: Lin, Benny > > > > >> >> Sent: Sunday, April 16, 2023 10:35 PM > > > > >> >> To: devel@edk2.groups.io > > > > >> >> Cc: Lin, Benny ; Kinney, Michael D > > > > >> >> ; Gao, Liming > > > > >> >> ; Liu, Zhiguang > ; > > > > >> >> Pedro Falcato > > > > >> >> Subject: [PATCH v3 2/3] MdePkg: Support FDT library. > > > > >> >> > > > > >> >> From: Benny Lin > > > > >> >> > > > > >> >> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4392 > > > > >> >> Add FDT support in EDK2 by submodule 3rd party libfdt > > > > >> >> (https://github.com/devicetree-org/pylibfdt/tree/main/libfdt) > > > > >> >> and refer to LibcLib implementation by Pedro. > > > > >> >> > > > > >> >> Cc: Michael D Kinney > > > > >> >> Cc: Liming Gao > > > > >> >> Cc: Zhiguang Liu > > > > >> >> Acked-by: Pedro Falcato > > > > >> >> Signed-off-by: Benny Lin > > > > >> >> --- > > > > >> >> MdePkg/Include/Library/FdtLib.h | 314 > > > > > >> >> MdePkg/Library/BaseFdtLib/BaseFdtLib.inf | 62 > > > > >> >> Mde
Re: [edk2-devel] [Patch V3 0/8] Create page table by CpuPageTableLib in DxeIpl
I can think of 3 options: 1. Create MdeModulePkg/HandOffToDxeCoreLib lib class. UefiCpuPkg implements the two instances supporting 32/64bit PEI. 2. Create MdeModulePkg/Ppi/EdkiiMemoryAttribute.h. UefiCpuPkg/CpuMpPei implements the X86 version of MemoryAttribute PPI. (As what Ard did in ArmCpuDxe driver.) The MemoryAttribute PPI only supports to modify the memory attribute in the active page table. It cannot modify the "future" page table which is the case DxeIpl/Ia32 creates long-mode page table. So, this option cannot help on DxeIpl/Ia32. I will have to keep DxeIpl/Ia32 code unchanged and only cleanup the DxeIpl/X64 by calling the new PPI. 3. A slight different version of option #2: create MdeModulePkg/MemoryAttributeLib lib class instead of PPI. I would prefer #2. Option #1 helps to create single DxeIpl PEIM but doesn't help to abstract memory attributes changing in whole PEI phase. With Option #2, multiple DxeIpl PEIMs still exist for different archs. I am fine with either option #1 or #2 because either can avoid MdeModulePkg depending on UefiCpuPkg. Thoughts? > > > > > > The problem I have had to work around in my strict permissions series > > > (which includes the linked patch) is that there is a window from the > > > moment DXE core is dispatched until the moment the CPU arch protocol > > > DXE driver is dispatched where we don't have an architectural means to > > > manipulate memory permissions. > > > > > > So what we'd need here is a library version of the following method > > > > > > typedef > > > EFI_STATUS > > > (EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)( > > > IN EFI_CPU_ARCH_PROTOCOL *This, > > > IN EFI_PHYSICAL_ADDRESS BaseAddress, > > > IN UINT64Length, > > > IN UINT64Attributes > > > ); > > > > What's your idea here? > > Besides HandOffToDxeCore(), you require a 2nd lib API as above for > > early DXE phase before CPU AP is available? > > > > Why do we want to combine two APIs into one lib class? > > If combined, what lib class name do you think is proper to describe the lib > purpose? > > > > It seems to me lacking of CPU AP in early DXE phase is acknowledged by PI > spec. > > Having the 2nd API for DXE early phase is like a workaround to fix PI spec > gap, do you think so? > > > > Perhaps. Maybe the problem here is that there setting memory > permissions is not part of the PEI CPU arch protocol. It would make > sense for shadowed PEIMs as well as the DXE core to be mapped with > strict permissions at dispatch time (if the section alignment permits > it). For XIP PEIMs, nothing would change, and if PEI executes in place > from DRAM, the whole FV can be mapped read-only. > > Or perhaps this should be a separate PPI altogether, and we could > define it as one that is callable from DXE core if the CPU arch > protocol has not been dispatched yet. > > I don't really care whether or not we add this to the PI spec tbh > > > > > > > *However*, I am aware that the X86 DXE IPL code deviates from this, as > > > it needs to build long mode compatible page tables before switching > > > from IA32 to X64, right? > > > > DXEIPL creates long mode page table with following characteristics: > > * 1:1 mapping to cover the entire memory space > > * Set the bottom 4K of BSP stack as not-present - prevent stack overflow > > * Set the entire BSP stack as NX - prevent buffer overflow attack > > * Set the [0-4k] region as not-present - null protection > > > > But it doesn't set DxeCore code region as RO, or data region as NX. > > > > I describe the X86 DXEIPL page table behavior as above. Because I hope > > you could explain a bit more on your thoughts. I don't quite understand > > your above wordings. > > > > I guess the long mode switch is sufficiently special that it will be > very hard to define a sane API that covers all of this. OTOH, it seems > like a missed opportunity to rely on DXE IPL to create all these > restricted mappings, and invent something completely new just to remap > the DXE core text and data sections RO / XP. And note that, for arm64, > this should occur before the code is actually called, since the > restricted mode we would like to enable for EDK2 does not permit > memory that is both writable and executable at all. > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103610): https://edk2.groups.io/g/devel/message/103610 Mute This Topic: https://groups.io/mt/98466782/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 0/5] refine Smm range code in BoardX58Ich10
In BoardX58Ich10 platform, two modules has hard-code about how SMM range should be, and this causes a issue since PEI phase may change SMM ranges now. This patch set refine Smm range related code. v2 refine comments and commit message Zhiguang Liu (5): SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect SimicsOpenBoardPkg: Use SmmAccessLib instead of SmmAccessPei.inf SimicsOpenBoardPkg: Use another SmmAccess Driver SimicsX58SktPkg: Remove unused Smm related modules .../BoardX58Ich10/OpenBoardPkg.dsc| 11 +- .../BoardX58Ich10/OpenBoardPkg.fdf| 3 +- .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 136 +++ .../SimicsPei/SimicsPei.inf | 5 +- .../SimicsX58SktPkg/SktUefiBootInclude.fdf| 4 +- .../Smm/Access/SmmAccess2Dxe.c| 148 .../Smm/Access/SmmAccess2Dxe.inf | 54 --- .../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 346 -- .../Smm/Access/SmmAccessPei.inf | 65 .../Smm/Access/SmramInternal.c| 200 -- .../Smm/Access/SmramInternal.h| 82 - 11 files changed, 79 insertions(+), 975 deletions(-) delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103611): https://edk2.groups.io/g/devel/message/103611 Mute This Topic: https://groups.io/mt/98509462/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/5] SimicsOpenBoardPkg: Build gEfiSmmSmramMemoryGuid Hob in S3 path
gEfiSmmSmramMemoryGuid Hob is needed for SmmRelocation feature
even for S3 path. So in MemDetect.c, remove specical code path
for S3 about creating gEfiSmmSmramMemoryGuid Hob and adding some
memory descriptor, which does no harm in S3 path.
Cc: Nate DeSimone
Cc: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 119 --
1 file changed, 53 insertions(+), 66 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index 127afffc00..b79e8eb73a 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -1,7 +1,7 @@
/** @file
Memory Detection for Virtual Machines.
- Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2023 Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -405,79 +405,66 @@ QemuInitializeRam (
LowerMemorySize = GetSystemMemorySizeBelow4gb ();
UpperMemorySize = GetSystemMemorySizeAbove4gb ();
- if (mBootMode == BOOT_ON_S3_RESUME) {
-//
-// Create the following memory HOB as an exception on the S3 boot path.
-//
-// Normally we'd create memory HOBs only on the normal boot path. However,
-// CpuMpPei specifically needs such a low-memory HOB on the S3 path as
-// well, for "borrowing" a subset of it temporarily, for the AP startup
-// vector.
-//
-// CpuMpPei saves the original contents of the borrowed area in permanent
-// PEI RAM, in a backup buffer allocated with the normal PEI services.
-// CpuMpPei restores the original contents ("returns" the borrowed area) at
-// End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before
-// transferring control to the OS's wakeup vector in the FACS.
-//
-// We expect any other PEIMs that "borrow" memory similarly to CpuMpPei to
-// restore the original contents. Furthermore, we expect all such PEIMs
-// (CpuMpPei included) to claim the borrowed areas by producing memory
-// allocation HOBs, and to honor preexistent memory allocation HOBs when
-// looking for an area to borrow.
-//
-AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
- } else {
-//
-// Create memory HOBs
-//
-AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
+ //
+ // CpuMpPei saves the original contents of the borrowed area in permanent
+ // PEI RAM, in a backup buffer allocated with the normal PEI services.
+ // CpuMpPei restores the original contents ("returns" the borrowed area) at
+ // End-of-PEI. End-of-PEI in turn is emitted by S3Resume2Pei before
+ // transferring control to the OS's wakeup vector in the FACS.
+ //
+ // We expect any other PEIMs that "borrow" memory similarly to CpuMpPei to
+ // restore the original contents. Furthermore, we expect all such PEIMs
+ // (CpuMpPei included) to claim the borrowed areas by producing memory
+ // allocation HOBs, and to honor preexistent memory allocation HOBs when
+ // looking for an area to borrow.
+ //
+ AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
-if (FeaturePcdGet (PcdSmmSmramRequire)) {
- UINT32 TsegSize;
+ if (FeaturePcdGet (PcdSmmSmramRequire)) {
+UINT32 TsegSize;
- TsegSize = mX58TsegMbytes * SIZE_1MB;
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
- AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
-TRUE);
+TsegSize = mX58TsegMbytes * SIZE_1MB;
+AddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
+AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
+ TRUE);
- BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
- SmramRanges = 1;
+BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
+SmramRanges = 1;
- Hob.Raw = BuildGuidHob(
- &gEfiSmmSmramMemoryGuid,
- BufferSize
- );
- ASSERT(Hob.Raw);
-
- SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
- SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
-
- SmramIndex = 0;
- for (Index = 0; Index < SmramRanges; Index++) {
-//
-// This is an SMRAM range, create an SMRAM descriptor
-//
-SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
LowerMemorySize - TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
LowerMemorySize - TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize =
TsegSize;
-SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
EFI_SMRAM_CLOSED | EFI_CACHEABLE;
-SmramIndex++;
- }
+Hob.Raw = BuildGuidHob(
+&gEfiSmmSmramMemoryGuid,
+BufferSize
+);
+ASSERT(Hob.Raw);
-} else {
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
-}
+SmramHobDescriptorBlock =
[edk2-devel] [PATCH v2 2/5] SimicsOpenBoardPkg: Move AcpiVariableGuid hob to MemDetect
Currently, MemDetect create gEfiSmmSmramMemoryGuid Hob containing one
descriptor, which should be updated later, when AcpiVariableGuid hob
use some buffer from SmRam. However, the Hob doesn't get updated, and
this is a bug.
Move the logic creating AcpiVariableGuid hob from PEIM SmmAccessPei.inf
to MemDetect, so that in the same file, it has both knowleage about
the smmram and the acpi data structure. So it can create the
gEfiSmmSmramMemoryGuid Hob containing two descriptors.
Cc: Nate DeSimone
Cc: Ray Ni
Reviewed-by: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 36 +++
.../SimicsPei/SimicsPei.inf | 3 +-
.../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 10 +-
.../Smm/Access/SmmAccessPei.inf | 5 +--
4 files changed, 25 insertions(+), 29 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index b79e8eb73a..5da8ef80b2 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -391,11 +391,10 @@ QemuInitializeRam (
UINT64 LowerMemorySize;
UINT64 UpperMemorySize;
UINTN BufferSize;
- UINT8 SmramIndex;
UINT8 SmramRanges;
EFI_PEI_HOB_POINTERS Hob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK*SmramHobDescriptorBlock;
- UINT8 Index;
+ VOID *GuidHob;
DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));
@@ -428,8 +427,8 @@ QemuInitializeRam (
AddReservedMemoryBaseSizeHob (LowerMemorySize - TsegSize, TsegSize,
TRUE);
-BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
-SmramRanges = 1;
+SmramRanges = 2;
+BufferSize = sizeof(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (SmramRanges - 1) *
sizeof(EFI_SMRAM_DESCRIPTOR);
Hob.Raw = BuildGuidHob(
&gEfiSmmSmramMemoryGuid,
@@ -440,18 +439,25 @@ QemuInitializeRam (
SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
-SmramIndex = 0;
-for (Index = 0; Index < SmramRanges; Index++) {
- //
- // This is an SMRAM range, create an SMRAM descriptor
- //
- SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalStart =
LowerMemorySize - TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].CpuStart =
LowerMemorySize - TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].PhysicalSize = TsegSize;
- SmramHobDescriptorBlock->Descriptor[SmramIndex].RegionState =
EFI_SMRAM_CLOSED | EFI_CACHEABLE;
- SmramIndex++;
-}
+//
+// Create first SMRAM descriptor, which contains data structures used in
S3 resume.
+// One page is enough for the data structure
+//
+SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = LowerMemorySize -
TsegSize;
+SmramHobDescriptorBlock->Descriptor[0].CpuStart = LowerMemorySize -
TsegSize;
+SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE | EFI_ALLOCATED;
+GuidHob = BuildGuidHob (&gEfiAcpiVariableGuid,
sizeof(EFI_SMRAM_DESCRIPTOR));
+ASSERT (GuidHob != NULL);
+CopyMem (GuidHob, &SmramHobDescriptorBlock->Descriptor[0],
sizeof(EFI_SMRAM_DESCRIPTOR));
+//
+// Create second SMRAM descriptor, which is free and will be used by SMM
foundation.
+//
+SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].CpuStart =
SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].PhysicalSize = TsegSize -
EFI_PAGE_SIZE;
+SmramHobDescriptorBlock->Descriptor[1].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE;
} else {
AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index 710fa680be..9a85ccb962 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -2,7 +2,7 @@
# Platform PEI driver
#
# This module provides platform specific function to detect boot mode.
-# Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2023 Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -40,6 +40,7 @@
[Guids]
gEfiMemoryTypeInformationGuid
gEfiSmmSmramMemoryGuid ## CONSUMES
+ gEfiAcpiVariableGuid
[LibraryClasses]
BaseLib
[edk2-devel] [PATCH v2 3/5] SimicsOpenBoardPkg: Use SmmAccessLib instead of SmmAccessPei.inf
SmmAccessPei.inf is a PEIM we should delete, here is the reason:
1. It programs registers MCH_TOLUD to set the Low Usable DRAM,
but reading LMCH_TOLUD always return zero in QSP platforms
2. It programs/reads MCH_TSEGMB to implement some Smm Access service
such as open/close/lock. However, this reading LMCH_TOLUD also always
return zero in QSP platforms
3. It returns the hard-code Smm range information. However, there are
two improper things about this. One is that we already have the hard
code value about T-Seg base/size in MemDetect. The other Smm range
information is already saved in gEfiSmmSmramMemoryGuid Hob. No need
hard-code value.
So, this patch uses another way, calling PeiInstallSmmAccessPpi from
SmmAccessLib. The lib instance we choose will use the
gEfiSmmSmramMemoryGuid Hob information.
In a word, with the patch, we can avoid additional hard-code, and
avoid programing unimplemented registers.
Cc: Nate DeSimone
Cc: Ray Ni
Reviewed-by: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc| 9 ++---
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf| 3 +--
Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 9 +
.../Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf | 2 ++
4 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 7b98baf764..ae6f980a68 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -1,7 +1,7 @@
## @file
# The main build description file for the X58Ich10 board.
#
-# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2023, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -142,6 +142,7 @@
# Silicon Package
#
ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf
+
SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf
#
# Platform Package
@@ -190,12 +191,6 @@
###
# Silicon Initialization Package
###
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
- $(SKT_PKG)/Smm/Access/SmmAccessPei.inf {
-
- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
- }
-!endif
#
# Platform Package
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 221706ae03..94f4ead826 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -1,6 +1,6 @@
## @file
#
-# Copyright (c) 2019 Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2023 Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -165,7 +165,6 @@ INF
MinPlatformPkg/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMem.inf
!include MinPlatformPkg/Include/Fdf/CoreSecurityPostMemoryInclude.fdf
INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
-INF $(SKT_PKG)/Smm/Access/SmmAccessPei.inf
# S3 SMM PEI driver
#INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index 5da8ef80b2..b1df1c2ef2 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
@@ -482,6 +483,8 @@ InitializeRamRegions (
VOID
)
{
+ EFI_STATUS Status;
+
QemuInitializeRam ();
if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {
@@ -554,4 +557,10 @@ InitializeRamRegions (
);
}
}
+
+ //
+ // Install EFI_PEI_MM_ACCESS_PPI for S3 resume case
+ //
+ Status = PeiInstallSmmAccessPpi ();
+ ASSERT_EFI_ERROR (Status);
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
index 9a85ccb962..9f5f8761fc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
@@ -36,6 +36,7 @@
SimicsX58SktPkg/SktPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
BoardModulePkg/BoardModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
[Guids]
gEfiMemoryTypeInformationGuid
@@ -55,6 +56,7 @@
MtrrLib
PcdLib
CmosAccessLib
+ SmmAccessLib
[Pcd]
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase
--
2.31.1.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
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[edk2-devel] [PATCH v2 4/5] SimicsOpenBoardPkg: Use another SmmAccess Driver
Because of the similar reason I mentioned in last commit, the SmmAccess2Dxe.inf driver should be deleted and the replacement will avoid hard-code and use gEfiSmmSmramMemoryGuid Hob to get Smm Range information. This can fix an existing bug. In pei phase, some module may use some SMM range, and mark this range as allocated in gEfiSmmSmramMemoryGuid Hob. In DXE phase, when loading SMM core, we should avoid using the allocated SMM range. However, because the GetCapabilities by this driver return a hard-code SMM range information, the allocated buffer is treated as free buffer and used to load SMM core. Cc: Nate DeSimone Cc: Ray Ni Signed-off-by: Zhiguang Liu --- .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 2 +- Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index ae6f980a68..f15c088d9e 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -278,7 +278,7 @@ !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE $(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf $(PCH_PKG)/Spi/Smm/PchSpiSmm.inf - $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf + IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf !endif diff --git a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf index fdcb4fb9a7..42c8408c05 100644 --- a/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf +++ b/Silicon/Intel/SimicsX58SktPkg/SktUefiBootInclude.fdf @@ -1,14 +1,14 @@ ## @file # Component description file for the Simics X58 SiPkg DXE drivers. # -# Copyright (c) 2019 Intel Corporation. All rights reserved. +# Copyright (c) 2019 - 2023 Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE - INF $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf + INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf !endif INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103615): https://edk2.groups.io/g/devel/message/103615 Mute This Topic: https://groups.io/mt/98509467/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 5/5] SimicsX58SktPkg: Remove unused Smm related modules
In last two commit, I replace the two SMM related modules, and now
no platform will use these two moduels. Remove them
Cc: Nate DeSimone
Cc: Ray Ni
Reviewed-by: Ray Ni
Signed-off-by: Zhiguang Liu
---
.../Smm/Access/SmmAccess2Dxe.c| 148
.../Smm/Access/SmmAccess2Dxe.inf | 54 ---
.../SimicsX58SktPkg/Smm/Access/SmmAccessPei.c | 338 --
.../Smm/Access/SmmAccessPei.inf | 62
.../Smm/Access/SmramInternal.c| 200 ---
.../Smm/Access/SmramInternal.h| 82 -
6 files changed, 884 deletions(-)
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.inf
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccessPei.inf
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.c
delete mode 100644 Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmramInternal.h
diff --git a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
b/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
deleted file mode 100644
index 5d3b2c14aa..00
--- a/Silicon/Intel/SimicsX58SktPkg/Smm/Access/SmmAccess2Dxe.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/** @file
- A DXE_DRIVER providing SMRAM access by producing EFI_SMM_ACCESS2_PROTOCOL.
-
- X58 TSEG is expected to have been verified and set up by the SmmAccessPei
- driver.
-
- Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-#include
-#include
-#include
-
-#include "SmramInternal.h"
-
-/**
- Opens the SMRAM area to be accessible by a boot-service driver.
-
- This function "opens" SMRAM so that it is visible while not inside of SMM.
- The function should return EFI_UNSUPPORTED if the hardware does not support
- hiding of SMRAM. The function should return EFI_DEVICE_ERROR if the SMRAM
- configuration is locked.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The operation was successful.
- @retval EFI_UNSUPPORTED The system does not support opening and closing of
-SMRAM.
- @retval EFI_DEVICE_ERROR SMRAM cannot be opened, perhaps because it is
-locked.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeOpen (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessOpen (&This->LockState, &This->OpenState);
-}
-
-/**
- Inhibits access to the SMRAM.
-
- This function "closes" SMRAM so that it is not visible while outside of SMM.
- The function should return EFI_UNSUPPORTED if the hardware does not support
- hiding of SMRAM.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The operation was successful.
- @retval EFI_UNSUPPORTED The system does not support opening and closing of
-SMRAM.
- @retval EFI_DEVICE_ERROR SMRAM cannot be closed.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeClose (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessClose (&This->LockState, &This->OpenState);
-}
-
-/**
- Inhibits access to the SMRAM.
-
- This function prohibits access to the SMRAM region. This function is usually
- implemented such that it is a write-once operation.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
-
- @retval EFI_SUCCESS The device was successfully locked.
- @retval EFI_UNSUPPORTED The system does not support locking of SMRAM.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeLock (
- IN EFI_SMM_ACCESS2_PROTOCOL *This
- )
-{
- return SmramAccessLock (&This->LockState, &This->OpenState);
-}
-
-/**
- Queries the memory controller for the possible regions that will support
- SMRAM.
-
- @param[in] This The EFI_SMM_ACCESS2_PROTOCOL instance.
- @param[in,out] SmramMapSize A pointer to the size, in bytes, of the
-SmramMemoryMap buffer.
- @param[in,out] SmramMap A pointer to the buffer in which firmware
-places the current memory map.
-
- @retval EFI_SUCCESS The chipset supported the given resource.
- @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small. The
-current buffer size needed to hold the memory
-map is returned in SmramMapSize.
-**/
-STATIC
-EFI_STATUS
-EFIAPI
-SmmAccess2DxeGetCapabilities (
- IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
- IN OUT UINTN *SmramMapSize,
- IN OUT EFI_SMRAM_DESCRIPTOR*SmramMap
- )
-{
- return SmramAccessGetCapabilities (This->LockState, This->OpenState,
- SmramMapSize, SmramMap);
-}
-
-//
-// LockState and OpenState will be fil
Re: [edk2-devel] [PATCH v1 1/2] Add the volatile keyword to NvmExpressDxe's Passthru CQs and SQs.
Thanks Oliver,
For the Submission Queue pointer "Sq", I think it is being used to format the
command that will be sent to the NVME controller.
NvmExpressPassThru() does not read back its content for checking after the
command gets submitted.
My opinion is that it might be not necessary to add volatile attribute for it.
For the Completion Queue pointer "Cq", I am not sure which of the following is
better:
a) Introduce a volatile pointer to "Cq->Pt", or
b) Mark "Cq" as volatile
Would like to get your feedback on this. Thanks.
Best Regards,
Hao Wu
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Oliver
> Smith-Denny
> Sent: Thursday, April 20, 2023 11:48 PM
> To: devel@edk2.groups.io; Ni, Ray
> Cc: Wu, Hao A ; Wang, Jian J ;
> Gao, Liming ; Michael Kubacki
> ; Sean Brogan
> Subject: Re: [edk2-devel] [PATCH v1 1/2] Add the volatile keyword to
> NvmExpressDxe's Passthru CQs and SQs.
>
> Hi Ray,
>
> This is not a pure copy from HW to SW memory, we are also polling the CQ to
> see if a transaction has completed:
>
>//
>// Wait for completion queue to get filled in.
>//
>Status = EFI_TIMEOUT;
>while (EFI_ERROR (gBS->CheckEvent (TimerEvent))) {
> if (Cq->Pt != Private->Pt[QueueId]) {
>Status = EFI_SUCCESS;
>break;
> }
>}
>
>
> What we have seen happen is that without the volatile keyword, the compiler
> can move the Cq->Pt read outside of the loop and only do register compares
> inside the loop, i.e. we end up going the full timeout even if the CQ reports
> it is
> finished.
>
> Here is the issue that was filed on the project Mu side:
> https://github.com/microsoft/mu_basecore/issues/324.
>
> Thanks,
> Oliver
>
> On 4/19/2023 5:48 PM, Ni, Ray wrote:
> > If it's to copy from hw to sw memory, why do we need volatile?
> >
> > Thanks,
> > Ray
> >
> >> -Original Message-
> >> From: devel@edk2.groups.io On Behalf Of Oliver
> >> Smith-Denny
> >> Sent: Thursday, April 20, 2023 7:41 AM
> >> To: devel@edk2.groups.io
> >> Cc: Wu, Hao A ; Ni, Ray ; Wang,
> >> Jian J ; Gao, Liming
> >> ; Michael Kubacki
> >> ; Sean Brogan
> >>
> >> Subject: [edk2-devel][PATCH v1 1/2] Add the volatile keyword to
> >> NvmExpressDxe's Passthru CQs and SQs.
> >>
> >> This updates the relevant functions that expect a non-volatile
> >>
> >> structure to be passed to them to take casts of the CQ and SQ,
> >>
> >> now that they are volatile.
> >>
> >>
> >>
> >> Cc: Hao A Wu
> >>
> >> Cc: Ray Ni
> >>
> >> Cc: Jian J Wang
> >>
> >> Cc: Liming Gao
> >>
> >> Cc: Michael Kubacki
> >>
> >> Cc: Sean Brogan
> >>
> >> Signed-off-by: Oliver Smith-Denny
> >>
> >> ---
> >>
> >> MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c | 10
> >> +-
> >>
> >> 1 file changed, 5 insertions(+), 5 deletions(-)
> >>
> >>
> >>
> >> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> >> b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> >>
> >> index f37baa626a16..1a7e39500ac0 100644
> >>
> >> --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> >>
> >> +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c
> >>
> >> @@ -459,8 +459,8 @@ NvmExpressPassThru (
> >>
> >> EFI_STATUS Status;
> >>
> >> EFI_STATUS PreviousStatus;
> >>
> >> EFI_PCI_IO_PROTOCOL*PciIo;
> >>
> >> - NVME_SQ*Sq;
> >>
> >> - NVME_CQ*Cq;
> >>
> >> + volatile NVME_SQ *Sq;
> >>
> >> + volatile NVME_CQ *Cq;
> >>
> >> UINT16 QueueId;
> >>
> >> UINT16 QueueSize;
> >>
> >> UINT32 Bytes;
> >>
> >> @@ -581,7 +581,7 @@ NvmExpressPassThru (
> >>
> >> return EFI_INVALID_PARAMETER;
> >>
> >> }
> >>
> >>
> >>
> >> - ZeroMem (Sq, sizeof (NVME_SQ));
> >>
> >> + ZeroMem ((VOID *)Sq, sizeof (NVME_SQ));
> >>
> >> Sq->Opc = (UINT8)Packet->NvmeCmd->Cdw0.Opcode;
> >>
> >> Sq->Fuse = (UINT8)Packet->NvmeCmd->Cdw0.FusedOperation;
> >>
> >> Sq->Cid = Private->Cid[QueueId]++;
> >>
> >> @@ -815,14 +815,14 @@ NvmExpressPassThru (
> >>
> >> // Dump every completion entry status for debugging.
> >>
> >> //
> >>
> >> DEBUG_CODE_BEGIN ();
> >>
> >> - NvmeDumpStatus (Cq);
> >>
> >> + NvmeDumpStatus ((NVME_CQ *)Cq);
> >>
> >> DEBUG_CODE_END ();
> >>
> >> }
> >>
> >>
> >>
> >> //
> >>
> >> // Copy the Respose Queue entry for this command to the callers
> >> response buffer
> >>
> >> //
> >>
> >> -CopyMem (Packet->NvmeCompletion, Cq, sizeof
> >> (EFI_NVM_EXPRESS_COMPLETION));
> >>
> >> +CopyMem (Packet->NvmeCompletion, (VOID *)Cq, sizeof
> >> (EFI_NVM_EXPRESS_COMPLETION));
> >>
> >> } else {
> >>
> >> //
> >>
> >> // Timeout occurs for an NVMe command. Reset the controller to
> >> abort the
> >>
> >> --
> >>
> >> 2.39.2
> >>
> >>
> >>
> >>
>
Re: [edk2-devel] [PATCH v7 0/3] RISC-V SBI-backed SerialLib
On Tue, Apr 25, 2023 at 07:26:41PM +, Andrei Warkentin wrote: > Thanks for the review. I believe this patch set is ready for merging. Sunil > had one comment on the contents of the UNI file, which I clarified. Sunil, > anything else you wanted from this patch set or is it good to go? > Hi Andrei, Please go ahead. LGTM. Thanks, Sunil -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103618): https://edk2.groups.io/g/devel/message/103618 Mute This Topic: https://groups.io/mt/98133911/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
