git: 043577b721ec - main - ofwfb: fix boot on LE

2021-03-09 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=043577b721ec4e5c2ab7571e6c05cfd54e49473c

commit 043577b721ec4e5c2ab7571e6c05cfd54e49473c
Author: Leandro Lupori 
AuthorDate: 2021-03-09 15:11:58 +
Commit: Leandro Lupori 
CommitDate: 2021-03-09 16:29:24 +

ofwfb: fix boot on LE

Some framebuffer properties obtained from the device tree were not being
properly converted to host endian.
Replace OF_getprop calls by OF_getencprop where needed to fix this.

This fixes boot on PowerPC64 LE, when using ofwfb as the system console.

Reviewed by:bdragon
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
MFC after:  1 week
Differential Revision:  https://reviews.freebsd.org/D27475
---
 sys/dev/vt/hw/ofwfb/ofwfb.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/sys/dev/vt/hw/ofwfb/ofwfb.c b/sys/dev/vt/hw/ofwfb/ofwfb.c
index 8a1b7b3688a7..9dc674c0ebf9 100644
--- a/sys/dev/vt/hw/ofwfb/ofwfb.c
+++ b/sys/dev/vt/hw/ofwfb/ofwfb.c
@@ -108,7 +108,7 @@ ofwfb_probe(struct vt_device *vd)
return (CN_DEAD);
 
node = -1;
-   if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) ==
+   if (OF_getencprop(chosen, "stdout", &stdout, sizeof(stdout)) ==
sizeof(stdout))
node = OF_instance_to_package(stdout);
if (node == -1)
@@ -386,7 +386,7 @@ ofwfb_init(struct vt_device *vd)
char buf[64];
phandle_t chosen;
phandle_t node;
-   uint32_t depth, height, width, stride;
+   pcell_t depth, height, width, stride;
uint32_t vendor_id = 0;
cell_t adr[2];
uint64_t user_phys;
@@ -399,7 +399,7 @@ ofwfb_init(struct vt_device *vd)
 
node = -1;
chosen = OF_finddevice("/chosen");
-   if (OF_getprop(chosen, "stdout", &sc->sc_handle,
+   if (OF_getencprop(chosen, "stdout", &sc->sc_handle,
sizeof(ihandle_t)) == sizeof(ihandle_t))
node = OF_instance_to_package(sc->sc_handle);
if (node == -1)
@@ -448,14 +448,14 @@ ofwfb_init(struct vt_device *vd)
return (CN_DEAD);
 
/* Only support 8 and 32-bit framebuffers */
-   OF_getprop(node, "depth", &depth, sizeof(depth));
+   OF_getencprop(node, "depth", &depth, sizeof(depth));
if (depth != 8 && depth != 32)
return (CN_DEAD);
sc->fb.fb_bpp = sc->fb.fb_depth = depth;
 
-   OF_getprop(node, "height", &height, sizeof(height));
-   OF_getprop(node, "width", &width, sizeof(width));
-   if (OF_getprop(node, "linebytes", &stride, sizeof(stride)) !=
+   OF_getencprop(node, "height", &height, sizeof(height));
+   OF_getencprop(node, "width", &width, sizeof(width));
+   if (OF_getencprop(node, "linebytes", &stride, sizeof(stride)) !=
sizeof(stride))
stride = width*depth/8;
 
@@ -537,11 +537,11 @@ ofwfb_init(struct vt_device *vd)
 * may be the child of the PCI device: in that case, try the
 * parent for the assigned-addresses property.
 */
-   len = OF_getprop(node, "assigned-addresses", pciaddrs,
-   sizeof(pciaddrs));
+   len = OF_getencprop(node, "assigned-addresses",
+   (pcell_t *)pciaddrs, sizeof(pciaddrs));
if (len == -1) {
-   len = OF_getprop(OF_parent(node), "assigned-addresses",
-   pciaddrs, sizeof(pciaddrs));
+   len = OF_getencprop(OF_parent(node), 
"assigned-addresses",
+   (pcell_t *)pciaddrs, sizeof(pciaddrs));
}
if (len == -1)
len = 0;
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git: 2f561284033c - main - [PowerPC64] Enforce natural alignment in bcopy

2021-03-25 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=2f561284033c0f53d0911baf9056078e6026a278

commit 2f561284033c0f53d0911baf9056078e6026a278
Author: Leandro Lupori 
AuthorDate: 2021-03-25 14:54:06 +
Commit: Leandro Lupori 
CommitDate: 2021-03-25 16:07:01 +

[PowerPC64] Enforce natural alignment in bcopy

POWER architecture CPUs (Book-S) require natural alignment for
cache-inhibited storage accesses. Since we can't know the caching model
for a page ahead of time, always enforce natural alignment in bcopy.
This fixes a SIGBUS when calling the function with misaligned pointers
on POWER7.

Submitted by:   Bruno Larsen 
Reviewed by:luporl, bdragon (IRC)
MFC after:  1 week
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D28776
---
 lib/libc/powerpc64/string/bcopy.S | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/lib/libc/powerpc64/string/bcopy.S 
b/lib/libc/powerpc64/string/bcopy.S
index bb860c098feb..4dc80c264362 100644
--- a/lib/libc/powerpc64/string/bcopy.S
+++ b/lib/libc/powerpc64/string/bcopy.S
@@ -34,6 +34,11 @@ __FBSDID("$FreeBSD$");
 #define BLOCK_SIZE (1 << BLOCK_SIZE_BITS)
 #define BLOCK_SIZE_MASK(BLOCK_SIZE - 1)
 
+/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults.*/
+#ifndef ALIGN_MASK
+#define ALIGN_MASK 0x7
+#endif
+
 #define MULTI_PHASE_THRESHOLD  512
 
 #ifndef FN_NAME
@@ -66,9 +71,38 @@ ENTRY(FN_NAME)
mr  %r4, %r0
 #endif
 
+   /* First check for relative alignment, if unaligned copy one byte at a 
time */
+   andi.   %r8, %r3, ALIGN_MASK
+   andi.   %r7, %r4, ALIGN_MASK
+   cmpd%r7, %r8
+   bne .Lunaligned
+
+
cmpldi  %r5, MULTI_PHASE_THRESHOLD
bge .Lmulti_phase
+   b   .Lfast_copy
+
+.Lunaligned:
+   /* forward or backward copy? */
+   cmpd%r4, %r3
+   blt .Lbackward_unaligned
+
+   /* Just need to setup increment and jump to copy */
+   li  %r0, 1
+   mtctr   %r5
+   b   .Lsingle_1_loop
+
+.Lbackward_unaligned:
+   /* advance src and dst to last byte, set decrement and jump to copy */
+   add %r3, %r3, %r5
+   addi%r3, %r3, -1
+   add %r4, %r4, %r5
+   addi%r4, %r4, -1
+   li  %r0, -1
+   mtctr   %r5
+   b   .Lsingle_1_loop
 
+.Lfast_copy:
/* align src */
cmpd%r4, %r3/* forward or backward copy? */
blt .Lbackward_align
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git: 9f50aa45be18 - main - [PowerPC64] Port optimized strcpy to PPC64LE

2021-03-25 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=9f50aa45be18b9b11b14345fe0a137d1ac51a391

commit 9f50aa45be18b9b11b14345fe0a137d1ac51a391
Author: Leandro Lupori 
AuthorDate: 2021-03-25 16:14:00 +
Commit: Leandro Lupori 
CommitDate: 2021-03-25 16:20:12 +

[PowerPC64] Port optimized strcpy to PPC64LE

Submitted by:   Bruno Larsen 
Reviewed by:luporl, bdragon (IRC)
MFC after:  1 week
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D29067
---
 lib/libc/powerpc64/string/Makefile.inc   |  7 +--
 lib/libc/powerpc64/string/strcpy_arch_2_05.S | 66 ++--
 2 files changed, 64 insertions(+), 9 deletions(-)

diff --git a/lib/libc/powerpc64/string/Makefile.inc 
b/lib/libc/powerpc64/string/Makefile.inc
index 14f0845595c9..486ca47a44be 100644
--- a/lib/libc/powerpc64/string/Makefile.inc
+++ b/lib/libc/powerpc64/string/Makefile.inc
@@ -12,12 +12,7 @@ MDSRCS+= \
memmove_resolver.c \
strncpy_arch_2_05.S \
strncpy.c \
-   strncpy_resolver.c
-
-# XXX Port strcpy to LE.
-.if ${MACHINE_ARCH} == "powerpc64"
-MDSRCS+= \
+   strncpy_resolver.c \
strcpy_arch_2_05.S \
strcpy.c \
strcpy_resolver.c
-.endif
diff --git a/lib/libc/powerpc64/string/strcpy_arch_2_05.S 
b/lib/libc/powerpc64/string/strcpy_arch_2_05.S
index 23ffb5c2a75e..7f42fd813395 100644
--- a/lib/libc/powerpc64/string/strcpy_arch_2_05.S
+++ b/lib/libc/powerpc64/string/strcpy_arch_2_05.S
@@ -26,9 +26,6 @@
  * SUCH DAMAGE.
  */
 
-#if !defined(__BIG_ENDIAN__)
-#error "Optimized SRTCPY is only supported by big-endian architecture!"
-#endif
 
 #include 
 __FBSDID("$FreeBSD$");
@@ -71,6 +68,7 @@ ENTRY(__strcpy_arch_2_05)
beq cr7,.Lcopy_dw_loop
 
addi%r8,%r8,8   /* Forward r8 to use std instruction. */
+#if defined(__BIG_ENDIAN__)
 /* Find where the zero is located. */
 .Lcheck_zero:
rldicr. %r5,%r0,0,7
@@ -136,6 +134,68 @@ ENTRY(__strcpy_arch_2_05)
 .Lfound_on_byte_0:
srdi%r6,%r0,56
stb %r6,0(%r8)
+#elif defined(__LITTLE_ENDIAN__)
+/* Find where the zero is located. */
+.Lcheck_zero:
+   andi.   %r7,%r0,0xff
+   beq .Lfound_on_byte_0
+   andi.   %r7,%r0,0xff00
+   beq .Lfound_on_byte_1
+   andis.  %r7,%r0,0xff
+   beq .Lfound_on_byte_2
+   andis.  %r7,%r0,0xff00
+   beq .Lfound_on_byte_3
+   rldicr. %r7,%r0,24,7
+   beq .Lfound_on_byte_4
+   rldicr. %r7,%r0,16,7
+   beq .Lfound_on_byte_5
+   rldicr. %r7,%r0,8,7
+   beq .Lfound_on_byte_6
+
+/* Copy the last string bytes according to the string end position. */
+.Lfound_on_byte_7:
+   std %r0,0(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_6:
+   stw %r0,0(%r8)
+   srdi%r6,%r0,32
+   sth %r6,4(%r8)
+   srdi%r6,%r0,48
+   stb %r6,6(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_5:
+   stw %r0,0(%r8)
+   srdi%r6,%r0,32
+   sth %r6,4(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_4:
+   stw %r0,0(%r8)
+   srdi%r6,%r0,32
+   stb %r6,4(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_3:
+   stw %r0,0(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_2:
+   sth %r0,0(%r8)
+   srdi%r6,%r0,16
+   stb %r6,2(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_1:
+   sth %r0,0(%r8)
+   b   .Lexit
+
+.Lfound_on_byte_0:
+   stb %r0,0(%r8)
+#else
+#error "Unable to determine Endianness"
+#endif
 .Lexit:
blr
 
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git: 3d0399c718b2 - main - [PowerPC64] Clear low-order bits of ARPN

2021-03-25 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=3d0399c718b260da087d28825069f26d4f670065

commit 3d0399c718b260da087d28825069f26d4f670065
Author: Leandro Lupori 
AuthorDate: 2021-03-25 16:30:56 +
Commit: Leandro Lupori 
CommitDate: 2021-03-25 17:01:57 +

[PowerPC64] Clear low-order bits of ARPN

PowerISA 2.07B says that the low-order p-12 bits of the real page number
contained in ARPN and LP fields of a PTE must be 0s and are ignored
by the hardware (Book III-S, 5.7.7.1), where 2^p is the actual page size
in bytes, but we were clearing only the LP field.

This worked on bare metal and QEMU with KVM, that ignore these bits,
but caused a kernel panic on QEMU with TCG, that expects them to be
cleared.

This fixes running FreeBSD with HPT superpages enabled on QEMU
with TCG.

MFC after:  2 weeks
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
---
 sys/powerpc/aim/mmu_oea64.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 14fea6f29a52..1aa05501bd1b 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -3717,7 +3717,7 @@ moea64_sp_enter(pmap_t pmap, vm_offset_t va, vm_page_t m,
pvo = pvos[i];
 
pvo->pvo_pte.prot = prot;
-   pvo->pvo_pte.pa = (pa & ~LPTE_LP_MASK) | LPTE_LP_4K_16M |
+   pvo->pvo_pte.pa = (pa & ~HPT_SP_MASK) | LPTE_LP_4K_16M |
moea64_calc_wimg(pa, pmap_page_get_memattr(m));
 
if ((flags & PMAP_ENTER_WIRED) != 0)
@@ -3874,7 +3874,7 @@ moea64_sp_promote(pmap_t pmap, vm_offset_t va, vm_page_t 
m)
for (pvo = first, va_end = PVO_VADDR(pvo) + HPT_SP_SIZE;
pvo != NULL && PVO_VADDR(pvo) < va_end;
pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo)) {
-   pvo->pvo_pte.pa &= ~LPTE_LP_MASK;
+   pvo->pvo_pte.pa &= ADDR_POFF | ~HPT_SP_MASK;
pvo->pvo_pte.pa |= LPTE_LP_4K_16M;
pvo->pvo_vaddr |= PVO_LARGE;
}
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git: 75e67b4920f2 - main - powerpc64: support superpages on pmap_mincore

2021-03-30 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=75e67b4920f2d70b98bd1383966d17d541b7c46c

commit 75e67b4920f2d70b98bd1383966d17d541b7c46c
Author: Leandro Lupori 
AuthorDate: 2021-03-30 18:54:01 +
Commit: Leandro Lupori 
CommitDate: 2021-03-30 18:54:01 +

powerpc64: support superpages on pmap_mincore

Now that superpages for HPT MMU has landed, finish implementation of
pmap_mincore by adding support for superpages.

Submitted by:   Fernando Eckhardt Valle 

Reviewed by:bdragon, luporl
MFC after:  1 week
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D29230
---
 sys/powerpc/aim/mmu_oea64.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 1aa05501bd1b..0e9b15661758 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -1400,13 +1400,15 @@ moea64_mincore(pmap_t pmap, vm_offset_t addr, 
vm_paddr_t *pap)
 
PMAP_LOCK(pmap);
 
-   /* XXX Add support for superpages */
pvo = moea64_pvo_find_va(pmap, addr);
if (pvo != NULL) {
pa = PVO_PADDR(pvo);
m = PHYS_TO_VM_PAGE(pa);
managed = (pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED;
-   val = MINCORE_INCORE;
+   if (PVO_IS_SP(pvo))
+   val = MINCORE_INCORE | MINCORE_PSIND(1);
+   else
+   val = MINCORE_INCORE;
} else {
PMAP_UNLOCK(pmap);
return (0);
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git: 28d14569c873 - main - powerpc64: add missing TLB invalidations to radix

2021-04-06 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=28d14569c8735060d0a1646a3422562c0741ac44

commit 28d14569c8735060d0a1646a3422562c0741ac44
Author: Leandro Lupori 
AuthorDate: 2021-04-06 11:31:44 +
Commit: Leandro Lupori 
CommitDate: 2021-04-06 11:31:44 +

powerpc64: add missing TLB invalidations to radix

Radix MMU code was missing TLB invalidations when some Level 3 PDEs were
modified. This caused TLB multi-hit machine check interrupts when
superpages were enabled.

Reviewed by:jhibbits
MFC after:  2 weeks
Sponsored by:   Eldorado Research Institute (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D29511
---
 sys/powerpc/aim/mmu_radix.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c
index b2500e4ec359..bb43b64febff 100644
--- a/sys/powerpc/aim/mmu_radix.c
+++ b/sys/powerpc/aim/mmu_radix.c
@@ -3184,6 +3184,7 @@ pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t 
newpde, u_int flags,
 * a reserved PT page could be freed.
 */
(void)pmap_remove_l3e(pmap, l3e, va, &free, lockp);
+   pmap_invalidate_l3e_page(pmap, va, oldl3e);
} else {
if (pmap_remove_ptes(pmap, va, va + L3_PAGE_SIZE, l3e,
&free, lockp))
@@ -3242,6 +3243,7 @@ pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t 
newpde, u_int flags,
 * be any lingering 4KB page mappings in the TLB.)
 */
pte_store(l3e, newpde);
+   ptesync();
 
atomic_add_long(&pmap_l3e_mappings, 1);
CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
@@ -4943,7 +4945,7 @@ pmap_demote_l3e_locked(pmap_t pmap, pml3_entry_t *l3e, 
vm_offset_t va,
 * the read above and the store below.
 */
pde_store(l3e, mptepa);
-   ptesync();
+   pmap_invalidate_l3e_page(pmap, trunc_2mpage(va), oldpde);
/*
 * Demote the PV entry.
 */
@@ -5224,6 +5226,7 @@ mmu_radix_remove(pmap_t pmap, vm_offset_t sva, 
vm_offset_t eva)
 */
if (sva + L3_PAGE_SIZE == va_next && eva >= va_next) {
pmap_remove_l3e(pmap, l3e, sva, &free, &lock);
+   anyvalid = true;
continue;
} else if (!pmap_demote_l3e_locked(pmap, l3e, sva,
&lock)) {
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git: 4f7c436548ea - main - powerpc64: fix radix on pseries TLB invalidation

2021-09-08 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=4f7c436548ea1cc935c4f4b237693fbe8ed7939a

commit 4f7c436548ea1cc935c4f4b237693fbe8ed7939a
Author: Leandro Lupori 
AuthorDate: 2021-09-08 11:37:11 +
Commit: Leandro Lupori 
CommitDate: 2021-09-08 11:37:11 +

powerpc64: fix radix on pseries TLB invalidation

When running in a virtualized environment, TLB invalidations can only
be performed on process scope, as only the hypervisor is allowed to
invalidate a global scope, or else a Program Interrupt is triggered.

Since we are here, also make sure that the register process table
hypercall returns success.

Reviewed by:jhibbits
MFC after:  2 weeks
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31775
---
 sys/powerpc/aim/mmu_radix.c | 27 ---
 1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c
index 8c3f6e2cf37a..50c658e58a4a 100644
--- a/sys/powerpc/aim/mmu_radix.c
+++ b/sys/powerpc/aim/mmu_radix.c
@@ -657,10 +657,10 @@ extern void bs_remap_earlyboot(void);
 #define PARTTAB_HR (1UL << 63) /* host uses radix */
 #define PARTTAB_GR (1UL << 63) /* guest uses radix must match host 
*/
 
-/* TLB flush actions. Used as argument to tlbiel_all() */
+/* TLB flush actions. Used as argument to tlbiel_flush() */
 enum {
-   TLB_INVAL_SCOPE_LPID = 0,   /* invalidate TLBs for current LPID */
-   TLB_INVAL_SCOPE_GLOBAL = 1, /* invalidate all TLBs */
+   TLB_INVAL_SCOPE_LPID = 2,   /* invalidate TLBs for current LPID */
+   TLB_INVAL_SCOPE_GLOBAL = 3, /* invalidate all TLBs */
 };
 
 #defineNPV_LIST_LOCKS  MAXCPU
@@ -758,9 +758,11 @@ tlbiel_flush_isa3(uint32_t num_sets, uint32_t is)
 * and partition table entries. Then flush the remaining sets of the
 * TLB.
 */
-   tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 0);
-   for (set = 1; set < num_sets; set++)
-   tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 0);
+   if (is == TLB_INVAL_SCOPE_GLOBAL) {
+   tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 0);
+   for (set = 1; set < num_sets; set++)
+   tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 0);
+   }
 
/* Do the same for process scoped entries. */
tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 1);
@@ -773,13 +775,10 @@ tlbiel_flush_isa3(uint32_t num_sets, uint32_t is)
 static void
 mmu_radix_tlbiel_flush(int scope)
 {
-   int is;
-
MPASS(scope == TLB_INVAL_SCOPE_LPID ||
  scope == TLB_INVAL_SCOPE_GLOBAL);
-   is = scope + 2;
 
-   tlbiel_flush_isa3(POWER9_TLB_SETS_RADIX, is);
+   tlbiel_flush_isa3(POWER9_TLB_SETS_RADIX, scope);
__asm __volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");
 }
 
@@ -2200,9 +2199,15 @@ mmu_radix_proctab_init(void)
__asm __volatile("eieio; tlbsync; ptesync" : : : "memory");
 #ifdef PSERIES
} else {
-   phyp_hcall(H_REGISTER_PROC_TBL,
+   int64_t rc;
+
+   rc = phyp_hcall(H_REGISTER_PROC_TBL,
PROC_TABLE_NEW | PROC_TABLE_RADIX | PROC_TABLE_GTSE,
proctab0pa, 0, PROCTAB_SIZE_SHIFT - 12);
+   if (rc != H_SUCCESS)
+   panic("mmu_radix_proctab_init: "
+   "failed to register process table: rc=%jd",
+   (intmax_t)rc);
 #endif
}
 
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git: a58abcde2c83 - main - powerpc64: change CAS to support Radix MMU

2021-09-15 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=a58abcde2c83b71e5bf19575750564f7bff78833

commit a58abcde2c83b71e5bf19575750564f7bff78833
Author: Leandro Lupori 
AuthorDate: 2021-09-15 18:12:37 +
Commit: Leandro Lupori 
CommitDate: 2021-09-15 18:24:40 +

powerpc64: change CAS to support Radix MMU

Use radix_mmu environment variable to select between Hash or Radix
MMU, when performing the CAS method call. This matches kernel's
behavior, by selecting Hash MMU by default and Radix if radix_mmu
is not zero, to make sure that both loader and kernel always select
the same MMU.

The device tree is queried to detect Radix/GTSE support and to
find out if CAS is supported, making the old CPU version and HV
bit checks unnecessary now.

Reviewed by:jhibbits
MFC after:  2 weeks
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31951
---
 stand/powerpc/ofw/cas.c | 120 +---
 1 file changed, 74 insertions(+), 46 deletions(-)

diff --git a/stand/powerpc/ofw/cas.c b/stand/powerpc/ofw/cas.c
index 96d276386b71..4f36a147f36d 100644
--- a/stand/powerpc/ofw/cas.c
+++ b/stand/powerpc/ofw/cas.c
@@ -29,6 +29,13 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+/* #define CAS_DEBUG */
+#ifdef CAS_DEBUG
+#define DPRINTF(fmt, ...)  printf(fmt, ## __VA_ARGS__)
+#else
+#define DPRINTF(fmt, ...)  do { ; } while (0)
+#endif
+
 /* PVR */
 #define PVR_CPU_P8E0x004b
 #define PVR_CPU_P8NVL  0x004c
@@ -83,13 +90,19 @@ __FBSDID("$FreeBSD$");
 #define OV5_INTC_XICS  0
 
 /* byte 24: MMU */
+#define OV5_MMU_INDEX  24
 #define OV5_MMU_HPT0
+#define OV5_MMU_RADIX  0x40
+#define OV5_MMU_EITHER 0x80
+#define OV5_MMU_DYNAMIC0xc0
 
 /* byte 25: HPT MMU Extensions */
-#define OV5_HPT_EXT_NONE   0
+#define OV5_HPT_EXT_INDEX  25
+#define OV5_HPT_GTSE   0x40
 
 /* byte 26: Radix MMU Extensions */
-#define OV5_RPT_EXT_NONE   0
+#define OV5_RADIX_EXT_INDEX26
+#define OV5_RADIX_GTSE 0x40
 
 
 struct pvr {
@@ -163,69 +176,84 @@ static struct ibm_arch_vec {
0,  /* DRMEM_V2 */
OV5_INTC_XICS,
OV5_MMU_HPT,
-   OV5_HPT_EXT_NONE,
-   OV5_RPT_EXT_NONE
+   0,
+   0
}
 };
 
-static __inline register_t
-mfpvr(void)
-{
-   register_t value;
-
-   __asm __volatile ("mfpvr %0" : "=r"(value));
-
-   return (value);
-}
-
-static __inline int
-ppc64_hv(void)
-{
-   int hv;
-
-   /* PSL_HV is bit 3 of 64-bit MSR */
-   __asm __volatile ("mfmsr %0\n\t"
-   "rldicl %0,%0,4,63" : "=r"(hv));
-
-   return (hv);
-}
-
 int
 ppc64_cas(void)
 {
-   int rc;
-   ihandle_t ihandle;
+   phandle_t pkg;
+   ihandle_t inst;
cell_t err;
+   uint8_t buf[16], idx, val;
+   int i, len, rc, radix_mmu;
+   const char *var;
+   char *ov5;
+
+   pkg = OF_finddevice("/chosen");
+   if (pkg == -1) {
+   printf("cas: couldn't find /chosen\n");
+   return (-1);
+   }
+
+   len = OF_getprop(pkg, "ibm,arch-vec-5-platform-support", buf,
+   sizeof(buf));
+   if (len == -1)
+   /* CAS not supported */
+   return (0);
 
-   /* Perform CAS only for POWER8 and later cores */
-   switch (mfpvr() & PVR_CPU_MASK) {
-   case PVR_CPU_P8:
-   case PVR_CPU_P8E:
-   case PVR_CPU_P8NVL:
-   case PVR_CPU_P9:
+   radix_mmu = 0;
+   ov5 = ibm_arch_vec.vec5.data;
+   for (i = 0; i < len; i += 2) {
+   idx = buf[i];
+   val = buf[i + 1];
+   DPRINTF("idx 0x%02x val 0x%02x\n", idx, val);
+
+   switch (idx) {
+   case OV5_MMU_INDEX:
+   /*
+* Note that testing for OV5_MMU_RADIX/OV5_MMU_EITHER
+* also covers OV5_MMU_DYNAMIC.
+*/
+   if ((val & OV5_MMU_RADIX) || (val & OV5_MMU_EITHER))
+   radix_mmu = 1;
break;
+
+   case OV5_RADIX_EXT_INDEX:
+   if (val & OV5_RADIX_GTSE)
+   ov5[idx] = OV5_RADIX_GTSE;
+   break;
+
+   case OV5_HPT_EXT_INDEX:
default:
-   return (0);
+   break;
+   }
}
 
-   /* Skip CAS when running on PowerNV */
-   if (ppc64_hv())
-   return (0);
+   

git: 680ca739458b - main - powerpc64: fix loader regression

2021-09-21 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=680ca739458ba8cba221ea74794c2cd9771c77f8

commit 680ca739458ba8cba221ea74794c2cd9771c77f8
Author: Leandro Lupori 
AuthorDate: 2021-09-21 20:22:42 +
Commit: Leandro Lupori 
CommitDate: 2021-09-21 20:22:42 +

powerpc64: fix loader regression

After b4cb3fe0e39a, loader started crashing on PowerPC64, with a
Program Exception (700) error. The problem was that archsw was
used before being initialized, with the new mount feature. This
change fixes the issue by initializing archsw earlier, before
setting currdev, that triggers the mount.

Reviewed by:tsoome
MFC after:  1 month
X-MFC-With: b4cb3fe0e39a
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D32027
---
 stand/powerpc/ofw/main.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/stand/powerpc/ofw/main.c b/stand/powerpc/ofw/main.c
index e705871796b1..7b1ec384b6bd 100644
--- a/stand/powerpc/ofw/main.c
+++ b/stand/powerpc/ofw/main.c
@@ -137,6 +137,17 @@ main(int (*openfirm)(void *))
  */
cons_probe();
 
+   archsw.arch_getdev = ofw_getdev;
+   archsw.arch_copyin = ofw_copyin;
+   archsw.arch_copyout = ofw_copyout;
+   archsw.arch_readin = ofw_readin;
+#ifdef CAS
+   setenv("cas", "1", 0);
+   archsw.arch_autoload = ppc64_autoload;
+#else
+   archsw.arch_autoload = ofw_autoload;
+#endif
+
/* Set up currdev variable to have hooks in place. */
env_setenv("currdev", EV_VOLATILE, "", ofw_setcurrdev, env_nounset);
 
@@ -183,17 +194,6 @@ main(int (*openfirm)(void *))
if (!(mfmsr() & PSL_DR))
setenv("usefdt", "1", 1);
 
-   archsw.arch_getdev = ofw_getdev;
-   archsw.arch_copyin = ofw_copyin;
-   archsw.arch_copyout = ofw_copyout;
-   archsw.arch_readin = ofw_readin;
-#ifdef CAS
-   setenv("cas", "1", 0);
-   archsw.arch_autoload = ppc64_autoload;
-#else
-   archsw.arch_autoload = ofw_autoload;
-#endif
-
interact(); /* doesn't return */
 
OF_exit();
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git: 76384bd10fdb - main - powerpc64: fix OFWFB with Radix MMU

2021-10-14 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=76384bd10fdbb97be2803d969905f15a84255d6a

commit 76384bd10fdbb97be2803d969905f15a84255d6a
Author: Leandro Lupori 
AuthorDate: 2021-10-14 13:39:52 +
Commit: Leandro Lupori 
CommitDate: 2021-10-14 13:39:52 +

powerpc64: fix OFWFB with Radix MMU

Current implementation of Radix MMU doesn't support mapping
arbitrary virtual addresses, such as the ones generated by
"direct mapping" I/O addresses. This caused the system to hang, when
early I/O addresses, such as those used by OpenFirmware Frame Buffer,
were remapped after the MMU was up.

To avoid having to modify mmu_radix_kenter_attr just to support this
use case, this change makes early I/O map use virtual addresses from
KVA area instead (similar to what mmu_radix_mapdev_attr does), as
these can be safely remapped later.

Reviewed by:alfredo (earlier version), jhibbits (in irc)
MFC after:  2 weeks
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31232
---
 sys/powerpc/aim/aim_machdep.c | 42 +-
 sys/powerpc/aim/mmu_radix.c   |  8 +---
 sys/powerpc/include/pmap.h|  3 +++
 sys/powerpc/powerpc/machdep.c |  9 +
 4 files changed, 46 insertions(+), 16 deletions(-)

diff --git a/sys/powerpc/aim/aim_machdep.c b/sys/powerpc/aim/aim_machdep.c
index d582489d9f7e..914296440104 100644
--- a/sys/powerpc/aim/aim_machdep.c
+++ b/sys/powerpc/aim/aim_machdep.c
@@ -476,14 +476,9 @@ aim_cpu_init(vm_offset_t toc)
 * in case the platform module had a better idea of what we
 * should do.
 */
-   if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) {
-   radix_mmu = 0;
-   TUNABLE_INT_FETCH("radix_mmu", &radix_mmu);
-   if (radix_mmu)
-   pmap_mmu_install(MMU_TYPE_RADIX, BUS_PROBE_GENERIC);
-   else
-   pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
-   } else if (cpu_features & PPC_FEATURE_64)
+   if (radix_mmu)
+   pmap_mmu_install(MMU_TYPE_RADIX, BUS_PROBE_GENERIC);
+   else if (cpu_features & PPC_FEATURE_64)
pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
else
pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);
@@ -586,6 +581,25 @@ va_to_vsid(pmap_t pm, vm_offset_t va)
 
 #endif
 
+void
+pmap_early_io_map_init(void)
+{
+   if ((cpu_features2 & PPC_FEATURE2_ARCH_3_00) == 0)
+   radix_mmu = 0;
+   else
+   TUNABLE_INT_FETCH("radix_mmu", &radix_mmu);
+
+   /*
+* When using Radix, set the start and end of kva early, to be able to
+* use KVAs on pmap_early_io_map and avoid issues when remapping them
+* later.
+*/
+   if (radix_mmu) {
+   virtual_avail = VM_MIN_KERNEL_ADDRESS;
+   virtual_end = VM_MAX_SAFE_KERNEL_ADDRESS;
+   }
+}
+
 /*
  * These functions need to provide addresses that both (a) work in real mode
  * (or whatever mode/circumstances the kernel is in in early boot (now)) and
@@ -601,10 +615,20 @@ pmap_early_io_map(vm_paddr_t pa, vm_size_t size)
 * If we have the MMU up in early boot, assume it is 1:1. Otherwise,
 * try to get the address in a memory region compatible with the
 * direct map for efficiency later.
+* Except for Radix MMU, for which current implementation doesn't
+* support mapping arbitrary virtual addresses, such as the ones
+* generated by "direct mapping" I/O addresses. In this case, use
+* addresses from KVA area.
 */
if (mfmsr() & PSL_DR)
return (pa);
-   else
+   else if (radix_mmu) {
+   vm_offset_t va;
+
+   va = virtual_avail;
+   virtual_avail += round_page(size + pa - trunc_page(pa));
+   return (va);
+   } else
return (DMAP_BASE_ADDRESS + pa);
 }
 
diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c
index 50c658e58a4a..ca1a4d2f4797 100644
--- a/sys/powerpc/aim/mmu_radix.c
+++ b/sys/powerpc/aim/mmu_radix.c
@@ -907,7 +907,7 @@ kvtopte(vm_offset_t va)
pt_entry_t *l3e;
 
l3e = pmap_pml3e(kernel_pmap, va);
-   if ((be64toh(*l3e) & RPTE_VALID) == 0)
+   if (l3e == NULL || (be64toh(*l3e) & RPTE_VALID) == 0)
return (NULL);
return (pmap_l3e_to_pte(l3e, va));
 }
@@ -2071,12 +2071,6 @@ mmu_radix_late_bootstrap(vm_offset_t start, vm_offset_t 
end)
for (i = 0; phys_avail[i + 2] != 0; i += 2)
Maxmem = MAX(Maxmem, powerpc_btop(phys_avail[i + 1]));
 
-   /*
-* Set the start and end of kva.
-*/
-   v

git: 8ecf9a8bab60 - main - powerpc64: make radix with superpages default

2021-10-14 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=8ecf9a8bab608c26cb100f393b24e883a706ff03

commit 8ecf9a8bab608c26cb100f393b24e883a706ff03
Author: Leandro Lupori 
AuthorDate: 2021-10-14 16:13:27 +
Commit: Leandro Lupori 
CommitDate: 2021-10-14 16:13:27 +

powerpc64: make radix with superpages default

As Radix MMU with superpages enabled is now stable, make it the
default choice on supported hardware (POWER9 and above), since its
performance is greater than that of HPT MMU.

Reviewed by:alfredo, jhibbits
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D30797
---
 stand/powerpc/ofw/cas.c | 6 +++---
 sys/powerpc/aim/aim_machdep.c   | 4 +++-
 sys/powerpc/powerpc/pmap_dispatch.c | 2 +-
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/stand/powerpc/ofw/cas.c b/stand/powerpc/ofw/cas.c
index 4f36a147f36d..6292e04794a8 100644
--- a/stand/powerpc/ofw/cas.c
+++ b/stand/powerpc/ofw/cas.c
@@ -232,10 +232,10 @@ ppc64_cas(void)
}
}
 
-   if (radix_mmu && (var = getenv("radix_mmu")) != NULL && var[0] != '0')
-   ov5[OV5_MMU_INDEX] = OV5_MMU_RADIX;
-   else
+   if ((var = getenv("radix_mmu")) != NULL && var[0] == '0')
radix_mmu = 0;
+   if (radix_mmu)
+   ov5[OV5_MMU_INDEX] = OV5_MMU_RADIX;
 
inst = OF_open("/");
if (inst == -1) {
diff --git a/sys/powerpc/aim/aim_machdep.c b/sys/powerpc/aim/aim_machdep.c
index 914296440104..c5f84675ebd3 100644
--- a/sys/powerpc/aim/aim_machdep.c
+++ b/sys/powerpc/aim/aim_machdep.c
@@ -586,8 +586,10 @@ pmap_early_io_map_init(void)
 {
if ((cpu_features2 & PPC_FEATURE2_ARCH_3_00) == 0)
radix_mmu = 0;
-   else
+   else {
+   radix_mmu = 1;
TUNABLE_INT_FETCH("radix_mmu", &radix_mmu);
+   }
 
/*
 * When using Radix, set the start and end of kva early, to be able to
diff --git a/sys/powerpc/powerpc/pmap_dispatch.c 
b/sys/powerpc/powerpc/pmap_dispatch.c
index 5a47b6d8bf31..8aa09811c95b 100644
--- a/sys/powerpc/powerpc/pmap_dispatch.c
+++ b/sys/powerpc/powerpc/pmap_dispatch.c
@@ -83,7 +83,7 @@ int vm_level_0_order = 9;
 
 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
 
-int superpages_enabled = 0;
+int superpages_enabled = 1;
 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled, CTLFLAG_RDTUN,
 &superpages_enabled, 0, "Enable support for transparent superpages");
 



git: f83288645cd9 - main - powerpc64le: stand fixes

2021-10-20 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=f83288645cd9726c24ca67292fbc3abb4eb65a36

commit f83288645cd9726c24ca67292fbc3abb4eb65a36
Author: Leandro Lupori 
AuthorDate: 2021-10-20 18:48:33 +
Commit: Leandro Lupori 
CommitDate: 2021-10-20 18:48:33 +

powerpc64le: stand fixes

Fix boot1 and loader on PowerPC64 little-endian (LE).

Due to endian issues, boot1 couldn't find the UFS boot partition
and loader wasn't able to load the kernel. Most of the issues
happened because boot1 and loader were BE binaries trying to access
LE UFS partitions and because loader expects the kernel ELF image
to use the same endian as itself.

To fix these issues, boot1 and loader are now built as LE binaries
on PPC64LE. To support this, the functions that call OpenFirmware
were enhanced to correctly perform endian conversion on its input
and output arguments and to change the CPU into BE mode before
making the calls, as OpenFirmware always runs in BE. Besides that,
some other small fixes were needed.

Submitted by:   bdragon (initial version)
Reviewed by:alfredo, jhibbits
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D32160
---
 stand/common/load_elf.c  |  18 --
 stand/defs.mk|   8 +-
 stand/libofw/openfirm.c  | 344 +++
 stand/libofw/openfirm.h  |   7 +-
 stand/powerpc/Makefile   |   6 +-
 stand/powerpc/boot1.chrp/boot1.c | 102 ++-
 stand/powerpc/ofw/Makefile   |  14 +-
 stand/powerpc/ofw/cas.c  |  14 +-
 stand/powerpc/ofw/ldscript.powerpcle | 142 +++
 stand/powerpc/ofw/main.c |  37 +++-
 stand/powerpc/ofw/ofwfdt.c   |   7 +-
 stand/powerpc/ofw/trampolineLE.S |  71 
 12 files changed, 525 insertions(+), 245 deletions(-)

diff --git a/stand/common/load_elf.c b/stand/common/load_elf.c
index c163b50c9737..a213b34970f0 100644
--- a/stand/common/load_elf.c
+++ b/stand/common/load_elf.c
@@ -750,13 +750,6 @@ __elfN(loadimage)(struct preloaded_file *fp, elf_file_t 
ef, uint64_t off)
}
 #endif
size = shdr[i].sh_size;
-#if defined(__powerpc__)
-  #if __ELF_WORD_SIZE == 64
-   size = htobe64(size);
-  #else
-   size = htobe32(size);
-  #endif
-#endif
 
archsw.arch_copyin(&size, lastaddr, sizeof(size));
lastaddr += sizeof(size);
@@ -802,17 +795,6 @@ __elfN(loadimage)(struct preloaded_file *fp, elf_file_t 
ef, uint64_t off)
printf("]");
 #endif
 
-#if defined(__powerpc__)
-  /* On PowerPC we always need to provide BE data to the kernel */
-  #if __ELF_WORD_SIZE == 64
-   ssym = htobe64((uint64_t)ssym);
-   esym = htobe64((uint64_t)esym);
-  #else
-   ssym = htobe32((uint32_t)ssym);
-   esym = htobe32((uint32_t)esym);
-  #endif
-#endif
-
file_addmetadata(fp, MODINFOMD_SSYM, sizeof(ssym), &ssym);
file_addmetadata(fp, MODINFOMD_ESYM, sizeof(esym), &esym);
 
diff --git a/stand/defs.mk b/stand/defs.mk
index aee4636985ac..765fd046a879 100644
--- a/stand/defs.mk
+++ b/stand/defs.mk
@@ -120,10 +120,12 @@ CFLAGS+= -DLOADER_DISK_SUPPORT
 
 # Machine specific flags for all builds here
 
-# Ensure PowerPC64 and PowerPC64LE boot loaders are compiled as 32 bit
-# and in big endian.
-.if ${MACHINE_ARCH:Mpowerpc64*} != ""
+# Ensure PowerPC64 and PowerPC64LE boot loaders are compiled as 32 bit.
+# PowerPC64LE boot loaders are 32-bit little-endian.
+.if ${MACHINE_ARCH} == "powerpc64"
 CFLAGS+=   -m32 -mcpu=powerpc -mbig-endian
+.elif ${MACHINE_ARCH} == "powerpc64le"
+CFLAGS+=   -m32 -mcpu=powerpc -mlittle-endian
 .endif
 
 # For amd64, there's a bit of mixed bag. Some of the tree (i386, lib*32) is
diff --git a/stand/libofw/openfirm.c b/stand/libofw/openfirm.c
index 0b4198d281fd..b2b89581ae70 100644
--- a/stand/libofw/openfirm.c
+++ b/stand/libofw/openfirm.c
@@ -58,6 +58,8 @@
 #include 
 __FBSDID("$FreeBSD$");
 
+#include 
+
 #include 
 
 #include 
@@ -71,6 +73,13 @@ ihandle_t mmu;
 ihandle_t memory;
 int  real_mode = 0;
 
+#define IN(x)  htobe32((cell_t)x)
+#define OUT(x) be32toh(x)
+#define SETUP(a, b, c, d)  \
+   a.name = IN( (b) ); \
+   a.nargs = IN( (c) );\
+   a.nreturns = IN( (d) );
+
 /* Initialiser */
 
 void
@@ -117,16 +126,13 @@ OF_test(char *name)
cell_t nreturns;
cell_t service;
cell_t missing;
-   } args = {
-   (cell_t)"test",
-   1,
-   1,
-   };
+   } args = {};
+   SETUP(args, "test", 1, 1);
 
-   args.service = (cell_t)nam

git: a23e18ea5456 - main - powerpc64: tell kernel when radix is not available

2021-10-22 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=a23e18ea545675aca7551ef2395f6df40a3acb29

commit a23e18ea545675aca7551ef2395f6df40a3acb29
Author: Leandro Lupori 
AuthorDate: 2021-10-22 16:44:21 +
Commit: Leandro Lupori 
CommitDate: 2021-10-22 16:44:21 +

powerpc64: tell kernel when radix is not available

If CAS detects that radix is not supported, set radix_mmu to 0
to avoid the kernel trying to use it and panic.

MFC after:  2 weeks
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
---
 stand/powerpc/ofw/cas.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/stand/powerpc/ofw/cas.c b/stand/powerpc/ofw/cas.c
index 0a12f31d1a1a..e95af42762a5 100644
--- a/stand/powerpc/ofw/cas.c
+++ b/stand/powerpc/ofw/cas.c
@@ -234,9 +234,15 @@ ppc64_cas(void)
}
}
 
-   if ((var = getenv("radix_mmu")) != NULL && var[0] == '0')
+   if (!radix_mmu)
+   /*
+* If radix is not supported, set radix_mmu to 0 to avoid
+* the kernel trying to use it and panic.
+*/
+   setenv("radix_mmu", "0", 1);
+   else if ((var = getenv("radix_mmu")) != NULL && var[0] == '0')
radix_mmu = 0;
-   if (radix_mmu)
+   else
ov5[OV5_MMU_INDEX] = OV5_MMU_RADIX;
 
inst = OF_open("/");



git: 4a66b8083cc6 - main - powerpc: fix boot on pseries without hugepages

2021-06-02 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=4a66b8083cc61e89ffdddaae876d882950d6aade

commit 4a66b8083cc61e89ffdddaae876d882950d6aade
Author: Leandro Lupori 
AuthorDate: 2021-06-02 19:10:57 +
Commit: Leandro Lupori 
CommitDate: 2021-06-02 19:27:36 +

powerpc: fix boot on pseries without hugepages

Commit 49c894ddced5 introduced an issue that prevented pseries boot,
when hugepages were not available to the guest. Now large page
info must be available before moea64_install is called, so this change
moves the code that scans large page sizes before the call.

Reviewed by:jhibbits (IRC)
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
---
 sys/powerpc/pseries/mmu_phyp.c | 83 +-
 1 file changed, 42 insertions(+), 41 deletions(-)

diff --git a/sys/powerpc/pseries/mmu_phyp.c b/sys/powerpc/pseries/mmu_phyp.c
index d94fb2aa5ae1..5769f0db5572 100644
--- a/sys/powerpc/pseries/mmu_phyp.c
+++ b/sys/powerpc/pseries/mmu_phyp.c
@@ -106,6 +106,7 @@ static struct moea64_funcs mmu_phyp_funcs = {
 MMU_DEF_INHERIT(pseries_mmu, "mmu_phyp", mphyp_methods, oea64_mmu);
 
 static int brokenkvm = 0;
+static uint64_t final_pteg_count = 0;
 
 static void
 print_kvm_bug_warning(void *data)
@@ -125,48 +126,32 @@ SYSINIT(kvmbugwarn2, SI_SUB_LAST, SI_ORDER_THIRD + 1, 
print_kvm_bug_warning,
 static void
 mphyp_install()
 {
-
-   moea64_ops = &mmu_phyp_funcs;
-
-   moea64_install();
-}
-
-static void
-mphyp_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend)
-{
-   uint64_t final_pteg_count = 0;
char buf[8];
uint32_t prop[2];
uint32_t nptlp, shift = 0, slb_encoding = 0;
uint32_t lp_size, lp_encoding;
-   struct lpte old;
-   uint64_t vsid;
phandle_t dev, node, root;
int idx, len, res;
bool has_lp;
 
-   rm_init(&mphyp_eviction_lock, "pte eviction");
-
-   moea64_early_bootstrap(kernelstart, kernelend);
-
root = OF_peer(0);
 
-dev = OF_child(root);
+   dev = OF_child(root);
while (dev != 0) {
-res = OF_getprop(dev, "name", buf, sizeof(buf));
-if (res > 0 && strcmp(buf, "cpus") == 0)
-break;
-dev = OF_peer(dev);
-}
+   res = OF_getprop(dev, "name", buf, sizeof(buf));
+   if (res > 0 && strcmp(buf, "cpus") == 0)
+   break;
+   dev = OF_peer(dev);
+   }
 
node = OF_child(dev);
 
while (node != 0) {
-res = OF_getprop(node, "device_type", buf, sizeof(buf));
-if (res > 0 && strcmp(buf, "cpu") == 0)
-break;
-node = OF_peer(node);
-}
+   res = OF_getprop(node, "device_type", buf, sizeof(buf));
+   if (res > 0 && strcmp(buf, "cpu") == 0)
+   break;
+   node = OF_peer(node);
+   }
 
res = OF_getencprop(node, "ibm,pft-size", prop, sizeof(prop));
if (res <= 0)
@@ -177,20 +162,6 @@ mphyp_bootstrap(vm_offset_t kernelstart, vm_offset_t 
kernelend)
n_slbs = prop[0];
dprintf0("slb-size=%i\n", n_slbs);
 
-   moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
-
-   /* Clear any old page table entries */
-   for (idx = 0; idx < moea64_pteg_count*8; idx++) {
-   phyp_pft_hcall(H_READ, 0, idx, 0, 0, &old.pte_hi,
-   &old.pte_lo, &old.pte_lo);
-   vsid = (old.pte_hi << (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) >> 28;
-   if (vsid == VSID_VRMA || vsid == 0 /* Older VRMA */)
-   continue;
-   
-   if (old.pte_hi & LPTE_VALID)
-   phyp_hcall(H_REMOVE, 0, idx, 0);
-   }
-
/*
 * Scan the large page size property for PAPR compatible machines.
 * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties'
@@ -264,6 +235,36 @@ mphyp_bootstrap(vm_offset_t kernelstart, vm_offset_t 
kernelend)
}
}
 
+   moea64_ops = &mmu_phyp_funcs;
+
+   moea64_install();
+}
+
+static void
+mphyp_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend)
+{
+   struct lpte old;
+   uint64_t vsid;
+   int idx;
+
+   rm_init(&mphyp_eviction_lock, "pte eviction");
+
+   moea64_early_bootstrap(kernelstart, kernelend);
+
+   moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
+
+   /* Clear any old page table entries */
+   for (idx = 0; idx < moea64_pteg_count*8; idx++) {
+   phyp_pft_hcall(H_READ, 0, idx, 0, 0, &

git: 9c2c6353193b - main - aacraid: reduce max I/O size to avoid DMA issues

2021-06-21 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=9c2c6353193b53deb33c2a06a2648b364f8b

commit 9c2c6353193b53deb33c2a06a2648b364f8b
Author: Leandro Lupori 
AuthorDate: 2021-06-21 18:04:43 +
Commit: Leandro Lupori 
CommitDate: 2021-06-21 18:04:43 +

aacraid: reduce max I/O size to avoid DMA issues

Reserve one page for the DMA subsystem, that may need it when the I/O
buffer is not page aligned.

Without this change, writes with the maximum allowed size failed, if:
- physical memory was fragmented, making it necessary to use one DMA
  segment for each page
- the buffer to be written was not page aligned, causing the DMA
  subsystem to need one extra segment

In the scenario above, the DMA subsystem would run out of segments,
resulting in a write with no SG segments, that would fail.

Reviewed by:imp
MFC after:  2 weeks
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D30798
---
 sys/dev/aacraid/aacraid.c | 4 ++--
 sys/dev/aacraid/aacraid_cam.c | 2 +-
 sys/dev/aacraid/aacraid_var.h | 8 
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/sys/dev/aacraid/aacraid.c b/sys/dev/aacraid/aacraid.c
index 65c585269b78..51a633e70515 100644
--- a/sys/dev/aacraid/aacraid.c
+++ b/sys/dev/aacraid/aacraid.c
@@ -579,7 +579,7 @@ aac_alloc(struct aac_softc *sc)
   BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
   BUS_SPACE_MAXADDR,   /* highaddr */
   NULL, NULL,  /* filter, filterarg */
-  sc->aac_max_sectors << 9, /* maxsize */
+  AAC_MAXIO_SIZE(sc),  /* maxsize */
   sc->aac_sg_tablesize,/* nsegments */
   BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
   BUS_DMA_ALLOCNOW,/* flags */
@@ -1807,7 +1807,7 @@ aac_init(struct aac_softc *sc)
}
 
ip->MaxIoCommands = sc->aac_max_fibs;
-   ip->MaxIoSize = sc->aac_max_sectors << 9;
+   ip->MaxIoSize = AAC_MAXIO_SIZE(sc);
ip->MaxFibSize = sc->aac_max_fib_size;
 
aac_adapter_init_tole(ip);
diff --git a/sys/dev/aacraid/aacraid_cam.c b/sys/dev/aacraid/aacraid_cam.c
index 48da7e8d757f..9c73248472bd 100644
--- a/sys/dev/aacraid/aacraid_cam.c
+++ b/sys/dev/aacraid/aacraid_cam.c
@@ -1011,7 +1011,7 @@ aac_cam_action(struct cam_sim *sim, union ccb *ccb)
cpi->max_lun = 7;   /* Per the controller spec */
cpi->initiator_id = camsc->inf->InitiatorBusId;
cpi->bus_id = camsc->inf->BusNumber;
-   cpi->maxio = sc->aac_max_sectors << 9;
+   cpi->maxio = AAC_MAXIO_SIZE(sc);
 
/*
 * Resetting via the passthrough or parallel bus scan
diff --git a/sys/dev/aacraid/aacraid_var.h b/sys/dev/aacraid/aacraid_var.h
index 4fed21b1356b..bbafdafb8840 100644
--- a/sys/dev/aacraid/aacraid_var.h
+++ b/sys/dev/aacraid/aacraid_var.h
@@ -470,6 +470,14 @@ struct aac_softc
u_int32_t   FwDebugBufferSize;  /* FW Debug Buffer size */  
 };
 
+/*
+ * Max. I/O size in bytes.
+ * Reserve one page for the DMA subsystem, that may need it when the
+ * I/O buffer is not page aligned.
+ */
+#define AAC_MAXIO_SIZE(sc) MIN(((sc)->aac_max_sectors << 9) - PAGE_SIZE, \
+   maxphys)
+
 /*
  * Event callback mechanism for the driver
  */
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git: 71fd1bfd5ed5 - main - aacraid: ignore data overrun on INQUIRY

2021-06-21 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=71fd1bfd5ed5fdc316600a0b425d81844c021e9b

commit 71fd1bfd5ed5fdc316600a0b425d81844c021e9b
Author: Leandro Lupori 
AuthorDate: 2021-06-21 18:13:13 +
Commit: Leandro Lupori 
CommitDate: 2021-06-21 18:13:13 +

aacraid: ignore data overrun on INQUIRY

The INQUIRY command may return a CAM_DATA_RUN_ERR code, even when
it succeeds. This happens during driver startup, causing the
current and further inquiries to be aborted, resulting in some
missing information about the controller.

Reviewed by:imp
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D30843
---
 sys/dev/aacraid/aacraid_cam.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/sys/dev/aacraid/aacraid_cam.c b/sys/dev/aacraid/aacraid_cam.c
index 9c73248472bd..a44833863891 100644
--- a/sys/dev/aacraid/aacraid_cam.c
+++ b/sys/dev/aacraid/aacraid_cam.c
@@ -1205,6 +1205,12 @@ aac_cam_complete(struct aac_command *cm)
command = ccb->csio.cdb_io.cdb_bytes[0];
 
if (command == INQUIRY) {
+   /* Ignore Data Overrun errors on INQUIRY */
+   if ((ccb->ccb_h.status & CAM_STATUS_MASK) ==
+   CAM_DATA_RUN_ERR)
+   ccb->ccb_h.status = (ccb->ccb_h.status &
+   ~CAM_STATUS_MASK) | CAM_REQ_CMP;
+
if (ccb->ccb_h.status == CAM_REQ_CMP) {
  device = ccb->csio.data_ptr[0] & 0x1f;
  /*
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Re: git: 3a60869237b8 - main - Add assembly optimized code for OpenSSL on powerpc, powerpc64 and powerpc64le

2021-11-25 Thread Leandro Lupori
On Wed, Nov 24, 2021 at 6:52 PM Piotr Kubaj  wrote:

> On 21-11-24 10:34:36, John Baldwin wrote:
> > On 11/24/21 10:24 AM, Piotr Kubaj wrote:
> > > OK, it looks like ossl uses fpu_kern functions and those are available
> only an aarch64, amd64 and i386:
> > > cc  -O2 -pipe -fno-common  -fno-strict-aliasing -Werror -D_KERNEL
> -DKLD_MODULE -nostdinc   -include
> /usr/obj/usr/src/powerpc.powerpc64/sys/modules/ossl/opt_global.h -I.
> -I/usr/src/sys -I/usr/src/sys/contrib/ck/include -fno-common  -fPIC
> -mlongcall -fno-omit-frame-pointer
> -fdebug-prefix-map=./machine=/usr/src/sys/powerpc/include -MD
> -MF.depend.ossl.o -MTossl.o -mno-altivec -msoft-float -mabi=elfv2
> -ffreestanding -fwrapv -fstack-protector -Wall -Wredundant-decls
> -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith
> -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=__freebsd_kprintf__
> -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas
> -Wno-error-tautological-compare -Wno-error-empty-body
> -Wno-error-parentheses-equality -Wno-error-unused-function
> -Wno-error-pointer-sign -Wno-error-shift-negative-value
> -Wno-address-of-packed-member -Wno-format-zero-length -std=iso9899:1999
> -c /usr/src/sys/crypto/openssl/ossl.c -o ossl.o
> > > /usr/src/sys/crypto/openssl/ossl.c:190:4: error: implicit declaration
> of function 'fpu_kern_enter' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> > >  fpu_kern_enter(curthread, NULL,
> FPU_KERN_NOCTX);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:190:36: error: use of undeclared
> identifier 'FPU_KERN_NOCTX'
> > >  fpu_kern_enter(curthread, NULL,
> FPU_KERN_NOCTX);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:193:4: error: implicit declaration
> of function 'fpu_kern_leave' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> > >  fpu_kern_leave(curthread, NULL);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:193:4: note: did you mean
> 'fpu_kern_enter'?
> > > /usr/src/sys/crypto/openssl/ossl.c:190:4: note: 'fpu_kern_enter'
> declared here
> > >  fpu_kern_enter(curthread, NULL,
> FPU_KERN_NOCTX);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:214:6: error: implicit declaration
> of function 'is_fpu_kern_thread' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> > >  if (is_fpu_kern_thread(0)) {
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:217:3: error: implicit declaration
> of function 'fpu_kern_enter' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> > >  fpu_kern_enter(curthread, NULL, FPU_KERN_NOCTX);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:217:35: error: use of undeclared
> identifier 'FPU_KERN_NOCTX'
> > >  fpu_kern_enter(curthread, NULL, FPU_KERN_NOCTX);
> > >  ^
> > > /usr/src/sys/crypto/openssl/ossl.c:263:3: error: implicit declaration
> of function 'fpu_kern_leave' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> > >  fpu_kern_leave(curthread, NULL);
> > >  ^
> > > 7 errors generated.
> > >
> > > AFAIK porting those is not easy and it's certainly above my pay grade.
> >
> > Do the powerpc instructions use additional registers that are not part
> of the normal
> > GPRs saved/restored on a context switch?  If so, then, yes, you will
> need to implement
> > something here (though the FPU_KERN_NOCTX variant is a bit simpler as it
> disables
> > context switches and it's sufficient just to init the registers and
> permit accesses
> > without raising a trap until fpu_kern_leave).  If not, then you can make
> the use of
> > those functions conditional on architecture.
>
> I guess bdragon, jhibbits, luporl or adalava would be better source of
> information.
>
> That said, after looking at
> https://community.nxp.com/t5/MPC5xxx/Example-code-for-context-switch-for-MPC56XX-PowerPC/m-p/732248/highlight/true,
> it seems like indeed registers other than GPRs are saved and restored.
>
>
> I tried looking at
> https://cgit.freebsd.org/src/diff/?id=6ed982a221e024d64dd0ab776e6197643fa1530e.
> fpu_kern_enter() and fpu_kern_leave() are quite scary :)
>
>
AFAIK, non-integer registers are also saved/restored on a context switch on
PowerPC, but only if there is an underlying user process that has used any
FPU/Altivec/VSX instruction.
I guess it will need some adjustments if the kernel itself starts using
those registers.


> >
> > > On 21-11-24 08:15:26, John Baldwin wrote:
> > >> On 11/23/21 2:27 PM, Piotr Kubaj wrote:
> > >>> The branch main has been updated by pkubaj (ports committer):
> > >>>
> > >>> URL:
> https://cgit.FreeBSD.org/src/commit/?id=3a60869237b8b315fe66497cf5299ec08b688533
> > >>>
> > >>

git: b9f3b63ab21e - main - vt: export RGB offsets with FBIO_GETRGBOFFS

2021-11-25 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=b9f3b63ab21ed5d1288de1acff511eb733201139

commit b9f3b63ab21ed5d1288de1acff511eb733201139
Author: Leandro Lupori 
AuthorDate: 2021-11-25 18:54:11 +
Commit: Leandro Lupori 
CommitDate: 2021-11-25 19:39:25 +

vt: export RGB offsets with FBIO_GETRGBOFFS

Add a new ioctl to vt to make it possible to export RGB offsets
set by vt drivers. This is needed to fix colors on X and Mesa
on some machines, especially on modern PowerPC64 BE ones.

With the appropriate changes in SCFB, to use this ioctl to find
out the correct RGB offsets, this fixes wrong colors on Talos II
and Blackbird, when used with their built-in video cards.

Reviewed by:alfredo
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D29000
---
 sys/arm/broadcom/bcm2835/bcm2835_fbd.c  |  4 ++--
 sys/arm/freescale/imx/imx51_ipuv3_fbd.c | 14 +++---
 sys/dev/vt/colors/vt_termcolors.c   | 18 +-
 sys/dev/vt/colors/vt_termcolors.h   |  6 --
 sys/dev/vt/hw/efifb/efifb.c |  2 +-
 sys/dev/vt/hw/fb/vt_early_fb.c  | 10 +-
 sys/dev/vt/hw/fb/vt_fb.c| 22 +++---
 sys/dev/vt/hw/ofwfb/ofwfb.c | 18 --
 sys/dev/vt/hw/vbefb/vbefb.c |  2 +-
 sys/dev/vt/vt_core.c|  1 +
 sys/powerpc/ps3/ps3_syscons.c   |  2 +-
 sys/sys/fbio.h  | 14 ++
 12 files changed, 76 insertions(+), 37 deletions(-)

diff --git a/sys/arm/broadcom/bcm2835/bcm2835_fbd.c 
b/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
index 93849b3551d9..c148235e5c33 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_fbd.c
@@ -137,12 +137,12 @@ bcm_fb_setup_fbd(struct bcmsc_softc *sc)
if (sc->fbswap) {
switch (sc->info.fb_bpp) {
case 24:
-   vt_generate_cons_palette(sc->info.fb_cmap,
+   vt_config_cons_colors(&sc->info,
COLOR_FORMAT_RGB, 0xff, 0, 0xff, 8, 0xff, 16);
sc->info.fb_cmsize = 16;
break;
case 32:
-   vt_generate_cons_palette(sc->info.fb_cmap,
+   vt_config_cons_colors(&sc->info,
COLOR_FORMAT_RGB, 0xff, 16, 0xff, 8, 0xff, 0);
sc->info.fb_cmsize = 16;
break;
diff --git a/sys/arm/freescale/imx/imx51_ipuv3_fbd.c 
b/sys/arm/freescale/imx/imx51_ipuv3_fbd.c
index 644664fa8aa3..be1526228bf4 100644
--- a/sys/arm/freescale/imx/imx51_ipuv3_fbd.c
+++ b/sys/arm/freescale/imx/imx51_ipuv3_fbd.c
@@ -156,22 +156,22 @@ ipu3_fb_init(struct ipu3sc_softc *sc)
 
 /* Use own color map, because of different RGB offset. */
 static int
-ipu3_fb_init_cmap(uint32_t *cmap, int bytespp)
+ipu3_fb_init_colors(struct fb_info *info)
 {
 
-   switch (bytespp) {
+   switch (info->fb_depth) {
case 8:
-   return (vt_generate_cons_palette(cmap, COLOR_FORMAT_RGB,
+   return (vt_config_cons_colors(info, COLOR_FORMAT_RGB,
0x7, 5, 0x7, 2, 0x3, 0));
case 15:
-   return (vt_generate_cons_palette(cmap, COLOR_FORMAT_RGB,
+   return (vt_config_cons_colors(info, COLOR_FORMAT_RGB,
0x1f, 10, 0x1f, 5, 0x1f, 0));
case 16:
-   return (vt_generate_cons_palette(cmap, COLOR_FORMAT_RGB,
+   return (vt_config_cons_colors(info, COLOR_FORMAT_RGB,
0x1f, 11, 0x3f, 5, 0x1f, 0));
case 24:
case 32: /* Ignore alpha. */
-   return (vt_generate_cons_palette(cmap, COLOR_FORMAT_RGB,
+   return (vt_config_cons_colors(info, COLOR_FORMAT_RGB,
0xff, 0, 0xff, 8, 0xff, 16));
default:
return (1);
@@ -303,7 +303,7 @@ ipu3_fb_attach(device_t dev)
 
sc->sc_info.fb_name = device_get_nameunit(dev);
 
-   ipu3_fb_init_cmap(sc->sc_info.fb_cmap, sc->sc_info.fb_depth);
+   ipu3_fb_init_colors(&sc->sc_info);
sc->sc_info.fb_cmsize = 16;
 
/* Ask newbus to attach framebuffer device to me. */
diff --git a/sys/dev/vt/colors/vt_termcolors.c 
b/sys/dev/vt/colors/vt_termcolors.c
index dff276a86100..fe340eeae518 100644
--- a/sys/dev/vt/colors/vt_termcolors.c
+++ b/sys/dev/vt/colors/vt_termcolors.c
@@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -152,7 +153,7 @@ vt_palette_init(void)
}
 }
 
-int
+static int
 vt_generate_cons_palette(uint32_t *palette, int format, uint32_t rmax,
 int roffset, uint32_t gmax, int goffset, uint32_t bmax, int boffset)
 {

git: e141b62d2088 - main - powerpc64le: fix boot when using QEMU PowerNV

2021-11-25 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=e141b62d208867fc5bdb5803d05f5496260722ac

commit e141b62d208867fc5bdb5803d05f5496260722ac
Author: Leandro Lupori 
AuthorDate: 2021-11-25 19:41:46 +
Commit: Leandro Lupori 
CommitDate: 2021-11-25 19:41:46 +

powerpc64le: fix boot when using QEMU PowerNV

When using QEMU PowerNV with latest op-build release (v2.7), its
kexec transfers control to FreeBSD kernel in BE mode, causing an
instant exception on LE kernels. Make kboot able to detect and
swap endian to fix this.

Reviewed by:imp
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D33104
---
 sys/powerpc/aim/locore64.S | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sys/powerpc/aim/locore64.S b/sys/powerpc/aim/locore64.S
index f0a183c4b331..3eb6e546399c 100644
--- a/sys/powerpc/aim/locore64.S
+++ b/sys/powerpc/aim/locore64.S
@@ -82,6 +82,9 @@ TOC_ENTRY(trapstk)
  */
.section ".text.kboot", "x", @progbits
 kbootentry:
+#ifdef __LITTLE_ENDIAN__
+   RETURN_TO_NATIVE_ENDIAN
+#endif
b __start
 . = kbootentry + 0x40  /* Magic address used in platform layer */
.global smp_spin_sem



git: a076e2060c07 - main - powerpc64: fix the calculation of Maxmem

2021-12-15 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=a076e2060c07307e7416759075db71f23de722c0

commit a076e2060c07307e7416759075db71f23de722c0
Author: Leandro Lupori 
AuthorDate: 2021-12-15 11:49:47 +
Commit: Leandro Lupori 
CommitDate: 2021-12-15 11:49:47 +

powerpc64: fix the calculation of Maxmem

The calculation of Maxmem was skipping the last phys_avail segment,
because of a wrong stop condition.

This was detected when using QEMU/PowerNV with Radix MMU and low
memory (2G). In this case opal_pci would allocate a DMA window that
was too small to cover all physical memory, resulting in reading all
zeroes from disk when using memory that was not inside the allocated
window.

Reviewed by:jhibbits
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D33449
MFC after:  2 weeks
---
 sys/powerpc/aim/mmu_oea64.c | 2 +-
 sys/powerpc/aim/mmu_radix.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 728f388ffb08..b3a4a225126f 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -1162,7 +1162,7 @@ moea64_late_bootstrap(vm_offset_t kernelstart, 
vm_offset_t kernelend)
 * Calculate the last available physical address.
 */
Maxmem = 0;
-   for (i = 0; phys_avail[i + 2] != 0; i += 2)
+   for (i = 0; phys_avail[i + 1] != 0; i += 2)
Maxmem = MAX(Maxmem, powerpc_btop(phys_avail[i + 1]));
 
/*
diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c
index 420a7a227c10..788bd7f22a0a 100644
--- a/sys/powerpc/aim/mmu_radix.c
+++ b/sys/powerpc/aim/mmu_radix.c
@@ -2066,7 +2066,7 @@ mmu_radix_late_bootstrap(vm_offset_t start, vm_offset_t 
end)
 * vm_page_array (upper bound).
 */
Maxmem = 0;
-   for (i = 0; phys_avail[i + 2] != 0; i += 2)
+   for (i = 0; phys_avail[i + 1] != 0; i += 2)
Maxmem = MAX(Maxmem, powerpc_btop(phys_avail[i + 1]));
 
/*



git: b48a2770d48b - main - powerpc64: add Power8 and Power9 PMCs

2021-07-26 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=b48a2770d48b9f9aa61788704897e9a2e9e10c09

commit b48a2770d48b9f9aa61788704897e9a2e9e10c09
Author: Leandro Lupori 
AuthorDate: 2021-07-23 18:09:09 +
Commit: Leandro Lupori 
CommitDate: 2021-07-26 13:27:23 +

powerpc64: add Power8 and Power9 PMCs

Add support to allocate Power8 and 9 PMCs.

Submitted by:   Leonardo Bianconi 

Reviewed by:mhorne
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31109
---
 lib/libpmc/libpmc_pmu_util.c   | 34 
 sys/dev/hwpmc/hwpmc_power8.c   | 59 +++---
 sys/dev/hwpmc/hwpmc_powerpc.c  |  3 +++
 sys/powerpc/include/pmc_mdep.h |  1 +
 4 files changed, 93 insertions(+), 4 deletions(-)

diff --git a/lib/libpmc/libpmc_pmu_util.c b/lib/libpmc/libpmc_pmu_util.c
index e6f74e6abe81..edd99357678e 100644
--- a/lib/libpmc/libpmc_pmu_util.c
+++ b/lib/libpmc/libpmc_pmu_util.c
@@ -142,6 +142,13 @@ pmu_alias_get(const char *name)
 
return (name);
 }
+#elif defined(__powerpc64__)
+
+static const char *
+pmu_alias_get(const char *name)
+{
+   return (name);
+}
 
 #elif defined(__aarch64__)
 
@@ -571,6 +578,33 @@ pmc_pmu_pmcallocate(const char *event_name, struct 
pmc_op_pmcallocate *pm)
return (pmc_pmu_amd_pmcallocate(event_name, pm, &ped));
 }
 
+#elif defined(__powerpc64__)
+
+int
+pmc_pmu_pmcallocate(const char *event_name, struct pmc_op_pmcallocate *pm)
+{
+   const struct pmu_event *pe;
+   struct pmu_event_desc ped;
+   int idx = -1;
+
+   bzero(&pm->pm_md, sizeof(pm->pm_md));
+   pm->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE);
+   event_name = pmu_alias_get(event_name);
+
+   if ((pe = pmu_event_get(NULL, event_name, &idx)) == NULL)
+   return (ENOENT);
+   if (pe->event == NULL)
+   return (ENOENT);
+   if (pmu_parse_event(&ped, pe->event))
+   return (ENOENT);
+
+   assert(ped.ped_event >= 0);
+   pm->pm_ev = idx;
+   pm->pm_md.pm_event = ped.ped_event;
+   pm->pm_class = PMC_CLASS_POWER8;
+   return (0);
+}
+
 #elif defined(__aarch64__)
 
 int
diff --git a/sys/dev/hwpmc/hwpmc_power8.c b/sys/dev/hwpmc/hwpmc_power8.c
index 7cc2ac8295f6..ce063a57a10e 100644
--- a/sys/dev/hwpmc/hwpmc_power8.c
+++ b/sys/dev/hwpmc/hwpmc_power8.c
@@ -43,6 +43,12 @@ __FBSDID("$FreeBSD$");
 
 #definePOWER8_MAX_PMCS 6
 
+#define PM_EVENT_CODE(pe)  (pe & 0x)
+#define PM_EVENT_COUNTER(pe)   ((pe >> 16) & 0x)
+
+#define PM_CYC 0x1e
+#define PM_INST_CMPL   0x02
+
 static struct pmc_ppc_event power8_event_codes[] = {
{PMC_EV_POWER8_INSTR_COMPLETED,
.pe_flags = PMC_FLAG_PMC5,
@@ -275,6 +281,54 @@ power8_resume_pmc(bool ie)
mtspr(SPR_MMCR0, mmcr0);
 }
 
+static int
+power8_allocate_pmc(int cpu, int ri, struct pmc *pm,
+   const struct pmc_op_pmcallocate *a)
+{
+   uint32_t caps, config, counter, pe;
+
+   KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
+   ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
+   KASSERT(ri >= 0 && ri < ppc_max_pmcs,
+   ("[powerpc,%d] illegal row index %d", __LINE__, ri));
+
+   pe = a->pm_md.pm_event;
+   counter = PM_EVENT_COUNTER(pe);
+   config = PM_EVENT_CODE(pe);
+
+   /*
+* PMC5 and PMC6 are not programmable and always count instructions
+* completed and cycles, respectively.
+*
+* When counter is 0 any of the 4 programmable PMCs may be used for
+* the specified event, otherwise it must match ri + 1.
+*/
+   if (counter == 0 && config == PM_INST_CMPL)
+   counter = 5;
+   else if (counter == 0 && config == PM_CYC)
+   counter = 6;
+   else if (counter > 4)
+   return (EINVAL);
+
+   if (counter != 0 && counter != ri + 1)
+   return (EINVAL);
+
+   caps = a->pm_caps;
+
+   if (caps & PMC_CAP_SYSTEM)
+   config |= POWERPC_PMC_KERNEL_ENABLE;
+   if (caps & PMC_CAP_USER)
+   config |= POWERPC_PMC_USER_ENABLE;
+   if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
+   config |= POWERPC_PMC_ENABLE;
+
+   pm->pm_md.pm_powerpc.pm_powerpc_evsel = config;
+
+   PMCDBG3(MDP,ALL,1,"powerpc-allocate cpu=%d ri=%d -> config=0x%x",
+   cpu, ri, config);
+   return (0);
+}
+
 int
 pmc_power8_initialize(struct pmc_mdep *pmc_mdep)
 {
@@ -291,7 +345,7 @@ pmc_power8_initialize(struct pmc_mdep *pmc_mdep)
 
pcd->pcd_pcpu_init  = power8_pcpu_init;
pcd->pcd_pcpu_fini  = power8_pcpu_f

git: 0f47f916811a - main - hwpmc: fix powerpc/powerpcspe builds

2021-07-26 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=0f47f916811a3cc7e5a5173a1e173442aa9ddef9

commit 0f47f916811a3cc7e5a5173a1e173442aa9ddef9
Author: Leandro Lupori 
AuthorDate: 2021-07-26 16:29:42 +
Commit: Leandro Lupori 
CommitDate: 2021-07-26 16:29:42 +

hwpmc: fix powerpc/powerpcspe builds

Fix 32-bit PowerPC build errors introduced by b48a2770d48b.
---
 sys/dev/hwpmc/hwpmc_powerpc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sys/dev/hwpmc/hwpmc_powerpc.c b/sys/dev/hwpmc/hwpmc_powerpc.c
index 3a2115ece3cb..407af94a07e1 100644
--- a/sys/dev/hwpmc/hwpmc_powerpc.c
+++ b/sys/dev/hwpmc/hwpmc_powerpc.c
@@ -604,7 +604,7 @@ pmc_md_initialize()
}
 
/* Set the value for kern.hwpmc.cpuid */
-   snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08lx", mfpvr());
+   snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08jx", (uintmax_t)mfpvr());
 
return (pmc_mdep);
 }
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git: 7844e5a4fc0a - main - powerpc: change mfpvr return type to uint32_t

2021-07-28 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=7844e5a4fc0a925a53a7e1969d12a84d1baa970f

commit 7844e5a4fc0a925a53a7e1969d12a84d1baa970f
Author: Leandro Lupori 
AuthorDate: 2021-07-28 17:03:53 +
Commit: Leandro Lupori 
CommitDate: 2021-07-28 17:08:19 +

powerpc: change mfpvr return type to uint32_t

As the Processor Version Register (PVR) is a 32-bit PowerPC
register, change mfpvr() return type to match it and avoid
type casts on its callers.

Suggested by:   jhibbits
Reviewed by:jhibbits, imp
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31332
---
 sys/dev/hwpmc/hwpmc_powerpc.c | 2 +-
 sys/powerpc/include/cpufunc.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sys/dev/hwpmc/hwpmc_powerpc.c b/sys/dev/hwpmc/hwpmc_powerpc.c
index 407af94a07e1..0f14f93e6415 100644
--- a/sys/dev/hwpmc/hwpmc_powerpc.c
+++ b/sys/dev/hwpmc/hwpmc_powerpc.c
@@ -604,7 +604,7 @@ pmc_md_initialize()
}
 
/* Set the value for kern.hwpmc.cpuid */
-   snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08jx", (uintmax_t)mfpvr());
+   snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08x", mfpvr());
 
return (pmc_mdep);
 }
diff --git a/sys/powerpc/include/cpufunc.h b/sys/powerpc/include/cpufunc.h
index 7b0039166436..5ae2345bd717 100644
--- a/sys/powerpc/include/cpufunc.h
+++ b/sys/powerpc/include/cpufunc.h
@@ -125,10 +125,10 @@ mfdec(void)
return (value);
 }
 
-static __inline register_t
+static __inline uint32_t
 mfpvr(void)
 {
-   register_t value;
+   uint32_t value;
 
__asm __volatile ("mfpvr %0" : "=r"(value));
 
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git: 95d619a8ea1f - main - hwpmc: remove static POWER8 definitions

2021-07-29 Thread Leandro Lupori
The branch main has been updated by luporl:

URL: 
https://cgit.FreeBSD.org/src/commit/?id=95d619a8ea1f410ecea58bc534af770a010069ab

commit 95d619a8ea1f410ecea58bc534af770a010069ab
Author: Leandro Lupori 
AuthorDate: 2021-07-29 17:37:32 +
Commit: Leandro Lupori 
CommitDate: 2021-07-29 17:52:00 +

hwpmc: remove static POWER8 definitions

After b48a2770d48b, static POWER8 definitions became unnecessary,
as all of them (and much more) are already present in libpmc's
PMU events.

Submitted by:   Leonardo Bianconi 
 (initial version)
Reviewed by:kbowling, mhorne
Sponsored by:   Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision:  https://reviews.freebsd.org/D31334
---
 lib/libpmc/libpmc.c  |  21 +--
 sys/dev/hwpmc/hwpmc_power8.c | 130 ---
 sys/dev/hwpmc/pmc_events.h   |  39 +
 3 files changed, 2 insertions(+), 188 deletions(-)

diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c
index e2422f167267..4ff7eb893959 100644
--- a/lib/libpmc/libpmc.c
+++ b/lib/libpmc/libpmc.c
@@ -144,7 +144,6 @@ PMC_CLASSDEP_TABLE(mips74k, MIPS74K);
 PMC_CLASSDEP_TABLE(octeon, OCTEON);
 PMC_CLASSDEP_TABLE(ppc7450, PPC7450);
 PMC_CLASSDEP_TABLE(ppc970, PPC970);
-PMC_CLASSDEP_TABLE(power8, POWER8);
 PMC_CLASSDEP_TABLE(e500, E500);
 
 static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT];
@@ -219,7 +218,6 @@ PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips);
 #if defined(__powerpc__)
 PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc);
 PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc);
-PMC_CLASS_TABLE_DESC(power8, POWER8, power8, powerpc);
 PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc);
 #endif
 
@@ -855,12 +853,6 @@ static struct pmc_event_alias ppc970_aliases[] = {
EV_ALIAS(NULL, NULL)
 };
 
-static struct pmc_event_alias power8_aliases[] = {
-   EV_ALIAS("instructions", "INSTR_COMPLETED"),
-   EV_ALIAS("cycles",   "CYCLES"),
-   EV_ALIAS(NULL, NULL)
-};
-
 static struct pmc_event_alias e500_aliases[] = {
EV_ALIAS("instructions", "INSTR_COMPLETED"),
EV_ALIAS("cycles",   "CYCLES"),
@@ -1243,10 +1235,6 @@ pmc_event_names_of_class(enum pmc_class cl, const char 
***eventnames,
ev = ppc970_event_table;
count = PMC_EVENT_TABLE_SIZE(ppc970);
break;
-   case PMC_CLASS_POWER8:
-   ev = power8_event_table;
-   count = PMC_EVENT_TABLE_SIZE(power8);
-   break;
case PMC_CLASS_E500:
ev = e500_event_table;
count = PMC_EVENT_TABLE_SIZE(e500);
@@ -1465,10 +1453,6 @@ pmc_init(void)
PMC_MDEP_INIT(ppc970);
pmc_class_table[n] = &ppc970_class_table_descr;
break;
-   case PMC_CPU_PPC_POWER8:
-   PMC_MDEP_INIT(power8);
-   pmc_class_table[n] = &power8_class_table_descr;
-   break;
case PMC_CPU_PPC_E500:
PMC_MDEP_INIT(e500);
pmc_class_table[n] = &e500_class_table_descr;
@@ -1480,7 +1464,7 @@ pmc_init(void)
 * about.  This shouldn't happen since the abi version check
 * should have caught this.
 */
-#if defined(__amd64__) || defined(__i386__)
+#if defined(__amd64__) || defined(__i386__) || defined(__powerpc64__)
break;
 #endif
errno = ENXIO;
@@ -1604,9 +1588,6 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype 
cpu)
} else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) {
ev = ppc970_event_table;
evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970);
-   } else if (pe >= PMC_EV_POWER8_FIRST && pe <= PMC_EV_POWER8_LAST) {
-   ev = power8_event_table;
-   evfence = power8_event_table + PMC_EVENT_TABLE_SIZE(power8);
} else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) {
ev = e500_event_table;
evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500);
diff --git a/sys/dev/hwpmc/hwpmc_power8.c b/sys/dev/hwpmc/hwpmc_power8.c
index ce063a57a10e..0d93e4ae2964 100644
--- a/sys/dev/hwpmc/hwpmc_power8.c
+++ b/sys/dev/hwpmc/hwpmc_power8.c
@@ -49,135 +49,6 @@ __FBSDID("$FreeBSD$");
 #define PM_CYC 0x1e
 #define PM_INST_CMPL   0x02
 
-static struct pmc_ppc_event power8_event_codes[] = {
-   {PMC_EV_POWER8_INSTR_COMPLETED,
-   .pe_flags = PMC_FLAG_PMC5,
-   .pe_code = 0x00
-   },
-   /*
-* PMC1 can also count cycles, but as PMC6 can only count cycles
-* it's better to always use it and leave PMC1 free to count
-* other events.
-*/
-