from:"selwin . sebastian"

[PATCH v2] net/axgbe: use CPUID to identify cpu

2023-10-03 Thread Selwin Sebastian

Using root complex to identify cpu will not work for vm passthrough.
CPUID is used to get family and modelid to identify cpu

Fixes: b0db927b5eba ("net/axgbe: use PCI root complex device to distinguish 
device")
Cc: sta...@dpdk.org

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_ethdev.c | 106 ++-
 1 file changed, 63 insertions(+), 43 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 48714eebe6..4fdb0ae168 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -12,6 +12,12 @@
 
 #include "eal_filesystem.h"
 
+#ifdef RTE_ARCH_X86
+#include 
+#else
+#define __cpuid (n, a, b, c, d)
+#endif
+
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int  axgbe_dev_configure(struct rte_eth_dev *dev);
 static int  axgbe_dev_start(struct rte_eth_dev *dev);
@@ -172,9 +178,14 @@ static const struct axgbe_xstats axgbe_xstats_strings[] = {
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
-#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
-#define AMD_PCI_YC_ROOT_COMPLEX_ID 0x14b5
-#define AMD_PCI_SNOWY_ROOT_COMPLEX_ID  0x1450
+
+#defineFam17h  0x17
+#defineFam19h  0x19
+
+#defineCPUID_VENDOR_AuthenticAMD_ebx   0x68747541
+#defineCPUID_VENDOR_AuthenticAMD_ecx   0x444d4163
+#defineCPUID_VENDOR_AuthenticAMD_edx   0x69746e65
+
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -2111,29 +2122,6 @@ static void axgbe_default_config(struct axgbe_port 
*pdata)
pdata->power_down = 0;
 }
 
-/*
- * Return PCI root complex device id on success else 0
- */
-static uint16_t
-get_pci_rc_devid(void)
-{
-   char pci_sysfs[PATH_MAX];
-   const struct rte_pci_addr pci_rc_addr = {0, 0, 0, 0};
-   unsigned long device_id;
-
-   snprintf(pci_sysfs, sizeof(pci_sysfs), "%s/" PCI_PRI_FMT "/device",
-rte_pci_get_sysfs_path(), pci_rc_addr.domain,
-pci_rc_addr.bus, pci_rc_addr.devid, pci_rc_addr.function);
-
-   /* get device id */
-   if (eal_parse_sysfs_value(pci_sysfs, &device_id) < 0) {
-   PMD_INIT_LOG(ERR, "Error in reading PCI sysfs\n");
-   return 0;
-   }
-
-   return (uint16_t)device_id;
-}
-
 /* Used in dev_start by primary process and then
  * in dev_init by secondary process when attaching to an existing ethdev.
  */
@@ -2186,6 +2174,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
uint32_t len;
int ret;
 
+   unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
+   unsigned char cpu_family = 0, cpu_model = 0;
+
eth_dev->dev_ops = &axgbe_eth_dev_ops;
 
eth_dev->rx_descriptor_status = axgbe_dev_rx_descriptor_status;
@@ -2230,26 +2221,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/*
-* Use PCI root complex device ID to identify the CPU
+* Use CPUID to get Family and model ID to identify the CPU
 */
-   switch (get_pci_rc_devid()) {
-   case AMD_PCI_RV_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
-   break;
-   case AMD_PCI_YC_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
-   /* Yellow Carp devices do not need cdr workaround */
-   pdata->vdata->an_cdr_workaround = 0;
+   __cpuid(0x0, eax, ebx, ecx, edx);
+
+   if (ebx == CPUID_VENDOR_AuthenticAMD_ebx &&
+   edx == CPUID_VENDOR_AuthenticAMD_edx &&
+   ecx == CPUID_VENDOR_AuthenticAMD_ecx) {
+   int unknown_cpu = 0;
+   eax = 0, ebx = 0, ecx = 0, edx = 0;
+
+   __cpuid(0x1, eax, ebx, ecx, edx);
+
+   cpu_family = ((GET_BITS(eax, 8, 4)) + (GET_BITS(eax, 20, 8)));
+   cpu_model = ((GET_BITS(eax, 4, 4)) | (((GET_BITS(eax, 16, 4)) 
<< 4) & 0xF0));
+
+   switch (cpu_family) {
+   case Fam17h:
+   /* V1000/R1000 */
+   if (cpu_model >= 0x10 && cpu_model <= 0x1F) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   /* EPYC 3000 */
+   } else if (cpu_model >= 0x01 && cpu_model <= 0x0F) {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   } else {
+   unknown_cpu = 1;
+   }

[PATCH v3] net/axgbe: use CPUID to identify cpu

2023-10-04 Thread Selwin Sebastian

Using root complex to identify cpu will not work for vm passthrough.
CPUID is used to get family and modelid to identify cpu

Fixes: b0db927b5eba ("net/axgbe: use PCI root complex device to distinguish 
device")
Cc: sta...@dpdk.org

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_ethdev.c | 106 ++-
 1 file changed, 63 insertions(+), 43 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 48714eebe6..d08ea4893c 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -12,6 +12,12 @@
 
 #include "eal_filesystem.h"
 
+#ifdef RTE_ARCH_X86
+#include 
+#else
+#define __cpuid(n, a, b, c, d)
+#endif
+
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int  axgbe_dev_configure(struct rte_eth_dev *dev);
 static int  axgbe_dev_start(struct rte_eth_dev *dev);
@@ -172,9 +178,14 @@ static const struct axgbe_xstats axgbe_xstats_strings[] = {
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
-#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
-#define AMD_PCI_YC_ROOT_COMPLEX_ID 0x14b5
-#define AMD_PCI_SNOWY_ROOT_COMPLEX_ID  0x1450
+
+#defineFam17h  0x17
+#defineFam19h  0x19
+
+#defineCPUID_VENDOR_AuthenticAMD_ebx   0x68747541
+#defineCPUID_VENDOR_AuthenticAMD_ecx   0x444d4163
+#defineCPUID_VENDOR_AuthenticAMD_edx   0x69746e65
+
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -2111,29 +2122,6 @@ static void axgbe_default_config(struct axgbe_port 
*pdata)
pdata->power_down = 0;
 }
 
-/*
- * Return PCI root complex device id on success else 0
- */
-static uint16_t
-get_pci_rc_devid(void)
-{
-   char pci_sysfs[PATH_MAX];
-   const struct rte_pci_addr pci_rc_addr = {0, 0, 0, 0};
-   unsigned long device_id;
-
-   snprintf(pci_sysfs, sizeof(pci_sysfs), "%s/" PCI_PRI_FMT "/device",
-rte_pci_get_sysfs_path(), pci_rc_addr.domain,
-pci_rc_addr.bus, pci_rc_addr.devid, pci_rc_addr.function);
-
-   /* get device id */
-   if (eal_parse_sysfs_value(pci_sysfs, &device_id) < 0) {
-   PMD_INIT_LOG(ERR, "Error in reading PCI sysfs\n");
-   return 0;
-   }
-
-   return (uint16_t)device_id;
-}
-
 /* Used in dev_start by primary process and then
  * in dev_init by secondary process when attaching to an existing ethdev.
  */
@@ -2186,6 +2174,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
uint32_t len;
int ret;
 
+   unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
+   unsigned char cpu_family = 0, cpu_model = 0;
+
eth_dev->dev_ops = &axgbe_eth_dev_ops;
 
eth_dev->rx_descriptor_status = axgbe_dev_rx_descriptor_status;
@@ -2230,26 +2221,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/*
-* Use PCI root complex device ID to identify the CPU
+* Use CPUID to get Family and model ID to identify the CPU
 */
-   switch (get_pci_rc_devid()) {
-   case AMD_PCI_RV_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
-   break;
-   case AMD_PCI_YC_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
-   /* Yellow Carp devices do not need cdr workaround */
-   pdata->vdata->an_cdr_workaround = 0;
+   __cpuid(0x0, eax, ebx, ecx, edx);
+
+   if (ebx == CPUID_VENDOR_AuthenticAMD_ebx &&
+   edx == CPUID_VENDOR_AuthenticAMD_edx &&
+   ecx == CPUID_VENDOR_AuthenticAMD_ecx) {
+   int unknown_cpu = 0;
+   eax = 0, ebx = 0, ecx = 0, edx = 0;
+
+   __cpuid(0x1, eax, ebx, ecx, edx);
+
+   cpu_family = ((GET_BITS(eax, 8, 4)) + (GET_BITS(eax, 20, 8)));
+   cpu_model = ((GET_BITS(eax, 4, 4)) | (((GET_BITS(eax, 16, 4)) 
<< 4) & 0xF0));
+
+   switch (cpu_family) {
+   case Fam17h:
+   /* V1000/R1000 */
+   if (cpu_model >= 0x10 && cpu_model <= 0x1F) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   /* EPYC 3000 */
+   } else if (cpu_model >= 0x01 && cpu_model <= 0x0F) {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   } else {
+   unknown_cpu = 1;
+   }

[PATCH v1] net/axgbe: use CPUID to identify cpu

2023-08-31 Thread Selwin Sebastian

Using root complex to identify cpu will not work for vm passthrough.
CPUID is used to get family and modelid to identify cpu

Fixes: b0db927b5eba ("net/axgbe: use PCI root complex device to distinguish 
device")
Cc: sta...@dpdk.org

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_ethdev.c | 102 ++-
 1 file changed, 59 insertions(+), 43 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 48714eebe6..59f5d713d0 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -12,6 +12,8 @@
 
 #include "eal_filesystem.h"
 
+#include 
+
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int  axgbe_dev_configure(struct rte_eth_dev *dev);
 static int  axgbe_dev_start(struct rte_eth_dev *dev);
@@ -172,9 +174,14 @@ static const struct axgbe_xstats axgbe_xstats_strings[] = {
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
-#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
-#define AMD_PCI_YC_ROOT_COMPLEX_ID 0x14b5
-#define AMD_PCI_SNOWY_ROOT_COMPLEX_ID  0x1450
+
+#defineFam17h  0x17
+#defineFam19h  0x19
+
+#defineCPUID_VENDOR_AuthenticAMD_ebx   0x68747541
+#defineCPUID_VENDOR_AuthenticAMD_ecx   0x444d4163
+#defineCPUID_VENDOR_AuthenticAMD_edx   0x69746e65
+
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -2111,29 +2118,6 @@ static void axgbe_default_config(struct axgbe_port 
*pdata)
pdata->power_down = 0;
 }
 
-/*
- * Return PCI root complex device id on success else 0
- */
-static uint16_t
-get_pci_rc_devid(void)
-{
-   char pci_sysfs[PATH_MAX];
-   const struct rte_pci_addr pci_rc_addr = {0, 0, 0, 0};
-   unsigned long device_id;
-
-   snprintf(pci_sysfs, sizeof(pci_sysfs), "%s/" PCI_PRI_FMT "/device",
-rte_pci_get_sysfs_path(), pci_rc_addr.domain,
-pci_rc_addr.bus, pci_rc_addr.devid, pci_rc_addr.function);
-
-   /* get device id */
-   if (eal_parse_sysfs_value(pci_sysfs, &device_id) < 0) {
-   PMD_INIT_LOG(ERR, "Error in reading PCI sysfs\n");
-   return 0;
-   }
-
-   return (uint16_t)device_id;
-}
-
 /* Used in dev_start by primary process and then
  * in dev_init by secondary process when attaching to an existing ethdev.
  */
@@ -2186,6 +2170,9 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
uint32_t len;
int ret;
 
+   unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
+   unsigned char cpu_family = 0, cpu_model = 0;
+
eth_dev->dev_ops = &axgbe_eth_dev_ops;
 
eth_dev->rx_descriptor_status = axgbe_dev_rx_descriptor_status;
@@ -2230,26 +2217,55 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/*
-* Use PCI root complex device ID to identify the CPU
+* Use CPUID to get Family and model ID to identify the CPU
 */
-   switch (get_pci_rc_devid()) {
-   case AMD_PCI_RV_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
-   break;
-   case AMD_PCI_YC_ROOT_COMPLEX_ID:
-   pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
-   /* Yellow Carp devices do not need cdr workaround */
-   pdata->vdata->an_cdr_workaround = 0;
+   __cpuid(0x0, eax, ebx, ecx, edx);
+
+   if (ebx == CPUID_VENDOR_AuthenticAMD_ebx &&
+   edx == CPUID_VENDOR_AuthenticAMD_edx &&
+   ecx == CPUID_VENDOR_AuthenticAMD_ecx) {
+   int unknown_cpu = 0;
+   eax = 0, ebx = 0, ecx = 0, edx = 0;
+
+   __cpuid(0x1, eax, ebx, ecx, edx);
+
+   cpu_family = ((GET_BITS(eax, 8, 4)) + (GET_BITS(eax, 20, 8)));
+   cpu_model = ((GET_BITS(eax, 4, 4)) | (((GET_BITS(eax, 16, 4)) 
<< 4) & 0xF0));
+
+   switch (cpu_family) {
+   case Fam17h:
+   /* V1000/R1000 */
+   if (cpu_model >= 0x10 && cpu_model <= 0x1F) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   /* EPYC 3000 */
+   } else if (cpu_model >= 0x01 && cpu_model <= 0x0F) {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   } else {
+   unknown_cpu = 1;
+   }
break;
-   case AMD_PCI_SNOWY_ROOT_COMPLEX_ID:
-   pdata-&

[PATCH v1] maintainers: take maintainership of AMD axgbe driver

2023-08-30 Thread Selwin Sebastian

Chandu is not working on dpdk axgbe driver anymore.

Signed-off-by: Selwin Sebastian 
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6b95da9ae3..1c40ad5665 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -644,7 +644,7 @@ F: doc/guides/nics/ena.rst
 F: doc/guides/nics/features/ena.ini
 
 AMD axgbe
-M: Chandubabu Namburu 
+M: Selwin Sebastian 
 F: drivers/net/axgbe/
 F: doc/guides/nics/axgbe.rst
 F: doc/guides/nics/features/axgbe.ini
-- 
2.34.1

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

2021-09-06 Thread Selwin Sebastian

Add support for PTDMA driver

Signed-off-by: Selwin Sebastian 
---
 MAINTAINERS  |   5 +
 doc/guides/rawdevs/ptdma.rst | 220 ++
 drivers/raw/meson.build  |   1 +
 drivers/raw/ptdma/meson.build|  16 +
 drivers/raw/ptdma/ptdma_dev.c| 135 +
 drivers/raw/ptdma/ptdma_pmd_private.h|  41 +++
 drivers/raw/ptdma/ptdma_rawdev.c | 266 +
 drivers/raw/ptdma/ptdma_rawdev_spec.h| 362 +++
 drivers/raw/ptdma/ptdma_rawdev_test.c| 272 +
 drivers/raw/ptdma/rte_ptdma_rawdev.h | 124 
 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h | 298 +++
 drivers/raw/ptdma/version.map|   5 +
 usertools/dpdk-devbind.py|   4 +-
 13 files changed, 1748 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/rawdevs/ptdma.rst
 create mode 100644 drivers/raw/ptdma/meson.build
 create mode 100644 drivers/raw/ptdma/ptdma_dev.c
 create mode 100644 drivers/raw/ptdma/ptdma_pmd_private.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev.c
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_spec.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_test.c
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev.h
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h
 create mode 100644 drivers/raw/ptdma/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..f4afd1a072 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1305,6 +1305,11 @@ F: doc/guides/rawdevs/ioat.rst
 F: examples/ioat/
 F: doc/guides/sample_app_ug/ioat.rst
 
+PTDMA Rawdev
+M: Selwin Sebastian 
+F: drivers/raw/ptdma/
+F: doc/guides/rawdevs/ptdma.rst
+
 NXP DPAA2 QDMA
 M: Nipun Gupta 
 F: drivers/raw/dpaa2_qdma/
diff --git a/doc/guides/rawdevs/ptdma.rst b/doc/guides/rawdevs/ptdma.rst
new file mode 100644
index 00..50772f9f3b
--- /dev/null
+++ b/doc/guides/rawdevs/ptdma.rst
@@ -0,0 +1,220 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
+
+PTDMA Rawdev Driver
+===
+
+The ``ptdma`` rawdev driver provides a poll-mode driver (PMD) for AMD PTDMA 
device.
+
+Hardware Requirements
+--
+
+The ``dpdk-devbind.py`` script, included with DPDK,
+can be used to show the presence of supported hardware.
+Running ``dpdk-devbind.py --status-dev misc`` will show all the miscellaneous,
+or rawdev-based devices on the system.
+
+Sample output from a system with PTDMA is shown below
+
+Misc (rawdev) devices using DPDK-compatible driver
+==
+:01:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+:02:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+
+Devices using UIO drivers
+~~~
+
+The HW devices to be used will need to be bound to a user-space IO driver for 
use.
+The ``dpdk-devbind.py`` script can be used to view the state of the PTDMA 
devices
+and to bind them to a suitable DPDK-supported driver, such as ``igb_uio``.
+For example::
+
+$ sudo ./usertools/dpdk-devbind.py  --force --bind=igb_uio 
:01:00.2 :02:00.2
+
+Compilation
+
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the 
target platform is x86-based.
+No additional compilation steps are necessary.
+
+
+Using PTDMA Rawdev Devices
+--
+
+To use the devices from an application, the rawdev API can be used, along
+with definitions taken from the device-specific header file
+``rte_ptdma_rawdev.h``. This header is needed to get the definition of
+structure parameters used by some of the rawdev APIs for PTDMA rawdev
+devices, as well as providing key functions for using the device for memory
+copies.
+
+Getting Device Information
+~~~
+
+Basic information about each rawdev device can be queried using the
+``rte_rawdev_info_get()`` API. For most applications, this API will be
+needed to verify that the rawdev in question is of the expected type. For
+example, the following code snippet can be used to identify an PTDMA
+rawdev device for use by an application:
+
+.. code-block:: C
+
+for (i = 0; i < count && !found; i++) {
+struct rte_rawdev_info info = { .dev_private = NULL };
+found = (rte_rawdev_info_get(i, &info, 0) == 0 &&
+strcmp(info.driver_name,
+PTDMA_PMD_RAWDEV_NAME) == 0);
+}
+
+When calling the ``rte_rawdev_info_get()`` API for an PTDMA rawdev device,
+the ``dev_private`` field in the ``rte_rawdev_info`` struct should either
+be NULL, or else be set to point to a structure of type
+``rte_ptdma_rawdev_config``, in which case the size of the configured device
+input ring will be returned

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

2021-09-06 Thread Selwin Sebastian

From: Selwin Sebastian 

Add support for PTDMA driver

Signed-off-by: Selwin Sebastian 
---
 MAINTAINERS  |   5 +
 doc/guides/rawdevs/ptdma.rst | 220 ++
 drivers/raw/meson.build  |   1 +
 drivers/raw/ptdma/meson.build|  16 +
 drivers/raw/ptdma/ptdma_dev.c| 135 +
 drivers/raw/ptdma/ptdma_pmd_private.h|  41 +++
 drivers/raw/ptdma/ptdma_rawdev.c | 266 +
 drivers/raw/ptdma/ptdma_rawdev_spec.h| 362 +++
 drivers/raw/ptdma/ptdma_rawdev_test.c| 272 +
 drivers/raw/ptdma/rte_ptdma_rawdev.h | 124 
 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h | 298 +++
 drivers/raw/ptdma/version.map|   5 +
 usertools/dpdk-devbind.py|   4 +-
 13 files changed, 1748 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/rawdevs/ptdma.rst
 create mode 100644 drivers/raw/ptdma/meson.build
 create mode 100644 drivers/raw/ptdma/ptdma_dev.c
 create mode 100644 drivers/raw/ptdma/ptdma_pmd_private.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev.c
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_spec.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_test.c
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev.h
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h
 create mode 100644 drivers/raw/ptdma/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..f4afd1a072 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1305,6 +1305,11 @@ F: doc/guides/rawdevs/ioat.rst
 F: examples/ioat/
 F: doc/guides/sample_app_ug/ioat.rst
 
+PTDMA Rawdev
+M: Selwin Sebastian 
+F: drivers/raw/ptdma/
+F: doc/guides/rawdevs/ptdma.rst
+
 NXP DPAA2 QDMA
 M: Nipun Gupta 
 F: drivers/raw/dpaa2_qdma/
diff --git a/doc/guides/rawdevs/ptdma.rst b/doc/guides/rawdevs/ptdma.rst
new file mode 100644
index 00..50772f9f3b
--- /dev/null
+++ b/doc/guides/rawdevs/ptdma.rst
@@ -0,0 +1,220 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
+
+PTDMA Rawdev Driver
+===
+
+The ``ptdma`` rawdev driver provides a poll-mode driver (PMD) for AMD PTDMA 
device.
+
+Hardware Requirements
+--
+
+The ``dpdk-devbind.py`` script, included with DPDK,
+can be used to show the presence of supported hardware.
+Running ``dpdk-devbind.py --status-dev misc`` will show all the miscellaneous,
+or rawdev-based devices on the system.
+
+Sample output from a system with PTDMA is shown below
+
+Misc (rawdev) devices using DPDK-compatible driver
+==
+:01:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+:02:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+
+Devices using UIO drivers
+~~~
+
+The HW devices to be used will need to be bound to a user-space IO driver for 
use.
+The ``dpdk-devbind.py`` script can be used to view the state of the PTDMA 
devices
+and to bind them to a suitable DPDK-supported driver, such as ``igb_uio``.
+For example::
+
+$ sudo ./usertools/dpdk-devbind.py  --force --bind=igb_uio 
:01:00.2 :02:00.2
+
+Compilation
+
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the 
target platform is x86-based.
+No additional compilation steps are necessary.
+
+
+Using PTDMA Rawdev Devices
+--
+
+To use the devices from an application, the rawdev API can be used, along
+with definitions taken from the device-specific header file
+``rte_ptdma_rawdev.h``. This header is needed to get the definition of
+structure parameters used by some of the rawdev APIs for PTDMA rawdev
+devices, as well as providing key functions for using the device for memory
+copies.
+
+Getting Device Information
+~~~
+
+Basic information about each rawdev device can be queried using the
+``rte_rawdev_info_get()`` API. For most applications, this API will be
+needed to verify that the rawdev in question is of the expected type. For
+example, the following code snippet can be used to identify an PTDMA
+rawdev device for use by an application:
+
+.. code-block:: C
+
+for (i = 0; i < count && !found; i++) {
+struct rte_rawdev_info info = { .dev_private = NULL };
+found = (rte_rawdev_info_get(i, &info, 0) == 0 &&
+strcmp(info.driver_name,
+PTDMA_PMD_RAWDEV_NAME) == 0);
+}
+
+When calling the ``rte_rawdev_info_get()`` API for an PTDMA rawdev device,
+the ``dev_private`` field in the ``rte_rawdev_info`` struct should either
+be NULL, or else be set to point to a structure of type
+``rte_ptdma_rawdev_config``, in which case the size of the configured device
+input ring will be returned

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

2021-09-06 Thread Selwin Sebastian

Add support for PTDMA driver

Signed-off-by: Selwin Sebastian 
---
 MAINTAINERS  |   5 +
 doc/guides/rawdevs/ptdma.rst | 220 ++
 drivers/raw/meson.build  |   1 +
 drivers/raw/ptdma/meson.build|  16 +
 drivers/raw/ptdma/ptdma_dev.c| 135 +
 drivers/raw/ptdma/ptdma_pmd_private.h|  41 +++
 drivers/raw/ptdma/ptdma_rawdev.c | 266 +
 drivers/raw/ptdma/ptdma_rawdev_spec.h| 362 +++
 drivers/raw/ptdma/ptdma_rawdev_test.c| 272 +
 drivers/raw/ptdma/rte_ptdma_rawdev.h | 124 
 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h | 298 +++
 drivers/raw/ptdma/version.map|   5 +
 usertools/dpdk-devbind.py|   4 +-
 13 files changed, 1748 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/rawdevs/ptdma.rst
 create mode 100644 drivers/raw/ptdma/meson.build
 create mode 100644 drivers/raw/ptdma/ptdma_dev.c
 create mode 100644 drivers/raw/ptdma/ptdma_pmd_private.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev.c
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_spec.h
 create mode 100644 drivers/raw/ptdma/ptdma_rawdev_test.c
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev.h
 create mode 100644 drivers/raw/ptdma/rte_ptdma_rawdev_fns.h
 create mode 100644 drivers/raw/ptdma/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..f4afd1a072 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1305,6 +1305,11 @@ F: doc/guides/rawdevs/ioat.rst
 F: examples/ioat/
 F: doc/guides/sample_app_ug/ioat.rst
 
+PTDMA Rawdev
+M: Selwin Sebastian 
+F: drivers/raw/ptdma/
+F: doc/guides/rawdevs/ptdma.rst
+
 NXP DPAA2 QDMA
 M: Nipun Gupta 
 F: drivers/raw/dpaa2_qdma/
diff --git a/doc/guides/rawdevs/ptdma.rst b/doc/guides/rawdevs/ptdma.rst
new file mode 100644
index 00..50772f9f3b
--- /dev/null
+++ b/doc/guides/rawdevs/ptdma.rst
@@ -0,0 +1,220 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
+
+PTDMA Rawdev Driver
+===
+
+The ``ptdma`` rawdev driver provides a poll-mode driver (PMD) for AMD PTDMA 
device.
+
+Hardware Requirements
+--
+
+The ``dpdk-devbind.py`` script, included with DPDK,
+can be used to show the presence of supported hardware.
+Running ``dpdk-devbind.py --status-dev misc`` will show all the miscellaneous,
+or rawdev-based devices on the system.
+
+Sample output from a system with PTDMA is shown below
+
+Misc (rawdev) devices using DPDK-compatible driver
+==
+:01:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+:02:00.2 'Starship/Matisse PTDMA 1498' drv=igb_uio unused=vfio-pci
+
+Devices using UIO drivers
+~~~
+
+The HW devices to be used will need to be bound to a user-space IO driver for 
use.
+The ``dpdk-devbind.py`` script can be used to view the state of the PTDMA 
devices
+and to bind them to a suitable DPDK-supported driver, such as ``igb_uio``.
+For example::
+
+$ sudo ./usertools/dpdk-devbind.py  --force --bind=igb_uio 
:01:00.2 :02:00.2
+
+Compilation
+
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the 
target platform is x86-based.
+No additional compilation steps are necessary.
+
+
+Using PTDMA Rawdev Devices
+--
+
+To use the devices from an application, the rawdev API can be used, along
+with definitions taken from the device-specific header file
+``rte_ptdma_rawdev.h``. This header is needed to get the definition of
+structure parameters used by some of the rawdev APIs for PTDMA rawdev
+devices, as well as providing key functions for using the device for memory
+copies.
+
+Getting Device Information
+~~~
+
+Basic information about each rawdev device can be queried using the
+``rte_rawdev_info_get()`` API. For most applications, this API will be
+needed to verify that the rawdev in question is of the expected type. For
+example, the following code snippet can be used to identify an PTDMA
+rawdev device for use by an application:
+
+.. code-block:: C
+
+for (i = 0; i < count && !found; i++) {
+struct rte_rawdev_info info = { .dev_private = NULL };
+found = (rte_rawdev_info_get(i, &info, 0) == 0 &&
+strcmp(info.driver_name,
+PTDMA_PMD_RAWDEV_NAME) == 0);
+}
+
+When calling the ``rte_rawdev_info_get()`` API for an PTDMA rawdev device,
+the ``dev_private`` field in the ``rte_rawdev_info`` struct should either
+be NULL, or else be set to point to a structure of type
+``rte_ptdma_rawdev_config``, in which case the size of the configured device
+input ring will be returned

[dpdk-dev] [PATCH v1] crypto/ccp: add support for new CCP device ID

2019-12-30 Thread Selwin Sebastian

Add a new CCP PCI device ID for supporting V1000/R1000 processors.

Signed-off-by: Selwin Sebastian 
---
 drivers/crypto/ccp/rte_ccp_pmd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/crypto/ccp/rte_ccp_pmd.c b/drivers/crypto/ccp/rte_ccp_pmd.c
index 38cb1fe3d..b5bb6790b 100644
--- a/drivers/crypto/ccp/rte_ccp_pmd.c
+++ b/drivers/crypto/ccp/rte_ccp_pmd.c
@@ -292,6 +292,9 @@ static struct rte_pci_id ccp_pci_id[] = {
{
RTE_PCI_DEVICE(0x1022, 0x1468), /* AMD CCP-5b */
},
+   {
+   RTE_PCI_DEVICE(0x1022, 0x15df), /* AMD CCP RV */
+   },
{.device_id = 0},
 };
 
-- 
2.17.1

[dpdk-dev] [PATCH v1] crypto/ccp: aes-gcm driver bug fix

2019-12-30 Thread Selwin Sebastian

fixes ccp crypto driver to make aes-gcm output match with
openssl/NIST output

Signed-off-by: Selwin Sebastian 
---
 drivers/crypto/ccp/ccp_crypto.c | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/ccp/ccp_crypto.c b/drivers/crypto/ccp/ccp_crypto.c
index 4256734d1..19009f5f2 100644
--- a/drivers/crypto/ccp/ccp_crypto.c
+++ b/drivers/crypto/ccp/ccp_crypto.c
@@ -1515,8 +1515,8 @@ ccp_perform_passthru(struct ccp_passthru *pst,
 
CCP_CMD_SOC(desc) = 0;
CCP_CMD_IOC(desc) = 0;
-   CCP_CMD_INIT(desc) = 0;
-   CCP_CMD_EOM(desc) = 0;
+   CCP_CMD_INIT(desc) = 1;
+   CCP_CMD_EOM(desc) = 1;
CCP_CMD_PROT(desc) = 0;
 
function.raw = 0;
@@ -2383,7 +2383,7 @@ ccp_perform_aes_gcm(struct rte_crypto_op *op, struct 
ccp_queue *cmd_q)
 op->sym->session,
 ccp_cryptodev_driver_id);
iv = rte_crypto_op_ctod_offset(op, uint8_t *, session->iv.offset);
-   key_addr = session->cipher.key_phys;
+   key_addr = (phys_addr_t)rte_mem_virt2phy(session->cipher.key_ccp);
 
src_addr = rte_pktmbuf_mtophys_offset(op->sym->m_src,
  op->sym->aead.data.offset);
@@ -2393,7 +2393,8 @@ ccp_perform_aes_gcm(struct rte_crypto_op *op, struct 
ccp_queue *cmd_q)
else
dest_addr = src_addr;
rte_pktmbuf_append(op->sym->m_src, session->auth.ctx_len);
-   digest_dest_addr = op->sym->aead.digest.phys_addr;
+   digest_dest_addr =
+   (phys_addr_t)rte_mem_virt2phy(op->sym->aead.digest.data);
temp = (uint64_t *)(op->sym->aead.digest.data + AES_BLOCK_SIZE);
*temp++ = rte_bswap64(session->auth.aad_length << 3);
*temp = rte_bswap64(op->sym->aead.data.length << 3);
@@ -2401,10 +2402,10 @@ ccp_perform_aes_gcm(struct rte_crypto_op *op, struct 
ccp_queue *cmd_q)
non_align_len = op->sym->aead.data.length % AES_BLOCK_SIZE;
length = CCP_ALIGN(op->sym->aead.data.length, AES_BLOCK_SIZE);
 
-   aad_addr = op->sym->aead.aad.phys_addr;
+   aad_addr = (phys_addr_t)rte_mem_virt2phy(op->sym->aead.aad.data);
 
/* CMD1 IV Passthru */
-   rte_memcpy(session->cipher.nonce + AES_BLOCK_SIZE, iv,
+   rte_memcpy(session->cipher.nonce, iv,
   session->iv.length);
pst.src_addr = session->cipher.nonce_phys;
pst.dest_addr = (phys_addr_t)(cmd_q->sb_iv * CCP_SB_BYTES);
@@ -2512,12 +2513,12 @@ ccp_perform_aes_gcm(struct rte_crypto_op *op, struct 
ccp_queue *cmd_q)
/* Last block (AAD_len || PT_len)*/
CCP_CMD_LEN(desc) = AES_BLOCK_SIZE;
 
-   CCP_CMD_SRC_LO(desc) = ((uint32_t)digest_dest_addr + AES_BLOCK_SIZE);
-   CCP_CMD_SRC_HI(desc) = high32_value(digest_dest_addr + AES_BLOCK_SIZE);
+   CCP_CMD_SRC_LO(desc) = ((uint32_t)digest_dest_addr);
+   CCP_CMD_SRC_HI(desc) = high32_value(digest_dest_addr);
CCP_CMD_SRC_MEM(desc) = CCP_MEMTYPE_SYSTEM;
 
-   CCP_CMD_DST_LO(desc) = ((uint32_t)digest_dest_addr);
-   CCP_CMD_DST_HI(desc) = high32_value(digest_dest_addr);
+   CCP_CMD_DST_LO(desc) = ((uint32_t)digest_dest_addr + AES_BLOCK_SIZE);
+   CCP_CMD_DST_HI(desc) = high32_value(digest_dest_addr + AES_BLOCK_SIZE);
CCP_CMD_SRC_MEM(desc) = CCP_MEMTYPE_SYSTEM;
 
CCP_CMD_KEY_LO(desc) = ((uint32_t)key_addr);
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/axgbe: add a HW quirk for register definitions

2020-01-08 Thread Selwin Sebastian

V1000/R1000 processors are using the same PCI ids for the network
device as SNOWYOWL processor but has altered register definitions
for determining the window settings for the indirect PCS access.
Add support to check for this hardware and if found use the new
register values

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 22 +++---
 2 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT   0x03fc
 #define PCS_V2_WINDOW_DEF  0x9060
 #define PCS_V2_WINDOW_SELECT   0x9064
+#define PCS_V2_RV_WINDOW_DEF   0x1060
+#define PCS_V2_RV_WINDOW_SELECT0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..c551375a4 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -29,8 +29,10 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
+#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
+extern struct rte_pci_bus rte_pci_bus;
 
 int axgbe_logtype_init;
 int axgbe_logtype_driver;
@@ -585,6 +587,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
struct rte_pci_device *pci_dev;
uint32_t reg, mac_lo, mac_hi;
int ret;
+   struct rte_pci_device *root_complex_dev;
 
eth_dev->dev_ops = &axgbe_eth_dev_ops;
eth_dev->rx_pkt_burst = &axgbe_recv_pkts;
@@ -605,6 +608,20 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
pdata->pci_dev = pci_dev;
 
+   /*
+* Get root complex device to differentiate RV AXGBE vs SNOWY AXGBE
+*/
+   root_complex_dev = TAILQ_FIRST(&rte_pci_bus.device_list);
+
+   if (root_complex_dev->id.vendor_id == AMD_PCI_VENDOR_ID &&
+   root_complex_dev->id.device_id == AMD_PCI_RV_ROOT_COMPLEX_ID) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   } else {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   }
+
pdata->xgmac_regs =
(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +637,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/* Configure the PCS indirect addressing support */
-   reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+   reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
pdata->xpcs_window <<= 6;
pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+
PMD_INIT_LOG(DEBUG,
 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
 pdata->xpcs_window_size, pdata->xpcs_window_mask);
-- 
2.17.1

[dpdk-dev] [PATCH v3] drivers: add a HW quirk for register definitions

2020-01-14 Thread Selwin Sebastian

V1000/R1000 processors are using the same PCI ids for the network
device as SNOWYOWL processor but has altered register definitions
for determining the window settings for the indirect PCS access.
Add support to check for this hardware and if found use the new
register values.

Added a new routine rte_pci_search_device to pci driver to search
for a device.

Signed-off-by: Selwin Sebastian 
---
 drivers/bus/pci/pci_common.c | 17 +
 drivers/bus/pci/rte_bus_pci.h| 12 
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 18 +++---
 4 files changed, 46 insertions(+), 3 deletions(-)

diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 3f5542076..e991a2580 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -393,6 +393,23 @@ rte_pci_add_device(struct rte_pci_device *pci_dev)
TAILQ_INSERT_TAIL(&rte_pci_bus.device_list, pci_dev, next);
 }
 
+/* Search for a specific device in PCI bus */
+
+int
+rte_pci_search_device(int vendor_id, int device_id)
+{
+   struct rte_pci_device *pdev;
+   pdev = TAILQ_FIRST(&rte_pci_bus.device_list);
+
+   while (pdev != NULL) {
+   if (pdev->id.vendor_id == vendor_id &&
+   pdev->id.device_id == device_id)
+   return true;
+   pdev = TAILQ_NEXT(pdev, next);
+   }
+   return false;
+}
+
 /* Insert a device into a predefined position in PCI bus */
 void
 rte_pci_insert_device(struct rte_pci_device *exist_pci_dev,
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index 29bea6d70..42b6c7e03 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -354,6 +354,18 @@ void rte_pci_ioport_read(struct rte_pci_ioport *p,
 void rte_pci_ioport_write(struct rte_pci_ioport *p,
const void *data, size_t len, off_t offset);
 
+/*
+ * Search for a specific device in pci bus
+ *
+ * @param vendor_id
+ *   vendor_id of the device to search
+ * @param device_id
+ *   device_id of the device to search
+ * @return
+ *   1 on success, 0 on failure
+ */
+int rte_pci_search_device(int vendor_id, int device_id);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT   0x03fc
 #define PCS_V2_WINDOW_DEF  0x9060
 #define PCS_V2_WINDOW_SELECT   0x9064
+#define PCS_V2_RV_WINDOW_DEF   0x1060
+#define PCS_V2_RV_WINDOW_SELECT0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..01975236b 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -29,6 +29,7 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
+#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -605,6 +606,18 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
pdata->pci_dev = pci_dev;
 
+   /*
+* Use root complex device ID to differentiate RV AXGBE vs SNOWY AXGBE
+*/
+   if (rte_pci_search_device(AMD_PCI_VENDOR_ID,
+   AMD_PCI_RV_ROOT_COMPLEX_ID)) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   } else {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   }
+
pdata->xgmac_regs =
(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +633,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/* Configure the PCS indirect addressing support */
-   reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+   reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
pdata->xpcs_window <<= 6;
pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+

[dpdk-dev] [PATCH v4] net/axgbe: add a HW quirk for register definitions

2020-01-19 Thread Selwin Sebastian

V1000/R1000 processors are using the same PCI ids for the network
device as SNOWYOWL processor but has altered register definitions
for determining the window settings for the indirect PCS access.
Add support to check for this hardware and if found use the new
register values.

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 40 +---
 2 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT   0x03fc
 #define PCS_V2_WINDOW_DEF  0x9060
 #define PCS_V2_WINDOW_SELECT   0x9064
+#define PCS_V2_RV_WINDOW_DEF   0x1060
+#define PCS_V2_RV_WINDOW_SELECT0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..f5dbba292 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -29,6 +29,7 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
+#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -574,6 +575,29 @@ static void axgbe_default_config(struct axgbe_port *pdata)
pdata->power_down = 0;
 }
 
+static inline int
+pci_device_cmp(const struct rte_device *dev, const void *_pci_id)
+{
+   const struct rte_pci_device *pdev = RTE_DEV_TO_PCI_CONST(dev);
+   const struct rte_pci_id *pcid = _pci_id;
+
+   if (pdev->id.vendor_id == AMD_PCI_VENDOR_ID &&
+   pdev->id.device_id == pcid->device_id)
+   return 0;
+   return 1;
+}
+
+static bool pci_search_device(int device_id)
+{
+   struct rte_bus *pci_bus;
+   struct rte_pci_id dev_id;
+
+   dev_id.device_id = device_id;
+   pci_bus = rte_bus_find_by_name("pci");
+   return (pci_bus != NULL) &&
+   (pci_bus->find_device(NULL, pci_device_cmp, &dev_id) != NULL);
+}
+
 /*
  * It returns 0 on success.
  */
@@ -605,6 +629,17 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
pdata->pci_dev = pci_dev;
 
+   /*
+* Use root complex device ID to differentiate RV AXGBE vs SNOWY AXGBE
+*/
+   if (pci_search_device(AMD_PCI_RV_ROOT_COMPLEX_ID)) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   } else {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   }
+
pdata->xgmac_regs =
(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +655,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/* Configure the PCS indirect addressing support */
-   reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+   reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
pdata->xpcs_window <<= 6;
pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+
PMD_INIT_LOG(DEBUG,
 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
 pdata->xpcs_window_size, pdata->xpcs_window_mask);
-- 
2.17.1

[dpdk-dev] [PATCH v5] net/axgbe: add a HW quirk for register definitions

2020-01-20 Thread Selwin Sebastian

V1000/R1000 processors are using the same PCI ids for the network
device as SNOWYOWL processor but has altered register definitions
for determining the window settings for the indirect PCS access.
Add support to check for this hardware and if found use the new
register values.

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 41 +---
 2 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT   0x03fc
 #define PCS_V2_WINDOW_DEF  0x9060
 #define PCS_V2_WINDOW_SELECT   0x9064
+#define PCS_V2_RV_WINDOW_DEF   0x1060
+#define PCS_V2_RV_WINDOW_SELECT0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..9b2b377ba 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -29,6 +29,7 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID   0x1022
+#define AMD_PCI_RV_ROOT_COMPLEX_ID 0x15d0
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -574,6 +575,30 @@ static void axgbe_default_config(struct axgbe_port *pdata)
pdata->power_down = 0;
 }
 
+static int
+pci_device_cmp(const struct rte_device *dev, const void *_pci_id)
+{
+   const struct rte_pci_device *pdev = RTE_DEV_TO_PCI_CONST(dev);
+   const struct rte_pci_id *pcid = _pci_id;
+
+   if (pdev->id.vendor_id == AMD_PCI_VENDOR_ID &&
+   pdev->id.device_id == pcid->device_id)
+   return 0;
+   return 1;
+}
+
+static bool
+pci_search_device(int device_id)
+{
+   struct rte_bus *pci_bus;
+   struct rte_pci_id dev_id;
+
+   dev_id.device_id = device_id;
+   pci_bus = rte_bus_find_by_name("pci");
+   return (pci_bus != NULL) &&
+   (pci_bus->find_device(NULL, pci_device_cmp, &dev_id) != NULL);
+}
+
 /*
  * It returns 0 on success.
  */
@@ -605,6 +630,17 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
pdata->pci_dev = pci_dev;
 
+   /*
+* Use root complex device ID to differentiate RV AXGBE vs SNOWY AXGBE
+*/
+   if (pci_search_device(AMD_PCI_RV_ROOT_COMPLEX_ID)) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   } else {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   }
+
pdata->xgmac_regs =
(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +656,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/* Configure the PCS indirect addressing support */
-   reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+   reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
pdata->xpcs_window <<= 6;
pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+
PMD_INIT_LOG(DEBUG,
 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
 pdata->xpcs_window_size, pdata->xpcs_window_mask);
-- 
2.17.1

[dpdk-dev] [PATCH v1] net/axgbe: enable IEEE 1588 PTP support for axgbe

2020-06-01 Thread selwin . sebastian

From: Selwin Sebastian 

Add ethdev APIs to support PTP timestamping

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h |   8 +
 drivers/net/axgbe/axgbe_ethdev.c | 327 ++-
 drivers/net/axgbe/axgbe_ethdev.h |  14 ++
 drivers/net/axgbe/axgbe_rxtx.c   |  11 +-
 4 files changed, 358 insertions(+), 2 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index f48117180..e0a0b0fbb 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -45,6 +45,7 @@
 #endif
 
 #define AXGBE_HZ   250
+#define NSEC_PER_SEC10L
 
 /* DMA register offsets */
 #define DMA_MR 0x3000
@@ -491,6 +492,8 @@
 #define MAC_TSCR_TSEVNTENA_WIDTH   1
 #define MAC_TSCR_TSINIT_INDEX  2
 #define MAC_TSCR_TSINIT_WIDTH  1
+#define MAC_TSCR_TSUPDT_INDEX  3
+#define MAC_TSCR_TSUPDT_WIDTH  1
 #define MAC_TSCR_TSIPENA_INDEX 11
 #define MAC_TSCR_TSIPENA_WIDTH 1
 #define MAC_TSCR_TSIPV4ENA_INDEX   13
@@ -505,6 +508,8 @@
 #define MAC_TSCR_TXTSSTSM_WIDTH1
 #define MAC_TSSR_TXTSC_INDEX   15
 #define MAC_TSSR_TXTSC_WIDTH   1
+#define MAC_STNUR_ADDSUB_INDEX  31
+#define MAC_STNUR_ADDSUB_WIDTH  1
 #define MAC_TXSNR_TXTSSTSMIS_INDEX 31
 #define MAC_TXSNR_TXTSSTSMIS_WIDTH 1
 #define MAC_VLANHTR_VLHT_INDEX 0
@@ -538,6 +543,7 @@
 #define MAC_VR_USERVER_INDEX   16
 #define MAC_VR_USERVER_WIDTH   8
 
+
 /* MMC register offsets */
 #define MMC_CR 0x0800
 #define MMC_RISR   0x0804
@@ -1170,6 +1176,8 @@
 #define RX_CONTEXT_DESC3_TSA_WIDTH 1
 #define RX_CONTEXT_DESC3_TSD_INDEX 6
 #define RX_CONTEXT_DESC3_TSD_WIDTH 1
+#define RX_CONTEXT_DESC3_PMT_INDEX 0
+#define RX_CONTEXT_DESC3_PMT_WIDTH 4
 
 #define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_INDEX 0
 #define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_WIDTH 1
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 867058845..18c44404c 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -8,6 +8,7 @@
 #include "axgbe_common.h"
 #include "axgbe_phy.h"
 #include "axgbe_regs.h"
+#include "rte_time.h"
 
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int eth_axgbe_dev_uninit(struct rte_eth_dev *eth_dev);
@@ -74,6 +75,24 @@ static void axgbe_txq_info_get(struct rte_eth_dev *dev, 
uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
 const uint32_t *axgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
+static int axgbe_timesync_enable(struct rte_eth_dev *dev);
+static int axgbe_timesync_disable(struct rte_eth_dev *dev);
+static int
+axgbe_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+   struct timespec *timestamp, uint32_t flags);
+static int
+axgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+   struct timespec *timestamp);
+static int axgbe_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+static int axgbe_timesync_read_time(struct rte_eth_dev *dev,
+   struct timespec *timestamp);
+static int axgbe_timesync_write_time(struct rte_eth_dev *dev,
+   const struct timespec *timestamp);
+static void axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec,
+   unsigned int nsec);
+static void axgbe_update_tstamp_addend(struct axgbe_port *pdata,
+   unsigned int addend);
+
 struct axgbe_xstats {
char name[RTE_ETH_XSTATS_NAME_SIZE];
int offset;
@@ -214,6 +233,14 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.dev_supported_ptypes_get = axgbe_dev_supported_ptypes_get,
.rx_descriptor_status = axgbe_dev_rx_descriptor_status,
.tx_descriptor_status = axgbe_dev_tx_descriptor_status,
+   .timesync_enable  = axgbe_timesync_enable,
+   .timesync_disable = axgbe_timesync_disable,
+   .timesync_read_rx_timestamp   = axgbe_timesync_read_rx_timestamp,
+   .timesync_read_tx_timestamp   = axgbe_timesync_read_tx_timestamp,
+   .timesync_adjust_time = axgbe_timesync_adjust_time,
+   .timesync_read_time   = axgbe_timesync_read_time,
+   .timesync_write_time  = axgbe_timesync_write_time,
+
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
@@ -1000,12 +1027,16 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
DEV_RX_OFFLOAD_TCP_CKSUM  |
DEV_RX_OFFLOAD_JUMBO_FRAME  |
DEV_RX_OFFLOAD_SCATTER|
+   PKT_RX_IEEE1588_PTP |
DEV_RX_OFFLOAD_KEEP_CRC;
 
dev_info->tx_offload_capa =
DEV_TX_OFFLOAD_IPV4_CKSUM

[dpdk-dev] [PATCH v1] net/axgbe: add support for utility APIs

2020-06-01 Thread selwin . sebastian

From: Selwin Sebastian 

Add support for rx, tx queue utility APIs
Add support for 'fw_revision_get' API

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_ethdev.c |  7 +++
 drivers/net/axgbe/axgbe_rxtx.c   | 89 
 drivers/net/axgbe/axgbe_rxtx.h   |  4 ++
 3 files changed, 100 insertions(+)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 867058845..e943d1dae 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -214,6 +214,11 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.dev_supported_ptypes_get = axgbe_dev_supported_ptypes_get,
.rx_descriptor_status = axgbe_dev_rx_descriptor_status,
.tx_descriptor_status = axgbe_dev_tx_descriptor_status,
+   .rx_queue_start   = axgbe_dev_rx_queue_start,
+   .rx_queue_stop= axgbe_dev_rx_queue_stop,
+   .tx_queue_start   = axgbe_dev_tx_queue_start,
+   .tx_queue_stop= axgbe_dev_tx_queue_stop,
+   .fw_version_get   = axgbe_dev_fw_version_get,
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
@@ -1006,6 +1011,8 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
DEV_TX_OFFLOAD_IPV4_CKSUM  |
DEV_TX_OFFLOAD_UDP_CKSUM   |
DEV_TX_OFFLOAD_TCP_CKSUM;
+   dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
+   RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
 
if (pdata->hw_feat.rss) {
dev_info->flow_type_rss_offloads = AXGBE_RSS_OFFLOAD;
diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
index 30c467db7..495e07902 100644
--- a/drivers/net/axgbe/axgbe_rxtx.c
+++ b/drivers/net/axgbe/axgbe_rxtx.c
@@ -565,6 +565,95 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
return 0;
 }
 
+int axgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
+   uint16_t queue_idx)
+{
+   struct axgbe_port *pdata =
+   (struct axgbe_port *)eth_dev->data->dev_private;
+   int ret = 0;
+
+   PMD_INIT_FUNC_TRACE();
+
+   AXGMAC_MTL_IOWRITE_BITS(pdata, queue_idx,
+   MTL_Q_TQOMR, TXQEN, MTL_Q_ENABLED);
+   eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
+
+   return ret;
+}
+
+int axgbe_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
+   uint16_t queue_idx)
+{
+   int ret = 0;
+   struct axgbe_port *pdata =
+   (struct axgbe_port *)eth_dev->data->dev_private;
+
+   PMD_INIT_FUNC_TRACE();
+
+   AXGMAC_MTL_IOWRITE_BITS(pdata, queue_idx, MTL_Q_TQOMR, TXQEN, 0);
+   eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
+
+   return ret;
+}
+
+int axgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
+   uint16_t queue_idx)
+{
+   struct axgbe_port *pdata =
+   (struct axgbe_port *)eth_dev->data->dev_private;
+   unsigned int reg_val = 0;
+   int ret = 0;
+
+   PMD_INIT_FUNC_TRACE();
+
+   reg_val |= (0x02 << (queue_idx << 1));
+   AXGMAC_IOWRITE(pdata, MAC_RQC0R, reg_val);
+   eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
+
+   return ret;
+}
+
+int axgbe_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
+   uint16_t queue_idx)
+{
+   int ret = 0;
+   struct axgbe_port *pdata =
+   (struct axgbe_port *)eth_dev->data->dev_private;
+   struct axgbe_rx_queue *rxq;
+
+   PMD_INIT_FUNC_TRACE();
+
+   AXGMAC_IOWRITE(pdata, MAC_RQC0R, 0);
+   rxq = eth_dev->data->rx_queues[queue_idx];
+
+   /* Disable Rx DMA channel */
+   AXGMAC_DMA_IOWRITE_BITS(rxq, DMA_CH_RCR, SR, 0);
+   eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
+
+   return ret;
+}
+
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size)
+{
+   struct axgbe_port *pdata;
+   struct axgbe_hw_features *hw_feat;
+   char fw_ver[32];
+
+   pdata = (struct axgbe_port *)eth_dev->data->dev_private;
+   hw_feat = &pdata->hw_feat;
+
+   if (fw_version == NULL || fw_size <= 0)
+   return -EINVAL;
+
+   snprintf(fw_version, sizeof(fw_ver), "%d.%d.%d",
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
+
+   return 0;
+}
+
 static void axgbe_txq_prepare_tx_stop(struct axgbe_port *pdata,
  unsigned int queue)
 {
diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index f2fbe92

[dpdk-dev] [PATCH v2] net/axgbe: enable IEEE 1588 PTP support

2020-06-09 Thread selwin . sebastian

From: Selwin Sebastian 

Add ethdev APIs to support PTP timestamping

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h   |   8 +
 drivers/net/axgbe/axgbe_ethdev.c   | 336 +
 drivers/net/axgbe/axgbe_ethdev.h   |  14 ++
 drivers/net/axgbe/axgbe_rxtx.c |   8 +
 drivers/net/axgbe/axgbe_rxtx_vec_sse.c |   8 +-
 5 files changed, 373 insertions(+), 1 deletion(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index f48117180..e0a0b0fbb 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -45,6 +45,7 @@
 #endif
 
 #define AXGBE_HZ   250
+#define NSEC_PER_SEC10L
 
 /* DMA register offsets */
 #define DMA_MR 0x3000
@@ -491,6 +492,8 @@
 #define MAC_TSCR_TSEVNTENA_WIDTH   1
 #define MAC_TSCR_TSINIT_INDEX  2
 #define MAC_TSCR_TSINIT_WIDTH  1
+#define MAC_TSCR_TSUPDT_INDEX  3
+#define MAC_TSCR_TSUPDT_WIDTH  1
 #define MAC_TSCR_TSIPENA_INDEX 11
 #define MAC_TSCR_TSIPENA_WIDTH 1
 #define MAC_TSCR_TSIPV4ENA_INDEX   13
@@ -505,6 +508,8 @@
 #define MAC_TSCR_TXTSSTSM_WIDTH1
 #define MAC_TSSR_TXTSC_INDEX   15
 #define MAC_TSSR_TXTSC_WIDTH   1
+#define MAC_STNUR_ADDSUB_INDEX  31
+#define MAC_STNUR_ADDSUB_WIDTH  1
 #define MAC_TXSNR_TXTSSTSMIS_INDEX 31
 #define MAC_TXSNR_TXTSSTSMIS_WIDTH 1
 #define MAC_VLANHTR_VLHT_INDEX 0
@@ -538,6 +543,7 @@
 #define MAC_VR_USERVER_INDEX   16
 #define MAC_VR_USERVER_WIDTH   8
 
+
 /* MMC register offsets */
 #define MMC_CR 0x0800
 #define MMC_RISR   0x0804
@@ -1170,6 +1176,8 @@
 #define RX_CONTEXT_DESC3_TSA_WIDTH 1
 #define RX_CONTEXT_DESC3_TSD_INDEX 6
 #define RX_CONTEXT_DESC3_TSD_WIDTH 1
+#define RX_CONTEXT_DESC3_PMT_INDEX 0
+#define RX_CONTEXT_DESC3_PMT_WIDTH 4
 
 #define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_INDEX 0
 #define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_WIDTH 1
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index 867058845..a19bfcb0e 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -8,6 +8,7 @@
 #include "axgbe_common.h"
 #include "axgbe_phy.h"
 #include "axgbe_regs.h"
+#include "rte_time.h"
 
 static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev);
 static int eth_axgbe_dev_uninit(struct rte_eth_dev *eth_dev);
@@ -74,6 +75,31 @@ static void axgbe_txq_info_get(struct rte_eth_dev *dev, 
uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
 const uint32_t *axgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 
+static int
+axgbe_timesync_enable(struct rte_eth_dev *dev);
+static int
+axgbe_timesync_disable(struct rte_eth_dev *dev);
+static int
+axgbe_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+   struct timespec *timestamp, uint32_t flags);
+static int
+axgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+   struct timespec *timestamp);
+static int
+axgbe_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+static int
+axgbe_timesync_read_time(struct rte_eth_dev *dev,
+   struct timespec *timestamp);
+static int
+axgbe_timesync_write_time(struct rte_eth_dev *dev,
+   const struct timespec *timestamp);
+static void
+axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec,
+   unsigned int nsec);
+static void
+axgbe_update_tstamp_addend(struct axgbe_port *pdata,
+   unsigned int addend);
+
 struct axgbe_xstats {
char name[RTE_ETH_XSTATS_NAME_SIZE];
int offset;
@@ -214,6 +240,14 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.dev_supported_ptypes_get = axgbe_dev_supported_ptypes_get,
.rx_descriptor_status = axgbe_dev_rx_descriptor_status,
.tx_descriptor_status = axgbe_dev_tx_descriptor_status,
+   .timesync_enable  = axgbe_timesync_enable,
+   .timesync_disable = axgbe_timesync_disable,
+   .timesync_read_rx_timestamp   = axgbe_timesync_read_rx_timestamp,
+   .timesync_read_tx_timestamp   = axgbe_timesync_read_tx_timestamp,
+   .timesync_adjust_time = axgbe_timesync_adjust_time,
+   .timesync_read_time   = axgbe_timesync_read_time,
+   .timesync_write_time  = axgbe_timesync_write_time,
+
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
@@ -1255,6 +1289,308 @@ axgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
return NULL;
 }
 
+static void
+axgbe_update_tstamp_time(struct axgbe_port *pdata,
+   unsigned int sec, unsigned int nsec, int addsub)
+{
+   unsigned int count = 100;
+   uint32_t sub_val = 0;
+

[dpdk-dev] [PATCH v1] net/axgbe: Add a HW quirk for register definitions

2019-12-10 Thread Selwin Sebastian

V1000/R1000 processors are using the same PCI ids for the network
device but has altered register definitions for determining the
window settings for the indirect PCS access.Add support to check
for this hardware and if found use the new register values

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 18 +++---
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT   0x03fc
 #define PCS_V2_WINDOW_DEF  0x9060
 #define PCS_V2_WINDOW_SELECT   0x9064
+#define PCS_V2_RV_WINDOW_DEF   0x1060
+#define PCS_V2_RV_WINDOW_SELECT0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..25e182b8d 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -31,6 +31,7 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 #define AMD_PCI_VENDOR_ID   0x1022
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
+extern struct rte_pci_bus rte_pci_bus;
 
 int axgbe_logtype_init;
 int axgbe_logtype_driver;
@@ -585,6 +586,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
struct rte_pci_device *pci_dev;
uint32_t reg, mac_lo, mac_hi;
int ret;
+   struct rte_pci_device *pdev;
 
eth_dev->dev_ops = &axgbe_eth_dev_ops;
eth_dev->rx_pkt_burst = &axgbe_recv_pkts;
@@ -605,6 +607,17 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
pdata->pci_dev = pci_dev;
 
+   pdev = TAILQ_FIRST(&rte_pci_bus.device_list);
+
+   if (pdev->id.vendor_id == AMD_PCI_VENDOR_ID &&
+   pdev->id.device_id == 0x15d0) {
+   pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+   } else {
+   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+   }
+
pdata->xgmac_regs =
(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +633,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
pdata->vdata = &axgbe_v2b;
 
/* Configure the PCS indirect addressing support */
-   reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+   reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
pdata->xpcs_window <<= 6;
pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-   pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-   pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+
PMD_INIT_LOG(DEBUG,
 "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
 pdata->xpcs_window_size, pdata->xpcs_window_mask);
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/axgbe: add support for reading FW version

2020-12-28 Thread selwin . sebastian

From: Selwin Sebastian 

Added support for fw_version_get API

Signed-off-by: Selwin Sebastian 
---
 doc/guides/nics/features/axgbe.ini |  1 +
 drivers/net/axgbe/axgbe_ethdev.c   |  1 +
 drivers/net/axgbe/axgbe_rxtx.c | 25 +
 drivers/net/axgbe/axgbe_rxtx.h |  3 +++
 4 files changed, 30 insertions(+)

diff --git a/doc/guides/nics/features/axgbe.ini 
b/doc/guides/nics/features/axgbe.ini
index 34df0d1ee..3adc5639f 100644
--- a/doc/guides/nics/features/axgbe.ini
+++ b/doc/guides/nics/features/axgbe.ini
@@ -17,6 +17,7 @@ CRC offload  = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
 Basic stats  = Y
+FW version   = Y
 Linux UIO= Y
 x86-32   = Y
 x86-64   = Y
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index cfe6aba73..1982c6a8e 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -257,6 +257,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.timesync_adjust_time = axgbe_timesync_adjust_time,
.timesync_read_time   = axgbe_timesync_read_time,
.timesync_write_time  = axgbe_timesync_write_time,
+   .fw_version_get = axgbe_dev_fw_version_get,
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
index 032e3cebc..3298a294e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.c
+++ b/drivers/net/axgbe/axgbe_rxtx.c
@@ -571,6 +571,31 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
return 0;
 }
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size)
+{
+   struct axgbe_port *pdata;
+   struct axgbe_hw_features *hw_feat;
+   int ret;
+
+   pdata = (struct axgbe_port *)eth_dev->data->dev_private;
+   hw_feat = &pdata->hw_feat;
+
+   if (fw_version == NULL || fw_size <= 0)
+   return -EINVAL;
+
+   ret = snprintf(fw_version, fw_size, "%d.%d.%d",
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
+   ret += 1; /* add the size of '\0' */
+
+   if (fw_size < (u32)ret)
+   return ret;
+   else
+   return 0;
+}
+
 static void axgbe_txq_prepare_tx_stop(struct axgbe_port *pdata,
  unsigned int queue)
 {
diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index f2fbe9299..c2b11bb0e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -162,6 +162,9 @@ void axgbe_dev_disable_tx(struct rte_eth_dev *dev);
 int axgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int axgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size);
+
 uint16_t axgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 uint16_t nb_pkts);
 uint16_t axgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/axgbe: add support for reading FW version

2020-12-28 Thread selwin . sebastian

From: Selwin Sebastian 

Added support for fw_version_get API

Signed-off-by: Selwin Sebastian 
---
 doc/guides/nics/features/axgbe.ini |  1 +
 drivers/net/axgbe/axgbe_ethdev.c   |  1 +
 drivers/net/axgbe/axgbe_rxtx.c | 25 +
 drivers/net/axgbe/axgbe_rxtx.h |  3 +++
 4 files changed, 30 insertions(+)

diff --git a/doc/guides/nics/features/axgbe.ini 
b/doc/guides/nics/features/axgbe.ini
index 34df0d1ee..3adc5639f 100644
--- a/doc/guides/nics/features/axgbe.ini
+++ b/doc/guides/nics/features/axgbe.ini
@@ -17,6 +17,7 @@ CRC offload  = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
 Basic stats  = Y
+FW version   = Y
 Linux UIO= Y
 x86-32   = Y
 x86-64   = Y
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index cfe6aba73..1982c6a8e 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -257,6 +257,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.timesync_adjust_time = axgbe_timesync_adjust_time,
.timesync_read_time   = axgbe_timesync_read_time,
.timesync_write_time  = axgbe_timesync_write_time,
+   .fw_version_get = axgbe_dev_fw_version_get,
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
index 032e3cebc..3298a294e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.c
+++ b/drivers/net/axgbe/axgbe_rxtx.c
@@ -571,6 +571,31 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
return 0;
 }
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size)
+{
+   struct axgbe_port *pdata;
+   struct axgbe_hw_features *hw_feat;
+   int ret;
+
+   pdata = (struct axgbe_port *)eth_dev->data->dev_private;
+   hw_feat = &pdata->hw_feat;
+
+   if (fw_version == NULL || fw_size <= 0)
+   return -EINVAL;
+
+   ret = snprintf(fw_version, fw_size, "%d.%d.%d",
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
+   ret += 1; /* add the size of '\0' */
+
+   if (fw_size < (u32)ret)
+   return ret;
+   else
+   return 0;
+}
+
 static void axgbe_txq_prepare_tx_stop(struct axgbe_port *pdata,
  unsigned int queue)
 {
diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index f2fbe9299..c2b11bb0e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -162,6 +162,9 @@ void axgbe_dev_disable_tx(struct rte_eth_dev *dev);
 int axgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int axgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size);
+
 uint16_t axgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 uint16_t nb_pkts);
 uint16_t axgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
-- 
2.17.1

[dpdk-dev] [PATCH v3] net/axgbe: add support for reading FW version

2021-01-06 Thread selwin . sebastian

From: Selwin Sebastian 

Added support for fw_version_get API

Signed-off-by: Selwin Sebastian 
---
 doc/guides/nics/features/axgbe.ini |  1 +
 drivers/net/axgbe/axgbe_ethdev.c   |  1 +
 drivers/net/axgbe/axgbe_rxtx.c | 28 
 drivers/net/axgbe/axgbe_rxtx.h |  3 +++
 4 files changed, 33 insertions(+)

diff --git a/doc/guides/nics/features/axgbe.ini 
b/doc/guides/nics/features/axgbe.ini
index 34df0d1ee..3adc5639f 100644
--- a/doc/guides/nics/features/axgbe.ini
+++ b/doc/guides/nics/features/axgbe.ini
@@ -17,6 +17,7 @@ CRC offload  = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
 Basic stats  = Y
+FW version   = Y
 Linux UIO= Y
 x86-32   = Y
 x86-64   = Y
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index cfe6aba73..1982c6a8e 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -257,6 +257,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.timesync_adjust_time = axgbe_timesync_adjust_time,
.timesync_read_time   = axgbe_timesync_read_time,
.timesync_write_time  = axgbe_timesync_write_time,
+   .fw_version_get = axgbe_dev_fw_version_get,
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
index 032e3cebc..c10127a02 100644
--- a/drivers/net/axgbe/axgbe_rxtx.c
+++ b/drivers/net/axgbe/axgbe_rxtx.c
@@ -571,6 +571,34 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
return 0;
 }
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size)
+{
+   struct axgbe_port *pdata;
+   struct axgbe_hw_features *hw_feat;
+   int ret;
+
+   pdata = (struct axgbe_port *)eth_dev->data->dev_private;
+   hw_feat = &pdata->hw_feat;
+
+   if (fw_version == NULL)
+   return -EINVAL;
+
+   ret = snprintf(fw_version, fw_size, "%d.%d.%d",
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
+   if (ret < 0)
+   return -EINVAL;
+
+   ret += 1; /* add the size of '\0' */
+
+   if (fw_size < (size_t)ret)
+   return ret;
+   else
+   return 0;
+}
+
 static void axgbe_txq_prepare_tx_stop(struct axgbe_port *pdata,
  unsigned int queue)
 {
diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index f2fbe9299..c2b11bb0e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -162,6 +162,9 @@ void axgbe_dev_disable_tx(struct rte_eth_dev *dev);
 int axgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int axgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size);
+
 uint16_t axgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 uint16_t nb_pkts);
 uint16_t axgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
-- 
2.17.1

[dpdk-dev] [PATCH v1] net/axgbe: add support for reading FW version

2020-11-18 Thread selwin . sebastian

From: Selwin Sebastian 

Added support for fw_version_get API

Signed-off-by: Selwin Sebastian 
---
 doc/guides/nics/features/axgbe.ini |  1 +
 drivers/net/axgbe/axgbe_ethdev.c   |  1 +
 drivers/net/axgbe/axgbe_rxtx.c | 21 +
 drivers/net/axgbe/axgbe_rxtx.h |  3 +++
 4 files changed, 26 insertions(+)

diff --git a/doc/guides/nics/features/axgbe.ini 
b/doc/guides/nics/features/axgbe.ini
index 34df0d1ee..3adc5639f 100644
--- a/doc/guides/nics/features/axgbe.ini
+++ b/doc/guides/nics/features/axgbe.ini
@@ -17,6 +17,7 @@ CRC offload  = Y
 L3 checksum offload  = Y
 L4 checksum offload  = Y
 Basic stats  = Y
+FW version   = Y
 Linux UIO= Y
 x86-32   = Y
 x86-64   = Y
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index cfe6aba73..1982c6a8e 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -257,6 +257,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.timesync_adjust_time = axgbe_timesync_adjust_time,
.timesync_read_time   = axgbe_timesync_read_time,
.timesync_write_time  = axgbe_timesync_write_time,
+   .fw_version_get = axgbe_dev_fw_version_get,
 };
 
 static int axgbe_phy_reset(struct axgbe_port *pdata)
diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
index 032e3cebc..227be33fa 100644
--- a/drivers/net/axgbe/axgbe_rxtx.c
+++ b/drivers/net/axgbe/axgbe_rxtx.c
@@ -571,6 +571,27 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
return 0;
 }
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size)
+{
+   struct axgbe_port *pdata;
+   struct axgbe_hw_features *hw_feat;
+   char fw_ver[32];
+
+   pdata = (struct axgbe_port *)eth_dev->data->dev_private;
+   hw_feat = &pdata->hw_feat;
+
+   if (fw_version == NULL || fw_size <= 0)
+   return -EINVAL;
+
+   snprintf(fw_version, sizeof(fw_ver), "%d.%d.%d",
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
+   AXGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
+
+   return 0;
+}
+
 static void axgbe_txq_prepare_tx_stop(struct axgbe_port *pdata,
  unsigned int queue)
 {
diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index f2fbe9299..c2b11bb0e 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -162,6 +162,9 @@ void axgbe_dev_disable_tx(struct rte_eth_dev *dev);
 int axgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int axgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+int axgbe_dev_fw_version_get(struct rte_eth_dev *eth_dev,
+   char *fw_version, size_t fw_size);
+
 uint16_t axgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 uint16_t nb_pkts);
 uint16_t axgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
-- 
2.17.1

[dpdk-dev] [PATCH v1] net/axgbe: add support for device reset

2020-11-19 Thread selwin . sebastian

From: Selwin Sebastian 

Added support for device reset

Signed-off-by: Selwin Sebastian 
---
 drivers/net/axgbe/axgbe_ethdev.c | 75 
 1 file changed, 56 insertions(+), 19 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index cfe6aba73..4c6366da8 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -16,6 +16,7 @@ static int  axgbe_dev_start(struct rte_eth_dev *dev);
 static int  axgbe_dev_stop(struct rte_eth_dev *dev);
 static void axgbe_dev_interrupt_handler(void *param);
 static int axgbe_dev_close(struct rte_eth_dev *dev);
+static int axgbe_dev_reset(struct rte_eth_dev *dev);
 static int axgbe_dev_promiscuous_enable(struct rte_eth_dev *dev);
 static int axgbe_dev_promiscuous_disable(struct rte_eth_dev *dev);
 static int axgbe_dev_allmulticast_enable(struct rte_eth_dev *dev);
@@ -215,6 +216,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = {
.dev_start= axgbe_dev_start,
.dev_stop = axgbe_dev_stop,
.dev_close= axgbe_dev_close,
+   .dev_reset= axgbe_dev_reset,
.promiscuous_enable   = axgbe_dev_promiscuous_enable,
.promiscuous_disable  = axgbe_dev_promiscuous_disable,
.allmulticast_enable  = axgbe_dev_allmulticast_enable,
@@ -618,6 +620,20 @@ axgbe_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
return 0;
 }
 
+static int
+axgbe_dev_reset(struct rte_eth_dev *dev)
+{
+   int ret = 0;
+
+   ret = axgbe_dev_close(dev);
+   if (ret)
+   return ret;
+
+   ret = eth_axgbe_dev_init(dev);
+
+   return ret;
+}
+
 static void
 axgbe_dev_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 {
@@ -1104,22 +1120,33 @@ axgbe_dev_stats_get(struct rte_eth_dev *dev,
 
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
-   stats->q_ipackets[i] = rxq->pkts;
-   stats->ipackets += rxq->pkts;
-   stats->q_ibytes[i] = rxq->bytes;
-   stats->ibytes += rxq->bytes;
-   stats->rx_nombuf += rxq->rx_mbuf_alloc_failed;
-   stats->q_errors[i] = rxq->errors + rxq->rx_mbuf_alloc_failed;
-   stats->ierrors += rxq->errors;
+   if (rxq) {
+   stats->q_ipackets[i] = rxq->pkts;
+   stats->ipackets += rxq->pkts;
+   stats->q_ibytes[i] = rxq->bytes;
+   stats->ibytes += rxq->bytes;
+   stats->rx_nombuf += rxq->rx_mbuf_alloc_failed;
+   stats->q_errors[i] = rxq->errors
+   + rxq->rx_mbuf_alloc_failed;
+   stats->ierrors += rxq->errors;
+   } else {
+   PMD_DRV_LOG(DEBUG, "Rx queue not setup for port %d\n",
+   dev->data->port_id);
+   }
}
 
for (i = 0; i < dev->data->nb_tx_queues; i++) {
txq = dev->data->tx_queues[i];
-   stats->q_opackets[i] = txq->pkts;
-   stats->opackets += txq->pkts;
-   stats->q_obytes[i] = txq->bytes;
-   stats->obytes += txq->bytes;
-   stats->oerrors += txq->errors;
+   if (txq) {
+   stats->q_opackets[i] = txq->pkts;
+   stats->opackets += txq->pkts;
+   stats->q_obytes[i] = txq->bytes;
+   stats->obytes += txq->bytes;
+   stats->oerrors += txq->errors;
+   } else {
+   PMD_DRV_LOG(DEBUG, "Tx queue not setup for port %d\n",
+   dev->data->port_id);
+   }
}
 
return 0;
@@ -1134,16 +1161,26 @@ axgbe_dev_stats_reset(struct rte_eth_dev *dev)
 
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
-   rxq->pkts = 0;
-   rxq->bytes = 0;
-   rxq->errors = 0;
-   rxq->rx_mbuf_alloc_failed = 0;
+   if (rxq) {
+   rxq->pkts = 0;
+   rxq->bytes = 0;
+   rxq->errors = 0;
+   rxq->rx_mbuf_alloc_failed = 0;
+   } else {
+   PMD_DRV_LOG(DEBUG, "Rx queue not setup for port %d\n",
+   dev->data->port_id);
+   }
}
for (i = 0; i < dev->data->nb_tx_queues; i++) {
txq = dev->data->tx_queues[i];
-   txq->pkts = 0

[PATCH v2] net/axgbe: use CPUID to identify cpu

[PATCH v3] net/axgbe: use CPUID to identify cpu

[PATCH v1] net/axgbe: use CPUID to identify cpu

[PATCH v1] maintainers: take maintainership of AMD axgbe driver

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

[dpdk-dev] [RFC PATCH v2] raw/ptdma: introduce ptdma driver

[dpdk-dev] [PATCH v1] crypto/ccp: add support for new CCP device ID

[dpdk-dev] [PATCH v1] crypto/ccp: aes-gcm driver bug fix

[dpdk-dev] [PATCH v2] net/axgbe: add a HW quirk for register definitions

[dpdk-dev] [PATCH v3] drivers: add a HW quirk for register definitions

[dpdk-dev] [PATCH v4] net/axgbe: add a HW quirk for register definitions

[dpdk-dev] [PATCH v5] net/axgbe: add a HW quirk for register definitions

[dpdk-dev] [PATCH v1] net/axgbe: enable IEEE 1588 PTP support for axgbe

[dpdk-dev] [PATCH v1] net/axgbe: add support for utility APIs

[dpdk-dev] [PATCH v2] net/axgbe: enable IEEE 1588 PTP support

[dpdk-dev] [PATCH v1] net/axgbe: Add a HW quirk for register definitions

[dpdk-dev] [PATCH v2] net/axgbe: add support for reading FW version

[dpdk-dev] [PATCH v2] net/axgbe: add support for reading FW version

[dpdk-dev] [PATCH v3] net/axgbe: add support for reading FW version

[dpdk-dev] [PATCH v1] net/axgbe: add support for reading FW version

[dpdk-dev] [PATCH v1] net/axgbe: add support for device reset

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