[dpdk-dev] [PATCH v1] raw/ifpga: fix ifpga device name format
The device name format used in ifpga_rawdev_create() was changed to
"IFPGA:%02x:%02x.%x", but the format used in ifpga_rawdev_destroy()
was left as "IFPGA:%x:%02x.%x", it should be changed synchronously.
Fixes: 9c006c45d0c5 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/ifpga_rawdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index d9a46ef915..f591a87b49 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1551,7 +1551,7 @@ ifpga_rawdev_destroy(struct rte_pci_device *pci_dev)
}
memset(name, 0, sizeof(name));
- snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%x:%02x.%x",
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%02x:%02x.%x",
pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function);
IFPGA_RAWDEV_PMD_INFO("Closing %s on NUMA node %d",
--
2.29.2
[dpdk-dev] [PATCH v2] raw/ifpga: fix ifpga device name format
The device name format used in ifpga_rawdev_create() was changed to
"IFPGA:%02x:%02x.%x", but the format used in ifpga_rawdev_destroy()
was left as "IFPGA:%x:%02x.%x", it should be changed synchronously.
To prevent further similar errors, macro "IFPGA_RAWDEV_NAME_FMT" is
defined to replace this format string.
Fixes: 9c006c45d0c5 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
v2: define a macro to replace the format string
---
drivers/raw/ifpga/ifpga_rawdev.c | 4 ++--
drivers/raw/ifpga/ifpga_rawdev.h | 2 ++
drivers/raw/ifpga/rte_pmd_ifpga.c | 2 +-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index f2551be821..7ccebfa3fa 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1448,7 +1448,7 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev,
}
memset(name, 0, sizeof(name));
- snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%02x:%02x.%x",
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function);
IFPGA_RAWDEV_PMD_INFO("Init %s on NUMA node %d", name, rte_socket_id());
@@ -1551,7 +1551,7 @@ ifpga_rawdev_destroy(struct rte_pci_device *pci_dev)
}
memset(name, 0, sizeof(name));
- snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%x:%02x.%x",
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function);
IFPGA_RAWDEV_PMD_INFO("Closing %s on NUMA node %d",
diff --git a/drivers/raw/ifpga/ifpga_rawdev.h b/drivers/raw/ifpga/ifpga_rawdev.h
index 9bbe9a4278..61c8366707 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.h
+++ b/drivers/raw/ifpga/ifpga_rawdev.h
@@ -7,6 +7,8 @@
extern int ifpga_rawdev_logtype;
+#define IFPGA_RAWDEV_NAME_FMT "IFPGA:%02x:%02x.%x"
+
#define IFPGA_RAWDEV_PMD_LOG(level, fmt, args...) \
rte_log(RTE_LOG_ ## level, ifpga_rawdev_logtype, "%s(): " fmt "\n", \
__func__, ##args)
diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.c
b/drivers/raw/ifpga/rte_pmd_ifpga.c
index 6e23a2581a..23146432c2 100644
--- a/drivers/raw/ifpga/rte_pmd_ifpga.c
+++ b/drivers/raw/ifpga/rte_pmd_ifpga.c
@@ -34,7 +34,7 @@ rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t
*dev_id)
return -EINVAL;
}
- snprintf(rdev_name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%02x:%02x.%x",
+ snprintf(rdev_name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
addr.bus, addr.devid, addr.function);
rdev = rte_rawdev_pmd_get_named_dev(rdev_name);
if (!rdev) {
--
2.29.2
[dpdk-dev] [PATCH v2] raw/ifpga: fix ifpga device name format
The device name format used in ifpga_rawdev_create() was changed to
"IFPGA:%02x:%02x.%x", but the format used in ifpga_rawdev_destroy()
was left as "IFPGA:%x:%02x.%x", it should be changed synchronously.
To prevent further similar errors, macro "IFPGA_RAWDEV_NAME_FMT" is
defined to replace this format string.
Fixes: 9c006c45d0c5 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
v2: define a macro to replace the format string
---
drivers/raw/ifpga/ifpga_rawdev.c | 4 ++--
drivers/raw/ifpga/ifpga_rawdev.h | 2 ++
drivers/raw/ifpga/rte_pmd_ifpga.c | 2 +-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index f2551be821..7ccebfa3fa 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1448,7 +1448,7 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev,
}
memset(name, 0, sizeof(name));
- snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%02x:%02x.%x",
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function);
IFPGA_RAWDEV_PMD_INFO("Init %s on NUMA node %d", name, rte_socket_id());
@@ -1551,7 +1551,7 @@ ifpga_rawdev_destroy(struct rte_pci_device *pci_dev)
}
memset(name, 0, sizeof(name));
- snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%x:%02x.%x",
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function);
IFPGA_RAWDEV_PMD_INFO("Closing %s on NUMA node %d",
diff --git a/drivers/raw/ifpga/ifpga_rawdev.h b/drivers/raw/ifpga/ifpga_rawdev.h
index 9bbe9a4278..61c8366707 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.h
+++ b/drivers/raw/ifpga/ifpga_rawdev.h
@@ -7,6 +7,8 @@
extern int ifpga_rawdev_logtype;
+#define IFPGA_RAWDEV_NAME_FMT "IFPGA:%02x:%02x.%x"
+
#define IFPGA_RAWDEV_PMD_LOG(level, fmt, args...) \
rte_log(RTE_LOG_ ## level, ifpga_rawdev_logtype, "%s(): " fmt "\n", \
__func__, ##args)
diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.c
b/drivers/raw/ifpga/rte_pmd_ifpga.c
index 6e23a2581a..23146432c2 100644
--- a/drivers/raw/ifpga/rte_pmd_ifpga.c
+++ b/drivers/raw/ifpga/rte_pmd_ifpga.c
@@ -34,7 +34,7 @@ rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t
*dev_id)
return -EINVAL;
}
- snprintf(rdev_name, RTE_RAWDEV_NAME_MAX_LEN, "IFPGA:%02x:%02x.%x",
+ snprintf(rdev_name, RTE_RAWDEV_NAME_MAX_LEN, IFPGA_RAWDEV_NAME_FMT,
addr.bus, addr.devid, addr.function);
rdev = rte_rawdev_pmd_get_named_dev(rdev_name);
if (!rdev) {
--
2.29.2
[PATCH v5 0/5] Support OFS card
Changes from v4: 1. update afu driver name in diagram in ifpga doc. Wei Huang (5): raw/ifpga: remove experimental tag from ifpga APIs raw/ifpga: remove vdev when ifpga is closed raw/ifpga: unregister interrupt in ifpga close function raw/ifpga: support ofs card probe guides/rawdevs: add description of ofs in ifpga doc doc/guides/rawdevs/ifpga.rst | 105 - drivers/raw/ifpga/base/ifpga_api.c | 28 +- drivers/raw/ifpga/base/ifpga_defines.h | 1 + drivers/raw/ifpga/base/ifpga_enumerate.c | 680 ++--- drivers/raw/ifpga/base/ifpga_enumerate.h | 2 + drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +- drivers/raw/ifpga/base/ifpga_hw.h | 2 + drivers/raw/ifpga/base/opae_hw_api.c | 2 +- drivers/raw/ifpga/base/opae_hw_api.h | 2 + drivers/raw/ifpga/ifpga_rawdev.c | 241 ++ drivers/raw/ifpga/ifpga_rawdev.h | 8 + drivers/raw/ifpga/rte_pmd_ifpga.h | 48 -- drivers/raw/ifpga/version.map | 7 +- 13 files changed, 845 insertions(+), 299 deletions(-) -- 1.8.3.1
[PATCH v5 1/5] raw/ifpga: remove experimental tag from ifpga APIs
These APIs are introduced in DPDK 21.05 and have been tested in several release, experimental tag can be formally removed. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang Reviewed-by: Rosen Xu --- drivers/raw/ifpga/rte_pmd_ifpga.h | 48 --- drivers/raw/ifpga/version.map | 7 ++ 2 files changed, 2 insertions(+), 53 deletions(-) diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.h b/drivers/raw/ifpga/rte_pmd_ifpga.h index 47d66ba..3fa5d34 100644 --- a/drivers/raw/ifpga/rte_pmd_ifpga.h +++ b/drivers/raw/ifpga/rte_pmd_ifpga.h @@ -68,9 +68,6 @@ } rte_pmd_ifpga_phy_info; /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' * * @param pci_addr @@ -82,14 +79,10 @@ * - (-EINVAL) if bad parameter. * - (-ENODEV) if FPGA is not probed by ifpga driver. */ -__rte_experimental int rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get current RSU status of the specified Intel FPGA device * * @param dev_id @@ -103,14 +96,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Set current RSU status of the specified Intel FPGA device * * @param dev_id @@ -124,14 +113,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get FPGA property of specified Intel FPGA device * * @param dev_id @@ -144,14 +129,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PHY information of specified Intel FPGA device * * @param dev_id @@ -164,14 +145,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Update image flash of specified Intel FPGA device * * @param dev_id @@ -187,15 +164,11 @@ * - (-EBUSY) if FPGA is updating or rebooting. * - (-EIO) if failed to open image file. */ -__rte_experimental int rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, uint64_t *status); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Stop flash update of specified Intel FPGA device * * @param dev_id @@ -208,14 +181,10 @@ * - (-EINVAL) if bad parameter. * - (-EAGAIN) if failed with force. */ -__rte_experimental int rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Check current Intel FPGA status and change it to reboot status if it is idle * * @param dev_id @@ -226,14 +195,10 @@ * - (-ENOMEM) if share data is not initialized. * - (-EBUSY) if FPGA is updating or rebooting. */ -__rte_experimental int rte_pmd_ifpga_reboot_try(uint16_t dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Trigger full reconfiguration of specified Intel FPGA device * * @param dev_id @@ -252,28 +217,20 @@ * - (-EINVAL) if bad parameter. * - (-EBUSY) if failed to access BMC register. */ -__rte_experimental int rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PCI bus the Intel FPGA driver register to * * @return * - (valid pointer) if successful. * - (NULL) if the Intel FPGA driver is not registered to any PCI bus. */ -__rte_experimental const struct rte_pci_bus * rte_pmd_ifpga_get_pci_bus(void); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Perform PR (partial reconfiguration) on specified Intel FPGA device * * @param dev_id @@ -287,17 +244,12 @@ * - (-EINVAL) if bad parameter or operation failed. * - (-ENOMEM) if failed to allocate memory. */ -__rte_experimental int rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const
[PATCH v5 2/5] raw/ifpga: remove vdev when ifpga is closed
Virtual devices created on ifpga raw device will not be removed
when ifpga device has closed. To avoid resource leak problem,
this patch introduces an ifpga virtual device remove function,
virtual devices will be destroyed after the ifpga raw device closed.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: update commit log with Tianfei's comment
---
v3: replace constant with PCI_PRI_STR_SIZE per Rosen's comment
---
drivers/raw/ifpga/ifpga_rawdev.c | 166 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 8 ++
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 6d4117c..fe3fc43 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -134,6 +134,8 @@ struct ifpga_rawdev *
for (i = 0; i < IFPGA_MAX_IRQ; i++)
dev->intr_handle[i] = NULL;
dev->poll_enabled = 0;
+ for (i = 0; i < IFPGA_MAX_VDEV; i++)
+ dev->vdev_name[i] = NULL;
return dev;
}
@@ -736,10 +738,22 @@ static int set_surprise_link_check_aer(
static int
ifpga_rawdev_close(struct rte_rawdev *dev)
{
+ struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ char *vdev_name = NULL;
+ int i = 0;
if (dev) {
- ifpga_monitor_stop_func(ifpga_rawdev_get(dev));
+ ifpga_rdev = ifpga_rawdev_get(dev);
+ if (ifpga_rdev) {
+ for (i = 0; i < IFPGA_MAX_VDEV; i++) {
+ vdev_name = ifpga_rdev->vdev_name[i];
+ if (vdev_name)
+ rte_vdev_uninit(vdev_name);
+ }
+ ifpga_monitor_stop_func(ifpga_rdev);
+ ifpga_rdev->rawdev = NULL;
+ }
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
opae_adapter_destroy(adapter);
@@ -1638,8 +1652,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
return -EINVAL;
}
dev = ifpga_rawdev_get(rawdev);
- if (dev)
- dev->rawdev = NULL;
adapter = ifpga_rawdev_get_priv(rawdev);
if (!adapter)
@@ -1714,73 +1726,118 @@ static int ifpga_rawdev_get_string_arg(const char *key
__rte_unused,
return 0;
}
+
static int
-ifpga_cfg_probe(struct rte_vdev_device *dev)
+ifpga_vdev_parse_devargs(struct rte_devargs *devargs,
+ struct ifpga_vdev_args *args)
{
- struct rte_devargs *devargs;
- struct rte_kvargs *kvlist = NULL;
- struct rte_rawdev *rawdev = NULL;
- struct ifpga_rawdev *ifpga_dev;
- int port;
+ struct rte_kvargs *kvlist;
char *name = NULL;
- char dev_name[RTE_RAWDEV_NAME_MAX_LEN];
- int ret = -1;
+ int port = 0;
+ int ret = -EINVAL;
- devargs = dev->device.devargs;
+ if (!devargs || !args)
+ return ret;
kvlist = rte_kvargs_parse(devargs->args, valid_args);
if (!kvlist) {
- IFPGA_RAWDEV_PMD_LOG(ERR, "error when parsing param");
- goto end;
+ IFPGA_RAWDEV_PMD_ERR("error when parsing devargs");
+ return ret;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_NAME) == 1) {
if (rte_kvargs_process(kvlist, IFPGA_ARG_NAME,
- &ifpga_rawdev_get_string_arg,
- &name) < 0) {
+ &ifpga_rawdev_get_string_arg, &name) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
-IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
+ } else {
+ strlcpy(args->bdf, name, sizeof(args->bdf));
+ rte_free(name);
}
} else {
IFPGA_RAWDEV_PMD_ERR("arg %s is mandatory for ifpga bus",
- IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_PORT) == 1) {
- if (rte_kvargs_process(kvlist,
- IFPGA_ARG_PORT,
- &rte_ifpga_get_integer32_arg,
- &port) < 0) {
+ if (rte_kvargs_process(kvlist, IFPGA_ARG_PORT,
+ &rte_ifpga_get_integer32_arg, &port) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
[PATCH v5 3/5] raw/ifpga: unregister interrupt in ifpga close function
There is an API rte_pmd_ifpga_cleanup provided by ifpga driver to
free the software resource used by ifpga card. The function call
of rte_pmd_ifpga_cleanup is list below.
rte_pmd_ifpga_cleanup()
ifpga_rawdev_cleanup()
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
The interrupts are unregistered in ifpga_rawdev_destroy instead of
ifpga_rawdev_close function, so rte_pmd_ifpga_cleanup cannot free
interrupt resource as expected.
To fix such issue, interrupt unregistration is moved from
ifpga_rawdev_destroy to ifpga_rawdev_close function. The change of
function call of ifpga_rawdev_destroy is as below.
ifpga_rawdev_destroy()
ifpga_unregister_msix_irq() // removed
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: update commit log with Tianfei's comment
---
v3: update commit log with more explanations about the function call
---
drivers/raw/ifpga/ifpga_rawdev.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fe3fc43..94df56c 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -78,6 +78,7 @@ static int set_surprise_link_check_aer(
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
int start, uint32_t cap);
static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
+static void fme_interrupt_handler(void *param);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
@@ -740,8 +741,9 @@ static int set_surprise_link_check_aer(
{
struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
char *vdev_name = NULL;
- int i = 0;
+ int i, ret = 0;
if (dev) {
ifpga_rdev = ifpga_rawdev_get(dev);
@@ -756,12 +758,19 @@ static int set_surprise_link_check_aer(
}
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
+ mgr = opae_adapter_get_mgr(adapter);
+ if (ifpga_rdev && mgr) {
+ if (ifpga_unregister_msix_irq(ifpga_rdev,
+ IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr) < 0)
+ ret = -EINVAL;
+ }
opae_adapter_destroy(adapter);
opae_adapter_data_free(adapter->data);
}
}
- return dev ? 0:1;
+ return ret;
}
static int
@@ -1629,9 +1638,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
int ret;
struct rte_rawdev *rawdev;
char name[RTE_RAWDEV_NAME_MAX_LEN];
- struct opae_adapter *adapter;
- struct opae_manager *mgr;
- struct ifpga_rawdev *dev;
if (!pci_dev) {
IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
@@ -1651,19 +1657,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
IFPGA_RAWDEV_PMD_ERR("Invalid device name (%s)", name);
return -EINVAL;
}
- dev = ifpga_rawdev_get(rawdev);
-
- adapter = ifpga_rawdev_get_priv(rawdev);
- if (!adapter)
- return -ENODEV;
-
- mgr = opae_adapter_get_mgr(adapter);
- if (!mgr)
- return -ENODEV;
-
- if (ifpga_unregister_msix_irq(dev, IFPGA_FME_IRQ, 0,
- fme_interrupt_handler, mgr) < 0)
- return -EINVAL;
/* rte_rawdev_close is called by pmd_release */
ret = rte_rawdev_pmd_release(rawdev);
--
1.8.3.1
[PATCH v5 4/5] raw/ifpga: support ofs card probe
PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.
Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device
Feature List) starts from BAR0 by default, port DFL location is indicated
in PORTn_OFFSET register in FME. In OFS implementation, FME DFL and port
DFL location can be defined individually in PCIe VSEC (Vendor Specific
Extended Capabilities). In this patch, DFL definition is searched in VSEC,
the legacy DFL is used only when DFL VSEC is not present.
In original DFL enumeration process, AFU is expected to locate in port DFL,
but this is not the case in OFS implementation. In this patch, enumeration
can search AFU in any PF/VF which has no FME and port.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: fix build error in UB2004-32
---
v3: update commit log with Tianfei's comment, treat 7 as special BAR index
---
v4: fix typo and coding style issue
---
drivers/raw/ifpga/base/ifpga_api.c | 28 +-
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_enumerate.c | 680 ++---
drivers/raw/ifpga/base/ifpga_enumerate.h | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +-
drivers/raw/ifpga/base/ifpga_hw.h | 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 2 +-
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/ifpga_rawdev.c | 48 +-
9 files changed, 591 insertions(+), 192 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 4610ef1..f19cc26 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -13,15 +13,22 @@
static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
struct uuid *uuid)
{
- struct opae_bridge *br = acc->br;
- struct ifpga_port_hw *port;
+ struct ifpga_afu_info *afu_info = acc->data;
+ struct opae_reg_region *region;
+ u64 val = 0;
- if (!br || !br->data)
- return -EINVAL;
+ if (!afu_info)
+ return -ENODEV;
- port = br->data;
+ region = &afu_info->region[0];
+ if (uuid) {
+ val = readq(region->addr + sizeof(struct feature_header));
+ opae_memcpy(uuid->b, &val, sizeof(u64));
+ val = readq(region->addr + sizeof(struct feature_header) + 8);
+ opae_memcpy(uuid->b + 8, &val, sizeof(u64));
+ }
- return fpga_get_afu_uuid(port, uuid);
+ return 0;
}
static int ifpga_acc_set_irq(struct opae_accelerator *acc,
@@ -32,6 +39,9 @@ static int ifpga_acc_set_irq(struct opae_accelerator *acc,
struct ifpga_port_hw *port;
struct fpga_uafu_irq_set irq_set;
+ if (!afu_info)
+ return -ENODEV;
+
if (!br || !br->data)
return -EINVAL;
@@ -68,7 +78,7 @@ static int ifpga_acc_get_region_info(struct opae_accelerator
*acc,
struct ifpga_afu_info *afu_info = acc->data;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (info->index >= afu_info->num_regions)
return -EINVAL;
@@ -89,7 +99,7 @@ static int ifpga_acc_read(struct opae_accelerator *acc,
unsigned int region_idx,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
@@ -129,7 +139,7 @@ static int ifpga_acc_write(struct opae_accelerator *acc,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 8f62033..9a280eb 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -73,6 +73,7 @@
enum fpga_id_type {
FME_ID,
PORT_ID,
+ AFU_ID,
FPGA_ID_MAX,
};
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 48b8af4..7a5d264 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -2,6 +2,10 @@
* Copyright(c) 2010-2018 Intel Corporation
*/
+#include
+#include
+#include
+
#include "opae_hw_api.h"
#include "ifpga_api.h"
@@ -9,6 +13,19 @@
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+struct dfl_fpga_enum_dfl {
+ u64 start;
+ u64 len;
+ void *addr;
+ TAILQ_ENTRY(dfl_fpga_enum_dfl) node;
+};
+
+TAILQ_HEAD(dfl_fpga_enum_dfls, dfl_fpga_enum_dfl);
+struct dfl_fpga_enum_info {
+ struct ifpga_hw *hw;
+ struct dfl_fpga_enum_dfls dfls;
[PATCH v5 5/5] guides/rawdevs: add description of ofs in ifpga doc
OFS (Open FPGA Stack) specification is introduced briefly. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang Reviewed-by: Rosen Xu --- v2: update description per Tianfei's comment --- v3: update afu driver name in diagram --- doc/guides/rawdevs/ifpga.rst | 105 ++- 1 file changed, 104 insertions(+), 1 deletion(-) diff --git a/doc/guides/rawdevs/ifpga.rst b/doc/guides/rawdevs/ifpga.rst index dbd0d6e..bf557b2 100644 --- a/doc/guides/rawdevs/ifpga.rst +++ b/doc/guides/rawdevs/ifpga.rst @@ -1,5 +1,5 @@ .. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2018 Intel Corporation. +Copyright(c) 2018-2022 Intel Corporation. IFPGA Rawdev Driver == @@ -100,3 +100,106 @@ The following device parameters are supported: If null, the AFU Bit Stream has been PR in FPGA, if not forces PR and identifies AFU Bit Stream file. + + +Open FPGA Stack += + +Open FPGA Stack (OFS) is a collection of RTL and open source software providing +interfaces to access the instantiated RTL easily in an FPGA. OFS leverages the +DFL for the implementation of the FPGA RTL design. + +OFS designs allow for the arrangement of software interfaces across multiple +PCIe endpoints. Some of these interfaces may be PFs defined in the static region +that connect to interfaces in an IP that is loaded via Partial Reconfiguration (PR). +And some of these interfaces may be VFs defined in the PR region that can be +reconfigured by the end-user. Furthermore, these PFs/VFs may use DFLs such that +features may be discovered and accessed in user space with the aid of a generic +kernel driver like vfio-pci. The diagram below depicts an example design with one +PF and two VFs. In this example, it will export the management functions via PF0 +and acceleration functions via VF0 and VF1, leverage VFIO to export the MMIO space +to an application.:: + + +-+ +-+ ++ + | FPGA Management | | DPDK App | | User App | + | App| | | || + +++ +--+--+ +-+--+ + | | | + +++ +--+--+| + |IFPGA PMD| | AFU PMD || + +++ +--+--+| + | | | + ++--+---+--+ + |VFIO-PCI | + ++--+---+--+ + | | | + +++ +--+--+ +-+--+ + | PF0 | | PF0_VF0 | | PF0_VF1 | + +-+ +-+ ++ + +As accelerators are specialized hardware, they are typically limited in the +number installed in a given system. Many use cases require them to be shared +across multiple software contexts or threads of software execution, either +through partitioning of individual dedicated resources, or virtualization of +shared resources. OFS provides several models to share the AFU resources via +PR mechanism and hardware-based virtualization schemes. + +1. Legacy model. + With legacy model FPGA cards like Intel PAC N3000 or N5000, there is + a notion that the boundary between the AFU and the shell is also the unit of + PR for those FPGA platforms. This model is only able to handle a + single context, because it only has one PR engine, and one PR region which + has an associated Port device. +2. Multiple VFs per PR slot. + In this model, available AFU resources may allow instantiation of many VFs + which have a dedicated PCIe function with their own dedicated MMIO space, or + partition a region of MMIO space on a single PCIe function. Intel PAC N6000 + card has implemented this model. + In this model, the AFU/PR slot was not connected to port device. For DFL's view, + the Next_AFU pointer in FIU feature header of port device points to NULL in this + model. On the other hand, each VF can start with an AFU feature header without + being connected to a FIU Port feature header. + +The VFs are created through the Linux kernel driver before we use them in DPDK. + +OFS provides the diversity for accessing the AFU resource to RTL developer. +An IP designer may choose to add more than one PF for interfacing with IP +on the FPGA and choose different model to access the AFU resource. + +There is one reference architecture design using the "Multiple VFs per PR slot" +model for OFS as illustrated below. In this reference design, it exports the +FPGA management functions via PF0. PF1 will bind with DPDK virtio driver +presenting itself as a network interface to the application. PF2 will bind to the +vfio-pci driver allowing the user space software to discover and interface +with the specific workload
[PATCH v6 0/5] introduce AFU PMD driver of FPGA
The first patch implements the framework of the AFU PMD driver based on raw device interfaces. The subsequent patches implement the driver of some AFUs. Changes from v5: 1. Move source files to raw/ifpga directory and rename them. 2. Use spinlock to prevent AFU from accessing simultaneously. 3. Refine code per Tianfei's comments. Wei Huang (5): raw/ifpga: introduce AFU driver framework raw/ifpga: add N3000 AFU driver raw/ifpga: add HE-LPBK AFU driver raw/ifpga: add HE-MEM AFU driver raw/ifpga: add HE-HSSI AFU driver drivers/raw/ifpga/afu_pmd_core.c| 453 drivers/raw/ifpga/afu_pmd_core.h| 94 ++ drivers/raw/ifpga/afu_pmd_he_hssi.c | 371 +++ drivers/raw/ifpga/afu_pmd_he_hssi.h | 108 ++ drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436 drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++ drivers/raw/ifpga/afu_pmd_he_mem.c | 183 drivers/raw/ifpga/afu_pmd_he_mem.h | 46 + drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +++ drivers/raw/ifpga/afu_pmd_n3000.h | 339 ++ drivers/raw/ifpga/meson.build |4 +- drivers/raw/ifpga/rte_pmd_afu.h | 134 +++ 12 files changed, 4312 insertions(+), 1 deletion(-) create mode 100644 drivers/raw/ifpga/afu_pmd_core.c create mode 100644 drivers/raw/ifpga/afu_pmd_core.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h -- 1.8.3.1
[PATCH v6 1/5] raw/ifpga: introduce AFU driver framework
AFU (Acceleration Function Unit) is part of FPGA and enumerated
by ifpga driver.
This driver implements common AFU device interfaces and exposes
them to application as standard raw device APIs.
Normally application can operate specified AFU as below,
1. call rte_rawdev_pmd_get_named_dev() to find AFU device.
2. call rte_rawdev_configure() to initialize AFU device.
3. call rte_rawdev_selftest() to test AFU device.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_core.c | 453 +++
drivers/raw/ifpga/afu_pmd_core.h | 76 +++
drivers/raw/ifpga/meson.build| 2 +-
3 files changed, 530 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_core.c
create mode 100644 drivers/raw/ifpga/afu_pmd_core.h
diff --git a/drivers/raw/ifpga/afu_pmd_core.c b/drivers/raw/ifpga/afu_pmd_core.c
new file mode 100644
index 000..a24b517
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_core.c
@@ -0,0 +1,453 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ *
+ * AFU is Acceleration Function Unit in FPGA, it is enumerated by ifpga pmd.
+ * Suppose AFU is found in FPGA at PCI address 31:00.0, then you can create
+ * and test a AFU device by following steps in application.
+ * 1. rte_vdev_init("ifpga_rawdev_cfg0", "ifpga=31:00.0,port=0")
+ * 2. rawdev = rte_rawdev_pmd_get_named_dev("afu_0|31:00.0")
+ * 3. rte_rawdev_configure(rawdev->dev_id, &cfg, sizeof(cfg))
+ * 4. rte_rawdev_selftest(rawdev->dev_id)
+ * 5. rte_vdev_uninit("ifpga_rawdev_cfg0")
+ *
+ * AFU device name format used in rte_rawdev_pmd_get_named_dev is
+ * "afu_[port]|[BDF]". Please refer to OPAE documentation for the meaning of
+ * port. Each AFU device has specific configuration data, they are defined
+ * in rte_pmd_afu.h.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+
+static struct rte_afu_uuid afu_pmd_uuid_map[AFU_RAWDEV_MAX_DRVS+1];
+TAILQ_HEAD(afu_drv_list, afu_rawdev_drv);
+static struct afu_drv_list afu_pmd_list = TAILQ_HEAD_INITIALIZER(afu_pmd_list);
+
+static inline int afu_rawdev_trylock(struct afu_rawdev *dev)
+{
+ if (!dev || !dev->sd)
+ return 0;
+
+ return rte_spinlock_trylock(&dev->sd->lock);
+}
+
+static inline void afu_rawdev_unlock(struct afu_rawdev *dev)
+{
+ if (!dev || !dev->sd)
+ return;
+
+ rte_spinlock_unlock(&dev->sd->lock);
+}
+
+static int afu_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_rawdev_trylock(dev);
+ if (!ret) {
+ IFPGA_RAWDEV_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_rawdev_unlock(dev);
+
+ return ret;
+}
+
+static void afu_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_rawdev_trylock(dev);
+ if (!ret) {
+ IFPGA_RAWDEV_PMD_WARN("AFU is busy, please stop it later");
+ return;
+ }
+
+ if (dev->ops && dev->ops->stop)
+ ret = (*dev->ops->stop)(dev);
+
+ afu_rawdev_unlock(dev);
+}
+
+static int afu_rawdev_close(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->close)
+ ret = (*dev->ops->close)(dev);
+
+ return ret;
+}
+
+static int afu_rawdev_reset(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_rawdev_trylock(dev);
+
[PATCH v6 2/5] raw/ifpga: add N3000 AFU driver
N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_core.h | 18 +
drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +
drivers/raw/ifpga/afu_pmd_n3000.h | 339 +++
drivers/raw/ifpga/meson.build |3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 97 ++
5 files changed, 2475 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h
create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h
diff --git a/drivers/raw/ifpga/afu_pmd_core.h b/drivers/raw/ifpga/afu_pmd_core.h
index 4fad2c7..316615d 100644
--- a/drivers/raw/ifpga/afu_pmd_core.h
+++ b/drivers/raw/ifpga/afu_pmd_core.h
@@ -60,6 +60,24 @@ struct afu_rawdev {
return rawdev ? (struct afu_rawdev *)rawdev->dev_private : NULL;
}
+#define CLS_TO_SIZE(n) ((n) << 6) /* get size of n cache lines */
+#define SIZE_TO_CLS(s) ((s) >> 6) /* convert size to number of cache lines */
+#define MHZ(f) ((f) * 100)
+
+#define dsm_poll_timeout(addr, val, cond, invl, timeout) \
+({ \
+ uint64_t __wait = 0; \
+ uint64_t __invl = (invl);\
+ uint64_t __timeout = (timeout); \
+ for (; __wait <= __timeout; __wait += __invl) { \
+ (val) = *(addr); \
+ if (cond)\
+ break; \
+ rte_delay_ms(__invl);\
+ }\
+ (cond) ? 0 : 1; \
+})
+
void afu_pmd_register(struct afu_rawdev_drv *driver);
void afu_pmd_unregister(struct afu_rawdev_drv *driver);
diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
b/drivers/raw/ifpga/afu_pmd_n3000.c
new file mode 100644
index 000..14f7fe0
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -0,0 +1,2019 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_n3000.h"
+
+static int nlb_afu_config(struct afu_rawdev *dev)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ if (!dev->priv)
+ return -ENOENT;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+ cfg = &priv->nlb_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ if (cfg->cache_policy == NLB_WRPUSH_I)
+ v.wrpush_i = 1;
+ else
+ v.wrthru_en = cfg->cache_policy;
+
+ if (cfg->cache_hint == NLB_RDLINE_MIXED)
+ v.rdsel = 3;
+ else
+ v.rdsel = cfg->cache_hint;
+
+ v.mode = cfg->mode;
+ v.chsel = cfg->read_vc;
+ v.wr_chsel = cfg->write_vc;
+ v.wrfence_chsel = cfg->wrfence_vc;
+ v.wrthru_en = cfg->cache_policy;
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->nlb_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void nlb_afu_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_dsm_status *stat = NULL;
+ uint64_t ticks = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+
+ cfg = &priv->nlb_cfg;
+ stat = priv->nlb_ctx.status_ptr;
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0)
+ cfg->freq_mhz = 200;
+
+ num = (double)stat->num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat->num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachelines Read_Count Write_Count Clocks@%uMHz "
+ "Rd_Bandwidth Wr_Bandwidth\n", cfg->freq_mhz);
+ printf("%10u %10u %11u %12&qu
[PATCH v6 3/5] raw/ifpga: add HE-LPBK AFU driver
HE-LPBK and HE-MEM-LPBK are host exerciser modules in OFS FPGA,
HE-LPBK is used to test PCI bus and HE-MEM-LPBK is used to test
local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436
drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h | 14 ++
4 files changed, 577 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_lpbk.c
b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
new file mode 100644
index 000..8b2c85b
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
@@ -0,0 +1,436 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_lpbk.h"
+
+static int he_lpbk_afu_config(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_lpbk_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ v.mode = cfg->mode;
+ v.trput_interleave = cfg->trput_interleave;
+ if (cfg->multi_cl == 4)
+ v.multicl_len = 2;
+ else
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->he_lpbk_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void he_lpbk_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_dsm_status *stat = NULL;
+ struct he_lpbk_status0 stat0;
+ struct he_lpbk_status1 stat1;
+ uint64_t swtest_msg = 0;
+ uint64_t ticks = 0;
+ uint64_t info = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ cfg = &priv->he_lpbk_cfg;
+ ctx = &priv->he_lpbk_ctx;
+
+ stat = ctx->status_ptr;
+
+ swtest_msg = rte_read64(ctx->addr + CSR_SWTEST_MSG);
+ stat0.csr = rte_read64(ctx->addr + CSR_STATUS0);
+ stat1.csr = rte_read64(ctx->addr + CSR_STATUS1);
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0) {
+ info = rte_read64(ctx->addr + CSR_HE_INFO0);
+ IFPGA_RAWDEV_PMD_INFO("API version: %"PRIx64, info >> 16);
+ cfg->freq_mhz = info & 0x;
+ if (cfg->freq_mhz == 0) {
+ IFPGA_RAWDEV_PMD_INFO("Frequency of AFU clock is
unknown."
+ " Assuming 350 MHz.");
+ cfg->freq_mhz = 350;
+ }
+ }
+
+ num = (double)stat0.num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat0.num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachelines Read_Count Write_Count Pend_Read Pend_Write "
+ "Clocks@%uMHz Rd_Bandwidth Wr_Bandwidth\n",
+ cfg->freq_mhz);
+ printf("%10u %10u %10u %10u %10u %12"PRIu64
+ " %7.3f GB/s %7.3f GB/s\n",
+ cl, stat0.num_reads, stat0.num_writes,
+ stat1.num_pend_reads, stat1.num_pend_writes,
+ ticks, rd_bw / 1e9, wr_bw / 1e9);
+ printf("Test Message: 0x%"PRIx64"\n", swtest_msg);
+}
+
+static int he_lpbk_test(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_csr_ctl ctl;
+ uint32_t *ptr = NULL;
+ uint32_t i, j, cl, val = 0;
+ uint64_t sval = 0;
+ int ret = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_lpbk_
[PATCH v6 4/5] raw/ifpga: add HE-MEM AFU driver
HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_he_mem.c | 183 +
drivers/raw/ifpga/afu_pmd_he_mem.h | 46 ++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h| 7 ++
4 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_mem.c
b/drivers/raw/ifpga/afu_pmd_he_mem.c
new file mode 100644
index 000..0f57a03
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_mem.c
@@ -0,0 +1,183 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_mem.h"
+
+static int he_mem_tg_test(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct rte_pmd_afu_he_mem_tg_cfg *cfg = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+ uint64_t value = 0x12345678;
+ uint64_t cap = 0;
+ uint64_t channel_mask = 0;
+ int i, t = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_mem_tg_cfg;
+ ctx = &priv->he_mem_tg_ctx;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Channel mask: 0x%x", cfg->channel_mask);
+
+ rte_write64(value, ctx->addr + MEM_TG_SCRATCHPAD);
+ cap = rte_read64(ctx->addr + MEM_TG_SCRATCHPAD);
+ IFPGA_RAWDEV_PMD_DEBUG("Scratchpad value: 0x%"PRIx64, cap);
+ if (cap != value) {
+ IFPGA_RAWDEV_PMD_ERR("Test scratchpad register failed");
+ return -EIO;
+ }
+
+ cap = rte_read64(ctx->addr + MEM_TG_CTRL);
+ IFPGA_RAWDEV_PMD_DEBUG("Capability: 0x%"PRIx64, cap);
+
+ channel_mask = cfg->channel_mask & cap;
+ /* start traffic generators */
+ rte_write64(channel_mask, ctx->addr + MEM_TG_CTRL);
+
+ /* check test status */
+ while (t < MEM_TG_TIMEOUT_MS) {
+ value = rte_read64(ctx->addr + MEM_TG_STAT);
+ for (i = 0; i < NUM_MEM_TG_CHANNELS; i++) {
+ if (channel_mask & (1 << i)) {
+ if (TGACTIVE(value, i))
+ continue;
+ printf("TG channel %d test %s\n", i,
+ TGPASS(value, i) ? "pass" :
+ TGTIMEOUT(value, i) ? "timeout" :
+ TGFAIL(value, i) ? "fail" : "error");
+ channel_mask &= ~(1 << i);
+ }
+ }
+ if (!channel_mask)
+ break;
+ rte_delay_ms(MEM_TG_POLL_INTERVAL_MS);
+ t += MEM_TG_POLL_INTERVAL_MS;
+ }
+
+ if (channel_mask) {
+ IFPGA_RAWDEV_PMD_ERR("Timeout 0x%04lx", (unsigned long)value);
+ return channel_mask;
+ }
+
+ return 0;
+}
+
+static int he_mem_tg_init(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv) {
+ priv = rte_zmalloc(NULL, sizeof(struct he_mem_tg_priv), 0);
+ if (!priv)
+ return -ENOMEM;
+ dev->priv = priv;
+ }
+
+ ctx = &priv->he_mem_tg_ctx;
+ ctx->addr = (uint8_t *)dev->addr;
+
+ return 0;
+}
+
+static int he_mem_tg_config(struct afu_rawdev *dev, void *config,
+ size_t config_size)
+{
+ struct he_mem_tg_priv *priv = NULL;
+
+ if (!dev || !config || !config_size)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ if (config_size != sizeof(struct rte_pmd_afu_he_mem_tg_cfg))
+ return -EINVAL;
+
+ rte_memcpy(&priv->he_mem_tg_cfg, config, sizeof(priv->he_mem_tg_cfg));
+
+ return 0;
+}
+
+static int he_mem_tg_close(struct afu_rawdev *dev)
+{
+ if (!dev)
+ return -EINVAL;
+
+ rte_free(dev->priv);
+ dev->priv = NULL;
+
+ return 0;
+}
+
+static int he_mem_tg_dump(struct afu_
[PATCH v6 5/5] raw/ifpga: add HE-HSSI AFU driver
HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_he_hssi.c | 371
drivers/raw/ifpga/afu_pmd_he_hssi.h | 108 +++
drivers/raw/ifpga/meson.build | 3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 16 ++
4 files changed, 497 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_hssi.c
b/drivers/raw/ifpga/afu_pmd_he_hssi.c
new file mode 100644
index 000..395c2ca
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_hssi.c
@@ -0,0 +1,371 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_hssi.h"
+
+static int he_hssi_indirect_write(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect write 0x%x, value 0x%08x", addr,
value);
+
+ if (!ctx)
+ return -EINVAL;
+
+ data.write_data = value;
+ rte_write64(data.csr, ctx->addr + TRAFFIC_CTRL_DATA);
+
+ cmd.csr = 0;
+ cmd.write_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int he_hssi_indirect_read(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t *value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ if (!ctx)
+ return -EINVAL;
+
+ cmd.csr = 0;
+ cmd.read_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans) {
+ data.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_DATA);
+ *value = data.read_data;
+ break;
+ }
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect read 0x%x, value 0x%08x", addr,
*value);
+ return 0;
+}
+
+static void he_hssi_report(struct he_hssi_ctx *ctx)
+{
+ uint32_t val = 0;
+ uint64_t v64 = 0;
+ int ret = 0;
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_GOOD, &val);
+ if (ret)
+ return;
+ printf("Number of good packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_BAD, &val);
+ if (ret)
+ return;
+ printf("Number of bad packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_BYTE_CNT1, &val);
+ if (ret)
+ return;
+ v64 = val;
+ ret = he_hssi_indirect_read(ctx, TM_BYTE_CNT0, &val);
+ if (ret)
+ return;
+ v64 = (v64 << 32) | val;
+
[PATCH v7 0/5] introduce AFU PMD driver of FPGA
The first patch implements the framework of the AFU PMD driver based on raw device interfaces. The subsequent patches implement the driver of some AFUs. Changes from v6: 1. Fix Ubuntu 20.04 ARM build. Wei Huang (5): raw/ifpga: introduce AFU driver framework raw/ifpga: add N3000 AFU driver raw/ifpga: add HE-LPBK AFU driver raw/ifpga: add HE-MEM AFU driver raw/ifpga: add HE-HSSI AFU driver drivers/raw/ifpga/afu_pmd_core.c| 453 drivers/raw/ifpga/afu_pmd_core.h| 95 ++ drivers/raw/ifpga/afu_pmd_he_hssi.c | 371 +++ drivers/raw/ifpga/afu_pmd_he_hssi.h | 109 ++ drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436 drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++ drivers/raw/ifpga/afu_pmd_he_mem.c | 183 drivers/raw/ifpga/afu_pmd_he_mem.h | 46 + drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +++ drivers/raw/ifpga/afu_pmd_n3000.h | 339 ++ drivers/raw/ifpga/meson.build |4 +- drivers/raw/ifpga/rte_pmd_afu.h | 136 +++ 12 files changed, 4316 insertions(+), 1 deletion(-) create mode 100644 drivers/raw/ifpga/afu_pmd_core.c create mode 100644 drivers/raw/ifpga/afu_pmd_core.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h -- 1.8.3.1
[PATCH v7 1/5] raw/ifpga: introduce AFU driver framework
AFU (Acceleration Function Unit) is part of FPGA and enumerated
by ifpga driver.
This driver implements common AFU device interfaces and exposes
them to application as standard raw device APIs.
Normally application can operate specified AFU as below,
1. call rte_rawdev_pmd_get_named_dev() to find AFU device.
2. call rte_rawdev_configure() to initialize AFU device.
3. call rte_rawdev_selftest() to test AFU device.
Signed-off-by: Wei Huang
---
v2: fix typo
---
v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32
---
v4: fix coding style issue and build error in FreeBSD13-64
---
v5: split patch into several patches
---
v6: move source files to ifpga and rename, use spinlock
---
drivers/raw/ifpga/afu_pmd_core.c | 453 +++
drivers/raw/ifpga/afu_pmd_core.h | 76 +++
drivers/raw/ifpga/meson.build| 2 +-
3 files changed, 530 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_core.c
create mode 100644 drivers/raw/ifpga/afu_pmd_core.h
diff --git a/drivers/raw/ifpga/afu_pmd_core.c b/drivers/raw/ifpga/afu_pmd_core.c
new file mode 100644
index 000..a24b517
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_core.c
@@ -0,0 +1,453 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ *
+ * AFU is Acceleration Function Unit in FPGA, it is enumerated by ifpga pmd.
+ * Suppose AFU is found in FPGA at PCI address 31:00.0, then you can create
+ * and test a AFU device by following steps in application.
+ * 1. rte_vdev_init("ifpga_rawdev_cfg0", "ifpga=31:00.0,port=0")
+ * 2. rawdev = rte_rawdev_pmd_get_named_dev("afu_0|31:00.0")
+ * 3. rte_rawdev_configure(rawdev->dev_id, &cfg, sizeof(cfg))
+ * 4. rte_rawdev_selftest(rawdev->dev_id)
+ * 5. rte_vdev_uninit("ifpga_rawdev_cfg0")
+ *
+ * AFU device name format used in rte_rawdev_pmd_get_named_dev is
+ * "afu_[port]|[BDF]". Please refer to OPAE documentation for the meaning of
+ * port. Each AFU device has specific configuration data, they are defined
+ * in rte_pmd_afu.h.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+
+static struct rte_afu_uuid afu_pmd_uuid_map[AFU_RAWDEV_MAX_DRVS+1];
+TAILQ_HEAD(afu_drv_list, afu_rawdev_drv);
+static struct afu_drv_list afu_pmd_list = TAILQ_HEAD_INITIALIZER(afu_pmd_list);
+
+static inline int afu_rawdev_trylock(struct afu_rawdev *dev)
+{
+ if (!dev || !dev->sd)
+ return 0;
+
+ return rte_spinlock_trylock(&dev->sd->lock);
+}
+
+static inline void afu_rawdev_unlock(struct afu_rawdev *dev)
+{
+ if (!dev || !dev->sd)
+ return;
+
+ rte_spinlock_unlock(&dev->sd->lock);
+}
+
+static int afu_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_rawdev_trylock(dev);
+ if (!ret) {
+ IFPGA_RAWDEV_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_rawdev_unlock(dev);
+
+ return ret;
+}
+
+static void afu_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_rawdev_trylock(dev);
+ if (!ret) {
+ IFPGA_RAWDEV_PMD_WARN("AFU is busy, please stop it later");
+ return;
+ }
+
+ if (dev->ops && dev->ops->stop)
+ ret = (*dev->ops->stop)(dev);
+
+ afu_rawdev_unlock(dev);
+}
+
+static int afu_rawdev_close(struct rte_rawdev *rawdev)
+{
+ struct afu_rawdev *dev = NULL;
+ int ret = 0;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ dev = afu_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->close)
+ ret = (*dev->ops->close)(dev);
+
+ return ret;
+}
+
+static int afu_rawdev_reset(struct rte_rawde
[PATCH v7 2/5] raw/ifpga: add N3000 AFU driver
N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
v2: move source files to ifpga and rename, refine code
---
v3: fix Ubuntu 20.04 ARM build
---
drivers/raw/ifpga/afu_pmd_core.h | 19 +
drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +
drivers/raw/ifpga/afu_pmd_n3000.h | 339 +++
drivers/raw/ifpga/meson.build |3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 97 ++
5 files changed, 2476 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h
create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h
diff --git a/drivers/raw/ifpga/afu_pmd_core.h b/drivers/raw/ifpga/afu_pmd_core.h
index 4fad2c7..a938172 100644
--- a/drivers/raw/ifpga/afu_pmd_core.h
+++ b/drivers/raw/ifpga/afu_pmd_core.h
@@ -14,6 +14,7 @@
#include
#include
+#include
#include
#include
@@ -60,6 +61,24 @@ struct afu_rawdev {
return rawdev ? (struct afu_rawdev *)rawdev->dev_private : NULL;
}
+#define CLS_TO_SIZE(n) ((n) << 6) /* get size of n cache lines */
+#define SIZE_TO_CLS(s) ((s) >> 6) /* convert size to number of cache lines */
+#define MHZ(f) ((f) * 100)
+
+#define dsm_poll_timeout(addr, val, cond, invl, timeout) \
+({ \
+ uint64_t __wait = 0; \
+ uint64_t __invl = (invl);\
+ uint64_t __timeout = (timeout); \
+ for (; __wait <= __timeout; __wait += __invl) { \
+ (val) = *(addr); \
+ if (cond)\
+ break; \
+ rte_delay_ms(__invl);\
+ }\
+ (cond) ? 0 : 1; \
+})
+
void afu_pmd_register(struct afu_rawdev_drv *driver);
void afu_pmd_unregister(struct afu_rawdev_drv *driver);
diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
b/drivers/raw/ifpga/afu_pmd_n3000.c
new file mode 100644
index 000..14f7fe0
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -0,0 +1,2019 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_n3000.h"
+
+static int nlb_afu_config(struct afu_rawdev *dev)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ if (!dev->priv)
+ return -ENOENT;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+ cfg = &priv->nlb_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ if (cfg->cache_policy == NLB_WRPUSH_I)
+ v.wrpush_i = 1;
+ else
+ v.wrthru_en = cfg->cache_policy;
+
+ if (cfg->cache_hint == NLB_RDLINE_MIXED)
+ v.rdsel = 3;
+ else
+ v.rdsel = cfg->cache_hint;
+
+ v.mode = cfg->mode;
+ v.chsel = cfg->read_vc;
+ v.wr_chsel = cfg->write_vc;
+ v.wrfence_chsel = cfg->wrfence_vc;
+ v.wrthru_en = cfg->cache_policy;
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->nlb_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void nlb_afu_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_dsm_status *stat = NULL;
+ uint64_t ticks = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+
+ cfg = &priv->nlb_cfg;
+ stat = priv->nlb_ctx.status_ptr;
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0)
+ cfg->freq_mhz = 200;
+
+ num = (double)stat->num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat->num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachel
[PATCH v7 3/5] raw/ifpga: add HE-LPBK AFU driver
HE-LPBK and HE-MEM-LPBK are host exerciser modules in OFS FPGA,
HE-LPBK is used to test PCI bus and HE-MEM-LPBK is used to test
local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
v2: move source files to ifpga and rename, refine code
---
drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436
drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h | 14 ++
4 files changed, 577 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_lpbk.c
b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
new file mode 100644
index 000..8b2c85b
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
@@ -0,0 +1,436 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_lpbk.h"
+
+static int he_lpbk_afu_config(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_lpbk_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ v.mode = cfg->mode;
+ v.trput_interleave = cfg->trput_interleave;
+ if (cfg->multi_cl == 4)
+ v.multicl_len = 2;
+ else
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->he_lpbk_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void he_lpbk_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_dsm_status *stat = NULL;
+ struct he_lpbk_status0 stat0;
+ struct he_lpbk_status1 stat1;
+ uint64_t swtest_msg = 0;
+ uint64_t ticks = 0;
+ uint64_t info = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ cfg = &priv->he_lpbk_cfg;
+ ctx = &priv->he_lpbk_ctx;
+
+ stat = ctx->status_ptr;
+
+ swtest_msg = rte_read64(ctx->addr + CSR_SWTEST_MSG);
+ stat0.csr = rte_read64(ctx->addr + CSR_STATUS0);
+ stat1.csr = rte_read64(ctx->addr + CSR_STATUS1);
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0) {
+ info = rte_read64(ctx->addr + CSR_HE_INFO0);
+ IFPGA_RAWDEV_PMD_INFO("API version: %"PRIx64, info >> 16);
+ cfg->freq_mhz = info & 0x;
+ if (cfg->freq_mhz == 0) {
+ IFPGA_RAWDEV_PMD_INFO("Frequency of AFU clock is
unknown."
+ " Assuming 350 MHz.");
+ cfg->freq_mhz = 350;
+ }
+ }
+
+ num = (double)stat0.num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat0.num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachelines Read_Count Write_Count Pend_Read Pend_Write "
+ "Clocks@%uMHz Rd_Bandwidth Wr_Bandwidth\n",
+ cfg->freq_mhz);
+ printf("%10u %10u %10u %10u %10u %12"PRIu64
+ " %7.3f GB/s %7.3f GB/s\n",
+ cl, stat0.num_reads, stat0.num_writes,
+ stat1.num_pend_reads, stat1.num_pend_writes,
+ ticks, rd_bw / 1e9, wr_bw / 1e9);
+ printf("Test Message: 0x%"PRIx64"\n", swtest_msg);
+}
+
+static int he_lpbk_test(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_csr_ctl ctl;
+ uint32_t *ptr = NULL;
+ uint32_t i, j, cl, val = 0;
+ uint64_t sval = 0;
+ int ret = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ if (!priv)
+
[PATCH v7 4/5] raw/ifpga: add HE-MEM AFU driver
HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: move source files to ifpga and rename
---
drivers/raw/ifpga/afu_pmd_he_mem.c | 183 +
drivers/raw/ifpga/afu_pmd_he_mem.h | 46 ++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h| 7 ++
4 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_mem.c
b/drivers/raw/ifpga/afu_pmd_he_mem.c
new file mode 100644
index 000..0f57a03
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_mem.c
@@ -0,0 +1,183 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_mem.h"
+
+static int he_mem_tg_test(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct rte_pmd_afu_he_mem_tg_cfg *cfg = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+ uint64_t value = 0x12345678;
+ uint64_t cap = 0;
+ uint64_t channel_mask = 0;
+ int i, t = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_mem_tg_cfg;
+ ctx = &priv->he_mem_tg_ctx;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Channel mask: 0x%x", cfg->channel_mask);
+
+ rte_write64(value, ctx->addr + MEM_TG_SCRATCHPAD);
+ cap = rte_read64(ctx->addr + MEM_TG_SCRATCHPAD);
+ IFPGA_RAWDEV_PMD_DEBUG("Scratchpad value: 0x%"PRIx64, cap);
+ if (cap != value) {
+ IFPGA_RAWDEV_PMD_ERR("Test scratchpad register failed");
+ return -EIO;
+ }
+
+ cap = rte_read64(ctx->addr + MEM_TG_CTRL);
+ IFPGA_RAWDEV_PMD_DEBUG("Capability: 0x%"PRIx64, cap);
+
+ channel_mask = cfg->channel_mask & cap;
+ /* start traffic generators */
+ rte_write64(channel_mask, ctx->addr + MEM_TG_CTRL);
+
+ /* check test status */
+ while (t < MEM_TG_TIMEOUT_MS) {
+ value = rte_read64(ctx->addr + MEM_TG_STAT);
+ for (i = 0; i < NUM_MEM_TG_CHANNELS; i++) {
+ if (channel_mask & (1 << i)) {
+ if (TGACTIVE(value, i))
+ continue;
+ printf("TG channel %d test %s\n", i,
+ TGPASS(value, i) ? "pass" :
+ TGTIMEOUT(value, i) ? "timeout" :
+ TGFAIL(value, i) ? "fail" : "error");
+ channel_mask &= ~(1 << i);
+ }
+ }
+ if (!channel_mask)
+ break;
+ rte_delay_ms(MEM_TG_POLL_INTERVAL_MS);
+ t += MEM_TG_POLL_INTERVAL_MS;
+ }
+
+ if (channel_mask) {
+ IFPGA_RAWDEV_PMD_ERR("Timeout 0x%04lx", (unsigned long)value);
+ return channel_mask;
+ }
+
+ return 0;
+}
+
+static int he_mem_tg_init(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv) {
+ priv = rte_zmalloc(NULL, sizeof(struct he_mem_tg_priv), 0);
+ if (!priv)
+ return -ENOMEM;
+ dev->priv = priv;
+ }
+
+ ctx = &priv->he_mem_tg_ctx;
+ ctx->addr = (uint8_t *)dev->addr;
+
+ return 0;
+}
+
+static int he_mem_tg_config(struct afu_rawdev *dev, void *config,
+ size_t config_size)
+{
+ struct he_mem_tg_priv *priv = NULL;
+
+ if (!dev || !config || !config_size)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ if (config_size != sizeof(struct rte_pmd_afu_he_mem_tg_cfg))
+ return -EINVAL;
+
+ rte_memcpy(&priv->he_mem_tg_cfg, config, sizeof(priv->he_mem_tg_cfg));
+
+ return 0;
+}
+
+static int he_mem_tg_close(struct afu_rawdev *dev)
+{
+ if (!dev)
+ return -EINVAL;
+
+ rte_free(dev->priv);
+ dev->pri
[PATCH v7 5/5] raw/ifpga: add HE-HSSI AFU driver
HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
---
v2: move source files to ifpga and rename, refine code
---
drivers/raw/ifpga/afu_pmd_he_hssi.c | 371
drivers/raw/ifpga/afu_pmd_he_hssi.h | 109 +++
drivers/raw/ifpga/meson.build | 3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 18 ++
4 files changed, 500 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_hssi.c
b/drivers/raw/ifpga/afu_pmd_he_hssi.c
new file mode 100644
index 000..102de50
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_hssi.c
@@ -0,0 +1,371 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_hssi.h"
+
+static int he_hssi_indirect_write(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect write 0x%x, value 0x%08x", addr,
value);
+
+ if (!ctx)
+ return -EINVAL;
+
+ data.write_data = value;
+ rte_write64(data.csr, ctx->addr + TRAFFIC_CTRL_DATA);
+
+ cmd.csr = 0;
+ cmd.write_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int he_hssi_indirect_read(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t *value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ if (!ctx)
+ return -EINVAL;
+
+ cmd.csr = 0;
+ cmd.read_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans) {
+ data.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_DATA);
+ *value = data.read_data;
+ break;
+ }
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect read 0x%x, value 0x%08x", addr,
*value);
+ return 0;
+}
+
+static void he_hssi_report(struct he_hssi_ctx *ctx)
+{
+ uint32_t val = 0;
+ uint64_t v64 = 0;
+ int ret = 0;
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_GOOD, &val);
+ if (ret)
+ return;
+ printf("Number of good packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_BAD, &val);
+ if (ret)
+ return;
+ printf("Number of bad packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_BYTE_CNT1, &val);
+ if (ret)
+ return;
+ v64 = val;
+ ret = he_hssi_indirect_read(ctx, TM_BYTE_CNT0, &val);
+ if (ret)
+
[PATCH v1] raw/ifpga: free file handle before function return
Coverity issue: 379064
Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 7a5d264..61eb660 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
*info)
vndr_hdr = 0;
ret = pread(fd, &vndr_hdr, sizeof(vndr_hdr),
voff + PCI_VNDR_HEADER);
- if (ret < 0)
- return -EIO;
+ if (ret < 0) {
+ ret = -EIO;
+ goto free_handle;
+ }
if (PCI_VNDR_HEADER_ID(vndr_hdr) == PCI_VSEC_ID_INTEL_DFLS &&
pci_data->vendor_id == PCI_VENDOR_ID_INTEL)
break;
@@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
*info)
if (!voff) {
dev_debug(hw, "%s no DFL VSEC found\n", __func__);
- return -ENODEV;
+ ret = -ENODEV;
+ goto free_handle;
}
dfl_cnt = 0;
ret = pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff + PCI_VNDR_DFLS_CNT);
- if (ret < 0)
- return -EIO;
+ if (ret < 0) {
+ ret = -EIO;
+ goto free_handle;
+ }
dfl_res_off = voff + PCI_VNDR_DFLS_RES;
if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE) {
dev_err(hw, "%s DFL VSEC too big for PCIe config space\n",
__func__);
- return -EINVAL;
+ ret = -EINVAL;
+ goto free_handle;
}
for (i = 0; i < dfl_cnt; i++, dfl_res_off += sizeof(u32)) {
@@ -868,7 +874,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
*info)
if (bir >= PCI_MAX_RESOURCE) {
dev_err(hw, "%s bad bir number %d\n",
__func__, bir);
- return -EINVAL;
+ ret = -EINVAL;
+ goto free_handle;
}
len = pci_data->region[bir].len;
@@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
*info)
if (offset >= len) {
dev_err(hw, "%s bad offset %u >= %"PRIu64"\n",
__func__, offset, len);
- return -EINVAL;
+ ret = -EINVAL;
+ goto free_handle;
}
dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir, offset);
@@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
*info)
dfl_fpga_enum_info_add_dfl(info, start, len, addr);
}
- return 0;
+free_handle:
+ close(fd);
+ return ret;
}
/* default method of finding dfls starting at offset 0 of bar 0 */
--
1.8.3.1
[PATCH v2 0/2] update rsu implementation
The first patch introduce PMCI driver to provide interface to access PMCI functions which include flash controller. The second patch update RSU (Remote System Update) implementation to adapt with PMCI controller. Changes from v1: 1. rebase code to 22.07-rc1 Wei Huang (2): raw/ifpga/base: add pmci driver raw/ifpga: update secure rsu drivers/raw/ifpga/base/ifpga_api.c | 39 +- drivers/raw/ifpga/base/ifpga_defines.h | 103 +- drivers/raw/ifpga/base/ifpga_feature_dev.c |2 + drivers/raw/ifpga/base/ifpga_feature_dev.h |3 + drivers/raw/ifpga/base/ifpga_fme.c | 273 - drivers/raw/ifpga/base/ifpga_fme_error.c |2 + drivers/raw/ifpga/base/ifpga_fme_rsu.c | 546 ++ drivers/raw/ifpga/base/ifpga_port_error.c|2 +- drivers/raw/ifpga/base/ifpga_sec_mgr.c | 1157 -- drivers/raw/ifpga/base/ifpga_sec_mgr.h | 122 ++- drivers/raw/ifpga/base/opae_hw_api.c | 113 ++- drivers/raw/ifpga/base/opae_hw_api.h | 15 +- drivers/raw/ifpga/base/opae_intel_max10.c| 938 -- drivers/raw/ifpga/base/opae_intel_max10.h| 313 +- drivers/raw/ifpga/base/opae_osdep.h | 43 +- drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 + drivers/raw/ifpga/rte_pmd_ifpga.c| 104 +- drivers/raw/ifpga/rte_pmd_ifpga.h| 117 +++ drivers/raw/ifpga/version.map| 11 + 19 files changed, 3168 insertions(+), 745 deletions(-) -- 1.8.3.1
[PATCH v2 1/2] raw/ifpga/base: add pmci driver
PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This driver provide interfaces to access registers of BMC chip and
external flash of FPGA.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_defines.h | 103 ++-
drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
drivers/raw/ifpga/base/ifpga_fme.c | 265 +--
drivers/raw/ifpga/base/ifpga_fme_error.c | 2 +
drivers/raw/ifpga/base/ifpga_port_error.c| 2 +-
drivers/raw/ifpga/base/ifpga_sec_mgr.c | 9 +-
drivers/raw/ifpga/base/ifpga_sec_mgr.h | 9 +-
drivers/raw/ifpga/base/opae_hw_api.c | 29 +
drivers/raw/ifpga/base/opae_hw_api.h | 1 +
drivers/raw/ifpga/base/opae_intel_max10.c| 938 ---
drivers/raw/ifpga/base/opae_intel_max10.h| 313 +++-
drivers/raw/ifpga/base/opae_osdep.h | 43 +-
drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 +
14 files changed, 1524 insertions(+), 203 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 9a280eb..7c8fa89 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -23,6 +23,7 @@
#define FME_FEATURE_NIOS_SPI"fme_nios_spi"
#define FME_FEATURE_I2C_MASTER "fme_i2c_master"
#define FME_FEATURE_ETH_GROUP "fme_eth_group"
+#define FME_FEATURE_PMCI"fme_pmci"
#define PORT_FEATURE_HEADER "port_hdr"
#define PORT_FEATURE_UAFU "port_uafu"
@@ -91,6 +92,7 @@ enum fpga_id_type {
#define FME_FEATURE_ID_NIOS_SPI 0xd
#define FME_FEATURE_ID_I2C_MASTER 0xf
#define FME_FEATURE_ID_ETH_GROUP 0x10
+#define FME_FEATURE_ID_PMCI 0x12
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
@@ -266,6 +268,24 @@ struct feature_fme_bitstream_id {
union {
u64 csr;
struct {
+ u8 build_patch:8;
+ u8 build_minor:8;
+ u8 build_major:8;
+ u8 fvl_bypass:1;
+ u8 mac_lightweight:1;
+ u8 disagregate:1;
+ u8 lightweiht:1;
+ u8 seu:1;
+ u8 ptp:1;
+ u8 reserve:2;
+ u8 interface:4;
+ u32 afu_revision:12;
+ u8 patch:4;
+ u8 minor:4;
+ u8 major:4;
+ u8 reserved:4;
+ } v1;
+ struct {
u32 gitrepo_hash:32;/* GIT repository hash */
/*
* HSSI configuration identifier:
@@ -274,7 +294,8 @@ struct feature_fme_bitstream_id {
* 2 - Ethernet
*/
u8 hssi_id:4;
- u16 rsvd1:12; /* Reserved */
+ u8 rsvd1:4;
+ u8 fim_type:8;
/* Bitstream version patch number */
u8 bs_verpatch:4;
/* Bitstream version minor number */
@@ -283,7 +304,7 @@ struct feature_fme_bitstream_id {
u8 bs_vermajor:4;
/* Bitstream version debug number */
u8 bs_verdebug:4;
- };
+ } v2;
};
};
@@ -1670,31 +1691,6 @@ struct bts_header {
#define check_support(n) (n == 1 ? "support" : "no")
-/* bitstream id definition */
-struct fme_bitstream_id {
- union {
- u64 id;
- struct {
- u8 build_patch:8;
- u8 build_minor:8;
- u8 build_major:8;
- u8 fvl_bypass:1;
- u8 mac_lightweight:1;
- u8 disagregate:1;
- u8 lightweiht:1;
- u8 seu:1;
- u8 ptp:1;
- u8 reserve:2;
- u8 interface:4;
- u32 afu_revision:12;
- u8 patch:4;
- u8 minor:4;
- u8 major:4;
- u8 reserved:4;
- };
- };
-};
-
enum board_interface {
VC_8_10G = 0,
VC_4_25G = 1,
@@ -1703,10 +1699,30 @@ enum board_interface {
VC_2_2_25G = 4,
};
+enum fim_type {
+ BASE_ADP = 0,
+ BASE_FDK,
+ BASE_X16_ADP,
+ BASE_X16_FDK,
+ FIMA_10G_ADP,
+ FIMA_25G_ADP,
+ FIMA_100G_ADP,
+ FIMB_
[PATCH v2 2/2] raw/ifpga: update secure rsu
Update secure RSU (Remote System Update) driver to adapt the changes
introduced by OFS.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_api.c | 39 +-
drivers/raw/ifpga/base/ifpga_feature_dev.h |2 +
drivers/raw/ifpga/base/ifpga_fme.c |8 +
drivers/raw/ifpga/base/ifpga_fme_rsu.c | 546 -
drivers/raw/ifpga/base/ifpga_sec_mgr.c | 1156
drivers/raw/ifpga/base/ifpga_sec_mgr.h | 115 ++-
drivers/raw/ifpga/base/opae_hw_api.c | 84 +-
drivers/raw/ifpga/base/opae_hw_api.h | 14 +-
drivers/raw/ifpga/rte_pmd_ifpga.c | 104 ++-
drivers/raw/ifpga/rte_pmd_ifpga.h | 117 +++
drivers/raw/ifpga/version.map | 11 +
11 files changed, 1649 insertions(+), 547 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index f19cc26..c187f94 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -261,11 +261,42 @@ static int ifpga_mgr_stop_flash_update(struct
opae_manager *mgr, int force)
return fpga_stop_flash_update(fme, force);
}
-static int ifpga_mgr_reload(struct opae_manager *mgr, int type, int page)
+static int ifpga_mgr_reload(struct opae_manager *mgr, char *str)
{
struct ifpga_fme_hw *fme = mgr->data;
- return fpga_reload(fme, type, page);
+ return fpga_reload(fme, str);
+}
+
+static int ifpga_available_images(struct opae_manager *mgr, char *buf,
+ size_t size)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_available_images(fme, buf, size);
+}
+
+static int ifpga_mgr_set_poc_image(struct opae_manager *mgr, char *str)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_set_poc_image(fme, str);
+}
+
+static int ifpga_mgr_get_poc_images(struct opae_manager *mgr, char *buf,
+ size_t size)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_get_poc_images(fme, buf, size);
+}
+
+static int ifpga_mgr_read_flash(struct opae_manager *mgr, u32 address,
+ u32 size, void *buf)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fme_mgr_read_flash(fme, address, size, buf);
}
struct opae_manager_ops ifpga_mgr_ops = {
@@ -277,6 +308,10 @@ struct opae_manager_ops ifpga_mgr_ops = {
.update_flash = ifpga_mgr_update_flash,
.stop_flash_update = ifpga_mgr_stop_flash_update,
.reload = ifpga_mgr_reload,
+ .available_images = ifpga_available_images,
+ .get_poc_images = ifpga_mgr_get_poc_images,
+ .set_poc_image = ifpga_mgr_set_poc_image,
+ .read_flash = ifpga_mgr_read_flash
};
static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.h
b/drivers/raw/ifpga/base/ifpga_feature_dev.h
index a637eb5..7a2f2e5 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.h
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.h
@@ -223,4 +223,6 @@ int fme_mgr_get_retimer_status(struct ifpga_fme_hw *fme,
int fme_mgr_get_sensor_value(struct ifpga_fme_hw *fme,
struct opae_sensor_info *sensor,
unsigned int *value);
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf);
#endif /* _IFPGA_FEATURE_DEV_H_ */
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 1b9a922..1f54680 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -1658,3 +1658,11 @@ struct ifpga_feature_ops fme_pmci_ops = {
.init = fme_pmci_init,
.uinit = fme_pmci_uinit,
};
+
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf)
+{
+ struct intel_max10_device *max10 = fme->max10_dev;
+
+ return opae_read_flash(max10, address, size, buf);
+}
diff --git a/drivers/raw/ifpga/base/ifpga_fme_rsu.c
b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
index f147aaa..88a19fa 100644
--- a/drivers/raw/ifpga/base/ifpga_fme_rsu.c
+++ b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
@@ -9,6 +9,28 @@
static struct ifpga_sec_mgr *sec_mgr;
+static void lock(struct ifpga_sec_mgr *smgr)
+{
+ struct ifpga_hw *hw = NULL;
+
+ if (smgr && smgr->fme) {
+ hw = (struct ifpga_hw *)smgr->fme->parent;
+ if (hw)
+ opae_adapter_lock(hw->adapter, -1);
+ }
+}
+
+static void unlock(struct ifpga_sec_mgr *smgr)
+{
+ struct ifpga_hw *hw = NULL;
+
+ if (smgr && smgr->fme) {
+ hw = (struct ifpga_hw *)smgr->fme->parent;
+ if (hw)
+ opae_adapter_unlock(hw->adapter);
+ }
+}
+
static void set_rsu_control(struct ifpga_sec_mgr *smgr, uint32_t ctrl)
{
if (smgr && smgr->rsu_control)
@@ -22,6 +44,16 @@ static uint32_t get_rsu_control(struct ifpga
[PATCH v8 0/5] introduce AFU PMD driver of FPGA
The first patch implements the framework of the AFU PMD driver based on raw device interfaces. The subsequent patches implement the driver of some AFUs. Changes from v7: 1. move driver description to ifpga.rst per Rosen comment. 2. rename function name according to DPDK program guide per Rosen comment. Wei Huang (5): raw/ifpga: introduce AFU driver framework raw/ifpga: add N3000 AFU driver raw/ifpga: add HE-LPBK AFU driver raw/ifpga: add HE-MEM AFU driver raw/ifpga: add HE-HSSI AFU driver doc/guides/rawdevs/ifpga.rst| 98 ++ drivers/raw/ifpga/afu_pmd_core.c| 438 drivers/raw/ifpga/afu_pmd_core.h| 95 ++ drivers/raw/ifpga/afu_pmd_he_hssi.c | 371 +++ drivers/raw/ifpga/afu_pmd_he_hssi.h | 109 ++ drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436 drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++ drivers/raw/ifpga/afu_pmd_he_mem.c | 183 drivers/raw/ifpga/afu_pmd_he_mem.h | 46 + drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +++ drivers/raw/ifpga/afu_pmd_n3000.h | 339 ++ drivers/raw/ifpga/meson.build |4 +- drivers/raw/ifpga/rte_pmd_afu.h | 136 +++ 13 files changed, 4399 insertions(+), 1 deletion(-) create mode 100644 drivers/raw/ifpga/afu_pmd_core.c create mode 100644 drivers/raw/ifpga/afu_pmd_core.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h -- 1.8.3.1
[PATCH v8 1/5] raw/ifpga: introduce AFU driver framework
AFU (Acceleration Function Unit) is part of FPGA and enumerated by ifpga driver. This driver implements common AFU device interfaces and exposes them to application as standard raw device APIs. Normally application can operate specified AFU as below, 1. call rte_rawdev_pmd_get_named_dev() to find AFU device. 2. call rte_rawdev_configure() to initialize AFU device. 3. call rte_rawdev_selftest() to test AFU device. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang Reviewed-by: Rosen Xu --- v2: fix typo --- v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32 --- v4: fix coding style issue and build error in FreeBSD13-64 --- v5: split patch into several patches --- v6: move source files to ifpga and rename, use spinlock --- v7: move driver description into ifpga.rst --- doc/guides/rawdevs/ifpga.rst | 98 + drivers/raw/ifpga/afu_pmd_core.c | 438 +++ drivers/raw/ifpga/afu_pmd_core.h | 76 +++ drivers/raw/ifpga/meson.build| 2 +- 4 files changed, 613 insertions(+), 1 deletion(-) create mode 100644 drivers/raw/ifpga/afu_pmd_core.c create mode 100644 drivers/raw/ifpga/afu_pmd_core.h diff --git a/doc/guides/rawdevs/ifpga.rst b/doc/guides/rawdevs/ifpga.rst index bf557b2..5fb8d37 100644 --- a/doc/guides/rawdevs/ifpga.rst +++ b/doc/guides/rawdevs/ifpga.rst @@ -102,6 +102,104 @@ The following device parameters are supported: identifies AFU Bit Stream file. +IFPGA AFU Driver +=== + +AFU (Acceleration Function Unit) is a function or set of functions that perform +various acceleration task on FPGA platform. The image of AFU is called as GBS +(Green Bit Stream) which can be used by PR (Partial Reconfigure) tool to load +into the FPGA, different AFUs can be dynamically reloaded respectively. + +AFU has two main communication paths between the host: + +- FPGA to host transactions + + The FPGA accesses host memory using a 512 bits data path. This data path has + separate channels for read and write traffic allowing for simultaneous read + and write to occur. The read and write channels support bursts of 1, 2, and + 4 cache lines. + +- Host to FPGA (MMIO) transactions + + The host can access a 256 KB address space within the FPGA. This address space + contains Device Feature Header (DFHs) and the control and status registers of + the AFU hardware. + +AFU must implement the following registers: + +- AFU DFH - a 64-bit header at MMIO address offset 0x0 + +- AFU ID - a 128-bit UUID at MMIO address offset 0x2 + +The AFU is enumerated and recorded by IFPGA Rawdev Driver. Then AFU devices are +created with the help of IFPGA Bus Driver, AFU driver probe these AFU devices +and expose them as standard raw devices for application to access. + +Implementation details +-- + +IFPGA Rawdev Driver identifies AFU in FPGA, AFU location (PF/VF address) and +UUID are taken by ifpga_rawdev_cfg vdev driver which hot plug AFU into IFPGA +Bus. + +IFPGA Bus takes AFU device scan and AFU driver probe. All AFU device driver +bind to AFU device by its dedicated UUID. To avoid unnecessary code duplication +and ensure maximum performance, AFU driver implements the common part of raw +device driver. Several specific AFU drivers are provided for reference. The +design is summarized by the following block diagram:: + + +---+ + | Application(s) | + +.--+ + | + +'--+ + | DPDK Framework (Rawdev APIs) | + +-+++ + || + +-'+ | + | IFPGA AFU Driver| +'+ + | | | | + |+---+ +--+| | | + || AFU Dev1 PMD | | AFU Dev2 PMD || | | + |+---+---+ +---+--+| | | + +|-|---+ | | + | | | | + +'--+ +---'---+ | IFPGA | + |AFU Dev1 | |AFU Dev2 | | Rawdev Driver | + +---.---+ +---.---+ | | + | | Rawdev | | + +---'--'---+Ops |
[PATCH v8 2/5] raw/ifpga: add N3000 AFU driver
N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: move source files to ifpga and rename, refine code
---
v3: fix Ubuntu 20.04 ARM build
---
v4: rename function name according to DPDK program guide
---
drivers/raw/ifpga/afu_pmd_core.h | 19 +
drivers/raw/ifpga/afu_pmd_n3000.c | 2019 +
drivers/raw/ifpga/afu_pmd_n3000.h | 339 +++
drivers/raw/ifpga/meson.build |3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 97 ++
5 files changed, 2476 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.c
create mode 100644 drivers/raw/ifpga/afu_pmd_n3000.h
create mode 100644 drivers/raw/ifpga/rte_pmd_afu.h
diff --git a/drivers/raw/ifpga/afu_pmd_core.h b/drivers/raw/ifpga/afu_pmd_core.h
index 4fad2c7..a938172 100644
--- a/drivers/raw/ifpga/afu_pmd_core.h
+++ b/drivers/raw/ifpga/afu_pmd_core.h
@@ -14,6 +14,7 @@
#include
#include
+#include
#include
#include
@@ -60,6 +61,24 @@ struct afu_rawdev {
return rawdev ? (struct afu_rawdev *)rawdev->dev_private : NULL;
}
+#define CLS_TO_SIZE(n) ((n) << 6) /* get size of n cache lines */
+#define SIZE_TO_CLS(s) ((s) >> 6) /* convert size to number of cache lines */
+#define MHZ(f) ((f) * 100)
+
+#define dsm_poll_timeout(addr, val, cond, invl, timeout) \
+({ \
+ uint64_t __wait = 0; \
+ uint64_t __invl = (invl);\
+ uint64_t __timeout = (timeout); \
+ for (; __wait <= __timeout; __wait += __invl) { \
+ (val) = *(addr); \
+ if (cond)\
+ break; \
+ rte_delay_ms(__invl);\
+ }\
+ (cond) ? 0 : 1; \
+})
+
void afu_pmd_register(struct afu_rawdev_drv *driver);
void afu_pmd_unregister(struct afu_rawdev_drv *driver);
diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
b/drivers/raw/ifpga/afu_pmd_n3000.c
new file mode 100644
index 000..8708164
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -0,0 +1,2019 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_n3000.h"
+
+static int nlb_afu_config(struct afu_rawdev *dev)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ if (!dev->priv)
+ return -ENOENT;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+ cfg = &priv->nlb_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ if (cfg->cache_policy == NLB_WRPUSH_I)
+ v.wrpush_i = 1;
+ else
+ v.wrthru_en = cfg->cache_policy;
+
+ if (cfg->cache_hint == NLB_RDLINE_MIXED)
+ v.rdsel = 3;
+ else
+ v.rdsel = cfg->cache_hint;
+
+ v.mode = cfg->mode;
+ v.chsel = cfg->read_vc;
+ v.wr_chsel = cfg->write_vc;
+ v.wrfence_chsel = cfg->wrfence_vc;
+ v.wrthru_en = cfg->cache_policy;
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->nlb_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void nlb_afu_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_dsm_status *stat = NULL;
+ uint64_t ticks = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+
+ cfg = &priv->nlb_cfg;
+ stat = priv->nlb_ctx.status_ptr;
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0)
+ cfg->freq_mhz = 200;
+
+ num = (double)stat->num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat->
[PATCH v8 3/5] raw/ifpga: add HE-LPBK AFU driver
HE-LPBK and HE-MEM-LPBK are host exerciser modules in OFS FPGA,
HE-LPBK is used to test PCI bus and HE-MEM-LPBK is used to test
local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: move source files to ifpga and rename, refine code
---
drivers/raw/ifpga/afu_pmd_he_lpbk.c | 436
drivers/raw/ifpga/afu_pmd_he_lpbk.h | 126 +++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h | 14 ++
4 files changed, 577 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_lpbk.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_lpbk.c
b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
new file mode 100644
index 000..8b2c85b
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_lpbk.c
@@ -0,0 +1,436 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_lpbk.h"
+
+static int he_lpbk_afu_config(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_lpbk_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ v.mode = cfg->mode;
+ v.trput_interleave = cfg->trput_interleave;
+ if (cfg->multi_cl == 4)
+ v.multicl_len = 2;
+ else
+ v.multicl_len = cfg->multi_cl - 1;
+
+ IFPGA_RAWDEV_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->he_lpbk_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void he_lpbk_report(struct afu_rawdev *dev, uint32_t cl)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_dsm_status *stat = NULL;
+ struct he_lpbk_status0 stat0;
+ struct he_lpbk_status1 stat1;
+ uint64_t swtest_msg = 0;
+ uint64_t ticks = 0;
+ uint64_t info = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct he_lpbk_priv *)dev->priv;
+ cfg = &priv->he_lpbk_cfg;
+ ctx = &priv->he_lpbk_ctx;
+
+ stat = ctx->status_ptr;
+
+ swtest_msg = rte_read64(ctx->addr + CSR_SWTEST_MSG);
+ stat0.csr = rte_read64(ctx->addr + CSR_STATUS0);
+ stat1.csr = rte_read64(ctx->addr + CSR_STATUS1);
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0) {
+ info = rte_read64(ctx->addr + CSR_HE_INFO0);
+ IFPGA_RAWDEV_PMD_INFO("API version: %"PRIx64, info >> 16);
+ cfg->freq_mhz = info & 0x;
+ if (cfg->freq_mhz == 0) {
+ IFPGA_RAWDEV_PMD_INFO("Frequency of AFU clock is
unknown."
+ " Assuming 350 MHz.");
+ cfg->freq_mhz = 350;
+ }
+ }
+
+ num = (double)stat0.num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat0.num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachelines Read_Count Write_Count Pend_Read Pend_Write "
+ "Clocks@%uMHz Rd_Bandwidth Wr_Bandwidth\n",
+ cfg->freq_mhz);
+ printf("%10u %10u %10u %10u %10u %12"PRIu64
+ " %7.3f GB/s %7.3f GB/s\n",
+ cl, stat0.num_reads, stat0.num_writes,
+ stat1.num_pend_reads, stat1.num_pend_writes,
+ ticks, rd_bw / 1e9, wr_bw / 1e9);
+ printf("Test Message: 0x%"PRIx64"\n", swtest_msg);
+}
+
+static int he_lpbk_test(struct afu_rawdev *dev)
+{
+ struct he_lpbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lpbk_cfg *cfg = NULL;
+ struct he_lpbk_ctx *ctx = NULL;
+ struct he_lpbk_csr_ctl ctl;
+ uint32_t *ptr = NULL;
+ uint32_t i, j, cl, val = 0;
+ uint64_t sval = 0;
+ int ret = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lpbk_priv *
[PATCH v8 4/5] raw/ifpga: add HE-MEM AFU driver
HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: move source files to ifpga and rename
---
drivers/raw/ifpga/afu_pmd_he_mem.c | 183 +
drivers/raw/ifpga/afu_pmd_he_mem.h | 46 ++
drivers/raw/ifpga/meson.build | 2 +-
drivers/raw/ifpga/rte_pmd_afu.h| 7 ++
4 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_mem.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_mem.c
b/drivers/raw/ifpga/afu_pmd_he_mem.c
new file mode 100644
index 000..0f57a03
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_mem.c
@@ -0,0 +1,183 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_mem.h"
+
+static int he_mem_tg_test(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct rte_pmd_afu_he_mem_tg_cfg *cfg = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+ uint64_t value = 0x12345678;
+ uint64_t cap = 0;
+ uint64_t channel_mask = 0;
+ int i, t = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_mem_tg_cfg;
+ ctx = &priv->he_mem_tg_ctx;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Channel mask: 0x%x", cfg->channel_mask);
+
+ rte_write64(value, ctx->addr + MEM_TG_SCRATCHPAD);
+ cap = rte_read64(ctx->addr + MEM_TG_SCRATCHPAD);
+ IFPGA_RAWDEV_PMD_DEBUG("Scratchpad value: 0x%"PRIx64, cap);
+ if (cap != value) {
+ IFPGA_RAWDEV_PMD_ERR("Test scratchpad register failed");
+ return -EIO;
+ }
+
+ cap = rte_read64(ctx->addr + MEM_TG_CTRL);
+ IFPGA_RAWDEV_PMD_DEBUG("Capability: 0x%"PRIx64, cap);
+
+ channel_mask = cfg->channel_mask & cap;
+ /* start traffic generators */
+ rte_write64(channel_mask, ctx->addr + MEM_TG_CTRL);
+
+ /* check test status */
+ while (t < MEM_TG_TIMEOUT_MS) {
+ value = rte_read64(ctx->addr + MEM_TG_STAT);
+ for (i = 0; i < NUM_MEM_TG_CHANNELS; i++) {
+ if (channel_mask & (1 << i)) {
+ if (TGACTIVE(value, i))
+ continue;
+ printf("TG channel %d test %s\n", i,
+ TGPASS(value, i) ? "pass" :
+ TGTIMEOUT(value, i) ? "timeout" :
+ TGFAIL(value, i) ? "fail" : "error");
+ channel_mask &= ~(1 << i);
+ }
+ }
+ if (!channel_mask)
+ break;
+ rte_delay_ms(MEM_TG_POLL_INTERVAL_MS);
+ t += MEM_TG_POLL_INTERVAL_MS;
+ }
+
+ if (channel_mask) {
+ IFPGA_RAWDEV_PMD_ERR("Timeout 0x%04lx", (unsigned long)value);
+ return channel_mask;
+ }
+
+ return 0;
+}
+
+static int he_mem_tg_init(struct afu_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv) {
+ priv = rte_zmalloc(NULL, sizeof(struct he_mem_tg_priv), 0);
+ if (!priv)
+ return -ENOMEM;
+ dev->priv = priv;
+ }
+
+ ctx = &priv->he_mem_tg_ctx;
+ ctx->addr = (uint8_t *)dev->addr;
+
+ return 0;
+}
+
+static int he_mem_tg_config(struct afu_rawdev *dev, void *config,
+ size_t config_size)
+{
+ struct he_mem_tg_priv *priv = NULL;
+
+ if (!dev || !config || !config_size)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ if (config_size != sizeof(struct rte_pmd_afu_he_mem_tg_cfg))
+ return -EINVAL;
+
+ rte_memcpy(&priv->he_mem_tg_cfg, config, sizeof(priv->he_mem_tg_cfg));
+
+ return 0;
+}
+
+static int he_mem_tg_close(struct afu_rawdev *dev)
+{
+ if (!dev)
+ return -EINVAL;
+
+ rte_free(dev->pr
[PATCH v8 5/5] raw/ifpga: add HE-HSSI AFU driver
HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Reviewed-by: Rosen Xu
---
v2: move source files to ifpga and rename, refine code
---
drivers/raw/ifpga/afu_pmd_he_hssi.c | 371
drivers/raw/ifpga/afu_pmd_he_hssi.h | 109 +++
drivers/raw/ifpga/meson.build | 3 +-
drivers/raw/ifpga/rte_pmd_afu.h | 18 ++
4 files changed, 500 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.c
create mode 100644 drivers/raw/ifpga/afu_pmd_he_hssi.h
diff --git a/drivers/raw/ifpga/afu_pmd_he_hssi.c
b/drivers/raw/ifpga/afu_pmd_he_hssi.c
new file mode 100644
index 000..102de50
--- /dev/null
+++ b/drivers/raw/ifpga/afu_pmd_he_hssi.c
@@ -0,0 +1,371 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_pmd_core.h"
+#include "afu_pmd_he_hssi.h"
+
+static int he_hssi_indirect_write(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect write 0x%x, value 0x%08x", addr,
value);
+
+ if (!ctx)
+ return -EINVAL;
+
+ data.write_data = value;
+ rte_write64(data.csr, ctx->addr + TRAFFIC_CTRL_DATA);
+
+ cmd.csr = 0;
+ cmd.write_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int he_hssi_indirect_read(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t *value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ if (!ctx)
+ return -EINVAL;
+
+ cmd.csr = 0;
+ cmd.read_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans) {
+ data.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_DATA);
+ *value = data.read_data;
+ break;
+ }
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ IFPGA_RAWDEV_PMD_DEBUG("Indirect read 0x%x, value 0x%08x", addr,
*value);
+ return 0;
+}
+
+static void he_hssi_report(struct he_hssi_ctx *ctx)
+{
+ uint32_t val = 0;
+ uint64_t v64 = 0;
+ int ret = 0;
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_GOOD, &val);
+ if (ret)
+ return;
+ printf("Number of good packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_PKT_BAD, &val);
+ if (ret)
+ return;
+ printf("Number of bad packets received: %u\n", val);
+
+ ret = he_hssi_indirect_read(ctx, TM_BYTE_CNT1, &val);
+ if (ret)
+ return;
+ v64 = val;
+ ret = he_hssi_indirect_read(ctx,
[PATCH v3 0/4] introduce PMCI driver
The first patch introduce PMCI base driver to provide interface to access MAX10 register. The second patch support new board information. The third patch update flash access interfaces. The fourth patch support new board sensors. Changes from v2: 1. split PMCI driver into three parts: base driver, flash driver and sensor driver. 2. remove RSU related patch from this patch set. Wei Huang (4): raw/ifpga/base: add PMCI base driver raw/ifpga/base: update board information raw/ifpga/base: update flash operation interface raw/ifpga/base: add PMCI sensor driver drivers/raw/ifpga/base/ifpga_api.c | 9 + drivers/raw/ifpga/base/ifpga_defines.h | 103 ++- drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 + drivers/raw/ifpga/base/ifpga_feature_dev.h | 3 + drivers/raw/ifpga/base/ifpga_fme.c | 271 +-- drivers/raw/ifpga/base/ifpga_fme_error.c | 2 + drivers/raw/ifpga/base/ifpga_port_error.c| 2 +- drivers/raw/ifpga/base/opae_hw_api.c | 49 ++ drivers/raw/ifpga/base/opae_hw_api.h | 3 + drivers/raw/ifpga/base/opae_intel_max10.c| 940 +-- drivers/raw/ifpga/base/opae_intel_max10.h| 313 +++- drivers/raw/ifpga/base/opae_osdep.h | 43 +- drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 + 13 files changed, 1556 insertions(+), 194 deletions(-) -- 1.8.3.1
[PATCH v3 1/4] raw/ifpga/base: add PMCI base driver
PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This base driver implements interfaces to access registers of BMC chip.
Signed-off-by: Wei Huang
---
v2: fix typo. 'spi_master' is not misspelled and is not introduced
in this patch
---
v3: split PMCI driver into several patches
---
drivers/raw/ifpga/base/ifpga_defines.h | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
drivers/raw/ifpga/base/ifpga_fme.c | 142 --
drivers/raw/ifpga/base/opae_intel_max10.c | 297 -
drivers/raw/ifpga/base/opae_intel_max10.h | 229 +-
drivers/raw/ifpga/base/opae_osdep.h| 43 -
7 files changed, 597 insertions(+), 119 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 9a280eb..f84ed1d 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -23,6 +23,7 @@
#define FME_FEATURE_NIOS_SPI"fme_nios_spi"
#define FME_FEATURE_I2C_MASTER "fme_i2c_master"
#define FME_FEATURE_ETH_GROUP "fme_eth_group"
+#define FME_FEATURE_PMCI"fme_pmci"
#define PORT_FEATURE_HEADER "port_hdr"
#define PORT_FEATURE_UAFU "port_uafu"
@@ -91,6 +92,7 @@ enum fpga_id_type {
#define FME_FEATURE_ID_NIOS_SPI 0xd
#define FME_FEATURE_ID_I2C_MASTER 0xf
#define FME_FEATURE_ID_ETH_GROUP 0x10
+#define FME_FEATURE_ID_PMCI 0x12
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.c
b/drivers/raw/ifpga/base/ifpga_feature_dev.c
index dbecc7b..0a00af1 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.c
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.c
@@ -227,6 +227,8 @@ int port_clear_error(struct ifpga_port_hw *port)
&fme_i2c_master_ops),},
{FEATURE_DRV(FME_FEATURE_ID_ETH_GROUP, FME_FEATURE_ETH_GROUP,
&fme_eth_group_ops),},
+ {FEATURE_DRV(FME_FEATURE_ID_PMCI, FME_FEATURE_PMCI,
+ &fme_pmci_ops),},
{0, NULL, NULL}, /* end of arrary */
};
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.h
b/drivers/raw/ifpga/base/ifpga_feature_dev.h
index b355d22..a637eb5 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.h
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.h
@@ -178,6 +178,7 @@ int do_pr(struct ifpga_hw *hw, u32 port_id, const char
*buffer, u32 size,
extern struct ifpga_feature_ops fme_i2c_master_ops;
extern struct ifpga_feature_ops fme_eth_group_ops;
extern struct ifpga_feature_ops fme_nios_spi_master_ops;
+extern struct ifpga_feature_ops fme_pmci_ops;
int port_get_prop(struct ifpga_port_hw *port, struct feature_prop *prop);
int port_set_prop(struct ifpga_port_hw *port, struct feature_prop *prop);
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 43c7b9c..4d089d2 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -983,11 +983,25 @@ static int fme_spi_init(struct ifpga_feature *feature)
altera_spi_init(spi_master);
- max10 = intel_max10_device_probe(spi_master, 0);
- if (!max10) {
+ max10 = opae_zmalloc(sizeof(*max10));
+ if (!max10)
+ goto release_dev;
+
+ max10->spi_master = spi_master;
+ max10->type = M10_N3000;
+
+ max10->spi_tran_dev = spi_transaction_init(spi_master, 0);
+ if (!max10->spi_tran_dev) {
+ dev_err(fme, "%s spi tran init fail\n", __func__);
+ goto free_max10;
+ }
+
+ /* init the max10 device */
+ ret = intel_max10_device_init(max10);
+ if (ret) {
ret = -ENODEV;
dev_err(fme, "max10 init fail\n");
- goto spi_fail;
+ goto release_spi_tran_dev;
}
fme->max10_dev = max10;
@@ -1002,7 +1016,12 @@ static int fme_spi_init(struct ifpga_feature *feature)
max10_fail:
intel_max10_device_remove(fme->max10_dev);
-spi_fail:
+release_spi_tran_dev:
+ if (max10->spi_tran_dev)
+ spi_transaction_remove(max10->spi_tran_dev);
+free_max10:
+ opae_free(max10);
+release_dev:
altera_spi_release(spi_master);
return ret;
}
@@ -1011,8 +1030,10 @@ static void fme_spi_uinit(struct ifpga_feature *feature)
{
struct ifpga_fme_hw *fme = (struct ifpga_fme_hw *)feature->parent;
- if (fme->max10_dev)
+ if (fme->max10_dev) {
intel_max10_device_remove(fme->max10_dev);
+ opae_free(fme->max10_dev);
+ }
}
struct ifpga_feature_ops fme_spi_master_ops = {
@@ -1157,20 +1178,30 @@ static i
[PATCH v3 2/4] raw/ifpga/base: update board information
N6000 ADP platform has different definition of board information,
they can be recognized after this patch.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_defines.h| 101 +++--
drivers/raw/ifpga/base/ifpga_fme.c| 121 --
drivers/raw/ifpga/base/ifpga_fme_error.c | 2 +
drivers/raw/ifpga/base/ifpga_port_error.c | 2 +-
drivers/raw/ifpga/base/opae_intel_max10.c | 45 +++
drivers/raw/ifpga/base/opae_intel_max10.h | 3 +
6 files changed, 194 insertions(+), 80 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index f84ed1d..7c8fa89 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -268,6 +268,24 @@ struct feature_fme_bitstream_id {
union {
u64 csr;
struct {
+ u8 build_patch:8;
+ u8 build_minor:8;
+ u8 build_major:8;
+ u8 fvl_bypass:1;
+ u8 mac_lightweight:1;
+ u8 disagregate:1;
+ u8 lightweiht:1;
+ u8 seu:1;
+ u8 ptp:1;
+ u8 reserve:2;
+ u8 interface:4;
+ u32 afu_revision:12;
+ u8 patch:4;
+ u8 minor:4;
+ u8 major:4;
+ u8 reserved:4;
+ } v1;
+ struct {
u32 gitrepo_hash:32;/* GIT repository hash */
/*
* HSSI configuration identifier:
@@ -276,7 +294,8 @@ struct feature_fme_bitstream_id {
* 2 - Ethernet
*/
u8 hssi_id:4;
- u16 rsvd1:12; /* Reserved */
+ u8 rsvd1:4;
+ u8 fim_type:8;
/* Bitstream version patch number */
u8 bs_verpatch:4;
/* Bitstream version minor number */
@@ -285,7 +304,7 @@ struct feature_fme_bitstream_id {
u8 bs_vermajor:4;
/* Bitstream version debug number */
u8 bs_verdebug:4;
- };
+ } v2;
};
};
@@ -1672,31 +1691,6 @@ struct bts_header {
#define check_support(n) (n == 1 ? "support" : "no")
-/* bitstream id definition */
-struct fme_bitstream_id {
- union {
- u64 id;
- struct {
- u8 build_patch:8;
- u8 build_minor:8;
- u8 build_major:8;
- u8 fvl_bypass:1;
- u8 mac_lightweight:1;
- u8 disagregate:1;
- u8 lightweiht:1;
- u8 seu:1;
- u8 ptp:1;
- u8 reserve:2;
- u8 interface:4;
- u32 afu_revision:12;
- u8 patch:4;
- u8 minor:4;
- u8 major:4;
- u8 reserved:4;
- };
- };
-};
-
enum board_interface {
VC_8_10G = 0,
VC_4_25G = 1,
@@ -1705,10 +1699,30 @@ enum board_interface {
VC_2_2_25G = 4,
};
+enum fim_type {
+ BASE_ADP = 0,
+ BASE_FDK,
+ BASE_X16_ADP,
+ BASE_X16_FDK,
+ FIMA_10G_ADP,
+ FIMA_25G_ADP,
+ FIMA_100G_ADP,
+ FIMB_ADP,
+ FIMC_ADP
+};
+
+enum hssi_id {
+ NO_HSSI = 0,
+ PCIE_RP,
+ ETHER_NET
+};
+
enum pac_major {
VISTA_CREEK = 0,
RUSH_CREEK = 1,
DARBY_CREEK = 2,
+ LIGHTNING_CREEK = 3,
+ ARROW_CREEK = 5,
};
enum pac_minor {
@@ -1720,23 +1734,30 @@ enum pac_minor {
struct opae_board_info {
enum pac_major major;
enum pac_minor minor;
- enum board_interface type;
-
- /* PAC features */
- u8 fvl_bypass;
- u8 mac_lightweight;
- u8 disaggregate;
- u8 lightweight;
- u8 seu;
- u8 ptp;
u32 boot_page;
u32 max10_version;
u32 nios_fw_version;
- u32 nums_of_retimer;
- u32 ports_per_retimer;
- u32 nums_of_fvl;
- u32 ports_per_fvl;
+
+ union {
+ struct { /* N3000 specific */
+ enum board_interface type;
+ u8 fvl_bypass;
+ u8 mac_lightweight;
+ u8 disaggregate;
+ u8 lightweight;
+ u8 seu;
+ u8 ptp;
+ u32 nums_of_retimer;
+ u32 ports_per_retimer;
+ u32 nums_of_fvl;
+
[PATCH v3 3/4] raw/ifpga/base: update flash operation interface
In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically converts the mailbox commands to the SPI protocol
required by SPI slave.
That means flash operation is different from old platform, new
interfaces are introduced to adapt these changes.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_api.c | 9 +
drivers/raw/ifpga/base/ifpga_feature_dev.h | 2 +
drivers/raw/ifpga/base/ifpga_fme.c | 8 +
drivers/raw/ifpga/base/opae_hw_api.c | 20 ++
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/base/opae_intel_max10.c| 282 +++
drivers/raw/ifpga/base/opae_intel_max10.h| 46
drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 +
8 files changed, 379 insertions(+)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index f19cc26..098de0c 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -268,6 +268,14 @@ static int ifpga_mgr_reload(struct opae_manager *mgr, int
type, int page)
return fpga_reload(fme, type, page);
}
+static int ifpga_mgr_read_flash(struct opae_manager *mgr, u32 address,
+ u32 size, void *buf)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fme_mgr_read_flash(fme, address, size, buf);
+}
+
struct opae_manager_ops ifpga_mgr_ops = {
.flash = ifpga_mgr_flash,
.get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
@@ -277,6 +285,7 @@ struct opae_manager_ops ifpga_mgr_ops = {
.update_flash = ifpga_mgr_update_flash,
.stop_flash_update = ifpga_mgr_stop_flash_update,
.reload = ifpga_mgr_reload,
+ .read_flash = ifpga_mgr_read_flash
};
static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.h
b/drivers/raw/ifpga/base/ifpga_feature_dev.h
index a637eb5..7a2f2e5 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.h
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.h
@@ -223,4 +223,6 @@ int fme_mgr_get_retimer_status(struct ifpga_fme_hw *fme,
int fme_mgr_get_sensor_value(struct ifpga_fme_hw *fme,
struct opae_sensor_info *sensor,
unsigned int *value);
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf);
#endif /* _IFPGA_FEATURE_DEV_H_ */
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 608a352..25ff819 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -1658,3 +1658,11 @@ struct ifpga_feature_ops fme_pmci_ops = {
.init = fme_pmci_init,
.uinit = fme_pmci_uinit,
};
+
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf)
+{
+ struct intel_max10_device *max10 = fme->max10_dev;
+
+ return opae_read_flash(max10, address, size, buf);
+}
diff --git a/drivers/raw/ifpga/base/opae_hw_api.c
b/drivers/raw/ifpga/base/opae_hw_api.c
index 87256fc..fd08326 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.c
+++ b/drivers/raw/ifpga/base/opae_hw_api.c
@@ -1041,3 +1041,23 @@ int opae_mgr_reload(struct opae_manager *mgr, int type,
int page)
return -ENOENT;
}
+/**
+ * opae_mgr_read_flash - read flash content
+ * @mgr: targeted manager
+ * @address: the start address of flash
+ * @size: the size of flash
+ * @buf: the read buffer
+ *
+ * Return: 0 on success, otherwise error code.
+ */
+int opae_mgr_read_flash(struct opae_manager *mgr, u32 address,
+ u32 size, void *buf)
+{
+ if (!mgr)
+ return -EINVAL;
+
+ if (mgr->ops && mgr->ops->read_flash)
+ return mgr->ops->read_flash(mgr, address, size, buf);
+
+ return -ENOENT;
+}
diff --git a/drivers/raw/ifpga/base/opae_hw_api.h
b/drivers/raw/ifpga/base/opae_hw_api.h
index fd40e09..de1e984 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.h
+++ b/drivers/raw/ifpga/base/opae_hw_api.h
@@ -60,6 +60,7 @@ struct opae_manager_ops {
u64 *status);
int (*stop_flash_update)(struct opae_manager *mgr, int force);
int (*reload)(struct opae_manager *mgr, int type, int page);
+ int (*read_flash)(struct opae_manager *mgr, u32 address, u32 size, void
*buf);
};
/* networking management ops in FME */
@@ -368,4 +369,5 @@ int opae_mgr_update_flash(struct opae_manager *mgr, const
char *image,
uint64_t *status);
int opae_mgr_stop_flash_update(struct opae_manager *mgr, int force);
int opae_mgr_reload(struct opae_manager *mgr, int type, int page);
+int opae_mgr_read_flash(struct opae_manager *mgr, u32 address, u32 size, void
*buf);
#endif /* _OPAE_HW_API_H_*/
diff --git a/drivers/raw/ifpga/base/opae_intel_max10.c
b/drivers/raw/ifpga/base/opa
[PATCH v3 4/4] raw/ifpga/base: add PMCI sensor driver
N6000 ADP platform support more sensors than N3000, they are
accessed with the help of PMCI sensor driver.
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/opae_hw_api.c | 29 +++
drivers/raw/ifpga/base/opae_hw_api.h | 1 +
drivers/raw/ifpga/base/opae_intel_max10.c | 326 ++
drivers/raw/ifpga/base/opae_intel_max10.h | 35
4 files changed, 391 insertions(+)
diff --git a/drivers/raw/ifpga/base/opae_hw_api.c
b/drivers/raw/ifpga/base/opae_hw_api.c
index fd08326..1117c3e 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.c
+++ b/drivers/raw/ifpga/base/opae_hw_api.c
@@ -831,6 +831,35 @@ int opae_manager_get_retimer_status(struct opae_manager
*mgr,
}
/**
+ * opae_manager_get_sensor_list - get sensor name list
+ * @mgr: opae_manager of sensors
+ * @buf: buffer to accommodate name list separated by semicolon
+ * @size: size of buffer
+ *
+ * Return: the pointer of the opae_sensor_info
+ */
+int
+opae_mgr_get_sensor_list(struct opae_manager *mgr, char *buf, size_t size)
+{
+ struct opae_sensor_info *sensor;
+ uint32_t offset = 0;
+
+ opae_mgr_for_each_sensor(mgr, sensor) {
+ if (sensor->name) {
+ if (buf && (offset < size))
+ snprintf(buf + offset, size - offset, "%s;",
+ sensor->name);
+ offset += strlen(sensor->name) + 1;
+ }
+ }
+
+ if (buf && (offset > 0) && (offset <= size))
+ buf[offset-1] = 0;
+
+ return offset;
+}
+
+/**
* opae_manager_get_sensor_by_id - get sensor device
* @id: the id of the sensor
*
diff --git a/drivers/raw/ifpga/base/opae_hw_api.h
b/drivers/raw/ifpga/base/opae_hw_api.h
index de1e984..613563a 100644
--- a/drivers/raw/ifpga/base/opae_hw_api.h
+++ b/drivers/raw/ifpga/base/opae_hw_api.h
@@ -94,6 +94,7 @@ int opae_manager_flash(struct opae_manager *mgr, int acc_id,
const char *buf,
u32 size, u64 *status);
int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
u8 group_id, struct opae_eth_group_region_info *info);
+int opae_mgr_get_sensor_list(struct opae_manager *mgr, char *buf, size_t size);
struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,
const char *name);
struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,
diff --git a/drivers/raw/ifpga/base/opae_intel_max10.c
b/drivers/raw/ifpga/base/opae_intel_max10.c
index 9c01729..dd97a5f 100644
--- a/drivers/raw/ifpga/base/opae_intel_max10.c
+++ b/drivers/raw/ifpga/base/opae_intel_max10.c
@@ -1102,6 +1102,328 @@ int max10_get_bmcfw_version(struct intel_max10_device
*dev, unsigned int *val)
.auth_result = M10BMC_PMCI_AUTH_RESULT,
};
+static const struct max10_sensor_raw_data n6000bmc_temp_tbl[] = {
+ { 0x444, 0x448, 0x44c, 0x0, 0x0, 500,
+ "FPGA E-TILE Temperature #1" },
+ { 0x450, 0x454, 0x458, 0x0, 0x0, 500,
+ "FPGA E-TILE Temperature #2" },
+ { 0x45c, 0x460, 0x464, 0x0, 0x0, 500,
+ "FPGA E-TILE Temperature #3" },
+ { 0x468, 0x46c, 0x470, 0x0, 0x0, 500,
+ "FPGA E-TILE Temperature #4" },
+ { 0x474, 0x478, 0x47c, 0x0, 0x0, 500,
+ "FPGA P-TILE Temperature" },
+ { 0x484, 0x488, 0x48c, 0x0, 0x0, 500,
+ "FPGA FABRIC Digital Temperature#1" },
+ { 0x490, 0x494, 0x498, 0x0, 0x0, 500,
+ "FPGA FABRIC Digital Temperature#2" },
+ { 0x49c, 0x4a0, 0x4a4, 0x0, 0x0, 500,
+ "FPGA FABRIC Digital Temperature#3" },
+ { 0x4a8, 0x4ac, 0x4b0, 0x0, 0x0, 500,
+ "FPGA FABRIC Digital Temperature#4" },
+ { 0x4b4, 0x4b8, 0x4bc, 0x0, 0x0, 500,
+ "FPGA FABRIC Digital Temperature#5" },
+ { 0x4c0, 0x4c4, 0x4c8, 0x0, 0x0, 500,
+ "FPGA FABRIC Remote Digital Temperature#1" },
+ { 0x4cc, 0x4d0, 0x4d4, 0x0, 0x0, 500,
+ "FPGA FABRIC Remote Digital Temperature#2" },
+ { 0x4d8, 0x4dc, 0x4e0, 0x0, 0x0, 500,
+ "FPGA FABRIC Remote Digital Temperature#3" },
+ { 0x4e4, 0x4e8, 0x4ec, 0x0, 0x0, 500,
+ "FPGA FABRIC Remote Digital Temperature#4" },
+ { 0x4f0, 0x4f4, 0x4f8, 0x0, 0x0, 500,
+ "Board Top Near FPGA Temperature" },
+ { 0x4fc, 0x500, 0x504, 0x52c, 0x0, 500,
+ "Board Bottom Near CVL Temperature" },
+ { 0x508, 0x50c, 0x510, 0x52c, 0x0, 500,
+ "Board Top East Near VRs Temperature" },
+ { 0x514, 0x518, 0x51c, 0x52c, 0x0, 500,
+ "Columbiaville Die Temperature" },
+ { 0x520, 0x524, 0x528, 0x52c, 0x0, 500,
+
[PATCH] raw/ifpga/base: check pointer before dereference
Do null-checking on hw->adapter in fme_pmci_init() before dereference it.
Coverity issue: 379202
Fixes: ca6eb0f7c836 ("raw/ifpga/base: add PMCI base driver")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_fme.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 25ff819..b6dd4ce 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -1591,7 +1591,7 @@ static int fme_pmci_init(struct ifpga_feature *feature)
int ret = 0;
hw = fme->parent;
- if (!hw)
+ if (!hw || !hw->adapter)
return -ENODEV;
mgr = hw->adapter->mgr;
@@ -1608,7 +1608,7 @@ static int fme_pmci_init(struct ifpga_feature *feature)
max10->type = M10_N6000;
max10->mmio = feature->addr;
- if (hw->adapter && hw->adapter->shm.ptr) {
+ if (hw->adapter->shm.ptr) {
sd = (opae_share_data *)hw->adapter->shm.ptr;
max10->bmc_ops.mutex = &sd->spi_mutex;
} else {
--
1.8.3.1
[PATCH] raw/ifpga: avoid potential integer overflow
Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga()
is evaluated using 32-bit arithmetic, which would overflow
potentially. Change tx_chunks to type "uint64_t" to avoid such
issue.
Coverity issue: 379203
Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/afu_pmd_n3000.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
b/drivers/raw/ifpga/afu_pmd_n3000.c
index 8708164..5120df5 100644
--- a/drivers/raw/ifpga/afu_pmd_n3000.c
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -1158,7 +1158,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx,
uint64_t dst, uint64_t src,
uint64_t count_left = count;
uint64_t dma_chunks = 0;
uint64_t offset = 0;
- uint32_t tx_chunks = 0;
+ uint64_t tx_chunks = 0;
uint64_t *tmp_buf = NULL;
int ret = 0;
@@ -1213,7 +1213,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx,
uint64_t dst, uint64_t src,
offset = tx_chunks * ctx->dma_buf_size;
count_left -= offset;
IFPGA_RAWDEV_PMD_DEBUG("0x%"PRIx64" --> 0x%"PRIx64
- " (%u...0x%"PRIx64")",
+ " (%"PRIu64"...0x%"PRIx64")",
src, dst, tx_chunks, count_left);
tmp_buf = (uint64_t *)rte_malloc(NULL, ctx->dma_buf_size,
DMA_ALIGN_BYTES);
--
1.8.3.1
[dpdk-dev] [PATCH v2 0/1] Fix coverity issues reported in DPDK-26381
Below coverity issues are fixed in this patch set. 367480, 367482 Main changes from v1: - change two patches to one patch because they have the same root cause Wei Huang (1): raw/ifpga/base: check size before assigning drivers/raw/ifpga/base/opae_intel_max10.c | 2 +- drivers/raw/ifpga/base/opae_intel_max10.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) -- 2.29.2
[dpdk-dev] [PATCH v2 1/1] raw/ifpga/base: check size before assigning
In max10_staging_area_init(), variable "size" from fdt_get_reg() may
be invalid, it should be checked before assigning to member variable
"staging_area_size" of structure "intel_max10_device".
Coverity issue: 367480, 367482
Fixes: 96ebfcf8125c ("raw/ifpga/base: add SPI and MAX10 device driver")
Signed-off-by: Wei Huang
---
v2: check size before assigning to staging_area_size
---
drivers/raw/ifpga/base/opae_intel_max10.c | 2 +-
drivers/raw/ifpga/base/opae_intel_max10.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/base/opae_intel_max10.c
b/drivers/raw/ifpga/base/opae_intel_max10.c
index 443e248fb3..c223fafa03 100644
--- a/drivers/raw/ifpga/base/opae_intel_max10.c
+++ b/drivers/raw/ifpga/base/opae_intel_max10.c
@@ -593,7 +593,7 @@ static int max10_staging_area_init(struct
intel_max10_device *dev)
continue;
ret = fdt_get_reg(fdt_root, offset, 0, &start, &size);
- if (!ret) {
+ if (!ret && (size <= MAX_STAGING_AREA_SIZE)) {
dev->staging_area_base = start;
dev->staging_area_size = size;
}
diff --git a/drivers/raw/ifpga/base/opae_intel_max10.h
b/drivers/raw/ifpga/base/opae_intel_max10.h
index 670683f017..e7142d6f0d 100644
--- a/drivers/raw/ifpga/base/opae_intel_max10.h
+++ b/drivers/raw/ifpga/base/opae_intel_max10.h
@@ -182,6 +182,7 @@ struct opae_retimer_status {
#define SBUS_VERSION GENMASK(31, 16)
#define DFT_MAX_SIZE 0x7e
+#define MAX_STAGING_AREA_SIZE 0x380
int max10_reg_read(struct intel_max10_device *dev,
unsigned int reg, unsigned int *val);
--
2.29.2
[PATCH v1 0/4] Fix bugs found in raw/ifpga development for arrow creek
This patchset is bug fix for raw/ifpga driver. Changes: * Fix SPI transaction. * Fix pthread cannot join. * Fix ifpga devices cleanup function. * Fix port feature ID. Tianfei Zhang (2): raw/ifpga/base: fix SPI transaction raw/ifpga: fix pthread cannot join Wei Huang (2): raw/ifpga: fix ifpga devices cleanup function raw/ifpga/base: fix port feature ID drivers/raw/ifpga/base/ifpga_defines.h| 6 +- drivers/raw/ifpga/base/opae_spi.c | 12 ++ drivers/raw/ifpga/base/opae_spi.h | 4 + drivers/raw/ifpga/base/opae_spi_transaction.c | 215 +++--- drivers/raw/ifpga/ifpga_rawdev.c | 12 +- 5 files changed, 150 insertions(+), 99 deletions(-) -- 1.8.3.1
[PATCH v1 1/4] raw/ifpga/base: fix SPI transaction
From: Tianfei Zhang
When EOP is detected, 2 more bytes should be received
(may be a SPI_PACKET_ESC before last valid byte) then
rx should be finished.
Fixes: 96ebfcf8 ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/base/opae_spi.c | 12 ++
drivers/raw/ifpga/base/opae_spi.h | 4 +
drivers/raw/ifpga/base/opae_spi_transaction.c | 215 +++---
3 files changed, 140 insertions(+), 91 deletions(-)
diff --git a/drivers/raw/ifpga/base/opae_spi.c
b/drivers/raw/ifpga/base/opae_spi.c
index 9efeecb..ca3d41f 100644
--- a/drivers/raw/ifpga/base/opae_spi.c
+++ b/drivers/raw/ifpga/base/opae_spi.c
@@ -239,6 +239,18 @@ int spi_command(struct altera_spi_device *dev, unsigned
int chip_select,
return 0;
}
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata)
+{
+ return spi_command(dev, chip_select, wlen, wdata, 0, NULL);
+}
+
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata)
+{
+ return spi_command(dev, chip_select, 0, NULL, rlen, rdata);
+}
+
struct altera_spi_device *altera_spi_alloc(void *base, int type)
{
struct altera_spi_device *spi_dev =
diff --git a/drivers/raw/ifpga/base/opae_spi.h
b/drivers/raw/ifpga/base/opae_spi.h
index af11656..bcff67d 100644
--- a/drivers/raw/ifpga/base/opae_spi.h
+++ b/drivers/raw/ifpga/base/opae_spi.h
@@ -117,6 +117,10 @@ struct spi_tran_header {
u32 addr;
};
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata);
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata);
int spi_command(struct altera_spi_device *dev, unsigned int chip_select,
unsigned int wlen, void *wdata, unsigned int rlen, void *rdata);
void spi_cs_deactivate(struct altera_spi_device *dev);
diff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c
b/drivers/raw/ifpga/base/opae_spi_transaction.c
index 006cdb4..cd50d40 100644
--- a/drivers/raw/ifpga/base/opae_spi_transaction.c
+++ b/drivers/raw/ifpga/base/opae_spi_transaction.c
@@ -40,7 +40,7 @@ static void print_buffer(const char *string, void *buffer,
int len)
printf("%s print buffer, len=%d\n", string, len);
for (i = 0; i < len; i++)
- printf("%x ", *(p+i));
+ printf("%02x ", *(p+i));
printf("\n");
}
#else
@@ -72,43 +72,6 @@ static void reorder_phy_data(u8 bits_per_word,
}
}
-enum {
- SPI_FOUND_SOP,
- SPI_FOUND_EOP,
- SPI_NOT_FOUND,
-};
-
-static int resp_find_sop_eop(unsigned char *resp, unsigned int len,
- int flags)
-{
- int ret = SPI_NOT_FOUND;
-
- unsigned char *b = resp;
-
- /* find SOP */
- if (flags != SPI_FOUND_SOP) {
- while (b < resp + len && *b != SPI_PACKET_SOP)
- b++;
-
- if (*b != SPI_PACKET_SOP)
- goto done;
-
- ret = SPI_FOUND_SOP;
- }
-
- /* find EOP */
- while (b < resp + len && *b != SPI_PACKET_EOP)
- b++;
-
- if (*b != SPI_PACKET_EOP)
- goto done;
-
- ret = SPI_FOUND_EOP;
-
-done:
- return ret;
-}
-
static void phy_tx_pad(unsigned char *phy_buf, unsigned int phy_buf_len,
unsigned int *aligned_len)
{
@@ -137,6 +100,104 @@ static void phy_tx_pad(unsigned char *phy_buf, unsigned
int phy_buf_len,
*p++ = SPI_BYTE_IDLE;
}
+#define RX_ALL_IDLE_DATA (SPI_BYTE_IDLE << 24 | SPI_BYTE_IDLE << 16 | \
+SPI_BYTE_IDLE << 8 | SPI_BYTE_IDLE)
+
+static bool all_idle_data(u8 *rxbuf)
+{
+ return *(u32 *)rxbuf == RX_ALL_IDLE_DATA;
+}
+
+static unsigned char *find_eop(u8 *rxbuf, u32 BPW)
+{
+ return memchr(rxbuf, SPI_PACKET_EOP, BPW);
+}
+
+static int do_spi_txrx(struct spi_transaction_dev *dev,
+ unsigned char *tx_buffer,
+ unsigned int tx_len, unsigned char *rx_buffer,
+ unsigned int rx_len,
+ unsigned int *actual_rx)
+{
+ unsigned int rx_cnt = 0;
+ int ret = 0;
+ unsigned int BPW = 4;
+ bool eop_found = false;
+ unsigned char *eop;
+ unsigned char *ptr;
+ unsigned char *rxbuf = rx_buffer;
+ int add_byte = 0;
+ unsigned long ticks;
+ unsigned long timeout;
+
+ /* send command */
+ ret = spi_write(dev->dev, dev->chipselect, tx_len, tx_buffer);
+ if (ret)
+ return -EBUSY;
+
+ timeout = rte_get_timer_cycles() +
+ msecs_to_timer_cycles(2000);
+
+ /* read out data */
+ while (rx_cnt < rx_len) {
+ ret = spi_read(dev->dev, dev->chipselect, BPW, rxbuf);
+ if (ret)
+
[PATCH v1 2/4] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/ifpga_rawdev.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..9663b67 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (ifpga_monitor_start == 1 && ifpga_monitor_start_thread) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v1 3/4] raw/ifpga: fix ifpga devices cleanup function
Use rte_dev_remove() to replace rte_rawdev_pmd_release()
in ifpga_rawdev_cleanup(), resources occupied by ifpga
raw devices such as threads can be released correctly.
Fixes: f724a802 ("raw/ifpga: add miscellaneous APIs")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/ifpga_rawdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 9663b67..8d47fd5 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1787,12 +1787,14 @@ int ifpga_rawdev_partial_reconfigure(struct rte_rawdev
*dev, int port,
void ifpga_rawdev_cleanup(void)
{
struct ifpga_rawdev *dev;
+ struct rte_rawdev *rdev;
unsigned int i;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
dev = &ifpga_rawdevices[i];
if (dev->rawdev) {
- rte_rawdev_pmd_release(dev->rawdev);
+ rdev = dev->rawdev;
+ rte_dev_remove(rdev->device);
dev->rawdev = NULL;
}
}
--
1.8.3.1
[PATCH v1 4/4] raw/ifpga/base: fix port feature ID
Fix ID value of port features to match the definition from hardware.
Fixes: 473c88f9 ("drivers/raw: remove rawdev from directory names")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_defines.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index dca1518..8f62033 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -93,9 +93,9 @@ enum fpga_id_type {
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
-#define PORT_FEATURE_ID_UMSG 0x12
-#define PORT_FEATURE_ID_UINT 0x13
-#define PORT_FEATURE_ID_STP 0x14
+#define PORT_FEATURE_ID_UMSG 0x11
+#define PORT_FEATURE_ID_UINT 0x12
+#define PORT_FEATURE_ID_STP 0x13
#define PORT_FEATURE_ID_UAFU FEATURE_ID_AFU
/*
--
1.8.3.1
[PATCH v2 0/4] Fix bugs found in raw/ifpga development for arrow creek
This patchset is bug fix for raw/ifpga driver. Changes since v1: * Refine commit log. Tianfei Zhang (2): raw/ifpga/base: fix SPI transaction raw/ifpga: fix pthread cannot join Wei Huang (2): raw/ifpga: fix ifpga devices cleanup function raw/ifpga/base: fix port feature ID drivers/raw/ifpga/base/ifpga_defines.h| 6 +- drivers/raw/ifpga/base/opae_spi.c | 12 ++ drivers/raw/ifpga/base/opae_spi.h | 4 + drivers/raw/ifpga/base/opae_spi_transaction.c | 215 +++--- drivers/raw/ifpga/ifpga_rawdev.c | 12 +- 5 files changed, 150 insertions(+), 99 deletions(-) -- 1.8.3.1
[PATCH v2 1/4] raw/ifpga/base: fix SPI transaction
From: Tianfei Zhang
When EOP is detected, 2 more bytes should be received
(may be a SPI_PACKET_ESC before last valid byte) then
rx should be finished.
Fixes: 96ebfcf8 ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/base/opae_spi.c | 12 ++
drivers/raw/ifpga/base/opae_spi.h | 4 +
drivers/raw/ifpga/base/opae_spi_transaction.c | 215 +++---
3 files changed, 140 insertions(+), 91 deletions(-)
diff --git a/drivers/raw/ifpga/base/opae_spi.c
b/drivers/raw/ifpga/base/opae_spi.c
index 9efeecb..ca3d41f 100644
--- a/drivers/raw/ifpga/base/opae_spi.c
+++ b/drivers/raw/ifpga/base/opae_spi.c
@@ -239,6 +239,18 @@ int spi_command(struct altera_spi_device *dev, unsigned
int chip_select,
return 0;
}
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata)
+{
+ return spi_command(dev, chip_select, wlen, wdata, 0, NULL);
+}
+
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata)
+{
+ return spi_command(dev, chip_select, 0, NULL, rlen, rdata);
+}
+
struct altera_spi_device *altera_spi_alloc(void *base, int type)
{
struct altera_spi_device *spi_dev =
diff --git a/drivers/raw/ifpga/base/opae_spi.h
b/drivers/raw/ifpga/base/opae_spi.h
index af11656..bcff67d 100644
--- a/drivers/raw/ifpga/base/opae_spi.h
+++ b/drivers/raw/ifpga/base/opae_spi.h
@@ -117,6 +117,10 @@ struct spi_tran_header {
u32 addr;
};
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata);
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata);
int spi_command(struct altera_spi_device *dev, unsigned int chip_select,
unsigned int wlen, void *wdata, unsigned int rlen, void *rdata);
void spi_cs_deactivate(struct altera_spi_device *dev);
diff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c
b/drivers/raw/ifpga/base/opae_spi_transaction.c
index 006cdb4..cd50d40 100644
--- a/drivers/raw/ifpga/base/opae_spi_transaction.c
+++ b/drivers/raw/ifpga/base/opae_spi_transaction.c
@@ -40,7 +40,7 @@ static void print_buffer(const char *string, void *buffer,
int len)
printf("%s print buffer, len=%d\n", string, len);
for (i = 0; i < len; i++)
- printf("%x ", *(p+i));
+ printf("%02x ", *(p+i));
printf("\n");
}
#else
@@ -72,43 +72,6 @@ static void reorder_phy_data(u8 bits_per_word,
}
}
-enum {
- SPI_FOUND_SOP,
- SPI_FOUND_EOP,
- SPI_NOT_FOUND,
-};
-
-static int resp_find_sop_eop(unsigned char *resp, unsigned int len,
- int flags)
-{
- int ret = SPI_NOT_FOUND;
-
- unsigned char *b = resp;
-
- /* find SOP */
- if (flags != SPI_FOUND_SOP) {
- while (b < resp + len && *b != SPI_PACKET_SOP)
- b++;
-
- if (*b != SPI_PACKET_SOP)
- goto done;
-
- ret = SPI_FOUND_SOP;
- }
-
- /* find EOP */
- while (b < resp + len && *b != SPI_PACKET_EOP)
- b++;
-
- if (*b != SPI_PACKET_EOP)
- goto done;
-
- ret = SPI_FOUND_EOP;
-
-done:
- return ret;
-}
-
static void phy_tx_pad(unsigned char *phy_buf, unsigned int phy_buf_len,
unsigned int *aligned_len)
{
@@ -137,6 +100,104 @@ static void phy_tx_pad(unsigned char *phy_buf, unsigned
int phy_buf_len,
*p++ = SPI_BYTE_IDLE;
}
+#define RX_ALL_IDLE_DATA (SPI_BYTE_IDLE << 24 | SPI_BYTE_IDLE << 16 | \
+SPI_BYTE_IDLE << 8 | SPI_BYTE_IDLE)
+
+static bool all_idle_data(u8 *rxbuf)
+{
+ return *(u32 *)rxbuf == RX_ALL_IDLE_DATA;
+}
+
+static unsigned char *find_eop(u8 *rxbuf, u32 BPW)
+{
+ return memchr(rxbuf, SPI_PACKET_EOP, BPW);
+}
+
+static int do_spi_txrx(struct spi_transaction_dev *dev,
+ unsigned char *tx_buffer,
+ unsigned int tx_len, unsigned char *rx_buffer,
+ unsigned int rx_len,
+ unsigned int *actual_rx)
+{
+ unsigned int rx_cnt = 0;
+ int ret = 0;
+ unsigned int BPW = 4;
+ bool eop_found = false;
+ unsigned char *eop;
+ unsigned char *ptr;
+ unsigned char *rxbuf = rx_buffer;
+ int add_byte = 0;
+ unsigned long ticks;
+ unsigned long timeout;
+
+ /* send command */
+ ret = spi_write(dev->dev, dev->chipselect, tx_len, tx_buffer);
+ if (ret)
+ return -EBUSY;
+
+ timeout = rte_get_timer_cycles() +
+ msecs_to_timer_cycles(2000);
+
+ /* read out data */
+ while (rx_cnt < rx_len) {
+ ret = spi_read(dev->dev, dev->chipselect, BPW, rxbuf);
+ if (ret)
+
[PATCH v2 2/4] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/ifpga_rawdev.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..9663b67 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (ifpga_monitor_start == 1 && ifpga_monitor_start_thread) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v2 3/4] raw/ifpga: fix ifpga devices cleanup function
Use rte_dev_remove() to replace rte_rawdev_pmd_release()
in ifpga_rawdev_cleanup(), resources occupied by ifpga
raw devices such as threads can be released correctly.
Fixes: f724a802 ("raw/ifpga: add miscellaneous APIs")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/ifpga_rawdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 9663b67..8d47fd5 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1787,12 +1787,14 @@ int ifpga_rawdev_partial_reconfigure(struct rte_rawdev
*dev, int port,
void ifpga_rawdev_cleanup(void)
{
struct ifpga_rawdev *dev;
+ struct rte_rawdev *rdev;
unsigned int i;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
dev = &ifpga_rawdevices[i];
if (dev->rawdev) {
- rte_rawdev_pmd_release(dev->rawdev);
+ rdev = dev->rawdev;
+ rte_dev_remove(rdev->device);
dev->rawdev = NULL;
}
}
--
1.8.3.1
[PATCH v2 4/4] raw/ifpga/base: fix port feature ID
Fix ID value of port features to match the definition from hardware.
Fixes: 473c88f9 ("drivers/raw: remove rawdev from directory names")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_defines.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index dca1518..8f62033 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -93,9 +93,9 @@ enum fpga_id_type {
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
-#define PORT_FEATURE_ID_UMSG 0x12
-#define PORT_FEATURE_ID_UINT 0x13
-#define PORT_FEATURE_ID_STP 0x14
+#define PORT_FEATURE_ID_UMSG 0x11
+#define PORT_FEATURE_ID_UINT 0x12
+#define PORT_FEATURE_ID_STP 0x13
#define PORT_FEATURE_ID_UAFU FEATURE_ID_AFU
/*
--
1.8.3.1
[PATCH v1] raw/ifpga/base: fix SPI transaction
From: Tianfei Zhang
When EOP is detected, 2 more bytes should be received
(may be a SPI_PACKET_ESC before last valid byte) then
rx should be finished.
Fixes: 96ebfcf8 ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/base/opae_spi.c | 12 ++
drivers/raw/ifpga/base/opae_spi.h | 4 +
drivers/raw/ifpga/base/opae_spi_transaction.c | 215 +++---
3 files changed, 140 insertions(+), 91 deletions(-)
diff --git a/drivers/raw/ifpga/base/opae_spi.c
b/drivers/raw/ifpga/base/opae_spi.c
index 9efeecb..ca3d41f 100644
--- a/drivers/raw/ifpga/base/opae_spi.c
+++ b/drivers/raw/ifpga/base/opae_spi.c
@@ -239,6 +239,18 @@ int spi_command(struct altera_spi_device *dev, unsigned
int chip_select,
return 0;
}
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata)
+{
+ return spi_command(dev, chip_select, wlen, wdata, 0, NULL);
+}
+
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata)
+{
+ return spi_command(dev, chip_select, 0, NULL, rlen, rdata);
+}
+
struct altera_spi_device *altera_spi_alloc(void *base, int type)
{
struct altera_spi_device *spi_dev =
diff --git a/drivers/raw/ifpga/base/opae_spi.h
b/drivers/raw/ifpga/base/opae_spi.h
index af11656..bcff67d 100644
--- a/drivers/raw/ifpga/base/opae_spi.h
+++ b/drivers/raw/ifpga/base/opae_spi.h
@@ -117,6 +117,10 @@ struct spi_tran_header {
u32 addr;
};
+int spi_read(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int rlen, void *rdata);
+int spi_write(struct altera_spi_device *dev, unsigned int chip_select,
+ unsigned int wlen, void *wdata);
int spi_command(struct altera_spi_device *dev, unsigned int chip_select,
unsigned int wlen, void *wdata, unsigned int rlen, void *rdata);
void spi_cs_deactivate(struct altera_spi_device *dev);
diff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c
b/drivers/raw/ifpga/base/opae_spi_transaction.c
index 006cdb4..cd50d40 100644
--- a/drivers/raw/ifpga/base/opae_spi_transaction.c
+++ b/drivers/raw/ifpga/base/opae_spi_transaction.c
@@ -40,7 +40,7 @@ static void print_buffer(const char *string, void *buffer,
int len)
printf("%s print buffer, len=%d\n", string, len);
for (i = 0; i < len; i++)
- printf("%x ", *(p+i));
+ printf("%02x ", *(p+i));
printf("\n");
}
#else
@@ -72,43 +72,6 @@ static void reorder_phy_data(u8 bits_per_word,
}
}
-enum {
- SPI_FOUND_SOP,
- SPI_FOUND_EOP,
- SPI_NOT_FOUND,
-};
-
-static int resp_find_sop_eop(unsigned char *resp, unsigned int len,
- int flags)
-{
- int ret = SPI_NOT_FOUND;
-
- unsigned char *b = resp;
-
- /* find SOP */
- if (flags != SPI_FOUND_SOP) {
- while (b < resp + len && *b != SPI_PACKET_SOP)
- b++;
-
- if (*b != SPI_PACKET_SOP)
- goto done;
-
- ret = SPI_FOUND_SOP;
- }
-
- /* find EOP */
- while (b < resp + len && *b != SPI_PACKET_EOP)
- b++;
-
- if (*b != SPI_PACKET_EOP)
- goto done;
-
- ret = SPI_FOUND_EOP;
-
-done:
- return ret;
-}
-
static void phy_tx_pad(unsigned char *phy_buf, unsigned int phy_buf_len,
unsigned int *aligned_len)
{
@@ -137,6 +100,104 @@ static void phy_tx_pad(unsigned char *phy_buf, unsigned
int phy_buf_len,
*p++ = SPI_BYTE_IDLE;
}
+#define RX_ALL_IDLE_DATA (SPI_BYTE_IDLE << 24 | SPI_BYTE_IDLE << 16 | \
+SPI_BYTE_IDLE << 8 | SPI_BYTE_IDLE)
+
+static bool all_idle_data(u8 *rxbuf)
+{
+ return *(u32 *)rxbuf == RX_ALL_IDLE_DATA;
+}
+
+static unsigned char *find_eop(u8 *rxbuf, u32 BPW)
+{
+ return memchr(rxbuf, SPI_PACKET_EOP, BPW);
+}
+
+static int do_spi_txrx(struct spi_transaction_dev *dev,
+ unsigned char *tx_buffer,
+ unsigned int tx_len, unsigned char *rx_buffer,
+ unsigned int rx_len,
+ unsigned int *actual_rx)
+{
+ unsigned int rx_cnt = 0;
+ int ret = 0;
+ unsigned int BPW = 4;
+ bool eop_found = false;
+ unsigned char *eop;
+ unsigned char *ptr;
+ unsigned char *rxbuf = rx_buffer;
+ int add_byte = 0;
+ unsigned long ticks;
+ unsigned long timeout;
+
+ /* send command */
+ ret = spi_write(dev->dev, dev->chipselect, tx_len, tx_buffer);
+ if (ret)
+ return -EBUSY;
+
+ timeout = rte_get_timer_cycles() +
+ msecs_to_timer_cycles(2000);
+
+ /* read out data */
+ while (rx_cnt < rx_len) {
+ ret = spi_read(dev->dev, dev->chipselect, BPW, rxbuf);
+ if (ret)
+
[PATCH v1] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
drivers/raw/ifpga/ifpga_rawdev.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..9663b67 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (ifpga_monitor_start == 1 && ifpga_monitor_start_thread) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v2] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
drivers/raw/ifpga/ifpga_rawdev.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..26752c4 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if ((ifpga_monitor_start == 1) && ifpga_monitor_start_thread) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v3] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
drivers/raw/ifpga/ifpga_rawdev.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..2bc569b 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -542,18 +542,21 @@ static int set_surprise_link_check_aer(
static int
ifpga_monitor_stop_func(void)
{
+ void *status;
int ret;
- if (ifpga_monitor_start == 1) {
+ if ((ifpga_monitor_start == 1) && ifpga_monitor_start_thread) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
- ret = pthread_join(ifpga_monitor_start_thread, NULL);
+ ret = pthread_join(ifpga_monitor_start_thread, &status);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
+ ifpga_monitor_start_thread = 0;
return ret;
}
--
1.8.3.1
[PATCH v4] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
v4: do not evaluate and set pthread_t variable
---
drivers/raw/ifpga/ifpga_rawdev.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..cb5166e 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (ifpga_monitor_start) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -542,19 +542,20 @@ static int set_surprise_link_check_aer(
static int
ifpga_monitor_stop_func(void)
{
+ void *status;
int ret;
if (ifpga_monitor_start == 1) {
+ ifpga_monitor_start = 0;
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
- ret = pthread_join(ifpga_monitor_start_thread, NULL);
+ ret = pthread_join(ifpga_monitor_start_thread, &status);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v5] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
v4: do not evaluate and set pthread_t variable
---
v5: use builtin atomic function to access ifpga_monitor_start flag
---
drivers/raw/ifpga/ifpga_rawdev.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..b72c13a 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -68,7 +68,7 @@
static struct ifpga_rawdev ifpga_rawdevices[IFPGA_RAWDEV_NUM];
-static int ifpga_monitor_start;
+static rte_atomic32_t ifpga_monitor_start;
static pthread_t ifpga_monitor_start_thread;
#define IFPGA_MAX_IRQ 12
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (rte_atomic32_read(&ifpga_monitor_start)) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -525,7 +525,7 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 0) {
+ if (!rte_atomic32_read(&ifpga_monitor_start)) {
ret = rte_ctrl_thread_create(&ifpga_monitor_start_thread,
"ifpga-monitor", NULL,
ifpga_rawdev_gsd_handle, NULL);
@@ -534,7 +534,7 @@ static int set_surprise_link_check_aer(
"Fail to create ifpga nonitor thread");
return -1;
}
- ifpga_monitor_start = 1;
+ rte_atomic32_set(&ifpga_monitor_start, 1);
}
return 0;
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (rte_atomic32_read(&ifpga_monitor_start)) {
+ rte_atomic32_set(&ifpga_monitor_start, 0);
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v6] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
v4: do not evaluate and set pthread_t variable
---
v5: use builtin atomic function to access ifpga_monitor_start flag
---
v6: use __atomic_xxx_n to replace rte_atomicNN_xxx
---
drivers/raw/ifpga/ifpga_rawdev.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..19c2357 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -525,7 +525,7 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 0) {
+ if (!__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
ret = rte_ctrl_thread_create(&ifpga_monitor_start_thread,
"ifpga-monitor", NULL,
ifpga_rawdev_gsd_handle, NULL);
@@ -534,7 +534,7 @@ static int set_surprise_link_check_aer(
"Fail to create ifpga nonitor thread");
return -1;
}
- ifpga_monitor_start = 1;
+ __atomic_store_n(&ifpga_monitor_start, 1, __ATOMIC_RELAXED);
}
return 0;
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
+ __atomic_store_n(&ifpga_monitor_start, 0, __ATOMIC_RELAXED);
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v7] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
v4: do not evaluate and set pthread_t variable
---
v5: use builtin atomic function to access ifpga_monitor_start flag
---
v6: use __atomic_xxx_n to replace rte_atomicNN_xxx
---
v7: fix patch applying issue
---
drivers/raw/ifpga/ifpga_rawdev.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..719f3b0 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -525,16 +525,16 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 0) {
+ if (!__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
ret = rte_ctrl_thread_create(&ifpga_monitor_start_thread,
"ifpga-monitor", NULL,
ifpga_rawdev_gsd_handle, NULL);
if (ret != 0) {
IFPGA_RAWDEV_PMD_ERR(
- "Fail to create ifpga nonitor thread");
+ "Fail to create ifpga monitor thread");
return -1;
}
- ifpga_monitor_start = 1;
+ __atomic_store_n(&ifpga_monitor_start, 1, __ATOMIC_RELAXED);
}
return 0;
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
+ __atomic_store_n(&ifpga_monitor_start, 0, __ATOMIC_RELAXED);
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v8] raw/ifpga: fix pthread cannot join
From: Tianfei Zhang
When we want to close a thread, we should set a flag to notify
thread handler function.
Fixes: 9c006c45 ("raw/ifpga: scan PCIe BDF device tree")
Cc: sta...@dpdk.org
Signed-off-by: Tianfei Zhang
---
v2: update commit log
---
v3: set thread id to 0 after pthread_join
---
v4: do not evaluate and set pthread_t variable
---
v5: use builtin atomic function to access ifpga_monitor_start flag
---
v6: use __atomic_xxx_n to replace rte_atomicNN_xxx
---
v7: fix typo
---
v8: solve patch applying issue
---
drivers/raw/ifpga/ifpga_rawdev.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 8d9db58..19c2357 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -497,7 +497,7 @@ static int set_surprise_link_check_aer(
int gsd_enable, ret;
#define MS 1000
- while (1) {
+ while (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
gsd_enable = 0;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
ifpga_rdev = &ifpga_rawdevices[i];
@@ -525,7 +525,7 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 0) {
+ if (!__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
ret = rte_ctrl_thread_create(&ifpga_monitor_start_thread,
"ifpga-monitor", NULL,
ifpga_rawdev_gsd_handle, NULL);
@@ -534,7 +534,7 @@ static int set_surprise_link_check_aer(
"Fail to create ifpga monitor thread");
return -1;
}
- ifpga_monitor_start = 1;
+ __atomic_store_n(&ifpga_monitor_start, 1, __ATOMIC_RELAXED);
}
return 0;
@@ -544,7 +544,9 @@ static int set_surprise_link_check_aer(
{
int ret;
- if (ifpga_monitor_start == 1) {
+ if (__atomic_load_n(&ifpga_monitor_start, __ATOMIC_RELAXED)) {
+ __atomic_store_n(&ifpga_monitor_start, 0, __ATOMIC_RELAXED);
+
ret = pthread_cancel(ifpga_monitor_start_thread);
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't cancel the thread");
@@ -553,8 +555,6 @@ static int set_surprise_link_check_aer(
if (ret)
IFPGA_RAWDEV_PMD_ERR("Can't join the thread");
- ifpga_monitor_start = 0;
-
return ret;
}
--
1.8.3.1
[PATCH v1] raw/ifpga/base: fix port feature ID
Fix ID value of port features to match the definition from hardware.
Fixes: 473c88f9 ("drivers/raw: remove rawdev from directory names")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/base/ifpga_defines.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index dca1518..8f62033 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -93,9 +93,9 @@ enum fpga_id_type {
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
-#define PORT_FEATURE_ID_UMSG 0x12
-#define PORT_FEATURE_ID_UINT 0x13
-#define PORT_FEATURE_ID_STP 0x14
+#define PORT_FEATURE_ID_UMSG 0x11
+#define PORT_FEATURE_ID_UINT 0x12
+#define PORT_FEATURE_ID_STP 0x13
#define PORT_FEATURE_ID_UAFU FEATURE_ID_AFU
/*
--
1.8.3.1
[PATCH v1] raw/ifpga: fix ifpga devices cleanup function
Use rte_dev_remove() to replace rte_rawdev_pmd_release()
in ifpga_rawdev_cleanup(), resources occupied by ifpga
raw devices such as threads can be released correctly.
Fixes: f724a802 ("raw/ifpga: add miscellaneous APIs")
Signed-off-by: Wei Huang
---
drivers/raw/ifpga/ifpga_rawdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fdf3c23..88c38aa 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -1787,12 +1787,14 @@ int ifpga_rawdev_partial_reconfigure(struct rte_rawdev
*dev, int port,
void ifpga_rawdev_cleanup(void)
{
struct ifpga_rawdev *dev;
+ struct rte_rawdev *rdev;
unsigned int i;
for (i = 0; i < IFPGA_RAWDEV_NUM; i++) {
dev = &ifpga_rawdevices[i];
if (dev->rawdev) {
- rte_rawdev_pmd_release(dev->rawdev);
+ rdev = dev->rawdev;
+ rte_dev_remove(rdev->device);
dev->rawdev = NULL;
}
}
--
1.8.3.1
[PATCH v1 0/4] Support OFS card
The first patch turns some experimental APIs to formal. The second patch is a fix for virtual device release, because in OFS card, AFU (Acceleration Function Unit) is always used as a virtual device. The third patch is a improvement for interrupt release. The fourth patch is for OFS (Open FPGA Stack) type card enumeration and initialization. Wei Huang (4): raw/ifpga: remove experimental tag from ifpga APIs raw/ifpga: remove vdev when ifpga is closed raw/ifpga: unregister interrupt in ifpga close function raw/ifpga: support ofs card probe drivers/raw/ifpga/base/ifpga_api.c | 28 +- drivers/raw/ifpga/base/ifpga_defines.h | 1 + drivers/raw/ifpga/base/ifpga_enumerate.c | 678 ++--- drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +- drivers/raw/ifpga/base/ifpga_hw.h | 2 + drivers/raw/ifpga/base/opae_hw_api.c | 2 +- drivers/raw/ifpga/base/opae_hw_api.h | 2 + drivers/raw/ifpga/ifpga_rawdev.c | 241 ++ drivers/raw/ifpga/ifpga_rawdev.h | 8 + drivers/raw/ifpga/rte_pmd_ifpga.h | 48 -- drivers/raw/ifpga/version.map | 7 +- 11 files changed, 737 insertions(+), 298 deletions(-) -- 1.8.3.1
[PATCH v1 1/4] raw/ifpga: remove experimental tag from ifpga APIs
These APIs are introduced in DPDK 21.05 and have been tested in several release, experimental tag can be formally removed. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang --- drivers/raw/ifpga/rte_pmd_ifpga.h | 48 --- drivers/raw/ifpga/version.map | 7 ++ 2 files changed, 2 insertions(+), 53 deletions(-) diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.h b/drivers/raw/ifpga/rte_pmd_ifpga.h index 47d66ba..3fa5d34 100644 --- a/drivers/raw/ifpga/rte_pmd_ifpga.h +++ b/drivers/raw/ifpga/rte_pmd_ifpga.h @@ -68,9 +68,6 @@ } rte_pmd_ifpga_phy_info; /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' * * @param pci_addr @@ -82,14 +79,10 @@ * - (-EINVAL) if bad parameter. * - (-ENODEV) if FPGA is not probed by ifpga driver. */ -__rte_experimental int rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get current RSU status of the specified Intel FPGA device * * @param dev_id @@ -103,14 +96,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Set current RSU status of the specified Intel FPGA device * * @param dev_id @@ -124,14 +113,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get FPGA property of specified Intel FPGA device * * @param dev_id @@ -144,14 +129,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PHY information of specified Intel FPGA device * * @param dev_id @@ -164,14 +145,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Update image flash of specified Intel FPGA device * * @param dev_id @@ -187,15 +164,11 @@ * - (-EBUSY) if FPGA is updating or rebooting. * - (-EIO) if failed to open image file. */ -__rte_experimental int rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, uint64_t *status); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Stop flash update of specified Intel FPGA device * * @param dev_id @@ -208,14 +181,10 @@ * - (-EINVAL) if bad parameter. * - (-EAGAIN) if failed with force. */ -__rte_experimental int rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Check current Intel FPGA status and change it to reboot status if it is idle * * @param dev_id @@ -226,14 +195,10 @@ * - (-ENOMEM) if share data is not initialized. * - (-EBUSY) if FPGA is updating or rebooting. */ -__rte_experimental int rte_pmd_ifpga_reboot_try(uint16_t dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Trigger full reconfiguration of specified Intel FPGA device * * @param dev_id @@ -252,28 +217,20 @@ * - (-EINVAL) if bad parameter. * - (-EBUSY) if failed to access BMC register. */ -__rte_experimental int rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PCI bus the Intel FPGA driver register to * * @return * - (valid pointer) if successful. * - (NULL) if the Intel FPGA driver is not registered to any PCI bus. */ -__rte_experimental const struct rte_pci_bus * rte_pmd_ifpga_get_pci_bus(void); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Perform PR (partial reconfiguration) on specified Intel FPGA device * * @param dev_id @@ -287,17 +244,12 @@ * - (-EINVAL) if bad parameter or operation failed. * - (-ENOMEM) if failed to allocate memory. */ -__rte_experimental int rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const char *file); /** - * @warn
[PATCH v1 3/4] raw/ifpga: unregister interrupt in ifpga close function
Move interrupt unregistration from ifpga destroy function to
ifpga close function, so rte_rawdev_pmd_release function can
release interrupt resource.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/ifpga/ifpga_rawdev.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fe3fc43..94df56c 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -78,6 +78,7 @@ static int set_surprise_link_check_aer(
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
int start, uint32_t cap);
static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
+static void fme_interrupt_handler(void *param);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
@@ -740,8 +741,9 @@ static int set_surprise_link_check_aer(
{
struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
char *vdev_name = NULL;
- int i = 0;
+ int i, ret = 0;
if (dev) {
ifpga_rdev = ifpga_rawdev_get(dev);
@@ -756,12 +758,19 @@ static int set_surprise_link_check_aer(
}
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
+ mgr = opae_adapter_get_mgr(adapter);
+ if (ifpga_rdev && mgr) {
+ if (ifpga_unregister_msix_irq(ifpga_rdev,
+ IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr) < 0)
+ ret = -EINVAL;
+ }
opae_adapter_destroy(adapter);
opae_adapter_data_free(adapter->data);
}
}
- return dev ? 0:1;
+ return ret;
}
static int
@@ -1629,9 +1638,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
int ret;
struct rte_rawdev *rawdev;
char name[RTE_RAWDEV_NAME_MAX_LEN];
- struct opae_adapter *adapter;
- struct opae_manager *mgr;
- struct ifpga_rawdev *dev;
if (!pci_dev) {
IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
@@ -1651,19 +1657,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
IFPGA_RAWDEV_PMD_ERR("Invalid device name (%s)", name);
return -EINVAL;
}
- dev = ifpga_rawdev_get(rawdev);
-
- adapter = ifpga_rawdev_get_priv(rawdev);
- if (!adapter)
- return -ENODEV;
-
- mgr = opae_adapter_get_mgr(adapter);
- if (!mgr)
- return -ENODEV;
-
- if (ifpga_unregister_msix_irq(dev, IFPGA_FME_IRQ, 0,
- fme_interrupt_handler, mgr) < 0)
- return -EINVAL;
/* rte_rawdev_close is called by pmd_release */
ret = rte_rawdev_pmd_release(rawdev);
--
1.8.3.1
[PATCH v1 2/4] raw/ifpga: remove vdev when ifpga is closed
Virtual devices created on ifpga raw device are not removed when
ifpga is closed. To avoid such problem, ifpga virtual device remove
function is implemented, virtual device is removed in raw device
close function.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
drivers/raw/ifpga/ifpga_rawdev.c | 166 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 8 ++
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 6d4117c..fe3fc43 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -134,6 +134,8 @@ struct ifpga_rawdev *
for (i = 0; i < IFPGA_MAX_IRQ; i++)
dev->intr_handle[i] = NULL;
dev->poll_enabled = 0;
+ for (i = 0; i < IFPGA_MAX_VDEV; i++)
+ dev->vdev_name[i] = NULL;
return dev;
}
@@ -736,10 +738,22 @@ static int set_surprise_link_check_aer(
static int
ifpga_rawdev_close(struct rte_rawdev *dev)
{
+ struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ char *vdev_name = NULL;
+ int i = 0;
if (dev) {
- ifpga_monitor_stop_func(ifpga_rawdev_get(dev));
+ ifpga_rdev = ifpga_rawdev_get(dev);
+ if (ifpga_rdev) {
+ for (i = 0; i < IFPGA_MAX_VDEV; i++) {
+ vdev_name = ifpga_rdev->vdev_name[i];
+ if (vdev_name)
+ rte_vdev_uninit(vdev_name);
+ }
+ ifpga_monitor_stop_func(ifpga_rdev);
+ ifpga_rdev->rawdev = NULL;
+ }
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
opae_adapter_destroy(adapter);
@@ -1638,8 +1652,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
return -EINVAL;
}
dev = ifpga_rawdev_get(rawdev);
- if (dev)
- dev->rawdev = NULL;
adapter = ifpga_rawdev_get_priv(rawdev);
if (!adapter)
@@ -1714,73 +1726,118 @@ static int ifpga_rawdev_get_string_arg(const char *key
__rte_unused,
return 0;
}
+
static int
-ifpga_cfg_probe(struct rte_vdev_device *dev)
+ifpga_vdev_parse_devargs(struct rte_devargs *devargs,
+ struct ifpga_vdev_args *args)
{
- struct rte_devargs *devargs;
- struct rte_kvargs *kvlist = NULL;
- struct rte_rawdev *rawdev = NULL;
- struct ifpga_rawdev *ifpga_dev;
- int port;
+ struct rte_kvargs *kvlist;
char *name = NULL;
- char dev_name[RTE_RAWDEV_NAME_MAX_LEN];
- int ret = -1;
+ int port = 0;
+ int ret = -EINVAL;
- devargs = dev->device.devargs;
+ if (!devargs || !args)
+ return ret;
kvlist = rte_kvargs_parse(devargs->args, valid_args);
if (!kvlist) {
- IFPGA_RAWDEV_PMD_LOG(ERR, "error when parsing param");
- goto end;
+ IFPGA_RAWDEV_PMD_ERR("error when parsing devargs");
+ return ret;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_NAME) == 1) {
if (rte_kvargs_process(kvlist, IFPGA_ARG_NAME,
- &ifpga_rawdev_get_string_arg,
- &name) < 0) {
+ &ifpga_rawdev_get_string_arg, &name) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
-IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
+ } else {
+ strlcpy(args->bdf, name, sizeof(args->bdf));
+ rte_free(name);
}
} else {
IFPGA_RAWDEV_PMD_ERR("arg %s is mandatory for ifpga bus",
- IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_PORT) == 1) {
- if (rte_kvargs_process(kvlist,
- IFPGA_ARG_PORT,
- &rte_ifpga_get_integer32_arg,
- &port) < 0) {
+ if (rte_kvargs_process(kvlist, IFPGA_ARG_PORT,
+ &rte_ifpga_get_integer32_arg, &port) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
IFPGA_ARG_PORT);
goto end;
+ } else {
+ args->port = port;
}
} else {
IFPGA_RAWDEV_PMD_ERR
[PATCH v1 4/4] raw/ifpga: support ofs card probe
ofs card introduces some changes in DFL (Device Feature List) and
DFH (Device Feature Header) of FPGA. ifpga driver adapt these
changes mainly by adjusting enumeration process.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/ifpga/base/ifpga_api.c | 28 +-
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_enumerate.c | 678 ++---
drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +-
drivers/raw/ifpga/base/ifpga_hw.h | 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 2 +-
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/ifpga_rawdev.c | 48 +-
8 files changed, 587 insertions(+), 192 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 4610ef1..f19cc26 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -13,15 +13,22 @@
static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
struct uuid *uuid)
{
- struct opae_bridge *br = acc->br;
- struct ifpga_port_hw *port;
+ struct ifpga_afu_info *afu_info = acc->data;
+ struct opae_reg_region *region;
+ u64 val = 0;
- if (!br || !br->data)
- return -EINVAL;
+ if (!afu_info)
+ return -ENODEV;
- port = br->data;
+ region = &afu_info->region[0];
+ if (uuid) {
+ val = readq(region->addr + sizeof(struct feature_header));
+ opae_memcpy(uuid->b, &val, sizeof(u64));
+ val = readq(region->addr + sizeof(struct feature_header) + 8);
+ opae_memcpy(uuid->b + 8, &val, sizeof(u64));
+ }
- return fpga_get_afu_uuid(port, uuid);
+ return 0;
}
static int ifpga_acc_set_irq(struct opae_accelerator *acc,
@@ -32,6 +39,9 @@ static int ifpga_acc_set_irq(struct opae_accelerator *acc,
struct ifpga_port_hw *port;
struct fpga_uafu_irq_set irq_set;
+ if (!afu_info)
+ return -ENODEV;
+
if (!br || !br->data)
return -EINVAL;
@@ -68,7 +78,7 @@ static int ifpga_acc_get_region_info(struct opae_accelerator
*acc,
struct ifpga_afu_info *afu_info = acc->data;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (info->index >= afu_info->num_regions)
return -EINVAL;
@@ -89,7 +99,7 @@ static int ifpga_acc_read(struct opae_accelerator *acc,
unsigned int region_idx,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
@@ -129,7 +139,7 @@ static int ifpga_acc_write(struct opae_accelerator *acc,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 8f62033..9a280eb 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -73,6 +73,7 @@
enum fpga_id_type {
FME_ID,
PORT_ID,
+ AFU_ID,
FPGA_ID_MAX,
};
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 48b8af4..257e609 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -2,6 +2,10 @@
* Copyright(c) 2010-2018 Intel Corporation
*/
+#include
+#include
+#include
+
#include "opae_hw_api.h"
#include "ifpga_api.h"
@@ -9,6 +13,19 @@
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+struct dfl_fpga_enum_dfl {
+ u64 start;
+ u64 len;
+ void *addr;
+ TAILQ_ENTRY(dfl_fpga_enum_dfl) node;
+};
+
+TAILQ_HEAD(dfl_fpga_enum_dfls, dfl_fpga_enum_dfl);
+struct dfl_fpga_enum_info {
+ struct ifpga_hw *hw;
+ struct dfl_fpga_enum_dfls dfls;
+};
+
struct build_feature_devs_info {
struct opae_adapter_data_pci *pci_data;
@@ -21,7 +38,6 @@ struct build_feature_devs_info {
void *ioaddr;
void *ioend;
uint64_t phys_addr;
- int current_bar;
void *pfme_hdr;
@@ -141,8 +157,10 @@ static u64 feature_id(void __iomem *start)
unsigned int size, unsigned int vec_start,
unsigned int vec_cnt)
{
- return build_info_add_sub_feature(binfo, start, fid, size, vec_start,
- vec_cnt);
+ if (binfo->current_type != AFU_ID)
+ return build_info_add_sub_feature(binfo, start, fid, size,
+ vec_start, vec_cnt);
+ return 0;
}
/*
@@ -152,13 +170,14 @@ stat
[PATCH v1] raw/afu_mf: introduce AFU MF device driver
Add afu_mf driver to manage various AFU (Acceleration Function Unit)
in FPGA.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 440
drivers/raw/afu_mf/afu_mf_rawdev.h | 89 ++
drivers/raw/afu_mf/he_hssi.c | 369 +++
drivers/raw/afu_mf/he_hssi.h | 102 ++
drivers/raw/afu_mf/he_lbk.c| 429
drivers/raw/afu_mf/he_lbk.h| 121 +++
drivers/raw/afu_mf/he_mem.c| 181
drivers/raw/afu_mf/he_mem.h| 40 +
drivers/raw/afu_mf/meson.build |8 +
drivers/raw/afu_mf/n3000_afu.c | 1997
drivers/raw/afu_mf/n3000_afu.h | 333 ++
drivers/raw/afu_mf/rte_pmd_afu.h | 134 +++
drivers/raw/afu_mf/version.map |3 +
drivers/raw/meson.build|1 +
14 files changed, 4247 insertions(+)
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h
create mode 100644 drivers/raw/afu_mf/he_hssi.c
create mode 100644 drivers/raw/afu_mf/he_hssi.h
create mode 100644 drivers/raw/afu_mf/he_lbk.c
create mode 100644 drivers/raw/afu_mf/he_lbk.h
create mode 100644 drivers/raw/afu_mf/he_mem.c
create mode 100644 drivers/raw/afu_mf/he_mem.h
create mode 100644 drivers/raw/afu_mf/meson.build
create mode 100644 drivers/raw/afu_mf/n3000_afu.c
create mode 100644 drivers/raw/afu_mf/n3000_afu.h
create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h
create mode 100644 drivers/raw/afu_mf/version.map
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
new file mode 100644
index 000..f24c748
--- /dev/null
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -0,0 +1,440 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "rte_pmd_afu.h"
+#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
+#include "he_lbk.h"
+#include "he_mem.h"
+#include "he_hssi.h"
+
+#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
+
+static const struct rte_afu_uuid afu_uuid_map[] = {
+ { N3000_AFU_UUID_L, N3000_AFU_UUID_H },
+ { HE_LBK_UUID_L, HE_LBK_UUID_H },
+ { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
+ { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
+ { HE_HSSI_UUID_L, HE_HSSI_UUID_H },
+ { 0, 0 /* sentinel */ }
+};
+
+static struct afu_mf_drv *afu_table[] = {
+ &n3000_afu_drv,
+ &he_lbk_drv,
+ &he_mem_lbk_drv,
+ &he_mem_tg_drv,
+ &he_hssi_drv,
+ NULL
+};
+
+static inline int afu_mf_trylock(struct afu_mf_rawdev *dev)
+{
+ int32_t x = 0;
+
+ if (!dev || !dev->shared)
+ return -ENODEV;
+
+ x = __atomic_load_n(&dev->shared->lock, __ATOMIC_RELAXED);
+
+ if ((x != 0) || (__atomic_compare_exchange_n(&dev->shared->lock, &x, 1,
+ 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0))
+ return -EBUSY;
+
+ return 0;
+}
+
+static inline void afu_mf_unlock(struct afu_mf_rawdev *dev)
+{
+ if (!dev || !dev->shared)
+ return;
+
+ __atomic_store_n(&dev->shared->lock, 0, __ATOMIC_RELEASE);
+}
+
+static int afu_mf_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_mf_unlock(dev);
+
+ return ret;
+}
+
+static void afu_mf_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please stop it later");
+ return;
+ }
+
+ if (dev->ops && dev->ops->stop)
+
[PATCH v2] raw/afu_mf: introduce AFU MF device driver
Add afu_mf driver to manage various AFU (Acceleration Function Unit)
in FPGA.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: fix typo
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 440
drivers/raw/afu_mf/afu_mf_rawdev.h | 89 ++
drivers/raw/afu_mf/he_hssi.c | 369 +++
drivers/raw/afu_mf/he_hssi.h | 102 ++
drivers/raw/afu_mf/he_lbk.c| 429
drivers/raw/afu_mf/he_lbk.h| 121 +++
drivers/raw/afu_mf/he_mem.c| 181
drivers/raw/afu_mf/he_mem.h| 40 +
drivers/raw/afu_mf/meson.build |8 +
drivers/raw/afu_mf/n3000_afu.c | 1997
drivers/raw/afu_mf/n3000_afu.h | 333 ++
drivers/raw/afu_mf/rte_pmd_afu.h | 134 +++
drivers/raw/afu_mf/version.map |3 +
drivers/raw/meson.build|1 +
14 files changed, 4247 insertions(+)
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h
create mode 100644 drivers/raw/afu_mf/he_hssi.c
create mode 100644 drivers/raw/afu_mf/he_hssi.h
create mode 100644 drivers/raw/afu_mf/he_lbk.c
create mode 100644 drivers/raw/afu_mf/he_lbk.h
create mode 100644 drivers/raw/afu_mf/he_mem.c
create mode 100644 drivers/raw/afu_mf/he_mem.h
create mode 100644 drivers/raw/afu_mf/meson.build
create mode 100644 drivers/raw/afu_mf/n3000_afu.c
create mode 100644 drivers/raw/afu_mf/n3000_afu.h
create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h
create mode 100644 drivers/raw/afu_mf/version.map
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
new file mode 100644
index 000..f24c748
--- /dev/null
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -0,0 +1,440 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "rte_pmd_afu.h"
+#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
+#include "he_lbk.h"
+#include "he_mem.h"
+#include "he_hssi.h"
+
+#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
+
+static const struct rte_afu_uuid afu_uuid_map[] = {
+ { N3000_AFU_UUID_L, N3000_AFU_UUID_H },
+ { HE_LBK_UUID_L, HE_LBK_UUID_H },
+ { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
+ { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
+ { HE_HSSI_UUID_L, HE_HSSI_UUID_H },
+ { 0, 0 /* sentinel */ }
+};
+
+static struct afu_mf_drv *afu_table[] = {
+ &n3000_afu_drv,
+ &he_lbk_drv,
+ &he_mem_lbk_drv,
+ &he_mem_tg_drv,
+ &he_hssi_drv,
+ NULL
+};
+
+static inline int afu_mf_trylock(struct afu_mf_rawdev *dev)
+{
+ int32_t x = 0;
+
+ if (!dev || !dev->shared)
+ return -ENODEV;
+
+ x = __atomic_load_n(&dev->shared->lock, __ATOMIC_RELAXED);
+
+ if ((x != 0) || (__atomic_compare_exchange_n(&dev->shared->lock, &x, 1,
+ 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0))
+ return -EBUSY;
+
+ return 0;
+}
+
+static inline void afu_mf_unlock(struct afu_mf_rawdev *dev)
+{
+ if (!dev || !dev->shared)
+ return;
+
+ __atomic_store_n(&dev->shared->lock, 0, __ATOMIC_RELEASE);
+}
+
+static int afu_mf_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_mf_unlock(dev);
+
+ return ret;
+}
+
+static void afu_mf_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please stop it later");
+ return;
+ }
+
+ if (dev->ops && dev->ops->stop)
+
[PATCH v2 0/4] Support OFS card
The changes in version 2: Fix build error in UB2004-32, replace "%zu" with "PRIu64". Wei Huang (4): raw/ifpga: remove experimental tag from ifpga APIs raw/ifpga: remove vdev when ifpga is closed raw/ifpga: unregister interrupt in ifpga close function raw/ifpga: support ofs card probe drivers/raw/ifpga/base/ifpga_api.c | 28 +- drivers/raw/ifpga/base/ifpga_defines.h | 1 + drivers/raw/ifpga/base/ifpga_enumerate.c | 678 ++--- drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +- drivers/raw/ifpga/base/ifpga_hw.h | 2 + drivers/raw/ifpga/base/opae_hw_api.c | 2 +- drivers/raw/ifpga/base/opae_hw_api.h | 2 + drivers/raw/ifpga/ifpga_rawdev.c | 241 ++ drivers/raw/ifpga/ifpga_rawdev.h | 8 + drivers/raw/ifpga/rte_pmd_ifpga.h | 48 -- drivers/raw/ifpga/version.map | 7 +- 11 files changed, 737 insertions(+), 298 deletions(-) -- 1.8.3.1
[PATCH v2 1/4] raw/ifpga: remove experimental tag from ifpga APIs
These APIs are introduced in DPDK 21.05 and have been tested in several release, experimental tag can be formally removed. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang --- drivers/raw/ifpga/rte_pmd_ifpga.h | 48 --- drivers/raw/ifpga/version.map | 7 ++ 2 files changed, 2 insertions(+), 53 deletions(-) diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.h b/drivers/raw/ifpga/rte_pmd_ifpga.h index 47d66ba..3fa5d34 100644 --- a/drivers/raw/ifpga/rte_pmd_ifpga.h +++ b/drivers/raw/ifpga/rte_pmd_ifpga.h @@ -68,9 +68,6 @@ } rte_pmd_ifpga_phy_info; /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' * * @param pci_addr @@ -82,14 +79,10 @@ * - (-EINVAL) if bad parameter. * - (-ENODEV) if FPGA is not probed by ifpga driver. */ -__rte_experimental int rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get current RSU status of the specified Intel FPGA device * * @param dev_id @@ -103,14 +96,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Set current RSU status of the specified Intel FPGA device * * @param dev_id @@ -124,14 +113,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get FPGA property of specified Intel FPGA device * * @param dev_id @@ -144,14 +129,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PHY information of specified Intel FPGA device * * @param dev_id @@ -164,14 +145,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Update image flash of specified Intel FPGA device * * @param dev_id @@ -187,15 +164,11 @@ * - (-EBUSY) if FPGA is updating or rebooting. * - (-EIO) if failed to open image file. */ -__rte_experimental int rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, uint64_t *status); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Stop flash update of specified Intel FPGA device * * @param dev_id @@ -208,14 +181,10 @@ * - (-EINVAL) if bad parameter. * - (-EAGAIN) if failed with force. */ -__rte_experimental int rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Check current Intel FPGA status and change it to reboot status if it is idle * * @param dev_id @@ -226,14 +195,10 @@ * - (-ENOMEM) if share data is not initialized. * - (-EBUSY) if FPGA is updating or rebooting. */ -__rte_experimental int rte_pmd_ifpga_reboot_try(uint16_t dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Trigger full reconfiguration of specified Intel FPGA device * * @param dev_id @@ -252,28 +217,20 @@ * - (-EINVAL) if bad parameter. * - (-EBUSY) if failed to access BMC register. */ -__rte_experimental int rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PCI bus the Intel FPGA driver register to * * @return * - (valid pointer) if successful. * - (NULL) if the Intel FPGA driver is not registered to any PCI bus. */ -__rte_experimental const struct rte_pci_bus * rte_pmd_ifpga_get_pci_bus(void); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Perform PR (partial reconfiguration) on specified Intel FPGA device * * @param dev_id @@ -287,17 +244,12 @@ * - (-EINVAL) if bad parameter or operation failed. * - (-ENOMEM) if failed to allocate memory. */ -__rte_experimental int rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const char *file); /** - * @warn
[PATCH v2 2/4] raw/ifpga: remove vdev when ifpga is closed
Virtual devices created on ifpga raw device are not removed when
ifpga is closed. To avoid such problem, ifpga virtual device remove
function is implemented, virtual device is removed in raw device
close function.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
drivers/raw/ifpga/ifpga_rawdev.c | 166 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 8 ++
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 6d4117c..fe3fc43 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -134,6 +134,8 @@ struct ifpga_rawdev *
for (i = 0; i < IFPGA_MAX_IRQ; i++)
dev->intr_handle[i] = NULL;
dev->poll_enabled = 0;
+ for (i = 0; i < IFPGA_MAX_VDEV; i++)
+ dev->vdev_name[i] = NULL;
return dev;
}
@@ -736,10 +738,22 @@ static int set_surprise_link_check_aer(
static int
ifpga_rawdev_close(struct rte_rawdev *dev)
{
+ struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ char *vdev_name = NULL;
+ int i = 0;
if (dev) {
- ifpga_monitor_stop_func(ifpga_rawdev_get(dev));
+ ifpga_rdev = ifpga_rawdev_get(dev);
+ if (ifpga_rdev) {
+ for (i = 0; i < IFPGA_MAX_VDEV; i++) {
+ vdev_name = ifpga_rdev->vdev_name[i];
+ if (vdev_name)
+ rte_vdev_uninit(vdev_name);
+ }
+ ifpga_monitor_stop_func(ifpga_rdev);
+ ifpga_rdev->rawdev = NULL;
+ }
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
opae_adapter_destroy(adapter);
@@ -1638,8 +1652,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
return -EINVAL;
}
dev = ifpga_rawdev_get(rawdev);
- if (dev)
- dev->rawdev = NULL;
adapter = ifpga_rawdev_get_priv(rawdev);
if (!adapter)
@@ -1714,73 +1726,118 @@ static int ifpga_rawdev_get_string_arg(const char *key
__rte_unused,
return 0;
}
+
static int
-ifpga_cfg_probe(struct rte_vdev_device *dev)
+ifpga_vdev_parse_devargs(struct rte_devargs *devargs,
+ struct ifpga_vdev_args *args)
{
- struct rte_devargs *devargs;
- struct rte_kvargs *kvlist = NULL;
- struct rte_rawdev *rawdev = NULL;
- struct ifpga_rawdev *ifpga_dev;
- int port;
+ struct rte_kvargs *kvlist;
char *name = NULL;
- char dev_name[RTE_RAWDEV_NAME_MAX_LEN];
- int ret = -1;
+ int port = 0;
+ int ret = -EINVAL;
- devargs = dev->device.devargs;
+ if (!devargs || !args)
+ return ret;
kvlist = rte_kvargs_parse(devargs->args, valid_args);
if (!kvlist) {
- IFPGA_RAWDEV_PMD_LOG(ERR, "error when parsing param");
- goto end;
+ IFPGA_RAWDEV_PMD_ERR("error when parsing devargs");
+ return ret;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_NAME) == 1) {
if (rte_kvargs_process(kvlist, IFPGA_ARG_NAME,
- &ifpga_rawdev_get_string_arg,
- &name) < 0) {
+ &ifpga_rawdev_get_string_arg, &name) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
-IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
+ } else {
+ strlcpy(args->bdf, name, sizeof(args->bdf));
+ rte_free(name);
}
} else {
IFPGA_RAWDEV_PMD_ERR("arg %s is mandatory for ifpga bus",
- IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_PORT) == 1) {
- if (rte_kvargs_process(kvlist,
- IFPGA_ARG_PORT,
- &rte_ifpga_get_integer32_arg,
- &port) < 0) {
+ if (rte_kvargs_process(kvlist, IFPGA_ARG_PORT,
+ &rte_ifpga_get_integer32_arg, &port) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
IFPGA_ARG_PORT);
goto end;
+ } else {
+ args->port = port;
}
} else {
IFPGA_RAWDEV_PMD_ERR
[PATCH v2 3/4] raw/ifpga: unregister interrupt in ifpga close function
Move interrupt unregistration from ifpga destroy function to
ifpga close function, so rte_rawdev_pmd_release function can
release interrupt resource.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/ifpga/ifpga_rawdev.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fe3fc43..94df56c 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -78,6 +78,7 @@ static int set_surprise_link_check_aer(
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
int start, uint32_t cap);
static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
+static void fme_interrupt_handler(void *param);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
@@ -740,8 +741,9 @@ static int set_surprise_link_check_aer(
{
struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
char *vdev_name = NULL;
- int i = 0;
+ int i, ret = 0;
if (dev) {
ifpga_rdev = ifpga_rawdev_get(dev);
@@ -756,12 +758,19 @@ static int set_surprise_link_check_aer(
}
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
+ mgr = opae_adapter_get_mgr(adapter);
+ if (ifpga_rdev && mgr) {
+ if (ifpga_unregister_msix_irq(ifpga_rdev,
+ IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr) < 0)
+ ret = -EINVAL;
+ }
opae_adapter_destroy(adapter);
opae_adapter_data_free(adapter->data);
}
}
- return dev ? 0:1;
+ return ret;
}
static int
@@ -1629,9 +1638,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
int ret;
struct rte_rawdev *rawdev;
char name[RTE_RAWDEV_NAME_MAX_LEN];
- struct opae_adapter *adapter;
- struct opae_manager *mgr;
- struct ifpga_rawdev *dev;
if (!pci_dev) {
IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
@@ -1651,19 +1657,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
IFPGA_RAWDEV_PMD_ERR("Invalid device name (%s)", name);
return -EINVAL;
}
- dev = ifpga_rawdev_get(rawdev);
-
- adapter = ifpga_rawdev_get_priv(rawdev);
- if (!adapter)
- return -ENODEV;
-
- mgr = opae_adapter_get_mgr(adapter);
- if (!mgr)
- return -ENODEV;
-
- if (ifpga_unregister_msix_irq(dev, IFPGA_FME_IRQ, 0,
- fme_interrupt_handler, mgr) < 0)
- return -EINVAL;
/* rte_rawdev_close is called by pmd_release */
ret = rte_rawdev_pmd_release(rawdev);
--
1.8.3.1
[PATCH v2 4/4] raw/ifpga: support ofs card probe
ofs card introduces some changes in DFL (Device Feature List) and
DFH (Device Feature Header) of FPGA. ifpga driver adapt these
changes mainly by adjusting enumeration process.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: fix build error in UB2004-32
---
drivers/raw/ifpga/base/ifpga_api.c | 28 +-
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_enumerate.c | 678 ++---
drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +-
drivers/raw/ifpga/base/ifpga_hw.h | 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 2 +-
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/ifpga_rawdev.c | 48 +-
8 files changed, 587 insertions(+), 192 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 4610ef1..f19cc26 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -13,15 +13,22 @@
static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
struct uuid *uuid)
{
- struct opae_bridge *br = acc->br;
- struct ifpga_port_hw *port;
+ struct ifpga_afu_info *afu_info = acc->data;
+ struct opae_reg_region *region;
+ u64 val = 0;
- if (!br || !br->data)
- return -EINVAL;
+ if (!afu_info)
+ return -ENODEV;
- port = br->data;
+ region = &afu_info->region[0];
+ if (uuid) {
+ val = readq(region->addr + sizeof(struct feature_header));
+ opae_memcpy(uuid->b, &val, sizeof(u64));
+ val = readq(region->addr + sizeof(struct feature_header) + 8);
+ opae_memcpy(uuid->b + 8, &val, sizeof(u64));
+ }
- return fpga_get_afu_uuid(port, uuid);
+ return 0;
}
static int ifpga_acc_set_irq(struct opae_accelerator *acc,
@@ -32,6 +39,9 @@ static int ifpga_acc_set_irq(struct opae_accelerator *acc,
struct ifpga_port_hw *port;
struct fpga_uafu_irq_set irq_set;
+ if (!afu_info)
+ return -ENODEV;
+
if (!br || !br->data)
return -EINVAL;
@@ -68,7 +78,7 @@ static int ifpga_acc_get_region_info(struct opae_accelerator
*acc,
struct ifpga_afu_info *afu_info = acc->data;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (info->index >= afu_info->num_regions)
return -EINVAL;
@@ -89,7 +99,7 @@ static int ifpga_acc_read(struct opae_accelerator *acc,
unsigned int region_idx,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
@@ -129,7 +139,7 @@ static int ifpga_acc_write(struct opae_accelerator *acc,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 8f62033..9a280eb 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -73,6 +73,7 @@
enum fpga_id_type {
FME_ID,
PORT_ID,
+ AFU_ID,
FPGA_ID_MAX,
};
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 48b8af4..8fa8273 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -2,6 +2,10 @@
* Copyright(c) 2010-2018 Intel Corporation
*/
+#include
+#include
+#include
+
#include "opae_hw_api.h"
#include "ifpga_api.h"
@@ -9,6 +13,19 @@
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+struct dfl_fpga_enum_dfl {
+ u64 start;
+ u64 len;
+ void *addr;
+ TAILQ_ENTRY(dfl_fpga_enum_dfl) node;
+};
+
+TAILQ_HEAD(dfl_fpga_enum_dfls, dfl_fpga_enum_dfl);
+struct dfl_fpga_enum_info {
+ struct ifpga_hw *hw;
+ struct dfl_fpga_enum_dfls dfls;
+};
+
struct build_feature_devs_info {
struct opae_adapter_data_pci *pci_data;
@@ -21,7 +38,6 @@ struct build_feature_devs_info {
void *ioaddr;
void *ioend;
uint64_t phys_addr;
- int current_bar;
void *pfme_hdr;
@@ -141,8 +157,10 @@ static u64 feature_id(void __iomem *start)
unsigned int size, unsigned int vec_start,
unsigned int vec_cnt)
{
- return build_info_add_sub_feature(binfo, start, fid, size, vec_start,
- vec_cnt);
+ if (binfo->current_type != AFU_ID)
+ return build_info_add_sub_feature(binfo, start, fid, size,
+ vec_start, vec_cnt);
+
[PATCH v3] raw/afu_mf: introduce AFU MF device driver
Add afu_mf driver to manage various AFU (Acceleration Function Unit)
in FPGA.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: fix typo
---
v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 440
drivers/raw/afu_mf/afu_mf_rawdev.h | 91 ++
drivers/raw/afu_mf/he_hssi.c | 369 +++
drivers/raw/afu_mf/he_hssi.h | 102 ++
drivers/raw/afu_mf/he_lbk.c| 430
drivers/raw/afu_mf/he_lbk.h| 121 +++
drivers/raw/afu_mf/he_mem.c| 181
drivers/raw/afu_mf/he_mem.h| 40 +
drivers/raw/afu_mf/meson.build |8 +
drivers/raw/afu_mf/n3000_afu.c | 2007
drivers/raw/afu_mf/n3000_afu.h | 333 ++
drivers/raw/afu_mf/rte_pmd_afu.h | 134 +++
drivers/raw/afu_mf/version.map |3 +
drivers/raw/meson.build|1 +
14 files changed, 4260 insertions(+)
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h
create mode 100644 drivers/raw/afu_mf/he_hssi.c
create mode 100644 drivers/raw/afu_mf/he_hssi.h
create mode 100644 drivers/raw/afu_mf/he_lbk.c
create mode 100644 drivers/raw/afu_mf/he_lbk.h
create mode 100644 drivers/raw/afu_mf/he_mem.c
create mode 100644 drivers/raw/afu_mf/he_mem.h
create mode 100644 drivers/raw/afu_mf/meson.build
create mode 100644 drivers/raw/afu_mf/n3000_afu.c
create mode 100644 drivers/raw/afu_mf/n3000_afu.h
create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h
create mode 100644 drivers/raw/afu_mf/version.map
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
new file mode 100644
index 000..f24c748
--- /dev/null
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -0,0 +1,440 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "rte_pmd_afu.h"
+#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
+#include "he_lbk.h"
+#include "he_mem.h"
+#include "he_hssi.h"
+
+#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
+
+static const struct rte_afu_uuid afu_uuid_map[] = {
+ { N3000_AFU_UUID_L, N3000_AFU_UUID_H },
+ { HE_LBK_UUID_L, HE_LBK_UUID_H },
+ { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
+ { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
+ { HE_HSSI_UUID_L, HE_HSSI_UUID_H },
+ { 0, 0 /* sentinel */ }
+};
+
+static struct afu_mf_drv *afu_table[] = {
+ &n3000_afu_drv,
+ &he_lbk_drv,
+ &he_mem_lbk_drv,
+ &he_mem_tg_drv,
+ &he_hssi_drv,
+ NULL
+};
+
+static inline int afu_mf_trylock(struct afu_mf_rawdev *dev)
+{
+ int32_t x = 0;
+
+ if (!dev || !dev->shared)
+ return -ENODEV;
+
+ x = __atomic_load_n(&dev->shared->lock, __ATOMIC_RELAXED);
+
+ if ((x != 0) || (__atomic_compare_exchange_n(&dev->shared->lock, &x, 1,
+ 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0))
+ return -EBUSY;
+
+ return 0;
+}
+
+static inline void afu_mf_unlock(struct afu_mf_rawdev *dev)
+{
+ if (!dev || !dev->shared)
+ return;
+
+ __atomic_store_n(&dev->shared->lock, 0, __ATOMIC_RELEASE);
+}
+
+static int afu_mf_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_mf_unlock(dev);
+
+ return ret;
+}
+
+static void afu_mf_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please stop it later");
+ return;
+
[PATCH v4] raw/afu_mf: introduce AFU MF device driver
Add afu_mf driver to manage various AFU (Acceleration Function Unit)
in FPGA.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: fix typo
---
v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32
---
v4: fix coding style issue and build error in FreeBSD13-64
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 440
drivers/raw/afu_mf/afu_mf_rawdev.h | 89 ++
drivers/raw/afu_mf/he_hssi.c | 369 +++
drivers/raw/afu_mf/he_hssi.h | 102 ++
drivers/raw/afu_mf/he_lbk.c| 427
drivers/raw/afu_mf/he_lbk.h| 121 +++
drivers/raw/afu_mf/he_mem.c| 181
drivers/raw/afu_mf/he_mem.h| 40 +
drivers/raw/afu_mf/meson.build |8 +
drivers/raw/afu_mf/n3000_afu.c | 2005
drivers/raw/afu_mf/n3000_afu.h | 333 ++
drivers/raw/afu_mf/rte_pmd_afu.h | 134 +++
drivers/raw/afu_mf/version.map |3 +
drivers/raw/meson.build|1 +
14 files changed, 4253 insertions(+)
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h
create mode 100644 drivers/raw/afu_mf/he_hssi.c
create mode 100644 drivers/raw/afu_mf/he_hssi.h
create mode 100644 drivers/raw/afu_mf/he_lbk.c
create mode 100644 drivers/raw/afu_mf/he_lbk.h
create mode 100644 drivers/raw/afu_mf/he_mem.c
create mode 100644 drivers/raw/afu_mf/he_mem.h
create mode 100644 drivers/raw/afu_mf/meson.build
create mode 100644 drivers/raw/afu_mf/n3000_afu.c
create mode 100644 drivers/raw/afu_mf/n3000_afu.h
create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h
create mode 100644 drivers/raw/afu_mf/version.map
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
new file mode 100644
index 000..f24c748
--- /dev/null
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -0,0 +1,440 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "rte_pmd_afu.h"
+#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
+#include "he_lbk.h"
+#include "he_mem.h"
+#include "he_hssi.h"
+
+#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
+
+static const struct rte_afu_uuid afu_uuid_map[] = {
+ { N3000_AFU_UUID_L, N3000_AFU_UUID_H },
+ { HE_LBK_UUID_L, HE_LBK_UUID_H },
+ { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
+ { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
+ { HE_HSSI_UUID_L, HE_HSSI_UUID_H },
+ { 0, 0 /* sentinel */ }
+};
+
+static struct afu_mf_drv *afu_table[] = {
+ &n3000_afu_drv,
+ &he_lbk_drv,
+ &he_mem_lbk_drv,
+ &he_mem_tg_drv,
+ &he_hssi_drv,
+ NULL
+};
+
+static inline int afu_mf_trylock(struct afu_mf_rawdev *dev)
+{
+ int32_t x = 0;
+
+ if (!dev || !dev->shared)
+ return -ENODEV;
+
+ x = __atomic_load_n(&dev->shared->lock, __ATOMIC_RELAXED);
+
+ if ((x != 0) || (__atomic_compare_exchange_n(&dev->shared->lock, &x, 1,
+ 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0))
+ return -EBUSY;
+
+ return 0;
+}
+
+static inline void afu_mf_unlock(struct afu_mf_rawdev *dev)
+{
+ if (!dev || !dev->shared)
+ return;
+
+ __atomic_store_n(&dev->shared->lock, 0, __ATOMIC_RELEASE);
+}
+
+static int afu_mf_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_mf_unlock(dev);
+
+ return ret;
+}
+
+static void afu_mf_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU i
[PATCH v1 0/2] Update rsu implementation
First patch introduce PMCI driver to provide interface to access PMCI functions which include flash controller. The second patch update RSU (Remote System Update) implementation to adapt with PMCI controller. Wei Huang (2): raw/ifpga/base: add pmci driver raw/ifpga: update secure rsu drivers/raw/ifpga/base/ifpga_api.c | 39 +- drivers/raw/ifpga/base/ifpga_defines.h | 103 +- drivers/raw/ifpga/base/ifpga_feature_dev.c |2 + drivers/raw/ifpga/base/ifpga_feature_dev.h |3 + drivers/raw/ifpga/base/ifpga_fme.c | 273 - drivers/raw/ifpga/base/ifpga_fme_error.c |2 + drivers/raw/ifpga/base/ifpga_fme_rsu.c | 546 ++ drivers/raw/ifpga/base/ifpga_port_error.c|2 +- drivers/raw/ifpga/base/ifpga_sec_mgr.c | 1157 -- drivers/raw/ifpga/base/ifpga_sec_mgr.h | 122 ++- drivers/raw/ifpga/base/opae_hw_api.c | 113 ++- drivers/raw/ifpga/base/opae_hw_api.h | 15 +- drivers/raw/ifpga/base/opae_intel_max10.c| 938 -- drivers/raw/ifpga/base/opae_intel_max10.h| 313 +- drivers/raw/ifpga/base/opae_osdep.h | 43 +- drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 + drivers/raw/ifpga/rte_pmd_ifpga.c| 104 +- drivers/raw/ifpga/rte_pmd_ifpga.h| 117 +++ drivers/raw/ifpga/version.map| 11 + 19 files changed, 3168 insertions(+), 745 deletions(-) -- 1.8.3.1
[PATCH v1 1/2] raw/ifpga/base: add pmci driver
PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This driver provide interfaces to access registers of BMC chip and
external flash of FPGA.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/ifpga/base/ifpga_defines.h | 103 ++-
drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
drivers/raw/ifpga/base/ifpga_fme.c | 265 +--
drivers/raw/ifpga/base/ifpga_fme_error.c | 2 +
drivers/raw/ifpga/base/ifpga_port_error.c| 2 +-
drivers/raw/ifpga/base/ifpga_sec_mgr.c | 9 +-
drivers/raw/ifpga/base/ifpga_sec_mgr.h | 9 +-
drivers/raw/ifpga/base/opae_hw_api.c | 29 +
drivers/raw/ifpga/base/opae_hw_api.h | 1 +
drivers/raw/ifpga/base/opae_intel_max10.c| 938 ---
drivers/raw/ifpga/base/opae_intel_max10.h| 313 +++-
drivers/raw/ifpga/base/opae_osdep.h | 43 +-
drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 +
14 files changed, 1524 insertions(+), 203 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 9a280eb..7c8fa89 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -23,6 +23,7 @@
#define FME_FEATURE_NIOS_SPI"fme_nios_spi"
#define FME_FEATURE_I2C_MASTER "fme_i2c_master"
#define FME_FEATURE_ETH_GROUP "fme_eth_group"
+#define FME_FEATURE_PMCI"fme_pmci"
#define PORT_FEATURE_HEADER "port_hdr"
#define PORT_FEATURE_UAFU "port_uafu"
@@ -91,6 +92,7 @@ enum fpga_id_type {
#define FME_FEATURE_ID_NIOS_SPI 0xd
#define FME_FEATURE_ID_I2C_MASTER 0xf
#define FME_FEATURE_ID_ETH_GROUP 0x10
+#define FME_FEATURE_ID_PMCI 0x12
#define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
#define PORT_FEATURE_ID_ERROR 0x10
@@ -266,6 +268,24 @@ struct feature_fme_bitstream_id {
union {
u64 csr;
struct {
+ u8 build_patch:8;
+ u8 build_minor:8;
+ u8 build_major:8;
+ u8 fvl_bypass:1;
+ u8 mac_lightweight:1;
+ u8 disagregate:1;
+ u8 lightweiht:1;
+ u8 seu:1;
+ u8 ptp:1;
+ u8 reserve:2;
+ u8 interface:4;
+ u32 afu_revision:12;
+ u8 patch:4;
+ u8 minor:4;
+ u8 major:4;
+ u8 reserved:4;
+ } v1;
+ struct {
u32 gitrepo_hash:32;/* GIT repository hash */
/*
* HSSI configuration identifier:
@@ -274,7 +294,8 @@ struct feature_fme_bitstream_id {
* 2 - Ethernet
*/
u8 hssi_id:4;
- u16 rsvd1:12; /* Reserved */
+ u8 rsvd1:4;
+ u8 fim_type:8;
/* Bitstream version patch number */
u8 bs_verpatch:4;
/* Bitstream version minor number */
@@ -283,7 +304,7 @@ struct feature_fme_bitstream_id {
u8 bs_vermajor:4;
/* Bitstream version debug number */
u8 bs_verdebug:4;
- };
+ } v2;
};
};
@@ -1670,31 +1691,6 @@ struct bts_header {
#define check_support(n) (n == 1 ? "support" : "no")
-/* bitstream id definition */
-struct fme_bitstream_id {
- union {
- u64 id;
- struct {
- u8 build_patch:8;
- u8 build_minor:8;
- u8 build_major:8;
- u8 fvl_bypass:1;
- u8 mac_lightweight:1;
- u8 disagregate:1;
- u8 lightweiht:1;
- u8 seu:1;
- u8 ptp:1;
- u8 reserve:2;
- u8 interface:4;
- u32 afu_revision:12;
- u8 patch:4;
- u8 minor:4;
- u8 major:4;
- u8 reserved:4;
- };
- };
-};
-
enum board_interface {
VC_8_10G = 0,
VC_4_25G = 1,
@@ -1703,10 +1699,30 @@ enum board_interface {
VC_2_2_25G = 4,
};
+enum fim_type {
+ BASE_ADP = 0,
+ BASE_FDK,
+ BASE_X16_ADP,
+ BASE_X16_FDK,
+ FIMA_10G_ADP,
+ FIMA_25G_AD
[PATCH v1 2/2] raw/ifpga: update secure rsu
Update secure RSU (Remote System Update) driver to adapt the changes
introduced by OFS.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
drivers/raw/ifpga/base/ifpga_api.c | 39 +-
drivers/raw/ifpga/base/ifpga_feature_dev.h |2 +
drivers/raw/ifpga/base/ifpga_fme.c |8 +
drivers/raw/ifpga/base/ifpga_fme_rsu.c | 546 -
drivers/raw/ifpga/base/ifpga_sec_mgr.c | 1156
drivers/raw/ifpga/base/ifpga_sec_mgr.h | 115 ++-
drivers/raw/ifpga/base/opae_hw_api.c | 84 +-
drivers/raw/ifpga/base/opae_hw_api.h | 14 +-
drivers/raw/ifpga/rte_pmd_ifpga.c | 104 ++-
drivers/raw/ifpga/rte_pmd_ifpga.h | 117 +++
drivers/raw/ifpga/version.map | 11 +
11 files changed, 1649 insertions(+), 547 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index f19cc26..c187f94 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -261,11 +261,42 @@ static int ifpga_mgr_stop_flash_update(struct
opae_manager *mgr, int force)
return fpga_stop_flash_update(fme, force);
}
-static int ifpga_mgr_reload(struct opae_manager *mgr, int type, int page)
+static int ifpga_mgr_reload(struct opae_manager *mgr, char *str)
{
struct ifpga_fme_hw *fme = mgr->data;
- return fpga_reload(fme, type, page);
+ return fpga_reload(fme, str);
+}
+
+static int ifpga_available_images(struct opae_manager *mgr, char *buf,
+ size_t size)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_available_images(fme, buf, size);
+}
+
+static int ifpga_mgr_set_poc_image(struct opae_manager *mgr, char *str)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_set_poc_image(fme, str);
+}
+
+static int ifpga_mgr_get_poc_images(struct opae_manager *mgr, char *buf,
+ size_t size)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_get_poc_images(fme, buf, size);
+}
+
+static int ifpga_mgr_read_flash(struct opae_manager *mgr, u32 address,
+ u32 size, void *buf)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fme_mgr_read_flash(fme, address, size, buf);
}
struct opae_manager_ops ifpga_mgr_ops = {
@@ -277,6 +308,10 @@ struct opae_manager_ops ifpga_mgr_ops = {
.update_flash = ifpga_mgr_update_flash,
.stop_flash_update = ifpga_mgr_stop_flash_update,
.reload = ifpga_mgr_reload,
+ .available_images = ifpga_available_images,
+ .get_poc_images = ifpga_mgr_get_poc_images,
+ .set_poc_image = ifpga_mgr_set_poc_image,
+ .read_flash = ifpga_mgr_read_flash
};
static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.h
b/drivers/raw/ifpga/base/ifpga_feature_dev.h
index a637eb5..7a2f2e5 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.h
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.h
@@ -223,4 +223,6 @@ int fme_mgr_get_retimer_status(struct ifpga_fme_hw *fme,
int fme_mgr_get_sensor_value(struct ifpga_fme_hw *fme,
struct opae_sensor_info *sensor,
unsigned int *value);
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf);
#endif /* _IFPGA_FEATURE_DEV_H_ */
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 1b9a922..1f54680 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -1658,3 +1658,11 @@ struct ifpga_feature_ops fme_pmci_ops = {
.init = fme_pmci_init,
.uinit = fme_pmci_uinit,
};
+
+int fme_mgr_read_flash(struct ifpga_fme_hw *fme, u32 address,
+ u32 size, void *buf)
+{
+ struct intel_max10_device *max10 = fme->max10_dev;
+
+ return opae_read_flash(max10, address, size, buf);
+}
diff --git a/drivers/raw/ifpga/base/ifpga_fme_rsu.c
b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
index f147aaa..88a19fa 100644
--- a/drivers/raw/ifpga/base/ifpga_fme_rsu.c
+++ b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
@@ -9,6 +9,28 @@
static struct ifpga_sec_mgr *sec_mgr;
+static void lock(struct ifpga_sec_mgr *smgr)
+{
+ struct ifpga_hw *hw = NULL;
+
+ if (smgr && smgr->fme) {
+ hw = (struct ifpga_hw *)smgr->fme->parent;
+ if (hw)
+ opae_adapter_lock(hw->adapter, -1);
+ }
+}
+
+static void unlock(struct ifpga_sec_mgr *smgr)
+{
+ struct ifpga_hw *hw = NULL;
+
+ if (smgr && smgr->fme) {
+ hw = (struct ifpga_hw *)smgr->fme->parent;
+ if (hw)
+ opae_adapter_unlock(hw->adapter);
+ }
+}
+
static void set_rsu_control(struct ifpga_sec_mgr *smgr, uint32_t ctrl)
{
if (smgr && smgr->rsu_control)
@@ -22,6 +44,16 @@ static uint32_t get_rsu_co
[PATCH v3 0/5] Support OFS card
Changes from v2: 1. update commit log with Tianfei's comment. 2. use macro to define immediate value. 3. treat 7 as special PCI BAR index. 4. update ifpga documentation with OFS introduction. Wei Huang (5): raw/ifpga: remove experimental tag from ifpga APIs raw/ifpga: remove vdev when ifpga is closed raw/ifpga: unregister interrupt in ifpga close function raw/ifpga: support ofs card probe guides/rawdevs: add description of ofs in ifpga doc doc/guides/rawdevs/ifpga.rst | 114 - drivers/raw/ifpga/base/ifpga_api.c | 28 +- drivers/raw/ifpga/base/ifpga_defines.h | 1 + drivers/raw/ifpga/base/ifpga_enumerate.c | 681 ++--- drivers/raw/ifpga/base/ifpga_enumerate.h | 2 + drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +- drivers/raw/ifpga/base/ifpga_hw.h | 2 + drivers/raw/ifpga/base/opae_hw_api.c | 2 +- drivers/raw/ifpga/base/opae_hw_api.h | 2 + drivers/raw/ifpga/ifpga_rawdev.c | 241 ++ drivers/raw/ifpga/ifpga_rawdev.h | 8 + drivers/raw/ifpga/rte_pmd_ifpga.h | 48 -- drivers/raw/ifpga/version.map | 7 +- 13 files changed, 855 insertions(+), 299 deletions(-) -- 1.8.3.1
[PATCH v3 1/5] raw/ifpga: remove experimental tag from ifpga APIs
These APIs are introduced in DPDK 21.05 and have been tested in several release, experimental tag can be formally removed. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang --- drivers/raw/ifpga/rte_pmd_ifpga.h | 48 --- drivers/raw/ifpga/version.map | 7 ++ 2 files changed, 2 insertions(+), 53 deletions(-) diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.h b/drivers/raw/ifpga/rte_pmd_ifpga.h index 47d66ba..3fa5d34 100644 --- a/drivers/raw/ifpga/rte_pmd_ifpga.h +++ b/drivers/raw/ifpga/rte_pmd_ifpga.h @@ -68,9 +68,6 @@ } rte_pmd_ifpga_phy_info; /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' * * @param pci_addr @@ -82,14 +79,10 @@ * - (-EINVAL) if bad parameter. * - (-ENODEV) if FPGA is not probed by ifpga driver. */ -__rte_experimental int rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get current RSU status of the specified Intel FPGA device * * @param dev_id @@ -103,14 +96,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Set current RSU status of the specified Intel FPGA device * * @param dev_id @@ -124,14 +113,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get FPGA property of specified Intel FPGA device * * @param dev_id @@ -144,14 +129,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PHY information of specified Intel FPGA device * * @param dev_id @@ -164,14 +145,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Update image flash of specified Intel FPGA device * * @param dev_id @@ -187,15 +164,11 @@ * - (-EBUSY) if FPGA is updating or rebooting. * - (-EIO) if failed to open image file. */ -__rte_experimental int rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, uint64_t *status); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Stop flash update of specified Intel FPGA device * * @param dev_id @@ -208,14 +181,10 @@ * - (-EINVAL) if bad parameter. * - (-EAGAIN) if failed with force. */ -__rte_experimental int rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Check current Intel FPGA status and change it to reboot status if it is idle * * @param dev_id @@ -226,14 +195,10 @@ * - (-ENOMEM) if share data is not initialized. * - (-EBUSY) if FPGA is updating or rebooting. */ -__rte_experimental int rte_pmd_ifpga_reboot_try(uint16_t dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Trigger full reconfiguration of specified Intel FPGA device * * @param dev_id @@ -252,28 +217,20 @@ * - (-EINVAL) if bad parameter. * - (-EBUSY) if failed to access BMC register. */ -__rte_experimental int rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PCI bus the Intel FPGA driver register to * * @return * - (valid pointer) if successful. * - (NULL) if the Intel FPGA driver is not registered to any PCI bus. */ -__rte_experimental const struct rte_pci_bus * rte_pmd_ifpga_get_pci_bus(void); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Perform PR (partial reconfiguration) on specified Intel FPGA device * * @param dev_id @@ -287,17 +244,12 @@ * - (-EINVAL) if bad parameter or operation failed. * - (-ENOMEM) if failed to allocate memory. */ -__rte_experimental int rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const char *file); /** - * @warn
[PATCH v3 2/5] raw/ifpga: remove vdev when ifpga is closed
Virtual devices created on ifpga raw device will not be removed
when ifpga device has closed. To avoid resource leak problem,
this patch introduces an ifpga virtual device remove function,
virtual devices will be destroyed after the ifpga raw device closed.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
---
v2: update commit log, use macro to replace immediate value.
---
drivers/raw/ifpga/ifpga_rawdev.c | 166 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 8 ++
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 6d4117c..fe3fc43 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -134,6 +134,8 @@ struct ifpga_rawdev *
for (i = 0; i < IFPGA_MAX_IRQ; i++)
dev->intr_handle[i] = NULL;
dev->poll_enabled = 0;
+ for (i = 0; i < IFPGA_MAX_VDEV; i++)
+ dev->vdev_name[i] = NULL;
return dev;
}
@@ -736,10 +738,22 @@ static int set_surprise_link_check_aer(
static int
ifpga_rawdev_close(struct rte_rawdev *dev)
{
+ struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ char *vdev_name = NULL;
+ int i = 0;
if (dev) {
- ifpga_monitor_stop_func(ifpga_rawdev_get(dev));
+ ifpga_rdev = ifpga_rawdev_get(dev);
+ if (ifpga_rdev) {
+ for (i = 0; i < IFPGA_MAX_VDEV; i++) {
+ vdev_name = ifpga_rdev->vdev_name[i];
+ if (vdev_name)
+ rte_vdev_uninit(vdev_name);
+ }
+ ifpga_monitor_stop_func(ifpga_rdev);
+ ifpga_rdev->rawdev = NULL;
+ }
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
opae_adapter_destroy(adapter);
@@ -1638,8 +1652,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
return -EINVAL;
}
dev = ifpga_rawdev_get(rawdev);
- if (dev)
- dev->rawdev = NULL;
adapter = ifpga_rawdev_get_priv(rawdev);
if (!adapter)
@@ -1714,73 +1726,118 @@ static int ifpga_rawdev_get_string_arg(const char *key
__rte_unused,
return 0;
}
+
static int
-ifpga_cfg_probe(struct rte_vdev_device *dev)
+ifpga_vdev_parse_devargs(struct rte_devargs *devargs,
+ struct ifpga_vdev_args *args)
{
- struct rte_devargs *devargs;
- struct rte_kvargs *kvlist = NULL;
- struct rte_rawdev *rawdev = NULL;
- struct ifpga_rawdev *ifpga_dev;
- int port;
+ struct rte_kvargs *kvlist;
char *name = NULL;
- char dev_name[RTE_RAWDEV_NAME_MAX_LEN];
- int ret = -1;
+ int port = 0;
+ int ret = -EINVAL;
- devargs = dev->device.devargs;
+ if (!devargs || !args)
+ return ret;
kvlist = rte_kvargs_parse(devargs->args, valid_args);
if (!kvlist) {
- IFPGA_RAWDEV_PMD_LOG(ERR, "error when parsing param");
- goto end;
+ IFPGA_RAWDEV_PMD_ERR("error when parsing devargs");
+ return ret;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_NAME) == 1) {
if (rte_kvargs_process(kvlist, IFPGA_ARG_NAME,
- &ifpga_rawdev_get_string_arg,
- &name) < 0) {
+ &ifpga_rawdev_get_string_arg, &name) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
-IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
+ } else {
+ strlcpy(args->bdf, name, sizeof(args->bdf));
+ rte_free(name);
}
} else {
IFPGA_RAWDEV_PMD_ERR("arg %s is mandatory for ifpga bus",
- IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_PORT) == 1) {
- if (rte_kvargs_process(kvlist,
- IFPGA_ARG_PORT,
- &rte_ifpga_get_integer32_arg,
- &port) < 0) {
+ if (rte_kvargs_process(kvlist, IFPGA_ARG_PORT,
+ &rte_ifpga_get_integer32_arg, &port) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
IFPGA_ARG_PORT);
goto end;
+ } else {
+ args->port = port;
[PATCH v3 3/5] raw/ifpga: unregister interrupt in ifpga close function
In original implementation, interrupts are unregistered in
ifpga_rawdev_destroy function. If application want to release
the ifpga driver resource by calling rte_rawdev_pmd_release,
interrupt resource will not be released.
Now interrupt unregistration is moved from ifpga destroy function
to ifpga close function, when rte_rawdev_pmd_release is called,
rte_rawdev_close will be called, then interrupts are unregistered.
Signed-off-by: Wei Huang
---
v2: update commit log
---
drivers/raw/ifpga/ifpga_rawdev.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fe3fc43..94df56c 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -78,6 +78,7 @@ static int set_surprise_link_check_aer(
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
int start, uint32_t cap);
static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
+static void fme_interrupt_handler(void *param);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
@@ -740,8 +741,9 @@ static int set_surprise_link_check_aer(
{
struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
char *vdev_name = NULL;
- int i = 0;
+ int i, ret = 0;
if (dev) {
ifpga_rdev = ifpga_rawdev_get(dev);
@@ -756,12 +758,19 @@ static int set_surprise_link_check_aer(
}
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
+ mgr = opae_adapter_get_mgr(adapter);
+ if (ifpga_rdev && mgr) {
+ if (ifpga_unregister_msix_irq(ifpga_rdev,
+ IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr) < 0)
+ ret = -EINVAL;
+ }
opae_adapter_destroy(adapter);
opae_adapter_data_free(adapter->data);
}
}
- return dev ? 0:1;
+ return ret;
}
static int
@@ -1629,9 +1638,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
int ret;
struct rte_rawdev *rawdev;
char name[RTE_RAWDEV_NAME_MAX_LEN];
- struct opae_adapter *adapter;
- struct opae_manager *mgr;
- struct ifpga_rawdev *dev;
if (!pci_dev) {
IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
@@ -1651,19 +1657,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
IFPGA_RAWDEV_PMD_ERR("Invalid device name (%s)", name);
return -EINVAL;
}
- dev = ifpga_rawdev_get(rawdev);
-
- adapter = ifpga_rawdev_get_priv(rawdev);
- if (!adapter)
- return -ENODEV;
-
- mgr = opae_adapter_get_mgr(adapter);
- if (!mgr)
- return -ENODEV;
-
- if (ifpga_unregister_msix_irq(dev, IFPGA_FME_IRQ, 0,
- fme_interrupt_handler, mgr) < 0)
- return -EINVAL;
/* rte_rawdev_close is called by pmd_release */
ret = rte_rawdev_pmd_release(rawdev);
--
1.8.3.1
[PATCH v3 4/5] raw/ifpga: support ofs card probe
PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.
Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device
Feature List) starts from BAR0 by default, port DFL location is indicated
in PORTn_OFFSET register in FME. In OFS implementation, FME DFL and port
DFL location can be defined individually in PCIe VSEC (Vendor Specific
Extented Capabilities). In this patch, DFL definition is searched in VSEC,
the legacy DFL is used only when DFL VSEC is not present.
In original DFL enumeration process, AFU is expected to locate in port DFL,
but this is not the case in OFS implementation. In this patch, enumeration
can search AFU in any PF/VF which has no FME and port.
Signed-off-by: Wei Huang
---
v2: fix build error in UB2004-32
---
v3: update commit log with Tianfei's comment, treat 7 as special BAR index.
---
drivers/raw/ifpga/base/ifpga_api.c | 28 +-
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_enumerate.c | 681 ++---
drivers/raw/ifpga/base/ifpga_enumerate.h | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +-
drivers/raw/ifpga/base/ifpga_hw.h | 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 2 +-
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/ifpga_rawdev.c | 48 +-
9 files changed, 592 insertions(+), 192 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 4610ef1..f19cc26 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -13,15 +13,22 @@
static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
struct uuid *uuid)
{
- struct opae_bridge *br = acc->br;
- struct ifpga_port_hw *port;
+ struct ifpga_afu_info *afu_info = acc->data;
+ struct opae_reg_region *region;
+ u64 val = 0;
- if (!br || !br->data)
- return -EINVAL;
+ if (!afu_info)
+ return -ENODEV;
- port = br->data;
+ region = &afu_info->region[0];
+ if (uuid) {
+ val = readq(region->addr + sizeof(struct feature_header));
+ opae_memcpy(uuid->b, &val, sizeof(u64));
+ val = readq(region->addr + sizeof(struct feature_header) + 8);
+ opae_memcpy(uuid->b + 8, &val, sizeof(u64));
+ }
- return fpga_get_afu_uuid(port, uuid);
+ return 0;
}
static int ifpga_acc_set_irq(struct opae_accelerator *acc,
@@ -32,6 +39,9 @@ static int ifpga_acc_set_irq(struct opae_accelerator *acc,
struct ifpga_port_hw *port;
struct fpga_uafu_irq_set irq_set;
+ if (!afu_info)
+ return -ENODEV;
+
if (!br || !br->data)
return -EINVAL;
@@ -68,7 +78,7 @@ static int ifpga_acc_get_region_info(struct opae_accelerator
*acc,
struct ifpga_afu_info *afu_info = acc->data;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (info->index >= afu_info->num_regions)
return -EINVAL;
@@ -89,7 +99,7 @@ static int ifpga_acc_read(struct opae_accelerator *acc,
unsigned int region_idx,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
@@ -129,7 +139,7 @@ static int ifpga_acc_write(struct opae_accelerator *acc,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 8f62033..9a280eb 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -73,6 +73,7 @@
enum fpga_id_type {
FME_ID,
PORT_ID,
+ AFU_ID,
FPGA_ID_MAX,
};
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 48b8af4..0e09904 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -2,6 +2,10 @@
* Copyright(c) 2010-2018 Intel Corporation
*/
+#include
+#include
+#include
+
#include "opae_hw_api.h"
#include "ifpga_api.h"
@@ -9,6 +13,19 @@
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+struct dfl_fpga_enum_dfl {
+ u64 start;
+ u64 len;
+ void *addr;
+ TAILQ_ENTRY(dfl_fpga_enum_dfl) node;
+};
+
+TAILQ_HEAD(dfl_fpga_enum_dfls, dfl_fpga_enum_dfl);
+struct dfl_fpga_enum_info {
+ struct ifpga_hw *hw;
+ struct dfl_fpga_enum_dfls dfls;
+};
+
struct build_feature_devs_info {
struct opae_adapter_data_pci
[PATCH v3 5/5] guides/rawdevs: add description of ofs in ifpga doc
OFS (Open FPGA Stack) specification is introduced briefly. Signed-off-by: Wei Huang --- doc/guides/rawdevs/ifpga.rst | 114 ++- 1 file changed, 113 insertions(+), 1 deletion(-) diff --git a/doc/guides/rawdevs/ifpga.rst b/doc/guides/rawdevs/ifpga.rst index dbd0d6e..8809bfc 100644 --- a/doc/guides/rawdevs/ifpga.rst +++ b/doc/guides/rawdevs/ifpga.rst @@ -1,5 +1,5 @@ .. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2018 Intel Corporation. +Copyright(c) 2018-2022 Intel Corporation. IFPGA Rawdev Driver == @@ -100,3 +100,115 @@ The following device parameters are supported: If null, the AFU Bit Stream has been PR in FPGA, if not forces PR and identifies AFU Bit Stream file. + + +Open FPGA Stack += + +Open FPGA Stack (OFS) is a collection of RTL and open source software providing +interfaces to access the instantiated RTL easily in an FPGA. OFS leverages the +DFL for the implementation of the FPGA RTL design. + +OFS designs allow for the arrangement of software interfaces across multiple +PCIe endpoints. Some of these interfaces may be PFs defined in the static region +that connect to interfaces in an IP that is loaded via Partial Reconfiguration (PR). +And some of these interfaces may be VFs defined in the PR region that can be +reconfigured by the end-user. Furthermore, these PFs/VFs may use DFLs such that +features may be discovered and accessed in user space (with the aid of a generic +kernel driver like vfio-pci). The diagram below depicts an example design with two +PFs and two VFs. In this example, it will export the management functions via PF0, +PF1 will bind with virtio-net driver presenting itself as a network interface to +the OS. The other functions, VF0 and VF1, leverage VFIO to export the MMIO space +to an application or assign to a VM.:: + + +-+ +--+ +-+ ++ + | FPGA Management | | VirtIO | | User App | | Virtual| + | App| | App | | | | Machine| + +++ +--+---+ +--+--+ +-+--+ + | | | | + +++ +--+---+ +--+--+| + | DFL Driver | |VirtIO driver | |VFIO || + +++ +--+---+ +--+--+| + | | | | + | | | | + +++ +--+---+ +--+--+ ++--+ + | PF0 | | PF1 | | PF0_VF0 | | PF0_VF1 | + +-+ +--+ +-+ +---+ + +As accelerators are specialized hardware, they are typically limited in the +number installed in a given system. Many use cases require them to be shared +across multiple software contexts or threads of software execution, either +through partitioning of individual dedicated resources, or virtualization of +shared resources. OFS provides several models to share the AFU resources via +PR mechanism and hardware-based virtualization schemes. + +1. Legacy model. + With legacy model FPGA cards like Intel PAC N3000 or N5000, there is + a notion that the boundary between the AFU and the shell is also the unit of + PR for those FPGA platforms. This model is only able to handle a + single context, because it only has one PR engine, and one PR region which + has an associated Port device. +2. Multiple VFs per PR slot. + In this model, available AFU resources may allow instantiation of many VFs + which have a dedicated PCIe function with their own dedicated MMIO space, or + partition a region of MMIO space on a single PCIe function. Intel PAC N6000 + card has implemented this model. + In this model, the AFU/PR slot was not connected to port device. For DFL's view, + the Next_AFU pointer in FIU feature header of port device points to NULL in this + model, so in AFU driver perspective, there is no AFU MMIO region managed by + AFU driver. On the other hand, each VF can start with an AFU feature header without + being connected to a FIU Port feature header. + +In multiple VFs per PR slot model, the port device can still be accessed using +ioctls API which expose /dev/dfl-port.h device nodes, like port reset, get +port info, whose APIs were mentioned in AFU section in this documentation. But +it cannot access the AFU MMIO space via AFU ioctl APIs like DFL_FPGA_PORT_DMA_MAP +because there is no AFU MMIO space managed in the AFU driver. Users can access +the AFU resource by creating VF devices via PCIe SRIOV interface, and then access +the VF via VFIO driver or assign the VF to VM. + +In multiple VFs per PR slot model, the steps to enable VFs are compatible with +legacy mode whic
[PATCH v5 0/5] introduce afu_mf raw device driver
The first patch implements the framework of the AFU raw device driver. The subsequent patches implement the driver of some AFUs. Wei Huang (5): drivers/raw: introduce AFU raw device driver raw/afu_mf: add N3000 AFU driver raw/afu_mf: add HE-LBK AFU driver raw/afu_mf: add HE-MEM AFU driver raw/afu_mf: add HE-HSSI AFU driver drivers/raw/afu_mf/afu_mf_rawdev.c | 440 drivers/raw/afu_mf/afu_mf_rawdev.h | 89 ++ drivers/raw/afu_mf/he_hssi.c | 369 +++ drivers/raw/afu_mf/he_hssi.h | 102 ++ drivers/raw/afu_mf/he_lbk.c| 427 drivers/raw/afu_mf/he_lbk.h| 121 +++ drivers/raw/afu_mf/he_mem.c| 181 drivers/raw/afu_mf/he_mem.h| 40 + drivers/raw/afu_mf/meson.build |8 + drivers/raw/afu_mf/n3000_afu.c | 2005 drivers/raw/afu_mf/n3000_afu.h | 333 ++ drivers/raw/afu_mf/rte_pmd_afu.h | 134 +++ drivers/raw/afu_mf/version.map |3 + drivers/raw/meson.build|1 + 14 files changed, 4253 insertions(+) create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h create mode 100644 drivers/raw/afu_mf/he_hssi.c create mode 100644 drivers/raw/afu_mf/he_hssi.h create mode 100644 drivers/raw/afu_mf/he_lbk.c create mode 100644 drivers/raw/afu_mf/he_lbk.h create mode 100644 drivers/raw/afu_mf/he_mem.c create mode 100644 drivers/raw/afu_mf/he_mem.h create mode 100644 drivers/raw/afu_mf/meson.build create mode 100644 drivers/raw/afu_mf/n3000_afu.c create mode 100644 drivers/raw/afu_mf/n3000_afu.h create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h create mode 100644 drivers/raw/afu_mf/version.map -- 1.8.3.1
[PATCH v5 1/5] drivers/raw: introduce AFU raw device driver
Add multi-function AFU raw device driver to manage various AFU
(Acceleration Function Unit) in FPGA.
This driver implements common AFU raw device interfaces and
exposes them to application as standard raw device APIs.
Normal application can operate specified AFU as below,
1. call rte_rawdev_pmd_get_named_dev() to find AFU raw device.
2. call rte_rawdev_configure() to initialize AFU raw device.
3. call rte_rawdev_selftest() to test function of AFU.
Signed-off-by: Wei Huang
---
v2: fix typo
---
v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32
---
v4: fix coding style issue and build error in FreeBSD13-64
---
v5: split patch into several patches
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 425 +
drivers/raw/afu_mf/afu_mf_rawdev.h | 71 +++
drivers/raw/afu_mf/meson.build | 5 +
drivers/raw/afu_mf/version.map | 3 +
drivers/raw/meson.build| 1 +
5 files changed, 505 insertions(+)
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.c
create mode 100644 drivers/raw/afu_mf/afu_mf_rawdev.h
create mode 100644 drivers/raw/afu_mf/meson.build
create mode 100644 drivers/raw/afu_mf/version.map
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
new file mode 100644
index 000..5be372a
--- /dev/null
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -0,0 +1,425 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "afu_mf_rawdev.h"
+
+#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
+
+static const struct rte_afu_uuid afu_uuid_map[] = {
+ { 0, 0 /* sentinel */ }
+};
+
+static struct afu_mf_drv *afu_table[] = {
+ NULL
+};
+
+static inline int afu_mf_trylock(struct afu_mf_rawdev *dev)
+{
+ int32_t x = 0;
+
+ if (!dev || !dev->shared)
+ return -ENODEV;
+
+ x = __atomic_load_n(&dev->shared->lock, __ATOMIC_RELAXED);
+
+ if ((x != 0) || (__atomic_compare_exchange_n(&dev->shared->lock, &x, 1,
+ 1, __ATOMIC_ACQUIRE, __ATOMIC_RELAXED) == 0))
+ return -EBUSY;
+
+ return 0;
+}
+
+static inline void afu_mf_unlock(struct afu_mf_rawdev *dev)
+{
+ if (!dev || !dev->shared)
+ return;
+
+ __atomic_store_n(&dev->shared->lock, 0, __ATOMIC_RELEASE);
+}
+
+static int afu_mf_rawdev_configure(const struct rte_rawdev *rawdev,
+ rte_rawdev_obj_t config, size_t config_size)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->config)
+ ret = (*dev->ops->config)(dev, config, config_size);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_start(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please start it later");
+ return ret;
+ }
+
+ if (dev->ops && dev->ops->start)
+ ret = (*dev->ops->start)(dev);
+
+ afu_mf_unlock(dev);
+
+ return ret;
+}
+
+static void afu_mf_rawdev_stop(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please stop it later");
+ return;
+ }
+
+ if (dev->ops && dev->ops->stop)
+ ret = (*dev->ops->stop)(dev);
+
+ afu_mf_unlock(dev);
+}
+
+static int afu_mf_rawdev_close(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ if (dev->ops && dev->ops->close)
+ ret = (*dev->ops->close)(dev);
+
+ return ret;
+}
+
+static int afu_mf_rawdev_reset(struct rte_rawdev *rawdev)
+{
+ struct afu_mf_rawdev *dev = NULL;
+ int ret = 0;
+
+ AFU_MF_PMD_FUNC_TRACE();
+
+ dev = afu_mf_rawdev_get_priv(rawdev);
+ if (!dev)
+ return -ENODEV;
+
+ ret = afu_mf_trylock(dev);
+ if (ret) {
+ AFU_MF_PMD_WARN("AFU is busy, please reset it later");
+
[PATCH v5 2/5] raw/afu_mf: add N3000 AFU driver
N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/afu_mf/afu_mf_rawdev.c |4 +
drivers/raw/afu_mf/afu_mf_rawdev.h | 18 +
drivers/raw/afu_mf/meson.build |4 +-
drivers/raw/afu_mf/n3000_afu.c | 2005
drivers/raw/afu_mf/n3000_afu.h | 333 ++
drivers/raw/afu_mf/rte_pmd_afu.h | 97 ++
6 files changed, 2460 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/afu_mf/n3000_afu.c
create mode 100644 drivers/raw/afu_mf/n3000_afu.h
create mode 100644 drivers/raw/afu_mf/rte_pmd_afu.h
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
index 5be372a..7c18f3b 100644
--- a/drivers/raw/afu_mf/afu_mf_rawdev.c
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -17,15 +17,19 @@
#include
#include
+#include "rte_pmd_afu.h"
#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
static const struct rte_afu_uuid afu_uuid_map[] = {
+ { N3000_AFU_UUID_L, N3000_AFU_UUID_H },
{ 0, 0 /* sentinel */ }
};
static struct afu_mf_drv *afu_table[] = {
+ &n3000_afu_drv,
NULL
};
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.h
b/drivers/raw/afu_mf/afu_mf_rawdev.h
index df6715c..5a66f6c 100644
--- a/drivers/raw/afu_mf/afu_mf_rawdev.h
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.h
@@ -30,6 +30,24 @@
#define AFU_MF_PMD_WARN(fmt, args...) \
AFU_MF_PMD_LOG(WARNING, fmt, ## args)
+#define CLS_TO_SIZE(n) ((n) << 6) /* get size of n cache lines */
+#define SIZE_TO_CLS(s) ((s) >> 6) /* convert size to number of cache lines */
+#define MHZ(f) ((f) * 100)
+
+#define dsm_poll_timeout(addr, val, cond, invl, timeout) \
+({ \
+ uint64_t __wait = 0; \
+ uint64_t __invl = (invl);\
+ uint64_t __timeout = (timeout); \
+ for (; __wait <= __timeout; __wait += __invl) { \
+ (val) = *(addr); \
+ if (cond)\
+ break; \
+ rte_delay_ms(__invl);\
+ }\
+ (cond) ? 0 : 1; \
+})
+
struct afu_mf_rawdev;
struct afu_mf_ops {
diff --git a/drivers/raw/afu_mf/meson.build b/drivers/raw/afu_mf/meson.build
index 80526a2..8a989e3 100644
--- a/drivers/raw/afu_mf/meson.build
+++ b/drivers/raw/afu_mf/meson.build
@@ -2,4 +2,6 @@
# Copyright 2022 Intel Corporation
deps += ['rawdev', 'bus_pci', 'bus_ifpga']
-sources = files('afu_mf_rawdev.c')
+sources = files('afu_mf_rawdev.c', 'n3000_afu.c')
+
+headers = files('rte_pmd_afu.h')
diff --git a/drivers/raw/afu_mf/n3000_afu.c b/drivers/raw/afu_mf/n3000_afu.c
new file mode 100644
index 000..19d7c54
--- /dev/null
+++ b/drivers/raw/afu_mf/n3000_afu.c
@@ -0,0 +1,2005 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_mf_rawdev.h"
+#include "n3000_afu.h"
+
+static int nlb_afu_config(struct afu_mf_rawdev *dev)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cfg = NULL;
+ struct nlb_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ if (!dev->priv)
+ return -ENOENT;
+
+ priv = (struct n3000_afu_priv *)dev->priv;
+ cfg = &priv->nlb_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ if (cfg->cache_policy == NLB_WRPUSH_I)
+ v.wrpush_i = 1;
+ else
+ v.wrthru_en = cfg->cache_policy;
+
+ if (cfg->cache_hint == NLB_RDLINE_MIXED)
+ v.rdsel = 3;
+ else
+ v.rdsel = cfg->cache_hint;
+
+ v.mode = cfg->mode;
+ v.chsel = cfg->read_vc;
+ v.wr_chsel = cfg->write_vc;
+ v.wrfence_chsel = cfg->wrfence_vc;
+ v.wrthru_en = cfg->cache_policy;
+ v.multicl_len = cfg->multi_cl - 1;
+
+ AFU_MF_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->nlb_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void nlb_afu_report(struct afu_mf_rawdev *dev, uint32_t cl)
+{
+ struct n3000_afu_priv *priv = NULL;
+ struct rte_pmd_afu_nlb_cfg *cf
[PATCH v5 3/5] raw/afu_mf: add HE-LBK AFU driver
HE-LBK and HE-MEM-LBK are host exerciser modules in OFS FPGA,
HE-LBK is used to test PCI bus and HE-MEM-LBK is used to test
local memory.
This driver initialize the modules and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 5 +
drivers/raw/afu_mf/he_lbk.c| 427 +
drivers/raw/afu_mf/he_lbk.h| 121 +++
drivers/raw/afu_mf/meson.build | 2 +-
drivers/raw/afu_mf/rte_pmd_afu.h | 14 ++
5 files changed, 568 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/afu_mf/he_lbk.c
create mode 100644 drivers/raw/afu_mf/he_lbk.h
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
index 7c18f3b..e91eb21 100644
--- a/drivers/raw/afu_mf/afu_mf_rawdev.c
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -20,16 +20,21 @@
#include "rte_pmd_afu.h"
#include "afu_mf_rawdev.h"
#include "n3000_afu.h"
+#include "he_lbk.h"
#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
static const struct rte_afu_uuid afu_uuid_map[] = {
{ N3000_AFU_UUID_L, N3000_AFU_UUID_H },
+ { HE_LBK_UUID_L, HE_LBK_UUID_H },
+ { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
{ 0, 0 /* sentinel */ }
};
static struct afu_mf_drv *afu_table[] = {
&n3000_afu_drv,
+ &he_lbk_drv,
+ &he_mem_lbk_drv,
NULL
};
diff --git a/drivers/raw/afu_mf/he_lbk.c b/drivers/raw/afu_mf/he_lbk.c
new file mode 100644
index 000..8735647
--- /dev/null
+++ b/drivers/raw/afu_mf/he_lbk.c
@@ -0,0 +1,427 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_mf_rawdev.h"
+#include "he_lbk.h"
+
+static int he_lbk_afu_config(struct afu_mf_rawdev *dev)
+{
+ struct he_lbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lbk_cfg *cfg = NULL;
+ struct he_lbk_csr_cfg v;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_lbk_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_lbk_cfg;
+
+ v.csr = 0;
+
+ if (cfg->cont)
+ v.cont = 1;
+
+ v.mode = cfg->mode;
+ v.trput_interleave = cfg->trput_interleave;
+ if (cfg->multi_cl == 4)
+ v.multicl_len = 2;
+ else
+ v.multicl_len = cfg->multi_cl - 1;
+
+ AFU_MF_PMD_DEBUG("cfg: 0x%08x", v.csr);
+ rte_write32(v.csr, priv->he_lbk_ctx.addr + CSR_CFG);
+
+ return 0;
+}
+
+static void he_lbk_report(struct afu_mf_rawdev *dev, uint32_t cl)
+{
+ struct he_lbk_priv *priv = NULL;
+ struct rte_pmd_afu_he_lbk_cfg *cfg = NULL;
+ struct he_lbk_ctx *ctx = NULL;
+ struct he_lbk_dsm_status *stat = NULL;
+ struct he_lbk_status0 stat0;
+ struct he_lbk_status1 stat1;
+ uint64_t swtest_msg = 0;
+ uint64_t ticks = 0;
+ uint64_t info = 0;
+ double num, rd_bw, wr_bw;
+
+ if (!dev || !dev->priv)
+ return;
+
+ priv = (struct he_lbk_priv *)dev->priv;
+ cfg = &priv->he_lbk_cfg;
+ ctx = &priv->he_lbk_ctx;
+
+ stat = ctx->status_ptr;
+
+ swtest_msg = rte_read64(ctx->addr + CSR_SWTEST_MSG);
+ stat0.csr = rte_read64(ctx->addr + CSR_STATUS0);
+ stat1.csr = rte_read64(ctx->addr + CSR_STATUS1);
+
+ if (cfg->cont)
+ ticks = stat->num_clocks - stat->start_overhead;
+ else
+ ticks = stat->num_clocks -
+ (stat->start_overhead + stat->end_overhead);
+
+ if (cfg->freq_mhz == 0) {
+ info = rte_read64(ctx->addr + CSR_HE_INFO0);
+ AFU_MF_PMD_INFO("API version: %"PRIx64, info >> 16);
+ cfg->freq_mhz = info & 0x;
+ if (cfg->freq_mhz == 0) {
+ AFU_MF_PMD_INFO("Frequency of AFU clock is unknown."
+ " Assuming 350 MHz.");
+ cfg->freq_mhz = 350;
+ }
+ }
+
+ num = (double)stat0.num_reads;
+ rd_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+ num = (double)stat0.num_writes;
+ wr_bw = (num * CLS_TO_SIZE(1) * MHZ(cfg->freq_mhz)) / ticks;
+
+ printf("Cachelines Read_Count Write_Count Pend_Read Pend_Write "
+ "Clocks@%uMHz Rd_Bandwidth Wr_Bandwidth\n",
+ cfg->freq_mhz);
+ printf("%10u %10u %10u %10u %10u %12"PRIu64
+ " %7.3f GB/s %7.3f GB/s\n",
+ cl, stat0.num_read
[PATCH v5 4/5] raw/afu_mf: add HE-MEM AFU driver
HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 3 +
drivers/raw/afu_mf/he_mem.c| 181 +
drivers/raw/afu_mf/he_mem.h| 40
drivers/raw/afu_mf/meson.build | 2 +-
drivers/raw/afu_mf/rte_pmd_afu.h | 7 ++
5 files changed, 232 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/afu_mf/he_mem.c
create mode 100644 drivers/raw/afu_mf/he_mem.h
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
index e91eb21..a56f60e 100644
--- a/drivers/raw/afu_mf/afu_mf_rawdev.c
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -21,6 +21,7 @@
#include "afu_mf_rawdev.h"
#include "n3000_afu.h"
#include "he_lbk.h"
+#include "he_mem.h"
#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
@@ -28,6 +29,7 @@
{ N3000_AFU_UUID_L, N3000_AFU_UUID_H },
{ HE_LBK_UUID_L, HE_LBK_UUID_H },
{ HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
+ { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
{ 0, 0 /* sentinel */ }
};
@@ -35,6 +37,7 @@
&n3000_afu_drv,
&he_lbk_drv,
&he_mem_lbk_drv,
+ &he_mem_tg_drv,
NULL
};
diff --git a/drivers/raw/afu_mf/he_mem.c b/drivers/raw/afu_mf/he_mem.c
new file mode 100644
index 000..ccbb3a8
--- /dev/null
+++ b/drivers/raw/afu_mf/he_mem.c
@@ -0,0 +1,181 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_mf_rawdev.h"
+#include "he_mem.h"
+
+static int he_mem_tg_test(struct afu_mf_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct rte_pmd_afu_he_mem_tg_cfg *cfg = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+ uint64_t value = 0x12345678;
+ uint64_t cap = 0;
+ uint64_t channel_mask = 0;
+ int i, t = 0;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv)
+ return -ENOENT;
+
+ cfg = &priv->he_mem_tg_cfg;
+ ctx = &priv->he_mem_tg_ctx;
+
+ AFU_MF_PMD_DEBUG("Channel mask: 0x%x", cfg->channel_mask);
+
+ rte_write64(value, ctx->addr + MEM_TG_SCRATCHPAD);
+ cap = rte_read64(ctx->addr + MEM_TG_SCRATCHPAD);
+ AFU_MF_PMD_DEBUG("Scratchpad value: 0x%"PRIx64, cap);
+ if (cap != value) {
+ AFU_MF_PMD_ERR("Test scratchpad register failed");
+ return -EIO;
+ }
+
+ cap = rte_read64(ctx->addr + MEM_TG_CTRL);
+ AFU_MF_PMD_DEBUG("Capability: 0x%"PRIx64, cap);
+
+ channel_mask = cfg->channel_mask & cap;
+ /* start traffic generators */
+ rte_write64(channel_mask, ctx->addr + MEM_TG_CTRL);
+
+ /* check test status */
+ while (t < MEM_TG_TIMEOUT_MS) {
+ value = rte_read64(ctx->addr + MEM_TG_STAT);
+ for (i = 0; i < NUM_MEM_TG_CHANNELS; i++) {
+ if (channel_mask & (1 << i)) {
+ if (TGACTIVE(value, i))
+ continue;
+ printf("TG channel %d test %s\n", i,
+ TGPASS(value, i) ? "pass" :
+ TGTIMEOUT(value, i) ? "timeout" :
+ TGFAIL(value, i) ? "fail" : "error");
+ channel_mask &= ~(1 << i);
+ }
+ }
+ if (!channel_mask)
+ break;
+ rte_delay_ms(MEM_TG_POLL_INTERVAL_MS);
+ t += MEM_TG_POLL_INTERVAL_MS;
+ }
+
+ if (channel_mask) {
+ AFU_MF_PMD_ERR("Timeout 0x%04lx", (unsigned long)value);
+ return channel_mask;
+ }
+
+ return 0;
+}
+
+static int he_mem_tg_init(struct afu_mf_rawdev *dev)
+{
+ struct he_mem_tg_priv *priv = NULL;
+ struct he_mem_tg_ctx *ctx = NULL;
+
+ if (!dev)
+ return -EINVAL;
+
+ priv = (struct he_mem_tg_priv *)dev->priv;
+ if (!priv) {
+ priv = rte_zmalloc(NULL, sizeof(struct he_mem_tg_priv), 0);
+ if (!priv)
+ return -ENOMEM;
+ dev->priv = priv;
+ }
+
+ ctx = &priv->he_mem_tg_ctx;
+ ctx->addr = (uint8_t *)dev->addr;
+
+ return 0;
+}
+
+static int
[PATCH v5 5/5] raw/afu_mf: add HE-HSSI AFU driver
HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.
Signed-off-by: Wei Huang
---
drivers/raw/afu_mf/afu_mf_rawdev.c | 3 +
drivers/raw/afu_mf/he_hssi.c | 369 +
drivers/raw/afu_mf/he_hssi.h | 102 ++
drivers/raw/afu_mf/meson.build | 3 +-
drivers/raw/afu_mf/rte_pmd_afu.h | 16 ++
5 files changed, 492 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/afu_mf/he_hssi.c
create mode 100644 drivers/raw/afu_mf/he_hssi.h
diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c
b/drivers/raw/afu_mf/afu_mf_rawdev.c
index a56f60e..f24c748 100644
--- a/drivers/raw/afu_mf/afu_mf_rawdev.c
+++ b/drivers/raw/afu_mf/afu_mf_rawdev.c
@@ -22,6 +22,7 @@
#include "n3000_afu.h"
#include "he_lbk.h"
#include "he_mem.h"
+#include "he_hssi.h"
#define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf
@@ -30,6 +31,7 @@
{ HE_LBK_UUID_L, HE_LBK_UUID_H },
{ HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H },
{ HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H },
+ { HE_HSSI_UUID_L, HE_HSSI_UUID_H },
{ 0, 0 /* sentinel */ }
};
@@ -38,6 +40,7 @@
&he_lbk_drv,
&he_mem_lbk_drv,
&he_mem_tg_drv,
+ &he_hssi_drv,
NULL
};
diff --git a/drivers/raw/afu_mf/he_hssi.c b/drivers/raw/afu_mf/he_hssi.c
new file mode 100644
index 000..bedafbd
--- /dev/null
+++ b/drivers/raw/afu_mf/he_hssi.c
@@ -0,0 +1,369 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "afu_mf_rawdev.h"
+#include "he_hssi.h"
+
+static int he_hssi_indirect_write(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ AFU_MF_PMD_DEBUG("Indirect write 0x%x, value 0x%08x", addr, value);
+
+ if (!ctx)
+ return -EINVAL;
+
+ data.write_data = value;
+ rte_write64(data.csr, ctx->addr + TRAFFIC_CTRL_DATA);
+
+ cmd.csr = 0;
+ cmd.write_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int he_hssi_indirect_read(struct he_hssi_ctx *ctx, uint32_t addr,
+ uint32_t *value)
+{
+ struct traffic_ctrl_cmd cmd;
+ struct traffic_ctrl_data data;
+ uint32_t i = 0;
+
+ if (!ctx)
+ return -EINVAL;
+
+ cmd.csr = 0;
+ cmd.read_cmd = 1;
+ cmd.afu_cmd_addr = addr;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+
+ while (i < MAILBOX_TIMEOUT_MS) {
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (cmd.ack_trans) {
+ data.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_DATA);
+ *value = data.read_data;
+ break;
+ }
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ i = 0;
+ cmd.csr = 0;
+ while (i < MAILBOX_TIMEOUT_MS) {
+ cmd.ack_trans = 1;
+ rte_write64(cmd.csr, ctx->addr + TRAFFIC_CTRL_CMD);
+ rte_delay_ms(MAILBOX_POLL_INTERVAL_MS);
+ cmd.csr = rte_read64(ctx->addr + TRAFFIC_CTRL_CMD);
+ if (!cmd.ack_trans)
+ break;
+ i += MAILBOX_POLL_INTERVAL_MS;
+ }
+ if (i >= MAILBOX_TIMEOUT_MS)
+ return -ETIMEDOUT;
+
+ AFU_MF_PMD_DEBUG("Indirect read 0x%x, value 0x%08x", addr, *value);
+ return
[PATCH v4 0/5] Support OFS card
Changes from v3: 1. replace constant with PCI_PRI_STR_SIZE per Rosen's comment. 2. update commit log with more explanations about the function call. 3. fix typo and coding style issue. 4. update ifpga documentation per Tianfei's comment. Wei Huang (5): raw/ifpga: remove experimental tag from ifpga APIs raw/ifpga: remove vdev when ifpga is closed raw/ifpga: unregister interrupt in ifpga close function raw/ifpga: support ofs card probe guides/rawdevs: add description of ofs in ifpga doc doc/guides/rawdevs/ifpga.rst | 105 - drivers/raw/ifpga/base/ifpga_api.c | 28 +- drivers/raw/ifpga/base/ifpga_defines.h | 1 + drivers/raw/ifpga/base/ifpga_enumerate.c | 680 ++--- drivers/raw/ifpga/base/ifpga_enumerate.h | 2 + drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +- drivers/raw/ifpga/base/ifpga_hw.h | 2 + drivers/raw/ifpga/base/opae_hw_api.c | 2 +- drivers/raw/ifpga/base/opae_hw_api.h | 2 + drivers/raw/ifpga/ifpga_rawdev.c | 241 ++ drivers/raw/ifpga/ifpga_rawdev.h | 8 + drivers/raw/ifpga/rte_pmd_ifpga.h | 48 -- drivers/raw/ifpga/version.map | 7 +- 13 files changed, 845 insertions(+), 299 deletions(-) -- 1.8.3.1
[PATCH v4 1/5] raw/ifpga: remove experimental tag from ifpga APIs
These APIs are introduced in DPDK 21.05 and have been tested in several release, experimental tag can be formally removed. Signed-off-by: Wei Huang Acked-by: Tianfei Zhang Reviewed-by: Rosen Xu --- drivers/raw/ifpga/rte_pmd_ifpga.h | 48 --- drivers/raw/ifpga/version.map | 7 ++ 2 files changed, 2 insertions(+), 53 deletions(-) diff --git a/drivers/raw/ifpga/rte_pmd_ifpga.h b/drivers/raw/ifpga/rte_pmd_ifpga.h index 47d66ba..3fa5d34 100644 --- a/drivers/raw/ifpga/rte_pmd_ifpga.h +++ b/drivers/raw/ifpga/rte_pmd_ifpga.h @@ -68,9 +68,6 @@ } rte_pmd_ifpga_phy_info; /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get raw device ID from PCI address string like 'Domain:Bus:Dev.Func' * * @param pci_addr @@ -82,14 +79,10 @@ * - (-EINVAL) if bad parameter. * - (-ENODEV) if FPGA is not probed by ifpga driver. */ -__rte_experimental int rte_pmd_ifpga_get_dev_id(const char *pci_addr, uint16_t *dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get current RSU status of the specified Intel FPGA device * * @param dev_id @@ -103,14 +96,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_get_rsu_status(uint16_t dev_id, uint32_t *stat, uint32_t *prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Set current RSU status of the specified Intel FPGA device * * @param dev_id @@ -124,14 +113,10 @@ * - (-ENODEV) if dev_id is invalid. * - (-ENOMEM) if share data is not initialized. */ -__rte_experimental int rte_pmd_ifpga_set_rsu_status(uint16_t dev_id, uint32_t stat, uint32_t prog); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get FPGA property of specified Intel FPGA device * * @param dev_id @@ -144,14 +129,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_property(uint16_t dev_id, rte_pmd_ifpga_prop *prop); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PHY information of specified Intel FPGA device * * @param dev_id @@ -164,14 +145,10 @@ * - (-EBUSY) if FPGA is rebooting. * - (-EIO) if failed to access hardware. */ -__rte_experimental int rte_pmd_ifpga_get_phy_info(uint16_t dev_id, rte_pmd_ifpga_phy_info *info); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Update image flash of specified Intel FPGA device * * @param dev_id @@ -187,15 +164,11 @@ * - (-EBUSY) if FPGA is updating or rebooting. * - (-EIO) if failed to open image file. */ -__rte_experimental int rte_pmd_ifpga_update_flash(uint16_t dev_id, const char *image, uint64_t *status); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Stop flash update of specified Intel FPGA device * * @param dev_id @@ -208,14 +181,10 @@ * - (-EINVAL) if bad parameter. * - (-EAGAIN) if failed with force. */ -__rte_experimental int rte_pmd_ifpga_stop_update(uint16_t dev_id, int force); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Check current Intel FPGA status and change it to reboot status if it is idle * * @param dev_id @@ -226,14 +195,10 @@ * - (-ENOMEM) if share data is not initialized. * - (-EBUSY) if FPGA is updating or rebooting. */ -__rte_experimental int rte_pmd_ifpga_reboot_try(uint16_t dev_id); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Trigger full reconfiguration of specified Intel FPGA device * * @param dev_id @@ -252,28 +217,20 @@ * - (-EINVAL) if bad parameter. * - (-EBUSY) if failed to access BMC register. */ -__rte_experimental int rte_pmd_ifpga_reload(uint16_t dev_id, int type, int page); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Get PCI bus the Intel FPGA driver register to * * @return * - (valid pointer) if successful. * - (NULL) if the Intel FPGA driver is not registered to any PCI bus. */ -__rte_experimental const struct rte_pci_bus * rte_pmd_ifpga_get_pci_bus(void); /** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * * Perform PR (partial reconfiguration) on specified Intel FPGA device * * @param dev_id @@ -287,17 +244,12 @@ * - (-EINVAL) if bad parameter or operation failed. * - (-ENOMEM) if failed to allocate memory. */ -__rte_experimental int rte_pmd_ifpga_partial_reconfigure(uint16_t dev_id, int port, const
[PATCH v4 2/5] raw/ifpga: remove vdev when ifpga is closed
Virtual devices created on ifpga raw device will not be removed
when ifpga device has closed. To avoid resource leak problem,
this patch introduces an ifpga virtual device remove function,
virtual devices will be destroyed after the ifpga raw device closed.
Fixes: ef1e8ede3da5 ("raw/ifpga: add Intel FPGA bus rawdev driver")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
---
v2: update commit log with Tianfei's comment
---
v3: replace constant with PCI_PRI_STR_SIZE per Rosen's comment
---
drivers/raw/ifpga/ifpga_rawdev.c | 166 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 8 ++
2 files changed, 138 insertions(+), 36 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index 6d4117c..fe3fc43 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -134,6 +134,8 @@ struct ifpga_rawdev *
for (i = 0; i < IFPGA_MAX_IRQ; i++)
dev->intr_handle[i] = NULL;
dev->poll_enabled = 0;
+ for (i = 0; i < IFPGA_MAX_VDEV; i++)
+ dev->vdev_name[i] = NULL;
return dev;
}
@@ -736,10 +738,22 @@ static int set_surprise_link_check_aer(
static int
ifpga_rawdev_close(struct rte_rawdev *dev)
{
+ struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ char *vdev_name = NULL;
+ int i = 0;
if (dev) {
- ifpga_monitor_stop_func(ifpga_rawdev_get(dev));
+ ifpga_rdev = ifpga_rawdev_get(dev);
+ if (ifpga_rdev) {
+ for (i = 0; i < IFPGA_MAX_VDEV; i++) {
+ vdev_name = ifpga_rdev->vdev_name[i];
+ if (vdev_name)
+ rte_vdev_uninit(vdev_name);
+ }
+ ifpga_monitor_stop_func(ifpga_rdev);
+ ifpga_rdev->rawdev = NULL;
+ }
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
opae_adapter_destroy(adapter);
@@ -1638,8 +1652,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
return -EINVAL;
}
dev = ifpga_rawdev_get(rawdev);
- if (dev)
- dev->rawdev = NULL;
adapter = ifpga_rawdev_get_priv(rawdev);
if (!adapter)
@@ -1714,73 +1726,118 @@ static int ifpga_rawdev_get_string_arg(const char *key
__rte_unused,
return 0;
}
+
static int
-ifpga_cfg_probe(struct rte_vdev_device *dev)
+ifpga_vdev_parse_devargs(struct rte_devargs *devargs,
+ struct ifpga_vdev_args *args)
{
- struct rte_devargs *devargs;
- struct rte_kvargs *kvlist = NULL;
- struct rte_rawdev *rawdev = NULL;
- struct ifpga_rawdev *ifpga_dev;
- int port;
+ struct rte_kvargs *kvlist;
char *name = NULL;
- char dev_name[RTE_RAWDEV_NAME_MAX_LEN];
- int ret = -1;
+ int port = 0;
+ int ret = -EINVAL;
- devargs = dev->device.devargs;
+ if (!devargs || !args)
+ return ret;
kvlist = rte_kvargs_parse(devargs->args, valid_args);
if (!kvlist) {
- IFPGA_RAWDEV_PMD_LOG(ERR, "error when parsing param");
- goto end;
+ IFPGA_RAWDEV_PMD_ERR("error when parsing devargs");
+ return ret;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_NAME) == 1) {
if (rte_kvargs_process(kvlist, IFPGA_ARG_NAME,
- &ifpga_rawdev_get_string_arg,
- &name) < 0) {
+ &ifpga_rawdev_get_string_arg, &name) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
-IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
+ } else {
+ strlcpy(args->bdf, name, sizeof(args->bdf));
+ rte_free(name);
}
} else {
IFPGA_RAWDEV_PMD_ERR("arg %s is mandatory for ifpga bus",
- IFPGA_ARG_NAME);
+ IFPGA_ARG_NAME);
goto end;
}
if (rte_kvargs_count(kvlist, IFPGA_ARG_PORT) == 1) {
- if (rte_kvargs_process(kvlist,
- IFPGA_ARG_PORT,
- &rte_ifpga_get_integer32_arg,
- &port) < 0) {
+ if (rte_kvargs_process(kvlist, IFPGA_ARG_PORT,
+ &rte_ifpga_get_integer32_arg, &port) < 0) {
IFPGA_RAWDEV_PMD_ERR("error to parse %s",
IFPGA_ARG_PORT);
goto end;
+ } els
[PATCH v4 3/5] raw/ifpga: unregister interrupt in ifpga close function
There is an API rte_pmd_ifpga_cleanup provided by ifpga driver to
free the software resource used by ifpga card. The function call
of rte_pmd_ifpga_cleanup is list below.
rte_pmd_ifpga_cleanup()
ifpga_rawdev_cleanup()
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
The interrupts are unregistered in ifpga_rawdev_destroy instead of
ifpga_rawdev_close function, so rte_pmd_ifpga_cleanup cannot free
interrupt resource as expected.
To fix such issue, interrupt unregistration is moved from
ifpga_rawdev_destroy to ifpga_rawdev_close function. The change of
function call of ifpga_rawdev_destroy is as below.
ifpga_rawdev_destroy()
ifpga_unregister_msix_irq() // removed
rte_rawdev_pmd_release()
rte_rawdev_close()
ifpga_rawdev_close()
Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: sta...@dpdk.org
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: update commit log with Tianfei's comment
---
v3: update commit log with more explanations about the function call
---
drivers/raw/ifpga/ifpga_rawdev.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c
index fe3fc43..94df56c 100644
--- a/drivers/raw/ifpga/ifpga_rawdev.c
+++ b/drivers/raw/ifpga/ifpga_rawdev.c
@@ -78,6 +78,7 @@ static int set_surprise_link_check_aer(
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
int start, uint32_t cap);
static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
+static void fme_interrupt_handler(void *param);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
@@ -740,8 +741,9 @@ static int set_surprise_link_check_aer(
{
struct ifpga_rawdev *ifpga_rdev = NULL;
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
char *vdev_name = NULL;
- int i = 0;
+ int i, ret = 0;
if (dev) {
ifpga_rdev = ifpga_rawdev_get(dev);
@@ -756,12 +758,19 @@ static int set_surprise_link_check_aer(
}
adapter = ifpga_rawdev_get_priv(dev);
if (adapter) {
+ mgr = opae_adapter_get_mgr(adapter);
+ if (ifpga_rdev && mgr) {
+ if (ifpga_unregister_msix_irq(ifpga_rdev,
+ IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr) < 0)
+ ret = -EINVAL;
+ }
opae_adapter_destroy(adapter);
opae_adapter_data_free(adapter->data);
}
}
- return dev ? 0:1;
+ return ret;
}
static int
@@ -1629,9 +1638,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
int ret;
struct rte_rawdev *rawdev;
char name[RTE_RAWDEV_NAME_MAX_LEN];
- struct opae_adapter *adapter;
- struct opae_manager *mgr;
- struct ifpga_rawdev *dev;
if (!pci_dev) {
IFPGA_RAWDEV_PMD_ERR("Invalid pci_dev of the device!");
@@ -1651,19 +1657,6 @@ static int fme_clean_fme_error(struct opae_manager *mgr)
IFPGA_RAWDEV_PMD_ERR("Invalid device name (%s)", name);
return -EINVAL;
}
- dev = ifpga_rawdev_get(rawdev);
-
- adapter = ifpga_rawdev_get_priv(rawdev);
- if (!adapter)
- return -ENODEV;
-
- mgr = opae_adapter_get_mgr(adapter);
- if (!mgr)
- return -ENODEV;
-
- if (ifpga_unregister_msix_irq(dev, IFPGA_FME_IRQ, 0,
- fme_interrupt_handler, mgr) < 0)
- return -EINVAL;
/* rte_rawdev_close is called by pmd_release */
ret = rte_rawdev_pmd_release(rawdev);
--
1.8.3.1
[PATCH v4 4/5] raw/ifpga: support ofs card probe
PAC N6000 is the first OFS platform, its device id is added to ifpga
device support list.
Previous FPGA platform like Intel PAC N3000 and N5000, FME DFL (Device
Feature List) starts from BAR0 by default, port DFL location is indicated
in PORTn_OFFSET register in FME. In OFS implementation, FME DFL and port
DFL location can be defined individually in PCIe VSEC (Vendor Specific
Extended Capabilities). In this patch, DFL definition is searched in VSEC,
the legacy DFL is used only when DFL VSEC is not present.
In original DFL enumeration process, AFU is expected to locate in port DFL,
but this is not the case in OFS implementation. In this patch, enumeration
can search AFU in any PF/VF which has no FME and port.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
---
v2: fix build error in UB2004-32
---
v3: update commit log with Tianfei's comment, treat 7 as special BAR index
---
v4: fix typo and coding style issue
---
drivers/raw/ifpga/base/ifpga_api.c | 28 +-
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_enumerate.c | 680 ++---
drivers/raw/ifpga/base/ifpga_enumerate.h | 2 +
drivers/raw/ifpga/base/ifpga_feature_dev.c | 18 +-
drivers/raw/ifpga/base/ifpga_hw.h | 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 2 +-
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/ifpga_rawdev.c | 48 +-
9 files changed, 591 insertions(+), 192 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 4610ef1..f19cc26 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -13,15 +13,22 @@
static int ifpga_acc_get_uuid(struct opae_accelerator *acc,
struct uuid *uuid)
{
- struct opae_bridge *br = acc->br;
- struct ifpga_port_hw *port;
+ struct ifpga_afu_info *afu_info = acc->data;
+ struct opae_reg_region *region;
+ u64 val = 0;
- if (!br || !br->data)
- return -EINVAL;
+ if (!afu_info)
+ return -ENODEV;
- port = br->data;
+ region = &afu_info->region[0];
+ if (uuid) {
+ val = readq(region->addr + sizeof(struct feature_header));
+ opae_memcpy(uuid->b, &val, sizeof(u64));
+ val = readq(region->addr + sizeof(struct feature_header) + 8);
+ opae_memcpy(uuid->b + 8, &val, sizeof(u64));
+ }
- return fpga_get_afu_uuid(port, uuid);
+ return 0;
}
static int ifpga_acc_set_irq(struct opae_accelerator *acc,
@@ -32,6 +39,9 @@ static int ifpga_acc_set_irq(struct opae_accelerator *acc,
struct ifpga_port_hw *port;
struct fpga_uafu_irq_set irq_set;
+ if (!afu_info)
+ return -ENODEV;
+
if (!br || !br->data)
return -EINVAL;
@@ -68,7 +78,7 @@ static int ifpga_acc_get_region_info(struct opae_accelerator
*acc,
struct ifpga_afu_info *afu_info = acc->data;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (info->index >= afu_info->num_regions)
return -EINVAL;
@@ -89,7 +99,7 @@ static int ifpga_acc_read(struct opae_accelerator *acc,
unsigned int region_idx,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
@@ -129,7 +139,7 @@ static int ifpga_acc_write(struct opae_accelerator *acc,
struct opae_reg_region *region;
if (!afu_info)
- return -EINVAL;
+ return -ENODEV;
if (offset + byte <= offset)
return -EINVAL;
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 8f62033..9a280eb 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -73,6 +73,7 @@
enum fpga_id_type {
FME_ID,
PORT_ID,
+ AFU_ID,
FPGA_ID_MAX,
};
diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 48b8af4..7a5d264 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -2,6 +2,10 @@
* Copyright(c) 2010-2018 Intel Corporation
*/
+#include
+#include
+#include
+
#include "opae_hw_api.h"
#include "ifpga_api.h"
@@ -9,6 +13,19 @@
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+struct dfl_fpga_enum_dfl {
+ u64 start;
+ u64 len;
+ void *addr;
+ TAILQ_ENTRY(dfl_fpga_enum_dfl) node;
+};
+
+TAILQ_HEAD(dfl_fpga_enum_dfls, dfl_fpga_enum_dfl);
+struct dfl_fpga_enum_info {
+ struct ifpga_hw *hw;
+ struct dfl_fpga_enum_dfls dfls;
+};
+
st
[PATCH v4 5/5] guides/rawdevs: add description of ofs in ifpga doc
OFS (Open FPGA Stack) specification is introduced briefly. Signed-off-by: Wei Huang Reviewed-by: Rosen Xu --- v2: update description per Tianfei's comment --- doc/guides/rawdevs/ifpga.rst | 105 ++- 1 file changed, 104 insertions(+), 1 deletion(-) diff --git a/doc/guides/rawdevs/ifpga.rst b/doc/guides/rawdevs/ifpga.rst index dbd0d6e..3dce57a 100644 --- a/doc/guides/rawdevs/ifpga.rst +++ b/doc/guides/rawdevs/ifpga.rst @@ -1,5 +1,5 @@ .. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2018 Intel Corporation. +Copyright(c) 2018-2022 Intel Corporation. IFPGA Rawdev Driver == @@ -100,3 +100,106 @@ The following device parameters are supported: If null, the AFU Bit Stream has been PR in FPGA, if not forces PR and identifies AFU Bit Stream file. + + +Open FPGA Stack += + +Open FPGA Stack (OFS) is a collection of RTL and open source software providing +interfaces to access the instantiated RTL easily in an FPGA. OFS leverages the +DFL for the implementation of the FPGA RTL design. + +OFS designs allow for the arrangement of software interfaces across multiple +PCIe endpoints. Some of these interfaces may be PFs defined in the static region +that connect to interfaces in an IP that is loaded via Partial Reconfiguration (PR). +And some of these interfaces may be VFs defined in the PR region that can be +reconfigured by the end-user. Furthermore, these PFs/VFs may use DFLs such that +features may be discovered and accessed in user space with the aid of a generic +kernel driver like vfio-pci. The diagram below depicts an example design with one +PF and two VFs. In this example, it will export the management functions via PF0 +and acceleration functions via VF0 and VF1, leverage VFIO to export the MMIO space +to an application.:: + + +-+ +-+ ++ + | FPGA Management | | DPDK App | | User App | + | App| | | || + +++ +--+--+ +-+--+ + | | | + +++ +--+--+| + |IFPGA PMD driver | |AFU MF driver|| + +++ +--+--+| + | | | + ++--+---+--+ + |VFIO-PCI | + ++--+---+--+ + | | | + +++ +--+--+ ++--+ + | PF0 | | PF0_VF0 | | PF0_VF1 | + +-+ +-+ +---+ + +As accelerators are specialized hardware, they are typically limited in the +number installed in a given system. Many use cases require them to be shared +across multiple software contexts or threads of software execution, either +through partitioning of individual dedicated resources, or virtualization of +shared resources. OFS provides several models to share the AFU resources via +PR mechanism and hardware-based virtualization schemes. + +1. Legacy model. + With legacy model FPGA cards like Intel PAC N3000 or N5000, there is + a notion that the boundary between the AFU and the shell is also the unit of + PR for those FPGA platforms. This model is only able to handle a + single context, because it only has one PR engine, and one PR region which + has an associated Port device. +2. Multiple VFs per PR slot. + In this model, available AFU resources may allow instantiation of many VFs + which have a dedicated PCIe function with their own dedicated MMIO space, or + partition a region of MMIO space on a single PCIe function. Intel PAC N6000 + card has implemented this model. + In this model, the AFU/PR slot was not connected to port device. For DFL's view, + the Next_AFU pointer in FIU feature header of port device points to NULL in this + model. On the other hand, each VF can start with an AFU feature header without + being connected to a FIU Port feature header. + +The VFs are created through the Linux kernel driver before we use them in DPDK. + +OFS provides the diversity for accessing the AFU resource to RTL developer. +An IP designer may choose to add more than one PF for interfacing with IP +on the FPGA and choose different model to access the AFU resource. + +There is one reference architecture design using the "Multiple VFs per PR slot" +model for OFS as illustrated below. In this reference design, it exports the +FPGA management functions via PF0. PF1 will bind with DPDK virtio driver +presenting itself as a network interface to the application. PF2 will bind to the +vfio-pci driver allowing the user space software to discover and interface +with the specific workload like diagnostic test. It leverages AFU PMD driver to +access the A
[dpdk-dev] [PATCH v11 0/4] raw/ifpga: add extra OPAE APIs
Cyborg is part of OpenStack, it needs some OPAE APIs to manage devices with Intel FPGA. The first three patches implement extra APIs to meet Cyborg requirement. The last patch add an example to show how to use these APIs. Main changes from v10: - remove call of rte_eal_init() and rte_eal_cleanup() - rename opae_init_eal() to opae_init() - rename opae_cleanup_eal() to opae_cleanup() Wei Huang (4): raw/ifpga: add fpga rsu function raw/ifpga: add fpga property get function raw/ifpga: add OPAE API for OpenStack Cyborg examples/ifpga: add example for opae ifpga API MAINTAINERS|1 + doc/guides/sample_app_ug/ifpga.rst | 435 + doc/guides/sample_app_ug/index.rst |1 + drivers/raw/ifpga/base/ifpga_api.c | 34 + drivers/raw/ifpga/base/ifpga_defines.h |1 + drivers/raw/ifpga/base/ifpga_feature_dev.c | 21 + drivers/raw/ifpga/base/ifpga_feature_dev.h |1 + drivers/raw/ifpga/base/ifpga_fme.c | 36 +- drivers/raw/ifpga/base/ifpga_fme_rsu.c | 435 + drivers/raw/ifpga/base/ifpga_hw.h |1 + drivers/raw/ifpga/base/ifpga_sec_mgr.c | 639 +++ drivers/raw/ifpga/base/ifpga_sec_mgr.h | 89 + drivers/raw/ifpga/base/meson.build |2 + drivers/raw/ifpga/base/opae_hw_api.c | 77 + drivers/raw/ifpga/base/opae_hw_api.h | 13 + drivers/raw/ifpga/base/opae_ifpga_hw_api.h |1 + drivers/raw/ifpga/base/opae_intel_max10.c | 48 + drivers/raw/ifpga/base/opae_intel_max10.h | 44 + drivers/raw/ifpga/ifpga_opae_api.c | 1793 drivers/raw/ifpga/ifpga_opae_api.h | 248 +++ drivers/raw/ifpga/ifpga_rawdev.c | 352 drivers/raw/ifpga/ifpga_rawdev.h | 50 +- drivers/raw/ifpga/meson.build |4 +- examples/ifpga/Makefile| 45 + examples/ifpga/commands.c | 1321 ++ examples/ifpga/commands.h | 16 + examples/ifpga/main.c | 41 + examples/ifpga/meson.build | 19 + 28 files changed, 5764 insertions(+), 4 deletions(-) create mode 100644 doc/guides/sample_app_ug/ifpga.rst create mode 100644 drivers/raw/ifpga/base/ifpga_fme_rsu.c create mode 100644 drivers/raw/ifpga/base/ifpga_sec_mgr.c create mode 100644 drivers/raw/ifpga/base/ifpga_sec_mgr.h create mode 100644 drivers/raw/ifpga/ifpga_opae_api.c create mode 100644 drivers/raw/ifpga/ifpga_opae_api.h create mode 100644 examples/ifpga/Makefile create mode 100644 examples/ifpga/commands.c create mode 100644 examples/ifpga/commands.h create mode 100644 examples/ifpga/main.c create mode 100644 examples/ifpga/meson.build -- 2.29.2
[dpdk-dev] [PATCH v11 1/4] raw/ifpga: add fpga rsu function
RSU (Remote System Update) depends on secure manager which may be
different on various implementations, so a new secure manager device
is implemented for adapting such difference.
There are three major functions added:
1. ifpga_rawdev_update_flash() updates flash with specific image file.
2. ifpga_rawdev_stop_flash_update() aborts flash update process.
3. ifpga_rawdev_reload() reloads FPGA from updated flash.
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
v2: fix coding style issue in ifpga_fme_rsu.c and ifpga_sec_mgr.c
---
v3: fix compilation issues in ifpga_fme_rsu.c
---
v4: fix compilation issues in opae_intel_max10.c
---
drivers/raw/ifpga/base/ifpga_api.c| 26 +
drivers/raw/ifpga/base/ifpga_fme.c| 8 +
drivers/raw/ifpga/base/ifpga_fme_rsu.c| 435 +++
drivers/raw/ifpga/base/ifpga_hw.h | 1 +
drivers/raw/ifpga/base/ifpga_sec_mgr.c| 639 ++
drivers/raw/ifpga/base/ifpga_sec_mgr.h| 89 +++
drivers/raw/ifpga/base/meson.build| 2 +
drivers/raw/ifpga/base/opae_hw_api.c | 59 ++
drivers/raw/ifpga/base/opae_hw_api.h | 11 +
drivers/raw/ifpga/base/opae_intel_max10.c | 48 ++
drivers/raw/ifpga/base/opae_intel_max10.h | 44 ++
drivers/raw/ifpga/ifpga_rawdev.c | 55 ++
drivers/raw/ifpga/ifpga_rawdev.h | 7 +-
13 files changed, 1423 insertions(+), 1 deletion(-)
create mode 100644 drivers/raw/ifpga/base/ifpga_fme_rsu.c
create mode 100644 drivers/raw/ifpga/base/ifpga_sec_mgr.c
create mode 100644 drivers/raw/ifpga/base/ifpga_sec_mgr.h
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 1ff57fa18..1aedf150b 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -5,6 +5,7 @@
#include "ifpga_api.h"
#include "ifpga_enumerate.h"
#include "ifpga_feature_dev.h"
+#include "ifpga_sec_mgr.h"
#include "opae_hw_api.h"
@@ -228,11 +229,36 @@ static int ifpga_mgr_get_board_info(struct opae_manager
*mgr,
return 0;
}
+static int ifpga_mgr_update_flash(struct opae_manager *mgr, const char *image,
+ u64 *status)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_update_flash(fme, image, status);
+}
+
+static int ifpga_mgr_stop_flash_update(struct opae_manager *mgr, int force)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_stop_flash_update(fme, force);
+}
+
+static int ifpga_mgr_reload(struct opae_manager *mgr, int type, int page)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_reload(fme, type, page);
+}
+
struct opae_manager_ops ifpga_mgr_ops = {
.flash = ifpga_mgr_flash,
.get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
.get_sensor_value = ifpga_mgr_get_sensor_value,
.get_board_info = ifpga_mgr_get_board_info,
+ .update_flash = ifpga_mgr_update_flash,
+ .stop_flash_update = ifpga_mgr_stop_flash_update,
+ .reload = ifpga_mgr_reload,
};
static int ifpga_mgr_read_mac_rom(struct opae_manager *mgr, int offset,
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index f29ff3159..34fd9a818 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -7,6 +7,7 @@
#include "opae_intel_max10.h"
#include "opae_i2c.h"
#include "opae_at24_eeprom.h"
+#include "ifpga_sec_mgr.h"
#define PWR_THRESHOLD_MAX 0x7F
@@ -1152,6 +1153,12 @@ static int fme_nios_spi_init(struct ifpga_feature
*feature)
if (spi_self_checking(max10))
goto spi_fail;
+ ret = init_sec_mgr(fme);
+ if (ret) {
+ dev_err(fme, "security manager init fail\n");
+ goto spi_fail;
+ }
+
return ret;
spi_fail:
@@ -1165,6 +1172,7 @@ static void fme_nios_spi_uinit(struct ifpga_feature
*feature)
{
struct ifpga_fme_hw *fme = (struct ifpga_fme_hw *)feature->parent;
+ release_sec_mgr(fme);
if (fme->max10_dev)
intel_max10_device_remove(fme->max10_dev);
}
diff --git a/drivers/raw/ifpga/base/ifpga_fme_rsu.c
b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
new file mode 100644
index 0..fad1ac416
--- /dev/null
+++ b/drivers/raw/ifpga/base/ifpga_fme_rsu.c
@@ -0,0 +1,435 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2020 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include "ifpga_sec_mgr.h"
+
+static struct ifpga_sec_mgr *sec_mgr;
+
+static void set_rsu_control(struct ifpga_sec_mgr *smgr, uint32_t ctrl)
+{
+ if (smgr && smgr->rsu_control)
+ *smgr->rsu_control = ctrl;
+}
+
+static uint32_t get_rsu_control(struct ifpga_sec_mgr *smgr)
+{
+ if (smgr && smgr->rsu_control)
+ return *smgr->rsu_con
[dpdk-dev] [PATCH v11 2/4] raw/ifpga: add fpga property get function
There are three types of property can be got from FPGA, they are
implemented in below functions:
1. ifpga_rawdev_get_fme_property() get property of FME (FPGA
Management Engine).
2. ifpga_rawdev_get_port_property() get property of FPGA port.
3. ifpga_rawdev_get_bmc_property() get property of BMC (Board
Management Controller).
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
drivers/raw/ifpga/base/ifpga_api.c | 8 ++
drivers/raw/ifpga/base/ifpga_defines.h | 1 +
drivers/raw/ifpga/base/ifpga_feature_dev.c | 21 +++
drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
drivers/raw/ifpga/base/ifpga_fme.c | 28 +++-
drivers/raw/ifpga/base/opae_hw_api.c | 18 +++
drivers/raw/ifpga/base/opae_hw_api.h | 2 +
drivers/raw/ifpga/base/opae_ifpga_hw_api.h | 1 +
drivers/raw/ifpga/ifpga_rawdev.c | 157 +
drivers/raw/ifpga/ifpga_rawdev.h | 28
10 files changed, 263 insertions(+), 2 deletions(-)
diff --git a/drivers/raw/ifpga/base/ifpga_api.c
b/drivers/raw/ifpga/base/ifpga_api.c
index 1aedf150b..4610ef101 100644
--- a/drivers/raw/ifpga/base/ifpga_api.c
+++ b/drivers/raw/ifpga/base/ifpga_api.c
@@ -229,6 +229,13 @@ static int ifpga_mgr_get_board_info(struct opae_manager
*mgr,
return 0;
}
+static int ifpga_mgr_get_uuid(struct opae_manager *mgr, struct uuid *uuid)
+{
+ struct ifpga_fme_hw *fme = mgr->data;
+
+ return fpga_get_pr_uuid(fme, uuid);
+}
+
static int ifpga_mgr_update_flash(struct opae_manager *mgr, const char *image,
u64 *status)
{
@@ -256,6 +263,7 @@ struct opae_manager_ops ifpga_mgr_ops = {
.get_eth_group_region_info = ifpga_mgr_get_eth_group_region_info,
.get_sensor_value = ifpga_mgr_get_sensor_value,
.get_board_info = ifpga_mgr_get_board_info,
+ .get_uuid = ifpga_mgr_get_uuid,
.update_flash = ifpga_mgr_update_flash,
.stop_flash_update = ifpga_mgr_stop_flash_update,
.reload = ifpga_mgr_reload,
diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
b/drivers/raw/ifpga/base/ifpga_defines.h
index 9f0147d1e..dca1518a8 100644
--- a/drivers/raw/ifpga/base/ifpga_defines.h
+++ b/drivers/raw/ifpga/base/ifpga_defines.h
@@ -1727,6 +1727,7 @@ struct opae_board_info {
u8 seu;
u8 ptp;
+ u32 boot_page;
u32 max10_version;
u32 nios_fw_version;
u32 nums_of_retimer;
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.c
b/drivers/raw/ifpga/base/ifpga_feature_dev.c
index 0f852a75a..08135137a 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.c
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.c
@@ -87,6 +87,27 @@ int fpga_get_afu_uuid(struct ifpga_port_hw *port, struct
uuid *uuid)
return 0;
}
+int fpga_get_pr_uuid(struct ifpga_fme_hw *fme, struct uuid *uuid)
+{
+ struct feature_fme_pr *fme_pr;
+ u64 guidl, guidh;
+
+ if (!fme || !uuid)
+ return -EINVAL;
+
+ fme_pr = get_fme_feature_ioaddr_by_index(fme, FME_FEATURE_ID_PR_MGMT);
+
+ spinlock_lock(&fme->lock);
+ guidl = readq(&fme_pr->fme_pr_intfc_id_l);
+ guidh = readq(&fme_pr->fme_pr_intfc_id_h);
+ spinlock_unlock(&fme->lock);
+
+ opae_memcpy(uuid->b, &guidl, sizeof(u64));
+ opae_memcpy(uuid->b + 8, &guidh, sizeof(u64));
+
+ return 0;
+}
+
/* Mask / Unmask Port Errors by the Error Mask register. */
void port_err_mask(struct ifpga_port_hw *port, bool mask)
{
diff --git a/drivers/raw/ifpga/base/ifpga_feature_dev.h
b/drivers/raw/ifpga/base/ifpga_feature_dev.h
index 2b1309b44..b355d22b0 100644
--- a/drivers/raw/ifpga/base/ifpga_feature_dev.h
+++ b/drivers/raw/ifpga/base/ifpga_feature_dev.h
@@ -103,6 +103,7 @@ is_port_feature_present(struct ifpga_port_hw *port, int
index)
}
int fpga_get_afu_uuid(struct ifpga_port_hw *port, struct uuid *uuid);
+int fpga_get_pr_uuid(struct ifpga_fme_hw *fme, struct uuid *uuid);
int __fpga_port_disable(struct ifpga_port_hw *port);
void __fpga_port_enable(struct ifpga_port_hw *port);
diff --git a/drivers/raw/ifpga/base/ifpga_fme.c
b/drivers/raw/ifpga/base/ifpga_fme.c
index 34fd9a818..43c7b9c3d 100644
--- a/drivers/raw/ifpga/base/ifpga_fme.c
+++ b/drivers/raw/ifpga/base/ifpga_fme.c
@@ -101,6 +101,24 @@ static int fme_hdr_get_ports_num(struct ifpga_fme_hw *fme,
u64 *ports_num)
return 0;
}
+static int fme_hdr_get_port_type(struct ifpga_fme_hw *fme, u64 *port_type)
+{
+ struct feature_fme_header *fme_hdr
+ = get_fme_feature_ioaddr_by_index(fme, FME_FEATURE_ID_HEADER);
+ struct feature_fme_port pt;
+ u32 port = (u32)((*port_type >> 32) & 0x);
+
+ pt.csr = readq(&fme_hdr->port[port]);
+ if (!pt.port_implemented)
+ return -ENODEV;
+ if (pt.afu_access_control)
+ *port_type |= 0x1;
+ else
+ *port_type &= ~0x1;
+
+ return 0
[dpdk-dev] [PATCH v11 3/4] raw/ifpga: add OPAE API for OpenStack Cyborg
Cyborg is an OpenStack project that aims to provide a general purpose
management framework for acceleration resources (i.e. various types
of accelerators such as GPU, FPGA, NP, ODP, DPDK/SPDK and so on).
It needs some OPAE type APIs to manage PACs (Programmable Acceleration
Card) with Intel FPGA. Below major functions are added to meets
Cyborg requirements.
1. opae_init() set up OPAE environment.
2. opae_cleanup() clean up OPAE environment.
3. opae_enumerate() searches PAC with specific FPGA.
4. opae_get_property() gets properties of FPGA.
5. opae_partial_reconfigure() perform partial configuration on FPGA.
6. opae_get_image_info() gets information of image file.
7. opae_update_flash() updates FPGA flash with specific image file.
8. opae_cancel_flash_update() cancel process of FPGA flash update.
9. opae_probe_device() manually probe specific FPGA with ifpga driver.
10. opae_remove_device() manually remove specific FPGA from ifpga driver.
11. opae_bind_driver() binds specific FPGA with specified kernel driver.
12. opae_unbind_driver() unbinds specific FPGA from kernel driver.
13. opae_reboot_device() reboots specific FPGA (do reconfiguration).
Signed-off-by: Wei Huang
Acked-by: Tianfei Zhang
Acked-by: Rosen Xu
---
v2: fix typo in commit log and ifpga_opae_api.h
---
v3: fix coding style issue in ifpga_opae_api.c
---
v4: enclose macro PCI_EXT_CAP_ID in parentheses
---
v5: fix icc compiler build error
---
v6: fix compilation issues in ifpga_opae_api.c
---
v7: remove call of rte_eal_init() and rte_eal_cleanup()
---
drivers/raw/ifpga/ifpga_opae_api.c | 1793
drivers/raw/ifpga/ifpga_opae_api.h | 248
drivers/raw/ifpga/ifpga_rawdev.c | 152 ++-
drivers/raw/ifpga/ifpga_rawdev.h | 15 +
drivers/raw/ifpga/meson.build |4 +-
5 files changed, 2205 insertions(+), 7 deletions(-)
create mode 100644 drivers/raw/ifpga/ifpga_opae_api.c
create mode 100644 drivers/raw/ifpga/ifpga_opae_api.h
diff --git a/drivers/raw/ifpga/ifpga_opae_api.c
b/drivers/raw/ifpga/ifpga_opae_api.c
new file mode 100644
index 0..f4475abe3
--- /dev/null
+++ b/drivers/raw/ifpga/ifpga_opae_api.c
@@ -0,0 +1,1793 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2020 Intel Corporation
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "base/opae_hw_api.h"
+#include "base/ifpga_sec_mgr.h"
+#include "ifpga_rawdev.h"
+#include "ifpga_opae_api.h"
+
+
+int opae_log_level;
+FILE *opae_log_file;
+
+static opae_api_version api_ver = {21, 2, 0};
+static int eal_inited;
+static uint32_t dev_aer[2] = {0};
+
+static const char * const log_level_name[] = {"CRITICAL", "ERROR",
+ "WARNING", "INFORMATION", "DEBUG"};
+static const char * const proc_type_name[] = {"NON-DPDK", "PRIMARY",
+ "SECONDARY"};
+static const char * const platform_name[] = {"Vista Creek", "Rush Creek",
+ "Darby Creek", "Lightning Creek"};
+static const char * const release_name[] = {"Pre-Alpha", "Alpha", "Beta",
"PV"};
+static const char * const interface_type[] = {"8x10G", "4x25G", "2x1x25G",
+ "4x25G+2x25G", "2x2x25G", "2x1x25Gx2FVL", "1x2x25G"};
+static const char * const kdrv[] = {OPAE_KDRV_UNKNOWN, OPAE_KDRV_IGB_UIO,
+ OPAE_KDRV_VFIO_PCI, OPAE_KDRV_UIO_PCI};
+
+RTE_INIT(init_api_env)
+{
+ eal_inited = 0;
+ opae_log_level = OPAE_LOG_ERR;
+ opae_log_file = NULL;
+ ifpga_rawdev_logtype = 0;
+
+ opae_log_info("API environment is initialized\n");
+}
+
+RTE_FINI(clean_api_env)
+{
+ if (opae_log_file) {
+ fclose(opae_log_file);
+ opae_log_file = NULL;
+ }
+ opae_log_info("API environment is cleaned\n");
+}
+
+void opae_get_api_version(opae_api_version *version)
+{
+ if (version)
+ memcpy(version, &api_ver, sizeof(opae_api_version));
+ opae_log_info("API version is %u.%u.%u\n",
+ api_ver.major, api_ver.minor, api_ver.micro);
+}
+
+int opae_set_log_level(int level)
+{
+ if ((level >= OPAE_LOG_API) && (level <= OPAE_LOG_DEBUG))
+ opae_log_level = level;
+ opae_log_api("Current log level is %s\n",
+ log_level_name[opae_log_level]);
+ return opae_log_level;
+}
+
+int opae_set_log_file(char *path, int clean)
+{
+ FILE *f = NULL;
+ time_t start;
+ struct tm *lt = NULL;
+
+ if (path) {
+ if (clean)
+ f = fopen(path, "w+");
+ else
+ f = fopen(path, "a+");
+
+ if (f) {
+
