RE: [PATCH v5] net/i40e: fix error disable double VLAN
-Original Message-
From: Kevin Liu
Sent: Wednesday, June 29, 2022 11:40 PM
To: dev@dpdk.org
Cc: Xing, Beilei ; Zhang, Yuying
; Yang, SteveX ; Liu, KevinX
Subject: [PATCH v5] net/i40e: fix error disable double VLAN
Enable double VLAN by default after firmware v8.3 and disable double VLAN is
not allowed in subsequent operations.
Fixes: 4f13a78f1b8f ("net/i40e: add outer VLAN processing")
Signed-off-by: Kevin Liu
The performance of X710 drop about 45% when testing nic_single_core.
RE: [PATCH] net/i40e: restore disable double VLAN by default
> -Original Message-
> From: Kevin Liu
> Sent: Thursday, July 7, 2022 6:48 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Zhang, Yuying
> ; Yang, SteveX ; Liu, KevinX
>
> Subject: [PATCH] net/i40e: restore disable double VLAN by default
>
> Restore disable double VLAN by default.
>
> Fixes: ae97b8b89826 ("net/i40e: fix error disable double VLAN")
> Signed-off-by: Kevin Liu
> ---
Tested-by: Yingya Han
Best regards,
Yingya
RE: [PATCH v5 1/2] examples/l3fwd: add config file support for LPM/FIB
-Original Message- From: Sean Morrissey Sent: Saturday, February 5, 2022 3:59 AM Cc: dev@dpdk.org; Morrissey, Sean ; Ananyev, Konstantin Subject: [PATCH v5 1/2] examples/l3fwd: add config file support for LPM/FIB Add support to define ipv4 and ipv6 forwarding tables from reading from a config file for LPM and FIB, with format similar to l3fwd-acl one. Users can now use the default hardcoded route tables or optionally config files. Default config files have been provided for use with LPM and FIB. Signed-off-by: Sean Morrissey Acked-by: Konstantin Ananyev Tested-by: Yingya Han < yingyax@intel.com>
RE: [PATCH v3 1/1] app/testpmd: add valid check to verify multi mempool feature
There is a new issue after applying the patch.
Failed to configure buffer_split for a single queue and port can't up.
The test steps and logs are as follows:
./x86_64-native-linuxapp-gcc/app/dpdk-testpmd -l 5-9 -n 4 -a 31:00.0
--force-max-simd-bitwidth=64 -- -i --mbuf-size=2048,2048 --txq=4 --rxq=4
testpmd> port stop all
testpmd> port 0 rxq 2 rx_offload buffer_split on
testpmd> show port 0 rx_offload configuration
Rx Offloading Configuration of port 0 :
Port : RSS_HASH
Queue[ 0] : RSS_HASH
Queue[ 1] : RSS_HASH
Queue[ 2] : RSS_HASH BUFFER_SPLIT
Queue[ 3] : RSS_HASH
testpmd> set rxhdrs eth
testpmd> port start all
Configuring Port 0 (socket 0)
No Rx segmentation offload configured
Fail to configure port 0 rx queues
BRs,
Yingya
-Original Message-
From: Ferruh Yigit
Sent: Friday, November 18, 2022 7:37 AM
To: Hanumanth Pothula ; Singh, Aman Deep
; Zhang, Yuying ; Han,
YingyaX ; Jiang, YuX
Cc: dev@dpdk.org; andrew.rybche...@oktetlabs.ru; tho...@monjalon.net;
jer...@marvell.com; ndabilpu...@marvell.com
Subject: Re: [PATCH v3 1/1] app/testpmd: add valid check to verify multi
mempool feature
On 11/17/2022 4:03 PM, Hanumanth Pothula wrote:
> Validate ethdev parameter 'max_rx_mempools' to know whether device
> supports multi-mempool feature or not.
>
> Bugzilla ID: 1128
>
> Signed-off-by: Hanumanth Pothula
> v3:
> - Simplified conditional check.
> - Corrected spell, whether.
> v2:
> - Rebased on tip of next-net/main.
> ---
> app/test-pmd/testpmd.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index
> 4e25f77c6a..6c3d0948ec 100644
> --- a/app/test-pmd/testpmd.c
> +++ b/app/test-pmd/testpmd.c
> @@ -2655,16 +2655,22 @@ rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
> union rte_eth_rxseg rx_useg[MAX_SEGS_BUFFER_SPLIT] = {};
> struct rte_mempool *rx_mempool[MAX_MEMPOOL] = {};
> struct rte_mempool *mpx;
> + struct rte_eth_dev_info dev_info;
> unsigned int i, mp_n;
> uint32_t prev_hdrs = 0;
> int ret;
>
> + ret = rte_eth_dev_info_get(port_id, &dev_info);
> + if (ret != 0)
> + return ret;
> +
> /* Verify Rx queue configuration is single pool and segment or
>* multiple pool/segment.
> + * @see rte_eth_dev_info::max_rx_mempools
>* @see rte_eth_rxconf::rx_mempools
>* @see rte_eth_rxconf::rx_seg
>*/
> - if (!(mbuf_data_size_n > 1) && !(rx_pkt_nb_segs > 1 ||
> + if ((dev_info.max_rx_mempools == 0) && !(rx_pkt_nb_segs > 1 ||
> ((rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) != 0))) {
> /* Single pool/segment configuration */
> rx_conf->rx_seg = NULL;
Hi Yingya, Yu,
Can you please verify this patch?
Thanks,
ferruh
RE: [PATCH v7 1/1] app/testpmd: add valid check to verify multi mempool feature
> -Original Message-
> From: Hanumanth Pothula
> Sent: Tuesday, November 22, 2022 2:08 AM
> To: Singh, Aman Deep ; Zhang, Yuying
>
> Cc: dev@dpdk.org; andrew.rybche...@oktetlabs.ru;
> tho...@monjalon.net; Jiang, YuX ;
> jer...@marvell.com; ndabilpu...@marvell.com; hpoth...@marvell.com
> Subject: [PATCH v7 1/1] app/testpmd: add valid check to verify multi
> mempool feature
>
> Validate ethdev parameter 'max_rx_mempools' to know whether device
> supports multi-mempool feature or not.
>
> Also, add new testpmd command line argument, multi-mempool, to control
> multi-mempool feature. By default its disabled.
>
> Bugzilla ID: 1128
> Fixes: 4f04edcda769 ("app/testpmd: support multiple mbuf pools per Rx
> queue")
>
> Signed-off-by: Hanumanth Pothula
Tested-by: Yingya Han
RE: [PATCH v3 1/2] examples/l3fwd: use single set of variables throughout the code
-Original Message- From: Honnappa Nagarahalli Sent: Wednesday, February 23, 2022 2:10 PM To: dev@dpdk.org; honnappa.nagaraha...@arm.com; Tu, Lijuan ; juraj.lin...@pantheon.tech; ohily...@iol.unh.edu; david.march...@redhat.com; tho...@monjalon.net; jer...@marvell.com; Richardson, Bruce ; step...@networkplumber.org; bl...@debian.org; ktray...@redhat.com; christian.ehrha...@canonical.com; xuemi...@nvidia.com Cc: kathleen.cape...@arm.com; n...@arm.com; Ruifeng Wang Subject: [PATCH v3 1/2] examples/l3fwd: use single set of variables throughout the code nb_rxd and nb_txd are used in polling mode and event mode of operation. nb_rxd and nb_txd are already global in polling mode but are not visible to event mode code. Make them visible to all parts of the application. Signed-off-by: Honnappa Nagarahalli Reviewed-by: Kathleen Capella Reviewed-by: Ruifeng Wang Acked-by: Bruce Richardson Tested-by: Yingya Han < yingyax@intel.com>
Re: [dpdk-dev] [dpdk-stable] [PATCH v3] examples/vmdq: fix the output of pools/queues
Tested-by: Han,YingyaX
BRs,
Yingya
-Original Message-
From: stable On Behalf Of Li, Xiaoyun
Sent: Monday, March 2, 2020 3:19 PM
To: Jiang, JunyuX ; dev@dpdk.org
Cc: Yang, Qiming ; sta...@dpdk.org
Subject: Re: [dpdk-stable] [PATCH v3] examples/vmdq: fix the output of
pools/queues
Hi
> -Original Message-
> From: Jiang, JunyuX
> Sent: Monday, March 2, 2020 14:41
> To: dev@dpdk.org
> Cc: Li, Xiaoyun ; Yang, Qiming
> ; Jiang, JunyuX ;
> sta...@dpdk.org
> Subject: [PATCH v3] examples/vmdq: fix the output of pools/queues
>
> To match the pools/queues configuration, the pools/queues output
> should start from VMDQ base queue. This patch fixed the issue.
>
> Fixes: 6bb97df521aa ("examples/vmdq: new app")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Junyu Jiang
> ---
> examples/vmdq/main.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/examples/vmdq/main.c b/examples/vmdq/main.c index
> 00920..5ab3427c0 100644
> --- a/examples/vmdq/main.c
> +++ b/examples/vmdq/main.c
> @@ -441,10 +441,11 @@ update_mac_address(struct rte_mbuf *m, unsigned
> dst_port) static void sighup_handler(int signum) {
> - unsigned q;
> - for (q = 0; q < num_queues; q++) {
> - if (q % (num_queues/num_pools) == 0)
> - printf("\nPool %u: ", q/(num_queues/num_pools));
> + unsigned int q = vmdq_queue_base;
> + for (; q < num_queues; q++) {
> + if ((q - vmdq_queue_base) % (num_vmdq_queues / num_pools)
> == 0)
> + printf("\nPool %u: ", (q - vmdq_queue_base) /
> +(num_vmdq_queues / num_pools));
> printf("%lu ", rxPackets[q]);
> }
> printf("\nFinished handling signal %d\n", signum);
> --
> 2.17.1
Acked-by: Xiaoyun Li
Re: [dpdk-dev] [PATCH v2 2/2] examples/vmdq: fix RSS configuration
Tested-by: Han,YingyaX
BRs,
Yingya
-Original Message-
From: dev On Behalf Of Junyu Jiang
Sent: Wednesday, March 25, 2020 2:33 PM
To: dev@dpdk.org
Cc: Yang, Qiming ; Yigit, Ferruh
; Jiang, JunyuX ;
sta...@dpdk.org
Subject: [dpdk-dev] [PATCH v2 2/2] examples/vmdq: fix RSS configuration
In order that all queues of pools can receive packets, add enable-rss argument
to change rss configuration.
Fixes: 6bb97df521aa ("examples/vmdq: new app")
Cc: sta...@dpdk.org
Signed-off-by: Junyu Jiang
Acked-by: Xiaoyun Li
---
doc/guides/sample_app_ug/vmdq_forwarding.rst | 6 +--
examples/vmdq/main.c | 39 +---
2 files changed, 37 insertions(+), 8 deletions(-)
diff --git a/doc/guides/sample_app_ug/vmdq_forwarding.rst
b/doc/guides/sample_app_ug/vmdq_forwarding.rst
index df23043d6..658d6742d 100644
--- a/doc/guides/sample_app_ug/vmdq_forwarding.rst
+++ b/doc/guides/sample_app_ug/vmdq_forwarding.rst
@@ -26,13 +26,13 @@ The Intel® 82599 10 Gigabit Ethernet Controller NIC also
supports the splitting While the Intel® X710 or XL710 Ethernet Controller NICs
support many configurations of VMDQ pools of 4 or 8 queues each.
And queues numbers for each VMDQ pool can be changed by setting
CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM
in config/common_* file.
-The nb-pools parameter can be passed on the command line, after the EAL
parameters:
+The nb-pools and enable-rss parameters can be passed on the command line,
after the EAL parameters:
.. code-block:: console
-./build/vmdq_app [EAL options] -- -p PORTMASK --nb-pools NP
+./build/vmdq_app [EAL options] -- -p PORTMASK --nb-pools NP
+ --enable-rss
-where, NP can be 8, 16 or 32.
+where, NP can be 8, 16 or 32, rss is disabled by default.
In Linux* user space, the application can display statistics with the number
of packets received on each queue.
To have the application display the statistics, send a SIGHUP signal to the
running application process.
diff --git a/examples/vmdq/main.c b/examples/vmdq/main.c index
00920..98032e6a3 100644
--- a/examples/vmdq/main.c
+++ b/examples/vmdq/main.c
@@ -59,6 +59,7 @@ static uint32_t enabled_port_mask;
/* number of pools (if user does not specify any, 8 by default */ static
uint32_t num_queues = 8; static uint32_t num_pools = 8;
+static uint8_t rss_enable;
/* empty vmdq configuration structure. Filled in programatically */ static
const struct rte_eth_conf vmdq_conf_default = { @@ -143,6 +144,13 @@
get_eth_conf(struct rte_eth_conf *eth_conf, uint32_t num_pools)
(void)(rte_memcpy(eth_conf, &vmdq_conf_default, sizeof(*eth_conf)));
(void)(rte_memcpy(ð_conf->rx_adv_conf.vmdq_rx_conf, &conf,
sizeof(eth_conf->rx_adv_conf.vmdq_rx_conf)));
+ if (rss_enable) {
+ eth_conf->rxmode.mq_mode = ETH_MQ_RX_VMDQ_RSS;
+ eth_conf->rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IP |
+ ETH_RSS_UDP |
+ ETH_RSS_TCP |
+ ETH_RSS_SCTP;
+ }
return 0;
}
@@ -164,6 +172,7 @@ port_init(uint16_t port, struct rte_mempool *mbuf_pool)
uint16_t q;
uint16_t queues_per_pool;
uint32_t max_nb_pools;
+ uint64_t rss_hf_tmp;
/*
* The max pool number from dev_info will be used to validate the pool
@@ -209,6 +218,17 @@ port_init(uint16_t port, struct rte_mempool *mbuf_pool)
if (!rte_eth_dev_is_valid_port(port))
return -1;
+ rss_hf_tmp = port_conf.rx_adv_conf.rss_conf.rss_hf;
+ port_conf.rx_adv_conf.rss_conf.rss_hf &=
+ dev_info.flow_type_rss_offloads;
+ if (port_conf.rx_adv_conf.rss_conf.rss_hf != rss_hf_tmp) {
+ printf("Port %u modified RSS hash function based on hardware
support,"
+ "requested:%#"PRIx64" configured:%#"PRIx64"\n",
+ port,
+ rss_hf_tmp,
+ port_conf.rx_adv_conf.rss_conf.rss_hf);
+ }
+
/*
* Though in this example, we only receive packets from the first queue
* of each pool and send packets through first rte_lcore_count() tx @@
-363,7 +383,8 @@ static void vmdq_usage(const char *prgname) {
printf("%s [EAL options] -- -p PORTMASK]\n"
- " --nb-pools NP: number of pools\n",
+ " --nb-pools NP: number of pools\n"
+ " --enable-rss: enable RSS (disabled by default)\n",
prgname);
}
@@ -377,6 +398,7 @@ vmdq_parse_args(int argc, char **argv)
const char *prgname = argv[0];
static struct option long_option[] = {
{"nb-pools", required_argument, NULL, 0},
+ {"e
Re: [dpdk-dev] [PATCH v2 0/2] examples/vmdq: fix RSS configuration
Tested-by: Han,YingyaX -Original Message- From: dev On Behalf Of Junyu Jiang Sent: Wednesday, March 25, 2020 2:33 PM To: dev@dpdk.org Cc: Yang, Qiming ; Yigit, Ferruh ; Jiang, JunyuX Subject: [dpdk-dev] [PATCH v2 0/2] examples/vmdq: fix RSS configuration This patch set fixed a bug of vmdq example, and added a documentation for it. *** BLURB HERE *** Junyu Jiang (2): doc: add user guide for VMDq examples/vmdq: fix RSS configuration MAINTAINERS | 1 + doc/guides/sample_app_ug/index.rst | 1 + doc/guides/sample_app_ug/vmdq_forwarding.rst | 208 +++ examples/vmdq/main.c | 39 +++- 4 files changed, 244 insertions(+), 5 deletions(-) create mode 100644 doc/guides/sample_app_ug/vmdq_forwarding.rst -- 2.17.1
Re: [dpdk-dev] [PATCH] examples/vmdq: fix RSS configuration
Tested-by: Han,YingyaX
BRs,
Yingya
-Original Message-
From: stable On Behalf Of Li, Xiaoyun
Sent: Thursday, March 5, 2020 10:03 AM
To: Jiang, JunyuX ; dev@dpdk.org
Cc: Yang, Qiming ; sta...@dpdk.org
Subject: Re: [dpdk-stable] [PATCH] examples/vmdq: fix RSS configuration
> -Original Message-
> From: Jiang, JunyuX
> Sent: Tuesday, March 3, 2020 17:16
> To: dev@dpdk.org
> Cc: Li, Xiaoyun ; Yang, Qiming
> ; Jiang, JunyuX ;
> sta...@dpdk.org
> Subject: [PATCH] examples/vmdq: fix RSS configuration
>
> In order that all queues of pools can receive packets, add enable-rss
> argument to change rss configuration.
>
> Fixes: 6bb97df521aa ("examples/vmdq: new app")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Junyu Jiang
> ---
Acked-by: Xiaoyun Li
Re: [dpdk-dev] [PATCH v1] net/iavf: fix rxdid configure
Tested-by: Han, Yingya -Original Message- From: dev On Behalf Of Jeff Guo Sent: Monday, November 9, 2020 2:05 PM To: Wu, Jingjing ; Zhang, Qi Z ; Xing, Beilei Cc: dev@dpdk.org; Guo, Jia Subject: [dpdk-dev] [PATCH v1] net/iavf: fix rxdid configure
Re: [dpdk-dev] [PATCH] build: fix memcpy behaviour regression
Tested-by: Han, Yingya Best Regards, Yingya -Original Message- From: Richardson, Bruce Sent: Monday, October 12, 2020 10:52 PM To: dev@dpdk.org Cc: Han, YingyaX ; Ananyev, Konstantin ; Tu, Lijuan ; Richardson, Bruce Subject: [PATCH] build: fix memcpy behaviour regression When testing on some x86 platforms, code compiled with meson was observed running at a different power-license level to that compiled with make. This is due to the fact that meson auto-detects the instruction sets available on the system and enabled AVX512 rte_memcpy when AVX512 was available, while on make, a build time AVX-512 flag needed to be explicitly set to enable that AVX512 rte_memcpy code path. In the absense of runtime path selection for rte_memcpy - which is complicated by it being a static inline function in a header file - we can fix this behaviour regression by similarly having a build-time option which must be set to enable the AVX-512 memcpy path.
Re: [dpdk-dev] [dpdk-stable] [PATCH] net/i40e: fix incorrect byte counters
Tested-by: Yingya Han
-Original Message-
From: stable On Behalf Of Junyu Jiang
Sent: Thursday, September 10, 2020 9:54 AM
To: dev@dpdk.org
Cc: Guo, Jia ; Xing, Beilei ; Jiang,
JunyuX ; sta...@dpdk.org
Subject: [dpdk-stable] [PATCH] net/i40e: fix incorrect byte counters
This patch fixed the issue that rx/tx bytes overflowed on 48 bit limitation by
enlarging the limitation.
Fixes: 4861cde46116 ("i40e: new poll mode driver")
Cc: sta...@dpdk.org
Signed-off-by: Junyu Jiang
---
drivers/net/i40e/i40e_ethdev.c | 47 ++
drivers/net/i40e/i40e_ethdev.h | 9 +++
2 files changed, 56 insertions(+)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 11c02b188..e3d4b7f4f 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3070,6 +3070,13 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
i40e_stat_update_48(hw, I40E_GLV_BPRCH(idx), I40E_GLV_BPRCL(idx),
vsi->offset_loaded, &oes->rx_broadcast,
&nes->rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ if (vsi->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes)
+ nes->rx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ nes->rx_bytes += I40E_RXTX_BYTES_HIGH(vsi->old_rx_bytes);
+ }
+ vsi->old_rx_bytes = nes->rx_bytes;
/* exclude CRC bytes */
nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
nes->rx_broadcast) * RTE_ETHER_CRC_LEN; @@ -3096,6 +3103,13 @@
i40e_update_vsi_stats(struct i40e_vsi *vsi)
/* GLV_TDPC not supported */
i40e_stat_update_32(hw, I40E_GLV_TEPC(idx), vsi->offset_loaded,
&oes->tx_errors, &nes->tx_errors);
+ /* enlarge the limitation when tx_bytes overflowed */
+ if (vsi->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes)
+ nes->tx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ nes->tx_bytes += I40E_RXTX_BYTES_HIGH(vsi->old_tx_bytes);
+ }
+ vsi->old_rx_bytes = nes->rx_bytes;
vsi->offset_loaded = true;
PMD_DRV_LOG(DEBUG, "* VSI[%u] stats start
***", @@ -3168,6 +3182,24 @@ i40e_read_stats_registers(struct
i40e_pf *pf, struct i40e_hw *hw)
pf->offset_loaded,
&pf->internal_stats_offset.tx_broadcast,
&pf->internal_stats.tx_broadcast);
+ /* enlarge the limitation when internal rx/tx bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->internal_old_rx_bytes) >
+ pf->internal_stats.rx_bytes)
+ pf->internal_stats.rx_bytes +=
+ (uint64_t)1 << I40E_48_BIT_WIDTH;
+ pf->internal_stats.rx_bytes +=
+ I40E_RXTX_BYTES_HIGH(pf->internal_old_rx_bytes);
+
+ if (I40E_RXTX_BYTES_LOW(pf->internal_old_tx_bytes) >
+ pf->internal_stats.tx_bytes)
+ pf->internal_stats.tx_bytes +=
+ (uint64_t)1 << I40E_48_BIT_WIDTH;
+ pf->internal_stats.tx_bytes +=
+ I40E_RXTX_BYTES_HIGH(pf->internal_old_tx_bytes);
+ }
+ pf->internal_old_rx_bytes = pf->internal_stats.rx_bytes;
+ pf->internal_old_tx_bytes = pf->internal_stats.tx_bytes;
/* exclude CRC size */
pf->internal_stats.rx_bytes -= (pf->internal_stats.rx_unicast + @@
-3191,6 +3223,14 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct
i40e_hw *hw)
I40E_GLPRT_BPRCL(hw->port),
pf->offset_loaded, &os->eth.rx_broadcast,
&ns->eth.rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes)
+ ns->eth.rx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ ns->eth.rx_bytes += I40E_RXTX_BYTES_HIGH(pf->old_rx_bytes);
+ }
+ pf->old_rx_bytes = ns->eth.rx_bytes;
+
/* Workaround: CRC size should not be included in byte statistics,
* so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx
* packet.
@@ -3249,6 +3289,13 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct
i40e_hw *hw)
I40E_GLPRT_BPTCL(hw->port),
pf->offset_loaded, &os->eth.tx_broadcast,
&ns->eth.tx_broadcast);
+ /* enlarge the limitation when tx_bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes)
+ ns->eth.tx_byt
Re: [dpdk-dev] [PATCH v3 4/5] net/ice: fix vector rx burst for ice
Tested-by: Yingya Han
-Original Message-
From: dev On Behalf Of Jeff Guo
Sent: Wednesday, September 9, 2020 2:37 PM
To: Yang, Qiming ; Xing, Beilei ;
Zhao1, Wei ; Zhang, Qi Z ; Wu,
Jingjing
Cc: Richardson, Bruce ; dev@dpdk.org; Guo, Jia
; Zhang, Helin ;
m...@smartsharesystems.com; Yigit, Ferruh ; Wang,
Haiyue ; step...@networkplumber.org; barbe...@kth.se
Subject: [dpdk-dev] [PATCH v3 4/5] net/ice: fix vector rx burst for ice
The limitation of burst size in vector rx was removed, since it should retrieve
as much received packets as possible. And also the scattered receive path
should use a wrapper function to achieve the goal of burst maximizing. And do
some code cleaning for vector rx path.
Signed-off-by: Jeff Guo
---
drivers/net/ice/ice_rxtx.h | 1 +
drivers/net/ice/ice_rxtx_vec_avx2.c | 23 ++--
drivers/net/ice/ice_rxtx_vec_sse.c | 56 +++--
3 files changed, 49 insertions(+), 31 deletions(-)
diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index
2fdcfb7d0..3ef5f300d 100644
--- a/drivers/net/ice/ice_rxtx.h
+++ b/drivers/net/ice/ice_rxtx.h
@@ -35,6 +35,7 @@
#define ICE_MAX_RX_BURSTICE_RXQ_REARM_THRESH
#define ICE_TX_MAX_FREE_BUF_SZ 64
#define ICE_DESCS_PER_LOOP 4
+#define ICE_DESCS_PER_LOOP_AVX 8
#define ICE_FDIR_PKT_LEN 512
diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c
b/drivers/net/ice/ice_rxtx_vec_avx2.c
index be50677c2..843e4f32a 100644
--- a/drivers/net/ice/ice_rxtx_vec_avx2.c
+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c
@@ -29,7 +29,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)
__m128i dma_addr0;
dma_addr0 = _mm_setzero_si128();
- for (i = 0; i < ICE_DESCS_PER_LOOP; i++) {
+ for (i = 0; i < ICE_DESCS_PER_LOOP_AVX; i++) {
rxep[i].mbuf = &rxq->fake_mbuf;
_mm_store_si128((__m128i *)&rxdp[i].read,
dma_addr0);
@@ -132,12 +132,17 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)
ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id); }
+/**
+ * vPMD raw receive routine, only accept(nb_pkts >=
+ICE_DESCS_PER_LOOP_AVX)
+ *
+ * Notice:
+ * - nb_pkts < ICE_DESCS_PER_LOOP_AVX, just return no packet
+ * - floor align nb_pkts to a ICE_DESCS_PER_LOOP_AVX power-of-two */
static inline uint16_t
_ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq, struct rte_mbuf
**rx_pkts,
uint16_t nb_pkts, uint8_t *split_packet) {
-#define ICE_DESCS_PER_LOOP_AVX 8
-
const uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;
const __m256i mbuf_init = _mm256_set_epi64x(0, 0,
0, rxq->mbuf_initializer);
@@ -603,10 +608,6 @@ _ice_recv_raw_pkts_vec_avx2(struct ice_rx_queue *rxq,
struct rte_mbuf **rx_pkts,
return received;
}
-/**
- * Notice:
- * - nb_pkts < ICE_DESCS_PER_LOOP, just return no packet
- */
uint16_t
ice_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
@@ -616,8 +617,6 @@ ice_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf
**rx_pkts,
/**
* vPMD receive routine that reassembles single burst of 32 scattered packets
- * Notice:
- * - nb_pkts < ICE_DESCS_PER_LOOP, just return no packet
*/
static uint16_t
ice_recv_scattered_burst_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
@@ -626,6 +625,9 @@ ice_recv_scattered_burst_vec_avx2(void *rx_queue, struct
rte_mbuf **rx_pkts,
struct ice_rx_queue *rxq = rx_queue;
uint8_t split_flags[ICE_VPMD_RX_BURST] = {0};
+ /* split_flags only can support max of ICE_VPMD_RX_BURST */
+ nb_pkts = RTE_MIN(nb_pkts, ICE_VPMD_RX_BURST);
+
/* get some new buffers */
uint16_t nb_bufs = _ice_recv_raw_pkts_vec_avx2(rxq, rx_pkts, nb_pkts,
split_flags);
@@ -657,9 +659,6 @@ ice_recv_scattered_burst_vec_avx2(void *rx_queue, struct
rte_mbuf **rx_pkts,
/**
* vPMD receive routine that reassembles scattered packets.
- * Main receive routine that can handle arbitrary burst sizes
- * Notice:
- * - nb_pkts < ICE_DESCS_PER_LOOP, just return no packet
*/
uint16_t
ice_recv_scattered_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
diff --git a/drivers/net/ice/ice_rxtx_vec_sse.c
b/drivers/net/ice/ice_rxtx_vec_sse.c
index 382ef31f3..c03e24092 100644
--- a/drivers/net/ice/ice_rxtx_vec_sse.c
+++ b/drivers/net/ice/ice_rxtx_vec_sse.c
@@ -205,10 +205,11 @@ ice_rx_desc_to_ptype_v(__m128i descs[4], struct rte_mbuf
**rx_pkts, }
/**
+ * vPMD raw receive routine, only accept(nb_pkts >= ICE_DESCS_PER_LOOP)
+ *
* Notice:
* - nb_pkts < ICE_DESCS_PER_LOOP, just return no packet
- * - nb_pkts > ICE_VPMD_RX_BURST, only scan ICE_VPMD_RX_BURST
- * numbers of DD bits
+ * - floor align nb_pkts to a ICE_DESCS_PER_LOOP power-of-two
*/
Re: [dpdk-dev] [dpdk-stable] [PATCH v2] net/i40e: fix incorrect byte counters
Tested-by: Yingya Han
-Original Message-
From: stable On Behalf Of Junyu Jiang
Sent: Wednesday, September 16, 2020 9:51 AM
To: dev@dpdk.org
Cc: Guo, Jia ; Xing, Beilei ; Jiang,
JunyuX ; sta...@dpdk.org
Subject: [dpdk-stable] [PATCH v2] net/i40e: fix incorrect byte counters
This patch fixed the issue that rx/tx bytes overflowed on 48 bit limitation by
enlarging the limitation.
Fixes: 4861cde46116 ("i40e: new poll mode driver")
Cc: sta...@dpdk.org
Signed-off-by: Junyu Jiang
---
drivers/net/i40e/i40e_ethdev.c | 47 ++
drivers/net/i40e/i40e_ethdev.h | 9 +++
2 files changed, 56 insertions(+)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 563f21d9d..4d4ea9861 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3073,6 +3073,13 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
i40e_stat_update_48(hw, I40E_GLV_BPRCH(idx), I40E_GLV_BPRCL(idx),
vsi->offset_loaded, &oes->rx_broadcast,
&nes->rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ if (vsi->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes)
+ nes->rx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ nes->rx_bytes += I40E_RXTX_BYTES_HIGH(vsi->old_rx_bytes);
+ }
+ vsi->old_rx_bytes = nes->rx_bytes;
/* exclude CRC bytes */
nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
nes->rx_broadcast) * RTE_ETHER_CRC_LEN; @@ -3099,6 +3106,13 @@
i40e_update_vsi_stats(struct i40e_vsi *vsi)
/* GLV_TDPC not supported */
i40e_stat_update_32(hw, I40E_GLV_TEPC(idx), vsi->offset_loaded,
&oes->tx_errors, &nes->tx_errors);
+ /* enlarge the limitation when tx_bytes overflowed */
+ if (vsi->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes)
+ nes->tx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ nes->tx_bytes += I40E_RXTX_BYTES_HIGH(vsi->old_tx_bytes);
+ }
+ vsi->old_tx_bytes = nes->tx_bytes;
vsi->offset_loaded = true;
PMD_DRV_LOG(DEBUG, "* VSI[%u] stats start
***", @@ -3171,6 +3185,24 @@ i40e_read_stats_registers(struct
i40e_pf *pf, struct i40e_hw *hw)
pf->offset_loaded,
&pf->internal_stats_offset.tx_broadcast,
&pf->internal_stats.tx_broadcast);
+ /* enlarge the limitation when internal rx/tx bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->internal_old_rx_bytes) >
+ pf->internal_stats.rx_bytes)
+ pf->internal_stats.rx_bytes +=
+ (uint64_t)1 << I40E_48_BIT_WIDTH;
+ pf->internal_stats.rx_bytes +=
+ I40E_RXTX_BYTES_HIGH(pf->internal_old_rx_bytes);
+
+ if (I40E_RXTX_BYTES_LOW(pf->internal_old_tx_bytes) >
+ pf->internal_stats.tx_bytes)
+ pf->internal_stats.tx_bytes +=
+ (uint64_t)1 << I40E_48_BIT_WIDTH;
+ pf->internal_stats.tx_bytes +=
+ I40E_RXTX_BYTES_HIGH(pf->internal_old_tx_bytes);
+ }
+ pf->internal_old_rx_bytes = pf->internal_stats.rx_bytes;
+ pf->internal_old_tx_bytes = pf->internal_stats.tx_bytes;
/* exclude CRC size */
pf->internal_stats.rx_bytes -= (pf->internal_stats.rx_unicast + @@
-3194,6 +3226,14 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct
i40e_hw *hw)
I40E_GLPRT_BPRCL(hw->port),
pf->offset_loaded, &os->eth.rx_broadcast,
&ns->eth.rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes)
+ ns->eth.rx_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ ns->eth.rx_bytes += I40E_RXTX_BYTES_HIGH(pf->old_rx_bytes);
+ }
+ pf->old_rx_bytes = ns->eth.rx_bytes;
+
/* Workaround: CRC size should not be included in byte statistics,
* so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx
* packet.
@@ -3252,6 +3292,13 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct
i40e_hw *hw)
I40E_GLPRT_BPTCL(hw->port),
pf->offset_loaded, &os->eth.tx_broadcast,
&ns->eth.tx_broadcast);
+ /* enlarge the limitation when tx_bytes overflowed */
+ if (pf->offset_loaded) {
+ if (I40E_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes)
+ ns->eth.tx
