RE: [PATCH] ethdev: fix flow API support for P4-programmable devices
Hi Wenjing,
> -Original Message-
> From: wenjing.q...@intel.com
> Sent: Friday, October 27, 2023 12:18 PM
>
> From: Wenjing Qiao
>
> "program" action should also be added in structure rte_flow_desc_action.
>
> Fixes: 8f1953f1914d ("ethdev: add flow API for P4-programmable devices")
>
> Signed-off-by: Wenjing Qiao
> ---
> lib/ethdev/rte_flow.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c
> index 3a67f1aaba..4d6c28ee0e 100644
> --- a/lib/ethdev/rte_flow.c
> +++ b/lib/ethdev/rte_flow.c
> @@ -267,6 +267,8 @@ static const struct rte_flow_desc_data
> rte_flow_desc_action[] = {
> MK_FLOW_ACTION(IPV6_EXT_REMOVE, sizeof(struct
> rte_flow_action_ipv6_ext_remove)),
> MK_FLOW_ACTION(INDIRECT_LIST,
> sizeof(struct rte_flow_action_indirect_list)),
> + MK_FLOW_ACTION(PROG,
> +sizeof(struct rte_flow_action_prog)),
> };
>
> int
> --
> 2.34.1
Acked-by: Ori Kam
Best,
Ori
RE: [PATCH 1/9] ethdev: overwrite some comment related to RSS
Hi Jei,
> -Original Message-
> From: Jie Hai
> Sent: Friday, October 27, 2023 12:28 PM
>
> 1. overwrite the comments of fields of 'rte_eth_rss_conf'.
> 2. Add comments for RTE_ETH_HASH_FUNCTION_DEFAULT.
>
> Signed-off-by: Jie Hai
> ---
> lib/ethdev/rte_ethdev.h | 33 ++---
> lib/ethdev/rte_flow.h | 1 +
> 2 files changed, 19 insertions(+), 15 deletions(-)
>
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index 2fd3cd808dbf..37fd5afef48a 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -448,24 +448,27 @@ struct rte_vlan_filter_conf {
> /**
> * A structure used to configure the Receive Side Scaling (RSS) feature
> * of an Ethernet port.
> - * If not NULL, the *rss_key* pointer of the *rss_conf* structure points
> - * to an array holding the RSS key to use for hashing specific header
> - * fields of received packets. The length of this array should be indicated
> - * by *rss_key_len* below. Otherwise, a default random hash key is used by
> - * the device driver.
> - *
> - * The *rss_key_len* field of the *rss_conf* structure indicates the length
> - * in bytes of the array pointed by *rss_key*. To be compatible, this length
> - * will be checked in i40e only. Others assume 40 bytes to be used as before.
> - *
> - * The *rss_hf* field of the *rss_conf* structure indicates the different
> - * types of IPv4/IPv6 packets to which the RSS hashing must be applied.
> - * Supplying an *rss_hf* equal to zero disables the RSS feature.
> */
> struct rte_eth_rss_conf {
> - uint8_t *rss_key;/**< If not NULL, 40-byte hash key. */
> + /**
> + * In rte_eth_dev_rss_hash_conf_get(), the *rss_key_len* should be
> + * greater than or equal to the hash_key_size which get from
> + * rte_eth_dev_info_get() API. And the *rss_key* should contain at
> least
> + * *rss_key_len* bytes. If not meet these requirements, the query
> result
> + * is unreliable even the operation returns success.
> + *
> + * In rte_eth_dev_rss_hash_update() or rte_eth_dev_configure(), the
> + * *rss_key_len* indicates the length of the *rss_key* in bytes of
> + * the array pointed by *rss_key*. Drivers are free to ignore the
> + * *rss_key_len* and assume key length is 40 bytes.
In the original comment, it is stated that if no RSS key is given rss_key =
NULL , then the PMD selects a random hash key,
Is this behavior changed?
> + */
> + uint8_t *rss_key;
> uint8_t rss_key_len; /**< hash key length in bytes. */
> - uint64_t rss_hf; /**< Hash functions to apply - see below. */
> + /**
> + * Indicates the type of packets or the specific part of packets to
> + * which RSS hashing is to be applied.
> + */
> + uint64_t rss_hf;
> };
>
> /*
> diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h
> index edefa34c10da..25f1dffd1f30 100644
> --- a/lib/ethdev/rte_flow.h
> +++ b/lib/ethdev/rte_flow.h
> @@ -3226,6 +3226,7 @@ struct rte_flow_query_count {
> * Hash function types.
> */
> enum rte_eth_hash_function {
> + /** DEFAULT means driver decides which hash algorithm to pick. */
> RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
> RTE_ETH_HASH_FUNCTION_TOEPLITZ, /**< Toeplitz */
> RTE_ETH_HASH_FUNCTION_SIMPLE_XOR, /**< Simple XOR */
> --
> 2.30.0
RE: [PATCH v7 00/10] net/mlx5: support indirect actions list
Hi, > -Original Message- > From: Gregory Etelson > Sent: Thursday, October 26, 2023 10:12 AM > To: dev@dpdk.org > Cc: Gregory Etelson ; Maayan Kashani > ; Raslan Darawsheh > Subject: [PATCH v7 00/10] net/mlx5: support indirect actions list > > Add MLX5 PMD support for indirect actions list. > > Erez Shitrit (1): > net/mlx5/hws: allow destination into default miss FT > > Gregory Etelson (4): > net/mlx5: reformat HWS code for HWS mirror action > net/mlx5: support HWS mirror action > net/mlx5: reformat HWS code for indirect list actions > net/mlx5: support indirect list METER_MARK action > > Haifei Luo (1): > net/mlx5/hws: support reformat for hws mirror > > Hamdan Igbaria (3): > net/mlx5/hws: add support for reformat DevX object > net/mlx5/hws: support creating of dynamic forward table and FTE > net/mlx5/hws: add mlx5dr DevX object struct to mlx5dr action > > Shun Hao (1): > net/mlx5/hws: add support for mirroring > > doc/guides/nics/features/mlx5.ini |1 + > doc/guides/rel_notes/release_23_11.rst |1 + > drivers/common/mlx5/mlx5_prm.h | 81 +- > drivers/net/mlx5/hws/mlx5dr.h | 34 + > drivers/net/mlx5/hws/mlx5dr_action.c | 210 +++- > drivers/net/mlx5/hws/mlx5dr_action.h |8 + > drivers/net/mlx5/hws/mlx5dr_cmd.c | 143 ++- > drivers/net/mlx5/hws/mlx5dr_cmd.h | 49 +- > drivers/net/mlx5/hws/mlx5dr_debug.c|1 + > drivers/net/mlx5/hws/mlx5dr_internal.h |5 + > drivers/net/mlx5/hws/mlx5dr_send.c |5 - > drivers/net/mlx5/hws/mlx5dr_table.c|8 +- > drivers/net/mlx5/mlx5.c|1 + > drivers/net/mlx5/mlx5.h|2 + > drivers/net/mlx5/mlx5_flow.c | 199 > drivers/net/mlx5/mlx5_flow.h | 111 ++- > drivers/net/mlx5/mlx5_flow_hw.c| 1217 +--- > 17 files changed, 1908 insertions(+), 168 deletions(-) > > -- > v3: Add ACK to patches in the series. > v4: Squash reformat patches. > v5: Update release notes. > Fix code style. > v6: Fix code style. > v7: Fix incremental compilation failure. > -- > 2.39.2 Series applied to next-net-mlx, Kindest regards, Raslan Darawsheh
[PATCH v2 1/1] build: add libarchive to external deps
In order to avoid linking with Libs.private, libarchive
is not added to ext_deps during the meson setup stage.
Since libarchive is not added to ext_deps, cross-compilation
or native compilation with libarchive installed in non-standard
location fails with errors related to "cannot find -larchive"
or "archive.h: No such file or directory". In order to fix the
build failures, user is required to define the 'c_args' and
'c_link_args' with '-I' and '-L'.
This patch adds libarchive to ext_deps and further would not
require setting c_args and c_link_args externally.
Fixes: 40edb9c0d36b ("eal: handle compressed firmware")
Cc: sta...@dpdk.org
Signed-off-by: Srikanth Yalavarthi
---
config/meson.build | 5 -
drivers/ml/cnxk/meson.build | 1 +
lib/eal/meson.build | 3 +++
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/config/meson.build b/config/meson.build
index d56b0f9bce..4ff101767e 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -236,11 +236,6 @@ dpdk_conf.set('RTE_BACKTRACE', cc.has_header('execinfo.h')
or is_windows)
libarchive = dependency('libarchive', required: false, method: 'pkg-config')
if libarchive.found()
dpdk_conf.set('RTE_HAS_LIBARCHIVE', 1)
-# Push libarchive link dependency at the project level to support
-# statically linking dpdk apps. Details at:
-# https://inbox.dpdk.org/dev/20210605004024.660267a1@sovereign/
-add_project_link_arguments('-larchive', language: 'c')
-dpdk_extra_ldflags += '-larchive'
endif
# check for libbsd
diff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build
index 0680a0faa5..921dc7e89b 100644
--- a/drivers/ml/cnxk/meson.build
+++ b/drivers/ml/cnxk/meson.build
@@ -67,6 +67,7 @@ sources += files(
'mvtvm_ml_model.c',
)
+ext_deps += libarchive
ext_deps += jansson_dep
ext_deps += dlpack_dep
ext_deps += dmlc_dep
diff --git a/lib/eal/meson.build b/lib/eal/meson.build
index 9942104386..e1d6c4cf17 100644
--- a/lib/eal/meson.build
+++ b/lib/eal/meson.build
@@ -21,6 +21,9 @@ endif
if dpdk_conf.has('RTE_USE_LIBBSD')
ext_deps += libbsd
endif
+if dpdk_conf.has('RTE_HAS_LIBARCHIVE')
+ext_deps += libarchive
+endif
if cc.has_function('getentropy', prefix : '#include ')
cflags += '-DRTE_LIBEAL_USE_GETENTROPY'
endif
--
2.42.0
[PATCH v3 1/1] build: add libarchive to external deps
In order to avoid linking with Libs.private, libarchive
is not added to ext_deps during the meson setup stage.
Since libarchive is not added to ext_deps, cross-compilation
or native compilation with libarchive installed in non-standard
location fails with errors related to "cannot find -larchive"
or "archive.h: No such file or directory". In order to fix the
build failures, user is required to define the 'c_args' and
'c_link_args' with '-I' and '-L'.
This patch adds libarchive to ext_deps and further would not
require setting c_args and c_link_args externally.
Fixes: 40edb9c0d36b ("eal: handle compressed firmware")
Cc: sta...@dpdk.org
Signed-off-by: Srikanth Yalavarthi
---
Depends-on: series-30002 ("Implementation of revised ml/cnxk driver")
v3:
- Updated depends on series information
v2:
- Updated patch to include libarchive to ext_deps
v1:
- Initial changes
config/meson.build | 5 -
drivers/ml/cnxk/meson.build | 1 +
lib/eal/meson.build | 3 +++
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/config/meson.build b/config/meson.build
index d56b0f9bce..4ff101767e 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -236,11 +236,6 @@ dpdk_conf.set('RTE_BACKTRACE', cc.has_header('execinfo.h')
or is_windows)
libarchive = dependency('libarchive', required: false, method: 'pkg-config')
if libarchive.found()
dpdk_conf.set('RTE_HAS_LIBARCHIVE', 1)
-# Push libarchive link dependency at the project level to support
-# statically linking dpdk apps. Details at:
-# https://inbox.dpdk.org/dev/20210605004024.660267a1@sovereign/
-add_project_link_arguments('-larchive', language: 'c')
-dpdk_extra_ldflags += '-larchive'
endif
# check for libbsd
diff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build
index 0680a0faa5..921dc7e89b 100644
--- a/drivers/ml/cnxk/meson.build
+++ b/drivers/ml/cnxk/meson.build
@@ -67,6 +67,7 @@ sources += files(
'mvtvm_ml_model.c',
)
+ext_deps += libarchive
ext_deps += jansson_dep
ext_deps += dlpack_dep
ext_deps += dmlc_dep
diff --git a/lib/eal/meson.build b/lib/eal/meson.build
index 9942104386..e1d6c4cf17 100644
--- a/lib/eal/meson.build
+++ b/lib/eal/meson.build
@@ -21,6 +21,9 @@ endif
if dpdk_conf.has('RTE_USE_LIBBSD')
ext_deps += libbsd
endif
+if dpdk_conf.has('RTE_HAS_LIBARCHIVE')
+ext_deps += libarchive
+endif
if cc.has_function('getentropy', prefix : '#include ')
cflags += '-DRTE_LIBEAL_USE_GETENTROPY'
endif
--
2.42.0
Re: [PATCH 0/2] small cleanup - use PCI lib
19/10/2023 17:31, Thomas Monjalon: > Some drivers could use more the PCI lib facilities. > > Thomas Monjalon (2): > drivers: use macro for PCI address format > drivers: use function to compare PCI addresses Applied
[PATCH v2] net/mlx5: add indirect encap decap support
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list has a unique handle ID and stands for
different tunnel operations. The operation is shared globally with
fixed patterns. It means there is no configuration associated with
each handle ID and conf pointer should be NULL always no matter in
the action template or flow rules.
If the handle ID mask in the action template is NULL, each flow rule
can take its own indirect handle, otherwise, the ID in action template
is used for all rules.
The handle ID used in the flow rules must be the same type as the one
in the action template.
Testpmd cli example:
flow indirect_action 0 create action_id 10 transfer list actions
raw_decap index 1 / raw_encap index 2 / end
flow pattern_template 0 create transfer pattern_template_id 1 template
eth / ipv4 / udp / end
flow actions_template 0 create transfer actions_template_id 1 template
indirect_list handle 10 / jump / end mask indirect_list / jump / end
flow template_table 0 create table_id 1 group 1 priority 0 transfer
rules_number 64 pattern_template 1 actions_template 1
flow queue 0 create 0 template_table 1 pattern_template 0
actions_template 0 postpone no pattern eth / ipv4 / udp / end actions
indirect_list handle 11 / jump group 10 / end
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
v2: Code rebase
---
drivers/net/mlx5/mlx5_flow.c| 5 +
drivers/net/mlx5/mlx5_flow.h| 16 ++
drivers/net/mlx5/mlx5_flow_hw.c | 323
3 files changed, 344 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index a500afd4f7..4a28d13422 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -66,6 +66,7 @@ void
mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
+ struct rte_flow_error error;
while (!LIST_EMPTY(&priv->indirect_list_head)) {
struct mlx5_indirect_list *e =
@@ -80,6 +81,10 @@ mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
case MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY:
mlx5_destroy_legacy_indirect(dev, e);
break;
+ case MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT:
+ mlx5_reformat_action_destroy(dev,
+ (struct rte_flow_action_list_handle *)e,
&error);
+ break;
#endif
default:
DRV_LOG(ERR, "invalid indirect list type");
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 3ea2548d2b..2b94a4355c 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -101,6 +101,7 @@ enum mlx5_indirect_list_type {
MLX5_INDIRECT_ACTION_LIST_TYPE_ERR = 0,
MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY = 1,
MLX5_INDIRECT_ACTION_LIST_TYPE_MIRROR = 2,
+ MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT = 3,
};
/**
@@ -1366,6 +1367,8 @@ struct mlx5_hw_jump_action {
/* Encap decap action struct. */
struct mlx5_hw_encap_decap_action {
+ struct mlx5_indirect_list indirect;
+ enum mlx5dr_action_type action_type;
struct mlx5dr_action *action; /* Action object. */
/* Is header_reformat action shared across flows in table. */
bool shared;
@@ -2426,6 +2429,16 @@ const struct rte_flow_action *mlx5_flow_find_action
int mlx5_validate_action_rss(struct rte_eth_dev *dev,
const struct rte_flow_action *action,
struct rte_flow_error *error);
+
+struct mlx5_hw_encap_decap_action*
+mlx5_reformat_action_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
+ const struct rte_flow_action *encap_action,
+ const struct rte_flow_action *decap_action,
+ struct rte_flow_error *error);
+int mlx5_reformat_action_destroy(struct rte_eth_dev *dev,
+struct rte_flow_action_list_handle *handle,
+struct rte_flow_error *error);
int mlx5_flow_validate_action_count(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
struct rte_flow_error *error);
@@ -2859,5 +2872,8 @@ mlx5_hw_mirror_destroy(struct rte_eth_dev *dev, struct
mlx5_mirror *mirror);
void
mlx5_destroy_legacy_indirect(struct rte_eth_dev *dev,
struct mlx5_indirect_list *ptr);
+void
+mlx5_hw_decap_encap_destroy(struct rte_eth_dev *dev,
+ struct mlx5_indirect_list *reformat);
[PATCH v3] net/mlx5: add indirect encap decap support
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list has a unique handle ID and stands for
different tunnel operations. The operation is shared globally with
fixed patterns. It means there is no configuration associated with
each handle ID and conf pointer should be NULL always no matter in
the action template or flow rules.
If the handle ID mask in the action template is NULL, each flow rule
can take its own indirect handle, otherwise, the ID in action template
is used for all rules.
The handle ID used in the flow rules must be the same type as the one
in the action template.
Testpmd cli example:
flow indirect_action 0 create action_id 10 transfer list actions
raw_decap index 1 / raw_encap index 2 / end
flow pattern_template 0 create transfer pattern_template_id 1 template
eth / ipv4 / udp / end
flow actions_template 0 create transfer actions_template_id 1 template
indirect_list handle 10 / jump / end mask indirect_list / jump / end
flow template_table 0 create table_id 1 group 1 priority 0 transfer
rules_number 64 pattern_template 1 actions_template 1
flow queue 0 create 0 template_table 1 pattern_template 0
actions_template 0 postpone no pattern eth / ipv4 / udp / end actions
indirect_list handle 11 / jump group 10 / end
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
v3: Protect with macro to fix warning.
v2: Code rebase
---
drivers/net/mlx5/mlx5_flow.c| 5 +
drivers/net/mlx5/mlx5_flow.h| 16 ++
drivers/net/mlx5/mlx5_flow_hw.c | 323
3 files changed, 344 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index a500afd4f7..4a28d13422 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -66,6 +66,7 @@ void
mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
+ struct rte_flow_error error;
while (!LIST_EMPTY(&priv->indirect_list_head)) {
struct mlx5_indirect_list *e =
@@ -80,6 +81,10 @@ mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
case MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY:
mlx5_destroy_legacy_indirect(dev, e);
break;
+ case MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT:
+ mlx5_reformat_action_destroy(dev,
+ (struct rte_flow_action_list_handle *)e,
&error);
+ break;
#endif
default:
DRV_LOG(ERR, "invalid indirect list type");
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 3ea2548d2b..2b94a4355c 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -101,6 +101,7 @@ enum mlx5_indirect_list_type {
MLX5_INDIRECT_ACTION_LIST_TYPE_ERR = 0,
MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY = 1,
MLX5_INDIRECT_ACTION_LIST_TYPE_MIRROR = 2,
+ MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT = 3,
};
/**
@@ -1366,6 +1367,8 @@ struct mlx5_hw_jump_action {
/* Encap decap action struct. */
struct mlx5_hw_encap_decap_action {
+ struct mlx5_indirect_list indirect;
+ enum mlx5dr_action_type action_type;
struct mlx5dr_action *action; /* Action object. */
/* Is header_reformat action shared across flows in table. */
bool shared;
@@ -2426,6 +2429,16 @@ const struct rte_flow_action *mlx5_flow_find_action
int mlx5_validate_action_rss(struct rte_eth_dev *dev,
const struct rte_flow_action *action,
struct rte_flow_error *error);
+
+struct mlx5_hw_encap_decap_action*
+mlx5_reformat_action_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
+ const struct rte_flow_action *encap_action,
+ const struct rte_flow_action *decap_action,
+ struct rte_flow_error *error);
+int mlx5_reformat_action_destroy(struct rte_eth_dev *dev,
+struct rte_flow_action_list_handle *handle,
+struct rte_flow_error *error);
int mlx5_flow_validate_action_count(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
struct rte_flow_error *error);
@@ -2859,5 +2872,8 @@ mlx5_hw_mirror_destroy(struct rte_eth_dev *dev, struct
mlx5_mirror *mirror);
void
mlx5_destroy_legacy_indirect(struct rte_eth_dev *dev,
struct mlx5_indirect_list *ptr);
+void
+mlx5_hw_decap_encap_destroy(struct rte_eth_dev *dev,
+
Re: [PATCH v9 00/34] Implementation of revised ml/cnxk driver
On Fri, Oct 27, 2023 at 12:12 AM Srikanth Yalavarthi wrote: > > This patch series is an implementation of revised ml/cnxk driver > to support models compiled with TVM compiler framework. TVM models > use a hybrid mode for execution, with regions of the model executing > on the ML accelerator and the rest executing on CPU cores. > > This series of commits reorganizes the ml/cnxk driver and adds support > to execute multiple regions with-in a TVM model. > > v9: > - Fixed incorrect IO layout for TVM Marvell models > - Set byte offset to zero for I/O tensors > - Updated max layers macro definition. Set to TVMDP max layers. > - Fixed TVM model IO type to RTE IO type map Series applied to dpdk-next-net-mrvl/for-next-net with following chages. Thanks. 1) cnxl ml driver update in doc/guides/rel_notes/release_23_11.rst moved to close to mldev subsystem changes 2) [for-next-net]dell[dpdk-next-net-mrvl] $ git diff diff --git a/doc/guides/mldevs/cnxk.rst b/doc/guides/mldevs/cnxk.rst index 28e5b5b87f..25e8ff783a 100644 --- a/doc/guides/mldevs/cnxk.rst +++ b/doc/guides/mldevs/cnxk.rst @@ -212,9 +212,9 @@ not part of DPDK and must be installed separately: .. note:: In order for meson to find the dependencies during the configure stage, -it is required to add the cmake paths /lib/cmake/dlpack, -/lib/cmake/dmlc and /lib/cmake/tvm to -CMAKE_PREFIX_PATH and /lib/pkgconfig to PKG_CONFIG_PATH. +it is required to update CMAKE_PREFIX_PATH and PKG_CONFIG_PATH as below. + CMAKE_PREFIX_PATH='/lib/cmake/tvm:/lib/cmake/dlpack:/lib/cmake/dmlc' +PKG_CONFIG_PATH='/lib/pkgconfig' For the record, I have used following build command to test code with external build dep. Assumung all depended libraries installed at /export/cross_ml/install/ CMAKE_PREFIX_PATH='/export/cross_ml/install/lib/cmake/tvm:/export/cross_ml/install/lib/cmake/dlpack:/export/cross_ml/install/lib/cmake/dmlc' PKG_CONFIG_PATH='/export/cross_ml/install/lib/pkgconfig/' meson setup --cross config/arm/arm64_cn10k_linux_gcc -Denable_docs=true -Dexamples=all -Dc_args='-I/export/cross_ml/install/include' -Dc_link_args='-L/export/cross_ml/install/lib' build Also, -Dc_args='-I/export/cross_ml/install/include' -Dc_link_args='-L/export/cross_ml/install/lib' could be removed when following patch merged through main tree. https://patches.dpdk.org/project/dpdk/patch/20231029082004.5576-1-syalavar...@marvell.com/
RE: [PATCH v4 1/4] net/mlx5: add support for ptype match in hardware steering
Hi > -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:51 PM > Subject: [PATCH v4 1/4] net/mlx5: add support for ptype match in hardware > steering > > The packet type matching provides quick way of finding out > L2/L3/L4 protocols in a given packet. That helps with > optimized flow rules matching, eliminating the need of > stacking all the packet headers in the matching criteria. > > Signed-off-by: Alexander Kozyrev > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH v4 2/4] net/mlx5/hws: add support for fragmented ptype match
Hi > -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:51 PM > > Expand packet type matching with support of the > Fragmented IP (Internet Protocol) packet type. > > Signed-off-by: Alexander Kozyrev > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH v4 3/4] doc: add PMD ptype item limitations
Hi > -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:51 PM > > From: Michael Baum > > Add limitations for ptype item support in "mlx5.rst" file. > > Signed-off-by: Michael Baum > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH v4 4/4] doc: add packet type matching item to release notes
> -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:51 PM > Document new RTE_FLOW_ITEM_TYPE_PTYPE in the release notes. > > Signed-off-by: Alexander Kozyrev > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH] net/mlx5/hws: fix integrity bits level
Hi Alex,
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, October 25, 2023 11:41 PM
>
> The level field in the integrity item is not taken into account
> in the current implementation of hardware steering.
> Use this value instead of trying to find out the encapsulation
> level according to the protocol items involved.
>
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
>
> Signed-off-by: Alexander Kozyrev
> ---
Acked-by: Ori Kam
Best,
Ori
RE: [PATCH] net/mlx5/hws: remove csum check from L3 ok check
Hi Alex > -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:39 PM > > From: Michael Baum > > This patch changes the integrity item behavior for HW steering. > > Old behavior: the "ipv4_csum_ok" checks only IPv4 checksum and "l3_ok" > checks everything is ok including IPv4 checksum. > > New behavior: the "l3_ok" checks everything is ok excluding IPv4 > checksum. > > This change enables matching "l3_ok" in IPv6 packets since for IPv6 > packets "ipv4_csum_ok" is always miss. > For SW steering the old behavior is kept as same as for L4 ok. > > Signed-off-by: Michael Baum > --- Acked-by: Ori Kam Best, Ori
[PATCH v1 1/1] ml/cnxk: fix updating internal I/O info
Update scale factor in IO info of TVM models from metadata.
Fixes: 35c3e790b4a0 ("ml/cnxk: update internal info for TVM model")
Signed-off-by: Srikanth Yalavarthi
---
drivers/ml/cnxk/mvtvm_ml_model.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ml/cnxk/mvtvm_ml_model.c b/drivers/ml/cnxk/mvtvm_ml_model.c
index d28bd88a08..cd9461302c 100644
--- a/drivers/ml/cnxk/mvtvm_ml_model.c
+++ b/drivers/ml/cnxk/mvtvm_ml_model.c
@@ -216,6 +216,7 @@ mvtvm_ml_model_io_info_set(struct cnxk_ml_model *model)
model->mvtvm.info.input[i].sz_q =
model->mvtvm.info.input[i].nb_elements *
rte_ml_io_type_size_get(model->mvtvm.info.input[i].qtype);
+ model->mvtvm.info.input[i].scale = metadata->input[i].scale;
model->mvtvm.info.total_input_sz_d +=
model->mvtvm.info.input[i].sz_d;
model->mvtvm.info.total_input_sz_q +=
model->mvtvm.info.input[i].sz_q;
@@ -256,6 +257,7 @@ mvtvm_ml_model_io_info_set(struct cnxk_ml_model *model)
model->mvtvm.info.output[i].sz_q =
model->mvtvm.info.output[i].nb_elements *
rte_ml_io_type_size_get(model->mvtvm.info.output[i].qtype);
+ model->mvtvm.info.output[i].scale = metadata->output[i].scale;
model->mvtvm.info.total_output_sz_d +=
model->mvtvm.info.output[i].sz_d;
model->mvtvm.info.total_output_sz_q +=
model->mvtvm.info.output[i].sz_q;
--
2.42.0
RE: [PATCH 0/3] net/mlx5: add port representor destination to mirror
Hi Suanming, > -Original Message- > From: Suanming Mou > Sent: Tuesday, October 17, 2023 3:44 AM > > In order to clone the traffic from FDB to NIC TIR, user can set > port representor action as mirror clone destination. In that case > cloned traffic will be moved to E-Switch manager root table, and > goes to software TIR. > > This series adds the port representor support to mirror action. > This series depends on the indirect list series [1]. > > [1]: https://patches.dpdk.org/project/dpdk/list/?series=29662 > > Suanming Mou (3): > net/mlx5: add port representor action > net/mlx5: add port representor destination to mirror > app/testpmd: add port representor as sample destination > > app/test-pmd/cmdline_flow.c | 1 + > doc/guides/nics/mlx5.rst| 6 +++ > drivers/net/mlx5/mlx5.h | 2 + > drivers/net/mlx5/mlx5_flow.h| 4 +- > drivers/net/mlx5/mlx5_flow_hw.c | 74 > - > 5 files changed, 85 insertions(+), 2 deletions(-) > > -- Series-acked-by: Ori Kam Best, Ori
RE: [PATCH] net/mlx5: fix the E-Switch mirror flow rule validation
Hi Jiawei,
> -Original Message-
> From: Jiawei Wang
> Sent: Wednesday, October 11, 2023 9:43 AM
>
> The port action and jump to flow table action are not supported
> in the mirror flows (RTE_FLOW_ACTION_TYPE_SAMPLE with sample ratio=1)
> in E-Switch domain (transfer attribute set) without presented encap
> action.
>
> The encap action is supported for uplink port only. So, if flow with
> mirroring contains encap action application should provide encap
> and uplink port actions in the mirror action list and PMD validates
> this condition (to make sure we cover the hardware limitation).
>
> This patch adds the validation for E-Switch mirror flow rule checking
> and rejects as invalid.
>
> Fixes: 6a951567c159 ("net/mlx5: support E-Switch mirroring and jump in one
> flow")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Jiawei Wang
> ---
Acked-by: Ori Kam
Best,
Ori
RE: [PATCH v3] net/mlx5: add indirect encap decap support
Hi, > -Original Message- > From: Rongwei Liu > Sent: Sunday, October 29, 2023 2:54 PM > To: dev@dpdk.org; Matan Azrad ; Slava Ovsiienko > ; Ori Kam ; Suanming Mou > ; NBU-Contact-Thomas Monjalon (EXTERNAL) > > Subject: [PATCH v3] net/mlx5: add indirect encap decap support > > Support the raw_encap/decap combinations in the indirect action list, and > translates to 4 types of underlayer tunnel operations: > 1. Layer 2 encapsulation like VxLAN. > 2. Layer 2 decapsulation like VxLAN. > 3. Layer 3 encapsulation like GRE. > 4. Layer 3 decapsulation like GRE. > > Each indirect action list has a unique handle ID and stands for different > tunnel > operations. The operation is shared globally with fixed patterns. It means > there > is no configuration associated with each handle ID and conf pointer should be > NULL always no matter in the action template or flow rules. > > If the handle ID mask in the action template is NULL, each flow rule can take > its > own indirect handle, otherwise, the ID in action template is used for all > rules. > The handle ID used in the flow rules must be the same type as the one in the > action template. > > Testpmd cli example: > > flow indirect_action 0 create action_id 10 transfer list actions raw_decap > index > 1 / raw_encap index 2 / end > > flow pattern_template 0 create transfer pattern_template_id 1 template eth / > ipv4 / udp / end > > flow actions_template 0 create transfer actions_template_id 1 template > indirect_list handle 10 / jump / end mask indirect_list / jump / end > > flow template_table 0 create table_id 1 group 1 priority 0 transfer > rules_number 64 pattern_template 1 actions_template 1 > > flow queue 0 create 0 template_table 1 pattern_template 0 actions_template > 0 postpone no pattern eth / ipv4 / udp / end actions indirect_list handle 11 / > jump group 10 / end > > Signed-off-by: Rongwei Liu > Acked-by: Ori Kam > Acked-by: Suanming Mou > > v3: Protect with macro to fix warning. > v2: Code rebase Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh
RE: [PATCH v3] net/mlx5: add indirect encap decap support
It has a compilation issue, @Rongwei Liu please lets fix it I missed it before integration > -Original Message- > From: Raslan Darawsheh > Sent: Sunday, October 29, 2023 4:33 PM > To: Rongwei Liu ; dev@dpdk.org; Matan Azrad > ; Slava Ovsiienko ; Ori Kam > ; Suanming Mou ; NBU- > Contact-Thomas Monjalon (EXTERNAL) > Subject: RE: [PATCH v3] net/mlx5: add indirect encap decap support > > Hi, > > > -Original Message- > > From: Rongwei Liu > > Sent: Sunday, October 29, 2023 2:54 PM > > To: dev@dpdk.org; Matan Azrad ; Slava Ovsiienko > > ; Ori Kam ; Suanming Mou > > ; NBU-Contact-Thomas Monjalon (EXTERNAL) > > > > Subject: [PATCH v3] net/mlx5: add indirect encap decap support > > > > Support the raw_encap/decap combinations in the indirect action list, > > and translates to 4 types of underlayer tunnel operations: > > 1. Layer 2 encapsulation like VxLAN. > > 2. Layer 2 decapsulation like VxLAN. > > 3. Layer 3 encapsulation like GRE. > > 4. Layer 3 decapsulation like GRE. > > > > Each indirect action list has a unique handle ID and stands for > > different tunnel operations. The operation is shared globally with > > fixed patterns. It means there is no configuration associated with > > each handle ID and conf pointer should be NULL always no matter in the > action template or flow rules. > > > > If the handle ID mask in the action template is NULL, each flow rule > > can take its own indirect handle, otherwise, the ID in action template is > > used > for all rules. > > The handle ID used in the flow rules must be the same type as the one > > in the action template. > > > > Testpmd cli example: > > > > flow indirect_action 0 create action_id 10 transfer list actions > > raw_decap index > > 1 / raw_encap index 2 / end > > > > flow pattern_template 0 create transfer pattern_template_id 1 template > > eth / > > ipv4 / udp / end > > > > flow actions_template 0 create transfer actions_template_id 1 template > > indirect_list handle 10 / jump / end mask indirect_list / jump / end > > > > flow template_table 0 create table_id 1 group 1 priority 0 transfer > > rules_number 64 pattern_template 1 actions_template 1 > > > > flow queue 0 create 0 template_table 1 pattern_template 0 > > actions_template > > 0 postpone no pattern eth / ipv4 / udp / end actions indirect_list > > handle 11 / jump group 10 / end > > > > Signed-off-by: Rongwei Liu > > Acked-by: Ori Kam > > Acked-by: Suanming Mou > > > > v3: Protect with macro to fix warning. > > v2: Code rebase > > Patch applied to next-net-mlx, > > Kindest regards, > Raslan Darawsheh
[PATCH v4] net/mlx5: add indirect encap decap support
Support the raw_encap/decap combinations in the indirect action
list, and translates to 4 types of underlayer tunnel operations:
1. Layer 2 encapsulation like VxLAN.
2. Layer 2 decapsulation like VxLAN.
3. Layer 3 encapsulation like GRE.
4. Layer 3 decapsulation like GRE.
Each indirect action list has a unique handle ID and stands for
different tunnel operations. The operation is shared globally with
fixed patterns. It means there is no configuration associated with
each handle ID and conf pointer should be NULL always no matter in
the action template or flow rules.
If the handle ID mask in the action template is NULL, each flow rule
can take its own indirect handle, otherwise, the ID in action template
is used for all rules.
The handle ID used in the flow rules must be the same type as the one
in the action template.
Testpmd cli example:
flow indirect_action 0 create action_id 10 transfer list actions
raw_decap index 1 / raw_encap index 2 / end
flow pattern_template 0 create transfer pattern_template_id 1 template
eth / ipv4 / udp / end
flow actions_template 0 create transfer actions_template_id 1 template
indirect_list handle 10 / jump / end mask indirect_list / jump / end
flow template_table 0 create table_id 1 group 1 priority 0 transfer
rules_number 64 pattern_template 1 actions_template 1
flow queue 0 create 0 template_table 1 pattern_template 0
actions_template 0 postpone no pattern eth / ipv4 / udp / end actions
indirect_list handle 11 / jump group 10 / end
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
v4, v3: add macro to fix build failure
v2: rebase
---
drivers/net/mlx5/mlx5_flow.c| 7 +
drivers/net/mlx5/mlx5_flow.h| 16 ++
drivers/net/mlx5/mlx5_flow_hw.c | 323
3 files changed, 346 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index a500afd4f7..12efc75e6d 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -66,6 +66,9 @@ void
mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
+#ifdef HAVE_MLX5_HWS_SUPPORT
+ struct rte_flow_error error;
+#endif
while (!LIST_EMPTY(&priv->indirect_list_head)) {
struct mlx5_indirect_list *e =
@@ -80,6 +83,10 @@ mlx5_indirect_list_handles_release(struct rte_eth_dev *dev)
case MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY:
mlx5_destroy_legacy_indirect(dev, e);
break;
+ case MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT:
+ mlx5_reformat_action_destroy(dev,
+ (struct rte_flow_action_list_handle *)e,
&error);
+ break;
#endif
default:
DRV_LOG(ERR, "invalid indirect list type");
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 3ea2548d2b..2b94a4355c 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -101,6 +101,7 @@ enum mlx5_indirect_list_type {
MLX5_INDIRECT_ACTION_LIST_TYPE_ERR = 0,
MLX5_INDIRECT_ACTION_LIST_TYPE_LEGACY = 1,
MLX5_INDIRECT_ACTION_LIST_TYPE_MIRROR = 2,
+ MLX5_INDIRECT_ACTION_LIST_TYPE_REFORMAT = 3,
};
/**
@@ -1366,6 +1367,8 @@ struct mlx5_hw_jump_action {
/* Encap decap action struct. */
struct mlx5_hw_encap_decap_action {
+ struct mlx5_indirect_list indirect;
+ enum mlx5dr_action_type action_type;
struct mlx5dr_action *action; /* Action object. */
/* Is header_reformat action shared across flows in table. */
bool shared;
@@ -2426,6 +2429,16 @@ const struct rte_flow_action *mlx5_flow_find_action
int mlx5_validate_action_rss(struct rte_eth_dev *dev,
const struct rte_flow_action *action,
struct rte_flow_error *error);
+
+struct mlx5_hw_encap_decap_action*
+mlx5_reformat_action_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
+ const struct rte_flow_action *encap_action,
+ const struct rte_flow_action *decap_action,
+ struct rte_flow_error *error);
+int mlx5_reformat_action_destroy(struct rte_eth_dev *dev,
+struct rte_flow_action_list_handle *handle,
+struct rte_flow_error *error);
int mlx5_flow_validate_action_count(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
struct rte_flow_error *error);
@@ -2859,5 +2872,8 @@ mlx5_hw_mirror_destroy(struct rte_eth_dev *dev, struct
mlx5_mirror *mirror);
void
mlx5_destroy_legacy_indirect(struct rte_eth_dev *dev,
struct mlx5_indirect_list *ptr);
+void
+mlx5_hw_decap_encap_destroy(struct rte_eth_dev
RE: [PATCH v3] net/mlx5: reuse reformat and modify header actions in a table
> -Original Message-
> From: Gregory Etelson
> Sent: Sunday, September 24, 2023 12:41 PM
>
> If application defined several actions templates with non-shared
> reformat or modify headers actions AND used these templates to create
> a table, HWS could share reformat or modify headers resources,
> instead of creating a resource for each action template.
>
> The patch activates HWS code in a way that provides reformat or
> modify header resources sharing.
>
> The patch updates modify field and raw encap template actions
> validations:
> - modify field does not allow empty action template masks.
> - raw encap added action template mask validation.
>
> Signed-off-by: Gregory Etelson
> ---
> Depends-on: series-28881 ("net/mlx5/hws: add support for multi pattern")
> ---
> v2: remove Depends-on: patch
> v3: add Depends-on: series
> ---
Acked-by: Ori Kam
Best,
Ori
RE: [PATCH v2 2/2] net/mlx5: support new RSS symmetric hash function
> -Original Message- > From: Xueming(Steven) Li > Sent: Sunday, August 27, 2023 11:18 AM > > This patch supports the new RSS symmetric hash function: > RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ_SORT > > The new hash function makes symmetric hash result by swapping > the source and destination IP and L4 port automatically. > > Signed-off-by: Xueming Li > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH 1/2] net/mlx5/hws: add support for random number match
> -Original Message- > From: Michael Baum > Sent: Tuesday, August 22, 2023 1:36 PM > From: Erez Shitrit > > The HW adds a random number per each hash, this value can be used for > statistic calculation over the packets, for example by setting one bit in > the mask of that filed we will get half of the traffic in the flow, and > so on with the rest of the mask. > > Signed-off-by: Erez Shitrit > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH 2/2] net/mlx5: add random item support
> -Original Message- > From: Michael Baum > Sent: Tuesday, August 22, 2023 1:36 PM > Add support for random item in HWS mode. > > Signed-off-by: Michael Baum > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH 4/5] net/mlx5/hws: supporting default miss table in HWS
> -Original Message- > From: Itamar Gozlan > Sent: Monday, September 18, 2023 3:07 PM > > A default miss table is a way to define what happens to traffic that does > not match any rule in a specific table. In hws, this is done by connecting > the source table to the target table using the RTC. > This ensures that traffic that does not match any rule in the source table > is forwarded to the target table. > Issue: 3441251 > > Signed-off-by: Itamar Gozlan > --- Acked-by: Ori Kam Best, Ori
RE: [PATCH] net/mlx5: supporting group set miss actions API
> -Original Message-
> From: Tomer Shmilovich
> Sent: Tuesday, September 26, 2023 6:59 PM
> Subject: [PATCH] net/mlx5: supporting group set miss actions API
>
> Add implementation for rte_flow_group_set_miss_actions() API.
>
> Signed-off-by: Tomer Shmilovich
> ---
> Depends-on: series-29572 ("ethdev: add group set miss actions API")
> Depends-on: patch-130772 ("net/mlx5: fix jump ipool entry size")
> Depends-on: patch-131567 ("net/mlx5/hws: supporting default miss table in
> HWS")
>
Acked-by: Ori Kam
Best,
Ori
[PATCH 01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data
New mlx5dr_context member replaces mlx5dr_cmd_query_caps.
Capabilities structure is a member of mlx5dr_context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c
b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 95b5d4b70e..75ba46b966 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1092,7 +1092,7 @@ mlx5dr_definer_conv_item_gtp(struct
mlx5dr_definer_conv_data *cd,
return rte_errno;
}
- if (m->hdr.teid) {
+ if (m->teid) {
if (!(caps->flex_protocols & MLX5_HCA_FLEX_GTPU_TEID_ENABLED)) {
rte_errno = ENOTSUP;
return rte_errno;
@@ -1118,7 +1118,7 @@ mlx5dr_definer_conv_item_gtp(struct
mlx5dr_definer_conv_data *cd,
}
- if (m->hdr.msg_type) {
+ if (m->msg_type) {
if (!(caps->flex_protocols & MLX5_HCA_FLEX_GTPU_DW_0_ENABLED)) {
rte_errno = ENOTSUP;
return rte_errno;
--
2.39.2
[PATCH 02/30] net/mlx5: add flow_hw_get_reg_id_from_ctx()
The new function call `flow_hw_get_reg_id_from_ctx()` maps input
DR5 context and register type to REG_C register.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 3ea2548d2b..92dfd9a3a4 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1711,6 +1711,28 @@ flow_hw_get_reg_id(enum rte_flow_item_type type,
uint32_t id)
}
}
+static __rte_always_inline int
+flow_hw_get_reg_id_from_ctx(void *dr_ctx,
+ enum rte_flow_item_type type, uint32_t id)
+{
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+ uint16_t port;
+
+ MLX5_ETH_FOREACH_DEV(port, NULL) {
+ struct mlx5_priv *priv;
+
+ priv = rte_eth_devices[port].data->dev_private;
+ if (priv->dr_ctx == dr_ctx)
+ return flow_hw_get_reg_id(type, id);
+ }
+#else
+ RTE_SET_USED(dr_ctx);
+ RTE_SET_USED(type);
+ RTE_SET_USED(id);
+#endif
+ return REG_NON;
+}
+
void flow_hw_set_port_info(struct rte_eth_dev *dev);
void flow_hw_clear_port_info(struct rte_eth_dev *dev);
--
2.39.2
[PATCH 03/30] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call
New function call `flow_hw_get_reg_id_from_ctx()` matches REG_C
register to input DR5 context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c
b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 75ba46b966..0f53c1e3b5 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1448,7 +1448,9 @@ mlx5dr_definer_conv_item_tag(struct
mlx5dr_definer_conv_data *cd,
return 0;
if (item->type == RTE_FLOW_ITEM_TYPE_TAG)
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, v->index);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
+ RTE_FLOW_ITEM_TYPE_TAG,
+ v->index);
else
reg = (int)v->index;
@@ -1508,7 +1510,9 @@ mlx5dr_definer_conv_item_quota(struct
mlx5dr_definer_conv_data *cd,
__rte_unused struct rte_flow_item *item,
int item_idx)
{
- int mtr_reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ int mtr_reg =
+ flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_METER_COLOR,
+ 0);
struct mlx5dr_definer_fc *fc;
if (mtr_reg < 0) {
@@ -1538,7 +1542,7 @@ mlx5dr_definer_conv_item_metadata(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, -1);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_META, -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item metadata");
rte_errno = EINVAL;
@@ -1748,7 +1752,8 @@ mlx5dr_definer_conv_item_conntrack(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_CONNTRACK, -1);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_CONNTRACK,
+ -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item conntrack");
rte_errno = EINVAL;
@@ -1889,7 +1894,8 @@ mlx5dr_definer_conv_item_meter_color(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
+ RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
MLX5_ASSERT(reg > 0);
fc = mlx5dr_definer_get_register_fc(cd, reg);
--
2.39.2
[PATCH 04/30] net/mlx5: add rte_device parameter to locate HWS registers
1. Add rte_eth_dev parameter to the `flow_hw_get_reg_id()`
2. Add mlx5_flow_hw_get_reg_id()
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 2 +-
drivers/net/mlx5/mlx5_flow.h| 13 +++--
drivers/net/mlx5/mlx5_flow_dv.c | 12 ++--
drivers/net/mlx5/mlx5_flow_hw.c | 7 +++
4 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index a500afd4f7..45a67607ed 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1718,7 +1718,7 @@ flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
}
}
-static void
+void
flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 92dfd9a3a4..9344b5178a 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1678,8 +1678,10 @@ void flow_hw_clear_flow_metadata_config(void);
* TODO: Per port / device, FDB or NIC for Meta matching.
*/
static __rte_always_inline int
-flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)
+flow_hw_get_reg_id(struct rte_eth_dev *dev,
+ enum rte_flow_item_type type, uint32_t id)
{
+ RTE_SET_USED(dev);
switch (type) {
case RTE_FLOW_ITEM_TYPE_META:
#ifdef HAVE_MLX5_HWS_SUPPORT
@@ -1723,7 +1725,8 @@ flow_hw_get_reg_id_from_ctx(void *dr_ctx,
priv = rte_eth_devices[port].data->dev_private;
if (priv->dr_ctx == dr_ctx)
- return flow_hw_get_reg_id(type, id);
+ return flow_hw_get_reg_id(&rte_eth_devices[port],
+ type, id);
}
#else
RTE_SET_USED(dr_ctx);
@@ -2874,6 +2877,12 @@ flow_hw_get_srh_flex_parser_byte_off_from_ctx(void
*dr_ctx __rte_unused)
}
void
mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);
+void
+flow_rxq_mark_flag_set(struct rte_eth_dev *dev);
+int
+mlx5_flow_hw_get_reg_id(struct mlx5dr_context *ctx,
+ enum rte_flow_item_type type, uint32_t id);
+
#ifdef HAVE_MLX5_HWS_SUPPORT
struct mlx5_mirror;
void
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 3dc2fe5c71..05a374493d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1919,8 +1919,8 @@ mlx5_flow_field_id_to_modify_info
off_be = (tag_index == MLX5_LINEAR_HASH_TAG_INDEX) ?
16 - (data->offset + width) + 16 :
data->offset;
if (priv->sh->config.dv_flow_en == 2)
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG,
-tag_index);
+ reg = flow_hw_get_reg_id(dev,
RTE_FLOW_ITEM_TYPE_TAG,
+data->level);
else
reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
tag_index, error);
@@ -2025,7 +2025,7 @@ mlx5_flow_field_id_to_modify_info
if (priv->sh->config.dv_flow_en == 2)
reg = flow_hw_get_reg_id
- (RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ (dev, RTE_FLOW_ITEM_TYPE_METER_COLOR,
0);
else
reg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR,
0, error);
@@ -10256,7 +10256,7 @@ flow_dv_translate_item_meta(struct rte_eth_dev *dev,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = flow_dv_get_metadata_reg(dev, attr, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, 0);
+ reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_META, 0);
if (reg < 0)
return;
MLX5_ASSERT(reg != REG_NON);
@@ -10359,7 +10359,7 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev,
void *key,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, index, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, index);
+ reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, index);
MLX5_ASSERT(reg > 0);
flow_dv_match_meta_reg(key, (enum modify_reg)reg, tag_v->data,
tag_m->data);
}
@@ -11057,7 +11057,7 @@ flow_dv_translate_item_meter_color(struct rte_eth_dev
*dev, void *key,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ reg = flow_hw_get_reg_id(dev,
[PATCH 05/30] net/mlx5: separate port REG_C registers usage
Current implementation stored REG_C registers available for HWS tags
in PMD global array. As the result, PMD could not work properly with
different port types that allocate REG_C registers differently.
The patch stores registers available to a port in the port
shared context. Register values will be assigned according to the port
capabilities.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/common/mlx5/mlx5_prm.h | 12 +++
drivers/net/mlx5/linux/mlx5_os.c | 16 ++--
drivers/net/mlx5/mlx5.c| 4 -
drivers/net/mlx5/mlx5.h| 11 ++-
drivers/net/mlx5/mlx5_flow.c | 29 ++-
drivers/net/mlx5/mlx5_flow.h | 25 ++
drivers/net/mlx5/mlx5_flow_dv.c| 13 +--
drivers/net/mlx5/mlx5_flow_hw.c| 129 -
drivers/net/mlx5/mlx5_flow_meter.c | 14 ++--
9 files changed, 78 insertions(+), 175 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index bced5a59dd..e13ca3cd22 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -864,6 +864,18 @@ enum modify_reg {
REG_C_11,
};
+static __rte_always_inline uint8_t
+mlx5_regc_index(enum modify_reg regc_val)
+{
+ return (uint8_t)(regc_val - REG_C_0);
+}
+
+static __rte_always_inline enum modify_reg
+mlx5_regc_value(uint8_t regc_ix)
+{
+ return REG_C_0 + regc_ix;
+}
+
/* Modification sub command. */
struct mlx5_modification_cmd {
union {
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index d5ef695e6d..96d32d11d8 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1328,14 +1328,14 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
* Prefer REG_C_3 if it is available.
*/
if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- priv->mtr_color_reg = REG_C_3;
+ sh->registers.mtr_color_reg = REG_C_3;
else
- priv->mtr_color_reg = ffs(reg_c_mask)
- - 1 + REG_C_0;
+ sh->registers.mtr_color_reg =
+ ffs(reg_c_mask) - 1 + REG_C_0;
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- priv->mtr_color_reg);
+ sh->registers.mtr_color_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1360,7 +1360,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_2_3 = 1;
#endif
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
- if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
+ if (hca_attr->flow_hit_aso && sh->registers.mtr_color_reg ==
REG_C_3) {
sh->flow_hit_aso_en = 1;
err = mlx5_flow_aso_age_mng_init(sh);
if (err) {
@@ -1374,7 +1374,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
defined (HAVE_MLX5_DR_ACTION_ASO_CT)
/* HWS create CT ASO SQ based on HWS configure queue number. */
if (sh->config.dv_flow_en != 2 &&
- hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
+ hca_attr->ct_offload && sh->registers.mtr_color_reg ==
REG_C_3) {
err = mlx5_flow_aso_ct_mng_init(sh);
if (err) {
err = -err;
@@ -1618,8 +1618,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
goto error;
}
/* Only HWS requires this information. */
- flow_hw_init_tags_set(eth_dev);
- flow_hw_init_flow_metadata_config(eth_dev);
+ if (sh->refcnt == 1)
+ flow_hw_init_tags_set(eth_dev);
if (priv->sh->config.dv_esw_en &&
flow_hw_create_vport_action(eth_dev)) {
DRV_LOG(ERR, "port %u failed to create vport action",
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 08b7b03365..c13ce2c13c 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -2173,10 +2173,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
flow_hw_destroy_vport_action(dev);
flow_hw_resource_release(dev);
flow_hw_clear_port_info(dev);
- if (priv->sh->config.dv_flow_en == 2) {
- flow_hw_clear_flow_metadata_config();
- flow_hw_clear_tags_set(dev);
- }
#endif
if
[PATCH 06/30] net/mlx5: merge REG_C aliases
Merge `mtr_color_reg` and `mlx5_flow_hw_aso_tag`
into `aso_reg`
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 10 +-
drivers/net/mlx5/mlx5.h| 3 +--
drivers/net/mlx5/mlx5_flow.c | 16
drivers/net/mlx5/mlx5_flow.h | 3 +--
drivers/net/mlx5/mlx5_flow_dv.c| 7 ---
drivers/net/mlx5/mlx5_flow_hw.c| 3 +--
drivers/net/mlx5/mlx5_flow_meter.c | 4 ++--
7 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 96d32d11d8..ed273e14cf 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1328,14 +1328,14 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
* Prefer REG_C_3 if it is available.
*/
if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- sh->registers.mtr_color_reg = REG_C_3;
+ sh->registers.aso_reg = REG_C_3;
else
- sh->registers.mtr_color_reg =
+ sh->registers.aso_reg =
ffs(reg_c_mask) - 1 + REG_C_0;
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- sh->registers.mtr_color_reg);
+ sh->registers.aso_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1360,7 +1360,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_2_3 = 1;
#endif
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
- if (hca_attr->flow_hit_aso && sh->registers.mtr_color_reg ==
REG_C_3) {
+ if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3)
{
sh->flow_hit_aso_en = 1;
err = mlx5_flow_aso_age_mng_init(sh);
if (err) {
@@ -1374,7 +1374,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
defined (HAVE_MLX5_DR_ACTION_ASO_CT)
/* HWS create CT ASO SQ based on HWS configure queue number. */
if (sh->config.dv_flow_en != 2 &&
- hca_attr->ct_offload && sh->registers.mtr_color_reg ==
REG_C_3) {
+ hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
err = mlx5_flow_aso_ct_mng_init(sh);
if (err) {
err = -err;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 01cb21fc93..99a2ad88ed 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1376,8 +1376,7 @@ struct mlx5_hws_cnt_svc_mng {
#define MLX5_FLOW_HW_TAGS_MAX 8
struct mlx5_dev_registers {
- enum modify_reg mlx5_flow_hw_aso_tag;
- enum modify_reg mtr_color_reg; /* Meter color match REG_C. */
+ enum modify_reg aso_reg;
enum modify_reg hw_avl_tags[MLX5_FLOW_HW_TAGS_MAX];
};
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 3ddc3ba772..ad9a2f2273 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1364,23 +1364,23 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
* should use the meter color register for match.
*/
if (priv->mtr_reg_share)
- return reg->mtr_color_reg;
+ return reg->aso_reg;
else
- return reg->mtr_color_reg != REG_C_2 ? REG_C_2 :
+ return reg->aso_reg != REG_C_2 ? REG_C_2 :
REG_C_3;
case MLX5_MTR_COLOR:
case MLX5_ASO_FLOW_HIT:
case MLX5_ASO_CONNTRACK:
case MLX5_SAMPLE_ID:
/* All features use the same REG_C. */
- MLX5_ASSERT(reg->mtr_color_reg != REG_NON);
- return reg->mtr_color_reg;
+ MLX5_ASSERT(reg->aso_reg != REG_NON);
+ return reg->aso_reg;
case MLX5_COPY_MARK:
/*
* Metadata COPY_MARK register using is in meter suffix sub
* flow while with meter. It's safe to share the same register.
*/
- return reg->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
+ return reg->aso_reg != REG_C_2 ? REG_C_2 : REG_C_3;
case MLX5_APP_TAG:
/*
* If meter is enable, it will engage the register for color
@@ -1389,7 +1389,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
* match.
* If meter is
[PATCH 07/30] net/mlx5: initialize HWS flow tags registers in shared dev context
Move HWS flow tags registers initialization to shared dev context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 35 ++-
drivers/net/mlx5/mlx5.c | 75
drivers/net/mlx5/mlx5.h | 6 +++
drivers/net/mlx5/mlx5_flow.h | 3 --
drivers/net/mlx5/mlx5_flow_hw.c | 34 ---
5 files changed, 84 insertions(+), 69 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index ed273e14cf..ec067ef52c 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1304,38 +1304,12 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
sh->steering_format_version = hca_attr->steering_format_version;
-#if defined(HAVE_MLX5DV_DR) && \
- (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
-defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
+#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
sh->config.dv_flow_en) {
- uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
- /*
-* Meter needs two REG_C's for color match and pre-sfx
-* flow match. Here get the REG_C for color match.
-* REG_C_0 and REG_C_1 is reserved for metadata feature.
-*/
- reg_c_mask &= 0xfc;
- if (rte_popcount32(reg_c_mask) < 1) {
- priv->mtr_en = 0;
- DRV_LOG(WARNING, "No available register for"
- " meter.");
- } else {
- /*
-* The meter color register is used by the
-* flow-hit feature as well.
-* The flow-hit feature must use REG_C_3
-* Prefer REG_C_3 if it is available.
-*/
- if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- sh->registers.aso_reg = REG_C_3;
- else
- sh->registers.aso_reg =
- ffs(reg_c_mask) - 1 + REG_C_0;
+ if (sh->registers.aso_reg != REG_NON) {
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
- DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- sh->registers.aso_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1358,7 +1332,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_0_1 = 1;
if (hca_attr->flow.tunnel_header_2_3)
sh->tunnel_header_2_3 = 1;
-#endif
+#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3)
{
sh->flow_hit_aso_en = 1;
@@ -1617,9 +1591,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
err = ENOTSUP;
goto error;
}
- /* Only HWS requires this information. */
- if (sh->refcnt == 1)
- flow_hw_init_tags_set(eth_dev);
if (priv->sh->config.dv_esw_en &&
flow_hw_create_vport_action(eth_dev)) {
DRV_LOG(ERR, "port %u failed to create vport action",
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index c13ce2c13c..840c566162 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1599,6 +1599,80 @@ mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,
}
}
+static void
+mlx5_init_hws_flow_tags_registers(struct mlx5_dev_ctx_shared *sh)
+{
+ struct mlx5_dev_registers *reg = &sh->registers;
+ uint32_t meta_mode = sh->config.dv_xmeta_en;
+ uint8_t masks = (uint8_t)sh->cdev->config.hca_attr.set_reg_c;
+ uint8_t unset = 0;
+ uint32_t i, j;
+
+ /*
+* The CAPA is global for common device but only used in net.
+* It is shared per eswitch domain.
+*/
+ if (reg->aso_reg != REG_NON)
+ unset |= 1 << mlx5_regc_index(reg->aso_reg);
+ unset |= 1 << mlx5_regc_index(REG_C_6);
+ if (sh->config.dv_esw_en)
+ unset |= 1 << mlx5_regc_index(REG_C_0);
+ if (meta_mode == MLX5_XMETA_MODE_META32_HWS)
+ unset |= 1 << mlx5_re
[PATCH 08/30] net/mlx5/hws: adding method to query rule hash
From: Itamar Gozlan
Add a method to the HW steering API that allows querying
the hash result for a given matcher and a set of items. This
can be used to predict the location of the rule in the hash table.
Signed-off-by: Itamar Gozlan
---
drivers/common/mlx5/mlx5_prm.h | 8 +++-
drivers/net/mlx5/hws/meson.build | 1 +
drivers/net/mlx5/hws/mlx5dr.h | 26 +++
drivers/net/mlx5/hws/mlx5dr_cmd.c | 3 ++
drivers/net/mlx5/hws/mlx5dr_cmd.h | 3 +-
drivers/net/mlx5/hws/mlx5dr_crc32.c| 61 ++
drivers/net/mlx5/hws/mlx5dr_crc32.h| 13 ++
drivers/net/mlx5/hws/mlx5dr_internal.h | 1 +
drivers/net/mlx5/hws/mlx5dr_rule.c | 37
drivers/net/mlx5/hws/mlx5dr_rule.h | 1 +
10 files changed, 152 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.c
create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.h
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index e13ca3cd22..19c6d0282b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2279,6 +2279,9 @@ enum {
MLX5_GENERATE_WQE_TYPE_FLOW_UPDATE = 1 << 1,
};
+enum {
+ MLX5_FLOW_TABLE_HASH_TYPE_CRC32,
+};
/*
* HCA Capabilities 2
*/
@@ -2328,7 +2331,10 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
u8 format_select_dw_gtpu_dw_2[0x8];
u8 format_select_dw_gtpu_first_ext_dw_0[0x8];
u8 generate_wqe_type[0x20];
- u8 reserved_at_2c0[0x540];
+ u8 reserved_at_2c0[0x160];
+ u8 reserved_at_420[0x1c];
+ u8 flow_table_hash_type[0x4];
+ u8 reserved_at_440[0x3c0];
};
struct mlx5_ifc_esw_cap_bits {
diff --git a/drivers/net/mlx5/hws/meson.build b/drivers/net/mlx5/hws/meson.build
index 38776d5163..bbcc628557 100644
--- a/drivers/net/mlx5/hws/meson.build
+++ b/drivers/net/mlx5/hws/meson.build
@@ -19,4 +19,5 @@ sources += files(
'mlx5dr_definer.c',
'mlx5dr_debug.c',
'mlx5dr_pat_arg.c',
+'mlx5dr_crc32.c',
)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 1995c55132..39d902e762 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -118,6 +118,11 @@ enum mlx5dr_matcher_distribute_mode {
MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR = 0x1,
};
+enum mlx5dr_rule_hash_calc_mode {
+ MLX5DR_RULE_HASH_CALC_MODE_RAW,
+ MLX5DR_RULE_HASH_CALC_MODE_IDX,
+};
+
struct mlx5dr_matcher_attr {
/* Processing priority inside table */
uint32_t priority;
@@ -430,6 +435,27 @@ int mlx5dr_rule_action_update(struct mlx5dr_rule
*rule_handle,
struct mlx5dr_rule_action rule_actions[],
struct mlx5dr_rule_attr *attr);
+/* Calculate hash for a given set of items, which indicates rule location in
+ * the hash table.
+ *
+ * @param[in] matcher
+ * The matcher of the created rule.
+ * @param[in] items
+ * Matching pattern item definition.
+ * @param[in] mt_idx
+ * Match template index that the match was created with.
+ * @param[in] mode
+ * Hash calculation mode
+ * @param[in, out] ret_hash
+ * Returned calculated hash result
+ * @return zero on success non zero otherwise.
+ */
+int mlx5dr_rule_hash_calculate(struct mlx5dr_matcher *matcher,
+ const struct rte_flow_item items[],
+ uint8_t mt_idx,
+ enum mlx5dr_rule_hash_calc_mode mode,
+ uint32_t *ret_hash);
+
/* Create direct rule drop action.
*
* @param[in] ctx
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c
b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 781de40c02..c52cdd0767 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1154,6 +1154,9 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,
(res & MLX5_CROSS_VHCA_ALLOWED_OBJS_FT) &&
(res & MLX5_CROSS_VHCA_ALLOWED_OBJS_RTC);
+ caps->flow_table_hash_type = MLX5_GET(query_hca_cap_out, out,
+
capability.cmd_hca_cap_2.flow_table_hash_type);
+
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE |
MLX5_HCA_CAP_OPMOD_GET_CUR);
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h
b/drivers/net/mlx5/hws/mlx5dr_cmd.h
index 28e5ea4726..03db62e2e2 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h
@@ -217,10 +217,11 @@ struct mlx5dr_cmd_query_caps {
uint8_t rtc_log_depth_max;
uint8_t format_select_gtpu_dw_0;
uint8_t format_select_gtpu_dw_1;
+ uint8_t flow_table_hash_type;
uint8_t format_select_gtpu_dw_2;
uint8_t format_select_gtpu_ext_dw_0;
- uint32_t linear_match_definer;
uint8_t access_index_mode;
+ uint32_t linear_match_def
[PATCH 09/30] net/mlx5: add support for calc hash
From: Ori Kam
This commit adds calculate hash function support for mlx5 PMD.
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 32
drivers/net/mlx5/mlx5_flow.h| 8
drivers/net/mlx5/mlx5_flow_hw.c | 31 ++-
3 files changed, 70 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index ad9a2f2273..819831cff8 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1178,6 +1178,13 @@ mlx5_flow_async_action_list_handle_query_update(struct
rte_eth_dev *dev,
enum rte_flow_query_update_mode
mode,
void *user_data,
struct rte_flow_error *error);
+static int
+mlx5_flow_calc_table_hash(struct rte_eth_dev *dev,
+ const struct rte_flow_template_table *table,
+ const struct rte_flow_item pattern[],
+ uint8_t pattern_template_index,
+ uint32_t *hash, struct rte_flow_error *error);
+
static const struct rte_flow_ops mlx5_flow_ops = {
.validate = mlx5_flow_validate,
.create = mlx5_flow_create,
@@ -1231,6 +1238,7 @@ static const struct rte_flow_ops mlx5_flow_ops = {
mlx5_flow_action_list_handle_query_update,
.async_action_list_handle_query_update =
mlx5_flow_async_action_list_handle_query_update,
+ .flow_calc_table_hash = mlx5_flow_calc_table_hash,
};
/* Tunnel information. */
@@ -11058,6 +11066,30 @@ mlx5_flow_async_action_list_handle_query_update(struct
rte_eth_dev *dev,
}
+static int
+mlx5_flow_calc_table_hash(struct rte_eth_dev *dev,
+ const struct rte_flow_template_table *table,
+ const struct rte_flow_item pattern[],
+ uint8_t pattern_template_index,
+ uint32_t *hash, struct rte_flow_error *error)
+{
+ struct rte_flow_attr attr = { .transfer = 0 };
+ enum mlx5_flow_drv_type drv_type = flow_get_drv_type(dev, &attr);
+ const struct mlx5_flow_driver_ops *fops;
+
+ if (drv_type == MLX5_FLOW_TYPE_MIN || drv_type == MLX5_FLOW_TYPE_MAX)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ NULL, "invalid driver type");
+ fops = flow_get_drv_ops(drv_type);
+ if (!fops || !fops->action_query_update)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ NULL, "no query_update handler");
+ return fops->flow_calc_table_hash(dev, table, pattern,
pattern_template_index,
+ hash, error);
+}
+
/**
* Destroy all indirect actions (shared RSS).
*
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index aea8b38f39..64e2fc6f04 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -2059,6 +2059,13 @@ typedef int
const void **update, void **query,
enum rte_flow_query_update_mode mode,
void *user_data, struct rte_flow_error *error);
+typedef int
+(*mlx5_flow_calc_table_hash_t)
+ (struct rte_eth_dev *dev,
+const struct rte_flow_template_table *table,
+const struct rte_flow_item pattern[],
+uint8_t pattern_template_index,
+uint32_t *hash, struct rte_flow_error *error);
struct mlx5_flow_driver_ops {
mlx5_flow_validate_t validate;
@@ -2130,6 +2137,7 @@ struct mlx5_flow_driver_ops {
action_list_handle_query_update;
mlx5_flow_async_action_list_handle_query_update_t
async_action_list_handle_query_update;
+ mlx5_flow_calc_table_hash_t flow_calc_table_hash;
};
/* mlx5_flow.c */
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b0ef14c14e..67ef272a2d 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2773,7 +2773,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,
static const struct rte_flow_item *
flow_hw_get_rule_items(struct rte_eth_dev *dev,
- struct rte_flow_template_table *table,
+ const struct rte_flow_template_table *table,
const struct rte_flow_item items[],
uint8_t pattern_template_index,
struct mlx5_hw_q_job *job)
@@ -10143,6 +10143,34 @@ flow_hw_action_list_handle_query_update(struct
rte_eth_dev *dev,
update, query, mode, NULL, error);
}
[PATCH 10/30] net/mlx5: fix insert by index
From: Ori Kam
Due to mlx5dr internal logic calling the rule_create function
must have items structure.
This commit create such temp structure.
Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
Cc: ere...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 67ef272a2d..9e549a1ba2 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2987,6 +2987,7 @@ flow_hw_async_flow_create_by_index(struct rte_eth_dev
*dev,
void *user_data,
struct rte_flow_error *error)
{
+ struct rte_flow_item items[] = {{.type = RTE_FLOW_ITEM_TYPE_END,}};
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5dr_rule_attr rule_attr = {
.queue_id = queue,
@@ -3050,7 +3051,7 @@ flow_hw_async_flow_create_by_index(struct rte_eth_dev
*dev,
goto free;
}
ret = mlx5dr_rule_create(table->matcher,
-0, NULL, action_template_index, rule_acts,
+0, items, action_template_index, rule_acts,
&rule_attr, (struct mlx5dr_rule *)flow->rule);
if (likely(!ret))
return (struct rte_flow *)flow;
--
2.39.2
[PATCH 11/30] net/mlx5: fix query for NIC flow cap
From: Ori Kam
Add query for nic flow table support bit.
Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bi...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index ff2d6d10b7..3afb2e9f80 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1082,6 +1082,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->striding_rq = MLX5_GET(cmd_hca_cap, hcattr, striding_rq);
attr->ext_stride_num_range =
MLX5_GET(cmd_hca_cap, hcattr, ext_stride_num_range);
+ attr->nic_flow_table = MLX5_GET(cmd_hca_cap, hcattr, nic_flow_table);
attr->max_flow_counter_15_0 = MLX5_GET(cmd_hca_cap, hcattr,
max_flow_counter_15_0);
attr->max_flow_counter_31_16 = MLX5_GET(cmd_hca_cap, hcattr,
--
2.39.2
[PATCH 12/30] net/mlx5: add support for more registers
From: Ori Kam
This commit adds the support for a additional registers that were added
to the HW.
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 16 +
drivers/common/mlx5/mlx5_devx_cmds.h | 2 +-
drivers/common/mlx5/mlx5_prm.h | 36
drivers/net/mlx5/mlx5.c | 4 ++--
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_flow_dv.c | 4
drivers/net/mlx5/mlx5_flow_hw.c | 2 +-
7 files changed, 53 insertions(+), 13 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 3afb2e9f80..4d8818924a 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1229,7 +1229,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->modify_outer_ip_ecn = MLX5_GET
(flow_table_nic_cap, hcattr,
ft_header_modify_nic_receive.outer_ip_ecn);
- attr->set_reg_c = 0xff;
+ attr->set_reg_c = 0x;
if (attr->nic_flow_table) {
#define GET_RX_REG_X_BITS \
MLX5_GET(flow_table_nic_cap, hcattr, \
@@ -1238,10 +1238,16 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
MLX5_GET(flow_table_nic_cap, hcattr, \
ft_header_modify_nic_transmit.metadata_reg_c_x)
- uint32_t tx_reg, rx_reg;
+ uint32_t tx_reg, rx_reg, reg_c_8_15;
tx_reg = GET_TX_REG_X_BITS;
+ reg_c_8_15 = MLX5_GET(flow_table_nic_cap, hcattr,
+
ft_field_support_2_nic_transmit.metadata_reg_c_8_15);
+ tx_reg |= ((0xff & reg_c_8_15) << 8);
rx_reg = GET_RX_REG_X_BITS;
+ reg_c_8_15 = MLX5_GET(flow_table_nic_cap, hcattr,
+
ft_field_support_2_nic_receive.metadata_reg_c_8_15);
+ rx_reg |= ((0xff & reg_c_8_15) << 8);
attr->set_reg_c &= (rx_reg & tx_reg);
#undef GET_RX_REG_X_BITS
@@ -1371,7 +1377,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
MLX5_GET(esw_cap, hcattr, esw_manager_vport_number);
}
if (attr->eswitch_manager) {
- uint32_t esw_reg;
+ uint32_t esw_reg, reg_c_8_15;
hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
MLX5_GET_HCA_CAP_OP_MOD_ESW_FLOW_TABLE |
@@ -1380,7 +1386,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
return rc;
esw_reg = MLX5_GET(flow_table_esw_cap, hcattr,
ft_header_modify_esw_fdb.metadata_reg_c_x);
- attr->set_reg_c &= esw_reg;
+ reg_c_8_15 = MLX5_GET(flow_table_esw_cap, hcattr,
+
ft_field_support_2_esw_fdb.metadata_reg_c_8_15);
+ attr->set_reg_c &= ((0xff & reg_c_8_15) << 8) | esw_reg;
}
return 0;
error:
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
b/drivers/common/mlx5/mlx5_devx_cmds.h
index 11772431ae..7f23e925a5 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -301,7 +301,7 @@ struct mlx5_hca_attr {
uint32_t cqe_compression_128:1;
uint32_t multi_pkt_send_wqe:1;
uint32_t enhanced_multi_pkt_send_wqe:1;
- uint32_t set_reg_c:8;
+ uint32_t set_reg_c:16;
uint32_t nic_flow_table:1;
uint32_t modify_outer_ip_ecn:1;
union {
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 19c6d0282b..2b499666f8 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -840,6 +840,14 @@ enum mlx5_modification_field {
MLX5_MODI_IN_MPLS_LABEL_3,
MLX5_MODI_IN_MPLS_LABEL_4,
MLX5_MODI_OUT_IPV6_NEXT_HDR = 0x4A,
+ MLX5_MODI_META_REG_C_8 = 0x8F,
+ MLX5_MODI_META_REG_C_9 = 0x90,
+ MLX5_MODI_META_REG_C_10 = 0x91,
+ MLX5_MODI_META_REG_C_11 = 0x92,
+ MLX5_MODI_META_REG_C_12 = 0x93,
+ MLX5_MODI_META_REG_C_13 = 0x94,
+ MLX5_MODI_META_REG_C_14 = 0x95,
+ MLX5_MODI_META_REG_C_15 = 0x96,
MLX5_MODI_INVALID = INT_MAX,
};
@@ -2227,8 +2235,22 @@ struct mlx5_ifc_ft_fields_support_2_bits {
u8 inner_ipv4_checksum_ok[0x1];
u8 inner_l4_checksum_ok[0x1];
u8 outer_ipv4_checksum_ok[0x1];
- u8 outer_l4_checksum_ok[0x1];
- u8 reserved_at_20[0x60];
+ u8 outer_l4_checksum_ok[0x1]; /* end of DW0 */
+ u8 reserved_at_20[0x18];
+ union {
+ struct {
+ u8 metadata_reg_c_15[0x1];
+ u8 metadata_reg_c_14[0x1];
+ u8 metadata_reg_c_13[0x1];
+ u8 metadata_reg_c_12[0x1];
+ u8 metadata_reg_c_11[0x1];
+ u8 metadata_reg_c_10[0x1];
+ u8 metadata_reg_c_9[0x1];
+
[PATCH 13/30] net/mlx5: add validation support for tags
From: Ori Kam
This commit introduce validation for invalid tags
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index ceeb82a649..6fc649d736 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4049,7 +4049,8 @@ flow_hw_modify_field_is_used(const struct
rte_flow_action_modify_field *action,
}
static int
-flow_hw_validate_action_modify_field(const struct rte_flow_action *action,
+flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,
+const struct rte_flow_action *action,
const struct rte_flow_action *mask,
struct rte_flow_error *error)
{
@@ -4118,6 +4119,22 @@ flow_hw_validate_action_modify_field(const struct
rte_flow_action *action,
if (ret)
return ret;
}
+ if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+action_conf->dst.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+action_conf->dst.tag_index != MLX5_LINEAR_HASH_TAG_INDEX) ||
+ (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+action_conf->src.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+action_conf->src.tag_index != MLX5_LINEAR_HASH_TAG_INDEX))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+"tag index is out of range");
+ if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG,
action_conf->dst.tag_index) == REG_NON) ||
+ (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG,
action_conf->src.tag_index) == REG_NON))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "tag index is out of range");
if (mask_conf->width != UINT32_MAX)
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION, action,
@@ -4728,7 +4745,7 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev,
action_flags |= MLX5_FLOW_ACTION_METER;
break;
case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
- ret = flow_hw_validate_action_modify_field(action, mask,
+ ret = flow_hw_validate_action_modify_field(dev, action,
mask,
error);
if (ret < 0)
return ret;
@@ -5596,7 +5613,14 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,
if (tag == NULL)
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
- NULL, "Tag spec is
NULL");
+ NULL,
+ "Tag spec is NULL");
+ if (tag->index >= MLX5_FLOW_HW_TAGS_MAX &&
+ tag->index != MLX5_LINEAR_HASH_TAG_INDEX)
+ return rte_flow_error_set(error, EINVAL,
+
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+ NULL,
+ "Invalid tag index");
tag_idx = flow_hw_get_reg_id(dev,
RTE_FLOW_ITEM_TYPE_TAG, tag->index);
if (tag_idx == REG_NON)
return rte_flow_error_set(error, EINVAL,
--
2.39.2
[PATCH 14/30] net/mlx5: reuse reformat and modify header actions in a table
If application defined several actions templates with non-shared
reformat or modify headers actions AND used these templates to create
a table, HWS could share reformat or modify headers resources,
instead of creating a resource for each action template.
The patch activates HWS code in a way that provides reformat or
modify header resources sharing.
The patch updates modify field and raw encap template actions
validations:
- modify field does not allow empty action template masks.
- raw encap added action template mask validation.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.h| 8 +-
drivers/net/mlx5/mlx5_flow_dv.c | 3 +-
drivers/net/mlx5/mlx5_flow_hw.c | 583
3 files changed, 451 insertions(+), 143 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 64e2fc6f04..ddb3b7b6fd 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1368,7 +1368,9 @@ struct mlx5_hw_jump_action {
struct mlx5_hw_encap_decap_action {
struct mlx5dr_action *action; /* Action object. */
/* Is header_reformat action shared across flows in table. */
- bool shared;
+ uint32_t shared:1;
+ uint32_t multi_pattern:1;
+ volatile uint32_t *multi_pattern_refcnt;
size_t data_size; /* Action metadata size. */
uint8_t data[]; /* Action data. */
};
@@ -1382,7 +1384,9 @@ struct mlx5_hw_modify_header_action {
/* Modify header action position in action rule table. */
uint16_t pos;
/* Is MODIFY_HEADER action shared across flows in table. */
- bool shared;
+ uint32_t shared:1;
+ uint32_t multi_pattern:1;
+ volatile uint32_t *multi_pattern_refcnt;
/* Amount of modification commands stored in the precompiled buffer. */
uint32_t mhdr_cmds_num;
/* Precompiled modification commands. */
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index bdc8d0076a..84b94a9815 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -4579,7 +4579,8 @@ flow_dv_convert_encap_data(const struct rte_flow_item
*items, uint8_t *buf,
(void *)items->type,
"items total size is too big"
" for encap action");
- rte_memcpy((void *)&buf[temp_size], items->spec, len);
+ if (items->spec)
+ rte_memcpy(&buf[temp_size], items->spec, len);
switch (items->type) {
case RTE_FLOW_ITEM_TYPE_ETH:
eth = (struct rte_ether_hdr *)&buf[temp_size];
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 6fc649d736..84c78ba19c 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -71,6 +71,95 @@ struct mlx5_indlst_legacy {
enum rte_flow_action_type legacy_type;
};
+#define MLX5_CONST_ENCAP_ITEM(encap_type, ptr) \
+(((const struct encap_type *)(ptr))->definition)
+
+struct mlx5_multi_pattern_ctx {
+ union {
+ struct mlx5dr_action_reformat_header reformat_hdr;
+ struct mlx5dr_action_mh_pattern mh_pattern;
+ };
+ union {
+ /* action template auxiliary structures for object destruction
*/
+ struct mlx5_hw_encap_decap_action *encap;
+ struct mlx5_hw_modify_header_action *mhdr;
+ };
+ /* multi pattern action */
+ struct mlx5dr_rule_action *rule_action;
+};
+
+#define MLX5_MULTIPATTERN_ENCAP_NUM 4
+
+struct mlx5_tbl_multi_pattern_ctx {
+ struct {
+ uint32_t elements_num;
+ struct mlx5_multi_pattern_ctx
ctx[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];
+ } reformat[MLX5_MULTIPATTERN_ENCAP_NUM];
+
+ struct {
+ uint32_t elements_num;
+ struct mlx5_multi_pattern_ctx
ctx[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];
+ } mh;
+};
+
+#define MLX5_EMPTY_MULTI_PATTERN_CTX {{{0,}},}
+
+static int
+mlx5_tbl_multi_pattern_process(struct rte_eth_dev *dev,
+ struct rte_flow_template_table *tbl,
+ struct mlx5_tbl_multi_pattern_ctx *mpat,
+ struct rte_flow_error *error);
+
+static __rte_always_inline int
+mlx5_multi_pattern_reformat_to_index(enum mlx5dr_action_type type)
+{
+ switch (type) {
+ case MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2:
+ return 0;
+ case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:
+ return 1;
+ case MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:
+ return 2;
+ case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:
+ return 3;
+ default:
+ break;
+ }
+ return -1;
+}
+
+static __rte_always_inline enum mlx5dr_act
[PATCH 15/30] net/mlx5/hws: check the rule status on rule update
From: Itamar Gozlan
Only allow rule updates for rules with their status value equal to
MLX5DR_RULE_STATUS_CREATED.
Otherwise, the rule may be in an unstable stage like deleting and
this will result in a faulty unexpected scenario.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/net/mlx5/hws/mlx5dr_rule.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c
b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 980a99b226..70d5c19e1f 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -756,6 +756,12 @@ int mlx5dr_rule_action_update(struct mlx5dr_rule
*rule_handle,
if (mlx5dr_rule_enqueue_precheck(matcher->tbl->ctx, attr))
return -rte_errno;
+ if (rule_handle->status != MLX5DR_RULE_STATUS_CREATED) {
+ DR_LOG(ERR, "Current rule status does not allow update");
+ rte_errno = EBUSY;
+ return -rte_errno;
+ }
+
ret = mlx5dr_rule_create_hws(rule_handle,
attr,
0,
--
2.39.2
[PATCH 16/30] net/mlx5/hws: support IPsec encryption/decryption action
From: Hamdan Igbaria
Support crypto action creation, this action allows encryption/decryption
of the packet according a specific security crypto protocol.
For now we support encryption/decryption according ipsec protocol.
ipsec encryption handles the encoding of the data.
ipsec decryption handles the decoding of the data and a decryption result
status will be placed in the ipsec_syndrome field.
Both operations should be used only for packets that have esp header and
ipsec trailer.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h| 12 ++
drivers/net/mlx5/hws/mlx5dr.h | 42 +++
drivers/net/mlx5/hws/mlx5dr_action.c | 172 +-
drivers/net/mlx5/hws/mlx5dr_action.h | 44 ---
drivers/net/mlx5/hws/mlx5dr_cmd.c | 8 ++
drivers/net/mlx5/hws/mlx5dr_cmd.h | 2 +-
drivers/net/mlx5/hws/mlx5dr_debug.c | 2 +
drivers/net/mlx5/hws/mlx5dr_matcher.c | 5 +
8 files changed, 266 insertions(+), 21 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 2b499666f8..0eecf0691b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3498,6 +3498,8 @@ enum mlx5_ifc_stc_action_type {
MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT = 0x0b,
MLX5_IFC_STC_ACTION_TYPE_TAG = 0x0c,
MLX5_IFC_STC_ACTION_TYPE_ACC_MODIFY_LIST = 0x0e,
+ MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION = 0x10,
+ MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION = 0x11,
MLX5_IFC_STC_ACTION_TYPE_ASO = 0x12,
MLX5_IFC_STC_ACTION_TYPE_COUNTER = 0x14,
MLX5_IFC_STC_ACTION_TYPE_ADD_FIELD = 0x1b,
@@ -3546,6 +3548,14 @@ struct mlx5_ifc_stc_ste_param_execute_aso_bits {
u8 reserved_at_28[0x18];
};
+struct mlx5_ifc_stc_ste_param_ipsec_encrypt_bits {
+ u8 ipsec_object_id[0x20];
+};
+
+struct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits {
+ u8 ipsec_object_id[0x20];
+};
+
struct mlx5_ifc_stc_ste_param_header_modify_list_bits {
u8 header_modify_pattern_id[0x20];
u8 header_modify_argument_id[0x20];
@@ -3612,6 +3622,8 @@ union mlx5_ifc_stc_param_bits {
struct mlx5_ifc_set_action_in_bits set;
struct mlx5_ifc_copy_action_in_bits copy;
struct mlx5_ifc_stc_ste_param_vport_bits vport;
+ struct mlx5_ifc_stc_ste_param_ipsec_encrypt_bits ipsec_encrypt;
+ struct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits ipsec_decrypt;
u8 reserved_at_0[0x80];
};
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 39d902e762..74d05229c7 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -45,6 +45,8 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_PUSH_VLAN,
MLX5DR_ACTION_TYP_ASO_METER,
MLX5DR_ACTION_TYP_ASO_CT,
+ MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
+ MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
MLX5DR_ACTION_TYP_DEST_ROOT,
MLX5DR_ACTION_TYP_DEST_ARRAY,
MLX5DR_ACTION_TYP_MAX,
@@ -176,6 +178,22 @@ struct mlx5dr_action_mh_pattern {
__be64 *data;
};
+enum mlx5dr_action_crypto_op {
+ MLX5DR_ACTION_CRYPTO_OP_NONE,
+ MLX5DR_ACTION_CRYPTO_OP_ENCRYPT,
+ MLX5DR_ACTION_CRYPTO_OP_DECRYPT,
+};
+
+enum mlx5dr_action_crypto_type {
+ MLX5DR_ACTION_CRYPTO_TYPE_NISP,
+ MLX5DR_ACTION_CRYPTO_TYPE_IPSEC,
+};
+
+struct mlx5dr_action_crypto_attr {
+ enum mlx5dr_action_crypto_type crypto_type;
+ enum mlx5dr_action_crypto_op op;
+};
+
/* In actions that take offset, the offset is unique, pointing to a single
* resource and the user should not reuse the same index because data changing
* is not atomic.
@@ -216,6 +234,10 @@ struct mlx5dr_rule_action {
uint32_t offset;
enum mlx5dr_action_aso_ct_flags direction;
} aso_ct;
+
+ struct {
+ uint32_t offset;
+ } crypto;
};
};
@@ -691,6 +713,26 @@ mlx5dr_action_create_dest_root(struct mlx5dr_context *ctx,
uint16_t priority,
uint32_t flags);
+/* Create crypto action, this action will create specific security protocol
+ * encryption/decryption, for now we only support IPSec protocol.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] devx_obj
+ * The SADB corresponding devx obj
+ * @param[in] attr
+ * attributes: specifies if to encrypt/decrypt,
+ * also specifies the crypto security protocol.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_crypto(struct mlx5dr_context *ctx,
+ struct mlx5dr_devx_obj *devx_obj,
+ struct mlx5dr_action_crypto_attr *attr,
+
[PATCH 17/30] net/mlx5/hws: support ASO IPsec action
From: Hamdan Igbaria
Support ASO IPsec action, this action will allow performing
some of ipsec full offload operations, for example replay
protection and sequence number incrementation.
In Tx flow this action used before encrypting the packet to
increase the sequence number.
In Rx flow this action used after decrypting the packet to
check it against the replay protection window for validity.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h | 1 +
drivers/net/mlx5/hws/mlx5dr.h| 23
drivers/net/mlx5/hws/mlx5dr_action.c | 32 +---
drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +
4 files changed, 54 insertions(+), 3 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 0eecf0691b..31ebec7bcf 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3539,6 +3539,7 @@ struct mlx5_ifc_stc_ste_param_flow_counter_bits {
enum {
MLX5_ASO_CT_NUM_PER_OBJ = 1,
MLX5_ASO_METER_NUM_PER_OBJ = 2,
+ MLX5_ASO_IPSEC_NUM_PER_OBJ = 1,
};
struct mlx5_ifc_stc_ste_param_execute_aso_bits {
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 74d05229c7..bd352fa26d 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -45,6 +45,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_PUSH_VLAN,
MLX5DR_ACTION_TYP_ASO_METER,
MLX5DR_ACTION_TYP_ASO_CT,
+ MLX5DR_ACTION_TYP_ASO_IPSEC,
MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
MLX5DR_ACTION_TYP_DEST_ROOT,
@@ -235,6 +236,10 @@ struct mlx5dr_rule_action {
enum mlx5dr_action_aso_ct_flags direction;
} aso_ct;
+ struct {
+ uint32_t offset;
+ } aso_ipsec;
+
struct {
uint32_t offset;
} crypto;
@@ -659,6 +664,24 @@ mlx5dr_action_create_aso_ct(struct mlx5dr_context *ctx,
uint8_t return_reg_id,
uint32_t flags);
+/* Create direct rule ASO IPSEC action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] devx_obj
+ * The DEVX ASO object.
+ * @param[in] return_reg_id
+ * Copy the ASO object value into this reg_id, after a packet hits a rule
with this ASO object.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_aso_ipsec(struct mlx5dr_context *ctx,
+ struct mlx5dr_devx_obj *devx_obj,
+ uint8_t return_reg_id,
+ uint32_t flags);
+
/* Create direct rule pop vlan action.
* @param[in] ctx
* The context in which the new action will be created.
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 4910b4f730..956909a628 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -9,11 +9,11 @@
#define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1
/* This is the maximum allowed action order for each table type:
- * TX: POP_VLAN, CTR, ASO_METER, AS_CT, PUSH_VLAN, MODIFY, ENCAP, ENCRYPT,
+ * TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, ENCRYPT,
* Term
- * RX: TAG, DECAP, POP_VLAN, CTR, DECRYPT, ASO_METER, ASO_CT, PUSH_VLAN,
+ * RX: TAG, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN,
* MODIFY, ENCAP, Term
- * FDB: DECAP, POP_VLAN, CTR, DECRYPT, ASO_METER, ASO_CT, PUSH_VLAN,
MODIFY,
+ * FDB: DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN, MODIFY,
* ENCAP, ENCRYPT, Term
*/
static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_MAX] = {
@@ -27,6 +27,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_CRYPTO_DECRYPT),
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
+ BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -46,6 +47,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_CTR),
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
+ BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -67,6 +69,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
[PATCH 18/30] net/mlx5/hws: support reformat trailer action
From: Hamdan Igbaria
Support reformat trailer action, this action allows
to insert/remove specific crypto security protocol
trailer on the packet.
For now support IPsec crypto protocol trailer.
The trailer should be added before encrypting the
packet in Tx flow, and it can be removed after decryption
in Rx flow.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h | 11 +++
drivers/net/mlx5/hws/mlx5dr.h| 32
drivers/net/mlx5/hws/mlx5dr_action.c | 114 ++-
drivers/net/mlx5/hws/mlx5dr_action.h | 5 ++
drivers/net/mlx5/hws/mlx5dr_cmd.c| 8 ++
drivers/net/mlx5/hws/mlx5dr_cmd.h| 5 ++
drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +
7 files changed, 172 insertions(+), 4 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 31ebec7bcf..793fc1a674 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3501,6 +3501,7 @@ enum mlx5_ifc_stc_action_type {
MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION = 0x10,
MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION = 0x11,
MLX5_IFC_STC_ACTION_TYPE_ASO = 0x12,
+ MLX5_IFC_STC_ACTION_TYPE_TRAILER = 0x13,
MLX5_IFC_STC_ACTION_TYPE_COUNTER = 0x14,
MLX5_IFC_STC_ACTION_TYPE_ADD_FIELD = 0x1b,
MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE = 0x80,
@@ -3557,6 +3558,15 @@ struct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits {
u8 ipsec_object_id[0x20];
};
+struct mlx5_ifc_stc_ste_param_trailer_bits {
+ u8 reserved_at_0[0x8];
+ u8 command[0x4];
+ u8 reserved_at_c[0x2];
+ u8 type[0x2];
+ u8 reserved_at_10[0xa];
+ u8 length[0x6];
+};
+
struct mlx5_ifc_stc_ste_param_header_modify_list_bits {
u8 header_modify_pattern_id[0x20];
u8 header_modify_argument_id[0x20];
@@ -3625,6 +3635,7 @@ union mlx5_ifc_stc_param_bits {
struct mlx5_ifc_stc_ste_param_vport_bits vport;
struct mlx5_ifc_stc_ste_param_ipsec_encrypt_bits ipsec_encrypt;
struct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits ipsec_decrypt;
+ struct mlx5_ifc_stc_ste_param_trailer_bits trailer;
u8 reserved_at_0[0x80];
};
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index bd352fa26d..e425a8803a 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -33,6 +33,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,
MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2,
MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3,
+ MLX5DR_ACTION_TYP_REFORMAT_TRAILER,
MLX5DR_ACTION_TYP_DROP,
MLX5DR_ACTION_TYP_TIR,
MLX5DR_ACTION_TYP_TBL,
@@ -195,6 +196,21 @@ struct mlx5dr_action_crypto_attr {
enum mlx5dr_action_crypto_op op;
};
+enum mlx5dr_action_trailer_type {
+ MLX5DR_ACTION_TRAILER_TYPE_IPSEC,
+};
+
+enum mlx5dr_action_trailer_op {
+ MLX5DR_ACTION_TRAILER_OP_INSERT,
+ MLX5DR_ACTION_TRAILER_OP_REMOVE,
+};
+
+struct mlx5dr_action_trailer_attr {
+ enum mlx5dr_action_trailer_type type;
+ enum mlx5dr_action_trailer_op op;
+ uint8_t size;
+};
+
/* In actions that take offset, the offset is unique, pointing to a single
* resource and the user should not reuse the same index because data changing
* is not atomic.
@@ -607,6 +623,22 @@ mlx5dr_action_create_reformat(struct mlx5dr_context *ctx,
uint32_t log_bulk_size,
uint32_t flags);
+/* Create reformat trailer action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] attr
+ * attributes: specifies if to insert/remove trailer,
+ * also specifies the trailer type and size in bytes.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_reformat_trailer(struct mlx5dr_context *ctx,
+ struct mlx5dr_action_trailer_attr *attr,
+ uint32_t flags);
+
/* Create direct rule modify header action.
*
* @param[in] ctx
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 956909a628..f8de3d8d98 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -9,16 +9,17 @@
#define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1
/* This is the maximum allowed action order for each table type:
- * TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, ENCRYPT,
+ * TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, TRAILER, ENCRYPT,
* Term
- * RX: TAG, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN,
+ * RX: TAG, TRAILER, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN,
* MODIFY, ENCAP, Term
- * FDB: DECAP, PO
[PATCH 19/30] net/mlx5/hws: support ASO first hit action
From: Hamdan Igbaria
Support ASO first hit action.
This action allows tracking if a rule gets hit by a packet.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h | 5 +
drivers/net/mlx5/hws/mlx5dr.h| 25 +
drivers/net/mlx5/hws/mlx5dr_action.c | 33
drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +
4 files changed, 64 insertions(+)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 793fc1a674..40e461cb82 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3541,6 +3541,7 @@ enum {
MLX5_ASO_CT_NUM_PER_OBJ = 1,
MLX5_ASO_METER_NUM_PER_OBJ = 2,
MLX5_ASO_IPSEC_NUM_PER_OBJ = 1,
+ MLX5_ASO_FIRST_HIT_NUM_PER_OBJ = 512,
};
struct mlx5_ifc_stc_ste_param_execute_aso_bits {
@@ -5371,6 +5372,10 @@ enum {
MLX5_FLOW_COLOR_UNDEFINED,
};
+enum {
+ MLX5_ASO_FIRST_HIT_SET = 1,
+};
+
/* Maximum value of srTCM & trTCM metering parameters. */
#define MLX5_SRTCM_XBS_MAX (0xFF * (1ULL << 0x1F))
#define MLX5_SRTCM_XIR_MAX (8 * (1ULL << 30) * 0xFF)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index e425a8803a..e7d89ad7ec 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -47,6 +47,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_ASO_METER,
MLX5DR_ACTION_TYP_ASO_CT,
MLX5DR_ACTION_TYP_ASO_IPSEC,
+ MLX5DR_ACTION_TYP_ASO_FIRST_HIT,
MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
MLX5DR_ACTION_TYP_DEST_ROOT,
@@ -256,6 +257,11 @@ struct mlx5dr_rule_action {
uint32_t offset;
} aso_ipsec;
+ struct {
+ uint32_t offset;
+ bool set;
+ } aso_first_hit;
+
struct {
uint32_t offset;
} crypto;
@@ -714,6 +720,25 @@ mlx5dr_action_create_aso_ipsec(struct mlx5dr_context *ctx,
uint8_t return_reg_id,
uint32_t flags);
+/* Create direct rule ASO FIRST HIT action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] devx_obj
+ * The DEVX ASO object.
+ * @param[in] return_reg_id
+ * When a packet hits a flow connected to this object, a flag is set
indicating this event,
+ * copy the original value of this flag into this reg_id.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_aso_first_hit(struct mlx5dr_context *ctx,
+ struct mlx5dr_devx_obj *devx_obj,
+ uint8_t return_reg_id,
+ uint32_t flags);
+
/* Create direct rule pop vlan action.
* @param[in] ctx
* The context in which the new action will be created.
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index f8de3d8d98..fe9c39b207 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -7,6 +7,7 @@
#define WIRE_PORT 0x
#define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1
+#define MLX5DR_ACTION_ASO_FIRST_HIT_SET_OFFSET 9
/* This is the maximum allowed action order for each table type:
* TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, TRAILER, ENCRYPT,
@@ -29,6 +30,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -49,6 +51,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -73,6 +76,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_ASO_METER),
BIT(MLX5DR_ACTION_TYP_ASO_CT),
BIT(MLX5DR_ACTION_TYP_ASO_IPSEC),
+ BIT(MLX5DR_ACTION_TYP_ASO_FIRST_HIT),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
@@ -672,6 +676,13 @
[PATCH 20/30] net/mlx5/hws: support insert header action
From: Hamdan Igbaria
Support insert header action, this will allow encap at
a specific anchor and offset selected by the user.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/net/mlx5/hws/mlx5dr.h | 36
drivers/net/mlx5/hws/mlx5dr_action.c | 112 +
drivers/net/mlx5/hws/mlx5dr_action.h | 5 +-
drivers/net/mlx5/hws/mlx5dr_cmd.c | 4 +-
drivers/net/mlx5/hws/mlx5dr_debug.c| 1 +
drivers/net/mlx5/hws/mlx5dr_internal.h | 1 +
6 files changed, 141 insertions(+), 18 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index e7d89ad7ec..a6bbb85eed 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -50,6 +50,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_ASO_FIRST_HIT,
MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
+ MLX5DR_ACTION_TYP_INSERT_HEADER,
MLX5DR_ACTION_TYP_DEST_ROOT,
MLX5DR_ACTION_TYP_DEST_ARRAY,
MLX5DR_ACTION_TYP_MAX,
@@ -174,6 +175,20 @@ struct mlx5dr_action_reformat_header {
void *data;
};
+struct mlx5dr_action_insert_header {
+ struct mlx5dr_action_reformat_header hdr;
+ /* PRM start anchor to which header will be inserted */
+ uint8_t anchor;
+ /* Header insertion offset in bytes, from the start
+* anchor to the location where new header will be inserted.
+*/
+ uint8_t offset;
+ /* Indicates this header insertion adds encapsulation header to the
packet,
+* requiring device to update offloaded fields (for example IPv4 total
length).
+*/
+ bool encap;
+};
+
struct mlx5dr_action_mh_pattern {
/* Byte size of modify actions provided by "data" */
size_t sz;
@@ -813,6 +828,27 @@ mlx5dr_action_create_crypto(struct mlx5dr_context *ctx,
struct mlx5dr_action_crypto_attr *attr,
uint32_t flags);
+/* Create insert header action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] num_of_hdrs
+ * Number of provided headers in "hdrs" array.
+ * @param[in] hdrs
+ * Headers array containing header information.
+ * @param[in] log_bulk_size
+ * Number of unique values used with this insert header.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_insert_header(struct mlx5dr_context *ctx,
+ uint8_t num_of_hdrs,
+ struct mlx5dr_action_insert_header *hdrs,
+ uint32_t log_bulk_size,
+ uint32_t flags);
+
/* Destroy direct rule action.
*
* @param[in] action
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index fe9c39b207..988a8f 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -34,6 +34,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
+ BIT(MLX5DR_ACTION_TYP_INSERT_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
BIT(MLX5DR_ACTION_TYP_TBL) |
@@ -55,6 +56,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
+ BIT(MLX5DR_ACTION_TYP_INSERT_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),
@@ -80,6 +82,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
+ BIT(MLX5DR_ACTION_TYP_INSERT_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),
@@ -640,20 +643,15 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
attr->remove_header.end_anchor = MLX5_HEADER_ANCHOR_INNER_MAC;
break;
case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:
- attr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT;
- attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
-
[PATCH 21/30] net/mlx5/hws: support remove header action
From: Hamdan Igbaria
Support remove header action, this action will allow the user
to execute dynamic decaps by choosing to decap by providing a
start anchor and number of words to remove, or providing a
start anchor and end anchor.
Signed-off-by: Hamdan Igbaria
Reviewed-by: Alex Vesker
Acked-by: Matan Azrad
---
drivers/net/mlx5/hws/mlx5dr.h| 40 ++
drivers/net/mlx5/hws/mlx5dr_action.c | 78
drivers/net/mlx5/hws/mlx5dr_action.h | 7 +++
drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +
4 files changed, 126 insertions(+)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index a6bbb85eed..2e692f76c3 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -51,6 +51,7 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT,
MLX5DR_ACTION_TYP_CRYPTO_DECRYPT,
MLX5DR_ACTION_TYP_INSERT_HEADER,
+ MLX5DR_ACTION_TYP_REMOVE_HEADER,
MLX5DR_ACTION_TYP_DEST_ROOT,
MLX5DR_ACTION_TYP_DEST_ARRAY,
MLX5DR_ACTION_TYP_MAX,
@@ -189,6 +190,29 @@ struct mlx5dr_action_insert_header {
bool encap;
};
+enum mlx5dr_action_remove_header_type {
+ MLX5DR_ACTION_REMOVE_HEADER_TYPE_BY_OFFSET,
+ MLX5DR_ACTION_REMOVE_HEADER_TYPE_BY_HEADER,
+};
+
+struct mlx5dr_action_remove_header_attr {
+ enum mlx5dr_action_remove_header_type type;
+ union {
+ struct {
+ /* PRM start anchor from which header will be removed */
+ uint8_t start_anchor;
+ /* PRM end anchor till which header will be removed */
+ uint8_t end_anchor;
+ bool decap;
+ } by_anchor;
+ struct {
+ /* PRM start anchor from which header will be removed */
+ uint8_t start_anchor;
+ uint8_t size;
+ } by_offset;
+ };
+};
+
struct mlx5dr_action_mh_pattern {
/* Byte size of modify actions provided by "data" */
size_t sz;
@@ -849,6 +873,22 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context
*ctx,
uint32_t log_bulk_size,
uint32_t flags);
+/* Create remove header action.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] attr
+ * attributes: specifies the remove header type, PRM start anchor and
+ * the PRM end anchor or the PRM start anchor and remove size in bytes.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_remove_header(struct mlx5dr_context *ctx,
+ struct mlx5dr_action_remove_header_attr
*attr,
+ uint32_t flags);
+
/* Destroy direct rule action.
*
* @param[in] action
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 988a8f..1a6296a728 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -9,6 +9,9 @@
#define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1
#define MLX5DR_ACTION_ASO_FIRST_HIT_SET_OFFSET 9
+/* Header removal size limited to 128B (64 words) */
+#define MLX5DR_ACTION_REMOVE_HEADER_MAX_SIZE 128
+
/* This is the maximum allowed action order for each table type:
* TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, TRAILER, ENCRYPT,
* Term
@@ -21,6 +24,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
[MLX5DR_TABLE_TYPE_NIC_RX] = {
BIT(MLX5DR_ACTION_TYP_TAG),
BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),
+ BIT(MLX5DR_ACTION_TYP_REMOVE_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),
BIT(MLX5DR_ACTION_TYP_POP_VLAN),
@@ -69,6 +73,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
},
[MLX5DR_TABLE_TYPE_FDB] = {
BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),
+ BIT(MLX5DR_ACTION_TYP_REMOVE_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),
BIT(MLX5DR_ACTION_TYP_POP_VLAN),
@@ -719,6 +724,19 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
attr->reformat_trailer.op = action->reformat_trailer.op;
attr->reformat_trailer.size = action->reformat_trailer.size;
break;
+ case MLX5DR_ACTION_TYP_REMOVE_HEADER:
+ if (action->remove_header.type ==
MLX5DR_ACTION_REMOVE_HEADER_TYPE_BY_HEADER) {
+ attr->action_type =
MLX5_IFC_STC_AC
[PATCH 22/30] net/mlx5/hws: allow jump to TIR over FDB
From: Alex Vesker
Current TIR action is allowed to be used only for NIC RX,
this will allow TIR action over FDB for RX traffic in case
of TX traffic packets will be dropped.
Signed-off-by: Alex Vesker
Reviewed-by: Erez Shitrit
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h | 2 ++
drivers/net/mlx5/hws/mlx5dr_action.c | 27 ++-
drivers/net/mlx5/hws/mlx5dr_cmd.c| 4
drivers/net/mlx5/hws/mlx5dr_cmd.h| 1 +
4 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 40e461cb82..bb2b990d5b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2418,6 +2418,8 @@ struct mlx5_ifc_wqe_based_flow_table_cap_bits {
u8 reserved_at_180[0x10];
u8 ste_format_gen_wqe[0x10];
u8 linear_match_definer_reg_c3[0x20];
+ u8 fdb_jump_to_tir_stc[0x1];
+ u8 reserved_at_1c1[0x1f];
};
union mlx5_ifc_hca_cap_union_bits {
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 1a6296a728..05b6e97576 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -445,6 +445,7 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
break;
case MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION:
+ /* Encrypt is allowed on RX side, requires mask in case of FDB
*/
if (fw_tbl_type == FS_FT_FDB_RX) {
fixup_stc_attr->action_type =
MLX5_IFC_STC_ACTION_TYPE_NOP;
fixup_stc_attr->action_offset = stc_attr->action_offset;
@@ -454,6 +455,7 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
break;
case MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION:
+ /* Decrypt is allowed on TX side, requires mask in case of FDB
*/
if (fw_tbl_type == FS_FT_FDB_TX) {
fixup_stc_attr->action_type =
MLX5_IFC_STC_ACTION_TYPE_NOP;
fixup_stc_attr->action_offset = stc_attr->action_offset;
@@ -463,12 +465,10 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
break;
case MLX5_IFC_STC_ACTION_TYPE_TRAILER:
- if (table_type != MLX5DR_TABLE_TYPE_FDB)
- break;
-
+ /* Trailer has FDB limitations on RX and TX based on operation
*/
val = stc_attr->reformat_trailer.op;
- if ((val == MLX5DR_ACTION_TRAILER_OP_INSERT && !is_mirror) ||
- (val == MLX5DR_ACTION_TRAILER_OP_REMOVE && is_mirror)) {
+ if ((val == MLX5DR_ACTION_TRAILER_OP_INSERT && fw_tbl_type ==
FS_FT_FDB_RX) ||
+ (val == MLX5DR_ACTION_TRAILER_OP_REMOVE && fw_tbl_type ==
FS_FT_FDB_TX)) {
fixup_stc_attr->action_type =
MLX5_IFC_STC_ACTION_TYPE_NOP;
fixup_stc_attr->action_offset = stc_attr->action_offset;
fixup_stc_attr->stc_offset = stc_attr->stc_offset;
@@ -476,6 +476,16 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
}
break;
+ case MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_TIR:
+ /* TIR is allowed on RX side, requires mask in case of FDB */
+ if (fw_tbl_type == FS_FT_FDB_TX) {
+ fixup_stc_attr->action_type =
MLX5_IFC_STC_ACTION_TYPE_DROP;
+ fixup_stc_attr->action_offset =
MLX5DR_ACTION_OFFSET_HIT;
+ fixup_stc_attr->stc_offset = stc_attr->stc_offset;
+ use_fixup = true;
+ }
+ break;
+
default:
break;
}
@@ -976,6 +986,13 @@ mlx5dr_action_create_dest_tir(struct mlx5dr_context *ctx,
return NULL;
}
+ if ((flags & MLX5DR_ACTION_FLAG_ROOT_FDB) ||
+ (flags & MLX5DR_ACTION_FLAG_HWS_FDB && !ctx->caps->fdb_tir_stc)) {
+ DR_LOG(ERR, "TIR action not support on FDB");
+ rte_errno = ENOTSUP;
+ return NULL;
+ }
+
if (!is_local) {
DR_LOG(ERR, "TIR should be created on local ibv_device, flags:
0x%x",
flags);
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c
b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 0ba4774f08..135d31dca1 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1275,6 +1275,10 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,
caps->supp_ste_format_gen_wqe = MLX5_GET(query_hca_cap_out, out,
capability.wqe_based_flow_table_cap.
ste_format_gen_wqe);
+
+ caps->fdb_tir_stc = MLX5_GET(query_hca_cap_out, out,
+
capability.wqe_based_fl
[PATCH 23/30] net/mlx5/hws: support dynamic re-parse
From: Alex Vesker
Each steering entry (STE) has a bit called re-parse used for
re-parsing the packet in HW, re-parsing is needed after
reformat (e.g. push/pop/encapsulate/...) or when modifying the
packet headers requiring structure change (e.g. TCP to UDP).
Until now we re-parsed the packet in each STE leading to
longer processing per packet. With supported devices we
can control re-parse bit to allow better performance.
Signed-off-by: Alex Vesker
Reviewed-by: Erez Shitrit
Acked-by: Matan Azrad
---
drivers/common/mlx5/mlx5_prm.h| 10 -
drivers/net/mlx5/hws/mlx5dr_action.c | 58 +--
drivers/net/mlx5/hws/mlx5dr_action.h | 2 +-
drivers/net/mlx5/hws/mlx5dr_cmd.c | 3 +-
drivers/net/mlx5/hws/mlx5dr_cmd.h | 2 +
drivers/net/mlx5/hws/mlx5dr_context.c | 15 +++
drivers/net/mlx5/hws/mlx5dr_context.h | 9 -
drivers/net/mlx5/hws/mlx5dr_matcher.c | 2 +
8 files changed, 75 insertions(+), 26 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index bb2b990d5b..a5ecce98e9 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3445,6 +3445,7 @@ enum mlx5_ifc_rtc_ste_format {
enum mlx5_ifc_rtc_reparse_mode {
MLX5_IFC_RTC_REPARSE_NEVER = 0x0,
MLX5_IFC_RTC_REPARSE_ALWAYS = 0x1,
+ MLX5_IFC_RTC_REPARSE_BY_STC = 0x2,
};
#define MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX 16
@@ -3515,6 +3516,12 @@ enum mlx5_ifc_stc_action_type {
MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_UPLINK = 0x86,
};
+enum mlx5_ifc_stc_reparse_mode {
+ MLX5_IFC_STC_REPARSE_IGNORE = 0x0,
+ MLX5_IFC_STC_REPARSE_NEVER = 0x1,
+ MLX5_IFC_STC_REPARSE_ALWAYS = 0x2,
+};
+
struct mlx5_ifc_stc_ste_param_ste_table_bits {
u8 ste_obj_id[0x20];
u8 match_definer_id[0x20];
@@ -3648,7 +3655,8 @@ enum {
struct mlx5_ifc_stc_bits {
u8 modify_field_select[0x40];
- u8 reserved_at_40[0x48];
+ u8 reserved_at_40[0x46];
+ u8 reparse_mode[0x2];
u8 table_type[0x8];
u8 ste_action_offset[0x8];
u8 action_type[0x8];
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 05b6e97576..bdccfb9cf3 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -124,16 +124,18 @@ static int mlx5dr_action_get_shared_stc_nic(struct
mlx5dr_context *ctx,
goto unlock_and_out;
}
switch (stc_type) {
- case MLX5DR_CONTEXT_SHARED_STC_DECAP:
+ case MLX5DR_CONTEXT_SHARED_STC_DECAP_L3:
stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_REMOVE;
stc_attr.action_offset = MLX5DR_ACTION_OFFSET_DW5;
+ stc_attr.reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;
stc_attr.remove_header.decap = 0;
stc_attr.remove_header.start_anchor =
MLX5_HEADER_ANCHOR_PACKET_START;
stc_attr.remove_header.end_anchor =
MLX5_HEADER_ANCHOR_IPV6_IPV4;
break;
- case MLX5DR_CONTEXT_SHARED_STC_POP:
+ case MLX5DR_CONTEXT_SHARED_STC_DOUBLE_POP:
stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_REMOVE_WORDS;
stc_attr.action_offset = MLX5DR_ACTION_OFFSET_DW5;
+ stc_attr.reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
stc_attr.remove_words.start_anchor =
MLX5_HEADER_ANCHOR_FIRST_VLAN_START;
stc_attr.remove_words.num_of_words =
MLX5DR_ACTION_HDR_LEN_L2_VLAN;
break;
@@ -512,6 +514,11 @@ int mlx5dr_action_alloc_single_stc(struct mlx5dr_context
*ctx,
}
stc_attr->stc_offset = stc->offset;
+
+ /* Dynamic reparse not supported, overwrite and use default */
+ if (!mlx5dr_context_cap_dynamic_reparse(ctx))
+ stc_attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;
+
devx_obj_0 = mlx5dr_pool_chunk_get_base_devx_obj(stc_pool, stc);
/* According to table/action limitation change the stc_attr */
@@ -600,6 +607,8 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
struct mlx5dr_devx_obj *obj,
struct mlx5dr_cmd_stc_modify_attr *attr)
{
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;
+
switch (action->type) {
case MLX5DR_ACTION_TYP_TAG:
attr->action_type = MLX5_IFC_STC_ACTION_TYPE_TAG;
@@ -626,6 +635,7 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
case MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:
case MLX5DR_ACTION_TYP_MODIFY_HDR:
attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
if (action->modify_header.num_of_actions == 1) {
attr->modify_action.data =
action->modify_header.single_action;
attr->action_type =
[PATCH 24/30] net/mlx5/hws: dynamic re-parse for modify header
From: Alex Vesker
With dynamic re-parse we would always require re-parse but
this is not always necessary. Re-parse is only needed when
the packet structure is changed. This support will allow
dynamically deciding based on the action pattern if re-parse
is required or no.
Signed-off-by: Alex Vesker
Reviewed-by: Erez Shitrit
Acked-by: Matan Azrad
---
drivers/net/mlx5/hws/mlx5dr_action.c | 15 +++---
drivers/net/mlx5/hws/mlx5dr_action.h | 1 +
drivers/net/mlx5/hws/mlx5dr_pat_arg.c | 41 +--
drivers/net/mlx5/hws/mlx5dr_pat_arg.h | 2 ++
4 files changed, 53 insertions(+), 6 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index bdccfb9cf3..59be8ae2c5 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -635,7 +635,9 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
case MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:
case MLX5DR_ACTION_TYP_MODIFY_HDR:
attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
- attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
+ if (action->modify_header.require_reparse)
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
+
if (action->modify_header.num_of_actions == 1) {
attr->modify_action.data =
action->modify_header.single_action;
attr->action_type =
mlx5dr_action_get_mh_stc_type(attr->modify_action.data);
@@ -1614,6 +1616,8 @@ mlx5dr_action_handle_tunnel_l3_to_l2(struct mlx5dr_action
*action,
action[i].modify_header.num_of_actions = num_of_actions;
action[i].modify_header.arg_obj = arg_obj;
action[i].modify_header.pat_obj = pat_obj;
+ action[i].modify_header.require_reparse =
+ mlx5dr_pat_require_reparse((__be64 *)mh_data,
num_of_actions);
ret = mlx5dr_action_create_stcs(&action[i], NULL);
if (ret) {
@@ -1760,7 +1764,7 @@ mlx5dr_action_create_modify_header_hws(struct
mlx5dr_action *action,
{
struct mlx5dr_devx_obj *pat_obj, *arg_obj = NULL;
struct mlx5dr_context *ctx = action->ctx;
- uint16_t max_mh_actions = 0;
+ uint16_t num_actions, max_mh_actions = 0;
int i, ret;
/* Calculate maximum number of mh actions for shared arg allocation */
@@ -1786,11 +1790,14 @@ mlx5dr_action_create_modify_header_hws(struct
mlx5dr_action *action,
goto free_stc_and_pat;
}
+ num_actions = pattern[i].sz / MLX5DR_MODIFY_ACTION_SIZE;
action[i].modify_header.num_of_patterns = num_of_patterns;
action[i].modify_header.max_num_of_actions = max_mh_actions;
- action[i].modify_header.num_of_actions = pattern[i].sz /
MLX5DR_MODIFY_ACTION_SIZE;
+ action[i].modify_header.num_of_actions = num_actions;
+ action[i].modify_header.require_reparse =
+ mlx5dr_pat_require_reparse(pattern[i].data,
num_actions);
- if (action[i].modify_header.num_of_actions == 1) {
+ if (num_actions == 1) {
pat_obj = NULL;
/* Optimize single modify action to be used inline */
action[i].modify_header.single_action =
pattern[i].data[0];
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h
b/drivers/net/mlx5/hws/mlx5dr_action.h
index 328de65a1e..e56f5b59c7 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.h
+++ b/drivers/net/mlx5/hws/mlx5dr_action.h
@@ -132,6 +132,7 @@ struct mlx5dr_action {
uint8_t single_action_type;
uint8_t num_of_actions;
uint8_t max_num_of_actions;
+ uint8_t require_reparse;
} modify_header;
struct {
struct mlx5dr_devx_obj *arg_obj;
diff --git a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
index 349d77f296..a949844d24 100644
--- a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
+++ b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
@@ -37,6 +37,43 @@ uint32_t mlx5dr_arg_get_arg_size(uint16_t num_of_actions)
return BIT(mlx5dr_arg_get_arg_log_size(num_of_actions));
}
+bool mlx5dr_pat_require_reparse(__be64 *actions, uint16_t num_of_actions)
+{
+ uint16_t i, field;
+ uint8_t action_id;
+
+ for (i = 0; i < num_of_actions; i++) {
+ action_id = MLX5_GET(set_action_in, &actions[i], action_type);
+
+ switch (action_id) {
+ case MLX5_MODIFICATION_TYPE_NOP:
+ field = MLX5_MODI_OUT_NONE;
+ break;
+
+ case MLX5_MODIFICATION_TYPE_S
[PATCH 25/30] net/mlx5: sample the srv6 last segment
From: Rongwei Liu
When removing the IPv6 routing extension header from the
packets, the destination address should be updated to the
last one in the segment list.
Enlarge the hardware sample scope to cover the last segment.
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
---
drivers/net/mlx5/mlx5.c | 41 ++---
drivers/net/mlx5/mlx5.h | 6 ++
2 files changed, 36 insertions(+), 11 deletions(-)
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index cdb4eeb612..afb9c717dc 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1067,6 +1067,7 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)
struct mlx5_devx_graph_node_attr node = {
.modify_field_select = 0,
};
+ uint32_t i;
uint32_t ids[MLX5_GRAPH_NODE_SAMPLE_NUM];
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_common_dev_config *config = &priv->sh->cdev->config;
@@ -1100,10 +1101,18 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)
node.next_header_field_size = 0x8;
node.in[0].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_IP;
node.in[0].compare_condition_value = IPPROTO_ROUTING;
- node.sample[0].flow_match_sample_en = 1;
- /* First come first serve no matter inner or outer. */
- node.sample[0].flow_match_sample_tunnel_mode =
MLX5_GRAPH_SAMPLE_TUNNEL_FIRST;
- node.sample[0].flow_match_sample_offset_mode =
MLX5_GRAPH_SAMPLE_OFFSET_FIXED;
+ /* Final IPv6 address. */
+ for (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i <
MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {
+ node.sample[i].flow_match_sample_en = 1;
+ node.sample[i].flow_match_sample_offset_mode =
+ MLX5_GRAPH_SAMPLE_OFFSET_FIXED;
+ /* First come first serve no matter inner or outer. */
+ node.sample[i].flow_match_sample_tunnel_mode =
+ MLX5_GRAPH_SAMPLE_TUNNEL_FIRST;
+ node.sample[i].flow_match_sample_field_base_offset =
+ (i + 1) * sizeof(uint32_t); /* in bytes
*/
+ }
+ node.sample[0].flow_match_sample_field_base_offset = 0;
node.out[0].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_TCP;
node.out[0].compare_condition_value = IPPROTO_TCP;
node.out[1].arc_parse_graph_node = MLX5_GRAPH_ARC_NODE_UDP;
@@ -1116,8 +1125,8 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)
goto error;
}
priv->sh->srh_flex_parser.flex.devx_fp->devx_obj = fp;
- priv->sh->srh_flex_parser.flex.mapnum = 1;
- priv->sh->srh_flex_parser.flex.devx_fp->num_samples = 1;
+ priv->sh->srh_flex_parser.flex.mapnum = MLX5_SRV6_SAMPLE_NUM;
+ priv->sh->srh_flex_parser.flex.devx_fp->num_samples =
MLX5_SRV6_SAMPLE_NUM;
ret = mlx5_devx_cmd_query_parse_samples(fp, ids,
priv->sh->srh_flex_parser.flex.mapnum,
&priv->sh->srh_flex_parser.flex.devx_fp->anchor_id);
@@ -1125,12 +1134,22 @@ mlx5_alloc_srh_flex_parser(struct rte_eth_dev *dev)
DRV_LOG(ERR, "Failed to query sample IDs.");
goto error;
}
- ret = mlx5_devx_cmd_match_sample_info_query(ibv_ctx, ids[0],
-
&priv->sh->srh_flex_parser.flex.devx_fp->sample_info[0]);
- if (ret) {
- DRV_LOG(ERR, "Failed to query sample id information.");
- goto error;
+ for (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i <
MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {
+ ret = mlx5_devx_cmd_match_sample_info_query(ibv_ctx, ids[i],
+
&priv->sh->srh_flex_parser.flex.devx_fp->sample_info[i]);
+ if (ret) {
+ DRV_LOG(ERR, "Failed to query sample id %u
information.", ids[i]);
+ goto error;
+ }
+ }
+ for (i = 0; i <= MLX5_SRV6_SAMPLE_NUM - 1 && i <
MLX5_GRAPH_NODE_SAMPLE_NUM; i++) {
+ priv->sh->srh_flex_parser.flex.devx_fp->sample_ids[i] = ids[i];
+ priv->sh->srh_flex_parser.flex.map[i].width = sizeof(uint32_t)
* CHAR_BIT;
+ priv->sh->srh_flex_parser.flex.map[i].reg_id = i;
+ priv->sh->srh_flex_parser.flex.map[i].shift =
+ (i + 1) * sizeof(uint32_t) *
CHAR_BIT;
}
+ priv->sh->srh_flex_parser.flex.map[0].shift = 0;
return 0;
error:
if (fp)
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 0289cbd04b..ad82d8060e 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1335,6 +1335,7 @@ struct mlx5_flex_pattern_field {
uint16_t shift:5;
uint16_t reg_id:5;
};
+
#define MLX5_INVALID_SAMPLE_REG_ID 0x1F
/* Port flex item context. */
@@ -1346,6 +1347,11 @@ str
[PATCH 26/30] net/mlx5/hws: fix potential wrong errno value
From: Rongwei Liu
A valid rte_errno is desired when DR layer api returns error
and it can't over-write the value set by under-layer.
Fixes: df61fcd5f3ca ("net/mlx5/hws: support insert header action")
Cc: hamd...@nvidia.com
Signed-off-by: Rongwei Liu
Reviewed-by: Alex Vesker
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_action.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 59be8ae2c5..76ca57d302 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -2262,6 +2262,7 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context
*ctx,
if (!num_of_hdrs) {
DR_LOG(ERR, "Reformat num_of_hdrs cannot be zero");
+ rte_errno = EINVAL;
return NULL;
}
@@ -2309,7 +2310,6 @@ mlx5dr_action_create_insert_header(struct mlx5dr_context
*ctx,
reformat_hdrs,
log_bulk_size);
if (ret) {
DR_LOG(ERR, "Failed to create HWS reformat action");
- rte_errno = EINVAL;
goto free_reformat_hdrs;
}
--
2.39.2
[PATCH 27/30] net/mlx5/hws: add IPv6 routing extension push remove actions
From: Rongwei Liu
Add two dr_actions to implement IPv6 routing extension push and
remove, the new actions are multiple actions combination instead
of new types.
Basically, there are two modify headers plus one reformat action.
Action order is the same as encap and decap actions.
Signed-off-by: Rongwei Liu
Reviewed-by: Alex Vesker
Acked-by: Ori Kam
---
drivers/common/mlx5/mlx5_prm.h | 1 +
drivers/net/mlx5/hws/mlx5dr.h| 29 +++
drivers/net/mlx5/hws/mlx5dr_action.c | 358 ++-
drivers/net/mlx5/hws/mlx5dr_action.h | 7 +
drivers/net/mlx5/hws/mlx5dr_debug.c | 2 +
drivers/net/mlx5/mlx5_flow.h | 44
6 files changed, 438 insertions(+), 3 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index a5ecce98e9..32ec3df7ef 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3586,6 +3586,7 @@ enum mlx5_ifc_header_anchors {
MLX5_HEADER_ANCHOR_PACKET_START = 0x0,
MLX5_HEADER_ANCHOR_FIRST_VLAN_START = 0x2,
MLX5_HEADER_ANCHOR_IPV6_IPV4 = 0x07,
+ MLX5_HEADER_ANCHOR_TCP_UDP = 0x09,
MLX5_HEADER_ANCHOR_INNER_MAC = 0x13,
MLX5_HEADER_ANCHOR_INNER_IPV6_IPV4 = 0x19,
};
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 2e692f76c3..9e7dd9c429 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -54,6 +54,8 @@ enum mlx5dr_action_type {
MLX5DR_ACTION_TYP_REMOVE_HEADER,
MLX5DR_ACTION_TYP_DEST_ROOT,
MLX5DR_ACTION_TYP_DEST_ARRAY,
+ MLX5DR_ACTION_TYP_POP_IPV6_ROUTE_EXT,
+ MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT,
MLX5DR_ACTION_TYP_MAX,
};
@@ -278,6 +280,11 @@ struct mlx5dr_rule_action {
uint8_t *data;
} reformat;
+ struct {
+ uint32_t offset;
+ uint8_t *header;
+ } ipv6_ext;
+
struct {
rte_be32_t vlan_hdr;
} push_vlan;
@@ -889,6 +896,28 @@ mlx5dr_action_create_remove_header(struct mlx5dr_context
*ctx,
struct mlx5dr_action_remove_header_attr
*attr,
uint32_t flags);
+/* Create action to push or remove IPv6 extension header.
+ *
+ * @param[in] ctx
+ * The context in which the new action will be created.
+ * @param[in] type
+ * Type of direct rule action: MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT or
+ * MLX5DR_ACTION_TYP_POP_IPV6_ROUTE_EXT.
+ * @param[in] hdr
+ * Header for packet reformat.
+ * @param[in] log_bulk_size
+ * Number of unique values used with this pattern.
+ * @param[in] flags
+ * Action creation flags. (enum mlx5dr_action_flags)
+ * @return pointer to mlx5dr_action on success NULL otherwise.
+ */
+struct mlx5dr_action *
+mlx5dr_action_create_reformat_ipv6_ext(struct mlx5dr_context *ctx,
+ enum mlx5dr_action_type type,
+ struct mlx5dr_action_reformat_header
*hdr,
+ uint32_t log_bulk_size,
+ uint32_t flags);
+
/* Destroy direct rule action.
*
* @param[in] action
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 76ca57d302..6ac3c2f782 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -26,7 +26,8 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),
BIT(MLX5DR_ACTION_TYP_REMOVE_HEADER) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |
- BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),
+ BIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2) |
+ BIT(MLX5DR_ACTION_TYP_POP_IPV6_ROUTE_EXT),
BIT(MLX5DR_ACTION_TYP_POP_VLAN),
BIT(MLX5DR_ACTION_TYP_POP_VLAN),
BIT(MLX5DR_ACTION_TYP_CTR),
@@ -39,6 +40,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
BIT(MLX5DR_ACTION_TYP_INSERT_HEADER) |
+ BIT(MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
BIT(MLX5DR_ACTION_TYP_TBL) |
@@ -61,6 +63,7 @@ static const uint32_t
action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_
BIT(MLX5DR_ACTION_TYP_PUSH_VLAN),
BIT(MLX5DR_ACTION_TYP_MODIFY_HDR),
BIT(MLX5DR_ACTION_TYP_INSERT_HEADER) |
+ BIT(MLX5DR_ACTION_TYP_PUSH_IPV6_ROUTE_EXT) |
BIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
BIT(MLX5DR
[PATCH 28/30] net/mlx5/hws: add setter for IPv6 routing push remove
From: Rongwei Liu
The rte action will be translated to multiple dr_actions which need
different setters to program them.
In order to leverage the existing setter logic, there is a new callback
introduce which called fetch_opt with unique parameter.
For each setter, it may have different reparsing properties.
Setter which requires no reparse can't share the same one with
the one has reparse enabled even if there is spare space.
Signed-off-by: Rongwei Liu
Reviewed-by: Alex Vesker
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_action.c | 174 +++
drivers/net/mlx5/hws/mlx5dr_action.h | 3 +-
2 files changed, 176 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 6ac3c2f782..281b09a582 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -3311,6 +3311,121 @@ mlx5dr_action_setter_reformat_trailer(struct
mlx5dr_actions_apply_data *apply,
apply->wqe_data[MLX5DR_ACTION_OFFSET_DW7] = 0;
}
+static void
+mlx5dr_action_setter_ipv6_route_ext_gen_push_mhdr(uint8_t *data, void *mh_data)
+{
+ uint8_t *action_ptr = mh_data;
+ uint32_t *ipv6_dst_addr;
+ uint8_t seg_left;
+ uint32_t i;
+
+ /* Fetch the last IPv6 address in the segment list which is the next
hop */
+ seg_left = MLX5_GET(header_ipv6_routing_ext, data, segments_left) - 1;
+ ipv6_dst_addr = (uint32_t *)data +
MLX5_ST_SZ_DW(header_ipv6_routing_ext)
+ + seg_left * MLX5_ST_SZ_DW(definer_hl_ipv6_addr);
+
+ /* Load next hop IPv6 address in reverse order to ipv6.dst_address */
+ for (i = 0; i < MLX5_ST_SZ_DW(definer_hl_ipv6_addr); i++) {
+ MLX5_SET(set_action_in, action_ptr, data,
be32toh(*ipv6_dst_addr++));
+ action_ptr += MLX5DR_MODIFY_ACTION_SIZE;
+ }
+
+ /* Set ipv6_route_ext.next_hdr per user input */
+ MLX5_SET(set_action_in, action_ptr, data, *data);
+}
+
+static void
+mlx5dr_action_setter_ipv6_route_ext_mhdr(struct mlx5dr_actions_apply_data
*apply,
+struct mlx5dr_actions_wqe_setter
*setter)
+{
+ struct mlx5dr_rule_action *rule_action = apply->rule_action;
+ struct mlx5dr_actions_wqe_setter tmp_setter = {0};
+ struct mlx5dr_rule_action tmp_rule_action;
+ __be64 cmd[MLX5_SRV6_SAMPLE_NUM] = {0};
+ struct mlx5dr_action *ipv6_ext_action;
+ uint8_t *header;
+
+ header = rule_action[setter->idx_double].ipv6_ext.header;
+ ipv6_ext_action = rule_action[setter->idx_double].action;
+ tmp_rule_action.action =
ipv6_ext_action->ipv6_route_ext.action[setter->extra_data];
+
+ if (tmp_rule_action.action->flags & MLX5DR_ACTION_FLAG_SHARED) {
+ tmp_rule_action.modify_header.offset = 0;
+ tmp_rule_action.modify_header.pattern_idx = 0;
+ tmp_rule_action.modify_header.data = NULL;
+ } else {
+ /*
+* Copy ipv6_dst from ipv6_route_ext.last_seg.
+* Set ipv6_route_ext.next_hdr.
+*/
+ mlx5dr_action_setter_ipv6_route_ext_gen_push_mhdr(header, cmd);
+ tmp_rule_action.modify_header.data = (uint8_t *)cmd;
+ tmp_rule_action.modify_header.pattern_idx = 0;
+ tmp_rule_action.modify_header.offset =
+ rule_action[setter->idx_double].ipv6_ext.offset;
+ }
+
+ apply->rule_action = &tmp_rule_action;
+
+ /* Reuse regular */
+ mlx5dr_action_setter_modify_header(apply, &tmp_setter);
+
+ /* Swap rule actions from backup */
+ apply->rule_action = rule_action;
+}
+
+static void
+mlx5dr_action_setter_ipv6_route_ext_insert_ptr(struct
mlx5dr_actions_apply_data *apply,
+ struct mlx5dr_actions_wqe_setter
*setter)
+{
+ struct mlx5dr_rule_action *rule_action = apply->rule_action;
+ struct mlx5dr_actions_wqe_setter tmp_setter = {0};
+ struct mlx5dr_rule_action tmp_rule_action;
+ struct mlx5dr_action *ipv6_ext_action;
+ uint8_t header[MLX5_PUSH_MAX_LEN];
+
+ ipv6_ext_action = rule_action[setter->idx_double].action;
+ tmp_rule_action.action =
ipv6_ext_action->ipv6_route_ext.action[setter->extra_data];
+
+ if (tmp_rule_action.action->flags & MLX5DR_ACTION_FLAG_SHARED) {
+ tmp_rule_action.reformat.offset = 0;
+ tmp_rule_action.reformat.hdr_idx = 0;
+ tmp_rule_action.reformat.data = NULL;
+ } else {
+ memcpy(header, rule_action[setter->idx_double].ipv6_ext.header,
+ tmp_rule_action.action->reformat.header_size);
+ /* Clear ipv6_route_ext.next_hdr for right checksum */
+ MLX5_SET(header_ipv6_routing_ext, header, next_hdr, 0);
+ tmp_rule_action.reformat.data = header;
+ tmp_rule_acti
[PATCH 29/30] net/mlx5: implement IPv6 routing push remove
From: Rongwei Liu
Reserve the push data buffer for each job and the maximum
length is set to 128 for now.
Only supports type IPPROTO_ROUTING when translating the rte
flow action.
Remove actions must be shared globally and only supports next layer
as TCP or UDP.
Signed-off-by: Rongwei Liu
Acked-by: Ori Kam
Acked-by: Suanming Mou
---
doc/guides/nics/features/mlx5.ini | 2 +
doc/guides/nics/mlx5.rst | 11 +-
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_flow.h | 21 ++-
drivers/net/mlx5/mlx5_flow_hw.c | 282 +-
5 files changed, 307 insertions(+), 10 deletions(-)
diff --git a/doc/guides/nics/features/mlx5.ini
b/doc/guides/nics/features/mlx5.ini
index a85d755734..9c943fe5da 100644
--- a/doc/guides/nics/features/mlx5.ini
+++ b/doc/guides/nics/features/mlx5.ini
@@ -107,6 +107,8 @@ flag = Y
inc_tcp_ack = Y
inc_tcp_seq = Y
indirect_list= Y
+ipv6_ext_push= Y
+ipv6_ext_remove = Y
jump = Y
mark = Y
meter= Y
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 81cc193f34..7e0a3d4cb8 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -148,7 +148,9 @@ Features
- Matching on GTP extension header with raw encap/decap action.
- Matching on Geneve TLV option header with raw encap/decap action.
- Matching on ESP header SPI field.
+- Matching on flex item with specific pattern.
- Matching on InfiniBand BTH.
+- Modify flex item field.
- Modify IPv4/IPv6 ECN field.
- RSS support in sample action.
- E-Switch mirroring and jump.
@@ -166,7 +168,7 @@ Features
- Sub-Function.
- Matching on represented port.
- Matching on aggregated affinity.
-
+- Push or remove IPv6 routing extension.
Limitations
---
@@ -728,6 +730,13 @@ Limitations
The flow engine of a process cannot move from active to standby mode
if preceding active application rules are still present and vice versa.
+- IPv6 routing extension push or remove:
+
+ - Supported only with HW Steering enabled (``dv_flow_en`` = 2).
+ - Supported in non-zero group (No limits on transfer domain if
`fdb_def_rule_en` = 1 which is default).
+ - Only supports TCP or UDP as next layer.
+ - IPv6 routing header must be the only present extension.
+ - Not supported on guest port.
Statistics
--
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index ad82d8060e..c60886abff 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -373,6 +373,7 @@ struct mlx5_hw_q_job {
};
void *user_data; /* Job user data. */
uint8_t *encap_data; /* Encap data. */
+ uint8_t *push_data; /* IPv6 routing push data. */
struct mlx5_modification_cmd *mhdr_cmd;
struct rte_flow_item *items;
union {
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 8174c03d50..6f4979a575 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -358,6 +358,8 @@ enum mlx5_feature_name {
#define MLX5_FLOW_ACTION_INDIRECT_COUNT (1ull << 43)
#define MLX5_FLOW_ACTION_INDIRECT_AGE (1ull << 44)
#define MLX5_FLOW_ACTION_QUOTA (1ull << 46)
+#define MLX5_FLOW_ACTION_IPV6_ROUTING_REMOVE (1ull << 47)
+#define MLX5_FLOW_ACTION_IPV6_ROUTING_PUSH (1ull << 48)
#define MLX5_FLOW_DROP_INCLUSIVE_ACTIONS \
(MLX5_FLOW_ACTION_COUNT | MLX5_FLOW_ACTION_SAMPLE |
MLX5_FLOW_ACTION_AGE)
@@ -1263,6 +1265,8 @@ typedef int
const struct rte_flow_action *,
struct mlx5dr_rule_action *);
+#define MLX5_MHDR_MAX_CMD ((MLX5_MAX_MODIFY_NUM) * 2 + 1)
+
/* rte flow action translate to DR action struct. */
struct mlx5_action_construct_data {
LIST_ENTRY(mlx5_action_construct_data) next;
@@ -1309,6 +1313,10 @@ struct mlx5_action_construct_data {
struct {
cnt_id_t id;
} shared_counter;
+ struct {
+ /* IPv6 extension push data len. */
+ uint16_t len;
+ } ipv6_ext;
struct {
uint32_t id;
uint32_t conf_masked:1;
@@ -1353,6 +1361,7 @@ struct rte_flow_actions_template {
uint16_t *src_off; /* RTE action displacement from app. template */
uint16_t reformat_off; /* Offset of DR reformat action. */
uint16_t mhdr_off; /* Offset of DR modify header action. */
+ uint16_t recom_off; /* Offset of DR IPv6 routing push remove action. */
uint32_t refcnt; /* Reference counter. */
uint8_t flex_item; /* flex item index. */
};
@@ -1376,7 +1385,14 @@ struct mlx5_hw_encap_decap_action {
uint8_t data[]; /* Action data. */
};
-#define MLX5_MHDR_MAX_CMD ((MLX5_MAX_MODIFY_NUM) * 2 + 1)
+/* Push remove action struct. */
+struct mlx5_hw_push_remove_action {
+ struct mlx5dr_action *act
[PATCH 30/30] net/mlx5/hws: add stc reparse support for srv6 push pop
From: Rongwei Liu
After pushing/popping srv6 into/from IPv6 packets, the checksum
needs to be correct.
In order to achieve this, there is a need to control each STE' reparse
behavior(CX7 and above). Add two more flags enumeration definitions to
allow external control of reparse property in stc.
1. Push
a. 1st STE, insert header action, reparse ignored(default reparse
always)
b. 2nd STE, modify IPv6 protocol, reparse always as default.
c. 3rd STE, modify header list, reparse always(default reparse
ignored)
2. Pop
a. 1st STE, modify header list, reparse always(default reparse
ignored)
b. 2nd STE, modify header list, reparse always(default reparse
ignored)
c. 3rd STE, modify IPv6 protocol, reparse ignored(default reparse
always); remove header action, reparse always as default.
For CX6Lx and CX6Dx, the reparse behavior is controlled by RTC as
always. Only pop action can work well.
Signed-off-by: Rongwei Liu
Reviewed-by: Erez Shitrit
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_action.c | 115 +++
drivers/net/mlx5/hws/mlx5dr_action.h | 7 ++
2 files changed, 87 insertions(+), 35 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c
b/drivers/net/mlx5/hws/mlx5dr_action.c
index 281b09a582..daeabead2a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -640,6 +640,7 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
case MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:
case MLX5DR_ACTION_TYP_MODIFY_HDR:
attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;
if (action->modify_header.require_reparse)
attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
@@ -678,9 +679,12 @@ static void mlx5dr_action_fill_stc_attr(struct
mlx5dr_action *action,
case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:
case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:
case MLX5DR_ACTION_TYP_INSERT_HEADER:
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
+ if (!action->reformat.require_reparse)
+ attr->reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;
+
attr->action_type = MLX5_IFC_STC_ACTION_TYPE_HEADER_INSERT;
attr->action_offset = MLX5DR_ACTION_OFFSET_DW6;
- attr->reparse_mode = MLX5_IFC_STC_REPARSE_ALWAYS;
attr->insert_header.encap = action->reformat.encap;
attr->insert_header.insert_anchor = action->reformat.anchor;
attr->insert_header.arg_id = action->reformat.arg_obj->id;
@@ -1441,7 +1445,7 @@ static int
mlx5dr_action_handle_insert_with_ptr(struct mlx5dr_action *action,
uint8_t num_of_hdrs,
struct mlx5dr_action_reformat_header *hdrs,
-uint32_t log_bulk_sz)
+uint32_t log_bulk_sz, uint32_t reparse)
{
struct mlx5dr_devx_obj *arg_obj;
size_t max_sz = 0;
@@ -1478,6 +1482,11 @@ mlx5dr_action_handle_insert_with_ptr(struct
mlx5dr_action *action,
action[i].reformat.encap = 1;
}
+ if (likely(reparse == MLX5DR_ACTION_STC_REPARSE_DEFAULT))
+ action[i].reformat.require_reparse = true;
+ else if (reparse == MLX5DR_ACTION_STC_REPARSE_ON)
+ action[i].reformat.require_reparse = true;
+
ret = mlx5dr_action_create_stcs(&action[i], NULL);
if (ret) {
DR_LOG(ERR, "Failed to create stc for reformat");
@@ -1514,7 +1523,8 @@ mlx5dr_action_handle_l2_to_tunnel_l3(struct mlx5dr_action
*action,
ret = mlx5dr_action_handle_insert_with_ptr(action,
num_of_hdrs,
hdrs,
- log_bulk_sz);
+ log_bulk_sz,
+
MLX5DR_ACTION_STC_REPARSE_DEFAULT);
if (ret)
goto put_shared_stc;
@@ -1657,7 +1667,8 @@ mlx5dr_action_create_reformat_hws(struct mlx5dr_action
*action,
ret = mlx5dr_action_create_stcs(action, NULL);
break;
case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:
- ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs,
hdrs, bulk_size);
+ ret = mlx5dr_action_handle_insert_with_ptr(action, num_of_hdrs,
hdrs, bulk_size,
+
MLX5DR_ACTION_STC_REPARSE_DEFAULT);
break;
case MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:
ret = mlx5dr_action_handle_l2_to_tunnel_l3(action, num_of_
RE: [PATCH v4 0/4] ptype matching support in mlx5
Hi, > -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, October 25, 2023 11:51 PM > To: dev@dpdk.org > Cc: Ori Kam ; Matan Azrad ; Michael > Baum ; Alex Vesker ; Suanming > Mou ; Slava Ovsiienko ; > Erez Shitrit > Subject: [PATCH v4 0/4] ptype matching support in mlx5 > > Add support for RTE_FLOW_ITEM_TYPE_PTYPE in mlx5 PMD. > > Alexander Kozyrev (3): > net/mlx5: add support for ptype match in hardware steering > net/mlx5/hws: add support for fragmented ptype match > doc: add packet type matching item to release notes > > Michael Baum (1): > doc: add PMD ptype item limitations > > doc/guides/nics/features/mlx5.ini | 1 + > doc/guides/nics/mlx5.rst | 15 ++ > doc/guides/rel_notes/release_23_11.rst | 5 + > drivers/net/mlx5/hws/mlx5dr_definer.c | 195 > + > drivers/net/mlx5/hws/mlx5dr_definer.h | 9 ++ > drivers/net/mlx5/mlx5_flow.h | 3 + > drivers/net/mlx5/mlx5_flow_hw.c| 1 + > 7 files changed, 229 insertions(+) > > -- > 2.18.2 Series applied to next-net-mlx, Squashed the last two patches into first as they need to be with the same patch that introduced the feature. Kindest regards, Raslan Darawsheh
[PATCH] ethdev: fix RTE_FLOW_PORT_FLAG_SHARE_INDIRECT definition
Fix value of RTE_FLOW_PORT_FLAG_SHARE_INDIRECT.
Fixes: f5b2846d89d7 ("ethdev: share indirect action between ports")
Cc: sta...@dpdk.org
Signed-off-by: Gregory Etelson
---
lib/ethdev/rte_flow.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h
index edefa34c10..c16fe8c21f 100644
--- a/lib/ethdev/rte_flow.h
+++ b/lib/ethdev/rte_flow.h
@@ -5365,6 +5365,13 @@ rte_flow_flex_item_release(uint16_t port_id,
*/
#define RTE_FLOW_PORT_FLAG_STRICT_QUEUE RTE_BIT32(0)
+/**
+ * Indicate all steering objects should be created on contexts
+ * of the host port, providing indirect object sharing between
+ * ports.
+ */
+#define RTE_FLOW_PORT_FLAG_SHARE_INDIRECT RTE_BIT32(1)
+
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
@@ -5450,13 +5457,6 @@ rte_flow_info_get(uint16_t port_id,
struct rte_flow_queue_info *queue_info,
struct rte_flow_error *error);
-/**
- * Indicate all steering objects should be created on contexts
- * of the host port, providing indirect object sharing between
- * ports.
- */
-#define RTE_FLOW_PORT_FLAG_SHARE_INDIRECT RTE_BIT32(0)
-
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
--
2.39.2
[PATCH 00/13] net/mlx5: support more REG C registers
Support increased number of REG_Cx registers. Gregory Etelson (7): net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data net/mlx5: add flow_hw_get_reg_id_from_ctx() net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call net/mlx5: add rte_device parameter to locate HWS registers net/mlx5: separate port REG_C registers usage net/mlx5: merge REG_C aliases net/mlx5: initialize HWS flow tags registers in shared dev context Itamar Gozlan (1): net/mlx5/hws: adding method to query rule hash Ori Kam (5): net/mlx5: add support for calc hash net/mlx5: fix insert by index net/mlx5: fix query for NIC flow cap net/mlx5: add support for more registers net/mlx5: add validation support for tags drivers/common/mlx5/mlx5_devx_cmds.c | 17 ++- drivers/common/mlx5/mlx5_devx_cmds.h | 2 +- drivers/common/mlx5/mlx5_prm.h | 56 ++- drivers/net/mlx5/hws/meson.build | 1 + drivers/net/mlx5/hws/mlx5dr.h | 26 drivers/net/mlx5/hws/mlx5dr_cmd.c | 3 + drivers/net/mlx5/hws/mlx5dr_cmd.h | 3 +- drivers/net/mlx5/hws/mlx5dr_crc32.c| 61 drivers/net/mlx5/hws/mlx5dr_crc32.h| 13 ++ drivers/net/mlx5/hws/mlx5dr_definer.c | 20 ++- drivers/net/mlx5/hws/mlx5dr_internal.h | 1 + drivers/net/mlx5/hws/mlx5dr_rule.c | 37 + drivers/net/mlx5/hws/mlx5dr_rule.h | 1 + drivers/net/mlx5/linux/mlx5_os.c | 39 + drivers/net/mlx5/mlx5.c| 79 +- drivers/net/mlx5/mlx5.h| 16 +- drivers/net/mlx5/mlx5_flow.c | 63 +--- drivers/net/mlx5/mlx5_flow.h | 68 ++--- drivers/net/mlx5/mlx5_flow_dv.c| 24 ++- drivers/net/mlx5/mlx5_flow_hw.c| 201 - drivers/net/mlx5/mlx5_flow_meter.c | 14 +- 21 files changed, 491 insertions(+), 254 deletions(-) create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.c create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.h -- 2.39.2
[PATCH 01/13] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data
New mlx5dr_context member replaces mlx5dr_cmd_query_caps.
Capabilities structure is a member of mlx5dr_context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c
b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 0e1035c6bd..5d6ff516b3 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1185,7 +1185,7 @@ mlx5dr_definer_conv_item_gtp(struct
mlx5dr_definer_conv_data *cd,
return rte_errno;
}
- if (m->hdr.teid) {
+ if (m->teid) {
if (!(caps->flex_protocols & MLX5_HCA_FLEX_GTPU_TEID_ENABLED)) {
rte_errno = ENOTSUP;
return rte_errno;
@@ -1211,7 +1211,7 @@ mlx5dr_definer_conv_item_gtp(struct
mlx5dr_definer_conv_data *cd,
}
- if (m->hdr.msg_type) {
+ if (m->msg_type) {
if (!(caps->flex_protocols & MLX5_HCA_FLEX_GTPU_DW_0_ENABLED)) {
rte_errno = ENOTSUP;
return rte_errno;
--
2.39.2
[PATCH 02/13] net/mlx5: add flow_hw_get_reg_id_from_ctx()
The new function call `flow_hw_get_reg_id_from_ctx()` maps input
DR5 context and register type to REG_C register.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 1fec295476..de31ab56bc 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1714,6 +1714,28 @@ flow_hw_get_reg_id(enum rte_flow_item_type type,
uint32_t id)
}
}
+static __rte_always_inline int
+flow_hw_get_reg_id_from_ctx(void *dr_ctx,
+ enum rte_flow_item_type type, uint32_t id)
+{
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+ uint16_t port;
+
+ MLX5_ETH_FOREACH_DEV(port, NULL) {
+ struct mlx5_priv *priv;
+
+ priv = rte_eth_devices[port].data->dev_private;
+ if (priv->dr_ctx == dr_ctx)
+ return flow_hw_get_reg_id(type, id);
+ }
+#else
+ RTE_SET_USED(dr_ctx);
+ RTE_SET_USED(type);
+ RTE_SET_USED(id);
+#endif
+ return REG_NON;
+}
+
void flow_hw_set_port_info(struct rte_eth_dev *dev);
void flow_hw_clear_port_info(struct rte_eth_dev *dev);
--
2.39.2
[PATCH 03/13] net/mlx5/hws: Definer, use flow_hw_get_reg_id_from_ctx function call
New function call `flow_hw_get_reg_id_from_ctx()` matches REG_C
register to input DR5 context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c
b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 5d6ff516b3..7e1a92d78a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1541,7 +1541,9 @@ mlx5dr_definer_conv_item_tag(struct
mlx5dr_definer_conv_data *cd,
return 0;
if (item->type == RTE_FLOW_ITEM_TYPE_TAG)
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, v->index);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
+ RTE_FLOW_ITEM_TYPE_TAG,
+ v->index);
else
reg = (int)v->index;
@@ -1601,7 +1603,9 @@ mlx5dr_definer_conv_item_quota(struct
mlx5dr_definer_conv_data *cd,
__rte_unused struct rte_flow_item *item,
int item_idx)
{
- int mtr_reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ int mtr_reg =
+ flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_METER_COLOR,
+ 0);
struct mlx5dr_definer_fc *fc;
if (mtr_reg < 0) {
@@ -1631,7 +1635,7 @@ mlx5dr_definer_conv_item_metadata(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, -1);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_META, -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item metadata");
rte_errno = EINVAL;
@@ -1939,7 +1943,8 @@ mlx5dr_definer_conv_item_conntrack(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_CONNTRACK, -1);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx, RTE_FLOW_ITEM_TYPE_CONNTRACK,
+ -1);
if (reg <= 0) {
DR_LOG(ERR, "Invalid register for item conntrack");
rte_errno = EINVAL;
@@ -2080,7 +2085,8 @@ mlx5dr_definer_conv_item_meter_color(struct
mlx5dr_definer_conv_data *cd,
if (!m)
return 0;
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ reg = flow_hw_get_reg_id_from_ctx(cd->ctx,
+ RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
MLX5_ASSERT(reg > 0);
fc = mlx5dr_definer_get_register_fc(cd, reg);
--
2.39.2
[PATCH 04/13] net/mlx5: add rte_device parameter to locate HWS registers
1. Add rte_eth_dev parameter to the `flow_hw_get_reg_id()`
2. Add mlx5_flow_hw_get_reg_id()
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 2 +-
drivers/net/mlx5/mlx5_flow.h| 13 +++--
drivers/net/mlx5/mlx5_flow_dv.c | 12 ++--
drivers/net/mlx5/mlx5_flow_hw.c | 7 +++
4 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index a500afd4f7..45a67607ed 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1718,7 +1718,7 @@ flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
}
}
-static void
+void
flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
{
struct mlx5_priv *priv = dev->data->dev_private;
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index de31ab56bc..dc4ced711d 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1681,8 +1681,10 @@ void flow_hw_clear_flow_metadata_config(void);
* TODO: Per port / device, FDB or NIC for Meta matching.
*/
static __rte_always_inline int
-flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)
+flow_hw_get_reg_id(struct rte_eth_dev *dev,
+ enum rte_flow_item_type type, uint32_t id)
{
+ RTE_SET_USED(dev);
switch (type) {
case RTE_FLOW_ITEM_TYPE_META:
#ifdef HAVE_MLX5_HWS_SUPPORT
@@ -1726,7 +1728,8 @@ flow_hw_get_reg_id_from_ctx(void *dr_ctx,
priv = rte_eth_devices[port].data->dev_private;
if (priv->dr_ctx == dr_ctx)
- return flow_hw_get_reg_id(type, id);
+ return flow_hw_get_reg_id(&rte_eth_devices[port],
+ type, id);
}
#else
RTE_SET_USED(dr_ctx);
@@ -2877,6 +2880,12 @@ flow_hw_get_srh_flex_parser_byte_off_from_ctx(void
*dr_ctx __rte_unused)
}
void
mlx5_indirect_list_handles_release(struct rte_eth_dev *dev);
+void
+flow_rxq_mark_flag_set(struct rte_eth_dev *dev);
+int
+mlx5_flow_hw_get_reg_id(struct mlx5dr_context *ctx,
+ enum rte_flow_item_type type, uint32_t id);
+
#ifdef HAVE_MLX5_HWS_SUPPORT
struct mlx5_mirror;
void
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 3dc2fe5c71..05a374493d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1919,8 +1919,8 @@ mlx5_flow_field_id_to_modify_info
off_be = (tag_index == MLX5_LINEAR_HASH_TAG_INDEX) ?
16 - (data->offset + width) + 16 :
data->offset;
if (priv->sh->config.dv_flow_en == 2)
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG,
-tag_index);
+ reg = flow_hw_get_reg_id(dev,
RTE_FLOW_ITEM_TYPE_TAG,
+data->level);
else
reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
tag_index, error);
@@ -2025,7 +2025,7 @@ mlx5_flow_field_id_to_modify_info
if (priv->sh->config.dv_flow_en == 2)
reg = flow_hw_get_reg_id
- (RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ (dev, RTE_FLOW_ITEM_TYPE_METER_COLOR,
0);
else
reg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR,
0, error);
@@ -10256,7 +10256,7 @@ flow_dv_translate_item_meta(struct rte_eth_dev *dev,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = flow_dv_get_metadata_reg(dev, attr, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_META, 0);
+ reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_META, 0);
if (reg < 0)
return;
MLX5_ASSERT(reg != REG_NON);
@@ -10359,7 +10359,7 @@ flow_dv_translate_item_tag(struct rte_eth_dev *dev,
void *key,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, index, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_TAG, index);
+ reg = flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG, index);
MLX5_ASSERT(reg > 0);
flow_dv_match_meta_reg(key, (enum modify_reg)reg, tag_v->data,
tag_m->data);
}
@@ -11057,7 +11057,7 @@ flow_dv_translate_item_meter_color(struct rte_eth_dev
*dev, void *key,
if (!!(key_type & MLX5_SET_MATCHER_SW))
reg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, NULL);
else
- reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);
+ reg = flow_hw_get_reg_id(dev,
[PATCH 06/13] net/mlx5: merge REG_C aliases
Merge `mtr_color_reg` and `mlx5_flow_hw_aso_tag`
into `aso_reg`
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 10 +-
drivers/net/mlx5/mlx5.h| 3 +--
drivers/net/mlx5/mlx5_flow.c | 16
drivers/net/mlx5/mlx5_flow.h | 3 +--
drivers/net/mlx5/mlx5_flow_dv.c| 7 ---
drivers/net/mlx5/mlx5_flow_hw.c| 3 +--
drivers/net/mlx5/mlx5_flow_meter.c | 4 ++--
7 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 96d32d11d8..ed273e14cf 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1328,14 +1328,14 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
* Prefer REG_C_3 if it is available.
*/
if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- sh->registers.mtr_color_reg = REG_C_3;
+ sh->registers.aso_reg = REG_C_3;
else
- sh->registers.mtr_color_reg =
+ sh->registers.aso_reg =
ffs(reg_c_mask) - 1 + REG_C_0;
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- sh->registers.mtr_color_reg);
+ sh->registers.aso_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1360,7 +1360,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_2_3 = 1;
#endif
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
- if (hca_attr->flow_hit_aso && sh->registers.mtr_color_reg ==
REG_C_3) {
+ if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3)
{
sh->flow_hit_aso_en = 1;
err = mlx5_flow_aso_age_mng_init(sh);
if (err) {
@@ -1374,7 +1374,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
defined (HAVE_MLX5_DR_ACTION_ASO_CT)
/* HWS create CT ASO SQ based on HWS configure queue number. */
if (sh->config.dv_flow_en != 2 &&
- hca_attr->ct_offload && sh->registers.mtr_color_reg ==
REG_C_3) {
+ hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
err = mlx5_flow_aso_ct_mng_init(sh);
if (err) {
err = -err;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 01cb21fc93..99a2ad88ed 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1376,8 +1376,7 @@ struct mlx5_hws_cnt_svc_mng {
#define MLX5_FLOW_HW_TAGS_MAX 8
struct mlx5_dev_registers {
- enum modify_reg mlx5_flow_hw_aso_tag;
- enum modify_reg mtr_color_reg; /* Meter color match REG_C. */
+ enum modify_reg aso_reg;
enum modify_reg hw_avl_tags[MLX5_FLOW_HW_TAGS_MAX];
};
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 3ddc3ba772..ad9a2f2273 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1364,23 +1364,23 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
* should use the meter color register for match.
*/
if (priv->mtr_reg_share)
- return reg->mtr_color_reg;
+ return reg->aso_reg;
else
- return reg->mtr_color_reg != REG_C_2 ? REG_C_2 :
+ return reg->aso_reg != REG_C_2 ? REG_C_2 :
REG_C_3;
case MLX5_MTR_COLOR:
case MLX5_ASO_FLOW_HIT:
case MLX5_ASO_CONNTRACK:
case MLX5_SAMPLE_ID:
/* All features use the same REG_C. */
- MLX5_ASSERT(reg->mtr_color_reg != REG_NON);
- return reg->mtr_color_reg;
+ MLX5_ASSERT(reg->aso_reg != REG_NON);
+ return reg->aso_reg;
case MLX5_COPY_MARK:
/*
* Metadata COPY_MARK register using is in meter suffix sub
* flow while with meter. It's safe to share the same register.
*/
- return reg->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
+ return reg->aso_reg != REG_C_2 ? REG_C_2 : REG_C_3;
case MLX5_APP_TAG:
/*
* If meter is enable, it will engage the register for color
@@ -1389,7 +1389,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
* match.
* If meter is
[PATCH 05/13] net/mlx5: separate port REG_C registers usage
Current implementation stored REG_C registers available for HWS tags
in PMD global array. As the result, PMD could not work properly with
different port types that allocate REG_C registers differently.
The patch stores registers available to a port in the port
shared context. Register values will be assigned according to the port
capabilities.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/common/mlx5/mlx5_prm.h | 12 +++
drivers/net/mlx5/linux/mlx5_os.c | 16 ++--
drivers/net/mlx5/mlx5.c| 4 -
drivers/net/mlx5/mlx5.h| 11 ++-
drivers/net/mlx5/mlx5_flow.c | 29 ++-
drivers/net/mlx5/mlx5_flow.h | 25 ++
drivers/net/mlx5/mlx5_flow_dv.c| 13 +--
drivers/net/mlx5/mlx5_flow_hw.c| 129 -
drivers/net/mlx5/mlx5_flow_meter.c | 14 ++--
9 files changed, 78 insertions(+), 175 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index bced5a59dd..e13ca3cd22 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -864,6 +864,18 @@ enum modify_reg {
REG_C_11,
};
+static __rte_always_inline uint8_t
+mlx5_regc_index(enum modify_reg regc_val)
+{
+ return (uint8_t)(regc_val - REG_C_0);
+}
+
+static __rte_always_inline enum modify_reg
+mlx5_regc_value(uint8_t regc_ix)
+{
+ return REG_C_0 + regc_ix;
+}
+
/* Modification sub command. */
struct mlx5_modification_cmd {
union {
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index d5ef695e6d..96d32d11d8 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1328,14 +1328,14 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
* Prefer REG_C_3 if it is available.
*/
if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- priv->mtr_color_reg = REG_C_3;
+ sh->registers.mtr_color_reg = REG_C_3;
else
- priv->mtr_color_reg = ffs(reg_c_mask)
- - 1 + REG_C_0;
+ sh->registers.mtr_color_reg =
+ ffs(reg_c_mask) - 1 + REG_C_0;
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- priv->mtr_color_reg);
+ sh->registers.mtr_color_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1360,7 +1360,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_2_3 = 1;
#endif
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
- if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
+ if (hca_attr->flow_hit_aso && sh->registers.mtr_color_reg ==
REG_C_3) {
sh->flow_hit_aso_en = 1;
err = mlx5_flow_aso_age_mng_init(sh);
if (err) {
@@ -1374,7 +1374,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
defined (HAVE_MLX5_DR_ACTION_ASO_CT)
/* HWS create CT ASO SQ based on HWS configure queue number. */
if (sh->config.dv_flow_en != 2 &&
- hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
+ hca_attr->ct_offload && sh->registers.mtr_color_reg ==
REG_C_3) {
err = mlx5_flow_aso_ct_mng_init(sh);
if (err) {
err = -err;
@@ -1618,8 +1618,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
goto error;
}
/* Only HWS requires this information. */
- flow_hw_init_tags_set(eth_dev);
- flow_hw_init_flow_metadata_config(eth_dev);
+ if (sh->refcnt == 1)
+ flow_hw_init_tags_set(eth_dev);
if (priv->sh->config.dv_esw_en &&
flow_hw_create_vport_action(eth_dev)) {
DRV_LOG(ERR, "port %u failed to create vport action",
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 08b7b03365..c13ce2c13c 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -2173,10 +2173,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
flow_hw_destroy_vport_action(dev);
flow_hw_resource_release(dev);
flow_hw_clear_port_info(dev);
- if (priv->sh->config.dv_flow_en == 2) {
- flow_hw_clear_flow_metadata_config();
- flow_hw_clear_tags_set(dev);
- }
#endif
if
[PATCH 07/13] net/mlx5: initialize HWS flow tags registers in shared dev context
Move HWS flow tags registers initialization to shared dev context.
Signed-off-by: Gregory Etelson
Acked-by: Ori Kam
---
drivers/net/mlx5/linux/mlx5_os.c | 35 ++-
drivers/net/mlx5/mlx5.c | 75
drivers/net/mlx5/mlx5.h | 6 +++
drivers/net/mlx5/mlx5_flow.h | 3 --
drivers/net/mlx5/mlx5_flow_hw.c | 34 ---
5 files changed, 84 insertions(+), 69 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index ed273e14cf..ec067ef52c 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1304,38 +1304,12 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
sh->steering_format_version = hca_attr->steering_format_version;
-#if defined(HAVE_MLX5DV_DR) && \
- (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
-defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
+#if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
sh->config.dv_flow_en) {
- uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
- /*
-* Meter needs two REG_C's for color match and pre-sfx
-* flow match. Here get the REG_C for color match.
-* REG_C_0 and REG_C_1 is reserved for metadata feature.
-*/
- reg_c_mask &= 0xfc;
- if (rte_popcount32(reg_c_mask) < 1) {
- priv->mtr_en = 0;
- DRV_LOG(WARNING, "No available register for"
- " meter.");
- } else {
- /*
-* The meter color register is used by the
-* flow-hit feature as well.
-* The flow-hit feature must use REG_C_3
-* Prefer REG_C_3 if it is available.
-*/
- if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
- sh->registers.aso_reg = REG_C_3;
- else
- sh->registers.aso_reg =
- ffs(reg_c_mask) - 1 + REG_C_0;
+ if (sh->registers.aso_reg != REG_NON) {
priv->mtr_en = 1;
priv->mtr_reg_share = hca_attr->qos.flow_meter;
- DRV_LOG(DEBUG, "The REG_C meter uses is %d",
- sh->registers.aso_reg);
}
}
if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
@@ -1358,7 +1332,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
sh->tunnel_header_0_1 = 1;
if (hca_attr->flow.tunnel_header_2_3)
sh->tunnel_header_2_3 = 1;
-#endif
+#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3)
{
sh->flow_hit_aso_en = 1;
@@ -1617,9 +1591,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
err = ENOTSUP;
goto error;
}
- /* Only HWS requires this information. */
- if (sh->refcnt == 1)
- flow_hw_init_tags_set(eth_dev);
if (priv->sh->config.dv_esw_en &&
flow_hw_create_vport_action(eth_dev)) {
DRV_LOG(ERR, "port %u failed to create vport action",
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index c13ce2c13c..840c566162 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1599,6 +1599,80 @@ mlx5_rt_timestamp_config(struct mlx5_dev_ctx_shared *sh,
}
}
+static void
+mlx5_init_hws_flow_tags_registers(struct mlx5_dev_ctx_shared *sh)
+{
+ struct mlx5_dev_registers *reg = &sh->registers;
+ uint32_t meta_mode = sh->config.dv_xmeta_en;
+ uint8_t masks = (uint8_t)sh->cdev->config.hca_attr.set_reg_c;
+ uint8_t unset = 0;
+ uint32_t i, j;
+
+ /*
+* The CAPA is global for common device but only used in net.
+* It is shared per eswitch domain.
+*/
+ if (reg->aso_reg != REG_NON)
+ unset |= 1 << mlx5_regc_index(reg->aso_reg);
+ unset |= 1 << mlx5_regc_index(REG_C_6);
+ if (sh->config.dv_esw_en)
+ unset |= 1 << mlx5_regc_index(REG_C_0);
+ if (meta_mode == MLX5_XMETA_MODE_META32_HWS)
+ unset |= 1 << mlx5_re
[PATCH 09/13] net/mlx5: add support for calc hash
From: Ori Kam
This commit adds calculate hash function support for mlx5 PMD.
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow.c| 32
drivers/net/mlx5/mlx5_flow.h| 8
drivers/net/mlx5/mlx5_flow_hw.c | 31 ++-
3 files changed, 70 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index ad9a2f2273..819831cff8 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -1178,6 +1178,13 @@ mlx5_flow_async_action_list_handle_query_update(struct
rte_eth_dev *dev,
enum rte_flow_query_update_mode
mode,
void *user_data,
struct rte_flow_error *error);
+static int
+mlx5_flow_calc_table_hash(struct rte_eth_dev *dev,
+ const struct rte_flow_template_table *table,
+ const struct rte_flow_item pattern[],
+ uint8_t pattern_template_index,
+ uint32_t *hash, struct rte_flow_error *error);
+
static const struct rte_flow_ops mlx5_flow_ops = {
.validate = mlx5_flow_validate,
.create = mlx5_flow_create,
@@ -1231,6 +1238,7 @@ static const struct rte_flow_ops mlx5_flow_ops = {
mlx5_flow_action_list_handle_query_update,
.async_action_list_handle_query_update =
mlx5_flow_async_action_list_handle_query_update,
+ .flow_calc_table_hash = mlx5_flow_calc_table_hash,
};
/* Tunnel information. */
@@ -11058,6 +11066,30 @@ mlx5_flow_async_action_list_handle_query_update(struct
rte_eth_dev *dev,
}
+static int
+mlx5_flow_calc_table_hash(struct rte_eth_dev *dev,
+ const struct rte_flow_template_table *table,
+ const struct rte_flow_item pattern[],
+ uint8_t pattern_template_index,
+ uint32_t *hash, struct rte_flow_error *error)
+{
+ struct rte_flow_attr attr = { .transfer = 0 };
+ enum mlx5_flow_drv_type drv_type = flow_get_drv_type(dev, &attr);
+ const struct mlx5_flow_driver_ops *fops;
+
+ if (drv_type == MLX5_FLOW_TYPE_MIN || drv_type == MLX5_FLOW_TYPE_MAX)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ NULL, "invalid driver type");
+ fops = flow_get_drv_ops(drv_type);
+ if (!fops || !fops->action_query_update)
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ NULL, "no query_update handler");
+ return fops->flow_calc_table_hash(dev, table, pattern,
pattern_template_index,
+ hash, error);
+}
+
/**
* Destroy all indirect actions (shared RSS).
*
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 81ec8fd7f1..db6f3ba6f5 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -2062,6 +2062,13 @@ typedef int
const void **update, void **query,
enum rte_flow_query_update_mode mode,
void *user_data, struct rte_flow_error *error);
+typedef int
+(*mlx5_flow_calc_table_hash_t)
+ (struct rte_eth_dev *dev,
+const struct rte_flow_template_table *table,
+const struct rte_flow_item pattern[],
+uint8_t pattern_template_index,
+uint32_t *hash, struct rte_flow_error *error);
struct mlx5_flow_driver_ops {
mlx5_flow_validate_t validate;
@@ -2133,6 +2140,7 @@ struct mlx5_flow_driver_ops {
action_list_handle_query_update;
mlx5_flow_async_action_list_handle_query_update_t
async_action_list_handle_query_update;
+ mlx5_flow_calc_table_hash_t flow_calc_table_hash;
};
/* mlx5_flow.c */
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index cccf7de13f..ea43ebb78b 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2773,7 +2773,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,
static const struct rte_flow_item *
flow_hw_get_rule_items(struct rte_eth_dev *dev,
- struct rte_flow_template_table *table,
+ const struct rte_flow_template_table *table,
const struct rte_flow_item items[],
uint8_t pattern_template_index,
struct mlx5_hw_q_job *job)
@@ -10144,6 +10144,34 @@ flow_hw_action_list_handle_query_update(struct
rte_eth_dev *dev,
update, query, mode, NULL, error);
}
[PATCH 08/13] net/mlx5/hws: adding method to query rule hash
From: Itamar Gozlan
Add a method to the HW steering API that allows querying
the hash result for a given matcher and a set of items. This
can be used to predict the location of the rule in the hash table.
Signed-off-by: Itamar Gozlan
---
drivers/common/mlx5/mlx5_prm.h | 8 +++-
drivers/net/mlx5/hws/meson.build | 1 +
drivers/net/mlx5/hws/mlx5dr.h | 26 +++
drivers/net/mlx5/hws/mlx5dr_cmd.c | 3 ++
drivers/net/mlx5/hws/mlx5dr_cmd.h | 3 +-
drivers/net/mlx5/hws/mlx5dr_crc32.c| 61 ++
drivers/net/mlx5/hws/mlx5dr_crc32.h| 13 ++
drivers/net/mlx5/hws/mlx5dr_internal.h | 1 +
drivers/net/mlx5/hws/mlx5dr_rule.c | 37
drivers/net/mlx5/hws/mlx5dr_rule.h | 1 +
10 files changed, 152 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.c
create mode 100644 drivers/net/mlx5/hws/mlx5dr_crc32.h
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index e13ca3cd22..19c6d0282b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2279,6 +2279,9 @@ enum {
MLX5_GENERATE_WQE_TYPE_FLOW_UPDATE = 1 << 1,
};
+enum {
+ MLX5_FLOW_TABLE_HASH_TYPE_CRC32,
+};
/*
* HCA Capabilities 2
*/
@@ -2328,7 +2331,10 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
u8 format_select_dw_gtpu_dw_2[0x8];
u8 format_select_dw_gtpu_first_ext_dw_0[0x8];
u8 generate_wqe_type[0x20];
- u8 reserved_at_2c0[0x540];
+ u8 reserved_at_2c0[0x160];
+ u8 reserved_at_420[0x1c];
+ u8 flow_table_hash_type[0x4];
+ u8 reserved_at_440[0x3c0];
};
struct mlx5_ifc_esw_cap_bits {
diff --git a/drivers/net/mlx5/hws/meson.build b/drivers/net/mlx5/hws/meson.build
index 38776d5163..bbcc628557 100644
--- a/drivers/net/mlx5/hws/meson.build
+++ b/drivers/net/mlx5/hws/meson.build
@@ -19,4 +19,5 @@ sources += files(
'mlx5dr_definer.c',
'mlx5dr_debug.c',
'mlx5dr_pat_arg.c',
+'mlx5dr_crc32.c',
)
diff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h
index 1995c55132..39d902e762 100644
--- a/drivers/net/mlx5/hws/mlx5dr.h
+++ b/drivers/net/mlx5/hws/mlx5dr.h
@@ -118,6 +118,11 @@ enum mlx5dr_matcher_distribute_mode {
MLX5DR_MATCHER_DISTRIBUTE_BY_LINEAR = 0x1,
};
+enum mlx5dr_rule_hash_calc_mode {
+ MLX5DR_RULE_HASH_CALC_MODE_RAW,
+ MLX5DR_RULE_HASH_CALC_MODE_IDX,
+};
+
struct mlx5dr_matcher_attr {
/* Processing priority inside table */
uint32_t priority;
@@ -430,6 +435,27 @@ int mlx5dr_rule_action_update(struct mlx5dr_rule
*rule_handle,
struct mlx5dr_rule_action rule_actions[],
struct mlx5dr_rule_attr *attr);
+/* Calculate hash for a given set of items, which indicates rule location in
+ * the hash table.
+ *
+ * @param[in] matcher
+ * The matcher of the created rule.
+ * @param[in] items
+ * Matching pattern item definition.
+ * @param[in] mt_idx
+ * Match template index that the match was created with.
+ * @param[in] mode
+ * Hash calculation mode
+ * @param[in, out] ret_hash
+ * Returned calculated hash result
+ * @return zero on success non zero otherwise.
+ */
+int mlx5dr_rule_hash_calculate(struct mlx5dr_matcher *matcher,
+ const struct rte_flow_item items[],
+ uint8_t mt_idx,
+ enum mlx5dr_rule_hash_calc_mode mode,
+ uint32_t *ret_hash);
+
/* Create direct rule drop action.
*
* @param[in] ctx
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c
b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 781de40c02..c52cdd0767 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1154,6 +1154,9 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,
(res & MLX5_CROSS_VHCA_ALLOWED_OBJS_FT) &&
(res & MLX5_CROSS_VHCA_ALLOWED_OBJS_RTC);
+ caps->flow_table_hash_type = MLX5_GET(query_hca_cap_out, out,
+
capability.cmd_hca_cap_2.flow_table_hash_type);
+
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE |
MLX5_HCA_CAP_OPMOD_GET_CUR);
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h
b/drivers/net/mlx5/hws/mlx5dr_cmd.h
index 28e5ea4726..03db62e2e2 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h
@@ -217,10 +217,11 @@ struct mlx5dr_cmd_query_caps {
uint8_t rtc_log_depth_max;
uint8_t format_select_gtpu_dw_0;
uint8_t format_select_gtpu_dw_1;
+ uint8_t flow_table_hash_type;
uint8_t format_select_gtpu_dw_2;
uint8_t format_select_gtpu_ext_dw_0;
- uint32_t linear_match_definer;
uint8_t access_index_mode;
+ uint32_t linear_match_def
[PATCH 10/13] net/mlx5: fix insert by index
From: Ori Kam
Due to mlx5dr internal logic calling the rule_create function
must have items structure.
This commit create such temp structure.
Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
Cc: ere...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index ea43ebb78b..2148f5a63a 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2987,6 +2987,7 @@ flow_hw_async_flow_create_by_index(struct rte_eth_dev
*dev,
void *user_data,
struct rte_flow_error *error)
{
+ struct rte_flow_item items[] = {{.type = RTE_FLOW_ITEM_TYPE_END,}};
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5dr_rule_attr rule_attr = {
.queue_id = queue,
@@ -3050,7 +3051,7 @@ flow_hw_async_flow_create_by_index(struct rte_eth_dev
*dev,
goto free;
}
ret = mlx5dr_rule_create(table->matcher,
-0, NULL, action_template_index, rule_acts,
+0, items, action_template_index, rule_acts,
&rule_attr, (struct mlx5dr_rule *)flow->rule);
if (likely(!ret))
return (struct rte_flow *)flow;
--
2.39.2
[PATCH 11/13] net/mlx5: fix query for NIC flow cap
From: Ori Kam
Add query for nic flow table support bit.
Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bi...@nvidia.com
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index ff2d6d10b7..3afb2e9f80 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1082,6 +1082,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->striding_rq = MLX5_GET(cmd_hca_cap, hcattr, striding_rq);
attr->ext_stride_num_range =
MLX5_GET(cmd_hca_cap, hcattr, ext_stride_num_range);
+ attr->nic_flow_table = MLX5_GET(cmd_hca_cap, hcattr, nic_flow_table);
attr->max_flow_counter_15_0 = MLX5_GET(cmd_hca_cap, hcattr,
max_flow_counter_15_0);
attr->max_flow_counter_31_16 = MLX5_GET(cmd_hca_cap, hcattr,
--
2.39.2
[PATCH 13/13] net/mlx5: add validation support for tags
From: Ori Kam
This commit introduce validation for invalid tags
Signed-off-by: Ori Kam
---
drivers/net/mlx5/mlx5_flow_hw.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index f2159e40fd..2b1fc519fc 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4049,7 +4049,8 @@ flow_hw_modify_field_is_used(const struct
rte_flow_action_modify_field *action,
}
static int
-flow_hw_validate_action_modify_field(const struct rte_flow_action *action,
+flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,
+const struct rte_flow_action *action,
const struct rte_flow_action *mask,
struct rte_flow_error *error)
{
@@ -4118,6 +4119,22 @@ flow_hw_validate_action_modify_field(const struct
rte_flow_action *action,
if (ret)
return ret;
}
+ if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+action_conf->dst.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+action_conf->dst.tag_index != MLX5_LINEAR_HASH_TAG_INDEX) ||
+ (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+action_conf->src.tag_index >= MLX5_FLOW_HW_TAGS_MAX &&
+action_conf->src.tag_index != MLX5_LINEAR_HASH_TAG_INDEX))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+"tag index is out of range");
+ if ((action_conf->dst.field == RTE_FLOW_FIELD_TAG &&
+flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG,
action_conf->dst.tag_index) == REG_NON) ||
+ (action_conf->src.field == RTE_FLOW_FIELD_TAG &&
+flow_hw_get_reg_id(dev, RTE_FLOW_ITEM_TYPE_TAG,
action_conf->src.tag_index) == REG_NON))
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION, action,
+ "tag index is out of range");
if (mask_conf->width != UINT32_MAX)
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION, action,
@@ -4728,7 +4745,7 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev,
action_flags |= MLX5_FLOW_ACTION_METER;
break;
case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
- ret = flow_hw_validate_action_modify_field(action, mask,
+ ret = flow_hw_validate_action_modify_field(dev, action,
mask,
error);
if (ret < 0)
return ret;
@@ -5596,7 +5613,14 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,
if (tag == NULL)
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
- NULL, "Tag spec is
NULL");
+ NULL,
+ "Tag spec is NULL");
+ if (tag->index >= MLX5_FLOW_HW_TAGS_MAX &&
+ tag->index != MLX5_LINEAR_HASH_TAG_INDEX)
+ return rte_flow_error_set(error, EINVAL,
+
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+ NULL,
+ "Invalid tag index");
tag_idx = flow_hw_get_reg_id(dev,
RTE_FLOW_ITEM_TYPE_TAG, tag->index);
if (tag_idx == REG_NON)
return rte_flow_error_set(error, EINVAL,
--
2.39.2
[PATCH 12/13] net/mlx5: add support for more registers
From: Ori Kam
This commit adds the support for a additional registers that were added
to the HW.
Signed-off-by: Ori Kam
---
drivers/common/mlx5/mlx5_devx_cmds.c | 16 +
drivers/common/mlx5/mlx5_devx_cmds.h | 2 +-
drivers/common/mlx5/mlx5_prm.h | 36
drivers/net/mlx5/mlx5.c | 4 ++--
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_flow_dv.c | 4
drivers/net/mlx5/mlx5_flow_hw.c | 2 +-
7 files changed, 53 insertions(+), 13 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 3afb2e9f80..4d8818924a 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1229,7 +1229,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->modify_outer_ip_ecn = MLX5_GET
(flow_table_nic_cap, hcattr,
ft_header_modify_nic_receive.outer_ip_ecn);
- attr->set_reg_c = 0xff;
+ attr->set_reg_c = 0x;
if (attr->nic_flow_table) {
#define GET_RX_REG_X_BITS \
MLX5_GET(flow_table_nic_cap, hcattr, \
@@ -1238,10 +1238,16 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
MLX5_GET(flow_table_nic_cap, hcattr, \
ft_header_modify_nic_transmit.metadata_reg_c_x)
- uint32_t tx_reg, rx_reg;
+ uint32_t tx_reg, rx_reg, reg_c_8_15;
tx_reg = GET_TX_REG_X_BITS;
+ reg_c_8_15 = MLX5_GET(flow_table_nic_cap, hcattr,
+
ft_field_support_2_nic_transmit.metadata_reg_c_8_15);
+ tx_reg |= ((0xff & reg_c_8_15) << 8);
rx_reg = GET_RX_REG_X_BITS;
+ reg_c_8_15 = MLX5_GET(flow_table_nic_cap, hcattr,
+
ft_field_support_2_nic_receive.metadata_reg_c_8_15);
+ rx_reg |= ((0xff & reg_c_8_15) << 8);
attr->set_reg_c &= (rx_reg & tx_reg);
#undef GET_RX_REG_X_BITS
@@ -1371,7 +1377,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
MLX5_GET(esw_cap, hcattr, esw_manager_vport_number);
}
if (attr->eswitch_manager) {
- uint32_t esw_reg;
+ uint32_t esw_reg, reg_c_8_15;
hcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,
MLX5_GET_HCA_CAP_OP_MOD_ESW_FLOW_TABLE |
@@ -1380,7 +1386,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
return rc;
esw_reg = MLX5_GET(flow_table_esw_cap, hcattr,
ft_header_modify_esw_fdb.metadata_reg_c_x);
- attr->set_reg_c &= esw_reg;
+ reg_c_8_15 = MLX5_GET(flow_table_esw_cap, hcattr,
+
ft_field_support_2_esw_fdb.metadata_reg_c_8_15);
+ attr->set_reg_c &= ((0xff & reg_c_8_15) << 8) | esw_reg;
}
return 0;
error:
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
b/drivers/common/mlx5/mlx5_devx_cmds.h
index 11772431ae..7f23e925a5 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -301,7 +301,7 @@ struct mlx5_hca_attr {
uint32_t cqe_compression_128:1;
uint32_t multi_pkt_send_wqe:1;
uint32_t enhanced_multi_pkt_send_wqe:1;
- uint32_t set_reg_c:8;
+ uint32_t set_reg_c:16;
uint32_t nic_flow_table:1;
uint32_t modify_outer_ip_ecn:1;
union {
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 19c6d0282b..2b499666f8 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -840,6 +840,14 @@ enum mlx5_modification_field {
MLX5_MODI_IN_MPLS_LABEL_3,
MLX5_MODI_IN_MPLS_LABEL_4,
MLX5_MODI_OUT_IPV6_NEXT_HDR = 0x4A,
+ MLX5_MODI_META_REG_C_8 = 0x8F,
+ MLX5_MODI_META_REG_C_9 = 0x90,
+ MLX5_MODI_META_REG_C_10 = 0x91,
+ MLX5_MODI_META_REG_C_11 = 0x92,
+ MLX5_MODI_META_REG_C_12 = 0x93,
+ MLX5_MODI_META_REG_C_13 = 0x94,
+ MLX5_MODI_META_REG_C_14 = 0x95,
+ MLX5_MODI_META_REG_C_15 = 0x96,
MLX5_MODI_INVALID = INT_MAX,
};
@@ -2227,8 +2235,22 @@ struct mlx5_ifc_ft_fields_support_2_bits {
u8 inner_ipv4_checksum_ok[0x1];
u8 inner_l4_checksum_ok[0x1];
u8 outer_ipv4_checksum_ok[0x1];
- u8 outer_l4_checksum_ok[0x1];
- u8 reserved_at_20[0x60];
+ u8 outer_l4_checksum_ok[0x1]; /* end of DW0 */
+ u8 reserved_at_20[0x18];
+ union {
+ struct {
+ u8 metadata_reg_c_15[0x1];
+ u8 metadata_reg_c_14[0x1];
+ u8 metadata_reg_c_13[0x1];
+ u8 metadata_reg_c_12[0x1];
+ u8 metadata_reg_c_11[0x1];
+ u8 metadata_reg_c_10[0x1];
+ u8 metadata_reg_c_9[0x1];
+
RE: [PATCH] net/iavf: fix indent in Tx path
> -Original Message-
> From: Radu Nicolau
> Sent: Thursday, October 26, 2023 5:34 PM
> To: Marchand, David ; dev@dpdk.org
> Cc: sta...@dpdk.org; Wu, Jingjing ; Xing, Beilei
> ; Doherty, Declan ;
> Sinha, Abhijit
> Subject: Re: [PATCH] net/iavf: fix indent in Tx path
>
>
> On 26-Oct-23 9:06 AM, David Marchand wrote:
> > Fix confusing indentations.
> >
> > Fixes: 1e728b01120c ("net/iavf: rework Tx path")
> > Fixes: 6bc987ecb860 ("net/iavf: support IPsec inline crypto")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: David Marchand
> > ---
> > drivers/net/iavf/iavf_rxtx.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/iavf/iavf_rxtx.c
> > b/drivers/net/iavf/iavf_rxtx.c index c6ef6af1d8..cba7ec3564 100644
> > --- a/drivers/net/iavf/iavf_rxtx.c
> > +++ b/drivers/net/iavf/iavf_rxtx.c
> > @@ -2896,7 +2896,7 @@ iavf_xmit_pkts(void *tx_queue, struct rte_mbuf
> **tx_pkts, uint16_t nb_pkts)
> > txe->last_id = desc_idx_last;
> > desc_idx = txe->next_id;
> > txe = txn;
> > - }
> > + }
> >
> > if (nb_desc_ipsec) {
> > volatile struct iavf_tx_ipsec_desc *ipsec_desc = @@ -
> 2909,7
> > +2909,7 @@ iavf_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
> uint16_t nb_pkts)
> > if (txe->mbuf) {
> > rte_pktmbuf_free_seg(txe->mbuf);
> > txe->mbuf = NULL;
> > - }
> > + }
> >
> > iavf_fill_ipsec_desc(ipsec_desc, ipsec_md, &ipseclen);
> >
> Acked-by: Radu Nicolau
Applied to dpdk-next-net-intel.
Thanks
Qi
RE: [PATCH v2] net/iavf: fix Tx offloading flags check
> -Original Message-
> From: David Marchand
> Sent: Thursday, October 26, 2023 4:08 PM
> To: Nicolau, Radu
> Cc: Wu, Jingjing ; Xing, Beilei
> ;
> dev@dpdk.org; sta...@dpdk.org
> Subject: Re: [PATCH v2] net/iavf: fix Tx offloading flags check
>
> On Wed, Oct 25, 2023 at 11:13 AM Radu Nicolau
> wrote:
> >
> > Relax the check in the previous fix to allow packets with security
> > offload flag set.
> >
> > Fixes: 3c715591ece0 ("net/iavf: fix checksum offloading")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Radu Nicolau
>
> Acked-by: David Marchand
Applied to dpdk-next-net-intel.
Thanks
Qi
>
>
> --
> David Marchand
Re: [PATCH v3 0/3] introduce maximum Rx buffer size
在 2023/10/29 23:48, Stephen Hemminger 写道: On Sat, 28 Oct 2023 09:48:44 +0800 Huisong Li wrote: The "min_rx_bufsize" in struct rte_eth_dev_info stands for the minimum Rx buffer size supported by hardware. Actually, some engines also have the maximum Rx buffer specification, like, hns3. If mbuf data room size in mempool is greater then the maximum Rx buffer size supported by HW, the data size application used in each mbuf is just as much as the maximum Rx buffer size supported by HW instead of the whole data room size. So introduce maximum Rx buffer size which is not enforced just to report user to avoid memory waste. I am not convinced this is really necessary. Your device will use up to 4K of buffer size, not sure why an application would want to use much larger than that because it would be wasting a lot of buffer space (most packets are smaller) anyway. The only case where it might be useful is if application is using jumbo frames (9K) and the application was not able to handle multi segment packets. Yeah, it is useful if user want a large packet (like, 6K) is in a mbuf. But, in current layer, user don't know what the maximum buffer size per descriptor supported by HW is. Not handling multi segment packets in SW is just programmer laziness. User do decide their implement based on their cases in project. May it be a point for this that user don't want to do memcpy for multi segment packets and just use the first mbuf memory. Now that there is the "min_rx_bufsize" to report in ethdev layer. Anyway, DPDK is indeed the lack of the way to report the maximum Rx buffer size per hw descriptor. .
[PATCH v2] net/cpfl: support action prog
From: Wenjing Qiao
Parse JSON file and generate rules that instruct PMD to map an
RTE_FLOW_ACTION_TYPE_PROG to a low-level FXP representation, the
matching follows below guidelines.
Use rte_flow_action_prog->name to match the name of a P4 action
type when provided in the JSON file. In cases where the JSON file
lacks the P4 action type's name but includes the P4 action type ID,
PMD should attempt to convert rte_flow_action_prog->name into a
uint32 value and then match it to the P4 action type ID.
The same method applies when matching a rte_flow_action_prog_argument
to a field of an action type.
Here's an example to create a rule that matches an IPV4/TCP header and
applies a VXLAN encapsulation which is represented by rte_flow_action_prog:
flow create 0 ingress pattern eth src is 00:11:22:33:44:55 dst is
00:01:00:00:03:14 / ipv4 src is 192.168.0.1 dst is 192.168.0.2 / tcp src
is 0x1451 dst is 0x157c / end actions prog name vxlan_encap arguments
src_addr 0xC0A80002 dst_addr 0xC0A80003 src_mac 0x00010314
dst_mac 0x00060314 src_port 0x1234 dst_port 0x4789 vni 0x50
end / port_representor port_id 0 / end
Signed-off-by: Wenjing Qiao
---
drivers/net/cpfl/cpfl_flow_engine_fxp.c | 2 +
drivers/net/cpfl/cpfl_flow_parser.c | 268 ++--
drivers/net/cpfl/cpfl_flow_parser.h | 62 +-
3 files changed, 308 insertions(+), 24 deletions(-)
diff --git a/drivers/net/cpfl/cpfl_flow_engine_fxp.c
b/drivers/net/cpfl/cpfl_flow_engine_fxp.c
index ddede2f553..6b0830afd0 100644
--- a/drivers/net/cpfl/cpfl_flow_engine_fxp.c
+++ b/drivers/net/cpfl/cpfl_flow_engine_fxp.c
@@ -373,6 +373,7 @@ cpfl_fxp_parse_action(struct cpfl_itf *itf,
break;
case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
+ case RTE_FLOW_ACTION_TYPE_PROG:
break;
case RTE_FLOW_ACTION_TYPE_VOID:
break;
@@ -425,6 +426,7 @@ cpfl_is_mod_action(const struct rte_flow_action actions[])
switch (action_type) {
case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
+ case RTE_FLOW_ACTION_TYPE_PROG:
return true;
default:
continue;
diff --git a/drivers/net/cpfl/cpfl_flow_parser.c
b/drivers/net/cpfl/cpfl_flow_parser.c
index 412f7feed0..7df66ab7ec 100644
--- a/drivers/net/cpfl/cpfl_flow_parser.c
+++ b/drivers/net/cpfl/cpfl_flow_parser.c
@@ -5,6 +5,7 @@
#include
#include "cpfl_flow_parser.h"
+#include "rte_flow.h"
static enum rte_flow_item_type
cpfl_get_item_type_by_str(const char *type)
@@ -35,6 +36,8 @@ cpfl_get_action_type_by_str(const char *type)
return RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP;
else if (strcmp(type, "vxlan_decap") == 0)
return RTE_FLOW_ACTION_TYPE_VXLAN_DECAP;
+ else if (strcmp(type, "prog") == 0)
+ return RTE_FLOW_ACTION_TYPE_PROG;
PMD_DRV_LOG(ERR, "Not support this type: %s.", type);
return RTE_FLOW_ACTION_TYPE_VOID;
@@ -612,6 +615,57 @@ cpfl_flow_js_mr_key(json_t *ob_mr_keys, struct
cpfl_flow_js_mr_key *js_mr_key)
}
encap->protocols[j] = proto_type;
}
+ } else if (js_mr_key->actions[i].type ==
RTE_FLOW_ACTION_TYPE_PROG) {
+ int ret;
+ uint32_t param_size, j;
+ uint16_t value = 0;
+ json_t *ob_param, *subobject;
+ const char *name;
+
+ ret = cpfl_json_t_to_uint32(object, "id",
&js_mr_key->actions[i].prog.id);
+ if (ret < 0) {
+ PMD_DRV_LOG(ERR, "Can not parse uint32 'id'.");
+ goto err;
+ }
+ if (json_object_get(object, "name")) {
+ js_mr_key->actions[i].prog.has_name = TRUE;
+ name = cpfl_json_t_to_string(object, "name");
+ if (!name) {
+ PMD_DRV_LOG(ERR, "Can not parse string
'name'.");
+ goto err;
+ }
+ memcpy(js_mr_key->actions[i].prog.name, name,
strlen(name));
+ }
+
+ ob_param = json_object_get(object, "parameters");
+ param_size = json_array_size(ob_param);
+ js_mr_key->actions[i].prog.param_size = param_size;
+ for (j = 0; j < param_size; j++) {
+ subobject = json_array_get(ob_param, j);
+ ret = cpfl_json_t_to_uint16(subobject, "index",
&value);
+
[PATCH v2 1/3] net/mlx5: add port representor action
The packets handled by port representor action will be steered to
E-Switch manager and received by software.
This commit adds port representor action.
Signed-off-by: Suanming Mou
Acked-by: Ori Kam
---
doc/guides/nics/mlx5.rst| 6
drivers/net/mlx5/mlx5.h | 2 ++
drivers/net/mlx5/mlx5_flow.h| 4 ++-
drivers/net/mlx5/mlx5_flow_hw.c | 55 +
4 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 84e3c1358c..632fb6e87a 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -743,6 +743,12 @@ Limitations
The flow engine of a process cannot move from active to standby mode
if preceding active application rules are still present and vice versa.
+- A driver limitation for ``RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR`` action
restricts
+ the ``port_id`` configuration to only accept the value 0x, indicating
the E-Switch
+ manager. If the ``repr_matching_en`` flag is enabled, the traffic will be
directed
+ to the representor of the source virtual port (SF/VF), while if it is
disabled, the
+ traffic will be routed based on the steering rules in the ingress domain.
+
Statistics
--
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index f3b872f59c..dad3600aa0 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1858,6 +1858,8 @@ struct mlx5_priv {
struct mlx5dr_action *hw_drop[2];
/* HW steering global tag action. */
struct mlx5dr_action *hw_tag[2];
+ /* HW steering global default miss action. */
+ struct mlx5dr_action *hw_def_miss;
/* HW steering global send to kernel action. */
struct mlx5dr_action *hw_send_to_kernel[MLX5DR_TABLE_TYPE_MAX];
/* HW steering create ongoing rte flow table list header. */
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 1fec295476..f3423933c0 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -361,6 +361,7 @@ enum mlx5_feature_name {
#define MLX5_FLOW_ACTION_INDIRECT_COUNT (1ull << 43)
#define MLX5_FLOW_ACTION_INDIRECT_AGE (1ull << 44)
#define MLX5_FLOW_ACTION_QUOTA (1ull << 46)
+#define MLX5_FLOW_ACTION_PORT_REPRESENTOR (1ull << 47)
#define MLX5_FLOW_DROP_INCLUSIVE_ACTIONS \
(MLX5_FLOW_ACTION_COUNT | MLX5_FLOW_ACTION_SAMPLE |
MLX5_FLOW_ACTION_AGE)
@@ -370,7 +371,8 @@ enum mlx5_feature_name {
MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP | \
MLX5_FLOW_ACTION_DEFAULT_MISS | \
MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY | \
-MLX5_FLOW_ACTION_SEND_TO_KERNEL)
+MLX5_FLOW_ACTION_SEND_TO_KERNEL | \
+MLX5_FLOW_ACTION_PORT_REPRESENTOR)
#define MLX5_FLOW_FATE_ESWITCH_ACTIONS \
(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 1777cda9f7..813a035e77 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -1726,6 +1726,13 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,
acts->rule_acts[dr_pos].action =
priv->hw_drop[!!attr->group];
break;
+ case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:
+ if (!attr->group) {
+ DRV_LOG(ERR, "Port representor is not supported
in root table.");
+ goto err;
+ }
+ acts->rule_acts[dr_pos].action = priv->hw_def_miss;
+ break;
case RTE_FLOW_ACTION_TYPE_MARK:
acts->mark = true;
if (masks->conf &&
@@ -4140,6 +4147,36 @@ flow_hw_validate_action_modify_field(const struct
rte_flow_action *action,
"MPLS cannot be used as destination");
return 0;
}
+static int
+flow_hw_validate_action_port_representor(struct rte_eth_dev *dev __rte_unused,
+const struct
rte_flow_actions_template_attr *attr,
+const struct rte_flow_action *action,
+const struct rte_flow_action *mask,
+struct rte_flow_error *error)
+{
+ const struct rte_flow_action_ethdev *action_conf = NULL;
+ const struct rte_flow_action_ethdev *mask_conf = NULL;
+
+ /* If transfer is set, port has been validated as proxy port. */
+ if (!attr->transfer)
+ return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
+ "cannot use port_representor actions"
+ " without an E-Switch");
+ if (!action || !mask)
+ return rte_flow_erro
[PATCH v2 0/3] net/mlx5: add port representor destination to mirror
In order to clone the traffic from FDB to NIC TIR, user can set port representor action as mirror clone destination. In that case cloned traffic will be moved to E-Switch manager root table, and goes to software TIR. This series adds the port representor support to mirror action. v2: - add Acked-by - rebase on top of series [1] [1]: https://patches.dpdk.org/project/dpdk/list/?series=29662 Suanming Mou (3): net/mlx5: add port representor action net/mlx5: add port representor destination to mirror app/testpmd: add port representor as sample destination app/test-pmd/cmdline_flow.c| 1 + doc/guides/nics/mlx5.rst | 6 +++ doc/guides/rel_notes/release_23_11.rst | 1 + drivers/net/mlx5/mlx5.h| 2 + drivers/net/mlx5/mlx5_flow.h | 4 +- drivers/net/mlx5/mlx5_flow_hw.c| 74 +- 6 files changed, 86 insertions(+), 2 deletions(-) -- 2.34.1
[PATCH v2 2/3] net/mlx5: add port representor destination to mirror
In order to clone the traffic from FDB to NIC TIR, user can set
port representor action as mirror clone destination. In that case
cloned traffic will be moved to E-Switch manager root table, and
goes to software TIR.
This commit adds the port representor support to mirror action.
Signed-off-by: Suanming Mou
Acked-by: Ori Kam
---
doc/guides/rel_notes/release_23_11.rst | 1 +
drivers/net/mlx5/mlx5_flow_hw.c| 19 ++-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/doc/guides/rel_notes/release_23_11.rst
b/doc/guides/rel_notes/release_23_11.rst
index a895c6b45e..322d8b1e0e 100644
--- a/doc/guides/rel_notes/release_23_11.rst
+++ b/doc/guides/rel_notes/release_23_11.rst
@@ -149,6 +149,7 @@ New Features
* Added support for Network Service Header (NSH) flow matching.
* Added support for ``RTE_FLOW_ACTION_TYPE_INDIRECT_LIST`` flow action.
* Added support for ``RTE_FLOW_ITEM_TYPE_PTYPE`` flow item.
+ * Added support for ``RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR`` flow action
and mirror.
* **Updated Solarflare net driver.**
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 813a035e77..77f0e4f977 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -9739,6 +9739,7 @@ mlx5_mirror_destroy_clone(struct rte_eth_dev *dev,
flow_hw_jump_release(dev, clone->action_ctx);
break;
case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
+ case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:
case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
@@ -9783,6 +9784,7 @@ mlx5_mirror_terminal_action(const struct rte_flow_action
*action)
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_QUEUE:
case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
+ case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:
return true;
default:
break;
@@ -9796,19 +9798,30 @@ mlx5_mirror_validate_sample_action(struct rte_eth_dev
*dev,
const struct rte_flow_action *action)
{
struct mlx5_priv *priv = dev->data->dev_private;
+ const struct rte_flow_action_ethdev *port = NULL;
+ bool is_proxy = MLX5_HW_PORT_IS_PROXY(priv);
+ if (!action)
+ return false;
switch (action->type) {
case RTE_FLOW_ACTION_TYPE_QUEUE:
case RTE_FLOW_ACTION_TYPE_RSS:
if (flow_attr->transfer)
return false;
break;
+ case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:
+ if (!is_proxy || !flow_attr->transfer)
+ return false;
+ port = action->conf;
+ if (!port || port->port_id != MLX5_REPRESENTED_PORT_ESW_MGR)
+ return false;
+ break;
case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
- if (!priv->sh->esw_mode && !flow_attr->transfer)
+ if (!is_proxy || !flow_attr->transfer)
return false;
if (action[0].type == RTE_FLOW_ACTION_TYPE_RAW_DECAP &&
action[1].type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
@@ -9966,6 +9979,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,
struct mlx5dr_action_dest_attr *dest_attr,
uint8_t *reformat_buf, struct rte_flow_error *error)
{
+ struct mlx5_priv *priv = dev->data->dev_private;
int ret;
uint32_t i;
bool decap_seen = false;
@@ -9992,6 +10006,9 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,
if (ret)
return ret;
break;
+ case RTE_FLOW_ACTION_TYPE_PORT_REPRESENTOR:
+ dest_attr->dest = priv->hw_def_miss;
+ break;
case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
decap_seen = true;
break;
--
2.34.1
[PATCH v2 3/3] app/testpmd: add port representor as sample destination
This commit adds the missing port representor support as sample
destination.
Signed-off-by: Suanming Mou
Acked-by: Ori Kam
---
app/test-pmd/cmdline_flow.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 6c8571154e..0d521159e9 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -2472,6 +2472,7 @@ static const enum index next_action_sample[] = {
ACTION_VXLAN_ENCAP,
ACTION_NVGRE_ENCAP,
ACTION_REPRESENTED_PORT,
+ ACTION_PORT_REPRESENTOR,
ACTION_NEXT,
ZERO,
};
--
2.34.1
[PATCH v2] net/iavf: fix crash on closing representor ports
Since the representor port needs to access the resources of the
associated DCF when it is closed. Therefore, the correct close
port operation is to close all the representor ports first, and
then close the associated DCF port.
If the DCF port is closed before the representor port on pmd exit.
This will result in accessing freed resources and eventually a
core dump will occur.
This patch fixes this issue by notifying all presentor ports
that DCF is not accessible when the DCF port is closed.
And when the presentor port is closed, it determines if the DCF
resources are accessible. If it can't be accessed, it will
report an error and return.
Fixes: 5674465a32c8 ("net/ice: add DCF VLAN handling")
Fixes: da9cdcd1f372 ("net/ice: fix crash on representor port closing")
Cc: sta...@dpdk.org
Signed-off-by: Mingjin Ye
---
v2: Reformat code to remove unneeded fixlines.
---
drivers/net/ice/ice_dcf_ethdev.h | 1 +
drivers/net/ice/ice_dcf_vf_representor.c | 11 ---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/ice_dcf_ethdev.h b/drivers/net/ice/ice_dcf_ethdev.h
index 4baaec4b8b..d94ef10244 100644
--- a/drivers/net/ice/ice_dcf_ethdev.h
+++ b/drivers/net/ice/ice_dcf_ethdev.h
@@ -60,6 +60,7 @@ struct ice_dcf_vf_repr {
struct rte_ether_addr mac_addr;
uint16_t switch_domain_id;
uint16_t vf_id;
+ bool dcf_valid;
struct ice_dcf_vlan outer_vlan_info; /* DCF always handle outer VLAN */
};
diff --git a/drivers/net/ice/ice_dcf_vf_representor.c
b/drivers/net/ice/ice_dcf_vf_representor.c
index b9fcfc80ad..eb49eae4e4 100644
--- a/drivers/net/ice/ice_dcf_vf_representor.c
+++ b/drivers/net/ice/ice_dcf_vf_representor.c
@@ -45,6 +45,9 @@ ice_dcf_vf_repr_dev_start(struct rte_eth_dev *dev)
static int
ice_dcf_vf_repr_dev_stop(struct rte_eth_dev *dev)
{
+ struct ice_dcf_vf_repr *repr = dev->data->dev_private;
+
+ repr->dcf_valid = false;
dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
return 0;
@@ -111,14 +114,15 @@ ice_dcf_vf_repr_link_update(__rte_unused struct
rte_eth_dev *ethdev,
static __rte_always_inline struct ice_dcf_hw *
ice_dcf_vf_repr_hw(struct ice_dcf_vf_repr *repr)
{
- struct ice_dcf_adapter *dcf_adapter =
- repr->dcf_eth_dev->data->dev_private;
+ struct ice_dcf_adapter *dcf_adapter;
- if (!dcf_adapter) {
+ if (!repr->dcf_valid) {
PMD_DRV_LOG(ERR, "DCF for VF representor has been released\n");
return NULL;
}
+ dcf_adapter = repr->dcf_eth_dev->data->dev_private;
+
return &dcf_adapter->real_hw;
}
@@ -414,6 +418,7 @@ ice_dcf_vf_repr_init(struct rte_eth_dev *vf_rep_eth_dev,
void *init_param)
repr->dcf_eth_dev = param->dcf_eth_dev;
repr->switch_domain_id = param->switch_domain_id;
repr->vf_id = param->vf_id;
+ repr->dcf_valid = true;
repr->outer_vlan_info.port_vlan_ena = false;
repr->outer_vlan_info.stripping_ena = false;
repr->outer_vlan_info.tpid = RTE_ETHER_TYPE_VLAN;
--
2.25.1
Re: [PATCH v3 1/3] ethdev: introduce maximum Rx buffer size
Hi Stephen, Thanks for your review. 在 2023/10/29 23:43, Stephen Hemminger 写道: On Sat, 28 Oct 2023 09:48:45 +0800 Huisong Li wrote: + "Ethdev port_id=%u, the data size application used in each mbuf is just %u instead of the whole data room(%u) The message should be shortened. What do you think of the following log? "The data size user used in mbuf is just %u instead of the whole data room(%u)" I find that a shortest log. /Huisong
RE: [PATCH v2 1/1] app/mldev: enable support for pre-quantized I/O
> -Original Message- > From: Srikanth Yalavarthi > Sent: Thursday, October 26, 2023 6:20 PM > To: Srikanth Yalavarthi > Cc: dev@dpdk.org; Shivah Shankar Shankar Narayan Rao > ; Anup Prabhu ; > Prince Takkar > Subject: [PATCH v2 1/1] app/mldev: enable support for pre-quantized I/O > > From: Anup Prabhu > > Enabled support for pre-quantized input and output in ML test application. > > Signed-off-by: Anup Prabhu Acked-by: Shivah Shankar S <>
RE: [PATCH] ethdev: fix RTE_FLOW_PORT_FLAG_SHARE_INDIRECT definition
> -Original Message-
> From: Gregory Etelson
> Sent: Sunday, October 29, 2023 7:54 PM
> To: dev@dpdk.org
>
> Fix value of RTE_FLOW_PORT_FLAG_SHARE_INDIRECT.
>
> Fixes: f5b2846d89d7 ("ethdev: share indirect action between ports")
> Cc: sta...@dpdk.org
> Signed-off-by: Gregory Etelson
> ---
> lib/ethdev/rte_flow.h | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h
> index edefa34c10..c16fe8c21f 100644
> --- a/lib/ethdev/rte_flow.h
> +++ b/lib/ethdev/rte_flow.h
> @@ -5365,6 +5365,13 @@ rte_flow_flex_item_release(uint16_t port_id,
> */
> #define RTE_FLOW_PORT_FLAG_STRICT_QUEUE RTE_BIT32(0)
>
> +/**
> + * Indicate all steering objects should be created on contexts
> + * of the host port, providing indirect object sharing between
> + * ports.
> + */
> +#define RTE_FLOW_PORT_FLAG_SHARE_INDIRECT RTE_BIT32(1)
> +
> /**
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> @@ -5450,13 +5457,6 @@ rte_flow_info_get(uint16_t port_id,
> struct rte_flow_queue_info *queue_info,
> struct rte_flow_error *error);
>
> -/**
> - * Indicate all steering objects should be created on contexts
> - * of the host port, providing indirect object sharing between
> - * ports.
> - */
> -#define RTE_FLOW_PORT_FLAG_SHARE_INDIRECT RTE_BIT32(0)
> -
> /**
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> --
> 2.39.2
Acked-by: Ori Kam
Best,
Ori
RE: [PATCH 08/13] net/mlx5/hws: adding method to query rule hash
> -Original Message- > From: Gregory Etelson > Sent: Sunday, October 29, 2023 8:23 PM > > From: Itamar Gozlan > > Add a method to the HW steering API that allows querying > the hash result for a given matcher and a set of items. This > can be used to predict the location of the rule in the hash table. > > Signed-off-by: Itamar Gozlan > --- Acked-by: Ori Kam Best, Ori
[PATCH] test/crypto: fix mbuf port in Rx inject
By default mbuf port is not initialized and for Rx inject
mbuf port update is required before submitting packet.
Fixes: 69e1a909aa08 ("test/crypto: add Rx inject")
Signed-off-by: Rahul Bhansali
---
app/test/test_cryptodev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 970ca52f7e..96a3f36d73 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -10065,6 +10065,7 @@ test_ipsec_proto_mbuf_enq(struct
crypto_testsuite_params *ts_params,
hdr->ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV4);
ut_params->ibuf->l2_len = sizeof(struct rte_ether_hdr);
+ ut_params->ibuf->port = 0;
sec_sess = &ut_params->sec_session;
ret = rte_security_inb_pkt_rx_inject(ctx, &ut_params->ibuf, sec_sess,
1);
--
2.25.1
