RE: [EXT] Re: [PATCH v5 2/2] mem: telemetry support for system memory information
Thanks David for the feedback. Please find the proposed fixed inline.
> -Original Message-
> From: David Marchand
> Sent: Saturday, October 8, 2022 1:17 AM
> To: Amit Prakash Shukla ; Thomas Monjalon
> ; Anatoly Burakov ;
> dmitry.kozl...@gmail.com
> Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran ;
> bruce.richard...@intel.com; ciara.po...@intel.com
> Subject: [EXT] Re: [PATCH v5 2/2] mem: telemetry support for system
> memory information
>
> External Email
>
> --
> On Thu, Sep 29, 2022 at 1:44 PM Amit Prakash Shukla
> wrote:
> >
> > Changes adds telemetry support to display system memory information,
> > allocated using calls malloc, calloc, mmap, etc. This patch is based
> > on malloc_info. This patch adds following endpoints:
>
> malloc_info is a GNU extension.
> It is not available in musl and it breaks compilation in Alpine Linux.
> So I can't take this patch.
Shall we limit this for Glibc at compile time ?
+#if defined __GLIBC__ && defined __GLIBC_PREREQ
+#if __GLIBC_PREREQ(2, 10)
/* Gets system memory stat's XML format. */
ret = malloc_info(0, fp);
+#endif
+#else
+ RTE_LOG(DEBUG, EAL, "Error: malloc_info not supported by libc\n");
+ fclose(fp);
+ return -1;
+#endif
I will send out a v6 if the above solution is fine.
>
>
> >
> > 1. /sysmem/sys_heap_list
> > The commands displays the arenas currently in use.
> > Example:
> > --> /sysmem/sys_heap_list
> > {"/sysmem/sys_heap_list": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10]}
> >
>
> I am unsure about the command names.
>
> Those commands are really low level and tied to glibc malloc.
> It is unlikely we will have an unified naming with other libc/OS.
>
> I would prefer another pair of eyes, especially on this patch.
> Dmitry, Anatoly?
>
>
> --
> David Marchand
RE: [PATCH 3/4] eventdev: have ethernet Tx adapter appropriately report idle
@Harish, could you review the patch ?
-Jay
> -Original Message-
> From: Mattias Rönnblom
> Sent: Monday, October 10, 2022 8:24 PM
> To: Jayatheerthan, Jay ; Carrillo, Erik G
> ; Gujjar, Abhinandan S
> ; Jerin Jacob
> Cc: dev@dpdk.org; Van Haaren, Harry ;
> hof...@lysator.liu.se; mattias.ronnblom
>
> Subject: [PATCH 3/4] eventdev: have ethernet Tx adapter appropriately report
> idle
>
> Update the Event Ethernet Tx Adapter's service function to report as
> idle (i.e., return -EAGAIN) in case no events were dequeued from the
> event device and no Ethernet frames were sent out on the wire.
>
> Signed-off-by: Mattias Rönnblom
> ---
> lib/eventdev/rte_event_eth_tx_adapter.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c
> b/lib/eventdev/rte_event_eth_tx_adapter.c
> index 7f7d86f683..c2a848103b 100644
> --- a/lib/eventdev/rte_event_eth_tx_adapter.c
> +++ b/lib/eventdev/rte_event_eth_tx_adapter.c
> @@ -639,6 +639,7 @@ txa_service_func(void *args)
> struct txa_service_data *txa = args;
> uint8_t dev_id;
> uint8_t port;
> + int ret = -EAGAIN;
> uint16_t n;
> uint32_t nb_tx, max_nb_tx;
> struct rte_event ev[TXA_BATCH_SIZE];
> @@ -648,10 +649,10 @@ txa_service_func(void *args)
> port = txa->port_id;
>
> if (txa->nb_queues == 0)
> - return 0;
> + return ret;
>
> if (!rte_spinlock_trylock(&txa->tx_lock))
> - return 0;
> + return ret;
>
> for (nb_tx = 0; nb_tx < max_nb_tx; nb_tx += n) {
>
> @@ -659,6 +660,7 @@ txa_service_func(void *args)
> if (!n)
> break;
> txa_service_tx(txa, ev, n);
> + ret = 0;
> }
>
> if ((txa->loop_cnt++ & (TXA_FLUSH_THRESHOLD - 1)) == 0) {
> @@ -692,10 +694,13 @@ txa_service_func(void *args)
> }
> }
>
> - txa->stats.tx_packets += nb_tx;
> + if (likely(nb_tx > 0)) {
> + txa->stats.tx_packets += nb_tx;
> + ret = 0;
> + }
> }
> rte_spinlock_unlock(&txa->tx_lock);
> - return 0;
> + return ret;
> }
>
> static int
> --
> 2.34.1
RE: [PATCH 2/4] eventdev: have ethernet Rx adapter appropriately report idle
@Harish, Could you review the patch ?
-Jay
> -Original Message-
> From: Mattias Rönnblom
> Sent: Monday, October 10, 2022 8:24 PM
> To: Jayatheerthan, Jay ; Carrillo, Erik G
> ; Gujjar, Abhinandan S
> ; Jerin Jacob
> Cc: dev@dpdk.org; Van Haaren, Harry ;
> hof...@lysator.liu.se; mattias.ronnblom
>
> Subject: [PATCH 2/4] eventdev: have ethernet Rx adapter appropriately report
> idle
>
> Update the Event Ethernet Rx Adapter's service function to report as
> idle (i.e., return -EAGAIN) in case no Ethernet frames were received
> from the ethdev and no events were enqueued to the event device.
>
> Signed-off-by: Mattias Rönnblom
> ---
> lib/eventdev/rte_event_eth_rx_adapter.c | 56 ++---
> 1 file changed, 41 insertions(+), 15 deletions(-)
>
> diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c
> b/lib/eventdev/rte_event_eth_rx_adapter.c
> index 5c3021a184..cf7bbd4d69 100644
> --- a/lib/eventdev/rte_event_eth_rx_adapter.c
> +++ b/lib/eventdev/rte_event_eth_rx_adapter.c
> @@ -1184,7 +1184,7 @@ rxa_intr_thread(void *arg)
> /* Dequeue from interrupt ring and enqueue received
> * mbufs to eventdev
> */
> -static inline void
> +static inline bool
> rxa_intr_ring_dequeue(struct event_eth_rx_adapter *rx_adapter)
> {
> uint32_t n;
> @@ -1194,20 +1194,27 @@ rxa_intr_ring_dequeue(struct event_eth_rx_adapter
> *rx_adapter)
> struct rte_event_eth_rx_adapter_stats *stats;
> rte_spinlock_t *ring_lock;
> uint8_t max_done = 0;
> + bool work = false;
>
> if (rx_adapter->num_rx_intr == 0)
> - return;
> + return work;
>
> if (rte_ring_count(rx_adapter->intr_ring) == 0
> && !rx_adapter->qd_valid)
> - return;
> + return work;
>
> buf = &rx_adapter->event_enqueue_buffer;
> stats = &rx_adapter->stats;
> ring_lock = &rx_adapter->intr_ring_lock;
>
> - if (buf->count >= BATCH_SIZE)
> - rxa_flush_event_buffer(rx_adapter, buf, stats);
> + if (buf->count >= BATCH_SIZE) {
> + uint16_t n;
> +
> + n = rxa_flush_event_buffer(rx_adapter, buf, stats);
> +
> + if (likely(n > 0))
> + work = true;
> + }
>
> while (rxa_pkt_buf_available(buf)) {
> struct eth_device_info *dev_info;
> @@ -1289,7 +1296,12 @@ rxa_intr_ring_dequeue(struct event_eth_rx_adapter
> *rx_adapter)
> }
>
> done:
> - rx_adapter->stats.rx_intr_packets += nb_rx;
> + if (nb_rx > 0) {
> + rx_adapter->stats.rx_intr_packets += nb_rx;
> + work = true;
> + }
> +
> + return work;
> }
>
> /*
> @@ -1305,7 +1317,7 @@ rxa_intr_ring_dequeue(struct event_eth_rx_adapter
> *rx_adapter)
> * the hypervisor's switching layer where adjustments can be made to deal
> with
> * it.
> */
> -static inline void
> +static inline bool
> rxa_poll(struct event_eth_rx_adapter *rx_adapter)
> {
> uint32_t num_queue;
> @@ -1314,6 +1326,7 @@ rxa_poll(struct event_eth_rx_adapter *rx_adapter)
> struct rte_event_eth_rx_adapter_stats *stats = NULL;
> uint32_t wrr_pos;
> uint32_t max_nb_rx;
> + bool work = false;
>
> wrr_pos = rx_adapter->wrr_pos;
> max_nb_rx = rx_adapter->max_nb_rx;
> @@ -1329,14 +1342,20 @@ rxa_poll(struct event_eth_rx_adapter *rx_adapter)
> /* Don't do a batch dequeue from the rx queue if there isn't
>* enough space in the enqueue buffer.
>*/
> - if (buf->count >= BATCH_SIZE)
> - rxa_flush_event_buffer(rx_adapter, buf, stats);
> + if (buf->count >= BATCH_SIZE) {
> + uint16_t n;
> +
> + n = rxa_flush_event_buffer(rx_adapter, buf, stats);
> +
> + if (likely(n > 0))
> + work = true;
> + }
> if (!rxa_pkt_buf_available(buf)) {
> if (rx_adapter->use_queue_event_buf)
> goto poll_next_entry;
> else {
> rx_adapter->wrr_pos = wrr_pos;
> - return;
> + break;
> }
> }
>
> @@ -1352,6 +1371,11 @@ rxa_poll(struct event_eth_rx_adapter *rx_adapter)
> if (++wrr_pos == rx_adapter->wrr_len)
> wrr_pos = 0;
> }
> +
> + if (nb_rx > 0)
> + work = true;
> +
> + return work;
> }
>
> static void
> @@ -1384,12 +1408,14 @@ static int
> rxa_service_func(void *args)
> {
> struct event_eth_rx_adapter *rx_adapter = args;
> + bool intr_work;
> + bool poll_work;
>
> if (rte_spinlock_trylock(&rx_adapter->rx_lock) == 0)
> - return 0;
> + return -EAGAIN;
> if (!rx_adapter->rxa_started) {
> rte_spinlock_unlock(&rx_adapter->rx_lock);
> -
回复: [PATCH v2 1/3] ethdev: add API for direct rearm mode
> -邮件原件-
> 发件人: Konstantin Ananyev
> 发送时间: Monday, October 3, 2022 4:58 PM
> 收件人: Feifei Wang ; tho...@monjalon.net;
> Ferruh Yigit ; Andrew Rybchenko
> ; Ray Kinsella
> 抄送: dev@dpdk.org; nd ; Honnappa Nagarahalli
> ; Ruifeng Wang
>
> 主题: Re: [PATCH v2 1/3] ethdev: add API for direct rearm mode
>
> 27/09/2022 03:47, Feifei Wang пишет:
> > Add API for enabling direct rearm mode and for mapping RX and TX
> > queues. Currently, the API supports 1:1(txq : rxq) mapping.
> >
> > Furthermore, to avoid Rx load Tx data directly, add API called
> > 'rte_eth_txq_data_get' to get Tx sw_ring and its information.
> >
> > Suggested-by: Honnappa Nagarahalli
> > Suggested-by: Ruifeng Wang
> > Signed-off-by: Feifei Wang
> > Reviewed-by: Ruifeng Wang
> > Reviewed-by: Honnappa Nagarahalli
> > ---
> > lib/ethdev/ethdev_driver.h | 9
> > lib/ethdev/ethdev_private.c | 1 +
> > lib/ethdev/rte_ethdev.c | 37 ++
> > lib/ethdev/rte_ethdev.h | 95
>
> > lib/ethdev/rte_ethdev_core.h | 5 ++
> > lib/ethdev/version.map | 4 ++
> > 6 files changed, 151 insertions(+)
> >
> > diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> > index 47a55a419e..14f52907c1 100644
> > --- a/lib/ethdev/ethdev_driver.h
> > +++ b/lib/ethdev/ethdev_driver.h
> > @@ -58,6 +58,8 @@ struct rte_eth_dev {
> > eth_rx_descriptor_status_t rx_descriptor_status;
> > /** Check the status of a Tx descriptor */
> > eth_tx_descriptor_status_t tx_descriptor_status;
> > + /** Use Tx mbufs for Rx to rearm */
> > + eth_rx_direct_rearm_t rx_direct_rearm;
> >
> > /**
> > * Device data that is shared between primary and secondary
> > processes @@ -486,6 +488,11 @@ typedef int
> (*eth_rx_enable_intr_t)(struct rte_eth_dev *dev,
> > typedef int (*eth_rx_disable_intr_t)(struct rte_eth_dev *dev,
> > uint16_t rx_queue_id);
> >
> > +/**< @internal Get Tx information of a transmit queue of an Ethernet
> > +device. */ typedef void (*eth_txq_data_get_t)(struct rte_eth_dev *dev,
> > + uint16_t tx_queue_id,
> > + struct rte_eth_txq_data *txq_data);
> > +
> > /** @internal Release memory resources allocated by given Rx/Tx queue.
> */
> > typedef void (*eth_queue_release_t)(struct rte_eth_dev *dev,
> > uint16_t queue_id);
> > @@ -1138,6 +1145,8 @@ struct eth_dev_ops {
> > eth_rxq_info_get_t rxq_info_get;
> > /** Retrieve Tx queue information */
> > eth_txq_info_get_t txq_info_get;
> > + /** Get the address where Tx data is stored */
> > + eth_txq_data_get_t txq_data_get;
> > eth_burst_mode_get_t rx_burst_mode_get; /**< Get Rx burst
> mode */
> > eth_burst_mode_get_t tx_burst_mode_get; /**< Get Tx burst
> mode */
> > eth_fw_version_get_t fw_version_get; /**< Get firmware
> version */
> > diff --git a/lib/ethdev/ethdev_private.c b/lib/ethdev/ethdev_private.c
> > index 48090c879a..bfe16c7d77 100644
> > --- a/lib/ethdev/ethdev_private.c
> > +++ b/lib/ethdev/ethdev_private.c
> > @@ -276,6 +276,7 @@ eth_dev_fp_ops_setup(struct rte_eth_fp_ops
> *fpo,
> > fpo->rx_queue_count = dev->rx_queue_count;
> > fpo->rx_descriptor_status = dev->rx_descriptor_status;
> > fpo->tx_descriptor_status = dev->tx_descriptor_status;
> > + fpo->rx_direct_rearm = dev->rx_direct_rearm;
> >
> > fpo->rxq.data = dev->data->rx_queues;
> > fpo->rxq.clbk = (void **)(uintptr_t)dev->post_rx_burst_cbs;
> > diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index
> > 0c2c1088c0..0dccec2e4b 100644
> > --- a/lib/ethdev/rte_ethdev.c
> > +++ b/lib/ethdev/rte_ethdev.c
> > @@ -1648,6 +1648,43 @@ rte_eth_dev_is_removed(uint16_t port_id)
> > return ret;
> > }
> >
> > +int
> > +rte_eth_tx_queue_data_get(uint16_t port_id, uint16_t queue_id,
> > + struct rte_eth_txq_data *txq_data) {
> > + struct rte_eth_dev *dev;
> > +
> > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
> > + dev = &rte_eth_devices[port_id];
> > +
> > + if (queue_id >= dev->data->nb_tx_queues) {
> > + RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n",
> queue_id);
> > + return -EINVAL;
> > + }
> > +
> > + if (txq_data == NULL) {
> > + RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx
> queue %u data to NULL\n",
> > + port_id, queue_id);
> > + return -EINVAL;
> > + }
> > +
> > + if (dev->data->tx_queues == NULL ||
> > + dev->data->tx_queues[queue_id] == NULL) {
> > + RTE_ETHDEV_LOG(ERR,
> > + "Tx queue %"PRIu16" of device with port_id=%"
> > + PRIu16" has not been setup\n",
> > + queue_id, port_id);
> > + return -EINVAL;
> > + }
> > +
> > + if (*dev->dev_ops->txq_data_get == NULL)
> > + ret
RE: [EXT] Re: [PATCH v5 1/2] mem: telemetry support for memseg and element information
Thanks David for the feedback.
> -Original Message-
> From: David Marchand
> Sent: Saturday, October 8, 2022 1:19 AM
> To: Amit Prakash Shukla ; Anatoly Burakov
> ; dmitry.kozl...@gmail.com
> Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran ;
> bruce.richard...@intel.com; ciara.po...@intel.com; Thomas Monjalon
>
> Subject: [EXT] Re: [PATCH v5 1/2] mem: telemetry support for memseg and
> element information
>
> External Email
>
> --
> On Thu, Sep 29, 2022 at 1:43 PM Amit Prakash Shukla
> wrote:
> > 4. /eal/element_list,,,
> > The command outputs number of elements in a memseg based on the
> > heap-id, memseg-list-id and memseg-id given as input.
> > Example:
> > --> /eal/element_list,0,0,63
> > {"/eal/element_list": {"Element_count": 52}}
> >
> > --> /eal/element_list,0,1,15
> > {"/eal/element_list": {"Element_count": 52}}
> >
> > 5. /eal/element_info \
> >,
> > The command outputs element information like element start address,
> > end address, to which memseg it belongs, element state, element size.
> > User can give a range of elements to be printed.
> > Example:
> > --> /eal/element_info,0,1,15,1,2
> > {"/eal/element_info": {"element.1": {"msl_id": 1,\
> > "ms_id": 15, "memseg_start_addr": "0xb2000", \
> > "memseg_end_addr": "0xb4000",\
> > "element_start_addr": "0xb201fe680", \
> > "element_end_addr": "0xb20bfe700", \
> > "element_size": 10485888, "element_state": "Busy"}, \
> > "element.2": {"msl_id": 1, "ms_id": 15, \
> > "memseg_start_addr": "0xb2000", \
> > "memseg_end_addr": "0xb4000",\
> > "element_start_addr": "0xb20bfe700", \
> > "element_end_addr": "0xb215fe780", "element_size": 10485888, \
> > "element_state": "Busy"}, "Element_count": 2}}
> >
>
> element is too generic.
> Just look at the command name: /eal/element_XXX.
> What is an EAL element?
Sure, we can rename the commands to /eal/mem_element_XXX in v6 ?
>
>
> --
> David Marchand
- Amit Shukla
回复: [PATCH v2 3/3] examples/l3fwd: enable direct rearm mode
> -邮件原件-
> 发件人: Jerin Jacob
> 发送时间: Friday, September 30, 2022 7:56 PM
> 收件人: Feifei Wang
> 抄送: dev@dpdk.org; nd ; Honnappa Nagarahalli
> ; Ruifeng Wang
>
> 主题: Re: [PATCH v2 3/3] examples/l3fwd: enable direct rearm mode
>
> On Tue, Sep 27, 2022 at 8:18 AM Feifei Wang
> wrote:
> >
> > Enable direct rearm mode in l3fwd. Users can use parameters:
> > '--direct-rearm=(rx_portid,rx_queueid,tx_portid,tx_queueid)'
> > to enable direct rearm.
> >
> > Suggested-by: Honnappa Nagarahalli
> > Signed-off-by: Feifei Wang
> > Reviewed-by: Ruifeng Wang
> > Reviewed-by: Honnappa Nagarahalli
> > ---
> > examples/l3fwd/l3fwd.h | 12 +
> > examples/l3fwd/l3fwd_lpm.c | 22 +
> > examples/l3fwd/main.c | 94
> +-
> > 3 files changed, 127 insertions(+), 1 deletion(-)
> >
> > diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h index
> > 40b5f32a9e..db097e344c 100644
> > --- a/examples/l3fwd/l3fwd.h
> > +++ b/examples/l3fwd/l3fwd.h
> > @@ -57,6 +57,10 @@
> > #endif
> > #define HASH_ENTRY_NUMBER_DEFAULT 16
> >
> > +/* MAX number of direct rearm mapping entry */
> > +#define MAX_DIRECT_REARM_ENTRY_NUMBER 16
> > +#define MAX_DIRECT_REARM_QUEUE_PER_PORT 8
> > +
> > struct parm_cfg {
> > const char *rule_ipv4_name;
> > const char *rule_ipv6_name;
> > @@ -114,6 +118,14 @@ extern struct parm_cfg parm_config;
> >
> > extern struct acl_algorithms acl_alg[];
> >
> > +/* Used in direct rearm mode */
> > +extern bool enabled_direct_rearm;
> > +extern uint8_t direct_rearm_entry_number; extern bool
> >
> +queue_enabled_direct_rearm[RTE_MAX_ETHPORTS][MAX_DIRECT_REAR
> M_QUEUE_P
> > +ER_PORT]; extern uint16_t
> >
> +direct_rearm_map_tx_port[RTE_MAX_ETHPORTS][MAX_DIRECT_REARM_
> QUEUE_PER
> > +_PORT]; extern uint16_t
> >
> +direct_rearm_map_tx_queue[RTE_MAX_ETHPORTS][MAX_DIRECT_REAR
> M_QUEUE_PE
> > +R_PORT]; extern uint8_t
> >
> +direct_rearm_entry_idx[RTE_MAX_ETHPORTS][MAX_DIRECT_REARM_QUE
> UE_PER_P
> > +ORT];
> > +
> > /* Send burst of packets on an output interface */ static inline int
> > send_burst(struct lcore_conf *qconf, uint16_t n, uint16_t port) diff
> > --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c index
> > 22d7f61a42..973fe70aae 100644
> > --- a/examples/l3fwd/l3fwd_lpm.c
> > +++ b/examples/l3fwd/l3fwd_lpm.c
> > @@ -150,6 +150,8 @@ lpm_main_loop(__rte_unused void *dummy)
>
> > @@ -205,6 +221,12 @@ lpm_main_loop(__rte_unused void *dummy)
> > for (i = 0; i < n_rx_q; ++i) {
> > portid = qconf->rx_queue_list[i].port_id;
> > queueid = qconf->rx_queue_list[i].queue_id;
> > +
> > + if
> > + (queue_enabled_direct_rearm[portid][queueid]) {
>
> IMO, We should not change fastpath code that impacts performance on
> other targets for a feature which has a very constraint use case. Also need
> for expressing [1], kind of defeat the purpose LPM table populated.
>
> IMO, If we need to add a test case for this API, testpmd would be an ideal
> place with a dedicated fwd_engine just for this.
>
> [1]
> > + " --direct-rearm (rx_port, rx_queue, tx_port, tx_queue):
> > Put Tx
> queue sw-ring buffers into Rx queue\n"
Thanks very much for your comments. This patch here is mainly to facilitate
verification test
and show how to use direct-rearm API.
After 'direct-rearm' matures, we will consider to enable direct-rearm in
testpmd or other
application in dpdk.
回复: [PATCH v1 3/3] examples/l3fwd-power: enable PMD power mgmt on Arm
> -邮件原件-
> 发件人: David Marchand
> 发送时间: Monday, October 3, 2022 3:12 PM
> 收件人: Hunt, David ; Feifei Wang
> ; Ruifeng Wang
> 抄送: dev@dpdk.org; nd ; tho...@monjalon.net
> 主题: Re: [PATCH v1 3/3] examples/l3fwd-power: enable PMD power mgmt
> on Arm
>
> On Mon, Aug 29, 2022 at 2:48 PM Hunt, David wrote:
> > On 25/08/2022 07:42, Feifei Wang wrote:
> > > For Arm aarch, power monitor uses WFE instruction to enable, which
> > > can not exit automatically within the time limit. This means
> > > 'rte_power_monitor_wakeup' API needs to be called to wake up sleep
> > > cores if there is no store operation to monitored address.
> > >
> > > Furthermore, we disable power monitor feature on the main core so
> > > that it can be used to wake up other sleeping cores when it receives
> > > SIGINT siginal.
> > >
> > > Signed-off-by: Feifei Wang
> > > Reviewed-by: Ruifeng Wang
> > > ---
> > > examples/l3fwd-power/main.c | 30
> +-
> > > 1 file changed, 29 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/examples/l3fwd-power/main.c
> > > b/examples/l3fwd-power/main.c index 887c6eae3f..2bd0d700f0 100644
> > > --- a/examples/l3fwd-power/main.c
> > > +++ b/examples/l3fwd-power/main.c
> > > @@ -432,8 +432,16 @@ static void
> > > signal_exit_now(int sigtype)
> > > {
> > >
> > > - if (sigtype == SIGINT)
> > > + if (sigtype == SIGINT) {
> > > +#if defined(RTE_ARCH_ARM64)
>
> Having a arch specific behavior in the application shows that there is
> something wrong either in the API, or in the Arm implementation of the API.
> I don't think this is a good solution.
>
> Can't we find a better alternative? By changing the API probably?
Sorry I do not understand ' shows that there is something wrong either in the
API'
Here we call ' rte_power_monitor_wakeup' API is due to that we need to wake
up all cores from WFE instructions in arm, and then l3fwd can exit correctly.
This is due to that arm arch is different from x86, if there is no packets
received, x86's
'UMONITOR' can automatically exit from energy-saving state after waiting for a
period of time.
But arm's 'WFE' can not exit automatically. It will wait 'SEV' instructions in
wake_up API to wake
up it.
Finally, if user want to exit l3fwd by 'SIGINT' in arm, main core should
firstly call 'wake_up' API
to force worker cores to exit from energy-saving state.
Otherwise, the worker will stay in the energy-saving state forever if no packet
is received.
>
>
> > > + /**
> > > + * wake_up api does not need input parameter on Arm,
> > > + * so 0 is meaningless here.
> > > + */
> > > + rte_power_monitor_wakeup(0); #endif
> > > quit_signal = true;
> > > + }
> > >
> > > }
> > >
> > > @@ -2885,6 +2893,25 @@ main(int argc, char **argv)
> > > "Error setting scaling freq
> > > max: err=%d,
> lcore %d\n",
> > > ret,
> > > lcore_id);
> > >
> > > +#if defined(RTE_ARCH_ARM64)
> > > + /* Ensure the main lcore does not enter the
> > > power-
> monitor state,
> > > + * so that it can be used to wake up other
> > > lcores on ARM.
> > > + * This is due to WFE instruction has no
> > > timeout wake-up
> mechanism,
> > > + * and if users want to exit actively, the
> > > main lcore is
> needed
> > > + * to send SEV instruction to wake up other
> > > lcores.
> > > + */
> > > + unsigned int main_lcore =
> > > rte_get_main_lcore();
> > > + if (lcore_id != main_lcore ||
> > > + pmgmt_type !=
> RTE_POWER_MGMT_TYPE_MONITOR) {
> > > + ret =
> > > rte_power_ethdev_pmgmt_queue_enable(
> > > + lcore_id, portid,
> > > queueid,
> > > + pmgmt_type);
> > > + if (ret < 0)
> > > + rte_exit(EXIT_FAILURE,
> > > +
> > > "rte_power_ethdev_pmgmt_queue_enable:
> err=%d, port=%d\n",
> > > + ret, portid);
> > > + }
> > > +#else
> > > ret = rte_power_ethdev_pmgmt_queue_enable(
> > > lcore_id, portid, queueid,
> > > pmgmt_type); @@
> > > -2892,6 +2919,7 @@ main(int argc, char **argv)
> > > rte_exit(EXIT_FAILURE,
> > >
> > > "rte_power_ethdev_pmgmt_queue_enable:
> err=%d, port=%d\n",
> > >
[PATCH v1] net/iavf: fix taninted scalar
Passing tainted expression "rss_meta->proto_hdrs.count" to
"iavf_refine_proto_hdrs", wich uses it as a loop boundary.
Replace tainted expression with a temp variable to avoid the
trainted scalar coverity warning.
Coverity issue: 381131
Fixes: f30157d988cf ("net/iavf: support PPPoL2TPv2oUDP RSS Hash")
Signed-off-by: Steve Yang
---
drivers/net/iavf/iavf_hash.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/net/iavf/iavf_hash.c b/drivers/net/iavf/iavf_hash.c
index dea4e0aa0a..71c80d2c75 100644
--- a/drivers/net/iavf/iavf_hash.c
+++ b/drivers/net/iavf/iavf_hash.c
@@ -992,9 +992,10 @@ iavf_refine_proto_hdrs_l234(struct virtchnl_proto_hdrs
*proto_hdrs,
uint64_t rss_type)
{
struct virtchnl_proto_hdr *hdr;
+ int phdrs_count = proto_hdrs->count;
int i;
- for (i = 0; i < proto_hdrs->count; i++) {
+ for (i = 0; i < phdrs_count; i++) {
hdr = &proto_hdrs->proto_hdr[i];
switch (hdr->type) {
case VIRTCHNL_PROTO_HDR_ETH:
@@ -1183,12 +1184,13 @@ iavf_refine_proto_hdrs_gtpu(struct virtchnl_proto_hdrs
*proto_hdrs,
uint64_t rss_type)
{
struct virtchnl_proto_hdr *hdr;
+ int phdrs_count = proto_hdrs->count;
int i;
if (!(rss_type & RTE_ETH_RSS_GTPU))
return;
- for (i = 0; i < proto_hdrs->count; i++) {
+ for (i = 0; i < phdrs_count; i++) {
hdr = &proto_hdrs->proto_hdr[i];
switch (hdr->type) {
case VIRTCHNL_PROTO_HDR_GTPU_IP:
@@ -1208,6 +1210,7 @@ iavf_refine_proto_hdrs_by_pattern(struct
virtchnl_proto_hdrs *proto_hdrs,
struct virtchnl_proto_hdr *hdr2;
int i, shift_count = 1;
int tun_lvl = proto_hdrs->tunnel_level;
+ int phdrs_count = proto_hdrs->count;
if (!(phint & IAVF_PHINT_GTPU_MSK) && !(phint & IAVF_PHINT_GRE))
return;
@@ -1217,7 +1220,7 @@ iavf_refine_proto_hdrs_by_pattern(struct
virtchnl_proto_hdrs *proto_hdrs,
shift_count = 2;
/* shift headers layer */
- for (i = proto_hdrs->count - 1 + shift_count;
+ for (i = phdrs_count - 1 + shift_count;
i > shift_count - 1; i--) {
hdr1 = &proto_hdrs->proto_hdr[i];
hdr2 = &proto_hdrs->proto_hdr[i - shift_count];
@@ -1278,6 +1281,7 @@ iavf_refine_proto_hdrs_l2tpv2(struct virtchnl_proto_hdrs
*proto_hdrs,
uint64_t phint)
{
struct virtchnl_proto_hdr *hdr, *hdr1;
+ int phdrs_count = proto_hdrs->count;
int i;
if (!(phint & IAVF_PHINT_L2TPV2) && !(phint & IAVF_PHINT_L2TPV2_LEN))
@@ -1285,7 +1289,7 @@ iavf_refine_proto_hdrs_l2tpv2(struct virtchnl_proto_hdrs
*proto_hdrs,
if (proto_hdrs->tunnel_level == TUNNEL_LEVEL_INNER) {
/* shift headers layer */
- for (i = proto_hdrs->count - 1 + 1; i > 0; i--)
+ for (i = phdrs_count; i > 0; i--)
proto_hdrs->proto_hdr[i] = proto_hdrs->proto_hdr[i - 1];
/* adding outer ip header at layer 0 */
@@ -1298,7 +1302,7 @@ iavf_refine_proto_hdrs_l2tpv2(struct virtchnl_proto_hdrs
*proto_hdrs,
else if (phint & IAVF_PHINT_OUTER_IPV6)
VIRTCHNL_SET_PROTO_HDR_TYPE(hdr1, IPV6);
} else {
- for (i = 0; i < proto_hdrs->count; i++) {
+ for (i = 0; i < phdrs_count; i++) {
hdr = &proto_hdrs->proto_hdr[i];
if (hdr->type == VIRTCHNL_PROTO_HDR_L2TPV2) {
if (phint & IAVF_PHINT_L2TPV2) {
@@ -1309,7 +1313,6 @@ iavf_refine_proto_hdrs_l2tpv2(struct virtchnl_proto_hdrs
*proto_hdrs,
}
}
}
-
}
static void iavf_refine_proto_hdrs(struct virtchnl_proto_hdrs *proto_hdrs,
--
2.25.1
[PATCH v4 1/5] examples/l3fwd: fix port group mask generation
From: Pavan Nikhilesh
Fix port group mask generation in altivec, vec_any_eq returns
0 or 1 while port_groupx4 expects comparison mask result.
Fixes: 2193b7467f7a ("examples/l3fwd: optimize packet processing on powerpc")
Cc: sta...@dpdk.org
Signed-off-by: Pavan Nikhilesh
---
v4 Changes:
- Fix missing `rte_free`.
v3 Changes:
- PPC optimize port mask generation.
- Fix aarch32 compilation.
v2 Changes:
- Fix PPC, RISC-V, aarch32 compilation.
examples/common/altivec/port_group.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/examples/common/altivec/port_group.h
b/examples/common/altivec/port_group.h
index 5e209b02fa..1c05bc025a 100644
--- a/examples/common/altivec/port_group.h
+++ b/examples/common/altivec/port_group.h
@@ -26,12 +26,17 @@ port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp,
uint16_t u16[FWDSTEP + 1];
uint64_t u64;
} *pnum = (void *)pn;
-
+ __vector unsigned long long result;
+ const __vector unsigned int perm_mask = {0x00204060, 0x80808080,
+0x80808080, 0x80808080};
int32_t v;
- v = vec_any_eq(dp1, dp2);
-
+ dp1 = (__vector unsigned short)vec_cmpeq(dp1, dp2);
+ dp1 = vec_mergeh(dp1, dp1);
+ result = (__vector unsigned long long)vec_vbpermq(
+ (__vector unsigned char)dp1, (__vector unsigned char)perm_mask);
+ v = result[1];
/* update last port counter. */
lp[0] += gptbl[v].lpv;
--
2.25.1
[PATCH v4 2/5] examples/l3fwd: split processing and send stages
From: Pavan Nikhilesh
Split packet processing from packet send stage, as send stage
is not common for poll and event mode.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_em_hlm.h | 39 +++---
examples/l3fwd/l3fwd_lpm_altivec.h | 25 ---
examples/l3fwd/l3fwd_lpm_neon.h| 35 ---
examples/l3fwd/l3fwd_lpm_sse.h | 25 ---
4 files changed, 95 insertions(+), 29 deletions(-)
diff --git a/examples/l3fwd/l3fwd_em_hlm.h b/examples/l3fwd/l3fwd_em_hlm.h
index e76f2760b0..12b997e477 100644
--- a/examples/l3fwd/l3fwd_em_hlm.h
+++ b/examples/l3fwd/l3fwd_em_hlm.h
@@ -177,16 +177,12 @@ em_get_dst_port(const struct lcore_conf *qconf, struct
rte_mbuf *pkt,
return portid;
}
-/*
- * Buffer optimized handling of packets, invoked
- * from main_loop.
- */
static inline void
-l3fwd_em_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
- uint16_t portid, struct lcore_conf *qconf)
+l3fwd_em_process_packets(int nb_rx, struct rte_mbuf **pkts_burst,
+uint16_t *dst_port, uint16_t portid,
+struct lcore_conf *qconf, const uint8_t do_step3)
{
int32_t i, j, pos;
- uint16_t dst_port[MAX_PKT_BURST];
/*
* Send nb_rx - nb_rx % EM_HASH_LOOKUP_COUNT packets
@@ -233,13 +229,30 @@ l3fwd_em_send_packets(int nb_rx, struct rte_mbuf
**pkts_burst,
dst_port[j + i] = em_get_dst_port(qconf,
pkts_burst[j + i], portid);
}
+
+ for (i = 0; i < EM_HASH_LOOKUP_COUNT && do_step3; i += FWDSTEP)
+ processx4_step3(&pkts_burst[j + i], &dst_port[j + i]);
}
- for (; j < nb_rx; j++)
+ for (; j < nb_rx; j++) {
dst_port[j] = em_get_dst_port(qconf, pkts_burst[j], portid);
+ if (do_step3)
+ process_packet(pkts_burst[j], &pkts_burst[j]->port);
+ }
+}
- send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
+/*
+ * Buffer optimized handling of packets, invoked
+ * from main_loop.
+ */
+static inline void
+l3fwd_em_send_packets(int nb_rx, struct rte_mbuf **pkts_burst, uint16_t portid,
+ struct lcore_conf *qconf)
+{
+ uint16_t dst_port[MAX_PKT_BURST];
+ l3fwd_em_process_packets(nb_rx, pkts_burst, dst_port, portid, qconf, 0);
+ send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
}
/*
@@ -260,11 +273,8 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **ev,
*/
int32_t n = RTE_ALIGN_FLOOR(nb_rx, EM_HASH_LOOKUP_COUNT);
- for (j = 0; j < EM_HASH_LOOKUP_COUNT && j < nb_rx; j++) {
+ for (j = 0; j < nb_rx; j++)
pkts_burst[j] = ev[j]->mbuf;
- rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j],
- struct rte_ether_hdr *) + 1);
- }
for (j = 0; j < n; j += EM_HASH_LOOKUP_COUNT) {
@@ -305,7 +315,8 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **ev,
}
continue;
}
- processx4_step3(&pkts_burst[j], &dst_port[j]);
+ for (i = 0; i < EM_HASH_LOOKUP_COUNT; i += FWDSTEP)
+ processx4_step3(&pkts_burst[j + i], &dst_port[j + i]);
for (i = 0; i < EM_HASH_LOOKUP_COUNT; i++)
pkts_burst[j + i]->port = dst_port[j + i];
diff --git a/examples/l3fwd/l3fwd_lpm_altivec.h
b/examples/l3fwd/l3fwd_lpm_altivec.h
index 0c6852a7bb..adb82f1478 100644
--- a/examples/l3fwd/l3fwd_lpm_altivec.h
+++ b/examples/l3fwd/l3fwd_lpm_altivec.h
@@ -96,11 +96,11 @@ processx4_step2(const struct lcore_conf *qconf,
* from main_loop.
*/
static inline void
-l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
- uint8_t portid, struct lcore_conf *qconf)
+l3fwd_lpm_process_packets(int nb_rx, struct rte_mbuf **pkts_burst,
+ uint8_t portid, uint16_t *dst_port,
+ struct lcore_conf *qconf, const uint8_t do_step3)
{
int32_t j;
- uint16_t dst_port[MAX_PKT_BURST];
__vector unsigned int dip[MAX_PKT_BURST / FWDSTEP];
uint32_t ipv4_flag[MAX_PKT_BURST / FWDSTEP];
const int32_t k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
@@ -114,22 +114,41 @@ l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf
**pkts_burst,
ipv4_flag[j / FWDSTEP],
portid, &pkts_burst[j], &dst_port[j]);
+ if (do_step3)
+ for (j = 0; j != k; j += FWDSTEP)
+ processx4_step3(&pkts_burst[j], &dst_port[j]);
+
/* Classify last up to 3 packets one by one */
switch (nb_rx % FWDSTEP) {
case 3:
dst_port[j] = lpm_get_dst_port(qconf, pkts_burst[j], portid);
+ if
[PATCH v4 4/5] examples/l3fwd: fix event vector processing in fib
From: Pavan Nikhilesh
Fix stack overflow when event vector size is greater than
MAX_BURST_SIZE.
Add missing mac swap and rfc1812 stage.
Fixes: e8adca1951d4 ("examples/l3fwd: support event vector")
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_fib.c | 130 ++---
1 file changed, 91 insertions(+), 39 deletions(-)
diff --git a/examples/l3fwd/l3fwd_fib.c b/examples/l3fwd/l3fwd_fib.c
index b82e0c0354..407e9def71 100644
--- a/examples/l3fwd/l3fwd_fib.c
+++ b/examples/l3fwd/l3fwd_fib.c
@@ -77,27 +77,37 @@ fib_parse_packet(struct rte_mbuf *mbuf,
*/
#if !defined FIB_SEND_MULTI
static inline void
-fib_send_single(int nb_tx, struct lcore_conf *qconf,
- struct rte_mbuf **pkts_burst, uint16_t hops[nb_tx])
+process_packet(struct rte_mbuf *pkt, uint16_t *hop)
{
- int32_t j;
struct rte_ether_hdr *eth_hdr;
- for (j = 0; j < nb_tx; j++) {
- /* Run rfc1812 if packet is ipv4 and checks enabled. */
+ /* Run rfc1812 if packet is ipv4 and checks enabled. */
#if defined DO_RFC_1812_CHECKS
- rfc1812_process((struct rte_ipv4_hdr *)(rte_pktmbuf_mtod(
- pkts_burst[j], struct rte_ether_hdr *) + 1),
- &hops[j], pkts_burst[j]->packet_type);
+ rfc1812_process(
+ (struct rte_ipv4_hdr *)(rte_pktmbuf_mtod(
+ pkt, struct rte_ether_hdr *) +
+ 1),
+ hop, pkt->packet_type);
#endif
- /* Set MAC addresses. */
- eth_hdr = rte_pktmbuf_mtod(pkts_burst[j],
- struct rte_ether_hdr *);
- *(uint64_t *)ð_hdr->dst_addr = dest_eth_addr[hops[j]];
- rte_ether_addr_copy(&ports_eth_addr[hops[j]],
- ð_hdr->src_addr);
+ /* Set MAC addresses. */
+ eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
+ *(uint64_t *)ð_hdr->dst_addr = dest_eth_addr[*hop];
+ rte_ether_addr_copy(&ports_eth_addr[*hop], ð_hdr->src_addr);
+}
+static inline void
+fib_send_single(int nb_tx, struct lcore_conf *qconf,
+ struct rte_mbuf **pkts_burst, uint16_t hops[nb_tx])
+{
+ int32_t j;
+
+ for (j = 0; j < nb_tx; j++) {
+ process_packet(pkts_burst[j], &hops[j]);
+ if (hops[j] == BAD_PORT) {
+ rte_pktmbuf_free(pkts_burst[j]);
+ continue;
+ }
/* Send single packet. */
send_single_packet(qconf, pkts_burst[j], hops[j]);
}
@@ -261,7 +271,7 @@ fib_event_loop(struct l3fwd_event_resources *evt_rsrc,
uint32_t ipv4_arr[MAX_PKT_BURST];
uint8_t ipv6_arr[MAX_PKT_BURST][RTE_FIB6_IPV6_ADDR_SIZE];
uint64_t hopsv4[MAX_PKT_BURST], hopsv6[MAX_PKT_BURST];
- uint16_t nh;
+ uint16_t nh, hops[MAX_PKT_BURST];
uint8_t type_arr[MAX_PKT_BURST];
uint32_t ipv4_cnt, ipv6_cnt;
uint32_t ipv4_arr_assem, ipv6_arr_assem;
@@ -350,7 +360,13 @@ fib_event_loop(struct l3fwd_event_resources *evt_rsrc,
else
nh = (uint16_t)hopsv6[ipv6_arr_assem++];
if (nh != FIB_DEFAULT_HOP)
- events[i].mbuf->port = nh;
+ hops[i] = nh != FIB_DEFAULT_HOP ?
+ nh :
+ events[i].mbuf->port;
+ process_packet(events[i].mbuf, &hops[i]);
+ events[i].mbuf->port = hops[i] != BAD_PORT ?
+ hops[i] :
+ events[i].mbuf->port;
}
if (flags & L3FWD_EVENT_TX_ENQ) {
@@ -418,14 +434,12 @@ fib_event_main_loop_tx_q_burst(__rte_unused void *dummy)
}
static __rte_always_inline void
-fib_process_event_vector(struct rte_event_vector *vec)
+fib_process_event_vector(struct rte_event_vector *vec, uint8_t *type_arr,
+uint8_t **ipv6_arr, uint64_t *hopsv4, uint64_t *hopsv6,
+uint32_t *ipv4_arr, uint16_t *hops)
{
- uint8_t ipv6_arr[MAX_PKT_BURST][RTE_FIB6_IPV6_ADDR_SIZE];
- uint64_t hopsv4[MAX_PKT_BURST], hopsv6[MAX_PKT_BURST];
uint32_t ipv4_arr_assem, ipv6_arr_assem;
struct rte_mbuf **mbufs = vec->mbufs;
- uint32_t ipv4_arr[MAX_PKT_BURST];
- uint8_t type_arr[MAX_PKT_BURST];
uint32_t ipv4_cnt, ipv6_cnt;
struct lcore_conf *lconf;
uint16_t nh;
@@ -463,16 +477,10 @@ fib_process_event_vector(struct rte_event_vector *vec)
/* Lookup IPv6 hops if IPv6 packets are present. */
if (ipv6_cnt > 0)
- rte_fib6_lookup_bulk(lconf->ipv6_lookup_struct, ipv6_arr,
-
[PATCH v4 5/5] examples/l3fwd: use em vector path for event vector
From: Pavan Nikhilesh
Use em vector path to process event vector.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_em.c| 13 +++--
examples/l3fwd/l3fwd_em.h| 29 +--
examples/l3fwd/l3fwd_em_hlm.h| 72 +---
examples/l3fwd/l3fwd_em_sequential.h | 25 ++
examples/l3fwd/l3fwd_event.h | 21
5 files changed, 48 insertions(+), 112 deletions(-)
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index a203dc9e46..35de31157e 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -860,10 +860,15 @@ em_event_loop_vector(struct l3fwd_event_resources
*evt_rsrc,
int i, nb_enq = 0, nb_deq = 0;
struct lcore_conf *lconf;
unsigned int lcore_id;
+ uint16_t *dst_ports;
if (event_p_id < 0)
return;
+ dst_ports = rte_zmalloc("", sizeof(uint16_t) * evt_rsrc->vector_size,
+ RTE_CACHE_LINE_SIZE);
+ if (dst_ports == NULL)
+ return;
lcore_id = rte_lcore_id();
lconf = &lcore_conf[lcore_id];
@@ -885,13 +890,12 @@ em_event_loop_vector(struct l3fwd_event_resources
*evt_rsrc,
}
#if defined RTE_ARCH_X86 || defined __ARM_NEON
- l3fwd_em_process_event_vector(events[i].vec, lconf);
+ l3fwd_em_process_event_vector(events[i].vec, lconf,
+ dst_ports);
#else
l3fwd_em_no_opt_process_event_vector(events[i].vec,
-lconf);
+lconf, dst_ports);
#endif
- if (flags & L3FWD_EVENT_TX_DIRECT)
- event_vector_txq_set(events[i].vec, 0);
}
if (flags & L3FWD_EVENT_TX_ENQ) {
@@ -915,6 +919,7 @@ em_event_loop_vector(struct l3fwd_event_resources *evt_rsrc,
l3fwd_event_worker_cleanup(event_d_id, event_p_id, events, nb_enq,
nb_deq, 1);
+ rte_free(dst_ports);
}
int __rte_noinline
diff --git a/examples/l3fwd/l3fwd_em.h b/examples/l3fwd/l3fwd_em.h
index fe2ee59f6a..7d051fc076 100644
--- a/examples/l3fwd/l3fwd_em.h
+++ b/examples/l3fwd/l3fwd_em.h
@@ -100,7 +100,7 @@ l3fwd_em_simple_forward(struct rte_mbuf *m, uint16_t portid,
}
}
-static __rte_always_inline void
+static __rte_always_inline uint16_t
l3fwd_em_simple_process(struct rte_mbuf *m, struct lcore_conf *qconf)
{
struct rte_ether_hdr *eth_hdr;
@@ -117,6 +117,8 @@ l3fwd_em_simple_process(struct rte_mbuf *m, struct
lcore_conf *qconf)
m->port = l3fwd_em_handle_ipv6(m, m->port, eth_hdr, qconf);
else
m->port = BAD_PORT;
+
+ return m->port;
}
/*
@@ -179,7 +181,8 @@ l3fwd_em_no_opt_process_events(int nb_rx, struct rte_event
**events,
static inline void
l3fwd_em_no_opt_process_event_vector(struct rte_event_vector *vec,
-struct lcore_conf *qconf)
+struct lcore_conf *qconf,
+uint16_t *dst_ports)
{
struct rte_mbuf **mbufs = vec->mbufs;
int32_t i;
@@ -188,30 +191,20 @@ l3fwd_em_no_opt_process_event_vector(struct
rte_event_vector *vec,
for (i = 0; i < PREFETCH_OFFSET && i < vec->nb_elem; i++)
rte_prefetch0(rte_pktmbuf_mtod(mbufs[i], void *));
- /* Process first packet to init vector attributes */
- l3fwd_em_simple_process(mbufs[0], qconf);
- if (vec->attr_valid) {
- if (mbufs[0]->port != BAD_PORT)
- vec->port = mbufs[0]->port;
- else
- vec->attr_valid = 0;
- }
-
/*
* Prefetch and forward already prefetched packets.
*/
- for (i = 1; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {
+ for (i = 0; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {
rte_prefetch0(
rte_pktmbuf_mtod(mbufs[i + PREFETCH_OFFSET], void *));
- l3fwd_em_simple_process(mbufs[i], qconf);
- event_vector_attr_validate(vec, mbufs[i]);
+ dst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);
}
/* Forward remaining prefetched packets */
- for (; i < vec->nb_elem; i++) {
- l3fwd_em_simple_process(mbufs[i], qconf);
- event_vector_attr_validate(vec, mbufs[i]);
- }
+ for (; i < vec->nb_elem; i++)
+ dst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);
+
+ process_event_vector(vec, dst_ports);
}
#endif /* __L3FWD_EM_H__ */
diff --git a/examples/l3fwd/l3fwd_em_hlm.h b/examples/l3fwd/l3fwd_em_hlm.h
index 12b997e477..2e11eefad7 100644
--- a/examples/l3fwd/l3fwd_em_hlm.h
+++ b/examples/l3fw
[PATCH v4 3/5] examples/l3fwd: use lpm vector path for event vector
From: Pavan Nikhilesh
Use lpm vector path to process event vector.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_altivec.h | 29 ++
examples/l3fwd/l3fwd_event.h | 71 ++
examples/l3fwd/l3fwd_lpm.c | 39 +++
examples/l3fwd/l3fwd_neon.h| 47 ++
examples/l3fwd/l3fwd_sse.h | 44 +
5 files changed, 214 insertions(+), 16 deletions(-)
diff --git a/examples/l3fwd/l3fwd_altivec.h b/examples/l3fwd/l3fwd_altivec.h
index 87018f5dbe..e45e138e59 100644
--- a/examples/l3fwd/l3fwd_altivec.h
+++ b/examples/l3fwd/l3fwd_altivec.h
@@ -222,4 +222,33 @@ send_packets_multi(struct lcore_conf *qconf, struct
rte_mbuf **pkts_burst,
}
}
+static __rte_always_inline uint16_t
+process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)
+{
+ uint16_t i = 0, res;
+
+ while (nb_elem > 7) {
+ __vector unsigned short dp1;
+ __vector unsigned short dp;
+
+ dp = (__vector unsigned short)vec_splats((short)dst_ports[0]);
+ dp1 = *((__vector unsigned short *)&dst_ports[i]);
+ res = vec_all_eq(dp1, dp);
+ if (!res)
+ return BAD_PORT;
+
+ nb_elem -= 8;
+ i += 8;
+ }
+
+ while (nb_elem) {
+ if (dst_ports[i] != dst_ports[0])
+ return BAD_PORT;
+ nb_elem--;
+ i++;
+ }
+
+ return dst_ports[0];
+}
+
#endif /* _L3FWD_ALTIVEC_H_ */
diff --git a/examples/l3fwd/l3fwd_event.h b/examples/l3fwd/l3fwd_event.h
index b93841a16f..3fe38aada0 100644
--- a/examples/l3fwd/l3fwd_event.h
+++ b/examples/l3fwd/l3fwd_event.h
@@ -82,6 +82,27 @@ struct l3fwd_event_resources {
uint64_t vector_tmo_ns;
};
+#if defined(RTE_ARCH_X86)
+#include "l3fwd_sse.h"
+#elif defined __ARM_NEON
+#include "l3fwd_neon.h"
+#elif defined(RTE_ARCH_PPC_64)
+#include "l3fwd_altivec.h"
+#else
+static inline uint16_t
+process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)
+{
+ int i;
+
+ for (i = 0; i < nb_elem; i++) {
+ if (dst_ports[i] != dst_ports[0])
+ return BAD_PORT;
+ }
+
+ return dst_ports[0];
+}
+#endif
+
static inline void
event_vector_attr_validate(struct rte_event_vector *vec, struct rte_mbuf *mbuf)
{
@@ -103,7 +124,57 @@ event_vector_txq_set(struct rte_event_vector *vec,
uint16_t txq)
}
}
+static inline uint16_t
+filter_bad_packets(struct rte_mbuf **mbufs, uint16_t *dst_port,
+ uint16_t nb_pkts)
+{
+ uint16_t *des_pos, free = 0;
+ struct rte_mbuf **pos;
+ int i;
+
+ /* Filter out and free bad packets */
+ for (i = 0; i < nb_pkts; i++) {
+ if (dst_port[i] == BAD_PORT) {
+ rte_pktmbuf_free(mbufs[i]);
+ if (!free) {
+ pos = &mbufs[i];
+ des_pos = &dst_port[i];
+ }
+ free++;
+ continue;
+ }
+
+ if (free) {
+ *pos = mbufs[i];
+ pos++;
+ *des_pos = dst_port[i];
+ des_pos++;
+ }
+ }
+ return nb_pkts - free;
+}
+
+static inline void
+process_event_vector(struct rte_event_vector *vec, uint16_t *dst_port)
+{
+ uint16_t port, i;
+
+ vec->nb_elem = filter_bad_packets(vec->mbufs, dst_port, vec->nb_elem);
+ /* Verify destination array */
+ port = process_dst_port(dst_port, vec->nb_elem);
+ if (port == BAD_PORT) {
+ vec->attr_valid = 0;
+ for (i = 0; i < vec->nb_elem; i++) {
+ vec->mbufs[i]->port = dst_port[i];
+ rte_event_eth_tx_adapter_txq_set(vec->mbufs[i], 0);
+ }
+ } else {
+ vec->attr_valid = 1;
+ vec->port = port;
+ vec->queue = 0;
+ }
+}
struct l3fwd_event_resources *l3fwd_get_eventdev_rsrc(void);
void l3fwd_event_resource_setup(struct rte_eth_conf *port_conf);
diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c
index 22d7f61a42..5172979c72 100644
--- a/examples/l3fwd/l3fwd_lpm.c
+++ b/examples/l3fwd/l3fwd_lpm.c
@@ -425,24 +425,27 @@ lpm_event_main_loop_tx_q_burst(__rte_unused void *dummy)
}
static __rte_always_inline void
-lpm_process_event_vector(struct rte_event_vector *vec, struct lcore_conf
*lconf)
+lpm_process_event_vector(struct rte_event_vector *vec, struct lcore_conf
*lconf,
+uint16_t *dst_port)
{
struct rte_mbuf **mbufs = vec->mbufs;
int i;
- /* Process first packet to init vector attributes */
- lpm_process_event_pkt(lconf, mbufs[0]);
+#if defined RTE_ARCH_X86 || defined __ARM_NEON || defined RTE_ARCH_PPC_64
i
RE: [EXT] [PATCH resend v3 0/6] crypto/uadk: introduce uadk crypto driver
> > > gakhil@cavium-SR1-T640:/home/gakhil/up/uadk$ make > > > make all-recursive > > > make[1]: Entering directory '/home/gakhil/up/uadk' > > > Making all in . > > > make[2]: Entering directory '/home/gakhil/up/uadk' > > > depbase=`echo wd.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ > > > /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I. > > > - > > Wall -Werror -fno-strict-aliasing -I./include - > > DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - > > DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT wd.lo -MD - > > MP -MF $depbase.Tpo -c -o wd.lo wd.c &&\ > > > mv -f $depbase.Tpo $depbase.Plo > > > libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- > aliasing - > > I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- > > DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT wd.lo -MD - > MP > > -MF .deps/wd.Tpo -c wd.c -fPIC -DPIC -o .libs/wd.o > > > depbase=`echo wd_mempool.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ > > > /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I. > > > - > > Wall -Werror -fno-strict-aliasing -I./include - > > DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - > > DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT > > wd_mempool.lo -MD -MP -MF $depbase.Tpo -c -o wd_mempool.lo > > wd_mempool.c &&\ > > > mv -f $depbase.Tpo $depbase.Plo > > > libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- > aliasing - > > I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- > > DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT > > wd_mempool.lo -MD -MP -MF .deps/wd_mempool.Tpo -c wd_mempool.c - > fPIC > > -DPIC -o .libs/wd_mempool.o > > > depbase=`echo v1/wd.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ > > > /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I. > > > - > > Wall -Werror -fno-strict-aliasing -I./include - > > DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - > > DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT v1/wd.lo - > MD > > -MP -MF $depbase.Tpo -c -o v1/wd.lo v1/wd.c &&\ > > > mv -f $depbase.Tpo $depbase.Plo > > > libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- > aliasing - > > I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- > > DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT v1/wd.lo - > MD - > > MP -MF v1/.deps/wd.Tpo -c v1/wd.c -fPIC -DPIC -o v1/.libs/wd.o > > > In file included from v1/wd.c:30: > > > ./v1/wd_util.h:354:2: error: #error "no platform mb, define one before > > compiling" > > >354 | #error "no platform mb, define one before compiling" > > >| ^ > > > make[2]: *** [Makefile:788: v1/wd.lo] Error 1 > > > make[2]: Leaving directory '/home/gakhil/up/uadk' > > > make[1]: *** [Makefile:859: all-recursive] Error 1 > > > make[1]: Leaving directory '/home/gakhil/up/uadk' > > > make: *** [Makefile:565: all] Error 2 > > By the way, what platform are you using. > > I can not reproduce this error. > > > I am compiling on Intel XEON server with ubuntu 18.04 Any update??
RE: [PATCH] eal: non-temporal memcpy
Hi Morten, > Mattias, Konstantin, Honnappa, Stephen, > > In my patch for non-temporal memcpy, I have been aiming for using as much > non-temporal store as possible. E.g. copying 16 byte to a > 16 byte aligned address will be done using non-temporal store instructions. > > Now, I am seriously considering this alternative: > > Only using non-temporal stores for complete cache lines, and using normal > stores for partial cache lines. > > I think it will make things simpler when an application mixes normal and > non-temporal stores. E.g. an application writing metadata (a > pcap header) followed by packet data. Sounds like a reasonable idea to me. > > The disadvantage is that copying a burst of 32 packets, will - in the worst > case - pollute 64 cache lines (one at the start plus one at the > end of the copied data), i.e. 4 KiB of data cache. If copying to a > consecutive memory area, e.g. a packet capture buffer, it will pollute 33 > cache lines (because the start of packet #2 is in the same cache line as the > end of packet #1, etc.). > > What do you think? My guess that for modern high-end x86 CPUs the difference would be neglectable. Though again, right now it is just my guess, and I don't have a clue what will be impact (if any) on other platforms. If we really want to avoid any doubts, then probably the best thing it to have some sort of micro-bench in our UT that would simulate some memory(/cache) bound workload plus normal or NT copies. As a very rough though: Allocate some big enough memory buffer (size=X) that for sure wouldn't fit into CPU caches. Then in a loop for each iteration: - do N random normal reads/writes from/to that buffer to simulate some memory bound workload. (so each iteration cause some (more or less) constant % of cache-misses). - invoke our memcpy_ex(size=Y) in question K(=32 as DPDK magic number?) times for different memory locations. Measure amount of cycles it takes for some big number of iterations. That would probably show us a difference (if any) between memcpy vs memcpy_ex() or between different implementations of memcpy_ex() in terms of cache-line saving, etc. Again it will probably show at what size>=Y it is worth to start using NT instead of normal copies for such workloads. By varying X,N,Y,K parameters we can test different scenarios on different platforms. > > PS: Non-temporal loads are easy to work with, so don't worry about that. > > > Med venlig hilsen / Kind regards, > -Morten Brørup
[v3 0/3] FIPS asymmetric validation
This patch series adds support in fips_validation app to perform asymmetric validation. To start with, RSA algorithm is used in the evaluation. For the key value pairs which is multiprecision in arithmetic, openssl library is used. Changes: v3: - patches 5,6 and 7 in v2 are rebased and submitted here. v2: - minor fixes in v1 - addition of digest encoding for fips validation - addition of message randomization for fips conformance tests. Gowrishankar Muthukrishnan (3): examples/fips_validation: add asymmetric validation examples/fips_validation: encode digest with hash OID examples/fips_validation: randomize message for conformance test config/meson.build| 6 + doc/guides/sample_app_ug/fips_validation.rst | 1 + examples/fips_validation/fips_validation.c| 2 + examples/fips_validation/fips_validation.h| 51 +- .../fips_validation/fips_validation_gcm.c | 8 +- .../fips_validation/fips_validation_rsa.c | 630 ++ examples/fips_validation/main.c | 546 --- examples/fips_validation/meson.build | 6 + 8 files changed, 1154 insertions(+), 96 deletions(-) create mode 100644 examples/fips_validation/fips_validation_rsa.c -- 2.25.1
[v3 1/3] examples/fips_validation: add asymmetric validation
Add support for asymmetric crypto validation starting with RSA.
For the generation of crypto values which is multiprecision in
math, openssl library is used only for this purpose.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Brian Dooley
--
v3:
- rebased according to cryptodev session rework changes.
v2:
- improved handling priv key type.
---
config/meson.build| 6 +
doc/guides/sample_app_ug/fips_validation.rst | 1 +
examples/fips_validation/fips_validation.c| 2 +
examples/fips_validation/fips_validation.h| 47 +-
.../fips_validation/fips_validation_gcm.c | 8 +-
.../fips_validation/fips_validation_rsa.c | 520 ++
examples/fips_validation/main.c | 468 +---
examples/fips_validation/meson.build | 6 +
8 files changed, 962 insertions(+), 96 deletions(-)
create mode 100644 examples/fips_validation/fips_validation_rsa.c
diff --git a/config/meson.build b/config/meson.build
index 0fc209db01..e82797d206 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -226,6 +226,12 @@ if jansson_dep.found()
dpdk_conf.set('RTE_HAS_JANSSON', 1)
endif
+# check for openssl
+openssl_dep = dependency('openssl', required: false, method: 'pkg-config')
+if openssl_dep.found()
+dpdk_conf.set('RTE_HAS_OPENSSL', 1)
+endif
+
# check for pcap
pcap_dep = dependency('libpcap', required: false, method: 'pkg-config')
pcap_lib = is_windows ? 'wpcap' : 'pcap'
diff --git a/doc/guides/sample_app_ug/fips_validation.rst
b/doc/guides/sample_app_ug/fips_validation.rst
index 33a8c97575..5e9ad2d006 100644
--- a/doc/guides/sample_app_ug/fips_validation.rst
+++ b/doc/guides/sample_app_ug/fips_validation.rst
@@ -66,6 +66,7 @@ ACVP
* SHA (1, 256, 384, 512) - AFT, MCT
* TDES-CBC - AFT, MCT
* TDES-ECB - AFT, MCT
+* RSA
Application Information
diff --git a/examples/fips_validation/fips_validation.c
b/examples/fips_validation/fips_validation.c
index 363e17a6f3..2c47f9480b 100644
--- a/examples/fips_validation/fips_validation.c
+++ b/examples/fips_validation/fips_validation.c
@@ -473,6 +473,8 @@ fips_test_parse_one_json_vector_set(void)
else if (strstr(algo_str, "TDES-CBC") ||
strstr(algo_str, "TDES-ECB"))
info.algo = FIPS_TEST_ALGO_TDES;
+ else if (strstr(algo_str, "RSA"))
+ info.algo = FIPS_TEST_ALGO_RSA;
else
return -EINVAL;
diff --git a/examples/fips_validation/fips_validation.h
b/examples/fips_validation/fips_validation.h
index 43e5ffe4b0..ed59322635 100644
--- a/examples/fips_validation/fips_validation.h
+++ b/examples/fips_validation/fips_validation.h
@@ -42,6 +42,7 @@ enum fips_test_algorithms {
FIPS_TEST_ALGO_HMAC,
FIPS_TEST_ALGO_TDES,
FIPS_TEST_ALGO_SHA,
+ FIPS_TEST_ALGO_RSA,
FIPS_TEST_ALGO_MAX
};
@@ -55,6 +56,9 @@ enum file_types {
enum fips_test_op {
FIPS_TEST_ENC_AUTH_GEN = 1,
FIPS_TEST_DEC_AUTH_VERIF,
+ FIPS_TEST_ASYM_KEYGEN,
+ FIPS_TEST_ASYM_SIGGEN,
+ FIPS_TEST_ASYM_SIGVER
};
#define MAX_LINE_PER_VECTOR16
@@ -78,11 +82,22 @@ struct fips_test_vector {
struct fips_val aad;
} aead;
};
+ struct {
+ struct fips_val seed;
+ struct fips_val signature;
+ struct fips_val e;
+ struct fips_val n;
+ struct fips_val d;
+ struct fips_val p;
+ struct fips_val q;
+ struct fips_val dp;
+ struct fips_val dq;
+ struct fips_val qinv;
+ } rsa;
struct fips_val pt;
struct fips_val ct;
struct fips_val iv;
-
enum rte_crypto_op_status status;
};
@@ -138,6 +153,12 @@ enum fips_sha_test_types {
SHA_MCT
};
+enum fips_rsa_test_types {
+ RSA_AFT = 0,
+ RSA_GDT,
+ RSA_KAT
+};
+
struct aesavs_interim_data {
enum fips_aesavs_test_types test_type;
uint32_t cipher_algo;
@@ -164,8 +185,9 @@ struct ccm_interim_data {
};
struct sha_interim_data {
- enum fips_sha_test_types test_type;
+ /* keep algo always on top as it is also used in asym digest */
enum rte_crypto_auth_algorithm algo;
+ enum fips_sha_test_types test_type;
};
struct gcm_interim_data {
@@ -182,6 +204,14 @@ struct xts_interim_data {
enum xts_tweak_modes tweak_mode;
};
+struct rsa_interim_data {
+ enum rte_crypto_auth_algorithm auth;
+ uint16_t modulo;
+ uint16_t saltlen;
+ enum rte_crypto_rsa_padding_type padding;
+ enum rte_crypto_rsa_priv_key_type privkey;
+};
+
#ifdef USE_JANSSON
/*
* Maximum length of buffer to hold any json string.
@@ -227,6 +257,7 @@ struct fips_test_interim_info {
struct sha_interim_data sha_data;
struct gcm_interim_data gcm_d
[v3 2/3] examples/fips_validation: encode digest with hash OID
FIPS RSA validation requires hash digest be encoded with ASN.1
value for digest info.
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/fips_validation/main.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/examples/fips_validation/main.c b/examples/fips_validation/main.c
index dbf9c6fce2..f8bb89b0ec 100644
--- a/examples/fips_validation/main.c
+++ b/examples/fips_validation/main.c
@@ -844,6 +844,63 @@ prepare_aead_op(void)
return 0;
}
+static int
+get_hash_oid(enum rte_crypto_auth_algorithm hash, uint8_t *buf)
+{
+ uint8_t id_sha512[] = {0x30, 0x51, 0x30, 0x0d, 0x06, 0x09,
+ 0x60, 0x86, 0x48, 0x01, 0x65, 0x03,
+ 0x04, 0x02, 0x03, 0x05, 0x00, 0x04,
+ 0x40};
+ uint8_t id_sha384[] = {0x30, 0x41, 0x30, 0x0d, 0x06, 0x09,
+ 0x60, 0x86, 0x48, 0x01, 0x65, 0x03,
+ 0x04, 0x02, 0x02, 0x05, 0x00, 0x04,
+ 0x30};
+ uint8_t id_sha256[] = {0x30, 0x31, 0x30, 0x0d, 0x06, 0x09,
+ 0x60, 0x86, 0x48, 0x01, 0x65, 0x03,
+ 0x04, 0x02, 0x01, 0x05, 0x00, 0x04,
+ 0x20};
+ uint8_t id_sha224[] = {0x30, 0x2d, 0x30, 0x0d, 0x06, 0x09,
+ 0x60, 0x86, 0x48, 0x01, 0x65, 0x03,
+ 0x04, 0x02, 0x04, 0x05, 0x00, 0x04,
+ 0x1c};
+ uint8_t id_sha1[] = {0x30, 0x21, 0x30, 0x09, 0x06, 0x05,
+ 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05,
+ 0x00, 0x04, 0x14};
+ uint8_t *id = NULL;
+ int id_len = 0;
+
+ switch (hash) {
+ case RTE_CRYPTO_AUTH_SHA1:
+ id = id_sha1;
+ id_len = sizeof(id_sha1);
+ break;
+ case RTE_CRYPTO_AUTH_SHA224:
+ id = id_sha224;
+ id_len = sizeof(id_sha224);
+ break;
+ case RTE_CRYPTO_AUTH_SHA256:
+ id = id_sha256;
+ id_len = sizeof(id_sha256);
+ break;
+ case RTE_CRYPTO_AUTH_SHA384:
+ id = id_sha384;
+ id_len = sizeof(id_sha384);
+ break;
+ case RTE_CRYPTO_AUTH_SHA512:
+ id = id_sha512;
+ id_len = sizeof(id_sha512);
+ break;
+ default:
+ id_len = -1;
+ break;
+ }
+
+ if (id != NULL)
+ rte_memcpy(buf, id, id_len);
+
+ return id_len;
+}
+
static int
prepare_rsa_op(void)
{
@@ -857,6 +914,27 @@ prepare_rsa_op(void)
asym->rsa.padding.hash = info.interim_info.rsa_data.auth;
if (env.digest) {
+ if (asym->rsa.padding.type == RTE_CRYPTO_RSA_PADDING_PKCS1_5) {
+ int b_len = 0;
+ uint8_t b[32];
+
+ b_len = get_hash_oid(asym->rsa.padding.hash, b);
+ if (b_len < 0) {
+ RTE_LOG(ERR, USER1, "Failed to get digest info
for hash %d\n",
+ asym->rsa.padding.hash);
+ return -EINVAL;
+ }
+
+ if (b_len) {
+ msg.len = env.digest_len + b_len;
+ msg.val = rte_zmalloc(NULL, msg.len, 0);
+ rte_memcpy(msg.val, b, b_len);
+ rte_memcpy(msg.val + b_len, env.digest,
env.digest_len);
+ rte_free(env.digest);
+ env.digest = msg.val;
+ env.digest_len = msg.len;
+ }
+ }
msg.val = env.digest;
msg.len = env.digest_len;
} else {
--
2.25.1
[v3 3/3] examples/fips_validation: randomize message for conformance test
FIPS conformance tests require randomizing message based on SP 800-106.
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/fips_validation/fips_validation.h| 4 +
.../fips_validation/fips_validation_rsa.c | 112 +-
2 files changed, 115 insertions(+), 1 deletion(-)
diff --git a/examples/fips_validation/fips_validation.h
b/examples/fips_validation/fips_validation.h
index ed59322635..7cbbc1f084 100644
--- a/examples/fips_validation/fips_validation.h
+++ b/examples/fips_validation/fips_validation.h
@@ -210,6 +210,7 @@ struct rsa_interim_data {
uint16_t saltlen;
enum rte_crypto_rsa_padding_type padding;
enum rte_crypto_rsa_priv_key_type privkey;
+ uint8_t random_msg;
};
#ifdef USE_JANSSON
@@ -336,6 +337,9 @@ parse_test_tdes_json_init(void);
int
parse_test_rsa_json_init(void);
+
+int
+fips_test_randomize_message(struct fips_val *msg, struct fips_val *rand);
#endif /* USE_JANSSON */
int
diff --git a/examples/fips_validation/fips_validation_rsa.c
b/examples/fips_validation/fips_validation_rsa.c
index d3699f54d0..22c0faf3cb 100644
--- a/examples/fips_validation/fips_validation_rsa.c
+++ b/examples/fips_validation/fips_validation_rsa.c
@@ -19,11 +19,13 @@
#include "fips_validation.h"
+#define CONFORMANCE_JSON_STR "conformance"
#define TESTTYPE_JSON_STR "testType"
#define SIGTYPE_JSON_STR "sigType"
#define MOD_JSON_STR "modulo"
#define HASH_JSON_STR "hashAlg"
#define SALT_JSON_STR "saltLen"
+#define RV_JSON_STR"randomValue"
#define E_JSON_STR "e"
#define N_JSON_STR "n"
@@ -31,6 +33,10 @@
#define MSG_JSON_STR "message"
#define SIG_JSON_STR "signature"
+
+#define RV_BUF_LEN (1024/8)
+#define RV_BIT_LEN (256)
+
#ifdef USE_JANSSON
struct {
uint8_t type;
@@ -259,6 +265,13 @@ prepare_vec_rsa(void)
if (!BN_mod_inverse(qinv, q, p, ctx))
goto err;
+ if (info.interim_info.rsa_data.random_msg) {
+ if (!BN_generate_prime_ex(r, RV_BIT_LEN, 0, NULL, NULL, NULL))
+ goto err;
+
+ parse_uint8_hex_str("", BN_bn2hex(r), &vec.rsa.seed);
+ }
+
parse_uint8_hex_str("", BN_bn2hex(e), &vec.rsa.e);
parse_uint8_hex_str("", BN_bn2hex(p), &vec.rsa.p);
parse_uint8_hex_str("", BN_bn2hex(q), &vec.rsa.q);
@@ -297,6 +310,11 @@ parse_test_rsa_json_interim_writeback(struct fips_val *val)
{
RTE_SET_USED(val);
+ if (info.interim_info.rsa_data.random_msg) {
+ json_object_set_new(json_info.json_write_group, "conformance",
+
json_string("SP800-106"));
+ }
+
if (info.op == FIPS_TEST_ASYM_SIGGEN) {
json_t *obj;
@@ -367,6 +385,14 @@ parse_test_rsa_json_writeback(struct fips_val *val)
writeback_hex_str("", info.one_line_text, &vec.rsa.signature);
obj = json_string(info.one_line_text);
json_object_set_new(json_info.json_write_case, "signature",
obj);
+
+ if (info.interim_info.rsa_data.random_msg) {
+ writeback_hex_str("", info.one_line_text,
&vec.rsa.seed);
+ obj = json_string(info.one_line_text);
+ json_object_set_new(json_info.json_write_case,
"randomValue", obj);
+ json_object_set_new(json_info.json_write_case,
"randomValueLen",
+ json_integer(vec.rsa.seed.len * 8));
+ }
} else if (info.op == FIPS_TEST_ASYM_SIGVER) {
if (vec.status == RTE_CRYPTO_OP_STATUS_SUCCESS)
json_object_set_new(json_info.json_write_case,
"testPassed", json_true());
@@ -406,6 +432,8 @@ parse_interim_str(const char *key, char *src, struct
fips_val *val)
if (i >= RTE_DIM(rsa_auth_algs))
return -EINVAL;
+ } else if (strcmp(key, CONFORMANCE_JSON_STR) == 0) {
+ info.interim_info.rsa_data.random_msg = 1;
} else if (strcmp(key, SALT_JSON_STR) == 0) {
info.interim_info.rsa_data.saltlen = atoi(src);
} else if (strcmp(key, TESTTYPE_JSON_STR) == 0) {
@@ -436,6 +464,83 @@ parse_keygen_e_str(const char *key, char *src, struct
fips_val *val)
return prepare_vec_rsa();
}
+/*
+ * Message randomization function as per NIST SP 800-106.
+ */
+int
+fips_test_randomize_message(struct fips_val *msg, struct fips_val *rand)
+{
+ uint8_t m[FIPS_TEST_JSON_BUF_LEN], rv[RV_BUF_LEN];
+ uint32_t m_bitlen, rv_bitlen, count, remain, i, j;
+ uint16_t rv_len;
+
+ if (!msg->val || !rand->val || rand->len > RV_BUF_LEN
+ || msg->len > FIPS_TEST_JSON_BUF_LEN)
+ return -EINVAL;
+
+ memset(rv, 0, sizeof(rv));
+ memcpy(rv, rand->val, rand->len);
+ rv_bitlen = rand->len * 8;
+ rv_len = rand->len;
+
+ memset(m, 0, sizeof(m));
+ memcpy(m, m
Re: [PATCH v2 3/3] examples/l3fwd: enable direct rearm mode
On Tue, Oct 11, 2022 at 12:58 PM Feifei Wang wrote:
>
>
>
> > -邮件原件-
> > 发件人: Jerin Jacob
> > 发送时间: Friday, September 30, 2022 7:56 PM
> > 收件人: Feifei Wang
> > 抄送: dev@dpdk.org; nd ; Honnappa Nagarahalli
> > ; Ruifeng Wang
> >
> > 主题: Re: [PATCH v2 3/3] examples/l3fwd: enable direct rearm mode
> >
> > On Tue, Sep 27, 2022 at 8:18 AM Feifei Wang
> > wrote:
> > >
> > > Enable direct rearm mode in l3fwd. Users can use parameters:
> > > '--direct-rearm=(rx_portid,rx_queueid,tx_portid,tx_queueid)'
> > > to enable direct rearm.
> > >
> > > Suggested-by: Honnappa Nagarahalli
> > > Signed-off-by: Feifei Wang
> > > Reviewed-by: Ruifeng Wang
> > > Reviewed-by: Honnappa Nagarahalli
> > > ---
> > > examples/l3fwd/l3fwd.h | 12 +
> > > examples/l3fwd/l3fwd_lpm.c | 22 +
> > > examples/l3fwd/main.c | 94
> > +-
> > > 3 files changed, 127 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h index
> > > 40b5f32a9e..db097e344c 100644
> > > --- a/examples/l3fwd/l3fwd.h
> > > +++ b/examples/l3fwd/l3fwd.h
> > > @@ -57,6 +57,10 @@
> > > #endif
> > > #define HASH_ENTRY_NUMBER_DEFAULT 16
> > >
> > > +/* MAX number of direct rearm mapping entry */
> > > +#define MAX_DIRECT_REARM_ENTRY_NUMBER 16
> > > +#define MAX_DIRECT_REARM_QUEUE_PER_PORT 8
> > > +
> > > struct parm_cfg {
> > > const char *rule_ipv4_name;
> > > const char *rule_ipv6_name;
> > > @@ -114,6 +118,14 @@ extern struct parm_cfg parm_config;
> > >
> > > extern struct acl_algorithms acl_alg[];
> > >
> > > +/* Used in direct rearm mode */
> > > +extern bool enabled_direct_rearm;
> > > +extern uint8_t direct_rearm_entry_number; extern bool
> > >
> > +queue_enabled_direct_rearm[RTE_MAX_ETHPORTS][MAX_DIRECT_REAR
> > M_QUEUE_P
> > > +ER_PORT]; extern uint16_t
> > >
> > +direct_rearm_map_tx_port[RTE_MAX_ETHPORTS][MAX_DIRECT_REARM_
> > QUEUE_PER
> > > +_PORT]; extern uint16_t
> > >
> > +direct_rearm_map_tx_queue[RTE_MAX_ETHPORTS][MAX_DIRECT_REAR
> > M_QUEUE_PE
> > > +R_PORT]; extern uint8_t
> > >
> > +direct_rearm_entry_idx[RTE_MAX_ETHPORTS][MAX_DIRECT_REARM_QUE
> > UE_PER_P
> > > +ORT];
> > > +
> > > /* Send burst of packets on an output interface */ static inline int
> > > send_burst(struct lcore_conf *qconf, uint16_t n, uint16_t port) diff
> > > --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c index
> > > 22d7f61a42..973fe70aae 100644
> > > --- a/examples/l3fwd/l3fwd_lpm.c
> > > +++ b/examples/l3fwd/l3fwd_lpm.c
> > > @@ -150,6 +150,8 @@ lpm_main_loop(__rte_unused void *dummy)
> >
> > > @@ -205,6 +221,12 @@ lpm_main_loop(__rte_unused void *dummy)
> > > for (i = 0; i < n_rx_q; ++i) {
> > > portid = qconf->rx_queue_list[i].port_id;
> > > queueid = qconf->rx_queue_list[i].queue_id;
> > > +
> > > + if
> > > + (queue_enabled_direct_rearm[portid][queueid]) {
> >
> > IMO, We should not change fastpath code that impacts performance on
> > other targets for a feature which has a very constraint use case. Also need
> > for expressing [1], kind of defeat the purpose LPM table populated.
> >
> > IMO, If we need to add a test case for this API, testpmd would be an ideal
> > place with a dedicated fwd_engine just for this.
> >
> > [1]
> > > + " --direct-rearm (rx_port, rx_queue, tx_port, tx_queue):
> > > Put Tx
> > queue sw-ring buffers into Rx queue\n"
> Thanks very much for your comments. This patch here is mainly to facilitate
> verification test
> and show how to use direct-rearm API.
IMO, it should be other way around. for PMD and ethdev API
verification, Please use testpmd.
>
> After 'direct-rearm' matures, we will consider to enable direct-rearm in
> testpmd or other
> application in dpdk.
[Bug 1097] i40e: TSO breaks when MSS spans more than 8 data fragments
https://bugs.dpdk.org/show_bug.cgi?id=1097 Bug ID: 1097 Summary: i40e: TSO breaks when MSS spans more than 8 data fragments Product: DPDK Version: unspecified Hardware: All OS: All Status: UNCONFIRMED Severity: normal Priority: Normal Component: ethdev Assignee: dev@dpdk.org Reporter: ivan.ma...@oktetlabs.ru Target Milestone: --- We've been running opensource ethdev tests [1] lately and we've come across a bug in TSO: https://ts-factory.io/bublik/v2/log/100333?focusId=102700&mode=treeAndinfoAndlog . In the above example, a TSO transaction with MSS=4000 is requested for a packet bearing 6000 bytes of payload, with the first 4000 bytes spanning data located in 13 mbuf segments. As a result, no packets are seen on the opposite end of the wire, and the following log is produced: i40e_dev_alarm_handler(): ICR0: malicious programming detected i40e_handle_mdd_event(): Malicious Driver Detection event 0x02 on TX queue 1 PF number 0x00 VF number 0x00 device :01:00.0 i40e_handle_mdd_event(): TX driver issue detected on PF According to https://github.com/torvalds/linux/blob/master/drivers/net/ethernet/intel/i40e/i40e_txrx.c#L3416 , the "HW can't DMA more than 8 buffers to build a packet on the wire". By the looks of it, Tx prepare method in the PMD turns a blind eye to crossing this boundary. Hence the error. Apparrently, Tx prepare in i40e shall either turn such transactions down or linearise the superframe data to some extent. [1] http://mails.dpdk.org/archives/dev/2022-October/251663.html -- You are receiving this mail because: You are the assignee for the bug.
[PATCH] net/iavf: fix IPsec flow create error check
Fix an error check where the return code was assigned to a
unsigned integer which can hide negative error codes.
Fixes: 6bc987ecb860 ("net/iavf: support IPsec inline crypto")
Cc: sta...@dpdk.org
Signed-off-by: Radu Nicolau
---
drivers/net/iavf/iavf_ipsec_crypto.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/iavf/iavf_ipsec_crypto.c
b/drivers/net/iavf/iavf_ipsec_crypto.c
index afd7f8f467..b50149c0ce 100644
--- a/drivers/net/iavf/iavf_ipsec_crypto.c
+++ b/drivers/net/iavf/iavf_ipsec_crypto.c
@@ -1851,6 +1851,7 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad,
struct rte_flow_error *error)
{
struct iavf_ipsec_flow_item *ipsec_flow = meta;
+ int flow_id = -1;
if (!ipsec_flow) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
@@ -1859,8 +1860,7 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad,
}
if (ipsec_flow->is_ipv4) {
- ipsec_flow->id =
- iavf_ipsec_crypto_inbound_security_policy_add(ad,
+ flow_id = iavf_ipsec_crypto_inbound_security_policy_add(ad,
ipsec_flow->spi,
1,
ipsec_flow->ipv4_hdr.dst_addr,
@@ -1869,8 +1869,7 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad,
ipsec_flow->is_udp,
ipsec_flow->udp_hdr.dst_port);
} else {
- ipsec_flow->id =
- iavf_ipsec_crypto_inbound_security_policy_add(ad,
+ flow_id = iavf_ipsec_crypto_inbound_security_policy_add(ad,
ipsec_flow->spi,
0,
0,
@@ -1880,13 +1879,14 @@ iavf_ipsec_flow_create(struct iavf_adapter *ad,
ipsec_flow->udp_hdr.dst_port);
}
- if (ipsec_flow->id < 1) {
+ if (flow_id < 1) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"Failed to add SA.");
return -rte_errno;
}
+ ipsec_flow->id = flow_id;
flow->rule = ipsec_flow;
return 0;
--
2.25.1
Re: [EXT] [PATCH resend v3 0/6] crypto/uadk: introduce uadk crypto driver
Hi, Akhil On 2022/10/11 下午5:22, Akhil Goyal wrote: gakhil@cavium-SR1-T640:/home/gakhil/up/uadk$ make make all-recursive make[1]: Entering directory '/home/gakhil/up/uadk' Making all in . make[2]: Entering directory '/home/gakhil/up/uadk' depbase=`echo wd.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I.- Wall -Werror -fno-strict-aliasing -I./include - DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT wd.lo -MD - MP -MF $depbase.Tpo -c -o wd.lo wd.c &&\ mv -f $depbase.Tpo $depbase.Plo libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- aliasing - I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT wd.lo -MD - MP -MF .deps/wd.Tpo -c wd.c -fPIC -DPIC -o .libs/wd.o depbase=`echo wd_mempool.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I.- Wall -Werror -fno-strict-aliasing -I./include - DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT wd_mempool.lo -MD -MP -MF $depbase.Tpo -c -o wd_mempool.lo wd_mempool.c &&\ mv -f $depbase.Tpo $depbase.Plo libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- aliasing - I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT wd_mempool.lo -MD -MP -MF .deps/wd_mempool.Tpo -c wd_mempool.c - fPIC -DPIC -o .libs/wd_mempool.o depbase=`echo v1/wd.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ /bin/bash ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I.- Wall -Werror -fno-strict-aliasing -I./include - DUADK_VERSION_NUMBER="\"UADK version: 2.3.37\"" - DUADK_RELEASED_TIME="\"Released Jun 11, 2022\"" -g -O2 -MT v1/wd.lo - MD -MP -MF $depbase.Tpo -c -o v1/wd.lo v1/wd.c &&\ mv -f $depbase.Tpo $depbase.Plo libtool: compile: gcc -DHAVE_CONFIG_H -I. -Wall -Werror -fno-strict- aliasing - I./include "-DUADK_VERSION_NUMBER=\"UADK version: 2.3.37\"" "- DUADK_RELEASED_TIME=\"Released Jun 11, 2022\"" -g -O2 -MT v1/wd.lo - MD - MP -MF v1/.deps/wd.Tpo -c v1/wd.c -fPIC -DPIC -o v1/.libs/wd.o In file included from v1/wd.c:30: ./v1/wd_util.h:354:2: error: #error "no platform mb, define one before compiling" 354 | #error "no platform mb, define one before compiling" | ^ make[2]: *** [Makefile:788: v1/wd.lo] Error 1 make[2]: Leaving directory '/home/gakhil/up/uadk' make[1]: *** [Makefile:859: all-recursive] Error 1 make[1]: Leaving directory '/home/gakhil/up/uadk' make: *** [Makefile:565: all] Error 2 By the way, what platform are you using. I can not reproduce this error. I am compiling on Intel XEON server with ubuntu 18.04 Any update?? Looks the uadk library only considers ARM local build for some time. I am in checking how to cross-compile on x86. Sorry for the inconvenience. Thanks
[PATCH v5 1/5] examples/l3fwd: fix port group mask generation
From: Pavan Nikhilesh
Fix port group mask generation in altivec, vec_any_eq returns
0 or 1 while port_groupx4 expects comparison mask result.
Fixes: 2193b7467f7a ("examples/l3fwd: optimize packet processing on powerpc")
Cc: sta...@dpdk.org
Signed-off-by: Pavan Nikhilesh
---
v5 Changes:
- Fix compilation errors.
v4 Changes:
- Fix missing `rte_free`.
v3 Changes:
- PPC optimize port mask generation.
- Fix aarch32 compilation.
v2 Changes:
- Fix PPC, RISC-V, aarch32 compilation.
examples/common/altivec/port_group.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/examples/common/altivec/port_group.h
b/examples/common/altivec/port_group.h
index 5e209b02fa..1c05bc025a 100644
--- a/examples/common/altivec/port_group.h
+++ b/examples/common/altivec/port_group.h
@@ -26,12 +26,17 @@ port_groupx4(uint16_t pn[FWDSTEP + 1], uint16_t *lp,
uint16_t u16[FWDSTEP + 1];
uint64_t u64;
} *pnum = (void *)pn;
-
+ __vector unsigned long long result;
+ const __vector unsigned int perm_mask = {0x00204060, 0x80808080,
+0x80808080, 0x80808080};
int32_t v;
- v = vec_any_eq(dp1, dp2);
-
+ dp1 = (__vector unsigned short)vec_cmpeq(dp1, dp2);
+ dp1 = vec_mergeh(dp1, dp1);
+ result = (__vector unsigned long long)vec_vbpermq(
+ (__vector unsigned char)dp1, (__vector unsigned char)perm_mask);
+ v = result[1];
/* update last port counter. */
lp[0] += gptbl[v].lpv;
--
2.25.1
[PATCH v5 4/5] examples/l3fwd: fix event vector processing in fib
From: Pavan Nikhilesh
Fix stack overflow when event vector size is greater than
MAX_BURST_SIZE.
Add missing mac swap and rfc1812 stage.
Fixes: e8adca1951d4 ("examples/l3fwd: support event vector")
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_fib.c | 130 ++---
1 file changed, 91 insertions(+), 39 deletions(-)
diff --git a/examples/l3fwd/l3fwd_fib.c b/examples/l3fwd/l3fwd_fib.c
index b82e0c0354..edc0dd69b9 100644
--- a/examples/l3fwd/l3fwd_fib.c
+++ b/examples/l3fwd/l3fwd_fib.c
@@ -77,27 +77,37 @@ fib_parse_packet(struct rte_mbuf *mbuf,
*/
#if !defined FIB_SEND_MULTI
static inline void
-fib_send_single(int nb_tx, struct lcore_conf *qconf,
- struct rte_mbuf **pkts_burst, uint16_t hops[nb_tx])
+process_packet(struct rte_mbuf *pkt, uint16_t *hop)
{
- int32_t j;
struct rte_ether_hdr *eth_hdr;
- for (j = 0; j < nb_tx; j++) {
- /* Run rfc1812 if packet is ipv4 and checks enabled. */
+ /* Run rfc1812 if packet is ipv4 and checks enabled. */
#if defined DO_RFC_1812_CHECKS
- rfc1812_process((struct rte_ipv4_hdr *)(rte_pktmbuf_mtod(
- pkts_burst[j], struct rte_ether_hdr *) + 1),
- &hops[j], pkts_burst[j]->packet_type);
+ rfc1812_process(
+ (struct rte_ipv4_hdr *)(rte_pktmbuf_mtod(
+ pkt, struct rte_ether_hdr *) +
+ 1),
+ hop, pkt->packet_type);
#endif
- /* Set MAC addresses. */
- eth_hdr = rte_pktmbuf_mtod(pkts_burst[j],
- struct rte_ether_hdr *);
- *(uint64_t *)ð_hdr->dst_addr = dest_eth_addr[hops[j]];
- rte_ether_addr_copy(&ports_eth_addr[hops[j]],
- ð_hdr->src_addr);
+ /* Set MAC addresses. */
+ eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
+ *(uint64_t *)ð_hdr->dst_addr = dest_eth_addr[*hop];
+ rte_ether_addr_copy(&ports_eth_addr[*hop], ð_hdr->src_addr);
+}
+static inline void
+fib_send_single(int nb_tx, struct lcore_conf *qconf,
+ struct rte_mbuf **pkts_burst, uint16_t hops[nb_tx])
+{
+ int32_t j;
+
+ for (j = 0; j < nb_tx; j++) {
+ process_packet(pkts_burst[j], &hops[j]);
+ if (hops[j] == BAD_PORT) {
+ rte_pktmbuf_free(pkts_burst[j]);
+ continue;
+ }
/* Send single packet. */
send_single_packet(qconf, pkts_burst[j], hops[j]);
}
@@ -261,7 +271,7 @@ fib_event_loop(struct l3fwd_event_resources *evt_rsrc,
uint32_t ipv4_arr[MAX_PKT_BURST];
uint8_t ipv6_arr[MAX_PKT_BURST][RTE_FIB6_IPV6_ADDR_SIZE];
uint64_t hopsv4[MAX_PKT_BURST], hopsv6[MAX_PKT_BURST];
- uint16_t nh;
+ uint16_t nh, hops[MAX_PKT_BURST];
uint8_t type_arr[MAX_PKT_BURST];
uint32_t ipv4_cnt, ipv6_cnt;
uint32_t ipv4_arr_assem, ipv6_arr_assem;
@@ -350,7 +360,13 @@ fib_event_loop(struct l3fwd_event_resources *evt_rsrc,
else
nh = (uint16_t)hopsv6[ipv6_arr_assem++];
if (nh != FIB_DEFAULT_HOP)
- events[i].mbuf->port = nh;
+ hops[i] = nh != FIB_DEFAULT_HOP ?
+ nh :
+ events[i].mbuf->port;
+ process_packet(events[i].mbuf, &hops[i]);
+ events[i].mbuf->port = hops[i] != BAD_PORT ?
+ hops[i] :
+ events[i].mbuf->port;
}
if (flags & L3FWD_EVENT_TX_ENQ) {
@@ -418,14 +434,12 @@ fib_event_main_loop_tx_q_burst(__rte_unused void *dummy)
}
static __rte_always_inline void
-fib_process_event_vector(struct rte_event_vector *vec)
+fib_process_event_vector(struct rte_event_vector *vec, uint8_t *type_arr,
+uint8_t **ipv6_arr, uint64_t *hopsv4, uint64_t *hopsv6,
+uint32_t *ipv4_arr, uint16_t *hops)
{
- uint8_t ipv6_arr[MAX_PKT_BURST][RTE_FIB6_IPV6_ADDR_SIZE];
- uint64_t hopsv4[MAX_PKT_BURST], hopsv6[MAX_PKT_BURST];
uint32_t ipv4_arr_assem, ipv6_arr_assem;
struct rte_mbuf **mbufs = vec->mbufs;
- uint32_t ipv4_arr[MAX_PKT_BURST];
- uint8_t type_arr[MAX_PKT_BURST];
uint32_t ipv4_cnt, ipv6_cnt;
struct lcore_conf *lconf;
uint16_t nh;
@@ -463,16 +477,10 @@ fib_process_event_vector(struct rte_event_vector *vec)
/* Lookup IPv6 hops if IPv6 packets are present. */
if (ipv6_cnt > 0)
- rte_fib6_lookup_bulk(lconf->ipv6_lookup_struct, ipv6_arr,
-
[PATCH v5 3/5] examples/l3fwd: use lpm vector path for event vector
From: Pavan Nikhilesh
Use lpm vector path to process event vector.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_altivec.h | 29 ++
examples/l3fwd/l3fwd_event.h | 71 ++
examples/l3fwd/l3fwd_lpm.c | 39 +++
examples/l3fwd/l3fwd_neon.h| 47 ++
examples/l3fwd/l3fwd_sse.h | 44 +
5 files changed, 214 insertions(+), 16 deletions(-)
diff --git a/examples/l3fwd/l3fwd_altivec.h b/examples/l3fwd/l3fwd_altivec.h
index 87018f5dbe..e45e138e59 100644
--- a/examples/l3fwd/l3fwd_altivec.h
+++ b/examples/l3fwd/l3fwd_altivec.h
@@ -222,4 +222,33 @@ send_packets_multi(struct lcore_conf *qconf, struct
rte_mbuf **pkts_burst,
}
}
+static __rte_always_inline uint16_t
+process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)
+{
+ uint16_t i = 0, res;
+
+ while (nb_elem > 7) {
+ __vector unsigned short dp1;
+ __vector unsigned short dp;
+
+ dp = (__vector unsigned short)vec_splats((short)dst_ports[0]);
+ dp1 = *((__vector unsigned short *)&dst_ports[i]);
+ res = vec_all_eq(dp1, dp);
+ if (!res)
+ return BAD_PORT;
+
+ nb_elem -= 8;
+ i += 8;
+ }
+
+ while (nb_elem) {
+ if (dst_ports[i] != dst_ports[0])
+ return BAD_PORT;
+ nb_elem--;
+ i++;
+ }
+
+ return dst_ports[0];
+}
+
#endif /* _L3FWD_ALTIVEC_H_ */
diff --git a/examples/l3fwd/l3fwd_event.h b/examples/l3fwd/l3fwd_event.h
index b93841a16f..3fe38aada0 100644
--- a/examples/l3fwd/l3fwd_event.h
+++ b/examples/l3fwd/l3fwd_event.h
@@ -82,6 +82,27 @@ struct l3fwd_event_resources {
uint64_t vector_tmo_ns;
};
+#if defined(RTE_ARCH_X86)
+#include "l3fwd_sse.h"
+#elif defined __ARM_NEON
+#include "l3fwd_neon.h"
+#elif defined(RTE_ARCH_PPC_64)
+#include "l3fwd_altivec.h"
+#else
+static inline uint16_t
+process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)
+{
+ int i;
+
+ for (i = 0; i < nb_elem; i++) {
+ if (dst_ports[i] != dst_ports[0])
+ return BAD_PORT;
+ }
+
+ return dst_ports[0];
+}
+#endif
+
static inline void
event_vector_attr_validate(struct rte_event_vector *vec, struct rte_mbuf *mbuf)
{
@@ -103,7 +124,57 @@ event_vector_txq_set(struct rte_event_vector *vec,
uint16_t txq)
}
}
+static inline uint16_t
+filter_bad_packets(struct rte_mbuf **mbufs, uint16_t *dst_port,
+ uint16_t nb_pkts)
+{
+ uint16_t *des_pos, free = 0;
+ struct rte_mbuf **pos;
+ int i;
+
+ /* Filter out and free bad packets */
+ for (i = 0; i < nb_pkts; i++) {
+ if (dst_port[i] == BAD_PORT) {
+ rte_pktmbuf_free(mbufs[i]);
+ if (!free) {
+ pos = &mbufs[i];
+ des_pos = &dst_port[i];
+ }
+ free++;
+ continue;
+ }
+
+ if (free) {
+ *pos = mbufs[i];
+ pos++;
+ *des_pos = dst_port[i];
+ des_pos++;
+ }
+ }
+ return nb_pkts - free;
+}
+
+static inline void
+process_event_vector(struct rte_event_vector *vec, uint16_t *dst_port)
+{
+ uint16_t port, i;
+
+ vec->nb_elem = filter_bad_packets(vec->mbufs, dst_port, vec->nb_elem);
+ /* Verify destination array */
+ port = process_dst_port(dst_port, vec->nb_elem);
+ if (port == BAD_PORT) {
+ vec->attr_valid = 0;
+ for (i = 0; i < vec->nb_elem; i++) {
+ vec->mbufs[i]->port = dst_port[i];
+ rte_event_eth_tx_adapter_txq_set(vec->mbufs[i], 0);
+ }
+ } else {
+ vec->attr_valid = 1;
+ vec->port = port;
+ vec->queue = 0;
+ }
+}
struct l3fwd_event_resources *l3fwd_get_eventdev_rsrc(void);
void l3fwd_event_resource_setup(struct rte_eth_conf *port_conf);
diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c
index 22d7f61a42..5172979c72 100644
--- a/examples/l3fwd/l3fwd_lpm.c
+++ b/examples/l3fwd/l3fwd_lpm.c
@@ -425,24 +425,27 @@ lpm_event_main_loop_tx_q_burst(__rte_unused void *dummy)
}
static __rte_always_inline void
-lpm_process_event_vector(struct rte_event_vector *vec, struct lcore_conf
*lconf)
+lpm_process_event_vector(struct rte_event_vector *vec, struct lcore_conf
*lconf,
+uint16_t *dst_port)
{
struct rte_mbuf **mbufs = vec->mbufs;
int i;
- /* Process first packet to init vector attributes */
- lpm_process_event_pkt(lconf, mbufs[0]);
+#if defined RTE_ARCH_X86 || defined __ARM_NEON || defined RTE_ARCH_PPC_64
i
[PATCH v5 2/5] examples/l3fwd: split processing and send stages
From: Pavan Nikhilesh
Split packet processing from packet send stage, as send stage
is not common for poll and event mode.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_em_hlm.h | 39 +++---
examples/l3fwd/l3fwd_lpm_altivec.h | 25 ---
examples/l3fwd/l3fwd_lpm_neon.h| 35 ---
examples/l3fwd/l3fwd_lpm_sse.h | 25 ---
4 files changed, 95 insertions(+), 29 deletions(-)
diff --git a/examples/l3fwd/l3fwd_em_hlm.h b/examples/l3fwd/l3fwd_em_hlm.h
index e76f2760b0..12b997e477 100644
--- a/examples/l3fwd/l3fwd_em_hlm.h
+++ b/examples/l3fwd/l3fwd_em_hlm.h
@@ -177,16 +177,12 @@ em_get_dst_port(const struct lcore_conf *qconf, struct
rte_mbuf *pkt,
return portid;
}
-/*
- * Buffer optimized handling of packets, invoked
- * from main_loop.
- */
static inline void
-l3fwd_em_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
- uint16_t portid, struct lcore_conf *qconf)
+l3fwd_em_process_packets(int nb_rx, struct rte_mbuf **pkts_burst,
+uint16_t *dst_port, uint16_t portid,
+struct lcore_conf *qconf, const uint8_t do_step3)
{
int32_t i, j, pos;
- uint16_t dst_port[MAX_PKT_BURST];
/*
* Send nb_rx - nb_rx % EM_HASH_LOOKUP_COUNT packets
@@ -233,13 +229,30 @@ l3fwd_em_send_packets(int nb_rx, struct rte_mbuf
**pkts_burst,
dst_port[j + i] = em_get_dst_port(qconf,
pkts_burst[j + i], portid);
}
+
+ for (i = 0; i < EM_HASH_LOOKUP_COUNT && do_step3; i += FWDSTEP)
+ processx4_step3(&pkts_burst[j + i], &dst_port[j + i]);
}
- for (; j < nb_rx; j++)
+ for (; j < nb_rx; j++) {
dst_port[j] = em_get_dst_port(qconf, pkts_burst[j], portid);
+ if (do_step3)
+ process_packet(pkts_burst[j], &pkts_burst[j]->port);
+ }
+}
- send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
+/*
+ * Buffer optimized handling of packets, invoked
+ * from main_loop.
+ */
+static inline void
+l3fwd_em_send_packets(int nb_rx, struct rte_mbuf **pkts_burst, uint16_t portid,
+ struct lcore_conf *qconf)
+{
+ uint16_t dst_port[MAX_PKT_BURST];
+ l3fwd_em_process_packets(nb_rx, pkts_burst, dst_port, portid, qconf, 0);
+ send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
}
/*
@@ -260,11 +273,8 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **ev,
*/
int32_t n = RTE_ALIGN_FLOOR(nb_rx, EM_HASH_LOOKUP_COUNT);
- for (j = 0; j < EM_HASH_LOOKUP_COUNT && j < nb_rx; j++) {
+ for (j = 0; j < nb_rx; j++)
pkts_burst[j] = ev[j]->mbuf;
- rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j],
- struct rte_ether_hdr *) + 1);
- }
for (j = 0; j < n; j += EM_HASH_LOOKUP_COUNT) {
@@ -305,7 +315,8 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **ev,
}
continue;
}
- processx4_step3(&pkts_burst[j], &dst_port[j]);
+ for (i = 0; i < EM_HASH_LOOKUP_COUNT; i += FWDSTEP)
+ processx4_step3(&pkts_burst[j + i], &dst_port[j + i]);
for (i = 0; i < EM_HASH_LOOKUP_COUNT; i++)
pkts_burst[j + i]->port = dst_port[j + i];
diff --git a/examples/l3fwd/l3fwd_lpm_altivec.h
b/examples/l3fwd/l3fwd_lpm_altivec.h
index 0c6852a7bb..adb82f1478 100644
--- a/examples/l3fwd/l3fwd_lpm_altivec.h
+++ b/examples/l3fwd/l3fwd_lpm_altivec.h
@@ -96,11 +96,11 @@ processx4_step2(const struct lcore_conf *qconf,
* from main_loop.
*/
static inline void
-l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
- uint8_t portid, struct lcore_conf *qconf)
+l3fwd_lpm_process_packets(int nb_rx, struct rte_mbuf **pkts_burst,
+ uint8_t portid, uint16_t *dst_port,
+ struct lcore_conf *qconf, const uint8_t do_step3)
{
int32_t j;
- uint16_t dst_port[MAX_PKT_BURST];
__vector unsigned int dip[MAX_PKT_BURST / FWDSTEP];
uint32_t ipv4_flag[MAX_PKT_BURST / FWDSTEP];
const int32_t k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
@@ -114,22 +114,41 @@ l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf
**pkts_burst,
ipv4_flag[j / FWDSTEP],
portid, &pkts_burst[j], &dst_port[j]);
+ if (do_step3)
+ for (j = 0; j != k; j += FWDSTEP)
+ processx4_step3(&pkts_burst[j], &dst_port[j]);
+
/* Classify last up to 3 packets one by one */
switch (nb_rx % FWDSTEP) {
case 3:
dst_port[j] = lpm_get_dst_port(qconf, pkts_burst[j], portid);
+ if
[PATCH v5 5/5] examples/l3fwd: use em vector path for event vector
From: Pavan Nikhilesh
Use em vector path to process event vector.
Signed-off-by: Pavan Nikhilesh
---
examples/l3fwd/l3fwd_em.c| 13 +++--
examples/l3fwd/l3fwd_em.h| 29 +--
examples/l3fwd/l3fwd_em_hlm.h| 72 +---
examples/l3fwd/l3fwd_em_sequential.h | 25 ++
examples/l3fwd/l3fwd_event.h | 21
5 files changed, 48 insertions(+), 112 deletions(-)
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index a203dc9e46..35de31157e 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -860,10 +860,15 @@ em_event_loop_vector(struct l3fwd_event_resources
*evt_rsrc,
int i, nb_enq = 0, nb_deq = 0;
struct lcore_conf *lconf;
unsigned int lcore_id;
+ uint16_t *dst_ports;
if (event_p_id < 0)
return;
+ dst_ports = rte_zmalloc("", sizeof(uint16_t) * evt_rsrc->vector_size,
+ RTE_CACHE_LINE_SIZE);
+ if (dst_ports == NULL)
+ return;
lcore_id = rte_lcore_id();
lconf = &lcore_conf[lcore_id];
@@ -885,13 +890,12 @@ em_event_loop_vector(struct l3fwd_event_resources
*evt_rsrc,
}
#if defined RTE_ARCH_X86 || defined __ARM_NEON
- l3fwd_em_process_event_vector(events[i].vec, lconf);
+ l3fwd_em_process_event_vector(events[i].vec, lconf,
+ dst_ports);
#else
l3fwd_em_no_opt_process_event_vector(events[i].vec,
-lconf);
+lconf, dst_ports);
#endif
- if (flags & L3FWD_EVENT_TX_DIRECT)
- event_vector_txq_set(events[i].vec, 0);
}
if (flags & L3FWD_EVENT_TX_ENQ) {
@@ -915,6 +919,7 @@ em_event_loop_vector(struct l3fwd_event_resources *evt_rsrc,
l3fwd_event_worker_cleanup(event_d_id, event_p_id, events, nb_enq,
nb_deq, 1);
+ rte_free(dst_ports);
}
int __rte_noinline
diff --git a/examples/l3fwd/l3fwd_em.h b/examples/l3fwd/l3fwd_em.h
index fe2ee59f6a..7d051fc076 100644
--- a/examples/l3fwd/l3fwd_em.h
+++ b/examples/l3fwd/l3fwd_em.h
@@ -100,7 +100,7 @@ l3fwd_em_simple_forward(struct rte_mbuf *m, uint16_t portid,
}
}
-static __rte_always_inline void
+static __rte_always_inline uint16_t
l3fwd_em_simple_process(struct rte_mbuf *m, struct lcore_conf *qconf)
{
struct rte_ether_hdr *eth_hdr;
@@ -117,6 +117,8 @@ l3fwd_em_simple_process(struct rte_mbuf *m, struct
lcore_conf *qconf)
m->port = l3fwd_em_handle_ipv6(m, m->port, eth_hdr, qconf);
else
m->port = BAD_PORT;
+
+ return m->port;
}
/*
@@ -179,7 +181,8 @@ l3fwd_em_no_opt_process_events(int nb_rx, struct rte_event
**events,
static inline void
l3fwd_em_no_opt_process_event_vector(struct rte_event_vector *vec,
-struct lcore_conf *qconf)
+struct lcore_conf *qconf,
+uint16_t *dst_ports)
{
struct rte_mbuf **mbufs = vec->mbufs;
int32_t i;
@@ -188,30 +191,20 @@ l3fwd_em_no_opt_process_event_vector(struct
rte_event_vector *vec,
for (i = 0; i < PREFETCH_OFFSET && i < vec->nb_elem; i++)
rte_prefetch0(rte_pktmbuf_mtod(mbufs[i], void *));
- /* Process first packet to init vector attributes */
- l3fwd_em_simple_process(mbufs[0], qconf);
- if (vec->attr_valid) {
- if (mbufs[0]->port != BAD_PORT)
- vec->port = mbufs[0]->port;
- else
- vec->attr_valid = 0;
- }
-
/*
* Prefetch and forward already prefetched packets.
*/
- for (i = 1; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {
+ for (i = 0; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {
rte_prefetch0(
rte_pktmbuf_mtod(mbufs[i + PREFETCH_OFFSET], void *));
- l3fwd_em_simple_process(mbufs[i], qconf);
- event_vector_attr_validate(vec, mbufs[i]);
+ dst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);
}
/* Forward remaining prefetched packets */
- for (; i < vec->nb_elem; i++) {
- l3fwd_em_simple_process(mbufs[i], qconf);
- event_vector_attr_validate(vec, mbufs[i]);
- }
+ for (; i < vec->nb_elem; i++)
+ dst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);
+
+ process_event_vector(vec, dst_ports);
}
#endif /* __L3FWD_EM_H__ */
diff --git a/examples/l3fwd/l3fwd_em_hlm.h b/examples/l3fwd/l3fwd_em_hlm.h
index 12b997e477..2e11eefad7 100644
--- a/examples/l3fwd/l3fwd_em_hlm.h
+++ b/examples/l3fw
CRC offload from application's POV
Hi! We're looking to implement CRC offload in our driver and we're having difficulties understanding what the feature changes from the application's point of view. If we enable the KEEP_CRC offload, then the NIC is supposed to preserve the CRC in the packet, that much is clear. But we checked other drivers and it seems common for PMDs to remove the CRC from the final mbufs. Why is that? We couldn't find any place where the CRC would be stored after removal, so it looks like the application doesn't have access to this piece of data. And if so, what's the point of having this feature if the CRC is discarded either way? We're probably missing something and would really appreciate any help with this. Thank you in advance, Viacheslav
Re: [PATCH v2] IGC: Remove I225_I_PHY_ID checking
On 31/08/2022 23:51, iotg.dpdk.ref@intel.com wrote:
From: NSWE SWS DPDK Dev
i225 devices have only one PHY vendor. There is unnecessary to check
_I_PHY_ID during the link establishment and auto-negotiation process,
the checking also caused devices like i225-IT failed. This patch is to
remove the mentioned unnecessary checking.
Cc: sta...@dpdk.org
Signed-off-by: NSWE SWS DPDK Dev
---
drivers/net/igc/base/igc_i225.c | 15 ++-
drivers/net/igc/base/igc_phy.c | 6 ++
2 files changed, 4 insertions(+), 17 deletions(-)
diff --git a/drivers/net/igc/base/igc_i225.c b/drivers/net/igc/base/igc_i225.c
index 5f3d535490..af26602afb 100644
--- a/drivers/net/igc/base/igc_i225.c
+++ b/drivers/net/igc/base/igc_i225.c
@@ -173,19 +173,8 @@ static s32 igc_init_phy_params_i225(struct igc_hw *hw)
phy->ops.write_reg = igc_write_phy_reg_gpy;
ret_val = igc_get_phy_id(hw);
- /* Verify phy id and set remaining function pointers */
- switch (phy->id) {
- case I225_I_PHY_ID:
- case I226_LM_PHY_ID:
- phy->type= igc_phy_i225;
- phy->ops.set_d0_lplu_state = igc_set_d0_lplu_state_i225;
- phy->ops.set_d3_lplu_state = igc_set_d3_lplu_state_i225;
The commit log says it is removing a check on the ID, but it does not
say why these function pointers are being removed.
Why are they removed, were they not needed?
- /* TODO - complete with GPY PHY information */
- break;
- default:
- ret_val = -IGC_ERR_PHY;
- goto out;
- }
+phy->type = igc_phy_i225;
+
out:
return ret_val;
diff --git a/drivers/net/igc/base/igc_phy.c b/drivers/net/igc/base/igc_phy.c
index 43bbe69bca..2906bae21a 100644
--- a/drivers/net/igc/base/igc_phy.c
+++ b/drivers/net/igc/base/igc_phy.c
@@ -1474,8 +1474,7 @@ s32 igc_phy_setup_autoneg(struct igc_hw *hw)
return ret_val;
}
- if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
- hw->phy.id == I225_I_PHY_ID) {
+ if (phy->autoneg_mask & ADVERTISE_2500_FULL) {
/* Read the MULTI GBT AN Control Register - reg 7.32 */
ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
MMD_DEVADDR_SHIFT) |
@@ -1615,8 +1614,7 @@ s32 igc_phy_setup_autoneg(struct igc_hw *hw)
ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
mii_1000t_ctrl_reg);
- if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
- hw->phy.id == I225_I_PHY_ID)
+ if (phy->autoneg_mask & ADVERTISE_2500_FULL)
ret_val = phy->ops.write_reg(hw,
(STANDARD_AN_REG_MASK <<
MMD_DEVADDR_SHIFT) |
[PATCH v2 2/2] drivers: remove the unnecessary version.map
With the previous patch, some version.map files are not necessary.
In this patch, we removed them.
Signed-off-by: Abdullah Ömer Yamaç
Suggested-by: Ferruh Yigit
---
Depends on: patch-116222 ("build: increase minimum meson version to 0.53")
---
drivers/baseband/la12xx/version.map | 3 ---
drivers/baseband/null/version.map | 3 ---
drivers/baseband/turbo_sw/version.map | 3 ---
drivers/common/qat/version.map| 3 ---
drivers/compress/isal/version.map | 3 ---
drivers/compress/mlx5/version.map | 3 ---
drivers/compress/octeontx/version.map | 3 ---
drivers/compress/zlib/version.map | 3 ---
drivers/crypto/armv8/version.map | 3 ---
drivers/crypto/bcmfs/version.map | 3 ---
drivers/crypto/caam_jr/version.map| 3 ---
drivers/crypto/ccp/version.map| 3 ---
drivers/crypto/ipsec_mb/version.map | 3 ---
drivers/crypto/mlx5/version.map | 3 ---
drivers/crypto/mvsam/version.map | 3 ---
drivers/crypto/nitrox/version.map | 3 ---
drivers/crypto/null/version.map | 3 ---
drivers/crypto/openssl/version.map| 3 ---
drivers/crypto/virtio/version.map | 3 ---
drivers/dma/cnxk/version.map | 3 ---
drivers/dma/dpaa/version.map | 3 ---
drivers/dma/hisilicon/version.map | 3 ---
drivers/dma/idxd/version.map | 3 ---
drivers/dma/ioat/version.map | 3 ---
drivers/dma/skeleton/version.map | 3 ---
drivers/event/cnxk/version.map| 3 ---
drivers/event/dpaa/version.map| 3 ---
drivers/event/dpaa2/version.map | 3 ---
drivers/event/dsw/version.map | 3 ---
drivers/event/octeontx/version.map| 3 ---
drivers/event/opdl/version.map| 3 ---
drivers/event/skeleton/version.map| 3 ---
drivers/event/sw/version.map | 3 ---
drivers/gpu/cuda/version.map | 3 ---
drivers/mempool/bucket/version.map| 3 ---
drivers/mempool/cnxk/version.map | 3 ---
drivers/mempool/octeontx/version.map | 3 ---
drivers/mempool/ring/version.map | 3 ---
drivers/mempool/stack/version.map | 3 ---
drivers/net/af_packet/version.map | 3 ---
drivers/net/af_xdp/version.map| 3 ---
drivers/net/ark/version.map | 3 ---
drivers/net/avp/version.map | 3 ---
drivers/net/axgbe/version.map | 3 ---
drivers/net/bnx2x/version.map | 3 ---
drivers/net/cxgbe/version.map | 3 ---
drivers/net/e1000/version.map | 3 ---
drivers/net/ena/version.map | 3 ---
drivers/net/enetc/version.map | 3 ---
drivers/net/enetfec/version.map | 3 ---
drivers/net/enic/version.map | 3 ---
drivers/net/failsafe/version.map | 3 ---
drivers/net/fm10k/version.map | 3 ---
drivers/net/hinic/version.map | 3 ---
drivers/net/hns3/version.map | 3 ---
drivers/net/igc/version.map | 3 ---
drivers/net/ionic/version.map | 3 ---
drivers/net/kni/version.map | 3 ---
drivers/net/liquidio/version.map | 3 ---
drivers/net/memif/version.map | 3 ---
drivers/net/mlx4/version.map | 3 ---
drivers/net/mvneta/version.map| 3 ---
drivers/net/mvpp2/version.map | 3 ---
drivers/net/netvsc/version.map| 3 ---
drivers/net/nfb/version.map | 3 ---
drivers/net/nfp/version.map | 3 ---
drivers/net/ngbe/version.map | 3 ---
drivers/net/null/version.map | 3 ---
drivers/net/octeon_ep/version.map | 3 ---
drivers/net/pcap/version.map | 3 ---
drivers/net/pfe/version.map | 3 ---
drivers/net/qede/version.map | 3 ---
drivers/net/sfc/version.map | 3 ---
drivers/net/tap/version.map | 3 ---
drivers/net/thunderx/version.map | 3 ---
drivers/net/txgbe/version.map | 3 ---
drivers/net/vdev_netvsc/version.map | 3 ---
drivers/net/virtio/version.map| 3 ---
drivers/net/vmxnet3/version.map | 3 ---
drivers/raw/cnxk_bphy/version.map | 3 ---
drivers/raw/cnxk_gpio/version.map | 3 ---
drivers/raw/dpaa2_cmdif/version.map | 3 ---
drivers/raw/ntb/version.map | 3 ---
drivers/raw/skeleton/version.map | 3 ---
drivers/regex/cn9k/version.map| 3 ---
drivers/regex/mlx5/version.map| 3 ---
drivers/vdpa/ifc/version.map | 3 ---
drivers/vdpa/mlx5/version.map | 3 ---
drivers/vdpa/sfc/version.map | 3 ---
89 files changed, 267 deletions(-)
delete mode 100644 drivers/baseband/la12xx/version.map
delete mode 100644 drivers/baseband/null/version.map
delete mode 100644 drivers/baseband/turbo_sw/version.map
delete mode 100644 drivers/common/qat/version.map
delete mode 100644 drivers/compress/isal/version.map
delete mode 100644 drivers/compress/mlx5/version.map
delete mode 100644 drivers/compress/octeontx/version.map
delete mode 100644 drivers/compress/zlib/version.map
delete mode 100644 drivers/crypto/armv8/version.map
delete mode 100644 drivers/crypto/bcmfs
[PATCH v2 1/2] build: make version file optional for drivers
In this patch, we removed the necessity of the version files and
you don't need to update these files for each release, you can just
remove them.
Signed-off-by: Abdullah Ömer Yamaç
Suggested-by: Ferruh Yigit
---
Depends on: patch-116222 ("build: increase minimum meson version to 0.53")
---
drivers/meson.build | 67 +
1 file changed, 37 insertions(+), 30 deletions(-)
diff --git a/drivers/meson.build b/drivers/meson.build
index 216971f4e2..b5856b963b 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -1,6 +1,8 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017-2019 Intel Corporation
+fs = import('fs')
+
# Defines the order of dependencies evaluation
subdirs = [
'common',
@@ -201,39 +203,44 @@ foreach subpath:subdirs
# now build the shared driver
version_map = '@0@/@1@/version.map'.format(meson.current_source_dir(),
drv_path)
implib = 'lib' + lib_name + '.dll.a'
-
-def_file = custom_target(lib_name + '_def',
-command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
-input: version_map,
-output: '@0@_exports.def'.format(lib_name))
-
-mingw_map = custom_target(lib_name + '_mingw',
-command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
-input: version_map,
-output: '@0@_mingw.map'.format(lib_name))
-
-lk_deps = [version_map, def_file, mingw_map]
-if is_windows
-if is_ms_linker
-lk_args = ['-Wl,/def:' + def_file.full_path()]
-if meson.version().version_compare('<0.54.0')
-lk_args += ['-Wl,/implib:drivers\\' + implib]
+
+lk_deps = []
+lk_args = []
+if fs.is_file(version_map)
+def_file = custom_target(lib_name + '_def',
+command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
+input: version_map,
+output: '@0@_exports.def'.format(lib_name))
+
+mingw_map = custom_target(lib_name + '_mingw',
+command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
+input: version_map,
+output: '@0@_mingw.map'.format(lib_name))
+
+lk_deps = [version_map, def_file, mingw_map]
+if is_windows
+if is_ms_linker
+lk_args = ['-Wl,/def:' + def_file.full_path()]
+if meson.version().version_compare('<0.54.0')
+lk_args += ['-Wl,/implib:drivers\\' + implib]
+endif
+else
+lk_args = ['-Wl,--version-script=' + mingw_map.full_path()]
endif
else
-lk_args = ['-Wl,--version-script=' + mingw_map.full_path()]
-endif
-else
-lk_args = ['-Wl,--version-script=' + version_map]
-if developer_mode
-# on unix systems check the output of the
-# check-symbols.sh script, using it as a
-# dependency of the .so build
-lk_deps += custom_target(lib_name + '.sym_chk',
-command: [check_symbols, version_map, '@INPUT@'],
-capture: true,
-input: static_lib,
-output: lib_name + '.sym_chk')
+lk_args = ['-Wl,--version-script=' + version_map]
+if developer_mode
+# on unix systems check the output of the
+# check-symbols.sh script, using it as a
+# dependency of the .so build
+lk_deps += custom_target(lib_name + '.sym_chk',
+command: [check_symbols, version_map, '@INPUT@'],
+capture: true,
+input: static_lib,
+output: lib_name + '.sym_chk')
+endif
endif
+
endif
shared_lib = shared_library(lib_name, sources,
--
2.27.0
[PATCH v3] config/arm: add PHYTIUM tys2500
From: Zhipeng Lu
Here adds configs for PHYTIUM server.
Signed-off-by: Zhipeng Lu
---
v3:
* fix typos
* fix signed-off-by format
v2:
* add ccache for cross build
* rename fts2500 to tys2500 and modify the corresponding code
config/arm/arm64_tys2500_linux_gcc | 16
config/arm/meson.build | 26 +++---
2 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 config/arm/arm64_tys2500_linux_gcc
diff --git a/config/arm/arm64_tys2500_linux_gcc
b/config/arm/arm64_tys2500_linux_gcc
new file mode 100644
index 00..fce85fb0d8
--- /dev/null
+++ b/config/arm/arm64_tys2500_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'tys2500'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index b7162d516d..6442ec9596 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -213,13 +213,24 @@ implementer_phytium = {
['RTE_MACHINE', '"armv8a"'],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
-['RTE_MAX_LCORE', 64],
-['RTE_MAX_NUMA_NODES', 8]
],
'part_number_config': {
'0x662': {
-'machine_args': ['-march=armv8-a+crc'],
+'march': 'armv8-a',
+'march_features': ['crc'],
+'flags': [
+['RTE_MAX_LCORE', 64],
+['RTE_MAX_NUMA_NODES', 8]
+ ]
},
+ '0x663': {
+'march': 'armv8-a',
+'march_features': ['crc'],
+'flags': [
+['RTE_MAX_LCORE', 256],
+['RTE_MAX_NUMA_NODES', 32]
+]
+}
}
}
@@ -339,6 +350,13 @@ soc_ft2000plus = {
'numa': true
}
+soc_tys2500 = {
+'description': 'Phytium TengYun S2500',
+'implementer': '0x70',
+'part_number': '0x663',
+'numa': true
+}
+
soc_graviton2 = {
'description': 'AWS Graviton2',
'implementer': '0x41',
@@ -436,6 +454,7 @@ cn10k: Marvell OCTEON 10
dpaa:NXP DPAA
emag:Ampere eMAG
ft2000plus: Phytium FT-2000+
+tys2500: Phytium TengYun S2500
graviton2: AWS Graviton2
graviton3: AWS Graviton3
kunpeng920: HiSilicon Kunpeng 920
@@ -461,6 +480,7 @@ socs = {
'dpaa': soc_dpaa,
'emag': soc_emag,
'ft2000plus': soc_ft2000plus,
+'tys2500': soc_tys2500,
'graviton2': soc_graviton2,
'graviton3': soc_graviton3,
'kunpeng920': soc_kunpeng920,
--
2.33.0
[v2] crypto/cnxk: support exponent type private key
This patch adds support for RTE_RSA_KEY_TYPE_EXP in cnxk crypto
driver.
Signed-off-by: Gowrishankar Muthukrishnan
--
v2:
- new function to handle exp type priv key.
---
drivers/crypto/cnxk/cnxk_ae.h| 112 ++-
drivers/crypto/cnxk/cnxk_cryptodev.c | 1 +
2 files changed, 93 insertions(+), 20 deletions(-)
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index 4a7ce0bf40..adf719da73 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -82,20 +82,31 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
struct rte_crypto_rsa_priv_key_qt qt = xform->rsa.qt;
struct rte_crypto_rsa_xform *xfrm_rsa = &xform->rsa;
struct rte_crypto_rsa_xform *rsa = &sess->rsa_ctx;
+ struct rte_crypto_param_t d = xform->rsa.d;
size_t mod_len = xfrm_rsa->n.length;
size_t exp_len = xfrm_rsa->e.length;
uint64_t total_size;
size_t len = 0;
- if (qt.p.length != 0 && qt.p.data == NULL)
- return -EINVAL;
+ /* Set private key type */
+ rsa->key_type = xfrm_rsa->key_type;
+
+ if (rsa->key_type == RTE_RSA_KEY_TYPE_QT) {
+ if (qt.p.length != 0 && qt.p.data == NULL)
+ return -EINVAL;
+
+ /* Make sure key length used is not more than mod_len/2 */
+ if (qt.p.data != NULL)
+ len = (((mod_len / 2) < qt.p.length) ? 0 : qt.p.length
* 5);
+ } else if (rsa->key_type == RTE_RSA_KEY_TYPE_EXP) {
+ if (d.length != 0 && d.data == NULL)
+ return -EINVAL;
- /* Make sure key length used is not more than mod_len/2 */
- if (qt.p.data != NULL)
- len = (((mod_len / 2) < qt.p.length) ? 0 : qt.p.length);
+ len = d.length;
+ }
/* Total size required for RSA key params(n,e,(q,dQ,p,dP,qInv)) */
- total_size = mod_len + exp_len + 5 * len;
+ total_size = mod_len + exp_len + len;
/* Allocate buffer to hold all RSA keys */
rsa->n.data = rte_malloc(NULL, total_size, 0);
@@ -107,8 +118,8 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
rsa->e.data = rsa->n.data + mod_len;
memcpy(rsa->e.data, xfrm_rsa->e.data, exp_len);
- /* Private key in quintuple format */
- if (len != 0) {
+ if (rsa->key_type == RTE_RSA_KEY_TYPE_QT) {
+ /* Private key in quintuple format */
rsa->qt.q.data = rsa->e.data + exp_len;
memcpy(rsa->qt.q.data, qt.q.data, qt.q.length);
rsa->qt.dQ.data = rsa->qt.q.data + qt.q.length;
@@ -126,6 +137,11 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
rsa->qt.p.length = qt.p.length;
rsa->qt.dP.length = qt.dP.length;
rsa->qt.qInv.length = qt.qInv.length;
+ } else if (rsa->key_type == RTE_RSA_KEY_TYPE_EXP) {
+ /* Private key in exponent format */
+ rsa->d.data = rsa->e.data + exp_len;
+ memcpy(rsa->d.data, d.data, d.length);
+ rsa->d.length = d.length;
}
rsa->n.length = mod_len;
rsa->e.length = exp_len;
@@ -316,10 +332,64 @@ cnxk_ae_rsa_prep(struct rte_crypto_op *op, struct
roc_ae_buf_ptr *meta_buf,
inst->rptr = (uintptr_t)dptr;
}
+static __rte_always_inline void
+cnxk_ae_rsa_exp_prep(struct rte_crypto_op *op, struct roc_ae_buf_ptr *meta_buf,
+struct rte_crypto_rsa_xform *rsa, rte_crypto_param
*crypto_param,
+struct cpt_inst_s *inst)
+{
+ struct rte_crypto_rsa_op_param rsa_op;
+ uint32_t privkey_len = rsa->d.length;
+ uint32_t mod_len = rsa->n.length;
+ union cpt_inst_w4 w4;
+ uint32_t in_size;
+ uint32_t dlen;
+ uint8_t *dptr;
+
+ rsa_op = op->asym->rsa;
+
+ /* Input buffer */
+ dptr = meta_buf->vaddr;
+ inst->dptr = (uintptr_t)dptr;
+ memcpy(dptr, rsa->n.data, mod_len);
+ dptr += mod_len;
+ memcpy(dptr, rsa->d.data, privkey_len);
+ dptr += privkey_len;
+
+ in_size = crypto_param->length;
+ memcpy(dptr, crypto_param->data, in_size);
+
+ dptr += in_size;
+ dlen = mod_len + privkey_len + in_size;
+
+ if (rsa_op.padding.type == RTE_CRYPTO_RSA_PADDING_NONE) {
+ /* Use mod_exp operation for no_padding type */
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_MODEX;
+ w4.s.param2 = privkey_len;
+ } else {
+ if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_SIGN) {
+ w4.s.opcode_minor = ROC_AE_MINOR_OP_PKCS_ENC;
+ /* Private key encrypt (exponent), use BT1*/
+ w4.s.param2 = ROC_AE_CPT_BLOCK_TYPE1 |
((uint16_t)(privkey_len) << 1);
+ } else if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_DECRYPT) {
+ w4.s.opcode_minor = ROC_AE_MINOR_
[PATCH v10 1/8] app/procinfo: add dpdk version dump
From: "Min Hu (Connor)"
Add support for dump dpdk version.
The command is like:
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --version
Signed-off-by: Min Hu (Connor)
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index d52ac8a038..d459c706d1 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
/* Maximum long option length for option parsing. */
#define MAX_LONG_OPT_SZ 64
@@ -102,6 +103,8 @@ static char *mempool_iter_name;
/**< Enable dump regs. */
static uint32_t enable_dump_regs;
static char *dump_regs_file_prefix;
+/* Enable show DPDK version. */
+static uint32_t enable_shw_version;
/**< display usage */
static void
@@ -130,6 +133,7 @@ proc_info_usage(const char *prgname)
" --show-crypto: to display crypto information\n"
" --show-ring[=name]: to display ring information\n"
" --show-mempool[=name]: to display mempool information\n"
+ " --version: to display DPDK version\n"
" --iter-mempool=name: iterate mempool elements to display
content\n"
" --dump-regs=file-prefix: dump registers to file with the
file-prefix\n",
prgname);
@@ -242,6 +246,7 @@ proc_info_parse_args(int argc, char **argv)
{"show-mempool", optional_argument, NULL, 0},
{"iter-mempool", required_argument, NULL, 0},
{"dump-regs", required_argument, NULL, 0},
+ {"version", 0, NULL, 0},
{NULL, 0, 0, 0}
};
@@ -313,7 +318,9 @@ proc_info_parse_args(int argc, char **argv)
"dump-regs", MAX_LONG_OPT_SZ)) {
enable_dump_regs = 1;
dump_regs_file_prefix = optarg;
- }
+ } else if (!strncmp(long_option[option_index].name,
+ "version", MAX_LONG_OPT_SZ))
+ enable_shw_version = 1;
break;
case 1:
/* Print xstat single value given by name*/
@@ -1476,6 +1483,14 @@ dump_regs(char *file_prefix)
}
}
+static void
+show_version(void)
+{
+ snprintf(bdr_str, MAX_STRING_LEN, " show - DPDK version ");
+ STATS_BDR_STR(10, bdr_str);
+ printf("DPDK version: %s\n", rte_version());
+}
+
int
main(int argc, char **argv)
{
@@ -1589,6 +1604,8 @@ main(int argc, char **argv)
iter_mempool(mempool_iter_name);
if (enable_dump_regs)
dump_regs(dump_regs_file_prefix);
+ if (enable_shw_version)
+ show_version();
RTE_ETH_FOREACH_DEV(i)
rte_eth_dev_close(i);
--
2.22.0
[PATCH v10 0/8] app/procinfo: add some extended features
This patchset is to add some extended features for dpdk-proc-info. Thanks to Reshma and Stephen help to review the patchset. v9->v10: - Fix some comments for Rx/Tx descriptor dump. v8->v9: - Fixed some checkpatch warnings. v7(v4)->v8: - Add Acked-by: Reshma Pattan for PATCH 4,6. - Add Rx/Tx descriptor dump. - Adjust procinfo doc guide. v3->v4: - Add Acked-by: Reshma Pattan for PATCH 1,2,3,5,7. - Rename show-module-info to show-module-eeprom to make more clear. v2->v3: Fix some comments from Stephen. - Use --version option for DPDK version. - Add --firmware-version option to show firmware. - Use errors on stderr, not stdout. - Delete some unnecessary code. v1->v2: Fix some comments from Reshma. Dongdong Liu (4): app/procinfo: add firmware version dump app/procinfo: fix some wrong doxygen syntax app/procinfo: support descriptor dump doc: add some extended features in procinfo guide Jie Hai (1): app/procinfo: add dump of Rx/Tx burst mode Min Hu (Connor) (3): app/procinfo: add dpdk version dump app/procinfo: add RSS RETA dump app/procinfo: add module eeprom info dump app/proc-info/main.c | 324 ++--- doc/guides/tools/proc_info.rst | 36 +++- 2 files changed, 336 insertions(+), 24 deletions(-) -- 2.22.0
[PATCH v10 2/8] app/procinfo: add firmware version dump
Add support for dump ethdev firmware version.
The command is like:
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --firmware-version
Signed-off-by: Min Hu (Connor)
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index d459c706d1..7b407c47d0 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -45,6 +45,8 @@
#define MAX_LONG_OPT_SZ 64
#define MAX_STRING_LEN 256
+#define ETHDEV_FWVERS_LEN 32
+
#define STATS_BDR_FMT ""
#define STATS_BDR_STR(w, s) printf("%.*s%s%.*s\n", w, \
STATS_BDR_FMT, s, w, STATS_BDR_FMT)
@@ -105,6 +107,8 @@ static uint32_t enable_dump_regs;
static char *dump_regs_file_prefix;
/* Enable show DPDK version. */
static uint32_t enable_shw_version;
+/* Enable show ethdev firmware version. */
+static uint32_t enable_shw_fw_version;
/**< display usage */
static void
@@ -134,6 +138,7 @@ proc_info_usage(const char *prgname)
" --show-ring[=name]: to display ring information\n"
" --show-mempool[=name]: to display mempool information\n"
" --version: to display DPDK version\n"
+ " --firmware-version: to display ethdev firmware version\n"
" --iter-mempool=name: iterate mempool elements to display
content\n"
" --dump-regs=file-prefix: dump registers to file with the
file-prefix\n",
prgname);
@@ -247,6 +252,7 @@ proc_info_parse_args(int argc, char **argv)
{"iter-mempool", required_argument, NULL, 0},
{"dump-regs", required_argument, NULL, 0},
{"version", 0, NULL, 0},
+ {"firmware-version", 0, NULL, 0},
{NULL, 0, 0, 0}
};
@@ -321,6 +327,9 @@ proc_info_parse_args(int argc, char **argv)
} else if (!strncmp(long_option[option_index].name,
"version", MAX_LONG_OPT_SZ))
enable_shw_version = 1;
+ else if (!strncmp(long_option[option_index].name,
+ "firmware-version", MAX_LONG_OPT_SZ))
+ enable_shw_fw_version = 1;
break;
case 1:
/* Print xstat single value given by name*/
@@ -1491,6 +1500,30 @@ show_version(void)
printf("DPDK version: %s\n", rte_version());
}
+static void
+show_firmware_version(void)
+{
+ char fw_version[ETHDEV_FWVERS_LEN];
+ uint16_t i;
+
+ snprintf(bdr_str, MAX_STRING_LEN, " show - firmware version ");
+ STATS_BDR_STR(10, bdr_str);
+
+ RTE_ETH_FOREACH_DEV(i) {
+ /* Skip if port is not in mask */
+ if ((enabled_port_mask & (1ul << i)) == 0)
+ continue;
+
+ if (rte_eth_dev_fw_version_get(i, fw_version,
+ ETHDEV_FWVERS_LEN) == 0)
+ printf("Ethdev port %u firmware version: %s\n", i,
+ fw_version);
+ else
+ printf("Ethdev port %u firmware version: %s\n", i,
+ "not available");
+ }
+}
+
int
main(int argc, char **argv)
{
@@ -1606,6 +1639,8 @@ main(int argc, char **argv)
dump_regs(dump_regs_file_prefix);
if (enable_shw_version)
show_version();
+ if (enable_shw_fw_version)
+ show_firmware_version();
RTE_ETH_FOREACH_DEV(i)
rte_eth_dev_close(i);
--
2.22.0
[PATCH v10 4/8] app/procinfo: add module eeprom info dump
From: "Min Hu (Connor)"
This patch add support for module eeprom info dump.
The command is like:
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --show-module-eeprom
Signed-off-by: Min Hu (Connor)
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 52
1 file changed, 52 insertions(+)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index 4021279b17..90e7e41e38 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -48,6 +48,7 @@
#define ETHDEV_FWVERS_LEN 32
#define RTE_RETA_CONF_GROUP_NUM 32
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
+#define EEPROM_DUMP_CHUNKSIZE 1024
#define STATS_BDR_FMT ""
#define STATS_BDR_STR(w, s) printf("%.*s%s%.*s\n", w, \
@@ -113,6 +114,8 @@ static uint32_t enable_shw_version;
static uint32_t enable_shw_fw_version;
/* Enable show RSS reta. */
static uint32_t enable_shw_rss_reta;
+/* Enable show module eeprom information. */
+static uint32_t enable_shw_module_eeprom;
/**< display usage */
static void
@@ -144,6 +147,7 @@ proc_info_usage(const char *prgname)
" --version: to display DPDK version\n"
" --firmware-version: to display ethdev firmware version\n"
" --show-rss-reta: to display ports redirection table\n"
+ " --show-module-eeprom: to display ports module eeprom
information\n"
" --iter-mempool=name: iterate mempool elements to display
content\n"
" --dump-regs=file-prefix: dump registers to file with the
file-prefix\n",
prgname);
@@ -259,6 +263,7 @@ proc_info_parse_args(int argc, char **argv)
{"version", 0, NULL, 0},
{"firmware-version", 0, NULL, 0},
{"show-rss-reta", 0, NULL, 0},
+ {"show-module-eeprom", 0, NULL, 0},
{NULL, 0, 0, 0}
};
@@ -339,6 +344,9 @@ proc_info_parse_args(int argc, char **argv)
else if (!strncmp(long_option[option_index].name,
"show-rss-reta", MAX_LONG_OPT_SZ))
enable_shw_rss_reta = 1;
+ else if (!strncmp(long_option[option_index].name,
+ "show-module-eeprom", MAX_LONG_OPT_SZ))
+ enable_shw_module_eeprom = 1;
break;
case 1:
/* Print xstat single value given by name*/
@@ -1579,6 +1587,48 @@ show_port_rss_reta_info(void)
}
}
+static void
+show_module_eeprom_info(void)
+{
+ unsigned char bytes_eeprom[EEPROM_DUMP_CHUNKSIZE];
+ struct rte_eth_dev_module_info module_info;
+ struct rte_dev_eeprom_info eeprom_info;
+ uint16_t i;
+ int ret;
+
+ RTE_ETH_FOREACH_DEV(i) {
+ /* Skip if port is not in mask */
+ if ((enabled_port_mask & (1ul << i)) == 0)
+ continue;
+
+ snprintf(bdr_str, MAX_STRING_LEN, " Port %u ", i);
+ STATS_BDR_STR(5, bdr_str);
+
+ ret = rte_eth_dev_get_module_info(i, &module_info);
+ if (ret != 0) {
+ fprintf(stderr, "Module EEPROM information read error:
%s\n",
+ strerror(-ret));
+ return;
+ }
+
+ eeprom_info.offset = 0;
+ eeprom_info.length = module_info.eeprom_len;
+ eeprom_info.data = bytes_eeprom;
+
+ ret = rte_eth_dev_get_module_eeprom(i, &eeprom_info);
+ if (ret != 0) {
+ fprintf(stderr, "Module EEPROM read error: %s\n",
+ strerror(-ret));
+ return;
+ }
+
+ rte_hexdump(stdout, "hexdump", eeprom_info.data,
+ eeprom_info.length);
+ printf("Finish -- Port: %u MODULE EEPROM length: %d bytes\n",
+ i, eeprom_info.length);
+ }
+}
+
int
main(int argc, char **argv)
{
@@ -1698,6 +1748,8 @@ main(int argc, char **argv)
show_firmware_version();
if (enable_shw_rss_reta)
show_port_rss_reta_info();
+ if (enable_shw_module_eeprom)
+ show_module_eeprom_info();
RTE_ETH_FOREACH_DEV(i)
rte_eth_dev_close(i);
--
2.22.0
[PATCH v10 3/8] app/procinfo: add RSS RETA dump
From: "Min Hu (Connor)"
This patch add support for RSS reta dump.
The command is like:
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --show-rss-reta
Signed-off-by: Min Hu (Connor)
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 57
1 file changed, 57 insertions(+)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index 7b407c47d0..4021279b17 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -46,6 +46,8 @@
#define MAX_STRING_LEN 256
#define ETHDEV_FWVERS_LEN 32
+#define RTE_RETA_CONF_GROUP_NUM 32
+#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define STATS_BDR_FMT ""
#define STATS_BDR_STR(w, s) printf("%.*s%s%.*s\n", w, \
@@ -109,6 +111,8 @@ static char *dump_regs_file_prefix;
static uint32_t enable_shw_version;
/* Enable show ethdev firmware version. */
static uint32_t enable_shw_fw_version;
+/* Enable show RSS reta. */
+static uint32_t enable_shw_rss_reta;
/**< display usage */
static void
@@ -139,6 +143,7 @@ proc_info_usage(const char *prgname)
" --show-mempool[=name]: to display mempool information\n"
" --version: to display DPDK version\n"
" --firmware-version: to display ethdev firmware version\n"
+ " --show-rss-reta: to display ports redirection table\n"
" --iter-mempool=name: iterate mempool elements to display
content\n"
" --dump-regs=file-prefix: dump registers to file with the
file-prefix\n",
prgname);
@@ -253,6 +258,7 @@ proc_info_parse_args(int argc, char **argv)
{"dump-regs", required_argument, NULL, 0},
{"version", 0, NULL, 0},
{"firmware-version", 0, NULL, 0},
+ {"show-rss-reta", 0, NULL, 0},
{NULL, 0, 0, 0}
};
@@ -330,6 +336,9 @@ proc_info_parse_args(int argc, char **argv)
else if (!strncmp(long_option[option_index].name,
"firmware-version", MAX_LONG_OPT_SZ))
enable_shw_fw_version = 1;
+ else if (!strncmp(long_option[option_index].name,
+ "show-rss-reta", MAX_LONG_OPT_SZ))
+ enable_shw_rss_reta = 1;
break;
case 1:
/* Print xstat single value given by name*/
@@ -1524,6 +1533,52 @@ show_firmware_version(void)
}
}
+static void
+show_port_rss_reta_info(void)
+{
+ struct rte_eth_rss_reta_entry64 reta_conf[RTE_RETA_CONF_GROUP_NUM + 1];
+ struct rte_eth_dev_info dev_info;
+ uint16_t i, idx, shift;
+ uint16_t num;
+ uint16_t id;
+ int ret;
+
+ RTE_ETH_FOREACH_DEV(id) {
+ /* Skip if port is not in mask */
+ if ((enabled_port_mask & (1ul << id)) == 0)
+ continue;
+
+ snprintf(bdr_str, MAX_STRING_LEN, " Port %u ", id);
+ STATS_BDR_STR(5, bdr_str);
+
+ ret = rte_eth_dev_info_get(id, &dev_info);
+ if (ret != 0) {
+ fprintf(stderr, "Error getting device info: %s\n",
+ strerror(-ret));
+ return;
+ }
+
+ num = DIV_ROUND_UP(dev_info.reta_size, RTE_ETH_RETA_GROUP_SIZE);
+ memset(reta_conf, 0, sizeof(reta_conf));
+ for (i = 0; i < num; i++)
+ reta_conf[i].mask = ~0ULL;
+
+ ret = rte_eth_dev_rss_reta_query(id, reta_conf,
dev_info.reta_size);
+ if (ret != 0) {
+ fprintf(stderr, "Error getting RSS RETA info: %s\n",
+ strerror(-ret));
+ return;
+ }
+
+ for (i = 0; i < dev_info.reta_size; i++) {
+ idx = i / RTE_ETH_RETA_GROUP_SIZE;
+ shift = i % RTE_ETH_RETA_GROUP_SIZE;
+ printf("RSS RETA configuration: hash index=%u,
queue=%u\n",
+ i, reta_conf[idx].reta[shift]);
+ }
+ }
+}
+
int
main(int argc, char **argv)
{
@@ -1641,6 +1696,8 @@ main(int argc, char **argv)
show_version();
if (enable_shw_fw_version)
show_firmware_version();
+ if (enable_shw_rss_reta)
+ show_port_rss_reta_info();
RTE_ETH_FOREACH_DEV(i)
rte_eth_dev_close(i);
--
2.22.0
[PATCH v10 5/8] app/procinfo: add dump of Rx/Tx burst mode
From: Jie Hai
Add dump of Rx/Tx burst mode in --show-port.
Sample output changes:
- rx queue
- -- 0 descriptors 0/1024 drop_en rx buffer size 2048 \
mempool mb_pool_0 socket 0
+ -- 0 descriptors 0/1024 drop_en rx buffer size 2048 \
mempool mb_pool_0 socket 0 burst mode : Vector Neon
- tx queue
- -- 0 descriptors 1024 thresh 32/928 \
offloads : MBUF_FAST_FREE
+ -- 0 descriptors 1024 thresh 32/928 \
offloads : MBUF_FAST_FREE burst mode : Scalar
Signed-off-by: Jie Hai
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index 90e7e41e38..67217ab68b 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -845,6 +845,7 @@ show_port(void)
for (j = 0; j < dev_info.nb_rx_queues; j++) {
struct rte_eth_rxq_info queue_info;
+ struct rte_eth_burst_mode mode;
int count;
ret = rte_eth_rx_queue_info_get(i, j, &queue_info);
@@ -880,11 +881,18 @@ show_port(void)
if (queue_info.conf.offloads != 0)
show_offloads(queue_info.conf.offloads,
rte_eth_dev_rx_offload_name);
+ if (rte_eth_rx_burst_mode_get(i, j, &mode) == 0)
+ printf(" burst mode : %s%s",
+ mode.info,
+ mode.flags &
RTE_ETH_BURST_FLAG_PER_QUEUE ?
+ " (per queue)" : "");
+
printf("\n");
}
for (j = 0; j < dev_info.nb_tx_queues; j++) {
struct rte_eth_txq_info queue_info;
+ struct rte_eth_burst_mode mode;
ret = rte_eth_tx_queue_info_get(i, j, &queue_info);
if (ret != 0)
@@ -905,6 +913,13 @@ show_port(void)
if (queue_info.conf.offloads != 0)
show_offloads(queue_info.conf.offloads,
rte_eth_dev_tx_offload_name);
+
+ if (rte_eth_tx_burst_mode_get(i, j, &mode) == 0)
+ printf(" burst mode : %s%s",
+ mode.info,
+ mode.flags &
RTE_ETH_BURST_FLAG_PER_QUEUE ?
+ " (per queue)" : "");
+
printf("\n");
}
--
2.22.0
[PATCH v10 6/8] app/procinfo: fix some wrong doxygen syntax
This code is to do cleanup for the wrong doxygen syntax comments
The DPDK API is documented using doxygen comment annotations in the
header files. The procinfo code seems no need to use doxygen comment.
Signed-off-by: Dongdong Liu
Acked-by: Reshma Pattan
---
app/proc-info/main.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index 67217ab68b..fe8285d2ce 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -54,33 +54,33 @@
#define STATS_BDR_STR(w, s) printf("%.*s%s%.*s\n", w, \
STATS_BDR_FMT, s, w, STATS_BDR_FMT)
-/**< mask of enabled ports */
+/* mask of enabled ports */
static unsigned long enabled_port_mask;
-/**< Enable stats. */
+/* Enable stats. */
static uint32_t enable_stats;
-/**< Enable xstats. */
+/* Enable xstats. */
static uint32_t enable_xstats;
-/**< Enable collectd format*/
+/* Enable collectd format */
static uint32_t enable_collectd_format;
-/**< FD to send collectd format messages to STDOUT*/
+/* FD to send collectd format messages to STDOUT */
static int stdout_fd;
-/**< Host id process is running on */
+/* Host id process is running on */
static char host_id[MAX_LONG_OPT_SZ];
#ifdef RTE_LIB_METRICS
-/**< Enable metrics. */
+/* Enable metrics. */
static uint32_t enable_metrics;
#endif
-/**< Enable stats reset. */
+/* Enable stats reset. */
static uint32_t reset_stats;
-/**< Enable xstats reset. */
+/* Enable xstats reset. */
static uint32_t reset_xstats;
-/**< Enable memory info. */
+/* Enable memory info. */
static uint32_t mem_info;
-/**< Enable displaying xstat name. */
+/* Enable displaying xstat name. */
static uint32_t enable_xstats_name;
static char *xstats_name;
-/**< Enable xstats by ids. */
+/* Enable xstats by ids. */
#define MAX_NB_XSTATS_IDS 1024
static uint32_t nb_xstats_ids;
static uint64_t xstats_ids[MAX_NB_XSTATS_IDS];
@@ -88,24 +88,24 @@ static uint64_t xstats_ids[MAX_NB_XSTATS_IDS];
/* show border */
static char bdr_str[MAX_STRING_LEN];
-/**< Enable show port. */
+/* Enable show port. */
static uint32_t enable_shw_port;
/* Enable show port private info. */
static uint32_t enable_shw_port_priv;
-/**< Enable show tm. */
+/* Enable show tm. */
static uint32_t enable_shw_tm;
-/**< Enable show crypto. */
+/* Enable show crypto. */
static uint32_t enable_shw_crypto;
-/**< Enable show ring. */
+/* Enable show ring. */
static uint32_t enable_shw_ring;
static char *ring_name;
-/**< Enable show mempool. */
+/* Enable show mempool. */
static uint32_t enable_shw_mempool;
static char *mempool_name;
-/**< Enable iter mempool. */
+/* Enable iter mempool. */
static uint32_t enable_iter_mempool;
static char *mempool_iter_name;
-/**< Enable dump regs. */
+/* Enable dump regs. */
static uint32_t enable_dump_regs;
static char *dump_regs_file_prefix;
/* Enable show DPDK version. */
@@ -117,7 +117,7 @@ static uint32_t enable_shw_rss_reta;
/* Enable show module eeprom information. */
static uint32_t enable_shw_module_eeprom;
-/**< display usage */
+/* display usage */
static void
proc_info_usage(const char *prgname)
{
--
2.22.0
[PATCH v10 7/8] app/procinfo: support descriptor dump
This patch support Rx/Tx descriptor dump
The command is like:
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx --
--show-rx-descriptor queue_id:offset:num
dpdk-proc-info -a :xx:xx.x --file-prefix=xxx --
--show-tx-descriptor queue_id:offset:num
queue_id: A queue identifier on this port.
offset: The offset of the descriptor starting from tail.
num: The number of the descriptors to dump.
Signed-off-by: Min Hu (Connor)
Signed-off-by: Dongdong Liu
---
app/proc-info/main.c | 104 +++
1 file changed, 104 insertions(+)
diff --git a/app/proc-info/main.c b/app/proc-info/main.c
index fe8285d2ce..53e852a07c 100644
--- a/app/proc-info/main.c
+++ b/app/proc-info/main.c
@@ -117,6 +117,21 @@ static uint32_t enable_shw_rss_reta;
/* Enable show module eeprom information. */
static uint32_t enable_shw_module_eeprom;
+/* Enable dump Rx/Tx descriptor. */
+static uint32_t enable_shw_rx_desc_dump;
+static uint32_t enable_shw_tx_desc_dump;
+
+#define DESC_PARAM_NUM 3
+
+struct desc_param {
+ uint16_t queue_id; /* A queue identifier on this port. */
+ uint16_t offset; /* The offset of the descriptor starting from tail.
*/
+ uint16_t num; /* The number of the descriptors to dump. */
+};
+
+static struct desc_param rx_desc_param;
+static struct desc_param tx_desc_param;
+
/* display usage */
static void
proc_info_usage(const char *prgname)
@@ -148,6 +163,14 @@ proc_info_usage(const char *prgname)
" --firmware-version: to display ethdev firmware version\n"
" --show-rss-reta: to display ports redirection table\n"
" --show-module-eeprom: to display ports module eeprom
information\n"
+ " --show-rx-descriptor queue_id:offset:num to display ports Rx
descriptor information. "
+ "queue_id: A Rx queue identifier on this port. "
+ "offset: The offset of the descriptor starting from
tail. "
+ "num: The number of the descriptors to dump.\n"
+ " --show-tx-descriptor queue_id:offset:num to display ports Tx
descriptor information. "
+ "queue_id: A Tx queue identifier on this port. "
+ "offset: The offset of the descriptor starting from
tail. "
+ "num: The number of the descriptors to dump.\n"
" --iter-mempool=name: iterate mempool elements to display
content\n"
" --dump-regs=file-prefix: dump registers to file with the
file-prefix\n",
prgname);
@@ -200,6 +223,19 @@ parse_xstats_ids(char *list, uint64_t *ids, int limit) {
return length;
}
+static int
+parse_descriptor_param(char *list, struct desc_param *desc)
+{
+ int ret;
+
+ ret = sscanf(list, "%hu:%hu:%hu", &desc->queue_id, &desc->offset,
+&desc->num);
+ if (ret != DESC_PARAM_NUM)
+ return -EINVAL;
+
+ return 0;
+}
+
static int
proc_info_preparse_args(int argc, char **argv)
{
@@ -264,6 +300,8 @@ proc_info_parse_args(int argc, char **argv)
{"firmware-version", 0, NULL, 0},
{"show-rss-reta", 0, NULL, 0},
{"show-module-eeprom", 0, NULL, 0},
+ {"show-rx-descriptor", required_argument, NULL, 1},
+ {"show-tx-descriptor", required_argument, NULL, 1},
{NULL, 0, 0, 0}
};
@@ -367,6 +405,26 @@ proc_info_parse_args(int argc, char **argv)
return -1;
}
nb_xstats_ids = ret;
+ } else if (!strncmp(long_option[option_index].name,
+ "show-rx-descriptor", MAX_LONG_OPT_SZ)) {
+ int ret = parse_descriptor_param(optarg,
+ &rx_desc_param);
+ if (ret < 0) {
+ fprintf(stderr, "Error parsing Rx
descriptor param: %s\n",
+ strerror(-ret));
+ return -1;
+ }
+ enable_shw_rx_desc_dump = 1;
+ } else if (!strncmp(long_option[option_index].name,
+ "show-tx-descriptor", MAX_LONG_OPT_SZ)) {
+ int ret = parse_descriptor_param(optarg,
+ &tx_desc_param);
+ if (ret < 0) {
+ fprintf(stderr, "Error parsing Tx
descriptor param: %s\n",
+ strerror(-ret));
+ return -1;
+ }
+ enable_shw_tx_desc_dump = 1;
}
[PATCH v10 8/8] doc: add some extended features in procinfo guide
Add the below extended features in procinfo guide. --show-port-private --version --firmware-version --show-rss-reta --show-module-eeprom --show-rx-descriptor --show-tx-descriptor Signed-off-by: Dongdong Liu Acked-by: Reshma Pattan --- doc/guides/tools/proc_info.rst | 36 -- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/doc/guides/tools/proc_info.rst b/doc/guides/tools/proc_info.rst index 9772d97ef0..ad70bc47a5 100644 --- a/doc/guides/tools/proc_info.rst +++ b/doc/guides/tools/proc_info.rst @@ -17,9 +17,12 @@ The application has a number of command line options: .. code-block:: console - .//app/dpdk-procinfo -- -m | [-p PORTMASK] [--stats | --xstats | + .//app/dpdk-proc-info -- -m | [-p PORTMASK] [--stats | --xstats | --stats-reset | --xstats-reset] [ --show-port | --show-tm | --show-crypto | - --show-ring[=name] | --show-mempool[=name] | --iter-mempool=name ] + --show-ring[=name] | --show-mempool[=name] | --iter-mempool=name | + --show-port-private | --version | --firmware-version | --show-rss-reta | + --show-module-eeprom | --show-rx-descriptor queue_id:offset:num | + --show-tx-descriptor queue_id:offset:num] Parameters ~~ @@ -69,6 +72,35 @@ mempool. For invalid or no mempool name, whole list is dump. The iter-mempool parameter iterates and displays mempool elements specified by name. For invalid or no mempool name no elements are displayed. +**--show-port-private** +The show-port-private parameter displays ports private information. + +**--version** +The version parameter displays DPDK version. + +**--firmware-version** +The firmware-version parameter displays ethdev firmware version. + +**--show-rss-reta** +The show-rss-reta parameter displays ports rss redirection table. + +**--show-module-eeprom** +The show-module-eeprom parameter displays ports module eeprom information. + +**--show-rx-descriptor queue_id:offset:num** +The show-rx-descriptor parameter displays ports Rx descriptor information +specified by queue_id, offset and num. +queue_id: A Rx queue identifier on this port. +offset: The offset of the descriptor starting from tail. +num: The number of the descriptors to dump. + +**--show-tx-descriptor queue_id:offset:num** +The show-tx-descriptor parameter displays ports Tx descriptor information +specified by queue_id, offset and num. +queue_id: A Tx queue identifier on this port. +offset: The offset of the descriptor starting from tail. +num: The number of the descriptors to dump. + Limitations --- -- 2.22.0
Re: CRC offload from application's POV
On 10/11/2022 11:48 AM, Viacheslav Galaktionov wrote: Hi! We're looking to implement CRC offload in our driver and we're having difficulties understanding what the feature changes from the application's point of view. If we enable the KEEP_CRC offload, then the NIC is supposed to preserve the CRC in the packet, that much is clear. But we checked other drivers and it seems common for PMDs to remove the CRC from the final mbufs. Why is that? We couldn't find any place where the CRC would be stored after removal, so it looks like the application doesn't have access to this piece of data. And if so, what's the point of having this feature if the CRC is discarded either way? We're probably missing something and would really appreciate any help with this. Hi Viacheslav, As you said default behavior is to strip the CRC from packet, even some devices doesn't support having CRC in the packet it is removed by HW automatically. In this case application can't access to the CRC. For the devices that has capability to keep CRC, KEEP_CRC offload should enable having CRC as part of the packet. There is no special field to store the CRC.
RE: [PATCH v2 0/4] crypto/ccp cleanup
[Public] -Original Message- From: David Marchand Sent: Tuesday, October 4, 2022 3:21 PM To: dev@dpdk.org Cc: gak...@marvell.com; Uttarwar, Sunil Prakashrao Subject: [PATCH v2 0/4] crypto/ccp cleanup For this series Below shared patches seems fine, verified on AMD platform works fine. crypto/ccp: fix IOVA handling crypto/ccp: remove some dead code for UIO crypto/ccp: remove some printf Now working on the "crypto/ccp: fix PCI probing" patch and will update on this. Thanks Sunil
Re: CRC offload from application's POV
On 10/11/22 15:36, Ferruh Yigit wrote: On 10/11/2022 11:48 AM, Viacheslav Galaktionov wrote: Hi! We're looking to implement CRC offload in our driver and we're having difficulties understanding what the feature changes from the application's point of view. If we enable the KEEP_CRC offload, then the NIC is supposed to preserve the CRC in the packet, that much is clear. But we checked other drivers and it seems common for PMDs to remove the CRC from the final mbufs. Why is that? We couldn't find any place where the CRC would be stored after removal, so it looks like the application doesn't have access to this piece of data. And if so, what's the point of having this feature if the CRC is discarded either way? We're probably missing something and would really appreciate any help with this. Hi Viacheslav, As you said default behavior is to strip the CRC from packet, even some devices doesn't support having CRC in the packet it is removed by HW automatically. In this case application can't access to the CRC. For the devices that has capability to keep CRC, KEEP_CRC offload should enable having CRC as part of the packet. There is no special field to store the CRC. I'm asking because I'm seeing a common pattern in the code base: if the hardware didn't remove the CRC, the driver does this itself. Grepping the code for "crc_len" will show you what I mean. One of the most apparent examples of this happening can be seen in drivers/net/e1000/em_rxtx.c: /* * This is the last buffer of the received packet. * If the CRC is not stripped by the hardware: * - Subtract the CRC length from the total packet length. * - If the last buffer only contains the whole CRC or a part * of it, free the mbuf associated to the last buffer. * If part of the CRC is also contained in the previous * mbuf, subtract the length of that CRC part from the * data length of the previous mbuf. */ I don't understand why this is necessary, and whether this is just a particularity of this driver or how the feature is supposed to be implemented everywhere. I haven't checked every driver, but it seems like a lot of them do something similar to this.
Re: [PATCH] vhost: use try_lock in rte_vhost_vring_call
Hi Changpeng,
On 9/21/22 11:52, Liu, Changpeng wrote:
-Original Message-
From: Maxime Coquelin
Sent: Wednesday, September 21, 2022 5:41 PM
To: Liu, Changpeng ; dev@dpdk.org
Cc: Xia, Chenbo
Subject: Re: [PATCH] vhost: use try_lock in rte_vhost_vring_call
On 9/20/22 10:43, Liu, Changpeng wrote:
-Original Message-
From: Maxime Coquelin
Sent: Tuesday, September 20, 2022 4:13 PM
To: Liu, Changpeng ; dev@dpdk.org
Cc: Xia, Chenbo
Subject: Re: [PATCH] vhost: use try_lock in rte_vhost_vring_call
On 9/20/22 09:45, Liu, Changpeng wrote:
-Original Message-
From: Maxime Coquelin
Sent: Tuesday, September 20, 2022 3:35 PM
To: Liu, Changpeng ; dev@dpdk.org
Cc: Xia, Chenbo
Subject: Re: [PATCH] vhost: use try_lock in rte_vhost_vring_call
On 9/20/22 09:29, Liu, Changpeng wrote:
Hi Maxime,
-Original Message-
From: Maxime Coquelin
Sent: Tuesday, September 20, 2022 3:19 PM
To: Liu, Changpeng ; dev@dpdk.org
Cc: Xia, Chenbo
Subject: Re: [PATCH] vhost: use try_lock in rte_vhost_vring_call
On 9/6/22 04:22, Changpeng Liu wrote:
Note that this function is in data path, so the thread context
may not same as socket messages processing context, by using
try_lock here, users can have another try in case of VQ's access
lock is held by `vhost-events` thread.
Signed-off-by: Changpeng Liu
---
lib/vhost/vhost.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
index 60cb05a0ff..072d2acb7b 100644
--- a/lib/vhost/vhost.c
+++ b/lib/vhost/vhost.c
@@ -1329,7 +1329,11 @@ rte_vhost_vring_call(int vid, uint16_t
vring_idx)
if (!vq)
return -1;
- rte_spinlock_lock(&vq->access_lock);
+ if (!rte_spinlock_trylock(&vq->access_lock)) {
+ VHOST_LOG_CONFIG(dev->ifname, DEBUG,
+ "failed to kick guest, virtqueue busy.\n");
+ return -1;
+ }
if (vq_is_packed(dev))
vhost_vring_call_packed(dev, vq);
I think that's problematic, because it will break other applications
that currently rely on the API to block until the call is done.
Just some internal DPDK usage of this API:
./drivers/vdpa/ifc/ifcvf_vdpa.c:871:rte_vhost_vring_call(internal->vid,
qid);
./examples/vhost/virtio_net.c:236: rte_vhost_vring_call(dev->vid,
queue_id);
./examples/vhost/virtio_net.c:446: rte_vhost_vring_call(dev->vid,
queue_id);
./examples/vhost_blk/vhost_blk.c:99:
rte_vhost_vring_call(task->ctrlr->vid, vq->id);
./examples/vhost_blk/vhost_blk.c:134:
rte_vhost_vring_call(task->ctrlr->vid, vq->id);
This change will break all the above uses.
And that's not counting external projects.
ou should better introduce a new API that does not block.
Could you add a new API to do this?
>
I think we can use the new API in SPDK as a workaround, note that SPDK
project
is blocked for
a while which can't be used with DPDK 22.05 or newer.
DPDK v22.05?
What is the commit introducing the regression?
Here is the commit introducing this issue
c5736998305d ("vhost: fix missing virtqueue lock protection")
Bugzilla ID: 1015
Ok, it cannot be reverted, as it prevents some undefined
behaviors/crashes.
Note that if we introduce a new API, it won't be backported to stable
branches.
I understand, but do we have better idea in short time? we're planning
to release SPDK 22.09 recently.
You can have another thread that sends the call?
We already use two threads to do this. Here is the example for existing code in
SPDK:
DPDK vhost-events threadSPDK thread
SET_VRING_KICK VQ1 >Start polling VQ1
Reply to DPDK< Done
SET_VRING_KICK VQ2 >thread is blocked on VQ's
access lock,
SPDK thread can't provide reply message
For example, we can just return for SET_VRING_KICK VQ2 message without
checking SPDK thread, but this leave
uncertain replies to VM.
I'm sorry but you will have to find a workaround while v22.11 is out and
you can consume it. We can neither backport new API nor we can break all
the other applications not handling locking failure.
By processing vhost-user message in asynchronous way in SPDK can be a
workaround now, we can backport the workaround to SPDK earlier version
so that it can work with distro DPDK releases.
Regarding the new API for v22.11, I should be named something like
rte_vhost_vring_call_nonblock(), and ideally should return some like
-EAGAIN instead of -1 o that the applications can distinguish between a
real failure and a need for retry.
Agreed, then we can switch to the new API finally.
Just a reminder that -rc2 is in ~ two weeks, have you prepared the patch
adding the new API?
Regards,
Maxime
Regards,
Maxime
Vhost-blk and scsi devices are not same with vhost-net, we need to cover
SeaBIOS and VM
cases, so we need to start processing vrings after 1 vring i
Re: [PATCH v2 1/2] build: make version file optional for drivers
On Tue, Oct 11, 2022 at 02:08:49PM +0300, Abdullah Ömer Yamaç wrote:
> In this patch, we removed the necessity of the version files and
> you don't need to update these files for each release, you can just
> remove them.
>
> Signed-off-by: Abdullah Ömer Yamaç
> Suggested-by: Ferruh Yigit
>
> ---
> Depends on: patch-116222 ("build: increase minimum meson version to 0.53")
This patch is merged now, so you no longer need to call it out as
dependency.
Series-acked-by: Bruce Richardson
[PATCH 01/13] common/cnxk: set MTU size on SDP based on SoC type
From: Sathesh Edara
Set maximum frame size on SDP NIX side to 16KB for T93 A0-B0,
F95N A0 and F95O A0 SOC type. Rest of the SoCs SDP NIX to 64KB.
Signed-off-by: Sathesh Edara
---
drivers/common/cnxk/hw/nix.h | 1 +
drivers/common/cnxk/roc_errata.h | 8
drivers/common/cnxk/roc_model.h | 12
drivers/common/cnxk/roc_nix.c| 5 -
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index a5352644ca..425c335bf3 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -2118,6 +2118,7 @@ struct nix_lso_format {
#define NIX_CN9K_MAX_HW_FRS 9212UL
#define NIX_LBK_MAX_HW_FRS 65535UL
#define NIX_SDP_MAX_HW_FRS 65535UL
+#define NIX_SDP_16K_HW_FRS 16380UL
#define NIX_RPM_MAX_HW_FRS 16380UL
#define NIX_MIN_HW_FRS 60UL
diff --git a/drivers/common/cnxk/roc_errata.h b/drivers/common/cnxk/roc_errata.h
index d3b32f1786..a39796e894 100644
--- a/drivers/common/cnxk/roc_errata.h
+++ b/drivers/common/cnxk/roc_errata.h
@@ -90,4 +90,12 @@ roc_errata_nix_no_meta_aura(void)
return roc_model_is_cn10ka_a0();
}
+/* Errata IPBUNIXTX-35039 */
+static inline bool
+roc_errata_nix_sdp_send_has_mtu_size_16k(void)
+{
+ return (roc_model_is_cnf95xxn_a0() || roc_model_is_cnf95xxo_a0() ||
+ roc_model_is_cn96_a0() || roc_model_is_cn96_b0());
+}
+
#endif /* _ROC_ERRATA_H_ */
diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h
index 57a8af06fc..1985dd771d 100644
--- a/drivers/common/cnxk/roc_model.h
+++ b/drivers/common/cnxk/roc_model.h
@@ -140,6 +140,12 @@ roc_model_is_cn96_ax(void)
return (roc_model->flag & ROC_MODEL_CN96xx_Ax);
}
+static inline uint64_t
+roc_model_is_cn96_b0(void)
+{
+ return (roc_model->flag & ROC_MODEL_CN96xx_B0);
+}
+
static inline uint64_t
roc_model_is_cn96_cx(void)
{
@@ -170,6 +176,12 @@ roc_model_is_cnf95xxn_b0(void)
return roc_model->flag & ROC_MODEL_CNF95xxN_B0;
}
+static inline uint64_t
+roc_model_is_cnf95xxo_a0(void)
+{
+ return roc_model->flag & ROC_MODEL_CNF95xxO_A0;
+}
+
static inline uint16_t
roc_model_is_cn95xxn_a0(void)
{
diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c
index 4bb306b60e..8fd8ec8461 100644
--- a/drivers/common/cnxk/roc_nix.c
+++ b/drivers/common/cnxk/roc_nix.c
@@ -127,8 +127,11 @@ roc_nix_max_pkt_len(struct roc_nix *roc_nix)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
- if (roc_nix_is_sdp(roc_nix))
+ if (roc_nix_is_sdp(roc_nix)) {
+ if (roc_errata_nix_sdp_send_has_mtu_size_16k())
+ return NIX_SDP_16K_HW_FRS;
return NIX_SDP_MAX_HW_FRS;
+ }
if (roc_model_is_cn9k())
return NIX_CN9K_MAX_HW_FRS;
--
2.25.1
[PATCH 03/13] net/cnxk: fix later skip to include mbuf priv
Fix later skip to include mbuf priv data as mbuf->buf_addr
is populated based on calculation including per-mbuf priv area.
Fixes: 706eeae60757 ("net/cnxk: add multi-segment Rx for CN10K")
cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_rx.h| 4 +++-
drivers/net/cnxk/cnxk_ethdev.c | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index 46488d442e..cf390a0361 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -682,6 +682,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct
rte_mbuf *mbuf,
uint64_t rearm, const uint16_t flags)
{
const rte_iova_t *iova_list;
+ uint16_t later_skip = 0;
struct rte_mbuf *head;
const rte_iova_t *eol;
uint8_t nb_segs;
@@ -720,10 +721,11 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx,
struct rte_mbuf *mbuf,
nb_segs--;
rearm = rearm & ~0x;
+ later_skip = (uintptr_t)mbuf->buf_addr - (uintptr_t)mbuf;
head = mbuf;
while (nb_segs) {
- mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
+ mbuf->next = (struct rte_mbuf *)(*iova_list - later_skip);
mbuf = mbuf->next;
RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 2cb48ba152..8fe996b2d9 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -620,7 +620,7 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev,
uint16_t qid,
first_skip += RTE_PKTMBUF_HEADROOM;
first_skip += rte_pktmbuf_priv_size(mp);
rq->first_skip = first_skip;
- rq->later_skip = sizeof(struct rte_mbuf);
+ rq->later_skip = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mp);
rq->lpb_size = mp->elt_size;
if (roc_errata_nix_no_meta_aura())
rq->lpb_drop_ena = !(dev->rx_offloads &
RTE_ETH_RX_OFFLOAD_SECURITY);
--
2.25.1
[PATCH 04/13] net/cnxk: add use nixtx offset for cn10kb
In outbound inline case, use NIX Tx offset instead of
NIX Tx address for CN103XX as per new instruction format.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_constants.h | 1 +
drivers/event/cnxk/cn10k_worker.h | 3 +++
drivers/net/cnxk/cn10k_ethdev.c | 6 ++
drivers/net/cnxk/cn10k_ethdev.h | 3 ++-
drivers/net/cnxk/cn10k_ethdev_sec.c | 2 ++
drivers/net/cnxk/cn10k_tx.h | 4 ++--
6 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_constants.h
b/drivers/common/cnxk/roc_constants.h
index c693dde62e..0495965daa 100644
--- a/drivers/common/cnxk/roc_constants.h
+++ b/drivers/common/cnxk/roc_constants.h
@@ -12,6 +12,7 @@
/* [CN10K, .) */
#define ROC_LMT_LINE_SZ128
#define ROC_NUM_LMT_LINES 2048
+#define ROC_LMT_LINES_PER_STR_LOG2 4
#define ROC_LMT_LINES_PER_CORE_LOG2 5
#define ROC_LMT_LINE_SIZE_LOG2 7
#define ROC_LMT_BASE_PER_CORE_LOG2
\
diff --git a/drivers/event/cnxk/cn10k_worker.h
b/drivers/event/cnxk/cn10k_worker.h
index 7a82dd352a..75a2ff244a 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -595,6 +595,9 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf
*m, uint64_t *cmd,
ws->gw_rdata = roc_sso_hws_head_wait(ws->base);
cn10k_sso_txq_fc_wait(txq);
+ if (flags & NIX_TX_OFFLOAD_SECURITY_F && sec)
+ cn10k_nix_sec_fc_wait_one(txq);
+
roc_lmt_submit_steorl(lmt_id, pa);
if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index e8faeebe1f..cf1d9b164d 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -538,6 +538,9 @@ cn10k_nix_reassembly_capability_get(struct rte_eth_dev
*eth_dev,
int rc = -ENOTSUP;
RTE_SET_USED(eth_dev);
+ if (!roc_nix_has_reass_support(&dev->nix))
+ return -ENOTSUP;
+
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
reassembly_capa->timeout_ms = 60 * 1000;
reassembly_capa->max_frags = 4;
@@ -565,6 +568,9 @@ cn10k_nix_reassembly_conf_set(struct rte_eth_dev *eth_dev,
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
int rc = 0;
+ if (!roc_nix_has_reass_support(&dev->nix))
+ return -ENOTSUP;
+
if (!conf->flags) {
/* Clear offload flags on disable */
dev->rx_offload_flags &= ~NIX_RX_REAS_F;
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index d0a5b136e3..948c8348ad 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -75,7 +75,8 @@ struct cn10k_sec_sess_priv {
uint16_t partial_len : 10;
uint16_t chksum : 2;
uint16_t dec_ttl : 1;
- uint16_t rsvd : 3;
+ uint16_t nixtx_off : 1;
+ uint16_t rsvd : 2;
};
uint64_t u64;
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 6de4a284da..3ca707f038 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -798,6 +798,8 @@ cn10k_eth_sec_session_create(void *device,
sess_priv.chksum = (!ipsec->options.ip_csum_enable << 1 |
!ipsec->options.l4_csum_enable);
sess_priv.dec_ttl = ipsec->options.dec_ttl;
+ if (roc_model_is_cn10kb_a0())
+ sess_priv.nixtx_off = 1;
/* Pointer from eth_sec -> outb_sa */
eth_sec->sa = outb_sa;
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 492942de15..527b65022f 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -397,7 +397,7 @@ cn10k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t
*cmd0, uint64x2_t *cmd1,
/* DLEN passed is excluding L2 HDR */
pkt_len -= l2_len;
}
- w0 |= nixtx;
+ w0 |= sess_priv.nixtx_off ? int64_t)nixtx - (int64_t)dptr) &
0xF) << 32) : nixtx;
/* CPT word 0 and 1 */
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
@@ -539,7 +539,7 @@ cn10k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd,
uintptr_t *nixtx_addr,
sg->seg1_size = pkt_len + dlen_adj;
pkt_len -= l2_len;
}
- w0 |= nixtx;
+ w0 |= sess_priv.nixtx_off ? int64_t)nixtx - (int64_t)dptr) &
0xF) << 32) : nixtx;
/* CPT word 0 and 1 */
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
--
2.25.1
[PATCH 05/13] common/cnxk: fix RQ mask config for cn10kb chip
RQ mask config needs to enable SPB_ENA in order for Zero for
being able to override it with Meta aura.
Also fix flow control config to catch invalid rxchan config
errors.
Fixes: ddf955d3917e ("common/cnxk: support CPT second pass")
Fixes: da57d4589a6f ("common/cnxk: support NIX flow control")
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_fc.c | 4 ++-
drivers/common/cnxk/roc_nix_inl.c | 43 +--
2 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index f4cfa11c0f..033e17a4bf 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -52,8 +52,10 @@ nix_fc_rxchan_bpid_set(struct roc_nix *roc_nix, bool enable)
req->bpid_per_chan = true;
rc = mbox_process_msg(mbox, (void *)&rsp);
- if (rc || (req->chan_cnt != rsp->chan_cnt))
+ if (rc || (req->chan_cnt != rsp->chan_cnt)) {
+ rc = -EIO;
goto exit;
+ }
nix->chan_cnt = rsp->chan_cnt;
for (i = 0; i < rsp->chan_cnt; i++)
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index 213d71e684..0da097c9e9 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -454,27 +454,29 @@ nix_inl_rq_mask_cfg(struct roc_nix *roc_nix, bool enable)
msk_req->rq_set.lpb_drop_ena = 0;
msk_req->rq_set.spb_drop_ena = 0;
msk_req->rq_set.xqe_drop_ena = 0;
+ msk_req->rq_set.spb_ena = 1;
- msk_req->rq_mask.len_ol3_dis = ~(msk_req->rq_set.len_ol3_dis);
- msk_req->rq_mask.len_ol4_dis = ~(msk_req->rq_set.len_ol4_dis);
- msk_req->rq_mask.len_il3_dis = ~(msk_req->rq_set.len_il3_dis);
+ msk_req->rq_mask.len_ol3_dis = 0;
+ msk_req->rq_mask.len_ol4_dis = 0;
+ msk_req->rq_mask.len_il3_dis = 0;
- msk_req->rq_mask.len_il4_dis = ~(msk_req->rq_set.len_il4_dis);
- msk_req->rq_mask.csum_ol4_dis = ~(msk_req->rq_set.csum_ol4_dis);
- msk_req->rq_mask.csum_il4_dis = ~(msk_req->rq_set.csum_il4_dis);
+ msk_req->rq_mask.len_il4_dis = 0;
+ msk_req->rq_mask.csum_ol4_dis = 0;
+ msk_req->rq_mask.csum_il4_dis = 0;
- msk_req->rq_mask.lenerr_dis = ~(msk_req->rq_set.lenerr_dis);
- msk_req->rq_mask.port_ol4_dis = ~(msk_req->rq_set.port_ol4_dis);
- msk_req->rq_mask.port_il4_dis = ~(msk_req->rq_set.port_il4_dis);
+ msk_req->rq_mask.lenerr_dis = 0;
+ msk_req->rq_mask.port_ol4_dis = 0;
+ msk_req->rq_mask.port_il4_dis = 0;
- msk_req->rq_mask.lpb_drop_ena = ~(msk_req->rq_set.lpb_drop_ena);
- msk_req->rq_mask.spb_drop_ena = ~(msk_req->rq_set.spb_drop_ena);
- msk_req->rq_mask.xqe_drop_ena = ~(msk_req->rq_set.xqe_drop_ena);
+ msk_req->rq_mask.lpb_drop_ena = 0;
+ msk_req->rq_mask.spb_drop_ena = 0;
+ msk_req->rq_mask.xqe_drop_ena = 0;
+ msk_req->rq_mask.spb_ena = 0;
aura_handle = roc_npa_zero_aura_handle();
msk_req->ipsec_cfg1.spb_cpt_aura =
roc_npa_aura_handle_to_aura(aura_handle);
msk_req->ipsec_cfg1.rq_mask_enable = enable;
- msk_req->ipsec_cfg1.spb_cpt_sizem1 = inl_cfg->buf_sz;
+ msk_req->ipsec_cfg1.spb_cpt_sizem1 = (inl_cfg->buf_sz >> 7) - 1;
msk_req->ipsec_cfg1.spb_cpt_enable = enable;
return mbox_process(mbox);
@@ -544,13 +546,6 @@ roc_nix_inl_inb_init(struct roc_nix *roc_nix)
idev->inl_cfg.refs++;
}
- if (roc_model_is_cn10kb_a0()) {
- rc = nix_inl_rq_mask_cfg(roc_nix, true);
- if (rc) {
- plt_err("Failed to get rq mask rc=%d", rc);
- return rc;
- }
- }
nix->inl_inb_ena = true;
return 0;
}
@@ -1043,6 +1038,14 @@ roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool
enable)
if (!idev)
return -EFAULT;
+ if (roc_model_is_cn10kb_a0()) {
+ rc = nix_inl_rq_mask_cfg(roc_nix, true);
+ if (rc) {
+ plt_err("Failed to get rq mask rc=%d", rc);
+ return rc;
+ }
+ }
+
if (nix->inb_inl_dev) {
if (!inl_rq || !idev->nix_inl_dev)
return -EFAULT;
--
2.25.1
[PATCH 06/13] common/cnxk: fix schedule weight update
From: Satha Rao
Each TX schedule config mail box supports maximum 20 register updates.
This patch will send node weight updates in multiple mailbox when
TM created with more than 20 scheduler nodes.
Fixes: 464c9f919321 ("common/cnxk: support NIX TM dynamic update")
Cc: ndabilpu...@marvell.com
Signed-off-by: Satha Rao
---
drivers/common/cnxk/roc_nix_queue.c | 2 +-
drivers/common/cnxk/roc_nix_tm_ops.c | 60 ++--
2 files changed, 41 insertions(+), 21 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_queue.c
b/drivers/common/cnxk/roc_nix_queue.c
index 405d9a8274..7f001efbb0 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -810,7 +810,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct
roc_nix_sq *sq)
nb_sqb_bufs += NIX_SQB_LIST_SPACE;
/* Clamp up the SQB count */
nb_sqb_bufs = PLT_MIN(roc_nix->max_sqb_count,
- PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));
+ (uint16_t)PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));
sq->nb_sqb_bufs = nb_sqb_bufs;
sq->sqes_per_sqb_log2 = (uint16_t)plt_log2_u32(sqes_per_sqb);
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c
b/drivers/common/cnxk/roc_nix_tm_ops.c
index 7036495ad8..4bf7b1e104 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -891,19 +891,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix,
uint32_t node_id,
TAILQ_FOREACH(sibling, list, node) {
if (sibling->parent != node->parent)
continue;
- k += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k],
-&req->regval[k]);
+ k += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k],
&req->regval[k]);
+ if (k >= MAX_REGS_PER_MBOX_MSG) {
+ req->num_regs = k;
+ rc = mbox_process(mbox);
+ if (rc)
+ return rc;
+ k = 0;
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->lvl = node->hw_lvl;
+ }
+ }
+
+ if (k) {
+ req->num_regs = k;
+ rc = mbox_process(mbox);
+ if (rc)
+ return rc;
+ /* Update new weight for current node */
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
}
- req->num_regs = k;
- rc = mbox_process(mbox);
- if (rc)
- return rc;
- /* Update new weight for current node */
- req = mbox_alloc_msg_nix_txschq_cfg(mbox);
req->lvl = node->hw_lvl;
- req->num_regs =
- nix_tm_sched_reg_prep(nix, node, req->reg, req->regval);
+ req->num_regs = nix_tm_sched_reg_prep(nix, node, req->reg,
req->regval);
rc = mbox_process(mbox);
if (rc)
return rc;
@@ -916,19 +926,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix,
uint32_t node_id,
TAILQ_FOREACH(sibling, list, node) {
if (sibling->parent != node->parent)
continue;
- k += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k],
-&req->regval[k]);
+ k += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k],
&req->regval[k]);
+ if (k >= MAX_REGS_PER_MBOX_MSG) {
+ req->num_regs = k;
+ rc = mbox_process(mbox);
+ if (rc)
+ return rc;
+ k = 0;
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->lvl = node->hw_lvl;
+ }
+ }
+
+ if (k) {
+ req->num_regs = k;
+ rc = mbox_process(mbox);
+ if (rc)
+ return rc;
+ /* XON Parent node */
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
}
- req->num_regs = k;
- rc = mbox_process(mbox);
- if (rc)
- return rc;
- /* XON Parent node */
- req = mbox_alloc_msg_nix_txschq_cfg(mbox);
req->lvl = node->parent->hw_lvl;
- req->num_regs = nix_tm_sw_xoff_prep(node->parent, false,
-
[PATCH 07/13] common/cnxk: sync NIX HW info mbox structure with kernel
From: Satha Rao
Sync nix_hw_info structure with kernel.
Maintain default RR_QUANTUM for VF TL2 same as kernel to make
equal distribution among all VFs.
Signed-off-by: Satha Rao
---
drivers/common/cnxk/roc_mbox.h | 8 +-
drivers/common/cnxk/roc_nix.c | 9 ++-
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_tm.c | 10
drivers/common/cnxk/roc_nix_tm_utils.c | 34 +-
5 files changed, 49 insertions(+), 13 deletions(-)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index a47e6a8f3b..e8d4ae283d 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1215,7 +1215,13 @@ struct nix_inline_ipsec_lf_cfg {
struct nix_hw_info {
struct mbox_msghdr hdr;
uint16_t __io vwqe_delay;
- uint16_t __io rsvd[15];
+ uint16_t __io max_mtu;
+ uint16_t __io min_mtu;
+ uint32_t __io rpm_dwrr_mtu;
+ uint32_t __io sdp_dwrr_mtu;
+ uint32_t __io lbk_dwrr_mtu;
+ uint32_t __io rsvd32[1];
+ uint64_t __io rsvd[15]; /* Add reserved fields for future expansion */
};
struct nix_bandprof_alloc_req {
diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c
index 8fd8ec8461..2a320cc291 100644
--- a/drivers/common/cnxk/roc_nix.c
+++ b/drivers/common/cnxk/roc_nix.c
@@ -303,8 +303,15 @@ roc_nix_get_hw_info(struct roc_nix *roc_nix)
mbox_alloc_msg_nix_get_hw_info(mbox);
rc = mbox_process_msg(mbox, (void *)&hw_info);
- if (rc == 0)
+ if (rc == 0) {
nix->vwqe_interval = hw_info->vwqe_delay;
+ if (nix->lbk_link)
+ roc_nix->dwrr_mtu = hw_info->lbk_dwrr_mtu;
+ else if (nix->sdp_link)
+ roc_nix->dwrr_mtu = hw_info->sdp_dwrr_mtu;
+ else
+ roc_nix->dwrr_mtu = hw_info->rpm_dwrr_mtu;
+ }
return rc;
}
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 5c2a869eba..1eb1c9af55 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -422,6 +422,7 @@ struct roc_nix {
uint32_t ipsec_in_min_spi;
uint32_t ipsec_in_max_spi;
uint32_t ipsec_out_max_sa;
+ uint32_t dwrr_mtu;
bool ipsec_out_sso_pffunc;
bool custom_sa_action;
/* End of input parameters */
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 81fa6b1d93..86918990a2 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -256,10 +256,6 @@ nix_tm_node_add(struct roc_nix *roc_nix, struct
nix_tm_node *node)
if (node->weight > roc_nix_tm_max_sched_wt_get())
return NIX_ERR_TM_WEIGHT_EXCEED;
- /* Maintain minimum weight */
- if (!node->weight)
- node->weight = 1;
-
node->hw_lvl = nix_tm_lvl2nix(nix, lvl);
node->rr_prio = 0xF;
node->max_prio = UINT32_MAX;
@@ -1358,7 +1354,11 @@ nix_tm_prepare_default_tree(struct roc_nix *roc_nix)
node->id = nonleaf_id;
node->parent_id = parent;
node->priority = 0;
- node->weight = NIX_TM_DFLT_RR_WT;
+ /* Default VF root RR_QUANTUM is in sync with kernel */
+ if (lvl == ROC_TM_LVL_ROOT && !nix_tm_have_tl1_access(nix))
+ node->weight = 0;
+ else
+ node->weight = NIX_TM_DFLT_RR_WT;
node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
node->lvl = lvl;
node->tree = ROC_NIX_TM_DEFAULT;
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c
b/drivers/common/cnxk/roc_nix_tm_utils.c
index 193f9df5ff..d33e793664 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -644,9 +644,25 @@ nix_tm_topology_reg_prep(struct nix *nix, struct
nix_tm_node *node,
return k;
}
+static inline int
+nix_tm_default_rr_weight(struct nix *nix)
+{
+ struct roc_nix *roc_nix = nix_priv_to_roc_nix(nix);
+ uint32_t max_pktlen = roc_nix_max_pkt_len(roc_nix);
+ uint32_t weight;
+
+ /* Reduce TX VTAG Insertions */
+ max_pktlen -= 8;
+ weight = max_pktlen / roc_nix->dwrr_mtu;
+ if (max_pktlen % roc_nix->dwrr_mtu)
+ weight += 1;
+
+ return weight;
+}
+
uint8_t
-nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node,
- volatile uint64_t *reg, volatile uint64_t *regval)
+nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node, volatile
uint64_t *reg,
+ volatile uint64_t *regval)
{
uint64_t strict_prio = node->priority;
uint32_t hw_lvl = node->hw_lvl;
@@ -654,8 +670,14 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node
*node,
uint64_t rr_quantum;
uint8_t k = 0;
[PATCH 08/13] common/cnxk: revert VF root weight
From: Satha Rao With kernel RR_QUANTUM some of the DPDK perf test (ipsec reassembly) was failing, so reverting this change. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_tm.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c index 86918990a2..be8da714cd 100644 --- a/drivers/common/cnxk/roc_nix_tm.c +++ b/drivers/common/cnxk/roc_nix_tm.c @@ -1354,11 +1354,7 @@ nix_tm_prepare_default_tree(struct roc_nix *roc_nix) node->id = nonleaf_id; node->parent_id = parent; node->priority = 0; - /* Default VF root RR_QUANTUM is in sync with kernel */ - if (lvl == ROC_TM_LVL_ROOT && !nix_tm_have_tl1_access(nix)) - node->weight = 0; - else - node->weight = NIX_TM_DFLT_RR_WT; + node->weight = NIX_TM_DFLT_RR_WT; node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE; node->lvl = lvl; node->tree = ROC_NIX_TM_DEFAULT; -- 2.25.1
[PATCH 09/13] common/cnxk: set hysteresis bit to one
From: Satha Rao Setting non zero FC_HYST_BITS to reduce mesh traffic on HW. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 7f001efbb0..040b9cc45b 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -834,7 +834,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) else aura.fc_stype = 0x3; /* STSTP */ aura.fc_addr = (uint64_t)sq->fc; - aura.fc_hyst_bits = 0; /* Store count on all updates */ + aura.fc_hyst_bits = 1; /* Store count on all updates */ rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, &pool, 0); if (rc) -- 2.25.1
[PATCH 11/13] common/cnxk: sync mailbox for channel and bpid map
From: Sunil Kumar Kori
As per recent change in Linux-5.4.x, mailbox is updated to configure
mapping between channel and BPID. Due to mbox mismatch, PFC was broken.
Patch syncs mailbox definition for the same. Also fixes the PFC
configuration issues.
Signed-off-by: Sunil Kumar Kori
---
drivers/common/cnxk/roc_mbox.h | 6 +++---
drivers/common/cnxk/roc_nix.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index e8d4ae283d..d47808e5ef 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1164,10 +1164,10 @@ struct nix_bp_cfg_req {
/* bpid_per_chan = 1 assigns separate bp id for each channel */
};
-/* PF can be mapped to either CGX or LBK interface,
- * so maximum 64 channels are possible.
+/* PF can be mapped to either CGX or LBK or SDP interface,
+ * so maximum 256 channels are possible.
*/
-#define NIX_MAX_CHAN64
+#define NIX_MAX_CHAN256
#define NIX_CGX_MAX_CHAN 16
#define NIX_LBK_MAX_CHAN 1
struct nix_bp_cfg_rsp {
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 1eb1c9af55..c50efefa80 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -432,7 +432,7 @@ struct roc_nix {
bool rx_ptp_ena;
uint16_t cints;
-#define ROC_NIX_MEM_SZ (6 * 1024)
+#define ROC_NIX_MEM_SZ (6 * 1056)
uint8_t reserved[ROC_NIX_MEM_SZ] __plt_cache_aligned;
} __plt_cache_aligned;
--
2.25.1
[PATCH 10/13] net/cnxk: handle SA soft packet and byte expiry events
From: Vamsi Attunuru Handle SA soft packet and byte expiry event for Inline outbound SA. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_ethdev_sec.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 3ca707f038..ce1b10d885 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -428,7 +428,12 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event) sa = (struct roc_ot_ipsec_outb_sa *)args; priv = roc_nix_inl_ot_ipsec_outb_sa_sw_rsvd(sa); desc.metadata = (uint64_t)priv->userdata; - desc.subtype = RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY; + if (sa->w2.s.life_unit == ROC_IE_OT_SA_LIFE_UNIT_PKTS) + desc.subtype = + RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY; + else + desc.subtype = + RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY; eth_dev = &rte_eth_devices[soft_exp_event >> 8]; rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc); -- 2.25.1
[PATCH 12/13] net/cnxk: remove unnecessary dptr update
Also remove ESN update from ucode command word 0 based on latest ucode. Signed-off-by: Nithin Dabilpuram Signed-off-by: Vidya Sagar Velumuri --- drivers/event/cnxk/cn9k_worker.h | 1 - drivers/net/cnxk/cn10k_tx.h | 4 2 files changed, 5 deletions(-) diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 881861f348..4c3932da47 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -718,7 +718,6 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base, esn = outb_priv->esn; outb_priv->esn = esn + 1; - ucode_cmd[0] |= (esn >> 32) << 16; esn_lo = rte_cpu_to_be_32(esn & (BIT_ULL(32) - 1)); esn_hi = rte_cpu_to_be_32(esn >> 32); diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index 527b65022f..5b13f02095 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -422,8 +422,6 @@ cn10k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1, CNXK_ETHDEV_SEC_OUTB_EV_SUB << 20), cmd23, 0); cmd23 = vsetq_lane_u64((uintptr_t)m | 1, cmd23, 1); - dptr += l2_len; - /* Move to our line */ laddr = LMT_OFF(lbase, *lnum, *loff ? 64 : 0); @@ -564,8 +562,6 @@ cn10k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr, CNXK_ETHDEV_SEC_OUTB_EV_SUB << 20), cmd23, 0); cmd23 = vsetq_lane_u64((uintptr_t)m | 1, cmd23, 1); - dptr += l2_len; - /* Move to our line */ laddr = LMT_OFF(lbase, *lnum, *loff ? 64 : 0); -- 2.25.1
[PATCH 13/13] net/cnxk: remove duplicate mempool debug checks
Remove duplicate mempool debug checks for mbufs received.
Fixes: 592642c494b1 ("net/cnxk: align prefetches to CN10K cache model")
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_rx.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index cf390a0361..4e22ceda02 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -1307,12 +1307,6 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf
**mbufs, uint16_t pkts,
ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
}
- /* Mark mempool obj as "get" as it is alloc'ed by NIX */
- RTE_MEMPOOL_CHECK_COOKIES(mbuf0->pool, (void **)&mbuf0, 1, 1);
- RTE_MEMPOOL_CHECK_COOKIES(mbuf1->pool, (void **)&mbuf1, 1, 1);
- RTE_MEMPOOL_CHECK_COOKIES(mbuf2->pool, (void **)&mbuf2, 1, 1);
- RTE_MEMPOOL_CHECK_COOKIES(mbuf3->pool, (void **)&mbuf3, 1, 1);
-
/* Translate meta to mbuf */
if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
uint64_t cq0_w5 = *CQE_PTR_OFF(cq0, 0, 40, flags);
--
2.25.1
[PATCH 02/13] common/cnxk: add devargs for soft expiry poll frequency
Add support to override soft expiry poll frequency via devargs.
Also provide helper API to indicate reassembly support on a chip
and documentation for devargs that are already present.
Signed-off-by: Nithin Dabilpuram
---
doc/guides/nics/cnxk.rst | 39 +++
drivers/common/cnxk/roc_nix_inl.c | 7 +
drivers/common/cnxk/roc_nix_inl.h | 3 ++-
drivers/common/cnxk/roc_nix_inl_dev.c | 4 +--
drivers/common/cnxk/version.map | 1 +
drivers/net/cnxk/cnxk_ethdev_sec.c| 17 +---
6 files changed, 65 insertions(+), 6 deletions(-)
diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index a1e3a4a965..7da6cb3967 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -494,6 +494,45 @@ Runtime Config Options for inline device
With the above configuration, application can enable inline IPsec processing
for inbound SA with max SPI of 128 for traffic aggregated on inline device.
+- ``Count of meta buffers for inline inbound IPsec second pass``
+
+ Number of meta buffers allocated for inline inbound IPsec second pass can
+ be specified by ``nb_meta_bufs`` ``devargs`` parameter. Default value is
+ computed runtime based on pkt mbuf pools created and in use. Number of meta
+ buffers should be at least equal to aggregated number of packet buffers of
all
+ packet mbuf pools in use by Inline IPsec enabled ethernet devices.
+
+ For example::
+
+ -a 0002:1d:00.0,nb_meta_bufs=1024
+
+ With the above configuration, PMD would enable inline IPsec processing
+ for inbound with 1024 meta buffers available for second pass.
+
+- ``Meta buffer size for inline inbound IPsec second pass``
+
+ Size of meta buffer allocated for inline inbound IPsec second pass can
+ be specified by ``meta_buf_sz`` ``devargs`` parameter. Default value is
+ computed runtime based on pkt mbuf pools created and in use.
+
+ For example::
+
+ -a 0002:1d:00.0,meta_buf_sz=512
+
+ With the above configuration, PMD would allocate meta buffers of size 512
for
+ inline inbound IPsec processing second pass.
+
+- ``Inline Outbound soft expiry poll frequency in usec`` (default ``100``)
+
+ Soft expiry poll frequency for Inline Outbound sessions can be specified by
+ ``soft_exp_poll_freq`` ``devargs`` parameter.
+
+ For example::
+
+ -a 0002:1d:00.0,soft_exp_poll_freq=1000
+
+ With the above configuration, driver would poll for soft expiry events every
+ 1000 usec.
Debugging Options
-
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index cdf31b1f0c..213d71e684 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -480,6 +480,13 @@ nix_inl_rq_mask_cfg(struct roc_nix *roc_nix, bool enable)
return mbox_process(mbox);
}
+bool
+roc_nix_has_reass_support(struct roc_nix *nix)
+{
+ PLT_SET_USED(nix);
+ return !!roc_model_is_cn10ka();
+}
+
int
roc_nix_inl_inb_init(struct roc_nix *roc_nix)
{
diff --git a/drivers/common/cnxk/roc_nix_inl.h
b/drivers/common/cnxk/roc_nix_inl.h
index 019cf6d28b..c537262819 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -183,7 +183,7 @@ struct roc_nix_inl_dev {
uint16_t wqe_skip;
uint8_t spb_drop_pc;
uint8_t lpb_drop_pc;
- bool set_soft_exp_poll;
+ uint32_t soft_exp_poll_freq; /* Polling disabled if 0 */
uint32_t nb_meta_bufs;
uint32_t meta_buf_sz;
/* End of input parameters */
@@ -229,6 +229,7 @@ int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix
*roc_nix, bool ts_ena,
bool inb_inl_dev);
int __roc_api roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool ena);
int __roc_api roc_nix_inl_meta_aura_check(struct roc_nix_rq *rq);
+bool __roc_api roc_nix_has_reass_support(struct roc_nix *nix);
/* NIX Inline Outbound API */
int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c
b/drivers/common/cnxk/roc_nix_inl_dev.c
index 4fe7b5180b..c3d94dd0da 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev.c
@@ -789,7 +789,6 @@ nix_inl_outb_poll_thread_setup(struct nix_inl_dev *inl_dev)
soft_exp_consumer_cnt = 0;
soft_exp_poll_thread_exit = false;
- inl_dev->soft_exp_poll_freq = 100;
rc = plt_ctrl_thread_create(&inl_dev->soft_exp_poll_thread,
"OUTB_SOFT_EXP_POLL_THREAD", NULL,
nix_inl_outb_poll_thread, inl_dev);
@@ -839,10 +838,11 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev)
inl_dev->wqe_skip = roc_inl_dev->wqe_skip;
inl_dev->spb_drop_pc = NIX_AURA_DROP_PC_DFLT;
inl_dev->lpb_drop_pc = NIX_AURA_DROP_PC_DFLT;
- inl_dev->set_soft_exp_poll = roc_inl_dev->set_soft_exp_poll;
+ inl_dev->set_soft_exp_pol
[PATCH v8 6/9] test/memarea: support dump test
This patch supports rte_memarea_dump() test.
Signed-off-by: Chengwen Feng
---
app/test/test_memarea.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/app/test/test_memarea.c b/app/test/test_memarea.c
index 5f7868f8f6..50b92db9b3 100644
--- a/app/test/test_memarea.c
+++ b/app/test/test_memarea.c
@@ -297,6 +297,38 @@ test_memarea_alloc_free(void)
return 0;
}
+static int
+test_memarea_dump(void)
+{
+ struct rte_memarea_param init;
+ struct rte_memarea *ma;
+ int ret;
+
+ /* prepare env */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+
+ /* test for invalid parameters */
+ ret = rte_memarea_dump(NULL, stderr, false);
+ RTE_TEST_ASSERT(ret == -EINVAL, "Expected EINVAL");
+ ret = rte_memarea_dump(ma, NULL, false);
+ RTE_TEST_ASSERT(ret == -EINVAL, "Expected EINVAL");
+
+ /* test for dump */
+ (void)rte_memarea_alloc(ma, 1, 0);
+ (void)rte_memarea_alloc(ma, 1, 0);
+ (void)rte_memarea_alloc(ma, 1, 0);
+ ret = rte_memarea_dump(ma, stderr, true);
+ RTE_TEST_ASSERT(ret == 0, "Expected ZERO");
+
+ rte_memarea_destroy(ma);
+
+ return 0;
+}
+
static int
test_memarea(void)
{
@@ -307,6 +339,7 @@ test_memarea(void)
MEMAREA_TEST_API_RUN(test_memarea_alloc_fail);
MEMAREA_TEST_API_RUN(test_memarea_free_fail);
MEMAREA_TEST_API_RUN(test_memarea_alloc_free);
+ MEMAREA_TEST_API_RUN(test_memarea_dump);
return test_memarea_retcode();
}
--
2.17.1
[PATCH v8 2/9] test/memarea: support memarea test
This patch supports memarea test about API rte_memarea_create and
rte_memarea_destroy.
Signed-off-by: Chengwen Feng
---
MAINTAINERS | 1 +
app/test/meson.build| 2 +
app/test/test_memarea.c | 168
3 files changed, 171 insertions(+)
create mode 100644 app/test/test_memarea.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 3d8d4c2dbe..38625ae1be 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1555,6 +1555,7 @@ Memarea - EXPERIMENTAL
M: Chengwen Feng
F: lib/memarea
F: doc/guides/prog_guide/memarea_lib.rst
+F: app/test/test_memarea*
Membership - EXPERIMENTAL
M: Yipeng Wang
diff --git a/app/test/meson.build b/app/test/meson.build
index 396b133959..8943f24668 100644
--- a/app/test/meson.build
+++ b/app/test/meson.build
@@ -84,6 +84,7 @@ test_sources = files(
'test_malloc.c',
'test_malloc_perf.c',
'test_mbuf.c',
+'test_memarea.c',
'test_member.c',
'test_member_perf.c',
'test_memcpy.c',
@@ -200,6 +201,7 @@ fast_tests = [
['malloc_autotest', false, true],
['mbuf_autotest', false, true],
['mcslock_autotest', false, true],
+['memarea_autotest', true, true],
['memcpy_autotest', true, true],
['memory_autotest', false, true],
['mempool_autotest', false, true],
diff --git a/app/test/test_memarea.c b/app/test/test_memarea.c
new file mode 100644
index 00..f02b33394f
--- /dev/null
+++ b/app/test/test_memarea.c
@@ -0,0 +1,168 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 HiSilicon Limited
+ */
+
+#include
+#include
+
+#include "test.h"
+
+#ifdef RTE_EXEC_ENV_WINDOWS
+static int
+test_memarea(void)
+{
+ printf("memarea not supported on Windows, skipping test\n");
+ return TEST_SKIPPED;
+}
+
+#else
+
+#include
+#include
+
+#define MEMAREA_TEST_DEFAULT_SIZE 0x1000
+
+#define MEMAREA_TEST_API_RUN(test_func) \
+ do { \
+ int ret = test_func(); \
+ if (ret < 0) { \
+ printf("%s Failed\n", #test_func); \
+ fails++; \
+ } else { \
+ printf("%s Passed\n", #test_func); \
+ } \
+ } while (0)
+
+static int fails;
+
+static void
+test_memarea_prepare(void)
+{
+ fails = 0;
+}
+
+static int
+test_memarea_retcode(void)
+{
+ return fails > 0 ? -1 : 0;
+}
+
+static void
+test_memarea_init_param(struct rte_memarea_param *init)
+{
+ memset(init, 0, sizeof(struct rte_memarea_param));
+ sprintf(init->name, "%s", "test-memarea");
+ init->source = RTE_MEMAREA_SOURCE_LIBC;
+ init->total_sz = MEMAREA_TEST_DEFAULT_SIZE;
+ init->mt_safe = 1;
+}
+
+static int
+test_memarea_create_bad_param(void)
+{
+ struct rte_memarea_param init;
+ struct rte_memarea *ma;
+ int i;
+
+ /* test for NULL */
+ ma = rte_memarea_create(NULL);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for invalid name */
+ memset(&init, 0, sizeof(init));
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+ memset(&init.name, 1, sizeof(init.name));
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for invalid source */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_MEMAREA + 1;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for total_sz */
+ test_memarea_init_param(&init);
+ init.total_sz = 0;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for user memory address NULL */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_USER;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for user memory address align invalid */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_USER;
+ for (i = 1; i < RTE_CACHE_LINE_SIZE; i++) {
+ init.user_addr = (void *)((uintptr_t)i);
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+ }
+
+ /* test for memarea NULL */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_MEMAREA;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ /* test for alg invalid */
+ test_memarea_init_param(&init);
+ init.alg = RTE_MEMAREA_ALG_NEXTFIT + 1;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma == NULL, "Expected NULL");
+
+ return 0;
+}
+
+static int
+test_memarea_create_destroy(void)
+{
+ uint8_t user_buffer[MEMAREA_TEST_DEFAULT_SIZE + RTE_CACHE_LINE_SIZE];
+ struct rte_memarea_param ini
[PATCH v8 4/9] test/memarea: support alloc/free/update-refcnt test
This patch supports rte_memarea_alloc()/rte_memarea_free()/
rte_memarea_update_refcnt() test.
Signed-off-by: Chengwen Feng
---
app/test/test_memarea.c | 150 +++-
1 file changed, 149 insertions(+), 1 deletion(-)
diff --git a/app/test/test_memarea.c b/app/test/test_memarea.c
index f02b33394f..5f7868f8f6 100644
--- a/app/test/test_memarea.c
+++ b/app/test/test_memarea.c
@@ -57,6 +57,12 @@ test_memarea_init_param(struct rte_memarea_param *init)
init->mt_safe = 1;
}
+static void
+test_memarea_fill_region(void *ptr, size_t size)
+{
+ memset(ptr, 0xff, size);
+}
+
static int
test_memarea_create_bad_param(void)
{
@@ -122,8 +128,8 @@ static int
test_memarea_create_destroy(void)
{
uint8_t user_buffer[MEMAREA_TEST_DEFAULT_SIZE + RTE_CACHE_LINE_SIZE];
+ struct rte_memarea *ma, *src_ma;
struct rte_memarea_param init;
- struct rte_memarea *ma;
/* test for create with HEAP */
test_memarea_init_param(&init);
@@ -149,6 +155,145 @@ test_memarea_create_destroy(void)
RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
rte_memarea_destroy(ma);
+ /* test for create with another memarea */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ src_ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(src_ma != NULL, "Expected Non-NULL");
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_MEMAREA;
+ init.total_sz = init.total_sz >> 1;
+ init.src_memarea = src_ma;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+ rte_memarea_destroy(ma);
+ rte_memarea_destroy(src_ma);
+
+ return 0;
+}
+
+static int
+test_memarea_alloc_fail(void)
+{
+ struct rte_memarea_param init;
+ struct rte_memarea *ma;
+ void *ptr[2];
+
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+
+ /* test alloc fail with big size */
+ ptr[0] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE, 0);
+ RTE_TEST_ASSERT(ptr[0] == NULL, "Expected NULL");
+
+ /* test alloc fail because no memory */
+ ptr[0] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE -
RTE_CACHE_LINE_SIZE, 0);
+ RTE_TEST_ASSERT(ptr[0] != NULL, "Expected Non-NULL");
+ ptr[1] = rte_memarea_alloc(ma, 1, 0);
+ RTE_TEST_ASSERT(ptr[1] == NULL, "Expected NULL");
+ rte_memarea_free(ma, ptr[0]);
+
+ /* test alloc fail when second fail */
+ ptr[0] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr[0] != NULL, "Expected Non-NULL");
+ test_memarea_fill_region(ptr[0], MEMAREA_TEST_DEFAULT_SIZE >> 1);
+ ptr[1] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr[1] == NULL, "Expected NULL");
+ rte_memarea_free(ma, ptr[0]);
+ ptr[1] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr[1] != NULL, "Expected Non-NULL");
+ test_memarea_fill_region(ptr[1], MEMAREA_TEST_DEFAULT_SIZE >> 1);
+ rte_memarea_free(ma, ptr[1]);
+
+ rte_memarea_destroy(ma);
+
+ return 0;
+}
+
+static int
+test_memarea_free_fail(void)
+{
+ struct rte_memarea_param init;
+ struct rte_memarea *ma;
+ void *ptr;
+
+ /* prepare env */
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+
+ /* test invalid parameters with update-refcnt */
+ rte_memarea_update_refcnt(NULL, (void *)(uintptr_t)1, 0);
+ rte_memarea_update_refcnt(ma, NULL, 0);
+ rte_memarea_update_refcnt(NULL, NULL, 0);
+
+ /* test free with refcnt fail */
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr != NULL, "Expected Non-NULL");
+ test_memarea_fill_region(ptr, MEMAREA_TEST_DEFAULT_SIZE >> 1);
+ rte_memarea_free(ma, ptr);
+ rte_memarea_free(ma, ptr);
+
+ /* test update refcnt with fail */
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr != NULL, "Expected Non-NULL");
+ test_memarea_fill_region(ptr, MEMAREA_TEST_DEFAULT_SIZE >> 1);
+ rte_memarea_update_refcnt(ma, ptr, -2);
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr == NULL, "Expected NULL");
+
+ rte_memarea_destroy(ma);
+
+ return 0;
+}
+
+static int
+test_memarea_alloc_free(void)
+{
+#define ALLOC_MAX_NUM 8
+ struct rte_memarea_param init;
+ struct rte_memarea *ma;
+ void *ptr[ALLOC_MAX_N
[PATCH v8 1/9] memarea: introduce memarea library
The memarea library is an allocator of variable-size object which based on a memory region. This patch provides create/destroy API. Signed-off-by: Chengwen Feng --- MAINTAINERS| 5 + doc/api/doxy-api-index.md | 3 +- doc/api/doxy-api.conf.in | 1 + doc/guides/prog_guide/index.rst| 1 + doc/guides/prog_guide/memarea_lib.rst | 39 ++ doc/guides/rel_notes/release_22_11.rst | 6 + lib/eal/common/eal_common_log.c| 1 + lib/eal/include/rte_log.h | 1 + lib/memarea/memarea_private.h | 33 ++ lib/memarea/meson.build| 16 +++ lib/memarea/rte_memarea.c | 158 + lib/memarea/rte_memarea.h | 136 + lib/memarea/version.map| 12 ++ lib/meson.build| 1 + 14 files changed, 412 insertions(+), 1 deletion(-) create mode 100644 doc/guides/prog_guide/memarea_lib.rst create mode 100644 lib/memarea/memarea_private.h create mode 100644 lib/memarea/meson.build create mode 100644 lib/memarea/rte_memarea.c create mode 100644 lib/memarea/rte_memarea.h create mode 100644 lib/memarea/version.map diff --git a/MAINTAINERS b/MAINTAINERS index 2bd4a55f1b..3d8d4c2dbe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1551,6 +1551,11 @@ F: app/test/test_lpm* F: app/test/test_func_reentrancy.c F: app/test/test_xmmt_ops.h +Memarea - EXPERIMENTAL +M: Chengwen Feng +F: lib/memarea +F: doc/guides/prog_guide/memarea_lib.rst + Membership - EXPERIMENTAL M: Yipeng Wang M: Sameh Gobriel diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index de488c7abf..24456604f8 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -62,7 +62,8 @@ The public API headers are grouped by topics: [memzone](@ref rte_memzone.h), [mempool](@ref rte_mempool.h), [malloc](@ref rte_malloc.h), - [memcpy](@ref rte_memcpy.h) + [memcpy](@ref rte_memcpy.h), + [memarea](@ref rte_memarea.h) - **timers**: [cycles](@ref rte_cycles.h), diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in index f0886c3bd1..8334ebcbd6 100644 --- a/doc/api/doxy-api.conf.in +++ b/doc/api/doxy-api.conf.in @@ -53,6 +53,7 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \ @TOPDIR@/lib/latencystats \ @TOPDIR@/lib/lpm \ @TOPDIR@/lib/mbuf \ + @TOPDIR@/lib/memarea \ @TOPDIR@/lib/member \ @TOPDIR@/lib/mempool \ @TOPDIR@/lib/meter \ diff --git a/doc/guides/prog_guide/index.rst b/doc/guides/prog_guide/index.rst index 8564883018..e9015d65e3 100644 --- a/doc/guides/prog_guide/index.rst +++ b/doc/guides/prog_guide/index.rst @@ -37,6 +37,7 @@ Programmer's Guide hash_lib toeplitz_hash_lib efd_lib +memarea_lib member_lib lpm_lib lpm6_lib diff --git a/doc/guides/prog_guide/memarea_lib.rst b/doc/guides/prog_guide/memarea_lib.rst new file mode 100644 index 00..85ad57145f --- /dev/null +++ b/doc/guides/prog_guide/memarea_lib.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: BSD-3-Clause +Copyright(c) 2022 HiSilicon Limited + +Memarea Library +=== + +Introduction + + +The memarea library provides an allocator of variable-size objects, it is +oriented towards the application layer, which could provides 'region-based +memory management' function [1]. + +The main features are as follows: + +* The allocated object aligned at ``RTE_CACHE_LINE_SIZE`` default. + +* The memory region can be initialized from the following memory sources: + a) HEAP: e.g. invoke ``rte_malloc_socket``. b) LIBC: e.g. invoke + posix_memalign to obtain. c) User memory: it can be from e.g. rte_extmem_xxx + as long as it is available. d) Another memarea: it can be allocated from + another memarea. + +* It provides refcnt feature which could be useful in multi-reader scenario. + +* It supports MT-safe as long as it's specified at creation time. + +Library API Overview + + +The ``rte_memarea_create()`` function is used to create a memarea, the function +returns the pointer to the created memarea or ``NULL`` if the creation failed. + +The ``rte_memarea_destroy()`` function is used to destroy a memarea. + +Reference +- + +[1] https://en.wikipedia.org/wiki/Region-based_memory_management diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst index 2da8bc9661..f5a67cec7b 100644 --- a/doc/guides/rel_notes/release_22_11.rst +++ b/doc/guides/rel_notes/release_22_11.rst @@ -63,6 +63,12 @@ New Features In theory this implementation should work with any target based on ``LoongArch`` ISA. +* **Added memarea library.** + + The memarea library is an allocator of variable-size objects, it is oriented + tow
[PATCH v8 0/9] introduce memarea library
The memarea library is an allocator of variable-size object which based on a memory region. The main features are as follows: - The allocated object aligned at RTE_CACHE_LINE_SIZE default. - The memory region can be initialized from the following memory sources: 1. HEAP: e.g. invoke rte_malloc_socket. 2. LIBC: e.g. invoke posix_memalign. 3. User memory: it can be from e.g. rte_extmem_xxx as long as it is available. The memory's start address must be aligned to RTE_CACHE_LINE_SIZE. 4. Another memarea: it can be from another memarea. - It provides refcnt feature which could be useful in multi-reader scenario. - It provides backup memory mechanism, the memarea could use another memarea as a backup. It will attempts to allocate object from backup memarea when the current memarea failed to allocate. Note: a) The memarea is oriented towards the application layer, which could provides 'region-based memory management' [1] function. b) The eal library also provide memory zone/heap management, but these are tied to huge pages management. [1] https://en.wikipedia.org/wiki/Region-based_memory_management Signed-off-by: Chengwen Feng Chengwen Feng (9): memarea: introduce memarea library test/memarea: support memarea test memarea: support alloc/free/update-refcnt API test/memarea: support alloc/free/update-refcnt test memarea: support dump API test/memarea: support dump test memarea: support backup memory mechanism test/memarea: support backup memory test app/test: add memarea to malloc-perf-autotest --- v8: * address Mattias's comments (rename ALG_DEFAULT with ALG_NEXTFIT). * small feature patches are combined. * enhanced backup memory mechanism. * add memarea to malloc-perf-autotest. * other tiny naming optimize. v7: * repost patches as there are spread over different series in patchwork. v6: * address Mattias's comments. v5: * fix 09/10 patch spell warning. v4: * repost patches as there are spread over different series in patchwork. v3: * add memory source of RTE memory. * add algorithm field to facilitate the introduction of new algorithms. * fix memarea log don't output problem. v2: * fix compile issues reported by dpdk-test-report. * address Dimitry and Jerin's comments. * add no MT-safe test. MAINTAINERS| 6 + app/test/meson.build | 2 + app/test/test_malloc_perf.c| 55 ++- app/test/test_memarea.c| 442 +++ doc/api/doxy-api-index.md | 3 +- doc/api/doxy-api.conf.in | 1 + doc/guides/prog_guide/index.rst| 1 + doc/guides/prog_guide/memarea_lib.rst | 56 +++ doc/guides/rel_notes/release_22_11.rst | 6 + lib/eal/common/eal_common_log.c| 1 + lib/eal/include/rte_log.h | 1 + lib/memarea/memarea_private.h | 39 ++ lib/memarea/meson.build| 16 + lib/memarea/rte_memarea.c | 476 + lib/memarea/rte_memarea.h | 223 lib/memarea/version.map| 16 + lib/meson.build| 1 + 17 files changed, 1343 insertions(+), 2 deletions(-) create mode 100644 app/test/test_memarea.c create mode 100644 doc/guides/prog_guide/memarea_lib.rst create mode 100644 lib/memarea/memarea_private.h create mode 100644 lib/memarea/meson.build create mode 100644 lib/memarea/rte_memarea.c create mode 100644 lib/memarea/rte_memarea.h create mode 100644 lib/memarea/version.map -- 2.17.1
[PATCH v8 5/9] memarea: support dump API
This patch supports rte_memarea_dump() API which could be used for
debug.
Signed-off-by: Chengwen Feng
---
doc/guides/prog_guide/memarea_lib.rst | 3 +
lib/memarea/rte_memarea.c | 98 +++
lib/memarea/rte_memarea.h | 21 ++
lib/memarea/version.map | 1 +
4 files changed, 123 insertions(+)
diff --git a/doc/guides/prog_guide/memarea_lib.rst
b/doc/guides/prog_guide/memarea_lib.rst
index a9c58dc44d..8b616b57e6 100644
--- a/doc/guides/prog_guide/memarea_lib.rst
+++ b/doc/guides/prog_guide/memarea_lib.rst
@@ -43,6 +43,9 @@ The ``rte_memarea_update_refcnt()`` function is used to
update the memory
object's reference count, if the count reaches zero, the memory object will
be freed to memarea.
++The ``rte_memarea_dump()`` function is used to dump the internal information
++of a memarea.
+
Reference
-
diff --git a/lib/memarea/rte_memarea.c b/lib/memarea/rte_memarea.c
index 8ad1c0acb5..163ebfa792 100644
--- a/lib/memarea/rte_memarea.c
+++ b/lib/memarea/rte_memarea.c
@@ -2,6 +2,7 @@
* Copyright(c) 2022 HiSilicon Limited
*/
+#include
#include
#include
#include
@@ -311,3 +312,100 @@ rte_memarea_update_refcnt(struct rte_memarea *ma, void
*ptr, int16_t value)
memarea_free_elem(ma, elem);
memarea_unlock(ma);
}
+
+static const char *
+memarea_source_name(enum rte_memarea_source source)
+{
+ if (source == RTE_MEMAREA_SOURCE_HEAP)
+ return "heap";
+ else if (source == RTE_MEMAREA_SOURCE_LIBC)
+ return "libc";
+ else if (source == RTE_MEMAREA_SOURCE_USER)
+ return "user";
+ else if (source == RTE_MEMAREA_SOURCE_MEMAREA)
+ return "memarea";
+ else
+ return "unknown";
+}
+
+static const char *
+memarea_alg_name(enum rte_memarea_alg alg)
+{
+ if (alg == RTE_MEMAREA_ALG_NEXTFIT)
+ return "nextfit";
+ else
+ return "unknown";
+}
+
+static uint32_t
+memarea_elem_list_num(struct rte_memarea *ma)
+{
+ struct memarea_elem *elem;
+ uint32_t num = 0;
+
+ TAILQ_FOREACH(elem, &ma->elem_list, elem_node) {
+ if (elem->magic != MEMAREA_AVAILABLE_ELEM_MAGIC &&
+ elem->magic != MEMAREA_ALLOCATED_ELEM_MAGIC)
+ break;
+ num++;
+ }
+
+ return num;
+}
+
+static uint32_t
+memarea_free_list_num(struct rte_memarea *ma)
+{
+ struct memarea_elem *elem;
+ uint32_t num = 0;
+
+ TAILQ_FOREACH(elem, &ma->free_list, free_node) {
+ if (elem->magic != MEMAREA_AVAILABLE_ELEM_MAGIC)
+ break;
+ num++;
+ }
+
+ return num;
+}
+
+static void
+memarea_dump_all(struct rte_memarea *ma, FILE *f)
+{
+ struct memarea_elem *elem;
+
+ fprintf(f, " regions:\n");
+ TAILQ_FOREACH(elem, &ma->elem_list, elem_node) {
+ if (elem->magic != MEMAREA_AVAILABLE_ELEM_MAGIC &&
+ elem->magic != MEMAREA_ALLOCATED_ELEM_MAGIC) {
+ fprintf(f, "magic: 0x%x chech fail!\n",
elem->magic);
+ break;
+ }
+ fprintf(f, "size: 0x%zx cookie: 0x%x refcnt: %d\n",
+ elem->size, elem->cookie, elem->refcnt);
+ }
+}
+
+int
+rte_memarea_dump(struct rte_memarea *ma, FILE *f, bool dump_all)
+{
+ if (ma == NULL || f == NULL)
+ return -EINVAL;
+
+ memarea_lock(ma);
+ fprintf(f, "memarea name: %s\n", ma->init.name);
+ fprintf(f, " source: %s\n", memarea_source_name(ma->init.source));
+ if (ma->init.source == RTE_MEMAREA_SOURCE_MEMAREA)
+ fprintf(f, " source-memarea: %s\n",
ma->init.src_memarea->init.name);
+ fprintf(f, " algorithm: %s\n", memarea_alg_name(ma->init.alg));
+ fprintf(f, " total-size: 0x%zx\n", ma->init.total_sz);
+ fprintf(f, " mt-safe: %s\n", ma->init.mt_safe ? "yes" : "no");
+ fprintf(f, " total-regions: %u\n", memarea_elem_list_num(ma));
+ fprintf(f, " total-free-regions: %u\n", memarea_free_list_num(ma));
+ fprintf(f, " alloc_fails: %" PRIu64 "\n", ma->alloc_fails);
+ fprintf(f, " refcnt_check_fails: %" PRIu64 "\n",
ma->refcnt_check_fails);
+ if (dump_all)
+ memarea_dump_all(ma, f);
+ memarea_unlock(ma);
+
+ return 0;
+}
diff --git a/lib/memarea/rte_memarea.h b/lib/memarea/rte_memarea.h
index f866fa7b67..5e3f23700b 100644
--- a/lib/memarea/rte_memarea.h
+++ b/lib/memarea/rte_memarea.h
@@ -185,6 +185,27 @@ void rte_memarea_free(struct rte_memarea *ma, void *ptr);
__rte_experimental
void rte_memarea_update_refcnt(struct rte_memarea *ma, void *ptr, int16_t
value);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice.
+ *
+ * Dump memarea.
+ *
+ * Dump one memarea.
+ *
+ * @param ma
+ * The pointer of memarea.
+ * @param f
+ * The
[PATCH v8 7/9] memarea: support backup memory mechanism
This patch adds a memarea backup mechanism, where an allocation request
which cannot be met by the current memarea is deferred to its backup
memarea.
Signed-off-by: Chengwen Feng
---
doc/guides/prog_guide/memarea_lib.rst | 4 ++
lib/memarea/memarea_private.h | 3 ++
lib/memarea/rte_memarea.c | 67 ++-
lib/memarea/rte_memarea.h | 10
4 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/doc/guides/prog_guide/memarea_lib.rst
b/doc/guides/prog_guide/memarea_lib.rst
index 8b616b57e6..6b180bb0e4 100644
--- a/doc/guides/prog_guide/memarea_lib.rst
+++ b/doc/guides/prog_guide/memarea_lib.rst
@@ -25,6 +25,10 @@ The main features are as follows:
* It supports MT-safe as long as it's specified at creation time.
+* It provides backup memory mechanism, the memarea could use another memarea
+ as a backup. It will attempts to allocate object from backup memarea when
+ the current memarea failed to allocate.
+
Library API Overview
diff --git a/lib/memarea/memarea_private.h b/lib/memarea/memarea_private.h
index f5accf2987..062e967250 100644
--- a/lib/memarea/memarea_private.h
+++ b/lib/memarea/memarea_private.h
@@ -14,6 +14,7 @@
struct memarea_elem {
TAILQ_ENTRY(memarea_elem) elem_node;
TAILQ_ENTRY(memarea_elem) free_node;
+ struct rte_memarea *owner;
size_t size;
uint32_t magic;
uint32_t cookie;
@@ -26,11 +27,13 @@ struct rte_memarea {
struct rte_memarea_param init;
rte_spinlock_t lock;
void*area_addr;
+ void*top_addr;
struct memarea_elem_list elem_list;
struct memarea_elem_list free_list;
uint64_t alloc_fails;
uint64_t refcnt_check_fails;
+ uint64_t bak_alloc_fails;
} __rte_cache_aligned;
#endif /* MEMAREA_PRIVATE_H */
diff --git a/lib/memarea/rte_memarea.c b/lib/memarea/rte_memarea.c
index 163ebfa792..3de4297cf7 100644
--- a/lib/memarea/rte_memarea.c
+++ b/lib/memarea/rte_memarea.c
@@ -132,9 +132,11 @@ rte_memarea_create(const struct rte_memarea_param *init)
TAILQ_INIT(&ma->elem_list);
TAILQ_INIT(&ma->free_list);
ma->area_addr = addr;
+ ma->top_addr = RTE_PTR_ADD(addr, init->total_sz - 1);
elem = addr;
TAILQ_INSERT_TAIL(&ma->elem_list, elem, elem_node);
TAILQ_INSERT_TAIL(&ma->free_list, elem, free_node);
+ elem->owner = NULL;
elem->size = init->total_sz - sizeof(struct memarea_elem);
elem->magic = MEMAREA_AVAILABLE_ELEM_MAGIC;
elem->cookie = MEMAREA_AVAILABLE_ELEM_COOKIE;
@@ -154,11 +156,41 @@ memarea_free_area(struct rte_memarea *ma)
rte_memarea_free(ma->init.src_memarea, ma->area_addr);
}
+static inline void memarea_lock(struct rte_memarea *ma);
+static inline void memarea_unlock(struct rte_memarea *ma);
+static inline void memarea_free_elem(struct rte_memarea *ma, struct
memarea_elem *elem);
+
+static void
+memarea_free_owner_objs(struct rte_memarea *ma, struct rte_memarea *owner)
+{
+ struct memarea_elem *elem, *tmp_elem;
+
+ memarea_lock(ma);
+ /* The TAILQ_FOREACH_SAFE is undefined in sys/queue.h, so extend it
here. */
+ for (elem = TAILQ_FIRST(&ma->elem_list);
+elem && (tmp_elem = TAILQ_NEXT(elem, elem_node), 1);
+elem = tmp_elem) {
+ if (elem->owner != owner)
+ continue;
+ elem->refcnt = 0;
+ memarea_free_elem(ma, elem);
+ }
+ if (ma->init.bak_memarea != NULL)
+ memarea_free_owner_objs(ma->init.bak_memarea, owner);
+ memarea_unlock(ma);
+}
+
void
rte_memarea_destroy(struct rte_memarea *ma)
{
if (ma == NULL)
return;
+ if (ma->init.bak_memarea != NULL) {
+ /* Some objects are allocated from backup memarea, these
objects need to be
+* freed when the memarea is destroyed.
+*/
+ memarea_free_owner_objs(ma->init.bak_memarea, ma);
+ }
memarea_free_area(ma);
rte_free(ma);
}
@@ -191,6 +223,7 @@ memarea_add_node(struct rte_memarea *ma, struct
memarea_elem *elem, size_t need_
struct memarea_elem *new_elem;
new_elem = (struct memarea_elem *)RTE_PTR_ADD(elem, sizeof(struct
memarea_elem) +
align_size);
+ new_elem->owner = NULL;
new_elem->size = elem->size - align_size - sizeof(struct memarea_elem);
new_elem->magic = MEMAREA_AVAILABLE_ELEM_MAGIC;
new_elem->cookie = MEMAREA_AVAILABLE_ELEM_COOKIE;
@@ -200,6 +233,23 @@ memarea_add_node(struct rte_memarea *ma, struct
memarea_elem *elem, size_t need_
elem->size = align_size;
}
+static inline void
+memarea_mark_owner(struct rte_memarea *ma, void *ptr)
+{
+ struct memarea_elem *elem;
+ elem = (struct memarea_elem
[PATCH v8 3/9] memarea: support alloc/free/update-refcnt API
This patch supports rte_memarea_alloc()/rte_memarea_free()/
rte_memarea_update_refcnt() API.
Signed-off-by: Chengwen Feng
---
doc/guides/prog_guide/memarea_lib.rst | 10 ++
lib/memarea/memarea_private.h | 3 +
lib/memarea/rte_memarea.c | 155 ++
lib/memarea/rte_memarea.h | 56 ++
lib/memarea/version.map | 3 +
5 files changed, 227 insertions(+)
diff --git a/doc/guides/prog_guide/memarea_lib.rst
b/doc/guides/prog_guide/memarea_lib.rst
index 85ad57145f..a9c58dc44d 100644
--- a/doc/guides/prog_guide/memarea_lib.rst
+++ b/doc/guides/prog_guide/memarea_lib.rst
@@ -33,6 +33,16 @@ returns the pointer to the created memarea or ``NULL`` if
the creation failed.
The ``rte_memarea_destroy()`` function is used to destroy a memarea.
+The ``rte_memarea_alloc()`` function is used to alloc one memory object from
+the memarea.
+
+The ``rte_memarea_free()`` function is used to free one memory object which
+allocated by ``rte_memarea_alloc()``.
+
+The ``rte_memarea_update_refcnt()`` function is used to update the memory
+object's reference count, if the count reaches zero, the memory object will
+be freed to memarea.
+
Reference
-
diff --git a/lib/memarea/memarea_private.h b/lib/memarea/memarea_private.h
index 59be9c1d00..f5accf2987 100644
--- a/lib/memarea/memarea_private.h
+++ b/lib/memarea/memarea_private.h
@@ -28,6 +28,9 @@ struct rte_memarea {
void*area_addr;
struct memarea_elem_list elem_list;
struct memarea_elem_list free_list;
+
+ uint64_t alloc_fails;
+ uint64_t refcnt_check_fails;
} __rte_cache_aligned;
#endif /* MEMAREA_PRIVATE_H */
diff --git a/lib/memarea/rte_memarea.c b/lib/memarea/rte_memarea.c
index 85975029e2..8ad1c0acb5 100644
--- a/lib/memarea/rte_memarea.c
+++ b/lib/memarea/rte_memarea.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include
#include
@@ -94,6 +95,8 @@ memarea_alloc_area(const struct rte_memarea_param *init)
ptr = memarea_alloc_from_libc(init->total_sz);
else if (init->source == RTE_MEMAREA_SOURCE_USER)
ptr = init->user_addr;
+ else if (init->source == RTE_MEMAREA_SOURCE_MEMAREA)
+ ptr = rte_memarea_alloc(init->src_memarea, init->total_sz, 0);
if (ptr == NULL)
RTE_LOG(ERR, MEMAREA, "memarea: %s alloc memory area fail!\n",
init->name);
@@ -146,6 +149,8 @@ memarea_free_area(struct rte_memarea *ma)
rte_free(ma->area_addr);
else if (ma->init.source == RTE_MEMAREA_SOURCE_LIBC)
free(ma->area_addr);
+ else if (ma->init.source == RTE_MEMAREA_SOURCE_MEMAREA)
+ rte_memarea_free(ma->init.src_memarea, ma->area_addr);
}
void
@@ -156,3 +161,153 @@ rte_memarea_destroy(struct rte_memarea *ma)
memarea_free_area(ma);
rte_free(ma);
}
+
+static inline void
+memarea_lock(struct rte_memarea *ma)
+{
+ if (ma->init.mt_safe)
+ rte_spinlock_lock(&ma->lock);
+}
+
+static inline void
+memarea_unlock(struct rte_memarea *ma)
+{
+ if (ma->init.mt_safe)
+ rte_spinlock_unlock(&ma->lock);
+}
+
+static inline bool
+memarea_whether_add_node(size_t free_size, size_t need_size)
+{
+ size_t align_size = RTE_ALIGN_CEIL(need_size, RTE_CACHE_LINE_SIZE);
+ return free_size > align_size && (free_size - align_size) >
sizeof(struct memarea_elem);
+}
+
+static inline void
+memarea_add_node(struct rte_memarea *ma, struct memarea_elem *elem, size_t
need_size)
+{
+ size_t align_size = RTE_ALIGN_CEIL(need_size, RTE_CACHE_LINE_SIZE);
+ struct memarea_elem *new_elem;
+ new_elem = (struct memarea_elem *)RTE_PTR_ADD(elem, sizeof(struct
memarea_elem) +
+ align_size);
+ new_elem->size = elem->size - align_size - sizeof(struct memarea_elem);
+ new_elem->magic = MEMAREA_AVAILABLE_ELEM_MAGIC;
+ new_elem->cookie = MEMAREA_AVAILABLE_ELEM_COOKIE;
+ new_elem->refcnt = 0;
+ TAILQ_INSERT_AFTER(&ma->elem_list, elem, new_elem, elem_node);
+ TAILQ_INSERT_AFTER(&ma->free_list, elem, new_elem, free_node);
+ elem->size = align_size;
+}
+
+void *
+rte_memarea_alloc(struct rte_memarea *ma, size_t size, uint32_t cookie)
+{
+ struct memarea_elem *elem;
+ void *ptr = NULL;
+
+ if (unlikely(ma == NULL || size == 0))
+ return NULL;
+
+ memarea_lock(ma);
+ TAILQ_FOREACH(elem, &ma->free_list, free_node) {
+ if (unlikely(elem->magic != MEMAREA_AVAILABLE_ELEM_MAGIC))
+ break;
+ if (elem->size < size)
+ continue;
+ if (memarea_whether_add_node(elem->size, size))
+ memarea_add_node(ma, elem, size);
+ elem->magic = MEMAREA_ALLOCATED_ELEM_MAGIC;
+ elem->cookie = cookie;
+ elem
[PATCH v8 8/9] test/memarea: support backup memory test
This patch supports backup memory mechanism test.
Signed-off-by: Chengwen Feng
---
app/test/test_memarea.c | 93 +
1 file changed, 93 insertions(+)
diff --git a/app/test/test_memarea.c b/app/test/test_memarea.c
index 50b92db9b3..c12af6338e 100644
--- a/app/test/test_memarea.c
+++ b/app/test/test_memarea.c
@@ -329,6 +329,97 @@ test_memarea_dump(void)
return 0;
}
+static int
+test_memarea_backup(void)
+{
+ struct rte_memarea *ma, *bak_ma;
+ struct rte_memarea_param init;
+ void *ptr;
+
+ /* prepare env */
+ test_memarea_init_param(&init);
+ strcat(init.name, "_backup");
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE;
+ bak_ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(bak_ma != NULL, "Expected Non-NULL");
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE >> 2;
+ init.bak_memarea = bak_ma;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+
+ /* test for backup */
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 3, 0);
+ RTE_TEST_ASSERT(ptr != NULL, "Expected Non-NULL");
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE >> 1, 0);
+ RTE_TEST_ASSERT(ptr != NULL, "Expected Non-NULL");
+ (void)rte_memarea_dump(ma, stderr, true);
+ (void)rte_memarea_dump(bak_ma, stderr, true);
+ rte_memarea_free(ma, ptr);
+ ptr = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE, 0);
+ RTE_TEST_ASSERT(ptr == NULL, "Expected NULL");
+ (void)rte_memarea_dump(ma, stderr, true);
+ (void)rte_memarea_dump(bak_ma, stderr, true);
+
+ rte_memarea_destroy(ma);
+ rte_memarea_destroy(bak_ma);
+
+ return 0;
+}
+
+static int
+test_memarea_backup_destroy(void)
+{
+#define ALLOC_MAX_NUM 8
+ struct rte_memarea *ma, *bak_ma, *bakbak_ma;
+ struct rte_memarea_param init;
+ void *ptr[ALLOC_MAX_NUM];
+ int i;
+
+ /* prepare env */
+ test_memarea_init_param(&init);
+ strcat(init.name, "_bakbak");
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE * ALLOC_MAX_NUM;
+ bakbak_ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(bakbak_ma != NULL, "Expected Non-NULL");
+ test_memarea_init_param(&init);
+ strcat(init.name, "_bak");
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.bak_memarea = bakbak_ma;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE * ALLOC_MAX_NUM / 2;
+ bak_ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(bak_ma != NULL, "Expected Non-NULL");
+ test_memarea_init_param(&init);
+ init.source = RTE_MEMAREA_SOURCE_LIBC;
+ init.total_sz = MEMAREA_TEST_DEFAULT_SIZE >> 2;
+ init.bak_memarea = bak_ma;
+ ma = rte_memarea_create(&init);
+ RTE_TEST_ASSERT(ma != NULL, "Expected Non-NULL");
+
+ /* alloc for multiple count */
+ for (i = 0; i < ALLOC_MAX_NUM; i++) {
+ ptr[i] = rte_memarea_alloc(ma, MEMAREA_TEST_DEFAULT_SIZE, 0);
+ RTE_TEST_ASSERT(ptr[i] != NULL, "Expected Non-NULL");
+ rte_memarea_update_refcnt(ma, ptr[i], i + 1);
+ }
+ (void)rte_memarea_dump(ma, stderr, true);
+ (void)rte_memarea_dump(bak_ma, stderr, true);
+ (void)rte_memarea_dump(bakbak_ma, stderr, true);
+
+ /* try destroy outmost memarea */
+ rte_memarea_destroy(ma);
+ (void)rte_memarea_dump(bak_ma, stderr, true);
+ (void)rte_memarea_dump(bakbak_ma, stderr, true);
+
+ rte_memarea_destroy(bak_ma);
+ rte_memarea_destroy(bakbak_ma);
+
+ return 0;
+}
+
static int
test_memarea(void)
{
@@ -340,6 +431,8 @@ test_memarea(void)
MEMAREA_TEST_API_RUN(test_memarea_free_fail);
MEMAREA_TEST_API_RUN(test_memarea_alloc_free);
MEMAREA_TEST_API_RUN(test_memarea_dump);
+ MEMAREA_TEST_API_RUN(test_memarea_backup);
+ MEMAREA_TEST_API_RUN(test_memarea_backup_destroy);
return test_memarea_retcode();
}
--
2.17.1
[PATCH v8 9/9] app/test: add memarea to malloc-perf-autotest
This patch adds memarea to malloc_perf_autotest.
Test platform: Kunpeng920
Test command: dpdk-test -a :7d:00.3 -l 10-12
Test result:
USER1: Performance: rte_memarea
USER1:Size (B) Runs Alloc (us) Free (us) Total (us) memset (us)
USER1: 64 10.03 0.03 0.06 0.01
USER1: 128 10.02 0.03 0.05 0.01
USER1:1024 10.03 0.05 0.07 0.20
USER1:4096 10.03 0.05 0.07 0.34
USER1: 65536 10.10 0.08 0.18 2.14
USER1: 10485766440.10 0.04 0.1429.07
USER1: 20971523220.10 0.04 0.1457.50
USER1: 41943041610.12 0.04 0.15 114.50
USER1:16777216 400.11 0.04 0.15 456.09
USER1: 1073741824 Interrupted: out of memory. [1]
Compared with rte_malloc:
USER1: Performance: rte_malloc
USER1:Size (B) Runs Alloc (us) Free (us) Total (us) memset (us)
USER1: 64 10.14 0.07 0.21 0.01
USER1: 128 10.10 0.05 0.15 0.01
USER1:1024 10.11 0.18 0.29 0.21
USER1:4096 10.13 0.39 0.53 0.35
USER1: 65536 10.17 2.27 2.44 2.15
USER1: 1048576 1 37.21 71.63 108.8429.08
USER1: 2097152 1 8831.15160.028991.1763.52
USER1: 4194304 147131.88413.75 47545.62 173.79
USER1:16777216 4221 119604.60 2209.73 121814.34 964.42
USER1: 1073741824 31 335058.32 223369.31 558427.63 62440.87
[1] The total-size of the memarea is restricted to avoid creation
failed.
Signed-off-by: Chengwen Feng
---
app/test/test_malloc_perf.c | 55 -
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/app/test/test_malloc_perf.c b/app/test/test_malloc_perf.c
index ccec43ae84..a8b4531fe3 100644
--- a/app/test/test_malloc_perf.c
+++ b/app/test/test_malloc_perf.c
@@ -7,10 +7,12 @@
#include
#include
#include
+#include
#include
#include "test.h"
+#define PERFTEST_MAX_RUNS 1
#define TEST_LOG(level, ...) RTE_LOG(level, USER1, __VA_ARGS__)
typedef void * (alloc_t)(const char *name, size_t size, unsigned int align);
@@ -147,10 +149,52 @@ memzone_free(void *addr)
rte_memzone_free((struct rte_memzone *)addr);
}
+static struct rte_memarea *test_ma;
+
+static int
+memarea_pre_env(void)
+{
+ struct rte_memarea_param init = { 0 };
+ snprintf(init.name, sizeof(init.name), "perftest");
+ init.source = RTE_MEMAREA_SOURCE_HEAP;
+ init.alg = RTE_MEMAREA_ALG_NEXTFIT;
+ init.total_sz = PERFTEST_MAX_RUNS * KB * 66; /* test for max 64KB (add
2KB for meta) */
+ init.mt_safe = 1;
+ init.numa_socket = SOCKET_ID_ANY;
+ init.bak_memarea = NULL;
+ test_ma = rte_memarea_create(&init);
+ if (test_ma == NULL) {
+ fprintf(stderr, "memarea create failed, skip memarea
perftest!\n");
+ return -1;
+ }
+ return 0;
+}
+
+static void
+memarea_clear_env(void)
+{
+ rte_memarea_destroy(test_ma);
+ test_ma = NULL;
+}
+
+static void *
+memarea_alloc(const char *name, size_t size, unsigned int align)
+{
+ RTE_SET_USED(name);
+ RTE_SET_USED(align);
+ return rte_memarea_alloc(test_ma, size, 0);
+}
+
+static void
+memarea_free(void *addr)
+{
+ rte_memarea_free(test_ma, addr);
+}
+
static int
test_malloc_perf(void)
{
- static const size_t MAX_RUNS = 1;
+ static const size_t MAX_RUNS = PERFTEST_MAX_RUNS;
double memset_us_gb = 0;
@@ -168,6 +212,15 @@ test_malloc_perf(void)
NULL, memset_us_gb, RTE_MAX_MEMZONE - 1) < 0)
return -1;
+ if (memarea_pre_env() < 0)
+ return 0;
+ if (test_alloc_perf("rte_memarea", memarea_alloc, memarea_free,
+ memset, memset_us_gb, MAX_RUNS) < 0) {
+ memarea_clear_env();
+ return -1;
+ }
+ memarea_clear_env();
+
return 0;
}
--
2.17.1
RE: [PATCH 3/3] sched: support for 100G+ rates in subport/pipe config
> -Original Message- > From: Ajmera, Megha > Sent: Thursday, October 6, 2022 8:01 PM > To: dev@dpdk.org; Singh, Jasvinder ; > Dumitrescu, Cristian > Cc: sta...@dpdk.org > Subject: [PATCH 3/3] sched: support for 100G+ rates in subport/pipe config > > Config load functions updated to support 100G rates > for subport and pipes. > > Signed-off-by: Megha Ajmera > --- > examples/qos_sched/cfg_file.c | 64 +-- > 1 file changed, 32 insertions(+), 32 deletions(-) > > diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c > index ca871d3287..ca60d616a1 100644 > --- a/examples/qos_sched/cfg_file.c > +++ b/examples/qos_sched/cfg_file.c > @@ -64,67 +64,67 @@ cfg_load_pipe(struct rte_cfgfile *cfg, struct > rte_sched_pipe_params *pipe_params > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tb rate"); > if (entry) > - pipe_params[j].tb_rate = (uint64_t)atoi(entry); > + pipe_params[j].tb_rate = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tb size"); > if (entry) > - pipe_params[j].tb_size = (uint64_t)atoi(entry); > + pipe_params[j].tb_size = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc period"); > if (entry) > - pipe_params[j].tc_period = (uint64_t)atoi(entry); > + pipe_params[j].tc_period = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 0 rate"); > if (entry) > - pipe_params[j].tc_rate[0] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[0] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 1 rate"); > if (entry) > - pipe_params[j].tc_rate[1] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[1] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 2 rate"); > if (entry) > - pipe_params[j].tc_rate[2] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[2] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 3 rate"); > if (entry) > - pipe_params[j].tc_rate[3] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[3] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 4 rate"); > if (entry) > - pipe_params[j].tc_rate[4] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[4] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 5 rate"); > if (entry) > - pipe_params[j].tc_rate[5] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[5] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 6 rate"); > if (entry) > - pipe_params[j].tc_rate[6] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[6] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 7 rate"); > if (entry) > - pipe_params[j].tc_rate[7] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[7] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 8 rate"); > if (entry) > - pipe_params[j].tc_rate[8] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[8] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 9 rate"); > if (entry) > - pipe_params[j].tc_rate[9] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[9] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 10 rate"); > if (entry) > - pipe_params[j].tc_rate[10] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[10] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 11 rate"); > if (entry) > - pipe_params[j].tc_rate[11] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[11] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 12 rate"); > if (entry) > - pipe_params[j].tc_rate[12] = (uint64_t)atoi(entry); > + pipe_params[j].tc_rate[12] = atol(entry); > > entry = rte_cfgfile_get_entry(cfg, pipe_name, "tc 12 > oversubscription weight"); > if (entry) > @@ -165,67 +165,67 @@ cfg_load_subport_profile(struct rte_cfgfile *cfg, > > entry = rte_cfgfile_get_entry(cfg, sec_name,
Re: [PATCH v2 2/2] drivers: remove the unnecessary version.map
On Tue, Oct 11, 2022 at 1:09 PM Abdullah Ömer Yamaç
wrote:
>
> With the previous patch, some version.map files are not necessary.
> In this patch, we removed them.
>
> Signed-off-by: Abdullah Ömer Yamaç
> Suggested-by: Ferruh Yigit
I'd like some check added as part of this series.
Something like:
$ git diff
diff --git a/devtools/check-symbol-maps.sh b/devtools/check-symbol-maps.sh
index 32e1fa5c8f..9d2f85ed73 100755
--- a/devtools/check-symbol-maps.sh
+++ b/devtools/check-symbol-maps.sh
@@ -60,4 +60,18 @@ if [ -n "$local_miss_maps" ] ; then
ret=1
fi
+find_unneeded_maps ()
+{
+for map in $@ ; do
+[ $(buildtools/map-list-symbol.sh $map | wc -l) != 0 ] || echo $map
+done
+}
+
+unneeded_maps=$(find_unneeded_maps $@)
+if [ -n "$unneeded_maps" ] ; then
+echo "Found unneeded map files:"
+echo "$unneeded_maps"
+ret=1
+fi
+
exit $ret
It helped me catch:
$ ./devtools/check-symbol-maps.sh
Found unneeded map files:
drivers/net/mana/version.map
--
David Marchand
[Bug 1098] net/iavf: check_rx_vec_allow() result is ignored
https://bugs.dpdk.org/show_bug.cgi?id=1098 Bug ID: 1098 Summary: net/iavf: check_rx_vec_allow() result is ignored Product: DPDK Version: 22.11 Hardware: All OS: All Status: UNCONFIRMED Severity: normal Priority: Normal Component: ethdev Assignee: dev@dpdk.org Reporter: maxime.coque...@redhat.com Target Milestone: --- In IAVF driver, check_rx_vec_allow() ensure some conditions are met to authorize vector path usage for a given Rxq. Its return is assigned to Rxq's (struct iavf_adapter *)->rx_vec_allowed in iavf_dev_rx_queue_setup(), but (struct iavf_adapter *)->rx_vec_allowed is never used afterwards. Either conditions checked in check_rx_vec_allow() are useless and so it should be removed, or DP selection should take .rx_vec_allowed value into account. -- You are receiving this mail because: You are the assignee for the bug.
[PATCH v5] net/bonding: call Tx prepare before Tx burst
Normally, to use the HW offloads capability (e.g. checksum and TSO) in
the Tx direction, the application needs to call rte_eth_tx_prepare() to
do some adjustment with the packets before sending them. But the
tx_prepare callback of the bonding driver is not implemented. Therefore,
the sent packets may have errors (e.g. checksum errors).
However, it is difficult to design the tx_prepare callback for bonding
driver. Because when a bonded device sends packets, the bonded device
allocates the packets to different slave devices based on the real-time
link status and bonding mode. That is, it is very difficult for the
bonded device to determine which slave device's prepare function should
be invoked.
So in this patch, the tx_prepare callback of bonding driver is not
implemented. Instead, the rte_eth_tx_prepare() will be called before
rte_eth_tx_burst(). In this way, all tx_offloads can be processed
correctly for all NIC devices.
Note: because it is rara that bond different PMDs together, so just
call tx-prepare once in broadcast bonding mode.
Also the following description was added to the rte_eth_tx_burst()
function:
"@note This function must not modify mbufs (including packets data)
unless the refcnt is 1. The exception is the bonding PMD, which does not
have tx-prepare function, in this case, mbufs maybe modified."
Signed-off-by: Chengchang Tang
Signed-off-by: Chengwen Feng
Reviewed-by: Min Hu (Connor)
---
v5: address Chas's comments.
v4: address Chas and Konstantin's comments.
v3: support tx-prepare when Tx internal generate mbufs.
v2: support tx-prepare enable flag and fail stats.
---
drivers/net/bonding/rte_eth_bond_8023ad.c | 10 --
drivers/net/bonding/rte_eth_bond_pmd.c| 37 ++-
lib/ethdev/rte_ethdev.h | 4 +++
3 files changed, 41 insertions(+), 10 deletions(-)
diff --git a/drivers/net/bonding/rte_eth_bond_8023ad.c
b/drivers/net/bonding/rte_eth_bond_8023ad.c
index b3cddd8a20..29a71ae0bf 100644
--- a/drivers/net/bonding/rte_eth_bond_8023ad.c
+++ b/drivers/net/bonding/rte_eth_bond_8023ad.c
@@ -636,9 +636,12 @@ tx_machine(struct bond_dev_private *internals, uint16_t
slave_id)
return;
}
} else {
- uint16_t pkts_sent = rte_eth_tx_burst(slave_id,
+ uint16_t pkts_sent = rte_eth_tx_prepare(slave_id,
internals->mode4.dedicated_queues.tx_qid,
&lacp_pkt, 1);
+ pkts_sent = rte_eth_tx_burst(slave_id,
+ internals->mode4.dedicated_queues.tx_qid,
+ &lacp_pkt, pkts_sent);
if (pkts_sent != 1) {
rte_pktmbuf_free(lacp_pkt);
set_warning_flags(port, WRN_TX_QUEUE_FULL);
@@ -1371,9 +1374,12 @@ bond_mode_8023ad_handle_slow_pkt(struct bond_dev_private
*internals,
}
} else {
/* Send packet directly to the slow queue */
- uint16_t tx_count = rte_eth_tx_burst(slave_id,
+ uint16_t tx_count = rte_eth_tx_prepare(slave_id,
internals->mode4.dedicated_queues.tx_qid,
&pkt, 1);
+ tx_count = rte_eth_tx_burst(slave_id,
+
internals->mode4.dedicated_queues.tx_qid,
+ &pkt, tx_count);
if (tx_count != 1) {
/* reset timer */
port->rx_marker_timer = 0;
diff --git a/drivers/net/bonding/rte_eth_bond_pmd.c
b/drivers/net/bonding/rte_eth_bond_pmd.c
index 4081b21338..a2c68ec9bc 100644
--- a/drivers/net/bonding/rte_eth_bond_pmd.c
+++ b/drivers/net/bonding/rte_eth_bond_pmd.c
@@ -602,8 +602,11 @@ bond_ethdev_tx_burst_round_robin(void *queue, struct
rte_mbuf **bufs,
/* Send packet burst on each slave device */
for (i = 0; i < num_of_slaves; i++) {
if (slave_nb_pkts[i] > 0) {
+ num_tx_slave = rte_eth_tx_prepare(slaves[i],
+ bd_tx_q->queue_id, slave_bufs[i],
+ slave_nb_pkts[i]);
num_tx_slave = rte_eth_tx_burst(slaves[i],
bd_tx_q->queue_id,
- slave_bufs[i], slave_nb_pkts[i]);
+ slave_bufs[i], num_tx_slave);
/* if tx burst fails move packets to end of bufs */
if (unlikely(num_tx_slave < slave_nb_pkts[i])) {
@@ -628,6 +631,7 @@ bond_ethdev_tx_burst_active_backup(void *queue,
{
struct bond_dev_private *internals;
struct bond_tx_queue *bd_tx_q;
+ uint16_t nb_prep_pkts;
bd_tx_q = (struct bond_tx_queue *)queue;
internals = bd_tx_q->dev_private;
@@ -
Re: [PATCH v4] net/bonding: call Tx prepare before Tx burst
Hi Chas,
On 2022/10/11 3:42, Chas Williams wrote:
>
>
> On 10/8/22 23:36, Chengwen Feng wrote:
>> uint16_t slaves[RTE_MAX_ETHPORTS];
>> uint8_t tx_failed_flag = 0;
>> uint16_t num_of_slaves;
>> + uint16_t num_tx_prep;
>> uint16_t max_nb_of_tx_pkts = 0;
>> @@ -1320,12 +1339,18 @@ bond_ethdev_tx_burst_broadcast(void *queue, struct
>> rte_mbuf **bufs,
>> for (i = 0; i < nb_pkts; i++)
>> rte_pktmbuf_refcnt_update(bufs[i], num_of_slaves - 1);
>> + /* It is rare that bond different PMDs together, so just call
>> tx-prepare once */
>> + num_tx_prep = rte_eth_tx_prepare(slaves[0], bd_tx_q->queue_id,
>> + bufs, nb_pkts);
>
> You probably want to do this before you update the refcnt on the mbufs.
> Otherwise, the common rte_eth_tx_prepare operation, rte_vlan_insert, will
> fail since the refcnt will not be 1.
nice catch
v5 already sent to fix it, please review it. Thanks
>
>> + if (unlikely(num_tx_prep < nb_pkts))
>> + tx_failed_flag = 1;
>> +
>> /* Transmit burst on each active slave */
>> for (i = 0; i < num_of_slaves; i++) {
>> slave_tx_total[i] = rte_eth_tx_burst(slaves[i], bd_tx_q->queue_id,
>> - bufs, nb_pkts);
>> + bufs, num_tx_prep);
>> - if (unlikely(slave_tx_total[i] < nb_pkts))
>> + if (unlikely(slave_tx_total[i] < num_tx_prep))
>> tx_failed_flag = 1;
>> /* record the value and slave index for the slave which
>> transmits the
>> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
>> index e8d1e1c658..b0396bb86e 100644
>> --- a/lib/ethdev/rte_ethdev.h
>> +++ b/lib/ethdev/rte_ethdev.h
>> @@ -6031,6 +6031,10 @@ uint16_t rte_eth_call_tx_callbacks(uint16_t port_id,
>> uint16_t queue_id,
>> * @see rte_eth_tx_prepare to perform some prior checks or adjustments
>> * for offloads.
>> *
>> + * @note This function must not modify mbufs (including packets data) unless
>> + * the refcnt is 1. The exception is the bonding PMD, which does not have
>> + * tx-prepare function, in this case, mbufs maybe modified.
>
> Exactly. See my comment about calling prepare before you modify the refcnt.
>
>> + *
>> * @param port_id
>> * The port identifier of the Ethernet device.
>> * @param queue_id
> .
RE: [PATCH v10 7/8] app/procinfo: support descriptor dump
> -Original Message- > From: Dongdong Liu > Subject: [PATCH v10 7/8] app/procinfo: support descriptor dump > > This patch support Rx/Tx descriptor dump > > The command is like: > dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --show-rx-descriptor > queue_id:offset:num > > dpdk-proc-info -a :xx:xx.x --file-prefix=xxx -- --show-tx-descriptor > queue_id:offset:num > > queue_id: A queue identifier on this port. > offset: The offset of the descriptor starting from tail. > num: The number of the descriptors to dump. > > Signed-off-by: Min Hu (Connor) > Signed-off-by: Dongdong Liu Acked-by: Reshma Pattan
Re: CRC offload from application's POV
On 10/11/2022 12:54 PM, Viacheslav Galaktionov wrote: On 10/11/22 15:36, Ferruh Yigit wrote: On 10/11/2022 11:48 AM, Viacheslav Galaktionov wrote: Hi! We're looking to implement CRC offload in our driver and we're having difficulties understanding what the feature changes from the application's point of view. If we enable the KEEP_CRC offload, then the NIC is supposed to preserve the CRC in the packet, that much is clear. But we checked other drivers and it seems common for PMDs to remove the CRC from the final mbufs. Why is that? We couldn't find any place where the CRC would be stored after removal, so it looks like the application doesn't have access to this piece of data. And if so, what's the point of having this feature if the CRC is discarded either way? We're probably missing something and would really appreciate any help with this. Hi Viacheslav, As you said default behavior is to strip the CRC from packet, even some devices doesn't support having CRC in the packet it is removed by HW automatically. In this case application can't access to the CRC. For the devices that has capability to keep CRC, KEEP_CRC offload should enable having CRC as part of the packet. There is no special field to store the CRC. I'm asking because I'm seeing a common pattern in the code base: if the hardware didn't remove the CRC, the driver does this itself. Grepping the code for "crc_len" will show you what I mean. One of the most apparent examples of this happening can be seen in drivers/net/e1000/em_rxtx.c: /* * This is the last buffer of the received packet. * If the CRC is not stripped by the hardware: * - Subtract the CRC length from the total packet length. * - If the last buffer only contains the whole CRC or a part * of it, free the mbuf associated to the last buffer. * If part of the CRC is also contained in the previous * mbuf, subtract the length of that CRC part from the * data length of the previous mbuf. */ I don't understand why this is necessary, and whether this is just a particularity of this driver or how the feature is supposed to be implemented everywhere. I haven't checked every driver, but it seems like a lot of them do something similar to this. That looks wrong to me too, cc'ed maintainers for comment. That piece of code seems remaining from first upstream of the driver (2012), it is before KEEP_CRC change, looks like it is missed. CRC should be kept in the packet if driver supports it and user requested KEEP_CRC offload. But Rx stats should not include CRC, as it is common to use 'm->pkt_len' for received packet stat, when CRC is in packet that should taken into account for stats.
Re: [PATCH v6] lib/eal: fix segfaults in exiting
On Tue, 11 Oct 2022 13:25:14 +0800 Zhichao Zeng wrote: > This patch closes the 'eal-intr-thread' before memory cleanup in > 'rte_eal_cleanup' to avoid segfaults, and adds a flag to avoid executing > 'rte_eal_cleanup' in the child process which is forked to execute some > test cases(e.g. debug_autotest of dpdk-test This is a test bug, not an DPDK bug. I don't think DPDK should account for misuse of API in this way.
Re: [RFC] net: add experimental UDP encapsulation PMD
On Tue, 11 Oct 2022 08:47:30 +0200 Morten Brørup wrote: > > From: Stephen Hemminger [mailto:step...@networkplumber.org] > > Sent: Tuesday, 11 October 2022 02.10 > > > > This is a new PMD which can be useful to test a DPDK application > > from another test program. The PMD binds to a connected UDP socket > > and expects to receive and send raw Ethernet packets over that > > socket. > > > > This is especially useful for testing envirionments where you > > can't/don't want to give the test driver program route permission. > > > > Signed-off-by: Stephen Hemminger > > --- > > Good idea. > > Multiple queues are supported, but how does the remote application steer > traffic into specific queues (for PMD RX), or identify which queue the packet > was supposed to egress on (for PMD TX)? For Tx it relies on the fact that a UDP socket is idempotent so multiple Tx queues just share a single file descriptor. On Rx, there is no steering, it just has multiple threads reading on the same socket. For testing this simulates multiple receivers being active. > > You could use a range of UDP port numbers for that, so the second queue uses > the UDP port number following the configured port number, etc.. > > Or you could open for feature creep. Here are some thoughts. > > Add a metadata header in front of each packet - this might also allow more > advanced use in the future, e.g. the remote application could set mbuf hash > fields. > > Consider if this PMD somehow can be integrated with the TUN/TAP PMD or > something similar, and through that existing PMD support more advanced NIC > features towards the DPDK application, such as VLAN stripping, GRO, etc.. The other alternative is making a VXLAN driver, which is on my TODO list.
Re: [PATCH v2 1/9] trace: fix mode for new trace point
On Tue, Oct 4, 2022 at 3:14 PM David Marchand wrote:
>
> If an application registers trace points later than rte_eal_init(),
> changes in the trace point mode were not applied.
>
> Fixes: 84c4fae4628f ("trace: implement operation APIs")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
Acked-by: Jerin Jacob
> ---
> lib/eal/common/eal_common_trace.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index f9b187d15f..d5dbc7d667 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -512,6 +512,7 @@ __rte_trace_point_register(rte_trace_point_t *handle,
> const char *name,
> /* Form the trace handle */
> *handle = sz;
> *handle |= trace.nb_trace_points << __RTE_TRACE_FIELD_ID_SHIFT;
> + trace_mode_set(handle, trace.mode);
>
> trace.nb_trace_points++;
> tp->handle = handle;
> --
> 2.37.3
>
Re: [PATCH v2 2/9] trace: fix mode change
On Tue, Oct 4, 2022 at 3:15 PM David Marchand wrote:
>
> The API does not state that changing mode should be refused if no trace
> point is enabled. Remove this limitation.
>
> Fixes: 84c4fae4628f ("trace: implement operation APIs")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
> ---
> app/test/test_trace.c | 3 ---
> lib/eal/common/eal_common_trace.c | 3 ---
> 2 files changed, 6 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index d5dbc7d667..1b86f5d2d2 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -127,9 +127,6 @@ rte_trace_mode_set(enum rte_trace_mode mode)
> {
> struct trace_point *tp;
>
> - if (!rte_trace_is_enabled())
> - return;
Just added pre check to avoid going through this linked list as an optimization.
Since it is in slowpath, your changes are OK.
> -
> STAILQ_FOREACH(tp, &tp_list, next)
> trace_mode_set(tp->handle, mode);
>
> --
> 2.37.3
>
Re: [PATCH v2 3/9] trace: fix leak with regexp
On Tue, Oct 4, 2022 at 3:14 PM David Marchand wrote:
>
> The precompiled buffer initialised in regcomp must be freed before
> leaving rte_trace_regexp.
>
> Fixes: 84c4fae4628f ("trace: implement operation APIs")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
Acked-by: Jerin Jacob
> ---
> Changes since v1:
> - split patch in two, keeping only the backportable fix as patch 3,
>
> ---
> lib/eal/common/eal_common_trace.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index 1b86f5d2d2..1db11e3e14 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -218,8 +218,10 @@ rte_trace_regexp(const char *regex, bool enable)
> rc = rte_trace_point_disable(tp->handle);
> found = 1;
> }
> - if (rc < 0)
> - return rc;
> + if (rc < 0) {
> + found = 0;
> + break;
> + }
> }
> regfree(&r);
>
> --
> 2.37.3
>
Re: [PATCH v2 4/9] trace: rework loop on trace points
On Tue, Oct 4, 2022 at 3:15 PM David Marchand wrote:
>
> Directly skip the block when a trace point does not match the user
> criteria.
>
> Signed-off-by: David Marchand
Acked-by: Jerin Jacob
> ---
> lib/eal/common/eal_common_trace.c | 34 +--
> 1 file changed, 19 insertions(+), 15 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index 1db11e3e14..6b8660c318 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -186,15 +186,18 @@ rte_trace_pattern(const char *pattern, bool enable)
> int rc = 0, found = 0;
>
> STAILQ_FOREACH(tp, &tp_list, next) {
> - if (fnmatch(pattern, tp->name, 0) == 0) {
> - if (enable)
> - rc = rte_trace_point_enable(tp->handle);
> - else
> - rc = rte_trace_point_disable(tp->handle);
> - found = 1;
> + if (fnmatch(pattern, tp->name, 0) != 0)
> + continue;
> +
> + if (enable)
> + rc = rte_trace_point_enable(tp->handle);
> + else
> + rc = rte_trace_point_disable(tp->handle);
> + if (rc < 0) {
> + found = 0;
> + break;
> }
> - if (rc < 0)
> - return rc;
> + found = 1;
> }
>
> return rc | found;
> @@ -211,17 +214,18 @@ rte_trace_regexp(const char *regex, bool enable)
> return -EINVAL;
>
> STAILQ_FOREACH(tp, &tp_list, next) {
> - if (regexec(&r, tp->name, 0, NULL, 0) == 0) {
> - if (enable)
> - rc = rte_trace_point_enable(tp->handle);
> - else
> - rc = rte_trace_point_disable(tp->handle);
> - found = 1;
> - }
> + if (regexec(&r, tp->name, 0, NULL, 0) != 0)
> + continue;
> +
> + if (enable)
> + rc = rte_trace_point_enable(tp->handle);
> + else
> + rc = rte_trace_point_disable(tp->handle);
> if (rc < 0) {
> found = 0;
> break;
> }
> + found = 1;
> }
> regfree(&r);
>
> --
> 2.37.3
>
RE: [PATCH 1/3] sched: fix subport profile id not set correctly
> -Original Message-
> From: Ajmera, Megha
> Sent: Thursday, October 6, 2022 8:01 PM
> To: dev@dpdk.org; Singh, Jasvinder ;
> Dumitrescu, Cristian
> Cc: sta...@dpdk.org
> Subject: [PATCH 1/3] sched: fix subport profile id not set correctly
>
> In rte_sched_subport_config() API, subport_profile_id is not set correctly.
>
> Fixes: ac6fcb841b0f ("sched: update subport rate dynamically")
> Cc: cristian.dumitre...@intel.com
>
> Signed-off-by: Megha Ajmera
> ---
> lib/sched/rte_sched.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
> index c5fa9e4582..c91697131d 100644
> --- a/lib/sched/rte_sched.c
> +++ b/lib/sched/rte_sched.c
> @@ -1257,8 +1257,6 @@ rte_sched_subport_config(struct rte_sched_port
> *port,
>
> n_subports++;
>
> - subport_profile_id = 0;
> -
> /* Port */
> port->subports[subport_id] = s;
>
> --
> 2.25.1
Hi Megha,
Please fix the title to: "sched: fix subport profile ID".
Acked-by: Cristian Dumitrescu
Regards,
Cristian
RE: [PATCH 2/3] sched: removed unused subport field in hqos profile
> -Original Message-
> From: Ajmera, Megha
> Sent: Thursday, October 6, 2022 8:01 PM
> To: dev@dpdk.org; Singh, Jasvinder ;
> Dumitrescu, Cristian
> Cc: sta...@dpdk.org
> Subject: [PATCH 2/3] sched: removed unused subport field in hqos profile
>
> Removed unused subport field from profile.cfg
> Correctly using subport profile id in subport config load.
>
> Fixes: 802d214dc880 ("examples/qos_sched: update subport rate
> dynamically")
> Cc: cristian.dumitre...@intel.com
>
> Signed-off-by: Megha Ajmera
> ---
> examples/qos_sched/cfg_file.c | 2 +-
> examples/qos_sched/profile.cfg | 2 --
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c
> index 3d5d75fcf0..ca871d3287 100644
> --- a/examples/qos_sched/cfg_file.c
> +++ b/examples/qos_sched/cfg_file.c
> @@ -157,7 +157,7 @@ cfg_load_subport_profile(struct rte_cfgfile *cfg,
>
> profiles = rte_cfgfile_num_sections(cfg, "subport profile",
> sizeof("subport profile") - 1);
> - subport_params[0].n_pipe_profiles = profiles;
> + port_params.n_subport_profiles = profiles;
>
> for (i = 0; i < profiles; i++) {
> char sec_name[32];
> diff --git a/examples/qos_sched/profile.cfg
> b/examples/qos_sched/profile.cfg
> index c9ec187c93..e8de101b6c 100644
> --- a/examples/qos_sched/profile.cfg
> +++ b/examples/qos_sched/profile.cfg
> @@ -26,8 +26,6 @@ number of subports per port = 1
> number of pipes per subport = 4096
> queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64
>
> -subport 0-8 = 0; These subports are configured with subport
> profile
> 0
> -
> [subport profile 0]
> tb rate = 125000 ; Bytes per second
> tb size = 100 ; Bytes
> --
> 2.25.1
Hi Megha,
Please fix:
-the title: "sched: fix number of subport profiles".
-add Cc: sta...@dpdk.org, not Cc to me; you need to add me in the "To:" line of
the email
Acked-by: Cristian Dumitrescu
Regards,
Cristian
Re: [PATCH 5/8] trace: fix race in debug dump
On Wed, Sep 21, 2022 at 5:35 PM David Marchand
wrote:
>
> trace->nb_trace_mem_list access must be under trace->lock to avoid
> races with threads allocating/freeing their trace buffers.
>
> Fixes: f6b2d65dcd5d ("trace: implement debug dump")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
Acked-by: Jerin Jacob
> ---
> lib/eal/common/eal_common_trace.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index afc4c6dbe5..5280aa7d62 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -255,10 +255,9 @@ trace_lcore_mem_dump(FILE *f)
> struct __rte_trace_header *header;
> uint32_t count;
>
> - if (trace->nb_trace_mem_list == 0)
> - return;
> -
> rte_spinlock_lock(&trace->lock);
> + if (trace->nb_trace_mem_list == 0)
> + goto out;
> fprintf(f, "nb_trace_mem_list = %d\n", trace->nb_trace_mem_list);
> fprintf(f, "\nTrace mem info\n--\n");
> for (count = 0; count < trace->nb_trace_mem_list; count++) {
> @@ -269,6 +268,7 @@ trace_lcore_mem_dump(FILE *f)
> header->stream_header.lcore_id,
> header->stream_header.thread_name);
> }
> +out:
> rte_spinlock_unlock(&trace->lock);
> }
>
> --
> 2.37.3
>
Re: [PATCH v11 2/5] ethdev: support proactive error handling mode
Hi Andrew, On 2022/10/10 16:47, Andrew Rybchenko wrote: On 10/9/22 12:10, Chengwen Feng wrote: From: Kalesh AP Some PMDs (e.g. hns3) could detect hardware or firmware errors, and try to recover from the errors. In this process, the PMD sets the data path pointers to dummy functions (which will prevent the crash), and also make sure the control path operations failed with retcode -EBUSY. Could you explain why passive mode is not good. Why is proactive better? What are the benefits? IMHO, it would be simpler to have just one error recovery mode. I think the two modes are not good or bad. To a large extent, they are determined by the hardware and software design of the network card chip. Here take the hns3 driver as an examples: During the error recovery, multiple handshakes are required between the driver and the firmware, in addition, the handshake timeout are required. If chose passive mode, the application may not register the callback (and also we found that only ovs-dpdk register the reset event in many DPDK-based opensource software), so the recovery will failed. Furthermore, even if registered the callback, the recovery process involves multiple handshakes which may take too much time to complete, imagine having multiple ports to report the reset time at the same time. (This possibility exists. Consider that the PF is reset due to multiple VFs under the PF.) In this case, many VFs report event, but the event callback is executed sequentially (because there is only one interrupt thread). As a result, later VFs cannot be processed in time, and the reset may fails. In conclusion, the proactive mode is an available troubleshooting method in engineering practice. The above error handling mode is known as RTE_ETH_ERROR_HANDLE_MODE_PROACTIVE (proactive error handling mode). In some service scenarios, application needs to be aware of the event to determine whether to migrate services. So three events were introduced: 1) RTE_ETH_EVENT_ERR_RECOVERING: used to notify the application that it detected an error and the recovery is being started. Upon receiving the event, the application should not invoke any control path APIs until receiving RTE_ETH_EVENT_RECOVERY_SUCCESS or RTE_ETH_EVENT_RECOVERY_FAILED event. 2) RTE_ETH_EVENT_RECOVERY_SUCCESS: used to notify the application that it recovers successful from the error, the PMD already re-configures the port, and the effect is the same as that of the restart operation. 3) RTE_ETH_EVENT_RECOVERY_FAILED: used to notify the application that it recovers failed from the error, the port should not usable anymore. The application should close the port. Signed-off-by: Kalesh AP Signed-off-by: Somnath Kotur Signed-off-by: Chengwen Feng Reviewed-by: Ajit Khaparde The code itself LGTM. I just want to understand why we need it. It should be proved in the description.
Re: [PATCH 7/8] trace: remove limitation on trace point name
On Wed, Sep 21, 2022 at 5:35 PM David Marchand
wrote:
>
> The name of a trace point is provided as a constant string via the
> RTE_TRACE_POINT_REGISTER macro.
> We can rely on the constant string in the binary and simply point at it.
I am not sure about this. If we compile with -Os (optimized for space)
compiler may decide to use stack instead of rodata.
If so, we will have segfaults with specific compiler or compiler build options.
Thoughts?
> There is then no need for a (fixed size) copy.
>
> Signed-off-by: David Marchand
> ---
> lib/eal/common/eal_common_trace.c | 10 +++---
> lib/eal/common/eal_common_trace_utils.c | 2 +-
> lib/eal/common/eal_trace.h | 3 +--
> 3 files changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace.c
> b/lib/eal/common/eal_common_trace.c
> index 5280aa7d62..a2c5a72735 100644
> --- a/lib/eal/common/eal_common_trace.c
> +++ b/lib/eal/common/eal_common_trace.c
> @@ -231,7 +231,7 @@ rte_trace_point_lookup(const char *name)
> return NULL;
>
> STAILQ_FOREACH(tp, &tp_list, next)
> - if (strncmp(tp->name, name, TRACE_POINT_NAME_SIZE) == 0)
> + if (strcmp(tp->name, name) == 0)
> return tp->handle;
>
> return NULL;
> @@ -488,10 +488,7 @@ __rte_trace_point_register(rte_trace_point_t *handle,
> const char *name,
> }
>
> /* Initialize the trace point */
> - if (rte_strscpy(tp->name, name, TRACE_POINT_NAME_SIZE) < 0) {
> - trace_err("name is too long");
> - goto free;
> - }
> + tp->name = name;
>
> /* Copy the accumulated fields description and clear it for the next
> * trace point.
> @@ -513,8 +510,7 @@ __rte_trace_point_register(rte_trace_point_t *handle,
> const char *name,
>
> /* All Good !!! */
> return 0;
> -free:
> - free(tp);
> +
> fail:
> if (trace.register_errno == 0)
> trace.register_errno = rte_errno;
> diff --git a/lib/eal/common/eal_common_trace_utils.c
> b/lib/eal/common/eal_common_trace_utils.c
> index 6340caabbf..9b5a41ca12 100644
> --- a/lib/eal/common/eal_common_trace_utils.c
> +++ b/lib/eal/common/eal_common_trace_utils.c
> @@ -42,7 +42,7 @@ trace_entry_compare(const char *name)
> int count = 0;
>
> STAILQ_FOREACH(tp, tp_list, next) {
> - if (strncmp(tp->name, name, TRACE_POINT_NAME_SIZE) == 0)
> + if (strcmp(tp->name, name) == 0)
> count++;
> if (count > 1) {
> trace_err("found duplicate entry %s", name);
> diff --git a/lib/eal/common/eal_trace.h b/lib/eal/common/eal_trace.h
> index 72a5a461ae..26a18a2c48 100644
> --- a/lib/eal/common/eal_trace.h
> +++ b/lib/eal/common/eal_trace.h
> @@ -24,14 +24,13 @@
>
> #define TRACE_PREFIX_LEN 12
> #define TRACE_DIR_STR_LEN (sizeof("-mm-dd-AM-HH-MM-SS") +
> TRACE_PREFIX_LEN)
> -#define TRACE_POINT_NAME_SIZE 64
> #define TRACE_CTF_MAGIC 0xC1FC1FC1
> #define TRACE_MAX_ARGS 32
>
> struct trace_point {
> STAILQ_ENTRY(trace_point) next;
> rte_trace_point_t *handle;
> - char name[TRACE_POINT_NAME_SIZE];
> + const char *name;
> char *ctf_field;
> };
>
> --
> 2.37.3
>
Re: [PATCH 8/8] trace: remove limitation on directory
On Wed, Sep 21, 2022 at 5:35 PM David Marchand
wrote:
>
> Remove arbitrary limit on 12 characters of the file prefix used for the
> directory where to store the traces.
> Simplify the code by relying on dynamic allocations.
Nice one.
>
> Signed-off-by: David Marchand
Acked-by: Jerin Jacob
> ---
> lib/eal/common/eal_common_trace_utils.c | 68 +
> lib/eal/common/eal_trace.h | 5 +-
> 2 files changed, 25 insertions(+), 48 deletions(-)
>
> diff --git a/lib/eal/common/eal_common_trace_utils.c
> b/lib/eal/common/eal_common_trace_utils.c
> index 9b5a41ca12..9e0fe962de 100644
> --- a/lib/eal/common/eal_common_trace_utils.c
> +++ b/lib/eal/common/eal_common_trace_utils.c
> @@ -87,11 +87,11 @@ trace_uuid_generate(void)
> }
>
> static int
> -trace_session_name_generate(char *trace_dir)
> +trace_session_name_generate(char **trace_dir)
> {
> + char date[sizeof("-mm-dd-AM-HH-MM-SS")];
> struct tm *tm_result;
> time_t tm;
> - int rc;
>
> tm = time(NULL);
> if ((int)tm == -1)
> @@ -101,38 +101,32 @@ trace_session_name_generate(char *trace_dir)
> if (tm_result == NULL)
> goto fail;
>
> - rc = rte_strscpy(trace_dir, eal_get_hugefile_prefix(),
> - TRACE_PREFIX_LEN);
> - if (rc == -E2BIG)
> - rc = TRACE_PREFIX_LEN - 1;
> - trace_dir[rc++] = '-';
> -
> - rc = strftime(trace_dir + rc, TRACE_DIR_STR_LEN - rc,
> - "%Y-%m-%d-%p-%I-%M-%S", tm_result);
> - if (rc == 0) {
> + if (strftime(date, sizeof(date), "%Y-%m-%d-%p-%I-%M-%S", tm_result)
> == 0) {
> errno = ENOSPC;
> goto fail;
> }
>
> - return rc;
> + if (asprintf(trace_dir, "%s-%s", eal_get_hugefile_prefix(), date) ==
> -1)
> + goto fail;
> +
> + return 0;
> fail:
> rte_errno = errno;
> - return -rte_errno;
> + return -1;
> }
>
> static int
> trace_dir_update(const char *str)
> {
> struct trace *trace = trace_obj_get();
> - int rc, remaining;
> -
> - remaining = sizeof(trace->dir) - trace->dir_offset;
> - rc = rte_strscpy(&trace->dir[0] + trace->dir_offset, str, remaining);
> - if (rc < 0)
> - goto fail;
> + char *dir;
> + int rc;
>
> - trace->dir_offset += rc;
> -fail:
> + rc = asprintf(&dir, "%s%s", trace->dir != NULL ? trace->dir : "",
> str);
> + if (rc != -1) {
> + free(trace->dir);
> + trace->dir = dir;
> + }
> return rc;
> }
>
> @@ -246,22 +240,15 @@ eal_trace_mode_args_save(const char *val)
> int
> eal_trace_dir_args_save(char const *val)
> {
> - struct trace *trace = trace_obj_get();
> char *dir_path;
> int rc;
>
> - if (strlen(val) >= sizeof(trace->dir) - 1) {
> - trace_err("input string is too big");
> - return -ENAMETOOLONG;
> - }
> -
> if (asprintf(&dir_path, "%s/", val) == -1) {
> trace_err("failed to copy directory: %s", strerror(errno));
> return -ENOMEM;
> }
>
> rc = trace_dir_update(dir_path);
> -
> free(dir_path);
> return rc;
> }
> @@ -289,10 +276,8 @@ trace_epoch_time_save(void)
> }
>
> static int
> -trace_dir_default_path_get(char *dir_path)
> +trace_dir_default_path_get(char **dir_path)
> {
> - struct trace *trace = trace_obj_get();
> - uint32_t size = sizeof(trace->dir);
> struct passwd *pwd;
> char *home_dir;
>
> @@ -308,8 +293,8 @@ trace_dir_default_path_get(char *dir_path)
> }
>
> /* Append dpdk-traces to directory */
> - if (snprintf(dir_path, size, "%s/dpdk-traces/", home_dir) < 0)
> - return -ENAMETOOLONG;
> + if (asprintf(dir_path, "%s/dpdk-traces/", home_dir) == -1)
> + return -ENOMEM;
>
> return 0;
> }
> @@ -318,25 +303,19 @@ static int
> trace_mkdir(void)
> {
> struct trace *trace = trace_obj_get();
> - char session[TRACE_DIR_STR_LEN];
> static bool already_done;
> - char *dir_path;
> + char *session;
> int rc;
>
> if (already_done)
> return 0;
>
> - if (!trace->dir_offset) {
> - dir_path = calloc(1, sizeof(trace->dir));
> - if (dir_path == NULL) {
> - trace_err("fail to allocate memory");
> - return -ENOMEM;
> - }
> + if (trace->dir == NULL) {
> + char *dir_path;
>
> - rc = trace_dir_default_path_get(dir_path);
> + rc = trace_dir_default_path_get(&dir_path);
> if (rc < 0) {
> trace_err("fail to get default path");
> - free(dir_path);
> return rc;
> }
>
> @@ -354,10 +333,11 @@ trace
Re: [PATCH v5 01/10] memarea: introduce memarea library
On 2022-10-11 01:33, fengchengwen wrote: On 2022/10/11 0:53, Mattias Rönnblom wrote: On 2022-10-08 09:53, fengchengwen wrote: Hi Mattias, Thanks for your review, most will fix in v6. On 2022/10/7 4:15, Mattias Rönnblom wrote: On 2022-10-05 06:09, datshan wrote: From: Chengwen Feng The memarea library is an allocator of variable-size object which based on a memory region. This patch provides create/destroy API. Signed-off-by: Chengwen Feng --- MAINTAINERS | 5 + doc/api/doxy-api-index.md | 3 +- doc/api/doxy-api.conf.in | 1 + doc/guides/prog_guide/index.rst | 1 + doc/guides/prog_guide/memarea_lib.rst | 39 ++ doc/guides/rel_notes/release_22_11.rst | 6 + lib/eal/common/eal_common_log.c | 1 + lib/eal/include/rte_log.h | 1 + lib/memarea/memarea_private.h | 30 + lib/memarea/meson.build | 16 +++ lib/memarea/rte_memarea.c | 157 + lib/memarea/rte_memarea.h | 145 +++ lib/memarea/version.map | 12 ++ lib/meson.build | 1 + 14 files changed, 417 insertions(+), 1 deletion(-) create mode 100644 doc/guides/prog_guide/memarea_lib.rst create mode 100644 lib/memarea/memarea_private.h create mode 100644 lib/memarea/meson.build create mode 100644 lib/memarea/rte_memarea.c create mode 100644 lib/memarea/rte_memarea.h create mode 100644 lib/memarea/version.map diff --git a/MAINTAINERS b/MAINTAINERS index a55b379d73..b9c638221d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1550,6 +1550,11 @@ F: app/test/test_lpm* F: app/test/test_func_reentrancy.c F: app/test/test_xmmt_ops.h +Memarea - EXPERIMENTAL +M: Chengwen Feng +F: lib/memarea +F: doc/guides/prog_guide/memarea_lib.rst + Membership - EXPERIMENTAL M: Yipeng Wang M: Sameh Gobriel diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index de488c7abf..24456604f8 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -62,7 +62,8 @@ The public API headers are grouped by topics: [memzone](@ref rte_memzone.h), [mempool](@ref rte_mempool.h), [malloc](@ref rte_malloc.h), - [memcpy](@ref rte_memcpy.h) + [memcpy](@ref rte_memcpy.h), + [memarea](@ref rte_memarea.h) - **timers**: [cycles](@ref rte_cycles.h), diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in index f0886c3bd1..8334ebcbd6 100644 --- a/doc/api/doxy-api.conf.in +++ b/doc/api/doxy-api.conf.in @@ -53,6 +53,7 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \ @TOPDIR@/lib/latencystats \ @TOPDIR@/lib/lpm \ @TOPDIR@/lib/mbuf \ + @TOPDIR@/lib/memarea \ @TOPDIR@/lib/member \ @TOPDIR@/lib/mempool \ @TOPDIR@/lib/meter \ diff --git a/doc/guides/prog_guide/index.rst b/doc/guides/prog_guide/index.rst index 8564883018..e9015d65e3 100644 --- a/doc/guides/prog_guide/index.rst +++ b/doc/guides/prog_guide/index.rst @@ -37,6 +37,7 @@ Programmer's Guide hash_lib toeplitz_hash_lib efd_lib + memarea_lib member_lib lpm_lib lpm6_lib diff --git a/doc/guides/prog_guide/memarea_lib.rst b/doc/guides/prog_guide/memarea_lib.rst new file mode 100644 index 00..b96dad15f6 --- /dev/null +++ b/doc/guides/prog_guide/memarea_lib.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2022 HiSilicon Limited + +Memarea Library +=== + +Introduction + + +The memarea library provides an allocator of variable-size objects, it is +oriented towards the application layer, which could provides 'region-based +memory management' function [1]. + +The main features are as follows: + +* The default aligement size is ``RTE_CACHE_LINE_SIZE``. + +* The memory region can be initialized from the following memory sources: + a) RTE memory: e.g. invoke ``rte_malloc_socket`` to obtain. b) System API: + e.g. invoke posix_memalign to obtain. c) User provided address: it can be from + extendedd memory as long as it is available. d) User provided memarea: it can + be from another memarea. + +* It provides refcnt feature which could be useful in multi-reader scenario. + +* It supports MT-safe as long as it's specified at creation time. + +Library API Overview + + +The ``rte_memarea_create()`` function is used to create a memarea, the function +returns the pointer to the created memarea or ``NULL`` if the creation failed. + +The ``rte_memarea_destroy()`` function is used to destroy a memarea. + +Reference +- + +[1] https://en.wikipedia.org/wiki/Region-based_memory_management diff --git a/doc/guides/rel_notes/release_22_11
RE: [v3 0/3] FIPS asymmetric validation
> Subject: [v3 0/3] FIPS asymmetric validation > > This patch series adds support in fips_validation app to perform > asymmetric validation. To start with, RSA algorithm is used in > the evaluation. For the key value pairs which is multiprecision > in arithmetic, openssl library is used. > > Changes: > v3: > - patches 5,6 and 7 in v2 are rebased and submitted here. Rebase on latest next-crypto needed as GMAC and CTR are merged. > v2: > - minor fixes in v1 > - addition of digest encoding for fips validation > - addition of message randomization for fips conformance tests. > > Gowrishankar Muthukrishnan (3): > examples/fips_validation: add asymmetric validation > examples/fips_validation: encode digest with hash OID > examples/fips_validation: randomize message for conformance test > > config/meson.build| 6 + > doc/guides/sample_app_ug/fips_validation.rst | 1 + > examples/fips_validation/fips_validation.c| 2 + > examples/fips_validation/fips_validation.h| 51 +- > .../fips_validation/fips_validation_gcm.c | 8 +- > .../fips_validation/fips_validation_rsa.c | 630 ++ > examples/fips_validation/main.c | 546 --- > examples/fips_validation/meson.build | 6 + > 8 files changed, 1154 insertions(+), 96 deletions(-) > create mode 100644 examples/fips_validation/fips_validation_rsa.c > > -- > 2.25.1
Re: [PATCH v5 00/10] dts: ssh connection to a node
On Mon, Sep 26, 2022 at 10:17 AM Juraj Linkeš wrote: > All the necessary code needed to connect to a node in a topology with > a bit more, such as basic logging and some extra useful methods. > > To run the code, modify the config file, conf.yaml and execute ./main.py > from the root dts folder. Here's an example config: > executions: > - system_under_test: "SUT 1" > nodes: > - name: "SUT 1" > hostname: 127.0.0.1 > user: root > password: mypw.change.me > > There are configuration files with a README that help with setting up > the execution/development environment. > > The code only connects to a node. You'll see logs emitted to console > saying where DTS connected. > > There's only a bit of documentation, as there's not much to document. > We'll add some real docs when there's enough functionality to document, > when the HelloWorld testcases is in (point 4 in our roadmap below). What > will be documented later is runtime dependencies and how to set up the DTS > control node environment. > > This is our current roadmap: > 1. Review this patchset and do the rest of the items in parallel, if > possible. > 2. We have extracted the code needed to run the most basic testcase, > HelloWorld, which runs the DPDK Hello World application. We'll split > this along logical/functional boundaries and send after 1 is done. > 3. Once we have 2 applied, we're planning on adding a basic functional > testcase - pf_smoke. This send a bit of traffic, so the big addition is > the software traffic generator, Scapy. There's some work already done on > Traffic generators we'll be sending as a dependence on this patch > series. > 4. After 3, we'll add a basic performance testcase which doesn't use > Scapy, but Trex or Ixia instead. > 5. This is far in the future, but at this point we should have all of > the core functionality in place. What then remains is adding the rest of > the testcases. > > We're already working on items 2-4 and we may send more patches even > before this patch series is accepted if that's beneficial. The new > patches would then depend on this patch. > > This patch, as well as all others in the pipeline, are the result of > extensive DTS workgroup review which happens internally. If you'd like > us to make it more public we'd have no problem with that. > > v3: > Added project config files and developer tools. > Removed locks for parallel nodes, which are not needed now and will be > implemented much later (in a different patch). > > v4: > Minor fixes - added missing Exception and utils function. > > v5: > Reordered commits because the dependencies between commits changed. > Added more developer tools. > Added definitions of DTS testbed elements. > Reworked SSH implementation - split it so that the split between an > abstraction and the actual implementation is clearer. > Modified the directory structure to better organize the current and the > future code. > > Juraj Linkeš (9): > dts: add project tools config > dts: add developer tools > dts: add basic logging facility > dts: add remote session abstraction > dts: add ssh connection module > dts: add node base class > dts: add dts workflow module > dts: add dts executable script > maintainers: add dts maintainers > > Owen Hilyard (1): > dts: add config parser module > > .editorconfig | 2 +- > .gitignore| 9 +- > MAINTAINERS | 5 + > devtools/python-checkpatch.sh | 39 ++ > devtools/python-format.sh | 54 +++ > devtools/python-lint.sh | 26 ++ > doc/guides/contributing/coding_style.rst | 4 +- > dts/.devcontainer/devcontainer.json | 30 ++ > dts/Dockerfile| 39 ++ > dts/README.md | 154 > dts/conf.yaml | 6 + > dts/framework/__init__.py | 4 + > dts/framework/config/__init__.py | 99 + > dts/framework/config/conf_yaml_schema.json| 73 > dts/framework/dts.py | 69 > dts/framework/exception.py| 71 > dts/framework/logger.py | 115 ++ > dts/framework/remote_session/__init__.py | 5 + > .../remote_session/remote_session.py | 100 + > .../remote_session/session_factory.py | 16 + > dts/framework/remote_session/ssh_session.py | 189 ++ > dts/framework/settings.py | 108 ++ > dts/framework/testbed_model/__init__.py | 8 + > dts/framework/testbed_model/node.py | 83 + > dts/framework/utils.py| 31 ++ > dts/main.py | 24 ++ > dts/poetry.lock | 351 ++ > dts/pyproject.toml| 55 +++ > 28 files c
Re: [PATCH v8 1/9] memarea: introduce memarea library
2022-10-11 12:17 (UTC+), Chengwen Feng: [...] > diff --git a/doc/guides/prog_guide/memarea_lib.rst > b/doc/guides/prog_guide/memarea_lib.rst > new file mode 100644 > index 00..85ad57145f > --- /dev/null > +++ b/doc/guides/prog_guide/memarea_lib.rst > @@ -0,0 +1,39 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > +Copyright(c) 2022 HiSilicon Limited > + > +Memarea Library > +=== > + > +Introduction > + > + > +The memarea library provides an allocator of variable-size objects, it is > +oriented towards the application layer, which could provides 'region-based > +memory management' function [1]. > + > +The main features are as follows: > + > +* The allocated object aligned at ``RTE_CACHE_LINE_SIZE`` default. Isn't this an implementation detail? Stating it in the API description limits optimization opportunities. Cache line alignment is good in many cases, but it can also be a waste of space, e.g. for a thread-unsafe region for small objects. Can this limitation only (temporarily?) apply to user memory? Or can the minimal alignment be a property of memarea? > + > +* The memory region can be initialized from the following memory sources: > + a) HEAP: e.g. invoke ``rte_malloc_socket``. b) LIBC: e.g. invoke > + posix_memalign to obtain. c) User memory: it can be from e.g. > rte_extmem_xxx > + as long as it is available. d) Another memarea: it can be allocated from > + another memarea. I think mentioning rte_extmem_xxx() is bogus because user memory does not need to be registered with DPDK (I understand it's an example, but still an unrelated reference). Please format as a list. > + > +* It provides refcnt feature which could be useful in multi-reader scenario. > + > +* It supports MT-safe as long as it's specified at creation time. > + > +Library API Overview > + > + > +The ``rte_memarea_create()`` function is used to create a memarea, the > function > +returns the pointer to the created memarea or ``NULL`` if the creation > failed. > + > +The ``rte_memarea_destroy()`` function is used to destroy a memarea. > + > +Reference > +- > + > +[1] https://en.wikipedia.org/wiki/Region-based_memory_management > diff --git a/doc/guides/rel_notes/release_22_11.rst > b/doc/guides/rel_notes/release_22_11.rst > index 2da8bc9661..f5a67cec7b 100644 > --- a/doc/guides/rel_notes/release_22_11.rst > +++ b/doc/guides/rel_notes/release_22_11.rst > @@ -63,6 +63,12 @@ New Features >In theory this implementation should work with any target based on >``LoongArch`` ISA. > > +* **Added memarea library.** > + > + The memarea library is an allocator of variable-size objects, it is > oriented > + towards the application layer, which could provides 'region-based memory > + management' function. "which could provides" -> "providing" > + > * **Added support for multiple mbuf pools per ethdev Rx queue.** > >The capability allows application to provide many mempools [...]
Re: [PATCH v8 3/9] memarea: support alloc/free/update-refcnt API
2022-10-11 12:17 (UTC+), Chengwen Feng:
> This patch supports rte_memarea_alloc()/rte_memarea_free()/
> rte_memarea_update_refcnt() API.
>
> Signed-off-by: Chengwen Feng
> ---
> doc/guides/prog_guide/memarea_lib.rst | 10 ++
> lib/memarea/memarea_private.h | 3 +
> lib/memarea/rte_memarea.c | 155 ++
> lib/memarea/rte_memarea.h | 56 ++
> lib/memarea/version.map | 3 +
> 5 files changed, 227 insertions(+)
>
> diff --git a/doc/guides/prog_guide/memarea_lib.rst
> b/doc/guides/prog_guide/memarea_lib.rst
> index 85ad57145f..a9c58dc44d 100644
> --- a/doc/guides/prog_guide/memarea_lib.rst
> +++ b/doc/guides/prog_guide/memarea_lib.rst
> @@ -33,6 +33,16 @@ returns the pointer to the created memarea or ``NULL`` if
> the creation failed.
>
> The ``rte_memarea_destroy()`` function is used to destroy a memarea.
>
> +The ``rte_memarea_alloc()`` function is used to alloc one memory object from
> +the memarea.
> +
> +The ``rte_memarea_free()`` function is used to free one memory object which
> +allocated by ``rte_memarea_alloc()``.
> +
> +The ``rte_memarea_update_refcnt()`` function is used to update the memory
> +object's reference count, if the count reaches zero, the memory object will
> +be freed to memarea.
> +
> Reference
> -
>
> diff --git a/lib/memarea/memarea_private.h b/lib/memarea/memarea_private.h
> index 59be9c1d00..f5accf2987 100644
> --- a/lib/memarea/memarea_private.h
> +++ b/lib/memarea/memarea_private.h
> @@ -28,6 +28,9 @@ struct rte_memarea {
> void*area_addr;
> struct memarea_elem_list elem_list;
> struct memarea_elem_list free_list;
> +
> + uint64_t alloc_fails;
> + uint64_t refcnt_check_fails;
> } __rte_cache_aligned;
>
> #endif /* MEMAREA_PRIVATE_H */
> diff --git a/lib/memarea/rte_memarea.c b/lib/memarea/rte_memarea.c
> index 85975029e2..8ad1c0acb5 100644
> --- a/lib/memarea/rte_memarea.c
> +++ b/lib/memarea/rte_memarea.c
> @@ -4,6 +4,7 @@
>
> #include
> #include
> +#include
>
> #include
> #include
> @@ -94,6 +95,8 @@ memarea_alloc_area(const struct rte_memarea_param *init)
> ptr = memarea_alloc_from_libc(init->total_sz);
> else if (init->source == RTE_MEMAREA_SOURCE_USER)
> ptr = init->user_addr;
> + else if (init->source == RTE_MEMAREA_SOURCE_MEMAREA)
> + ptr = rte_memarea_alloc(init->src_memarea, init->total_sz, 0);
>
> if (ptr == NULL)
> RTE_LOG(ERR, MEMAREA, "memarea: %s alloc memory area fail!\n",
> init->name);
> @@ -146,6 +149,8 @@ memarea_free_area(struct rte_memarea *ma)
> rte_free(ma->area_addr);
> else if (ma->init.source == RTE_MEMAREA_SOURCE_LIBC)
> free(ma->area_addr);
> + else if (ma->init.source == RTE_MEMAREA_SOURCE_MEMAREA)
> + rte_memarea_free(ma->init.src_memarea, ma->area_addr);
> }
>
> void
> @@ -156,3 +161,153 @@ rte_memarea_destroy(struct rte_memarea *ma)
> memarea_free_area(ma);
> rte_free(ma);
> }
> +
> +static inline void
> +memarea_lock(struct rte_memarea *ma)
> +{
> + if (ma->init.mt_safe)
> + rte_spinlock_lock(&ma->lock);
> +}
> +
> +static inline void
> +memarea_unlock(struct rte_memarea *ma)
> +{
> + if (ma->init.mt_safe)
> + rte_spinlock_unlock(&ma->lock);
> +}
> +
> +static inline bool
> +memarea_whether_add_node(size_t free_size, size_t need_size)
> +{
> + size_t align_size = RTE_ALIGN_CEIL(need_size, RTE_CACHE_LINE_SIZE);
> + return free_size > align_size && (free_size - align_size) >
> sizeof(struct memarea_elem);
> +}
> +
> +static inline void
> +memarea_add_node(struct rte_memarea *ma, struct memarea_elem *elem, size_t
> need_size)
> +{
> + size_t align_size = RTE_ALIGN_CEIL(need_size, RTE_CACHE_LINE_SIZE);
> + struct memarea_elem *new_elem;
> + new_elem = (struct memarea_elem *)RTE_PTR_ADD(elem, sizeof(struct
> memarea_elem) +
> + align_size);
> + new_elem->size = elem->size - align_size - sizeof(struct memarea_elem);
> + new_elem->magic = MEMAREA_AVAILABLE_ELEM_MAGIC;
> + new_elem->cookie = MEMAREA_AVAILABLE_ELEM_COOKIE;
> + new_elem->refcnt = 0;
> + TAILQ_INSERT_AFTER(&ma->elem_list, elem, new_elem, elem_node);
> + TAILQ_INSERT_AFTER(&ma->free_list, elem, new_elem, free_node);
> + elem->size = align_size;
> +}
> +
> +void *
> +rte_memarea_alloc(struct rte_memarea *ma, size_t size, uint32_t cookie)
> +{
> + struct memarea_elem *elem;
> + void *ptr = NULL;
> +
> + if (unlikely(ma == NULL || size == 0))
> + return NULL;
> +
> + memarea_lock(ma);
> + TAILQ_FOREACH(elem, &ma->free_list, free_node) {
> + if (unlikely(elem->magic != MEMAREA_AVAILABLE_ELEM_MAGIC))
> + break;
> + if (elem->size < size)
> + continue;
> +
Re: [PATCH v8 7/9] memarea: support backup memory mechanism
2022-10-11 12:17 (UTC+), Chengwen Feng: > This patch adds a memarea backup mechanism, where an allocation request > which cannot be met by the current memarea is deferred to its backup > memarea. This is a controversial feature. 1. It violates memarea property of freeing all allocated objects at once when the memarea itself is destroyed. Objects allocated in the backup memarea through the destroyed one will remain. 2. If there was an API to check that the object belongs to a memarea (the check from rte_memarea_update_refcnt() in this patch), it would be trivial to implement this feature on top of memarea API. Nit: "Deferred" is about time -> "forwarded", "delegated", or "handled over". A general note about this series. IMO, libraries should have limited scope and allow composition rather than accumulate features and control their use via options. The core idea of memarea is an allocator within a memory region, a fast one and with low overhead, usable to free all objects at once. This is orthogonal to the question from where the memory comes from. HEAP and LIBC sources could be built on top of USER source, which means that the concept of source is less relevant. Backup mechanism could instead be a way to add memory to the area, in which case HEAP and LIBC memarea would also be expandable. Memarea API could be defined as a structure with callbacks, and different types of memarea could be combined, for example, interlocked memarea on top of expandable memarea on top of memarea with a particular memory management algorithm. I'm not saying we should immediately build all this complexity. On the contrary, I would merge the basic things first, then try to _stack_ new features on top, then look if interfaces emerge that can be used for composition.
Re: [PATCH v8 9/9] app/test: add memarea to malloc-perf-autotest
2022-10-11 12:17 (UTC+), Chengwen Feng: > This patch adds memarea to malloc_perf_autotest. > > Test platform: Kunpeng920 > Test command: dpdk-test -a :7d:00.3 -l 10-12 > Test result: > USER1: Performance: rte_memarea > USER1:Size (B) Runs Alloc (us) Free (us) Total (us) memset (us) > USER1: 64 10.03 0.03 0.06 0.01 > USER1: 128 10.02 0.03 0.05 0.01 > USER1:1024 10.03 0.05 0.07 0.20 > USER1:4096 10.03 0.05 0.07 0.34 > USER1: 65536 10.10 0.08 0.18 2.14 > USER1: 10485766440.10 0.04 0.1429.07 > USER1: 20971523220.10 0.04 0.1457.50 > USER1: 41943041610.12 0.04 0.15 114.50 > USER1:16777216 400.11 0.04 0.15 456.09 > USER1: 1073741824 Interrupted: out of memory. [1] > > Compared with rte_malloc: > USER1: Performance: rte_malloc > USER1:Size (B) Runs Alloc (us) Free (us) Total (us) memset (us) > USER1: 64 10.14 0.07 0.21 0.01 > USER1: 128 10.10 0.05 0.15 0.01 > USER1:1024 10.11 0.18 0.29 0.21 > USER1:4096 10.13 0.39 0.53 0.35 > USER1: 65536 10.17 2.27 2.44 2.15 > USER1: 1048576 1 37.21 71.63 108.8429.08 > USER1: 2097152 1 8831.15160.028991.1763.52 > USER1: 4194304 147131.88413.75 47545.62 173.79 > USER1:16777216 4221 119604.60 2209.73 121814.34 964.42 > USER1: 1073741824 31 335058.32 223369.31 558427.63 62440.87 > > [1] The total-size of the memarea is restricted to avoid creation > failed. This is not a fair comparison: rte_malloc time includes obtaining memory from the system. I think that memarea should have a dedicated benchmark, because eventually it will be interesting to compare memarea with different sources and algorithms. It will be also possible to add DPDK allocator to the comparison by running it for an isolated heap that doesn't grow. (In some distant future it would be cool to make DPDK allocator pluggable!) Some shared code between this benchmark and the new one can be factored out.
[v4 0/3] FIPS asymmetric validation
This patch series adds support in fips_validation app to perform asymmetric validation. To start with, RSA algorithm is used in the evaluation. For the key value pairs which is multiprecision in arithmetic, openssl library is used. Changes: v4: - AES GMAC callback fixes. v3: - patches 5,6 and 7 in v2 are rebased and submitted here. v2: - minor fixes in v1 - addition of digest encoding for fips validation - addition of message randomization for fips conformance tests. Gowrishankar Muthukrishnan (3): examples/fips_validation: add asymmetric validation examples/fips_validation: encode digest with hash OID examples/fips_validation: randomize message for conformance test config/meson.build| 6 + doc/guides/sample_app_ug/fips_validation.rst | 1 + examples/fips_validation/fips_validation.c| 2 + examples/fips_validation/fips_validation.h| 51 +- .../fips_validation/fips_validation_gcm.c | 8 +- .../fips_validation/fips_validation_rsa.c | 630 ++ examples/fips_validation/main.c | 550 --- examples/fips_validation/meson.build | 6 + 8 files changed, 1156 insertions(+), 98 deletions(-) create mode 100644 examples/fips_validation/fips_validation_rsa.c -- 2.25.1
[v4 1/3] examples/fips_validation: add asymmetric validation
Add support for asymmetric crypto validation starting with RSA.
For the generation of crypto values which is multiprecision in
math, openssl library is used only for this purpose.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Brian Dooley
--
v4:
- AES GMAC callback fix.
v3:
- rebased according to cryptodev session rework changes.
v2:
- improved handling priv key type.
---
config/meson.build| 6 +
doc/guides/sample_app_ug/fips_validation.rst | 1 +
examples/fips_validation/fips_validation.c| 2 +
examples/fips_validation/fips_validation.h| 47 +-
.../fips_validation/fips_validation_gcm.c | 8 +-
.../fips_validation/fips_validation_rsa.c | 520 ++
examples/fips_validation/main.c | 472 +---
examples/fips_validation/meson.build | 6 +
8 files changed, 964 insertions(+), 98 deletions(-)
create mode 100644 examples/fips_validation/fips_validation_rsa.c
diff --git a/config/meson.build b/config/meson.build
index 0fc209db01..e82797d206 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -226,6 +226,12 @@ if jansson_dep.found()
dpdk_conf.set('RTE_HAS_JANSSON', 1)
endif
+# check for openssl
+openssl_dep = dependency('openssl', required: false, method: 'pkg-config')
+if openssl_dep.found()
+dpdk_conf.set('RTE_HAS_OPENSSL', 1)
+endif
+
# check for pcap
pcap_dep = dependency('libpcap', required: false, method: 'pkg-config')
pcap_lib = is_windows ? 'wpcap' : 'pcap'
diff --git a/doc/guides/sample_app_ug/fips_validation.rst
b/doc/guides/sample_app_ug/fips_validation.rst
index e8929fdad4..2cf92483d7 100644
--- a/doc/guides/sample_app_ug/fips_validation.rst
+++ b/doc/guides/sample_app_ug/fips_validation.rst
@@ -68,6 +68,7 @@ ACVP
* SHA (1, 256, 384, 512) - AFT, MCT
* TDES-CBC - AFT, MCT
* TDES-ECB - AFT, MCT
+* RSA
Application Information
diff --git a/examples/fips_validation/fips_validation.c
b/examples/fips_validation/fips_validation.c
index dddfd3f9d8..3bb5937805 100644
--- a/examples/fips_validation/fips_validation.c
+++ b/examples/fips_validation/fips_validation.c
@@ -477,6 +477,8 @@ fips_test_parse_one_json_vector_set(void)
else if (strstr(algo_str, "TDES-CBC") ||
strstr(algo_str, "TDES-ECB"))
info.algo = FIPS_TEST_ALGO_TDES;
+ else if (strstr(algo_str, "RSA"))
+ info.algo = FIPS_TEST_ALGO_RSA;
else
return -EINVAL;
diff --git a/examples/fips_validation/fips_validation.h
b/examples/fips_validation/fips_validation.h
index 182cff9a00..7c275403c7 100644
--- a/examples/fips_validation/fips_validation.h
+++ b/examples/fips_validation/fips_validation.h
@@ -44,6 +44,7 @@ enum fips_test_algorithms {
FIPS_TEST_ALGO_HMAC,
FIPS_TEST_ALGO_TDES,
FIPS_TEST_ALGO_SHA,
+ FIPS_TEST_ALGO_RSA,
FIPS_TEST_ALGO_MAX
};
@@ -57,6 +58,9 @@ enum file_types {
enum fips_test_op {
FIPS_TEST_ENC_AUTH_GEN = 1,
FIPS_TEST_DEC_AUTH_VERIF,
+ FIPS_TEST_ASYM_KEYGEN,
+ FIPS_TEST_ASYM_SIGGEN,
+ FIPS_TEST_ASYM_SIGVER
};
#define MAX_LINE_PER_VECTOR16
@@ -80,11 +84,22 @@ struct fips_test_vector {
struct fips_val aad;
} aead;
};
+ struct {
+ struct fips_val seed;
+ struct fips_val signature;
+ struct fips_val e;
+ struct fips_val n;
+ struct fips_val d;
+ struct fips_val p;
+ struct fips_val q;
+ struct fips_val dp;
+ struct fips_val dq;
+ struct fips_val qinv;
+ } rsa;
struct fips_val pt;
struct fips_val ct;
struct fips_val iv;
-
enum rte_crypto_op_status status;
};
@@ -141,6 +156,12 @@ enum fips_sha_test_types {
SHA_MCT
};
+enum fips_rsa_test_types {
+ RSA_AFT = 0,
+ RSA_GDT,
+ RSA_KAT
+};
+
struct aesavs_interim_data {
enum fips_aesavs_test_types test_type;
uint32_t cipher_algo;
@@ -167,8 +188,9 @@ struct ccm_interim_data {
};
struct sha_interim_data {
- enum fips_sha_test_types test_type;
+ /* keep algo always on top as it is also used in asym digest */
enum rte_crypto_auth_algorithm algo;
+ enum fips_sha_test_types test_type;
};
struct gcm_interim_data {
@@ -185,6 +207,14 @@ struct xts_interim_data {
enum xts_tweak_modes tweak_mode;
};
+struct rsa_interim_data {
+ enum rte_crypto_auth_algorithm auth;
+ uint16_t modulo;
+ uint16_t saltlen;
+ enum rte_crypto_rsa_padding_type padding;
+ enum rte_crypto_rsa_priv_key_type privkey;
+};
+
#ifdef USE_JANSSON
/*
* Maximum length of buffer to hold any json string.
@@ -230,6 +260,7 @@ struct fips_test_interim_info {
struct sha_interim_data sha_data;
[v4 3/3] examples/fips_validation: randomize message for conformance test
FIPS conformance tests require randomizing message based on SP 800-106.
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/fips_validation/fips_validation.h| 4 +
.../fips_validation/fips_validation_rsa.c | 112 +-
2 files changed, 115 insertions(+), 1 deletion(-)
diff --git a/examples/fips_validation/fips_validation.h
b/examples/fips_validation/fips_validation.h
index 7c275403c7..eec9616462 100644
--- a/examples/fips_validation/fips_validation.h
+++ b/examples/fips_validation/fips_validation.h
@@ -213,6 +213,7 @@ struct rsa_interim_data {
uint16_t saltlen;
enum rte_crypto_rsa_padding_type padding;
enum rte_crypto_rsa_priv_key_type privkey;
+ uint8_t random_msg;
};
#ifdef USE_JANSSON
@@ -339,6 +340,9 @@ parse_test_tdes_json_init(void);
int
parse_test_rsa_json_init(void);
+
+int
+fips_test_randomize_message(struct fips_val *msg, struct fips_val *rand);
#endif /* USE_JANSSON */
int
diff --git a/examples/fips_validation/fips_validation_rsa.c
b/examples/fips_validation/fips_validation_rsa.c
index d3699f54d0..22c0faf3cb 100644
--- a/examples/fips_validation/fips_validation_rsa.c
+++ b/examples/fips_validation/fips_validation_rsa.c
@@ -19,11 +19,13 @@
#include "fips_validation.h"
+#define CONFORMANCE_JSON_STR "conformance"
#define TESTTYPE_JSON_STR "testType"
#define SIGTYPE_JSON_STR "sigType"
#define MOD_JSON_STR "modulo"
#define HASH_JSON_STR "hashAlg"
#define SALT_JSON_STR "saltLen"
+#define RV_JSON_STR"randomValue"
#define E_JSON_STR "e"
#define N_JSON_STR "n"
@@ -31,6 +33,10 @@
#define MSG_JSON_STR "message"
#define SIG_JSON_STR "signature"
+
+#define RV_BUF_LEN (1024/8)
+#define RV_BIT_LEN (256)
+
#ifdef USE_JANSSON
struct {
uint8_t type;
@@ -259,6 +265,13 @@ prepare_vec_rsa(void)
if (!BN_mod_inverse(qinv, q, p, ctx))
goto err;
+ if (info.interim_info.rsa_data.random_msg) {
+ if (!BN_generate_prime_ex(r, RV_BIT_LEN, 0, NULL, NULL, NULL))
+ goto err;
+
+ parse_uint8_hex_str("", BN_bn2hex(r), &vec.rsa.seed);
+ }
+
parse_uint8_hex_str("", BN_bn2hex(e), &vec.rsa.e);
parse_uint8_hex_str("", BN_bn2hex(p), &vec.rsa.p);
parse_uint8_hex_str("", BN_bn2hex(q), &vec.rsa.q);
@@ -297,6 +310,11 @@ parse_test_rsa_json_interim_writeback(struct fips_val *val)
{
RTE_SET_USED(val);
+ if (info.interim_info.rsa_data.random_msg) {
+ json_object_set_new(json_info.json_write_group, "conformance",
+
json_string("SP800-106"));
+ }
+
if (info.op == FIPS_TEST_ASYM_SIGGEN) {
json_t *obj;
@@ -367,6 +385,14 @@ parse_test_rsa_json_writeback(struct fips_val *val)
writeback_hex_str("", info.one_line_text, &vec.rsa.signature);
obj = json_string(info.one_line_text);
json_object_set_new(json_info.json_write_case, "signature",
obj);
+
+ if (info.interim_info.rsa_data.random_msg) {
+ writeback_hex_str("", info.one_line_text,
&vec.rsa.seed);
+ obj = json_string(info.one_line_text);
+ json_object_set_new(json_info.json_write_case,
"randomValue", obj);
+ json_object_set_new(json_info.json_write_case,
"randomValueLen",
+ json_integer(vec.rsa.seed.len * 8));
+ }
} else if (info.op == FIPS_TEST_ASYM_SIGVER) {
if (vec.status == RTE_CRYPTO_OP_STATUS_SUCCESS)
json_object_set_new(json_info.json_write_case,
"testPassed", json_true());
@@ -406,6 +432,8 @@ parse_interim_str(const char *key, char *src, struct
fips_val *val)
if (i >= RTE_DIM(rsa_auth_algs))
return -EINVAL;
+ } else if (strcmp(key, CONFORMANCE_JSON_STR) == 0) {
+ info.interim_info.rsa_data.random_msg = 1;
} else if (strcmp(key, SALT_JSON_STR) == 0) {
info.interim_info.rsa_data.saltlen = atoi(src);
} else if (strcmp(key, TESTTYPE_JSON_STR) == 0) {
@@ -436,6 +464,83 @@ parse_keygen_e_str(const char *key, char *src, struct
fips_val *val)
return prepare_vec_rsa();
}
+/*
+ * Message randomization function as per NIST SP 800-106.
+ */
+int
+fips_test_randomize_message(struct fips_val *msg, struct fips_val *rand)
+{
+ uint8_t m[FIPS_TEST_JSON_BUF_LEN], rv[RV_BUF_LEN];
+ uint32_t m_bitlen, rv_bitlen, count, remain, i, j;
+ uint16_t rv_len;
+
+ if (!msg->val || !rand->val || rand->len > RV_BUF_LEN
+ || msg->len > FIPS_TEST_JSON_BUF_LEN)
+ return -EINVAL;
+
+ memset(rv, 0, sizeof(rv));
+ memcpy(rv, rand->val, rand->len);
+ rv_bitlen = rand->len * 8;
+ rv_len = rand->len;
+
+ memset(m, 0, sizeof(m));
+ memcpy(m, m
