Re: [PATCH] doc: update Mellanox drivers download link in mlx5 guide

[Thomas Monjalon]

26/02/2022 04:48, Zhiheng Chen:
> The original download link is invalid.
> 
> Signed-off-by: Zhiheng Chen 
> ---
>  doc/guides/nics/mlx5.rst | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index c3cc0c0f41..625d8a2382 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -1385,9 +1385,9 @@ managers on most distributions, this PMD requires 
> Ethernet extensions that
>  may not be supported at the moment (this is a work in progress).
>  
>  `Mellanox OFED
> -`__ 
> and
> +`__ 
> and
>  `Mellanox EN
> -`__
> +`__
>  include the necessary support and should be used in the meantime. For DPDK,
>  only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
>  required from that distribution.

This patch will be mark as non-applicable because it is already fixed
by this patch:
https://patches.dpdk.org/project/dpdk/patch/20220223134834.2840916-3-michae...@nvidia.com/

Thank you anyway

[PATCH V2] compress/mlx5: support out-of-space status

[Raja Zidane]

When trying to dequeue, an OP may fail due to insufficient space for the
OP output, the compressdev API defines out-of-space for OP status.
The driver can detect out-of-space errors and report them to the user.

Check if hw_error_syndrome specifies out-of-space and set the OP
status accordingly.
Also added an error message for a case of missing B-final flag.

Fixes: f8c97babc9f4 ("compress/mlx5: add data-path functions")
Cc: sta...@dpdk.org

Signed-off-by: Raja Zidane 
---
Acked-by: Matan Azrad 
V2: fix implicit switch-case fallthrough
 drivers/common/mlx5/mlx5_prm.h|  5 +
 drivers/compress/mlx5/mlx5_compress.c | 13 -
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index ce3e47059f..44b18225f6 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -262,6 +262,9 @@
 /* Maximum number of DS in WQE. Limited by 6-bit field. */
 #define MLX5_DSEG_MAX 63
 
+/* The 32 bit syndrome offset in struct mlx5_err_cqe. */
+#define MLX5_ERROR_CQE_SYNDROME_OFFSET 52
+
 /* The completion mode offset in the WQE control segment line 2. */
 #define MLX5_COMP_MODE_OFFSET 2
 
@@ -581,6 +584,8 @@ struct mlx5_rdma_write_wqe {
 #define MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX 15u
 #define MLX5_GGA_COMP_LOG_DYNAMIC_SIZE_MAX 15u
 #define MLX5_GGA_COMP_LOG_DYNAMIC_SIZE_MIN 0u
+#define MLX5_GGA_COMP_OUT_OF_SPACE_SYNDROME_BE 0x29D0084
+#define MLX5_GGA_COMP_MISSING_BFINAL_SYNDROME_BE 0x29D0011
 
 struct mlx5_wqe_metadata_seg {
uint32_t mmo_control_31_0; /* mmo_control_63_32 is in ctrl_seg.imm */
diff --git a/drivers/compress/mlx5/mlx5_compress.c 
b/drivers/compress/mlx5/mlx5_compress.c
index 7a482c3fbb..d64a628c74 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -562,7 +562,18 @@ mlx5_compress_cqe_err_handle(struct mlx5_compress_qp *qp,
qp->qp.wqes;
volatile struct mlx5_gga_compress_opaque *opaq = qp->opaque_mr.addr;
 
-   op->status = RTE_COMP_OP_STATUS_ERROR;
+   volatile uint32_t *synd_word = RTE_PTR_ADD(cqe, 
MLX5_ERROR_CQE_SYNDROME_OFFSET);
+   switch (*synd_word) {
+   case MLX5_GGA_COMP_OUT_OF_SPACE_SYNDROME_BE:
+   op->status = RTE_COMP_OP_STATUS_OUT_OF_SPACE_TERMINATED;
+   DRV_LOG(DEBUG, "OUT OF SPACE error, output is bigger than dst 
buffer.");
+   break;
+   case MLX5_GGA_COMP_MISSING_BFINAL_SYNDROME_BE:
+   DRV_LOG(DEBUG, "The last compressed block missed the B-final 
flag; maybe the compressed data is not complete or garbaged?");
+   /* fallthrough */
+   default:
+   op->status = RTE_COMP_OP_STATUS_ERROR;
+   }
op->consumed = 0;
op->produced = 0;
op->output_chksum = 0;
-- 
2.21.0

[PATCH 1/1] doc: add steps to configure VF interface as trusted

[Asaf Penso]

Trusted VF is needed to offload rules with rte_flow to a group
that is bigger than 0.
The configuration is done in two parts: driver and FW.

This patch adds the needed steps to configure a VF to be trusted.

Signed-off-by: Asaf Penso 
Reviewed-by: Raslan Darawsheh 
---
 doc/guides/nics/mlx5.rst | 50 
 1 file changed, 50 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 0a92145796..6d08ae53cb 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -1614,3 +1614,53 @@ both the meters in hierarchy on that flow.
add port meter policy 0 2 g_actions meter mtr_id M / end y_actions end 
r_actions drop / end
create port meter 0 N 2 2 yes 0x 1 0
flow create 0 ingress group 1 pattern eth / end actions meter mtr_id N / end
+
+How to configure a VF as trusted
+
+
+This section demonstrates how to configure a virtual function (VF) interface 
as trusted.
+Trusted VF is needed to offload rules with rte_flow to a group that is bigger 
than 0.
+The configuration is done in two parts: driver and FW.
+
+The procedure below is an example of using a ConnectX-5 adapter card (pf0) 
with 2 VFs:
+
+#. Create 2 VFs on the PF pf0 when in Legacy SR-IOV mode::
+
+   $ echo 2 > /sys/class/net/pf0/device/mlx5_num_vfs
+
+#. Verify the VFs are created:
+
+   .. code-block:: console
+
+  $ lspci | grep Mellanox
+  82:00.0 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5]
+  82:00.1 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5]
+  82:00.2 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5 Virtual Function]
+  82:00.3 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5 Virtual Function]
+
+#. Unbind all VFs. For each VF PCIe, using the following command to unbind the 
driver::
+
+   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/unbind
+
+#. Set the VFs to be trusted for the kernel by using one of the methods below:
+  - Using sysfs file::
+
+$ echo ON | tee /sys/class/net/pf0/device/sriov/0/trust
+$ echo ON | tee /sys/class/net/pf0/device/sriov/1/trust
+
+  - Using “ip link” command::
+
+$ ip link set p0 vf 0 trust on
+$ ip link set p0 vf 1 trust on
+
+#. Configure all VFs using mlxreg::
+
+   $ mlxreg -d /dev/mst/mt4121_pciconf0 --reg_name VHCA_TRUST_LEVEL --yes 
--set "all_vhca=0x1,trust_level=0x1"
+
+   .. note::
+
+  Firmware version used must be >= xx.29.1016 and MFT >= 4.18
+
+#. For each VF PCIe, using the following command to bind the driver::
+
+   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
\ No newline at end of file
-- 
2.18.2

Re: [PATCH] raw/cnxk_gpio: stop device once tests are complete

[Thomas Monjalon]

25/02/2022 15:55, Tomasz Duszynski:
> Started device should eventually be stopped.
> 
> Fixes: 0e6557b448fa ("raw/cnxk_gpio: add self test")
> 
> Signed-off-by: Tomasz Duszynski 
> Reviewed-by: Jerin Jacob Kollanukkaran 

Applied, thanks.

Re: [PATCH 1/1] doc: add steps to configure VF interface as trusted

[Stephen Hemminger]

On Sun, 27 Feb 2022 17:46:17 +0200
Asaf Penso  wrote:

> +#. For each VF PCIe, using the following command to bind the driver::
> +
> +   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
> \ No newline at end of file

Please change your editor and/or git settings so there is a new line
at the end of all text files.

Re: [PATCH v4 1/2] doc/gpus: add cuda.ini into features

[Thomas Monjalon]

25/02/2022 04:12, eagost...@nvidia.com:

The features list were missed when introducing the driver.

Fixes: 1306a73b1958 ("gpu/cuda: introduce CUDA driver")
Cc: sta...@dpdk.org

> Signed-off-by: Elena Agostini 
> ---
>  doc/guides/gpus/features/cuda.ini | 12 
>  1 file changed, 12 insertions(+)
>  create mode 100644 doc/guides/gpus/features/cuda.ini
> 
> diff --git a/doc/guides/gpus/features/cuda.ini 
> b/doc/guides/gpus/features/cuda.ini
> new file mode 100644
> index 00..eb1aff9a80
> --- /dev/null
> +++ b/doc/guides/gpus/features/cuda.ini
> @@ -0,0 +1,12 @@
> +;
> +; Supported features of the 'cuda' gpu driver.
> +;
> +; Refer to default.ini for the full list of available PMD features.
> +;
> +[Features]
> +Get device info= Y
> +Share CPU memory with device   = Y
> +Allocate device memory = Y
> +Free memory= Y
> +CPU map device memory  = Y
> +CPU unmap device memory= Y

The last 2 lines will be moved in the next patch implementing the feature.

Re: [PATCH v4 2/2] gpu/cuda: CPU map GPU memory with GDRCopy

[Thomas Monjalon]

25/02/2022 04:12, eagost...@nvidia.com:
> From: Elena Agostini 
> 
> To enable the gpudev rte_gpu_mem_cpu_map feature to expose
> GPU memory to the CPU, the GPU CUDA driver library needs
> the GDRCopy library and driver.
> 
> If DPDK is built without GDRCopy, the GPU CUDA driver returns
> error if the is invoked rte_gpu_mem_cpu_map.
> 
> All the others GPU CUDA driver functionalities are not affected by
> the absence of GDRCopy, thus this is an optional functionality
> that can be enabled in the GPU CUDA driver.
> 
> CUDA driver documentation has been updated accordingly.
> 
> Signed-off-by: Elena Agostini 
> 
> 

Should be only 3 dashes to be interpreted by git.

> 
> Changelog:
> - Fix checkpatch and doc build issue
> - Added common header to cuda.c and gdrcopy.c

Applied, thanks.

Re: [PATCH 1/1] doc: add steps to configure VF interface as trusted

[Thomas Monjalon]

27/02/2022 17:44, Stephen Hemminger:
> On Sun, 27 Feb 2022 17:46:17 +0200
> Asaf Penso  wrote:
> 
> > +#. For each VF PCIe, using the following command to bind the driver::
> > +
> > +   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
> > \ No newline at end of file
> 
> Please change your editor and/or git settings so there is a new line
> at the end of all text files.

Isn't it a problem with Eclipse editor?

Re: [PATCH v3 2/2] efd: fix uninitialized structure

[Thomas Monjalon]

25/02/2022 10:27, Pablo de Lara:
> Coverity flags that both elements of efd_online_group_entry
> are used uninitialized. This is OK because this structure
> is initially used for starting values, so any value is OK.
> 
> Coverity ID: 375868
> Fixes: 56b6ef874f80 ("efd: new Elastic Flow Distributor library")
> Cc: pablo.de.lara.gua...@intel.com
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Pablo de Lara 
> Acked-by: Yipeng Wang 

Series applied, thanks.

Re: [PATCH] distributor: fix potential overflow bug

[Thomas Monjalon]

17/02/2022 16:24, David Hunt:
> Hi Bruce,
> 
> On 17/2/2022 3:02 PM, Bruce Richardson wrote:
> > Coverity flags the fact that the tag values used in distributor are
> > 32-bit, which means that when we use bit-manipulation to convert a tag
> > match/no-match to a bit in an array, we need to typecast to a 64-bit
> > type before shifting past 32 bits.
> >
> > Coverity issue: 375808
> > Fixes: 08ccf3faa6a9 ("distributor: new packet distributor library")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Bruce Richardson 
> 
> LGTM
> 
> Acked-by: David Hunt 

Applied, thanks.

Re: [PATCH v1] eal/linux: fix memory illegal accesses

[Thomas Monjalon]

23/02/2022 12:26, Ferruh Yigit:
> On 2/23/2022 8:49 AM, Steve Yang wrote:
> > 'recv()' fills the 'buf', later 'strlcpy()' used to copy from this buffer.
> > But as coverity warns 'recv()' doesn't guarantee that 'buf' is
> > null-terminated, but 'strlcpy()' requires it.
> > 
> > Enlarge 'buf' size to 'EAL_UEV_MSG_LEN + 1' and ensure the last one can
> > be set to 0 when received buffer size is EAL_UEV_MSG_LEN.
> > 
> > CID 375864:  Memory - illegal accesses  (STRING_NULL)
> > Passing unterminated string "buf" to "dev_uev_parse", which expects
> > a null-terminated string.
> > 
> > Coverity issue: 375864
> > Fixes: 0d0f478d0483 ("eal/linux: add uevent parse and process")
> > Cc: sta...@dpdk.org
> > 
> > Signed-off-by: Steve Yang 
> 
> Acked-by: Ferruh Yigit 

Applied, thanks.

Re: [PATCH 1/1] doc: add steps to configure VF interface as trusted

[Stephen Hemminger]

On Sun, 27 Feb 2022 18:24:42 +0100
Thomas Monjalon  wrote:

> 27/02/2022 17:44, Stephen Hemminger:
> > On Sun, 27 Feb 2022 17:46:17 +0200
> > Asaf Penso  wrote:
> >   
> > > +#. For each VF PCIe, using the following command to bind the driver::
> > > +
> > > +   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
> > > \ No newline at end of file  
> > 
> > Please change your editor and/or git settings so there is a new line
> > at the end of all text files.  
> 
> Isn't it a problem with Eclipse editor?

It is a configuration option in almost all editors:

Eclipse:
https://www.newt.com/java/eclipse/

Customize code formatting
Go to Windows > Preferences > Java > Code Style > Code Formatter and click on 
the Edit button.

Check New Lines > Insert new line at end of file

https://thoughtbot.com/blog/no-newline-at-end-of-file

Following the rules in your editor
You can make sure you follow this rule easily:

For Vim users, you’re all set out of the box! Just don’t change your eol 
setting.
For Emacs users, add (setq require-final-newline t) to your .emacs or 
.emacs.d/init.el file.
For Android Studio, RubyMine, PyCharm, and other IntelliJ, set “Ensure line 
feed at file end on Save” under “Editor.”
For Atom, you’re also all set out of the box. Keep that via the Whitespace 
plugin.
For VS Code, set "files.insertFinalNewline": true.
For Sublime, set the ensure_newline_at_eof_on_save option to true.
For TextMate, you can install the Avian Missing Bundle and add 
TM_STRIP_WHITESPACE_ON_SAVE = true to your .tm_properties file.

Re: [External] : Re: [PATCH] devargs: Fix crash due to global devargs uninitailization from secondary process

[Thomas Monjalon]

15/02/2022 12:20, Madhuker Mythri:
> From: Ferruh Yigit  
> >On 2/14/2022 5:08 PM, madhuker.myt...@oracle.com wrote:
> >> From: Madhuker Mythri 
> >> 
> >> Failsafe pmd started crashing with global devargs syntax as devargs is 
> >> not memset to zero. Access it to in rte_devargs_parse() resulted in a 
> >> crash when called from secondary process.
> >> 
> >> Bugzilla Id: 933
> >> 
> >> Signed-off-by: Madhuker Mythri 
> >
> >This is duplication of Gaetan's patch:
> >https://urldefense.com/v3/__https://patches.dpdk.org/project/dpdk/patch/20220210170131.2199922-1->gr...@u256.net/__;!!ACWV5N9M2RV99hQ!aE5DMiBds1eptcxnoYR6KWszXGgqYHaQduFAfUDwH4ps-h0eJIQ5Wk2JBZGMFh5DBZSZ$
> > 
> 
> Hi Ferruh,
> 
> Initially, I had filed this bug: https://bugs.dpdk.org/show_bug.cgi?id=933 , 
> as part of the testing on Azure/Hyper-V platforms.
> After analysis, found the root-cause of this crash is due to global devargs 
> un-initialization in failsafe-pmd probe() and published the patch as follows:
> https://patchwork.dpdk.org/project/dpdk/patch/20220210071052.527-1-madhuker.myt...@oracle.com/
> 
> From your review comments got to know, that we can memset inside the 
> rte_devargs_parse(), instead of setting outside before this API call.
> Got delayed in testing the same code changes on Azure/Hyper-V platforms and 
> publishing this patch.
> So, please consider this patch, as I had found the root-cause of this issue 
> and tested on affected platforms.
> 
> Thanks,
> Madhuker.

Applied with these explanations from Gaetan:

devargs: fix crash with uninitialized parsing

The function rte_devargs_parse() previously was safe to call with
non-initialized devargs structure as parameter.

When adding the support for the global device syntax,
this assumption was broken.
Restore it by forcing memset as part of the call itself.

Bugzilla ID: 933
Fixes: b344eb5d941a ("devargs: parse global device syntax")
Cc: sta...@dpdk.org

Signed-off-by: Madhuker Mythri 
Signed-off-by: Gaetan Rivet 

Thanks all

Re: [PATCH] bus/pci: assign driver's pointer before mapping

[Thomas Monjalon]

19/01/2022 15:50, Michal Krawczyk:
> Patch changing the way of accessing interrupt handle also changed order
> of the rte_pci_map_device() call and rte_pci_device:driver assignment.
> It was causing issues with Write Combine mapping on the Linux platform
> if it was used with the igb_uio module.
> 
> Linux implementation of pci_uio_map_resource_by_index(), which is called
> by rte_pci_map_device(), needs access to the device's driver. Otherwise
> it won't be able to check the driver's flags and won't respect them.
> 
> Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")
> Cc: hka...@marvell.com
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Michal Krawczyk 

Looks to be a simple change. I hope there is no side effect.
Applied, thanks.

Re: [PATCH v2] kni: fix use-after-free when kni release

[Thomas Monjalon]

15/02/2022 20:11, Ferruh Yigit:
> On 2/14/2022 6:41 PM, Ferruh Yigit wrote:
> > On 2/9/2022 7:35 AM, Min Hu (Connor) wrote:
> >> From: Huisong Li 
> >>
> >> The "kni_dev" is the private data of the "net_device" in kni, and allocated
> >> with the "net_device" by calling "alloc_netdev()". The "net_device" is
> >> freed by calling "free_netdev()" when kni release. The freed memory
> >> includes the "kni_dev". So After "kni_dev" should not be accessed after
> >> "net_device" is released.
> >>
> > 
> > The problem description looks valid and change looks good to me,
> > 
> > only list_del after remove is like this for years, I wonder how
> > it is not caught until now, or if we are missing something, I
> > want to test some before ack, which I will do in next few days.
> 
> 
> Acked-by: Ferruh Yigit 

Applied, thanks.

Re: [PATCH v4] net/kni: reset rte_kni_conf struct before initialization

[Thomas Monjalon]

+Cc Ferruh

05/12/2021 07:21, Harold Huang:
> When kni driver calls eth_kni_start to start device, some fields such as
> min_mtu and max_mtu of rte_kni_conf are not initialized. It will cause
> kni_ioctl_create create a kni netdevice with a random min_mtu and max_mtu
> value. This isunexpected and in some time we could not change the kni
> device mtu with ip link command.
> 
> Fixes: ff1e35fb5f8 ("kni: calculate MTU from mbuf size")
> Signed-off-by: Harold Huang 
> ---
>  drivers/net/kni/rte_eth_kni.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/net/kni/rte_eth_kni.c b/drivers/net/kni/rte_eth_kni.c
> index c428caf441..23b15edfac 100644
> --- a/drivers/net/kni/rte_eth_kni.c
> +++ b/drivers/net/kni/rte_eth_kni.c
> @@ -128,6 +128,7 @@ eth_kni_start(struct rte_eth_dev *dev)
>   const char *name = dev->device->name + 4; /* remove net_ */
>  
>   mb_pool = internals->rx_queues[0].mb_pool;
> + memset(&conf, 0, sizeof(conf));
>   strlcpy(conf.name, name, RTE_KNI_NAMESIZE);
>   conf.force_bind = 0;
>   conf.group_id = port_id;

Re: [PATCH 2/2] examples: add missing newline at eof

[Thomas Monjalon]

25/02/2022 18:47, Stephen Hemminger:
> The text file did not end with newline.
> 
> Signed-off-by: Stephen Hemminger 

Series applied, thanks for the cleanup.

Could we add a check in checkpatch to avoid it in future?

Re: [PATCH] doc/guides/cryptodev/features: add missing newline at eof

[Thomas Monjalon]

25/02/2022 19:07, Stephen Hemminger:
> Even these are ini files, they should still have new line at
> end of file.
> 
> Signed-off-by: Stephen Hemminger 

Squashed with your other patch for examples, thanks.

Re: [PATCH v3 4/8] lib: document existing free functions

[Thomas Monjalon]

20/02/2022 19:21, Stephen Hemminger:
> + *   If NULL then, the function does nothing.

I'm not English native, but I thought it should be one of these 2 forms:
- If NULL, the function does nothing.
- If NULL then the function does nothing.

release candidate 22.03-rc2

[Thomas Monjalon]

A new DPDK release candidate is ready for testing:
https://git.dpdk.org/dpdk/tag/?id=v22.03-rc2

There are 306 new patches in this snapshot.

Release notes:
https://doc.dpdk.org/guides/rel_notes/release_22_03.html

Highlights of 22.03-rc2:
- ethdev flow API for templates and async operations
- Marvell GPIO driver for CNXK

The driver features should be frozen now.
Please test and report issues on bugs.dpdk.org.

DPDK 22.03-rc3 is expected in one week.

Thank you everyone

Re: [PATCH 2/2] examples: add missing newline at eof

[Stephen Hemminger]

On Sun, 27 Feb 2022 21:27:40 +0100
Thomas Monjalon  wrote:

> 25/02/2022 18:47, Stephen Hemminger:
> > The text file did not end with newline.
> > 
> > Signed-off-by: Stephen Hemminger   
> 
> Series applied, thanks for the cleanup.
> 
> Could we add a check in checkpatch to avoid it in future?
> 
> 

The only tool I saw to find these was
 pcregrep -LMr '\n\Z'

But probably possible with a complex python one-liner...

Re: [PATCH 2/2] examples: add missing newline at eof

[Thomas Monjalon]

27/02/2022 22:32, Stephen Hemminger:
> On Sun, 27 Feb 2022 21:27:40 +0100
> Thomas Monjalon  wrote:
> 
> > 25/02/2022 18:47, Stephen Hemminger:
> > > The text file did not end with newline.
> > > 
> > > Signed-off-by: Stephen Hemminger   
> > 
> > Series applied, thanks for the cleanup.
> > 
> > Could we add a check in checkpatch to avoid it in future?
> 
> The only tool I saw to find these was
>  pcregrep -LMr '\n\Z'
> 
> But probably possible with a complex python one-liner...

It can be done with diff:
diff /dev/null $file | tail -1 | grep '^\\ No newline'

[PATCH v2 0/2] fix udp checksum error

[Kevin Liu]

This patchset fixes two related issues:
* When outer UDP uses HW to calculate the checksum, select basic path to 
  process the package.
* Correctly modify the calculation method of inner and outer L4 offset.

v2:
 - Separate testpmd fix and pmd fix into two patches. 

Kevin Liu (2):
  net/ice: fix Tx offload path choice
  app/testpmd: fix SW L4 checksum in multi-segments

 app/test-pmd/csumonly.c   |  6 +--
 drivers/net/ice/ice_rxtx.c| 41 ++-
 drivers/net/ice/ice_rxtx_vec_common.h | 59 +--
 3 files changed, 34 insertions(+), 72 deletions(-)

-- 
2.33.1

[PATCH v2 1/2] net/ice: fix Tx offload path choice

[Kevin Liu]

Testpmd forwards packets in checksum mode that it needs to calculate
the checksum of each layer's protocol.

When setting the hardware calculates the outer UDP checksum and the
software calculates the outer IP checksum, the dev->tx_pkt_burst in
ice_set_tx_function is set to ice_xmit_pkts_vec_avx2.
The inner and outer UDP checksum of the tunnel packet after forwarding
is wrong.The dev->tx_pkt_burst should be set to ice_xmit_pkts.

The patch adds RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM to
ICE_TX_NO_VECTOR_FLAGS,set dev->tx_pkt_burst to ice_xmit_pkts.After
the tunnel packet is forwarded, the inner and outer UDP checksum is
correct.

At the same time, the patch of "net/ice: fix Tx Checksum offload" will
cause interrupt errors in a special case that only inner IP and inner
UDP checksum are set for hardware calculation.The patch is updating
ICE_TX_NO_VECTOR_FLAGS, the problem can be solved, so I will restore the
code modification of that patch.

Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
Fixes: 295968d17407 ("ethdev: add namespace")
Fixes: 17c7d0f9d6a4 ("net/ice: support basic Rx/Tx")
Cc: sta...@dpdk.org

Signed-off-by: Kevin Liu 
---
 drivers/net/ice/ice_rxtx.c| 41 ++-
 drivers/net/ice/ice_rxtx_vec_common.h | 59 +--
 2 files changed, 31 insertions(+), 69 deletions(-)

diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 4f218bcd0d..041f4bc91f 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -2501,35 +2501,18 @@ ice_txd_enable_checksum(uint64_t ol_flags,
<< ICE_TX_DESC_LEN_MACLEN_S;
 
/* Enable L3 checksum offloads */
-   /*Tunnel package usage outer len enable L3 checksum offload*/
-   if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
-   if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
-   *td_offset |= (tx_offload.outer_l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   } else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
-   *td_offset |= (tx_offload.outer_l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   } else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
-   *td_offset |= (tx_offload.outer_l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   }
-   } else {
-   if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
-   *td_offset |= (tx_offload.l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   } else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
-   *td_offset |= (tx_offload.l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   } else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
-   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
-   *td_offset |= (tx_offload.l3_len >> 2) <<
-   ICE_TX_DESC_LEN_IPLEN_S;
-   }
+   if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
+   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
+   *td_offset |= (tx_offload.l3_len >> 2) <<
+   ICE_TX_DESC_LEN_IPLEN_S;
+   } else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
+   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
+   *td_offset |= (tx_offload.l3_len >> 2) <<
+   ICE_TX_DESC_LEN_IPLEN_S;
+   } else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
+   *td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
+   *td_offset |= (tx_offload.l3_len >> 2) <<
+   ICE_TX_DESC_LEN_IPLEN_S;
}
 
if (ol_flags & RTE_MBUF_F_TX_TCP_SEG) {
diff --git a/drivers/net/ice/ice_rxtx_vec_common.h 
b/drivers/net/ice/ice_rxtx_vec_common.h
index 8ff01046e1..2dd2d83650 100644
--- a/drivers/net/ice/ice_rxtx_vec_common.h
+++ b/drivers/net/ice/ice_rxtx_vec_common.h
@@ -250,7 +250,8 @@ ice_rxq_vec_setup_default(struct ice_rx_queue *rxq)
 #define ICE_TX_NO_VECTOR_FLAGS (   \
RTE_ETH_TX_OFFLOAD_MULTI_SEGS | \
RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |   \
-   RTE_ETH_TX_OFFLOAD_TCP_TSO)
+   RTE_ETH_TX_OFFLOAD_TCP_TSO |\
+   RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM)
 
 #define ICE_TX_VECTOR_OFFLOAD (\
RTE_ETH_TX_OFFLOAD_VLAN_INSERT |\
@@ -364,45 +365,23 @@ ice_txd_enable_offload(struct rte_mbuf *tx_pkt,
uint32_t td_offset = 0;
 
/* Tx Checksum Offload */
-   /*Tunnel package usage outer len enable L2/L3 checksum offlo

[PATCH v2 2/2] app/testpmd: fix SW L4 checksum in multi-segments

[Kevin Liu]

Testpmd forwards packets in checksum mode that it needs to calculate
the checksum of each layer's protocol.

In process_inner_cksums, when parsing tunnel packets, inner L4 offset should be
outer_l2_len + outer_l3_len + l2_len + l3_len.

In process_outer_cksums, when parsing tunnel packets, outer L4 offset should be
outer_l2_len + outer_l3_len.

Fixes: e6b9d6411e91 ("app/testpmd: add SW L4 checksum in multi-segments")
Cc: sta...@dpdk.org

Signed-off-by: Kevin Liu 
---
 app/test-pmd/csumonly.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/app/test-pmd/csumonly.c b/app/test-pmd/csumonly.c
index 02bc3929c7..c235456e58 100644
--- a/app/test-pmd/csumonly.c
+++ b/app/test-pmd/csumonly.c
@@ -513,7 +513,7 @@ process_inner_cksums(void *l3_hdr, const struct 
testpmd_offload_info *info,
ol_flags |= RTE_MBUF_F_TX_UDP_CKSUM;
} else {
if (info->is_tunnel)
-   l4_off = info->l2_len +
+   l4_off = info->outer_l2_len +
 info->outer_l3_len +
 info->l2_len + info->l3_len;
else
@@ -536,7 +536,7 @@ process_inner_cksums(void *l3_hdr, const struct 
testpmd_offload_info *info,
ol_flags |= RTE_MBUF_F_TX_TCP_CKSUM;
} else {
if (info->is_tunnel)
-   l4_off = info->l2_len + info->outer_l3_len +
+   l4_off = info->outer_l2_len + 
info->outer_l3_len +
 info->l2_len + info->l3_len;
else
l4_off = info->l2_len + info->l3_len;
@@ -625,7 +625,7 @@ process_outer_cksums(void *outer_l3_hdr, struct 
testpmd_offload_info *info,
if (udp_hdr->dgram_cksum != 0) {
udp_hdr->dgram_cksum = 0;
udp_hdr->dgram_cksum = get_udptcp_checksum(m, outer_l3_hdr,
-   info->l2_len + info->outer_l3_len,
+   info->outer_l2_len + info->outer_l3_len,
info->outer_ethertype);
}
 
-- 
2.33.1

[dpdk-dev] [PATCH v1 1/1] compress/octeontx: add octeontx2 SoC family support

[Mahipal Challa]

The octeontx2 9xxx SoC family support is added.

Signed-off-by: Mahipal Challa 
---
 drivers/compress/octeontx/include/zip_regs.h | 12 
 drivers/compress/octeontx/otx_zip.c  |  6 +-
 drivers/compress/octeontx/otx_zip.h  |  1 +
 drivers/compress/octeontx/otx_zip_pmd.c  |  6 ++
 4 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/compress/octeontx/include/zip_regs.h 
b/drivers/compress/octeontx/include/zip_regs.h
index 94a48cde66..a7f055 100644
--- a/drivers/compress/octeontx/include/zip_regs.h
+++ b/drivers/compress/octeontx/include/zip_regs.h
@@ -63,6 +63,18 @@ typedef union {
uint64_t reserved_49_63: 15;
 #endif /* Word 0 - End */
} s;
+
+   struct zip_vqx_sbuf_addr_s9x {
+#if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
+   uint64_t reserved_53_63: 11;
+   uint64_t ptr   : 46;
+   uint64_t off   : 7;
+#else /* Word 0 - Little Endian */
+   uint64_t off   : 7;
+   uint64_t ptr   : 46;
+   uint64_t reserved_53_63: 11;
+#endif /* Word 0 - End */
+   } s9x;
 } zip_vqx_sbuf_addr_t;
 
 /**
diff --git a/drivers/compress/octeontx/otx_zip.c 
b/drivers/compress/octeontx/otx_zip.c
index a9046ff351..11471dcbb4 100644
--- a/drivers/compress/octeontx/otx_zip.c
+++ b/drivers/compress/octeontx/otx_zip.c
@@ -58,7 +58,11 @@ zipvf_q_init(struct zipvf_qp *qp)
cmdq->iova = iova;
 
que_sbuf_addr.u = 0ull;
-   que_sbuf_addr.s.ptr = (cmdq->iova >> 7);
+   if (vf->pdev->id.device_id == PCI_DEVICE_ID_OCTEONTX2_ZIPVF)
+   que_sbuf_addr.s9x.ptr = (cmdq->iova >> 7);
+   else
+   que_sbuf_addr.s.ptr = (cmdq->iova >> 7);
+
zip_reg_write64(vf->vbar0, ZIP_VQ_SBUF_ADDR, que_sbuf_addr.u);
 
zip_q_enable(qp);
diff --git a/drivers/compress/octeontx/otx_zip.h 
b/drivers/compress/octeontx/otx_zip.h
index 118a95d738..46c80c8dc2 100644
--- a/drivers/compress/octeontx/otx_zip.h
+++ b/drivers/compress/octeontx/otx_zip.h
@@ -30,6 +30,7 @@ extern int octtx_zip_logtype_driver;
 #define PCI_VENDOR_ID_CAVIUM   0x177D
 /**< PCI device id of ZIP VF */
 #define PCI_DEVICE_ID_OCTEONTX_ZIPVF   0xA037
+#define PCI_DEVICE_ID_OCTEONTX2_ZIPVF  0xA083
 
 /* maximum number of zip vf devices */
 #define ZIP_MAX_VFS 8
diff --git a/drivers/compress/octeontx/otx_zip_pmd.c 
b/drivers/compress/octeontx/otx_zip_pmd.c
index f9b8f7a1ec..dff188e223 100644
--- a/drivers/compress/octeontx/otx_zip_pmd.c
+++ b/drivers/compress/octeontx/otx_zip_pmd.c
@@ -85,7 +85,9 @@ zip_process_op(struct rte_comp_op *op,
op->status = RTE_COMP_OP_STATUS_ERROR;
}
 
+#ifdef ZIP_DBG
ZIP_PMD_INFO("written %d\n", zresult->s.totalbyteswritten);
+#endif
 
/* Update op stats */
switch (op->status) {
@@ -630,6 +632,10 @@ static struct rte_pci_id pci_id_octtx_zipvf_table[] = {
RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
PCI_DEVICE_ID_OCTEONTX_ZIPVF),
},
+   {
+   RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+   PCI_DEVICE_ID_OCTEONTX2_ZIPVF),
+   },
{
.device_id = 0
},
-- 
2.25.1

[dpdk-dev] [PATCH 1/2] common/cnxk: support for CPT second pass flow rules

[psatheesh]

From: Satheesh Paul 

Added support to create flow rules to match packets
from CPT(second pass packets). With this change, ingress
rules will be created with bits 10 and 11 of channel field
in the MCAM ignored by default. For rules specific to
second pass packets, the CPT channel bits will be set
in the MCAM.

Signed-off-by: Satheesh Paul 
---
 drivers/common/cnxk/hw/nix.h|  7 +++-
 drivers/common/cnxk/roc_npc.c   |  9 +++--
 drivers/common/cnxk/roc_npc.h   |  1 +
 drivers/common/cnxk/roc_npc_mcam.c  | 60 -
 drivers/common/cnxk/roc_npc_parse.c | 14 +++
 drivers/common/cnxk/roc_npc_priv.h  |  2 +
 6 files changed, 69 insertions(+), 24 deletions(-)

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index 1cc0c8dfb8..5863e358e0 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -830,7 +830,7 @@
 #define NIX_CHAN_LBKX_CHX(a, b)
\
(0x000ull | ((uint64_t)(a) << 8) | (uint64_t)(b))
 #define NIX_CHAN_CPT_CH_END   (0x4ffull) /* [CN10K, .) */
-#define NIX_CHAN_CPT_CH_START (0x400ull) /* [CN10K, .) */
+#define NIX_CHAN_CPT_CH_START (0x800ull) /* [CN10K, .) */
 #define NIX_CHAN_R4  (0x400ull) /* [CN9K, CN10K) */
 #define NIX_CHAN_R5  (0x500ull)
 #define NIX_CHAN_R6  (0x600ull)
@@ -843,6 +843,11 @@
 #define NIX_CHAN_RPMX_LMACX_CHX(a, b, c)   
\
(0x800ull | ((uint64_t)(a) << 8) | ((uint64_t)(b) << 4) | (uint64_t)(c))
 
+/* The mask is to extract lower 10-bits of channel number
+ * which CPT will pass to X2P.
+ */
+#define NIX_CHAN_CPT_X2P_MASK (0x3ffull)
+
 #define NIX_INTF_SDP  (0x4ull)
 #define NIX_INTF_CGX0 (0x0ull) /* [CN9K, CN10K) */
 #define NIX_INTF_CGX1 (0x1ull) /* [CN9K, CN10K) */
diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index fc88fd58bc..51e36f141f 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -570,10 +570,11 @@ npc_parse_pattern(struct npc *npc, const struct 
roc_npc_item_info pattern[],
  struct roc_npc_flow *flow, struct npc_parse_state *pst)
 {
npc_parse_stage_func_t parse_stage_funcs[] = {
-   npc_parse_meta_items, npc_parse_pre_l2, npc_parse_cpt_hdr,
-   npc_parse_higig2_hdr, npc_parse_la, npc_parse_lb,
-   npc_parse_lc, npc_parse_ld, npc_parse_le,
-   npc_parse_lf, npc_parse_lg, npc_parse_lh,
+   npc_parse_meta_items, npc_parse_mark_item,  npc_parse_pre_l2,
+   npc_parse_cpt_hdr,npc_parse_higig2_hdr, npc_parse_la,
+   npc_parse_lb, npc_parse_lc, npc_parse_ld,
+   npc_parse_le, npc_parse_lf, npc_parse_lg,
+   npc_parse_lh,
};
uint8_t layer = 0;
int key_offset;
diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index 6204139396..aecea37b3d 100644
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -37,6 +37,7 @@ enum roc_npc_item_type {
ROC_NPC_ITEM_TYPE_L3_CUSTOM,
ROC_NPC_ITEM_TYPE_QINQ,
ROC_NPC_ITEM_TYPE_RAW,
+   ROC_NPC_ITEM_TYPE_MARK,
ROC_NPC_ITEM_TYPE_END,
 };
 
diff --git a/drivers/common/cnxk/roc_npc_mcam.c 
b/drivers/common/cnxk/roc_npc_mcam.c
index 9c5ff5e60a..3447b59344 100644
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -497,6 +497,38 @@ npc_mcam_fetch_kex_cfg(struct npc *npc)
return rc;
 }
 
+static void
+npc_mcam_set_channel(struct roc_npc_flow *flow,
+struct npc_mcam_write_entry_req *req, uint16_t channel,
+uint16_t chan_mask, bool is_second_pass)
+{
+   uint16_t chan = 0, mask = 0;
+
+   req->entry_data.kw[0] &= ~(GENMASK(11, 0));
+   req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
+   flow->mcam_data[0] &= ~(GENMASK(11, 0));
+   flow->mcam_mask[0] &= ~(GENMASK(11, 0));
+
+   if (is_second_pass) {
+   chan = (channel | NIX_CHAN_CPT_CH_START);
+   mask = (chan_mask | NIX_CHAN_CPT_CH_START);
+   } else {
+   /*
+* Clear bits 10 & 11 corresponding to CPT
+* channel. By default, rules should match
+* both first pass packets and second pass
+* packets from CPT.
+*/
+   chan = (channel & NIX_CHAN_CPT_X2P_MASK);
+   mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
+   }
+
+   req->entry_data.kw[0] |= (uint64_t)chan;
+   req->entry_data.kw_mask[0] |= (uint64_t)mask;
+   flow->mcam_data[0] |= (uint64_t)chan;
+   flow->mcam_mask[0] |= (uint64_t)mask;
+}
+
 int
 npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,
 struct npc_parse_state *pst)
@@ -564,32 +596,22 @@ npc_mcam_alloc_and_write(struct npc *npc, str

[dpdk-dev] [PATCH 2/2] net/cnxk: support for mark pattern item type

[psatheesh]

From: Satheesh Paul 

Added support for RTE_FLOW_ITEM_TYPE_MARK. This item type
can be used to create ingress flow rules to match packets
from CPT(second pass packets).

Signed-off-by: Satheesh Paul 
---
 doc/guides/nics/cnxk.rst  | 7 +++
 doc/guides/nics/features/cnxk.ini | 1 +
 doc/guides/nics/features/cnxk_vec.ini | 1 +
 doc/guides/nics/features/cnxk_vf.ini  | 1 +
 drivers/net/cnxk/cnxk_flow.c  | 4 +++-
 5 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 31c801fa04..34f6e4d8ee 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -406,6 +406,13 @@ Example usage in testpmd::
testpmd> flow create 0 ingress pattern eth / raw relative is 0 pattern \
   spec ab pattern mask ab offset is 4 / end actions queue index 1 / end
 
+RTE Flow mark item support
+~~
+
+- ``RTE_FLOW_ITEM_TYPE_MARK`` can be used to create ingress flow rules to match
+  packets from CPT(second pass packets). When mark item type is used, it should
+  be the first item in the patterns specification.
+
 Inline device support for CN10K
 ---
 
diff --git a/doc/guides/nics/features/cnxk.ini 
b/doc/guides/nics/features/cnxk.ini
index 0eba334eb4..7cac8beb61 100644
--- a/doc/guides/nics/features/cnxk.ini
+++ b/doc/guides/nics/features/cnxk.ini
@@ -65,6 +65,7 @@ icmp = Y
 ipv4 = Y
 ipv6 = Y
 ipv6_ext = Y
+mark = Y
 mpls = Y
 nvgre= Y
 raw  = Y
diff --git a/doc/guides/nics/features/cnxk_vec.ini 
b/doc/guides/nics/features/cnxk_vec.ini
index df5f358a3e..0803bb3c29 100644
--- a/doc/guides/nics/features/cnxk_vec.ini
+++ b/doc/guides/nics/features/cnxk_vec.ini
@@ -61,6 +61,7 @@ icmp = Y
 ipv4 = Y
 ipv6 = Y
 ipv6_ext = Y
+mark = Y
 mpls = Y
 nvgre= Y
 raw  = Y
diff --git a/doc/guides/nics/features/cnxk_vf.ini 
b/doc/guides/nics/features/cnxk_vf.ini
index a78fbcada0..ed3e231c5f 100644
--- a/doc/guides/nics/features/cnxk_vf.ini
+++ b/doc/guides/nics/features/cnxk_vf.ini
@@ -57,6 +57,7 @@ icmp = Y
 ipv4 = Y
 ipv6 = Y
 ipv6_ext = Y
+mark = Y
 mpls = Y
 nvgre= Y
 raw  = Y
diff --git a/drivers/net/cnxk/cnxk_flow.c b/drivers/net/cnxk/cnxk_flow.c
index 8763ca63d6..ff962c141d 100644
--- a/drivers/net/cnxk/cnxk_flow.c
+++ b/drivers/net/cnxk/cnxk_flow.c
@@ -53,7 +53,9 @@ const struct cnxk_rte_flow_term_info term[] = {
[RTE_FLOW_ITEM_TYPE_HIGIG2] = {ROC_NPC_ITEM_TYPE_HIGIG2,
   sizeof(struct rte_flow_item_higig2_hdr)},
[RTE_FLOW_ITEM_TYPE_RAW] = {ROC_NPC_ITEM_TYPE_RAW,
-   sizeof(struct rte_flow_item_raw)}};
+   sizeof(struct rte_flow_item_raw)},
+   [RTE_FLOW_ITEM_TYPE_MARK] = {ROC_NPC_ITEM_TYPE_MARK,
+sizeof(struct rte_flow_item_mark)}};
 
 static int
 npc_rss_action_validate(struct rte_eth_dev *eth_dev,
-- 
2.25.4

RE: [EXT] [dpdk-dev v5] crypto/openssl: openssl 3.0 support on sym crypto routine

[Namburu, Chandu-babu]

[Public]

Hi Roy Fan,

-Original Message-
From: Zhang, Roy Fan  
Sent: Friday, February 25, 2022 7:21 PM
To: Akhil Goyal ; Ji, Kai ; dev@dpdk.org
Cc: Namburu, Chandu-babu 
Subject: RE: [EXT] [dpdk-dev v5] crypto/openssl: openssl 3.0 support on sym 
crypto routine

Hi Akhil,

> -Original Message-
> From: Akhil Goyal 
> Sent: Friday, February 25, 2022 10:40 AM
> To: Ji, Kai ; dev@dpdk.org
> Cc: Zhang, Roy Fan 
> Subject: RE: [EXT] [dpdk-dev v5] crypto/openssl: openssl 3.0 support 
> on sym crypto routine
> 
> Hi Kai,
> >
> > The warning messages are deprecated APIs warnings from openssl , not 
> > compiler warnings from gcc, the integrity of DPDK remain the same.
> > Alongside openssl pmd, the ccp and qat pmd also raise the same type 
> > of warnings once openssl 3.0 installed.
> >
> > In the current intel roadmap,  we will try to support 3.0 API fully 
> > for openssl
> and
> > qat pmds by the end of year, so this patch is the first step.
> > I think the warning messages are safe to stay, Unfortunately the fix 
> > ccp
> pmd
> > driver is out of our reach.
> >
> 
> When DPDK is compiled with openssl 3.0. I am seeing these errors in 
> compilation.
> So, compilation is broken and we cannot take this patch as is.
> We have few options,
> - fix all of these errors,
> - add exception in meson.build for ignoring these errors.
> - disable/skip compilation of PMDs if openssl version is >3.0
> 
> Adding only one type of APIs does not make sense, if the driver is not 
> compiled.
> 
> In file included from ../drivers/crypto/openssl/openssl_pmd_private.h:12,
>  from ../drivers/crypto/openssl/rte_openssl_pmd.c:16:
> /usr/local/include/openssl/dh.h:223:27: note: declared here
>   223 | OSSL_DEPRECATEDIN_3_0 int DH_generate_key(DH *dh);
>   |   ^~~
> ../drivers/crypto/openssl/rte_openssl_pmd.c: In function
> 'process_openssl_rsa_op':
> ../drivers/crypto/openssl/rte_openssl_pmd.c:2068:3: error:
> 'RSA_public_encrypt' is deprecated: Since OpenSSL 3.0 [- 
> Werror=deprecated-declarations]
>  2068 |   ret = RSA_public_encrypt(op->rsa.message.length,

You are right. We will defer the change to next release so we can send along 
with the asym openssl change Kai is working on. But since we have your 
attention I would want to drag Chandubabu's attention too  as there are three 
PMDs uses deprecated openssl lib APIs: openssl, qat, and ccp. Adding a suppress 
flag to meson build file won't resolve the problem - we need to resolve them 
before the APIs are gone for good.

Thank you for bringing this to our attention, we will work on CCP changes to 
support 3.0 API's.

> 
> Also, avoid top posting of comments!

[PATCH 1/2] net/mlx5: fix overridden flag in flow validation

[Michael Baum]

The AGE action can be implemented by either counters or ASO mechanism.
When user ask count action in the flow rule, AGE action is implemented
by the same counter. However, if user ask indirect count action, it
cannot be used for AGE.

The flow_dv_validate() function has a flag named "shared_count" which
indicates whether AGE action validate is depend on ASO support or not.
This flag is initialized to false and is updated if there is indirect
count action in the action list.
This flag is mistakenly set within the loop that reads the action list
and in each iteration it is reinitialized to false, regardless of the
existence of an indirect count action in the list.

This patch moves the flag initialization out of the loop.

Fixes: f3191849f2c2 ("net/mlx5: support flow count action handle")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 2191ce6e58..de6bf8c660 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -6907,6 +6907,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct 
rte_flow_attr *attr,
const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
const struct rte_flow_item *port_id_item = NULL;
bool def_policy = false;
+   bool shared_count = false;
uint16_t udp_dport = 0;
 
if (items == NULL)
@@ -7284,7 +7285,6 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct 
rte_flow_attr *attr,
}
for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
int type = actions->type;
-   bool shared_count = false;
 
if (!mlx5_flow_os_action_supported(type))
return rte_flow_error_set(error, ENOTSUP,
-- 
2.25.1

[PATCH 0/2] net/mlx5: fix validation of count and AGE actions combination

[Michael Baum]

Fix mistakes done in floe_dv_validate() for count and AGE actions
combination checking.

Michael Baum (2):
  net/mlx5: fix overridden flag in flow validation
  net/mlx5: fix insufficient check in count action validation

 drivers/net/mlx5/mlx5_flow_dv.c | 43 -
 1 file changed, 32 insertions(+), 11 deletions(-)

-- 
2.25.1

[PATCH 2/2] net/mlx5: fix insufficient check in count action validation

[Michael Baum]

The AGE action can be implemented by either counters or ASO mechanism.
ASO is more efficient than generating counters just for the purpose of
aging, so when ASO is supported its use is preferable. On the other
hand, when there is count in the list of actions, the counter is already
generated, and it is best to use it for aging even if ASO is supported.
On the other hand, when the count action is "indirect", it cannot be
used for aging since it may be updated from other flow rules in which it
participates.

Checking whether ASO is supported depends on both the capability of the
device and the flow rule group number, ASO is not supported for group 0.
However, the flow_dv_validate() function only checks the capability and
ignores the group, allowing inadmissible flow rules.
For example, when the device supports ASO and a flow rule is set that
combines an indirect counter with aging for group 0, the rule should be
rejected, but it is created and does not function properly.

This patch updates the counter validation which will also consider the
group number when deciding if there is ASO support.

Fixes: daed4b6e3db2 ("net/mlx5: use aging by counter when counter exists")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/net/mlx5/mlx5_flow_dv.c | 41 +
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index de6bf8c660..e5be435e32 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -3277,6 +3277,25 @@ flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
return 0;
 }
 
+/**
+ * Indicates whether ASO aging is supported.
+ *
+ * @param[in] sh
+ *   Pointer to shared device context structure.
+ * @param[in] attr
+ *   Attributes of flow that includes AGE action.
+ *
+ * @return
+ *   True when ASO aging is supported, false otherwise.
+ */
+static inline bool
+flow_hit_aso_supported(const struct mlx5_dev_ctx_shared *sh,
+   const struct rte_flow_attr *attr)
+{
+   MLX5_ASSERT(sh && attr);
+   return (sh->flow_hit_aso_en && (attr->transfer || attr->group));
+}
+
 /**
  * Validate count action.
  *
@@ -3286,6 +3305,8 @@ flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
  *   Indicator if action is shared.
  * @param[in] action_flags
  *   Holds the actions detected until now.
+ * @param[in] attr
+ *   Attributes of flow that includes this action.
  * @param[out] error
  *   Pointer to error structure.
  *
@@ -3295,6 +3316,7 @@ flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
 static int
 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
  uint64_t action_flags,
+ const struct rte_flow_attr *attr,
  struct rte_flow_error *error)
 {
struct mlx5_priv *priv = dev->data->dev_private;
@@ -3306,10 +3328,10 @@ flow_dv_validate_action_count(struct rte_eth_dev *dev, 
bool shared,
  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
  "duplicate count actions set");
if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
-   !priv->sh->flow_hit_aso_en)
+   !flow_hit_aso_supported(priv->sh, attr))
return rte_flow_error_set(error, EINVAL,
  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
- "old age and shared count combination 
is not supported");
+ "old age and indirect count 
combination is not supported");
 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
return 0;
 #endif
@@ -5679,7 +5701,7 @@ flow_dv_validate_action_sample(uint64_t *action_flags,
case RTE_FLOW_ACTION_TYPE_COUNT:
ret = flow_dv_validate_action_count
(dev, false, *action_flags | sub_action_flags,
-error);
+attr, error);
if (ret < 0)
return ret;
*count = act->conf;
@@ -7441,7 +7463,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct 
rte_flow_attr *attr,
case RTE_FLOW_ACTION_TYPE_COUNT:
ret = flow_dv_validate_action_count(dev, shared_count,
action_flags,
-   error);
+   attr, error);
if (ret < 0)
return ret;
action_flags |= MLX5_FLOW_ACTION_COUNT;
@@ -7756,15 +7778,15 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct 
rte_flow_attr *attr,
return ret;
/*
 

[PATCH v2] doc: add steps to configure VF interface as trusted

[Asaf Penso]

Trusted VF is needed to offload rules with rte_flow to a group
that is bigger than 0.
The configuration is done in two parts: driver and FW.

This patch adds the needed steps to configure a VF to be trusted.

Signed-off-by: Asaf Penso 
Reviewed-by: Raslan Darawsheh 
---
 doc/guides/nics/mlx5.rst | 75 +---
 1 file changed, 63 insertions(+), 12 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index c31a154181..e853d6f6a2 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -498,9 +498,9 @@ Limitations
 
   - c_rsvd0_v: C bit, K bit, S bit
   - protocol type
-  - checksum
-  - key
-  - sequence
+  - Checksum
+  - Key
+  - Sequence
 
   Matching on checksum and sequence needs OFED 5.6+.
 
@@ -847,10 +847,10 @@ for an additional list of options shared with other mlx5 
drivers.
   By default (if the ``tx_pp`` is not specified) send scheduling on timestamps
   feature is disabled.
 
-  Starting with ConnectX-7 the capability to schedule traffic directly
-  on timestamp specified in descriptor is provided,
-  no extra objects are needed anymore and scheduling capability
-  is advertised and handled regardless ``tx_pp`` parameter presence.
+  Starting since ConnectX-7 the capability to schedule traffic directly
+  on timestamp specified in descriptor is provided, no extra objects are
+  needed anymore and scheduling capability is advertised and handled
+  regardless tx_pp parameter presence.
 
 - ``tx_skew`` parameter [int]
 
@@ -963,13 +963,14 @@ for an additional list of options shared with other mlx5 
drivers.
   Value 0 means legacy Verbs flow offloading.
 
   Value 1 enables the DV flow steering assuming it is supported by the
-  driver (requires rdma-core 24 or higher).
+  driver (RDMA Core library version is rdma-core-24.0 or higher).
 
-  Value 2 enables the WQE based hardware steering.
-  In this mode, only queue-based flow management is supported.
+  Value 2 enables the WQE based hardware steering. In this mode only
+  the queue-based rte_flow_q flow management is supported.
 
-  It is configured by default to 1 (DV flow steering) if supported.
-  Otherwise, the value is 0 which indicates legacy Verbs flow offloading.
+  Configured by default to 1 DV flow steering if the driver(RDMA CORE library)
+  supported. Otherwise, the value will be 0 which indicates legacy Verbs flow
+  offloading.
 
 - ``dv_esw_en`` parameter [int]
 
@@ -1613,3 +1614,53 @@ both the meters in hierarchy on that flow.
add port meter policy 0 2 g_actions meter mtr_id M / end y_actions end 
r_actions drop / end
create port meter 0 N 2 2 yes 0x 1 0
flow create 0 ingress group 1 pattern eth / end actions meter mtr_id N / end
+
+How to configure a VF as trusted
+
+
+This section demonstrates how to configure a virtual function (VF) interface 
as trusted.
+Trusted VF is needed to offload rules with rte_flow to a group that is bigger 
than 0.
+The configuration is done in two parts: driver and FW.
+
+The procedure below is an example of using a ConnectX-5 adapter card (pf0) 
with 2 VFs:
+
+#. Create 2 VFs on the PF pf0 when in Legacy SR-IOV mode::
+
+   $ echo 2 > /sys/class/net/pf0/device/mlx5_num_vfs
+
+#. Verify the VFs are created:
+
+   .. code-block:: console
+
+  $ lspci | grep Mellanox
+  82:00.0 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5]
+  82:00.1 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5]
+  82:00.2 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5 Virtual Function]
+  82:00.3 Ethernet controller: Mellanox Technologies MT27800 Family 
[ConnectX-5 Virtual Function]
+
+#. Unbind all VFs. For each VF PCIe, using the following command to unbind the 
driver::
+
+   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/unbind
+
+#. Set the VFs to be trusted for the kernel by using one of the methods below:
+  - Using sysfs file::
+
+$ echo ON | tee /sys/class/net/pf0/device/sriov/0/trust
+$ echo ON | tee /sys/class/net/pf0/device/sriov/1/trust
+
+  - Using “ip link” command::
+
+$ ip link set p0 vf 0 trust on
+$ ip link set p0 vf 1 trust on
+
+#. Configure all VFs using mlxreg::
+
+   $ mlxreg -d /dev/mst/mt4121_pciconf0 --reg_name VHCA_TRUST_LEVEL --yes 
--set "all_vhca=0x1,trust_level=0x1"
+
+   .. note::
+
+  Firmware version used must be >= xx.29.1016 and MFT >= 4.18
+
+#. For each VF PCIe, using the following command to bind the driver::
+
+   $ echo ":82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind
-- 
2.18.2

RE: [PATCH v3] examples/multi_process: reconfigure port when rss or csum isn't supported

[Ling, WeiX]

> -Original Message-
> From: Bruce Richardson 
> Sent: Tuesday, February 22, 2022 5:41 PM
> To: Ma, WenwuX 
> Cc: Burakov, Anatoly ; dev@dpdk.org; Hu,
> Jiayu ; Wang, Yinan ; He,
> Xingguang 
> Subject: Re: [PATCH v3] examples/multi_process: reconfigure port when rss
> or csum isn't supported
> 
> On Tue, Feb 22, 2022 at 10:51:27AM +, Wenwu Ma wrote:
> > The default values of rx mq_mode and rx offloads for port will cause
> > symmetric_mp startup failure if the port do not support rss or csum.
> > This Patch make the app to reconfigure the NIC without them. Only quit
> > the app if the second reconfiguration fails.
> >
> > Signed-off-by: Wenwu Ma 
> > ---
> 
> While I am surprised to see different error codes for different essentially 
> the
> same issue - lack of HW support, that is a separate problem to the one this is
> addressing. Given this is just a sample app, I think this approach is fine for
> configuring things - keeping things simple for the user.
> 
> Acked-by: Bruce Richardson 
> 
Tested-by: Wei Ling 

[PATCH v4] net/ice: improve performance of RX timestamp offload

[Wenjun Wu]

Previously, each time a burst of packets is received, SW reads HW
register and assembles it and the timestamp from descriptor together to
get the complete 64 bits timestamp.

This patch optimizes the algorithm. The SW only needs to check the
monotonicity of the low 32bits timestamp to avoid crossing borders.
Each time before SW receives a burst of packets, it should check the
time difference between current time and last update time to avoid
the low 32 bits timestamp cycling twice.

Signed-off-by: Wenjun Wu 

---
v4: rework initialization behavior
v3: add missing conditional compilation
v2: add conditional compilation
---
 drivers/net/ice/ice_ethdev.h |   3 +
 drivers/net/ice/ice_rxtx.c   | 118 +--
 2 files changed, 88 insertions(+), 33 deletions(-)

diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index 3ed580d438..6778941d7d 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -554,6 +554,9 @@ struct ice_adapter {
struct rte_timecounter tx_tstamp_tc;
bool ptp_ena;
uint64_t time_hw;
+   uint32_t hw_time_high; /* high 32 bits of timestamp */
+   uint32_t hw_time_low; /* low 32 bits of timestamp */
+   uint64_t hw_time_update; /* SW time of HW record updating */
struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS];
struct ice_rss_prof_info rss_prof_info[ICE_MAX_PTGS];
/* True if DCF state of the associated PF is on */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 4f218bcd0d..4b0bcd4863 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -1574,9 +1574,10 @@ ice_rx_scan_hw_ring(struct ice_rx_queue *rxq)
uint64_t pkt_flags = 0;
uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;
 #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
+   bool is_tsinit = false;
+   uint64_t ts_ns;
struct ice_vsi *vsi = rxq->vsi;
struct ice_hw *hw = ICE_VSI_TO_HW(vsi);
-   uint64_t ts_ns;
struct ice_adapter *ad = rxq->vsi->adapter;
 #endif
rxdp = &rxq->rx_ring[rxq->rx_tail];
@@ -1588,8 +1589,14 @@ ice_rx_scan_hw_ring(struct ice_rx_queue *rxq)
if (!(stat_err0 & (1 << ICE_RX_FLEX_DESC_STATUS0_DD_S)))
return 0;
 
-   if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
-   rxq->hw_register_set = 1;
+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
+   if (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {
+   uint64_t sw_cur_time = rte_get_timer_cycles() / 
(rte_get_timer_hz() / 1000);
+
+   if (unlikely(sw_cur_time - ad->hw_time_update > 4))
+   is_tsinit = 1;
+   }
+#endif
 
/**
 * Scan LOOK_AHEAD descriptors at a time to determine which
@@ -1625,14 +1632,26 @@ ice_rx_scan_hw_ring(struct ice_rx_queue *rxq)
rxd_to_pkt_fields_ops[rxq->rxdid](rxq, mb, &rxdp[j]);
 #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
if (ice_timestamp_dynflag > 0) {
-   ts_ns = ice_tstamp_convert_32b_64b(hw, ad,
-   rxq->hw_register_set,
-   
rte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high));
-   rxq->hw_register_set = 0;
+   rxq->time_high =
+   rte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high);
+   if (unlikely(is_tsinit)) {
+   ts_ns = ice_tstamp_convert_32b_64b(hw, 
ad, 1,
+  
rxq->time_high);
+   ad->hw_time_low = (uint32_t)ts_ns;
+   ad->hw_time_high = (uint32_t)(ts_ns >> 
32);
+   is_tsinit = false;
+   } else {
+   if (rxq->time_high < ad->hw_time_low)
+   ad->hw_time_high += 1;
+   ts_ns = (uint64_t)ad->hw_time_high << 
32 | rxq->time_high;
+   ad->hw_time_low = rxq->time_high;
+   }
+   ad->hw_time_update = rte_get_timer_cycles() /
+(rte_get_timer_hz() / 
1000);
*RTE_MBUF_DYNFIELD(mb,
-   ice_timestamp_dynfield_offset,
-   rte_mbuf_timestamp_t *) = ts_ns;
-   mb->ol_flags |= ice_timestamp_dynflag;
+  
ice_timestamp_dynfield_offset,
+  rte_mbuf_timestamp_t *) = 
ts_ns;
+   pkt_flags |= ice_timestamp_dynflag;
}
 
   

RE: [PATCH v5] raw/ifpga: initialize scalar variable before using

[Zhang, Tianfei]

> -Original Message-
> From: Huang, Wei 
> Sent: Monday, February 21, 2022 3:52 PM
> To: dev@dpdk.org; Xu, Rosen ; Zhang, Qi Z
> ; nipun.gu...@nxp.com; hemant.agra...@nxp.com
> Cc: sta...@dpdk.org; Zhang, Tianfei ; Yigit, Ferruh
> ; Huang, Wei 
> Subject: [PATCH v5] raw/ifpga: initialize scalar variable before using
> 
> Scalar variable sub_brg_bdf may be used uninitialized in function
> ifpga_rawdev_fill_info(). It is initialized now in this fix.
> 
> Coverity issue: 375805
> Fixes: 9c006c45d0c5 ("raw/ifpga: scan PCIe BDF device tree")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Wei Huang 
> ---
> v2: add space after comma to meet coding style requirement
> ---
> v3: refine log
> ---
> v4: add coverity issue id
> ---
> v5: use simple initializer
> ---
>  drivers/raw/ifpga/ifpga_rawdev.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/raw/ifpga/ifpga_rawdev.c
> b/drivers/raw/ifpga/ifpga_rawdev.c
> index b73512d..6beecb7 100644
> --- a/drivers/raw/ifpga/ifpga_rawdev.c
> +++ b/drivers/raw/ifpga/ifpga_rawdev.c
> @@ -216,7 +216,7 @@ static int ifpga_rawdev_fill_info(struct ifpga_rawdev
> *ifpga_dev,
>   char dir[1024] = "/sys/devices/";
>   char *c;
>   int ret;
> - char sub_brg_bdf[4][16];
> + char sub_brg_bdf[4][16] = {{0}};
>   int point;
>   DIR *dp = NULL;
>   struct dirent *entry;
> --

It looks good for me.

Acked-by: Tianfei Zhang 

> 1.8.3.1