[PATCH 1/4] examples/ipsec-secgw: update error prints to data path log
Update error prints in data path to RTE_LOG_DP(). Error prints in fast path are not good for performance as they slow down the application when few bad packets are received. Signed-off-by: Nithin Dabilpuram --- examples/ipsec-secgw/ipsec_worker.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c index 7419e85..e9493c5 100644 --- a/examples/ipsec-secgw/ipsec_worker.c +++ b/examples/ipsec-secgw/ipsec_worker.c @@ -332,7 +332,8 @@ process_ipsec_ev_inbound(struct ipsec_ctx *ctx, struct route_table *rt, break; default: - RTE_LOG(ERR, IPSEC, "Unsupported packet type = %d\n", type); + RTE_LOG_DP(DEBUG, IPSEC_ESP, "Unsupported packet type = %d\n", + type); goto drop_pkt_and_exit; } @@ -570,7 +571,8 @@ classify_pkt(struct rte_mbuf *pkt, struct ipsec_traffic *t) t->ip6.pkts[(t->ip6.num)++] = pkt; break; default: - RTE_LOG(ERR, IPSEC, "Unsupported packet type = %d\n", type); + RTE_LOG_DP(DEBUG, IPSEC_ESP, "Unsupported packet type = %d\n", + type); free_pkts(&pkt, 1); break; } -- 2.8.4
[PATCH 2/4] examples/ipsec-secgw: disable Tx chksum offload for inline
Enable Tx IPv4 checksum offload only when Tx inline crypto is needed.
In other cases such as Tx Inline protocol offload, checksum computation
is implicitly taken care by HW. The advantage of having only necessary
offloads enabled is that Tx burst function can be as light as possible.
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/ipsec-secgw.c | 3 ---
examples/ipsec-secgw/sa.c | 9 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c
b/examples/ipsec-secgw/ipsec-secgw.c
index 21abc0d..d8a9bfa 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -2314,9 +2314,6 @@ port_init(uint16_t portid, uint64_t req_rx_offloads,
uint64_t req_tx_offloads)
local_port_conf.txmode.offloads |=
RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
- if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
- local_port_conf.txmode.offloads |=
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
-
printf("port %u configuring rx_offloads=0x%" PRIx64
", tx_offloads=0x%" PRIx64 "\n",
portid, local_port_conf.rxmode.offloads,
diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 1839ac7..b878a48 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -1790,6 +1790,15 @@ sa_check_offloads(uint16_t port_id, uint64_t
*rx_offloads,
RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)
&& rule->portid == port_id) {
*tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY;
+
+ /* Checksum offload is not needed for inline protocol as
+* all processing for Outbound IPSec packets will be
+* implicitly taken care and for non-IPSec packets,
+* there is no need of IPv4 Checksum offload.
+*/
+ if (rule_type == RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO)
+ *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+
if (rule->mss)
*tx_offloads |= RTE_ETH_TX_OFFLOAD_TCP_TSO;
}
--
2.8.4
[PATCH 3/4] examples/ipsec-secgw: fix buffer free logic in vector mode
Fix packet processing to skip after mbuf is freed instead of
touching and Tx'ing it.
Also free vector event buffer in event worker when after processing
there is no pkt to be enqueued to Tx adapter.
Fixes: 86738ebe1e3d ("examples/ipsec-secgw: support event vector")
Cc: scha...@marvell.com
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/ipsec_worker.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec_worker.c
b/examples/ipsec-secgw/ipsec_worker.c
index e9493c5..8639426 100644
--- a/examples/ipsec-secgw/ipsec_worker.c
+++ b/examples/ipsec-secgw/ipsec_worker.c
@@ -205,12 +205,16 @@ check_sp_sa_bulk(struct sp_ctx *sp, struct sa_ctx *sa_ctx,
ip->pkts[j++] = m;
else {
sa = *(struct ipsec_sa **)rte_security_dynfield(m);
- if (sa == NULL)
+ if (sa == NULL) {
free_pkts(&m, 1);
+ continue;
+ }
/* SPI on the packet should match with the one in SA */
- if (unlikely(sa->spi != sa_ctx->sa[res - 1].spi))
+ if (unlikely(sa->spi != sa_ctx->sa[res - 1].spi)) {
free_pkts(&m, 1);
+ continue;
+ }
ip->pkts[j++] = m;
}
@@ -536,6 +540,7 @@ ipsec_ev_route_pkts(struct rte_event_vector *vec, struct
route_table *rt,
RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)) {
RTE_LOG(ERR, IPSEC, "SA type not supported\n");
free_pkts(&pkt, 1);
+ continue;
}
rte_security_set_pkt_metadata(sess->security.ctx,
sess->security.ses, pkt, NULL);
@@ -695,11 +700,13 @@ ipsec_ev_vector_process(struct
lcore_conf_ev_tx_int_port_wrkr *lconf,
ret = process_ipsec_ev_outbound_vector(&lconf->outbound,
&lconf->rt, vec);
- if (ret > 0) {
+ if (likely(ret > 0)) {
vec->nb_elem = ret;
rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,
links[0].event_port_id,
ev, 1, 0);
+ } else {
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
}
}
@@ -720,6 +727,8 @@ ipsec_ev_vector_drv_mode_process(struct eh_event_link_info
*links,
rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,
links[0].event_port_id,
ev, 1, 0);
+ else
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
}
/*
--
2.8.4
[PATCH 4/4] examples/ipsec-secgw: add per port pool and vector pool size
Add support to enable per port packet pool and also override
vector pool size from command line args. This is useful
on some HW to tune performance based on usecase.
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/event_helper.c | 17 ++--
examples/ipsec-secgw/event_helper.h | 2 +
examples/ipsec-secgw/ipsec-secgw.c | 80 -
examples/ipsec-secgw/ipsec-secgw.h | 2 +
examples/ipsec-secgw/ipsec.h| 2 +-
5 files changed, 80 insertions(+), 23 deletions(-)
diff --git a/examples/ipsec-secgw/event_helper.c
b/examples/ipsec-secgw/event_helper.c
index 8947e41..172ab8e 100644
--- a/examples/ipsec-secgw/event_helper.c
+++ b/examples/ipsec-secgw/event_helper.c
@@ -792,8 +792,8 @@ eh_rx_adapter_configure(struct eventmode_conf *em_conf,
uint32_t service_id, socket_id, nb_elem;
struct rte_mempool *vector_pool = NULL;
uint32_t lcore_id = rte_lcore_id();
+ int ret, portid, nb_ports = 0;
uint8_t eventdev_id;
- int ret;
int j;
/* Get event dev ID */
@@ -806,10 +806,21 @@ eh_rx_adapter_configure(struct eventmode_conf *em_conf,
return ret;
}
+ RTE_ETH_FOREACH_DEV(portid)
+ if ((em_conf->eth_portmask & (1 << portid)))
+ nb_ports++;
+
if (em_conf->ext_params.event_vector) {
socket_id = rte_lcore_to_socket_id(lcore_id);
- nb_elem = (nb_bufs_in_pool / em_conf->ext_params.vector_size)
- + 1;
+
+ if (em_conf->vector_pool_sz) {
+ nb_elem = em_conf->vector_pool_sz;
+ } else {
+ nb_elem = (nb_bufs_in_pool /
+ em_conf->ext_params.vector_size) + 1;
+ if (per_port_pool)
+ nb_elem = nb_ports * nb_elem;
+ }
vector_pool = rte_event_vector_pool_create(
"vector_pool", nb_elem, 0,
diff --git a/examples/ipsec-secgw/event_helper.h
b/examples/ipsec-secgw/event_helper.h
index 5be6c62..f3cbe57 100644
--- a/examples/ipsec-secgw/event_helper.h
+++ b/examples/ipsec-secgw/event_helper.h
@@ -183,6 +183,8 @@ struct eventmode_conf {
/**< 64 bit field to specify extended params */
uint64_t vector_tmo_ns;
/**< Max vector timeout in nanoseconds */
+ uint64_t vector_pool_sz;
+ /**< Vector pool size */
};
/**
diff --git a/examples/ipsec-secgw/ipsec-secgw.c
b/examples/ipsec-secgw/ipsec-secgw.c
index d8a9bfa..96da776 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -118,6 +118,8 @@ struct flow_info flow_info_tbl[RTE_MAX_ETHPORTS];
#define CMD_LINE_OPT_EVENT_VECTOR "event-vector"
#define CMD_LINE_OPT_VECTOR_SIZE "vector-size"
#define CMD_LINE_OPT_VECTOR_TIMEOUT"vector-tmo"
+#define CMD_LINE_OPT_VECTOR_POOL_SZ"vector-pool-sz"
+#define CMD_LINE_OPT_PER_PORT_POOL "per-port-pool"
#define CMD_LINE_ARG_EVENT "event"
#define CMD_LINE_ARG_POLL "poll"
@@ -145,6 +147,8 @@ enum {
CMD_LINE_OPT_EVENT_VECTOR_NUM,
CMD_LINE_OPT_VECTOR_SIZE_NUM,
CMD_LINE_OPT_VECTOR_TIMEOUT_NUM,
+ CMD_LINE_OPT_VECTOR_POOL_SZ_NUM,
+ CMD_LINE_OPT_PER_PORT_POOL_NUM,
};
static const struct option lgopts[] = {
@@ -161,6 +165,8 @@ static const struct option lgopts[] = {
{CMD_LINE_OPT_EVENT_VECTOR, 0, 0, CMD_LINE_OPT_EVENT_VECTOR_NUM},
{CMD_LINE_OPT_VECTOR_SIZE, 1, 0, CMD_LINE_OPT_VECTOR_SIZE_NUM},
{CMD_LINE_OPT_VECTOR_TIMEOUT, 1, 0, CMD_LINE_OPT_VECTOR_TIMEOUT_NUM},
+ {CMD_LINE_OPT_VECTOR_POOL_SZ, 1, 0, CMD_LINE_OPT_VECTOR_POOL_SZ_NUM},
+ {CMD_LINE_OPT_PER_PORT_POOL, 0, 0, CMD_LINE_OPT_PER_PORT_POOL_NUM},
{NULL, 0, 0, 0}
};
@@ -234,7 +240,6 @@ struct lcore_conf {
struct rt_ctx *rt6_ctx;
struct {
struct rte_ip_frag_tbl *tbl;
- struct rte_mempool *pool_dir;
struct rte_mempool *pool_indir;
struct rte_ip_frag_death_row dr;
} frag;
@@ -262,6 +267,8 @@ static struct rte_eth_conf port_conf = {
struct socket_ctx socket_ctx[NB_SOCKETS];
+bool per_port_pool;
+
/*
* Determine is multi-segment support required:
* - either frame buffer size is smaller then mtu
@@ -630,12 +637,10 @@ send_fragment_packet(struct lcore_conf *qconf, struct
rte_mbuf *m,
if (proto == IPPROTO_IP)
rc = rte_ipv4_fragment_packet(m, tbl->m_table + len,
- n, mtu_size, qconf->frag.pool_dir,
- qconf->frag.pool_indir);
+ n, mtu_size, m->pool, qconf->frag.pool_indir);
else
rc = rte_ipv6_fragment_packet(m, tbl->m_table + len,
- n, mtu_size, qconf->frag.pool_dir,
- qconf->frag.pool_indir);
+
RE: [PATCH v5 0/2] Add config file support for l3fwd
> > This patchset introduces config file support for l3fwd > > and its lookup methods LPM, FIB, and EM, similar to > > that of l3fwd-acl. This allows for route rules to be > > defined in configuration files and edited there instead > > of in each of the lookup methods hardcoded route tables. > > > > V4: > > * Fix nondeterministic bug of segfault on termination of > > sample app. > > V5: > > * Reintroduce hardcoded tables as to not break dts and > > allow for hardcoded tables to be used if no config > > files presented. > > > > Sean Morrissey (2): > > examples/l3fwd: add config file support for LPM/FIB > > examples/l3fwd: add config file support for EM > > > > doc/guides/sample_app_ug/l3_forward.rst | 89 +++-- > > examples/l3fwd/em_default_v4.cfg| 17 + > > examples/l3fwd/em_default_v6.cfg| 17 + > > examples/l3fwd/l3fwd.h | 41 +++ > > examples/l3fwd/l3fwd_em.c | 471 +--- > > examples/l3fwd/l3fwd_fib.c | 50 +-- > > examples/l3fwd/l3fwd_lpm.c | 315 +++- > > examples/l3fwd/l3fwd_route.h| 41 +++ > > examples/l3fwd/lpm_default_v4.cfg | 17 + > > examples/l3fwd/lpm_default_v6.cfg | 17 + > > examples/l3fwd/main.c | 68 +++- > > 11 files changed, 949 insertions(+), 194 deletions(-) > > create mode 100644 examples/l3fwd/em_default_v4.cfg > > create mode 100644 examples/l3fwd/em_default_v6.cfg > > create mode 100644 examples/l3fwd/lpm_default_v4.cfg > > create mode 100644 examples/l3fwd/lpm_default_v6.cfg > > > > Why not use the DPDK cfgfile library and format? > It is model after standard INI format. It is probably some sort of misunderstanding: This patch doesn't add configuration file for some l3fwd run-time parameters (number of ports/queues, queue/cpu mappings, etc.). It allows user to specify he's own routing table instead of hard-coded ones. For routing table .ini file format is not really suitable. Instead we follow format similar to what is used in other DPDK apps (l3fwd-acl, ipsec-secgw, test-acl, test-fib, test-sad, etc.) for these purposes: list of route entries, each entry occupies exactly one line. As an example: /examples/l3fwd/lpm_default_v4.cfg #Copy of hard-coded IPv4 FWD table for L3FWD LPM R198.18.0.0/24 0 R198.18.1.0/24 1 R198.18.2.0/24 2 R198.18.3.0/24 3 I suppose it is self-explanatory, intuitive and close enough to what user used for with unix-like route config tools. Konstantin
Re: [PATCH 5/6] eal/windows: fix the curly braces mismatch problem
2022-02-06 08:44 (UTC+0800), Weiguo Li:
> Supplement the first half of braces for the extern "C" block
>
> Fixes: 99a2dd955fba6 ("lib: remove librte_ prefix from directory names")
> Cc: bruce.richard...@intel.com
>
> Signed-off-by: Weiguo Li
> ---
> lib/eal/windows/include/dirent.h | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/lib/eal/windows/include/dirent.h
> b/lib/eal/windows/include/dirent.h
> index 34eb077f8c..0a399d3145 100644
> --- a/lib/eal/windows/include/dirent.h
> +++ b/lib/eal/windows/include/dirent.h
> @@ -28,6 +28,10 @@
> #include
> #include
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /* Maximum length of file name */
> #if !defined(PATH_MAX)
> # define PATH_MAX MAX_PATH
This file is not public, used only from DPDK C code.
Rather then adding the opening part, the closing part should be removed.
The "Fixes" tag is incorrect, should be:
Fixes: 6e1ed4cbbe99 ("eal/windows: add dirent implementation")
Cc: pallavi.ka...@intel.com
Re: [PATCH 13/16] eal: add define guards to avoid multi-inclusion
2022-02-06 11:58 (UTC+0800), Weiguo Li:
> Supplement define guards to prevent multiple inclusion.
>
> Signed-off-by: Weiguo Li
> ---
> lib/eal/include/rte_eal_paging.h| 5 +
> lib/eal/windows/include/rte_virt2phys.h | 5 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/lib/eal/include/rte_eal_paging.h
> b/lib/eal/include/rte_eal_paging.h
> index c60317d0f5..0ee5dd467f 100644
> --- a/lib/eal/include/rte_eal_paging.h
> +++ b/lib/eal/include/rte_eal_paging.h
> @@ -2,6 +2,9 @@
> * Copyright(c) 2020 Dmitry Kozlyuk
> */
>
> +#ifndef _RTE_EAL_PAGING_H_
> +#define _RTE_EAL_PAGING_H_
> +
> #include
>
> #include
> @@ -96,3 +99,5 @@ rte_mem_page_size(void);
> __rte_internal
> int
> rte_mem_lock(const void *virt, size_t size);
> +
> +#endif /* _RTE_EAL_PAGING_H_ */
> diff --git a/lib/eal/windows/include/rte_virt2phys.h
> b/lib/eal/windows/include/rte_virt2phys.h
> index 4bb2b4aafe..06992f208d 100644
> --- a/lib/eal/windows/include/rte_virt2phys.h
> +++ b/lib/eal/windows/include/rte_virt2phys.h
> @@ -2,6 +2,9 @@
> * Copyright (c) 2020 Dmitry Kozlyuk
> */
>
> +#ifndef _RTE_VIRT2PHYS_H_
> +#define _RTE_VIRT2PHYS_H_
> +
> /**
> * @file virt2phys driver interface
> */
> @@ -32,3 +35,5 @@ DEFINE_GUID(GUID_DEVINTERFACE_VIRT2PHYS,
> */
> #define IOCTL_VIRT2PHYS_TRANSLATE CTL_CODE( \
> VIRT2PHYS_DEVTYPE, 0x800, METHOD_BUFFERED, FILE_ANY_ACCESS)
> +
> +#endif /* _RTE_VIRT2PHYS_H_ */
Acked-by: Dmitry Kozlyuk
Probably should have:
Fixes: 2a5d547a4a9b ("eal/windows: implement basic memory management")
Cc: dmitry.kozl...@gmail.com
[Bug 934] crypto_aesni_mb PMD found crash in access mb_mgr on primary process after secondary process launch scan/probe
https://bugs.dpdk.org/show_bug.cgi?id=934 Bug ID: 934 Summary: crypto_aesni_mb PMD found crash in access mb_mgr on primary process after secondary process launch scan/probe Product: DPDK Version: 20.11 Hardware: x86 OS: Linux Status: UNCONFIRMED Severity: normal Priority: Normal Component: cryptodev Assignee: dev@dpdk.org Reporter: changchun.zh...@oracle.com Target Milestone: --- This is a bug for AESNI_MB PMD in DPDK 20.11. The issue may have been resolved in latest DPDK, but wondering if a patch can be applied for 20.11. The AESNI_MB PMD in DPDK 20.11 does not work well in supporting multi-process. The crash can be seen by this sequence: 1. The crypto_aesni_mb is started successfuly on primary process by rte_vdev_init. 2. The secondary process launches the scanning/prob procedure and the primary process received the sync req and replied the secondary process. The crypto_aesni_mb is also started by the probe on receiving the reply of the vdev_scan. 3. On primary process, the packet process tries to create the crypto session and it crashes on accessing the mb_mgr of dev->data->dev_private, in aesni_mb_set_session_auth_parameters() It is found in cryptodev_aesni_mb_create(), mb_mgr = alloc_init_mb_mgr(vector_mode); can be triggered on both primary process and second process. Thus after the device is started on primary, the dev->data->dev_private->mb_mgr can be updated when second process started the device again. This is incorrect. The mb_mgr allocation should be limited to primary process. The same should be applied to the qp->mb_mgr when setup the queue pair. -- You are receiving this mail because: You are the assignee for the bug.
[Bug 935] aesni_mb_pmd does not trigger parallel processing for multiple jobs
https://bugs.dpdk.org/show_bug.cgi?id=935
Bug ID: 935
Summary: aesni_mb_pmd does not trigger parallel processing for
multiple jobs
Product: DPDK
Version: 20.11
Hardware: x86
OS: Linux
Status: UNCONFIRMED
Severity: major
Priority: Normal
Component: cryptodev
Assignee: dev@dpdk.org
Reporter: changchun.zh...@oracle.com
Target Milestone: ---
The issue exists in DPDK 20.11 and later.
The intel-ipsec-mb library supports gathering multiple jobs and process the
multi-jobs in parallel. However in the current aesni_mb_pmd, the
aesni_mb_dequeue_burst() has a bug which leads to the intel-ipsec-mb does not
run in parallel mode at all. Each time the a crypto op is dequeued from the
ring, the aes_mb_dequeu_burst() will call the flush_mb_mgr directly to finish
this job processing.
In detail:
static uint16_t
aesni_mb_dequeue_burst(void *queue_pair, struct rte_crypto_op **ops,
uint16_t nb_ops)
{
struct ipsec_mb_qp *qp = queue_pair;
IMB_MGR *mb_mgr = qp->mb_mgr;
struct rte_crypto_op *op;
IMB_JOB *job;
int retval, processed_jobs = 0;
if (unlikely(nb_ops == 0 || mb_mgr == NULL))
return 0;
uint8_t digest_idx = qp->digest_idx;
do {
/* Get next free mb job struct from mb manager */
job = IMB_GET_NEXT_JOB(mb_mgr);
..
retval = rte_ring_dequeue(qp->ingress_queue, (void **)&op);
..
job = IMB_SUBMIT_JOB(mb_mgr);
..
if (job)
processed_jobs += handle_completed_jobs(qp, mb_mgr,
job, &ops[processed_jobs],
nb_ops - processed_jobs);
} while (processed_jobs < nb_ops);
if (processed_jobs < 1)
processed_jobs += flush_mb_mgr(qp, mb_mgr,
&ops[processed_jobs],
nb_ops - processed_jobs);
return processed_jobs;
}
After submit the first job, the intel-mb-ipsec library does process this job as
it is waiting enough jobs submitted, however, in this pmd, it triggers the
flush_mb_mgr() if the first submitted job is not processed. Consequently, the
parallel processing is always not happening. We are actually processing the
packet in single buffer mode.
During the debug test, I have to disable below code
if (processed_jobs < 1)
processed_jobs += flush_mb_mgr(qp, mb_mgr,
&ops[processed_jobs],
nb_ops - processed_jobs);
for intel-mb-ipsec to gather enough jobs to launch prarallel processing.
--
You are receiving this mail because:
You are the assignee for the bug.
RE: [PATCH v2 1/1] vhost: integrate dmadev in asynchronous datapath
Hi Maxime,
Thanks for your comments. Please see replies inline.
> -Original Message-
> From: Maxime Coquelin
> Sent: Thursday, February 3, 2022 9:04 PM
> To: Hu, Jiayu ; dev@dpdk.org
> Cc: i.maxim...@ovn.org; Xia, Chenbo ; Richardson,
> Bruce ; Van Haaren, Harry
> ; Pai G, Sunil ;
> Mcnamara, John ; Ding, Xuan
> ; Jiang, Cheng1 ;
> lian...@liangbit.com
> Subject: Re: [PATCH v2 1/1] vhost: integrate dmadev in asynchronous
> datapath
>
> Hi Jiayu,
>
> On 1/24/22 17:40, Jiayu Hu wrote:
> > Since dmadev is introduced in 21.11, to avoid the overhead of vhost
> > DMA abstraction layer and simplify application logics, this patch
> > integrates dmadev in asynchronous data path.
> >
> > Signed-off-by: Jiayu Hu
> > Signed-off-by: Sunil Pai G
> > ---
> > doc/guides/prog_guide/vhost_lib.rst | 95 -
> > examples/vhost/Makefile | 2 +-
> > examples/vhost/ioat.c | 218
> > examples/vhost/ioat.h | 63 --
> > examples/vhost/main.c | 255 ++-
> > examples/vhost/main.h | 11 +
> > examples/vhost/meson.build | 6 +-
> > lib/vhost/meson.build | 2 +-
> > lib/vhost/rte_vhost.h | 2 +
> > lib/vhost/rte_vhost_async.h | 132 +---
> > lib/vhost/version.map | 3 +
> > lib/vhost/vhost.c | 148 ++
> > lib/vhost/vhost.h | 64 +-
> > lib/vhost/vhost_user.c | 2 +
> > lib/vhost/virtio_net.c | 305 +++-
> > 15 files changed, 744 insertions(+), 564 deletions(-)
> > delete mode 100644 examples/vhost/ioat.c
> > delete mode 100644 examples/vhost/ioat.h
> >
>
> When you rebase to the next version, please ensure to rework all the logs to
> follow the new standard:
> VHOST_LOG_CONFIG(ERR,"(%s) .", dev->ifname, ...);
Sure, will do.
>
> > git a/lib/vhost/rte_vhost_async.h b/lib/vhost/rte_vhost_async.h index
> > a87ea6ba37..758a80f403 100644
> > --- a/lib/vhost/rte_vhost_async.h
> > +++ b/lib/vhost/rte_vhost_async.h
> > @@ -26,73 +26,6 @@ struct rte_vhost_iov_iter {
> > unsigned long nr_segs;
> > };
> >
> > -/**
> > - * dma transfer status
> > - */
> > -struct rte_vhost_async_status {
> > - /** An array of application specific data for source memory */
> > - uintptr_t *src_opaque_data;
> > - /** An array of application specific data for destination memory */
> > - uintptr_t *dst_opaque_data;
> > -};
> > -
> > -/**
> > - * dma operation callbacks to be implemented by applications
> > - */
> > -struct rte_vhost_async_channel_ops {
> > - /**
> > -* instruct async engines to perform copies for a batch of packets
> > -*
> > -* @param vid
> > -* id of vhost device to perform data copies
> > -* @param queue_id
> > -* queue id to perform data copies
> > -* @param iov_iter
> > -* an array of IOV iterators
> > -* @param opaque_data
> > -* opaque data pair sending to DMA engine
> > -* @param count
> > -* number of elements in the "descs" array
> > -* @return
> > -* number of IOV iterators processed, negative value means error
> > -*/
> > - int32_t (*transfer_data)(int vid, uint16_t queue_id,
> > - struct rte_vhost_iov_iter *iov_iter,
> > - struct rte_vhost_async_status *opaque_data,
> > - uint16_t count);
> > - /**
> > -* check copy-completed packets from the async engine
> > -* @param vid
> > -* id of vhost device to check copy completion
> > -* @param queue_id
> > -* queue id to check copy completion
> > -* @param opaque_data
> > -* buffer to receive the opaque data pair from DMA engine
> > -* @param max_packets
> > -* max number of packets could be completed
> > -* @return
> > -* number of async descs completed, negative value means error
> > -*/
> > - int32_t (*check_completed_copies)(int vid, uint16_t queue_id,
> > - struct rte_vhost_async_status *opaque_data,
> > - uint16_t max_packets);
> > -};
> > -
> > -/**
> > - * async channel features
> > - */
> > -enum {
> > - RTE_VHOST_ASYNC_INORDER = 1U << 0,
> > -};
> > -
> > -/**
> > - * async channel configuration
> > - */
> > -struct rte_vhost_async_config {
> > - uint32_t features;
> > - uint32_t rsvd[2];
> > -};
> > -
> > /**
> >* Register an async channel for a vhost queue
> >*
> > @@ -100,17 +33,11 @@ struct rte_vhost_async_config {
> >* vhost device id async channel to be attached to
> >* @param queue_id
> >* vhost queue id async channel to be attached to
> > - * @param config
> > - * Async channel configuration structure
> > - * @param ops
> > - * Async channel operation callbacks
> >* @return
> >* 0 on success, -1 on failures
> >*/
> > __rte_experimental
> > -int rte_vhost_async_channel_register(int vid, uint16_t queue_id
Re: [PATCH] net/virtio: include ipv4 cksum to support cksum offload capability
Hi, Maxime,
Maxime Coquelin 于2022年1月31日周一 18:04写道：
>
> Hi Harold,
>
> On 1/7/22 12:53, Harold Huang wrote:
> > Device cksum offload capability usually include ipv4 cksum, tcp and udp
> > cksum offload capability. The application such as OVS usually negotiate
> > with the drive like this to enable cksum offload.
> >
> > Signed-off-by: Harold Huang
> > ---
> > drivers/net/virtio/virtio_ethdev.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/net/virtio/virtio_ethdev.c
> > b/drivers/net/virtio/virtio_ethdev.c
> > index c2588369b2..65b03bf0e4 100644
> > --- a/drivers/net/virtio/virtio_ethdev.c
> > +++ b/drivers/net/virtio/virtio_ethdev.c
> > @@ -3041,6 +3041,7 @@ virtio_dev_info_get(struct rte_eth_dev *dev, struct
> > rte_eth_dev_info *dev_info)
> > dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_SCATTER;
> > if (host_features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
> > dev_info->rx_offload_capa |=
> > + RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
> > RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
> > RTE_ETH_RX_OFFLOAD_UDP_CKSUM;
> > }
> > @@ -3055,6 +3056,7 @@ virtio_dev_info_get(struct rte_eth_dev *dev, struct
> > rte_eth_dev_info *dev_info)
> > RTE_ETH_TX_OFFLOAD_VLAN_INSERT;
> > if (host_features & (1ULL << VIRTIO_NET_F_CSUM)) {
> > dev_info->tx_offload_capa |=
> > + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
> > RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
> > RTE_ETH_TX_OFFLOAD_TCP_CKSUM;
> > }
>
> I'm not sure to understand why this is needed, as Vhost lib will always
> ensure the IP csum has been calculated. Could you please elaborate?
Thanks for your comments. Previously I want to enable tx checksum
offload for the tap device when I use DPDK virtio-user driver with
OVS. OVS assume checksum offload capability includes tcp, udp and ipv4
checksum offload:
https://github.com/openvswitch/ovs/blob/master/lib/netdev-dpdk.c#L1097.
But AFAIK, ipv4 checksum has always been calculated in the kernel.
And according to the virito-spec
(https://docs.oasis-open.org/virtio/virtio/v1.1/csprd01/virtio-v1.1-csprd01.html),
VIRTIO_NET_F_GUEST_CSUM feature bit may only indicate TCP or UDP
checksum offload, right? Maybe I need to change OVS to adapt to
virtio-user driver to enable checksum offload.
>
> Thanks,
> Maxime
>
Thanks,
Harold
[PATCH] common/cnxk: validate length argument
The x->len is passed as argument to npc_prep_mcam_ldata(). In the
function the len is used to reference elements of int_info and
int_info_mask array. The arrays are of length NPC_MAX_EXTRACT_DATA_LEN.
Validating the x->len value so that it is not greater than
NPC_MAX_EXTRACT_DATA_LEN.
This patch also resolves warning observed with gcc 12 compiler.
log:
../drivers/common/cnxk/roc_npc_utils.c:13:26: warning: writing 16 bytes
into a region of size 0 [-Wstringop-overflow=]
ptr[idx] = data[len - 1 - idx];
../drivers/common/cnxk/roc_npc_utils.c:163:17: note: at offset 64 into
destination object ‘int_info’ of size 64
uint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];
Bugzilla ID: 854
Fixes: 665b6a7400bf ("common/cnxk: add NPC helper API")
Cc: sta...@dpdk.org
Signed-off-by: Ankur Dwivedi
Reviewed-by: Kiran Kumar Kokkilagadda
---
drivers/common/cnxk/roc_npc_utils.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/common/cnxk/roc_npc_utils.c
b/drivers/common/cnxk/roc_npc_utils.c
index ed0ef5c462..007c454c3c 100644
--- a/drivers/common/cnxk/roc_npc_utils.c
+++ b/drivers/common/cnxk/roc_npc_utils.c
@@ -166,6 +166,9 @@ npc_update_extraction_data(struct npc_parse_state *pst,
int len = 0;
x = xinfo;
+ if (x->len > NPC_MAX_EXTRACT_DATA_LEN)
+ return NPC_ERR_INVALID_SIZE;
+
len = x->len;
hdr_off = x->hdr_off;
--
2.28.0
[PATCH v2 1/4] examples/ipsec-secgw: update error prints to data path log
Update error prints in data path to RTE_LOG_DP(). Error prints in fast path are not good for performance as they slow down the application when few bad packets are received. Signed-off-by: Nithin Dabilpuram --- v2: - Fixed issue with warning in patch 4/4 by checking for session pool initialization instead of mbuf_pool as now mbuf pool is per port. examples/ipsec-secgw/ipsec_worker.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c index 7419e85..e9493c5 100644 --- a/examples/ipsec-secgw/ipsec_worker.c +++ b/examples/ipsec-secgw/ipsec_worker.c @@ -332,7 +332,8 @@ process_ipsec_ev_inbound(struct ipsec_ctx *ctx, struct route_table *rt, break; default: - RTE_LOG(ERR, IPSEC, "Unsupported packet type = %d\n", type); + RTE_LOG_DP(DEBUG, IPSEC_ESP, "Unsupported packet type = %d\n", + type); goto drop_pkt_and_exit; } @@ -570,7 +571,8 @@ classify_pkt(struct rte_mbuf *pkt, struct ipsec_traffic *t) t->ip6.pkts[(t->ip6.num)++] = pkt; break; default: - RTE_LOG(ERR, IPSEC, "Unsupported packet type = %d\n", type); + RTE_LOG_DP(DEBUG, IPSEC_ESP, "Unsupported packet type = %d\n", + type); free_pkts(&pkt, 1); break; } -- 2.8.4
[PATCH v2 3/4] examples/ipsec-secgw: fix buffer free logic in vector mode
Fix packet processing to skip after mbuf is freed instead of
touching and Tx'ing it.
Also free vector event buffer in event worker when after processing
there is no pkt to be enqueued to Tx adapter.
Fixes: 86738ebe1e3d ("examples/ipsec-secgw: support event vector")
Cc: scha...@marvell.com
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/ipsec_worker.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec_worker.c
b/examples/ipsec-secgw/ipsec_worker.c
index e9493c5..8639426 100644
--- a/examples/ipsec-secgw/ipsec_worker.c
+++ b/examples/ipsec-secgw/ipsec_worker.c
@@ -205,12 +205,16 @@ check_sp_sa_bulk(struct sp_ctx *sp, struct sa_ctx *sa_ctx,
ip->pkts[j++] = m;
else {
sa = *(struct ipsec_sa **)rte_security_dynfield(m);
- if (sa == NULL)
+ if (sa == NULL) {
free_pkts(&m, 1);
+ continue;
+ }
/* SPI on the packet should match with the one in SA */
- if (unlikely(sa->spi != sa_ctx->sa[res - 1].spi))
+ if (unlikely(sa->spi != sa_ctx->sa[res - 1].spi)) {
free_pkts(&m, 1);
+ continue;
+ }
ip->pkts[j++] = m;
}
@@ -536,6 +540,7 @@ ipsec_ev_route_pkts(struct rte_event_vector *vec, struct
route_table *rt,
RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)) {
RTE_LOG(ERR, IPSEC, "SA type not supported\n");
free_pkts(&pkt, 1);
+ continue;
}
rte_security_set_pkt_metadata(sess->security.ctx,
sess->security.ses, pkt, NULL);
@@ -695,11 +700,13 @@ ipsec_ev_vector_process(struct
lcore_conf_ev_tx_int_port_wrkr *lconf,
ret = process_ipsec_ev_outbound_vector(&lconf->outbound,
&lconf->rt, vec);
- if (ret > 0) {
+ if (likely(ret > 0)) {
vec->nb_elem = ret;
rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,
links[0].event_port_id,
ev, 1, 0);
+ } else {
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
}
}
@@ -720,6 +727,8 @@ ipsec_ev_vector_drv_mode_process(struct eh_event_link_info
*links,
rte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,
links[0].event_port_id,
ev, 1, 0);
+ else
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
}
/*
--
2.8.4
[PATCH v2 2/4] examples/ipsec-secgw: disable Tx chksum offload for inline
Enable Tx IPv4 checksum offload only when Tx inline crypto is needed.
In other cases such as Tx Inline protocol offload, checksum computation
is implicitly taken care by HW. The advantage of having only necessary
offloads enabled is that Tx burst function can be as light as possible.
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/ipsec-secgw.c | 3 ---
examples/ipsec-secgw/sa.c | 9 +
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c
b/examples/ipsec-secgw/ipsec-secgw.c
index 21abc0d..d8a9bfa 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -2314,9 +2314,6 @@ port_init(uint16_t portid, uint64_t req_rx_offloads,
uint64_t req_tx_offloads)
local_port_conf.txmode.offloads |=
RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
- if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
- local_port_conf.txmode.offloads |=
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
-
printf("port %u configuring rx_offloads=0x%" PRIx64
", tx_offloads=0x%" PRIx64 "\n",
portid, local_port_conf.rxmode.offloads,
diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 1839ac7..b878a48 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -1790,6 +1790,15 @@ sa_check_offloads(uint16_t port_id, uint64_t
*rx_offloads,
RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)
&& rule->portid == port_id) {
*tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY;
+
+ /* Checksum offload is not needed for inline protocol as
+* all processing for Outbound IPSec packets will be
+* implicitly taken care and for non-IPSec packets,
+* there is no need of IPv4 Checksum offload.
+*/
+ if (rule_type == RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO)
+ *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+
if (rule->mss)
*tx_offloads |= RTE_ETH_TX_OFFLOAD_TCP_TSO;
}
--
2.8.4
[PATCH v2 4/4] examples/ipsec-secgw: add per port pool and vector pool size
Add support to enable per port packet pool and also override
vector pool size from command line args. This is useful
on some HW to tune performance based on usecase.
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/event_helper.c | 17 ++--
examples/ipsec-secgw/event_helper.h | 2 +
examples/ipsec-secgw/ipsec-secgw.c | 82 -
examples/ipsec-secgw/ipsec-secgw.h | 2 +
examples/ipsec-secgw/ipsec.h| 2 +-
5 files changed, 81 insertions(+), 24 deletions(-)
diff --git a/examples/ipsec-secgw/event_helper.c
b/examples/ipsec-secgw/event_helper.c
index 8947e41..172ab8e 100644
--- a/examples/ipsec-secgw/event_helper.c
+++ b/examples/ipsec-secgw/event_helper.c
@@ -792,8 +792,8 @@ eh_rx_adapter_configure(struct eventmode_conf *em_conf,
uint32_t service_id, socket_id, nb_elem;
struct rte_mempool *vector_pool = NULL;
uint32_t lcore_id = rte_lcore_id();
+ int ret, portid, nb_ports = 0;
uint8_t eventdev_id;
- int ret;
int j;
/* Get event dev ID */
@@ -806,10 +806,21 @@ eh_rx_adapter_configure(struct eventmode_conf *em_conf,
return ret;
}
+ RTE_ETH_FOREACH_DEV(portid)
+ if ((em_conf->eth_portmask & (1 << portid)))
+ nb_ports++;
+
if (em_conf->ext_params.event_vector) {
socket_id = rte_lcore_to_socket_id(lcore_id);
- nb_elem = (nb_bufs_in_pool / em_conf->ext_params.vector_size)
- + 1;
+
+ if (em_conf->vector_pool_sz) {
+ nb_elem = em_conf->vector_pool_sz;
+ } else {
+ nb_elem = (nb_bufs_in_pool /
+ em_conf->ext_params.vector_size) + 1;
+ if (per_port_pool)
+ nb_elem = nb_ports * nb_elem;
+ }
vector_pool = rte_event_vector_pool_create(
"vector_pool", nb_elem, 0,
diff --git a/examples/ipsec-secgw/event_helper.h
b/examples/ipsec-secgw/event_helper.h
index 5be6c62..f3cbe57 100644
--- a/examples/ipsec-secgw/event_helper.h
+++ b/examples/ipsec-secgw/event_helper.h
@@ -183,6 +183,8 @@ struct eventmode_conf {
/**< 64 bit field to specify extended params */
uint64_t vector_tmo_ns;
/**< Max vector timeout in nanoseconds */
+ uint64_t vector_pool_sz;
+ /**< Vector pool size */
};
/**
diff --git a/examples/ipsec-secgw/ipsec-secgw.c
b/examples/ipsec-secgw/ipsec-secgw.c
index d8a9bfa..2f3ebea 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -118,6 +118,8 @@ struct flow_info flow_info_tbl[RTE_MAX_ETHPORTS];
#define CMD_LINE_OPT_EVENT_VECTOR "event-vector"
#define CMD_LINE_OPT_VECTOR_SIZE "vector-size"
#define CMD_LINE_OPT_VECTOR_TIMEOUT"vector-tmo"
+#define CMD_LINE_OPT_VECTOR_POOL_SZ"vector-pool-sz"
+#define CMD_LINE_OPT_PER_PORT_POOL "per-port-pool"
#define CMD_LINE_ARG_EVENT "event"
#define CMD_LINE_ARG_POLL "poll"
@@ -145,6 +147,8 @@ enum {
CMD_LINE_OPT_EVENT_VECTOR_NUM,
CMD_LINE_OPT_VECTOR_SIZE_NUM,
CMD_LINE_OPT_VECTOR_TIMEOUT_NUM,
+ CMD_LINE_OPT_VECTOR_POOL_SZ_NUM,
+ CMD_LINE_OPT_PER_PORT_POOL_NUM,
};
static const struct option lgopts[] = {
@@ -161,6 +165,8 @@ static const struct option lgopts[] = {
{CMD_LINE_OPT_EVENT_VECTOR, 0, 0, CMD_LINE_OPT_EVENT_VECTOR_NUM},
{CMD_LINE_OPT_VECTOR_SIZE, 1, 0, CMD_LINE_OPT_VECTOR_SIZE_NUM},
{CMD_LINE_OPT_VECTOR_TIMEOUT, 1, 0, CMD_LINE_OPT_VECTOR_TIMEOUT_NUM},
+ {CMD_LINE_OPT_VECTOR_POOL_SZ, 1, 0, CMD_LINE_OPT_VECTOR_POOL_SZ_NUM},
+ {CMD_LINE_OPT_PER_PORT_POOL, 0, 0, CMD_LINE_OPT_PER_PORT_POOL_NUM},
{NULL, 0, 0, 0}
};
@@ -234,7 +240,6 @@ struct lcore_conf {
struct rt_ctx *rt6_ctx;
struct {
struct rte_ip_frag_tbl *tbl;
- struct rte_mempool *pool_dir;
struct rte_mempool *pool_indir;
struct rte_ip_frag_death_row dr;
} frag;
@@ -262,6 +267,8 @@ static struct rte_eth_conf port_conf = {
struct socket_ctx socket_ctx[NB_SOCKETS];
+bool per_port_pool;
+
/*
* Determine is multi-segment support required:
* - either frame buffer size is smaller then mtu
@@ -630,12 +637,10 @@ send_fragment_packet(struct lcore_conf *qconf, struct
rte_mbuf *m,
if (proto == IPPROTO_IP)
rc = rte_ipv4_fragment_packet(m, tbl->m_table + len,
- n, mtu_size, qconf->frag.pool_dir,
- qconf->frag.pool_indir);
+ n, mtu_size, m->pool, qconf->frag.pool_indir);
else
rc = rte_ipv6_fragment_packet(m, tbl->m_table + len,
- n, mtu_size, qconf->frag.pool_dir,
- qconf->frag.pool_indir);
+
Re: [dpdk-dev] [PATCH v3 1/2] ethdev: support queue-based priority flow control
)
On Thu, Feb 3, 2022 at 9:31 PM Ferruh Yigit wrote:
>
> On 1/31/2022 6:08 PM, jer...@marvell.com wrote:
> > From: Jerin Jacob
> >
> > Based on device support and use-case need, there are two different ways
> > to enable PFC. The first case is the port level PFC configuration, in
> > this case, rte_eth_dev_priority_flow_ctrl_set() API shall be used to
> > configure the PFC, and PFC frames will be generated using based on VLAN
> > TC value.
> >
> > The second case is the queue level PFC configuration, in this
> > case, Any packet field content can be used to steer the packet to the
> > specific queue using rte_flow or RSS and then use
> > rte_eth_dev_priority_flow_ctrl_queue_configure() to configure the
> > TC mapping on each queue.
> > Based on congestion selected on the specific queue, configured TC
> > shall be used to generate PFC frames.
> >
>
> Hi Jerin, Sunil,
>
> Please find below minor comments, mostly syntax issues.
>
> > Signed-off-by: Jerin Jacob
> > Signed-off-by: Sunil Kumar Kori
> > ---
> >
> > v2..v1:
> > - Introduce rte_eth_dev_priority_flow_ctrl_queue_info_get() to
> > avoid updates to rte_eth_dev_info
> > - Removed devtools/libabigail.abignore changes
> > - Address the comment from Ferruh in
> > http://patches.dpdk.org/project/dpdk/patch/20220113102718.3167282-1-jer...@marvell.com/
> >
> > doc/guides/nics/features.rst | 7 +-
> > doc/guides/rel_notes/release_22_03.rst | 6 ++
> > lib/ethdev/ethdev_driver.h | 12 ++-
> > lib/ethdev/rte_ethdev.c| 132 +
> > lib/ethdev/rte_ethdev.h| 89 +
> > lib/ethdev/version.map | 4 +
> > 6 files changed, 247 insertions(+), 3 deletions(-)
> >
> > diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
> > index 27be2d2576..1cacdc883a 100644
> > --- a/doc/guides/nics/features.rst
> > +++ b/doc/guides/nics/features.rst
> > @@ -379,9 +379,12 @@ Flow control
> > Supports configuring link flow control.
> >
> > * **[implements] eth_dev_ops**: ``flow_ctrl_get``, ``flow_ctrl_set``,
> > - ``priority_flow_ctrl_set``.
> > + ``priority_flow_ctrl_set``, ``priority_flow_ctrl_queue_info_get``,
> > + ``priority_flow_ctrl_queue_configure``
> > * **[related]API**: ``rte_eth_dev_flow_ctrl_get()``,
> > ``rte_eth_dev_flow_ctrl_set()``,
> > - ``rte_eth_dev_priority_flow_ctrl_set()``.
> > + ``rte_eth_dev_priority_flow_ctrl_set()``,
> > + ``rte_eth_dev_priority_flow_ctrl_queue_info_get()``,
> > + ``rte_eth_dev_priority_flow_ctrl_queue_configure()``.
> >
> >
> > .. _nic_features_rate_limitation:
> > diff --git a/doc/guides/rel_notes/release_22_03.rst
> > b/doc/guides/rel_notes/release_22_03.rst
> > index 3bc0630c7c..e988c104e8 100644
> > --- a/doc/guides/rel_notes/release_22_03.rst
> > +++ b/doc/guides/rel_notes/release_22_03.rst
> > @@ -69,6 +69,12 @@ New Features
> >
> > The new API ``rte_event_eth_rx_adapter_event_port_get()`` was added.
> >
> > +* **Added an API to enable queue based priority flow ctrl(PFC).**
> > +
> > + New APIs, ``rte_eth_dev_priority_flow_ctrl_queue_info_get()`` and
> > + ``rte_eth_dev_priority_flow_ctrl_queue_configure()``, was added.
> > +
> > +
> >
>
>
> Can you please move this update before ethdev driver updates.
> And no need double empty lines.
Ack
>
> > Removed Items
> > -
> > diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> > index d95605a355..320a364766 100644
> > --- a/lib/ethdev/ethdev_driver.h
> > +++ b/lib/ethdev/ethdev_driver.h
> > @@ -533,6 +533,13 @@ typedef int (*flow_ctrl_set_t)(struct rte_eth_dev *dev,
> > typedef int (*priority_flow_ctrl_set_t)(struct rte_eth_dev *dev,
> > struct rte_eth_pfc_conf *pfc_conf);
> >
> > +/** @internal Get info for queue based PFC on an Ethernet device. */
> > +typedef int (*priority_flow_ctrl_queue_info_get_t)(
> > + struct rte_eth_dev *dev, struct rte_eth_pfc_queue_info
> > *pfc_queue_info);
> > +/** @internal Configure queue based PFC parameter on an Ethernet device. */
> > +typedef int (*priority_flow_ctrl_queue_config_t)(
> > + struct rte_eth_dev *dev, struct rte_eth_pfc_queue_conf
> > *pfc_queue_conf);
> > +
>
> Instead of ending line with opening parantesis '(', can you break the line
> after
> first argument, like:
>
> typedef int (*priority_flow_ctrl_queue_config_t)(struct rte_eth_dev *dev,
> struct rte_eth_pfc_queue_conf
> *pfc_queue_conf);
Ack
>
> Same for all instances.
>
> > /** @internal Update RSS redirection table on an Ethernet device. */
> > typedef int (*reta_update_t)(struct rte_eth_dev *dev,
> >struct rte_eth_rss_reta_entry64 *reta_conf,
> > @@ -1080,7 +1087,10 @@ struct eth_dev_ops {
> > flow_ctrl_set_tflow_ctrl_set; /**< Setup flow control */
> > /** Setup priority flow control */
> > priority_flow_ctrl_set_t priority_flow_ctrl_
[PATCH 01/20] common/cnxk: increase resource count for bitmap alloc
From: Satha Rao
CN10K supports up to 832 resources at SMQ level, so increase
bitmap count to 1024.
Signed-off-by: Satha Rao
---
Depends-on: Series-20935 ("common/cnxk: use XAQ create API for inline device")
Depends-on: Series-20934 ("common/cnxk: add workaround for vWQE flush")
drivers/common/cnxk/roc_nix_priv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix_priv.h
b/drivers/common/cnxk/roc_nix_priv.h
index deb2a6b..4d2a7d8 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -31,7 +31,7 @@ struct nix_qint {
};
/* Traffic Manager */
-#define NIX_TM_MAX_HW_TXSCHQ 512
+#define NIX_TM_MAX_HW_TXSCHQ 1024
#define NIX_TM_HW_ID_INVALID UINT32_MAX
/* TM flags */
--
2.8.4
[PATCH 03/20] common/cnxk: adjust shaper rates to lower boundaries
From: Satha Rao
New api to get floor values for a requested shaper rate, which can assure
packets should never be transmitted at a rate higher than configured.
Keep the old api to get HW suggested values.
And introduce new parameter to select appropriate api.
Signed-off-by: Satha Rao
---
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_priv.h | 4 +-
drivers/common/cnxk/roc_nix_tm_ops.c | 10 ++--
drivers/common/cnxk/roc_nix_tm_utils.c | 90 --
4 files changed, 96 insertions(+), 9 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 755212c..250e1c0 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -531,6 +531,7 @@ struct roc_nix_tm_shaper_profile {
uint64_t peak_sz;
int32_t pkt_len_adj;
bool pkt_mode;
+ int8_t accuracy;
/* Function to free this memory */
void (*free_fn)(void *profile);
};
diff --git a/drivers/common/cnxk/roc_nix_priv.h
b/drivers/common/cnxk/roc_nix_priv.h
index 4d2a7d8..ec6f106 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -95,6 +95,7 @@ struct nix_tm_shaper_profile {
int32_t pkt_mode_adj;
bool pkt_mode;
uint32_t id;
+ int8_t accuracy;
void (*free_fn)(void *profile);
uint32_t ref_cnt;
@@ -399,7 +400,8 @@ uint32_t nix_tm_check_rr(struct nix *nix, uint32_t
parent_id,
uint32_t *max_prio);
uint64_t nix_tm_shaper_profile_rate_min(struct nix *nix);
uint64_t nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
-uint64_t *mantissa_p, uint64_t *div_exp_p);
+uint64_t *mantissa_p, uint64_t *div_exp_p,
+int8_t accuracy);
uint64_t nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,
uint64_t *mantissa_p);
bool nix_tm_child_res_valid(struct nix_tm_node_list *list,
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c
b/drivers/common/cnxk/roc_nix_tm_ops.c
index 3d81247..a1f5f0e 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -173,8 +173,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
if (commit_rate || commit_sz) {
if (commit_sz < min_burst || commit_sz > max_burst)
return NIX_ERR_TM_INVALID_COMMIT_SZ;
- else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL,
- NULL))
+ else if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL, NULL,
+ profile->accuracy))
return NIX_ERR_TM_INVALID_COMMIT_RATE;
}
@@ -182,7 +182,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
if (peak_sz || peak_rate) {
if (peak_sz < min_burst || peak_sz > max_burst)
return NIX_ERR_TM_INVALID_PEAK_SZ;
- else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL))
+ else if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL,
+ profile->accuracy))
return NIX_ERR_TM_INVALID_PEAK_RATE;
}
@@ -230,6 +231,7 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix,
profile->pkt_len_adj = roc_profile->pkt_len_adj;
profile->pkt_mode = roc_profile->pkt_mode;
profile->free_fn = roc_profile->free_fn;
+ profile->accuracy = roc_profile->accuracy;
return nix_tm_shaper_profile_add(roc_nix, profile, 0);
}
@@ -246,6 +248,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix,
profile->peak.rate = roc_profile->peak_rate;
profile->commit.size = roc_profile->commit_sz;
profile->peak.size = roc_profile->peak_sz;
+ profile->pkt_len_adj = roc_profile->pkt_len_adj;
+ profile->accuracy = roc_profile->accuracy;
return nix_tm_shaper_profile_add(roc_nix, profile, 1);
}
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c
b/drivers/common/cnxk/roc_nix_tm_utils.c
index 9e80c2a..4ba0752 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -125,9 +125,72 @@ nix_tm_node_search(struct nix *nix, uint32_t node_id, enum
roc_nix_tm_tree tree)
return NULL;
}
-uint64_t
-nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,
- uint64_t *mantissa_p, uint64_t *div_exp_p)
+static uint64_t
+nix_tm_shaper_rate_conv_floor(uint64_t value, uint64_t *exponent_p,
+ uint64_t *mantissa_p, uint64_t *div_exp_p)
+{
+ uint64_t div_exp, exponent, mantissa;
+
+ /* Boundary checks */
+ if (value < NIX_TM_MIN_SHAPER_RATE || value > NIX_TM_MAX_SHAPER_RATE)
+ return 0;
+
+ i
[PATCH 02/20] common/cnxk: realloc inline device XAQ AURA
Add support to realloc inline device XAQ AURA with more
buffers of new packet pool AURA.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_inl.h | 1 +
drivers/common/cnxk/roc_nix_inl_dev.c | 110 +-
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 2 +-
drivers/common/cnxk/roc_nix_inl_priv.h| 3 +
drivers/common/cnxk/roc_platform.h| 1 +
drivers/common/cnxk/version.map | 3 +-
6 files changed, 115 insertions(+), 5 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_inl.h
b/drivers/common/cnxk/roc_nix_inl.h
index abbeac6..bbdcbc8 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -124,6 +124,7 @@ void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev
*roc_inl_dev);
bool __roc_api roc_nix_inl_dev_is_probed(void);
void __roc_api roc_nix_inl_dev_lock(void);
void __roc_api roc_nix_inl_dev_unlock(void);
+int __roc_api roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle);
/* NIX Inline Inbound API */
int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix);
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c
b/drivers/common/cnxk/roc_nix_inl_dev.c
index dd93765..1d14f04 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev.c
@@ -219,7 +219,6 @@ nix_inl_sso_setup(struct nix_inl_dev *inl_dev)
struct sso_lf_alloc_rsp *sso_rsp;
struct dev *dev = &inl_dev->dev;
uint16_t hwgrp[1] = {0};
- uint32_t xae_cnt;
int rc;
/* Alloc SSOW LF */
@@ -240,8 +239,8 @@ nix_inl_sso_setup(struct nix_inl_dev *inl_dev)
inl_dev->xae_waes = sso_rsp->xaq_wq_entries;
inl_dev->iue = sso_rsp->in_unit_entries;
- xae_cnt = inl_dev->iue;
- rc = sso_hwgrp_init_xaq_aura(dev, &inl_dev->xaq, xae_cnt,
+ inl_dev->nb_xae = inl_dev->iue;
+ rc = sso_hwgrp_init_xaq_aura(dev, &inl_dev->xaq, inl_dev->nb_xae,
inl_dev->xae_waes, inl_dev->xaq_buf_size,
1);
if (rc) {
@@ -518,6 +517,111 @@ nix_inl_lf_detach(struct nix_inl_dev *inl_dev)
return mbox_process(dev->mbox);
}
+static int
+nix_inl_dev_wait_for_sso_empty(struct nix_inl_dev *inl_dev)
+{
+ uintptr_t sso_base = inl_dev->sso_base;
+ int wait_ms = 3000;
+
+ while (wait_ms > 0) {
+ /* Break when empty */
+ if (!plt_read64(sso_base + SSO_LF_GGRP_XAQ_CNT) &&
+ !plt_read64(sso_base + SSO_LF_GGRP_AQ_CNT))
+ return 0;
+
+ plt_delay_us(1000);
+ wait_ms -= 1;
+ }
+
+ return -ETIMEDOUT;
+}
+
+int
+roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+ struct nix_inl_dev *inl_dev;
+ int rc, i;
+
+ if (idev == NULL)
+ return 0;
+
+ inl_dev = idev->nix_inl_dev;
+ /* Nothing to do if no inline device */
+ if (!inl_dev)
+ return 0;
+
+ if (!aura_handle) {
+ inl_dev->nb_xae = inl_dev->iue;
+ goto no_pool;
+ }
+
+ /* Check if aura is already considered */
+ for (i = 0; i < inl_dev->pkt_pools_cnt; i++) {
+ if (inl_dev->pkt_pools[i] == aura_handle)
+ return 0;
+ }
+
+no_pool:
+ /* Disable RQ if enabled */
+ if (inl_dev->rq_refs) {
+ rc = nix_rq_ena_dis(&inl_dev->dev, &inl_dev->rq, false);
+ if (rc) {
+ plt_err("Failed to disable inline dev RQ, rc=%d", rc);
+ return rc;
+ }
+ }
+
+ /* Wait for events to be removed */
+ rc = nix_inl_dev_wait_for_sso_empty(inl_dev);
+ if (rc) {
+ plt_err("Timeout waiting for inline device event cleanup");
+ goto exit;
+ }
+
+ /* Disable HWGRP */
+ plt_write64(0, inl_dev->sso_base + SSO_LF_GGRP_QCTL);
+
+ inl_dev->pkt_pools_cnt++;
+ inl_dev->pkt_pools =
+ plt_realloc(inl_dev->pkt_pools,
+ sizeof(uint64_t *) * inl_dev->pkt_pools_cnt, 0);
+ if (!inl_dev->pkt_pools)
+ inl_dev->pkt_pools_cnt = 0;
+ else
+ inl_dev->pkt_pools[inl_dev->pkt_pools_cnt - 1] = aura_handle;
+ inl_dev->nb_xae += roc_npa_aura_op_limit_get(aura_handle);
+
+ /* Realloc XAQ aura */
+ rc = sso_hwgrp_init_xaq_aura(&inl_dev->dev, &inl_dev->xaq,
+inl_dev->nb_xae, inl_dev->xae_waes,
+inl_dev->xaq_buf_size, 1);
+ if (rc) {
+ plt_err("Failed to reinitialize xaq aura, rc=%d", rc);
+ return rc;
+ }
+
+ /* Setup xaq for hwgrps */
+ rc = sso_hwgrp_alloc_xaq(&inl_dev->dev, inl_dev->xaq.aura_handle, 1);
+ if (rc) {
+ plt_err("Failed to setup hwgrp xa
[PATCH 06/20] common/cnxk: enable l3hdr write back in SA
From: Vidya Sagar Velumuri
Enable the field in SA to write back l2, l3 hdrs in case of errors
during inline processing.
Signed-off-by: Vidya Sagar Velumuri
---
drivers/common/cnxk/roc_ie_ot.c | 1 +
drivers/common/cnxk/roc_ie_ot.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_ie_ot.c b/drivers/common/cnxk/roc_ie_ot.c
index 1ea7bfd..d0b7ad3 100644
--- a/drivers/common/cnxk/roc_ie_ot.c
+++ b/drivers/common/cnxk/roc_ie_ot.c
@@ -17,6 +17,7 @@ roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, bool
is_inline)
sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
sa->w0.s.pkind = ROC_IE_OT_CPT_PKIND;
sa->w0.s.et_ovrwr = 1;
+ sa->w2.s.l3hdr_on_err = 1;
}
offset = offsetof(struct roc_ot_ipsec_inb_sa, ctx);
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 2b4f5d3..1029d1e 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -336,7 +336,8 @@ struct roc_ot_ipsec_inb_sa {
uint64_t ip_hdr_verify : 2;
uint64_t udp_ports_verify : 1;
- uint64_t rsvd6 : 7;
+ uint64_t l3hdr_on_err : 1;
+ uint64_t rsvd6 : 6;
uint64_t async_mode : 1;
uint64_t spi : 32;
--
2.8.4
[PATCH 08/20] common/cnxk: use SSO time counter threshold for IRQ
Enable time counter based threshold for raising SSO
EXE_INT instead of IAQ threshold.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
index d758e0c..8a0cb74 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
@@ -5,6 +5,8 @@
#include "roc_api.h"
#include "roc_priv.h"
+#define WORK_LIMIT 1000
+
static void
nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)
{
@@ -15,6 +17,7 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)
__uint128_t get_work;
uint64_t u64[2];
} gw;
+ uint16_t cnt = 0;
uint64_t work;
again:
@@ -33,7 +36,9 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)
else
plt_warn("Undelivered inl dev work gw0: %p gw1: %p",
(void *)gw.u64[0], (void *)gw.u64[1]);
- goto again;
+ cnt++;
+ if (cnt < WORK_LIMIT)
+ goto again;
}
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
@@ -138,8 +143,10 @@ nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)
/* Enable hw interrupt */
plt_write64(~0ull, sso_base + SSO_LF_GGRP_INT_ENA_W1S);
- /* Setup threshold for work exec interrupt to 1 wqe in IAQ */
- plt_write64(0x1ull, sso_base + SSO_LF_GGRP_INT_THR);
+ /* Setup threshold for work exec interrupt to 100us timeout
+* based on time counter.
+*/
+ plt_write64(BIT_ULL(63) | 10ULL << 48, sso_base + SSO_LF_GGRP_INT_THR);
return rc;
}
--
2.8.4
[PATCH 04/20] common/cnxk: support inline device API without ROC NIX
From: Vidya Sagar Velumuri
Update the inline device functions to work when roc_nix is NULL.
This is required, as IPsec driver have to use these APIs to work
with inline IPsec device, but the IPsec driver might not have roc_nix
information.
Signed-off-by: Vidya Sagar Velumuri
---
drivers/common/cnxk/roc_nix_inl.c | 98 --
drivers/common/cnxk/roc_nix_inl.h | 2 +
drivers/common/cnxk/roc_nix_inl_dev.c | 7 +++
drivers/common/cnxk/roc_nix_inl_priv.h | 1 +
drivers/common/cnxk/version.map| 1 +
drivers/net/cnxk/cnxk_ethdev_sec.c | 2 +
6 files changed, 84 insertions(+), 27 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index e8981c4..356d11d 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -107,18 +107,24 @@ roc_nix_inl_outb_sa_base_get(struct roc_nix *roc_nix)
uintptr_t
roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix, bool inb_inl_dev)
{
- struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct idev_cfg *idev = idev_get_cfg();
struct nix_inl_dev *inl_dev;
+ struct nix *nix = NULL;
if (idev == NULL)
return 0;
- if (!nix->inl_inb_ena)
- return 0;
+ if (!inb_inl_dev && roc_nix == NULL)
+ return -EINVAL;
+
+ if (roc_nix) {
+ nix = roc_nix_to_nix_priv(roc_nix);
+ if (!nix->inl_inb_ena)
+ return 0;
+ }
- inl_dev = idev->nix_inl_dev;
if (inb_inl_dev) {
+ inl_dev = idev->nix_inl_dev;
/* Return inline dev sa base */
if (inl_dev)
return (uintptr_t)inl_dev->inb_sa_base;
@@ -131,18 +137,24 @@ roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix, bool
inb_inl_dev)
uint32_t
roc_nix_inl_inb_sa_max_spi(struct roc_nix *roc_nix, bool inb_inl_dev)
{
- struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct idev_cfg *idev = idev_get_cfg();
struct nix_inl_dev *inl_dev;
+ struct nix *nix;
if (idev == NULL)
return 0;
- if (!nix->inl_inb_ena)
- return 0;
+ if (!inb_inl_dev && roc_nix == NULL)
+ return -EINVAL;
+
+ if (roc_nix) {
+ nix = roc_nix_to_nix_priv(roc_nix);
+ if (!nix->inl_inb_ena)
+ return 0;
+ }
- inl_dev = idev->nix_inl_dev;
if (inb_inl_dev) {
+ inl_dev = idev->nix_inl_dev;
if (inl_dev)
return inl_dev->ipsec_in_max_spi;
return 0;
@@ -154,21 +166,28 @@ roc_nix_inl_inb_sa_max_spi(struct roc_nix *roc_nix, bool
inb_inl_dev)
uint32_t
roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix, bool inl_dev_sa)
{
- struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct idev_cfg *idev = idev_get_cfg();
struct nix_inl_dev *inl_dev;
+ struct nix *nix;
if (idev == NULL)
return 0;
- if (!inl_dev_sa)
- return nix->inb_sa_sz;
+ if (!inl_dev_sa && roc_nix == NULL)
+ return -EINVAL;
- inl_dev = idev->nix_inl_dev;
- if (inl_dev_sa && inl_dev)
- return inl_dev->inb_sa_sz;
+ if (roc_nix) {
+ nix = roc_nix_to_nix_priv(roc_nix);
+ if (!inl_dev_sa)
+ return nix->inb_sa_sz;
+ }
+
+ if (inl_dev_sa) {
+ inl_dev = idev->nix_inl_dev;
+ if (inl_dev)
+ return inl_dev->inb_sa_sz;
+ }
- /* On error */
return 0;
}
@@ -536,7 +555,7 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)
inl_rq->tag_mask = 0xFFF0;
inl_rq->tt = SSO_TT_ORDERED;
inl_rq->hwgrp = 0;
- inl_rq->wqe_skip = 1;
+ inl_rq->wqe_skip = inl_dev->wqe_skip;
inl_rq->sso_ena = true;
/* Prepare and send RQ init mbox */
@@ -731,13 +750,14 @@ int
roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,
enum roc_nix_inl_sa_sync_op op)
{
- struct nix *nix = roc_nix_to_nix_priv(roc_nix);
- struct roc_cpt_lf *outb_lf = nix->cpt_lf_base;
struct idev_cfg *idev = idev_get_cfg();
struct nix_inl_dev *inl_dev = NULL;
+ struct roc_cpt_lf *outb_lf = NULL;
union cpt_lf_ctx_reload reload;
union cpt_lf_ctx_flush flush;
+ bool get_inl_lf = true;
uintptr_t rbase;
+ struct nix *nix;
/* Nothing much to do on cn9k */
if (roc_model_is_cn9k()) {
@@ -745,11 +765,22 @@ roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa,
bool inb,
return 0;
}
- if (inb && nix->inb_inl_dev) {
+ if (idev)
+ inl_dev = idev->nix_inl_dev;
+
+ if (!inl_dev && roc_nix == NULL)
+ return -EINVAL;
+
+ if
[PATCH 09/20] common/cnxk: allow force use of SSO pffunc for outb inline
Allow force use of SSO pffunc even when inline dev is available
so that in case driver needs events directly delivered to
event device.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_inl.c | 7 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 0122b98..57a595f 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -386,6 +386,7 @@ struct roc_nix {
uint16_t outb_nb_crypto_qs;
uint16_t ipsec_in_max_spi;
uint16_t ipsec_out_max_sa;
+ bool ipsec_out_sso_pffunc;
/* End of input parameters */
/* LMT line base for "Per Core Tx LMT line" mode*/
uintptr_t lmt_base;
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index ac17e95..003f972 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -311,6 +311,10 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)
/* Retrieve inline device if present */
inl_dev = idev->nix_inl_dev;
sso_pffunc = inl_dev ? inl_dev->dev.pf_func : idev_sso_pffunc_get();
+ /* Use sso_pffunc if explicitly requested */
+ if (roc_nix->ipsec_out_sso_pffunc)
+ sso_pffunc = idev_sso_pffunc_get();
+
if (!sso_pffunc) {
plt_err("Failed to setup inline outb, need either "
"inline device or sso device");
@@ -328,7 +332,8 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)
eng_grpmask = (1ULL << ROC_CPT_DFLT_ENG_GRP_SE |
1ULL << ROC_CPT_DFLT_ENG_GRP_SE_IE |
1ULL << ROC_CPT_DFLT_ENG_GRP_AE);
- rc = cpt_lfs_alloc(dev, eng_grpmask, blkaddr, true);
+ rc = cpt_lfs_alloc(dev, eng_grpmask, blkaddr,
+ !roc_nix->ipsec_out_sso_pffunc);
if (rc) {
plt_err("Failed to alloc CPT LF resources, rc=%d", rc);
goto lf_detach;
--
2.8.4
[PATCH 05/20] common/cnxk: use common SA init API for default options
From: Vidya Sagar Velumuri
Use common SA init API before doing initialization based on
params. This is better so that all HW specific default values
are at single place for lookaside and inline.
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/cnxk_security.c | 21 +++---
drivers/common/cnxk/cnxk_security.h | 3 ++-
drivers/common/cnxk/meson.build | 1 +
drivers/common/cnxk/roc_ie_ot.c | 41 +++
drivers/common/cnxk/roc_ie_ot.h | 11 ++
drivers/common/cnxk/roc_nix_inl.c | 31 ++
drivers/common/cnxk/roc_nix_inl.h | 2 --
drivers/common/cnxk/roc_nix_inl_dev.c | 2 +-
drivers/common/cnxk/version.map | 4 ++--
drivers/crypto/cnxk/cn10k_ipsec.c | 3 ++-
drivers/net/cnxk/cn10k_ethdev_sec.c | 7 +++---
11 files changed, 70 insertions(+), 56 deletions(-)
create mode 100644 drivers/common/cnxk/roc_ie_ot.c
diff --git a/drivers/common/cnxk/cnxk_security.c
b/drivers/common/cnxk/cnxk_security.c
index 8b4dd1c..8696ff3 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -260,13 +260,17 @@ ot_ipsec_inb_tunnel_hdr_fill(struct roc_ot_ipsec_inb_sa
*sa,
int
cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
struct rte_security_ipsec_xform *ipsec_xfrm,
- struct rte_crypto_sym_xform *crypto_xfrm)
+ struct rte_crypto_sym_xform *crypto_xfrm,
+ bool is_inline)
{
union roc_ot_ipsec_sa_word2 w2;
uint32_t replay_win_sz;
size_t offset;
int rc;
+ /* Initialize the SA */
+ roc_ot_ipsec_inb_sa_init(sa, is_inline);
+
w2.u64 = 0;
rc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->w8.s.salt,
sa->hmac_opad_ipad, ipsec_xfrm,
@@ -291,13 +295,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
if (rc)
return rc;
- /* Default options for pkt_out and pkt_fmt are with
-* second pass meta and no defrag.
-*/
- sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
- sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG;
- sa->w0.s.pkind = ROC_OT_CPT_META_PKIND;
-
/* ESN */
sa->w2.s.esn_en = !!ipsec_xfrm->options.esn;
if (ipsec_xfrm->options.udp_encap) {
@@ -346,11 +343,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
sa->w0.s.hard_life_dec = 1;
}
- /* There are two words of CPT_CTX_HW_S for ucode to skip */
- sa->w0.s.ctx_hdr_size = 1;
- sa->w0.s.aop_valid = 1;
- sa->w0.s.et_ovrwr = 1;
-
rte_wmb();
/* Enable SA */
@@ -368,6 +360,9 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,
size_t offset;
int rc;
+ /* Initialize the SA */
+ roc_ot_ipsec_outb_sa_init(sa);
+
w2.u64 = 0;
rc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->iv.s.salt,
sa->hmac_opad_ipad, ipsec_xfrm,
diff --git a/drivers/common/cnxk/cnxk_security.h
b/drivers/common/cnxk/cnxk_security.h
index db97887..02cdad2 100644
--- a/drivers/common/cnxk/cnxk_security.h
+++ b/drivers/common/cnxk/cnxk_security.h
@@ -38,7 +38,8 @@ cnxk_ipsec_outb_roundup_byte(enum rte_crypto_cipher_algorithm
c_algo,
int __roc_api
cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,
struct rte_security_ipsec_xform *ipsec_xfrm,
- struct rte_crypto_sym_xform *crypto_xfrm);
+ struct rte_crypto_sym_xform *crypto_xfrm,
+ bool is_inline);
int __roc_api
cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,
struct rte_security_ipsec_xform *ipsec_xfrm,
diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 7e27b3c..928500b 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -23,6 +23,7 @@ sources = files(
'roc_hash.c',
'roc_idev.c',
'roc_irq.c',
+'roc_ie_ot.c',
'roc_mbox.c',
'roc_model.c',
'roc_nix.c',
diff --git a/drivers/common/cnxk/roc_ie_ot.c b/drivers/common/cnxk/roc_ie_ot.c
new file mode 100644
index 000..1ea7bfd
--- /dev/null
+++ b/drivers/common/cnxk/roc_ie_ot.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2022 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+void
+roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, bool is_inline)
+{
+ size_t offset;
+
+ memset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));
+
+ if (is_inline) {
+ sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG;
+ sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
[PATCH 07/20] common/cnxk: support to enable aura tail drop for RQ
Add support to enable aura tail drop via RQ specifically
for inline device RQ's pkt pool. This is better than RQ
red drop as it can be applied to all RQ's that are not
having security enabled but using same packet pool.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix.h | 4
drivers/common/cnxk/roc_nix_inl.c | 39 ++
drivers/common/cnxk/roc_nix_inl.h | 2 ++
drivers/common/cnxk/roc_nix_inl_dev.c | 9
drivers/common/cnxk/roc_nix_inl_priv.h | 2 ++
drivers/common/cnxk/roc_nix_queue.c| 6 +-
drivers/common/cnxk/roc_npa.c | 33 ++--
drivers/common/cnxk/roc_npa.h | 3 +++
drivers/common/cnxk/version.map| 1 +
9 files changed, 92 insertions(+), 7 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 250e1c0..0122b98 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -286,6 +286,10 @@ struct roc_nix_rq {
uint8_t spb_red_drop;
/* Average SPB aura level pass threshold for RED */
uint8_t spb_red_pass;
+ /* LPB aura drop enable */
+ bool lpb_drop_ena;
+ /* SPB aura drop enable */
+ bool spb_drop_ena;
/* End of Input parameters */
struct roc_nix *roc_nix;
bool inl_dev_ref;
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index f57f1a4..ac17e95 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -528,23 +528,50 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)
inl_rq->first_skip = rq->first_skip;
inl_rq->later_skip = rq->later_skip;
inl_rq->lpb_size = rq->lpb_size;
+ inl_rq->lpb_drop_ena = true;
+ inl_rq->spb_ena = rq->spb_ena;
+ inl_rq->spb_aura_handle = rq->spb_aura_handle;
+ inl_rq->spb_size = rq->spb_size;
+ inl_rq->spb_drop_ena = !!rq->spb_ena;
if (!roc_model_is_cn9k()) {
uint64_t aura_limit =
roc_npa_aura_op_limit_get(inl_rq->aura_handle);
uint64_t aura_shift = plt_log2_u32(aura_limit);
+ uint64_t aura_drop, drop_pc;
if (aura_shift < 8)
aura_shift = 0;
else
aura_shift = aura_shift - 8;
- /* Set first pass RQ to drop when half of the buffers are in
+ /* Set first pass RQ to drop after part of buffers are in
* use to avoid metabuf alloc failure. This is needed as long
-* as we cannot use different
+* as we cannot use different aura.
*/
- inl_rq->red_pass = (aura_limit / 2) >> aura_shift;
- inl_rq->red_drop = ((aura_limit / 2) - 1) >> aura_shift;
+ drop_pc = inl_dev->lpb_drop_pc;
+ aura_drop = ((aura_limit * drop_pc) / 100) >> aura_shift;
+ roc_npa_aura_drop_set(inl_rq->aura_handle, aura_drop, true);
+ }
+
+ if (inl_rq->spb_ena) {
+ uint64_t aura_limit =
+ roc_npa_aura_op_limit_get(inl_rq->spb_aura_handle);
+ uint64_t aura_shift = plt_log2_u32(aura_limit);
+ uint64_t aura_drop, drop_pc;
+
+ if (aura_shift < 8)
+ aura_shift = 0;
+ else
+ aura_shift = aura_shift - 8;
+
+ /* Set first pass RQ to drop after part of buffers are in
+* use to avoid metabuf alloc failure. This is needed as long
+* as we cannot use different aura.
+*/
+ drop_pc = inl_dev->spb_drop_pc;
+ aura_drop = ((aura_limit * drop_pc) / 100) >> aura_shift;
+ roc_npa_aura_drop_set(inl_rq->spb_aura_handle, aura_drop, true);
}
/* Enable IPSec */
@@ -613,6 +640,10 @@ roc_nix_inl_dev_rq_put(struct roc_nix_rq *rq)
if (rc)
plt_err("Failed to disable inline device rq, rc=%d", rc);
+ roc_npa_aura_drop_set(inl_rq->aura_handle, 0, false);
+ if (inl_rq->spb_ena)
+ roc_npa_aura_drop_set(inl_rq->spb_aura_handle, 0, false);
+
/* Flush NIX LF for CN10K */
nix_rq_vwqe_flush(rq, inl_dev->vwqe_interval);
diff --git a/drivers/common/cnxk/roc_nix_inl.h
b/drivers/common/cnxk/roc_nix_inl.h
index 224aaba..728225b 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -112,6 +112,8 @@ struct roc_nix_inl_dev {
uint16_t chan_mask;
bool attach_cptlf;
bool wqe_skip;
+ uint8_t spb_drop_pc;
+ uint8_t lpb_drop_pc;
/* End of input parameters */
#define ROC_NIX_INL_MEM_SZ (1280)
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c
b/drivers/common/cnxk/roc_nix_inl_dev.c
index 9dc0a62..4c1d85a 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev
[PATCH 10/20] net/cnxk: added Rx metadata negotiate operation
From: Satha Rao
Added rx_metadata_negotiate api to enable mark update RX offload.
Removed software logic to enable/disable mark update inside flow
create/destroy apis.
Signed-off-by: Satha Rao
---
drivers/net/cnxk/cn10k_ethdev.c | 26 ++
drivers/net/cnxk/cn10k_rte_flow.c | 20 ++--
drivers/net/cnxk/cn9k_ethdev.c| 25 +
drivers/net/cnxk/cn9k_rte_flow.c | 20 ++--
drivers/net/cnxk/cnxk_ethdev.h| 1 +
5 files changed, 56 insertions(+), 36 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index 8378cbf..169e70e 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -39,6 +39,9 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)
flags |= NIX_RX_OFFLOAD_SECURITY_F;
+ if (dev->rx_mark_update)
+ flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F;
+
return flags;
}
@@ -470,6 +473,27 @@ cn10k_nix_dev_start(struct rte_eth_dev *eth_dev)
return 0;
}
+static int
+cn10k_nix_rx_metadata_negotiate(struct rte_eth_dev *eth_dev, uint64_t
*features)
+{
+ struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+ *features &=
+ (RTE_ETH_RX_METADATA_USER_FLAG | RTE_ETH_RX_METADATA_USER_MARK);
+
+ if (*features) {
+ dev->rx_offload_flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F;
+ dev->rx_mark_update = true;
+ } else {
+ dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_MARK_UPDATE_F;
+ dev->rx_mark_update = false;
+ }
+
+ cn10k_eth_set_rx_function(eth_dev);
+
+ return 0;
+}
+
/* Update platform specific eth dev ops */
static void
nix_eth_dev_ops_override(void)
@@ -489,6 +513,8 @@ nix_eth_dev_ops_override(void)
cnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;
cnxk_eth_dev_ops.timesync_enable = cn10k_nix_timesync_enable;
cnxk_eth_dev_ops.timesync_disable = cn10k_nix_timesync_disable;
+ cnxk_eth_dev_ops.rx_metadata_negotiate =
+ cn10k_nix_rx_metadata_negotiate;
}
static void
diff --git a/drivers/net/cnxk/cn10k_rte_flow.c
b/drivers/net/cnxk/cn10k_rte_flow.c
index 529fb0e..ea71efa 100644
--- a/drivers/net/cnxk/cn10k_rte_flow.c
+++ b/drivers/net/cnxk/cn10k_rte_flow.c
@@ -131,9 +131,9 @@ cn10k_flow_create(struct rte_eth_dev *eth_dev, const struct
rte_flow_attr *attr,
const struct rte_flow_action *action_rss = NULL;
const struct rte_flow_action_meter *mtr = NULL;
const struct rte_flow_action *act_q = NULL;
- int mark_actions = 0, vtag_actions = 0;
struct roc_npc *npc = &dev->npc;
struct roc_npc_flow *flow;
+ int vtag_actions = 0;
uint32_t req_act = 0;
int i, rc;
@@ -197,13 +197,6 @@ cn10k_flow_create(struct rte_eth_dev *eth_dev, const
struct rte_flow_attr *attr,
cn10k_mtr_connect(eth_dev, mtr->mtr_id);
}
- mark_actions = roc_npc_mark_actions_get(npc);
-
- if (mark_actions) {
- dev->rx_offload_flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F;
- cn10k_eth_set_rx_function(eth_dev);
- }
-
vtag_actions = roc_npc_vtag_actions_get(npc);
if (vtag_actions) {
@@ -220,20 +213,11 @@ cn10k_flow_destroy(struct rte_eth_dev *eth_dev, struct
rte_flow *rte_flow,
{
struct roc_npc_flow *flow = (struct roc_npc_flow *)rte_flow;
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
- int mark_actions = 0, vtag_actions = 0;
struct roc_npc *npc = &dev->npc;
+ int vtag_actions = 0;
uint32_t mtr_id;
int rc;
- mark_actions = roc_npc_mark_actions_get(npc);
- if (mark_actions) {
- mark_actions = roc_npc_mark_actions_sub_return(npc, 1);
- if (mark_actions == 0) {
- dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_MARK_UPDATE_F;
- cn10k_eth_set_rx_function(eth_dev);
- }
- }
-
vtag_actions = roc_npc_vtag_actions_get(npc);
if (vtag_actions) {
if (flow->nix_intf == ROC_NPC_INTF_RX) {
diff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c
index d34bc68..c44b5b4 100644
--- a/drivers/net/cnxk/cn9k_ethdev.c
+++ b/drivers/net/cnxk/cn9k_ethdev.c
@@ -39,6 +39,9 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)
flags |= NIX_RX_OFFLOAD_SECURITY_F;
+ if (dev->rx_mark_update)
+ flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F;
+
return flags;
}
@@ -467,6 +470,27 @@ cn9k_nix_dev_start(struct rte_eth_dev *eth_dev)
return 0;
}
+static int
+cn9k_nix_rx_metadata_negotiate(struct rte_eth_dev *eth_dev, uint64_t *features)
+{
+ struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+
+
[PATCH 12/20] net/cnxk: fix inline device RQ tag mask
Fix inline device rq tagmask to get packets with receive errors
as type ETHDEV packets to callback handler so that packet buffers
can get freed. Currently only ipsec denied packets get the right
tag mask.
Fixes: ee48f711f3b0 ("common/cnxk: support NIX inline inbound and outbound
setup")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_inl.c | 2 +-
drivers/net/cnxk/cnxk_ethdev.c| 9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index 003f972..11a1691 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -584,7 +584,7 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)
inl_rq->flow_tag_width = 20;
/* Special tag mask */
- inl_rq->tag_mask = 0xFFF0;
+ inl_rq->tag_mask = rq->tag_mask;
inl_rq->tt = SSO_TT_ORDERED;
inl_rq->hwgrp = 0;
inl_rq->wqe_skip = inl_dev->wqe_skip;
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 53dfb5e..9ede66e 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -3,6 +3,8 @@
*/
#include
+#include
+
static inline uint64_t
nix_get_rx_offload_capa(struct cnxk_eth_dev *dev)
{
@@ -597,6 +599,13 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev,
uint16_t qid,
rxq_sp->qconf.mp = mp;
if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
+ /* Pass a tagmask used to handle error packets in inline device.
+* Ethdev rq's tag_mask field will be overwritten later
+* when sso is setup.
+*/
+ rq->tag_mask =
+ 0x0FF0 | ((uint32_t)RTE_EVENT_TYPE_ETHDEV << 28);
+
/* Setup rq reference for inline dev if present */
rc = roc_nix_inl_dev_rq_get(rq);
if (rc)
--
2.8.4
[PATCH 11/20] common/cnxk: removed tracking of mark actions
From: Satha Rao
Removed roc npc apis which tracks addition and deletion of
mark actions.
Signed-off-by: Satha Rao
---
drivers/common/cnxk/roc_npc.c | 21 -
drivers/common/cnxk/roc_npc.h | 3 ---
drivers/common/cnxk/roc_npc_priv.h | 1 -
drivers/common/cnxk/version.map| 2 --
4 files changed, 27 deletions(-)
diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index e3961bf..d2ebe61 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -166,8 +166,6 @@ roc_npc_init(struct roc_npc *roc_npc)
roc_npc->kex_capability = npc_get_kex_capability(npc);
roc_npc->rx_parse_nibble = npc->keyx_supp_nmask[NPC_MCAM_RX];
- npc->mark_actions = 0;
-
npc->mcam_entries = npc_mcam_tot_entries() >> npc->keyw[NPC_MCAM_RX];
/* Free, free_rev, live and live_rev entries */
@@ -323,13 +321,11 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct
roc_npc_attr *attr,
}
mark = act_mark->id + 1;
req_act |= ROC_NPC_ACTION_TYPE_MARK;
- npc->mark_actions += 1;
break;
case ROC_NPC_ACTION_TYPE_FLAG:
mark = NPC_FLOW_FLAG_VAL;
req_act |= ROC_NPC_ACTION_TYPE_FLAG;
- npc->mark_actions += 1;
break;
case ROC_NPC_ACTION_TYPE_COUNT:
@@ -812,23 +808,6 @@ npc_rss_action_program(struct roc_npc *roc_npc,
return 0;
}
-int
-roc_npc_mark_actions_get(struct roc_npc *roc_npc)
-{
- struct npc *npc = roc_npc_to_npc_priv(roc_npc);
-
- return npc->mark_actions;
-}
-
-int
-roc_npc_mark_actions_sub_return(struct roc_npc *roc_npc, uint32_t count)
-{
- struct npc *npc = roc_npc_to_npc_priv(roc_npc);
-
- npc->mark_actions -= count;
- return npc->mark_actions;
-}
-
static int
npc_vtag_cfg_delete(struct roc_npc *roc_npc, struct roc_npc_flow *flow)
{
diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index b836e26..6dcdd29 100644
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -337,9 +337,6 @@ int __roc_api roc_npc_mcam_free_all_resources(struct
roc_npc *roc_npc);
void __roc_api roc_npc_flow_dump(FILE *file, struct roc_npc *roc_npc);
void __roc_api roc_npc_flow_mcam_dump(FILE *file, struct roc_npc *roc_npc,
struct roc_npc_flow *mcam);
-int __roc_api roc_npc_mark_actions_get(struct roc_npc *roc_npc);
-int __roc_api roc_npc_mark_actions_sub_return(struct roc_npc *roc_npc,
- uint32_t count);
int __roc_api roc_npc_vtag_actions_get(struct roc_npc *roc_npc);
int __roc_api roc_npc_vtag_actions_sub_return(struct roc_npc *roc_npc,
uint32_t count);
diff --git a/drivers/common/cnxk/roc_npc_priv.h
b/drivers/common/cnxk/roc_npc_priv.h
index afd11ad..a04f621 100644
--- a/drivers/common/cnxk/roc_npc_priv.h
+++ b/drivers/common/cnxk/roc_npc_priv.h
@@ -380,7 +380,6 @@ struct npc {
uint16_t flow_prealloc_size;/* Pre allocated mcam size */
uint16_t flow_max_priority; /* Max priority for flow */
uint16_t switch_header_type; /* Supported switch header type */
- uint32_t mark_actions; /* Number of mark actions */
uint32_t vtag_strip_actions; /* vtag insert/strip actions */
uint16_t pf_func;/* pf_func of device */
npc_dxcfg_t prx_dxcfg; /* intf, lid, lt, extract */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 7a8aff1..0f990d3 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -305,8 +305,6 @@ INTERNAL {
roc_npc_flow_parse;
roc_npc_get_low_priority_mcam;
roc_npc_init;
- roc_npc_mark_actions_get;
- roc_npc_mark_actions_sub_return;
roc_npc_vtag_actions_get;
roc_npc_vtag_actions_sub_return;
roc_npc_mcam_alloc_entries;
--
2.8.4
[PATCH 13/20] net/cnxk: register callback early to handle initial packets
Register callback early to handle initial error packets from
inline device.
Fixes: 69daa9e5022b ("net/cnxk: support inline security setup for cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_ethdev.c | 6 ++
drivers/net/cnxk/cn10k_ethdev.h | 3 +++
drivers/net/cnxk/cn10k_ethdev_sec.c | 5 +
3 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index 169e70e..af4fa75 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -316,6 +316,12 @@ cn10k_nix_configure(struct rte_eth_dev *eth_dev)
if (rc)
return rc;
+ if (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY ||
+ dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {
+ /* Register callback to handle security error work */
+ roc_nix_inl_cb_register(cn10k_eth_sec_sso_work_cb, NULL);
+ }
+
/* Update offload flags */
dev->rx_offload_flags = nix_rx_offload_flags(eth_dev);
dev->tx_offload_flags = nix_tx_offload_flags(eth_dev);
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index 0982158..13403e1 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -82,6 +82,9 @@ void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
/* Security context setup */
void cn10k_eth_sec_ops_override(void);
+/* SSO Work callback */
+void cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args);
+
#define LMT_OFF(lmt_addr, lmt_num, offset)
\
(void *)((uintptr_t)(lmt_addr) + \
((uint64_t)(lmt_num) << ROC_LMT_LINE_SIZE_LOG2) + (offset))
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 6fbf444..ac45056 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -138,7 +138,7 @@ static const struct rte_security_capability
cn10k_eth_sec_capabilities[] = {
}
};
-static void
+void
cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
{
struct rte_eth_event_ipsec_desc desc;
@@ -251,9 +251,6 @@ cn10k_eth_sec_session_create(void *device,
if (rte_security_dynfield_register() < 0)
return -ENOTSUP;
- if (rte_eal_process_type() == RTE_PROC_PRIMARY)
- roc_nix_inl_cb_register(cn10k_eth_sec_sso_work_cb, NULL);
-
ipsec = &conf->ipsec;
crypto = conf->crypto_xform;
inbound = !!(ipsec->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS);
--
2.8.4
[PATCH 14/20] net/cnxk: realloc inline dev XAQ for security
Realloc inline dev XAQ when Rx/Tx security ie enabled with new packet pool as XAQ should be large enough to hold all mbufs if inline outbound reports error or all mbufs. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cnxk_ethdev.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 9ede66e..9a1f97b 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -545,6 +545,11 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, nb_desc = RTE_MAX(nb_desc, pkt_pool_limit); } + /* Its a no-op when inline device is not used */ + if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY || + dev->tx_offloads & RTE_ETH_TX_OFFLOAD_SECURITY) + roc_nix_inl_dev_xaq_realloc(mp->pool_id); + /* Setup ROC CQ */ cq = &dev->cqs[qid]; cq->qid = qid; -- 2.8.4
[PATCH 15/20] net/cnxk: use raw mbuf free on inline sec err
Use raw mbuf free on inline sec error to simulate
HW NPA free instead of doing rte_pktmbuf_free(). This
is needed as the callback will not be called from
DPDK lcore.
Fixes: 69daa9e5022b ("net/cnxk: support inline security setup for cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_ethdev_sec.c | 37 -
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index ac45056..044b20c 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -138,6 +138,20 @@ static const struct rte_security_capability
cn10k_eth_sec_capabilities[] = {
}
};
+static inline void
+cnxk_pktmbuf_free_no_cache(struct rte_mbuf *mbuf)
+{
+ struct rte_mbuf *next;
+
+ if (!mbuf)
+ return;
+ do {
+ next = mbuf->next;
+ roc_npa_aura_op_free(mbuf->pool->pool_id, 1, (rte_iova_t)mbuf);
+ mbuf = next;
+ } while (mbuf != NULL);
+}
+
void
cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
{
@@ -148,6 +162,7 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
struct cpt_cn10k_res_s *res;
struct rte_eth_dev *eth_dev;
struct cnxk_eth_dev *dev;
+ static uint64_t warn_cnt;
uint16_t dlen_adj, rlen;
struct rte_mbuf *mbuf;
uintptr_t sa_base;
@@ -161,7 +176,7 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
/* Event from inbound inline dev due to IPSEC packet bad L4 */
mbuf = (struct rte_mbuf *)(gw[1] - sizeof(struct rte_mbuf));
plt_nix_dbg("Received mbuf %p from inline dev inbound", mbuf);
- rte_pktmbuf_free(mbuf);
+ cnxk_pktmbuf_free_no_cache(mbuf);
return;
case RTE_EVENT_TYPE_CPU:
/* Check for subtype */
@@ -212,17 +227,29 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
case ROC_IE_OT_UCC_ERR_SA_OVERFLOW:
desc.subtype = RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW;
break;
+ case ROC_IE_OT_UCC_ERR_PKT_IP:
+ warn_cnt++;
+ if (warn_cnt % 1 == 0)
+ plt_warn("Outbound error, bad ip pkt, mbuf %p,"
+" sa_index %u (total warnings %" PRIu64 ")",
+mbuf, sess_priv.sa_idx, warn_cnt);
+ desc.subtype = RTE_ETH_EVENT_IPSEC_UNKNOWN;
+ break;
default:
- plt_warn("Outbound error, mbuf %p, sa_index %u, "
-"compcode %x uc %x", mbuf, sess_priv.sa_idx,
-res->compcode, res->uc_compcode);
+ warn_cnt++;
+ if (warn_cnt % 1 == 0)
+ plt_warn("Outbound error, mbuf %p, sa_index %u,"
+" compcode %x uc %x,"
+" (total warnings %" PRIu64 ")",
+mbuf, sess_priv.sa_idx, res->compcode,
+res->uc_compcode, warn_cnt);
desc.subtype = RTE_ETH_EVENT_IPSEC_UNKNOWN;
break;
}
desc.metadata = (uint64_t)priv->userdata;
rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
- rte_pktmbuf_free(mbuf);
+ cnxk_pktmbuf_free_no_cache(mbuf);
}
static int
--
2.8.4
[PATCH 16/20] net/cnxk: use NPA batch burst free for meta buffers
Currently meta buffers are freed in bursts of one LMT line
i.e 15 pointers. Instead free them in bursts of 16 LMTlines
which is 240 ptrs for better perf.
Also mark mempool objects as get and put in missing places.
Signed-off-by: Nithin Dabilpuram
---
drivers/event/cnxk/cn10k_worker.h | 13 -
drivers/net/cnxk/cn10k_rx.h | 114 +++---
2 files changed, 107 insertions(+), 20 deletions(-)
diff --git a/drivers/event/cnxk/cn10k_worker.h
b/drivers/event/cnxk/cn10k_worker.h
index 78d029b..42be92d 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -93,12 +93,16 @@ cn10k_sso_hws_forward_event(struct cn10k_sso_hws *ws,
}
static __rte_always_inline void
-cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, uint8_t port_id,
+cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t __mbuf, uint8_t port_id,
const uint32_t tag, const uint32_t flags,
const void *const lookup_mem)
{
const uint64_t mbuf_init = 0x10001ULL | RTE_PKTMBUF_HEADROOM |
(flags & NIX_RX_OFFLOAD_TSTAMP_F ? 8 : 0);
+ struct rte_mbuf *mbuf = (struct rte_mbuf *)__mbuf;
+
+ /* Mark mempool obj as "get" as it is alloc'ed by NIX */
+ RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
cn10k_nix_cqe_to_mbuf((struct nix_cqe_hdr_s *)wqe, tag,
(struct rte_mbuf *)mbuf, lookup_mem,
@@ -154,6 +158,9 @@ cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const
uint32_t flags,
mbuf = (struct rte_mbuf *)((char *)cqe -
sizeof(struct rte_mbuf));
+ /* Mark mempool obj as "get" as it is alloc'ed by NIX */
+ RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);
+
/* Translate meta to mbuf */
if (flags & NIX_RX_OFFLOAD_SECURITY_F) {
const uint64_t cq_w1 = *((const uint64_t *)cqe + 1);
@@ -275,6 +282,10 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct
rte_event *ev,
*(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr;
cn10k_process_vwqe(gw.u64[1], port, flags, lookup_mem,
ws->tstamp, ws->lmt_base);
+ /* Mark vector mempool object as get */
+ RTE_MEMPOOL_CHECK_COOKIES(
+ rte_mempool_from_obj((void *)gw.u64[1]),
+ (void **)&gw.u64[1], 1, 1);
}
}
diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index a2442d3..a8a4e65 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -67,6 +67,24 @@ nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
}
static __rte_always_inline void
+nix_sec_flush_meta_burst(uint16_t lmt_id, uint64_t data, uint16_t lnum,
+uintptr_t aura_handle)
+{
+ uint64_t pa;
+
+ /* Prepare PA and Data */
+ pa = roc_npa_aura_handle_to_base(aura_handle) + NPA_LF_AURA_BATCH_FREE0;
+ pa |= ((data & 0x7) << 4);
+
+ data >>= 3;
+ data <<= 19;
+ data |= (uint64_t)lmt_id;
+ data |= (uint64_t)(lnum - 1) << 12;
+
+ roc_lmt_submit_steorl(data, pa);
+}
+
+static __rte_always_inline void
nix_sec_flush_meta(uintptr_t laddr, uint16_t lmt_id, uint8_t loff,
uintptr_t aura_handle)
{
@@ -82,7 +100,7 @@ nix_sec_flush_meta(uintptr_t laddr, uint16_t lmt_id, uint8_t
loff,
*(uint64_t *)laddr = (((uint64_t)(loff & 0x1) << 32) |
roc_npa_aura_handle_to_aura(aura_handle));
- pa |= ((loff >> 1) << 4);
+ pa |= ((uint64_t)(loff >> 1) << 4);
roc_lmt_submit_steorl(lmt_id, pa);
}
@@ -122,6 +140,12 @@ nix_sec_meta_to_mbuf_sc(uint64_t cq_w1, const uint64_t
sa_base, uintptr_t laddr,
*(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
*loff = *loff + 1;
+ /* Mark meta mbuf as put */
+ RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
+
+ /* Mark inner mbuf as get */
+ RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
+
return inner;
}
return mbuf;
@@ -181,6 +205,12 @@ nix_sec_meta_to_mbuf(uint64_t cq_w1, uintptr_t sa_base,
uintptr_t laddr,
*(uint64_t *)(laddr + (*loff << 3)) = (uint64_t)mbuf;
*loff = *loff + 1;
+ /* Mark meta mbuf as put */
+ RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 0);
+
+ /* Mark inner mbuf as get */
+ RTE_MEMPOOL_CHECK_COOKIES(inner->pool, (void **)&inner, 1, 1);
+
/* Return inner mbuf */
return inner;
}
@@ -306,9 +336,6 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const
[PATCH 17/20] net/cnxk: enable packet pool tail drop
Enable packet pool tail drop on RQ when inbound security is not enabled. This is only part of the config. It is a NOP if tail drop is not enabled on NPA_AURA_CTX_S. And tail drop on packet pool AURA is enabled only when that packet pool aura is used by inline device RQ. Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cnxk_ethdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 9a1f97b..aa76d87 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -574,6 +574,7 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, rq->first_skip = first_skip; rq->later_skip = sizeof(struct rte_mbuf); rq->lpb_size = mp->elt_size; + rq->lpb_drop_ena = !(dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY); /* Enable Inline IPSec on RQ, will not be used for Poll mode */ if (roc_nix_inl_inb_is_enabled(nix)) -- 2.8.4
[PATCH 18/20] net/cnxk: enable flow control by default on device configure
Enable flow control by default on device configuration
instead of basing it on Kernel behaviour.
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cnxk_ethdev.c | 24 +++-
1 file changed, 7 insertions(+), 17 deletions(-)
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index aa76d87..e4fbb09 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -306,25 +306,15 @@ static int
nix_init_flow_ctrl_config(struct rte_eth_dev *eth_dev)
{
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
- struct cnxk_fc_cfg *fc = &dev->fc_cfg;
- struct rte_eth_fc_conf fc_conf = {0};
- int rc;
+ enum roc_nix_fc_mode fc_mode = ROC_NIX_FC_FULL;
- /* Both Rx & Tx flow ctrl get enabled(RTE_ETH_FC_FULL) in HW
-* by AF driver, update those info in PMD structure.
-*/
- rc = cnxk_nix_flow_ctrl_get(eth_dev, &fc_conf);
- if (rc)
- goto exit;
+ /* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
+ if (roc_model_is_cn96_ax() &&
+ dev->npc.switch_header_type != ROC_PRIV_FLAGS_HIGIG)
+ fc_mode = ROC_NIX_FC_TX;
- fc->mode = fc_conf.mode;
- fc->rx_pause = (fc_conf.mode == RTE_ETH_FC_FULL) ||
- (fc_conf.mode == RTE_ETH_FC_RX_PAUSE);
- fc->tx_pause = (fc_conf.mode == RTE_ETH_FC_FULL) ||
- (fc_conf.mode == RTE_ETH_FC_TX_PAUSE);
-
-exit:
- return rc;
+ /* By default enable flow control */
+ return roc_nix_fc_mode_set(&dev->nix, fc_mode);
}
static int
--
2.8.4
[PATCH 20/20] net/cnxk: add option to override outbound inline sa iv
Add option to override outbound inline sa iv for debug
purposes via environment variable. User can set env variable as:
export CN10K_ETH_SEC_IV_OVR="0x0, 0x0,..."
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_ethdev_sec.c | 62 +
1 file changed, 62 insertions(+)
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index a2a53c1..a514345 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -252,6 +252,63 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args)
cnxk_pktmbuf_free_no_cache(mbuf);
}
+static void
+outb_dbg_iv_update(struct roc_ot_ipsec_outb_sa *outb_sa, const char *__iv_str)
+{
+ uint8_t *iv_dbg = outb_sa->iv.iv_dbg;
+ char *iv_str = strdup(__iv_str);
+ char *iv_b = NULL, len = 16;
+ char *save;
+ int i;
+
+ if (!iv_str)
+ return;
+
+ if (outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||
+ outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CTR ||
+ outb_sa->w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM ||
+ outb_sa->w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) {
+ memset(outb_sa->iv.s.iv_dbg1, 0, sizeof(outb_sa->iv.s.iv_dbg1));
+ memset(outb_sa->iv.s.iv_dbg2, 0, sizeof(outb_sa->iv.s.iv_dbg2));
+
+ iv_dbg = outb_sa->iv.s.iv_dbg1;
+ for (i = 0; i < 4; i++) {
+ iv_b = strtok_r(i ? NULL : iv_str, ",", &save);
+ if (!iv_b)
+ break;
+ iv_dbg[i] = strtoul(iv_b, NULL, 0);
+ }
+ *(uint32_t *)iv_dbg = rte_be_to_cpu_32(*(uint32_t *)iv_dbg);
+
+ iv_dbg = outb_sa->iv.s.iv_dbg2;
+ for (i = 0; i < 4; i++) {
+ iv_b = strtok_r(NULL, ",", &save);
+ if (!iv_b)
+ break;
+ iv_dbg[i] = strtoul(iv_b, NULL, 0);
+ }
+ *(uint32_t *)iv_dbg = rte_be_to_cpu_32(*(uint32_t *)iv_dbg);
+
+ } else {
+ iv_dbg = outb_sa->iv.iv_dbg;
+ memset(iv_dbg, 0, sizeof(outb_sa->iv.iv_dbg));
+
+ for (i = 0; i < len; i++) {
+ iv_b = strtok_r(i ? NULL : iv_str, ",", &save);
+ if (!iv_b)
+ break;
+ iv_dbg[i] = strtoul(iv_b, NULL, 0);
+ }
+ *(uint64_t *)iv_dbg = rte_be_to_cpu_64(*(uint64_t *)iv_dbg);
+ *(uint64_t *)&iv_dbg[8] =
+ rte_be_to_cpu_64(*(uint64_t *)&iv_dbg[8]);
+ }
+
+ /* Update source of IV */
+ outb_sa->w2.s.iv_src = ROC_IE_OT_SA_IV_SRC_FROM_SA;
+ free(iv_str);
+}
+
static int
cn10k_eth_sec_session_create(void *device,
struct rte_security_session_conf *conf,
@@ -390,6 +447,7 @@ cn10k_eth_sec_session_create(void *device,
struct cn10k_outb_priv_data *outb_priv;
struct cnxk_ipsec_outb_rlens *rlens;
uint64_t sa_base = dev->outb.sa_base;
+ const char *iv_str;
uint32_t sa_idx;
PLT_STATIC_ASSERT(sizeof(struct cn10k_outb_priv_data) <
@@ -416,6 +474,10 @@ cn10k_eth_sec_session_create(void *device,
goto mempool_put;
}
+ iv_str = getenv("CN10K_ETH_SEC_IV_OVR");
+ if (iv_str)
+ outb_dbg_iv_update(outb_sa_dptr, iv_str);
+
/* Save userdata */
outb_priv->userdata = conf->userdata;
outb_priv->sa_idx = sa_idx;
--
2.8.4
[PATCH 19/20] net/cnxk: add dev args for min-max spi
Add support for inline inbound SPI range via devargs
instead of just max SPI value and range being 0..max.
Signed-off-by: Nithin Dabilpuram
---
doc/guides/nics/cnxk.rst | 28 +-
drivers/common/cnxk/roc_nix.h | 5 ++-
drivers/common/cnxk/roc_nix_inl.c | 68 --
drivers/common/cnxk/roc_nix_inl.h | 8 ++--
drivers/common/cnxk/roc_nix_inl_dev.c | 22 +++
drivers/common/cnxk/roc_nix_inl_priv.h | 4 +-
drivers/common/cnxk/roc_nix_priv.h | 1 +
drivers/common/cnxk/version.map| 2 +-
drivers/net/cnxk/cn10k_ethdev_sec.c| 13 +--
drivers/net/cnxk/cn9k_ethdev_sec.c | 10 +++--
drivers/net/cnxk/cnxk_ethdev_devargs.c | 25 +
drivers/net/cnxk/cnxk_ethdev_sec.c | 16 ++--
drivers/net/cnxk/cnxk_lookup.c | 3 +-
13 files changed, 142 insertions(+), 63 deletions(-)
diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 27a9420..e7c5ea5 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -214,6 +214,18 @@ Runtime Config Options
-a 0002:02:00.0,tag_as_xor=1
+- ``Min SPI for inbound inline IPsec`` (default ``0``)
+
+ Min SPI supported for inbound inline IPsec processing can be specified by
+ ``ipsec_in_min_spi`` ``devargs`` parameter.
+
+ For example::
+
+ -a 0002:02:00.0,ipsec_in_min_spi=6
+
+ With the above configuration, application can enable inline IPsec processing
+ for inbound SA with min SPI of 6.
+
- ``Max SPI for inbound inline IPsec`` (default ``255``)
Max SPI supported for inbound inline IPsec processing can be specified by
@@ -224,7 +236,7 @@ Runtime Config Options
-a 0002:02:00.0,ipsec_in_max_spi=128
With the above configuration, application can enable inline IPsec processing
- for 128 inbound SAs (SPI 0-127).
+ with max SPI of 128.
- ``Max SA's for outbound inline IPsec`` (default ``4096``)
@@ -413,6 +425,18 @@ VF ``177D:A0F1``.
Runtime Config Options for inline device
+- ``Min SPI for inbound inline IPsec`` (default ``0``)
+
+ Min SPI supported for inbound inline IPsec processing can be specified by
+ ``ipsec_in_min_spi`` ``devargs`` parameter.
+
+ For example::
+
+ -a 0002:1d:00.0,ipsec_in_min_spi=6
+
+ With the above configuration, application can enable inline IPsec processing
+ for inbound SA with min SPI of 6 for traffic aggregated on inline device.
+
- ``Max SPI for inbound inline IPsec`` (default ``255``)
Max SPI supported for inbound inline IPsec processing can be specified by
@@ -423,7 +447,7 @@ Runtime Config Options for inline device
-a 0002:1d:00.0,ipsec_in_max_spi=128
With the above configuration, application can enable inline IPsec processing
- for 128 inbound SAs (SPI 0-127) for traffic aggregated on inline device.
+ for inbound SA with max SPI of 128 for traffic aggregated on inline device.
Debugging Options
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 57a595f..ea58e06 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -384,8 +384,9 @@ struct roc_nix {
uint8_t lock_rx_ctx;
uint32_t outb_nb_desc;
uint16_t outb_nb_crypto_qs;
- uint16_t ipsec_in_max_spi;
- uint16_t ipsec_out_max_sa;
+ uint32_t ipsec_in_min_spi;
+ uint32_t ipsec_in_max_spi;
+ uint32_t ipsec_out_max_sa;
bool ipsec_out_sso_pffunc;
/* End of input parameters */
/* LMT line base for "Per Core Tx LMT line" mode*/
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index 11a1691..7bf89a4 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -19,12 +19,16 @@ PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ ==
static int
nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix)
{
- uint16_t ipsec_in_max_spi = roc_nix->ipsec_in_max_spi;
+ uint32_t ipsec_in_min_spi = roc_nix->ipsec_in_min_spi;
+ uint32_t ipsec_in_max_spi = roc_nix->ipsec_in_max_spi;
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct roc_nix_ipsec_cfg cfg;
+ uint64_t max_sa, i;
size_t inb_sa_sz;
- int rc, i;
void *sa;
+ int rc;
+
+ max_sa = plt_align32pow2(ipsec_in_max_spi - ipsec_in_min_spi + 1);
/* CN9K SA size is different */
if (roc_model_is_cn9k())
@@ -34,14 +38,15 @@ nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix)
/* Alloc contiguous memory for Inbound SA's */
nix->inb_sa_sz = inb_sa_sz;
- nix->inb_sa_base = plt_zmalloc(inb_sa_sz * ipsec_in_max_spi,
+ nix->inb_spi_mask = max_sa - 1;
+ nix->inb_sa_base = plt_zmalloc(inb_sa_sz * max_sa,
ROC_NIX_INL_SA_BASE_ALIGN);
if (!nix->inb_sa_base) {
plt_err("Failed to allocate memory for Inbound SA");
RE: [EXT] [PATCH 1/4] crypto: add dsa random number k
Hi Arek, > This commit adds random number 'k' to dsa > op param struct. > > Signed-off-by: Arek Kusztal > --- Could you please update the description of the patches, To describe the need of the patch and what has been done in the patch. Most of the commits in this set does not describe the need of the patch.
RE: [PATCH v2] net/af_xdp: re-enable secondary process support
>
> On 2/4/2022 12:54 PM, Ciara Loftus wrote:
> > Secondary process support had been disabled for the AF_XDP PMD
> > because there was no logic in place to share the AF_XDP socket
> > file descriptors between the processes. This commit introduces
> > this logic using the IPC APIs.
> >
> > Since AF_XDP rings are single-producer single-consumer, rx/tx
> > in the secondary process is disabled. However other operations
> > including retrieval of stats are permitted.
> >
> > Signed-off-by: Ciara Loftus
> >
> > ---
> > v1 -> v2:
> > * Rebase to next-net
> >
> > RFC -> v1:
> > * Added newline to af_xdp.rst
> > * Fixed spelling errors
> > * Fixed potential NULL dereference in init_internals
> > * Fixed potential free of address-of expression in afxdp_mp_request_fds
> > ---
> > doc/guides/nics/af_xdp.rst | 9 ++
> > doc/guides/nics/features/af_xdp.ini| 1 +
> > doc/guides/rel_notes/release_22_03.rst | 1 +
> > drivers/net/af_xdp/rte_eth_af_xdp.c| 210
> +++--
> > 4 files changed, 207 insertions(+), 14 deletions(-)
> >
> > diff --git a/doc/guides/nics/af_xdp.rst b/doc/guides/nics/af_xdp.rst
> > index db02ea1984..eb4eab28a8 100644
> > --- a/doc/guides/nics/af_xdp.rst
> > +++ b/doc/guides/nics/af_xdp.rst
> > @@ -141,4 +141,13 @@ Limitations
> > NAPI context from a watchdog timer instead of from softirqs. More
> information
> > on this feature can be found at [1].
> >
> > +- **Secondary Processes**
> > +
> > + Rx and Tx are not supported for secondary processes due to the single-
> producer
> > + single-consumer nature of the AF_XDP rings. However other operations
> including
> > + statistics retrieval are permitted.
>
> Hi Ciara,
>
> Isn't this limitation same for all PMDs, like not both primary & secondary can
> Rx/Tx
> from same queue at the same time.
> But primary can initiallize the PMD and secondary can do the datapath,
> or isn't af_xdp supports multiple queue, if so some queues can be used by
> primary and some by secondary for datapath.
>
> Is there anyhing special for af_xdp that prevents it?
Hi Ferruh,
Thanks for the review.
Each queue of the PMD corresponds to a new AF_XDP socket.
Each socket has an RX and TX ring that is mmapped from the kernel to userspace
and this mapping is only valid for the primary process.
I did not figure out a way to share that mapping with the secondary process
successfully. Can you think of anything that might work?
>
> > + The maximum number of queues permitted for PMDs operating in this
> model is 8
> > + as this is the maximum number of fds that can be sent through the IPC
> APIs as
> > + defined by RTE_MP_MAX_FD_NUM.
> > +
> > [1] https://lwn.net/Articles/837010/
> > diff --git a/doc/guides/nics/features/af_xdp.ini
> b/doc/guides/nics/features/af_xdp.ini
> > index 54b738e616..8e7e075aaf 100644
> > --- a/doc/guides/nics/features/af_xdp.ini
> > +++ b/doc/guides/nics/features/af_xdp.ini
> > @@ -9,4 +9,5 @@ Power mgmt address monitor = Y
> > MTU update = Y
> > Promiscuous mode = Y
> > Stats per queue = Y
> > +Multiprocess aware = Y
> > x86-64 = Y
> > diff --git a/doc/guides/rel_notes/release_22_03.rst
> b/doc/guides/rel_notes/release_22_03.rst
> > index bf2e3f78a9..dfd2cbbccf 100644
> > --- a/doc/guides/rel_notes/release_22_03.rst
> > +++ b/doc/guides/rel_notes/release_22_03.rst
> > @@ -58,6 +58,7 @@ New Features
> > * **Updated AF_XDP PMD**
> >
> > * Added support for libxdp >=v1.2.2.
> > + * Re-enabled secondary process support. RX/TX is not supported.
> >
> > * **Updated Cisco enic driver.**
> >
> > diff --git a/drivers/net/af_xdp/rte_eth_af_xdp.c
> b/drivers/net/af_xdp/rte_eth_af_xdp.c
> > index 1b6192fa44..407f6d8dbe 100644
> > --- a/drivers/net/af_xdp/rte_eth_af_xdp.c
> > +++ b/drivers/net/af_xdp/rte_eth_af_xdp.c
> > @@ -80,6 +80,18 @@ RTE_LOG_REGISTER_DEFAULT(af_xdp_logtype,
> NOTICE);
> >
> > #define ETH_AF_XDP_ETH_OVERHEAD
> (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN)
> >
> > +#define ETH_AF_XDP_MP_KEY "afxdp_mp_send_fds"
> > +
> > +static int afxdp_dev_count;
> > +
> > +/* Message header to synchronize fds via IPC */
> > +struct ipc_hdr {
> > + char port_name[RTE_DEV_NAME_MAX_LEN];
> > + /* The file descriptors are in the dedicated part
> > +* of the Unix message to be translated by the kernel.
> > +*/
> > +};
> > +
> > struct xsk_umem_info {
> > struct xsk_umem *umem;
> > struct rte_ring *buf_ring;
> > @@ -147,6 +159,10 @@ struct pmd_internals {
> > struct pkt_tx_queue *tx_queues;
> > };
> >
> > +struct pmd_process_private {
> > + int rxq_xsk_fds[RTE_MAX_QUEUES_PER_PORT];
> > +};
> > +
> > #define ETH_AF_XDP_IFACE_ARG "iface"
> > #define ETH_AF_XDP_START_QUEUE_ARG"start_queue"
> > #define ETH_AF_XDP_QUEUE_COUNT_ARG
> "queue_count"
> > @@ -795,11 +811,12 @@ static int
> > eth_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
> > {
> >
