[PATCH v2 2/2] net/cnxk: support priority flow control
From: Sunil Kumar Kori
Patch implements priority flow control support for CNXK platforms.
Signed-off-by: Sunil Kumar Kori
---
v2:
- fix application restart issue.
drivers/net/cnxk/cnxk_ethdev.c | 27 +
drivers/net/cnxk/cnxk_ethdev.h | 16 +++
drivers/net/cnxk/cnxk_ethdev_ops.c | 177 +++--
3 files changed, 211 insertions(+), 9 deletions(-)
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 74f625553d..e2690f0640 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1260,6 +1260,8 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev)
goto cq_fini;
}
+ /* Initialize TC to SQ mapping as invalid */
+ memset(dev->pfc_tc_sq_map, 0xFF, sizeof(dev->pfc_tc_sq_map));
/*
* Restore queue config when reconfigure followed by
* reconfigure and no queue configure invoked from application case.
@@ -1548,6 +1550,7 @@ struct eth_dev_ops cnxk_eth_dev_ops = {
.tx_burst_mode_get = cnxk_nix_tx_burst_mode_get,
.flow_ctrl_get = cnxk_nix_flow_ctrl_get,
.flow_ctrl_set = cnxk_nix_flow_ctrl_set,
+ .priority_flow_ctrl_queue_set = cnxk_nix_priority_flow_ctrl_queue_set,
.dev_set_link_up = cnxk_nix_set_link_up,
.dev_set_link_down = cnxk_nix_set_link_down,
.get_module_info = cnxk_nix_get_module_info,
@@ -1721,6 +1724,8 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool
reset)
{
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
const struct eth_dev_ops *dev_ops = eth_dev->dev_ops;
+ struct rte_eth_pfc_queue_conf pfc_conf = {0};
+ struct rte_eth_fc_conf fc_conf = {0};
struct roc_nix *nix = &dev->nix;
int rc, i;
@@ -1736,6 +1741,28 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool
reset)
roc_nix_npc_rx_ena_dis(nix, false);
+ /* Restore 802.3 Flow control configuration */
+ fc_conf.mode = RTE_ETH_FC_NONE;
+ rc = cnxk_nix_flow_ctrl_set(eth_dev, &fc_conf);
+
+ pfc_conf.mode = RTE_ETH_FC_NONE;
+ for (i = 0; i < 16; i++) {
+ if (dev->pfc_tc_sq_map[i] != 0x) {
+ pfc_conf.rx_pause.tx_qid = dev->pfc_tc_sq_map[i];
+ pfc_conf.rx_pause.tc = i;
+ pfc_conf.tx_pause.rx_qid = i;
+ pfc_conf.tx_pause.tc = i;
+ rc = cnxk_nix_priority_flow_ctrl_queue_set(eth_dev,
+ &pfc_conf);
+ if (rc)
+ plt_err("Failed to reset PFC. error code(%d)",
+ rc);
+ }
+ }
+
+ fc_conf.mode = RTE_ETH_FC_FULL;
+ rc = cnxk_nix_flow_ctrl_set(eth_dev, &fc_conf);
+
/* Disable and free rte_meter entries */
nix_meter_fini(dev);
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5bfda3d815..28fb19307a 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -143,6 +143,16 @@ struct cnxk_fc_cfg {
uint8_t tx_pause;
};
+struct cnxk_pfc_cfg {
+ struct cnxk_fc_cfg fc_cfg;
+ uint16_t class_en;
+ uint16_t pause_time;
+ uint8_t rx_tc;
+ uint8_t rx_qid;
+ uint8_t tx_tc;
+ uint8_t tx_qid;
+};
+
struct cnxk_eth_qconf {
union {
struct rte_eth_txconf tx;
@@ -366,6 +376,8 @@ struct cnxk_eth_dev {
struct cnxk_eth_qconf *rx_qconf;
/* Flow control configuration */
+ uint16_t pfc_tc_sq_map[16];
+ struct cnxk_pfc_cfg pfc_cfg;
struct cnxk_fc_cfg fc_cfg;
/* PTP Counters */
@@ -467,6 +479,8 @@ int cnxk_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev,
struct rte_eth_fc_conf *fc_conf);
int cnxk_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev,
struct rte_eth_fc_conf *fc_conf);
+int cnxk_nix_priority_flow_ctrl_queue_set(struct rte_eth_dev *eth_dev,
+ struct rte_eth_pfc_queue_conf
*pfc_conf);
int cnxk_nix_set_link_up(struct rte_eth_dev *eth_dev);
int cnxk_nix_set_link_down(struct rte_eth_dev *eth_dev);
int cnxk_nix_get_module_info(struct rte_eth_dev *eth_dev,
@@ -606,6 +620,8 @@ int nix_mtr_color_action_validate(struct rte_eth_dev
*eth_dev, uint32_t id,
uint32_t *prev_id, uint32_t *next_id,
struct cnxk_mtr_policy_node *policy,
int *tree_level);
+int nix_priority_flow_ctrl_configure(struct rte_eth_dev *eth_dev,
+struct cnxk_pfc_cfg *conf);
/* Inlines */
static __rte_always_inline uint64_t
diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c
b/drivers/net/cnxk/cnxk_ethdev_ops.c
index ce5f1f7240..b3173c343e 100644
--- a/drivers/net/cnxk/cnxk_ethdev_op
[PATCH v2 1/2] common/cnxk: support priority flow ctrl config API
From: Sunil Kumar Kori
CNXK platforms support priority flow control(802.1qbb) to pause
respective traffic per class on that link.
Patch adds RoC interface to configure priority flow control on MAC
block i.e. CGX on cn9k and RPM on cn10k.
Signed-off-by: Sunil Kumar Kori
---
v2:
- fix RoC API naming convention.
drivers/common/cnxk/roc_mbox.h | 17 +++
drivers/common/cnxk/roc_nix.h| 21
drivers/common/cnxk/roc_nix_fc.c | 95 ++--
drivers/common/cnxk/roc_nix_priv.h | 4 +-
drivers/common/cnxk/roc_nix_tm.c | 162 ++-
drivers/common/cnxk/roc_nix_tm_ops.c | 14 ++-
drivers/common/cnxk/version.map | 4 +
7 files changed, 298 insertions(+), 19 deletions(-)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index b63fe108c9..12a599 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -95,6 +95,8 @@ struct mbox_msghdr {
msg_rsp) \
M(CGX_STATS_RST, 0x21A, cgx_stats_rst, msg_req, msg_rsp) \
M(RPM_STATS, 0x21C, rpm_stats, msg_req, rpm_stats_rsp) \
+ M(CGX_PRIO_FLOW_CTRL_CFG, 0x21F, cgx_prio_flow_ctrl_cfg, cgx_pfc_cfg, \
+ cgx_pfc_rsp) \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
M(NPA_LF_ALLOC, 0x400, npa_lf_alloc, npa_lf_alloc_req, \
npa_lf_alloc_rsp)\
@@ -540,6 +542,19 @@ struct cgx_pause_frm_cfg {
uint8_t __io tx_pause;
};
+struct cgx_pfc_cfg {
+ struct mbox_msghdr hdr;
+ uint8_t __io rx_pause;
+ uint8_t __io tx_pause;
+ uint16_t __io pfc_en; /* bitmap indicating enabled traffic classes */
+};
+
+struct cgx_pfc_rsp {
+ struct mbox_msghdr hdr;
+ uint8_t __io rx_pause;
+ uint8_t __io tx_pause;
+};
+
struct sfp_eeprom_s {
#define SFP_EEPROM_SIZE 256
uint16_t __io sff_id;
@@ -1115,6 +1130,8 @@ struct nix_bp_cfg_req {
* so maximum 64 channels are possible.
*/
#define NIX_MAX_CHAN 64
+#define NIX_CGX_MAX_CHAN 16
+#define NIX_LBK_MAX_CHAN NIX_MAX_CHAN
struct nix_bp_cfg_rsp {
struct mbox_msghdr hdr;
/* Channel and bpid mapping */
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 69a5e8e7b4..e05b7b7dd8 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -165,16 +165,27 @@ struct roc_nix_fc_cfg {
struct {
uint32_t rq;
+ uint16_t tc;
uint16_t cq_drop;
bool enable;
} cq_cfg;
struct {
+ uint32_t sq;
+ uint16_t tc;
bool enable;
} tm_cfg;
};
};
+struct roc_nix_pfc_cfg {
+ enum roc_nix_fc_mode mode;
+ /* For SET, tc must be [0, 15].
+* For GET, TC will represent bitmap
+*/
+ uint16_t tc;
+};
+
struct roc_nix_eeprom_info {
#define ROC_NIX_EEPROM_SIZE 256
uint16_t sff_id;
@@ -478,6 +489,7 @@ void __roc_api roc_nix_unregister_cq_irqs(struct roc_nix
*roc_nix);
enum roc_nix_tm_tree {
ROC_NIX_TM_DEFAULT = 0,
ROC_NIX_TM_RLIMIT,
+ ROC_NIX_TM_PFC,
ROC_NIX_TM_USER,
ROC_NIX_TM_TREE_MAX,
};
@@ -624,6 +636,7 @@ roc_nix_tm_shaper_default_red_algo(struct roc_nix_tm_node
*node,
int __roc_api roc_nix_tm_lvl_cnt_get(struct roc_nix *roc_nix);
int __roc_api roc_nix_tm_lvl_have_link_access(struct roc_nix *roc_nix, int
lvl);
int __roc_api roc_nix_tm_prepare_rate_limited_tree(struct roc_nix *roc_nix);
+int __roc_api roc_nix_tm_pfc_prepare_tree(struct roc_nix *roc_nix);
bool __roc_api roc_nix_tm_is_user_hierarchy_enabled(struct roc_nix *nix);
int __roc_api roc_nix_tm_tree_type_get(struct roc_nix *nix);
@@ -736,6 +749,14 @@ int __roc_api roc_nix_fc_config_get(struct roc_nix
*roc_nix,
int __roc_api roc_nix_fc_mode_set(struct roc_nix *roc_nix,
enum roc_nix_fc_mode mode);
+int __roc_api roc_nix_pfc_mode_set(struct roc_nix *roc_nix,
+ struct roc_nix_pfc_cfg *pfc_cfg);
+
+int __roc_api roc_nix_pfc_mode_get(struct roc_nix *roc_nix,
+ struct roc_nix_pfc_cfg *pfc_cfg);
+
+uint16_t __roc_api roc_nix_chan_count_get(struct roc_nix *roc_nix);
+
enum roc_nix_fc_mode __roc_api roc_nix_fc_mode_get(struct roc_nix *roc_nix);
void __roc_api rox_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id,
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index ca29cd2bf9..95f466242a 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -36,7 +36,7 @@ nix_fc_rxchan_bpid_set(struct roc
RE: [RFC 1/3] ethdev: support GRE optional fields
Hi Ori,
> -Original Message-
> From: Ori Kam
> Sent: Tuesday, January 11, 2022 3:24 PM
> To: Sean Zhang (Networking SW) ; Matan Azrad
> ; NBU-Contact-Thomas Monjalon (EXTERNAL)
> ; Ferruh Yigit ; Andrew
> Rybchenko
> Cc: dev@dpdk.org
> Subject: RE: [RFC 1/3] ethdev: support GRE optional fields
>
> Hi Sean,
>
> > -Original Message-
> > From: Sean Zhang (Networking SW)
> > Sent: Tuesday, January 11, 2022 5:45 AM
> > Subject: RE: [RFC 1/3] ethdev: support GRE optional fields
> >
> > Hi Ori,
> >
> > > -Original Message-
> > > From: Ori Kam
> > > Sent: Sunday, January 9, 2022 8:30 PM
> > > To: Sean Zhang (Networking SW) ; Matan Azrad
> > > ; NBU-Contact-Thomas Monjalon (EXTERNAL)
> > > ; Ferruh Yigit ; Andrew
> > > Rybchenko
> > > Cc: dev@dpdk.org
> > > Subject: RE: [RFC 1/3] ethdev: support GRE optional fields
> > >
> > > Hi Sean,
> > >
> > >
> > > > -Original Message-
> > > > From: Sean Zhang
> > > > Subject: [RFC 1/3] ethdev: support GRE optional fields
> > > >
> > > > Add flow pattern items and header format for matching optional
> > > > fields
> > > > (checksum/key/sequence) in GRE header. And the flags in gre item
> > > > should be correspondingly set with the new added items.
> > > >
> > > > Signed-off-by: Sean Zhang
> > > > ---
> > > > doc/guides/prog_guide/rte_flow.rst | 16
> > > > lib/ethdev/rte_flow.c | 1 +
> > > > lib/ethdev/rte_flow.h | 18 ++
> > > > 3 files changed, 35 insertions(+)
> > > >
> > > > diff --git a/doc/guides/prog_guide/rte_flow.rst
> > > > b/doc/guides/prog_guide/rte_flow.rst
> > > > index c51ed88..48d5685 100644
> > > > --- a/doc/guides/prog_guide/rte_flow.rst
> > > > +++ b/doc/guides/prog_guide/rte_flow.rst
> > > > @@ -1113,6 +1113,22 @@ This should be preceded by item ``GRE``.
> > > > - Value to be matched is a big-endian 32 bit integer.
> > > > - When this item present it implicitly match K bit in default mask as
> > > > "1"
> > > >
> > > > +Item: ``GRE_OPTION``
> > > > +
> > > > +
> > > > +Matches a GRE optional fields (checksum/key/sequence).
> > > > +This should be preceded by item ``GRE``.
> > > > +
> > > > +- ``checksum``: checksum.
> > > > +- ``key``: key.
> > > > +- ``sequence``: sequence.
> > > > +- The items in GRE_OPTION do not change bit
> > > > +flags(c_bit/k_bit/s_bit) in GRE
> > > > + item. The bit flags need be set with GRE item by application.
> > > > +When the items
> > > > + present, the corresponding bits in GRE spec and mask should be
> > > > +set "1" by
> > > > + application, it means to match specified value of the fields.
> > > > +When the items
> > > > + no present, but the corresponding bits in GRE spec and mask is
> > > > +"1", it means
> > > > + to match any value of the fields.
> > > > +
> > > > Item: ``FUZZY``
> > > > ^^^
> > > >
> > > > diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c index
> > > > a93f68a..03bd1df 100644
> > > > --- a/lib/ethdev/rte_flow.c
> > > > +++ b/lib/ethdev/rte_flow.c
> > > > @@ -139,6 +139,7 @@ struct rte_flow_desc_data {
> > > > MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
> > > > MK_FLOW_ITEM(TAG, sizeof(struct rte_flow_item_tag)),
> > > > MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
> > > > + MK_FLOW_ITEM(GRE_OPTION, sizeof(struct rte_gre_hdr_option)),
> > >
> > > I think that this new item is making the gre_key redundant, why not
> > > deprecate it?
> >
> > Do you mean to add description like bellow?
> >
> > Item: ``GRE_KEY``
> > ^^^
> > +This action is deprecated. Consider `Item: GRE_OPTION`.
>
> Yes and also add the depreciation notice in the release notes, there is also
> need to see if other PMD are using the GRE_KEY.
> But to be clear do not remove this support now just send notice that it
> should be removed.
Got it, and will update in v2 patch.
Thanks,
Sean
>
> >
> > >
> > > > MK_FLOW_ITEM(GTP_PSC, sizeof(struct rte_flow_item_gtp_psc)),
> > > > MK_FLOW_ITEM(PPPOES, sizeof(struct rte_flow_item_pppoe)),
> > > > MK_FLOW_ITEM(PPPOED, sizeof(struct rte_flow_item_pppoe)), diff -
> > > -git
> > > > a/lib/ethdev/rte_flow.h b/lib/ethdev/rte_flow.h index
> > > > 1031fb2..27b4140
> > > > 100644
> > > > --- a/lib/ethdev/rte_flow.h
> > > > +++ b/lib/ethdev/rte_flow.h
> > > > @@ -660,6 +660,13 @@ enum rte_flow_item_type {
> > > > * See struct rte_flow_item_ppp.
> > > > */
> > > > RTE_FLOW_ITEM_TYPE_PPP,
> > > > +
> > > > + /**
> > > > +* Matches GRE optional fields.
> > > > +*
> > > > +* See struct rte_gre_hdr_option.
> > > > +*/
> > > > + RTE_FLOW_ITEM_TYPE_GRE_OPTION,
> > > > };
> > > >
> > > > /**
> > > > @@ -1196,6 +1203,17 @@ struct rte_flow_item_gre { #endif
> > > >
> > > > /**
> > > > + * RTE_FLOW_ITEM_TYPE_GRE_OPTION.
> > > > + *
> > > > + * Matches GRE optional fields in header.
> > > > + */
> > > > +struct rt
[PATCH v1 0/1] gpu/cuda: expose GPU memory with GDRCopy
From: Elena Agostini GPU CUDA implementation of the new gpudev functions to expose GPU memory to the CPU. Today GDRCopy library is required to pin and DMA map the GPU memory through the BAR1 of the GPU and expose it to the CPU. Goal here is to hide technical details GDRCopy library and expose the functionality through the generic gpudev layer. GDRCopy can be found here: https://github.com/NVIDIA/gdrcopy To build GPU CUDA driver with GDRCopy, you need to build DPDK indicating the gdrapi.h header file with -Dc_args="-I/path/to/gdrapi/". To execute you need to indicate the path to libgdrapi.so library with the environment variable GDRCOPY_PATH_L=/path/to/gdrcopy/lib/ If GDRCopy is not built with GPU CUDA driver, the GPU expose functionality will not be supported by the driver. This is an indipendent feature. All the other GPU CUDA driver capabilities are not affected if GDRCopy is not built. Signed-off-by: Elena Agostini --- Dependency on https://patches.dpdk.org/project/dpdk/patch/20220108000457.31104-1-eagost...@nvidia.com/ Elena Agostini (1): gpu/cuda: expose GPU memory with GDRCopy drivers/gpu/cuda/cuda.c | 101 + drivers/gpu/cuda/gdrcopy.c | 139 +++ drivers/gpu/cuda/gdrcopy.h | 29 drivers/gpu/cuda/meson.build | 6 +- 4 files changed, 274 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/cuda/gdrcopy.c create mode 100644 drivers/gpu/cuda/gdrcopy.h -- 2.17.1
[PATCH v1 1/1] gpu/cuda: expose GPU memory with GDRCopy
From: Elena Agostini
GPU CUDA implementation of the new gpudev functions
to expose GPU memory to the CPU.
Today GDRCopy library is required to pin and DMA map
the GPU memory through the BAR1 of the GPU and expose
it to the CPU.
Goal here is to hide technical details GDRCopy library
and expose the functionality through the generic
gpudev layer.
GDRCopy can be found here: https://github.com/NVIDIA/gdrcopy
To build GPU CUDA driver with GDRCopy, you need to build
DPDK indicating the gdrapi.h header file with
-Dc_args="-I/path/to/gdrapi/".
To execute you need to indicate the path to libgdrapi.so
library with the environment variable
GDRCOPY_PATH_L=/path/to/gdrcopy/lib/
If GDRCopy is not built with GPU CUDA driver, the GPU expose
functionality will not be supported by the driver.
This is an indipendent feature.
All the other GPU CUDA driver capabilities are not affected
if GDRCopy is not built.
Signed-off-by: Elena Agostini
---
Dependency on
https://patches.dpdk.org/project/dpdk/patch/20220108000457.31104-1-eagost...@nvidia.com/
---
drivers/gpu/cuda/cuda.c | 101 +
drivers/gpu/cuda/gdrcopy.c | 139 +++
drivers/gpu/cuda/gdrcopy.h | 29
drivers/gpu/cuda/meson.build | 6 +-
4 files changed, 274 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/cuda/gdrcopy.c
create mode 100644 drivers/gpu/cuda/gdrcopy.h
diff --git a/drivers/gpu/cuda/cuda.c b/drivers/gpu/cuda/cuda.c
index 882df08e56..d66d6b76b9 100644
--- a/drivers/gpu/cuda/cuda.c
+++ b/drivers/gpu/cuda/cuda.c
@@ -17,6 +17,8 @@
#include
#include
+#include "gdrcopy.h"
+
#define CUDA_DRIVER_MIN_VERSION 11040
#define CUDA_API_MIN_VERSION 3020
@@ -52,6 +54,8 @@ static void *cudalib;
static unsigned int cuda_api_version;
static int cuda_driver_version;
+static gdr_t gdrc_h;
+
/* NVIDIA GPU vendor */
#define NVIDIA_GPU_VENDOR_ID (0x10de)
@@ -144,6 +148,7 @@ struct mem_entry {
struct rte_gpu *dev;
CUcontext ctx;
cuda_ptr_key pkey;
+ gdr_mh_t mh;
enum mem_type mtype;
struct mem_entry *prev;
struct mem_entry *next;
@@ -943,6 +948,87 @@ cuda_wmb(struct rte_gpu *dev)
return 0;
}
+static int
+cuda_mem_expose(struct rte_gpu *dev, __rte_unused size_t size, void *ptr_in,
void **ptr_out)
+{
+ struct mem_entry *mem_item;
+ cuda_ptr_key hk;
+
+ if (dev == NULL)
+ return -ENODEV;
+
+ if (gdrc_h == NULL) {
+ rte_cuda_log(ERR, "GDRCopy not built or loaded. Can't expose
GPU memory.");
+ rte_errno = ENOTSUP;
+ return -rte_errno;
+ }
+
+ hk = get_hash_from_ptr((void *)ptr_in);
+
+ mem_item = mem_list_find_item(hk);
+ if (mem_item == NULL) {
+ rte_cuda_log(ERR, "Memory address 0x%p not found in driver
memory.", ptr_in);
+ rte_errno = EPERM;
+ return -rte_errno;
+ }
+
+ if (mem_item->mtype == GPU_MEM) {
+ rte_cuda_log(ERR, "Memory address 0x%p is not GPU memory
type.", ptr_in);
+ rte_errno = EPERM;
+ return -rte_errno;
+ }
+
+ if (mem_item->size != size)
+ rte_cuda_log(WARNING,
+ "Can't expose memory area with size (%zd)
different from original size (%zd).",
+ size, mem_item->size);
+
+ if (gdrcopy_pin(gdrc_h, &(mem_item->mh), (uint64_t)mem_item->ptr_d,
+ mem_item->size, &(mem_item->ptr_h))) {
+ rte_cuda_log(ERR, "Error exposing GPU memory address 0x%p.",
ptr_in);
+ rte_errno = EPERM;
+ return -rte_errno;
+ }
+
+ *ptr_out = mem_item->ptr_h;
+
+ return 0;
+}
+
+static int
+cuda_mem_unexpose(struct rte_gpu *dev, void *ptr_in)
+{
+ struct mem_entry *mem_item;
+ cuda_ptr_key hk;
+
+ if (dev == NULL)
+ return -ENODEV;
+
+ if (gdrc_h == NULL) {
+ rte_cuda_log(ERR, "GDRCopy not built or loaded. Can't unexpose
GPU memory.");
+ rte_errno = ENOTSUP;
+ return -rte_errno;
+ }
+
+ hk = get_hash_from_ptr((void *)ptr_in);
+
+ mem_item = mem_list_find_item(hk);
+ if (mem_item == NULL) {
+ rte_cuda_log(ERR, "Memory address 0x%p not found in driver
memory.", ptr_in);
+ rte_errno = EPERM;
+ return -rte_errno;
+ }
+
+ if (gdrcopy_unpin(gdrc_h, mem_item->mh, (void *)mem_item->ptr_d,
+ mem_item->size)) {
+ rte_cuda_log(ERR, "Error unexposing GPU memory address 0x%p.",
ptr_in);
+ rte_errno = EPERM;
+ return -rte_errno;
+ }
+
+ return 0;
+}
+
static int
cuda_gpu_probe(__rte_unused struct rte_pci_driver *pci_drv, struct
rte_pci_device *pci_dev)
{
@@ -1018,6 +1104,19 @@ cuda_gpu_probe(__rte_unused struct rte_pci_driver
*pci
[PATCH v3 1/2] eventdev/crypto_adapter: move crypto ops to circular buffer
Move crypto ops to circular buffer to retain crypto
ops when cryptodev/eventdev are temporarily full
---
v3:
* update eca_ops_buffer_flush() to flush out all the crypto
ops out of circular buffer.
* remove freeing of failed crypto ops from eca_ops_enqueue_burst()
and add to cirular buffer for later processing.
v2:
* reset cryptp adapter next cdev id before dequeueing from the
next cdev
---
Signed-off-by: Ganapati Kundapura
diff --git a/lib/eventdev/rte_event_crypto_adapter.c
b/lib/eventdev/rte_event_crypto_adapter.c
index d840803..9086368 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -25,11 +25,27 @@
#define CRYPTO_ADAPTER_MEM_NAME_LEN 32
#define CRYPTO_ADAPTER_MAX_EV_ENQ_RETRIES 100
+#define CRYPTO_ADAPTER_OPS_BUFFER_SZ (BATCH_SIZE + BATCH_SIZE)
+#define CRYPTO_ADAPTER_BUFFER_SZ 1024
+
/* Flush an instance's enqueue buffers every CRYPTO_ENQ_FLUSH_THRESHOLD
* iterations of eca_crypto_adapter_enq_run()
*/
#define CRYPTO_ENQ_FLUSH_THRESHOLD 1024
+struct crypto_ops_circular_buffer {
+ /* index of head element in circular buffer */
+ uint16_t head;
+ /* index of tail element in circular buffer */
+ uint16_t tail;
+ /* number elements in buffer */
+ uint16_t count;
+ /* size of circular buffer */
+ uint16_t size;
+ /* Pointer to hold rte_crypto_ops for batching */
+ struct rte_crypto_op **op_buffer;
+} __rte_cache_aligned;
+
struct event_crypto_adapter {
/* Event device identifier */
uint8_t eventdev_id;
@@ -47,6 +63,8 @@ struct event_crypto_adapter {
struct crypto_device_info *cdevs;
/* Loop counter to flush crypto ops */
uint16_t transmit_loop_count;
+ /* Circular buffer for batching crypto ops to eventdev */
+ struct crypto_ops_circular_buffer ebuf;
/* Per instance stats structure */
struct rte_event_crypto_adapter_stats crypto_stats;
/* Configuration callback for rte_service configuration */
@@ -93,8 +111,8 @@ struct crypto_device_info {
struct crypto_queue_pair_info {
/* Set to indicate queue pair is enabled */
bool qp_enabled;
- /* Pointer to hold rte_crypto_ops for batching */
- struct rte_crypto_op **op_buffer;
+ /* Circular buffer for batching crypto ops to cdev */
+ struct crypto_ops_circular_buffer cbuf;
/* No of crypto ops accumulated */
uint8_t len;
} __rte_cache_aligned;
@@ -141,6 +159,77 @@ eca_init(void)
return 0;
}
+static inline bool
+eca_circular_buffer_batch_ready(struct crypto_ops_circular_buffer *bufp)
+{
+ return bufp->count >= BATCH_SIZE;
+}
+
+static inline void
+eca_circular_buffer_free(struct crypto_ops_circular_buffer *bufp)
+{
+ rte_free(bufp->op_buffer);
+}
+
+static inline int
+eca_circular_buffer_init(const char *name,
+struct crypto_ops_circular_buffer *bufp,
+uint16_t sz)
+{
+ bufp->op_buffer = rte_zmalloc(name,
+ sizeof(struct rte_crypto_op *) * sz,
+ 0);
+ if (bufp->op_buffer == NULL)
+ return -ENOMEM;
+
+ bufp->size = sz;
+ return 0;
+}
+
+static inline int
+eca_circular_buffer_add(struct crypto_ops_circular_buffer *bufp,
+ struct rte_crypto_op *op)
+{
+ uint16_t *tailp = &bufp->tail;
+
+ bufp->op_buffer[*tailp] = op;
+ *tailp = (*tailp + 1) % bufp->size;
+ bufp->count++;
+
+ return 0;
+}
+
+static inline int
+eca_circular_buffer_flush_to_cdev(struct crypto_ops_circular_buffer *bufp,
+ uint8_t cdev_id, uint16_t qp_id,
+ uint16_t *nb_ops_flushed)
+{
+ uint16_t n = 0;
+ uint16_t *headp = &bufp->head;
+ uint16_t *tailp = &bufp->tail;
+ struct rte_crypto_op **ops = bufp->op_buffer;
+
+ if (*tailp > *headp)
+ n = *tailp - *headp;
+ else if (*tailp < *headp)
+ n = bufp->size - *headp;
+ else {
+ *nb_ops_flushed = 0;
+ return 0; /* buffer empty */
+ }
+
+ *nb_ops_flushed = rte_cryptodev_enqueue_burst(cdev_id, qp_id,
+ &ops[*headp], n);
+ bufp->count -= *nb_ops_flushed;
+ if (!bufp->count) {
+ *headp = 0;
+ *tailp = 0;
+ } else
+ *headp = (*headp + *nb_ops_flushed) % bufp->size;
+
+ return *nb_ops_flushed == n ? 0 : -1;
+}
+
static inline struct event_crypto_adapter *
eca_id_to_adapter(uint8_t id)
{
@@ -237,10 +326,19 @@ rte_event_crypto_adapter_create_ext(uint8_t id, uint8_t
dev_id,
return -ENOMEM;
}
+ if (eca_circular_buffer_init("eca_edev_circular_buffer",
+&adapter->ebuf,
+CRYPTO_ADAPTER
[PATCH v3 2/2] eventdev: update crypto caps get to return SW cap
update rte_event_crypto_adapter_caps_get() to return SW_CAP if PMD callback is not registered. Signed-off-by: Ganapati Kundapura diff --git a/lib/eventdev/rte_eventdev.c b/lib/eventdev/rte_eventdev.c index 79b9ea3..6988bf1 100644 --- a/lib/eventdev/rte_eventdev.c +++ b/lib/eventdev/rte_eventdev.c @@ -176,11 +176,15 @@ rte_event_crypto_adapter_caps_get(uint8_t dev_id, uint8_t cdev_id, if (caps == NULL) return -EINVAL; - *caps = 0; + + if (dev->dev_ops->crypto_adapter_caps_get == NULL) + *caps = RTE_EVENT_CRYPTO_ADAPTER_SW_CAP; + else + *caps = 0; return dev->dev_ops->crypto_adapter_caps_get ? (*dev->dev_ops->crypto_adapter_caps_get) - (dev, cdev, caps) : -ENOTSUP; + (dev, cdev, caps) : 0; } int -- 2.6.4
Re: Build igb_uio.ko separately from building all DPDK code
On 12/19/2021 8:09 AM, Asaf Sinai wrote: Hi, How to build 'igb_uio.ko', without the need to build all DPDK code? 'igb_uio' is in its own repo for a while: https://git.dpdk.org/dpdk-kmods/ And build instructions for it: https://patches.dpdk.org/project/dpdk/patch/617638b7bdd97cf232289909fcd74bcc82d79545.1606224358.git.anatoly.bura...@intel.com/ Thanks, Asaf Radware
Re: [PATCH v2] Spelling comments/text
06/01/2022 17:46, Thomas Monjalon: > 29/11/2021 17:08, Josh Soref: > > -* external phy devices registred through kerenl apis > > +* external phy devices registred through kernel apis > > another spelling to fix: > "registred" > and while at it, "apis" should be "APIs" > > - * When set to zero, simple forwaring path is eanbled. > + * When set to zero, simple forwaring path is enabled. > > another one: > "forwaring" > > If I see nothing else, I'll fix and merge. I've found more to fix. Given the size of the patch, I did the fixes directly and added my Signed-off. Applied, thanks. The git log became: fix spelling in comments and strings The tool comes from https://github.com/jsoref Signed-off-by: Josh Soref Signed-off-by: Thomas Monjalon
[PATCH] ring: optimize corner case for enqueue/dequeue
When enqueueing/dequeueing to/from the ring we try to optimize by manual
loop unrolling. The check for this optimization looks like:
if (likely(idx + n < size)) {
where 'idx' points to the first usable element (empty slot for enqueue,
data for dequeue). The correct comparison here should be '<=' instead
of '<'.
This is not a functional error since we fall back to the loop with
correct checks on indexes. Just a minor suboptimal behaviour for the
case when we want to enqueue/dequeue exactly the number of elements that
we have in the ring before wrapping to its beginning.
Fixes: cc4b218790f6 ("ring: support configurable element size")
Fixes: 286bd05bf70d ("ring: optimisations")
Signed-off-by: Andrzej Ostruszka
Reviewed-by: Olivier Matz
Acked-by: Konstantin Ananyev
---
lib/ring/rte_ring_elem_pvt.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/lib/ring/rte_ring_elem_pvt.h b/lib/ring/rte_ring_elem_pvt.h
index 275ec55393..83788c56e6 100644
--- a/lib/ring/rte_ring_elem_pvt.h
+++ b/lib/ring/rte_ring_elem_pvt.h
@@ -17,7 +17,7 @@ __rte_ring_enqueue_elems_32(struct rte_ring *r, const
uint32_t size,
unsigned int i;
uint32_t *ring = (uint32_t *)&r[1];
const uint32_t *obj = (const uint32_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x7); i += 8, idx += 8) {
ring[idx] = obj[i];
ring[idx + 1] = obj[i + 1];
@@ -62,7 +62,7 @@ __rte_ring_enqueue_elems_64(struct rte_ring *r, uint32_t
prod_head,
uint32_t idx = prod_head & r->mask;
uint64_t *ring = (uint64_t *)&r[1];
const unaligned_uint64_t *obj = (const unaligned_uint64_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x3); i += 4, idx += 4) {
ring[idx] = obj[i];
ring[idx + 1] = obj[i + 1];
@@ -95,7 +95,7 @@ __rte_ring_enqueue_elems_128(struct rte_ring *r, uint32_t
prod_head,
uint32_t idx = prod_head & r->mask;
rte_int128_t *ring = (rte_int128_t *)&r[1];
const rte_int128_t *obj = (const rte_int128_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x1); i += 2, idx += 2)
memcpy((void *)(ring + idx),
(const void *)(obj + i), 32);
@@ -151,7 +151,7 @@ __rte_ring_dequeue_elems_32(struct rte_ring *r, const
uint32_t size,
unsigned int i;
uint32_t *ring = (uint32_t *)&r[1];
uint32_t *obj = (uint32_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x7); i += 8, idx += 8) {
obj[i] = ring[idx];
obj[i + 1] = ring[idx + 1];
@@ -196,7 +196,7 @@ __rte_ring_dequeue_elems_64(struct rte_ring *r, uint32_t
prod_head,
uint32_t idx = prod_head & r->mask;
uint64_t *ring = (uint64_t *)&r[1];
unaligned_uint64_t *obj = (unaligned_uint64_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x3); i += 4, idx += 4) {
obj[i] = ring[idx];
obj[i + 1] = ring[idx + 1];
@@ -229,7 +229,7 @@ __rte_ring_dequeue_elems_128(struct rte_ring *r, uint32_t
prod_head,
uint32_t idx = prod_head & r->mask;
rte_int128_t *ring = (rte_int128_t *)&r[1];
rte_int128_t *obj = (rte_int128_t *)obj_table;
- if (likely(idx + n < size)) {
+ if (likely(idx + n <= size)) {
for (i = 0; i < (n & ~0x1); i += 2, idx += 2)
memcpy((void *)(obj + i), (void *)(ring + idx), 32);
switch (n & 0x1) {
--
2.34.1.575.g55b058a8bb-goog
RE: [dpdk-dev] [dpdk-users] A question about Mellanox ConnectX-5 and ConnectX-4 Lx nic can't send packets?
> From: wangyunjian [...] > > From: Dmitry Kozlyuk [mailto:dkozl...@nvidia.com] [...] > > Thanks for attaching all the details. > > Can you please reproduce it with --log-level=pmd.common.mlx5:debug and > > send the logs? > > > > > For example, if the environment is configured with 10GB hugepages but > > > each hugepage is physically discontinuous, this problem can be > > > reproduced. > > # ./x86_64-native-linuxapp-gcc/app/dpdk-testpmd -c 0xFC0 --iova-mode pa -- > legacy-mem -a af:00.0 -a af:00.1 --log-level=pmd.common.mlx5:debug -m 0,8192 > -- -a -i --forward-mode=fwd --rxq=2 --txq=2 --total-num-mbufs=100 [...] > mlx5_common: Collecting chunks of regular mempool mb_pool_0 > mlx5_common: Created a new MR 0x92827 in PD 0x4864ab0 for address range > [0x75cb6c000, 0x78000] (592003072 bytes) for mempool mb_pool_0 > mlx5_common: Created a new MR 0x93528 in PD 0x4864ab0 for address range > [0x7dcb6c000, 0x8] (592003072 bytes) for mempool mb_pool_0 > mlx5_common: Created a new MR 0x94529 in PD 0x4864ab0 for address range > [0x85cb6c000, 0x88000] (592003072 bytes) for mempool mb_pool_0 > mlx5_common: Created a new MR 0x9562a in PD 0x4864ab0 for address range > [0x8d6cca000, 0x8fa15e000] (592003072 bytes) for mempool mb_pool_0 Thanks for the logs, UUIC they are from a successful run. I have reproduced an equivalent hugepage layout and mempool spread between hugepages, but I don't see the error behavior in several tries. What are the logs in case of error? Please note that the offending commit you found (fec28ca0e3a9) indeed introduced a few issues, but they were fixed later, so I'm testing with 21.11, not that commit. Unfortunately, none of those issues resembled yours.
[PATCH] doc: replace deprecated distutils version parsing
When using Python 3.10, this warning appears:
DeprecationWarning: The distutils package is deprecated
and slated for removal in Python 3.12.
Use setuptools or check PEP 632 for potential alternatives
The PEP 632 recommends replacing "distutils.version" with "packaging".
Bugzilla ID: 914
Cc: sta...@dpdk.org
Reported-by: Jerin Jacob
Signed-off-by: Thomas Monjalon
---
buildtools/call-sphinx-build.py | 4 ++--
doc/guides/conf.py | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/buildtools/call-sphinx-build.py b/buildtools/call-sphinx-build.py
index 26b199220a..39a60d09fa 100755
--- a/buildtools/call-sphinx-build.py
+++ b/buildtools/call-sphinx-build.py
@@ -7,7 +7,7 @@
import os
from os.path import join
from subprocess import run, PIPE, STDOUT
-from distutils.version import StrictVersion
+from packaging.version import Version
# assign parameters to variables
(sphinx, version, src, dst, *extra_args) = sys.argv[1:]
@@ -19,7 +19,7 @@
ver = run([sphinx, '--version'], stdout=PIPE,
stderr=STDOUT).stdout.decode().split()[-1]
sphinx_cmd = [sphinx] + extra_args
-if StrictVersion(ver) >= StrictVersion('1.7'):
+if Version(ver) >= Version('1.7'):
sphinx_cmd += ['-j', 'auto']
# find all the files sphinx will process so we can write them as dependencies
diff --git a/doc/guides/conf.py b/doc/guides/conf.py
index 1743ce301f..a55ce38800 100644
--- a/doc/guides/conf.py
+++ b/doc/guides/conf.py
@@ -3,7 +3,7 @@
# Copyright(c) 2010-2015 Intel Corporation
from docutils import nodes
-from distutils.version import LooseVersion
+from packaging.version import Version
from sphinx import __version__ as sphinx_version
from os import listdir
from os import environ
@@ -28,7 +28,7 @@
project = 'Data Plane Development Kit'
html_logo = '../logo/DPDK_logo_vertical_rev_small.png'
-if LooseVersion(sphinx_version) >= LooseVersion('3.5'):
+if Version(sphinx_version) >= Version('3.5'):
html_permalinks = False
else:
html_add_permalinks = ""
@@ -427,7 +427,7 @@ def setup(app):
'Features availability for Timer adapters',
'Feature')
-if LooseVersion(sphinx_version) < LooseVersion('1.3.1'):
+if Version(sphinx_version) < Version('1.3.1'):
print('Upgrade sphinx to version >= 1.3.1 for '
'improved Figure/Table number handling.',
file=stderr)
--
2.34.1
Re: [PATCH 1/1] ring: fix off by 1 mistake
Thank you Morten, Olivier and Konstantin for taking look at it. I've just sent another version, with updates in commit message suggested by Olivier. With regards Andrzej Ostruszka
Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask
On 11/9/2021 9:42 AM, psathe...@marvell.com wrote: From: Satheesh Paul This patch adds support to configure channel mask which will be used by rte flow when adding flow rules on SDP interfaces. Hi Satheesh, + Ori & Andrew. What 'SDP' stands for? And can this new devarg be provided with flow rule? Why it needs to be a new devarg? Can you please give a sample of the rte flow API that will be used? Thanks, ferruh Signed-off-by: Satheesh Paul --- doc/guides/nics/cnxk.rst | 21 ++ drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 -- 2 files changed, 59 insertions(+), 2 deletions(-) diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index 837ffc02b4..470e01b811 100644 --- a/doc/guides/nics/cnxk.rst +++ b/doc/guides/nics/cnxk.rst @@ -276,6 +276,27 @@ Runtime Config Options set with this custom mask, inbound encrypted traffic from all ports with matching channel number pattern will be directed to the inline IPSec device. +- ``SDP device channel and mask`` (default ``none``) + Set channel and channel mask configuration for the SDP device. This + will be used when creating flow rules on the SDP device. + + By default, for rules created on the SDP device, the RTE Flow API sets the + channel number and mask to cover the entire SDP channel range in the channel + field of the MCAM entry. This behaviour can be modified using the + ``sdp_channel_mask`` ``devargs`` parameter. + + For example:: + + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 + + With the above configuration, RTE Flow rules API will set the channel + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules + created on the SDP device. This option needs to be used when more than one + SDP interface is in use and RTE Flow rules created need to distinguish + between traffic from each SDP interface. The channel and mask combination + specified should match all the channels(or rings) configured on the SDP + interface. + .. note:: <...>
RE: [PATCH] ring: optimize corner case for enqueue/dequeue
> From: Andrzej Ostruszka [mailto:a...@semihalf.com]
> Sent: Tuesday, 11 January 2022 12.38
>
> When enqueueing/dequeueing to/from the ring we try to optimize by
> manual
> loop unrolling. The check for this optimization looks like:
>
> if (likely(idx + n < size)) {
>
> where 'idx' points to the first usable element (empty slot for enqueue,
> data for dequeue). The correct comparison here should be '<=' instead
> of '<'.
>
> This is not a functional error since we fall back to the loop with
> correct checks on indexes. Just a minor suboptimal behaviour for the
> case when we want to enqueue/dequeue exactly the number of elements
> that
> we have in the ring before wrapping to its beginning.
>
> Fixes: cc4b218790f6 ("ring: support configurable element size")
> Fixes: 286bd05bf70d ("ring: optimisations")
>
> Signed-off-by: Andrzej Ostruszka
> Reviewed-by: Olivier Matz
> Acked-by: Konstantin Ananyev
> ---
> lib/ring/rte_ring_elem_pvt.h | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/lib/ring/rte_ring_elem_pvt.h
> b/lib/ring/rte_ring_elem_pvt.h
> index 275ec55393..83788c56e6 100644
> --- a/lib/ring/rte_ring_elem_pvt.h
> +++ b/lib/ring/rte_ring_elem_pvt.h
> @@ -17,7 +17,7 @@ __rte_ring_enqueue_elems_32(struct rte_ring *r, const
> uint32_t size,
> unsigned int i;
> uint32_t *ring = (uint32_t *)&r[1];
> const uint32_t *obj = (const uint32_t *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x7); i += 8, idx += 8) {
> ring[idx] = obj[i];
> ring[idx + 1] = obj[i + 1];
> @@ -62,7 +62,7 @@ __rte_ring_enqueue_elems_64(struct rte_ring *r,
> uint32_t prod_head,
> uint32_t idx = prod_head & r->mask;
> uint64_t *ring = (uint64_t *)&r[1];
> const unaligned_uint64_t *obj = (const unaligned_uint64_t
> *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x3); i += 4, idx += 4) {
> ring[idx] = obj[i];
> ring[idx + 1] = obj[i + 1];
> @@ -95,7 +95,7 @@ __rte_ring_enqueue_elems_128(struct rte_ring *r,
> uint32_t prod_head,
> uint32_t idx = prod_head & r->mask;
> rte_int128_t *ring = (rte_int128_t *)&r[1];
> const rte_int128_t *obj = (const rte_int128_t *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x1); i += 2, idx += 2)
> memcpy((void *)(ring + idx),
> (const void *)(obj + i), 32);
> @@ -151,7 +151,7 @@ __rte_ring_dequeue_elems_32(struct rte_ring *r,
> const uint32_t size,
> unsigned int i;
> uint32_t *ring = (uint32_t *)&r[1];
> uint32_t *obj = (uint32_t *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x7); i += 8, idx += 8) {
> obj[i] = ring[idx];
> obj[i + 1] = ring[idx + 1];
> @@ -196,7 +196,7 @@ __rte_ring_dequeue_elems_64(struct rte_ring *r,
> uint32_t prod_head,
> uint32_t idx = prod_head & r->mask;
> uint64_t *ring = (uint64_t *)&r[1];
> unaligned_uint64_t *obj = (unaligned_uint64_t *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x3); i += 4, idx += 4) {
> obj[i] = ring[idx];
> obj[i + 1] = ring[idx + 1];
> @@ -229,7 +229,7 @@ __rte_ring_dequeue_elems_128(struct rte_ring *r,
> uint32_t prod_head,
> uint32_t idx = prod_head & r->mask;
> rte_int128_t *ring = (rte_int128_t *)&r[1];
> rte_int128_t *obj = (rte_int128_t *)obj_table;
> - if (likely(idx + n < size)) {
> + if (likely(idx + n <= size)) {
> for (i = 0; i < (n & ~0x1); i += 2, idx += 2)
> memcpy((void *)(obj + i), (void *)(ring + idx), 32);
> switch (n & 0x1) {
> --
> 2.34.1.575.g55b058a8bb-goog
>
Also this version of the patch:
Reviewed-by: Morten Brørup
Re: [EXT] [PATCH v1 1/1] net/qede: fix redundant condition in debug code
On Mon, Jan 10, 2022 at 2:13 PM Rasesh Mody wrote:
>
> > From: Anatoly Burakov
> > Sent: Tuesday, November 30, 2021 10:29 PM
> >
> > External Email
> >
> > --
> > Expression "a && 1" is equivalent to just "a", so fix the accidental
> > inclusion of
> > a literal in code.
> >
> > Cc: sta...@dpdk.org
> >
> > Fixes: ec55c118792b ("net/qede: add infrastructure for debug data
> > collection")
> > Cc: rm...@marvell.com
> >
> > Signed-off-by: Anatoly Burakov
>
> Acked-by: Rasesh Mody
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
>
> Thanks!
>
> > ---
> >
> > Notes:
> > This isn't a bug, this is just a syntactic anomaly, likely a remnant of
> > some
> > kind of debugging code.
> >
> > This issue was found with Control Flag [1], which i ran on DPDK codebase
> > just
> > out of curiosity. This was the only issue worth addressing that the tool
> > produced output for.
> >
> > [1] https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__github.com_IntelLabs_control-
> > 2Dflag&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=Vhi2FR3R84xPMUtUhj
> > NPxoiMSxcj1IW0xDKEoZ0F00o&m=OrZLdoVFyT0inpO-NpRW-
> > bqCiG9lrnzODBoic5Pwb8qrKh_6y0JbHFKrzJ6vHBQH&s=d76wgQiSey5O9D5N7
> > HhUGNvReAzVZpe4wmjHgXhJI78&e=
> >
> > drivers/net/qede/qede_debug.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/qede/qede_debug.c
> > b/drivers/net/qede/qede_debug.c index 2297d245c4..ba807ea680 100644
> > --- a/drivers/net/qede/qede_debug.c
> > +++ b/drivers/net/qede/qede_debug.c
> > @@ -3522,7 +3522,7 @@ static enum dbg_status qed_grc_dump(struct
> > ecore_hwfn *p_hwfn,
> >
> > /* Dump MCP HW Dump */
> > if (qed_grc_is_included(p_hwfn,
> > DBG_GRC_PARAM_DUMP_MCP_HW_DUMP) &&
> > - !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP) &&
> > 1)
> > + !qed_grc_get_param(p_hwfn, DBG_GRC_PARAM_NO_MCP))
> > offset += qed_grc_dump_mcp_hw_dump(p_hwfn,
> > p_ptt,
> > dump_buf + offset, dump);
> > --
> > 2.25.1
>
Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
Before issuing the batch alloc, we clear the first word of
cache lines so that NPA can update the status. Make sure that
this line clear is flushed before the batch alloc is issued.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_io.h | 12
drivers/common/cnxk/roc_io_generic.h | 9 +
drivers/common/cnxk/roc_npa.h| 2 +-
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_io.h b/drivers/common/cnxk/roc_io.h
index fe5f7f46d0..4f15503c29 100644
--- a/drivers/common/cnxk/roc_io.h
+++ b/drivers/common/cnxk/roc_io.h
@@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t swap, int64_t
*ptr)
return compare;
}
+static __plt_always_inline uint64_t
+roc_atomic64_casl(uint64_t compare, uint64_t swap, int64_t *ptr)
+{
+ asm volatile(PLT_CPU_FEATURE_PREAMBLE
+"casl %[compare], %[swap], [%[ptr]]\n"
+: [compare] "+r"(compare)
+: [swap] "r"(swap), [ptr] "r"(ptr)
+: "memory");
+
out of curiosity, what is the "cas with release semantics"?
briefly, what is the difference between 'cas' and 'casl'?
RE: [RFC] ethdev: introduce ethdev dump API
> From: Min Hu (Connor) [mailto:humi...@huawei.com]
> Sent: Tuesday, 11 January 2022 12.55
>
> Added the ethdev dump API which provides functions for query private
> info
> from device. There exists many private properties in different PMD
> drivers,
> such as adapter state, Rx/Tx func algorithm in hns3 PMD. The
> information of
> these properties is important for debug. As the information is private,
> the new API is introduced.
>
> Signed-off-by: Min Hu (Connor)
> ---
> doc/guides/rel_notes/release_22_03.rst | 6 ++
> lib/ethdev/ethdev_driver.h | 17 +
> lib/ethdev/rte_ethdev.c| 15 +++
> lib/ethdev/rte_ethdev.h| 16
> 4 files changed, 54 insertions(+)
>
> diff --git a/doc/guides/rel_notes/release_22_03.rst
> b/doc/guides/rel_notes/release_22_03.rst
> index 6d99d1eaa9..9b51da899a 100644
> --- a/doc/guides/rel_notes/release_22_03.rst
> +++ b/doc/guides/rel_notes/release_22_03.rst
> @@ -55,6 +55,12 @@ New Features
> Also, make sure to start the actual text at the margin.
> ===
>
> + * **Added the ethdev dump API, for query private info of ethdev.**
> +
> + Added the ethdev dump API which provides functions for query
> private info
> + from device. There exists many private properties in different
> PMD
> + drivers. The information of these properties is important for
> debug. As
> + the information is private, the new API is introduced.
>
> Removed Items
> -
> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> index d95605a355..ac7fa5eae2 100644
> --- a/lib/ethdev/ethdev_driver.h
> +++ b/lib/ethdev/ethdev_driver.h
> @@ -990,6 +990,20 @@ typedef int (*eth_representor_info_get_t)(struct
> rte_eth_dev *dev,
> typedef int (*eth_rx_metadata_negotiate_t)(struct rte_eth_dev *dev,
> uint64_t *features);
>
> +/**
> + * @internal
> + * Get ethdev private info.
> + *
> + * @param dev
> + * Port (ethdev) handle.
> + * @param file
> + * A pointer to a file for output.
> + *
> + * @return
> + * Negative errno value on error, positive value on success.
> + */
> +typedef int (*eth_dev_dump_t)(struct rte_eth_dev *dev, FILE *file);
> +
> /**
> * @internal A structure containing the functions exported by an
> Ethernet driver.
> */
> @@ -1186,6 +1200,9 @@ struct eth_dev_ops {
>* kinds of metadata to the PMD
>*/
> eth_rx_metadata_negotiate_t rx_metadata_negotiate;
> +
> + /** Dump ethdev private info */
> + eth_dev_dump_t eth_dev_dump;
> };
>
> /**
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index a1d475a292..4bbe444045 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -6472,6 +6472,21 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id,
> uint64_t *features)
> (*dev->dev_ops->rx_metadata_negotiate)(dev,
> features));
> }
>
> +int
> +rte_eth_dev_dump(uint16_t port_id, FILE *file)
> +{
> + struct rte_eth_dev *dev;
> + int ret;
> +
> + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
> + dev = &rte_eth_devices[port_id];
> +
> + RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->eth_dev_dump, -ENOTSUP);
> + ret = (*dev->dev_ops->eth_dev_dump)(dev, file);
> +
> + return ret;
> +}
> +
> RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
>
> RTE_INIT(ethdev_init_telemetry)
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index fa299c8ad7..918bd3116f 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -5888,6 +5888,22 @@ rte_eth_tx_buffer(uint16_t port_id, uint16_t
> queue_id,
> return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
> }
>
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change, or be removed, without prior
> notice
> + *
> + * Get ethdev private info.
> + *
> + * @param port_id
> + * The port identifier of the Ethernet device.
> + * @param file
> + * A pointer to a file for output.
> + * @return
> + * Negative errno value on error, positive value on success.
> + */
> +__rte_experimental
> +int rte_eth_dev_dump(uint16_t port_id, FILE *file);
> +
> #ifdef __cplusplus
> }
> #endif
> --
> 2.33.0
>
Good idea.
Two comments:
1. This function dumps private ethdev information. It should be named and
described as such, e.g. eth_dev_priv_dump().
It should be a generic ethdev dump function, which dumps the common ethdev
information, and also calls the eth_dev_priv_dump() function, if present.
2. Please make FILE* the first parameter, like similar dump functions.
Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
On 1/11/2022 12:08 PM, Ferruh Yigit wrote:
On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
Before issuing the batch alloc, we clear the first word of
cache lines so that NPA can update the status. Make sure that
this line clear is flushed before the batch alloc is issued.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_io.h | 12
drivers/common/cnxk/roc_io_generic.h | 9 +
drivers/common/cnxk/roc_npa.h | 2 +-
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_io.h b/drivers/common/cnxk/roc_io.h
index fe5f7f46d0..4f15503c29 100644
--- a/drivers/common/cnxk/roc_io.h
+++ b/drivers/common/cnxk/roc_io.h
@@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t swap, int64_t
*ptr)
return compare;
}
+static __plt_always_inline uint64_t
+roc_atomic64_casl(uint64_t compare, uint64_t swap, int64_t *ptr)
+{
+ asm volatile(PLT_CPU_FEATURE_PREAMBLE
+ "casl %[compare], %[swap], [%[ptr]]\n"
+ : [compare] "+r"(compare)
+ : [swap] "r"(swap), [ptr] "r"(ptr)
+ : "memory");
+
out of curiosity, what is the "cas with release semantics"?
briefly, what is the difference between 'cas' and 'casl'?
+ Honnappa & Ruifeng,
Isn't this API Arm wide, instead of being cnxk specific?
Does it make sense to make this API for arm and cnxk use from there?
RE: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
CAS is compare and swap. CASL is compare and swap with release semantics.
But on CNXK platform, the functionality of CAS* instructions is completely
different when it is done to specific addresses. These APIs are meant for use
for such special cases. These cannot be made ARM generic.
Ashwin Sekhar T K
> -Original Message-
> From: Ferruh Yigit
> Sent: Tuesday, January 11, 2022 5:42 PM
> To: Ashwin Sekhar Thalakalath Kottilveetil ;
> dev@dpdk.org; Honnappa Nagarahalli ;
> Ruifeng Wang (Arm Technology China)
> Cc: Nithin Kumar Dabilpuram ; Jerin Jacob
> Kollanukkaran ; Sunil Kumar Kori
> ; Satha Koteswara Rao Kottidi
> ; Pavan Nikhilesh Bhagavatula
> ; Kiran Kumar Kokkilagadda
> ; Satheesh Paul ;
> Anoob Joseph ; Akhil Goyal
> Subject: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for
> batch alloc
>
> External Email
>
> --
> On 1/11/2022 12:08 PM, Ferruh Yigit wrote:
> > On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
> >> Before issuing the batch alloc, we clear the first word of cache
> >> lines so that NPA can update the status. Make sure that this line
> >> clear is flushed before the batch alloc is issued.
> >>
> >> Signed-off-by: Ashwin Sekhar T K
> >> ---
> >> drivers/common/cnxk/roc_io.h | 12
> >> drivers/common/cnxk/roc_io_generic.h | 9 +
> >> drivers/common/cnxk/roc_npa.h | 2 +-
> >> 3 files changed, 22 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/common/cnxk/roc_io.h
> >> b/drivers/common/cnxk/roc_io.h index fe5f7f46d0..4f15503c29 100644
> >> --- a/drivers/common/cnxk/roc_io.h
> >> +++ b/drivers/common/cnxk/roc_io.h
> >> @@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t
> swap,
> >> int64_t *ptr)
> >> return compare;
> >> }
> >> +static __plt_always_inline uint64_t
> >> +roc_atomic64_casl(uint64_t compare, uint64_t swap, int64_t *ptr) {
> >> + asm volatile(PLT_CPU_FEATURE_PREAMBLE
> >> + "casl %[compare], %[swap], [%[ptr]]\n"
> >> + : [compare] "+r"(compare)
> >> + : [swap] "r"(swap), [ptr] "r"(ptr)
> >> + : "memory");
> >> +
> >
> > out of curiosity, what is the "cas with release semantics"?
> > briefly, what is the difference between 'cas' and 'casl'?
>
> + Honnappa & Ruifeng,
>
> Isn't this API Arm wide, instead of being cnxk specific?
> Does it make sense to make this API for arm and cnxk use from there?
Re: [PATCH 1/2] net/cnxk: update meter bpf ID in rq
On 11/30/2021 6:41 AM, Rakesh Kudurumalla wrote:
Patch updates configured meter bpf is in rq context
during meter creation
RQ is receive queue, right? Can you please use the long version for
clarification?
Signed-off-by: Rakesh Kudurumalla
---
drivers/net/cnxk/cn10k_rte_flow.c | 9 -
drivers/net/cnxk/cnxk_ethdev_mtr.c | 25 ++---
2 files changed, 22 insertions(+), 12 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_rte_flow.c
b/drivers/net/cnxk/cn10k_rte_flow.c
index b830abe63e..402bb1c72f 100644
--- a/drivers/net/cnxk/cn10k_rte_flow.c
+++ b/drivers/net/cnxk/cn10k_rte_flow.c
@@ -36,20 +36,20 @@ cn10k_mtr_configure(struct rte_eth_dev *eth_dev,
for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
if (actions[i].type == RTE_FLOW_ACTION_TYPE_METER) {
mtr_conf = (const struct rte_flow_action_meter
- *)(actions->conf);
+ *)(actions[i].conf);
mtr_id = mtr_conf->mtr_id;
is_mtr_act = true;
}
if (actions[i].type == RTE_FLOW_ACTION_TYPE_QUEUE) {
q_conf = (const struct rte_flow_action_queue
- *)(actions->conf);
+ *)(actions[i].conf);
if (is_mtr_act)
nix_mtr_rq_update(eth_dev, mtr_id, 1,
&q_conf->index);
}
if (actions[i].type == RTE_FLOW_ACTION_TYPE_RSS) {
rss_conf = (const struct rte_flow_action_rss
- *)(actions->conf);
+ *)(actions[i].conf);
if (is_mtr_act)
nix_mtr_rq_update(eth_dev, mtr_id,
rss_conf->queue_num,
@@ -98,7 +98,7 @@ cn10k_rss_action_validate(struct rte_eth_dev *eth_dev,
return -EINVAL;
}
- if (eth_dev->data->dev_conf.rxmode.mq_mode != RTE_ETH_MQ_RX_RSS) {
+ if (eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
This change seems unintended. Please keep the original value.
<...>
if (!capa)
return -rte_mtr_error_set(error, EINVAL,
- RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
- "NULL input parameter");
+ RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+ "NULL input parameter");
Previous indentation looks more consistent with DPDK coding guide.
Re: [RFC] ethdev: introduce ethdev dump API
Please use --cc-cmd devtools/get-maintainer.sh so all maintainers are Cc'ed. 11/01/2022 12:54, Min Hu (Connor): > --- a/doc/guides/rel_notes/release_22_03.rst > +++ b/doc/guides/rel_notes/release_22_03.rst > @@ -55,6 +55,12 @@ New Features > Also, make sure to start the actual text at the margin. > === > > + * **Added the ethdev dump API, for query private info of ethdev.** > + > + Added the ethdev dump API which provides functions for query private > info > + from device. There exists many private properties in different PMD > + drivers. The information of these properties is important for debug. As > + the information is private, the new API is introduced. > A blank line is missing. Also please check the comment above asking to start the actual text at the margin. [...] > +typedef int (*eth_dev_dump_t)(struct rte_eth_dev *dev, FILE *file); There is a dump function for rte_flow: rte_flow_dev_dump(). This one should have a clear scope: private device infos?
[PATCH] examples/l3fwd: resolve stack buffer overflow issue
This patch fixes the stack buffer overflow error reported
from AddressSanitizer.
Function send_packetsx4() tries to access out of bound data
from rte_mbuf and fill it into TX buffer even in the case
where no pending packets (len = 0).
Performance impact:- No
ASAN error report:-
==819==ERROR: AddressSanitizer: stack-buffer-overflow on address
0xe2c0dcf0 at pc 0x005e791c bp 0xe2c0d7e0 sp 0xe2c0d800
READ of size 8 at 0xe2c0dcf0 thread T0
#0 0x5e7918 in send_packetsx4 ../examples/l3fwd/l3fwd_common.h:251
#1 0x5e7918 in send_packets_multi ../examples/l3fwd/l3fwd_neon.h:226
Signed-off-by: Rahul Bhansali
---
examples/l3fwd/l3fwd_common.h | 4
1 file changed, 4 insertions(+)
diff --git a/examples/l3fwd/l3fwd_common.h b/examples/l3fwd/l3fwd_common.h
index 7d83ff641a..de77711f88 100644
--- a/examples/l3fwd/l3fwd_common.h
+++ b/examples/l3fwd/l3fwd_common.h
@@ -236,6 +236,9 @@ send_packetsx4(struct lcore_conf *qconf, uint16_t port,
struct rte_mbuf *m[],
/* copy rest of the packets into the TX buffer. */
len = num - n;
+ if (len == 0)
+ goto exit;
+
j = 0;
switch (len % FWDSTEP) {
while (j < len) {
@@ -258,6 +261,7 @@ send_packetsx4(struct lcore_conf *qconf, uint16_t port,
struct rte_mbuf *m[],
}
}
+exit:
qconf->tx_mbufs[port].len = len;
}
--
2.25.1
Re: [PATCH] doc: replace deprecated distutils version parsing
On Tue, Jan 11, 2022 at 5:14 PM Thomas Monjalon wrote:
>
> When using Python 3.10, this warning appears:
> DeprecationWarning: The distutils package is deprecated
> and slated for removal in Python 3.12.
> Use setuptools or check PEP 632 for potential alternatives
>
> The PEP 632 recommends replacing "distutils.version" with "packaging".
>
> Bugzilla ID: 914
> Cc: sta...@dpdk.org
>
> Reported-by: Jerin Jacob
> Signed-off-by: Thomas Monjalon
Tested-by: Jerin Jacob
> ---
> buildtools/call-sphinx-build.py | 4 ++--
> doc/guides/conf.py | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/buildtools/call-sphinx-build.py b/buildtools/call-sphinx-build.py
> index 26b199220a..39a60d09fa 100755
> --- a/buildtools/call-sphinx-build.py
> +++ b/buildtools/call-sphinx-build.py
> @@ -7,7 +7,7 @@
> import os
> from os.path import join
> from subprocess import run, PIPE, STDOUT
> -from distutils.version import StrictVersion
> +from packaging.version import Version
>
> # assign parameters to variables
> (sphinx, version, src, dst, *extra_args) = sys.argv[1:]
> @@ -19,7 +19,7 @@
> ver = run([sphinx, '--version'], stdout=PIPE,
>stderr=STDOUT).stdout.decode().split()[-1]
> sphinx_cmd = [sphinx] + extra_args
> -if StrictVersion(ver) >= StrictVersion('1.7'):
> +if Version(ver) >= Version('1.7'):
> sphinx_cmd += ['-j', 'auto']
>
> # find all the files sphinx will process so we can write them as dependencies
> diff --git a/doc/guides/conf.py b/doc/guides/conf.py
> index 1743ce301f..a55ce38800 100644
> --- a/doc/guides/conf.py
> +++ b/doc/guides/conf.py
> @@ -3,7 +3,7 @@
> # Copyright(c) 2010-2015 Intel Corporation
>
> from docutils import nodes
> -from distutils.version import LooseVersion
> +from packaging.version import Version
> from sphinx import __version__ as sphinx_version
> from os import listdir
> from os import environ
> @@ -28,7 +28,7 @@
>
> project = 'Data Plane Development Kit'
> html_logo = '../logo/DPDK_logo_vertical_rev_small.png'
> -if LooseVersion(sphinx_version) >= LooseVersion('3.5'):
> +if Version(sphinx_version) >= Version('3.5'):
> html_permalinks = False
> else:
> html_add_permalinks = ""
> @@ -427,7 +427,7 @@ def setup(app):
> 'Features availability for Timer adapters',
> 'Feature')
>
> -if LooseVersion(sphinx_version) < LooseVersion('1.3.1'):
> +if Version(sphinx_version) < Version('1.3.1'):
> print('Upgrade sphinx to version >= 1.3.1 for '
>'improved Figure/Table number handling.',
>file=stderr)
> --
> 2.34.1
>
Re: [PATCH] doc: replace deprecated distutils version parsing
11/01/2022 14:11, Jerin Jacob: > On Tue, Jan 11, 2022 at 5:14 PM Thomas Monjalon wrote: > > > > When using Python 3.10, this warning appears: > > DeprecationWarning: The distutils package is deprecated > > and slated for removal in Python 3.12. > > Use setuptools or check PEP 632 for potential alternatives > > > > The PEP 632 recommends replacing "distutils.version" with "packaging". > > > > Bugzilla ID: 914 > > Cc: sta...@dpdk.org > > > > Reported-by: Jerin Jacob > > Signed-off-by: Thomas Monjalon > > Tested-by: Jerin Jacob Applied
Re: [dpdk-dev] [PATCH DPDK-KMODS v2] linux/igb_uio: add compile instructions
Hello 15/02/2021 13:00, Burakov, Anatoly: > Thanks for your review, Thomas, i'll submit a new version addressing the > feedback! It seems this patch was forgotten. Please could you update?
Re: [dpdk-dev] [kmods PATCH 0/4] windows: independent fixes
08/10/2021 04:06, Menon, Ranjit: > On 10/2/2021 9:18 AM, Dmitry Kozlyuk wrote: > > Fixes for building with Windows Development Kit 22000.1 > > and some build configuration cleanup. > > > > Dmitry Kozlyuk (4): > >windows: specify signature hash algorithm > >windows/virt2phys: support only x86 configurations > >windows/virt2phys: change setup class GUID to custom > >windows/virt2phys: add PnpLockdown directive > > > > windows/netuio/netuio.vcxproj | 6 ++ > > windows/virt2phys/virt2phys.inf | 3 +- > > windows/virt2phys/virt2phys.vcxproj | 146 ++-- > > 3 files changed, 15 insertions(+), 140 deletions(-) > > Acked-by: Ranjit Menon Applied, thanks.
[PATCH v2 0/4] fixes for dma/idxd
Collection of fixes for idxd driver, including one small enhancement to the unit tests to help catch future errors too. V2: * Changed from single patch for one issue (now patch 1) to multiple patches to cover other issues discovered. Bruce Richardson (4): dma/idxd: fix burst capacity calculation dma/idxd: fix paths to driver sysfs directory dma/idxd: fix wrap-around in burst capacity calculation test_dmadev: increase iterations of capacity test case app/test/test_dmadev.c| 7 --- drivers/dma/idxd/dpdk_idxd_cfg.py | 18 ++ drivers/dma/idxd/idxd_common.c| 10 +- 3 files changed, 23 insertions(+), 12 deletions(-) -- 2.32.0
[PATCH v2 1/4] dma/idxd: fix burst capacity calculation
When the maximum burst size supported by HW is less than the available
ring space, incorrect capacity was returned when there was already some
jobs queued up for submission. This was because the capacity calculation
failed to subtract the number of already-enqueued jobs from the max
burst size. After subtraction is done, ensure that any negative values
(which should never occur if the user respects the reported limits), are
clamped to zero.
Fixes: 9459de4edc99 ("dma/idxd: add burst capacity")
Cc: kevin.la...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Bruce Richardson
Acked-by: Kevin Laatz
Tested-by: Jiayu Hu
---
drivers/dma/idxd/idxd_common.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/idxd/idxd_common.c b/drivers/dma/idxd/idxd_common.c
index fc11b11337..4442d1cbbd 100644
--- a/drivers/dma/idxd/idxd_common.c
+++ b/drivers/dma/idxd/idxd_common.c
@@ -485,7 +485,9 @@ idxd_burst_capacity(const void *dev_private, uint16_t vchan
__rte_unused)
write_idx += idxd->desc_ring_mask + 1;
used_space = write_idx - idxd->ids_returned;
- return RTE_MIN((idxd->desc_ring_mask - used_space),
idxd->max_batch_size);
+ const int ret = RTE_MIN((idxd->desc_ring_mask - used_space),
+ (idxd->max_batch_size - idxd->batch_size));
+ return ret < 0 ? 0 : (uint16_t)ret;
}
int
--
2.32.0
[PATCH v2 2/4] dma/idxd: fix paths to driver sysfs directory
Recent kernel changes[1][2] mean that we cannot guarantee that the paths
in sysfs used for creating/binding a DSA or workqueue instance will be
as given in the utility script, since they are now "compatibility-mode
only". Update script to support both new paths and compatibility ones.
[1]
https://lore.kernel.org/all/162637445139.744545.6008938867943724701.st...@djiang5-desk3.ch.intel.com/
[2]
https://lore.kernel.org/all/162637468705.744545.4399080971745974435.st...@djiang5-desk3.ch.intel.com/
Fixes: 01863b9d2354 ("raw/ioat: include example configuration script")
Cc: sta...@dpdk.org
Signed-off-by: Bruce Richardson
---
drivers/dma/idxd/dpdk_idxd_cfg.py | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/idxd/dpdk_idxd_cfg.py
b/drivers/dma/idxd/dpdk_idxd_cfg.py
index fcc27822ef..34537cb980 100755
--- a/drivers/dma/idxd/dpdk_idxd_cfg.py
+++ b/drivers/dma/idxd/dpdk_idxd_cfg.py
@@ -29,9 +29,17 @@ def write_values(self, values):
f.write(str(contents))
+def get_drv_dir(dtype):
+"Get the sysfs path for the driver, either 'idxd' or 'user'"
+drv_dir = "/sys/bus/dsa/drivers/" + dtype
+if not os.path.exists(drv_dir):
+return "/sys/bus/dsa/drivers/dsa"
+return drv_dir
+
+
def reset_device(dsa_id):
"Reset the DSA device and all its queues"
-drv_dir = SysfsDir("/sys/bus/dsa/drivers/dsa")
+drv_dir = SysfsDir(get_drv_dir("idxd"))
drv_dir.write_values({"unbind": f"dsa{dsa_id}"})
@@ -58,7 +66,6 @@ def get_dsa_id(pci):
def configure_dsa(dsa_id, queues, prefix):
"Configure the DSA instance with appropriate number of queues"
dsa_dir = SysfsDir(f"/sys/bus/dsa/devices/dsa{dsa_id}")
-drv_dir = SysfsDir("/sys/bus/dsa/drivers/dsa")
max_groups = dsa_dir.read_int("max_groups")
max_engines = dsa_dir.read_int("max_engines")
@@ -85,9 +92,12 @@ def configure_dsa(dsa_id, queues, prefix):
"size": int(max_work_queues_size / nb_queues)})
# enable device and then queues
-drv_dir.write_values({"bind": f"dsa{dsa_id}"})
+idxd_dir = SysfsDir(get_drv_dir("idxd"))
+idxd_dir.write_values({"bind": f"dsa{dsa_id}"})
+
+user_dir = SysfsDir(get_drv_dir("user"))
for q in range(nb_queues):
-drv_dir.write_values({"bind": f"wq{dsa_id}.{q}"})
+user_dir.write_values({"bind": f"wq{dsa_id}.{q}"})
def main(args):
--
2.32.0
[PATCH v2 3/4] dma/idxd: fix wrap-around in burst capacity calculation
The burst capacity calculation code assumes that the write and read
(i.e. ids_returned) values both wrap at the ring-size, but the read
value instead wraps as UINT16_MAX. Therefore, instead of just adding
ring-size to the write value in case the read is greater, we need to
just always mask the result to ensure a correct, in-range, value.
Fixes: 9459de4edc99 ("dma/idxd: add burst capacity")
Cc: kevin.la...@intel.com
Cc: sta...@dpdk.org
Reported-by: Sunil Pai G
Signed-off-by: Bruce Richardson
---
drivers/dma/idxd/idxd_common.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/idxd/idxd_common.c b/drivers/dma/idxd/idxd_common.c
index 4442d1cbbd..ea6413cc7a 100644
--- a/drivers/dma/idxd/idxd_common.c
+++ b/drivers/dma/idxd/idxd_common.c
@@ -480,10 +480,8 @@ idxd_burst_capacity(const void *dev_private, uint16_t
vchan __rte_unused)
idxd->batch_idx_write + 1 == idxd->batch_idx_read)
return 0;
- /* For descriptors, check for wrap-around on write but not read */
- if (idxd->ids_returned > write_idx)
- write_idx += idxd->desc_ring_mask + 1;
- used_space = write_idx - idxd->ids_returned;
+ /* Subtract and mask to get in correct range */
+ used_space = (write_idx - idxd->ids_returned) & idxd->desc_ring_mask;
const int ret = RTE_MIN((idxd->desc_ring_mask - used_space),
(idxd->max_batch_size - idxd->batch_size));
--
2.32.0
[PATCH v2 4/4] test_dmadev: increase iterations of capacity test case
To ensure we catch any bugs in calculation due to wrap-around of the id
values, increase the number of iterations of the burst_capacity test.
Signed-off-by: Bruce Richardson
---
app/test/test_dmadev.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index b206db27ae..db5aff701c 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -686,10 +686,11 @@ test_burst_capacity(int16_t dev_id, uint16_t vchan)
/* to test capacity, we enqueue elements and check capacity is reduced
* by one each time - rebaselining the expected value after each burst
* as the capacity is only for a burst. We enqueue multiple bursts to
-* fill up half the ring, before emptying it again. We do this twice to
-* ensure that we get to test scenarios where we get ring wrap-around
+* fill up half the ring, before emptying it again. We do this multiple
+* times to ensure that we get to test scenarios where we get ring
+* wrap-around and wrap-around of the ids returned (at UINT16_MAX).
*/
- for (iter = 0; iter < 2; iter++) {
+ for (iter = 0; iter < 2 * (((int)UINT16_MAX + 1) / ring_space); iter++)
{
for (i = 0; i < (ring_space / (2 * CAP_TEST_BURST_SIZE)) + 1;
i++) {
cap = rte_dma_burst_capacity(dev_id, vchan);
--
2.32.0
RE: [PATCH v2 3/4] dma/idxd: fix wrap-around in burst capacity calculation
Tested-by: Sunil Pai G Thanks and regards, Sunil
Re: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
On 1/11/2022 12:26 PM, Ashwin Sekhar Thalakalath Kottilveetil wrote:
CAS is compare and swap. CASL is compare and swap with release semantics.
What does 'release semantics' mean? What is functional difference in both?
But on CNXK platform, the functionality of CAS* instructions is completely
different when it is done to specific addresses. These APIs are meant for use
for such special cases. These cannot be made ARM generic.
Ashwin Sekhar T K
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, January 11, 2022 5:42 PM
To: Ashwin Sekhar Thalakalath Kottilveetil ;
dev@dpdk.org; Honnappa Nagarahalli ;
Ruifeng Wang (Arm Technology China)
Cc: Nithin Kumar Dabilpuram ; Jerin Jacob
Kollanukkaran ; Sunil Kumar Kori
; Satha Koteswara Rao Kottidi
; Pavan Nikhilesh Bhagavatula
; Kiran Kumar Kokkilagadda
; Satheesh Paul ;
Anoob Joseph ; Akhil Goyal
Subject: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for
batch alloc
External Email
--
On 1/11/2022 12:08 PM, Ferruh Yigit wrote:
On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
Before issuing the batch alloc, we clear the first word of cache
lines so that NPA can update the status. Make sure that this line
clear is flushed before the batch alloc is issued.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_io.h | 12
drivers/common/cnxk/roc_io_generic.h | 9 +
drivers/common/cnxk/roc_npa.h | 2 +-
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_io.h
b/drivers/common/cnxk/roc_io.h index fe5f7f46d0..4f15503c29 100644
--- a/drivers/common/cnxk/roc_io.h
+++ b/drivers/common/cnxk/roc_io.h
@@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t
swap,
int64_t *ptr)
return compare;
}
+static __plt_always_inline uint64_t
+roc_atomic64_casl(uint64_t compare, uint64_t swap, int64_t *ptr) {
+ asm volatile(PLT_CPU_FEATURE_PREAMBLE
+ "casl %[compare], %[swap], [%[ptr]]\n"
+ : [compare] "+r"(compare)
+ : [swap] "r"(swap), [ptr] "r"(ptr)
+ : "memory");
+
out of curiosity, what is the "cas with release semantics"?
briefly, what is the difference between 'cas' and 'casl'?
+ Honnappa & Ruifeng,
Isn't this API Arm wide, instead of being cnxk specific?
Does it make sense to make this API for arm and cnxk use from there?
Re: [PATCH] ring: optimize corner case for enqueue/dequeue
On Tue, Jan 11, 2022 at 01:00:25PM +0100, Morten Brørup wrote: [...] > Also this version of the patch: > > Reviewed-by: Morten Brørup My apologies Morten, don't know how I missed your tag. With regards Andrzej Ostruszka
RE: [PATCH] ring: optimize corner case for enqueue/dequeue
> From: Andrzej Ostruszka [mailto:a...@semihalf.com] > Sent: Tuesday, 11 January 2022 14.46 > > On Tue, Jan 11, 2022 at 01:00:25PM +0100, Morten Brørup wrote: > [...] > > Also this version of the patch: > > > > Reviewed-by: Morten Brørup > > My apologies Morten, don't know how I missed your tag. > > With regards > Andrzej Ostruszka No worries. :-) I added the tag again, for Patchwork to show a sufficient level of acceptance when the maintainer considers the patch for merging. -Morten
Re: [dpdk-dev] [kmods PATCH v3 0/3] windows/virt2phys: fix paging issue
12/10/2021 02:42, Dmitry Kozlyuk: > v3: > * Fix Release build (Ranjit). > * Drop PnpLockdown=1 patch as it is now in dependency series. > v2: > * Following ofline review by DmitryM: > - Add comment explaining tracking approach for validation team. > - Replace deprecated allocation API calls. > - Check properties of locked memory (see docs in patch 3/4). > - Add configurable limits for tracked processes and memory. > * Add end-user documentation. > * Drop patch for Inf2Cat settings UseLocalTime=true: > the issue it resolves originated from development VM. > * Add PnpLockdown=1 patch. > > > Dmitry Kozlyuk (3): > windows/virt2phys: do not expose pageable physical addresses > windows/virt2phys: add limits against resource exhaustion > windows/virt2phys: add tracing I suppose we will never have a review from Microsoft, so Applied, thanks.
Re: [PATCH v2] Spelling comments/text
On 11/01/2022 10:51, Thomas Monjalon wrote: 06/01/2022 17:46, Thomas Monjalon: 29/11/2021 17:08, Josh Soref: -* external phy devices registred through kerenl apis +* external phy devices registred through kernel apis another spelling to fix: "registred" and while at it, "apis" should be "APIs" - * When set to zero, simple forwaring path is eanbled. + * When set to zero, simple forwaring path is enabled. another one: "forwaring" If I see nothing else, I'll fix and merge. I've found more to fix. Given the size of the patch, I did the fixes directly and added my Signed-off. Applied, thanks. The git log became: fix spelling in comments and strings The tool comes from https://github.com/jsoref Signed-off-by: Josh Soref Signed-off-by: Thomas Monjalon Not explicitly requested, but I think we can take whatever applies on stable branches too - at least for 21.11 where it applies cleanly.
Re: [dpdk-dev] [kmods PATCH v2] windows/netuio: add Intel device ID
19/10/2021 21:01, William Tu: > The patch adds three Intel device IDs, > I350 (0x1521), 82574L (0x10D3), and 82599 (0x10ED). > > Signed-off-by: William Tu > Acked-by: Dmitry Kozlyuk > Acked-by: Pallavi Kadam Applied, thanks.
Re: [PATCH v2] Spelling comments/text
11/01/2022 15:00, Kevin Traynor: > On 11/01/2022 10:51, Thomas Monjalon wrote: > > 06/01/2022 17:46, Thomas Monjalon: > >> 29/11/2021 17:08, Josh Soref: > > Applied, thanks. > > > > The git log became: > > > > fix spelling in comments and strings > > > > The tool comes from https://github.com/jsoref > > > > Signed-off-by: Josh Soref > > Signed-off-by: Thomas Monjalon > > > > > > > > Not explicitly requested, but I think we can take whatever applies on > stable branches too - at least for 21.11 where it applies cleanly. Oh yes, sorry, I forgot to Cc sta...@dpdk.org. There is nothing critical in this patch, but whatever applies can be backported, yes.
RE: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask
Hi, Please find reply inline. Thanks, Satheesh. -Original Message- From: Ferruh Yigit Sent: 11 January 2022 05:26 PM To: Satheesh Paul ; Nithin Kumar Dabilpuram ; Kiran Kumar Kokkilagadda ; Sunil Kumar Kori ; Satha Koteswara Rao Kottidi Cc: dev@dpdk.org; Ori Kam ; Andrew Rybchenko Subject: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask External Email -- On 11/9/2021 9:42 AM, psathe...@marvell.com wrote: > From: Satheesh Paul > > This patch adds support to configure channel mask which will be used > by rte flow when adding flow rules on SDP interfaces. > >Hi Satheesh, >+ Ori & Andrew. >What 'SDP' stands for? It stands for "System DMA Packet Interface". This is when the system acts as PCIe endpoint. For instance, an x86 machine can act as a host having an Octeon TX* board plugged through this PCIe interface and packets are transferred through this PCIe interface. >And can this new devarg be provided with flow rule? Why it needs to be a new >devarg? SDP and its channel related info are specific to the hardware and rte flow api cannot be extended to support them. Hence, it is added as a new devarg. >Can you please give a sample of the rte flow API that will be used? This channel mask will be used by the rte_flow_create() api. It is actually transparent at rte_flow_create() invocation itself. That is, at the time of rte_flow_create() invocation, user does not give any additional information. But internally, the driver's flow creation api takes the SDP channel/mask value supplied at the startup and applies it. Basically, in Octeon tx*, the interfaces have a "channel identifier" number. The rules in packet classification hardware are configured to match the channel number. With this change, we are relaxing the exact match and are allowing a range for this SDP interface. Thanks, ferruh > Signed-off-by: Satheesh Paul > --- > doc/guides/nics/cnxk.rst | 21 ++ > drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 -- > 2 files changed, 59 insertions(+), 2 deletions(-) > > diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index > 837ffc02b4..470e01b811 100644 > --- a/doc/guides/nics/cnxk.rst > +++ b/doc/guides/nics/cnxk.rst > @@ -276,6 +276,27 @@ Runtime Config Options > set with this custom mask, inbound encrypted traffic from all ports with > matching channel number pattern will be directed to the inline IPSec > device. > > +- ``SDP device channel and mask`` (default ``none``) > + Set channel and channel mask configuration for the SDP device. This > + will be used when creating flow rules on the SDP device. > + > + By default, for rules created on the SDP device, the RTE Flow API sets the > + channel number and mask to cover the entire SDP channel range in the > channel > + field of the MCAM entry. This behaviour can be modified using the > + ``sdp_channel_mask`` ``devargs`` parameter. > + > + For example:: > + > + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 > + > + With the above configuration, RTE Flow rules API will set the channel > + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules > + created on the SDP device. This option needs to be used when more than one > + SDP interface is in use and RTE Flow rules created need to distinguish > + between traffic from each SDP interface. The channel and mask combination > + specified should match all the channels(or rings) configured on the SDP > + interface. > + > .. note:: > <...>
Re: [kmods PATCH] windows/netuio: add interrupt support
2021-10-12 04:11 (UTC+0300), Dmitry Kozlyuk: > [...] This patchset is not supposed to be merged for now. It should have been marked as RFC, sorry for the misleading title. Offline discussions revealed a conflict between edge-triggered interrupts in DPDK contract and level-triggered IO completions used by this patch and the corresponding userspace part. I'm experimenting with alternative approaches and will send a new implementation when both the kernel and the userspace parts are ready. Thanks to William for preliminary testing and to Mark for sharing his experience with some alternatives.
Re: [dpdk-kmods v2] linux/igb_uio: fix build for switch fall through
16/12/2021 13:03, Ferruh Yigit: > Linux is using '-Wimplicit-fallthrough=5' compiler option, which doesn't > take any fall through comments into account but only uses compiler > 'fallthrough' attribute to document fall through action is intended. > > "falls through" comment was used in the code which is causing a build > error now, this patch converts comment to the 'fallthrough' macro > defined in the Linux. > > To cover the case where an old Linux version doesn't have the macro, > defined it in the compatibility header too. > > Signed-off-by: Ferruh Yigit Applied, thanks.
[Bug 914] Deprication warning from call-sphinx-build.py
https://bugs.dpdk.org/show_bug.cgi?id=914 Thomas Monjalon (tho...@monjalon.net) changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #3 from Thomas Monjalon (tho...@monjalon.net) --- Resolved in http://git.dpdk.org/dpdk/commit/?id=2654ce5c56 -- You are receiving this mail because: You are the assignee for the bug.
Re: [PATCH 1/2] net/nfp: remove duplicated check when setting MAC address
On 05/01/2022 10:32, Maxime Gouin wrote:
reported by code analysis tool C++test (version 10.4):
/build/dpdk-20.11/drivers/net/nfp/nfp_net.c
546 Conditions "(hw->ctrl &NFP_NET_CFG_CTRL_ENABLE) &&
!! (hw->cap &NFP_NET_CFG_C" is always evaluated to false
547 Condition "! (hw->cap &NFP_NET_CFG_C" is always evaluated to false
The previous "if" checks exactly the same condition. Removal of duplicate
code.
Fixes: 2fe669f4bcd2 ("net/nfp: support MAC address change")
Cc: sta...@dpdk.org
Signed-off-by: Maxime Gouin
Reviewed-by: Olivier Matz
Acked-by: Kevin Traynor
---
drivers/net/nfp/nfp_common.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index f8978e803a0f..b26770dbfbe4 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -280,10 +280,6 @@ nfp_set_mac_addr(struct rte_eth_dev *dev, struct
rte_ether_addr *mac_addr)
return -EBUSY;
}
- if ((hw->ctrl & NFP_NET_CFG_CTRL_ENABLE) &&
- !(hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR))
- return -EBUSY;
-
/* Writing new MAC to the specific port BAR address */
nfp_net_write_mac(hw, (uint8_t *)mac_addr);
Re: [PATCH 2/2] net/nfp: remove useless range checks
On 05/01/2022 10:32, Maxime Gouin wrote:
reported by code analysis tool C++test (version 10.4):
/build/dpdk-20.11/drivers/net/nfp/nfpcore/nfp_target.h
375 Condition "island < 1" is always evaluated to false
415 Condition "island < 1" is always evaluated to false
547 Condition "target < 0" is always evaluated to false
All of these conditions have the same error. They call
NFP_CPP_ID_ISLAND_of or NFP_CPP_ID_TARGET_of which return a uint8_t and
put the result in "island" or "target" which are integers. These variables
can only contain values between 0 and 255.
Fixes: c7e9729da6b5 ("net/nfp: support CPP")
Cc: sta...@dpdk.org
Signed-off-by: Maxime Gouin
Reviewed-by: Olivier Matz
---
Acked-by: Kevin Traynor
drivers/net/nfp/nfpcore/nfp_target.h | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/net/nfp/nfpcore/nfp_target.h
b/drivers/net/nfp/nfpcore/nfp_target.h
index 2884a0034f44..e8dcc9ad1eda 100644
--- a/drivers/net/nfp/nfpcore/nfp_target.h
+++ b/drivers/net/nfp/nfpcore/nfp_target.h
@@ -37,7 +37,7 @@ pushpull_width(int pp)
static inline int
target_rw(uint32_t cpp_id, int pp, int start, int len)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
if (island && (island < start || island > (start + len)))
return NFP_ERRNO(EINVAL);
@@ -117,7 +117,7 @@ nfp6000_nbi_ppc(uint32_t cpp_id)
static inline int
nfp6000_nbi(uint32_t cpp_id, uint64_t address)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
uint64_t rel_addr = address & 0x3f;
if (island && (island < 8 || island > 9))
@@ -281,7 +281,7 @@ static inline int
nfp6000_mu(uint32_t cpp_id, uint64_t address)
{
int pp;
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
if (island == 0) {
if (address < 0x20ULL)
@@ -316,7 +316,7 @@ nfp6000_mu(uint32_t cpp_id, uint64_t address)
static inline int
nfp6000_ila(uint32_t cpp_id)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
if (island && (island < 48 || island > 51))
return NFP_ERRNO(EINVAL);
@@ -336,7 +336,7 @@ nfp6000_ila(uint32_t cpp_id)
static inline int
nfp6000_pci(uint32_t cpp_id)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
if (island && (island < 4 || island > 7))
return NFP_ERRNO(EINVAL);
@@ -354,7 +354,7 @@ nfp6000_pci(uint32_t cpp_id)
static inline int
nfp6000_crypto(uint32_t cpp_id)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
if (island && (island < 12 || island > 15))
return NFP_ERRNO(EINVAL);
@@ -370,9 +370,9 @@ nfp6000_crypto(uint32_t cpp_id)
static inline int
nfp6000_cap_xpb(uint32_t cpp_id)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
- if (island && (island < 1 || island > 63))
+ if (island > 63)
return NFP_ERRNO(EINVAL);
switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
@@ -410,9 +410,9 @@ nfp6000_cap_xpb(uint32_t cpp_id)
static inline int
nfp6000_cls(uint32_t cpp_id)
{
- int island = NFP_CPP_ID_ISLAND_of(cpp_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_id);
- if (island && (island < 1 || island > 63))
+ if (island > 63)
return NFP_ERRNO(EINVAL);
switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {
@@ -540,11 +540,11 @@ nfp_target_cpp(uint32_t cpp_island_id, uint64_t
cpp_island_address,
const uint32_t *imb_table)
{
int err;
- int island = NFP_CPP_ID_ISLAND_of(cpp_island_id);
- int target = NFP_CPP_ID_TARGET_of(cpp_island_id);
+ uint8_t island = NFP_CPP_ID_ISLAND_of(cpp_island_id);
+ uint8_t target = NFP_CPP_ID_TARGET_of(cpp_island_id);
uint32_t imb;
- if (target < 0 || target >= 16)
+ if (target >= 16)
return NFP_ERRNO(EINVAL);
if (island == 0) {
Re: [PATCH] bus/ifpga: remove useless check while browsing devices
On 05/01/2022 10:26, Maxime Gouin wrote:
reported by code analysis tool C++test (version 10.4):
/build/dpdk-20.11/drivers/bus/ifpga/ifpga_bus.c
67Condition "afu_dev" is always evaluated to true
81Condition "afu_dev" is always evaluated to true
The "for" loop already checks that afu_dev is not NULL.
Fixes: 05fa3d4a6539 ("bus/ifpga: add Intel FPGA bus library")
Cc: sta...@dpdk.org
Signed-off-by: Maxime Gouin
Reviewed-by: Olivier Matz
Acked-by: Kevin Traynor
---
drivers/bus/ifpga/ifpga_bus.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/bus/ifpga/ifpga_bus.c b/drivers/bus/ifpga/ifpga_bus.c
index cbc680928486..c5c8bbd57219 100644
--- a/drivers/bus/ifpga/ifpga_bus.c
+++ b/drivers/bus/ifpga/ifpga_bus.c
@@ -64,8 +64,7 @@ ifpga_find_afu_dev(const struct rte_rawdev *rdev,
struct rte_afu_device *afu_dev = NULL;
TAILQ_FOREACH(afu_dev, &ifpga_afu_dev_list, next) {
- if (afu_dev &&
- afu_dev->rawdev == rdev &&
+ if (afu_dev->rawdev == rdev &&
!ifpga_afu_id_cmp(&afu_dev->id, afu_id))
return afu_dev;
}
@@ -78,8 +77,7 @@ rte_ifpga_find_afu_by_name(const char *name)
struct rte_afu_device *afu_dev = NULL;
TAILQ_FOREACH(afu_dev, &ifpga_afu_dev_list, next) {
- if (afu_dev &&
- !strcmp(afu_dev->device.name, name))
+ if (!strcmp(afu_dev->device.name, name))
return afu_dev;
}
return NULL;
Re: [PATCH v3 21/29] crypto/cnxk: add more info on command timeout
17/12/2021 10:20, Anoob Joseph:
> Print more info when command timeout happens. Print software and
> hardware queue information.
>
> Signed-off-by: Anoob Joseph
> Signed-off-by: Tejasree Kondoj
> ---
> +void
> +cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *qp)
> +{
> + struct pending_queue *pend_q = &qp->pend_q;
> + uint64_t inflight, enq_ptr, deq_ptr, insts;
> + union cpt_lf_q_inst_ptr inst_ptr;
> + union cpt_lf_inprog lf_inprog;
> +
> + plt_print("Lcore ID: %d, LF/QP ID: %d", rte_lcore_id(), qp->lf.lf_id);
> + plt_print("");
> + plt_print("S/w pending queue:");
> + plt_print("\tHead: %ld", pend_q->head);
> + plt_print("\tTail: %ld", pend_q->tail);
> + plt_print("\tMask: 0x%lx", pend_q->pq_mask);
> + plt_print("\tInflight count: %ld",
> + pending_queue_infl_cnt(pend_q->head, pend_q->tail,
> + pend_q->pq_mask));
> +
> + plt_print("");
> + plt_print("H/w pending queue:");
> +
> + lf_inprog.u = plt_read64(qp->lf.rbase + CPT_LF_INPROG);
> + inflight = lf_inprog.s.inflight;
> + plt_print("\tInflight in engines: %ld", inflight);
> +
> + inst_ptr.u = plt_read64(qp->lf.rbase + CPT_LF_Q_INST_PTR);
> +
> + enq_ptr = inst_ptr.s.nq_ptr;
> + deq_ptr = inst_ptr.s.dq_ptr;
> +
> + if (enq_ptr >= deq_ptr)
> + insts = enq_ptr - deq_ptr;
> + else
> + insts = (enq_ptr + pend_q->pq_mask + 1 + 320 + 40) - deq_ptr;
> +
> + plt_print("\tNQ ptr: 0x%lx", enq_ptr);
> + plt_print("\tDQ ptr: 0x%lx", deq_ptr);
> + plt_print("Insts waiting in CPT: %ld", insts);
> +
> + plt_print("");
> + roc_cpt_afs_print(qp->lf.roc_cpt);
> +}
This functions is wrong. You cannot print 64-bit values with %l.
In 32-bit mode, compilation will fail.
Please use PRIx64.
Note: this mistake is warned by the script devtools/checkpatches.sh
Warning in drivers/crypto/cnxk/cnxk_cryptodev_ops.c:
Using %l format, prefer %PRI*64 if type is [u]int64_t
I will wait for the next-crypto tree to be fixed.
Re: [PATCH v1] maintainers: update for testpmd
> >> Add Yuying Zhang as a co-maintainer. > >> > >> Signed-off-by: Yuying Zhang > > > > Acked-by: Xiaoyun Li > > > > Acked-by: Ferruh Yigit > > > Thanks for the volunteer. > > +1 Applied, thanks for volunteering, we need more maintainers for testpmd. I think there is room for one more, with different ideas, ideally outside of Intel.
RE: [PATCH 1/8] ethdev: introduce IP reassembly offload
> IP Reassembly is a costly operation if it is done in software.
> The operation becomes even more costlier if IP fragmants are encrypted.
> However, if it is offloaded to HW, it can considerably save application
> cycles.
>
> Hence, a new offload RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY is introduced in
> ethdev for devices which can attempt reassembly of packets in hardware.
> rte_eth_dev_info is updated with the reassembly capabilities which a device
> can support.
>
> The resulting reassembled packet would be a typical segmented mbuf in
> case of success.
>
> And if reassembly of fragments is failed or is incomplete (if fragments do
> not come before the reass_timeout), the mbuf ol_flags can be updated.
> This is updated in a subsequent patch.
>
> Signed-off-by: Akhil Goyal
> ---
> doc/guides/nics/features.rst | 12
> lib/ethdev/rte_ethdev.c | 1 +
> lib/ethdev/rte_ethdev.h | 32 +++-
> 3 files changed, 44 insertions(+), 1 deletion(-)
>
> diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
> index 27be2d2576..1dfdee9602 100644
> --- a/doc/guides/nics/features.rst
> +++ b/doc/guides/nics/features.rst
> @@ -602,6 +602,18 @@ Supports inner packet L4 checksum.
>
> ``tx_offload_capa,tx_queue_offload_capa:RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM``.
>
>
> +.. _nic_features_ip_reassembly:
> +
> +IP reassembly
> +-
> +
> +Supports IP reassembly in hardware.
> +
> +* **[uses] rte_eth_rxconf,rte_eth_rxmode**:
> ``offloads:RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY``.
> +* **[provides] mbuf**:
> ``mbuf.ol_flags:RTE_MBUF_F_RX_IP_REASSEMBLY_INCOMPLETE``.
> +* **[provides] rte_eth_dev_info**: ``reass_capa``.
> +
> +
> .. _nic_features_shared_rx_queue:
>
> Shared Rx queue
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index a1d475a292..d9a03f12f9 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -126,6 +126,7 @@ static const struct {
> RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
> RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
> RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
> + RTE_RX_OFFLOAD_BIT2STR(IP_REASSEMBLY),
> };
>
> #undef RTE_RX_OFFLOAD_BIT2STR
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index fa299c8ad7..11427b2e4d 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -1586,6 +1586,7 @@ struct rte_eth_conf {
> #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
> #define DEV_RX_OFFLOAD_RSS_HASH RTE_ETH_RX_OFFLOAD_RSS_HASH
> #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
> +#define RTE_ETH_RX_OFFLOAD_IP_REASSEMBLYRTE_BIT64(21)
>
> #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
>RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
> @@ -1781,6 +1782,33 @@ enum rte_eth_representor_type {
> RTE_ETH_REPRESENTOR_PF, /**< representor of Physical Function. */
> };
>
> +/* Flag to offload IP reassembly for IPv4 packets. */
> +#define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
> +/* Flag to offload IP reassembly for IPv6 packets. */
> +#define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this structure may change without prior notice.
> + *
> + * A structure used to set IP reassembly configuration.
> + *
> + * If RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY flag is set in offloads field,
> + * the PMD will attempt IP reassembly for the received packets as per
> + * properties defined in this structure:
> + *
> + */
> +struct rte_eth_ip_reass_params {
> + /** Maximum time in ms which PMD can wait for other fragments. */
> + uint32_t reass_timeout;
> + /** Maximum number of fragments that can be reassembled. */
> + uint16_t max_frags;
> + /**
> + * Flags to enable reassembly of packet types -
> + * RTE_ETH_DEV_REASSEMBLY_F_xxx.
> + */
> + uint16_t flags;
> +};
> +
> /**
> * A structure used to retrieve the contextual information of
> * an Ethernet device, such as the controlling driver of the
> @@ -1841,8 +1869,10 @@ struct rte_eth_dev_info {
>* embedded managed interconnect/switch.
>*/
> struct rte_eth_switch_info switch_info;
> + /** IP reassembly offload capabilities that a device can support. */
> + struct rte_eth_ip_reass_params reass_capa;
>
> - uint64_t reserved_64s[2]; /**< Reserved for future fields */
> + uint64_t reserved_64s[1]; /**< Reserved for future fields */
> void *reserved_ptrs[2]; /**< Reserved for future fields */
> };
>
> --
Acked-by: Konstantin Ananyev
> 2.25.1
Re: [PATCH] app/test-fib: fix possible division by zero
On 23/12/2021 15:25, Vladimir Medvedkin wrote:
This patch fixes the division by 0, which occurs if the number of routes is
less than 10.
Can be triggered by passing -n argument with value < 10:
9 causing a divide by zero - another example of inflation :-)
./dpdk-test-fib -- -n 9
...
Floating point exception (core dumped)
Fixes: 103809d032cd ("app/test-fib: add test application for FIB")
Cc: vladimir.medved...@intel.com
You probably want to add 'Cc: sta...@dpdk.org' for this.
Signed-off-by: Vladimir Medvedkin
---
app/test-fib/main.c | 40
1 file changed, 24 insertions(+), 16 deletions(-)
diff --git a/app/test-fib/main.c b/app/test-fib/main.c
index ecd420116a..9bc8b8a7ca 100644
--- a/app/test-fib/main.c
+++ b/app/test-fib/main.c
@@ -902,8 +902,9 @@ run_v4(void)
return -ret;
}
}
- printf("AVG FIB add %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG FIB add %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
You are just not printing the result for these cases. Do you think it is
worth to print a warning message (one), and update any documentation so
the user is aware of the acceptable bounds?
i += j;
}
@@ -930,8 +931,9 @@ run_v4(void)
return -ret;
}
}
- printf("AVG LPM add %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG LPM add %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
}
@@ -984,8 +986,9 @@ run_v4(void)
for (j = 0; j < (config.nb_routes - i) / k; j++)
rte_fib_delete(fib, rt[i + j].addr, rt[i + j].depth);
- printf("AVG FIB delete %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG FIB delete %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
@@ -996,8 +999,9 @@ run_v4(void)
rte_lpm_delete(lpm, rt[i + j].addr,
rt[i + j].depth);
- printf("AVG LPM delete %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG LPM delete %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
}
@@ -1097,8 +1101,9 @@ run_v6(void)
return -ret;
}
}
- printf("AVG FIB add %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG FIB add %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
@@ -1125,8 +1130,9 @@ run_v6(void)
return -ret;
}
}
- printf("AVG LPM add %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG LPM add %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
}
@@ -1183,8 +1189,9 @@ run_v6(void)
for (j = 0; j < (config.nb_routes - i) / k; j++)
rte_fib6_delete(fib, rt[i + j].addr, rt[i + j].depth);
- printf("AVG FIB delete %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG FIB delete %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
@@ -1195,8 +1202,9 @@ run_v6(void)
rte_lpm6_delete(lpm, rt[i + j].addr,
rt[i + j].depth);
- printf("AVG LPM delete %"PRIu64"\n",
- (rte_rdtsc_precise() - start) / j);
+ if (j != 0)
+ printf("AVG LPM delete %"PRIu64"\n",
+ (rte_rdtsc_precise() - start) / j);
i += j;
}
}
RE: [PATCH 2/8] ethdev: add dev op for IP reassembly configuration
> A new ethernet device op is added to give application control over
> the IP reassembly configuration. This operation is an optional
> call from the application, default values are set by PMD and
> exposed via rte_eth_dev_info.
> Application should always first retreive the capabilities from
> rte_eth_dev_info and then set the fields accordingly.
>
> Signed-off-by: Akhil Goyal
> ---
> lib/ethdev/ethdev_driver.h | 19 +++
> lib/ethdev/rte_ethdev.c| 30 ++
> lib/ethdev/rte_ethdev.h| 28
> lib/ethdev/version.map | 3 +++
> 4 files changed, 80 insertions(+)
>
> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> index d95605a355..0ed53c14f3 100644
> --- a/lib/ethdev/ethdev_driver.h
> +++ b/lib/ethdev/ethdev_driver.h
> @@ -990,6 +990,22 @@ typedef int (*eth_representor_info_get_t)(struct
> rte_eth_dev *dev,
> typedef int (*eth_rx_metadata_negotiate_t)(struct rte_eth_dev *dev,
> uint64_t *features);
>
> +/**
> + * @internal
> + * Set configuration parameters for enabling IP reassembly offload in
> hardware.
> + *
> + * @param dev
> + * Port (ethdev) handle
> + *
> + * @param[in] conf
> + * Configuration parameters for IP reassembly.
> + *
> + * @return
> + * Negative errno value on error, zero otherwise
> + */
> +typedef int (*eth_ip_reassembly_conf_set_t)(struct rte_eth_dev *dev,
> +struct rte_eth_ip_reass_params *conf);
> +
> /**
> * @internal A structure containing the functions exported by an Ethernet
> driver.
> */
> @@ -1186,6 +1202,9 @@ struct eth_dev_ops {
>* kinds of metadata to the PMD
>*/
> eth_rx_metadata_negotiate_t rx_metadata_negotiate;
> +
> + /** Set IP reassembly configuration */
> + eth_ip_reassembly_conf_set_t ip_reassembly_conf_set;
> };
>
> /**
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index d9a03f12f9..ecc6c1fe37 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -6473,6 +6473,36 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id,
> uint64_t *features)
> (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
> }
>
> +int
> +rte_eth_ip_reassembly_conf_set(uint16_t port_id,
> +struct rte_eth_ip_reass_params *conf)
> +{
> + struct rte_eth_dev *dev;
> +
> + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
> + dev = &rte_eth_devices[port_id];
Should we check here that device is properly configured, but not started yet?
Another question - if we have reassembly_conf_set() would it make sense to
have also reassembly_conf_get?
So user can retrieve current ip_reassembly config values?
> +
> + if ((dev->data->dev_conf.rxmode.offloads &
> + RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY) == 0) {
> + RTE_ETHDEV_LOG(ERR,
> + "The port (ID=%"PRIu16") is not configured for IP
> reassembly\n",
> + port_id);
> + return -EINVAL;
> + }
> +
> +
> + if (conf == NULL) {
> + RTE_ETHDEV_LOG(ERR,
> + "Invalid IP reassembly configuration (NULL)\n");
> + return -EINVAL;
> + }
> +
> + RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_set,
> + -ENOTSUP);
> + return eth_err(port_id,
> +(*dev->dev_ops->ip_reassembly_conf_set)(dev, conf));
> +}
> +
> RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
>
> RTE_INIT(ethdev_init_telemetry)
Re: [PATCH] examples/performance-thread: remove
17/12/2021 14:15, Ferruh Yigit: > Remove sample application which is not clear if it is still relevant. > > Signed-off-by: Ferruh Yigit > --- > > Please comment if there is an reason to keep the sample application. This is not an exercise, we are going to remove this example! Last chance to say no, otherwise I will merge in few days.
Re: [PATCH v2 0/8] net/bonding: fixes and LACP short timeout
On 21/12/2021 19:57, Robert Sanford wrote: This patchset makes the following changes to net/bonding: - Clean up minor errors in spelling, whitespace, C++ wrappers, and comments. - Replace directly overwriting of slave port's rte_eth_conf by copying it, but only updating it via rte_eth_dev_configure(). - Make minor changes to allocation of mbuf pool and rx/tx rings. - Add support for enabling LACP short timeout, i.e., link partner can use fast periodic time interval between transmits. - Include bond_8023ad and bond_alb in doxygen. - Remove self from Timers maintainers. - Add API stubs to net/ring PMD. - Add LACP short timeout to tests. V2 changes: - Additional typo and whitespace corrections. - Minor changes to LACP private rings creation. - Add net/ring API stubs patch. - Insert extra "bond_handshake" to LACP short timeout autotest. Robert Sanford (8): net/bonding: fix typos and whitespace net/bonding: fix bonded dev configuring slave dev net/bonding: change mbuf pool and ring creation net/bonding: support enabling LACP short timeout net/bonding: add bond_8023ad and bond_alb to doc Remove self from Timers maintainers. net/ring: add promiscuous and allmulticast API stubs net/bonding: add LACP short timeout to tests You might want to consider patches that are fixes for backport to stable branches. Patches 1,2,3,5 look to be the ones most suited. MAINTAINERS | 1 - app/test-pmd/cmdline.c| 81 +- app/test/test_link_bonding_mode4.c| 98 ++- doc/api/doxy-api-index.md | 2 + drivers/net/bonding/eth_bond_8023ad_private.h | 15 ++-- drivers/net/bonding/rte_eth_bond_8023ad.c | 58 ++-- drivers/net/bonding/rte_eth_bond_8023ad.h | 18 +++-- drivers/net/bonding/rte_eth_bond_pmd.c| 43 ++-- drivers/net/ring/rte_eth_ring.c | 28 9 files changed, 272 insertions(+), 72 deletions(-)
Re: [PATCH] mbuf: delete dynamic fields copy in hdr copy
14/12/2021 08:56, Gaoxiang Liu: > Because dynamic fields are registered by the DPDK application, > so it is up to the application to decide whether to copy the value of > dynamic fields. > So delete dynamic fields copy in __rte_pktmbuf_copy_hdr. > It's more flexible for the DPDK application, > and is useful for improving performance. Yes, removing operations will improve the performance, but it looks wrong. This is copying all dynamic fields, not matter which one is registered. We cannot ask the application to manage dynamic fields copy, especially if the copy is done inside a library.
Re: [PATCH v2 4/4] test_dmadev: increase iterations of capacity test case
On 11/01/2022 13:41, Bruce Richardson wrote: To ensure we catch any bugs in calculation due to wrap-around of the id values, increase the number of iterations of the burst_capacity test. Signed-off-by: Bruce Richardson --- app/test/test_dmadev.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) Acked-by: Kevin Laatz
Re: [PATCH 2/2] doc: update LTS release cadence
13/12/2021 17:48, Kevin Traynor: > Regular LTS releases have previously aligned to DPDK main branch > releases so that fixes being backported have already gone through > DPDK main branch release validation. > > Now that DPDK main branch has moved to 3 releases per year, the LTS > releases should continue to align with it and follow a similar release > cadence. > > Update stable docs to reflect this. > > Signed-off-by: Kevin Traynor Series applied, thanks.
Re: [PATCH v2 2/4] dma/idxd: fix paths to driver sysfs directory
On 11/01/2022 13:41, Bruce Richardson wrote:
Recent kernel changes[1][2] mean that we cannot guarantee that the paths
in sysfs used for creating/binding a DSA or workqueue instance will be
as given in the utility script, since they are now "compatibility-mode
only". Update script to support both new paths and compatibility ones.
[1]
https://lore.kernel.org/all/162637445139.744545.6008938867943724701.st...@djiang5-desk3.ch.intel.com/
[2]
https://lore.kernel.org/all/162637468705.744545.4399080971745974435.st...@djiang5-desk3.ch.intel.com/
Fixes: 01863b9d2354 ("raw/ioat: include example configuration script")
Cc: sta...@dpdk.org
Signed-off-by: Bruce Richardson
---
drivers/dma/idxd/dpdk_idxd_cfg.py | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
Acked-by: Kevin Laatz
Re: [PATCH v2 3/4] dma/idxd: fix wrap-around in burst capacity calculation
On 11/01/2022 13:41, Bruce Richardson wrote:
The burst capacity calculation code assumes that the write and read
(i.e. ids_returned) values both wrap at the ring-size, but the read
value instead wraps as UINT16_MAX. Therefore, instead of just adding
ring-size to the write value in case the read is greater, we need to
just always mask the result to ensure a correct, in-range, value.
Fixes: 9459de4edc99 ("dma/idxd: add burst capacity")
Cc: kevin.la...@intel.com
Cc: sta...@dpdk.org
Reported-by: Sunil Pai G
Signed-off-by: Bruce Richardson
---
drivers/dma/idxd/idxd_common.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
Acked-by: Kevin Laatz
Re: [dpdk-dev] [PATCH v1] drivers: remove octeontx2 drivers
07/12/2021 12:51, Kevin Traynor: > On 07/12/2021 11:01, Ferruh Yigit wrote: > > Not related with this set specifically, a more general question about > > updating > > old release notes. > > For me release notes should be frozen with the release and shouldn't be > > updated > > at all afterwards, but there is no agreement on this and in practice old > > release > > notes are updated. > > > > My question is, is there any benefit to keep a separate release notes file > > for > > each release, and need to maintain old ones. > > What about having a single release file, 'release.rst', and reset it after > > each > > release? > > > > I think there is a benefit to keeping them all - you can quickly > look/grep through the files for multiple releases. e.g. if you wanted to > check when a driver/feature was added etc. I agree it doesn't make sense > to update them, unless there was a mistake at the time of release. It makes sense to update old release notes, at least to make them compile. Please remember we generate all of them as part of the guides: https://doc.dpdk.org/guides/rel_notes/
RE: [PATCH 3/8] ethdev: add mbuf dynfield for incomplete IP reassembly
> Hardware IP reassembly may be incomplete for multiple reasons like
> reassembly timeout reached, duplicate fragments, etc.
> To save application cycles to process these packets again, a new
> mbuf ol_flag (RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE) is added to
> show that the mbuf received is not reassembled properly.
If we use dynfiled for data, why not use dynflag for
RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE?
That way we can avoid introduced hardcoded (always defined) flags for that
case.
>
> Now if this flag is set, application can retreive corresponding chain of
> mbufs using mbuf dynfield set by the PMD. Now, it will be upto
> application to either drop those fragments or wait for more time.
>
> Signed-off-by: Akhil Goyal
> ---
> lib/ethdev/ethdev_driver.h | 8 ++
> lib/ethdev/rte_ethdev.c| 16 +++
> lib/ethdev/rte_ethdev.h| 57 ++
> lib/ethdev/version.map | 2 ++
> lib/mbuf/rte_mbuf_core.h | 3 +-
> 5 files changed, 85 insertions(+), 1 deletion(-)
>
> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> index 0ed53c14f3..9a0bab9a61 100644
> --- a/lib/ethdev/ethdev_driver.h
> +++ b/lib/ethdev/ethdev_driver.h
> @@ -1671,6 +1671,14 @@ int
> rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
> uint32_t direction);
>
> +/**
> + * @internal
> + * Register mbuf dynamic field for IP reassembly incomplete case.
> + */
> +__rte_internal
> +int
> +rte_eth_ip_reass_dynfield_register(void);
> +
>
> /*
> * Legacy ethdev API used internally by drivers.
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index ecc6c1fe37..d53ce4eaca 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -6503,6 +6503,22 @@ rte_eth_ip_reassembly_conf_set(uint16_t port_id,
> (*dev->dev_ops->ip_reassembly_conf_set)(dev, conf));
> }
>
> +#define RTE_ETH_IP_REASS_DYNFIELD_NAME "rte_eth_ip_reass_dynfield"
> +int rte_eth_ip_reass_dynfield_offset = -1;
> +
> +int
> +rte_eth_ip_reass_dynfield_register(void)
> +{
> + static const struct rte_mbuf_dynfield dynfield_desc = {
> + .name = RTE_ETH_IP_REASS_DYNFIELD_NAME,
> + .size = sizeof(rte_eth_ip_reass_dynfield_t),
> + .align = __alignof__(rte_eth_ip_reass_dynfield_t),
> + };
> + rte_eth_ip_reass_dynfield_offset =
> + rte_mbuf_dynfield_register(&dynfield_desc);
> + return rte_eth_ip_reass_dynfield_offset;
> +}
> +
> RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
>
> RTE_INIT(ethdev_init_telemetry)
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index 891f9a6e06..c4024d2265 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -5245,6 +5245,63 @@ __rte_experimental
> int rte_eth_ip_reassembly_conf_set(uint16_t port_id,
> struct rte_eth_ip_reass_params *conf);
>
> +/**
> + * In case of IP reassembly offload failure, ol_flags in mbuf will be set
> + * with RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE and packets will be returned
> + * without alteration. The application can retrieve the attached fragments
> + * using mbuf dynamic field.
> + */
> +typedef struct {
> + /**
> + * Next fragment packet. Application should fetch dynamic field of
> + * each fragment until a NULL is received and nb_frags is 0.
> + */
> + struct rte_mbuf *next_frag;
> + /** Time spent(in ms) by HW in waiting for further fragments. */
> + uint16_t time_spent;
> + /** Number of more fragments attached in mbuf dynamic fields. */
> + uint16_t nb_frags;
> +} rte_eth_ip_reass_dynfield_t;
Looks like a bit of overkill to me:
We do already have 'next' and 'nb_frags' fields inside mbuf,
why can't they be used here? Why a separate ones are necessary?
> +
> +extern int rte_eth_ip_reass_dynfield_offset;
> +
RE: [PATCH 3/8] ethdev: add mbuf dynfield for incomplete IP reassembly
>
> > Hardware IP reassembly may be incomplete for multiple reasons like
> > reassembly timeout reached, duplicate fragments, etc.
> > To save application cycles to process these packets again, a new
> > mbuf ol_flag (RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE) is added to
> > show that the mbuf received is not reassembled properly.
>
> If we use dynfiled for data, why not use dynflag for
> RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE?
> That way we can avoid introduced hardcoded (always defined) flags for that
> case.
I have not looked into using dynflag. Will explore if it can be used.
> >
> > +/**
> > + * In case of IP reassembly offload failure, ol_flags in mbuf will be set
> > + * with RTE_MBUF_F_RX_IPREASSEMBLY_INCOMPLETE and packets will be
> returned
> > + * without alteration. The application can retrieve the attached fragments
> > + * using mbuf dynamic field.
> > + */
> > +typedef struct {
> > + /**
> > +* Next fragment packet. Application should fetch dynamic field of
> > +* each fragment until a NULL is received and nb_frags is 0.
> > +*/
> > + struct rte_mbuf *next_frag;
> > + /** Time spent(in ms) by HW in waiting for further fragments. */
> > + uint16_t time_spent;
> > + /** Number of more fragments attached in mbuf dynamic fields. */
> > + uint16_t nb_frags;
> > +} rte_eth_ip_reass_dynfield_t;
>
>
> Looks like a bit of overkill to me:
> We do already have 'next' and 'nb_frags' fields inside mbuf,
> why can't they be used here? Why a separate ones are necessary?
>
The next and nb_frags in mbuf is for segmented buffers and not IP fragments.
But here we will have separate mbufs in each dynfield denoting each of the
fragments which may have further segmented buffers.
RE: [PATCH 2/8] ethdev: add dev op for IP reassembly configuration
> > diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> > index d9a03f12f9..ecc6c1fe37 100644
> > --- a/lib/ethdev/rte_ethdev.c
> > +++ b/lib/ethdev/rte_ethdev.c
> > @@ -6473,6 +6473,36 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id,
> uint64_t *features)
> >(*dev->dev_ops->rx_metadata_negotiate)(dev, features));
> > }
> >
> > +int
> > +rte_eth_ip_reassembly_conf_set(uint16_t port_id,
> > + struct rte_eth_ip_reass_params *conf)
> > +{
> > + struct rte_eth_dev *dev;
> > +
> > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
> > + dev = &rte_eth_devices[port_id];
>
> Should we check here that device is properly configured, but not started yet?
Ok will add checks for dev->data->dev_configured and dev->data->dev_started
> Another question - if we have reassembly_conf_set() would it make sense to
> have also reassembly_conf_get?
> So user can retrieve current ip_reassembly config values?
>
The set/supported values can be retrieved using rte_eth_dev_info :: reass_capa
Re: [PATCH] net/bnxt: fix xstats get names implementation
On Tue, Nov 30, 2021 at 6:42 AM Lance Richardson
wrote:
>
> When the xstats_names parameter to rte_eth_xstats_get_names()
> is non-NULL and the size parameter is less than the required
> number of entries, the driver must return the required size
> without modifying (and over-running) the caller's xstats_names
> array.
>
> Update bnxt_dev_xstats_get_names_op() in accordance with this
> requirement.
>
> Fixes: bfb9c2260be2 ("net/bnxt: support xstats get/reset")
> Cc: sta...@dpdk.org
> Signed-off-by: Lance Richardson
ACK
Patch applied to dpdk-next-net-brcm.
>
Re: [dpdk-dev] [PATCH 00/18] bnxt PMD fixes
On Tue, Jan 4, 2022 at 12:19 AM Kalesh A P wrote: > > From: Kalesh AP > > This series contains bnxt PMD bug fixes. Please apply. Patchset applied to dpdk-next-net-brcm. Thanks > > Ajit Khaparde (4): > net/bnxt: fix ring teardown > net/bnxt: fix PAM4 mask setting > net/bnxt: fix pointer access > net/bnxt: check VF rep pointer before access > > Kalesh AP (13): > net/bnxt: fix bnxt_dev_set_mc_addr_list_op Fixed commit headline to "fix set multicast address list". > net/bnxt: fix to restore mcast macs during reset recovery > net/bnxt: fix queue stop operation > net/bnxt: restore RSS configuration after reset recovery > net/bnxt: fix restoring VLAN filtering after recovery > net/bnxt: fix to cap max number of unicast MACs > net/bnxt: set fast-path pointers only if recovery succeeds > net/bnxt: improve recovery related log messages > net/bnxt: add null check for mark table > net/bnxt: fix flow create when RSS is disabled > net/bnxt: get max supported multicast filters count > net/bnxt: fix handling of VF configuration changes > net/bnxt: fix incorrect memset in bnxt_dev_xstats_get_op Fixed up typo in commit log during merge. Changed commit title to "fix incorrect memset in get xstats". > > Somnath Kotur (1): > net/bnxt: refactor bnxt_stop_rxtx() for reuse Changed commit headline to "refactor bnxt stop rxtx for reuse".
RE: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
> -Original Message-
> From: Ferruh Yigit
> Sent: Tuesday, January 11, 2022 9:46 PM
> To: Ashwin Sekhar Thalakalath Kottilveetil ;
> dev@dpdk.org; Honnappa Nagarahalli ;
> Ruifeng Wang
> Cc: Nithin Kumar Dabilpuram ;
> jer...@marvell.com; Sunil Kumar Kori ; Satha
> Koteswara Rao Kottidi ; Pavan Nikhilesh
> Bhagavatula ; Kiran Kumar Kokkilagadda
> ; Satheesh Paul ;
> Anoob Joseph ; Akhil Goyal
> Subject: Re: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics
> for batch alloc
>
> On 1/11/2022 12:26 PM, Ashwin Sekhar Thalakalath Kottilveetil wrote:
> > CAS is compare and swap. CASL is compare and swap with release
> semantics.
> >
>
> What does 'release semantics' mean? What is functional difference in both?
'release semantics' is semantics in memory ordering for store operations.
It ensures store-store ordering.
And some comments below.
>
> > But on CNXK platform, the functionality of CAS* instructions is completely
> different when it is done to specific addresses. These APIs are meant for use
> for such special cases. These cannot be made ARM generic.
> >
> > Ashwin Sekhar T K
> >
> >> -Original Message-
> >> From: Ferruh Yigit
> >> Sent: Tuesday, January 11, 2022 5:42 PM
> >> To: Ashwin Sekhar Thalakalath Kottilveetil ;
> >> dev@dpdk.org; Honnappa Nagarahalli ;
> >> Ruifeng Wang (Arm Technology China)
> >> Cc: Nithin Kumar Dabilpuram ; Jerin Jacob
> >> Kollanukkaran ; Sunil Kumar Kori
> >> ; Satha Koteswara Rao Kottidi
> >> ; Pavan Nikhilesh Bhagavatula
> >> ; Kiran Kumar Kokkilagadda
> >> ; Satheesh Paul ;
> >> Anoob Joseph ; Akhil Goyal
> >> Subject: [EXT] Re: [PATCH] common/cnxk: use cas with release
> >> semantics for batch alloc
> >>
> >> External Email
> >>
> >> -
> >> - On 1/11/2022 12:08 PM, Ferruh Yigit wrote:
> >>> On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
> Before issuing the batch alloc, we clear the first word of cache
> lines so that NPA can update the status. Make sure that this line
> clear is flushed before the batch alloc is issued.
>
> Signed-off-by: Ashwin Sekhar T K
> ---
> drivers/common/cnxk/roc_io.h | 12
> drivers/common/cnxk/roc_io_generic.h | 9 +
> drivers/common/cnxk/roc_npa.h | 2 +-
> 3 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_io.h
> b/drivers/common/cnxk/roc_io.h index fe5f7f46d0..4f15503c29 100644
> --- a/drivers/common/cnxk/roc_io.h
> +++ b/drivers/common/cnxk/roc_io.h
> @@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t
> >> swap,
> int64_t *ptr)
> return compare;
> }
> +static __plt_always_inline uint64_t roc_atomic64_casl(uint64_t
> +compare, uint64_t swap, int64_t *ptr) {
> + asm volatile(PLT_CPU_FEATURE_PREAMBLE
> + "casl %[compare], %[swap], [%[ptr]]\n"
> + : [compare] "+r"(compare)
> + : [swap] "r"(swap), [ptr] "r"(ptr)
> + : "memory");
> +
> >>>
> >>> out of curiosity, what is the "cas with release semantics"?
> >>> briefly, what is the difference between 'cas' and 'casl'?
> >>
> >> + Honnappa & Ruifeng,
Thanks Ferruh for adding me in this loop.
> >>
> >> Isn't this API Arm wide, instead of being cnxk specific?
> >> Does it make sense to make this API for arm and cnxk use from there?
Yes, CAS operation can be used Arm wide.
Generally, CAS is available via __atomic_compare_exchange/_n() compiler
built-ins. This is the way we use
atomic in DPDK. So there is no need to add another generic API.
Re: [PATCH v3 00/15] features and fixes on NXP eth devices
Series- Acked-by: Hemant Agrawal On 1/3/2022 3:31 PM, nipun.gu...@nxp.com wrote: From: Nipun Gupta This series adds few features and important fixes on DPAA, PFE and ENETC devices. Features added: - level 2 support for shaping on DPAA2 - loopback configuration for DPNI devices on DPAA2 - Multiple TXQ's enqueue for ordered queues for performance - VFs support on ENETC Fixes: - fix unregistering interrupt handler on DPAA2 - fix timestamping for IEEE1588 on DPAA1 Changes in v2: - fix checkpatch errors Changes in v3: - remove unrequired PFE HW checksum patch - use predefined API for adding delay - use macro value for allocating mbuf in event Apeksha Gupta (1): net/pfe: remove setting unused value Gagandeep Singh (3): net/dpaa2: add support for level 2 in traffic management net/enetc: add support for VFs net/pfe: reduce driver initialization time Jun Yang (4): net/dpaa2: support multiple txqs en-queue for ordered net/dpaa2: secondary process handling for dpni bus/fslmc: add and scan dprc devices net/dpaa2: support recycle loopback port Nipun Gupta (4): bus/fslmc: update MC to 10.29 bus/fslmc: use dmb oshst for synchronization before I/O net/dpaa: check status before configuring shared MAC net/dpaa: enable checksum for shared MAC interface Rohit Raj (1): net/dpaa2: warn user in case of high nb desc Vanshika Shukla (2): net/dpaa2: fix unregistering interrupt handler net/dpaa2: fix timestamping for IEEE1588 doc/guides/nics/dpaa2.rst | 2 +- drivers/bus/dpaa/base/fman/fman_hw.c | 11 + drivers/bus/dpaa/include/fsl_fman.h | 2 + drivers/bus/dpaa/version.map | 1 + drivers/bus/fslmc/fslmc_bus.c | 15 +- drivers/bus/fslmc/fslmc_vfio.c| 18 +- drivers/bus/fslmc/mc/dprc.c | 129 drivers/bus/fslmc/mc/fsl_dpmng.h | 2 +- drivers/bus/fslmc/mc/fsl_dprc.h | 46 ++ drivers/bus/fslmc/mc/fsl_dprc_cmd.h | 48 ++ drivers/bus/fslmc/meson.build | 4 +- drivers/bus/fslmc/portal/dpaa2_hw_dprc.c | 100 +++ drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 15 +- drivers/bus/fslmc/qbman/include/compat.h | 4 +- drivers/bus/fslmc/rte_fslmc.h | 10 +- drivers/event/dpaa2/dpaa2_eventdev.c | 12 +- drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 23 + drivers/mempool/dpaa2/rte_dpaa2_mempool.h | 15 + drivers/mempool/dpaa2/version.map | 1 + drivers/net/dpaa/dpaa_ethdev.c| 17 +- drivers/net/dpaa2/base/dpaa2_hw_dpni.c| 5 +- drivers/net/dpaa2/dpaa2_ethdev.c | 117 +++- drivers/net/dpaa2/dpaa2_ethdev.h | 38 +- drivers/net/dpaa2/dpaa2_ptp.c | 8 +- drivers/net/dpaa2/dpaa2_recycle.c | 780 ++ drivers/net/dpaa2/dpaa2_rxtx.c| 181 - drivers/net/dpaa2/dpaa2_tm.c | 563 +--- drivers/net/dpaa2/dpaa2_tm.h | 17 +- drivers/net/dpaa2/mc/dpdmux.c | 8 + drivers/net/dpaa2/mc/dpkg.c | 7 +- drivers/net/dpaa2/mc/dpni.c | 417 drivers/net/dpaa2/mc/fsl_dpdmux.h | 3 + drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h | 5 +- drivers/net/dpaa2/mc/fsl_dpni.h | 173 +++-- drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 137 ++-- drivers/net/dpaa2/meson.build | 1 + drivers/net/dpaa2/version.map | 1 + drivers/net/enetc/enetc_ethdev.c | 25 +- drivers/net/pfe/pfe_ethdev.c | 3 +- drivers/net/pfe/pfe_hif.c | 4 +- 40 files changed, 2519 insertions(+), 449 deletions(-) create mode 100644 drivers/bus/fslmc/mc/dprc.c create mode 100644 drivers/bus/fslmc/mc/fsl_dprc.h create mode 100644 drivers/bus/fslmc/mc/fsl_dprc_cmd.h create mode 100644 drivers/bus/fslmc/portal/dpaa2_hw_dprc.c create mode 100644 drivers/net/dpaa2/dpaa2_recycle.c
RE: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics for batch alloc
> -Original Message-
> From: Ruifeng Wang
> Sent: Wednesday, January 12, 2022 11:01 AM
> To: Ferruh Yigit ; Ashwin Sekhar Thalakalath
> Kottilveetil ; dev@dpdk.org; Honnappa Nagarahalli
>
> Cc: Nithin Kumar Dabilpuram ;
> jer...@marvell.com; Sunil Kumar Kori ; Satha
> Koteswara Rao Kottidi ; Pavan Nikhilesh
> Bhagavatula ; Kiran Kumar Kokkilagadda
> ; Satheesh Paul ;
> Anoob Joseph ; Akhil Goyal ;
> nd
> Subject: RE: [EXT] Re: [PATCH] common/cnxk: use cas with release semantics
> for batch alloc
>
> > -Original Message-
> > From: Ferruh Yigit
> > Sent: Tuesday, January 11, 2022 9:46 PM
> > To: Ashwin Sekhar Thalakalath Kottilveetil ;
> > dev@dpdk.org; Honnappa Nagarahalli ;
> > Ruifeng Wang
> > Cc: Nithin Kumar Dabilpuram ;
> > jer...@marvell.com; Sunil Kumar Kori ; Satha
> > Koteswara Rao Kottidi ; Pavan Nikhilesh
> > Bhagavatula ; Kiran Kumar Kokkilagadda
> > ; Satheesh Paul ;
> > Anoob Joseph ; Akhil Goyal
> > Subject: Re: [EXT] Re: [PATCH] common/cnxk: use cas with release
> > semantics for batch alloc
> >
> > On 1/11/2022 12:26 PM, Ashwin Sekhar Thalakalath Kottilveetil wrote:
> > > CAS is compare and swap. CASL is compare and swap with release
> > semantics.
> > >
> >
> > What does 'release semantics' mean? What is functional difference in both?
>
> 'release semantics' is semantics in memory ordering for store operations.
> It ensures store-store ordering.
>
> And some comments below.
> >
> > > But on CNXK platform, the functionality of CAS* instructions is
> > > completely
> > different when it is done to specific addresses. These APIs are meant
> > for use for such special cases. These cannot be made ARM generic.
> > >
> > > Ashwin Sekhar T K
> > >
> > >> -Original Message-
> > >> From: Ferruh Yigit
> > >> Sent: Tuesday, January 11, 2022 5:42 PM
> > >> To: Ashwin Sekhar Thalakalath Kottilveetil ;
> > >> dev@dpdk.org; Honnappa Nagarahalli
> ;
> > >> Ruifeng Wang (Arm Technology China)
> > >> Cc: Nithin Kumar Dabilpuram ; Jerin Jacob
> > >> Kollanukkaran ; Sunil Kumar Kori
> > >> ; Satha Koteswara Rao Kottidi
> > >> ; Pavan Nikhilesh Bhagavatula
> > >> ; Kiran Kumar Kokkilagadda
> > >> ; Satheesh Paul
> ;
> > >> Anoob Joseph ; Akhil Goyal
>
> > >> Subject: [EXT] Re: [PATCH] common/cnxk: use cas with release
> > >> semantics for batch alloc
> > >>
> > >> External Email
> > >>
> > >> ---
> > >> --
> > >> - On 1/11/2022 12:08 PM, Ferruh Yigit wrote:
> > >>> On 11/30/2021 5:45 AM, Ashwin Sekhar T K wrote:
> > Before issuing the batch alloc, we clear the first word of cache
> > lines so that NPA can update the status. Make sure that this line
> > clear is flushed before the batch alloc is issued.
> >
> > Signed-off-by: Ashwin Sekhar T K
> > ---
> > drivers/common/cnxk/roc_io.h | 12
> > drivers/common/cnxk/roc_io_generic.h | 9 +
> > drivers/common/cnxk/roc_npa.h | 2 +-
> > 3 files changed, 22 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/common/cnxk/roc_io.h
> > b/drivers/common/cnxk/roc_io.h index fe5f7f46d0..4f15503c29
> > 100644
> > --- a/drivers/common/cnxk/roc_io.h
> > +++ b/drivers/common/cnxk/roc_io.h
> > @@ -78,6 +78,18 @@ roc_atomic64_cas(uint64_t compare, uint64_t
> > >> swap,
> > int64_t *ptr)
> > return compare;
> > }
> > +static __plt_always_inline uint64_t roc_atomic64_casl(uint64_t
> > +compare, uint64_t swap, int64_t *ptr) {
> > + asm volatile(PLT_CPU_FEATURE_PREAMBLE
> > + "casl %[compare], %[swap], [%[ptr]]\n"
> > + : [compare] "+r"(compare)
> > + : [swap] "r"(swap), [ptr] "r"(ptr)
> > + : "memory");
> > +
> > >>>
> > >>> out of curiosity, what is the "cas with release semantics"?
> > >>> briefly, what is the difference between 'cas' and 'casl'?
> > >>
> > >> + Honnappa & Ruifeng,
>
> Thanks Ferruh for adding me in this loop.
> > >>
> > >> Isn't this API Arm wide, instead of being cnxk specific?
> > >> Does it make sense to make this API for arm and cnxk use from there?
>
> Yes, CAS operation can be used Arm wide.
> Generally, CAS is available via __atomic_compare_exchange/_n() compiler
> built-ins. This is the way we use atomic in DPDK. So there is no need to add
> another generic API.
Just to make my comment more clear.
For generic CAS operations, compiler built-ins can be used. No more API needed.
Given the special usage of the instructions in CNXK, the inline assembly here
is not intended to be a wrapper of
generic CAS operation but rather an interface to other hardware function. It
doesn't make sense to make it Arm wide.
Thanks.
[PATCH 0/1] ci: restrict concurrency
dpdk is fairly expensive to build in GitHub. It's helpful to abandon old builds as soon as there's a new build waiting instead of wasting resources on the previous round. Josh Soref (1): ci: restrict concurrency .github/workflows/build.yml | 3 +++ 1 file changed, 3 insertions(+) -- 2.32.0 (Apple Git-132)
[PATCH 1/1] ci: restrict concurrency
Signed-off-by: Josh Soref
---
.github/workflows/build.yml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 6cf997d6..a171d430 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -12,6 +12,9 @@ defaults:
jobs:
build:
name: ${{ join(matrix.config.*, '-') }}
+concurrency:
+ group: build-${{ matrix.config.os }}-${{ matrix.config.compiler }}-${{
matrix.config.library }}-${{ matrix.config.cross }}-${{ matrix.config.mini
}}-${{ github.event.pull_request.number || github.ref }}
+ cancel-in-progress: true
runs-on: ${{ matrix.config.os }}
env:
AARCH64: ${{ matrix.config.cross == 'aarch64' }}
--
2.32.0 (Apple Git-132)
RE: [RFC v2] ethdev: introduce ethdev dump API
> From: Min Hu (Connor) [mailto:humi...@huawei.com]
> Sent: Wednesday, 12 January 2022 03.40
>
> Added the ethdev dump API which provides functions for query private
> info
> from device. There exists many private properties in different PMD
> drivers,
> such as adapter state, Rx/Tx func algorithm in hns3 PMD. The
> information of
> these properties is important for debug. As the information is private,
> the new API is introduced.
>
> Signed-off-by: Min Hu (Connor)
> ---
> v2:
> * fix dump API name
> * adjust description in doc.
> ---
> doc/guides/rel_notes/release_22_03.rst | 7 +++
> lib/ethdev/ethdev_driver.h | 17 +
> lib/ethdev/rte_ethdev.c| 15 +++
> lib/ethdev/rte_ethdev.h| 16
> 4 files changed, 55 insertions(+)
>
> diff --git a/doc/guides/rel_notes/release_22_03.rst
> b/doc/guides/rel_notes/release_22_03.rst
> index 6d99d1eaa9..4f97df942d 100644
> --- a/doc/guides/rel_notes/release_22_03.rst
> +++ b/doc/guides/rel_notes/release_22_03.rst
> @@ -55,6 +55,13 @@ New Features
> Also, make sure to start the actual text at the margin.
> ===
>
> +* **Added the private ethdev dump API, for query private info of
> ethdev.**
> +
> + Added the private ethdev dump API which provides functions for query
> + private info from device. There exists many private properties in
> + different PMD drivers. The information of these properties is
> important
> + for debug. As the information is private, the new API is introduced.
> +
>
> Removed Items
> -
> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> index d95605a355..e75ff3f15b 100644
> --- a/lib/ethdev/ethdev_driver.h
> +++ b/lib/ethdev/ethdev_driver.h
> @@ -990,6 +990,20 @@ typedef int (*eth_representor_info_get_t)(struct
> rte_eth_dev *dev,
> typedef int (*eth_rx_metadata_negotiate_t)(struct rte_eth_dev *dev,
> uint64_t *features);
>
> +/**
> + * @internal
> + * Get ethdev private info.
Suggestion: Dump ethdev private info to a file.
> + *
> + * @param file
> + * A pointer to a file for output.
> + * @param dev
> + * Port (ethdev) handle.
> + *
> + * @return
> + * Negative errno value on error, positive value on success.
> + */
> +typedef int (*eth_dev_priv_dump_t)(FILE *file, struct rte_eth_dev
> *dev);
> +
> /**
> * @internal A structure containing the functions exported by an
> Ethernet driver.
> */
> @@ -1186,6 +1200,9 @@ struct eth_dev_ops {
>* kinds of metadata to the PMD
>*/
> eth_rx_metadata_negotiate_t rx_metadata_negotiate;
> +
> + /** Dump ethdev private info */
> + eth_dev_priv_dump_t eth_dev_priv_dump;
> };
>
> /**
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index a1d475a292..9fc6d91d76 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -6472,6 +6472,21 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id,
> uint64_t *features)
> (*dev->dev_ops->rx_metadata_negotiate)(dev,
> features));
> }
>
> +int
> +rte_eth_dev_priv_dump(FILE *file, uint16_t port_id)
> +{
> + struct rte_eth_dev *dev;
> + int ret;
> +
> + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
> + dev = &rte_eth_devices[port_id];
> +
> + RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->eth_dev_priv_dump, -
> ENOTSUP);
> + ret = (*dev->dev_ops->eth_dev_priv_dump)(file, dev);
> +
> + return ret;
> +}
> +
> RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
>
> RTE_INIT(ethdev_init_telemetry)
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index fa299c8ad7..8e33e6927f 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -5888,6 +5888,22 @@ rte_eth_tx_buffer(uint16_t port_id, uint16_t
> queue_id,
> return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
> }
>
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change, or be removed, without prior
> notice
> + *
> + * Get ethdev private info.
Suggestion: Dump ethdev private info to a file.
> + *
> + * @param file
> + * A pointer to a file for output.
> + * @param port_id
> + * The port identifier of the Ethernet device.
> + * @return
> + * Negative errno value on error, positive value on success.
> + */
> +__rte_experimental
> +int rte_eth_dev_priv_dump(FILE *file, uint16_t port_id);
> +
> #ifdef __cplusplus
> }
> #endif
> --
> 2.33.0
>
You should probably also add rte_eth_dev_priv_dump to the EXPERIMENTAL section
of the version.map file.
Acked-by: Morten Brørup
[PATCH v2 1/1] net/tap: add a check that Rx/Tx have the same num of queues
Users can create the desired number of RxQ and TxQ in DPDK. For
example, if the number of RxQ = 2 and the number of TxQ = 5,
a total of 8 file descriptors will be created for a tap device,
including RxQ, TxQ, and one for keepalive. The RxQ and TxQ
with the same ID are paired by dup(2).
In this scenario, Kernel will have 3 RxQ where packets are
incoming but not read. The reason for this is that there are only
2 RxQ that are polled by DPDK, while there are 5 queues in Kernel.
This patch add a checking if DPDK has appropriate numbers of
queues to avoid unexpected packet drop.
Signed-off-by: Nobuhiro MIKI
---
v2: fix commit message
I had first discussed this issue in OVS [1], but changed my mind
that a fix in DPDK would be more appropriate.
[1]: https://mail.openvswitch.org/pipermail/ovs-dev/2021-November/389690.html
---
drivers/net/tap/rte_eth_tap.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/net/tap/rte_eth_tap.c b/drivers/net/tap/rte_eth_tap.c
index 5bb472f1a6..02eb311e09 100644
--- a/drivers/net/tap/rte_eth_tap.c
+++ b/drivers/net/tap/rte_eth_tap.c
@@ -940,6 +940,14 @@ tap_dev_configure(struct rte_eth_dev *dev)
RTE_PMD_TAP_MAX_QUEUES);
return -1;
}
+ if (dev->data->nb_rx_queues != dev->data->nb_tx_queues) {
+ TAP_LOG(ERR,
+ "%s: number of rx queues %d must be equal to number of
tx queues %d",
+ dev->device->name,
+ dev->data->nb_rx_queues,
+ dev->data->nb_tx_queues);
+ return -1;
+ }
TAP_LOG(INFO, "%s: %s: TX configured queues number: %u",
dev->device->name, pmd->name, dev->data->nb_tx_queues);
--
2.24.4
[PATCH 0/1] Spelling code fixes*
This is a followup to https://github.com/DPDK/dpdk/commit/7be78d027918dbc846e502780faf94d5acdf5f75 The engine that identifies items runs here: https://github.com/jsoref/dpdk/actions/workflows/spelling.yml I generally use Google Sheets to select automatic corrections for words. I'll sometimes make additional fixes beyond what Google Sheets suggests. Unfortunately, this means that while I may have sent one series of fixes, there can easily be more, especially if I spend a bit more time reviewing the word list. The current list of words I am not correcting is here: https://raw.githubusercontent.com/jsoref/dpdk/spell-check-with-spelling/.github/actions/spelling/expect.txt Note that this isn't a complete list of misspelled words. As this repository is written in C++, I'm experimenting with using a c++ orientated dictionary. Unfortunately, I know it includes quite a few misspelled words of its own, which means those words if present in this repository will be handled as false-negatives and not reported. fixed spellings: * accelerator * acceptable * account * accounting * acknowledge * acknowledgement * across * action * actually * adapter * adaptive * added * addition * address * addresses * adds * adjustment * affinity * aggregate * aggregator * alignment * allocate * allocated * allocates * allocation * already * annotation * approx * arithmetic * array * arrays * arrive * asserted * assigned * at most * attributes * authentic * autogreen * between * bitstream * boundaries * build * burst * byte * bytes * cached * calculate * cannot * capabilities * capability * celsius * certificates * chained * chunk * cipher * cleanness * coalescing * command * commit * communicated * compiler * configuration * connecting * consequence * contains * contexts * continuously * convenience * conversion * counters * create * crypto * detach * discrimination * empty * endian * erroneous * expansion * explicit * feature * fiber * fields * fragment * free * generator * groupid * grpmask * interim * interrupt * intrinsics * lapsed * nonexistent * octeontx * offload * offset * overhead * partner * pending * per port * platform * policies * polynomials * populate * portctl * prefetch * properties * qgroup * registers * replace * resettable * resolution * retransmission * retrieving * revision * session * shaping * ticks * traditional * traditionally * traffic * translation * unexpectedly * unsupported * vectors * verify * virtchnl * warnings * written * xstats Josh Soref (1): fix spelling in code app/test-crypto-perf/cperf_test_vectors.h | 4 +- app/test/test_acl.c | 6 +- app/test/test_link_bonding.c | 4 +- app/test/test_link_bonding_mode4.c| 30 app/test/test_table.h | 2 +- doc/guides/nics/octeontx2.rst | 2 +- drivers/bus/dpaa/base/fman/netcfg_layer.c | 4 +- drivers/bus/fslmc/fslmc_vfio.h| 2 +- drivers/common/cnxk/roc_cpt.c | 10 +-- drivers/common/cnxk/roc_cpt_priv.h| 2 +- drivers/common/cnxk/roc_mbox.h| 4 +- drivers/common/cnxk/roc_tim.c | 2 +- drivers/common/dpaax/caamflib/desc/ipsec.h| 4 +- .../common/dpaax/caamflib/rta/operation_cmd.h | 6 +- drivers/common/mlx5/mlx5_devx_cmds.c | 24 +++--- drivers/common/mlx5/mlx5_devx_cmds.h | 10 +-- drivers/common/mlx5/mlx5_prm.h| 4 +- drivers/common/octeontx2/otx2_mbox.h | 4 +- .../sfc_efx/base/ef10_signed_image_layout.h | 2 +- drivers/common/sfc_efx/base/efx_port.c| 2 +- drivers/common/sfc_efx/base/efx_regs.h| 2 +- drivers/common/sfc_efx/base/efx_types.h | 2 +- drivers/compress/octeontx/otx_zip.h | 2 +- drivers/compress/qat/dev/qat_comp_pmd_gen1.c | 4 +- drivers/compress/qat/qat_comp.c | 12 +-- drivers/compress/qat/qat_comp_pmd.c | 6 +- drivers/compress/qat/qat_comp_pmd.h | 2 +- drivers/crypto/caam_jr/caam_jr.c | 4 +- drivers/crypto/ccp/ccp_crypto.h | 2 +- drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 4 +- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 30 drivers/crypto/dpaa_sec/dpaa_sec.c| 2 +- drivers/crypto/qat/qat_sym_session.h | 4 - drivers/crypto/virtio/virtio_cryptodev.c | 6 +- drivers/crypto/virtio/virtqueue.c | 2 +- drivers/crypto/virtio/virtqueue.h | 2 +- drivers/dma/ioat/ioat_dmadev.c| 2 +- drivers/dma/ioat/ioat_hw_defs.h | 2 +- drivers/event/octeontx2/otx2_tim_evdev.c | 4 +- drivers/net/ark/ark_ethdev.c | 4 +- drivers/net/ark/ark_rqp.c | 4 +- drivers/net/ark/ark_rqp.h | 4 +- drivers/net/bnx2x/bnx2x.c | 18 ++--- drivers/net/bnx2x/bnx2x.h | 6 +- drivers/net/bnx2x/bnx2x_stats.
[PATCH] net/af_xdp: re-enable secondary process support
Secondary process support had been disabled for the AF_XDP PMD
because there was no logic in place to share the AF_XDP socket
file descriptors between the processes. This commit introduces
this logic using the IPC APIs.
Since AF_XDP rings are single-producer single-consumer, rx/tx
in the secondary process is disabled. However other operations
including retrieval of stats are permitted.
Signed-off-by: Ciara Loftus
---
RFC -> v1:
* Added newline to af_xdp.rst
* Fixed spelling errors
* Fixed potential NULL dereference in init_internals
* Fixed potential free of address-of expression in afxdp_mp_request_fds
---
doc/guides/nics/af_xdp.rst | 11 +-
doc/guides/nics/features/af_xdp.ini| 1 +
doc/guides/rel_notes/release_22_03.rst | 4 +
drivers/net/af_xdp/rte_eth_af_xdp.c| 210 +++--
4 files changed, 211 insertions(+), 15 deletions(-)
diff --git a/doc/guides/nics/af_xdp.rst b/doc/guides/nics/af_xdp.rst
index c9d0e1ad6c..9e3feee8d1 100644
--- a/doc/guides/nics/af_xdp.rst
+++ b/doc/guides/nics/af_xdp.rst
@@ -143,4 +143,13 @@ Limitations
NAPI context from a watchdog timer instead of from softirqs. More information
on this feature can be found at [1].
- [1] https://lwn.net/Articles/837010/
\ No newline at end of file
+- **Secondary Processes**
+
+ Rx and Tx are not supported for secondary processes due to the
single-producer
+ single-consumer nature of the AF_XDP rings. However other operations
including
+ statistics retrieval are permitted.
+ The maximum number of queues permitted for PMDs operating in this model is 8
+ as this is the maximum number of fds that can be sent through the IPC APIs as
+ defined by RTE_MP_MAX_FD_NUM.
+
+ [1] https://lwn.net/Articles/837010/
diff --git a/doc/guides/nics/features/af_xdp.ini
b/doc/guides/nics/features/af_xdp.ini
index 54b738e616..8e7e075aaf 100644
--- a/doc/guides/nics/features/af_xdp.ini
+++ b/doc/guides/nics/features/af_xdp.ini
@@ -9,4 +9,5 @@ Power mgmt address monitor = Y
MTU update = Y
Promiscuous mode = Y
Stats per queue = Y
+Multiprocess aware = Y
x86-64 = Y
diff --git a/doc/guides/rel_notes/release_22_03.rst
b/doc/guides/rel_notes/release_22_03.rst
index 6d99d1eaa9..ec719e9738 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -55,6 +55,10 @@ New Features
Also, make sure to start the actual text at the margin.
===
+* **Updated AF_XDP PMD.**
+
+ * Re-enabled secondary process support. RX/TX is not supported.
+
Removed Items
-
diff --git a/drivers/net/af_xdp/rte_eth_af_xdp.c
b/drivers/net/af_xdp/rte_eth_af_xdp.c
index 96c2c9d939..1c8c52ddb6 100644
--- a/drivers/net/af_xdp/rte_eth_af_xdp.c
+++ b/drivers/net/af_xdp/rte_eth_af_xdp.c
@@ -81,6 +81,18 @@ RTE_LOG_REGISTER_DEFAULT(af_xdp_logtype, NOTICE);
#define ETH_AF_XDP_ETH_OVERHEAD(RTE_ETHER_HDR_LEN +
RTE_ETHER_CRC_LEN)
+#define ETH_AF_XDP_MP_KEY "afxdp_mp_send_fds"
+
+static int afxdp_dev_count;
+
+/* Message header to synchronize fds via IPC */
+struct ipc_hdr {
+ char port_name[RTE_DEV_NAME_MAX_LEN];
+ /* The file descriptors are in the dedicated part
+* of the Unix message to be translated by the kernel.
+*/
+};
+
struct xsk_umem_info {
struct xsk_umem *umem;
struct rte_ring *buf_ring;
@@ -148,6 +160,10 @@ struct pmd_internals {
struct pkt_tx_queue *tx_queues;
};
+struct pmd_process_private {
+ int rxq_xsk_fds[RTE_MAX_QUEUES_PER_PORT];
+};
+
#define ETH_AF_XDP_IFACE_ARG "iface"
#define ETH_AF_XDP_START_QUEUE_ARG "start_queue"
#define ETH_AF_XDP_QUEUE_COUNT_ARG "queue_count"
@@ -857,11 +873,12 @@ static int
eth_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
{
struct pmd_internals *internals = dev->data->dev_private;
+ struct pmd_process_private *process_private = dev->process_private;
struct xdp_statistics xdp_stats;
struct pkt_rx_queue *rxq;
struct pkt_tx_queue *txq;
socklen_t optlen;
- int i, ret;
+ int i, ret, fd;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
optlen = sizeof(struct xdp_statistics);
@@ -877,8 +894,9 @@ eth_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats
*stats)
stats->ibytes += stats->q_ibytes[i];
stats->imissed += rxq->stats.rx_dropped;
stats->oerrors += txq->stats.tx_dropped;
- ret = getsockopt(xsk_socket__fd(rxq->xsk), SOL_XDP,
- XDP_STATISTICS, &xdp_stats, &optlen);
+ fd = process_private->rxq_xsk_fds[i];
+ ret = fd >= 0 ? getsockopt(fd, SOL_XDP, XDP_STATISTICS,
+ &xdp_stats, &optlen) : -1;
if (ret != 0) {
AF_XDP_LOG(ERR, "
