[PATCH] build: add missing arch define for Arm

[Ruifeng Wang]

As per design document, RTE_ARCH is the name of the architecture.
However, the definition was missing on Arm with meson build.
It impacts applications that refers to this string.

Added for Arm builds.

Fixes: b1d48c41189a ("build: support ARM with meson")
Cc: sta...@dpdk.org

Signed-off-by: Ruifeng Wang 
---
 config/arm/meson.build | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 213324d262..3e1d7836df 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -49,6 +49,7 @@ implementer_generic = {
 ['RTE_ARCH_ARM_NEON_MEMCPY', false],
 ['RTE_ARCH_STRICT_ALIGN', true],
 ['RTE_ARCH_ARMv8_AARCH32', true],
+['RTE_ARCH', 'arm64_aarch32'],
 ['RTE_CACHE_LINE_SIZE', 64]
 ]
 }
@@ -432,11 +433,13 @@ if dpdk_conf.get('RTE_ARCH_32')
 else
 # armv7 build
 dpdk_conf.set('RTE_ARCH_ARMv7', true)
+dpdk_conf.set('RTE_ARCH', 'armv7')
 # the minimum architecture supported, armv7-a, needs the following,
 machine_args += '-mfpu=neon'
 endif
 else
 # armv8 build
+dpdk_conf.set('RTE_ARCH', 'arm64')
 update_flags = true
 soc_config = {}
 if not meson.is_cross_build()
-- 
2.25.1

[PATCH v3 00/29] New features and improvements in cnxk crypto PMD

[Anoob Joseph]

New features and fixes to cnxk crypto PMDs
- Support for more algorithms in lookaside crypto & protocol
- Support for copy & set DF bit
- Support for CPT CTX update
- Support for security session stats in cn10k

Changes in v3
- Fixed build error from CI

Changes in v2
- Support for copy & set DSCP
- Support for per packet IV in cn9k
- Support for cn10k v1.19 microcode

Ankur Dwivedi (1):
  crypto/cnxk: add security session stats get

Anoob Joseph (20):
  common/cnxk: define minor opcodes for MISC opcode
  common/cnxk: add aes-xcbc key derive
  common/cnxk: fix reset of fields
  common/cnxk: verify input args
  common/cnxk: update completion code
  crypto/cnxk: clear session data before populating
  crypto/cnxk: update max sec crypto caps
  crypto/cnxk: account for CPT CTX updates and flush delays
  crypto/cnxk: use struct sizes for ctx writes
  crypto/cnxk: add skip for unsupported cases
  crypto/cnxk: handle null chained ops
  crypto/cnxk: fix inflight cnt calculation
  crypto/cnxk: use atomics to access CPT res
  crypto/cnxk: add more info on command timeout
  crypto/cnxk: fix extend tail calculation
  crypto/cnxk: add aes xcbc and null cipher
  crypto/cnxk: add copy and set DF
  crypto/cnxk: add aes cmac
  crypto/cnxk: enable copy dscp
  crypto/cnxk: update microcode completion handling

Archana Muniganti (2):
  common/cnxk: add bit fields for params
  crypto/cnxk: add per pkt IV in lookaside IPsec debug mode

Shijith Thotton (1):
  crypto/cnxk: only enable queues that are allocated

Tejasree Kondoj (5):
  crypto/cnxk: add lookaside IPsec AES-CBC-HMAC-SHA256 support
  crypto/cnxk: write CPT CTX through microcode op
  crypto/cnxk: support cnxk lookaside IPsec HMAC-SHA384/512
  crypto/cnxk: add context reload for IV
  crypto/cnxk: support lookaside IPsec AES-CTR

 doc/guides/cryptodevs/cnxk.rst|  50 -
 doc/guides/cryptodevs/features/cn10k.ini  |  37 ++--
 doc/guides/cryptodevs/features/cn9k.ini   |  37 ++--
 doc/guides/rel_notes/release_22_03.rst|  10 +
 drivers/common/cnxk/cnxk_security.c   |  92 ++--
 drivers/common/cnxk/hw/cpt.h  |  15 ++
 drivers/common/cnxk/meson.build   |   1 +
 drivers/common/cnxk/roc_aes.c | 208 ++
 drivers/common/cnxk/roc_aes.h |  14 ++
 drivers/common/cnxk/roc_api.h |   3 +
 drivers/common/cnxk/roc_cpt.c |   4 +-
 drivers/common/cnxk/roc_cpt.h |  24 +-
 drivers/common/cnxk/roc_ie_on.h   |  47 +++-
 drivers/common/cnxk/roc_ie_ot.h   |   4 +-
 drivers/common/cnxk/roc_se.h  |  14 +-
 drivers/common/cnxk/version.map   |   1 +
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  91 
 drivers/crypto/cnxk/cn10k_ipsec.c | 232 
 drivers/crypto/cnxk/cn10k_ipsec.h |  26 ++-
 drivers/crypto/cnxk/cn10k_ipsec_la_ops.h  |  28 ++-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  29 ++-
 drivers/crypto/cnxk/cn9k_ipsec.c  | 253 +-
 drivers/crypto/cnxk/cn9k_ipsec.h  |   2 +
 drivers/crypto/cnxk/cn9k_ipsec_la_ops.h   |  20 +-
 drivers/crypto/cnxk/cnxk_cryptodev.h  |   2 +-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 158 +-
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 245 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  17 +-
 drivers/crypto/cnxk/cnxk_cryptodev_sec.c  |   1 +
 drivers/crypto/cnxk/cnxk_ipsec.h  |  19 +-
 drivers/crypto/cnxk/cnxk_se.h |  66 --
 31 files changed, 1348 insertions(+), 402 deletions(-)
 create mode 100644 drivers/common/cnxk/roc_aes.c
 create mode 100644 drivers/common/cnxk/roc_aes.h

-- 
2.7.4

[PATCH v3 01/29] common/cnxk: define minor opcodes for MISC opcode

[Anoob Joseph]

MISC CPT instruction behaves differently based on minor opcode.
Define the missing minor opcodes for MISC major opcode.

Signed-off-by: Aakash Sasidharan 
Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/roc_se.h | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h
index 5be832f..253575a 100644
--- a/drivers/common/cnxk/roc_se.h
+++ b/drivers/common/cnxk/roc_se.h
@@ -15,7 +15,11 @@
 #define ROC_SE_MAJOR_OP_HMAC  0x35
 #define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
 #define ROC_SE_MAJOR_OP_KASUMI0x38
-#define ROC_SE_MAJOR_OP_MISC  0x01
+
+#define ROC_SE_MAJOR_OP_MISC0x01
+#define ROC_SE_MISC_MINOR_OP_PASSTHROUGH 0x03
+#define ROC_SE_MISC_MINOR_OP_DUMMY  0x04
+#define ROC_SE_MISC_MINOR_OP_HW_SUPPORT 0x08
 
 #define ROC_SE_MAX_AAD_SIZE 64
 #define ROC_SE_MAX_MAC_LEN  64
-- 
2.7.4

[PATCH v3 02/29] common/cnxk: add aes-xcbc key derive

[Anoob Joseph]

Add support for AES-XCBC key derivation.


Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/meson.build |   1 +
 drivers/common/cnxk/roc_aes.c   | 208 
 drivers/common/cnxk/roc_aes.h   |  14 +++
 drivers/common/cnxk/roc_api.h   |   3 +
 drivers/common/cnxk/roc_cpt.h   |  24 ++---
 drivers/common/cnxk/version.map |   1 +
 6 files changed, 239 insertions(+), 12 deletions(-)
 create mode 100644 drivers/common/cnxk/roc_aes.c
 create mode 100644 drivers/common/cnxk/roc_aes.h

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 4928f7e..4995cfd 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -12,6 +12,7 @@ config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
 deps = ['eal', 'pci', 'bus_pci', 'mbuf', 'security']
 sources = files(
 'roc_ae.c',
+'roc_aes.c',
 'roc_ae_fpm_tables.c',
 'roc_bphy.c',
 'roc_bphy_cgx.c',
diff --git a/drivers/common/cnxk/roc_aes.c b/drivers/common/cnxk/roc_aes.c
new file mode 100644
index 000..f821c8b
--- /dev/null
+++ b/drivers/common/cnxk/roc_aes.c
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+
+#define KEY_WORD_LEN(ROC_CPT_AES_XCBC_KEY_LENGTH / sizeof(uint32_t))
+#define KEY_ROUNDS  10 /* (Nr+1)*Nb */
+#define KEY_SCHEDULE_LEN ((KEY_ROUNDS + 1) * 4) /* (Nr+1)*Nb words */
+
+/*
+ * AES 128 implementation based on NIST FIPS 197 suitable for LittleEndian
+ * https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.197.pdf
+ */
+
+/* Sbox from NIST FIPS 197 */
+static uint8_t Sbox[] = {
+   0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b,
+   0xfe, 0xd7, 0xab, 0x76, 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
+   0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 0xb7, 0xfd, 0x93, 0x26,
+   0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+   0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2,
+   0xeb, 0x27, 0xb2, 0x75, 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
+   0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 0x53, 0xd1, 0x00, 0xed,
+   0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+   0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f,
+   0x50, 0x3c, 0x9f, 0xa8, 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
+   0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 0xcd, 0x0c, 0x13, 0xec,
+   0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+   0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14,
+   0xde, 0x5e, 0x0b, 0xdb, 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
+   0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 0xe7, 0xc8, 0x37, 0x6d,
+   0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+   0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f,
+   0x4b, 0xbd, 0x8b, 0x8a, 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
+   0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 0xe1, 0xf8, 0x98, 0x11,
+   0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+   0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f,
+   0xb0, 0x54, 0xbb, 0x16,
+};
+
+/* Substitute a byte with Sbox[byte]. Do it for a word for 4 bytes */
+static uint32_t
+sub_word(uint32_t word)
+{
+   word = (Sbox[(word >> 24) & 0xFF] << 24) |
+  (Sbox[(word >> 16) & 0xFF] << 16) |
+  (Sbox[(word >> 8) & 0xFF] << 8) | Sbox[word & 0xFF];
+   return word;
+}
+
+/* Rotate a word by one byte */
+static uint32_t
+rot_word(uint32_t word)
+{
+   return ((word >> 8) & 0xFF) | (word << 24);
+}
+
+/*
+ * Multiply with power of 2 and polynomial reduce the result using AES
+ * polynomial
+ */
+static uint8_t
+Xtime(uint8_t byte, uint8_t pow)
+{
+   uint32_t w = byte;
+
+   while (pow) {
+   w = w << 1;
+   if (w >> 8)
+   w ^= 0x11b;
+   pow--;
+   }
+
+   return (uint8_t)w;
+}
+
+/*
+ * Multiply a byte with another number such that the result is polynomial
+ * reduced in the GF8 space
+ */
+static uint8_t
+GF8mul(uint8_t byte, uint32_t mp)
+{
+   uint8_t pow, mul = 0;
+
+   while (mp) {
+   pow = ffs(mp) - 1;
+   mul ^= Xtime(byte, pow);
+   mp ^= (1 << pow);
+   }
+   return mul;
+}
+
+static void
+aes_key_expand(const uint8_t *key, uint32_t *ks)
+{
+   unsigned int i = 4;
+   uint32_t temp;
+
+   /* Skip key in ks */
+   memcpy(ks, key, KEY_WORD_LEN * sizeof(uint32_t));
+
+   while (i < KEY_SCHEDULE_LEN) {
+   temp = ks[i - 1];
+   if ((i & 0x3) == 0) {
+   temp = rot_word(temp);
+   temp = sub_word(temp);
+

[PATCH v3 03/29] common/cnxk: add bit fields for params

[Anoob Joseph]

From: Archana Muniganti 

Added new structure with bit fields for params.


Signed-off-by: Archana Muniganti 
---
 drivers/common/cnxk/roc_ie_on.h  | 30 +-
 drivers/crypto/cnxk/cn9k_ipsec.c | 16 +---
 2 files changed, 42 insertions(+), 4 deletions(-)

diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index 53591c6..817ef33 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -21,7 +21,6 @@ enum roc_ie_on_ucc_ipsec {
 };
 
 /* Helper macros */
-#define ROC_IE_ON_PER_PKT_IV   BIT(11)
 #define ROC_IE_ON_INB_RPTR_HDR 0x8
 
 enum {
@@ -102,6 +101,35 @@ struct roc_ie_on_ip_template {
};
 };
 
+union roc_on_ipsec_outb_param1 {
+   uint16_t u16;
+   struct {
+   uint16_t frag_num : 4;
+   uint16_t rsvd_4_6 : 3;
+   uint16_t gre_select : 1;
+   uint16_t dsiv : 1;
+   uint16_t ikev2 : 1;
+   uint16_t min_frag_size : 1;
+   uint16_t per_pkt_iv : 1;
+   uint16_t tfc_pad_enable : 1;
+   uint16_t tfc_dummy_pkt : 1;
+   uint16_t rfc_or_override_mode : 1;
+   uint16_t custom_hdr_or_p99 : 1;
+   } s;
+};
+
+union roc_on_ipsec_inb_param2 {
+   uint16_t u16;
+   struct {
+   uint16_t rsvd_0_10 : 11;
+   uint16_t gre_select : 1;
+   uint16_t ikev2 : 1;
+   uint16_t udp_cksum : 1;
+   uint16_t ctx_addr_sel : 1;
+   uint16_t custom_hdr_or_p99 : 1;
+   } s;
+};
+
 struct roc_ie_on_sa_ctl {
uint64_t spi : 32;
uint64_t exp_proto_inter_frag : 8;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index a81130b..6455ef9 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -280,6 +280,7 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
struct rte_crypto_sym_xform *auth_xform = crypto_xform->next;
struct roc_ie_on_ip_template *template = NULL;
struct roc_cpt *roc_cpt = qp->lf.roc_cpt;
+   union roc_on_ipsec_outb_param1 param1;
struct cnxk_cpt_inst_tmpl *inst_tmpl;
struct roc_ie_on_outb_sa *out_sa;
struct cn9k_sec_session *sess;
@@ -407,8 +408,12 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
w4.u64 = 0;
w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC;
w4.s.opcode_minor = ctx_len >> 3;
-   w4.s.param1 = BIT(9);
-   w4.s.param1 |= ROC_IE_ON_PER_PKT_IV;
+
+   param1.u16 = 0;
+   param1.s.ikev2 = 1;
+   param1.s.per_pkt_iv = 1;
+   w4.s.param1 = param1.u16;
+
inst_tmpl->w4 = w4.u64;
 
w7.u64 = 0;
@@ -428,6 +433,7 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 {
struct rte_crypto_sym_xform *auth_xform = crypto_xform;
struct roc_cpt *roc_cpt = qp->lf.roc_cpt;
+   union roc_on_ipsec_inb_param2 param2;
struct cnxk_cpt_inst_tmpl *inst_tmpl;
struct roc_ie_on_inb_sa *in_sa;
struct cn9k_sec_session *sess;
@@ -478,7 +484,11 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
w4.u64 = 0;
w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC;
w4.s.opcode_minor = ctx_len >> 3;
-   w4.s.param2 = BIT(12);
+
+   param2.u16 = 0;
+   param2.s.ikev2 = 1;
+   w4.s.param2 = param2.u16;
+
inst_tmpl->w4 = w4.u64;
 
w7.u64 = 0;
-- 
2.7.4

[PATCH v3 04/29] common/cnxk: fix reset of fields

[Anoob Joseph]

Copy DF/DSCP fields would get set based on ipsec_xform in the code
preceding this. Setting it again would cause the options to be reset.

Fixes: 78d03027f2cc ("common/cnxk: add IPsec common code")
Cc: scha...@marvell.com

Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/cnxk_security.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/common/cnxk/cnxk_security.c 
b/drivers/common/cnxk/cnxk_security.c
index 30562b4..787138b 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -444,10 +444,6 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,
return -EINVAL;
}
 
-   /* Default options of DSCP and Flow label/DF */
-   sa->w2.s.dscp_src = ROC_IE_OT_SA_COPY_FROM_SA;
-   sa->w2.s.ipv4_df_src_or_ipv6_flw_lbl_src = ROC_IE_OT_SA_COPY_FROM_SA;
-
 skip_tunnel_info:
/* ESN */
sa->w0.s.esn_en = !!ipsec_xfrm->options.esn;
-- 
2.7.4

[PATCH v3 05/29] common/cnxk: verify input args

[Anoob Joseph]

Add input arg verification.

Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/hw/cpt.h  | 2 ++
 drivers/common/cnxk/roc_cpt.c | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 919f842..ccc7af4 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -64,6 +64,7 @@ union cpt_lf_ctx_flush {
struct {
uint64_t cptr : 46;
uint64_t inval : 1;
+   uint64_t reserved_47_63 : 17;
} s;
 };
 
@@ -71,6 +72,7 @@ union cpt_lf_ctx_reload {
uint64_t u;
struct {
uint64_t cptr : 46;
+   uint64_t reserved_46_63 : 18;
} s;
 };
 
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 8f8e6d3..1bc7a29 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -681,8 +681,10 @@ roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, void *cptr, 
bool inval)
 {
union cpt_lf_ctx_flush reg;
 
-   if (lf == NULL)
+   if (lf == NULL) {
+   plt_err("Could not trigger CTX flush");
return -ENOTSUP;
+   }
 
reg.u = 0;
reg.s.inval = inval;
-- 
2.7.4

[PATCH v3 06/29] common/cnxk: update completion code

[Anoob Joseph]

Update completion code to match v1.19 microcode release.

Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/roc_ie_ot.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 5b61902..923656f 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -43,8 +43,8 @@ enum roc_ie_ot_ucc_ipsec {
ROC_IE_OT_UCC_ERR_SA_ESP_BAD_KEYS = 0xc5,
ROC_IE_OT_UCC_ERR_SA_AH_BAD_KEYS = 0xc6,
ROC_IE_OT_UCC_ERR_SA_BAD_IP = 0xc7,
-   ROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0xc8,
-   ROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0xc9,
+   ROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0xc8,
+   ROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0xc9,
ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST = 0xf0,
ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0xf1,
ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN = 0xf2,
-- 
2.7.4

[PATCH v3 07/29] crypto/cnxk: only enable queues that are allocated

[Anoob Joseph]

From: Shijith Thotton 

Only enable/disable queue pairs that are allocated during cryptodev
start/stop.

Fixes: 6a95dbc1a291 ("crypto/cnxk: add dev start and dev stop")

Signed-off-by: Shijith Thotton 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index a2281fb..21ee09f 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -100,8 +100,13 @@ cnxk_cpt_dev_start(struct rte_cryptodev *dev)
uint16_t nb_lf = roc_cpt->nb_lf;
uint16_t qp_id;
 
-   for (qp_id = 0; qp_id < nb_lf; qp_id++)
+   for (qp_id = 0; qp_id < nb_lf; qp_id++) {
+   /* Application may not setup all queue pair */
+   if (roc_cpt->lf[qp_id] == NULL)
+   continue;
+
roc_cpt_iq_enable(roc_cpt->lf[qp_id]);
+   }
 
return 0;
 }
@@ -114,8 +119,12 @@ cnxk_cpt_dev_stop(struct rte_cryptodev *dev)
uint16_t nb_lf = roc_cpt->nb_lf;
uint16_t qp_id;
 
-   for (qp_id = 0; qp_id < nb_lf; qp_id++)
+   for (qp_id = 0; qp_id < nb_lf; qp_id++) {
+   if (roc_cpt->lf[qp_id] == NULL)
+   continue;
+
roc_cpt_iq_disable(roc_cpt->lf[qp_id]);
+   }
 }
 
 int
-- 
2.7.4

[PATCH v3 08/29] crypto/cnxk: add lookaside IPsec AES-CBC-HMAC-SHA256 support

[Anoob Joseph]

From: Tejasree Kondoj 

Adding AES-CBC-HMAC-SHA256 support to lookaside IPsec PMD.

Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/cnxk.rst| 39 +++
 doc/guides/rel_notes/release_22_03.rst|  4 +++
 drivers/common/cnxk/cnxk_security.c   | 14 
 drivers/crypto/cnxk/cn10k_ipsec.c |  3 ++
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 20 
 drivers/crypto/cnxk/cnxk_ipsec.h  |  3 +-
 6 files changed, 75 insertions(+), 8 deletions(-)

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 23cc823..8c4c4ea 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -246,14 +246,27 @@ CN9XX Features supported
 * IPv4
 * IPv6
 * ESP
+* ESN
+* Anti-replay
 * Tunnel mode
 * Transport mode(IPv4)
 * UDP Encapsulation
+
+AEAD algorithms

+
 * AES-128/192/256-GCM
-* AES-128/192/256-CBC-SHA1-HMAC
-* AES-128/192/256-CBC-SHA256-128-HMAC
-* ESN
-* Anti-replay
+
+Cipher algorithms
++
+
+* AES-128/192/256-CBC
+
+Auth algorithms

+
+* SHA1-HMAC
+* SHA256-128-HMAC
 
 CN10XX Features supported
 ~
@@ -263,6 +276,20 @@ CN10XX Features supported
 * Tunnel mode
 * Transport mode
 * UDP Encapsulation
+
+AEAD algorithms

+
 * AES-128/192/256-GCM
-* AES-128/192/256-CBC-NULL
-* AES-128/192/256-CBC-SHA1-HMAC
+
+Cipher algorithms
++
+
+* AES-128/192/256-CBC
+
+Auth algorithms

+
+* NULL
+* SHA1-HMAC
+* SHA256-128-HMAC
diff --git a/doc/guides/rel_notes/release_22_03.rst 
b/doc/guides/rel_notes/release_22_03.rst
index 6d99d1e..1639b0e 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -55,6 +55,10 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Updated Marvell cnxk crypto PMD.**
+
+  * Added SHA256-HMAC support in lookaside protocol (IPsec) for CN10K.
+
 
 Removed Items
 -
diff --git a/drivers/common/cnxk/cnxk_security.c 
b/drivers/common/cnxk/cnxk_security.c
index 787138b..f39bc1e 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -32,6 +32,10 @@ ipsec_hmac_opad_ipad_gen(struct rte_crypto_sym_xform 
*auth_xform,
roc_hash_sha1_gen(opad, (uint32_t *)&hmac_opad_ipad[0]);
roc_hash_sha1_gen(ipad, (uint32_t *)&hmac_opad_ipad[24]);
break;
+   case RTE_CRYPTO_AUTH_SHA256_HMAC:
+   roc_hash_sha256_gen(opad, (uint32_t *)&hmac_opad_ipad[0]);
+   roc_hash_sha256_gen(ipad, (uint32_t *)&hmac_opad_ipad[64]);
+   break;
default:
break;
}
@@ -129,6 +133,16 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
 i++)
tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
break;
+   case RTE_CRYPTO_AUTH_SHA256_HMAC:
+   w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_256;
+   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
+
+   tmp_key = (uint64_t *)hmac_opad_ipad;
+   for (i = 0; i < (int)(ROC_CTX_MAX_OPAD_IPAD_LEN /
+ sizeof(uint64_t));
+i++)
+   tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
+   break;
default:
return -ENOTSUP;
}
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index 27df1dc..93eab1b 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -65,6 +65,9 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt,
if (crypto_xfrm->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
sa->iv_offset = crypto_xfrm->aead.iv.offset;
sa->iv_length = crypto_xfrm->aead.iv.length;
+   } else {
+   sa->iv_offset = crypto_xfrm->cipher.iv.offset;
+   sa->iv_length = crypto_xfrm->cipher.iv.length;
}
}
 #else
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 59b63ed..7d22626 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -797,6 +797,26 @@ static const struct rte_cryptodev_capabilities 
sec_caps_sha1_sha2[] = {
}, }
}, }
},
+   {   /* SHA256 HMAC */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+   {.auth = 

[PATCH v3 09/29] crypto/cnxk: clear session data before populating

[Anoob Joseph]

Clear session data before populating fields to not have garbage data.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn10k_ipsec.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index 93eab1b..1bd127e 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -130,6 +130,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt,
sa = &sess->sa;
in_sa = &sa->in_sa;
 
+   memset(in_sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));
+
/* Translate security parameters to SA */
ret = cnxk_ot_ipsec_inb_sa_fill(in_sa, ipsec_xfrm, crypto_xfrm);
if (ret)
-- 
2.7.4

[PATCH v3 10/29] crypto/cnxk: update max sec crypto caps

[Anoob Joseph]

Update the macro to include newly added ciphers. Updated the functions
populating caps to throw error when max is exceeded.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cnxk_cryptodev.h  | 2 +-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 8 ++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h 
b/drivers/crypto/cnxk/cnxk_cryptodev.h
index cfb9d29..2e0f467 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -11,7 +11,7 @@
 #include "roc_cpt.h"
 
 #define CNXK_CPT_MAX_CAPS   34
-#define CNXK_SEC_CRYPTO_MAX_CAPS 4
+#define CNXK_SEC_CRYPTO_MAX_CAPS 6
 #define CNXK_SEC_MAX_CAPS   5
 #define CNXK_AE_EC_ID_MAX   8
 /**
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 7d22626..8305341 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -943,8 +943,10 @@ static void
 sec_caps_add(struct rte_cryptodev_capabilities cnxk_caps[], int *cur_pos,
 const struct rte_cryptodev_capabilities *caps, int nb_caps)
 {
-   if (*cur_pos + nb_caps > CNXK_SEC_CRYPTO_MAX_CAPS)
+   if (*cur_pos + nb_caps > CNXK_SEC_CRYPTO_MAX_CAPS) {
+   rte_panic("Could not add sec crypto caps");
return;
+   }
 
memcpy(&cnxk_caps[*cur_pos], caps, nb_caps * sizeof(caps[0]));
*cur_pos += nb_caps;
@@ -957,8 +959,10 @@ cn10k_sec_crypto_caps_update(struct 
rte_cryptodev_capabilities cnxk_caps[],
const struct rte_cryptodev_capabilities *cap;
unsigned int i;
 
-   if ((CNXK_CPT_MAX_CAPS - *cur_pos) < 1)
+   if ((CNXK_SEC_CRYPTO_MAX_CAPS - *cur_pos) < 1) {
+   rte_panic("Could not add sec crypto caps");
return;
+   }
 
/* NULL auth */
for (i = 0; i < RTE_DIM(caps_null); i++) {
-- 
2.7.4

[PATCH v3 11/29] crypto/cnxk: write CPT CTX through microcode op

[Anoob Joseph]

From: Tejasree Kondoj 

Adding support to write CPT CTX through microcode op(SET_CTX) for
cn10k lookaside PMD.

Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_ipsec.c | 121 --
 1 file changed, 89 insertions(+), 32 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index 1bd127e..a11a6b7 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -2,18 +2,19 @@
  * Copyright(C) 2021 Marvell.
  */
 
-#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
+#include "cn10k_ipsec.h"
 #include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_ops.h"
 #include "cnxk_ipsec.h"
 #include "cnxk_security.h"
-#include "cn10k_ipsec.h"
 
 #include "roc_api.h"
 
@@ -32,36 +33,46 @@ ipsec_cpt_inst_w7_get(struct roc_cpt *roc_cpt, void *sa)
 }
 
 static int
-cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt,
+cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
   struct rte_security_ipsec_xform *ipsec_xfrm,
   struct rte_crypto_sym_xform *crypto_xfrm,
   struct rte_security_session *sec_sess)
 {
union roc_ot_ipsec_outb_param1 param1;
-   struct roc_ot_ipsec_outb_sa *out_sa;
+   struct roc_ot_ipsec_outb_sa *sa_dptr;
struct cnxk_ipsec_outb_rlens rlens;
struct cn10k_sec_session *sess;
struct cn10k_ipsec_sa *sa;
union cpt_inst_w4 inst_w4;
-   int ret;
+   void *out_sa;
+   int ret = 0;
 
sess = get_sec_session_private_data(sec_sess);
sa = &sess->sa;
out_sa = &sa->out_sa;
 
-   memset(out_sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));
+   /* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
+   sa_dptr = plt_zmalloc(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ, 0);
+   if (sa_dptr == NULL) {
+   plt_err("Couldn't allocate memory for SA dptr");
+   return -ENOMEM;
+   }
+
+   memset(sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa));
 
/* Translate security parameters to SA */
-   ret = cnxk_ot_ipsec_outb_sa_fill(out_sa, ipsec_xfrm, crypto_xfrm);
-   if (ret)
-   return ret;
+   ret = cnxk_ot_ipsec_outb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm);
+   if (ret) {
+   plt_err("Could not fill outbound session parameters");
+   goto sa_dptr_free;
+   }
 
sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, sa);
 
 #ifdef LA_IPSEC_DEBUG
/* Use IV from application in debug mode */
if (ipsec_xfrm->options.iv_gen_disable == 1) {
-   out_sa->w2.s.iv_src = ROC_IE_OT_SA_IV_SRC_FROM_SA;
+   sa_dptr->w2.s.iv_src = ROC_IE_OT_SA_IV_SRC_FROM_SA;
if (crypto_xfrm->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
sa->iv_offset = crypto_xfrm->aead.iv.offset;
sa->iv_length = crypto_xfrm->aead.iv.length;
@@ -73,14 +84,15 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt,
 #else
if (ipsec_xfrm->options.iv_gen_disable != 0) {
plt_err("Application provided IV not supported");
-   return -ENOTSUP;
+   ret = -ENOTSUP;
+   goto sa_dptr_free;
}
 #endif
 
/* Get Rlen calculation data */
ret = cnxk_ipsec_outb_rlens_get(&rlens, ipsec_xfrm, crypto_xfrm);
if (ret)
-   return ret;
+   goto sa_dptr_free;
 
sa->max_extended_len = rlens.max_extended_len;
 
@@ -110,37 +122,61 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt,
 
sa->inst.w4 = inst_w4.u64;
 
-   return 0;
+   memset(out_sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));
+
+   /* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
+   memcpy(out_sa, sa_dptr, 8);
+
+   /* Write session using microcode opcode */
+   ret = roc_cpt_ctx_write(lf, sa_dptr, out_sa,
+   ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ);
+   if (ret) {
+   plt_err("Could not write outbound session to hardware");
+   goto sa_dptr_free;
+   }
+
+   /* Trigger CTX flush to write dirty data back to DRAM */
+   roc_cpt_lf_ctx_flush(lf, out_sa, false);
+
+sa_dptr_free:
+   plt_free(sa_dptr);
+
+   return ret;
 }
 
 static int
-cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt,
+cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
  struct rte_security_ipsec_xform *ipsec_xfrm,
  struct rte_crypto_sym_xform *crypto_xfrm,
  struct rte_security_session *sec_sess)
 {
union roc_ot_ipsec_inb_param1 param1;
-   struct roc_ot_ipsec_inb_sa *in_sa;
+   struct roc_ot_ipsec_inb_sa *sa_dptr;
struct cn10k_sec_session *sess;
struct cn10k_ipsec_sa *sa;
union cpt_inst_w

[PATCH v3 12/29] crypto/cnxk: support cnxk lookaside IPsec HMAC-SHA384/512

[Anoob Joseph]

From: Tejasree Kondoj 

Adding HMAC-SHA384/512 support to cnxk lookaside IPsec.

Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/cnxk.rst|  4 ++
 doc/guides/rel_notes/release_22_03.rst|  2 +
 drivers/common/cnxk/cnxk_security.c   | 36 +--
 drivers/crypto/cnxk/cn9k_ipsec.c  | 55 ++-
 drivers/crypto/cnxk/cnxk_cryptodev.h  |  2 +-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 40 +
 drivers/crypto/cnxk/cnxk_ipsec.h  |  6 +++
 7 files changed, 118 insertions(+), 27 deletions(-)

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 8c4c4ea..c49a779 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -267,6 +267,8 @@ Auth algorithms
 
 * SHA1-HMAC
 * SHA256-128-HMAC
+* SHA384-192-HMAC
+* SHA512-256-HMAC
 
 CN10XX Features supported
 ~
@@ -293,3 +295,5 @@ Auth algorithms
 * NULL
 * SHA1-HMAC
 * SHA256-128-HMAC
+* SHA384-192-HMAC
+* SHA512-256-HMAC
diff --git a/doc/guides/rel_notes/release_22_03.rst 
b/doc/guides/rel_notes/release_22_03.rst
index 1639b0e..8df9092 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -58,6 +58,8 @@ New Features
 * **Updated Marvell cnxk crypto PMD.**
 
   * Added SHA256-HMAC support in lookaside protocol (IPsec) for CN10K.
+  * Added SHA384-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
+  * Added SHA512-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
 
 
 Removed Items
diff --git a/drivers/common/cnxk/cnxk_security.c 
b/drivers/common/cnxk/cnxk_security.c
index f39bc1e..1c86f82 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -36,6 +36,14 @@ ipsec_hmac_opad_ipad_gen(struct rte_crypto_sym_xform 
*auth_xform,
roc_hash_sha256_gen(opad, (uint32_t *)&hmac_opad_ipad[0]);
roc_hash_sha256_gen(ipad, (uint32_t *)&hmac_opad_ipad[64]);
break;
+   case RTE_CRYPTO_AUTH_SHA384_HMAC:
+   roc_hash_sha512_gen(opad, (uint64_t *)&hmac_opad_ipad[0], 384);
+   roc_hash_sha512_gen(ipad, (uint64_t *)&hmac_opad_ipad[64], 384);
+   break;
+   case RTE_CRYPTO_AUTH_SHA512_HMAC:
+   roc_hash_sha512_gen(opad, (uint64_t *)&hmac_opad_ipad[0], 512);
+   roc_hash_sha512_gen(ipad, (uint64_t *)&hmac_opad_ipad[64], 512);
+   break;
default:
break;
}
@@ -125,28 +133,28 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
break;
case RTE_CRYPTO_AUTH_SHA1_HMAC:
w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA1;
-   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
-
-   tmp_key = (uint64_t *)hmac_opad_ipad;
-   for (i = 0; i < (int)(ROC_CTX_MAX_OPAD_IPAD_LEN /
- sizeof(uint64_t));
-i++)
-   tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
break;
case RTE_CRYPTO_AUTH_SHA256_HMAC:
w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_256;
-   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
-
-   tmp_key = (uint64_t *)hmac_opad_ipad;
-   for (i = 0; i < (int)(ROC_CTX_MAX_OPAD_IPAD_LEN /
- sizeof(uint64_t));
-i++)
-   tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
+   break;
+   case RTE_CRYPTO_AUTH_SHA384_HMAC:
+   w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_384;
+   break;
+   case RTE_CRYPTO_AUTH_SHA512_HMAC:
+   w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_512;
break;
default:
return -ENOTSUP;
}
 
+   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
+
+   tmp_key = (uint64_t *)hmac_opad_ipad;
+   for (i = 0;
+i < (int)(ROC_CTX_MAX_OPAD_IPAD_LEN / sizeof(uint64_t));
+i++)
+   tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
+
key = cipher_xfrm->cipher.key.data;
length = cipher_xfrm->cipher.key.length;
}
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index 6455ef9..395b0d5 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -321,14 +321,23 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
ctl->auth_type == ROC_IE_ON_SA_AUTH_NULL) {
template = &out_sa->aes_gcm.template;

[PATCH v3 13/29] crypto/cnxk: account for CPT CTX updates and flush delays

[Anoob Joseph]

CPT CTX write with microcode would require CPT flush to complete to have
DRAM updated with the SA. Since datapath requires SA direction field,
introduce a new flag for the same.

Session destroy path is also updated to clear sa.valid bit using CTX
reload operation.

Session is updated with marker to differentiate s/w immutable and s/w
mutable portions.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  4 +--
 drivers/crypto/cnxk/cn10k_ipsec.c | 60 ---
 drivers/crypto/cnxk/cn10k_ipsec.h | 27 +-
 drivers/crypto/cnxk/cn10k_ipsec_la_ops.h  | 18 +-
 4 files changed, 77 insertions(+), 32 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index d25a17c..7617bdc 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -53,7 +53,6 @@ cpt_sec_inst_fill(struct rte_crypto_op *op, struct 
cn10k_sec_session *sess,
  struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
 {
struct rte_crypto_sym_op *sym_op = op->sym;
-   union roc_ot_ipsec_sa_word2 *w2;
struct cn10k_ipsec_sa *sa;
int ret;
 
@@ -68,9 +67,8 @@ cpt_sec_inst_fill(struct rte_crypto_op *op, struct 
cn10k_sec_session *sess,
}
 
sa = &sess->sa;
-   w2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;
 
-   if (w2->s.dir == ROC_IE_SA_DIR_OUTBOUND)
+   if (sa->is_outbound)
ret = process_outb_sa(op, sa, inst);
else {
infl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index a11a6b7..b4acbac 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -67,7 +67,7 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
goto sa_dptr_free;
}
 
-   sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, sa);
+   sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, out_sa);
 
 #ifdef LA_IPSEC_DEBUG
/* Use IV from application in debug mode */
@@ -89,6 +89,8 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
}
 #endif
 
+   sa->is_outbound = true;
+
/* Get Rlen calculation data */
ret = cnxk_ipsec_outb_rlens_get(&rlens, ipsec_xfrm, crypto_xfrm);
if (ret)
@@ -127,6 +129,8 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
/* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
memcpy(out_sa, sa_dptr, 8);
 
+   plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
+
/* Write session using microcode opcode */
ret = roc_cpt_ctx_write(lf, sa_dptr, out_sa,
ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ);
@@ -135,9 +139,11 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
goto sa_dptr_free;
}
 
-   /* Trigger CTX flush to write dirty data back to DRAM */
+   /* Trigger CTX flush so that data is written back to DRAM */
roc_cpt_lf_ctx_flush(lf, out_sa, false);
 
+   plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
+
 sa_dptr_free:
plt_free(sa_dptr);
 
@@ -178,7 +184,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
goto sa_dptr_free;
}
 
-   sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, sa);
+   sa->is_outbound = false;
+   sa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, in_sa);
 
/* pre-populate CPT INST word 4 */
inst_w4.u64 = 0;
@@ -214,6 +221,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
/* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
memcpy(in_sa, sa_dptr, 8);
 
+   plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
+
/* Write session using microcode opcode */
ret = roc_cpt_ctx_write(lf, sa_dptr, in_sa,
ROC_NIX_INL_OT_IPSEC_INB_HW_SZ);
@@ -222,9 +231,11 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
goto sa_dptr_free;
}
 
-   /* Trigger CTX flush to write dirty data back to DRAM */
+   /* Trigger CTX flush so that data is written back to DRAM */
roc_cpt_lf_ctx_flush(lf, in_sa, false);
 
+   plt_atomic_thread_fence(__ATOMIC_SEQ_CST);
+
 sa_dptr_free:
plt_free(sa_dptr);
 
@@ -300,21 +311,46 @@ cn10k_sec_session_create(void *device, struct 
rte_security_session_conf *conf,
 }
 
 static int
-cn10k_sec_session_destroy(void *device __rte_unused,
- struct rte_security_session *sess)
+cn10k_sec_session_destroy(void *dev, struct rte_security_session *sec_sess)
 {
-   struct cn10k_sec_session *priv;
+   struct rte_cryptodev *crypto_dev = dev;
+   union roc_ot_ipsec_sa_word2 *w2;
+   stru

[PATCH v3 14/29] crypto/cnxk: use struct sizes for ctx writes

[Anoob Joseph]

CTX writes only require the lengths are 8B aligned. Use the struct size
directly.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn10k_ipsec.c | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index b4acbac..0832b53 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -52,14 +52,12 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
out_sa = &sa->out_sa;
 
/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
-   sa_dptr = plt_zmalloc(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ, 0);
+   sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_outb_sa), 8);
if (sa_dptr == NULL) {
plt_err("Couldn't allocate memory for SA dptr");
return -ENOMEM;
}
 
-   memset(sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa));
-
/* Translate security parameters to SA */
ret = cnxk_ot_ipsec_outb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm);
if (ret) {
@@ -133,7 +131,7 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
 
/* Write session using microcode opcode */
ret = roc_cpt_ctx_write(lf, sa_dptr, out_sa,
-   ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ);
+   sizeof(struct roc_ot_ipsec_outb_sa));
if (ret) {
plt_err("Could not write outbound session to hardware");
goto sa_dptr_free;
@@ -169,14 +167,12 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
in_sa = &sa->in_sa;
 
/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
-   sa_dptr = plt_zmalloc(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ, 0);
+   sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_inb_sa), 8);
if (sa_dptr == NULL) {
plt_err("Couldn't allocate memory for SA dptr");
return -ENOMEM;
}
 
-   memset(sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa));
-
/* Translate security parameters to SA */
ret = cnxk_ot_ipsec_inb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm);
if (ret) {
@@ -225,7 +221,7 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
 
/* Write session using microcode opcode */
ret = roc_cpt_ctx_write(lf, sa_dptr, in_sa,
-   ROC_NIX_INL_OT_IPSEC_INB_HW_SZ);
+   sizeof(struct roc_ot_ipsec_inb_sa));
if (ret) {
plt_err("Could not write inbound session to hardware");
goto sa_dptr_free;
-- 
2.7.4

[PATCH v3 15/29] crypto/cnxk: add security session stats get

[Anoob Joseph]

From: Ankur Dwivedi 

Adds the security session stats get op for cn10k.


Signed-off-by: Ankur Dwivedi 
---
 drivers/crypto/cnxk/cn10k_ipsec.c | 55 +++
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c |  1 +
 drivers/crypto/cnxk/cnxk_cryptodev_sec.c  |  1 +
 3 files changed, 57 insertions(+)

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c 
b/drivers/crypto/cnxk/cn10k_ipsec.c
index 0832b53..a93c211 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -122,6 +122,12 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
 
sa->inst.w4 = inst_w4.u64;
 
+   if (ipsec_xfrm->options.stats == 1) {
+   /* Enable mib counters */
+   sa_dptr->w0.s.count_mib_bytes = 1;
+   sa_dptr->w0.s.count_mib_pkts = 1;
+   }
+
memset(out_sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));
 
/* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
@@ -212,6 +218,12 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct 
roc_cpt_lf *lf,
 
sa->inst.w4 = inst_w4.u64;
 
+   if (ipsec_xfrm->options.stats == 1) {
+   /* Enable mib counters */
+   sa_dptr->w0.s.count_mib_bytes = 1;
+   sa_dptr->w0.s.count_mib_pkts = 1;
+   }
+
memset(in_sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));
 
/* Copy word0 from sa_dptr to populate ctx_push_sz ctx_size fields */
@@ -357,6 +369,48 @@ cn10k_sec_session_get_size(void *device __rte_unused)
return sizeof(struct cn10k_sec_session);
 }
 
+static int
+cn10k_sec_session_stats_get(void *device, struct rte_security_session *sess,
+   struct rte_security_stats *stats)
+{
+   struct rte_cryptodev *crypto_dev = device;
+   struct roc_ot_ipsec_outb_sa *out_sa;
+   struct roc_ot_ipsec_inb_sa *in_sa;
+   union roc_ot_ipsec_sa_word2 *w2;
+   struct cn10k_sec_session *priv;
+   struct cn10k_ipsec_sa *sa;
+   struct cnxk_cpt_qp *qp;
+
+   priv = get_sec_session_private_data(sess);
+   if (priv == NULL)
+   return -EINVAL;
+
+   qp = crypto_dev->data->queue_pairs[0];
+   if (qp == NULL)
+   return -EINVAL;
+
+   sa = &priv->sa;
+   w2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;
+
+   stats->protocol = RTE_SECURITY_PROTOCOL_IPSEC;
+
+   if (w2->s.dir == ROC_IE_SA_DIR_OUTBOUND) {
+   out_sa = &sa->out_sa;
+   roc_cpt_lf_ctx_flush(&qp->lf, out_sa, false);
+   rte_delay_ms(1);
+   stats->ipsec.opackets = out_sa->ctx.mib_pkts;
+   stats->ipsec.obytes = out_sa->ctx.mib_octs;
+   } else {
+   in_sa = &sa->in_sa;
+   roc_cpt_lf_ctx_flush(&qp->lf, in_sa, false);
+   rte_delay_ms(1);
+   stats->ipsec.ipackets = in_sa->ctx.mib_pkts;
+   stats->ipsec.ibytes = in_sa->ctx.mib_octs;
+   }
+
+   return 0;
+}
+
 /* Update platform specific security ops */
 void
 cn10k_sec_ops_override(void)
@@ -365,4 +419,5 @@ cn10k_sec_ops_override(void)
cnxk_sec_ops.session_create = cn10k_sec_session_create;
cnxk_sec_ops.session_destroy = cn10k_sec_session_destroy;
cnxk_sec_ops.session_get_size = cn10k_sec_session_get_size;
+   cnxk_sec_ops.session_stats_get = cn10k_sec_session_stats_get;
 }
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 9a55474..0fdd91a 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -1073,6 +1073,7 @@ cn10k_sec_caps_update(struct rte_security_capability 
*sec_cap)
}
sec_cap->ipsec.options.ip_csum_enable = 1;
sec_cap->ipsec.options.l4_csum_enable = 1;
+   sec_cap->ipsec.options.stats = 1;
 }
 
 static void
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
index 2021d5c..e5a5d2d 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
@@ -15,6 +15,7 @@ struct rte_security_ops cnxk_sec_ops = {
.session_create = NULL,
.session_destroy = NULL,
.session_get_size = NULL,
+   .session_stats_get = NULL,
.set_pkt_metadata = NULL,
.get_userdata = NULL,
.capabilities_get = cnxk_crypto_sec_capabilities_get
-- 
2.7.4

[PATCH v3 16/29] crypto/cnxk: add skip for unsupported cases

[Anoob Joseph]

Add skip for transport mode tests that are not supported. Also,
updated the transport mode path to configure IP version as v4.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn9k_ipsec.c | 53 +++-
 1 file changed, 47 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index 395b0d5..c27845c 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -141,11 +141,10 @@ ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec,
return -EINVAL;
}
 
-   ctl->inner_ip_ver = ctl->outer_ip_ver;
-
-   if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TRANSPORT)
+   if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TRANSPORT) {
ctl->ipsec_mode = ROC_IE_SA_MODE_TRANSPORT;
-   else if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TUNNEL)
+   ctl->outer_ip_ver = ROC_IE_SA_IP_VERSION_4;
+   } else if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TUNNEL)
ctl->ipsec_mode = ROC_IE_SA_MODE_TUNNEL;
else
return -EINVAL;
@@ -548,7 +547,8 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 }
 
 static inline int
-cn9k_ipsec_xform_verify(struct rte_security_ipsec_xform *ipsec)
+cn9k_ipsec_xform_verify(struct rte_security_ipsec_xform *ipsec,
+   struct rte_crypto_sym_xform *crypto)
 {
if (ipsec->life.bytes_hard_limit != 0 ||
ipsec->life.bytes_soft_limit != 0 ||
@@ -556,6 +556,47 @@ cn9k_ipsec_xform_verify(struct rte_security_ipsec_xform 
*ipsec)
ipsec->life.packets_soft_limit != 0)
return -ENOTSUP;
 
+   if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TRANSPORT) {
+   enum rte_crypto_sym_xform_type type = crypto->type;
+
+   if (type == RTE_CRYPTO_SYM_XFORM_AEAD) {
+   if ((crypto->aead.algo == RTE_CRYPTO_AEAD_AES_GCM) &&
+   (crypto->aead.key.length == 32)) {
+   plt_err("Transport mode AES-256-GCM is not 
supported");
+   return -ENOTSUP;
+   }
+   } else {
+   struct rte_crypto_cipher_xform *cipher;
+   struct rte_crypto_auth_xform *auth;
+
+   if (crypto->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
+   cipher = &crypto->cipher;
+   auth = &crypto->next->auth;
+   } else {
+   cipher = &crypto->next->cipher;
+   auth = &crypto->auth;
+   }
+
+   if ((cipher->algo == RTE_CRYPTO_CIPHER_AES_CBC) &&
+   (auth->algo == RTE_CRYPTO_AUTH_SHA256_HMAC)) {
+   plt_err("Transport mode AES-CBC SHA2 HMAC 256 
is not supported");
+   return -ENOTSUP;
+   }
+
+   if ((cipher->algo == RTE_CRYPTO_CIPHER_AES_CBC) &&
+   (auth->algo == RTE_CRYPTO_AUTH_SHA384_HMAC)) {
+   plt_err("Transport mode AES-CBC SHA2 HMAC 384 
is not supported");
+   return -ENOTSUP;
+   }
+
+   if ((cipher->algo == RTE_CRYPTO_CIPHER_AES_CBC) &&
+   (auth->algo == RTE_CRYPTO_AUTH_SHA512_HMAC)) {
+   plt_err("Transport mode AES-CBC SHA2 HMAC 512 
is not supported");
+   return -ENOTSUP;
+   }
+   }
+   }
+
return 0;
 }
 
@@ -580,7 +621,7 @@ cn9k_ipsec_session_create(void *dev,
if (ret)
return ret;
 
-   ret = cn9k_ipsec_xform_verify(ipsec_xform);
+   ret = cn9k_ipsec_xform_verify(ipsec_xform, crypto_xform);
if (ret)
return ret;
 
-- 
2.7.4

[PATCH v3 17/29] crypto/cnxk: add context reload for IV

[Anoob Joseph]

From: Tejasree Kondoj 

Adding context reload in datapath for IV in debug mode.

Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  7 ---
 drivers/crypto/cnxk/cn10k_ipsec_la_ops.h  | 10 --
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 7617bdc..638268e 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -49,7 +49,8 @@ cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op)
 }
 
 static __rte_always_inline int __rte_hot
-cpt_sec_inst_fill(struct rte_crypto_op *op, struct cn10k_sec_session *sess,
+cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
+ struct cn10k_sec_session *sess,
  struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
 {
struct rte_crypto_sym_op *sym_op = op->sym;
@@ -69,7 +70,7 @@ cpt_sec_inst_fill(struct rte_crypto_op *op, struct 
cn10k_sec_session *sess,
sa = &sess->sa;
 
if (sa->is_outbound)
-   ret = process_outb_sa(op, sa, inst);
+   ret = process_outb_sa(&qp->lf, op, sa, inst);
else {
infl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;
ret = process_inb_sa(op, sa, inst);
@@ -122,7 +123,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *ops[],
if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
sec_sess = get_sec_session_private_data(
sym_op->sec_session);
-   ret = cpt_sec_inst_fill(op, sec_sess, infl_req,
+   ret = cpt_sec_inst_fill(qp, op, sec_sess, infl_req,
&inst[0]);
if (unlikely(ret))
return 0;
diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h 
b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
index cab6a50..f2d8122 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
@@ -48,8 +48,8 @@ ipsec_po_sa_aes_gcm_iv_set(struct cn10k_ipsec_sa *sess,
 }
 
 static __rte_always_inline int
-process_outb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sess,
-   struct cpt_inst_s *inst)
+process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop,
+   struct cn10k_ipsec_sa *sess, struct cpt_inst_s *inst)
 {
struct rte_crypto_sym_op *sym_op = cop->sym;
struct rte_mbuf *m_src = sym_op->m_src;
@@ -61,6 +61,8 @@ process_outb_sa(struct rte_crypto_op *cop, struct 
cn10k_ipsec_sa *sess,
return -ENOMEM;
}
 
+   RTE_SET_USED(lf);
+
 #ifdef LA_IPSEC_DEBUG
if (sess->out_sa.w2.s.iv_src == ROC_IE_OT_SA_IV_SRC_FROM_SA) {
if (sess->out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM)
@@ -68,6 +70,10 @@ process_outb_sa(struct rte_crypto_op *cop, struct 
cn10k_ipsec_sa *sess,
else
ipsec_po_sa_iv_set(sess, cop);
}
+
+   /* Trigger CTX reload to fetch new data from DRAM */
+   roc_cpt_lf_ctx_reload(lf, &sess->out_sa);
+   rte_delay_ms(1);
 #endif
 
if (m_src->ol_flags & RTE_MBUF_F_TX_IP_CKSUM)
-- 
2.7.4

[PATCH v3 18/29] crypto/cnxk: handle null chained ops

[Anoob Joseph]

Verification doesn't cover cases when NULL auth/cipher is provided as a
chain. Removed the separate function for verification and added a
replacement function which calls the appropriate downstream functions.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 189 ---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h |  10 --
 drivers/crypto/cnxk/cnxk_se.h|   6 +
 3 files changed, 102 insertions(+), 103 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 21ee09f..7953a08 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -418,84 +418,121 @@ cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev 
__rte_unused)
 }
 
 static int
-sym_xform_verify(struct rte_crypto_sym_xform *xform)
+cnxk_sess_fill(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
 {
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
-   xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
-   xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
-   return -ENOTSUP;
+   struct rte_crypto_sym_xform *aead_xfrm = NULL;
+   struct rte_crypto_sym_xform *c_xfrm = NULL;
+   struct rte_crypto_sym_xform *a_xfrm = NULL;
+   bool ciph_then_auth = false;
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
-   return CNXK_CPT_CIPHER;
+   if (xform == NULL)
+   return -EINVAL;
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
-   return CNXK_CPT_AUTH;
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
+   c_xfrm = xform;
+   a_xfrm = xform->next;
+   ciph_then_auth = true;
+   } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
+   c_xfrm = xform->next;
+   a_xfrm = xform;
+   ciph_then_auth = false;
+   } else {
+   aead_xfrm = xform;
+   }
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD && xform->next == NULL)
-   return CNXK_CPT_AEAD;
+   if (c_xfrm != NULL && c_xfrm->type != RTE_CRYPTO_SYM_XFORM_CIPHER) {
+   plt_dp_err("Invalid type in cipher xform");
+   return -EINVAL;
+   }
 
-   if (xform->next == NULL)
-   return -EIO;
+   if (a_xfrm != NULL && a_xfrm->type != RTE_CRYPTO_SYM_XFORM_AUTH) {
+   plt_dp_err("Invalid type in auth xform");
+   return -EINVAL;
+   }
+
+   if (aead_xfrm != NULL && aead_xfrm->type != RTE_CRYPTO_SYM_XFORM_AEAD) {
+   plt_dp_err("Invalid type in AEAD xform");
+   return -EINVAL;
+   }
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
-   xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
-   xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
-   xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
+   if ((c_xfrm == NULL || c_xfrm->cipher.algo == RTE_CRYPTO_CIPHER_NULL) &&
+   a_xfrm != NULL && a_xfrm->auth.algo == RTE_CRYPTO_AUTH_NULL &&
+   a_xfrm->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) {
+   plt_dp_err("Null cipher + null auth verify is not supported");
return -ENOTSUP;
+   }
+
+   /* Cipher only */
+   if (c_xfrm != NULL &&
+   (a_xfrm == NULL || a_xfrm->auth.algo == RTE_CRYPTO_AUTH_NULL)) {
+   if (fill_sess_cipher(c_xfrm, sess))
+   return -ENOTSUP;
+   else
+   return 0;
+   }
+
+   /* Auth only */
+   if (a_xfrm != NULL &&
+   (c_xfrm == NULL || c_xfrm->cipher.algo == RTE_CRYPTO_CIPHER_NULL)) {
+   if (fill_sess_auth(a_xfrm, sess))
+   return -ENOTSUP;
+   else
+   return 0;
+   }
+
+   /* AEAD */
+   if (aead_xfrm != NULL) {
+   if (fill_sess_aead(aead_xfrm, sess))
+   return -ENOTSUP;
+   else
+   return 0;
+   }
+
+   /* Chained ops */
+   if (c_xfrm == NULL || a_xfrm == NULL) {
+   plt_dp_err("Invalid xforms");
+   return -EINVAL;
+   }
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
-   xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
-   xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
-   xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
+   if (c_xfrm->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
+   a_xfrm->auth.algo == RTE_CRYPTO_AUTH_SHA1) {
+   plt_dp_err("3DES-CBC + SHA1 is not supported");
return -ENOTSUP;
+   }
 
-   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
-   xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
-   xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
-   xform->next->aut

[PATCH v3 19/29] crypto/cnxk: fix inflight cnt calculation

[Anoob Joseph]

Inflight count calculation is updated to cover wrap around cases where
head can become smaller than tail.


Reported-by: Kiran Kumar K 
Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index ca363bb..0336ae1 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -156,7 +156,11 @@ pending_queue_retreat(uint64_t *index, const uint64_t 
mask, uint64_t nb_entry)
 static __rte_always_inline uint64_t
 pending_queue_infl_cnt(uint64_t head, uint64_t tail, const uint64_t mask)
 {
-   return (head - tail) & mask;
+   /*
+* Mask is nb_desc - 1. Add nb_desc to head and mask to account for
+* cases when tail > head, which happens during wrap around.
+*/
+   return ((head + mask + 1) - tail) & mask;
 }
 
 static __rte_always_inline uint64_t
-- 
2.7.4

[PATCH v3 20/29] crypto/cnxk: use atomics to access CPT res

[Anoob Joseph]

The memory would be updated by hardware. Use atomics to read the same.

Signed-off-by: Anoob Joseph 
---
 drivers/common/cnxk/hw/cpt.h  |  2 ++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 24 
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 28 +++-
 3 files changed, 37 insertions(+), 17 deletions(-)

diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index ccc7af4..412dd76 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -215,6 +215,8 @@ union cpt_res_s {
 
uint64_t reserved_64_127;
} cn9k;
+
+   uint64_t u64[2];
 };
 
 /* [CN10K, .) */
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 638268e..f8240e1 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -111,6 +111,10 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *ops[],
uint64_t w7;
int ret;
 
+   const union cpt_res_s res = {
+   .cn10k.compcode = CPT_COMP_NOT_DONE,
+   };
+
op = ops[0];
 
inst[0].w0.u64 = 0;
@@ -174,7 +178,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *ops[],
}
 
inst[0].res_addr = (uint64_t)&infl_req->res;
-   infl_req->res.cn10k.compcode = CPT_COMP_NOT_DONE;
+   __atomic_store_n(&infl_req->res.u64[0], res.u64[0], __ATOMIC_RELAXED);
infl_req->cop = op;
 
inst[0].w7.u64 = w7;
@@ -395,9 +399,9 @@ cn10k_cpt_sec_ucc_process(struct rte_crypto_op *cop,
 static inline void
 cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
   struct rte_crypto_op *cop,
-  struct cpt_inflight_req *infl_req)
+  struct cpt_inflight_req *infl_req,
+  struct cpt_cn10k_res_s *res)
 {
-   struct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;
const uint8_t uc_compcode = res->uc_compcode;
const uint8_t compcode = res->compcode;
unsigned int sz;
@@ -495,12 +499,15 @@ cn10k_cpt_crypto_adapter_dequeue(uintptr_t get_work1)
struct cpt_inflight_req *infl_req;
struct rte_crypto_op *cop;
struct cnxk_cpt_qp *qp;
+   union cpt_res_s res;
 
infl_req = (struct cpt_inflight_req *)(get_work1);
cop = infl_req->cop;
qp = infl_req->qp;
 
-   cn10k_cpt_dequeue_post_process(qp, infl_req->cop, infl_req);
+   res.u64[0] = __atomic_load_n(&infl_req->res.u64[0], __ATOMIC_RELAXED);
+
+   cn10k_cpt_dequeue_post_process(qp, infl_req->cop, infl_req, &res.cn10k);
 
if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
@@ -515,9 +522,9 @@ cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
struct cpt_inflight_req *infl_req;
struct cnxk_cpt_qp *qp = qptr;
struct pending_queue *pend_q;
-   struct cpt_cn10k_res_s *res;
uint64_t infl_cnt, pq_tail;
struct rte_crypto_op *cop;
+   union cpt_res_s res;
int i;
 
pend_q = &qp->pend_q;
@@ -534,9 +541,10 @@ cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
for (i = 0; i < nb_ops; i++) {
infl_req = &pend_q->req_queue[pq_tail];
 
-   res = (struct cpt_cn10k_res_s *)&infl_req->res;
+   res.u64[0] = __atomic_load_n(&infl_req->res.u64[0],
+__ATOMIC_RELAXED);
 
-   if (unlikely(res->compcode == CPT_COMP_NOT_DONE)) {
+   if (unlikely(res.cn10k.compcode == CPT_COMP_NOT_DONE)) {
if (unlikely(rte_get_timer_cycles() >
 pend_q->time_out)) {
plt_err("Request timed out");
@@ -553,7 +561,7 @@ cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
 
ops[i] = cop;
 
-   cn10k_cpt_dequeue_post_process(qp, cop, infl_req);
+   cn10k_cpt_dequeue_post_process(qp, cop, infl_req, &res.cn10k);
 
if (unlikely(infl_req->op_flags & CPT_OP_FLAGS_METABUF))
rte_mempool_put(qp->meta_info.pool, infl_req->mdata);
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 449208d..cf80d47 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -221,6 +221,10 @@ cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
uint64_t head;
int ret;
 
+   const union cpt_res_s res = {
+   .cn10k.compcode = CPT_COMP_NOT_DONE,
+   };
+
pend_q = &qp->pend_q;
 
const uint64_t lmt_base = qp->lf.lmt_base;
@@ -274,10 +278,12 @@

[PATCH v3 21/29] crypto/cnxk: add more info on command timeout

[Anoob Joseph]

Print more info when command timeout happens. Print software and
hardware queue information.

Signed-off-by: Anoob Joseph 
Signed-off-by: Tejasree Kondoj 
---
 drivers/common/cnxk/hw/cpt.h  | 11 
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  1 +
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  1 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 43 +++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  1 +
 5 files changed, 57 insertions(+)

diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 412dd76..4d9c896 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -91,6 +91,17 @@ union cpt_lf_inprog {
} s;
 };
 
+union cpt_lf_q_inst_ptr {
+   uint64_t u;
+   struct cpt_lf_q_inst_ptr_s {
+   uint64_t dq_ptr : 20;
+   uint64_t reserved_20_31 : 12;
+   uint64_t nq_ptr : 20;
+   uint64_t reserved_52_62 : 11;
+   uint64_t xq_xor : 1;
+   } s;
+};
+
 union cpt_lf_q_base {
uint64_t u;
struct cpt_lf_q_base_s {
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index f8240e1..1905ea3 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -548,6 +548,7 @@ cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
if (unlikely(rte_get_timer_cycles() >
 pend_q->time_out)) {
plt_err("Request timed out");
+   cnxk_cpt_dump_on_err(qp);
pend_q->time_out = rte_get_timer_cycles() +
   DEFAULT_COMMAND_TIMEOUT *
   rte_get_timer_hz();
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index cf80d47..ac1953b 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -547,6 +547,7 @@ cn9k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
if (unlikely(rte_get_timer_cycles() >
 pend_q->time_out)) {
plt_err("Request timed out");
+   cnxk_cpt_dump_on_err(qp);
pend_q->time_out = rte_get_timer_cycles() +
   DEFAULT_COMMAND_TIMEOUT *
   rte_get_timer_hz();
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 7953a08..0ce54d7 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -703,3 +703,46 @@ cnxk_ae_session_cfg(struct rte_cryptodev *dev,
 
return 0;
 }
+
+void
+cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *qp)
+{
+   struct pending_queue *pend_q = &qp->pend_q;
+   uint64_t inflight, enq_ptr, deq_ptr, insts;
+   union cpt_lf_q_inst_ptr inst_ptr;
+   union cpt_lf_inprog lf_inprog;
+
+   plt_print("Lcore ID: %d, LF/QP ID: %d", rte_lcore_id(), qp->lf.lf_id);
+   plt_print("");
+   plt_print("S/w pending queue:");
+   plt_print("\tHead: %ld", pend_q->head);
+   plt_print("\tTail: %ld", pend_q->tail);
+   plt_print("\tMask: 0x%lx", pend_q->pq_mask);
+   plt_print("\tInflight count: %ld",
+ pending_queue_infl_cnt(pend_q->head, pend_q->tail,
+pend_q->pq_mask));
+
+   plt_print("");
+   plt_print("H/w pending queue:");
+
+   lf_inprog.u = plt_read64(qp->lf.rbase + CPT_LF_INPROG);
+   inflight = lf_inprog.s.inflight;
+   plt_print("\tInflight in engines: %ld", inflight);
+
+   inst_ptr.u = plt_read64(qp->lf.rbase + CPT_LF_Q_INST_PTR);
+
+   enq_ptr = inst_ptr.s.nq_ptr;
+   deq_ptr = inst_ptr.s.dq_ptr;
+
+   if (enq_ptr >= deq_ptr)
+   insts = enq_ptr - deq_ptr;
+   else
+   insts = (enq_ptr + pend_q->pq_mask + 1 + 320 + 40) - deq_ptr;
+
+   plt_print("\tNQ ptr: 0x%lx", enq_ptr);
+   plt_print("\tDQ ptr: 0x%lx", deq_ptr);
+   plt_print("Insts waiting in CPT: %ld", insts);
+
+   plt_print("");
+   roc_cpt_afs_print(qp->lf.roc_cpt);
+}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index 0336ae1..e521f07 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -122,6 +122,7 @@ int cnxk_ae_session_cfg(struct rte_cryptodev *dev,
struct rte_crypto_asym_xform *xform,
struct rte_cryptodev_asym_session *sess,
struct rte_mempool *pool);
+void cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *

[PATCH v3 22/29] crypto/cnxk: support lookaside IPsec AES-CTR

[Anoob Joseph]

From: Tejasree Kondoj 

Adding AES-CTR support to cnxk CPT in
lookaside IPsec mode.

Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/cnxk.rst|  2 ++
 doc/guides/rel_notes/release_22_03.rst|  1 +
 drivers/common/cnxk/cnxk_security.c   |  6 ++
 drivers/crypto/cnxk/cn9k_ipsec.c  |  3 +++
 drivers/crypto/cnxk/cnxk_cryptodev.h  |  2 +-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 20 
 drivers/crypto/cnxk/cnxk_ipsec.h  |  3 ++-
 7 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index c49a779..1239155 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -261,6 +261,7 @@ Cipher algorithms
 +
 
 * AES-128/192/256-CBC
+* AES-128/192/256-CTR
 
 Auth algorithms
 +++
@@ -288,6 +289,7 @@ Cipher algorithms
 +
 
 * AES-128/192/256-CBC
+* AES-128/192/256-CTR
 
 Auth algorithms
 +++
diff --git a/doc/guides/rel_notes/release_22_03.rst 
b/doc/guides/rel_notes/release_22_03.rst
index 8df9092..4b272e4 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -60,6 +60,7 @@ New Features
   * Added SHA256-HMAC support in lookaside protocol (IPsec) for CN10K.
   * Added SHA384-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
   * Added SHA512-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
+  * Added AES-CTR support in lookaside protocol (IPsec) for CN9K & CN10K.
 
 
 Removed Items
diff --git a/drivers/common/cnxk/cnxk_security.c 
b/drivers/common/cnxk/cnxk_security.c
index 1c86f82..0d4baa9 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -123,6 +123,9 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
case RTE_CRYPTO_CIPHER_AES_CBC:
w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CBC;
break;
+   case RTE_CRYPTO_CIPHER_AES_CTR:
+   w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CTR;
+   break;
default:
return -ENOTSUP;
}
@@ -630,6 +633,9 @@ onf_ipsec_sa_common_param_fill(struct roc_ie_onf_sa_ctl 
*ctl, uint8_t *salt,
case RTE_CRYPTO_CIPHER_AES_CBC:
ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CBC;
break;
+   case RTE_CRYPTO_CIPHER_AES_CTR:
+   ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CTR;
+   break;
default:
return -ENOTSUP;
}
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index c27845c..1e2269c 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -166,6 +166,9 @@ ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec,
} else if (cipher_xform->cipher.algo == RTE_CRYPTO_CIPHER_AES_CBC) {
ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CBC;
aes_key_len = cipher_xform->cipher.key.length;
+   } else if (cipher_xform->cipher.algo == RTE_CRYPTO_CIPHER_AES_CTR) {
+   ctl->enc_type = ROC_IE_ON_SA_ENC_AES_CTR;
+   aes_key_len = cipher_xform->cipher.key.length;
} else {
return -ENOTSUP;
}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h 
b/drivers/crypto/cnxk/cnxk_cryptodev.h
index f701c26..4a1e377 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -11,7 +11,7 @@
 #include "roc_cpt.h"
 
 #define CNXK_CPT_MAX_CAPS   34
-#define CNXK_SEC_CRYPTO_MAX_CAPS 8
+#define CNXK_SEC_CRYPTO_MAX_CAPS 9
 #define CNXK_SEC_MAX_CAPS   5
 #define CNXK_AE_EC_ID_MAX   8
 /**
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 0fdd91a..fae433e 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -754,6 +754,26 @@ static const struct rte_cryptodev_capabilities 
sec_caps_aes[] = {
}, }
}, }
},
+   {   /* AES CTR */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+   {.cipher = {
+   .algo = RTE_CRYPTO_CIPHER_AES_CTR,
+   .block_size = 16,
+   .key_size = {
+   .min = 16,
+   .max = 32,
+   .increment = 8
+   },
+   .iv_size = {
+   .min = 12,
+

[PATCH v3 23/29] crypto/cnxk: fix extend tail calculation

[Anoob Joseph]

If the packet size to be incremented after IPsec processing is less
than size of hdr (size incremented before submitting), then extend_tail
can become negative. Allow negative values for the variable.

Fixes: 67a87e89561c ("crypto/cnxk: add cn9k lookaside IPsec datapath")
Cc: march...@marvell.com

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h 
b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
index 2dc8913..2b0261e 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
@@ -77,9 +77,10 @@ process_outb_sa(struct rte_crypto_op *cop, struct 
cn9k_ipsec_sa *sa,
const unsigned int hdr_len = sizeof(struct roc_ie_on_outb_hdr);
struct rte_crypto_sym_op *sym_op = cop->sym;
struct rte_mbuf *m_src = sym_op->m_src;
-   uint32_t dlen, rlen, extend_tail;
struct roc_ie_on_outb_sa *out_sa;
struct roc_ie_on_outb_hdr *hdr;
+   uint32_t dlen, rlen;
+   int32_t extend_tail;
 
out_sa = &sa->out_sa;
 
@@ -88,7 +89,8 @@ process_outb_sa(struct rte_crypto_op *cop, struct 
cn9k_ipsec_sa *sa,
 
extend_tail = rlen - dlen;
if (unlikely(extend_tail > rte_pktmbuf_tailroom(m_src))) {
-   plt_dp_err("Not enough tail room");
+   plt_dp_err("Not enough tail room (required: %d, available: %d",
+  extend_tail, rte_pktmbuf_tailroom(m_src));
return -ENOMEM;
}
 
-- 
2.7.4

[PATCH v3 24/29] crypto/cnxk: add aes xcbc and null cipher

[Anoob Joseph]

Add support for AES XCBC and NULL cipher.

Signed-off-by: Anoob Joseph 
---
 doc/guides/cryptodevs/cnxk.rst|  4 +
 doc/guides/rel_notes/release_22_03.rst|  2 +
 drivers/common/cnxk/cnxk_security.c   | 48 
 drivers/common/cnxk/roc_ie_on.h   | 10 +++
 drivers/crypto/cnxk/cn9k_ipsec.c  | 93 ---
 drivers/crypto/cnxk/cnxk_cryptodev.h  |  2 +-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 45 +++
 drivers/crypto/cnxk/cnxk_ipsec.h  |  7 ++
 8 files changed, 169 insertions(+), 42 deletions(-)

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 1239155..6e844f5 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -260,6 +260,7 @@ AEAD algorithms
 Cipher algorithms
 +
 
+* NULL
 * AES-128/192/256-CBC
 * AES-128/192/256-CTR
 
@@ -270,6 +271,7 @@ Auth algorithms
 * SHA256-128-HMAC
 * SHA384-192-HMAC
 * SHA512-256-HMAC
+* AES-XCBC-96
 
 CN10XX Features supported
 ~
@@ -288,6 +290,7 @@ AEAD algorithms
 Cipher algorithms
 +
 
+* NULL
 * AES-128/192/256-CBC
 * AES-128/192/256-CTR
 
@@ -299,3 +302,4 @@ Auth algorithms
 * SHA256-128-HMAC
 * SHA384-192-HMAC
 * SHA512-256-HMAC
+* AES-XCBC-96
diff --git a/doc/guides/rel_notes/release_22_03.rst 
b/doc/guides/rel_notes/release_22_03.rst
index 4b272e4..e8fec00 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -61,6 +61,8 @@ New Features
   * Added SHA384-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
   * Added SHA512-HMAC support in lookaside protocol (IPsec) for CN9K & CN10K.
   * Added AES-CTR support in lookaside protocol (IPsec) for CN9K & CN10K.
+  * Added NULL cipher support in lookaside protocol (IPsec) for CN9K & CN10K.
+  * Added AES-XCBC support in lookaside protocol (IPsec) for CN9K & CN10K.
 
 
 Removed Items
diff --git a/drivers/common/cnxk/cnxk_security.c 
b/drivers/common/cnxk/cnxk_security.c
index 0d4baa9..6ebf084 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -120,6 +120,9 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
}
} else {
switch (cipher_xfrm->cipher.algo) {
+   case RTE_CRYPTO_CIPHER_NULL:
+   w2->s.enc_type = ROC_IE_OT_SA_ENC_NULL;
+   break;
case RTE_CRYPTO_CIPHER_AES_CBC:
w2->s.enc_type = ROC_IE_OT_SA_ENC_AES_CBC;
break;
@@ -146,11 +149,19 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
case RTE_CRYPTO_AUTH_SHA512_HMAC:
w2->s.auth_type = ROC_IE_OT_SA_AUTH_SHA2_512;
break;
+   case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
+   w2->s.auth_type = ROC_IE_OT_SA_AUTH_AES_XCBC_128;
+   break;
default:
return -ENOTSUP;
}
 
-   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
+   if (auth_xfrm->auth.algo == RTE_CRYPTO_AUTH_AES_XCBC_MAC) {
+   const uint8_t *auth_key = auth_xfrm->auth.key.data;
+   roc_aes_xcbc_key_derive(auth_key, hmac_opad_ipad);
+   } else {
+   ipsec_hmac_opad_ipad_gen(auth_xfrm, hmac_opad_ipad);
+   }
 
tmp_key = (uint64_t *)hmac_opad_ipad;
for (i = 0;
@@ -174,18 +185,26 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 
*w2,
for (i = 0; i < (int)(ROC_CTX_MAX_CKEY_LEN / sizeof(uint64_t)); i++)
tmp_key[i] = rte_be_to_cpu_64(tmp_key[i]);
 
-   switch (length) {
-   case ROC_CPT_AES128_KEY_LEN:
-   w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_128;
-   break;
-   case ROC_CPT_AES192_KEY_LEN:
-   w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_192;
-   break;
-   case ROC_CPT_AES256_KEY_LEN:
-   w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_256;
-   break;
-   default:
-   return -EINVAL;
+   /* Set AES key length */
+   if (w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CBC ||
+   w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM ||
+   w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_CTR ||
+   w2->s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||
+   w2->s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) {
+   switch (length) {
+   case ROC_CPT_AES128_KEY_LEN:
+   w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_128;
+   break;
+   case ROC_CPT_AES192_KEY_LEN:
+   w2->s.aes_key_len = ROC_IE_SA_AES_KEY_LEN_192;
+   break;
+   case ROC_CPT_

[PATCH v3 25/29] crypto/cnxk: add copy and set DF

[Anoob Joseph]

Add support for copy and set DF bit.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn9k_ipsec.c  | 7 ++-
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index c9f5825..62b9c26 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -246,6 +246,8 @@ ipsec_sa_ctl_set(struct rte_security_ipsec_xform *ipsec,
if (ipsec->options.udp_encap == 1)
ctl->encap_type = ROC_IE_ON_SA_ENCAP_UDP;
 
+   ctl->copy_df = ipsec->options.copy_df;
+
ctl->spi = rte_cpu_to_be_32(ipsec->spi);
 
rte_io_wmb();
@@ -376,13 +378,16 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
 
if (ipsec->mode == RTE_SECURITY_IPSEC_SA_MODE_TUNNEL) {
if (ipsec->tunnel.type == RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
+   uint16_t frag_off = 0;
ctx_len += sizeof(template->ip4);
 
ip4->version_ihl = RTE_IPV4_VHL_DEF;
ip4->time_to_live = ipsec->tunnel.ipv4.ttl;
ip4->type_of_service |= (ipsec->tunnel.ipv4.dscp << 2);
if (ipsec->tunnel.ipv4.df)
-   ip4->fragment_offset = BIT(14);
+   frag_off |= RTE_IPV4_HDR_DF_FLAG;
+   ip4->fragment_offset = rte_cpu_to_be_16(frag_off);
+
memcpy(&ip4->src_addr, &ipsec->tunnel.ipv4.src_ip,
   sizeof(struct in_addr));
memcpy(&ip4->dst_addr, &ipsec->tunnel.ipv4.dst_ip,
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index a0b2a1f..69ee0d9 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -1121,6 +1121,7 @@ static void
 cnxk_sec_caps_update(struct rte_security_capability *sec_cap)
 {
sec_cap->ipsec.options.udp_encap = 1;
+   sec_cap->ipsec.options.copy_df = 1;
 }
 
 static void
-- 
2.7.4

[PATCH v3 26/29] crypto/cnxk: add aes cmac

[Anoob Joseph]

Add support for AES CMAC auth algorithm.

Signed-off-by: Anoob Joseph 
---
 doc/guides/cryptodevs/cnxk.rst|  1 +
 doc/guides/cryptodevs/features/cn10k.ini  | 37 +++---
 doc/guides/cryptodevs/features/cn9k.ini   | 37 +++---
 doc/guides/rel_notes/release_22_03.rst|  1 +
 drivers/common/cnxk/roc_se.h  |  8 +--
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 20 
 drivers/crypto/cnxk/cnxk_se.h | 60 ++-
 7 files changed, 103 insertions(+), 61 deletions(-)

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 6e844f5..3c58517 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -61,6 +61,7 @@ Hash algorithms:
 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
+* ``RTE_CRYPTO_AUTH_AES_CMAC``
 
 AEAD algorithms:
 
diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index ab21d9d..c8193c2 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -41,23 +41,26 @@ ZUC EEA3   = Y
 ; Supported authentication algorithms of 'cn10k' crypto driver.
 ;
 [Auth]
-NULL = Y
-AES GMAC = Y
-KASUMI F9= Y
-MD5  = Y
-MD5 HMAC = Y
-SHA1 = Y
-SHA1 HMAC= Y
-SHA224   = Y
-SHA224 HMAC  = Y
-SHA256   = Y
-SHA256 HMAC  = Y
-SHA384   = Y
-SHA384 HMAC  = Y
-SHA512   = Y
-SHA512 HMAC  = Y
-SNOW3G UIA2  = Y
-ZUC EIA3 = Y
+NULL= Y
+AES GMAC= Y
+KASUMI F9   = Y
+MD5 = Y
+MD5 HMAC= Y
+SHA1= Y
+SHA1 HMAC   = Y
+SHA224  = Y
+SHA224 HMAC = Y
+SHA256  = Y
+SHA256 HMAC = Y
+SHA384  = Y
+SHA384 HMAC = Y
+SHA512  = Y
+SHA512 HMAC = Y
+SNOW3G UIA2 = Y
+ZUC EIA3= Y
+AES CMAC (128)  = Y
+AES CMAC (192)  = Y
+AES CMAC (256)  = Y
 
 ;
 ; Supported AEAD algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index d834659..f215ee0 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -40,23 +40,26 @@ ZUC EEA3   = Y
 ; Supported authentication algorithms of 'cn9k' crypto driver.
 ;
 [Auth]
-NULL = Y
-AES GMAC = Y
-KASUMI F9= Y
-MD5  = Y
-MD5 HMAC = Y
-SHA1 = Y
-SHA1 HMAC= Y
-SHA224   = Y
-SHA224 HMAC  = Y
-SHA256   = Y
-SHA256 HMAC  = Y
-SHA384   = Y
-SHA384 HMAC  = Y
-SHA512   = Y
-SHA512 HMAC  = Y
-SNOW3G UIA2  = Y
-ZUC EIA3 = Y
+NULL= Y
+AES GMAC= Y
+KASUMI F9   = Y
+MD5 = Y
+MD5 HMAC= Y
+SHA1= Y
+SHA1 HMAC   = Y
+SHA224  = Y
+SHA224 HMAC = Y
+SHA256  = Y
+SHA256 HMAC = Y
+SHA384  = Y
+SHA384 HMAC = Y
+SHA512  = Y
+SHA512 HMAC = Y
+SNOW3G UIA2 = Y
+ZUC EIA3= Y
+AES CMAC (128)  = Y
+AES CMAC (192)  = Y
+AES CMAC (256)  = Y
 
 ;
 ; Supported AEAD algorithms of 'cn9k' crypto driver.
diff --git a/doc/guides/rel_notes/release_22_03.rst 
b/doc/guides/rel_notes/release_22_03.rst
index e8fec00..72e758e 100644
--- a/doc/guides/rel_notes/release_22_03.rst
+++ b/doc/guides/rel_notes/release_22_03.rst
@@ -63,6 +63,7 @@ New Features
   * Added AES-CTR support in lookaside protocol (IPsec) for CN9K & CN10K.
   * Added NULL cipher support in lookaside protocol (IPsec) for CN9K & CN10K.
   * Added AES-XCBC support in lookaside protocol (IPsec) for CN9K & CN10K.
+  * Added AES-CMAC support in CN9K & CN10K.
 
 
 Removed Items
diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h
index 253575a..145a182 100644
--- a/drivers/common/cnxk/roc_se.h
+++ b/drivers/common/cnxk/roc_se.h
@@ -11,10 +11,10 @@
 #define ROC_SE_FC_MINOR_OP_DECRYPT0x1
 #define ROC_SE_FC_MINOR_OP_HMAC_FIRST 0x10
 
-#define ROC_SE_MAJOR_OP_HASH  0x34
-#define ROC_SE_MAJOR_OP_HMAC  0x35
-#define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
-#define ROC_SE_MAJOR_OP_KASUMI0x38
+#define ROC_SE_MAJOR_OP_HASH   0x34
+#define ROC_SE_MAJOR_OP_HMAC   0x35
+#define ROC_SE_MAJOR_OP_PDCP   0x37
+#define ROC_SE_MAJOR_OP_KASUMI 0x38
 
 #define ROC_SE_MAJOR_OP_MISC0x01
 #define ROC_SE_MISC_MINOR_OP_PASSTHROUGH 0x03
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index 69ee0d9..457e166 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -568,6 +568,26 @@ static const struct rte_cryptodev_capabilities caps_aes[] 
= {
}, }
}, }
},
+   {   /* AES CMAC */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM

[PATCH v3 27/29] crypto/cnxk: add per pkt IV in lookaside IPsec debug mode

[Anoob Joseph]

From: Archana Muniganti 

For cn9k, use HW GEN IV as default and add per pkt IV
in lookaside IPsec debug mode. Debug mode helps to verify
lookaside PMD using known outbound vectors in lookaside
autotest.

Signed-off-by: Archana Muniganti 
---
 drivers/common/cnxk/roc_ie_on.h   |  7 +
 drivers/crypto/cnxk/cn9k_ipsec.c  | 34 +--
 drivers/crypto/cnxk/cn9k_ipsec.h  |  2 ++
 drivers/crypto/cnxk/cn9k_ipsec_la_ops.h   | 14 +++---
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c |  2 ++
 5 files changed, 47 insertions(+), 12 deletions(-)

diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index cb56a70..aaad872 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -22,6 +22,8 @@ enum roc_ie_on_ucc_ipsec {
 
 /* Helper macros */
 #define ROC_IE_ON_INB_RPTR_HDR 0x8
+#define ROC_IE_ON_MAX_IV_LEN   16
+#define ROC_IE_ON_PER_PKT_IV   BIT(43)
 
 enum {
ROC_IE_ON_SA_ENC_NULL = 0,
@@ -55,6 +57,11 @@ enum {
ROC_IE_ON_SA_ENCAP_UDP = 1,
 };
 
+enum {
+   ROC_IE_ON_IV_SRC_HW_GEN_DEFAULT = 0,
+   ROC_IE_ON_IV_SRC_FROM_DPTR = 1,
+};
+
 struct roc_ie_on_outb_hdr {
uint32_t ip_id;
uint32_t seq;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index 62b9c26..9f876f7 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -426,13 +426,7 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
 
ctx_len += RTE_ALIGN_CEIL(ctx_len, 8);
 
-   if (crypto_xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
-   sa->cipher_iv_off = crypto_xform->aead.iv.offset;
-   sa->cipher_iv_len = crypto_xform->aead.iv.length;
-   } else {
-   sa->cipher_iv_off = crypto_xform->cipher.iv.offset;
-   sa->cipher_iv_len = crypto_xform->cipher.iv.length;
-
+   if (crypto_xform->type != RTE_CRYPTO_SYM_XFORM_AEAD) {
auth_key = auth_xform->auth.key.data;
auth_key_len = auth_xform->auth.key.length;
 
@@ -465,7 +459,31 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
 
param1.u16 = 0;
param1.s.ikev2 = 1;
-   param1.s.per_pkt_iv = 1;
+
+   sa->custom_hdr_len = sizeof(struct roc_ie_on_outb_hdr) -
+ROC_IE_ON_MAX_IV_LEN;
+
+#ifdef LA_IPSEC_DEBUG
+   /* Use IV from application in debug mode */
+   if (ipsec->options.iv_gen_disable == 1) {
+   param1.s.per_pkt_iv = ROC_IE_ON_IV_SRC_FROM_DPTR;
+   sa->custom_hdr_len = sizeof(struct roc_ie_on_outb_hdr);
+
+   if (crypto_xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
+   sa->cipher_iv_off = crypto_xform->aead.iv.offset;
+   sa->cipher_iv_len = crypto_xform->aead.iv.length;
+   } else {
+   sa->cipher_iv_off = crypto_xform->cipher.iv.offset;
+   sa->cipher_iv_len = crypto_xform->cipher.iv.length;
+   }
+   }
+#else
+   if (ipsec->options.iv_gen_disable != 0) {
+   plt_err("Application provided IV is not supported");
+   return -ENOTSUP;
+   }
+#endif
+
w4.s.param1 = param1.u16;
 
inst_tmpl->w4 = w4.u64;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h
index fc440d5..f3acad5 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec.h
@@ -24,6 +24,8 @@ struct cn9k_ipsec_sa {
uint16_t cipher_iv_off;
/** Cipher IV length in bytes */
uint8_t cipher_iv_len;
+   /** Outbound custom header length */
+   uint8_t custom_hdr_len;
/** Response length calculation data */
struct cnxk_ipsec_outb_rlens rlens;
/** Outbound IP-ID */
diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h 
b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
index 2b0261e..9a1e217 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
@@ -74,7 +74,7 @@ static __rte_always_inline int
 process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,
struct cpt_inst_s *inst)
 {
-   const unsigned int hdr_len = sizeof(struct roc_ie_on_outb_hdr);
+   const unsigned int hdr_len = sa->custom_hdr_len;
struct rte_crypto_sym_op *sym_op = cop->sym;
struct rte_mbuf *m_src = sym_op->m_src;
struct roc_ie_on_outb_sa *out_sa;
@@ -103,9 +103,15 @@ process_outb_sa(struct rte_crypto_op *cop, struct 
cn9k_ipsec_sa *sa,
return -ENOMEM;
}
 
-   memcpy(&hdr->iv[0],
-  rte_crypto_op_ctod_offset(cop, uint8_t *, sa->cipher_iv_off),
-  sa->cipher_iv_len);
+#ifdef LA_IPSEC_DEBUG
+   if (sa->inst.w4 & ROC_IE_ON_PER_PKT_IV) {
+   memcpy(&hdr->iv[0],
+  rte_crypto_op_ctod_offset(cop, uint8_t *,
+   

[PATCH v3 28/29] crypto/cnxk: enable copy dscp

[Anoob Joseph]

Copy DSCP is supported. Enable it in capabilities.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index f79e4d7..f8c007e 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -1142,6 +1142,7 @@ cnxk_sec_caps_update(struct rte_security_capability 
*sec_cap)
 {
sec_cap->ipsec.options.udp_encap = 1;
sec_cap->ipsec.options.copy_df = 1;
+   sec_cap->ipsec.options.copy_dscp = 1;
 }
 
 static void
-- 
2.7.4

[PATCH v3 29/29] crypto/cnxk: update microcode completion handling

[Anoob Joseph]

Update microcode completion code handling to update the required mbuf &
crypto op flags. IP checksum good case is now reported by specific
microcode completion code.

Signed-off-by: Anoob Joseph 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 59 ++-
 drivers/crypto/cnxk/cn10k_ipsec.c |  1 -
 drivers/crypto/cnxk/cn10k_ipsec.h |  1 -
 3 files changed, 18 insertions(+), 43 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 1905ea3..d217bbf 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -50,8 +50,7 @@ cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op)
 
 static __rte_always_inline int __rte_hot
 cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
- struct cn10k_sec_session *sess,
- struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)
+ struct cn10k_sec_session *sess, struct cpt_inst_s *inst)
 {
struct rte_crypto_sym_op *sym_op = op->sym;
struct cn10k_ipsec_sa *sa;
@@ -71,10 +70,8 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op,
 
if (sa->is_outbound)
ret = process_outb_sa(&qp->lf, op, sa, inst);
-   else {
-   infl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;
+   else
ret = process_inb_sa(op, sa, inst);
-   }
 
return ret;
 }
@@ -127,8 +124,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *ops[],
if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
sec_sess = get_sec_session_private_data(
sym_op->sec_session);
-   ret = cpt_sec_inst_fill(qp, op, sec_sess, infl_req,
-   &inst[0]);
+   ret = cpt_sec_inst_fill(qp, op, sec_sess, &inst[0]);
if (unlikely(ret))
return 0;
w7 = sec_sess->sa.inst.w7;
@@ -346,52 +342,34 @@ static inline void
 cn10k_cpt_sec_post_process(struct rte_crypto_op *cop,
   struct cpt_cn10k_res_s *res)
 {
-   struct rte_mbuf *m = cop->sym->m_src;
+   struct rte_mbuf *mbuf = cop->sym->m_src;
const uint16_t m_len = res->rlen;
 
-   m->data_len = m_len;
-   m->pkt_len = m_len;
-}
-
-static inline void
-cn10k_cpt_sec_ucc_process(struct rte_crypto_op *cop,
- struct cpt_inflight_req *infl_req,
- const uint8_t uc_compcode)
-{
-   struct cn10k_sec_session *sess;
-   struct cn10k_ipsec_sa *sa;
-   struct rte_mbuf *mbuf;
-
-   if (uc_compcode == ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST)
-   cop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;
-
-   if (!(infl_req->op_flags & CPT_OP_FLAGS_IPSEC_DIR_INBOUND))
-   return;
-
-   sess = get_sec_session_private_data(cop->sym->sec_session);
-   sa = &sess->sa;
+   mbuf->data_len = m_len;
+   mbuf->pkt_len = m_len;
 
-   mbuf = cop->sym->m_src;
-
-   switch (uc_compcode) {
+   switch (res->uc_compcode) {
case ROC_IE_OT_UCC_SUCCESS:
-   if (sa->ip_csum_enable)
-   mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM:
mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM:
-   mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;
-   if (sa->ip_csum_enable)
-   mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+   mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+ RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM:
-   mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;
-   if (sa->ip_csum_enable)
-   mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+   mbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD |
+ RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+   break;
+   case ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM:
+   mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
+   break;
+   case ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST:
+   cop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;
break;
default:
+   plt_dp_err("Success with unknown microcode completion code");
break;
}
 }
@@ -412,7 +390,6 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
if (likely(compcode == CPT_COMP_WARN)) {

Re: [PATCH v2 0/7] ixgbe SFP handling fixes

[Thomas Monjalon]

06/12/2021 23:19, Stephen Douthit:
> Hello all,

Hello, it seems to be your first contribution, welcome!

> We have several platforms based on Intel's C3000 series of SoCs that
> have integrated ixgbe devices (X550EM) operating in the "Native SFI"
> mode (the 0x15c4 device ID).

For ixgbe patches, you may Cc Haiyue Wang 
who is the maintainer of the driver.
Tip: Cc is automatic when using --cc-cmd devtools/get-maintainer.sh

> The first five patches in the series all fix issues relating to the ID
> and setup of SFPs.
> 
> Patch 6 allows slow to boot SFPs (like some XGS-PON modules) to work.
> 
> Patch 7 enables 1G Cu to run with a warning, similar to other
> unofficially supported modules covered by the allow_unsupported_sfp
> flag.  Currently we use this for g.Fast modules, but other modules that
> enumerate as 1G Cu may also benefit.
> 
> Since all of my testing was done on a C3000 platform, and the ixgbe
> driver now covers a large number of devices, any regression testing that
> can be done on other ixgbe devices would be greatly appreciated.

Larger testing can be done during the release candidate phases,
or even before -rc1 if the patches are applied quickly.
It is waiting for Intel maintainers first.

Thank you

[PATCH] app/testpmd: fix external buffer allocation

[Dmitry Kozlyuk]

External pinned buffer memory (--mp-alloc=xbuf)
was allocated as multiple IOVA-contiguous memzones
of 2M size and 2M alignment.
Due to the malloc overhead and the alignment requirement,
each 2M memzone consumed 4M of hugepage memory:
2M of usable memory + X of malloc overhead + (2M-X) padding.
The allocation often failed with 2M hugepages and IOVA-as-PA
if a PA-contiguous span of 2 hugepages could not be found.
Also, with any hugepage size and IOVA mode
memory consumption was almost 2x of the usable amount.

Alignment requirement of 2M for external buffers is redundant.
It was an attempt to ensure IOVA-contiguity
by forcing memzones to start at hugepage boundaries,
while 2M size intended to leave no unused space on the page.
As shown above, this in fact caused excessive memory consumption
and decreased the chance of a successful allocation.
RTE_MEMZONE_F_IOVA_CONTIG already ensures IOVA-contiguity.

Remove the alignment requirement.
Reduce the memzone size by the malloc overhead size (4 cache lines),
so that memory consumption for each memzone is
(2M-X) of usable memory + X of malloc overhead = 2M.
This also means that whenever there are free 2M hugepages,
an IOVA-contiguous memzone can always be allocated.

Fixes: 72512e1897b2 ("app/testpmd: add mempool with external data buffers")
Cc: sta...@dpdk.org

Signed-off-by: Dmitry Kozlyuk 
Signed-off-by: Viacheslav Ovsiienko 
---
 app/test-pmd/testpmd.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 55eb293cc0..fa04cc6be6 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -84,7 +84,13 @@
 #endif
 
 #define EXTMEM_HEAP_NAME "extmem"
-#define EXTBUF_ZONE_SIZE RTE_PGSIZE_2M
+/*
+ * Zone size with the malloc overhead (max of debug and release variants)
+ * must fit into the smallest supported hugepage size (2M),
+ * so that an IOVA-contiguous zone of this size can always be allocated
+ * if there are free 2M hugepages.
+ */
+#define EXTBUF_ZONE_SIZE (RTE_PGSIZE_2M - 4 * RTE_CACHE_LINE_SIZE)
 
 uint16_t verbose_level = 0; /**< Silent by default. */
 int testpmd_logtype; /**< Log type for testpmd logs */
@@ -1061,12 +1067,11 @@ setup_extbuf(uint32_t nb_mbufs, uint16_t mbuf_sz, 
unsigned int socket_id,
ext_num = 0;
break;
}
-   mz = rte_memzone_reserve_aligned(mz_name, EXTBUF_ZONE_SIZE,
-socket_id,
-RTE_MEMZONE_IOVA_CONTIG |
-RTE_MEMZONE_1GB |
-RTE_MEMZONE_SIZE_HINT_ONLY,
-EXTBUF_ZONE_SIZE);
+   mz = rte_memzone_reserve(mz_name, EXTBUF_ZONE_SIZE,
+socket_id,
+RTE_MEMZONE_IOVA_CONTIG |
+RTE_MEMZONE_1GB |
+RTE_MEMZONE_SIZE_HINT_ONLY);
if (mz == NULL) {
/*
 * The caller exits on external buffer creation
-- 
2.25.1

RE: [PATCH 05/12] gen: add raw packet data API and tests

[Van Haaren, Harry]

+CC Thomas;

> -Original Message-
> From: Jerin Jacob 
> Sent: Wednesday, December 15, 2021 12:41 PM
> To: Randles, Ronan 
> Cc: dpdk-dev ; Van Haaren, Harry
> 
> Subject: Re: [PATCH 05/12] gen: add raw packet data API and tests
> 
> On Tue, Dec 14, 2021 at 7:43 PM Ronan Randles 
> wrote:
> >
> > From: Harry van Haaren 



> > +   const uint32_t base_size = gen->base_pkt->pkt_len;
> > +   const uint8_t *base_data = rte_pktmbuf_mtod(gen->base_pkt, uint8_t
> *);
> 
> I think, the very next feature will be generating packets for
> incrementing IP addresses or so.

Hah, yes! It’s a logical next step, and indeed we have POC code internally that 
Ronan
and I have worked on that does this :) I've been using this internal POC of
testing of OVS for ~ a year now, and it provides a pretty nice workflow for me.

> In this case, one packet-based template will not work.

Why not? I agree that "pre-calculating" all packets will not work, but the 
approach
we have taken for this library is different. See below;

> May we worth consider that use case into API framework first and add support
> later for implementation as it may change the complete land space of API to 
> have
> better performance. Options like struct rte_gen logical object can have
> N templates instead of one is an option on the table. :-)

Agree - more complex usages have been designed for too. Let me explain;

1) A single gen instance uses a single template, and has "modifiers" that allow
manipulation of the packet before sending. The gen->base_pkt is copied to the
destination mbuf, and then updated by the modifiers. This approach is much 
better
to allow for huge flow-counts (> 1 million?) as pre-calculating and storing 1 
million
packets is a waste of memory, and causes a lot of mem-IO for the datapath core.

2) The "modifiers" approach allows any number of things to be changed, with 
little
mem-IO, and variable CPU cycle cost based on the modifiers themselves.
If the CPU cycle cost of generating packets is too high, just add more cores :)

3) There are also some smarts we can apply for pre-calculating only a small 
amount of
data per packet (e.g. uniformly-random distributed src ip). The memory 
footprint is
lower than pre-calc of whole packets, and the runtime overhead of uniform-random
is moved to configure time instead of on the datapath.

4) Dynamically generating packets by modification of templates allows for cool 
things
to be added, e.g. adding timestamps to packets, and calculating latency can
be done using the modifier concept and a protocol string 
"Ether()/IP()/UDP()/TSC()".
If the packet is being decapped by the target application, the string params 
can provide
context for where to "retrieve" the TSC from on RX in the generator: 
"TSC(rx_offset=30)".
I've found this approach to be very flexible and nice, so am a big fan :)

5) In order to have multiple streams of totally-different traffic types (read 
"from multiple templates")
the user can initialize multiple rte_gen instances. This allows applications 
that require multi-stream traffic
to achieve that too, with the same abstraction as a single template stream. 
Initially the generator app is just
providing a single stream, but this application can be expanded to many usages 
over the next year before 22.11 :)

I could ramble on a bit more, but mostly diminishing returns I think... I'll 
just use this email as a reply to Thomas' tweet;
https://twitter.com/tmonjalo/status/1337313985662771201

Regards, -Harry

[PATCH] examples/ipsec-secgw: fix default flow rule creation

[Nithin Dabilpuram]

Fix default flow rule to create after ethdev start to align
wit RTE flow spec.

Fixes: 513f192b5fd4 ("examples/ipsec-secgw: add default flow for inline Rx")
Cc: adwiv...@marvell.com
Cc: sta...@dpdk.org

Signed-off-by: Nithin Dabilpuram 
---
 examples/ipsec-secgw/ipsec-secgw.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/examples/ipsec-secgw/ipsec-secgw.c 
b/examples/ipsec-secgw/ipsec-secgw.c
index bf3dbf6..8e2aa46 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -3379,13 +3379,14 @@ main(int32_t argc, char **argv)
if ((enabled_port_mask & (1 << portid)) == 0)
continue;
 
-   /* Create flow before starting the device */
-   create_default_ipsec_flow(portid, req_rx_offloads[portid]);
-
ret = rte_eth_dev_start(portid);
if (ret < 0)
rte_exit(EXIT_FAILURE, "rte_eth_dev_start: "
"err=%d, port=%d\n", ret, portid);
+
+   /* Create flow after starting the device */
+   create_default_ipsec_flow(portid, req_rx_offloads[portid]);
+
/*
 * If enabled, put device in promiscuous mode.
 * This allows IO forwarding mode to forward packets
-- 
2.8.4

Re: [PATCH] net/mlx5: fix metadata endianness in modify field action

[Ferruh Yigit]

On 12/16/2021 9:50 AM, Slava Ovsiienko wrote:

Hi, Ferruh


-Original Message-
From: Ferruh Yigit 
Sent: Tuesday, December 7, 2021 15:45
To: Slava Ovsiienko ; dev@dpdk.org
Cc: Matan Azrad ; Raslan Darawsheh
; sta...@dpdk.org
Subject: Re: [PATCH] net/mlx5: fix metadata endianness in modify field action

On 11/29/2021 12:32 PM, Viacheslav Ovsiienko wrote:

As modify field action immediate source parameter the metadata should
follow the CPU endianness (according to SET_META action structure
format), and mlx5 PMD wrongly handled the immediate parameter

metadata

buffer as big-endian, resulting in wrong metadata set action with
incorrect endianness.

Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action")
Cc: sta...@dpdk.org

Signed-off-by: Viacheslav Ovsiienko 
---
   drivers/net/mlx5/mlx5_flow_dv.c | 23 +++
   1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
b/drivers/net/mlx5/mlx5_flow_dv.c index 4834c752d9..1c6cae8779 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1465,7 +1465,7 @@ static void
   mlx5_flow_field_id_to_modify_info
(const struct rte_flow_action_modify_data *data,
 struct field_modify_info *info, uint32_t *mask,
-uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
+uint32_t width, struct rte_eth_dev *dev,


Hi Viacheslav,

Is removing (unused) 'shift' variable related to the problem mentioned in the
commit log?

Related indirectly to metadata, but not directly to the issue.
"shift" is unused leftover after changing immediate value format.
And this patch just provides collateral cleanup. Do you think we should
separate into dedicated cleanup patch? Or mention this cleanup in commit
message?



if not directly related I think better to split on its own patch, this
makes it more clear to possible future references to the patches.

[PATCH] kernel/kni: retry the xmit in case ring is full

[Tudor Cornea]

This patch attempts to avoid dropping packets that are to be
transmitted, in case there is no space in the KNI ring.

We have a use case in which we leverage the Linux TCP / IP stack for
control plane, and some protocols might be sensitive to packet drops.

This might mean that the sender (Kernel) might be moving at a faster pace
than the receiver end (DPDK application), or it might have some brief
moments of bursty traffic patterns.

Requeuing the packets could add a kind of backpressure until a transmit
window is available to us.

The burden of retransmitting is shifted to the caller of ndo_start_xmit,
which in our case is the configured queuing discipline. This way, the
user should be able to influence the behavior w.r.t dropping packets,
by picking the desired queuing discipline.

Although it should technically be a good approach, from what
I have tested, stopping the queue prior to returning NETDEV_TX_BUSY seems
to add some extra overhead, and degrade the control-plane performance
a bit.

Signed-off-by: Tudor Cornea 
---
 kernel/linux/kni/kni_net.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/kernel/linux/kni/kni_net.c b/kernel/linux/kni/kni_net.c
index 29e5b9e..db0330f 100644
--- a/kernel/linux/kni/kni_net.c
+++ b/kernel/linux/kni/kni_net.c
@@ -321,10 +321,9 @@ kni_net_tx(struct sk_buff *skb, struct net_device *dev)
if (kni_fifo_free_count(kni->tx_q) == 0 ||
kni_fifo_count(kni->alloc_q) == 0) {
/**
-* If no free entry in tx_q or no entry in alloc_q,
-* drops skb and goes out.
+* Tell the caller to requeue, and retry at a later time.
 */
-   goto drop;
+   goto requeue;
}
 
/* dequeue a mbuf from alloc_q */
@@ -371,6 +370,10 @@ kni_net_tx(struct sk_buff *skb, struct net_device *dev)
dev->stats.tx_dropped++;
 
return NETDEV_TX_OK;
+
+requeue:
+   /* Signal the caller to re-transmit at a later time */
+   return NETDEV_TX_BUSY;
 }
 
 /*
-- 
2.7.4

RE: [RFC] cryptodev: asymmetric crypto random number source

[Kusztal, ArkadiuszX]

> -Original Message-
> From: Ramkumar Balu 
> Sent: Monday, December 13, 2021 10:27 AM
> To: Akhil Goyal ; Kusztal, ArkadiuszX
> ; Anoob Joseph ; Zhang,
> Roy Fan 
> Cc: dev@dpdk.org
> Subject: RE: [RFC] cryptodev: asymmetric crypto random number source
> 
> > ++Ram for openssl
> >
> > > ECDSA op:
> > >rte_crypto_param k;
> > >   /**< The ECDSA per-message secret number, which is an
> > >integer
> > >   * in the interval (1, n-1)
> > >   */
> > > DSA op:
> > >   No 'k'.
> > >
> > > This one I think have described some time ago:
> > > Only PMD that verifies ECDSA is OCTEON which apparently needs 'k' provided
> by user.
> > > Only PMD that verifies DSA is OpenSSL PMD which will generate its own
> random number internally.
> > >
> > > So in case PMD supports one of these options (or especially when supports
> both) we need to give some information here.
> 
> We can have a standard way to represent if a particular rte_crypto_param is 
> set
> by the application or not.  Then, it is up to the PMD to perform the op or 
> return
> error code if unable to proceed.
> 
> > >
> > > The most obvious option would be to change rte_crypto_param k ->
> > > rte_crypto_param *k In case (k == NULL) PMD should generate it itself if
> possible, otherwise it should push crypto_op to the response ring with
> appropriate error code.
> 
> This case could occur for other params as well. Having a few as nested 
> variables
> and others as pointers could be confusing for memory alloc/dealloc. However,
> the rte_crypto_param already has a data pointer inside it which can be used in
> same manner. For example, in this case (k.data == NULL), PMD should generate
> random number if possible or push to response ring with error code. This can 
> be
> done without breaking backward compatibility.
> This can be the standard way for PMDs to find if a particular 
> rte_crypto_param is
> valid or NULL.
[Arek] Agree, let keep it as easy as possible, and agree it could be useful 
elsewhere not necessarily  in random number cases.

> 
> > >
> > > Another options would be:
> > > - Extend rte_cryptodev_config and rte_cryptodev_info with
> > > information about random number generator for specific device
> > > (though it would be ABI breakage)
> > > - Provide some kind of callback to get random number from user
> > > (which could be useful for other things like RSA padding as well)
> 
> I think the previous solution itself is more straightforward and simpler 
> unless we
> want to have functionality to configure random number generator for each
> device.
> 
> Thanks,
> Ramkumar Balu
> 

RE: [RFC] Cryptodev: use rte_crypto_vec, group big-endian constraints

[Kusztal, ArkadiuszX]

From: Zhang, Roy Fan 
Sent: Thursday, December 16, 2021 4:05 PM
To: Akhil Goyal ; Kusztal, ArkadiuszX 
; Anoob Joseph 
Cc: dev@dpdk.org; Ramkumar Balu 
Subject: RE: [RFC] Cryptodev: use rte_crypto_vec, group big-endian constraints

Hi,

From: Akhil Goyal mailto:gak...@marvell.com>>
Sent: Monday, December 13, 2021 9:36 AM
To: Kusztal, ArkadiuszX 
mailto:arkadiuszx.kusz...@intel.com>>; Anoob 
Joseph mailto:ano...@marvell.com>>; Zhang, Roy Fan 
mailto:roy.fan.zh...@intel.com>>
Cc: dev@dpdk.org; Ramkumar Balu 
mailto:rb...@marvell.com>>
Subject: RE: [RFC] Cryptodev: use rte_crypto_vec, group big-endian constraints


Hi,
since DPDK 21.11 is out, we should start discussion to make asymmetric API 
stable.

-  Struct rte_crypto_vec vs struct rte_crypto_param_t

We have two almost identical functionally structs, one in _sym.h another in 
asym.h so we probably should pick one of them.
"rte_crypto_vec" additionally contains total length which will be useful 
information as PMD will overwrite "len" in many cases.
Unfortunately as "rte_crypto.h" includes "_sym.h" and "_asym.h" not other way 
around we cannot move it to "rte_crypto.h" but asymmetric will include 
symmetric anyway so it probably will not be that big of an issue.
[Akhil ] +1
[Fan] +1

-  Network byte order

   rte_crypto_param dP; /**<
   /**< dP - Private CRT component
   * Private CRT component of RSA parameter  required for CRT method
   * RSA private key operations in Octet-string network byte order
   * format.
   * dP = d mod ( p - 1 )
   */
We have plenty of these (sometimes in places where should not be, and not in 
places where should). Every member that contains this comment here is a big 
integer in big-endian format.
We could simplify it to:

/** Big integer in big-endian format */
typedef struct rte_crypto_vec rte_crypto_bigint;

   rte_crypto_bigint dP; /**< d mod ( p - 1 ) */

ED related algorithms like (EDDSA) will use little-endian bit integers so it 
will have to use different approach.

[Akhil] Using different approaches for endianness may not be a good idea. Why 
can't we use rte_crypto_vec for LE? It has a void * data. Right?
[Fan] Akhil, do you believe a comment before the param is enough?
[Arek] - Yes, for me it would be rte_crypto_vec for LE and rte_crypto_bigint 
for BE, which would correspond to what other crypto libraries propose.

Re: [PATCH 05/12] gen: add raw packet data API and tests

[Thomas Monjalon]

17/12/2021 12:40, Van Haaren, Harry:
> I could ramble on a bit more, but mostly diminishing returns I think...
> I'll just use this email as a reply to Thomas' tweet;
> https://twitter.com/tmonjalo/status/1337313985662771201

My original question was to know available applications,
not integrating such application in the DPDK repository.

I may me miss something obvious,
but I don't understand why trying to add a user app inside DPDK repo.

Re: [PATCH] kernel/kni: retry the xmit in case ring is full

[Stephen Hemminger]

On Fri, 17 Dec 2021 17:00:32 +0200
Tudor Cornea  wrote:

> This patch attempts to avoid dropping packets that are to be
> transmitted, in case there is no space in the KNI ring.
> 
> We have a use case in which we leverage the Linux TCP / IP stack for
> control plane, and some protocols might be sensitive to packet drops.
> 
> This might mean that the sender (Kernel) might be moving at a faster pace
> than the receiver end (DPDK application), or it might have some brief
> moments of bursty traffic patterns.
> 
> Requeuing the packets could add a kind of backpressure until a transmit
> window is available to us.
> 
> The burden of retransmitting is shifted to the caller of ndo_start_xmit,
> which in our case is the configured queuing discipline. This way, the
> user should be able to influence the behavior w.r.t dropping packets,
> by picking the desired queuing discipline.
> 
> Although it should technically be a good approach, from what
> I have tested, stopping the queue prior to returning NETDEV_TX_BUSY seems
> to add some extra overhead, and degrade the control-plane performance
> a bit.
> 
> Signed-off-by: Tudor Cornea 

NAK
Doing this risks having a CPU lockup if userspace does not keep up
or the DPDK application gets stuck.

There are better ways to solve the TCP stack queue overrun issue:
1. Use a better queueing discipline on the kni device. The Linux default
   of pfifo_fast has bufferbloat issues. Use fq_codel, fq, codel or pie?
2. KNI should implement BQL so that TCP stack can see lock backpressure
   about possible queue depth.

As a simple workaround increase the KNI ring size. It won't solve the whole
problem but i tcan help

mlx5: unitialized warning

[Stephen Hemminger]

Building current main branch with gcc (Debian 10.2.1-6) 10.2.1 20210110


[1843/3131] Compiling C object 
drivers/libtmp_rte_net_mlx5.a.p/net_mlx5_mlx5_flow_meter.c.o
../drivers/net/mlx5/mlx5_flow_meter.c: In function ‘mlx5_flow_meter_create’:
../drivers/net/mlx5/mlx5_flow_meter.c:1170:33: warning: ‘legacy_fm’ may be used 
uninitialized in this function [-Wmaybe-uninitialized]
 1170 |  struct mlx5_legacy_flow_meter *legacy_fm;
  | ^

[PATCH] eal: fix data race in multi-process support

[Stephen Hemminger]

If DPDK is built with thread sanitizer it reports a race
in setting of multiprocess file descriptor. The fix is to
use atomic operations when updating mp_fd.

Simple example:
$ dpdk-testpmd -l 1-3 --no-huge
EAL: Detected CPU lcores: 16
EAL: Detected NUMA nodes: 1
EAL: Static memory layout is selected, amount of reserved memory can be 
adjusted with -m or --socket-mem
EAL: Detected static linkage of DPDK
EAL: Multi-process socket /run/user/1000/dpdk/rte/mp_socket
EAL: Selected IOVA mode 'VA'
testpmd: No probed ethernet devices
testpmd: create a new mbuf pool : n=163456, size=2176, socket=0
testpmd: preferred mempool ops selected: ring_mp_mc
EAL: Error - exiting with code: 1
  Cause: Creation of mbuf pool for socket 0 failed: Cannot allocate memory
==
WARNING: ThreadSanitizer: data race (pid=83054)
  Write of size 4 at 0x55e3b7fce450 by main thread:
#0 rte_mp_channel_cleanup  (dpdk-testpmd+0x160d79c)
#1 rte_eal_cleanup  (dpdk-testpmd+0x1614fb5)
#2 rte_exit  (dpdk-testpmd+0x15ec97a)
#3 mbuf_pool_create.cold  (dpdk-testpmd+0x242e1a)
#4 main  (dpdk-testpmd+0x5ab05d)

  Previous read of size 4 at 0x55e3b7fce450 by thread T2:
#0 mp_handle  (dpdk-testpmd+0x160c979)
#1 ctrl_thread_init  (dpdk-testpmd+0x15ff76e)

  As if synchronized via sleep:
#0 nanosleep 
../../../../src/libsanitizer/tsan/tsan_interceptors_posix.cpp:362 
(libtsan.so.0+0x5cd8e)
#1 get_tsc_freq  (dpdk-testpmd+0x1622889)
#2 set_tsc_freq  (dpdk-testpmd+0x15ffb9c)
#3 rte_eal_timer_init  (dpdk-testpmd+0x1622a34)
#4 rte_eal_init.cold  (dpdk-testpmd+0x26b314)
#5 main  (dpdk-testpmd+0x5aab45)

  Location is global 'mp_fd' of size 4 at 0x55e3b7fce450 
(dpdk-testpmd+0x027c7450)

  Thread T2 'rte_mp_handle' (tid=83057, running) created by main thread at:
#0 pthread_create 
../../../../src/libsanitizer/tsan/tsan_interceptors_posix.cpp:962 
(libtsan.so.0+0x58ba2)
#1 rte_ctrl_thread_create  (dpdk-testpmd+0x15ff870)
#2 rte_mp_channel_init.cold  (dpdk-testpmd+0x269986)
#3 rte_eal_init  (dpdk-testpmd+0x1615b28)
#4 main  (dpdk-testpmd+0x5aab45)

SUMMARY: ThreadSanitizer: data race 
(/home/shemminger/DPDK/main/build/app/dpdk-testpmd+0x160d79c) in 
rte_mp_channel_cleanup
==
ThreadSanitizer: reported 1 warnings

Signed-off-by: Stephen Hemminger 
---
 lib/eal/common/eal_common_proc.c | 27 ++-
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/eal/common/eal_common_proc.c b/lib/eal/common/eal_common_proc.c
index ebd0f6673b8b..4e6c1af59833 100644
--- a/lib/eal/common/eal_common_proc.c
+++ b/lib/eal/common/eal_common_proc.c
@@ -262,7 +262,7 @@ rte_mp_action_unregister(const char *name)
 }
 
 static int
-read_msg(struct mp_msg_internal *m, struct sockaddr_un *s)
+read_msg(int fd, struct mp_msg_internal *m, struct sockaddr_un *s)
 {
int msglen;
struct iovec iov;
@@ -282,7 +282,7 @@ read_msg(struct mp_msg_internal *m, struct sockaddr_un *s)
msgh.msg_control = control;
msgh.msg_controllen = sizeof(control);
 
-   msglen = recvmsg(mp_fd, &msgh, 0);
+   msglen = recvmsg(fd, &msgh, 0);
if (msglen < 0) {
RTE_LOG(ERR, EAL, "recvmsg failed, %s\n", strerror(errno));
return -1;
@@ -383,9 +383,10 @@ mp_handle(void *arg __rte_unused)
 {
struct mp_msg_internal msg;
struct sockaddr_un sa;
+   int fd;
 
-   while (mp_fd >= 0) {
-   if (read_msg(&msg, &sa) == 0)
+   while ((fd = __atomic_load_n(&mp_fd, __ATOMIC_RELAXED)) >= 0) {
+   if (read_msg(fd, &msg, &sa) == 0)
process_msg(&msg, &sa);
}
 
@@ -537,14 +538,15 @@ static int
 open_socket_fd(void)
 {
struct sockaddr_un un;
+   int fd;
 
peer_name[0] = '\0';
if (rte_eal_process_type() == RTE_PROC_SECONDARY)
snprintf(peer_name, sizeof(peer_name),
"%d_%"PRIx64, getpid(), rte_rdtsc());
 
-   mp_fd = socket(AF_UNIX, SOCK_DGRAM, 0);
-   if (mp_fd < 0) {
+   fd = socket(AF_UNIX, SOCK_DGRAM, 0);
+   if (fd < 0) {
RTE_LOG(ERR, EAL, "failed to create unix socket\n");
return -1;
}
@@ -559,12 +561,13 @@ open_socket_fd(void)
if (bind(mp_fd, (struct sockaddr *)&un, sizeof(un)) < 0) {
RTE_LOG(ERR, EAL, "failed to bind %s: %s\n",
un.sun_path, strerror(errno));
-   close(mp_fd);
+   close(fd);
return -1;
}
 
RTE_LOG(INFO, EAL, "Multi-process socket %s\n", un.sun_path);
-   return mp_fd;
+   __atomic_store_n(&mp_fd, fd, __ATOMIC_RELAXED);
+   return fd;
 }
 
 static void
@@ -626,9 +629,8 @@ rte_mp_channel_init(void)
NULL, mp_handle, NULL) < 0) {
RTE_LOG(ERR, EAL, "failed to create mp thread: %s\n",
strerror(errno));
-   close(mp_fd

[PATCH] eal: fix data race in multi-process support

[Stephen Hemminger]

If DPDK is built with thread sanitizer it reports a race
in setting of multiprocess file descriptor. The fix is to
use atomic operations when updating mp_fd.

Simple example:
$ dpdk-testpmd -l 1-3 --no-huge
...
EAL: Error - exiting with code: 1
  Cause: Creation of mbuf pool for socket 0 failed: Cannot allocate memory
==
WARNING: ThreadSanitizer: data race (pid=83054)
  Write of size 4 at 0x55e3b7fce450 by main thread:
#0 rte_mp_channel_cleanup  (dpdk-testpmd+0x160d79c)
#1 rte_eal_cleanup  (dpdk-testpmd+0x1614fb5)
#2 rte_exit  (dpdk-testpmd+0x15ec97a)
#3 mbuf_pool_create.cold  (dpdk-testpmd+0x242e1a)
#4 main  (dpdk-testpmd+0x5ab05d)

  Previous read of size 4 at 0x55e3b7fce450 by thread T2:
#0 mp_handle  (dpdk-testpmd+0x160c979)
#1 ctrl_thread_init  (dpdk-testpmd+0x15ff76e)

  As if synchronized via sleep:
#0 nanosleep 
../../../../src/libsanitizer/tsan/tsan_interceptors_posix.cpp:362 
(libtsan.so.0+0x5cd8e)
#1 get_tsc_freq  (dpdk-testpmd+0x1622889)
#2 set_tsc_freq  (dpdk-testpmd+0x15ffb9c)
#3 rte_eal_timer_init  (dpdk-testpmd+0x1622a34)
#4 rte_eal_init.cold  (dpdk-testpmd+0x26b314)
#5 main  (dpdk-testpmd+0x5aab45)

  Location is global 'mp_fd' of size 4 at 0x55e3b7fce450 
(dpdk-testpmd+0x027c7450)

  Thread T2 'rte_mp_handle' (tid=83057, running) created by main thread at:
#0 pthread_create 
../../../../src/libsanitizer/tsan/tsan_interceptors_posix.cpp:962 
(libtsan.so.0+0x58ba2)
#1 rte_ctrl_thread_create  (dpdk-testpmd+0x15ff870)
#2 rte_mp_channel_init.cold  (dpdk-testpmd+0x269986)
#3 rte_eal_init  (dpdk-testpmd+0x1615b28)
#4 main  (dpdk-testpmd+0x5aab45)

SUMMARY: ThreadSanitizer: data race 
(/home/shemminger/DPDK/main/build/app/dpdk-testpmd+0x160d79c) in 
rte_mp_channel_cleanup
==
ThreadSanitizer: reported 1 warnings

Fixes: bacaa2754017 ("eal: add channel for multi-process communication")
Signed-off-by: Stephen Hemminger 

---
v2 - fix the mp socket bind

 lib/eal/common/eal_common_proc.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/lib/eal/common/eal_common_proc.c b/lib/eal/common/eal_common_proc.c
index ebd0f6673b8b..72c7e8f536af 100644
--- a/lib/eal/common/eal_common_proc.c
+++ b/lib/eal/common/eal_common_proc.c
@@ -262,7 +262,7 @@ rte_mp_action_unregister(const char *name)
 }
 
 static int
-read_msg(struct mp_msg_internal *m, struct sockaddr_un *s)
+read_msg(int fd, struct mp_msg_internal *m, struct sockaddr_un *s)
 {
int msglen;
struct iovec iov;
@@ -282,7 +282,7 @@ read_msg(struct mp_msg_internal *m, struct sockaddr_un *s)
msgh.msg_control = control;
msgh.msg_controllen = sizeof(control);
 
-   msglen = recvmsg(mp_fd, &msgh, 0);
+   msglen = recvmsg(fd, &msgh, 0);
if (msglen < 0) {
RTE_LOG(ERR, EAL, "recvmsg failed, %s\n", strerror(errno));
return -1;
@@ -383,9 +383,10 @@ mp_handle(void *arg __rte_unused)
 {
struct mp_msg_internal msg;
struct sockaddr_un sa;
+   int fd;
 
-   while (mp_fd >= 0) {
-   if (read_msg(&msg, &sa) == 0)
+   while ((fd = __atomic_load_n(&mp_fd, __ATOMIC_RELAXED)) >= 0) {
+   if (read_msg(fd, &msg, &sa) == 0)
process_msg(&msg, &sa);
}
 
@@ -626,9 +627,8 @@ rte_mp_channel_init(void)
NULL, mp_handle, NULL) < 0) {
RTE_LOG(ERR, EAL, "failed to create mp thread: %s\n",
strerror(errno));
-   close(mp_fd);
close(dir_fd);
-   mp_fd = -1;
+   close(__atomic_exchange_n(&mp_fd, -1, __ATOMIC_RELAXED));
return -1;
}
 
@@ -644,11 +644,10 @@ rte_mp_channel_cleanup(void)
 {
int fd;
 
-   if (mp_fd < 0)
+   fd = __atomic_exchange_n(&mp_fd, -1, __ATOMIC_RELAXED);
+   if (fd < 0)
return;
 
-   fd = mp_fd;
-   mp_fd = -1;
pthread_cancel(mp_handle_tid);
pthread_join(mp_handle_tid, NULL);
close_socket_fd(fd);
-- 
2.30.2

DTS WG discussions

[Honnappa Nagarahalli]

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RE: mlx5: unitialized warning

[Dmitry Kozlyuk]

> Building current main branch with gcc (Debian 10.2.1-6) 10.2.1 20210110
> 
> 
> [1843/3131] Compiling C object
> drivers/libtmp_rte_net_mlx5.a.p/net_mlx5_mlx5_flow_meter.c.o
> ../drivers/net/mlx5/mlx5_flow_meter.c: In function
> ‘mlx5_flow_meter_create’:
> ../drivers/net/mlx5/mlx5_flow_meter.c:1170:33: warning: ‘legacy_fm’ may be
> used uninitialized in this function [-Wmaybe-uninitialized]
>  1170 |  struct mlx5_legacy_flow_meter *legacy_fm;
>   | ^

Hi Stephen,

I don't see this warning with gcc 10.3.0 (Ubuntu 10.3.0-1ubuntu1~20.04).
Firstly, I believe it's a false positive:
legacy_fm is initialized and used only when priv->sh->meter_aso_en == false:

1237if (priv->sh->meter_aso_en) {
...
1245} else {
legacy_fm = ...
if (legacy_fm == NULL)
return ...;
...
}
...
1276if (!priv->sh->meter_aso_en)
TAILQ_INSERT_TAIL(fms, legacy_fm, next);

However, even if it's fixed in GCC between 10.2.1 and 10.3.0,
I've seen it with x86_64-w64-mingw32-gcc (GCC) 9.3-win32 20200320
while working on enabling drivers/*/mlx5 build with GCC,
so a workaround will probably still be needed.

Re: mlx5: unitialized warning

[Stephen Hemminger]

On Fri, 17 Dec 2021 19:01:31 +
Dmitry Kozlyuk  wrote:

> > Building current main branch with gcc (Debian 10.2.1-6) 10.2.1 20210110
> > 
> > 
> > [1843/3131] Compiling C object
> > drivers/libtmp_rte_net_mlx5.a.p/net_mlx5_mlx5_flow_meter.c.o
> > ../drivers/net/mlx5/mlx5_flow_meter.c: In function
> > ‘mlx5_flow_meter_create’:
> > ../drivers/net/mlx5/mlx5_flow_meter.c:1170:33: warning: ‘legacy_fm’ may be
> > used uninitialized in this function [-Wmaybe-uninitialized]
> >  1170 |  struct mlx5_legacy_flow_meter *legacy_fm;
> >   | ^  
> 
> Hi Stephen,
> 
> I don't see this warning with gcc 10.3.0 (Ubuntu 10.3.0-1ubuntu1~20.04).
> Firstly, I believe it's a false positive:
> legacy_fm is initialized and used only when priv->sh->meter_aso_en == false:
> 
> 1237  if (priv->sh->meter_aso_en) {
>   ...
> 1245  } else {
>   legacy_fm = ...
>   if (legacy_fm == NULL)
>   return ...;
>   ...
>   }
>   ...
> 1276  if (!priv->sh->meter_aso_en)
>   TAILQ_INSERT_TAIL(fms, legacy_fm, next);
> 
> However, even if it's fixed in GCC between 10.2.1 and 10.3.0,
> I've seen it with x86_64-w64-mingw32-gcc (GCC) 9.3-win32 20200320
> while working on enabling drivers/*/mlx5 build with GCC,
> so a workaround will probably still be needed.

It maybe because I was testing with thread santizer enabled and compiler
was doing different optimizations.

RE: mlx5: unitialized warning

[Dmitry Kozlyuk]

> > I don't see this warning with gcc 10.3.0 (Ubuntu 10.3.0-1ubuntu1~20.04).
[...]
> 
> It maybe because I was testing with thread santizer enabled and compiler
> was doing different optimizations.

Reproduced with -Dc_args=-fsanitize=thread, thanks!

Re: [PATCH 3/7] net/bonding: change mbuf pool and ring allocation

[Sanford, Robert]

Hello Connor,

Thank you for the questions and comments. I will repeat the questions, followed 
by my answers.

Q: Could you be more detailed, why is mbuf pool caching not needed?

A: The short answer: under certain conditions, we can run out of
buffers from that small, LACPDU-mempool. We actually saw this occur
in production, on mostly-idle links.

For a long explanation, let's assume the following:
1. 1 tx-queue per bond and underlying ethdev ports.
2. 256 tx-descriptors (per ethdev port).
3. 257 mbufs in each port's LACPDU-pool, as computed by
bond_mode_8023ad_activate_slave(), and cache-size 32.
4. The "app" xmits zero packets to this bond for a long time.
5. In EAL intr thread context, LACP tx_machine() allocates 1 mbuf
(LACPDU) per second from the pool, and puts it into LACP tx-ring.
6. Every second, another thread, let's call it the tx-core, calls
tx-burst (with zero packets to xmit), finds 1 mbuf on LACP tx-ring,
and underlying ethdev PMD puts mbuf data into a tx-desc.
7. PMD tx-burst configured not to clean up used tx-descs until
there are almost none free, e.g., less than pool's cache-size *
CACHE_FLUSH_THRESH_MULTIPLIER (1.5).
8. When cleaning up tx-descs, we may leave up to 47 mbufs in the
tx-core's LACPDU-pool cache (not accessible from intr thread).

When the number of used tx-descs (0..255) + number of mbufs in the
cache (0..47) reaches 257, then allocation fails.

If I understand the LACP tx-burst code correctly, it would be
worse if nb_tx_queues > 1, because (assuming multiple tx-cores)
any queue/lcore could xmit an LACPDU. Thus, up to nb_tx_queues *
47 mbufs could be cached, and not accessible from tx_machine().

You would not see this problem if the app xmits other (non-LACP)
mbufs on a regular basis, to expedite the clean-up of tx-descs
including LACPDU mbufs (unless nb_tx_queues tx-core caches
could hold all LACPDU mbufs).

If we make mempool's cache size 0, then allocation will not fail.

A mempool cache for LACPDUs does not offer much additional speed:
during alloc, the intr thread does not have default mempool caches
(AFAIK); and the average time between frees is either 1 second (LACP
short timeouts) or 10 seconds (long timeouts), i.e., infrequent.



Q: Why reserve one additional slot in the rx and tx rings?

A: rte_ring_create() requires the ring size N, to be a power of 2,
but it can only store N-1 items. Thus, if we want to store X items,
we need to ask for (at least) X+1. Original code fails when the real
desired size is a power of 2, because in such a case, align32pow2
does not round up.

For example, say we want a ring to hold 4:

rte_ring_create(... rte_align32pow2(4) ...)

rte_align32pow2(4) returns 4, and we end up with a ring that only
stores 3 items.

rte_ring_create(... rte_align32pow2(4+1) ...)

rte_align32pow2(5) returns 8, and we end up with a ring that
stores up to 7 items, more than we need, but acceptable.



Q: I found the comment for BOND_MODE_8023AX_SLAVE_RX_PKTS is
wrong, could you fix it in this patch?

A: Yes, I will fix it in the next version of the patch.

--
Regards,
Robert Sanford


On 12/16/21, 4:01 AM, "Min Hu (Connor)"  wrote:

Hi, Robert,

在 2021/12/16 2:19, Robert Sanford 写道:
> - Turn off mbuf pool caching to avoid mbufs lingering in pool caches.
>At most, we transmit one LACPDU per second, per port.
Could you be more detailed, why does mbuf pool caching is not needed?

> - Fix calculation of ring sizes, taking into account that a ring of
>size N holds up to N-1 items.
Same to that, why should resvere another items ?
> 
By the way, I found the comment for BOND_MODE_8023AX_SLAVE_RX_PKTS is
is wrong, could you fix it in this patch?
> Signed-off-by: Robert Sanford 
> ---
>   drivers/net/bonding/rte_eth_bond_8023ad.c | 14 --
>   1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/bonding/rte_eth_bond_8023ad.c 
b/drivers/net/bonding/rte_eth_bond_8023ad.c
> index 43231bc..83d3938 100644
> --- a/drivers/net/bonding/rte_eth_bond_8023ad.c
> +++ b/drivers/net/bonding/rte_eth_bond_8023ad.c
> @@ -1101,9 +1101,7 @@ bond_mode_8023ad_activate_slave(struct rte_eth_dev 
*bond_dev,
>   }
>   
>   snprintf(mem_name, RTE_DIM(mem_name), "slave_port%u_pool", 
slave_id);
> - port->mbuf_pool = rte_pktmbuf_pool_create(mem_name, total_tx_desc,
> - RTE_MEMPOOL_CACHE_MAX_SIZE >= 32 ?
> - 32 : RTE_MEMPOOL_CACHE_MAX_SIZE,
> + port->mbuf_pool = rte_pktmbuf_pool_create(mem_name, total_tx_desc, 0,
>   0, element_size, socket_id);
>   
>   /* Any memory allocation failure in initialization is critical 
because
> @@ -1113,19 +,23 @@ bond_mode_8023ad_activate_slave(struct 
rte_eth_dev *bond_dev,
>   slave_id, mem_name, rte_strerror(rte_errno));
>   }
>   
> + /* Add one extra

Re: mlx5: unitialized warning

[Stephen Hemminger]

On Fri, 17 Dec 2021 19:28:26 +
Dmitry Kozlyuk  wrote:

> > > I don't see this warning with gcc 10.3.0 (Ubuntu 10.3.0-1ubuntu1~20.04).  
> [...]
> > 
> > It maybe because I was testing with thread santizer enabled and compiler
> > was doing different optimizations.  
> 
> Reproduced with -Dc_args=-fsanitize=thread, thanks!

I was using
   -Db_sanitize=thread
which is the meson way to do it

Ramaxel roadmap for 22.03

[Yanling Song]

Please find below Ramaxel roadmap for v22.03 release:

Introduce SPNIC driver for Ramaxel's SPNxx serial NIC cards into DPDK
22.03. 
Ramaxel Memory Technology is a company which supply a lot of
electric products in several fields: storage, communication, PCB...
SPNxxx is a serial PCIE interface NIC cards:
SPN110: 2 PORTs *25G
SPN120: 4 PORTs *25G
SPN130: 2 PORTs *100G

The following is main features of SPNxxx NIC cards:
- TSO
- LRO
- Flow control
- SR-IOV(Partially supported)
- VLAN offload
- VLAN filter
- CRC offload
- Promiscuous mode
- RSS

[PATCH v1 01/25] drivers/net: introduce a new PMD driver

[Yanling Song]

Introduce a new PMD driver which names spnic.
Now, this driver only implements module entry
without doing anything else.

Signed-off-by: Yanling Song 
---
 drivers/net/meson.build   |   1 +
 drivers/net/spnic/base/meson.build|  26 
 drivers/net/spnic/base/spnic_compat.h | 188 ++
 drivers/net/spnic/meson.build |  11 ++
 drivers/net/spnic/spnic_ethdev.c  | 107 +++
 drivers/net/spnic/spnic_ethdev.h  |  28 
 drivers/net/spnic/version.map |   3 +
 7 files changed, 364 insertions(+)
 create mode 100644 drivers/net/spnic/base/meson.build
 create mode 100644 drivers/net/spnic/base/spnic_compat.h
 create mode 100644 drivers/net/spnic/meson.build
 create mode 100644 drivers/net/spnic/spnic_ethdev.c
 create mode 100644 drivers/net/spnic/spnic_ethdev.h
 create mode 100644 drivers/net/spnic/version.map

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 2355d1cde8..a5c715f59c 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -53,6 +53,7 @@ drivers = [
 'ring',
 'sfc',
 'softnic',
+   'spnic',
 'tap',
 'thunderx',
 'txgbe',
diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
new file mode 100644
index 00..e83a473881
--- /dev/null
+++ b/drivers/net/spnic/base/meson.build
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+
+sources = [
+]
+
+extra_flags = []
+# The driver runs only on arch64 machine, remove 32bit warnings
+if not dpdk_conf.get('RTE_ARCH_64')
+extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
+endif
+
+foreach flag: extra_flags
+if cc.has_argument(flag)
+cflags += flag
+endif
+endforeach
+
+deps += ['hash']
+cflags += ['-DHW_CONVERT_ENDIAN']
+c_args = cflags
+
+base_lib = static_library('spnic_base', sources,
+   dependencies: [static_rte_eal, static_rte_ethdev, static_rte_bus_pci, 
static_rte_hash],
+   c_args: c_args)
+base_objs = base_lib.extract_all_objects()
diff --git a/drivers/net/spnic/base/spnic_compat.h 
b/drivers/net/spnic/base/spnic_compat.h
new file mode 100644
index 00..dd0ea2a04e
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_compat.h
@@ -0,0 +1,188 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#ifndef _SPNIC_COMPAT_H_
+#define _SPNIC_COMPAT_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+typedef uint8_t   u8;
+typedef int8_ts8;
+typedef uint16_t  u16;
+typedef uint32_t  u32;
+typedef int32_t   s32;
+typedef uint64_t  u64;
+
+#ifndef BIT
+#define BIT(n) (1 << (n))
+#endif
+
+#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
+#define lower_32_bits(n) ((u32)(n))
+
+#define SPNIC_MEM_ALLOC_ALIGN_MIN  1
+
+#define SPNIC_DRIVER_NAME "spnic"
+
+extern int spnic_logtype;
+
+#define PMD_DRV_LOG(level, fmt, args...) \
+   rte_log(RTE_LOG_ ## level, spnic_logtype, \
+   SPNIC_DRIVER_NAME ": " fmt "\n", ##args)
+
+/* Bit order interface */
+#define cpu_to_be16(o) rte_cpu_to_be_16(o)
+#define cpu_to_be32(o) rte_cpu_to_be_32(o)
+#define cpu_to_be64(o) rte_cpu_to_be_64(o)
+#define cpu_to_le32(o) rte_cpu_to_le_32(o)
+#define be16_to_cpu(o) rte_be_to_cpu_16(o)
+#define be32_to_cpu(o) rte_be_to_cpu_32(o)
+#define be64_to_cpu(o) rte_be_to_cpu_64(o)
+#define le32_to_cpu(o) rte_le_to_cpu_32(o)
+
+#define ARRAY_LEN(arr) ((sizeof(arr) / sizeof((arr)[0])))
+
+#ifdef CLOCK_MONOTONIC_RAW /* Defined in glibc bits/time.h */
+#define CLOCK_TYPE CLOCK_MONOTONIC_RAW
+#else
+#define CLOCK_TYPE CLOCK_MONOTONIC
+#endif
+
+#define SPNIC_MUTEX_TIMEOUT10
+#define SPNIC_S_TO_MS_UNIT 1000
+#define SPNIC_S_TO_NS_UNIT 100
+
+static inline unsigned long clock_gettime_ms(void)
+{
+   struct timespec tv;
+
+   (void)clock_gettime(CLOCK_TYPE, &tv);
+
+   return (unsigned long)tv.tv_sec * SPNIC_S_TO_MS_UNIT +
+  (unsigned long)tv.tv_nsec / SPNIC_S_TO_NS_UNIT;
+}
+
+#define jiffiesclock_gettime_ms()
+#define msecs_to_jiffies(ms)   (ms)
+#define time_before(now, end)  ((now) < (end))
+
+/**
+ * Convert data to big endian 32 bit format
+ *
+ * @param data
+ *   The data to convert
+ * @param len
+ *   Length of data to convert, must be Multiple of 4B
+ */
+static inline void spnic_cpu_to_be32(void *data, int len)
+{
+   int i, chunk_sz = sizeof(u32);
+   u32 *mem = data;
+
+   if (!data)
+   return;
+
+   len = len / chunk_sz;
+
+   for (i = 0; i < len; i++) {
+   *mem = cpu_to_be32(*mem);
+   mem++;
+   }
+}
+
+/**
+ * Convert data from big endian 32 bit format
+ *
+ * @param data
+ *   The data to convert
+ * @param len
+ *   Length of data to convert, must be Mul

[PATCH v1 00/25] Net/SPNIC: support SPNIC into DPDK 22.03

[Yanling Song]

The patchsets introduce SPNIC driver for Ramaxel's SPNxx serial NIC cards into 
DPDK 22.03.
Ramaxel Memory Technology is a company which supply a lot of electric products: 
storage, communication, PCB...
SPNxxx is a serial PCIE interface NIC cards:
SPN110: 2 PORTs *25G
SPN120: 4 PORTs *25G
SPN130: 2 PORTs *100G

The following is main features of our SPNIC:
- TSO
- LRO
- Flow control
- SR-IOV(Partially supported)
- VLAN offload
- VLAN filter
- CRC offload
- Promiscuous mode
- RSS

Yanling Song (25):
  drivers/net: introduce a new PMD driver
  net/spnic: initialize the HW interface
  net/spnic: add mbox message channel
  net/spnic: introduce event queue
  net/spnic: add mgmt module
  net/spnic: add cmdq and work queue
  net/spnic: add interface handling cmdq message
  net/spnic: add hardware info initialization
  net/spnic: support MAC and link event handling
  net/spnic: add function info initialization
  net/spnic: add queue pairs context initialization
  net/spnic: support mbuf handling of Tx/Rx
  net/spnic: support Rx congfiguration
  net/spnic: add port/vport enable
  net/spnic: support IO packets handling
  net/spnic: add device configure/version/info
  net/spnic: support RSS configuration update and get
  net/spnic: support VLAN filtering and offloading
  net/spnic: support promiscuous and allmulticast Rx  modes
  net/spnic: support flow control
  net/spnic: support getting Tx/Rx queues info
  net/spnic: net/spnic: support xstats statistics
  net/spnic: support VFIO interrupt
  net/spnic: support Tx/Rx queue start/stop
  net/spnic: add doc infrastructure

 MAINTAINERS  |6 +
 doc/guides/nics/features/spnic.ini   |   40 +
 doc/guides/nics/spnic.rst|   61 +
 drivers/net/meson.build  |1 +
 drivers/net/spnic/base/meson.build   |   37 +
 drivers/net/spnic/base/spnic_cmd.h   |  222 ++
 drivers/net/spnic/base/spnic_cmdq.c  |  875 ++
 drivers/net/spnic/base/spnic_cmdq.h  |  248 ++
 drivers/net/spnic/base/spnic_compat.h|  188 ++
 drivers/net/spnic/base/spnic_csr.h   |  104 +
 drivers/net/spnic/base/spnic_eqs.c   |  661 +
 drivers/net/spnic/base/spnic_eqs.h   |  102 +
 drivers/net/spnic/base/spnic_hw_cfg.c|  212 ++
 drivers/net/spnic/base/spnic_hw_cfg.h|  125 +
 drivers/net/spnic/base/spnic_hw_comm.c   |  485 
 drivers/net/spnic/base/spnic_hw_comm.h   |  204 ++
 drivers/net/spnic/base/spnic_hwdev.c |  514 
 drivers/net/spnic/base/spnic_hwdev.h |  143 +
 drivers/net/spnic/base/spnic_hwif.c  |  774 ++
 drivers/net/spnic/base/spnic_hwif.h  |  155 ++
 drivers/net/spnic/base/spnic_mbox.c  | 1187 
 drivers/net/spnic/base/spnic_mbox.h  |  202 ++
 drivers/net/spnic/base/spnic_mgmt.c  |  367 +++
 drivers/net/spnic/base/spnic_mgmt.h  |  110 +
 drivers/net/spnic/base/spnic_nic_cfg.c   | 1348 +
 drivers/net/spnic/base/spnic_nic_cfg.h   | 1110 
 drivers/net/spnic/base/spnic_nic_event.c |  194 ++
 drivers/net/spnic/base/spnic_nic_event.h |   29 +
 drivers/net/spnic/base/spnic_wq.c|  139 +
 drivers/net/spnic/base/spnic_wq.h|  123 +
 drivers/net/spnic/meson.build|   14 +
 drivers/net/spnic/spnic_ethdev.c | 3231 ++
 drivers/net/spnic/spnic_ethdev.h |   95 +
 drivers/net/spnic/spnic_io.c |  738 +
 drivers/net/spnic/spnic_io.h |  154 ++
 drivers/net/spnic/spnic_rx.c |  956 +++
 drivers/net/spnic/spnic_rx.h |  326 +++
 drivers/net/spnic/spnic_tx.c |  858 ++
 drivers/net/spnic/spnic_tx.h |  297 ++
 drivers/net/spnic/version.map|3 +
 40 files changed, 16638 insertions(+)
 create mode 100644 doc/guides/nics/features/spnic.ini
 create mode 100644 doc/guides/nics/spnic.rst
 create mode 100644 drivers/net/spnic/base/meson.build
 create mode 100644 drivers/net/spnic/base/spnic_cmd.h
 create mode 100644 drivers/net/spnic/base/spnic_cmdq.c
 create mode 100644 drivers/net/spnic/base/spnic_cmdq.h
 create mode 100644 drivers/net/spnic/base/spnic_compat.h
 create mode 100644 drivers/net/spnic/base/spnic_csr.h
 create mode 100644 drivers/net/spnic/base/spnic_eqs.c
 create mode 100644 drivers/net/spnic/base/spnic_eqs.h
 create mode 100644 drivers/net/spnic/base/spnic_hw_cfg.c
 create mode 100644 drivers/net/spnic/base/spnic_hw_cfg.h
 create mode 100644 drivers/net/spnic/base/spnic_hw_comm.c
 create mode 100644 drivers/net/spnic/base/spnic_hw_comm.h
 create mode 100644 drivers/net/spnic/base/spnic_hwdev.c
 create mode 100644 drivers/net/spnic/base/spnic_hwdev.h
 create mode 100644 drivers/net/spnic/base/spnic_hwif.c
 create mode 100644 drivers/net/spnic/base/spnic_hwif.h
 create mode 100644 drivers/net/spnic/base/spnic_mbox.c
 create mode 100644 drivers/net/spnic/base/spnic_mbox.h
 create mode 100644 drivers/net/spnic/base/spnic_mgmt.c
 create mode 100644 drivers/net/spnic/base/spnic_mgmt.h
 create mod

[PATCH v1 02/25] net/spnic: initialize the HW interface

[Yanling Song]

Add HW interface registers and initialize the HW
interface.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build   |   2 +
 drivers/net/spnic/base/spnic_csr.h   | 104 
 drivers/net/spnic/base/spnic_hwdev.c |  41 ++
 drivers/net/spnic/base/spnic_hwdev.h |  29 +
 drivers/net/spnic/base/spnic_hwif.c  | 774 +++
 drivers/net/spnic/base/spnic_hwif.h  | 155 ++
 drivers/net/spnic/spnic_ethdev.c |  66 +++
 drivers/net/spnic/spnic_ethdev.h |  48 +-
 8 files changed, 1212 insertions(+), 7 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_csr.h
 create mode 100644 drivers/net/spnic/base/spnic_hwdev.c
 create mode 100644 drivers/net/spnic/base/spnic_hwdev.h
 create mode 100644 drivers/net/spnic/base/spnic_hwif.c
 create mode 100644 drivers/net/spnic/base/spnic_hwif.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index e83a473881..edd6e94772 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -2,6 +2,8 @@
 # Copyright(c) 2021 Ramaxel Memory Technology, Ltd
 
 sources = [
+   'spnic_hwdev.c',
+   'spnic_hwif.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_csr.h 
b/drivers/net/spnic/base/spnic_csr.h
new file mode 100644
index 00..602d5de6b1
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_csr.h
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#ifndef _SPNIC_CSR_H_
+#define _SPNIC_CSR_H_
+
+#define PCI_VENDOR_ID_RAMAXEL  0x1E81
+
+/* Device ids */
+#define SPNIC_DEV_ID_PF0x9020
+#define SPNIC_DEV_ID_VF0x9001
+
+/*
+ * Bit30/bit31 for bar index flag
+ * 00: bar0
+ * 01: bar1
+ * 10: bar2
+ * 11: bar3
+ */
+#define SPNIC_CFG_REGS_FLAG0x4000
+
+#define SPNIC_MGMT_REGS_FLAG   0xC000
+
+#define SPNIC_REGS_FLAG_MAKS   0x3FFF
+
+#define SPNIC_VF_CFG_REG_OFFSET 0x2000
+
+#define SPNIC_HOST_CSR_BASE_ADDR   (SPNIC_MGMT_REGS_FLAG + 0x6000)
+#define SPNIC_CSR_GLOBAL_BASE_ADDR (SPNIC_MGMT_REGS_FLAG + 0x6400)
+
+/* HW interface registers */
+#define SPNIC_CSR_FUNC_ATTR0_ADDR  (SPNIC_CFG_REGS_FLAG + 0x0)
+#define SPNIC_CSR_FUNC_ATTR1_ADDR  (SPNIC_CFG_REGS_FLAG + 0x4)
+#define SPNIC_CSR_FUNC_ATTR2_ADDR  (SPNIC_CFG_REGS_FLAG + 0x8)
+#define SPNIC_CSR_FUNC_ATTR3_ADDR  (SPNIC_CFG_REGS_FLAG + 0xC)
+#define SPNIC_CSR_FUNC_ATTR4_ADDR  (SPNIC_CFG_REGS_FLAG + 0x10)
+#define SPNIC_CSR_FUNC_ATTR5_ADDR  (SPNIC_CFG_REGS_FLAG + 0x14)
+#define SPNIC_CSR_FUNC_ATTR6_ADDR  (SPNIC_CFG_REGS_FLAG + 0x18)
+
+#define SPNIC_FUNC_CSR_MAILBOX_DATA_OFF0x80
+#define SPNIC_FUNC_CSR_MAILBOX_CONTROL_OFF (SPNIC_CFG_REGS_FLAG + 0x0100)
+#define SPNIC_FUNC_CSR_MAILBOX_INT_OFFSET_OFF  (SPNIC_CFG_REGS_FLAG + 0x0104)
+#define SPNIC_FUNC_CSR_MAILBOX_RESULT_H_OFF(SPNIC_CFG_REGS_FLAG + 0x0108)
+#define SPNIC_FUNC_CSR_MAILBOX_RESULT_L_OFF(SPNIC_CFG_REGS_FLAG + 0x010C)
+
+#define SPNIC_PPF_ELECTION_OFFSET  0x0
+#define SPNIC_MPF_ELECTION_OFFSET  0x20
+
+#define SPNIC_CSR_PPF_ELECTION_ADDR\
+   (SPNIC_HOST_CSR_BASE_ADDR + SPNIC_PPF_ELECTION_OFFSET)
+
+#define SPNIC_CSR_GLOBAL_MPF_ELECTION_ADDR \
+   (SPNIC_HOST_CSR_BASE_ADDR + SPNIC_MPF_ELECTION_OFFSET)
+
+#define SPNIC_CSR_DMA_ATTR_TBL_ADDR(SPNIC_CFG_REGS_FLAG + 0x380)
+#define SPNIC_CSR_DMA_ATTR_INDIR_IDX_ADDR  (SPNIC_CFG_REGS_FLAG + 0x390)
+
+/* MSI-X registers */
+#define SPNIC_CSR_MSIX_INDIR_IDX_ADDR  (SPNIC_CFG_REGS_FLAG + 0x310)
+#define SPNIC_CSR_MSIX_CTRL_ADDR   (SPNIC_CFG_REGS_FLAG + 0x300)
+#define SPNIC_CSR_MSIX_CNT_ADDR(SPNIC_CFG_REGS_FLAG + 
0x304)
+#define SPNIC_CSR_FUNC_MSI_CLR_WR_ADDR (SPNIC_CFG_REGS_FLAG + 0x58)
+
+#define SPNIC_MSI_CLR_INDIR_RESEND_TIMER_CLR_SHIFT 0
+#define SPNIC_MSI_CLR_INDIR_INT_MSK_SET_SHIFT  1
+#define SPNIC_MSI_CLR_INDIR_INT_MSK_CLR_SHIFT  2
+#define SPNIC_MSI_CLR_INDIR_AUTO_MSK_SET_SHIFT 3
+#define SPNIC_MSI_CLR_INDIR_AUTO_MSK_CLR_SHIFT 4
+#define SPNIC_MSI_CLR_INDIR_SIMPLE_INDIR_IDX_SHIFT 22
+
+#define SPNIC_MSI_CLR_INDIR_RESEND_TIMER_CLR_MASK  0x1U
+#define SPNIC_MSI_CLR_INDIR_INT_MSK_SET_MASK   0x1U
+#define SPNIC_MSI_CLR_INDIR_INT_MSK_CLR_MASK   0x1U
+#define SPNIC_MSI_CLR_INDIR_AUTO_MSK_SET_MASK  0x1U
+#define SPNIC_MSI_CLR_INDIR_AUTO_MSK_CLR_MASK  0x1U
+#define SPNIC_MSI_CLR_INDIR_SIMPLE_INDIR_IDX_MASK  0x3FFU
+
+#define SPNIC_MSI_CLR_INDIR_SET(val, member)   \
+   (((val) & SPNIC_MSI_CLR_INDIR_##member##_MASK) << \
+   SPNIC_MSI_CLR_INDIR_##member##_SHIFT)
+
+/* EQ registers */
+#de

[PATCH v1 05/25] net/spnic: add mgmt module

[Yanling Song]

Mgmt module manage the message gerenated from the hardware.
This patch implements mgmt module initialization, related event
processing and message command definition.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build   |   4 +-
 drivers/net/spnic/base/spnic_cmd.h   | 222 ++
 drivers/net/spnic/base/spnic_eqs.c   |  46 ++-
 drivers/net/spnic/base/spnic_hwdev.c |  91 +-
 drivers/net/spnic/base/spnic_hwdev.h |  66 +++-
 drivers/net/spnic/base/spnic_mbox.c  |  17 ++
 drivers/net/spnic/base/spnic_mgmt.c  | 367 +++
 drivers/net/spnic/base/spnic_mgmt.h  |  74 +
 drivers/net/spnic/base/spnic_nic_event.c | 171 +++
 drivers/net/spnic/base/spnic_nic_event.h |  34 +++
 10 files changed, 1081 insertions(+), 11 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_cmd.h
 create mode 100644 drivers/net/spnic/base/spnic_mgmt.c
 create mode 100644 drivers/net/spnic/base/spnic_nic_event.c
 create mode 100644 drivers/net/spnic/base/spnic_nic_event.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index ce7457f400..3f6a060b37 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -5,7 +5,9 @@ sources = [
'spnic_eqs.c',
'spnic_hwdev.c',
'spnic_hwif.c',
-   'spnic_mbox.c'
+   'spnic_mbox.c',
+   'spnic_mgmt.c',
+   'spnic_nic_event.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_cmd.h 
b/drivers/net/spnic/base/spnic_cmd.h
new file mode 100644
index 00..8900489eef
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_cmd.h
@@ -0,0 +1,222 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#ifndef _SPNIC_CMD_H_
+#define _SPNIC_CMD_H_
+
+#define NIC_RSS_TEMP_ID_TO_CTX_LT_IDX(tmp_id)  tmp_id
+/* Begin of one temp tbl */
+#define NIC_RSS_TEMP_ID_TO_INDIR_LT_IDX(tmp_id)((tmp_id) << 4)
+/* 4 ctx in one entry */
+#define NIC_RSS_CTX_TBL_ENTRY_SIZE 0x10
+/* Entry size = 16B, 16 entry/template */
+#define NIC_RSS_INDIR_TBL_ENTRY_SIZE   0x10
+/* Entry size = 16B, so entry_num = 256B/16B */
+#define NIC_RSS_INDIR_TBL_ENTRY_NUM0x10
+
+#define NIC_UP_RSS_INVALID_TEMP_ID 0xFF
+#define NIC_UP_RSS_INVALID_FUNC_ID 0x
+#define NIC_UP_RSS_INVALID 0x00
+#define NIC_UP_RSS_EN  0x01
+#define NIC_UP_RSS_INVALID_GROUP_ID0x7F
+
+#define NIC_RSS_CMD_TEMP_ALLOC 0x01
+#define NIC_RSS_CMD_TEMP_FREE  0x02
+
+#define SPNIC_RSS_TYPE_VALID_SHIFT 23
+#define SPNIC_RSS_TYPE_TCP_IPV6_EXT_SHIFT  24
+#define SPNIC_RSS_TYPE_IPV6_EXT_SHIFT  25
+#define SPNIC_RSS_TYPE_TCP_IPV6_SHIFT  26
+#define SPNIC_RSS_TYPE_IPV6_SHIFT  27
+#define SPNIC_RSS_TYPE_TCP_IPV4_SHIFT  28
+#define SPNIC_RSS_TYPE_IPV4_SHIFT  29
+#define SPNIC_RSS_TYPE_UDP_IPV6_SHIFT  30
+#define SPNIC_RSS_TYPE_UDP_IPV4_SHIFT  31
+#define SPNIC_RSS_TYPE_SET(val, member)\
+   (((u32)(val) & 0x1) << SPNIC_RSS_TYPE_##member##_SHIFT)
+
+#define SPNIC_RSS_TYPE_GET(val, member)\
+   (((u32)(val) >> SPNIC_RSS_TYPE_##member##_SHIFT) & 0x1)
+
+/* NIC CMDQ MODE */
+typedef enum spnic_ucode_cmd {
+   SPNIC_UCODE_CMD_MODIFY_QUEUE_CTX = 0,
+   SPNIC_UCODE_CMD_CLEAN_QUEUE_CONTEXT,
+   SPNIC_UCODE_CMD_ARM_SQ,
+   SPNIC_UCODE_CMD_ARM_RQ,
+   SPNIC_UCODE_CMD_SET_RSS_INDIR_TABLE,
+   SPNIC_UCODE_CMD_SET_RSS_CONTEXT_TABLE,
+   SPNIC_UCODE_CMD_GET_RSS_INDIR_TABLE,
+   SPNIC_UCODE_CMD_GET_RSS_CONTEXT_TABLE,
+   SPNIC_UCODE_CMD_SET_IQ_ENABLE,
+   SPNIC_UCODE_CMD_SET_RQ_FLUSH = 10,
+   SPNIC_UCODE_CMD_MODIFY_VLAN_CTX,
+   SPNIC_UCODE_CMD_DPI_FLOW
+} cmdq_nic_subtype_e;
+
+/*
+ * Commands between NIC and MPU
+ */
+enum spnic_cmd {
+   SPNIC_CMD_VF_REGISTER = 0, /* only for PFD and VFD */
+
+   /* FUNC CFG */
+   SPNIC_CMD_SET_FUNC_TBL = 5,
+   SPNIC_CMD_SET_VPORT_ENABLE,
+   SPNIC_CMD_SET_RX_MODE,
+   SPNIC_CMD_SQ_CI_ATTR_SET,
+   SPNIC_CMD_GET_VPORT_STAT,
+   SPNIC_CMD_CLEAN_VPORT_STAT,
+   SPNIC_CMD_CLEAR_QP_RESOURCE,
+   SPNIC_CMD_CFG_FLEX_QUEUE,
+   /* LRO CFG */
+   SPNIC_CMD_CFG_RX_LRO,
+   SPNIC_CMD_CFG_LRO_TIMER,
+   SPNIC_CMD_FEATURE_NEGO,
+
+   /* MAC & VLAN CFG */
+   SPNIC_CMD_GET_MAC = 20,
+   SPNIC_CMD_SET_MAC,
+   SPNIC_CMD_DEL_MAC,
+   SPNIC_CMD_UPDATE_MAC,
+   SPNIC_CMD_GET_ALL_DEFAULT_MAC,
+
+   SPNIC_CMD_CFG_FUNC_VLAN,
+   SPNIC_CMD_SET_VLAN_FILTER_EN,
+   SPNIC_CMD_SET_RX_VLAN_OFFLOAD,
+
+   /* SR-IOV */
+   SPNIC_CMD_CFG_VF_VLAN = 40,
+   SPNIC_CMD_SET_SPOOPCHK_STATE,
+   /* RATE LIMIT */
+   SPNIC_CMD_SET_MAX_MIN_RATE,
+
+   /* RSS CFG */
+   SPNIC_CMD_RSS_CFG = 60,
+   SPNIC_CMD_RSS_TEMP_MGR,

[PATCH v1 07/25] net/spnic: add interface handling cmdq message

[Yanling Song]

This commit adds cmdq_sync_cmd_direct_resp() and
cmdq_sync_cmd_detail_resp() interfaces by which driver can send
cmdq message using wqe a data structure describe the buffer.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build |   1 +
 drivers/net/spnic/base/spnic_cmdq.c| 673 +
 drivers/net/spnic/base/spnic_cmdq.h|  20 +
 drivers/net/spnic/base/spnic_hw_comm.c |  41 ++
 drivers/net/spnic/base/spnic_hwdev.c   |   8 +-
 drivers/net/spnic/base/spnic_hwdev.h   |  13 +
 drivers/net/spnic/base/spnic_wq.c  | 139 +
 drivers/net/spnic/base/spnic_wq.h  |  70 ++-
 8 files changed, 960 insertions(+), 5 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_wq.c

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index 5e4efac7be..da6d6ee4a2 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -10,6 +10,7 @@ sources = [
'spnic_nic_event.c',
'spnic_cmdq.c',
'spnic_hw_comm.c',
+   'spnic_wq.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_cmdq.c 
b/drivers/net/spnic/base/spnic_cmdq.c
index ccfcf739a0..3ab518eade 100644
--- a/drivers/net/spnic/base/spnic_cmdq.c
+++ b/drivers/net/spnic/base/spnic_cmdq.c
@@ -12,6 +12,71 @@
 #include "spnic_mgmt.h"
 #include "spnic_cmdq.h"
 
+#define CMDQ_CMD_TIMEOUT   30 /* Millisecond */
+
+#define UPPER_8_BITS(data) (((data) >> 8) & 0xFF)
+#define LOWER_8_BITS(data) ((data) & 0xFF)
+
+#define CMDQ_DB_INFO_HI_PROD_IDX_SHIFT 0
+#define CMDQ_DB_INFO_HI_PROD_IDX_MASK  0xFFU
+
+#define CMDQ_DB_INFO_SET(val, member)  \
+   u32)(val)) & CMDQ_DB_INFO_##member##_MASK) \
+   << CMDQ_DB_INFO_##member##_SHIFT)
+#define CMDQ_DB_INFO_UPPER_32(val) ((u64)(val) << 32)
+
+#define CMDQ_DB_HEAD_QUEUE_TYPE_SHIFT  23
+#define CMDQ_DB_HEAD_CMDQ_TYPE_SHIFT   24
+#define CMDQ_DB_HEAD_SRC_TYPE_SHIFT27
+#define CMDQ_DB_HEAD_QUEUE_TYPE_MASK   0x1U
+#define CMDQ_DB_HEAD_CMDQ_TYPE_MASK0x7U
+#define CMDQ_DB_HEAD_SRC_TYPE_MASK 0x1FU
+#define CMDQ_DB_HEAD_SET(val, member)  \
+   u32)(val)) & CMDQ_DB_HEAD_##member##_MASK) << \
+   CMDQ_DB_HEAD_##member##_SHIFT)
+
+#define CMDQ_CTRL_PI_SHIFT 0
+#define CMDQ_CTRL_CMD_SHIFT16
+#define CMDQ_CTRL_MOD_SHIFT24
+#define CMDQ_CTRL_ACK_TYPE_SHIFT   29
+#define CMDQ_CTRL_HW_BUSY_BIT_SHIFT31
+
+#define CMDQ_CTRL_PI_MASK  0xU
+#define CMDQ_CTRL_CMD_MASK 0xFFU
+#define CMDQ_CTRL_MOD_MASK 0x1FU
+#define CMDQ_CTRL_ACK_TYPE_MASK0x3U
+#define CMDQ_CTRL_HW_BUSY_BIT_MASK 0x1U
+
+#define CMDQ_CTRL_SET(val, member) \
+   (((u32)(val) & CMDQ_CTRL_##member##_MASK) << CMDQ_CTRL_##member##_SHIFT)
+
+#define CMDQ_CTRL_GET(val, member) \
+   (((val) >> CMDQ_CTRL_##member##_SHIFT) & CMDQ_CTRL_##member##_MASK)
+
+#define CMDQ_WQE_HEADER_BUFDESC_LEN_SHIFT  0
+#define CMDQ_WQE_HEADER_COMPLETE_FMT_SHIFT 15
+#define CMDQ_WQE_HEADER_DATA_FMT_SHIFT 22
+#define CMDQ_WQE_HEADER_COMPLETE_REQ_SHIFT 23
+#define CMDQ_WQE_HEADER_COMPLETE_SECT_LEN_SHIFT27
+#define CMDQ_WQE_HEADER_CTRL_LEN_SHIFT 29
+#define CMDQ_WQE_HEADER_HW_BUSY_BIT_SHIFT  31
+
+#define CMDQ_WQE_HEADER_BUFDESC_LEN_MASK   0xFFU
+#define CMDQ_WQE_HEADER_COMPLETE_FMT_MASK  0x1U
+#define CMDQ_WQE_HEADER_DATA_FMT_MASK  0x1U
+#define CMDQ_WQE_HEADER_COMPLETE_REQ_MASK  0x1U
+#define CMDQ_WQE_HEADER_COMPLETE_SECT_LEN_MASK 0x3U
+#define CMDQ_WQE_HEADER_CTRL_LEN_MASK  0x3U
+#define CMDQ_WQE_HEADER_HW_BUSY_BIT_MASK   0x1U
+
+#define CMDQ_WQE_HEADER_SET(val, member)   \
+   (((u32)(val) & CMDQ_WQE_HEADER_##member##_MASK) <<  \
+   CMDQ_WQE_HEADER_##member##_SHIFT)
+
+#define CMDQ_WQE_HEADER_GET(val, member)   \
+   (((val) >> CMDQ_WQE_HEADER_##member##_SHIFT) &  \
+   CMDQ_WQE_HEADER_##member##_MASK)
+
 #define CMDQ_CTXT_CURR_WQE_PAGE_PFN_SHIFT  0
 #define CMDQ_CTXT_EQ_ID_SHIFT  53
 #define CMDQ_CTXT_CEQ_ARM_SHIFT61
@@ -36,8 +101,523 @@
 #define CMDQ_CTXT_BLOCK_INFO_SET(val, member)  \
(((u64)(val) & CMDQ_CTXT_##member##_MASK) << CMDQ_CTXT_##member##_SHIFT)
 
+#define SAVED_DATA_ARM_SHIFT   31
+
+#define SAVED_DATA_ARM_MASK

[PATCH v1 06/25] net/spnic: add cmdq and work queue

[Yanling Song]

This commit introduce cmdq and work queue which can be used to
send bulk message data(up to 2KB) to hardware. cmdq provides a
mechanism to encapsulate the message to be sent and handle the
response data or status. work queue is used to manager the wqe
in which includes message data buffer description, ctrl info,
header info and response message data buffer. This patch
implements the initialization and data structure.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build |   4 +-
 drivers/net/spnic/base/spnic_cmdq.c| 202 ++
 drivers/net/spnic/base/spnic_cmdq.h| 228 +
 drivers/net/spnic/base/spnic_hw_comm.c | 222 
 drivers/net/spnic/base/spnic_hw_comm.h | 176 +++
 drivers/net/spnic/base/spnic_hwdev.c   | 215 +++
 drivers/net/spnic/base/spnic_hwdev.h   |   8 +-
 drivers/net/spnic/base/spnic_wq.h  |  57 +++
 8 files changed, 1109 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_cmdq.c
 create mode 100644 drivers/net/spnic/base/spnic_cmdq.h
 create mode 100644 drivers/net/spnic/base/spnic_hw_comm.c
 create mode 100644 drivers/net/spnic/base/spnic_hw_comm.h
 create mode 100644 drivers/net/spnic/base/spnic_wq.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index 3f6a060b37..5e4efac7be 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -7,7 +7,9 @@ sources = [
'spnic_hwif.c',
'spnic_mbox.c',
'spnic_mgmt.c',
-   'spnic_nic_event.c'
+   'spnic_nic_event.c',
+   'spnic_cmdq.c',
+   'spnic_hw_comm.c',
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_cmdq.c 
b/drivers/net/spnic/base/spnic_cmdq.c
new file mode 100644
index 00..ccfcf739a0
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_cmdq.c
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#include 
+
+#include "spnic_compat.h"
+#include "spnic_hwdev.h"
+#include "spnic_hwif.h"
+#include "spnic_wq.h"
+#include "spnic_cmd.h"
+#include "spnic_mgmt.h"
+#include "spnic_cmdq.h"
+
+#define CMDQ_CTXT_CURR_WQE_PAGE_PFN_SHIFT  0
+#define CMDQ_CTXT_EQ_ID_SHIFT  53
+#define CMDQ_CTXT_CEQ_ARM_SHIFT61
+#define CMDQ_CTXT_CEQ_EN_SHIFT 62
+#define CMDQ_CTXT_HW_BUSY_BIT_SHIFT63
+
+#define CMDQ_CTXT_CURR_WQE_PAGE_PFN_MASK   0xF
+#define CMDQ_CTXT_EQ_ID_MASK   0xFF
+#define CMDQ_CTXT_CEQ_ARM_MASK 0x1
+#define CMDQ_CTXT_CEQ_EN_MASK  0x1
+#define CMDQ_CTXT_HW_BUSY_BIT_MASK 0x1
+
+#define CMDQ_CTXT_PAGE_INFO_SET(val, member)   \
+   (((u64)(val) & CMDQ_CTXT_##member##_MASK) << CMDQ_CTXT_##member##_SHIFT)
+
+#define CMDQ_CTXT_WQ_BLOCK_PFN_SHIFT   0
+#define CMDQ_CTXT_CI_SHIFT 52
+
+#define CMDQ_CTXT_WQ_BLOCK_PFN_MASK0xF
+#define CMDQ_CTXT_CI_MASK  0xFFF
+
+#define CMDQ_CTXT_BLOCK_INFO_SET(val, member)  \
+   (((u64)(val) & CMDQ_CTXT_##member##_MASK) << CMDQ_CTXT_##member##_SHIFT)
+
+#define WAIT_CMDQ_ENABLE_TIMEOUT   300
+
+static int init_cmdq(struct spnic_cmdq *cmdq, struct spnic_hwdev *hwdev,
+struct spnic_wq *wq, enum spnic_cmdq_type q_type)
+{
+   void *db_base = NULL;
+   int err = 0;
+   size_t errcode_size;
+   size_t cmd_infos_size;
+
+   cmdq->wq = wq;
+   cmdq->cmdq_type = q_type;
+   cmdq->wrapped = 1;
+
+   rte_spinlock_init(&cmdq->cmdq_lock);
+
+   errcode_size = wq->q_depth * sizeof(*cmdq->errcode);
+   cmdq->errcode = rte_zmalloc(NULL, errcode_size, 0);
+   if (!cmdq->errcode) {
+   PMD_DRV_LOG(ERR, "Allocate errcode for cmdq failed");
+   return -ENOMEM;
+   }
+
+   cmd_infos_size = wq->q_depth * sizeof(*cmdq->cmd_infos);
+   cmdq->cmd_infos = rte_zmalloc(NULL, cmd_infos_size, 0);
+   if (!cmdq->cmd_infos) {
+   PMD_DRV_LOG(ERR, "Allocate cmd info for cmdq failed");
+   err = -ENOMEM;
+   goto cmd_infos_err;
+   }
+
+   err = spnic_alloc_db_addr(hwdev, &db_base, NULL);
+   if (err)
+   goto alloc_db_err;
+
+   cmdq->db_base = (u8 *)db_base;
+
+   return 0;
+
+alloc_db_err:
+   rte_free(cmdq->cmd_infos);
+
+cmd_infos_err:
+   rte_free(cmdq->errcode);
+
+   return err;
+}
+
+static void free_cmdq(struct spnic_hwdev *hwdev, struct spnic_cmdq *cmdq)
+{
+   spnic_free_db_addr(hwdev, cmdq->db_base, NULL);
+   rte_free(cmdq->cmd_infos);
+   rte_free(cmdq->errcode);
+}
+
+static int spnic_set_cmdq_ctxts(struct spnic_hwdev *hwdev)
+{
+   struct spnic_cmd

[PATCH v1 03/25] net/spnic: add mbox message channel

[Yanling Song]

This patch adds a message channel named mbox which can send
message form PF/VF driver to hardware or sned message from
VF to PF.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build   |3 +-
 drivers/net/spnic/base/spnic_hwdev.c |   69 ++
 drivers/net/spnic/base/spnic_hwdev.h |6 +
 drivers/net/spnic/base/spnic_mbox.c  | 1158 ++
 drivers/net/spnic/base/spnic_mbox.h  |  202 +
 drivers/net/spnic/base/spnic_mgmt.h  |   36 +
 6 files changed, 1473 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/spnic/base/spnic_mbox.c
 create mode 100644 drivers/net/spnic/base/spnic_mbox.h
 create mode 100644 drivers/net/spnic/base/spnic_mgmt.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index edd6e94772..de80eef7c4 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -3,7 +3,8 @@
 
 sources = [
'spnic_hwdev.c',
-   'spnic_hwif.c'
+   'spnic_hwif.c',
+   'spnic_mbox.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_hwdev.c 
b/drivers/net/spnic/base/spnic_hwdev.c
index de73f244fd..bcecbaa895 100644
--- a/drivers/net/spnic/base/spnic_hwdev.c
+++ b/drivers/net/spnic/base/spnic_hwdev.c
@@ -5,8 +5,66 @@
 #include "spnic_compat.h"
 #include "spnic_csr.h"
 #include "spnic_hwif.h"
+#include "spnic_mgmt.h"
+#include "spnic_mbox.h"
 #include "spnic_hwdev.h"
 
+int vf_handle_pf_comm_mbox(void *handle, __rte_unused void *pri_handle,
+  __rte_unused u16 cmd, __rte_unused void *buf_in,
+  __rte_unused u16 in_size, __rte_unused void *buf_out,
+  __rte_unused u16 *out_size)
+{
+   struct spnic_hwdev *hwdev = handle;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   PMD_DRV_LOG(WARNING, "Unsupported pf mbox event %d to process", cmd);
+
+   return 0;
+}
+
+static int init_mgmt_channel(struct spnic_hwdev *hwdev)
+{
+   int err;
+
+   err = spnic_func_to_func_init(hwdev);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Init mailbox channel failed");
+   goto func_to_func_init_err;
+   }
+
+   return 0;
+
+func_to_func_init_err:
+
+   return err;
+}
+
+static void free_mgmt_channel(struct spnic_hwdev *hwdev)
+{
+   spnic_func_to_func_free(hwdev);
+}
+
+
+static int spnic_init_comm_ch(struct spnic_hwdev *hwdev)
+{
+   int err;
+
+   err = init_mgmt_channel(hwdev);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Init mgmt channel failed");
+   return err;
+   }
+
+   return 0;
+}
+
+static void spnic_uninit_comm_ch(struct spnic_hwdev *hwdev)
+{
+   free_mgmt_channel(hwdev);
+}
+
 int spnic_init_hwdev(struct spnic_hwdev *hwdev)
 {
int err;
@@ -25,8 +83,17 @@ int spnic_init_hwdev(struct spnic_hwdev *hwdev)
goto init_hwif_err;
}
 
+   err = spnic_init_comm_ch(hwdev);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Init communication channel failed");
+   goto init_comm_ch_err;
+   }
+
return 0;
 
+init_comm_ch_err:
+   spnic_free_hwif(hwdev);
+
 init_hwif_err:
rte_free(hwdev->chip_fault_stats);
 
@@ -35,6 +102,8 @@ int spnic_init_hwdev(struct spnic_hwdev *hwdev)
 
 void spnic_free_hwdev(struct spnic_hwdev *hwdev)
 {
+   spnic_uninit_comm_ch(hwdev);
+
spnic_free_hwif(hwdev);
 
rte_free(hwdev->chip_fault_stats);
diff --git a/drivers/net/spnic/base/spnic_hwdev.h 
b/drivers/net/spnic/base/spnic_hwdev.h
index a6cb8bc36e..b3a8b32287 100644
--- a/drivers/net/spnic/base/spnic_hwdev.h
+++ b/drivers/net/spnic/base/spnic_hwdev.h
@@ -17,12 +17,18 @@ struct spnic_hwdev {
uint16_t port_id;
 
struct spnic_hwif *hwif;
+   struct spnic_mbox *func_to_func;
u8 *chip_fault_stats;
 
u16 max_vfs;
u16 link_status;
 };
 
+int vf_handle_pf_comm_mbox(void *handle, __rte_unused void *pri_handle,
+  __rte_unused u16 cmd, __rte_unused void *buf_in,
+  __rte_unused u16 in_size, __rte_unused void *buf_out,
+  __rte_unused u16 *out_size);
+
 int spnic_init_hwdev(struct spnic_hwdev *hwdev);
 
 void spnic_free_hwdev(struct spnic_hwdev *hwdev);
diff --git a/drivers/net/spnic/base/spnic_mbox.c 
b/drivers/net/spnic/base/spnic_mbox.c
new file mode 100644
index 00..d019612cef
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_mbox.c
@@ -0,0 +1,1158 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#include 
+#include 
+#include "spnic_compat.h"
+#include "spnic_hwdev.h"
+#include "spnic_csr.h"
+#include "spnic_hwif.h"
+#include "spnic_mgmt.h"
+#include "spnic_mbox.h"
+
+#define SPNIC_MBOX_INT_DST_FUNC_SHIFT  0
+#define SPNIC_MBOX_INT_DST_AEQN_SHIFT  10
+#define SPNIC_MBOX_INT_SRC_RESP_AEQN_SHIFT 12
+#def

[PATCH v1 04/25] net/spnic: introduce event queue

[Yanling Song]

This patch introduce event queue to receive response message
from hardware or destiation function when a source function
send mbox to it. This commit implements the related data
structure, initialization and interfaces handling the message.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build   |   1 +
 drivers/net/spnic/base/spnic_eqs.c   | 606 +++
 drivers/net/spnic/base/spnic_eqs.h   | 102 +
 drivers/net/spnic/base/spnic_hwdev.c |  44 +-
 drivers/net/spnic/base/spnic_hwdev.h |  22 +
 drivers/net/spnic/base/spnic_mbox.c  |  20 +-
 6 files changed, 790 insertions(+), 5 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_eqs.c
 create mode 100644 drivers/net/spnic/base/spnic_eqs.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index de80eef7c4..ce7457f400 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -2,6 +2,7 @@
 # Copyright(c) 2021 Ramaxel Memory Technology, Ltd
 
 sources = [
+   'spnic_eqs.c',
'spnic_hwdev.c',
'spnic_hwif.c',
'spnic_mbox.c'
diff --git a/drivers/net/spnic/base/spnic_eqs.c 
b/drivers/net/spnic/base/spnic_eqs.c
new file mode 100644
index 00..7953976441
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_eqs.c
@@ -0,0 +1,606 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#include 
+#include 
+#include 
+#include "spnic_compat.h"
+#include "spnic_hwdev.h"
+#include "spnic_hwif.h"
+#include "spnic_csr.h"
+#include "spnic_eqs.h"
+#include "spnic_mgmt.h"
+#include "spnic_mbox.h"
+
+#define AEQ_CTRL_0_INTR_IDX_SHIFT  0
+#define AEQ_CTRL_0_DMA_ATTR_SHIFT  12
+#define AEQ_CTRL_0_PCI_INTF_IDX_SHIFT  20
+#define AEQ_CTRL_0_INTR_MODE_SHIFT 31
+
+#define AEQ_CTRL_0_INTR_IDX_MASK   0x3FFU
+#define AEQ_CTRL_0_DMA_ATTR_MASK   0x3FU
+#define AEQ_CTRL_0_PCI_INTF_IDX_MASK   0x7U
+#define AEQ_CTRL_0_INTR_MODE_MASK  0x1U
+
+#define AEQ_CTRL_0_SET(val, member)\
+   (((val) & AEQ_CTRL_0_##member##_MASK) << \
+   AEQ_CTRL_0_##member##_SHIFT)
+
+#define AEQ_CTRL_0_CLEAR(val, member)  \
+   ((val) & (~(AEQ_CTRL_0_##member##_MASK \
+   << AEQ_CTRL_0_##member##_SHIFT)))
+
+#define AEQ_CTRL_1_LEN_SHIFT   0
+#define AEQ_CTRL_1_ELEM_SIZE_SHIFT 24
+#define AEQ_CTRL_1_PAGE_SIZE_SHIFT 28
+
+#define AEQ_CTRL_1_LEN_MASK0x1FU
+#define AEQ_CTRL_1_ELEM_SIZE_MASK  0x3U
+#define AEQ_CTRL_1_PAGE_SIZE_MASK  0xFU
+
+#define AEQ_CTRL_1_SET(val, member)\
+   (((val) & AEQ_CTRL_1_##member##_MASK) << \
+   AEQ_CTRL_1_##member##_SHIFT)
+
+#define AEQ_CTRL_1_CLEAR(val, member)  \
+   ((val) & (~(AEQ_CTRL_1_##member##_MASK \
+   << AEQ_CTRL_1_##member##_SHIFT)))
+
+#define SPNIC_EQ_PROD_IDX_MASK 0xF
+#define SPNIC_TASK_PROCESS_EQE_LIMIT   1024
+#define SPNIC_EQ_UPDATE_CI_STEP 64
+
+#define EQ_ELEM_DESC_TYPE_SHIFT0
+#define EQ_ELEM_DESC_SRC_SHIFT 7
+#define EQ_ELEM_DESC_SIZE_SHIFT8
+#define EQ_ELEM_DESC_WRAPPED_SHIFT 31
+
+#define EQ_ELEM_DESC_TYPE_MASK 0x7FU
+#define EQ_ELEM_DESC_SRC_MASK  0x1U
+#define EQ_ELEM_DESC_SIZE_MASK 0xFFU
+#define EQ_ELEM_DESC_WRAPPED_MASK  0x1U
+
+#define EQ_ELEM_DESC_GET(val, member)  \
+   (((val) >> EQ_ELEM_DESC_##member##_SHIFT) & \
+   EQ_ELEM_DESC_##member##_MASK)
+
+#define EQ_CI_SIMPLE_INDIR_CI_SHIFT0
+#define EQ_CI_SIMPLE_INDIR_ARMED_SHIFT 21
+#define EQ_CI_SIMPLE_INDIR_AEQ_IDX_SHIFT   30
+
+#define EQ_CI_SIMPLE_INDIR_CI_MASK 0x1FU
+#define EQ_CI_SIMPLE_INDIR_ARMED_MASK  0x1U
+#define EQ_CI_SIMPLE_INDIR_AEQ_IDX_MASK0x3U
+
+#define EQ_CI_SIMPLE_INDIR_SET(val, member)\
+   (((val) & EQ_CI_SIMPLE_INDIR_##member##_MASK) << \
+   EQ_CI_SIMPLE_INDIR_##member##_SHIFT)
+
+#define EQ_CI_SIMPLE_INDIR_CLEAR(val, member)  \
+   ((val) & (~(EQ_CI_SIMPLE_INDIR_##member##_MASK \
+   << EQ_CI_SIMPLE_INDIR_##member##_SHIFT)))
+
+#define EQ_WRAPPED(eq) ((u32)(eq)->wrapped << EQ_VALID_SHIFT)
+
+#define EQ_CONS_IDX(eq)((eq)->cons_idx | \
+   ((u32)(eq)->wrapped << EQ_WRAPPED_SHIFT))
+#define GET_EQ_NUM_PAGES(eq, size) \
+   ((u16)(RTE_ALIGN((u32)((eq)->eq_len * (

[PATCH v1 08/25] net/spnic: add hardware info initialization

[Yanling Song]

This commits add hardware info initialization, including
that device capability initialization, common feature
negotiation, and two interfaces spnic_get_board_info(),
spnic_get_mgmt_version() to get hardware info and
firmware version.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build |   3 +-
 drivers/net/spnic/base/spnic_hw_cfg.c  | 157 +
 drivers/net/spnic/base/spnic_hw_cfg.h  | 117 ++
 drivers/net/spnic/base/spnic_hw_comm.c | 121 +++
 drivers/net/spnic/base/spnic_hw_comm.h |  22 
 drivers/net/spnic/base/spnic_hwdev.c   |  70 +++
 drivers/net/spnic/base/spnic_hwdev.h   |   5 +
 drivers/net/spnic/base/spnic_mbox.c|   8 ++
 8 files changed, 502 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/spnic/base/spnic_hw_cfg.c
 create mode 100644 drivers/net/spnic/base/spnic_hw_cfg.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index da6d6ee4a2..77a56ca41e 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -10,7 +10,8 @@ sources = [
'spnic_nic_event.c',
'spnic_cmdq.c',
'spnic_hw_comm.c',
-   'spnic_wq.c'
+   'spnic_wq.c',
+   'spnic_hw_cfg.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_hw_cfg.c 
b/drivers/net/spnic/base/spnic_hw_cfg.c
new file mode 100644
index 00..e8856ce9fe
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_hw_cfg.c
@@ -0,0 +1,157 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#include "spnic_compat.h"
+#include "spnic_mgmt.h"
+#include "spnic_mbox.h"
+#include "spnic_hwdev.h"
+#include "spnic_hwif.h"
+#include "spnic_hw_cfg.h"
+
+static void parse_pub_res_cap(struct service_cap *cap,
+ struct spnic_cfg_cmd_dev_cap *dev_cap,
+ enum func_type type)
+{
+   cap->host_id = dev_cap->host_id;
+   cap->ep_id = dev_cap->ep_id;
+   cap->er_id = dev_cap->er_id;
+   cap->port_id = dev_cap->port_id;
+
+   cap->svc_type = dev_cap->svc_cap_en;
+   cap->chip_svc_type = cap->svc_type;
+
+   cap->cos_valid_bitmap = dev_cap->valid_cos_bitmap;
+   cap->flexq_en = dev_cap->flexq_en;
+
+   cap->host_total_function = dev_cap->host_total_func;
+   cap->max_vf = 0;
+   if (type == TYPE_PF || type == TYPE_PPF) {
+   cap->max_vf = dev_cap->max_vf;
+   cap->pf_num = dev_cap->host_pf_num;
+   cap->pf_id_start = dev_cap->pf_id_start;
+   cap->vf_num = dev_cap->host_vf_num;
+   cap->vf_id_start = dev_cap->vf_id_start;
+   }
+
+   PMD_DRV_LOG(INFO, "Get public resource capability: ");
+   PMD_DRV_LOG(INFO, "host_id: 0x%x, ep_id: 0x%x, er_id: 0x%x, "
+   "port_id: 0x%x",
+   cap->host_id, cap->ep_id, cap->er_id, cap->port_id);
+   PMD_DRV_LOG(INFO, "host_total_function: 0x%x, max_vf: 0x%x",
+   cap->host_total_function, cap->max_vf);
+   PMD_DRV_LOG(INFO, "host_pf_num: 0x%x, pf_id_start: 0x%x, host_vf_num: 
0x%x, vf_id_start: 0x%x",
+   cap->pf_num, cap->pf_id_start,
+   cap->vf_num, cap->vf_id_start);
+}
+
+static void parse_l2nic_res_cap(struct service_cap *cap,
+   struct spnic_cfg_cmd_dev_cap *dev_cap)
+{
+   struct nic_service_cap *nic_cap = &cap->nic_cap;
+
+   nic_cap->max_sqs = dev_cap->nic_max_sq_id + 1;
+   nic_cap->max_rqs = dev_cap->nic_max_rq_id + 1;
+
+   PMD_DRV_LOG(INFO, "L2nic resource capbility, max_sqs: 0x%x, "
+   "max_rqs: 0x%x",
+   nic_cap->max_sqs, nic_cap->max_rqs);
+}
+
+static void parse_dev_cap(struct spnic_hwdev *dev,
+ struct spnic_cfg_cmd_dev_cap *dev_cap,
+ enum func_type type)
+{
+   struct service_cap *cap = &dev->cfg_mgmt->svc_cap;
+
+   parse_pub_res_cap(cap, dev_cap, type);
+
+   if (IS_NIC_TYPE(dev))
+   parse_l2nic_res_cap(cap, dev_cap);
+}
+
+static int get_cap_from_fw(struct spnic_hwdev *hwdev, enum func_type type)
+{
+   struct spnic_cfg_cmd_dev_cap dev_cap;
+   u16 out_len = sizeof(dev_cap);
+   int err;
+
+   memset(&dev_cap, 0, sizeof(dev_cap));
+   dev_cap.func_id = spnic_global_func_id(hwdev);
+   err = spnic_msg_to_mgmt_sync(hwdev, SPNIC_MOD_CFGM,
+SPNIC_CFG_CMD_GET_DEV_CAP,
+&dev_cap, sizeof(dev_cap),
+&dev_cap, &out_len, 0);
+   if (err || dev_cap.status || !out_len) {
+   PMD_DRV_LOG(ERR, "Get capability from FW failed, err: %d, "
+   "status: 0x%x, out size: 0x%x",
+   err, dev_cap.status, out_len);
+   return -EFAULT;
+   }
+
+   parse_dev_cap(hwdev, &dev_c

[PATCH v1 09/25] net/spnic: support MAC and link event handling

[Yanling Song]

This commit adds interfaces to add/remove MAC addresses
and registers related ops to struct eth_dev_ops. Furthermore,
this commit adds callback to handle link events.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/meson.build   |   3 +-
 drivers/net/spnic/base/spnic_hw_cfg.c|  12 +
 drivers/net/spnic/base/spnic_hw_cfg.h|   2 +
 drivers/net/spnic/base/spnic_nic_cfg.c   | 291 +++
 drivers/net/spnic/base/spnic_nic_cfg.h   | 180 
 drivers/net/spnic/base/spnic_nic_event.c |  27 +-
 drivers/net/spnic/base/spnic_nic_event.h |   9 +-
 drivers/net/spnic/spnic_ethdev.c | 348 ++-
 8 files changed, 861 insertions(+), 11 deletions(-)
 create mode 100644 drivers/net/spnic/base/spnic_nic_cfg.c
 create mode 100644 drivers/net/spnic/base/spnic_nic_cfg.h

diff --git a/drivers/net/spnic/base/meson.build 
b/drivers/net/spnic/base/meson.build
index 77a56ca41e..f4bb4469ae 100644
--- a/drivers/net/spnic/base/meson.build
+++ b/drivers/net/spnic/base/meson.build
@@ -11,7 +11,8 @@ sources = [
'spnic_cmdq.c',
'spnic_hw_comm.c',
'spnic_wq.c',
-   'spnic_hw_cfg.c'
+   'spnic_hw_cfg.c',
+   'spnic_nic_cfg.c'
 ]
 
 extra_flags = []
diff --git a/drivers/net/spnic/base/spnic_hw_cfg.c 
b/drivers/net/spnic/base/spnic_hw_cfg.c
index e8856ce9fe..6505f48273 100644
--- a/drivers/net/spnic/base/spnic_hw_cfg.c
+++ b/drivers/net/spnic/base/spnic_hw_cfg.c
@@ -155,3 +155,15 @@ void spnic_free_capability(void *dev)
 {
rte_free(((struct spnic_hwdev *)dev)->cfg_mgmt);
 }
+
+u8 spnic_physical_port_id(void *hwdev)
+{
+   struct spnic_hwdev *dev = hwdev;
+
+   if (!dev) {
+   PMD_DRV_LOG(INFO, "Hwdev is NULL for getting physical port id");
+   return 0;
+   }
+
+   return dev->cfg_mgmt->svc_cap.port_id;
+}
diff --git a/drivers/net/spnic/base/spnic_hw_cfg.h 
b/drivers/net/spnic/base/spnic_hw_cfg.h
index 1b1b598726..9ab51f2875 100644
--- a/drivers/net/spnic/base/spnic_hw_cfg.h
+++ b/drivers/net/spnic/base/spnic_hw_cfg.h
@@ -112,6 +112,8 @@ struct spnic_cfg_cmd_dev_cap {
 int spnic_init_capability(void *dev);
 void spnic_free_capability(void *dev);
 
+u8 spnic_physical_port_id(void *hwdev);
+
 int cfg_mbx_vf_proc_msg(void *hwdev, void *pri_handle, u16 cmd, void *buf_in,
u16 in_size, void *buf_out, u16 *out_size);
 #endif /* _SPNIC_HW_CFG_H_ */
diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
new file mode 100644
index 00..c47bc330a3
--- /dev/null
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -0,0 +1,291 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+ */
+
+#include 
+#include "spnic_compat.h"
+#include "spnic_cmd.h"
+#include "spnic_mgmt.h"
+#include "spnic_hwif.h"
+#include "spnic_mbox.h"
+#include "spnic_hwdev.h"
+#include "spnic_wq.h"
+#include "spnic_cmdq.h"
+#include "spnic_nic_cfg.h"
+#include "spnic_hw_cfg.h"
+
+struct vf_msg_handler {
+   u16 cmd;
+};
+
+const struct vf_msg_handler vf_cmd_handler[] = {
+   {
+   .cmd = SPNIC_CMD_VF_REGISTER,
+   },
+
+   {
+   .cmd = SPNIC_CMD_GET_MAC,
+   },
+
+   {
+   .cmd = SPNIC_CMD_SET_MAC,
+   },
+
+   {
+   .cmd = SPNIC_CMD_DEL_MAC,
+   },
+
+   {
+   .cmd = SPNIC_CMD_UPDATE_MAC,
+   },
+
+   {
+   .cmd = SPNIC_CMD_VF_COS,
+   },
+};
+
+static const struct vf_msg_handler vf_mag_cmd_handler[] = {
+   {
+   .cmd = MAG_CMD_GET_LINK_STATUS,
+   },
+};
+
+static int mag_msg_to_mgmt_sync(void *hwdev, u16 cmd, void *buf_in, u16 
in_size,
+   void *buf_out, u16 *out_size);
+
+int l2nic_msg_to_mgmt_sync(void *hwdev, u16 cmd, void *buf_in, u16 in_size,
+  void *buf_out, u16 *out_size)
+{
+   u32 i, cmd_cnt = ARRAY_LEN(vf_cmd_handler);
+   bool cmd_to_pf = false;
+
+   if (spnic_func_type(hwdev) == TYPE_VF) {
+   for (i = 0; i < cmd_cnt; i++) {
+   if (cmd == vf_cmd_handler[i].cmd)
+   cmd_to_pf = true;
+   }
+   }
+
+   if (cmd_to_pf) {
+   return spnic_mbox_to_pf(hwdev, SPNIC_MOD_L2NIC, cmd, buf_in,
+   in_size, buf_out, out_size, 0);
+   }
+
+   return spnic_msg_to_mgmt_sync(hwdev, SPNIC_MOD_L2NIC, cmd, buf_in,
+ in_size, buf_out, out_size, 0);
+}
+
+static int spnic_check_mac_info(u8 status, u16 vlan_id)
+{
+   if ((status && status != SPNIC_MGMT_STATUS_EXIST &&
+status != SPNIC_PF_SET_VF_ALREADY) ||
+   (vlan_id & CHECK_IPSU_15BIT &&
+status == SPNIC_MGMT_STATUS_EXIST))
+   return -EINVAL;
+
+   return 0;
+}
+
+#define VLAN_N_VID 4096
+
+int spnic_set_mac(void *hwdev, const u8 *mac_addr, u16

[PATCH v1 11/25] net/spnic: add queue pairs context initialization

[Yanling Song]

This patch adds the initialization of Tx/Rx queues
context and negotiation of NIC features.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_hw_comm.c | 101 
 drivers/net/spnic/base/spnic_hw_comm.h |   6 +
 drivers/net/spnic/base/spnic_nic_cfg.c |  76 +++
 drivers/net/spnic/base/spnic_nic_cfg.h |  65 ++-
 drivers/net/spnic/meson.build  |   3 +-
 drivers/net/spnic/spnic_ethdev.c   |  57 +-
 drivers/net/spnic/spnic_io.c   | 738 +
 drivers/net/spnic/spnic_io.h   | 154 ++
 drivers/net/spnic/spnic_rx.h   | 113 
 drivers/net/spnic/spnic_tx.h   |  62 +++
 10 files changed, 1370 insertions(+), 5 deletions(-)
 create mode 100644 drivers/net/spnic/spnic_io.c
 create mode 100644 drivers/net/spnic/spnic_io.h
 create mode 100644 drivers/net/spnic/spnic_rx.h
 create mode 100644 drivers/net/spnic/spnic_tx.h

diff --git a/drivers/net/spnic/base/spnic_hw_comm.c 
b/drivers/net/spnic/base/spnic_hw_comm.c
index 5cb607cf03..1c751f2403 100644
--- a/drivers/net/spnic/base/spnic_hw_comm.c
+++ b/drivers/net/spnic/base/spnic_hw_comm.c
@@ -217,6 +217,107 @@ int spnic_func_reset(void *hwdev, u64 reset_flag)
return 0;
 }
 
+int spnic_convert_rx_buf_size(u32 rx_buf_sz, u32 *match_sz)
+{
+   u32 i, num_hw_types, best_match_sz;
+
+   if (unlikely(!match_sz || rx_buf_sz < SPNIC_RX_BUF_SIZE_32B))
+   return -EINVAL;
+
+   if (rx_buf_sz >= SPNIC_RX_BUF_SIZE_16K) {
+   best_match_sz =  SPNIC_RX_BUF_SIZE_16K;
+   goto size_matched;
+   }
+
+   num_hw_types = sizeof(spnic_hw_rx_buf_size) /
+   sizeof(spnic_hw_rx_buf_size[0]);
+   best_match_sz = spnic_hw_rx_buf_size[0];
+   for (i = 0; i < num_hw_types; i++) {
+   if (rx_buf_sz == spnic_hw_rx_buf_size[i]) {
+   best_match_sz = spnic_hw_rx_buf_size[i];
+   break;
+   } else if (rx_buf_sz < spnic_hw_rx_buf_size[i]) {
+   break;
+   }
+   best_match_sz = spnic_hw_rx_buf_size[i];
+   }
+
+size_matched:
+   *match_sz = best_match_sz;
+
+   return 0;
+}
+
+static u16 get_hw_rx_buf_size(u32 rx_buf_sz)
+{
+   u16 num_hw_types = sizeof(spnic_hw_rx_buf_size) /
+  sizeof(spnic_hw_rx_buf_size[0]);
+   u16 i;
+
+   for (i = 0; i < num_hw_types; i++) {
+   if (spnic_hw_rx_buf_size[i] == rx_buf_sz)
+   return i;
+   }
+
+   PMD_DRV_LOG(WARNING, "Chip can't support rx buf size of %d", rx_buf_sz);
+
+   return DEFAULT_RX_BUF_SIZE; /* Default 2K */
+}
+
+int spnic_set_root_ctxt(void *hwdev, u32 rq_depth, u32 sq_depth, u16 rx_buf_sz)
+{
+   struct spnic_cmd_root_ctxt root_ctxt;
+   u16 out_size = sizeof(root_ctxt);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&root_ctxt, 0, sizeof(root_ctxt));
+   root_ctxt.func_idx = spnic_global_func_id(hwdev);
+   root_ctxt.set_cmdq_depth = 0;
+   root_ctxt.cmdq_depth = 0;
+   root_ctxt.lro_en = 1;
+   root_ctxt.rq_depth  = (u16)ilog2(rq_depth);
+   root_ctxt.rx_buf_sz = get_hw_rx_buf_size(rx_buf_sz);
+   root_ctxt.sq_depth  = (u16)ilog2(sq_depth);
+
+   err = spnic_msg_to_mgmt_sync(hwdev, SPNIC_MOD_COMM, MGMT_CMD_SET_VAT,
+&root_ctxt, sizeof(root_ctxt),
+&root_ctxt, &out_size, 0);
+   if (err || !out_size || root_ctxt.status) {
+   PMD_DRV_LOG(ERR, "Set root context failed, err: %d, status: 
0x%x, out_size: 0x%x",
+   err, root_ctxt.status, out_size);
+   return -EFAULT;
+   }
+
+   return 0;
+}
+
+int spnic_clean_root_ctxt(void *hwdev)
+{
+   struct spnic_cmd_root_ctxt root_ctxt;
+   u16 out_size = sizeof(root_ctxt);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&root_ctxt, 0, sizeof(root_ctxt));
+   root_ctxt.func_idx = spnic_global_func_id(hwdev);
+
+   err = spnic_msg_to_mgmt_sync(hwdev, SPNIC_MOD_COMM, MGMT_CMD_SET_VAT,
+&root_ctxt, sizeof(root_ctxt),
+&root_ctxt, &out_size, 0);
+   if (err || !out_size || root_ctxt.status) {
+   PMD_DRV_LOG(ERR, "Clean root context failed, err: %d, status: 
0x%x, out_size: 0x%x",
+   err, root_ctxt.status, out_size);
+   return -EFAULT;
+   }
+
+   return 0;
+}
+
 int spnic_set_cmdq_depth(void *hwdev, u16 cmdq_depth)
 {
struct spnic_cmd_root_ctxt root_ctxt;
diff --git a/drivers/net/spnic/base/spnic_hw_comm.h 
b/drivers/net/spnic/base/spnic_hw_comm.h
index 207f0aaeae..f960fbb53f 100644
--- a/drivers/net/spnic/base/spnic_hw_comm.h
+++ b/drivers/net/spnic/base/spnic_hw_comm.h
@@ -180,6 +180,10 @@ int spnic_get_mgmt_version(void *hwdev, char *mgmt_ver, 
int max_m

[PATCH v1 10/25] net/spnic: add function info initialization

[Yanling Song]

This patch mainly implements function info initialization
including mtu, link state, port state, port info and cos
as well as the definition of the corresponding data structure.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_hw_cfg.c  |  43 +++
 drivers/net/spnic/base/spnic_hw_cfg.h  |   6 +
 drivers/net/spnic/base/spnic_nic_cfg.c | 221 ++
 drivers/net/spnic/base/spnic_nic_cfg.h | 213 ++
 drivers/net/spnic/spnic_ethdev.c   | 382 -
 drivers/net/spnic/spnic_ethdev.h   |  22 +-
 6 files changed, 876 insertions(+), 11 deletions(-)

diff --git a/drivers/net/spnic/base/spnic_hw_cfg.c 
b/drivers/net/spnic/base/spnic_hw_cfg.c
index 6505f48273..49e16ee89c 100644
--- a/drivers/net/spnic/base/spnic_hw_cfg.c
+++ b/drivers/net/spnic/base/spnic_hw_cfg.c
@@ -156,6 +156,49 @@ void spnic_free_capability(void *dev)
rte_free(((struct spnic_hwdev *)dev)->cfg_mgmt);
 }
 
+/* *
+ * @brief spnic_support_nic - function support nic
+ * @param hwdev: device pointer to hwdev
+ * @retval true: function support nic
+ * @retval false: function not support nic
+ */
+bool spnic_support_nic(void *hwdev)
+{
+   struct spnic_hwdev *dev = (struct spnic_hwdev *)hwdev;
+
+   if (!hwdev)
+   return false;
+
+   if (!IS_NIC_TYPE(dev))
+   return false;
+
+   return true;
+}
+
+u16 spnic_func_max_sqs(void *hwdev)
+{
+   struct spnic_hwdev *dev = hwdev;
+
+   if (!dev) {
+   PMD_DRV_LOG(INFO, "Hwdev is NULL for getting max_sqs");
+   return 0;
+   }
+
+   return dev->cfg_mgmt->svc_cap.nic_cap.max_sqs;
+}
+
+u16 spnic_func_max_rqs(void *hwdev)
+{
+   struct spnic_hwdev *dev = hwdev;
+
+   if (!dev) {
+   PMD_DRV_LOG(INFO, "Hwdev is NULL for getting max_rqs");
+   return 0;
+   }
+
+   return dev->cfg_mgmt->svc_cap.nic_cap.max_rqs;
+}
+
 u8 spnic_physical_port_id(void *hwdev)
 {
struct spnic_hwdev *dev = hwdev;
diff --git a/drivers/net/spnic/base/spnic_hw_cfg.h 
b/drivers/net/spnic/base/spnic_hw_cfg.h
index 9ab51f2875..5019f38ec2 100644
--- a/drivers/net/spnic/base/spnic_hw_cfg.h
+++ b/drivers/net/spnic/base/spnic_hw_cfg.h
@@ -112,8 +112,14 @@ struct spnic_cfg_cmd_dev_cap {
 int spnic_init_capability(void *dev);
 void spnic_free_capability(void *dev);
 
+u16 spnic_func_max_sqs(void *hwdev);
+u16 spnic_func_max_rqs(void *hwdev);
+
 u8 spnic_physical_port_id(void *hwdev);
 
 int cfg_mbx_vf_proc_msg(void *hwdev, void *pri_handle, u16 cmd, void *buf_in,
u16 in_size, void *buf_out, u16 *out_size);
+
+bool spnic_support_nic(void *hwdev);
+
 #endif /* _SPNIC_HW_CFG_H_ */
diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index c47bc330a3..886aaea384 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -265,6 +265,227 @@ int spnic_get_port_info(void *hwdev, struct nic_port_info 
*port_info)
return 0;
 }
 
+
+int spnic_get_link_state(void *hwdev, u8 *link_state)
+{
+   struct spnic_cmd_link_state get_link;
+   u16 out_size = sizeof(get_link);
+   int err;
+
+   if (!hwdev || !link_state)
+   return -EINVAL;
+
+   memset(&get_link, 0, sizeof(get_link));
+   get_link.port_id = spnic_physical_port_id(hwdev);
+   err = mag_msg_to_mgmt_sync(hwdev, MAG_CMD_GET_LINK_STATUS, &get_link,
+  sizeof(get_link), &get_link, &out_size);
+   if (err || !out_size || get_link.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Get link state failed, err: %d, status: 0x%x, 
out size: 0x%x",
+   err, get_link.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   *link_state = get_link.state;
+
+   return 0;
+}
+
+int spnic_set_vport_enable(void *hwdev, bool enable)
+{
+   struct spnic_vport_state en_state;
+   u16 out_size = sizeof(en_state);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&en_state, 0, sizeof(en_state));
+   en_state.func_id = spnic_global_func_id(hwdev);
+   en_state.state = enable ? 1 : 0;
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_SET_VPORT_ENABLE, 
&en_state,
+sizeof(en_state), &en_state, &out_size);
+   if (err || !out_size || en_state.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Set vport state failed, err: %d, status: 
0x%x, out size: 0x%x",
+   err, en_state.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+int spnic_set_port_enable(void *hwdev, bool enable)
+{
+   struct mag_cmd_set_port_enable en_state;
+   u16 out_size = sizeof(en_state);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   if (spnic_func_type(hwdev) == TYPE_VF)
+   return 0;
+
+   memset(&en_state, 0,

[PATCH v1 13/25] net/spnic: support Rx congfiguration

[Yanling Song]

This patch Rx/Tx configuration including Rx csum offload, LRO, RSS,
VLAN filter and VLAN offload.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c | 525 +
 drivers/net/spnic/base/spnic_nic_cfg.h | 387 ++
 drivers/net/spnic/spnic_ethdev.c   | 187 -
 drivers/net/spnic/spnic_ethdev.h   |   2 +
 drivers/net/spnic/spnic_rx.c   | 221 +++
 drivers/net/spnic/spnic_rx.h   |  31 ++
 6 files changed, 1349 insertions(+), 4 deletions(-)

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index f6914f6f6d..6c22c4fb3d 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -271,6 +271,37 @@ int spnic_get_default_mac(void *hwdev, u8 *mac_addr, int 
ether_len)
return 0;
 }
 
+static int spnic_config_vlan(void *hwdev, u8 opcode, u16 vlan_id, u16 func_id)
+{
+   struct spnic_cmd_vlan_config vlan_info;
+   u16 out_size = sizeof(vlan_info);
+   int err;
+
+   memset(&vlan_info, 0, sizeof(vlan_info));
+   vlan_info.opcode = opcode;
+   vlan_info.func_id = func_id;
+   vlan_info.vlan_id = vlan_id;
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_CFG_FUNC_VLAN, &vlan_info,
+sizeof(vlan_info), &vlan_info, &out_size);
+   if (err || !out_size || vlan_info.msg_head.status) {
+   PMD_DRV_LOG(ERR, "%s vlan failed, err: %d, status: 0x%x, out 
size: 0x%x",
+   opcode == SPNIC_CMD_OP_ADD ? "Add" : "Delete",
+   err, vlan_info.msg_head.status, out_size);
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+int spnic_del_vlan(void *hwdev, u16 vlan_id, u16 func_id)
+{
+   if (!hwdev)
+   return -EINVAL;
+
+   return spnic_config_vlan(hwdev, SPNIC_CMD_OP_DEL, vlan_id, func_id);
+}
+
 int spnic_get_port_info(void *hwdev, struct nic_port_info *port_info)
 {
struct spnic_cmd_port_info port_msg;
@@ -564,6 +595,500 @@ void spnic_free_nic_hwdev(void *hwdev)
spnic_vf_func_free(hwdev);
 }
 
+int spnic_set_rx_mode(void *hwdev, u32 enable)
+{
+   struct spnic_rx_mode_config rx_mode_cfg;
+   u16 out_size = sizeof(rx_mode_cfg);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&rx_mode_cfg, 0, sizeof(rx_mode_cfg));
+   rx_mode_cfg.func_id = spnic_global_func_id(hwdev);
+   rx_mode_cfg.rx_mode = enable;
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_SET_RX_MODE,
+&rx_mode_cfg, sizeof(rx_mode_cfg),
+&rx_mode_cfg, &out_size);
+   if (err || !out_size || rx_mode_cfg.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Set rx mode failed, err: %d, status: 0x%x, 
out size: 0x%x",
+   err, rx_mode_cfg.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+int spnic_set_rx_vlan_offload(void *hwdev, u8 en)
+{
+   struct spnic_cmd_vlan_offload vlan_cfg;
+   u16 out_size = sizeof(vlan_cfg);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&vlan_cfg, 0, sizeof(vlan_cfg));
+   vlan_cfg.func_id = spnic_global_func_id(hwdev);
+   vlan_cfg.vlan_offload = en;
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_SET_RX_VLAN_OFFLOAD,
+&vlan_cfg, sizeof(vlan_cfg),
+&vlan_cfg, &out_size);
+   if (err || !out_size || vlan_cfg.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Set rx vlan offload failed, err: %d, status: 
0x%x, out size: 0x%x",
+   err, vlan_cfg.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+int spnic_set_vlan_fliter(void *hwdev, u32 vlan_filter_ctrl)
+{
+   struct spnic_cmd_set_vlan_filter vlan_filter;
+   u16 out_size = sizeof(vlan_filter);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&vlan_filter, 0, sizeof(vlan_filter));
+   vlan_filter.func_id = spnic_global_func_id(hwdev);
+   vlan_filter.vlan_filter_ctrl = vlan_filter_ctrl;
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_SET_VLAN_FILTER_EN,
+&vlan_filter, sizeof(vlan_filter),
+&vlan_filter, &out_size);
+   if (err || !out_size || vlan_filter.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Failed to set vlan filter, err: %d, status: 
0x%x, out size: 0x%x",
+   err, vlan_filter.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+static int spnic_set_rx_lro(void *hwdev, u8 ipv4_en, u8 ipv6_en,
+   u8 lro_max_pkt_len)
+{
+   struct spnic_cmd_lro_config lro_cfg;
+   u16 out_size = sizeof(l

[PATCH v1 14/25] net/spnic: add port/vport enable

[Yanling Song]

This patch adds interface to enable port/vport so that the hardware
would receive packets to host.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c | 46 
 1 file changed, 46 insertions(+)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index db16d4038d..826a34f7fc 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -855,8 +855,10 @@ static void spnic_deinit_sw_rxtxqs(struct spnic_nic_dev 
*nic_dev)
 static int spnic_dev_start(struct rte_eth_dev *eth_dev)
 {
struct spnic_nic_dev *nic_dev;
+   struct spnic_rxq *rxq = NULL;
u64 nic_features;
int err;
+   u16 i;
 
nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
 
@@ -916,6 +918,22 @@ static int spnic_dev_start(struct rte_eth_dev *eth_dev)
 
spnic_start_all_sqs(eth_dev);
 
+   /* Open virtual port and ready to start packet receiving */
+   err = spnic_set_vport_enable(nic_dev->hwdev, true);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Enable vport failed, dev_name: %s",
+   eth_dev->data->name);
+   goto en_vport_fail;
+   }
+
+   /* Open physical port and start packet receiving */
+   err = spnic_set_port_enable(nic_dev->hwdev, true);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
+   eth_dev->data->name);
+   goto en_port_fail;
+   }
+
/* Update eth_dev link status */
if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
(void)spnic_link_update(eth_dev, 0);
@@ -924,6 +942,20 @@ static int spnic_dev_start(struct rte_eth_dev *eth_dev)
 
return 0;
 
+en_port_fail:
+   (void)spnic_set_vport_enable(nic_dev->hwdev, false);
+
+en_vport_fail:
+   /* Flush tx && rx chip resources in case of setting vport fake fail */
+   (void)spnic_flush_qps_res(nic_dev->hwdev);
+   rte_delay_ms(100);
+   for (i = 0; i < nic_dev->num_rqs; i++) {
+   rxq = nic_dev->rxqs[i];
+   spnic_remove_rq_from_rx_queue_list(nic_dev, rxq->q_id);
+   spnic_free_rxq_mbufs(rxq);
+   eth_dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+   eth_dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+   }
 start_rqs_fail:
spnic_remove_rxtx_configure(eth_dev);
 
@@ -951,6 +983,7 @@ static int spnic_dev_stop(struct rte_eth_dev *dev)
 {
struct spnic_nic_dev *nic_dev;
struct rte_eth_link link;
+   int err;
 
nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
if (!rte_bit_relaxed_test_and_clear32(SPNIC_DEV_START, 
&nic_dev->dev_status)) {
@@ -959,6 +992,19 @@ static int spnic_dev_stop(struct rte_eth_dev *dev)
return 0;
}
 
+   /* Stop phy port and vport */
+   err = spnic_set_port_enable(nic_dev->hwdev, false);
+   if (err)
+   PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, "
+   "dev_name: %s, port_id: %d", err, dev->data->name,
+   dev->data->port_id);
+
+   err = spnic_set_vport_enable(nic_dev->hwdev, false);
+   if (err)
+   PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, "
+   "dev_name: %s, port_id: %d", err, dev->data->name,
+   dev->data->port_id);
+
/* Clear recorded link status */
memset(&link, 0, sizeof(link));
(void)rte_eth_linkstatus_set(dev, &link);
-- 
2.27.0

[PATCH v1 12/25] net/spnic: support mbuf handling of Tx/Rx

[Yanling Song]

This patch defines a wqe data structure for hardware to
learn the sge info and offload info of packet. Furthermore,
this commit implements the interfaces to fill wqe with DPDK mbuf.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c |  23 ++
 drivers/net/spnic/base/spnic_nic_cfg.h |  23 ++
 drivers/net/spnic/meson.build  |   2 +
 drivers/net/spnic/spnic_ethdev.c   | 502 -
 drivers/net/spnic/spnic_rx.c   | 302 +++
 drivers/net/spnic/spnic_rx.h   |  41 ++
 drivers/net/spnic/spnic_tx.c   | 334 
 drivers/net/spnic/spnic_tx.h   | 228 +++
 8 files changed, 1454 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/spnic/spnic_rx.c
 create mode 100644 drivers/net/spnic/spnic_tx.c

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index 25d98d67dd..f6914f6f6d 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -378,6 +378,29 @@ int spnic_set_port_enable(void *hwdev, bool enable)
return 0;
 }
 
+int spnic_flush_qps_res(void *hwdev)
+{
+   struct spnic_cmd_clear_qp_resource sq_res;
+   u16 out_size = sizeof(sq_res);
+   int err;
+
+   if (!hwdev)
+   return -EINVAL;
+
+   memset(&sq_res, 0, sizeof(sq_res));
+   sq_res.func_id = spnic_global_func_id(hwdev);
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_CLEAR_QP_RESOURCE, 
&sq_res,
+sizeof(sq_res), &sq_res, &out_size);
+   if (err || !out_size || sq_res.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Clear sq resources failed, err: %d, status: 
0x%x, out size: 0x%x",
+   err, sq_res.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static int spnic_set_function_table(void *hwdev, u32 cfg_bitmap,
 struct spnic_func_tbl_cfg *cfg)
 {
diff --git a/drivers/net/spnic/base/spnic_nic_cfg.h 
b/drivers/net/spnic/base/spnic_nic_cfg.h
index ce9792f8ee..746c1c342d 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.h
+++ b/drivers/net/spnic/base/spnic_nic_cfg.h
@@ -255,6 +255,17 @@ struct spnic_cmd_register_vf {
u8 rsvd[39];
 };
 
+
+struct spnic_cmd_set_rq_flush {
+   union {
+   struct {
+   u16 global_rq_id;
+   u16 local_rq_id;
+   };
+   u32 value;
+   };
+};
+
 int l2nic_msg_to_mgmt_sync(void *hwdev, u16 cmd, void *buf_in, u16 in_size,
   void *buf_out, u16 *out_size);
 
@@ -381,6 +392,18 @@ int spnic_set_port_enable(void *hwdev, bool enable);
  */
 int spnic_get_link_state(void *hwdev, u8 *link_state);
 
+/**
+ * Flush queue pairs resource in hardware
+ *
+ * @param[in] hwdev
+ *   Device pointer to hwdev
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure
+ */
+int spnic_flush_qps_res(void *hwdev);
+
+
 /**
  * Init nic hwdev
  *
diff --git a/drivers/net/spnic/meson.build b/drivers/net/spnic/meson.build
index 20d5151a8d..cd8f316366 100644
--- a/drivers/net/spnic/meson.build
+++ b/drivers/net/spnic/meson.build
@@ -7,6 +7,8 @@ objs = [base_objs]
 sources = files(
'spnic_ethdev.c',
'spnic_io.c',
+   'spnic_rx.c',
+   'spnic_tx.c'
 )
 
 includes += include_directories('base')
diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 4205ab43a4..27942e5d68 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -139,6 +139,468 @@ static int spnic_link_update(struct rte_eth_dev *dev, int 
wait_to_complete)
return rte_eth_linkstatus_set(dev, &link);
 }
 
+static void spnic_reset_rx_queue(struct rte_eth_dev *dev)
+{
+   struct spnic_rxq *rxq = NULL;
+   struct spnic_nic_dev *nic_dev;
+   int q_id = 0;
+
+   nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+   for (q_id = 0; q_id < nic_dev->num_rqs; q_id++) {
+   rxq = nic_dev->rxqs[q_id];
+
+   rxq->cons_idx = 0;
+   rxq->prod_idx = 0;
+   rxq->delta = rxq->q_depth;
+   rxq->next_to_update = 0;
+   }
+}
+
+static void spnic_reset_tx_queue(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev;
+   struct spnic_txq *txq = NULL;
+   int q_id = 0;
+
+   nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+   for (q_id = 0; q_id < nic_dev->num_sqs; q_id++) {
+   txq = nic_dev->txqs[q_id];
+
+   txq->cons_idx = 0;
+   txq->prod_idx = 0;
+   txq->owner = 1;
+
+   /* Clear hardware ci */
+   *(u16 *)txq->ci_vaddr_base = 0;
+   }
+}
+
+/**
+ * Create the receive queue.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[in] qid
+ *   Receive queue index.
+ * @param[in] nb_desc
+ *   Number of des

[PATCH v1 18/25] net/spnic: support VLAN filtering and offloading

[Yanling Song]

This commit implements vlan_filter_set() and vlan_offload_set()
to support VLAN filtering and offloading.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c |   8 ++
 drivers/net/spnic/spnic_ethdev.c   | 121 +
 2 files changed, 129 insertions(+)

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index 6c22c4fb3d..0b1198eb5f 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -294,6 +294,14 @@ static int spnic_config_vlan(void *hwdev, u8 opcode, u16 
vlan_id, u16 func_id)
return 0;
 }
 
+int spnic_add_vlan(void *hwdev, u16 vlan_id, u16 func_id)
+{
+   if (!hwdev)
+   return -EINVAL;
+
+   return spnic_config_vlan(hwdev, SPNIC_CMD_OP_ADD, vlan_id, func_id);
+}
+
 int spnic_del_vlan(void *hwdev, u16 vlan_id, u16 func_id)
 {
if (!hwdev)
diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 61342db497..7f6bd41c55 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -1277,6 +1277,123 @@ static int spnic_dev_set_mtu(struct rte_eth_dev *dev, 
uint16_t mtu)
return err;
 }
 
+/**
+ * Add or delete vlan id.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[in] vlan_id
+ *   Vlan id is used to filter vlan packets
+ * @param[in] enable
+ *   Disable or enable vlan filter function
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id,
+int enable)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   int err = 0;
+   u16 func_id;
+
+   if (vlan_id >= RTE_ETHER_MAX_VLAN_ID)
+   return -EINVAL;
+
+   if (vlan_id == 0)
+   return 0;
+
+   func_id = spnic_global_func_id(nic_dev->hwdev);
+
+   if (enable) {
+   /* If vlanid is already set, just return */
+   if (spnic_find_vlan_filter(nic_dev, vlan_id)) {
+   PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
+   vlan_id, nic_dev->dev_name);
+   return 0;
+   }
+
+   err = spnic_add_vlan(nic_dev->hwdev, vlan_id, func_id);
+   } else {
+   /* If vlanid can't be found, just return */
+   if (!spnic_find_vlan_filter(nic_dev, vlan_id)) {
+   PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter 
list, device: %s",
+   vlan_id, nic_dev->dev_name);
+   return 0;
+   }
+
+   err = spnic_del_vlan(nic_dev->hwdev, vlan_id, func_id);
+   }
+
+   if (err) {
+   PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, 
err: %d",
+   enable ? "Add" : "Remove", func_id, vlan_id, err);
+   return err;
+   }
+
+   spnic_store_vlan_filter(nic_dev, vlan_id, enable);
+
+   PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
+   enable ? "Add" : "Remove", vlan_id, nic_dev->dev_name);
+
+   return 0;
+}
+
+/**
+ * Enable or disable vlan offload.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[in] mask
+ *   Definitions used for VLAN setting, vlan filter of vlan strip
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
+   bool on;
+   int err;
+
+   /* Enable or disable VLAN filter */
+   if (mask & ETH_VLAN_FILTER_MASK) {
+   on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
+true : false;
+   err = spnic_set_vlan_fliter(nic_dev->hwdev, on);
+   if (err) {
+   PMD_DRV_LOG(ERR, "%s vlan filter failed, device: %s, 
port_id: %d, err: %d",
+   on ? "Enable" : "Disable",
+   nic_dev->dev_name, dev->data->port_id, err);
+   return err;
+   }
+
+   PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: 
%d",
+   on ? "Enable" : "Disable",
+   nic_dev->dev_name, dev->data->port_id);
+   }
+
+   /* Enable or disable VLAN stripping */
+   if (mask & ETH_VLAN_STRIP_MASK) {
+   on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
+true : false;
+   err = spnic_set_rx_vlan_offload(nic_dev->hwdev, on);
+   if (err) {
+   PMD_DRV_LOG(ERR, "%s vlan strip failed, device: %s, 
port_id: %d, err: %d",
+

[PATCH v1 15/25] net/spnic: support IO packets handling

[Yanling Song]

This patch implements rx_pkt_burst() and tx_pkt_burst()
to hanld IO packets.

For Tx packets, this commit implements parsing ol_flags of
mbuf and filling those offload info on wqe so that hardware
can process the packets correctly. Furthermore, this commit
allocates a mempool to cover scenes with too many mbufs for
one packet.

For Rx packets, this commit implements filling ol_flags of
mbuf and rearming new mbuf and rq wqe.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c |  48 +++
 drivers/net/spnic/spnic_ethdev.h |   7 +
 drivers/net/spnic/spnic_rx.c | 209 
 drivers/net/spnic/spnic_rx.h | 137 
 drivers/net/spnic/spnic_tx.c | 524 +++
 drivers/net/spnic/spnic_tx.h |   7 +
 6 files changed, 932 insertions(+)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 826a34f7fc..b4d20e1a6f 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -970,6 +970,32 @@ static int spnic_dev_start(struct rte_eth_dev *eth_dev)
return err;
 }
 
+static int spnic_copy_mempool_init(struct spnic_nic_dev *nic_dev)
+{
+   nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->dev_name);
+   if (nic_dev->cpy_mpool == NULL) {
+   nic_dev->cpy_mpool =
+   rte_pktmbuf_pool_create(nic_dev->dev_name,
+   SPNIC_COPY_MEMPOOL_DEPTH, 0, 0,
+   SPNIC_COPY_MBUF_SIZE, rte_socket_id());
+   if (nic_dev->cpy_mpool == NULL) {
+   PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: 
%d, dev_name: %s",
+   rte_errno, nic_dev->dev_name);
+   return -ENOMEM;
+   }
+   }
+
+   return 0;
+}
+
+static void spnic_copy_mempool_uninit(struct spnic_nic_dev *nic_dev)
+{
+   if (nic_dev->cpy_mpool != NULL) {
+   rte_mempool_free(nic_dev->cpy_mpool);
+   nic_dev->cpy_mpool = NULL;
+   }
+}
+
 /**
  * Stop the device.
  *
@@ -986,6 +1012,9 @@ static int spnic_dev_stop(struct rte_eth_dev *dev)
int err;
 
nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   if (!nic_dev || !spnic_support_nic(nic_dev->hwdev))
+   return 0;
+
if (!rte_bit_relaxed_test_and_clear32(SPNIC_DEV_START, 
&nic_dev->dev_status)) {
PMD_DRV_LOG(INFO, "Device %s already stopped",
nic_dev->dev_name);
@@ -1014,6 +1043,11 @@ static int spnic_dev_stop(struct rte_eth_dev *dev)
 
spnic_flush_qps_res(nic_dev->hwdev);
 
+   /*
+* After set vport disable 100ms, no packets will be send to host
+*/
+   rte_delay_ms(100);
+
/* Clean RSS table and rx_mode */
spnic_remove_rxtx_configure(dev);
 
@@ -1054,6 +1088,7 @@ static int spnic_dev_close(struct rte_eth_dev *eth_dev)
for (qid = 0; qid < nic_dev->num_rqs; qid++)
spnic_rx_queue_release(eth_dev, qid);
 
+   spnic_copy_mempool_uninit(nic_dev);
spnic_deinit_sw_rxtxqs(nic_dev);
spnic_deinit_mac_addr(eth_dev);
rte_free(nic_dev->mc_list);
@@ -1067,6 +1102,8 @@ static int spnic_dev_close(struct rte_eth_dev *eth_dev)
spnic_free_nic_hwdev(nic_dev->hwdev);
spnic_free_hwdev(nic_dev->hwdev);
 
+   eth_dev->rx_pkt_burst = NULL;
+   eth_dev->tx_pkt_burst = NULL;
eth_dev->dev_ops = NULL;
 
rte_free(nic_dev->hwdev);
@@ -1548,6 +1585,13 @@ static int spnic_func_init(struct rte_eth_dev *eth_dev)
goto set_default_feature_fail;
}
 
+   err = spnic_copy_mempool_init(nic_dev);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
+eth_dev->data->name);
+   goto init_mpool_fail;
+   }
+
spnic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
 
rte_bit_relaxed_set32(SPNIC_DEV_INTR_EN, &nic_dev->dev_status);
@@ -1558,6 +1602,7 @@ static int spnic_func_init(struct rte_eth_dev *eth_dev)
 
return 0;
 
+init_mpool_fail:
 set_default_feature_fail:
spnic_deinit_mac_addr(eth_dev);
 
@@ -1602,6 +1647,9 @@ static int spnic_dev_init(struct rte_eth_dev *eth_dev)
(rte_eal_process_type() == RTE_PROC_PRIMARY) ?
"primary" : "secondary");
 
+   eth_dev->rx_pkt_burst = spnic_recv_pkts;
+   eth_dev->tx_pkt_burst = spnic_xmit_pkts;
+
return spnic_func_init(eth_dev);
 }
 
diff --git a/drivers/net/spnic/spnic_ethdev.h b/drivers/net/spnic/spnic_ethdev.h
index 996b4e4b8f..2b59886942 100644
--- a/drivers/net/spnic/spnic_ethdev.h
+++ b/drivers/net/spnic/spnic_ethdev.h
@@ -4,6 +4,9 @@
 
 #ifndef _SPNIC_ETHDEV_H_
 #define _SPNIC_ETHDEV_H_
+
+#define SPNIC_COPY_MEMPOOL_DEPTH   128
+#define SPNIC_COPY_MBUF_SIZE   4096
 #define SPNIC_DEV_NAME_LEN 32
 
 #define SPNIC_UINT32_BIT_SIZE  (

[PATCH v1 16/25] net/spnic: add device configure/version/info

[Yanling Song]

This commit adds the callbacks to configure queue number and mtu
as well as query configuration information and firmware version.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c | 148 ++-
 1 file changed, 146 insertions(+), 2 deletions(-)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index b4d20e1a6f..c97f15e871 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -71,12 +71,150 @@ enum spnic_rx_mod {
 #define SPNIC_TXD_ALIGN1
 #define SPNIC_RXD_ALIGN1
 
+static const struct rte_eth_desc_lim spnic_rx_desc_lim = {
+   .nb_max = SPNIC_MAX_QUEUE_DEPTH,
+   .nb_min = SPNIC_MIN_QUEUE_DEPTH,
+   .nb_align = SPNIC_RXD_ALIGN,
+};
+
+static const struct rte_eth_desc_lim spnic_tx_desc_lim = {
+   .nb_max = SPNIC_MAX_QUEUE_DEPTH,
+   .nb_min = SPNIC_MIN_QUEUE_DEPTH,
+   .nb_align = SPNIC_TXD_ALIGN,
+};
+
 /**
- * Deinit mac_vlan table in hardware.
+ * Ethernet device configuration.
  *
- * @param[in] eth_dev
+ * Prepare the driver for a given number of TX and RX queues, mtu size
+ * and configure RSS.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure.
+ */
+static int spnic_dev_configure(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+   nic_dev->num_sqs =  dev->data->nb_tx_queues;
+   nic_dev->num_rqs = dev->data->nb_rx_queues;
+
+   if (nic_dev->num_sqs > nic_dev->max_sqs ||
+   nic_dev->num_rqs > nic_dev->max_rqs) {
+   PMD_DRV_LOG(ERR, "num_sqs: %d or num_rqs: %d larger than 
max_sqs: %d or max_rqs: %d",
+   nic_dev->num_sqs, nic_dev->num_rqs,
+   nic_dev->max_sqs, nic_dev->max_rqs);
+   return -EINVAL;
+   }
+
+   /* The range of mtu is 384~9600 */
+   if (SPNIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) <
+   SPNIC_MIN_FRAME_SIZE ||
+   SPNIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) >
+   SPNIC_MAX_JUMBO_FRAME_SIZE) {
+   PMD_DRV_LOG(ERR, "Max rx pkt len out of range, mtu: %d, expect 
between %d and %d",
+   dev->data->dev_conf.rxmode.mtu,
+   SPNIC_MIN_FRAME_SIZE, SPNIC_MAX_JUMBO_FRAME_SIZE);
+   return -EINVAL;
+   }
+
+   nic_dev->mtu_size =
+   SPNIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.mtu);
+
+   if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+   dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
+   return 0;
+}
+
+/**
+ * Get information about the device.
+ *
+ * @param[in] dev
  *   Pointer to ethernet device structure.
+ * @param[out] info
+ *   Info structure for ethernet device.
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure.
  */
+static int spnic_dev_infos_get(struct rte_eth_dev *dev,
+  struct rte_eth_dev_info *info)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+   info->max_rx_queues  = nic_dev->max_rqs;
+   info->max_tx_queues  = nic_dev->max_sqs;
+   info->min_rx_bufsize = SPNIC_MIN_RX_BUF_SIZE;
+   info->max_rx_pktlen  = SPNIC_MAX_JUMBO_FRAME_SIZE;
+   info->max_mac_addrs  = SPNIC_MAX_UC_MAC_ADDRS;
+   info->min_mtu = SPNIC_MIN_MTU_SIZE;
+   info->max_mtu = SPNIC_MAX_MTU_SIZE;
+   info->max_lro_pkt_size = SPNIC_MAX_LRO_SIZE;
+
+   info->rx_queue_offload_capa = 0;
+   info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
+   DEV_RX_OFFLOAD_IPV4_CKSUM |
+   DEV_RX_OFFLOAD_UDP_CKSUM |
+   DEV_RX_OFFLOAD_TCP_CKSUM |
+   DEV_RX_OFFLOAD_SCTP_CKSUM |
+   DEV_RX_OFFLOAD_VLAN_FILTER |
+   DEV_RX_OFFLOAD_SCATTER |
+   DEV_RX_OFFLOAD_TCP_LRO |
+   DEV_RX_OFFLOAD_RSS_HASH;
+
+   info->tx_queue_offload_capa = 0;
+   info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
+   DEV_TX_OFFLOAD_IPV4_CKSUM |
+   DEV_TX_OFFLOAD_UDP_CKSUM |
+   DEV_TX_OFFLOAD_TCP_CKSUM |
+   DEV_TX_OFFLOAD_SCTP_CKSUM |
+   DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+   DEV_TX_OFFLOAD_TCP_TSO |
+   DEV_TX_OFFLOAD_MULTI_SEGS;
+
+   info->hash_key_size = SPNIC_RSS_KEY_SIZE;
+   info->reta_size = SPNIC_RSS_INDIR_SIZE;
+   info->flow_type_rss_offloads = SPNIC_RSS_OFFLOAD_ALL;
+
+   info->rx_desc_lim = spnic_rx_desc_lim;
+   info->tx_desc_lim = spnic_tx_desc_lim;
+
+   /* Driver-prefer

[PATCH v1 19/25] net/spnic: support promiscuous and allmulticast Rx modes

[Yanling Song]

This commit implements promiscuous_enable/disable() and
allmulticast_enable/disable() to configure promiscuous or
allmulticast Rx modes. Note: promiscuous rx mode is only supported
by PF.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c | 156 +++
 1 file changed, 156 insertions(+)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 7f6bd41c55..0b5ef15373 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -1394,6 +1394,156 @@ static int spnic_vlan_offload_set(struct rte_eth_dev 
*dev, int mask)
return 0;
 }
 
+/**
+ * Enable allmulticast mode.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_dev_allmulticast_enable(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u32 rx_mode;
+   int err;
+
+   err = spnic_mutex_lock(&nic_dev->rx_mode_mutex);
+   if (err)
+   return err;
+
+   rx_mode = nic_dev->rx_mode | SPNIC_RX_MODE_MC_ALL;
+
+   err = spnic_set_rx_mode(nic_dev->hwdev, rx_mode);
+   if (err) {
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+   PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", err);
+   return err;
+   }
+
+   nic_dev->rx_mode = rx_mode;
+
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+   PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: 
%d",
+   nic_dev->dev_name, dev->data->port_id);
+   return 0;
+}
+
+/**
+ * Disable allmulticast mode.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_dev_allmulticast_disable(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u32 rx_mode;
+   int err;
+
+   err = spnic_mutex_lock(&nic_dev->rx_mode_mutex);
+   if (err)
+   return err;
+
+   rx_mode = nic_dev->rx_mode & (~SPNIC_RX_MODE_MC_ALL);
+
+   err = spnic_set_rx_mode(nic_dev->hwdev, rx_mode);
+   if (err) {
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+   PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", err);
+   return err;
+   }
+
+   nic_dev->rx_mode = rx_mode;
+
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+   PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: 
%d",
+   nic_dev->dev_name, dev->data->port_id);
+   return 0;
+}
+
+/**
+ * Enable promiscuous mode.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_dev_promiscuous_enable(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u32 rx_mode;
+   int err;
+
+   err = spnic_mutex_lock(&nic_dev->rx_mode_mutex);
+   if (err)
+   return err;
+
+   rx_mode = nic_dev->rx_mode | SPNIC_RX_MODE_PROMISC;
+
+   err = spnic_set_rx_mode(nic_dev->hwdev, rx_mode);
+   if (err) {
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+   PMD_DRV_LOG(ERR, "Enable promiscuous failed");
+   return err;
+   }
+
+   nic_dev->rx_mode = rx_mode;
+
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+   PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, 
promisc: %d",
+   nic_dev->dev_name, dev->data->port_id,
+   dev->data->promiscuous);
+   return 0;
+}
+
+/**
+ * Disable promiscuous mode.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_dev_promiscuous_disable(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u32 rx_mode;
+   int err;
+
+   err = spnic_mutex_lock(&nic_dev->rx_mode_mutex);
+   if (err)
+   return err;
+
+   rx_mode = nic_dev->rx_mode & (~SPNIC_RX_MODE_PROMISC);
+
+   err = spnic_set_rx_mode(nic_dev->hwdev, rx_mode);
+   if (err) {
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+   PMD_DRV_LOG(ERR, "Disable promiscuous failed");
+   return err;
+   }
+
+   nic_dev->rx_mode = rx_mode;
+
+   (void)spnic_mutex_unlock(&nic_dev->rx_mode_mutex);
+
+   PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, 
promisc: %d",
+   nic_dev->dev_name, dev->data->port_id,
+   dev->data->promiscuous);
+   return 0;
+}
+
 
 /**
  * Update the RSS hash key and RSS hash type.
@@ -1830,6 +1980,10 @@ st

[PATCH v1 17/25] net/spnic: support RSS configuration update and get

[Yanling Song]

This commit implements rss_hash_update and rss_hash_conf_get.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c | 235 +++
 1 file changed, 235 insertions(+)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index c97f15e871..61342db497 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -1277,6 +1277,233 @@ static int spnic_dev_set_mtu(struct rte_eth_dev *dev, 
uint16_t mtu)
return err;
 }
 
+
+/**
+ * Update the RSS hash key and RSS hash type.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[in] rss_conf
+ *   RSS configuration data.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_rss_hash_update(struct rte_eth_dev *dev,
+struct rte_eth_rss_conf *rss_conf)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct spnic_rss_type rss_type = {0};
+   u64 rss_hf = rss_conf->rss_hf;
+   int err = 0;
+
+   if (nic_dev->rss_state == SPNIC_RSS_DISABLE) {
+   if (rss_hf != 0)
+   return -EINVAL;
+
+   PMD_DRV_LOG(INFO, "RSS is not enabled");
+   return 0;
+   }
+
+   if (rss_conf->rss_key_len > SPNIC_RSS_KEY_SIZE) {
+   PMD_DRV_LOG(ERR, "Invalid RSS key, rss_key_len: %d",
+   rss_conf->rss_key_len);
+   return -EINVAL;
+   }
+
+   if (rss_conf->rss_key) {
+   err = spnic_rss_set_hash_key(nic_dev->hwdev, nic_dev->rss_key);
+   if (err) {
+   PMD_DRV_LOG(ERR, "Set RSS hash key failed");
+   return err;
+   }
+   memcpy(nic_dev->rss_key, rss_conf->rss_key,
+  rss_conf->rss_key_len);
+   }
+
+   rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
+   ETH_RSS_NONFRAG_IPV4_OTHER)) ? 1 : 0;
+   rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
+   rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
+   ETH_RSS_NONFRAG_IPV6_OTHER)) ? 1 : 0;
+   rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
+   rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
+   rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
+   rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
+   rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
+
+   err = spnic_set_rss_type(nic_dev->hwdev, rss_type);
+   if (err)
+   PMD_DRV_LOG(ERR, "Set RSS type failed");
+
+   return err;
+}
+
+/**
+ * Get the RSS hash configuration.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[out] rss_conf
+ *   RSS configuration data.
+ *
+ * @retval zero: Success
+ * @retval non-zero: Failure
+ */
+static int spnic_rss_conf_get(struct rte_eth_dev *dev,
+ struct rte_eth_rss_conf *rss_conf)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct spnic_rss_type rss_type = {0};
+   int err;
+
+   if (!rss_conf)
+   return -EINVAL;
+
+   if (nic_dev->rss_state == SPNIC_RSS_DISABLE) {
+   rss_conf->rss_hf = 0;
+   PMD_DRV_LOG(INFO, "RSS is not enabled");
+   return 0;
+   }
+
+   if (rss_conf->rss_key &&
+   rss_conf->rss_key_len >= SPNIC_RSS_KEY_SIZE) {
+   /*
+* Get RSS key from driver to reduce the frequency of the MPU
+* accessing the RSS memory.
+*/
+   rss_conf->rss_key_len = sizeof(nic_dev->rss_key);
+   memcpy(rss_conf->rss_key, nic_dev->rss_key,
+  rss_conf->rss_key_len);
+   }
+
+   err = spnic_get_rss_type(nic_dev->hwdev, &rss_type);
+   if (err)
+   return err;
+
+   rss_conf->rss_hf = 0;
+   rss_conf->rss_hf |=  rss_type.ipv4 ? (ETH_RSS_IPV4 |
+   ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER) : 0;
+   rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
+   rss_conf->rss_hf |=  rss_type.ipv6 ? (ETH_RSS_IPV6 |
+   ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_OTHER) : 0;
+   rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
+   rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
+   rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
+   rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
+   rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
+
+   return 0;
+}
+
+/**
+ * Get the RETA indirection table.
+ *
+ * @param[in] dev
+ *   Pointer to ethernet device structure.
+ * @param[out] reta_conf
+ *   Pointer to RETA configuration structure array.
+ 

[PATCH v1 21/25] net/spnic: support getting Tx/Rx queues info

[Yanling Song]

This patch implements rxq_info_get() and txq_info_get() to
support getting queue depth and mbuf pool info of specified
Tx/Rx queue.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/spnic_ethdev.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index dc7fcae10f..2cd68e0178 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -1846,6 +1846,23 @@ static int spnic_rss_reta_update(struct rte_eth_dev *dev,
return err;
 }
 
+static void spnic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+  struct rte_eth_rxq_info *rxq_info)
+{
+   struct spnic_rxq *rxq = dev->data->rx_queues[queue_id];
+
+   rxq_info->mp = rxq->mb_pool;
+   rxq_info->nb_desc = rxq->q_depth;
+}
+
+static void spnic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+  struct rte_eth_txq_info *txq_qinfo)
+{
+   struct spnic_txq *txq = dev->data->tx_queues[queue_id];
+
+   txq_qinfo->nb_desc = txq->q_depth;
+}
+
 /**
  * Update MAC address
  *
@@ -2065,6 +2082,8 @@ static const struct eth_dev_ops spnic_pmd_ops = {
.rss_hash_conf_get = spnic_rss_conf_get,
.reta_update   = spnic_rss_reta_update,
.reta_query= spnic_rss_reta_query,
+   .rxq_info_get  = spnic_rxq_info_get,
+   .txq_info_get  = spnic_txq_info_get,
.mac_addr_set  = spnic_set_mac_addr,
.mac_addr_remove   = spnic_mac_addr_remove,
.mac_addr_add  = spnic_mac_addr_add,
@@ -2092,6 +2111,8 @@ static const struct eth_dev_ops spnic_pmd_vf_ops = {
.rss_hash_conf_get = spnic_rss_conf_get,
.reta_update   = spnic_rss_reta_update,
.reta_query= spnic_rss_reta_query,
+   .rxq_info_get  = spnic_rxq_info_get,
+   .txq_info_get  = spnic_txq_info_get,
.mac_addr_set  = spnic_set_mac_addr,
.mac_addr_remove   = spnic_mac_addr_remove,
.mac_addr_add  = spnic_mac_addr_add,
-- 
2.27.0

[PATCH v1 20/25] net/spnic: support flow control

[Yanling Song]

This commit implements flow control operations
to support related syscalls.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c | 53 ++
 drivers/net/spnic/base/spnic_nic_cfg.h | 25 +
 drivers/net/spnic/spnic_ethdev.c   | 77 ++
 drivers/net/spnic/spnic_ethdev.h   |  1 +
 4 files changed, 156 insertions(+)

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index 0b1198eb5f..24336a2096 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -440,6 +440,59 @@ int spnic_flush_qps_res(void *hwdev)
return 0;
 }
 
+static int spnic_cfg_hw_pause(void *hwdev, u8 opcode,
+  struct nic_pause_config *nic_pause)
+{
+   struct spnic_cmd_pause_config pause_info;
+   u16 out_size = sizeof(pause_info);
+   int err;
+
+   memset(&pause_info, 0, sizeof(pause_info));
+
+   pause_info.port_id = spnic_physical_port_id(hwdev);
+   pause_info.opcode = opcode;
+   if (opcode == SPNIC_CMD_OP_SET) {
+   pause_info.auto_neg = nic_pause->auto_neg;
+   pause_info.rx_pause = nic_pause->rx_pause;
+   pause_info.tx_pause = nic_pause->tx_pause;
+   }
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_CFG_PAUSE_INFO,
+&pause_info, sizeof(pause_info),
+&pause_info, &out_size);
+   if (err || !out_size || pause_info.msg_head.status) {
+   PMD_DRV_LOG(ERR, "%s pause info failed, err: %d, status: 0x%x, 
out size: 0x%x\n",
+   opcode == SPNIC_CMD_OP_SET ? "Set" : "Get",
+   err, pause_info.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   if (opcode == SPNIC_CMD_OP_GET) {
+   nic_pause->auto_neg = pause_info.auto_neg;
+   nic_pause->rx_pause = pause_info.rx_pause;
+   nic_pause->tx_pause = pause_info.tx_pause;
+   }
+
+   return 0;
+}
+
+int spnic_set_pause_info(void *hwdev, struct nic_pause_config nic_pause)
+{
+   if (!hwdev)
+   return -EINVAL;
+
+   return spnic_cfg_hw_pause(hwdev, SPNIC_CMD_OP_SET, &nic_pause);
+}
+
+int spnic_get_pause_info(void *hwdev, struct nic_pause_config *nic_pause)
+{
+   if (!hwdev || !nic_pause)
+   return -EINVAL;
+
+
+   return spnic_cfg_hw_pause(hwdev, SPNIC_CMD_OP_GET, nic_pause);
+}
+
 static int spnic_set_function_table(void *hwdev, u32 cfg_bitmap,
 struct spnic_func_tbl_cfg *cfg)
 {
diff --git a/drivers/net/spnic/base/spnic_nic_cfg.h 
b/drivers/net/spnic/base/spnic_nic_cfg.h
index 3a906b4bc3..2cdaada2ea 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.h
+++ b/drivers/net/spnic/base/spnic_nic_cfg.h
@@ -560,6 +560,31 @@ int spnic_get_link_state(void *hwdev, u8 *link_state);
  */
 int spnic_flush_qps_res(void *hwdev);
 
+/**
+ * Set pause info
+ *
+ * @param[in] hwdev
+ *   Device pointer to hwdev
+ * @param[in] nic_pause
+ *   Pause info
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure
+ */
+int spnic_set_pause_info(void *hwdev, struct nic_pause_config nic_pause);
+
+/**
+ * Get pause info
+ *
+ * @param[in] hwdev
+ *   Device pointer to hwdev
+ * @param[out] nic_pause
+ *   Pause info
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure
+ */
+int spnic_get_pause_info(void *hwdev, struct nic_pause_config *nic_pause);
 
 /**
  * Init nic hwdev
diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 0b5ef15373..dc7fcae10f 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -1544,6 +1544,81 @@ static int spnic_dev_promiscuous_disable(struct 
rte_eth_dev *dev)
return 0;
 }
 
+static int spnic_dev_flow_ctrl_get(struct rte_eth_dev *dev,
+  struct rte_eth_fc_conf *fc_conf)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct nic_pause_config nic_pause;
+   int err;
+
+   err = spnic_mutex_lock(&nic_dev->pause_mutuex);
+   if (err)
+   return err;
+
+   memset(&nic_pause, 0, sizeof(nic_pause));
+   err = spnic_get_pause_info(nic_dev->hwdev, &nic_pause);
+   if (err) {
+   (void)spnic_mutex_unlock(&nic_dev->pause_mutuex);
+   return err;
+   }
+
+   if (nic_dev->pause_set || !nic_pause.auto_neg) {
+   nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
+   nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
+   }
+
+   fc_conf->autoneg = nic_pause.auto_neg;
+
+   if (nic_pause.tx_pause && nic_pause.rx_pause)
+   fc_conf->mode = RTE_FC_FULL;
+   else if (nic_pause.tx_pause)
+   fc_conf->mode = RTE_FC_TX_PAUSE;
+   else if (nic_pause.rx_pause)
+   fc_conf->mode 

[PATCH v1 23/25] net/spnic: support VFIO interrupt

[Yanling Song]

This commit supports VFIO interrupt for Rx queue and
asynchronous event, and implements rx_queue_intr_disable()
and rx_queue_intr_enable() to disable/enable the interrupt
of specified Rx queue.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_eqs.c |  11 ++
 drivers/net/spnic/spnic_ethdev.c   | 218 -
 drivers/net/spnic/spnic_ethdev.h   |   3 +
 drivers/net/spnic/spnic_rx.c   |   2 +
 4 files changed, 233 insertions(+), 1 deletion(-)

diff --git a/drivers/net/spnic/base/spnic_eqs.c 
b/drivers/net/spnic/base/spnic_eqs.c
index ee52252ecc..513d0329ed 100644
--- a/drivers/net/spnic/base/spnic_eqs.c
+++ b/drivers/net/spnic/base/spnic_eqs.c
@@ -12,6 +12,7 @@
 #include "spnic_eqs.h"
 #include "spnic_mgmt.h"
 #include "spnic_mbox.h"
+#include "spnic_hw_comm.h"
 #include "spnic_nic_event.h"
 
 #define AEQ_CTRL_0_INTR_IDX_SHIFT  0
@@ -648,3 +649,13 @@ int spnic_aeq_poll_msg(struct spnic_eq *eq, u32 timeout, 
void *param)
 
return err;
 }
+
+void spnic_dev_handle_aeq_event(struct spnic_hwdev *hwdev, void *param)
+{
+   struct spnic_eq *aeq = &hwdev->aeqs->aeq[0];
+
+   /* Clear resend timer cnt register */
+   spnic_misx_intr_clear_resend_bit(hwdev, aeq->eq_irq.msix_entry_idx,
+EQ_MSIX_RESEND_TIMER_CLEAR);
+   (void)spnic_aeq_poll_msg(aeq, 0, param);
+}
diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index 4de86fd08a..e4db4afdfd 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -248,6 +248,28 @@ static const struct rte_eth_desc_lim spnic_tx_desc_lim = {
.nb_align = SPNIC_TXD_ALIGN,
 };
 
+/**
+ * Interrupt handler triggered by NIC for handling specific event
+ *
+ * @param[in] param
+ *   The address of parameter (struct rte_eth_dev *) regsitered before
+ */
+static void spnic_dev_interrupt_handler(void *param)
+{
+   struct rte_eth_dev *dev = param;
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+   if (!rte_bit_relaxed_get32(SPNIC_DEV_INTR_EN, &nic_dev->dev_status)) {
+   PMD_DRV_LOG(WARNING,
+   "Intr is disabled, ignore intr event, dev_name: %s, 
port_id: %d",
+   nic_dev->dev_name, dev->data->port_id);
+   return;
+   }
+
+   /* Aeq0 msg handler */
+   spnic_dev_handle_aeq_event(nic_dev->hwdev, param);
+}
+
 /**
  * Ethernet device configuration.
  *
@@ -971,6 +993,46 @@ static void spnic_deinit_mac_addr(struct rte_eth_dev 
*eth_dev)
spnic_delete_mc_addr_list(nic_dev);
 }
 
+int spnic_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
+   uint16_t queue_id)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u16 msix_intr;
+
+   if (!rte_intr_dp_is_en(intr_handle))
+   return 0;
+
+   if (queue_id >= dev->data->nb_rx_queues)
+   return -EINVAL;
+
+   msix_intr = (u16)(queue_id + RTE_INTR_VEC_RXTX_OFFSET);
+   spnic_set_msix_state(nic_dev->hwdev, msix_intr, SPNIC_MSIX_ENABLE);
+
+   return 0;
+}
+
+int spnic_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   u16 msix_intr;
+
+   if (!rte_intr_dp_is_en(intr_handle))
+   return 0;
+
+   if (queue_id >= dev->data->nb_rx_queues)
+   return -EINVAL;
+
+   msix_intr = (u16)(queue_id + RTE_INTR_VEC_RXTX_OFFSET);
+   spnic_set_msix_state(nic_dev->hwdev, msix_intr, SPNIC_MSIX_DISABLE);
+   spnic_misx_intr_clear_resend_bit(nic_dev->hwdev, msix_intr, 1);
+
+   return 0;
+}
+
 static int spnic_set_rxtx_configure(struct rte_eth_dev *dev)
 {
struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
@@ -1104,6 +1166,108 @@ static void spnic_remove_all_vlanid(struct rte_eth_dev 
*dev)
}
 }
 
+static void spnic_disable_interrupt(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+
+   if (!rte_bit_relaxed_get32(SPNIC_DEV_INIT, &nic_dev->dev_status))
+   return;
+
+   /* disable rte interrupt */
+   rte_intr_disable(pci_dev->intr_handle);
+   rte_intr_callback_unregister(pci_dev->intr_handle,
+spnic_dev_interrupt_handler, (void *)dev);
+}
+
+static void spnic_enable_interrupt(struct rte_eth_dev *dev)
+{
+   struct spnic_nic_dev *nic_dev = SPNIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+   struct rte_pci_device *pc

[PATCH v1 22/25] net/spnic: net/spnic: support xstats statistics

[Yanling Song]

This commit implements DFX statistics of
physical port, function, Rx queues and Tx queues,
which includes MAC statistic, unicast/multicast/broadcast
packets statistic, rx_mbuf, tx_busy and etc.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c | 118 ++
 drivers/net/spnic/base/spnic_nic_cfg.h | 206 +++
 drivers/net/spnic/spnic_ethdev.c   | 474 +
 3 files changed, 798 insertions(+)

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index 24336a2096..ce77b306db 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -493,6 +493,124 @@ int spnic_get_pause_info(void *hwdev, struct 
nic_pause_config *nic_pause)
return spnic_cfg_hw_pause(hwdev, SPNIC_CMD_OP_GET, nic_pause);
 }
 
+int spnic_get_vport_stats(void *hwdev, struct spnic_vport_stats *stats)
+{
+   struct spnic_port_stats_info stats_info;
+   struct spnic_cmd_vport_stats vport_stats;
+   u16 out_size = sizeof(vport_stats);
+   int err;
+
+   if (!hwdev || !stats)
+   return -EINVAL;
+
+   memset(&stats_info, 0, sizeof(stats_info));
+   memset(&vport_stats, 0, sizeof(vport_stats));
+
+   stats_info.func_id = spnic_global_func_id(hwdev);
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_GET_VPORT_STAT,
+&stats_info, sizeof(stats_info),
+&vport_stats, &out_size);
+   if (err || !out_size || vport_stats.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Get function stats failed, err: %d, status: 
0x%x, out size: 0x%x",
+   err, vport_stats.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   memcpy(stats, &vport_stats.stats, sizeof(*stats));
+
+   return 0;
+}
+
+int spnic_get_phy_port_stats(void *hwdev, struct mag_phy_port_stats *stats)
+{
+   struct mag_cmd_get_port_stat *port_stats = NULL;
+   struct mag_cmd_port_stats_info stats_info;
+   u16 out_size = sizeof(*port_stats);
+   int err;
+
+   port_stats = rte_zmalloc("port_stats", sizeof(*port_stats), 0);
+   if (!port_stats)
+   return -ENOMEM;
+
+   memset(&stats_info, 0, sizeof(stats_info));
+   stats_info.port_id = spnic_physical_port_id(hwdev);
+
+   err = mag_msg_to_mgmt_sync(hwdev, MAG_CMD_GET_PORT_STAT,
+  &stats_info, sizeof(stats_info),
+  port_stats, &out_size);
+   if (err || !out_size || port_stats->head.status) {
+   PMD_DRV_LOG(ERR,
+   "Failed to get port statistics, err: %d, status: 0x%x, 
out size: 0x%x\n",
+   err, port_stats->head.status, out_size);
+   err = -EIO;
+   goto out;
+   }
+
+   memcpy(stats, &port_stats->counter, sizeof(*stats));
+
+out:
+   rte_free(port_stats);
+
+   return err;
+}
+
+int spnic_clear_vport_stats(void *hwdev)
+{
+   struct spnic_cmd_clear_vport_stats clear_vport_stats;
+   u16 out_size = sizeof(clear_vport_stats);
+   int err;
+
+   if (!hwdev) {
+   PMD_DRV_LOG(ERR, "Hwdev is NULL");
+   return -EINVAL;
+   }
+
+   memset(&clear_vport_stats, 0, sizeof(clear_vport_stats));
+   clear_vport_stats.func_id = spnic_global_func_id(hwdev);
+
+   err = l2nic_msg_to_mgmt_sync(hwdev, SPNIC_CMD_CLEAN_VPORT_STAT,
+&clear_vport_stats,
+sizeof(clear_vport_stats),
+&clear_vport_stats, &out_size);
+   if (err || !out_size || clear_vport_stats.msg_head.status) {
+   PMD_DRV_LOG(ERR, "Clear vport stats failed, err: %d, status: 
0x%x, out size: 0x%x",
+   err, clear_vport_stats.msg_head.status, out_size);
+   return -EIO;
+   }
+
+   return 0;
+}
+
+int spnic_clear_phy_port_stats(void *hwdev)
+{
+   struct mag_cmd_clr_port_stat *port_stats = NULL;
+   u16 out_size = sizeof(*port_stats);
+   int err;
+
+   port_stats = rte_zmalloc("port_stats", sizeof(*port_stats), 0);
+   if (!port_stats)
+   return -ENOMEM;
+
+   port_stats->port_id = spnic_physical_port_id(hwdev);
+
+   err = mag_msg_to_mgmt_sync(hwdev, MAG_CMD_GET_PORT_STAT,
+  &port_stats, sizeof(port_stats),
+  port_stats, &out_size);
+   if (err || !out_size || port_stats->head.status) {
+   PMD_DRV_LOG(ERR,
+   "Failed to get port statistics, err: %d, status: 0x%x, 
out size: 0x%x\n",
+   err, port_stats->head.status, out_size);
+   err = -EIO;
+   goto out;
+   }
+
+out:
+   rte_free(port_stats);
+
+   return err;
+}
+
 static int spnic_set_function_table(void *hwd

[PATCH v1 24/25] net/spnic: support Tx/Rx queue start/stop

[Yanling Song]

This commit support starting or stopping a specified Rx/Tx queue
For Rx queue:
when startting rx queue, mbuf will be allocated and fill rq
wqe with mbuf info, then add the qid to indirect table of RSS.
if the first rx queue is started, the valid bit in function table
will be setted so that the packets can be received to host.
when stopping rx queue, the PMD driver will poll the rx queue
until it is empty and release the mbuf, then the PMD driver will
remove the qid for RSS indirect table. if the last rx queue is
stopped, the valid bit in function table will be cleared.

For Rx queue:
when stopping tx queue, the PMD driver will wait until all tx
packets are sent and then releases all mbuf.

Signed-off-by: Yanling Song 
---
 drivers/net/spnic/base/spnic_nic_cfg.c |  33 
 drivers/net/spnic/base/spnic_nic_cfg.h |  13 ++
 drivers/net/spnic/spnic_ethdev.c   |  82 +
 drivers/net/spnic/spnic_rx.c   | 222 +
 drivers/net/spnic/spnic_rx.h   |   4 +
 5 files changed, 354 insertions(+)

diff --git a/drivers/net/spnic/base/spnic_nic_cfg.c 
b/drivers/net/spnic/base/spnic_nic_cfg.c
index ce77b306db..934f11a881 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.c
+++ b/drivers/net/spnic/base/spnic_nic_cfg.c
@@ -1289,6 +1289,39 @@ int spnic_vf_get_default_cos(void *hwdev, u8 *cos_id)
return 0;
 }
 
+int spnic_set_rq_flush(void *hwdev, u16 q_id)
+{
+   struct spnic_cmd_set_rq_flush *rq_flush_msg = NULL;
+   struct spnic_cmd_buf *cmd_buf = NULL;
+   u64 out_param = EIO;
+   int err;
+
+   cmd_buf = spnic_alloc_cmd_buf(hwdev);
+   if (!cmd_buf) {
+   PMD_DRV_LOG(ERR, "Failed to allocate cmd buf\n");
+   return -ENOMEM;
+   }
+
+   cmd_buf->size = sizeof(*rq_flush_msg);
+
+   rq_flush_msg = cmd_buf->buf;
+   rq_flush_msg->local_rq_id = q_id;
+   rq_flush_msg->value = cpu_to_be32(rq_flush_msg->value);
+
+   err = spnic_cmdq_direct_resp(hwdev, SPNIC_MOD_L2NIC,
+SPNIC_UCODE_CMD_SET_RQ_FLUSH, cmd_buf,
+&out_param, 0);
+   if (err || out_param != 0) {
+   PMD_DRV_LOG(ERR, "Failed to set rq flush, err:%d, out_param: 
%"PRIu64"",
+   err, out_param);
+   err = -EFAULT;
+   }
+
+   spnic_free_cmd_buf(cmd_buf);
+
+   return err;
+}
+
 static int _mag_msg_to_mgmt_sync(void *hwdev, u16 cmd, void *buf_in,
 u16 in_size, void *buf_out, u16 *out_size)
 {
diff --git a/drivers/net/spnic/base/spnic_nic_cfg.h 
b/drivers/net/spnic/base/spnic_nic_cfg.h
index e5e4ffea4b..e4b4a52d32 100644
--- a/drivers/net/spnic/base/spnic_nic_cfg.h
+++ b/drivers/net/spnic/base/spnic_nic_cfg.h
@@ -1069,6 +1069,19 @@ int spnic_set_vlan_fliter(void *hwdev, u32 
vlan_filter_ctrl);
  */
 int spnic_vf_get_default_cos(void *hwdev, u8 *cos_id);
 
+/**
+ * Flush rx queue resource
+ *
+ * @param[in] hwdev
+ *   Device pointer to hwdev
+ * @param[in] q_id
+ *   rx queue id
+ *
+ * @retval zero : Success
+ * @retval non-zero : Failure
+ */
+int spnic_set_rq_flush(void *hwdev, u16 q_id);
+
 /**
  * Get service feature HW supported
  *
diff --git a/drivers/net/spnic/spnic_ethdev.c b/drivers/net/spnic/spnic_ethdev.c
index e4db4afdfd..ff50715120 100644
--- a/drivers/net/spnic/spnic_ethdev.c
+++ b/drivers/net/spnic/spnic_ethdev.c
@@ -993,6 +993,80 @@ static void spnic_deinit_mac_addr(struct rte_eth_dev 
*eth_dev)
spnic_delete_mc_addr_list(nic_dev);
 }
 
+static int spnic_dev_rx_queue_start(__rte_unused struct rte_eth_dev *dev,
+__rte_unused uint16_t rq_id)
+{
+   struct spnic_rxq *rxq = NULL;
+   int rc;
+
+   if (rq_id < dev->data->nb_rx_queues) {
+   rxq = dev->data->rx_queues[rq_id];
+
+   rc = spnic_start_rq(dev, rxq);
+   if (rc) {
+   PMD_DRV_LOG(ERR, "Start rx queue failed, eth_dev:%s, 
queue_idx:%d",
+   dev->data->name, rq_id);
+   return rc;
+   }
+
+   dev->data->rx_queue_state[rq_id] = RTE_ETH_QUEUE_STATE_STARTED;
+   }
+
+   return 0;
+}
+
+static int spnic_dev_rx_queue_stop(__rte_unused struct rte_eth_dev *dev,
+   __rte_unused uint16_t rq_id)
+{
+   struct spnic_rxq *rxq = NULL;
+   int rc;
+
+   if (rq_id < dev->data->nb_rx_queues) {
+   rxq = dev->data->rx_queues[rq_id];
+
+   rc = spnic_stop_rq(dev, rxq);
+   if (rc) {
+   PMD_DRV_LOG(ERR, "Stop rx queue failed, eth_dev:%s, 
queue_idx:%d",
+   dev->data->name, rq_id);
+   return rc;
+   }
+
+   dev->data->rx_queue_state[rq_id] = RTE_ETH_QUEUE_STATE_STOPPED;
+   }
+
+   return 0;
+}
+
+static int spnic_dev_tx_queue_start(__rt

[PATCH v1 25/25] net/spnic: add doc infrastructure

[Yanling Song]

This patch adds doc infrastructure for spnic PMD driver.

Signed-off-by: Yanling Song 
---
 MAINTAINERS|  6 +++
 doc/guides/nics/features/spnic.ini | 40 
 doc/guides/nics/spnic.rst  | 61 ++
 3 files changed, 107 insertions(+)
 create mode 100644 doc/guides/nics/features/spnic.ini
 create mode 100644 doc/guides/nics/spnic.rst

diff --git a/MAINTAINERS b/MAINTAINERS
index 18d9edaf88..12f6171aef 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -919,6 +919,12 @@ F: drivers/net/qede/
 F: doc/guides/nics/qede.rst
 F: doc/guides/nics/features/qede*.ini
 
+Ramaxel SPNIC
+M: Yanling Song 
+F: drivers/net/spnic/
+F: doc/guides/nics/spnic.rst
+F: doc/guides/nics/features/spnic.ini
+
 Solarflare sfc_efx
 M: Andrew Rybchenko 
 F: drivers/common/sfc_efx/
diff --git a/doc/guides/nics/features/spnic.ini 
b/doc/guides/nics/features/spnic.ini
new file mode 100644
index 00..bdefcb451b
--- /dev/null
+++ b/doc/guides/nics/features/spnic.ini
@@ -0,0 +1,40 @@
+;
+; Supported features of 'spnic' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Speed capabilities   = Y
+Link status  = Y
+Link status event= Y
+Queue start/stop = Y
+MTU update   = Y
+Jumbo frame  = Y
+Scattered Rx = Y
+LRO  = Y
+TSO  = Y
+Promiscuous mode = Y
+Allmulticast mode= Y
+Unicast MAC filter   = Y
+Multicast MAC filter = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+Inner RSS= Y
+SR-IOV   = Y
+Flow control = Y
+CRC offload  = Y
+VLAN filter  = Y
+VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
+Basic stats  = Y
+Extended stats   = Y
+Stats per queue  = Y
+FW version   = Y
+Multiprocess aware   = Y
+Linux= Y
+x86-64   = Y
+ARMv8= Y
\ No newline at end of file
diff --git a/doc/guides/nics/spnic.rst b/doc/guides/nics/spnic.rst
new file mode 100644
index 00..9305ecbb84
--- /dev/null
+++ b/doc/guides/nics/spnic.rst
@@ -0,0 +1,61 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Ramaxel Memory Technology, Ltd
+
+
+SPNIC Poll Mode Driver
+==
+
+The spnic PMD (**librte_net_spnic**) provides poll mode driver support
+for 25Gbps/100Gbps SPNxxx Network Adapters.
+
+
+Features
+
+
+- Multiple queues for TX and RX
+- Receiver Side Scaling（RSS）
+- RSS supports IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6, use inner type for 
VXLAN as default
+- MAC/VLAN filtering
+- Checksum offload
+- TSO offload
+- LRO offload
+- Promiscuous mode
+- Port hardware statistics
+- Link state information
+- Link flow control(pause frame)
+- Scattered and gather for TX and RX
+- SR-IOV - Partially supported VFIO only
+- VLAN filter and VLAN offload
+- Allmulticast mode
+- MTU update
+- Unicast MAC filter
+- Multicast MAC filter
+- Set Link down or up
+- FW version
+- Multi arch support: x86_64, ARMv8.
+
+Prerequisites
+-
+
+- Learning about SPNIC using
+  ``_.
+
+- Getting the latest product documents and software supports using
+  ``_.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
+
+
+Driver compilation and testing
+--
+
+Refer to the document :ref:`compiling and testing a PMD for a NIC 
`
+for details.
+
+It is highly recommended to upgrade the spnic driver and firmware to avoid the 
compatibility issues,
+and check the work mode with the latest product documents.
+
+Limitations or Known issues
+---
+Build with ICC is not supported yet.
+X86-32, Power8, ARMv7 and BSD are not supported yet.
-- 
2.27.0