[dpdk-dev] [PATCH v5 0/9] baseband: add NXP LA12xx driver

2021-09-12 Thread Nipun Gupta
This series introduces the BBDEV LA12xx poll mode driver (PMD) to support
an implementation for offloading High Phy processing functions like
LDPC Encode / Decode 5GNR wireless acceleration function, using PCI based
LA12xx Software defined radio.

Please check the documentation patch for more info.

The driver currently implements basic feature to offload only the 5G LDPC
encode/decode.

A new capability has been added to check if the driver can support the
input data in network byte order. Two test vectors are also added as an
example with input data in network byte.

v2: add test case changes
v3: fix 32 bit compilation
v4: capability for network byte order, doc patch merged inline.
v5: add llr_size and llr_decimals, removed LLR compression flag,
update testbbdev to handle endianness, rebased on top of 20.08

Hemant Agrawal (6):
  baseband: introduce NXP LA12xx driver
  baseband/la12xx: add devargs for max queues
  baseband/la12xx: add support for multiple modems
  baseband/la12xx: add queue and modem config support
  baseband/la12xx: add enqueue and dequeue support
  app/bbdev: enable la12xx for bbdev

Nipun Gupta (3):
  bbdev: add big endian processing data capability
  app/bbdev: handle endianness of test data
  app/bbdev: add test vectors for transport blocks

 MAINTAINERS   |   10 +
 app/test-bbdev/meson.build|3 +
 app/test-bbdev/test_bbdev_perf.c  |   84 ++
 app/test-bbdev/test_bbdev_vector.c|4 +
 app/test-bbdev/test_vectors/ldpc_dec_tb.data  |  122 ++
 app/test-bbdev/test_vectors/ldpc_enc_tb.data  |   60 +
 doc/guides/bbdevs/features/default.ini|1 +
 doc/guides/bbdevs/features/la12xx.ini |   14 +
 doc/guides/bbdevs/index.rst   |1 +
 doc/guides/bbdevs/la12xx.rst  |  127 ++
 doc/guides/prog_guide/bbdev.rst   |6 +
 doc/guides/rel_notes/release_21_11.rst|5 +
 drivers/baseband/la12xx/bbdev_la12xx.c| 1100 +
 drivers/baseband/la12xx/bbdev_la12xx.h|   51 +
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h|  244 
 .../baseband/la12xx/bbdev_la12xx_pmd_logs.h   |   26 +
 drivers/baseband/la12xx/meson.build   |6 +
 drivers/baseband/la12xx/version.map   |3 +
 drivers/baseband/meson.build  |1 +
 lib/bbdev/rte_bbdev_op.h  |   14 +-
 20 files changed, 1880 insertions(+), 2 deletions(-)
 create mode 100644 app/test-bbdev/test_vectors/ldpc_dec_tb.data
 create mode 100644 app/test-bbdev/test_vectors/ldpc_enc_tb.data
 create mode 100644 doc/guides/bbdevs/features/la12xx.ini
 create mode 100644 doc/guides/bbdevs/la12xx.rst
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_ipc.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
 create mode 100644 drivers/baseband/la12xx/meson.build
 create mode 100644 drivers/baseband/la12xx/version.map

-- 
2.17.1



[dpdk-dev] [PATCH v5 1/9] bbdev: add big endian processing data capability

2021-09-12 Thread Nipun Gupta
This patch intoduces a new capability of the bbdev device
to process the LDPC data in big endian order.

Signed-off-by: Hemant Agrawal 
Signed-off-by: Nipun Gupta 
---
 doc/guides/bbdevs/features/default.ini |  1 +
 doc/guides/prog_guide/bbdev.rst|  6 ++
 lib/bbdev/rte_bbdev_op.h   | 14 --
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/doc/guides/bbdevs/features/default.ini 
b/doc/guides/bbdevs/features/default.ini
index 5fe267a625..ae5aacf8f7 100644
--- a/doc/guides/bbdevs/features/default.ini
+++ b/doc/guides/bbdevs/features/default.ini
@@ -14,3 +14,4 @@ LLR/HARQ Compression   =
 External DDR Access=
 HW Accelerated =
 BBDEV API  =
+Big Endian Processing  =
diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 9619280ffc..6540b514bb 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -747,6 +747,9 @@ given below.
 |RTE_BBDEV_LDPC_ENC_CONCATENATION|
 | Set if a device supports concatenation of non byte aligned output  |
 ++
+|RTE_BBDEV_LDPC_ENC_BIG_ENDIAN   |
+| Set if a device supports Big Endian data processing|
+++
 
 The structure passed for each LDPC encode operation is given below,
 with the operation flags forming a bitmask in the ``op_flags`` field.
@@ -942,6 +945,9 @@ given below.
 |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK|
 | Set if a device supports loopback access to HARQ internal memory   |
 ++
+|RTE_BBDEV_LDPC_DEC_BIG_ENDIAN   |
+| Set if a device supports Big Endian data processing|
+++
 
 The structure passed for each LDPC decode operation is given below,
 with the operation flags forming a bitmask in the ``op_flags`` field.
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index f946842727..9e9b5be81f 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -186,7 +186,12 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {
 *  for HARQ memory. If not set, it is assumed the filler bits are not
 *  in HARQ memory and handled directly by the LDPC decoder.
 */
-   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)
+   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18),
+   /** Set if a device supports Big Endian data processing.
+*  If not set Little Endian data processing is supported by
+*  default.
+*/
+   RTE_BBDEV_LDPC_DEC_BIG_ENDIAN = (1ULL << 8)
 };
 
 /** Flags for LDPC encoder operation and capability structure */
@@ -206,7 +211,12 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks {
/** Set if a device supports scatter-gather functionality. */
RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6),
/** Set if a device supports concatenation of non byte aligned output */
-   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7)
+   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7),
+   /** Set if a device supports Big Endian data processing
+*  If not set Little Endian data processing is supported by
+*  default.
+*/
+   RTE_BBDEV_LDPC_ENC_BIG_ENDIAN = (1ULL << 8)
 };
 
 /** Flags for the Code Block/Transport block mode  */
-- 
2.17.1



[dpdk-dev] [PATCH v5 2/9] baseband: introduce NXP LA12xx driver

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

This patch introduce the baseband device drivers for NXP's
LA1200 series software defined baseband modem.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 MAINTAINERS   |   9 ++
 drivers/baseband/la12xx/bbdev_la12xx.c| 109 ++
 .../baseband/la12xx/bbdev_la12xx_pmd_logs.h   |  26 +
 drivers/baseband/la12xx/meson.build   |   6 +
 drivers/baseband/la12xx/version.map   |   3 +
 drivers/baseband/meson.build  |   1 +
 6 files changed, 154 insertions(+)
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
 create mode 100644 drivers/baseband/la12xx/meson.build
 create mode 100644 drivers/baseband/la12xx/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..a63e672c9e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1288,6 +1288,15 @@ F: drivers/event/opdl/
 F: doc/guides/eventdevs/opdl.rst
 
 
+Baseband Drivers
+
+
+NXP LA12xx driver
+M: Hemant Agrawal 
+M: Nipun Gupta 
+F: drivers/baseband/la12xx/
+
+
 Rawdev Drivers
 --
 
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
new file mode 100644
index 00..7050b17728
--- /dev/null
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020-2021 NXP
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#define DRIVER_NAME baseband_la12xx
+
+RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, NOTICE);
+
+/* private data structure */
+struct bbdev_la12xx_private {
+   unsigned int max_nb_queues;  /**< Max number of queues */
+};
+/* Create device */
+static int
+la12xx_bbdev_create(struct rte_vdev_device *vdev)
+{
+   struct rte_bbdev *bbdev;
+   const char *name = rte_vdev_device_name(vdev);
+
+   PMD_INIT_FUNC_TRACE();
+
+   bbdev = rte_bbdev_allocate(name);
+   if (bbdev == NULL)
+   return -ENODEV;
+
+   bbdev->data->dev_private = rte_zmalloc(name,
+   sizeof(struct bbdev_la12xx_private),
+   RTE_CACHE_LINE_SIZE);
+   if (bbdev->data->dev_private == NULL) {
+   rte_bbdev_release(bbdev);
+   return -ENOMEM;
+   }
+
+   bbdev->dev_ops = NULL;
+   bbdev->device = &vdev->device;
+   bbdev->data->socket_id = 0;
+   bbdev->intr_handle = NULL;
+
+   /* register rx/tx burst functions for data path */
+   bbdev->dequeue_enc_ops = NULL;
+   bbdev->dequeue_dec_ops = NULL;
+   bbdev->enqueue_enc_ops = NULL;
+   bbdev->enqueue_dec_ops = NULL;
+
+   return 0;
+}
+
+/* Initialise device */
+static int
+la12xx_bbdev_probe(struct rte_vdev_device *vdev)
+{
+   const char *name;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (vdev == NULL)
+   return -EINVAL;
+
+   name = rte_vdev_device_name(vdev);
+   if (name == NULL)
+   return -EINVAL;
+
+   return la12xx_bbdev_create(vdev);
+}
+
+/* Uninitialise device */
+static int
+la12xx_bbdev_remove(struct rte_vdev_device *vdev)
+{
+   struct rte_bbdev *bbdev;
+   const char *name;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (vdev == NULL)
+   return -EINVAL;
+
+   name = rte_vdev_device_name(vdev);
+   if (name == NULL)
+   return -EINVAL;
+
+   bbdev = rte_bbdev_get_named_dev(name);
+   if (bbdev == NULL)
+   return -EINVAL;
+
+   rte_free(bbdev->data->dev_private);
+
+   return rte_bbdev_release(bbdev);
+}
+
+static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
+   .probe = la12xx_bbdev_probe,
+   .remove = la12xx_bbdev_remove
+};
+
+RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
diff --git a/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h 
b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
new file mode 100644
index 00..9dfa1cc458
--- /dev/null
+++ b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020 NXP
+ */
+
+#ifndef _BBDEV_LA12XX_PMD_LOGS_H_
+#define _BBDEV_LA12XX_PMD_LOGS_H_
+
+#define rte_bbdev_log(level, fmt, ...) \
+   rte_log(RTE_LOG_ ## level, bbdev_la12xx_logtype, fmt "\n", \
+   ##__VA_ARGS__)
+
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#define rte_bbdev_log_debug(fmt, ...) \
+   rte_bbdev_log(DEBUG, "la12xx_pmd: " fmt, \
+   ##__VA_ARGS__)
+#else
+#define rte_bbdev_log_debug(fmt, ...)
+#endif
+
+#define PMD_INIT_FUNC_TRACE() rte_bbdev_log_debug(">>")
+
+/* DP Logs, toggled out at compile time if level lower than current level */
+#define rte_bbdev_dp_log(level, fmt, args...) \
+   RTE_LOG_DP(level, PMD, fmt, ## args)
+
+#endif /* _BBDEV_LA12XX_PMD_LOGS_H_ */
diff --git a/drivers/baseband/la12xx/meson.build 
b/driver

[dpdk-dev] [PATCH v5 3/9] baseband/la12xx: add devargs for max queues

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

This patch adds dev args to take  max queues as input

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 drivers/baseband/la12xx/bbdev_la12xx.c | 72 +-
 1 file changed, 70 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 7050b17728..8886b35429 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -19,13 +19,72 @@
 
 RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, NOTICE);
 
+/*  Initialisation params structure that can be used by LA12xx BBDEV driver */
+struct bbdev_la12xx_params {
+   uint8_t queues_num; /*< LA12xx BBDEV queues number */
+};
+
+#define LA12XX_MAX_NB_QUEUES_ARG   "max_nb_queues"
+
+static const char * const bbdev_la12xx_valid_params[] = {
+   LA12XX_MAX_NB_QUEUES_ARG,
+};
+
 /* private data structure */
 struct bbdev_la12xx_private {
unsigned int max_nb_queues;  /**< Max number of queues */
 };
+static inline int
+parse_u16_arg(const char *key, const char *value, void *extra_args)
+{
+   uint16_t *u16 = extra_args;
+
+   unsigned int long result;
+   if ((value == NULL) || (extra_args == NULL))
+   return -EINVAL;
+   errno = 0;
+   result = strtoul(value, NULL, 0);
+   if ((result >= (1 << 16)) || (errno != 0)) {
+   rte_bbdev_log(ERR, "Invalid value %lu for %s", result, key);
+   return -ERANGE;
+   }
+   *u16 = (uint16_t)result;
+   return 0;
+}
+
+/* Parse parameters used to create device */
+static int
+parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
+   const char *input_args)
+{
+   struct rte_kvargs *kvlist = NULL;
+   int ret = 0;
+
+   if (params == NULL)
+   return -EINVAL;
+   if (input_args) {
+   kvlist = rte_kvargs_parse(input_args,
+   bbdev_la12xx_valid_params);
+   if (kvlist == NULL)
+   return -EFAULT;
+
+   ret = rte_kvargs_process(kvlist, bbdev_la12xx_valid_params[0],
+   &parse_u16_arg, ¶ms->queues_num);
+   if (ret < 0)
+   goto exit;
+
+   }
+
+exit:
+   if (kvlist)
+   rte_kvargs_free(kvlist);
+   return ret;
+}
+
 /* Create device */
 static int
-la12xx_bbdev_create(struct rte_vdev_device *vdev)
+la12xx_bbdev_create(struct rte_vdev_device *vdev,
+   struct bbdev_la12xx_params *init_params __rte_unused)
 {
struct rte_bbdev *bbdev;
const char *name = rte_vdev_device_name(vdev);
@@ -62,7 +121,11 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev)
 static int
 la12xx_bbdev_probe(struct rte_vdev_device *vdev)
 {
+   struct bbdev_la12xx_params init_params = {
+   8
+   };
const char *name;
+   const char *input_args;
 
PMD_INIT_FUNC_TRACE();
 
@@ -73,7 +136,10 @@ la12xx_bbdev_probe(struct rte_vdev_device *vdev)
if (name == NULL)
return -EINVAL;
 
-   return la12xx_bbdev_create(vdev);
+   input_args = rte_vdev_device_args(vdev);
+   parse_bbdev_la12xx_params(&init_params, input_args);
+
+   return la12xx_bbdev_create(vdev, &init_params);
 }
 
 /* Uninitialise device */
@@ -107,3 +173,5 @@ static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
 };
 
 RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
+RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
+   LA12XX_MAX_NB_QUEUES_ARG"=");
-- 
2.17.1



[dpdk-dev] [PATCH v5 4/9] baseband/la12xx: add support for multiple modems

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

This patch add support for multiple modems by assigning
a modem id as dev args in vdev creation.

Signed-off-by: Hemant Agrawal 
---
 drivers/baseband/la12xx/bbdev_la12xx.c | 64 +++---
 drivers/baseband/la12xx/bbdev_la12xx.h | 56 +++
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 20 +++
 3 files changed, 133 insertions(+), 7 deletions(-)
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_ipc.h

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 8886b35429..f26f3f2a08 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -14,6 +14,8 @@
 #include 
 
 #include 
+#include 
+#include 
 
 #define DRIVER_NAME baseband_la12xx
 
@@ -22,18 +24,18 @@ RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, 
NOTICE);
 /*  Initialisation params structure that can be used by LA12xx BBDEV driver */
 struct bbdev_la12xx_params {
uint8_t queues_num; /*< LA12xx BBDEV queues number */
+   int8_t modem_id; /*< LA12xx modem instance id */
 };
 
 #define LA12XX_MAX_NB_QUEUES_ARG   "max_nb_queues"
+#define LA12XX_VDEV_MODEM_ID_ARG   "modem"
+#define LA12XX_MAX_MODEM 4
 
 static const char * const bbdev_la12xx_valid_params[] = {
LA12XX_MAX_NB_QUEUES_ARG,
+   LA12XX_VDEV_MODEM_ID_ARG,
 };
 
-/* private data structure */
-struct bbdev_la12xx_private {
-   unsigned int max_nb_queues;  /**< Max number of queues */
-};
 static inline int
 parse_u16_arg(const char *key, const char *value, void *extra_args)
 {
@@ -52,6 +54,28 @@ parse_u16_arg(const char *key, const char *value, void 
*extra_args)
return 0;
 }
 
+/* Parse integer from integer argument */
+static int
+parse_integer_arg(const char *key __rte_unused,
+   const char *value, void *extra_args)
+{
+   int i;
+   char *end;
+
+   errno = 0;
+
+   i = strtol(value, &end, 10);
+   if (*end != 0 || errno != 0 || i < 0 || i > LA12XX_MAX_MODEM) {
+   rte_bbdev_log(ERR, "Supported Port IDS are 0 to %d",
+   LA12XX_MAX_MODEM - 1);
+   return -EINVAL;
+   }
+
+   *((uint32_t *)extra_args) = i;
+
+   return 0;
+}
+
 /* Parse parameters used to create device */
 static int
 parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
@@ -73,6 +97,16 @@ parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
if (ret < 0)
goto exit;
 
+   ret = rte_kvargs_process(kvlist,
+   bbdev_la12xx_valid_params[1],
+   &parse_integer_arg,
+   ¶ms->modem_id);
+
+   if (params->modem_id >= LA12XX_MAX_MODEM) {
+   rte_bbdev_log(ERR, "Invalid modem id, must be < %u",
+   LA12XX_MAX_MODEM);
+   goto exit;
+   }
}
 
 exit:
@@ -84,10 +118,11 @@ parse_bbdev_la12xx_params(struct bbdev_la12xx_params 
*params,
 /* Create device */
 static int
 la12xx_bbdev_create(struct rte_vdev_device *vdev,
-   struct bbdev_la12xx_params *init_params __rte_unused)
+   struct bbdev_la12xx_params *init_params)
 {
struct rte_bbdev *bbdev;
const char *name = rte_vdev_device_name(vdev);
+   struct bbdev_la12xx_private *priv;
 
PMD_INIT_FUNC_TRACE();
 
@@ -103,6 +138,20 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev,
return -ENOMEM;
}
 
+   priv = bbdev->data->dev_private;
+   priv->modem_id = init_params->modem_id;
+   /* if modem id is not configured */
+   if (priv->modem_id == -1)
+   priv->modem_id = bbdev->data->dev_id;
+
+   /* Reset Global variables */
+   priv->num_ldpc_enc_queues = 0;
+   priv->num_ldpc_dec_queues = 0;
+   priv->num_valid_queues = 0;
+   priv->max_nb_queues = init_params->queues_num;
+
+   rte_bbdev_log(INFO, "Setting Up %s: DevId=%d, ModemId=%d",
+   name, bbdev->data->dev_id, priv->modem_id);
bbdev->dev_ops = NULL;
bbdev->device = &vdev->device;
bbdev->data->socket_id = 0;
@@ -122,7 +171,7 @@ static int
 la12xx_bbdev_probe(struct rte_vdev_device *vdev)
 {
struct bbdev_la12xx_params init_params = {
-   8
+   8, -1,
};
const char *name;
const char *input_args;
@@ -174,4 +223,5 @@ static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
 
 RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
 RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
-   LA12XX_MAX_NB_QUEUES_ARG"=");
+   LA12XX_MAX_NB_QUEUES_ARG"="
+   LA12XX_VDEV_MODEM_ID_ARG "= ");
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.h 
b/drivers/baseband/la12xx/bbdev_la12xx.h
new file mo

[dpdk-dev] [PATCH v5 5/9] baseband/la12xx: add queue and modem config support

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

This patch add support for connecting with modem
and creating the ipc channel as queues with modem
for the exchange of data.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 MAINTAINERS|   1 +
 doc/guides/bbdevs/index.rst|   1 +
 doc/guides/bbdevs/la12xx.rst   |  81 +++
 doc/guides/rel_notes/release_21_11.rst |   5 +
 drivers/baseband/la12xx/bbdev_la12xx.c | 553 -
 drivers/baseband/la12xx/bbdev_la12xx.h |  11 +-
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 189 ++-
 7 files changed, 831 insertions(+), 10 deletions(-)
 create mode 100644 doc/guides/bbdevs/la12xx.rst

diff --git a/MAINTAINERS b/MAINTAINERS
index a63e672c9e..2c243c10fe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1295,6 +1295,7 @@ NXP LA12xx driver
 M: Hemant Agrawal 
 M: Nipun Gupta 
 F: drivers/baseband/la12xx/
+F: doc/guides/bbdevs/la12xx.rst
 
 
 Rawdev Drivers
diff --git a/doc/guides/bbdevs/index.rst b/doc/guides/bbdevs/index.rst
index 4445cbd1b0..cedd706fa6 100644
--- a/doc/guides/bbdevs/index.rst
+++ b/doc/guides/bbdevs/index.rst
@@ -14,3 +14,4 @@ Baseband Device Drivers
 fpga_lte_fec
 fpga_5gnr_fec
 acc100
+la12xx
diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst
new file mode 100644
index 00..3c9ac5c047
--- /dev/null
+++ b/doc/guides/bbdevs/la12xx.rst
@@ -0,0 +1,81 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright 2021 NXP
+
+NXP LA12xx Poll Mode Driver
+===
+
+The BBDEV LA12xx poll mode driver (PMD) supports an implementation for
+offloading High Phy processing functions like LDPC Encode / Decode 5GNR 
wireless
+acceleration function, using PCI based LA12xx Software defined radio.
+
+More information can be found at `NXP Official Website
+`_.
+
+Features
+
+
+LA12xx PMD supports the following features:
+
+- Maximum of 8 UL queues
+- Maximum of 8 DL queues
+- PCIe Gen-3 x8 Interface
+- MSI-X
+
+Installation
+
+
+Section 3 of the DPDK manual provides instructions on installing and compiling 
DPDK.
+
+DPDK requires hugepages to be configured as detailed in section 2 of the DPDK 
manual.
+
+Initialization
+--
+
+The device can be listed on the host console with:
+
+
+Use the following lspci command to get the multiple LA12xx processor ids. The
+device ID of the LA12xx baseband processor is "1c30".
+
+.. code-block:: console
+
+  sudo lspci -nn
+
+...
+0001:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device [1957:1c30] (
+rev 10)
+...
+0002:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device [1957:1c30] (
+rev 10)
+
+
+Prerequisites
+-
+
+Currently supported by DPDK:
+
+- NXP LA1224 BSP **1.0+**.
+- NXP LA1224 PCIe Modem card connected to ARM host.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
+
+* Use dev arg option ``modem=0`` to identify the modem instance for a given
+  device. This is required only if more than 1 modem cards are attached to 
host.
+  this is optional and the default value is 0.
+  e.g. ``--vdev=baseband_la12xx,modem=0``
+
+* Use dev arg option ``max_nb_queues=x`` to specify the maximum number of 
queues
+  to be used for communication with offload device i.e. modem. default is 16.
+  e.g. ``--vdev=baseband_la12xx,max_nb_queues=4``
+
+Enabling logs
+-
+
+For enabling logs, use the following EAL parameter:
+
+.. code-block:: console
+
+   ./your_bbdev_application  --log-level=la12xx:
+
+Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be
+enabled which are lower than logging ``level``.
diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index 675b573834..a0e0ebbeb8 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -62,6 +62,11 @@ New Features
   * Added bus-level parsing of the devargs syntax.
   * Kept compatibility with the legacy syntax as parsing fallback.
 
+* **Added NXP LA12xx baseband PMD.**
+
+  * Added a new baseband PMD driver for NXP LA12xx Software defined radio.
+  * See the :doc:`../bbdevs/la12xx` for more details.
+
 
 Removed Items
 -
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index f26f3f2a08..57e957a93a 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -3,6 +3,11 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #include 
 #include 
@@ -31,11 +36,550 @@ struct bbdev_la12xx_params {
 #define LA12XX_VDEV_MODEM_ID_ARG   "modem"
 #define LA12XX_MAX_MODEM 4
 
+#define LA12XX_MAX_CORES   4
+#define LA12XX_LDPC_ENC_CORE   0
+#define LA1

[dpdk-dev] [PATCH v5 6/9] baseband/la12xx: add enqueue and dequeue support

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

Add support for enqueue and dequeue the LDPC enc/dec
from the modem device.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 doc/guides/bbdevs/features/la12xx.ini  |  14 +
 doc/guides/bbdevs/la12xx.rst   |  46 +++
 drivers/baseband/la12xx/bbdev_la12xx.c | 334 -
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h |  37 +++
 4 files changed, 425 insertions(+), 6 deletions(-)
 create mode 100644 doc/guides/bbdevs/features/la12xx.ini

diff --git a/doc/guides/bbdevs/features/la12xx.ini 
b/doc/guides/bbdevs/features/la12xx.ini
new file mode 100644
index 00..412af99bad
--- /dev/null
+++ b/doc/guides/bbdevs/features/la12xx.ini
@@ -0,0 +1,14 @@
+;
+; Supported features of the 'la12xx' bbdev driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Turbo Decoder (4G) = N
+Turbo Encoder (4G) = N
+LDPC Decoder (5G)  = Y
+LDPC Encoder (5G)  = Y
+LLR/HARQ Compression   = N
+HW Accelerated = Y
+BBDEV API  = Y
+Big Endian Processing  = Y
diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst
index 3c9ac5c047..c39be0e51f 100644
--- a/doc/guides/bbdevs/la12xx.rst
+++ b/doc/guides/bbdevs/la12xx.rst
@@ -16,6 +16,8 @@ Features
 
 LA12xx PMD supports the following features:
 
+- LDPC Encode in the DL
+- LDPC Decode in the UL
 - Maximum of 8 UL queues
 - Maximum of 8 DL queues
 - PCIe Gen-3 x8 Interface
@@ -79,3 +81,47 @@ For enabling logs, use the following EAL parameter:
 
 Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be
 enabled which are lower than logging ``level``.
+
+Test Application
+
+
+BBDEV provides a test application, ``test-bbdev.py`` and range of test data 
for testing
+the functionality of LA12xx for FEC encode and decode, depending on the device
+capabilities. The test application is located under app->test-bbdev folder and 
has the
+following options:
+
+.. code-block:: console
+
+  "-p", "--testapp-path": specifies path to the bbdev test app.
+  "-e", "--eal-params" : EAL arguments which are passed to the test app.
+  "-t", "--timeout": Timeout in seconds (default=300).
+  "-c", "--test-cases" : Defines test cases to run. Run all if not specified.
+  "-v", "--test-vector": Test vector path 
(default=dpdk_path+/app/test-bbdev/test_vectors/bbdev_null.data).
+  "-n", "--num-ops": Number of operations to process on device 
(default=32).
+  "-b", "--burst-size" : Operations enqueue/dequeue burst size (default=32).
+  "-s", "--snr": SNR in dB used when generating LLRs for bler 
tests.
+  "-s", "--iter_max"   : Number of iterations for LDPC decoder.
+  "-l", "--num-lcores" : Number of lcores to run (default=16).
+  "-i", "--init-device" : Initialise PF device with default values.
+
+
+To execute the test application tool using simple decode or encode data,
+type one of the following:
+
+.. code-block:: console
+
+  ./test-bbdev.py -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c 
validation -n 64 -b 1 -v ./ldpc_dec_default.data
+  ./test-bbdev.py -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c 
validation -n 64 -b 1 -v ./ldpc_enc_default.data
+
+The test application ``test-bbdev.py``, supports the ability to configure the 
PF device with
+a default set of values, if the "-i" or "- -init-device" option is included. 
The default values
+are defined in test_bbdev_perf.c.
+
+
+Test Vectors
+
+
+In addition to the simple LDPC decoder and LDPC encoder tests, bbdev also 
provides
+a range of additional tests under the test_vectors folder, which may be 
useful. The results
+of these tests will depend on the LA12xx FEC capabilities which may cause some
+testcases to be skipped, but no failure should be reported.
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 57e957a93a..1f64ee9b1e 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -54,7 +54,8 @@ static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
.cap.ldpc_enc = {
.capability_flags =
RTE_BBDEV_LDPC_CRC_24A_ATTACH |
-   RTE_BBDEV_LDPC_CRC_24B_ATTACH,
+   RTE_BBDEV_LDPC_CRC_24B_ATTACH |
+   RTE_BBDEV_LDPC_ENC_BIG_ENDIAN,
.num_buffers_src =
RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
.num_buffers_dst =
@@ -67,7 +68,8 @@ static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
.capability_flags =
RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK |
RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK |
-   RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP,

[dpdk-dev] [PATCH v5 7/9] app/bbdev: enable la12xx for bbdev

2021-09-12 Thread Nipun Gupta
From: Hemant Agrawal 

this patch adds la12xx driver in test bbdev

Signed-off-by: Hemant Agrawal 
---
 app/test-bbdev/meson.build | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/app/test-bbdev/meson.build b/app/test-bbdev/meson.build
index edb9deef84..a726a5b3fa 100644
--- a/app/test-bbdev/meson.build
+++ b/app/test-bbdev/meson.build
@@ -23,3 +23,6 @@ endif
 if dpdk_conf.has('RTE_BASEBAND_ACC100')
 deps += ['baseband_acc100']
 endif
+if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_LA12XX')
+   deps += ['baseband_la12xx']
+endif
-- 
2.17.1



[dpdk-dev] [PATCH v5 8/9] app/bbdev: handle endianness of test data

2021-09-12 Thread Nipun Gupta
With data input, output and harq also supported in big
endian format, this patch updates the testbbdev application
to handle the endianness conversion as directed by the
test vector and the driver being used.

For instance, if the driver supports big endian data
processing, but the test vector does not mention the data
as a big endian format, conversion from little endian to big
will be handled by the testbbdev application.

Signed-off-by: Nipun Gupta 
---
 app/test-bbdev/test_bbdev_perf.c   | 84 ++
 app/test-bbdev/test_bbdev_vector.c |  4 ++
 2 files changed, 88 insertions(+)

diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
index 469597b8b3..836e07d747 100644
--- a/app/test-bbdev/test_bbdev_perf.c
+++ b/app/test-bbdev/test_bbdev_perf.c
@@ -227,6 +227,71 @@ clear_soft_out_cap(uint32_t *op_flags)
*op_flags &= ~RTE_BBDEV_TURBO_NEG_LLR_1_BIT_SOFT_OUT;
 }
 
+static void
+clear_ldpc_endianness_flag(uint32_t *op_flags)
+{
+   *op_flags &= ~RTE_BBDEV_LDPC_ENC_BIG_ENDIAN;
+   *op_flags &= ~RTE_BBDEV_LDPC_DEC_BIG_ENDIAN;
+}
+
+static inline void
+reverse_op(struct op_data_entries *op)
+{
+   uint8_t nb_segs = op->nb_segments;
+   uint32_t *data, len;
+   int complete, rem, i, j;
+   uint8_t *rem_data, temp;
+
+   /* Validate each mbuf segment length */
+   for (i = 0; i < nb_segs; ++i) {
+   len = op->segments[i].length;
+   data = op->segments[i].addr;
+
+   /* Swap complete u32 bytes */
+   complete = len / 4;
+   for (j = 0; j < complete; j++)
+   data[j] = rte_bswap32(data[j]);
+
+   /* Swap any remaining data for last seg */
+   if (i == (nb_segs - 1)) {
+   rem = len % 4;
+   rem_data = (uint8_t *)&data[j];
+   for (j = 0; j < rem/2; j++) {
+   temp = rem_data[j];
+   rem_data[j] = rem_data[rem - j - 1];
+   rem_data[rem - j - 1] = temp;
+   }
+   }
+   }
+}
+
+static inline void
+reverse_all_ops(void)
+{
+   unsigned int nb_inputs, nb_soft_outputs, nb_hard_outputs,
+   nb_harq_inputs, nb_harq_outputs;
+
+   nb_inputs = test_vector.entries[DATA_INPUT].nb_segments;
+   if (nb_inputs)
+   reverse_op(&test_vector.entries[DATA_INPUT]);
+
+   nb_soft_outputs = test_vector.entries[DATA_SOFT_OUTPUT].nb_segments;
+   if (nb_soft_outputs)
+   reverse_op(&test_vector.entries[DATA_SOFT_OUTPUT]);
+
+   nb_hard_outputs = test_vector.entries[DATA_HARD_OUTPUT].nb_segments;
+   if (nb_hard_outputs)
+   reverse_op(&test_vector.entries[DATA_HARD_OUTPUT]);
+
+   nb_harq_inputs  = test_vector.entries[DATA_HARQ_INPUT].nb_segments;
+   if (nb_harq_inputs)
+   reverse_op(&test_vector.entries[DATA_HARQ_INPUT]);
+
+   nb_harq_outputs = test_vector.entries[DATA_HARQ_OUTPUT].nb_segments;
+   if (nb_harq_outputs)
+   reverse_op(&test_vector.entries[DATA_HARQ_OUTPUT]);
+}
+
 static int
 check_dev_cap(const struct rte_bbdev_info *dev_info)
 {
@@ -324,6 +389,16 @@ check_dev_cap(const struct rte_bbdev_info *dev_info)
const struct rte_bbdev_op_cap_ldpc_enc *cap =
&op_cap->cap.ldpc_enc;
 
+   if ((test_vector.ldpc_enc.op_flags &
+   RTE_BBDEV_LDPC_ENC_BIG_ENDIAN) !=
+   (cap->capability_flags &
+   RTE_BBDEV_LDPC_ENC_BIG_ENDIAN)) {
+   reverse_all_ops();
+   clear_ldpc_endianness_flag(
+   &test_vector.ldpc_enc.op_flags);
+
+   }
+
if (!flags_match(test_vector.ldpc_enc.op_flags,
cap->capability_flags)){
printf("Flag Mismatch\n");
@@ -352,6 +427,15 @@ check_dev_cap(const struct rte_bbdev_info *dev_info)
const struct rte_bbdev_op_cap_ldpc_dec *cap =
&op_cap->cap.ldpc_dec;
 
+   if ((test_vector.ldpc_dec.op_flags &
+   RTE_BBDEV_LDPC_DEC_BIG_ENDIAN) !=
+   (cap->capability_flags &
+   RTE_BBDEV_LDPC_DEC_BIG_ENDIAN)) {
+   reverse_all_ops();
+   clear_ldpc_endianness_flag(
+   &test_vector.ldpc_dec.op_flags);
+   }
+
if (!flags_match(test_vector.ldpc_dec.op_flags,
cap->capability_flags)){
 

[dpdk-dev] [PATCH v5 9/9] app/bbdev: add test vectors for transport blocks

2021-09-12 Thread Nipun Gupta
This patch adds two test vectors for transport block in network byte
order:
- LDPC encode for Transport Block
- LDPC decode for Transport block

Signed-off-by: Nipun Gupta 
---
 app/test-bbdev/test_vectors/ldpc_dec_tb.data | 122 +++
 app/test-bbdev/test_vectors/ldpc_enc_tb.data |  60 +
 2 files changed, 182 insertions(+)
 create mode 100644 app/test-bbdev/test_vectors/ldpc_dec_tb.data
 create mode 100644 app/test-bbdev/test_vectors/ldpc_enc_tb.data

diff --git a/app/test-bbdev/test_vectors/ldpc_dec_tb.data 
b/app/test-bbdev/test_vectors/ldpc_dec_tb.data
new file mode 100644
index 00..b991e8f305
--- /dev/null
+++ b/app/test-bbdev/test_vectors/ldpc_dec_tb.data
@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2020 NXP
+
+op_type =
+RTE_BBDEV_OP_LDPC_DEC
+
+input0 =
+0x817f8181, 0x7f7f8181, 0x817f7f81, 0x81817f81, 0x81817f81, 0x817f7f81, 
0x7f7f7f7f, 0x7f7f7f81,
+0x817f7f81, 0x817f7f81, 0x7f7f817f, 0x7f7f7f81, 0x81817f7f, 0x81818181, 
0x817f8181, 0x7f817f81,
+0x81817f7f, 0x7f7f817f, 0x81817f81, 0x817f8181, 0x7f7f7f81, 0x817f817f, 
0x7f817f7f, 0x7f817f7f,
+0x7f817f7f, 0x81817f7f, 0x7f818181, 0x817f7f7f, 0x8181817f, 0x81817f7f, 
0x7f817f81, 0x7f7f7f7f,
+0x7f817f7f, 0x81817f7f, 0x81818181, 0x817f817f, 0x81817f7f, 0x7f81817f, 
0x7f7f7f7f, 0x7f7f7f7f,
+0x7f818181, 0x7f7f7f81, 0x81817f81, 0x7f817f7f, 0x7f7f7f7f, 0x817f817f, 
0x817f817f, 0x7f7f817f,
+0x81817f81, 0x7f7f7f7f, 0x7f81817f, 0x817f817f, 0x7f7f8181, 0x7f7f7f7f, 
0x817f7f7f, 0x81818181,
+0x817f8181, 0x7f7f817f, 0x7f7f8181, 0x7f7f7f7f, 0x7f818181, 0x817f8181, 
0x817f7f81, 0x817f8181,
+0x817f7f81, 0x81817f7f, 0x7f7f8181, 0x81818181, 0x817f817f, 0x817f7f7f, 
0x81818181, 0x7f817f81,
+0x7f7f7f81, 0x81817f81, 0x7f817f7f, 0x7f818181, 0x7f7f7f81, 0x817f817f, 
0x81818181, 0x81818181,
+0x81817f81, 0x81817f81, 0x7f7f8181, 0x817f7f7f, 0x7f81817f, 0x817f817f, 
0x81817f7f, 0x817f7f81,
+0x81817f7f, 0x7f7f7f81, 0x7f817f81, 0x7f817f81, 0x817f7f7f, 0x7f818181, 
0x81818181, 0x7f7f7f7f,
+0x7f7f7f7f, 0x8181817f, 0x7f7f7f81, 0x7f817f81, 0x81817f81, 0x7f7f817f, 
0x7f81817f, 0x817f8181,
+0x7f81817f, 0x7f81817f, 0x817f7f7f, 0x7f81817f, 0x817f7f81, 0x817f7f81, 
0x7f817f7f, 0x8181817f,
+0x7f81817f, 0x7f7f8181, 0x817f8181, 0x817f7f7f, 0x817f7f81, 0x7f81817f, 
0x7f7f817f, 0x7f817f7f,
+0x7f7f8181, 0x81818181, 0x7f818181, 0x7f7f817f, 0x7f818181, 0x81818181, 
0x7f817f7f, 0x817f817f,
+0x817f817f, 0x817f7f7f, 0x81817f81, 0x81817f7f, 0x81817f81, 0x7f817f81, 
0x7f817f7f, 0x7f817f7f,
+0x817f7f7f, 0x817f7f7f, 0x7f7f7f7f, 0x7f7f7f81, 0x7f7f8181, 0x7f817f81, 
0x7f817f7f, 0x817f7f7f,
+0x7f7f8181, 0x8181817f, 0x7f7f8181, 0x7f7f7f81, 0x817f7f7f, 0x7f7f7f81, 
0x817f8181, 0x7f7f817f,
+0x7f81817f, 0x817f817f, 0x7f817f81, 0x7f7f8181, 0x7f818181, 0x7f817f81, 
0x81818181, 0x81817f7f,
+0x7f81817f, 0x7f81817f, 0x7f7f8181, 0x81818181, 0x817f8181, 0x7f7f817f, 
0x7f817f7f, 0x7f7f8181,
+0x7f81817f, 0x7f7f817f, 0x7f7f7f7f, 0x7f818181, 0x81817f7f, 0x8181817f, 
0x7f81817f, 0x8181817f,
+0x81817f81, 0x7f7f7f7f, 0x81818181, 0x7f7f817f, 0x7f81817f, 0x7f7f7f7f, 
0x81817f81, 0x817f7f81,
+0x817f7f81, 0x817f7f81, 0x81818181, 0x7f7f7f7f, 0x81817f81, 0x817f7f7f, 
0x8181817f, 0x7f7f7f81,
+0x81817f81, 0x817f7f81, 0x81818181, 0x7f7f7f7f, 0x81817f7f, 0x81817f81, 
0x7f7f7f81, 0x7f7f7f7f,
+0x817f817f, 0x7f818181, 0x8181817f, 0x81817f81, 0x7f7f7f81, 0x7f817f7f, 
0x7f7f7f7f, 0x7f817f81,
+0x8181817f, 0x7f7f7f7f, 0x81817f7f, 0x7f7f7f81, 0x7f81817f, 0x7f7f7f7f, 
0x7f7f7f81, 0x817f8181,
+0x7f7f8181, 0x7f7f7f81, 0x7f7f8181, 0x7f817f7f, 0x81818181, 0x7f81817f, 
0x7f818181, 0x7f818181,
+0x7f818181, 0x817f7f81, 0x7f7f8181, 0x81818181, 0x7f7f7f7f, 0x7f7f7f7f, 
0x817f8181, 0x81818181,
+0x7f7f817f, 0x817f8181, 0x81817f7f, 0x817f817f, 0x7f7f817f, 0x7f7f7f7f, 
0x817f8181, 0x817f8181,
+0x817f8181, 0x81818181, 0x7f7f817f, 0x7f817f81, 0x817f7f81, 0x7f7f7f81, 
0x81817f81, 0x7f818181,
+0x81817f7f, 0x7f818181, 0x81818181, 0x817f817f, 0x7f817f7f, 0x81818181, 
0x817f8181, 0x7f7f7f7f,
+0x7f817f81, 0x817f7f7f, 0x7f818181, 0x8181817f, 0x817f817f, 0x7f817f7f, 
0x817f7f81, 0x7f818181,
+0x817f7f7f, 0x817f7f81, 0x7f7f7f81, 0x81817f81, 0x7f81817f, 0x7f818181, 
0x81817f7f, 0x817f7f81,
+0x81817f81, 0x7f7f8181, 0x7f7f8181, 0x7f817f81, 0x7f7f817f, 0x817f7f7f, 
0x7f7f7f7f, 0x817f7f7f,
+0x7f7f8181, 0x817f8181, 0x817f8181, 0x7f817f81, 0x817f8181, 0x8181817f, 
0x81817f7f, 0x7f817f7f,
+0x7f817f7f, 0x7f817f81, 0x817f817f, 0x817f7f7f, 0x8181817f, 0x817f817f, 
0x817f7f81, 0x81817f7f,
+0x7f817f7f, 0x7f7f7f7f, 0x7f817f7f, 0x7f7f817f, 0x7f818181, 0x8181817f, 
0x817f7f7f, 0x7f817f81,
+0x7f7f8181, 0x81817f7f, 0x7f7f817f, 0x7f7f817f, 0x7f817f7f, 0x7f7f817f, 
0x7f818181, 0x7f817f7f,
+0x817f7f7f, 0x7f817f81, 0x81818181, 0x7f818181, 0x817f8181, 0x8181817f, 
0x8181817f, 0x817f7f7f,
+0x81817f81, 0x817f7f7f, 0x7f81817f, 0x817f8181, 0x7f818181, 0x7f817f7f, 
0x81817f7f, 0x7f81817f,
+0x81817f81, 0x7f7f7f81, 0x7f7f7f7f, 0x81818181, 0x817f7f7f, 0x81817f81, 
0x817f7f81, 0x81817f7f,
+0x81818181, 0x7f7f7f7f, 0x817f817f, 0x7f817f81, 0x817f

Re: [dpdk-dev] [PATCH v3 1/6] bbdev: add capability for CRC16 check

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

Adding a missing operation when CRC16
is being used for TB CRC check.

Signed-off-by: Nicolas Chautru 
---
  app/test-bbdev/test_bbdev_vector.c |  2 ++
  doc/guides/prog_guide/bbdev.rst|  3 +++
  doc/guides/rel_notes/release_21_11.rst |  1 +
  lib/bbdev/rte_bbdev_op.h   | 34 ++
  4 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/app/test-bbdev/test_bbdev_vector.c 
b/app/test-bbdev/test_bbdev_vector.c
index 614dbd1..8d796b1 100644
--- a/app/test-bbdev/test_bbdev_vector.c
+++ b/app/test-bbdev/test_bbdev_vector.c
@@ -167,6 +167,8 @@
*op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK;
else if (!strcmp(token, "RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP"))
*op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP;
+   else if (!strcmp(token, "RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK"))
+   *op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK;
else if (!strcmp(token, "RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS"))
*op_flag_value = RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS;
else if (!strcmp(token, "RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE"))
diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 9619280..8bd7cba 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -891,6 +891,9 @@ given below.
  |RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP|
  | Set to drop the last CRC bits decoding output  |
  ++
+|RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK|
+| Set for code block CRC-16 checking |
+++
  |RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS |
  | Set for bit-level de-interleaver bypass on input stream|
  ++
diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index d707a55..69dd518 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -84,6 +84,7 @@ API Changes
 Also, make sure to start the actual text at the margin.
 ===
  
+* bbdev: Added capability related to more comprehensive CRC options.
  
  ABI Changes

  ---
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index f946842..7c44ddd 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -142,51 +142,53 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {
RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK = (1ULL << 1),
/** Set to drop the last CRC bits decoding output */
RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP = (1ULL << 2),
+   /** Set for transport block CRC-16 checking */
+   RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK = (1ULL << 3),
/** Set for bit-level de-interleaver bypass on Rx stream. */
-   RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 3),
+   RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 4),
/** Set for HARQ combined input stream enable. */
-   RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 4),
+   RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 5),
/** Set for HARQ combined output stream enable. */
-   RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 5),
+   RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 6),
/** Set for LDPC decoder bypass.
 *  RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE must be set.
 */
-   RTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 6),
+   RTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 7),
/** Set for soft-output stream enable */
-   RTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 7),
+   RTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 8),
/** Set for Rate-Matching bypass on soft-out stream. */
-   RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 8),
+   RTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 9),
/** Set for bit-level de-interleaver bypass on soft-output stream. */
-   RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 9),
+   RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 10),
/** Set for iteration stopping on successful decode condition
 *  i.e. a successful syndrome check.
 */
-   RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 10),
+   RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 11),
/** Set if a device supports decoder dequeue interrupts. */
-   RTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 11),
+   RTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 12),
/** Set if a device supports scatter-gather functionality. */
-   RTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 12),
+   RTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 13),
/** Set if a

Re: [dpdk-dev] [PATCH v3 2/6] baseband/turbo_sw: add support for CRC16

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

This is to support the case for operation
where CRC16 is to be appended or checked.

Signed-off-by: Nicolas Chautru 
---
  doc/guides/rel_notes/release_21_11.rst   |  3 +++
  drivers/baseband/turbo_sw/bbdev_turbo_software.c | 16 
  2 files changed, 19 insertions(+)

diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index 69dd518..8ca59b7 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -55,6 +55,9 @@ New Features
   Also, make sure to start the actual text at the margin.
   ===
  
+* **Updated the turbo_sw bbdev PMD.**

+
+  Added support for more comprehensive CRC options.
  
  Removed Items

  -
diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c 
b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
index 77e9a2e..e1db2bf 100644
--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c
+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
@@ -199,6 +199,7 @@ struct turbo_sw_queue {
.cap.ldpc_enc = {
.capability_flags =
RTE_BBDEV_LDPC_RATE_MATCH |
+   RTE_BBDEV_LDPC_CRC_16_ATTACH |
RTE_BBDEV_LDPC_CRC_24A_ATTACH |
RTE_BBDEV_LDPC_CRC_24B_ATTACH,
.num_buffers_src =
@@ -211,6 +212,7 @@ struct turbo_sw_queue {
.type   = RTE_BBDEV_OP_LDPC_DEC,
.cap.ldpc_dec = {
.capability_flags =
+   RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK |
RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK |
RTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK |
RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP |
@@ -880,6 +882,12 @@ struct turbo_sw_queue {
crc_req.len = in_length_in_bits - 24;
crc_resp.data = q->enc_in;
bblib_lte_crc24b_gen(&crc_req, &crc_resp);
+   } else if (enc->op_flags & RTE_BBDEV_LDPC_CRC_16_ATTACH) {
+   rte_memcpy(q->enc_in, in, in_length_in_bytes - 2);
+   crc_req.data = in;
+   crc_req.len = in_length_in_bits - 16;
+   crc_resp.data = q->enc_in;
+   bblib_lte_crc16_gen(&crc_req, &crc_resp);
} else
rte_memcpy(q->enc_in, in, in_length_in_bytes);
  
@@ -1491,6 +1499,14 @@ struct turbo_sw_queue {

bblib_lte_crc24a_check(&crc_req, &crc_resp);
if (!crc_resp.check_passed)
op->status |= 1 << RTE_BBDEV_CRC_ERROR;
+   } else if (check_bit(dec->op_flags, RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK)) {
+   crc_req.data = adapter_input;
+   crc_req.len  = K - dec->n_filler - 16;
+   crc_resp.check_passed = false;
+   crc_resp.data = adapter_input;
+   bblib_lte_crc16_check(&crc_req, &crc_resp);
+   if (!crc_resp.check_passed)
+   op->status |= 1 << RTE_BBDEV_CRC_ERROR;
}


Thanks for the else-if() change.

Looks good.

Reviewed-by: Tom Rix 

  
  #ifdef RTE_BBDEV_OFFLOAD_COST




Re: [dpdk-dev] [PATCH v3 3/6] bbdev: add capability for 4G CB CRC DROP

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

Adding option to drop CRC24B to align with existing
feature for 5G

Signed-off-by: Nicolas Chautru 
---
  app/test-bbdev/test_bbdev_vector.c | 2 ++
  lib/bbdev/rte_bbdev_op.h   | 5 -
  2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/app/test-bbdev/test_bbdev_vector.c 
b/app/test-bbdev/test_bbdev_vector.c
index 8d796b1..f020836 100644
--- a/app/test-bbdev/test_bbdev_vector.c
+++ b/app/test-bbdev/test_bbdev_vector.c
@@ -149,6 +149,8 @@
*op_flag_value = RTE_BBDEV_TURBO_DEC_SCATTER_GATHER;
else if (!strcmp(token, "RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP"))
*op_flag_value = RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP;
+   else if (!strcmp(token, "RTE_BBDEV_TURBO_DEC_CRC_24B_DROP"))
+   *op_flag_value = RTE_BBDEV_TURBO_DEC_CRC_24B_DROP;
else {
printf("The given value is not a turbo decoder flag\n");
return -1;
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index 7c44ddd..5512859 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -114,7 +114,10 @@ enum rte_bbdev_op_td_flag_bitmasks {
/** Set to keep CRC24B bits appended while decoding. Only usable when
 * decoding Transport Block mode.
 */
-   RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP = (1ULL << 16)
+   RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP = (1ULL << 16),
+   /** Set to drop CRC24B bits not to be appended while decoding.
+*/
+   RTE_BBDEV_TURBO_DEC_CRC_24B_DROP = (1ULL << 17)
  };
  
  


This is ok, thanks.

Reviewed-by: Tom Rix 



Re: [dpdk-dev] [PATCH v3 4/6] baseband/acc100: add support for 4G CRC drop

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

This implements in PMD the option to drop the CB CRC
after 4G decoding to help transport block concatenation.

Signed-off-by: Nicolas Chautru 
---
  doc/guides/bbdevs/acc100.rst |  1 +
  doc/guides/rel_notes/release_21_11.rst   |  4 
  drivers/baseband/acc100/rte_acc100_pmd.c | 12 +---
  3 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/doc/guides/bbdevs/acc100.rst b/doc/guides/bbdevs/acc100.rst
index ff0fa4b..9fff6ab 100644
--- a/doc/guides/bbdevs/acc100.rst
+++ b/doc/guides/bbdevs/acc100.rst
@@ -58,6 +58,7 @@ ACC100 5G/4G FEC PMD supports the following BBDEV 
capabilities:
 - ``RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN`` :  set if negative LLR encoder i/p 
is supported
 - ``RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN`` :  set if positive LLR encoder i/p 
is supported
 - ``RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP`` :  keep CRC24B bits appended 
while decoding
+   - ``RTE_BBDEV_TURBO_DEC_CRC_24B_DROP`` : option to drop the code block CRC 
after decoding
 - ``RTE_BBDEV_TURBO_EARLY_TERMINATION`` :  set early termination feature
 - ``RTE_BBDEV_TURBO_DEC_SCATTER_GATHER`` :  supports scatter-gather for 
input/output data
 - ``RTE_BBDEV_TURBO_HALF_ITERATION_EVEN`` :  set half iteration granularity
diff --git a/doc/guides/rel_notes/release_21_11.rst 
b/doc/guides/rel_notes/release_21_11.rst
index 8ca59b7..f7843bc 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -59,6 +59,10 @@ New Features
  
Added support for more comprehensive CRC options.
  
+* **Updated the ACC100 bbdev PMD.**

+
+  Added support for more comprehensive CRC options.
+
  Removed Items
  -
  
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c

index 68ba523..2e9ce92 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -980,6 +980,7 @@
RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |
RTE_BBDEV_TURBO_MAP_DEC |
RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |
+   RTE_BBDEV_TURBO_DEC_CRC_24B_DROP |
RTE_BBDEV_TURBO_DEC_SCATTER_GATHER,
.max_llr_modulus = INT8_MAX,
.num_buffers_src =
@@ -1708,8 +1709,12 @@
}
  
  	if ((op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)

-   && !check_bit(op->turbo_dec.op_flags,
-   RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP))
+   && !check_bit(op->turbo_dec.op_flags,
+   RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP))
+   crc24_overlap = 24;
+   if ((op->turbo_dec.code_block_mode == RTE_BBDEV_CODE_BLOCK)
+   && check_bit(op->turbo_dec.op_flags,
+   RTE_BBDEV_TURBO_DEC_CRC_24B_DROP))
crc24_overlap = 24;


ok if this isn't combined.

the bug moved to its own patch.

Looks good.

Reviewed-by: Tom Rix 

  
  	/* Calculates circular buffer size.

@@ -1744,7 +1749,8 @@
  
  	next_triplet = acc100_dma_fill_blk_type_out(

desc, h_output, *h_out_offset,
-   k >> 3, next_triplet, ACC100_DMA_BLKID_OUT_HARD);
+   k >> 3, next_triplet,
+   ACC100_DMA_BLKID_OUT_HARD);
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
"Mismatch between data to process and mbuf data 
length in bbdev_op: %p",




Re: [dpdk-dev] [PATCH v3 5/6] doc: clarification of usage of HARQ in bbdev doc

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

New paragraph detailing typical VRAN usecase and mapping
to bbdev API usage.

Signed-off-by: Nicolas Chautru 
---
  doc/guides/prog_guide/bbdev.rst | 23 +++
  1 file changed, 23 insertions(+)

diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 8bd7cba..f39b62f 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -1054,6 +1054,29 @@ capability 
RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE is set
  then the HARQ is stored in memory internal to the device and not visible
  to BBDEV.
  
+.. note::

+More explicitly for a typical usage of HARQ retransmission in a VRAN
+application using a HW PMD, there will be 2 cases.
+
+For 1st transmission, only the HARQ output is enabled :
+
+- the harq_combined_output.offset is provided to a given address. ie. 
typically an integer index * 32K, where the index is tracked by the application 
based on code block index for a given UE and HARQ process.
+
+- the related operation flag would notably include 
RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE and RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION.
+
+- note that not explicit flush or reset of the memory is required.
+
+For 2nd transmission, an input is also required to benefit from HARQ 
combination gain:
+
+- the changes mentioned above are the same (note that rvIndex may be 
adjusted).
+
+- the operation flag would additionally include the 
LDPC_HQ_COMBINE_IN_ENABLE flag.
+
+- the harq_combined_input.offset must set to the address of the related 
code block (ie. same as the harq_combine_output index above for the same code 
block, HARQ process, UE).
+
+- the harq_combined_input.length must be set to the length which was 
provided back in the related harq_combined_output.length when it has processed 
and dequeued (previous HARQ iteration).
+
+
  The output mbuf data structures are expected to be allocated by the
  application with enough room for the output data.
  


Fine.

Reviewed-by: Tom Rix 



Re: [dpdk-dev] [PATCH v3 6/6] bbdev: reduce warning level for one scenario

2021-09-12 Thread Tom Rix



On 9/7/21 6:15 PM, Nicolas Chautru wrote:

Queue setup may genuinely fail when adding incremental queues
for a given priority level. In that case application would
attempt to configure a queue at a different priority level.
Not an actual error.

Signed-off-by: Nicolas Chautru 
---
  lib/bbdev/rte_bbdev.c | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c
index fc37236..defddcf 100644
--- a/lib/bbdev/rte_bbdev.c
+++ b/lib/bbdev/rte_bbdev.c
@@ -528,9 +528,10 @@ struct rte_bbdev *
ret = dev->dev_ops->queue_setup(dev, queue_id, (conf != NULL) ?
conf : &dev_info.default_queue_conf);
if (ret < 0) {
-   rte_bbdev_log(ERR,
-   "Device %u queue %u setup failed", dev_id,
-   queue_id);
+   /* This may happen when trying different priority levels */
+   rte_bbdev_log(INFO,
+   "Device %u queue %u setup failed",
+   dev_id, queue_id);


This change is just changing the log level, which is fine.

I am looking at how the error handling is done for the function.

It seems like the bailing is done in the middle of change the queue state.

ex/ the block above this one

/* Release existing queue ... */

Does this leave the queue in a bad state ?

Tom


return ret;
}
  




Re: [dpdk-dev] [PATCH v1 0/2] Fixes in the RSS expansion method

2021-09-12 Thread Raslan Darawsheh
Hi,


> -Original Message-
> From: dev  On Behalf Of Lior Margalit
> Sent: Sunday, September 5, 2021 12:36 PM
> To: Matan Azrad 
> Cc: Lior Margalit ; dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v1 0/2] Fixes in the RSS expansion method
> 
> The RSS expansion algorithm is using a graph to find the possible expansion
> paths.
> This patch set corrects the traversal over the nodes.
> 
> Lior Margalit (2):
>   net/mlx5: fix RSS expansion for 'explicit' graph node
>   net/mlx5: fix RSS expansion traversal over next nodes
> 
>  drivers/net/mlx5/mlx5_flow.c | 54 ++-
> -
>  1 file changed, 39 insertions(+), 15 deletions(-)
> 
> --
> 2.25.1

Series applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh


[dpdk-dev] [PATCH v2 0/6] mlx5: some independent fixes

2021-09-12 Thread Michael Baum
Some independent fixes in mlx5 net and common driver.

v2: improve commit logs.

Michael Baum (6):
  net/mlx5: fix memory leak in the SH creation
  net/mlx5: fix memory leak in PCI probe
  net/mlx5: fix allow duplicate pattern devarg default
  common/mlx5: fix class combination validation
  common/mlx5: fix device list operation concurrency
  common/mlx5: fix resource cleanliness in a device remove

 drivers/common/mlx5/mlx5_common.c | 26 +-
 drivers/net/mlx5/linux/mlx5_os.c  | 15 +--
 drivers/net/mlx5/mlx5.c   |  4 +++-
 drivers/net/mlx5/mlx5.h   |  1 +
 4 files changed, 34 insertions(+), 12 deletions(-)

-- 
2.25.1



[dpdk-dev] [PATCH v2 6/6] common/mlx5: fix resource cleanliness in a device remove

2021-09-12 Thread Michael Baum
The common remove function call in a loop to remove function for each
driver which have been registered.

If all removes are succeeded, it return 0 without to free the device
which allocated in probe function. Otherwise, it free the device.
In fact we expect exactly the opposite behavior. If all removes are
failed, it return error without to free the device which allocated in
probe function. Otherwise, it free the device and return 0.

Replace it with the correct behavior.

Fixes: 8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_common.c 
b/drivers/common/mlx5/mlx5_common.c
index 4321cb3a9c..6885bbb1d2 100644
--- a/drivers/common/mlx5/mlx5_common.c
+++ b/drivers/common/mlx5/mlx5_common.c
@@ -354,7 +354,7 @@ mlx5_common_dev_remove(struct rte_device *eal_dev)
return -ENODEV;
/* Matching device found, cleanup and unload drivers. */
ret = drivers_remove(dev, dev->classes_loaded);
-   if (ret != 0)
+   if (ret == 0)
dev_release(dev);
return ret;
 }
-- 
2.25.1



[dpdk-dev] [PATCH v2 1/6] net/mlx5: fix memory leak in the SH creation

2021-09-12 Thread Michael Baum
In shared device context creation, there is a missing validation when
one of the btree memory allocation fails that will cause a memory leak.

This adds a proper check to clean resources in case of failure.

Fixes: 632f0f19056f ("net/mlx5: manage shared counters in three-level table")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/net/mlx5/mlx5.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index f84e061fe7..f0ec2d1279 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1254,6 +1254,8 @@ mlx5_alloc_shared_dev_ctx(const struct 
mlx5_dev_spawn_data *spawn,
MLX5_ASSERT(sh);
if (sh->cnt_id_tbl)
mlx5_l3t_destroy(sh->cnt_id_tbl);
+   if (sh->share_cache.cache.table)
+   mlx5_mr_btree_free(&sh->share_cache.cache);
if (sh->tis)
claim_zero(mlx5_devx_cmd_destroy(sh->tis));
if (sh->td)
-- 
2.25.1



[dpdk-dev] [PATCH v2 4/6] common/mlx5: fix class combination validation

2021-09-12 Thread Michael Baum
The common probe function gets as a user argument the classes it should
create, and checks whether the combination is valid.

In case the device already exists, it checks the integration of the
above with the classes that the device has.
However, the function does not check the combination when the device
does not exist and it has to create it.

Check if the combination is valid for all cases.

Fixes: ad435d320473 ("common/mlx5: add bus-agnostic layer")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_common.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_common.c 
b/drivers/common/mlx5/mlx5_common.c
index 459cf4bcc4..f6e440dca1 100644
--- a/drivers/common/mlx5/mlx5_common.c
+++ b/drivers/common/mlx5/mlx5_common.c
@@ -317,14 +317,16 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)
dev->dev = eal_dev;
TAILQ_INSERT_HEAD(&devices_list, dev, next);
new_device = true;
-   } else {
-   /* Validate combination here. */
-   ret = is_valid_class_combination(classes |
-dev->classes_loaded);
-   if (ret != 0) {
-   DRV_LOG(ERR, "Unsupported mlx5 classes combination.");
-   return ret;
-   }
+   }
+   /*
+* Validate combination here.
+* For new device, the classes_loaded field is 0 and it check only
+* the classes given as user device arguments.
+*/
+   ret = is_valid_class_combination(classes | dev->classes_loaded);
+   if (ret != 0) {
+   DRV_LOG(ERR, "Unsupported mlx5 classes combination.");
+   goto class_err;
}
ret = drivers_probe(dev, classes);
if (ret)
-- 
2.25.1



[dpdk-dev] [PATCH v2 2/6] net/mlx5: fix memory leak in PCI probe

2021-09-12 Thread Michael Baum
During PCI probe, the internal probe function is called per PF.

If one of them fails, it was missing a prober destroy for the previously
probed PFs.

This fixes the behavior by destroying all previously probed PFs.

Fixes: 08c2772fc747 ("net/mlx5: support list of representor PF")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/net/mlx5/linux/mlx5_os.c | 13 -
 drivers/net/mlx5/mlx5.c  |  2 +-
 drivers/net/mlx5/mlx5.h  |  1 +
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 5f8766aa48..3d204f99f7 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -2700,9 +2700,20 @@ mlx5_os_pci_probe(struct rte_pci_device *pci_dev)
 
if (eth_da.nb_ports > 0) {
/* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
-   for (p = 0; p < eth_da.nb_ports; p++)
+   for (p = 0; p < eth_da.nb_ports; p++) {
ret = mlx5_os_pci_probe_pf(pci_dev, ð_da,
   eth_da.ports[p]);
+   if (ret)
+   break;
+   }
+   if (ret) {
+   DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
+   "aborted due to proding failure of PF %u",
+   pci_dev->addr.domain, pci_dev->addr.bus,
+   pci_dev->addr.devid, pci_dev->addr.function,
+   eth_da.ports[p]);
+   mlx5_net_remove(&pci_dev->device);
+   }
} else {
ret = mlx5_os_pci_probe_pf(pci_dev, ð_da, 0);
}
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index f0ec2d1279..02ea2e781e 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -2386,7 +2386,7 @@ mlx5_eth_find_next(uint16_t port_id, struct rte_device 
*odev)
  * @return
  *   0 on success, the function cannot fail.
  */
-static int
+int
 mlx5_net_remove(struct rte_device *dev)
 {
uint16_t port_id;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index e02714e231..3581414b78 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1483,6 +1483,7 @@ int mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev,
  struct rte_eth_udp_tunnel *udp_tunnel);
 uint16_t mlx5_eth_find_next(uint16_t port_id, struct rte_device *odev);
 int mlx5_dev_close(struct rte_eth_dev *dev);
+int mlx5_net_remove(struct rte_device *dev);
 bool mlx5_is_hpf(struct rte_eth_dev *dev);
 bool mlx5_is_sf_repr(struct rte_eth_dev *dev);
 void mlx5_age_event_prepare(struct mlx5_dev_ctx_shared *sh);
-- 
2.25.1



[dpdk-dev] [PATCH v2 3/6] net/mlx5: fix allow duplicate pattern devarg default

2021-09-12 Thread Michael Baum
In order to allow\disallow configuring rules with identical patterns,
the new device argument 'allow_duplicate_pattern' was introduced.

The default is to allow, and it is initialized to 1 in PCI probe
function.
However, on auxiliary bus probing (for Sub-Function) it is not
initialized at all, so it's actually initialized to 0

Move the initialization to default config function which is called from
both.

Fixes: 919488fbfa71 ("net/mlx5: support Sub-Function")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/net/mlx5/linux/mlx5_os.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 3d204f99f7..cf4de7e6f9 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -2142,6 +2142,7 @@ mlx5_os_config_default(struct mlx5_dev_config *config)
config->dv_flow_en = 1;
config->decap_en = 1;
config->log_hp_size = MLX5_ARG_UNSET;
+   config->allow_duplicate_pattern = 1;
 }
 
 /**
@@ -2564,7 +2565,6 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
/* Default configuration. */
mlx5_os_config_default(&dev_config);
dev_config.vf = dev_config_vf;
-   dev_config.allow_duplicate_pattern = 1;
list[i].numa_node = pci_dev->device.numa_node;
list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
 &list[i],
-- 
2.25.1



[dpdk-dev] [PATCH v2 5/6] common/mlx5: fix device list operation concurrency

2021-09-12 Thread Michael Baum
The MLX5 common driver has a global list of mlx5 devices which are
probed.

In probe function it create one and insert it to the list. Similarly it
removes the device in remove function.
These operations are not safe as there can be such operations in
parallel, by different threads.

Add global lock for the list and use it to insert or remove.

Fixes: 8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers")
Cc: sta...@dpdk.org

Signed-off-by: Michael Baum 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_common.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/common/mlx5/mlx5_common.c 
b/drivers/common/mlx5/mlx5_common.c
index f6e440dca1..4321cb3a9c 100644
--- a/drivers/common/mlx5/mlx5_common.c
+++ b/drivers/common/mlx5/mlx5_common.c
@@ -50,6 +50,7 @@ static TAILQ_HEAD(mlx5_drivers, mlx5_class_driver) 
drivers_list =
 /* Head of devices. */
 static TAILQ_HEAD(mlx5_devices, mlx5_common_device) devices_list =
TAILQ_HEAD_INITIALIZER(devices_list);
+static pthread_mutex_t devices_list_lock;
 
 static const struct {
const char *name;
@@ -222,7 +223,9 @@ mlx5_dev_to_pci_str(const struct rte_device *dev, char 
*addr, size_t size)
 static void
 dev_release(struct mlx5_common_device *dev)
 {
+   pthread_mutex_lock(&devices_list_lock);
TAILQ_REMOVE(&devices_list, dev, next);
+   pthread_mutex_unlock(&devices_list_lock);
rte_free(dev);
 }
 
@@ -315,7 +318,9 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)
if (!dev)
return -ENOMEM;
dev->dev = eal_dev;
+   pthread_mutex_lock(&devices_list_lock);
TAILQ_INSERT_HEAD(&devices_list, dev, next);
+   pthread_mutex_unlock(&devices_list_lock);
new_device = true;
}
/*
@@ -440,6 +445,7 @@ mlx5_common_init(void)
if (mlx5_common_initialized)
return;
 
+   pthread_mutex_init(&devices_list_lock, NULL);
mlx5_glue_constructor();
mlx5_common_driver_init();
mlx5_common_initialized = true;
-- 
2.25.1



[dpdk-dev] [PATCH v4 1/2] eventdev: add rx queue conf get api

2021-09-12 Thread Ganapati Kundapura
Added rte_event_eth_rx_adapter_queue_conf_get() API to get rx queue
information - event queue identifier, flags for handling received packets,
schedular type, event priority, polling frequency of the receive queue
and flow identifier in rte_event_eth_rx_adapter_queue_conf structure

Signed-off-by: Ganapati Kundapura 

---
v4:
* squashed 1/3 and 3/3
* reused rte_event_eth_rx_adapter_queue_conf structure in place of
  rte_event_eth_rx_adapter_queue_info
* renamed to rte_event_eth_rx_adapter_queue_info_get() to
  rte_event_eth_rx_adapter_queue_conf_get to align with
  rte_event_eth_rx_adapter_queue_conf structure

v3:
* Split single patch into implementaion, test and document updation
  patches separately

v2:
* Fixed build issue due to missing entry in version.map

v1:
* Initial patch with implementaion, test and doc together
---
 .../prog_guide/event_ethernet_rx_adapter.rst   |  8 +++
 lib/eventdev/eventdev_pmd.h| 29 +
 lib/eventdev/rte_event_eth_rx_adapter.c| 75 ++
 lib/eventdev/rte_event_eth_rx_adapter.h| 26 
 lib/eventdev/version.map   |  1 +
 5 files changed, 139 insertions(+)

diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst 
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index c01e5a9..a6b14b9 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -146,6 +146,14 @@ if the callback is supported, and the counts maintained by 
the service function,
 if one exists. The service function also maintains a count of cycles for which
 it was not able to enqueue to the event device.
 
+Getting Adapter queue config
+
+
+The  ``rte_event_eth_rx_adapter_queue_conf_get()`` function reports
+flags for handling received packets, event queue identifier, scheduar type,
+event priority, polling frequency of the receive queue and flow identifier
+in struct ``rte_event_eth_rx_adapter_queue_conf``.
+
 Interrupt Based Rx Queues
 ~~
 
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index 0f724ac..5b58385 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -562,6 +562,33 @@ typedef int (*eventdev_eth_rx_adapter_queue_del_t)
int32_t rx_queue_id);
 
 /**
+ * Retrieve information about Rx queue. This callback is invoked if
+ * the caps returned from the eventdev_eth_rx_adapter_caps_get(, eth_port_id)
+ * has RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT set.
+ *
+ * @param dev
+ *  Event device pointer
+ *
+ * @param eth_dev
+ *  Ethernet device pointer
+ *
+ * @param rx_queue_id
+ *  Ethernet device receive queue index.
+ *
+ * @param[out] queue_conf
+ *  Pointer to rte_event_eth_rx_adapter_queue_conf structure
+ *
+ * @return
+ *  - 0: Success
+ *  - <0: Error code on failure.
+ */
+typedef int (*eventdev_eth_rx_adapter_queue_conf_get_t)
+   (const struct rte_eventdev *dev,
+   const struct rte_eth_dev *eth_dev,
+   uint16_t rx_queue_id,
+   struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
+
+/**
  * Start ethernet Rx adapter. This callback is invoked if
  * the caps returned from eventdev_eth_rx_adapter_caps_get(.., eth_port_id)
  * has RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT set and Rx queues
@@ -1107,6 +1134,8 @@ struct rte_eventdev_ops {
/**< Add Rx queues to ethernet Rx adapter */
eventdev_eth_rx_adapter_queue_del_t eth_rx_adapter_queue_del;
/**< Delete Rx queues from ethernet Rx adapter */
+   eventdev_eth_rx_adapter_queue_conf_get_t eth_rx_adapter_queue_conf_get;
+   /**< Get Rx adapter queue info */
eventdev_eth_rx_adapter_start_t eth_rx_adapter_start;
/**< Start ethernet Rx adapter */
eventdev_eth_rx_adapter_stop_t eth_rx_adapter_stop;
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c 
b/lib/eventdev/rte_event_eth_rx_adapter.c
index 7c94c73..de8ab05 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -2811,3 +2811,78 @@ rte_event_eth_rx_adapter_cb_register(uint8_t id,
 
return 0;
 }
+
+int
+rte_event_eth_rx_adapter_queue_conf_get(uint8_t id,
+   uint16_t eth_dev_id,
+   uint16_t rx_queue_id,
+   struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
+{
+   struct rte_eventdev *dev;
+   struct eth_device_info *dev_info;
+   struct rte_event_eth_rx_adapter *rx_adapter;
+   struct eth_rx_queue_info *queue_info;
+   struct rte_event *qi_ev;
+   int ret;
+   uint32_t cap;
+
+   RTE_EVENT_ETH_RX_ADAPTER_ID_VALID_OR_ERR_RET(id, -EINVAL);
+   RTE_ETH_VALID_PORTID_OR_ERR_RET(eth_dev_id, -EINVAL);
+
+   if (rx_queue_id >= rte_eth_devices[eth_dev_id].data->nb_rx_queues) {
+   R

[dpdk-dev] [PATCH v4 2/2] test/event: Add rx queue conf get test in rx adapter autotest

2021-09-12 Thread Ganapati Kundapura
Add unit tests for rte_event_eth_rx_adapter_queue_conf_get()
in rx adapter autotest

Signed-off-by: Ganapati Kundapura 
---
 app/test/test_event_eth_rx_adapter.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/app/test/test_event_eth_rx_adapter.c 
b/app/test/test_event_eth_rx_adapter.c
index 9198767..ac6cb18 100644
--- a/app/test/test_event_eth_rx_adapter.c
+++ b/app/test/test_event_eth_rx_adapter.c
@@ -750,6 +750,27 @@ adapter_stats(void)
return TEST_SUCCESS;
 }
 
+static int
+adapter_queue_conf(void)
+{
+   int err;
+   struct rte_event_eth_rx_adapter_queue_conf queue_conf;
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ 0, &queue_conf);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ -1, &queue_conf);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ 0, NULL);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   return TEST_SUCCESS;
+}
+
 static struct unit_test_suite event_eth_rx_tests = {
.suite_name = "rx event eth adapter test suite",
.setup = testsuite_setup,
@@ -762,6 +783,7 @@ static struct unit_test_suite event_eth_rx_tests = {
adapter_multi_eth_add_del),
TEST_CASE_ST(adapter_create, adapter_free, adapter_start_stop),
TEST_CASE_ST(adapter_create, adapter_free, adapter_stats),
+   TEST_CASE_ST(adapter_create, adapter_free, adapter_queue_conf),
TEST_CASES_END() /**< NULL terminate unit test array */
}
 };
-- 
2.6.4



[dpdk-dev] [PATCH v4 2/2] test/event: Add rx queue conf get test in rx adapter autotest

2021-09-12 Thread Ganapati Kundapura
Add unit tests for rte_event_eth_rx_adapter_queue_conf_get()
in rx adapter autotest

Signed-off-by: Ganapati Kundapura 
---
 app/test/test_event_eth_rx_adapter.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/app/test/test_event_eth_rx_adapter.c 
b/app/test/test_event_eth_rx_adapter.c
index 9198767..ac6cb18 100644
--- a/app/test/test_event_eth_rx_adapter.c
+++ b/app/test/test_event_eth_rx_adapter.c
@@ -750,6 +750,27 @@ adapter_stats(void)
return TEST_SUCCESS;
 }
 
+static int
+adapter_queue_conf(void)
+{
+   int err;
+   struct rte_event_eth_rx_adapter_queue_conf queue_conf;
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ 0, &queue_conf);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ -1, &queue_conf);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   err = rte_event_eth_rx_adapter_queue_conf_get(TEST_INST_ID, TEST_DEV_ID,
+ 0, NULL);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   return TEST_SUCCESS;
+}
+
 static struct unit_test_suite event_eth_rx_tests = {
.suite_name = "rx event eth adapter test suite",
.setup = testsuite_setup,
@@ -762,6 +783,7 @@ static struct unit_test_suite event_eth_rx_tests = {
adapter_multi_eth_add_del),
TEST_CASE_ST(adapter_create, adapter_free, adapter_start_stop),
TEST_CASE_ST(adapter_create, adapter_free, adapter_stats),
+   TEST_CASE_ST(adapter_create, adapter_free, adapter_queue_conf),
TEST_CASES_END() /**< NULL terminate unit test array */
}
 };
-- 
2.6.4



[dpdk-dev] [PATCH v4 1/2] eventdev: add rx queue conf get api

2021-09-12 Thread Ganapati Kundapura
Added rte_event_eth_rx_adapter_queue_conf_get() API to get rx queue
information - event queue identifier, flags for handling received packets,
scheduler type, event priority, polling frequency of the receive queue
and flow identifier in rte_event_eth_rx_adapter_queue_conf structure

Signed-off-by: Ganapati Kundapura 

---
v4:
* squashed 1/3 and 3/3
* reused rte_event_eth_rx_adapter_queue_conf structure in place of
  rte_event_eth_rx_adapter_queue_info
* renamed to rte_event_eth_rx_adapter_queue_info_get() to
  rte_event_eth_rx_adapter_queue_conf_get to align with
  rte_event_eth_rx_adapter_queue_conf structure

v3:
* Split single patch into implementaion, test and document updation
  patches separately

v2:
* Fixed build issue due to missing entry in version.map

v1:
* Initial patch with implementaion, test and doc together
---
 .../prog_guide/event_ethernet_rx_adapter.rst   |  8 +++
 lib/eventdev/eventdev_pmd.h| 29 +
 lib/eventdev/rte_event_eth_rx_adapter.c| 75 ++
 lib/eventdev/rte_event_eth_rx_adapter.h| 26 
 lib/eventdev/version.map   |  1 +
 5 files changed, 139 insertions(+)

diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst 
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index c01e5a9..62f6413 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -146,6 +146,14 @@ if the callback is supported, and the counts maintained by 
the service function,
 if one exists. The service function also maintains a count of cycles for which
 it was not able to enqueue to the event device.
 
+Getting Adapter queue config
+
+
+The  ``rte_event_eth_rx_adapter_queue_conf_get()`` function reports
+flags for handling received packets, event queue identifier, scheduler type,
+event priority, polling frequency of the receive queue and flow identifier
+in struct ``rte_event_eth_rx_adapter_queue_conf``.
+
 Interrupt Based Rx Queues
 ~~
 
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index 0f724ac..5b58385 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -562,6 +562,33 @@ typedef int (*eventdev_eth_rx_adapter_queue_del_t)
int32_t rx_queue_id);
 
 /**
+ * Retrieve information about Rx queue. This callback is invoked if
+ * the caps returned from the eventdev_eth_rx_adapter_caps_get(, eth_port_id)
+ * has RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT set.
+ *
+ * @param dev
+ *  Event device pointer
+ *
+ * @param eth_dev
+ *  Ethernet device pointer
+ *
+ * @param rx_queue_id
+ *  Ethernet device receive queue index.
+ *
+ * @param[out] queue_conf
+ *  Pointer to rte_event_eth_rx_adapter_queue_conf structure
+ *
+ * @return
+ *  - 0: Success
+ *  - <0: Error code on failure.
+ */
+typedef int (*eventdev_eth_rx_adapter_queue_conf_get_t)
+   (const struct rte_eventdev *dev,
+   const struct rte_eth_dev *eth_dev,
+   uint16_t rx_queue_id,
+   struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
+
+/**
  * Start ethernet Rx adapter. This callback is invoked if
  * the caps returned from eventdev_eth_rx_adapter_caps_get(.., eth_port_id)
  * has RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT set and Rx queues
@@ -1107,6 +1134,8 @@ struct rte_eventdev_ops {
/**< Add Rx queues to ethernet Rx adapter */
eventdev_eth_rx_adapter_queue_del_t eth_rx_adapter_queue_del;
/**< Delete Rx queues from ethernet Rx adapter */
+   eventdev_eth_rx_adapter_queue_conf_get_t eth_rx_adapter_queue_conf_get;
+   /**< Get Rx adapter queue info */
eventdev_eth_rx_adapter_start_t eth_rx_adapter_start;
/**< Start ethernet Rx adapter */
eventdev_eth_rx_adapter_stop_t eth_rx_adapter_stop;
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c 
b/lib/eventdev/rte_event_eth_rx_adapter.c
index 7c94c73..de8ab05 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -2811,3 +2811,78 @@ rte_event_eth_rx_adapter_cb_register(uint8_t id,
 
return 0;
 }
+
+int
+rte_event_eth_rx_adapter_queue_conf_get(uint8_t id,
+   uint16_t eth_dev_id,
+   uint16_t rx_queue_id,
+   struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
+{
+   struct rte_eventdev *dev;
+   struct eth_device_info *dev_info;
+   struct rte_event_eth_rx_adapter *rx_adapter;
+   struct eth_rx_queue_info *queue_info;
+   struct rte_event *qi_ev;
+   int ret;
+   uint32_t cap;
+
+   RTE_EVENT_ETH_RX_ADAPTER_ID_VALID_OR_ERR_RET(id, -EINVAL);
+   RTE_ETH_VALID_PORTID_OR_ERR_RET(eth_dev_id, -EINVAL);
+
+   if (rx_queue_id >= rte_eth_devices[eth_dev_id].data->nb_rx_queues) {
+   

[dpdk-dev] [PATCH V2 2/5] common/mlx5: update new MMO HCA capabilities

2021-09-12 Thread Raja Zidane
New MMO HCA capabilities were added and others were renamed.
Align hca capabilities with new prm.
Add support in devx interface for changes in HCA capabilities.

Signed-off-by: Raja Zidane 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 15 ---
 drivers/common/mlx5/mlx5_devx_cmds.h | 11 ---
 drivers/common/mlx5/mlx5_prm.h   | 20 ++--
 3 files changed, 34 insertions(+), 12 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c 
b/drivers/common/mlx5/mlx5_devx_cmds.c
index ac554cca05..00c78b1288 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -858,9 +858,18 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->log_max_srq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq_sz);
attr->reg_c_preserve =
MLX5_GET(cmd_hca_cap, hcattr, reg_c_preserve);
-   attr->mmo_dma_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo);
-   attr->mmo_compress_en = MLX5_GET(cmd_hca_cap, hcattr, compress);
-   attr->mmo_decompress_en = MLX5_GET(cmd_hca_cap, hcattr, decompress);
+   attr->mmo_regex_qp_en = MLX5_GET(cmd_hca_cap, hcattr, regexp_mmo_qp);
+   attr->mmo_regex_sq_en = MLX5_GET(cmd_hca_cap, hcattr, regexp_mmo_sq);
+   attr->mmo_dma_sq_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo_sq);
+   attr->mmo_compress_sq_en = MLX5_GET(cmd_hca_cap, hcattr,
+   compress_mmo_sq);
+   attr->mmo_decompress_sq_en = MLX5_GET(cmd_hca_cap, hcattr,
+   decompress_mmo_sq);
+   attr->mmo_dma_qp_en = MLX5_GET(cmd_hca_cap, hcattr, dma_mmo_qp);
+   attr->mmo_compress_qp_en = MLX5_GET(cmd_hca_cap, hcattr,
+   compress_mmo_qp);
+   attr->mmo_decompress_qp_en = MLX5_GET(cmd_hca_cap, hcattr,
+   decompress_mmo_qp);
attr->compress_min_block_size = MLX5_GET(cmd_hca_cap, hcattr,
 compress_min_block_size);
attr->log_max_mmo_dma = MLX5_GET(cmd_hca_cap, hcattr, log_dma_mmo_size);
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h 
b/drivers/common/mlx5/mlx5_devx_cmds.h
index c071629904..b21df0fd9b 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -173,9 +173,14 @@ struct mlx5_hca_attr {
uint32_t log_max_srq;
uint32_t log_max_srq_sz;
uint32_t rss_ind_tbl_cap;
-   uint32_t mmo_dma_en:1;
-   uint32_t mmo_compress_en:1;
-   uint32_t mmo_decompress_en:1;
+   uint32_t mmo_dma_sq_en:1;
+   uint32_t mmo_compress_sq_en:1;
+   uint32_t mmo_decompress_sq_en:1;
+   uint32_t mmo_dma_qp_en:1;
+   uint32_t mmo_compress_qp_en:1;
+   uint32_t mmo_decompress_qp_en:1;
+   uint32_t mmo_regex_qp_en:1;
+   uint32_t mmo_regex_sq_en:1;
uint32_t compress_min_block_size:4;
uint32_t log_max_mmo_dma:5;
uint32_t log_max_mmo_compress:5;
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index d361bcf90e..070c538c8c 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1386,10 +1386,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 rtr2rts_qp_counters_set_id[0x1];
u8 rts2rts_udp_sport[0x1];
u8 rts2rts_lag_tx_port_affinity[0x1];
-   u8 dma_mmo[0x1];
+   u8 dma_mmo_sq[0x1];
u8 compress_min_block_size[0x4];
-   u8 compress[0x1];
-   u8 decompress[0x1];
+   u8 compress_mmo_sq[0x1];
+   u8 decompress_mmo_sq[0x1];
u8 log_max_ra_res_qp[0x6];
u8 end_pad[0x1];
u8 cc_query_allowed[0x1];
@@ -1519,7 +1519,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 num_lag_ports[0x4];
u8 reserved_at_280[0x10];
u8 max_wqe_sz_sq[0x10];
-   u8 reserved_at_2a0[0x10];
+   u8 reserved_at_2a0[0xe];
+   u8 regexp_mmo_sq[0x1];
+   u8 reserved_at_2b0[0x1];
u8 max_wqe_sz_rq[0x10];
u8 max_flow_counter_31_16[0x10];
u8 max_wqe_sz_sq_dc[0x10];
@@ -1632,7 +1634,12 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 num_vhca_ports[0x8];
u8 reserved_at_618[0x6];
u8 sw_owner_id[0x1];
-   u8 reserved_at_61f[0x1e1];
+   u8 reserved_at_61f[0x109];
+   u8 dma_mmo_qp[0x1];
+   u8 regexp_mmo_qp[0x1];
+   u8 compress_mmo_qp[0x1];
+   u8 decompress_mmo_qp[0x1];
+   u8 reserved_at_624[0xd4];
 };
 
 struct mlx5_ifc_qos_cap_bits {
@@ -3244,7 +3251,8 @@ struct mlx5_ifc_create_qp_in_bits {
u8 uid[0x10];
u8 reserved_at_20[0x10];
u8 op_mod[0x10];
-   u8 reserved_at_40[0x40];
+   u8 qpc_ext[0x1];
+   u8 reserved_at_41[0x3f];
u8 opt_param_mask[0x20];
u8 reserved_at_a0[0x20];
struct mlx5_ifc_qpc_bits qpc;
-- 
2.17.1



[dpdk-dev] [PATCH V2 0/5] mlx5: replaced hardware queue object

2021-09-12 Thread Raja Zidane
The mlx5 PMDs for compress and regex classes use an MMO WQE operated by
the GGA engine in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from BF3, the queue of the MMO WQEs should be connected to the
GGA engine using a new configuration, mmo, that will be supported only
in the QP object.
The FW introduced new capabilities to define whether the mmo
configuration should be configured for the GGA queue.
Replace all the GGA queue objects to QP, set mmo configuration according
to the new FW capabilities.

V2: fix coding style issues.

Raja Zidane (5):
  common/mlx5: share DevX QP operations
  common/mlx5: update new MMO HCA capabilities
  common/mlx5: add MMO configuration for the DevX QP
  compress/mlx5: refactor queue HW object
  regex/mlx5: refactor HW queue objects

 drivers/common/mlx5/mlx5_common_devx.c   | 144 +++
 drivers/common/mlx5/mlx5_common_devx.h   |  23 +++
 drivers/common/mlx5/mlx5_devx_cmds.c |  23 ++-
 drivers/common/mlx5/mlx5_devx_cmds.h |  13 +-
 drivers/common/mlx5/mlx5_prm.h   |  48 ++-
 drivers/common/mlx5/version.map  |   3 +
 drivers/compress/mlx5/mlx5_compress.c|  73 +-
 drivers/crypto/mlx5/mlx5_crypto.c| 100 -
 drivers/crypto/mlx5/mlx5_crypto.h|   5 +-
 drivers/regex/mlx5/mlx5_regex.c  |   7 +-
 drivers/regex/mlx5/mlx5_regex.h  |  16 ++-
 drivers/regex/mlx5/mlx5_regex_control.c  |  65 +
 drivers/regex/mlx5/mlx5_regex_fastpath.c | 170 ---
 drivers/vdpa/mlx5/mlx5_vdpa.h|   5 +-
 drivers/vdpa/mlx5/mlx5_vdpa_event.c  |  59 +++-
 15 files changed, 460 insertions(+), 294 deletions(-)

-- 
2.17.1



[dpdk-dev] [PATCH V2 1/5] common/mlx5: share DevX QP operations

2021-09-12 Thread Raja Zidane
Currently drivers using QP (vDPA, crypto and compress, regex soon)
manage their memory, creation, modification and destruction of the QP,
in almost identical code.
Move QP memory management, creation and destruction to common.
Add common function to change QP state to RTS.
Add user_index attribute to QP creation.
It's for better code maintenance and reuse.

Signed-off-by: Raja Zidane 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_common_devx.c | 144 +
 drivers/common/mlx5/mlx5_common_devx.h |  23 
 drivers/common/mlx5/mlx5_devx_cmds.c   |   1 +
 drivers/common/mlx5/mlx5_devx_cmds.h   |   1 +
 drivers/common/mlx5/version.map|   3 +
 drivers/crypto/mlx5/mlx5_crypto.c  | 100 +
 drivers/crypto/mlx5/mlx5_crypto.h  |   5 +-
 drivers/vdpa/mlx5/mlx5_vdpa.h  |   5 +-
 drivers/vdpa/mlx5/mlx5_vdpa_event.c|  59 +++---
 9 files changed, 216 insertions(+), 125 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_common_devx.c 
b/drivers/common/mlx5/mlx5_common_devx.c
index 22c8d356c4..825f84b183 100644
--- a/drivers/common/mlx5/mlx5_common_devx.c
+++ b/drivers/common/mlx5/mlx5_common_devx.c
@@ -271,6 +271,115 @@ mlx5_devx_sq_create(void *ctx, struct mlx5_devx_sq 
*sq_obj, uint16_t log_wqbb_n,
return -rte_errno;
 }
 
+/**
+ * Destroy DevX Queue Pair.
+ *
+ * @param[in] qp
+ *   DevX QP to destroy.
+ */
+void
+mlx5_devx_qp_destroy(struct mlx5_devx_qp *qp)
+{
+   if (qp->qp)
+   claim_zero(mlx5_devx_cmd_destroy(qp->qp));
+   if (qp->umem_obj)
+   claim_zero(mlx5_os_umem_dereg(qp->umem_obj));
+   if (qp->umem_buf)
+   mlx5_free((void *)(uintptr_t)qp->umem_buf);
+}
+
+/**
+ * Create Queue Pair using DevX API.
+ *
+ * Get a pointer to partially initialized attributes structure, and updates the
+ * following fields:
+ *   wq_umem_id
+ *   wq_umem_offset
+ *   dbr_umem_valid
+ *   dbr_umem_id
+ *   dbr_address
+ *   log_page_size
+ * All other fields are updated by caller.
+ *
+ * @param[in] ctx
+ *   Context returned from mlx5 open_device() glue function.
+ * @param[in/out] qp_obj
+ *   Pointer to QP to create.
+ * @param[in] log_wqbb_n
+ *   Log of number of WQBBs in queue.
+ * @param[in] attr
+ *   Pointer to QP attributes structure.
+ * @param[in] socket
+ *   Socket to use for allocation.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int
+mlx5_devx_qp_create(void *ctx, struct mlx5_devx_qp *qp_obj, uint16_t 
log_wqbb_n,
+   struct mlx5_devx_qp_attr *attr, int socket)
+{
+   struct mlx5_devx_obj *qp = NULL;
+   struct mlx5dv_devx_umem *umem_obj = NULL;
+   void *umem_buf = NULL;
+   size_t alignment = MLX5_WQE_BUF_ALIGNMENT;
+   uint32_t umem_size, umem_dbrec;
+   uint16_t qp_size = 1 << log_wqbb_n;
+   int ret;
+
+   if (alignment == (size_t)-1) {
+   DRV_LOG(ERR, "Failed to get WQE buf alignment.");
+   rte_errno = ENOMEM;
+   return -rte_errno;
+   }
+   /* Allocate memory buffer for WQEs and doorbell record. */
+   umem_size = MLX5_WQE_SIZE * qp_size;
+   umem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE);
+   umem_size += MLX5_DBR_SIZE;
+   umem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,
+  alignment, socket);
+   if (!umem_buf) {
+   DRV_LOG(ERR, "Failed to allocate memory for QP.");
+   rte_errno = ENOMEM;
+   return -rte_errno;
+   }
+   /* Register allocated buffer in user space with DevX. */
+   umem_obj = mlx5_os_umem_reg(ctx, (void *)(uintptr_t)umem_buf, umem_size,
+   IBV_ACCESS_LOCAL_WRITE);
+   if (!umem_obj) {
+   DRV_LOG(ERR, "Failed to register umem for QP.");
+   rte_errno = errno;
+   goto error;
+   }
+   /* Fill attributes for SQ object creation. */
+   attr->wq_umem_id = mlx5_os_get_umem_id(umem_obj);
+   attr->wq_umem_offset = 0;
+   attr->dbr_umem_valid = 1;
+   attr->dbr_umem_id = attr->wq_umem_id;
+   attr->dbr_address = umem_dbrec;
+   attr->log_page_size = MLX5_LOG_PAGE_SIZE;
+   /* Create send queue object with DevX. */
+   qp = mlx5_devx_cmd_create_qp(ctx, attr);
+   if (!qp) {
+   DRV_LOG(ERR, "Can't create DevX QP object.");
+   rte_errno = ENOMEM;
+   goto error;
+   }
+   qp_obj->umem_buf = umem_buf;
+   qp_obj->umem_obj = umem_obj;
+   qp_obj->qp = qp;
+   qp_obj->db_rec = RTE_PTR_ADD(qp_obj->umem_buf, umem_dbrec);
+   return 0;
+error:
+   ret = rte_errno;
+   if (umem_obj)
+   claim_zero(mlx5_os_umem_dereg(umem_obj));
+   if (umem_buf)
+   mlx5_free((void *)(uintptr_t)umem_buf);
+   rte_errno = ret;
+   return -rte_errno;
+}
+
 /**
  * Destroy DevX Receive Queue.
  *
@@ -385,3 +494,38 @@ 

[dpdk-dev] [PATCH V2 3/5] common/mlx5: add MMO configuration for the DevX QP

2021-09-12 Thread Raja Zidane
A new configuration MMO was added to QP Context.
If set, MMO WQEs are supported on this QP.
For DMA MMO, supported only when dma_mmo_qp==1.
For REGEXP MMO, supported only when regexp_mmo_qp==1.
For COMPRESS MMO, supported only when compress_mmo_qp==1.
For DECOMPRESS MMO, supported only when decompress_mmo_qp==1.
Add support to DevX interface to set MMO bit.

Signed-off-by: Raja Zidane 
Acked-by: Matan Azrad 
---
 drivers/common/mlx5/mlx5_devx_cmds.c |  7 +++
 drivers/common/mlx5/mlx5_devx_cmds.h |  1 +
 drivers/common/mlx5/mlx5_prm.h   | 28 +++-
 3 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c 
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 00c78b1288..eefb869b7d 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -2032,6 +2032,13 @@ mlx5_devx_cmd_create_qp(void *ctx,
MLX5_SET(qpc, qpc, ts_format, attr->ts_format);
MLX5_SET(qpc, qpc, user_index, attr->user_index);
if (attr->uar_index) {
+   if (attr->mmo) {
+   void *qpc_ext_and_pas_list = MLX5_ADDR_OF(create_qp_in,
+   in, qpc_extension_and_pas_list);
+   void *qpc_ext = MLX5_ADDR_OF(qpc_extension_and_pas_list,
+   qpc_ext_and_pas_list, qpc_data_extension);
+   MLX5_SET(qpc_extension, qpc_ext, mmo, 1);
+   }
MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
MLX5_SET(qpc, qpc, uar_page, attr->uar_index);
if (attr->log_page_size > MLX5_ADAPTER_PAGE_SHIFT)
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h 
b/drivers/common/mlx5/mlx5_devx_cmds.h
index b21df0fd9b..e149f8b4f5 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -403,6 +403,7 @@ struct mlx5_devx_qp_attr {
uint32_t wq_umem_id;
uint64_t wq_umem_offset;
uint32_t user_index:24;
+   uint32_t mmo:1;
 };
 
 struct mlx5_devx_virtio_q_couners_attr {
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 070c538c8c..cb28adb80a 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3243,6 +3243,28 @@ struct mlx5_ifc_create_qp_out_bits {
u8 reserved_at_60[0x20];
 };
 
+struct mlx5_ifc_qpc_extension_bits {
+   u8 reserved_at_0[0x2];
+   u8 mmo[0x1];
+   u8 reserved_at_3[0x5fd];
+};
+
+#ifdef PEDANTIC
+#pragma GCC diagnostic ignored "-Wpedantic"
+#endif
+struct mlx5_ifc_qpc_pas_list_bits {
+   u8 pas[0][0x40];
+};
+
+#ifdef PEDANTIC
+#pragma GCC diagnostic ignored "-Wpedantic"
+#endif
+struct mlx5_ifc_qpc_extension_and_pas_list_bits {
+   struct mlx5_ifc_qpc_extension_bits qpc_data_extension;
+   u8 pas[0][0x40];
+};
+
+
 #ifdef PEDANTIC
 #pragma GCC diagnostic ignored "-Wpedantic"
 #endif
@@ -3260,7 +3282,11 @@ struct mlx5_ifc_create_qp_in_bits {
u8 wq_umem_id[0x20];
u8 wq_umem_valid[0x1];
u8 reserved_at_861[0x1f];
-   u8 pas[0][0x40];
+   union {
+   struct mlx5_ifc_qpc_pas_list_bits qpc_pas_list;
+   struct mlx5_ifc_qpc_extension_and_pas_list_bits
+   qpc_extension_and_pas_list;
+   };
 };
 #ifdef PEDANTIC
 #pragma GCC diagnostic error "-Wpedantic"
-- 
2.17.1



[dpdk-dev] [PATCH V2 4/5] compress/mlx5: refactor queue HW object

2021-09-12 Thread Raja Zidane
The mlx5 PMD for compress class uses an MMO WQE operated by the GGA
engine in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from BF3, the queue of the MMO WQEs should be connected to the
GGA engine using a new configuration, MMO, that will be supported only
in the QP object.
The FW introduced new capabilities to define whether the MMO
configuration should be configured for the GGA queue.
Replace all the GGA queue objects to QP, set MMO configuration according
to the new FW capabilities.

Signed-off-by: Raja Zidane 
Acked-by: Matan Azrad 
---
 drivers/compress/mlx5/mlx5_compress.c | 73 +++
 1 file changed, 42 insertions(+), 31 deletions(-)

diff --git a/drivers/compress/mlx5/mlx5_compress.c 
b/drivers/compress/mlx5/mlx5_compress.c
index 883e720ec1..0f002195c6 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -40,7 +40,7 @@ struct mlx5_compress_priv {
void *uar;
uint32_t pdn; /* Protection Domain number. */
uint8_t min_block_size;
-   uint8_t sq_ts_format; /* Whether SQ supports timestamp formats. */
+   uint8_t qp_ts_format; /* Whether SQ supports timestamp formats. */
/* Minimum huffman block size supported by the device. */
struct ibv_pd *pd;
struct rte_compressdev_config dev_config;
@@ -48,6 +48,13 @@ struct mlx5_compress_priv {
rte_spinlock_t xform_sl;
struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
volatile uint64_t *uar_addr;
+   /* HCA caps*/
+   uint32_t mmo_decomp_sq:1;
+   uint32_t mmo_decomp_qp:1;
+   uint32_t mmo_comp_sq:1;
+   uint32_t mmo_comp_qp:1;
+   uint32_t mmo_dma_sq:1;
+   uint32_t mmo_dma_qp:1;
 #ifndef RTE_ARCH_64
rte_spinlock_t uar32_sl;
 #endif /* RTE_ARCH_64 */
@@ -61,7 +68,7 @@ struct mlx5_compress_qp {
struct mlx5_mr_ctrl mr_ctrl;
int socket_id;
struct mlx5_devx_cq cq;
-   struct mlx5_devx_sq sq;
+   struct mlx5_devx_qp qp;
struct mlx5_pmd_mr opaque_mr;
struct rte_comp_op **ops;
struct mlx5_compress_priv *priv;
@@ -134,8 +141,8 @@ mlx5_compress_qp_release(struct rte_compressdev *dev, 
uint16_t qp_id)
 {
struct mlx5_compress_qp *qp = dev->data->queue_pairs[qp_id];
 
-   if (qp->sq.sq != NULL)
-   mlx5_devx_sq_destroy(&qp->sq);
+   if (qp->qp.qp != NULL)
+   mlx5_devx_qp_destroy(&qp->qp);
if (qp->cq.cq != NULL)
mlx5_devx_cq_destroy(&qp->cq);
if (qp->opaque_mr.obj != NULL) {
@@ -152,12 +159,12 @@ mlx5_compress_qp_release(struct rte_compressdev *dev, 
uint16_t qp_id)
 }
 
 static void
-mlx5_compress_init_sq(struct mlx5_compress_qp *qp)
+mlx5_compress_init_qp(struct mlx5_compress_qp *qp)
 {
volatile struct mlx5_gga_wqe *restrict wqe =
-   (volatile struct mlx5_gga_wqe *)qp->sq.wqes;
+   (volatile struct mlx5_gga_wqe *)qp->qp.wqes;
volatile struct mlx5_gga_compress_opaque *opaq = qp->opaque_mr.addr;
-   const uint32_t sq_ds = rte_cpu_to_be_32((qp->sq.sq->id << 8) | 4u);
+   const uint32_t sq_ds = rte_cpu_to_be_32((qp->qp.qp->id << 8) | 4u);
const uint32_t flags = RTE_BE32(MLX5_COMP_ALWAYS <<
MLX5_COMP_MODE_OFFSET);
const uint32_t opaq_lkey = rte_cpu_to_be_32(qp->opaque_mr.lkey);
@@ -182,15 +189,10 @@ mlx5_compress_qp_setup(struct rte_compressdev *dev, 
uint16_t qp_id,
struct mlx5_devx_cq_attr cq_attr = {
.uar_page_id = mlx5_os_get_devx_uar_page_id(priv->uar),
};
-   struct mlx5_devx_create_sq_attr sq_attr = {
+   struct mlx5_devx_qp_attr qp_attr = {
+   .pd = priv->pdn,
+   .uar_index = mlx5_os_get_devx_uar_page_id(priv->uar),
.user_index = qp_id,
-   .wq_attr = (struct mlx5_devx_wq_attr){
-   .pd = priv->pdn,
-   .uar_page = mlx5_os_get_devx_uar_page_id(priv->uar),
-   },
-   };
-   struct mlx5_devx_modify_sq_attr modify_attr = {
-   .state = MLX5_SQC_STATE_RDY,
};
uint32_t log_ops_n = rte_log2_u32(max_inflight_ops);
uint32_t alloc_size = sizeof(*qp);
@@ -242,24 +244,26 @@ mlx5_compress_qp_setup(struct rte_compressdev *dev, 
uint16_t qp_id,
DRV_LOG(ERR, "Failed to create CQ.");
goto err;
}
-   sq_attr.cqn = qp->cq.cq->id;
-   sq_attr.ts_format = mlx5_ts_format_conv(priv->sq_ts_format);
-   ret = mlx5_devx_sq_create(priv->ctx, &qp->sq, log_ops_n, &sq_attr,
+   qp_attr.cqn = qp->cq.cq->id;
+   qp_attr.ts_format = mlx5_ts_format_conv(priv->qp_ts_format);
+   qp_attr.rq_size = 0;
+   qp_attr.sq_size = RTE_BIT32(log_ops_n);
+   qp_attr.mmo = priv->mmo_decomp_qp && priv->mmo_comp_qp
+   && priv->mmo_dma_qp;
+

[dpdk-dev] [PATCH V2 5/5] regex/mlx5: refactor HW queue objects

2021-09-12 Thread Raja Zidane
The mlx5 PMD for regex class uses an MMO WQE operated by the GGA engine
in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from BF3, the queue of the MMO WQEs should be connected to the
GGA engine using a new configuration, MMO, that will be supported only
in the QP object.
The FW introduced new capabilities to define whether the MMO
configuration should be configured for the GGA queue.
Replace all the GGA queue objects to QP, set MMO configuration according
to the new FW capabilities.

Signed-off-by: Raja Zidane 
Acked-by: Matan Azrad 
---
 drivers/regex/mlx5/mlx5_regex.c  |   7 +-
 drivers/regex/mlx5/mlx5_regex.h  |  16 ++-
 drivers/regex/mlx5/mlx5_regex_control.c  |  65 +
 drivers/regex/mlx5/mlx5_regex_fastpath.c | 170 ---
 4 files changed, 133 insertions(+), 125 deletions(-)

diff --git a/drivers/regex/mlx5/mlx5_regex.c b/drivers/regex/mlx5/mlx5_regex.c
index f17b6df47f..a3368749b9 100644
--- a/drivers/regex/mlx5/mlx5_regex.c
+++ b/drivers/regex/mlx5/mlx5_regex.c
@@ -146,7 +146,8 @@ mlx5_regex_dev_probe(struct rte_device *rte_dev)
DRV_LOG(ERR, "Unable to read HCA capabilities.");
rte_errno = ENOTSUP;
goto dev_error;
-   } else if (!attr.regex || attr.regexp_num_of_engines == 0) {
+   } else if (((!attr.regex) && (!attr.mmo_regex_sq_en) &&
+   (!attr.mmo_regex_qp_en)) || attr.regexp_num_of_engines == 0) {
DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
"old FW/OFED version?");
rte_errno = ENOTSUP;
@@ -164,7 +165,9 @@ mlx5_regex_dev_probe(struct rte_device *rte_dev)
rte_errno = ENOMEM;
goto dev_error;
}
-   priv->sq_ts_format = attr.sq_ts_format;
+   priv->mmo_regex_qp_cap = attr.mmo_regex_qp_en;
+   priv->mmo_regex_sq_cap = attr.mmo_regex_sq_en;
+   priv->qp_ts_format = attr.qp_ts_format;
priv->ctx = ctx;
priv->nb_engines = 2; /* attr.regexp_num_of_engines */
ret = mlx5_devx_regex_register_read(priv->ctx, 0,
diff --git a/drivers/regex/mlx5/mlx5_regex.h b/drivers/regex/mlx5/mlx5_regex.h
index 514f3408f9..2242d250a3 100644
--- a/drivers/regex/mlx5/mlx5_regex.h
+++ b/drivers/regex/mlx5/mlx5_regex.h
@@ -17,12 +17,12 @@
 #include "mlx5_rxp.h"
 #include "mlx5_regex_utils.h"
 
-struct mlx5_regex_sq {
+struct mlx5_regex_hw_qp {
uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
-   struct mlx5_devx_sq sq_obj; /* The SQ DevX object. */
+   struct mlx5_devx_qp qp_obj; /* The QP DevX object. */
size_t pi, db_pi;
size_t ci;
-   uint32_t sqn;
+   uint32_t qpn;
 };
 
 struct mlx5_regex_cq {
@@ -34,10 +34,10 @@ struct mlx5_regex_cq {
 struct mlx5_regex_qp {
uint32_t flags; /* QP user flags. */
uint32_t nb_desc; /* Total number of desc for this qp. */
-   struct mlx5_regex_sq *sqs; /* Pointer to sq array. */
-   uint16_t nb_obj; /* Number of sq objects. */
+   struct mlx5_regex_hw_qp *qps; /* Pointer to qp array. */
+   uint16_t nb_obj; /* Number of qp objects. */
struct mlx5_regex_cq cq; /* CQ struct. */
-   uint32_t free_sqs;
+   uint32_t free_qps;
struct mlx5_regex_job *jobs;
struct ibv_mr *metadata;
struct ibv_mr *outputs;
@@ -73,8 +73,10 @@ struct mlx5_regex_priv {
/**< Called by memory event callback. */
struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
uint8_t is_bf2; /* The device is BF2 device. */
-   uint8_t sq_ts_format; /* Whether SQ supports timestamp formats. */
+   uint8_t qp_ts_format; /* Whether SQ supports timestamp formats. */
uint8_t has_umr; /* The device supports UMR. */
+   uint32_t mmo_regex_qp_cap:1;
+   uint32_t mmo_regex_sq_cap:1;
 };
 
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
diff --git a/drivers/regex/mlx5/mlx5_regex_control.c 
b/drivers/regex/mlx5/mlx5_regex_control.c
index 8ce2dabb55..572ecc6d86 100644
--- a/drivers/regex/mlx5/mlx5_regex_control.c
+++ b/drivers/regex/mlx5/mlx5_regex_control.c
@@ -106,12 +106,12 @@ regex_ctrl_create_cq(struct mlx5_regex_priv *priv, struct 
mlx5_regex_cq *cq)
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 static int
-regex_ctrl_destroy_sq(struct mlx5_regex_qp *qp, uint16_t q_ind)
+regex_ctrl_destroy_hw_qp(struct mlx5_regex_qp *qp, uint16_t q_ind)
 {
-   struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
+   struct mlx5_regex_hw_qp *qp_obj = &qp->qps[q_ind];
 
-   mlx5_devx_sq_destroy(&sq->sq_obj);
-   memset(sq, 0, sizeof(*sq));
+   mlx5_devx_qp_destroy(&qp_obj->qp_obj);
+   memset(qp, 0, sizeof(*qp));
return 0;
 }
 
@@ -131,45 +131,44 @@ regex_ctrl_destroy_sq(struct mlx5_regex_qp *qp, uint16_t 
q_ind)
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 static int
-regex_ctrl_create_sq(struct mlx5_re

Re: [dpdk-dev] [PATCH v3] net/ice: refine flow priority support in PF

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: Zhang, Yuying 
> Sent: Wednesday, September 8, 2021 12:58 PM
> To: dev@dpdk.org; Zhang, Qi Z 
> Cc: Zhang, Yuying 
> Subject: [PATCH v3] net/ice: refine flow priority support in PF
> 
> The usage of priority is converse in pipeline mode and non-pipeline mode.
> Refine attribute priority support of flow filter in PF driver. When priority 
> is 0,
> rules are created in switch filter first and FDIR is used as backup. When 
> priority
> is 1, rules are all created in switch filter. Other filters don't support 
> priority 1.
> Value 0 denotes higher priority.
> 
> Signed-off-by: Yuying Zhang 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi




Re: [dpdk-dev] [PATCH v3 0/4] iavf base code update

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: dev  On Behalf Of Haiyue Wang
> Sent: Tuesday, September 7, 2021 3:33 PM
> To: dev@dpdk.org
> Cc: Wang, Haiyue 
> Subject: [dpdk-dev] [PATCH v3 0/4] iavf base code update
> 
> v3: adjust the commit title.
> v2: update the commit message.
> 
> Alvin Zhang (1):
>   common/iavf: enable hash calculation based on L4 checksum
> 
> Haiyue Wang (2):
>   common/iavf: remove the FDIR query opcode
>   common/iavf: update the driver version
> 
> Junfeng Guo (1):
>   common/iavf: add QFI fields for GTPU UL and DL
> 
>  drivers/common/iavf/README |  2 +-
>  drivers/common/iavf/virtchnl.h | 46 ++
>  2 files changed, 9 insertions(+), 39 deletions(-)
> 
> --
> 2.33.0

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi




Re: [dpdk-dev] [PATCH 5/5] examples/l3fwd-power: support virtio/vhost

2021-09-12 Thread Li, Miao
Got it. I will change the codes and add the port configuration updating 
according to the device information. Thanks!

Miao

> -Original Message-
> From: David Marchand 
> Sent: Friday, September 10, 2021 4:50 PM
> To: Li, Miao 
> Cc: Maxime Coquelin ; dev@dpdk.org; Xia,
> Chenbo 
> Subject: Re: [dpdk-dev] [PATCH 5/5] examples/l3fwd-power: support
> virtio/vhost
> 
> On Fri, Sep 10, 2021 at 10:34 AM Li, Miao  wrote:
> >
> > In l3fwd-power, there is default port configuration which requires RSS and
> IPV4/UDP/TCP checksum. Once device does not support these, the l3fwd-
> power will exit and report an error.
> 
> Maxime suggested to update the port configuration based on its capabilities.
> 
> For RSS, it would be something like what I proposed for OVS:
> https://patchwork.ozlabs.org/project/openvswitch/patch/20210830101304.1
> 3689-1-david.march...@redhat.com/
> 
> As for IPv4/UDP/TCP rx checksums, I am not sure there is any actual
> requirement for this app.
> Probably something to investigate wrt DO_RFC_1812_CHECKS.
> 
> 
> --
> David Marchand



Re: [dpdk-dev] [PATCH] net/i40e: fix mbuf leak

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: dev  On Behalf Of
> chenqiming_hua...@163.com
> Sent: Monday, August 23, 2021 9:51 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Qiming Chen
> ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/i40e: fix mbuf leak
> 
> From: Qiming Chen 
> 
> A local test found that repeated port start and stop operations during the
> continuous SSE vector bufflist receiving process will cause the mbuf resource
> to run out. The final positioning is when the port is stopped, the mbuf of the
> pkt_first_seg pointer is not released. Resources lead.
> The patch scheme is to judge whether the pointer is empty when the port is
> stopped, and release the corresponding mbuf if it is not empty.
> 
> Fixes: 5c9222058df7 ("i40e: move to drivers/net/")

Fixes: 4861cde46116 ("i40e: new poll mode driver")

> Cc: sta...@dpdk.org
> 
> Signed-off-by: Qiming Chen 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi




[dpdk-dev] [PATCH v4] net/ice/base: get PF ID of VF's parent

2021-09-12 Thread dapengx . yu
From: Dapeng Yu 

In original implementation, if DCF is created on PF1, the PF ID is
still 0, but not 1. Without the right PF ID, the ACL will not work.

This patch makes VF to get its parent's physical function ID.

Fixes: 0b02c9519432 ("net/ice: handle PF initialization by DCF")
CC: sta...@dpdk.org

Signed-off-by: Dapeng Yu 
Acked-by: Haiyue Wang 
---
V2:
* Simplify the code and commit message of V1
V3:
* Fix V2 code defect
V4:
* Change code block position in switch statement
---
 drivers/net/ice/base/ice_switch.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ice/base/ice_switch.c 
b/drivers/net/ice/base/ice_switch.c
index 9179f66c20..93cd79e8ef 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3471,6 +3471,10 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
ICE_AQC_GET_SW_CONF_RESP_TYPE_S);
 
switch (res_type) {
+   case ICE_AQC_GET_SW_CONF_RESP_VSI:
+   if (hw->dcf_enabled && !is_vf)
+   hw->pf_id = pf_vf_num;
+   break;
case ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT:
case ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT:
if (j == num_total_ports) {
-- 
2.27.0



Re: [dpdk-dev] [PATCH] net/i40e: fix dev startup resource release problem

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: dev  On Behalf Of
> chenqiming_hua...@163.com
> Sent: Saturday, August 21, 2021 5:45 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei ; Qiming Chen
> ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/i40e: fix dev startup resource release problem
> 
> From: Qiming Chen 
> 
> In the eth_i40e_dev_init function, the tunnel and ehtertype hash table
> resource release interface should be rte_hash_free instead of rte_free, and 
> the
> previously registered interrupt handling function also needs to be removed
> from the interrupt list. The patch is amended to use the correct interface to
> release the hash table resource and release the interrupt handling function at
> the same time.
> 
> Fixes: 425c3325f0b0 ("net/i40e: store tunnel filter")
> Fixes: 5c53c82c8174 ("net/i40e: store flow director filter")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Qiming Chen 

Acked-by: Qi Zhang 

Applied to dpdk-next-net-intel.

Thanks
Qi




Re: [dpdk-dev] [PATCH v4] net/ice/base: get PF ID of VF's parent

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: Yu, DapengX 
> Sent: Monday, September 13, 2021 10:40 AM
> To: Yang, Qiming ; Zhang, Qi Z
> 
> Cc: dev@dpdk.org; Wang, Haiyue ; Yu, DapengX
> ; sta...@dpdk.org
> Subject: [PATCH v4] net/ice/base: get PF ID of VF's parent
> 
> From: Dapeng Yu 
> 
> In original implementation, if DCF is created on PF1, the PF ID is still 0, 
> but not
> 1. Without the right PF ID, the ACL will not work.
> 
> This patch makes VF to get its parent's physical function ID.
> 
> Fixes: 0b02c9519432 ("net/ice: handle PF initialization by DCF")
> CC: sta...@dpdk.org
> 
> Signed-off-by: Dapeng Yu 
> Acked-by: Haiyue Wang 

Applied to dpdk-next-net-intel.

Thanks
Qi



[dpdk-dev] [PATCH] net/iavf: fix queue start failed

2021-09-12 Thread Qiming Chen
In the iavf_dev_start function, if the first execution of
iavf_start_queues fails, it will still fail when it is started again.
The patch solves the problem of rolling back resources after the queue
fails to start, and then restarts successfully.

Fixes: 69dd4c3d0898 ("net/avf: enable queue and device")
Cc: sta...@dpdk.org

Signed-off-by: Qiming Chen 
---
 drivers/net/iavf/iavf_ethdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index 6ed2dbbcbe..9eca4b70ee 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -897,6 +897,7 @@ iavf_dev_start(struct rte_eth_dev *dev)
 
 err_mac:
iavf_add_del_all_mac_addr(adapter, false);
+   iavf_stop_queues(dev);
 err_queue:
return -1;
 }
-- 
2.30.1.windows.1



[dpdk-dev] DPDK Max Mbuf Allocation

2021-09-12 Thread Kamaraj P
Hello All,

Would like to understand or if there are any guidelines to allocate the max
no of mbuf per NIC ?
For example, if i have defined as below:
#define RX_RING_SIZE 1024
#define TX_RING_SIZE 1024

The Maximum RX/TX queues can be defined as 8 per NIC, What would be the max
no of mbuf can be allocated per NIC ?
Please share if there is any guildliness or any limitation to increase the
mbuf ?

Thanks,
Kamaraj


Re: [dpdk-dev] [PATCH] Enable AddressSanitizer feature on DPDK

2021-09-12 Thread Peng, ZhihongX



> -Original Message-
> From: Stephen Hemminger 
> Sent: Friday, September 10, 2021 10:48 AM
> To: Peng, ZhihongX 
> Cc: Burakov, Anatoly ; Ananyev, Konstantin
> ; dev@dpdk.org; Lin, Xueqin
> 
> Subject: Re: [PATCH] Enable AddressSanitizer feature on DPDK
> 
> On Fri, 10 Sep 2021 02:01:47 +
> zhihongx.p...@intel.com wrote:
> 
> >
> > +if get_option('b_sanitize').startswith('address')
> > +   cflags += '-DRTE_MALLOC_ASAN'
> > +endif
> > +
> 
> This looks great, but can we make it just do-the-right-thing and get rid of 
> the
> nerd knobs (i.e no meson configure).
> 
> The address sanitizer already has a way to detect if enabled.
> 
> GCC uses:
> __SANITIZE_ADDRESS__
> 
> Clang uses:
> #if defined(__has_feature)
> #  if __has_feature(address_sanitizer)

Tried this method you said. It can run successfully. Because gcc and clang have 
different
Methods for determining whether to turn on the asan function, so if you judge 
the two
methods in the code, it feels not simple to judge in meson.


Re: [dpdk-dev] [PATCH] Enable AddressSanitizer feature on DPDK

2021-09-12 Thread Peng, ZhihongX


> -Original Message-
> From: David Christensen 
> Sent: Saturday, September 11, 2021 1:59 AM
> To: Peng, ZhihongX ; Burakov, Anatoly
> ; Ananyev, Konstantin
> ; step...@networkplumber.org
> Cc: dev@dpdk.org; Lin, Xueqin 
> Subject: Re: [dpdk-dev] [PATCH] Enable AddressSanitizer feature on DPDK
> 
> > From: Zhihong Peng 
> >
> > AddressSanitizer (ASan) is a google memory error detect standard tool.
> > It could help to detect use-after-free and {heap,stack,global}-buffer
> > overflow bugs in C/C++ programs, print detailed error information when
> > error happens, large improve debug efficiency.
> >
> > By referring to its implementation algorithm
> > (https://github.com/google/sanitizers/wiki/AddressSanitizerAlgorithm),
> > enable heap-buffer-overflow and use-after-free functions on dpdk.
> >
> > Here is an example of heap-buffer-overflow bug:
> > ..
> >  char *p = rte_zmalloc(NULL, 7, 0);
> >  p[7] = 'a';
> > ..
> >
> > Here is an example of use-after-free bug:
> > ..
> >  char *p = rte_zmalloc(NULL, 7, 0);
> >  rte_free(p);
> >  *p = 'a';
> > ..
> >
> > If you want to use this feature,
> > you need to add below compilation options when compiling code:
> > -Dbuildtype=debug -Db_lundef=false -Db_sanitize=address
> > "-Dbuildtype=debug": Display code information when coredump occurs in
> > the program.
> > "-Db_lundef=false": It is enabled by default, and needs to be disabled
> > when using asan.
> 
> On initial inspection, it appears ASAN functionality doesn't work with DPDK
> on PPC architecture.  I tested the patch with several compiler versions (gcc
> 8.3.1 from RHEL 8.3 through gcc 11.2.1 from the IBM Advanced Toolchain 15.0)
> and observed the following error when running testpmd with ASAN enabled:
> 
> AddressSanitizer:DEADLYSIGNAL
> ==
> ===
> ==49246==ERROR: AddressSanitizer: SEGV on unknown address
> 0xa0077bd0 (pc 0x10b4eca4 bp 0x7fffe150 sp 0x7fffe150 T0)
> ==49246==The signal is caused by a UNKNOWN memory access.
>  #0 0x10b4eca4 in asan_set_shadow ../lib/eal/common/malloc_elem.h:120
>  #1 0x10b4ed68 in asan_set_zone ../lib/eal/common/malloc_elem.h:135
>  #2 0x10b4ee90 in asan_clear_split_alloczone
> ../lib/eal/common/malloc_elem.h:162
>  #3 0x10b51f84 in malloc_elem_alloc ../lib/eal/common/malloc_elem.c:477
> ...
> 
> Can you incorporate an exception for PPC architecture with this patch while I
> look into the problem further?
> 
> Dave

We do not have a ppc platform, so there is no adaptation. 
doc/guides/prog_guide/asan.rst
has stated that we currently only support Linux x86_64. You can adapt according 
to the
following documents, the main work is to modify the base address according to 
the platform.
Documents:
https://github.com/google/sanitizers/wiki/AddressSanitizer
https://github.com/llvm/llvm-project/tree/main/compiler-rt


Re: [dpdk-dev] [PATCH v3] net/ice: fix representor port segmentation fault

2021-09-12 Thread Wang, Haiyue
> -Original Message-
> From: Yu, DapengX 
> Sent: Tuesday, September 7, 2021 10:01
> To: Yang, Qiming ; Zhang, Qi Z 
> Cc: dev@dpdk.org; Wang, Haiyue ; Yu, DapengX 
> ;
> sta...@dpdk.org
> Subject: [PATCH v3] net/ice: fix representor port segmentation fault
> 
> From: Dapeng Yu 
> 
> If DCF representor port is closed after DCF port is closed, there will
> be segmentation fault because representor accesses the released resource
> of DCF port.
> 
> This patch checks if the resource is present before accessing.
> 
> Fixes: 5674465a32c8 ("net/ice: add DCF VLAN handling")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Dapeng Yu 
> ---
> V2:
>  * Remove (void) to make code clean.
> V3:
>  * Only check resource accessibility but not release it.
> ---
>  drivers/net/ice/ice_dcf_vf_representor.c | 8 
>  1 file changed, 8 insertions(+)
> 

Acked-by: Haiyue Wang 

> --
> 2.27.0



Re: [dpdk-dev] [PATCH v3] net/ice: fix representor port segmentation fault

2021-09-12 Thread Zhang, Qi Z



> -Original Message-
> From: Wang, Haiyue 
> Sent: Monday, September 13, 2021 1:47 PM
> To: Yu, DapengX ; Yang, Qiming
> ; Zhang, Qi Z 
> Cc: dev@dpdk.org; sta...@dpdk.org
> Subject: RE: [PATCH v3] net/ice: fix representor port segmentation fault
> 
> > -Original Message-
> > From: Yu, DapengX 
> > Sent: Tuesday, September 7, 2021 10:01
> > To: Yang, Qiming ; Zhang, Qi Z
> > 
> > Cc: dev@dpdk.org; Wang, Haiyue ; Yu, DapengX
> > ; sta...@dpdk.org
> > Subject: [PATCH v3] net/ice: fix representor port segmentation fault
> >
> > From: Dapeng Yu 
> >
> > If DCF representor port is closed after DCF port is closed, there will
> > be segmentation fault because representor accesses the released
> > resource of DCF port.
> >
> > This patch checks if the resource is present before accessing.
> >
> > Fixes: 5674465a32c8 ("net/ice: add DCF VLAN handling")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Dapeng Yu 
> > ---
> > V2:
> >  * Remove (void) to make code clean.
> > V3:
> >  * Only check resource accessibility but not release it.
> > ---
> >  drivers/net/ice/ice_dcf_vf_representor.c | 8 
> >  1 file changed, 8 insertions(+)
> >
> 
> Acked-by: Haiyue Wang 

Applied to dpdk-next-net-intel.

Thanks
Qi

> 
> > --
> > 2.27.0
> 



Re: [dpdk-dev] [EXT] Re: [PATCH] RFC: ethdev: add reassembly offload

2021-09-12 Thread Xu, Rosen
Hi,

> -Original Message-
> From: Anoob Joseph 
> Sent: Wednesday, September 08, 2021 18:30
> To: Yigit, Ferruh ; Xu, Rosen ;
> Andrew Rybchenko 
> Cc: Nicolau, Radu ; Doherty, Declan
> ; hemant.agra...@nxp.com;
> ma...@nvidia.com; Ananyev, Konstantin ;
> tho...@monjalon.net; Ankur Dwivedi ;
> andrew.rybche...@oktetlabs.ru; Akhil Goyal ;
> dev@dpdk.org
> Subject: RE: [EXT] Re: [PATCH] RFC: ethdev: add reassembly offload
> 
> Hi Ferruh, Rosen, Andrew,
> 
> Please see inline.
> 
> Thanks,
> Anoob
> 
> > Subject: [EXT] Re: [PATCH] RFC: ethdev: add reassembly offload
> >
> > External Email
> >
> > --
> > On 8/23/2021 11:02 AM, Akhil Goyal wrote:
> > > Reassembly is a costly operation if it is done in software, however,
> > > if it is offloaded to HW, it can considerably save application cycles.
> > > The operation becomes even more costlier if IP fragmants are
> > > encrypted.
> > >
> > > To resolve above two issues, a new offload
> > DEV_RX_OFFLOAD_REASSEMBLY
> > > is introduced in ethdev for devices which can attempt reassembly of
> > > packets in hardware.
> > > rte_eth_dev_info is added with the reassembly capabilities which a
> > > device can support.
> > > Now, if IP fragments are encrypted, reassembly can also be attempted
> > > while doing inline IPsec processing.
> > > This is controlled by a flag in rte_security_ipsec_sa_options to
> > > enable reassembly of encrypted IP fragments in the inline path.
> > >
> > > The resulting reassembled packet would be a typical segmented mbuf
> > > in case of success.
> > >
> > > And if reassembly of fragments is failed or is incomplete (if
> > > fragments do not come before the reass_timeout), the mbuf is updated
> > > with an ol_flag PKT_RX_REASSEMBLY_INCOMPLETE and mbuf is returned
> > as
> > > is. Now application may decide the fate of the packet to wait more
> > > for fragments to come or drop.
> > >
> > > Signed-off-by: Akhil Goyal 
> > > ---
> > >  lib/ethdev/rte_ethdev.c |  1 +
> > >  lib/ethdev/rte_ethdev.h | 18 +-
> > >  lib/mbuf/rte_mbuf_core.h|  3 ++-
> > >  lib/security/rte_security.h | 10 ++
> > >  4 files changed, 30 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index
> > > 9d95cd11e1..1ab3a093cf 100644
> > > --- a/lib/ethdev/rte_ethdev.c
> > > +++ b/lib/ethdev/rte_ethdev.c
> > > @@ -119,6 +119,7 @@ static const struct {
> > >   RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
> > >   RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
> > >   RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
> > > + RTE_RX_OFFLOAD_BIT2STR(REASSEMBLY),
> > >   RTE_RX_OFFLOAD_BIT2STR(SCATTER),
> > >   RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
> > >   RTE_RX_OFFLOAD_BIT2STR(SECURITY),
> > > diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index
> > > d2b27c351f..e89a4dc1eb 100644
> > > --- a/lib/ethdev/rte_ethdev.h
> > > +++ b/lib/ethdev/rte_ethdev.h
> > > @@ -1360,6 +1360,7 @@ struct rte_eth_conf {
> > >  #define DEV_RX_OFFLOAD_VLAN_FILTER   0x0200
> > >  #define DEV_RX_OFFLOAD_VLAN_EXTEND   0x0400
> > >  #define DEV_RX_OFFLOAD_JUMBO_FRAME   0x0800
> > > +#define DEV_RX_OFFLOAD_REASSEMBLY0x1000
> >
> > previous '0x1000' was 'DEV_RX_OFFLOAD_CRC_STRIP', it has been
> long
> > that offload has been removed, but not sure if it cause any problem to
> > re- use it.
> >
> > >  #define DEV_RX_OFFLOAD_SCATTER   0x2000
> > >  /**
> > >   * Timestamp is set by the driver in
> > RTE_MBUF_DYNFIELD_TIMESTAMP_NAME
> > > @@ -1477,6 +1478,20 @@ struct rte_eth_dev_portconf {
> > >   */
> > >  #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID
> > (UINT16_MAX)
> > >
> > > +/**
> > > + * Reassembly capabilities that a device can support.
> > > + * The device which can support reassembly offload should set
> > > + * DEV_RX_OFFLOAD_REASSEMBLY
> > > + */
> > > +struct rte_eth_reass_capa {
> > > + /** Maximum time in ns that a fragment can wait for further
> > fragments */
> > > + uint64_t reass_timeout;
> > > + /** Maximum number of fragments that device can reassemble */
> > > + uint16_t max_frags;
> > > + /** Reserved for future capabilities */
> > > + uint16_t reserved[3];
> > > +};
> > > +
> >
> > I wonder if there is any other hardware around supports reassembly
> > offload, it would be good to get more feedback on the capabilities list.
> >
> > >  /**
> > >   * Ethernet device associated switch information
> > >   */
> > > @@ -1582,8 +1597,9 @@ struct rte_eth_dev_info {
> > >* embedded managed interconnect/switch.
> > >*/
> > >   struct rte_eth_switch_info switch_info;
> > > + /* Reassembly capabilities of a device for reassembly offload */
> > > + struct rte_eth_reass_capa reass_capa;
> > >
> > > - uint64_t reserved_64s[2]; /**< Reserved for future fields */
> >
> > Reserved fields were added to be able to update the struct without
> > breaking the ABI, so that a critical change doesn't have