[dpdk-dev] [RFC 00/16] crypto: add raw vector support in DPAAx
This patch series adds support for raw vector API in dpaax_sec drivers This also enhances the raw vector APIs to support OOP and security protocol support. Gagandeep Singh (12): crypto: add total raw buffer length crypto: enhance raw process for protocol offload crypto/dpaa2_sec: support raw datapath APIs crypto/dpaa2_sec: support AUTH only with raw buffer APIs crypto/dpaa2_sec: support AUTHENC with raw buffer APIs crypto/dpaa2_sec: support AEAD with raw buffer APIs crypto/dpaa2_sec: support OOP with raw buffer API crypto/dpaa2_sec: fix ctx memset size crypto/dpaa2_sec: enhance error checks with raw buffer APIs crypto/dpaa_sec: support raw datapath APIs crypto/dpaa_sec: support authonly and chain with raw APIs crypto/dpaa_sec: support AEAD and proto with raw APIs Hemant Agrawal (4): crypto: change sgl to src_sgl in vector crypto: add dest_sgl in raw vector APIs test/crypto: add raw API test for dpaax test/crypto: enabling raw API support in 5G algos app/test/test_cryptodev.c | 179 +++- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 13 +- drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 82 +- drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 1045 ++ drivers/crypto/dpaa2_sec/meson.build|3 +- drivers/crypto/dpaa_sec/dpaa_sec.c | 23 +- drivers/crypto/dpaa_sec/dpaa_sec.h | 40 +- drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 1052 +++ drivers/crypto/dpaa_sec/meson.build |4 +- drivers/crypto/qat/qat_sym_hw_dp.c | 27 +- lib/cryptodev/rte_crypto_sym.h | 13 +- lib/ipsec/misc.h|4 +- 12 files changed, 2390 insertions(+), 95 deletions(-) create mode 100644 drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c -- 2.17.1
[dpdk-dev] [RFC 01/16] crypto: change sgl to src_sgl in vector
This patch renames the sgl to src_sgl to help differentiating between source and destination sgl. Signed-off-by: Hemant Agrawal --- app/test/test_cryptodev.c | 6 +++--- drivers/crypto/qat/qat_sym_hw_dp.c | 27 --- lib/cryptodev/rte_crypto_sym.h | 2 +- lib/ipsec/misc.h | 4 ++-- 4 files changed, 22 insertions(+), 17 deletions(-) diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index 9ad0b37473..aecd507fa1 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -221,7 +221,7 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id, digest.va = NULL; sgl.vec = data_vec; vec.num = 1; - vec.sgl = &sgl; + vec.src_sgl = &sgl; vec.iv = &cipher_iv; vec.digest = &digest; vec.aad = &aad_auth_iv; @@ -385,7 +385,7 @@ process_cpu_aead_op(uint8_t dev_id, struct rte_crypto_op *op) sgl.vec = vec; sgl.num = n; - symvec.sgl = &sgl; + symvec.src_sgl = &sgl; symvec.iv = &iv_ptr; symvec.digest = &digest_ptr; symvec.aad = &aad_ptr; @@ -431,7 +431,7 @@ process_cpu_crypt_auth_op(uint8_t dev_id, struct rte_crypto_op *op) sgl.vec = vec; sgl.num = n; - symvec.sgl = &sgl; + symvec.src_sgl = &sgl; symvec.iv = &iv_ptr; symvec.digest = &digest_ptr; symvec.status = &st; diff --git a/drivers/crypto/qat/qat_sym_hw_dp.c b/drivers/crypto/qat/qat_sym_hw_dp.c index ac9ac05363..4870ebf66a 100644 --- a/drivers/crypto/qat/qat_sym_hw_dp.c +++ b/drivers/crypto/qat/qat_sym_hw_dp.c @@ -181,8 +181,9 @@ qat_sym_dp_enqueue_cipher_jobs(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec, - vec->sgl[i].num); + data_len = qat_sym_dp_parse_data_vec(qp, req, + vec->src_sgl[i].vec, + vec->src_sgl[i].num); if (unlikely(data_len < 0)) break; req->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i]; @@ -302,8 +303,9 @@ qat_sym_dp_enqueue_auth_jobs(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec, - vec->sgl[i].num); + data_len = qat_sym_dp_parse_data_vec(qp, req, + vec->src_sgl[i].vec, + vec->src_sgl[i].num); if (unlikely(data_len < 0)) break; req->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i]; @@ -484,14 +486,16 @@ qat_sym_dp_enqueue_chain_jobs(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec, - vec->sgl[i].num); + data_len = qat_sym_dp_parse_data_vec(qp, req, + vec->src_sgl[i].vec, + vec->src_sgl[i].num); if (unlikely(data_len < 0)) break; req->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i]; - if (unlikely(enqueue_one_chain_job(ctx, req, vec->sgl[i].vec, - vec->sgl[i].num, &vec->iv[i], &vec->digest[i], - &vec->auth_iv[i], ofs, (uint32_t)data_len))) + if (unlikely(enqueue_one_chain_job(ctx, req, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + &vec->iv[i], &vec->digest[i], + &vec->auth_iv[i], ofs, (uint32_t)data_len))) break; tail = (tail + tx_queue->msg_size) & tx_queue->modulo_mask; @@ -688,8 +692,9 @@ qat_sym_dp_enqueue_aead_jobs(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec, - vec->sgl[i].num); + data_len = qat_sym_dp_parse_data_vec(qp, req, + vec->src_sgl[i].vec, + vec->src_sgl[i].num); if (unlikely(data_len < 0)) break; req->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i]; diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h index 58c0724743..dcc0bd5933 100644 --- a/lib/cryptodev/rte_crypto_sym.h +++ b/lib/cryp
[dpdk-dev] [RFC 02/16] crypto: add total raw buffer length
From: Gagandeep Singh
The current crypto raw data vectors is extended to support
rte_security usecases, where we need total data length to know
how much additional memory space is available in buffer other
than data length so that driver/HW can write expanded size
data after encryption.
Signed-off-by: Gagandeep Singh
---
lib/cryptodev/rte_crypto_sym.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
index dcc0bd5933..e5cef1fb72 100644
--- a/lib/cryptodev/rte_crypto_sym.h
+++ b/lib/cryptodev/rte_crypto_sym.h
@@ -37,6 +37,8 @@ struct rte_crypto_vec {
rte_iova_t iova;
/** length of the data buffer */
uint32_t len;
+ /** total buffer length*/
+ uint32_t tot_len;
};
/**
@@ -980,12 +982,14 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf *mb,
uint32_t ofs, uint32_t len,
seglen = mb->data_len - ofs;
if (len <= seglen) {
vec[0].len = len;
+ vec[0].tot_len = mb->buf_len;
return 1;
}
/* data spread across segments */
vec[0].len = seglen;
left = len - seglen;
+ vec[0].tot_len = mb->buf_len;
for (i = 1, nseg = mb->next; nseg != NULL; nseg = nseg->next, i++) {
vec[i].base = rte_pktmbuf_mtod(nseg, void *);
@@ -995,6 +999,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf *mb, uint32_t
ofs, uint32_t len,
if (left <= seglen) {
/* whole requested data is completed */
vec[i].len = left;
+ vec[i].tot_len = mb->buf_len;
left = 0;
break;
}
@@ -1002,6 +1007,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf *mb,
uint32_t ofs, uint32_t len,
/* use whole segment */
vec[i].len = seglen;
left -= seglen;
+ vec[i].tot_len = mb->buf_len;
}
RTE_ASSERT(left == 0);
--
2.17.1
[dpdk-dev] [RFC 03/16] crypto: add dest_sgl in raw vector APIs
The structure rte_crypto_sym_vec is updated to
add dest_sgl to support out of place processing.
Signed-off-by: Hemant Agrawal
---
lib/cryptodev/rte_crypto_sym.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
index e5cef1fb72..978708845f 100644
--- a/lib/cryptodev/rte_crypto_sym.h
+++ b/lib/cryptodev/rte_crypto_sym.h
@@ -72,6 +72,8 @@ struct rte_crypto_sym_vec {
uint32_t num;
/** array of SGL vectors */
struct rte_crypto_sgl *src_sgl;
+ /** array of SGL vectors for OOP, keep it NULL for inplace*/
+ struct rte_crypto_sgl *dest_sgl;
/** array of pointers to cipher IV */
struct rte_crypto_va_iova_ptr *iv;
/** array of pointers to digest */
--
2.17.1
[dpdk-dev] [RFC 04/16] crypto: enhance raw process for protocol offload
From: Gagandeep Singh This patch improves the raw vector processing for security protocol with OOP processing. Signed-off-by: Gagandeep Singh --- lib/cryptodev/rte_crypto_sym.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h index 978708845f..a48228a646 100644 --- a/lib/cryptodev/rte_crypto_sym.h +++ b/lib/cryptodev/rte_crypto_sym.h @@ -1003,6 +1003,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf *mb, uint32_t ofs, uint32_t len, vec[i].len = left; vec[i].tot_len = mb->buf_len; left = 0; + i++; break; } @@ -1013,7 +1014,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf *mb, uint32_t ofs, uint32_t len, } RTE_ASSERT(left == 0); - return i + 1; + return i; } -- 2.17.1
[dpdk-dev] [RFC 05/16] crypto/dpaa2_sec: support raw datapath APIs
From: Gagandeep Singh
This path add framework for raw API support.
The initial patch only test cipher only part.
Signed-off-by: Hemant Agrawal
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 13 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 60 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 596
drivers/crypto/dpaa2_sec/meson.build| 3 +-
4 files changed, 643 insertions(+), 29 deletions(-)
create mode 100644 drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 1ccead3641..fe90d9d2d8 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -49,15 +49,8 @@
#define FSL_MC_DPSECI_DEVID 3
#define NO_PREFETCH 0
-/* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
-#define FLE_POOL_NUM_BUFS 32000
-#define FLE_POOL_BUF_SIZE 256
-#define FLE_POOL_CACHE_SIZE512
-#define FLE_SG_MEM_SIZE(num) (FLE_POOL_BUF_SIZE + ((num) * 32))
-#define SEC_FLC_DHR_OUTBOUND -114
-#define SEC_FLC_DHR_INBOUND0
-static uint8_t cryptodev_driver_id;
+uint8_t cryptodev_driver_id;
#ifdef RTE_LIB_SECURITY
static inline int
@@ -3805,6 +3798,9 @@ static struct rte_cryptodev_ops crypto_ops = {
.sym_session_get_size = dpaa2_sec_sym_session_get_size,
.sym_session_configure= dpaa2_sec_sym_session_configure,
.sym_session_clear= dpaa2_sec_sym_session_clear,
+ /* Raw data-path API related operations */
+ .sym_get_raw_dp_ctx_size = dpaa2_sec_get_dp_ctx_size,
+ .sym_configure_raw_dp_ctx = dpaa2_sec_configure_raw_dp_ctx,
};
#ifdef RTE_LIB_SECURITY
@@ -3887,6 +3883,7 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
RTE_CRYPTODEV_FF_HW_ACCELERATED |
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_SECURITY |
+ RTE_CRYPTODEV_FF_SYM_RAW_DP |
RTE_CRYPTODEV_FF_IN_PLACE_SGL |
RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 7dbc69f6cb..860c9b6520 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -15,6 +15,16 @@
#define CRYPTODEV_NAME_DPAA2_SEC_PMD crypto_dpaa2_sec
/**< NXP DPAA2 - SEC PMD device name */
+extern uint8_t cryptodev_driver_id;
+
+/* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
+#define FLE_POOL_NUM_BUFS 32000
+#define FLE_POOL_BUF_SIZE 256
+#define FLE_POOL_CACHE_SIZE512
+#define FLE_SG_MEM_SIZE(num) (FLE_POOL_BUF_SIZE + ((num) * 32))
+#define SEC_FLC_DHR_OUTBOUND -114
+#define SEC_FLC_DHR_INBOUND0
+
#define MAX_QUEUES 64
#define MAX_DESC_SIZE 64
/** private data structure for each DPAA2_SEC device */
@@ -158,6 +168,24 @@ struct dpaa2_pdcp_ctxt {
uint32_t hfn_threshold; /*!< HFN Threashold for key renegotiation */
};
#endif
+
+typedef int (*dpaa2_sec_build_fd_t)(
+ void *qp, uint8_t *drv_ctx, struct rte_crypto_vec *data_vec,
+ uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs,
+ struct rte_crypto_va_iova_ptr *iv,
+ struct rte_crypto_va_iova_ptr *digest,
+ struct rte_crypto_va_iova_ptr *aad_or_auth_iv,
+ void *user_data);
+
+typedef int (*dpaa2_sec_build_raw_dp_fd_t)(uint8_t *drv_ctx,
+ struct rte_crypto_sgl *sgl,
+ struct rte_crypto_va_iova_ptr *iv,
+ struct rte_crypto_va_iova_ptr *digest,
+ struct rte_crypto_va_iova_ptr *auth_iv,
+ union rte_crypto_sym_ofs ofs,
+ void *userdata,
+ struct qbman_fd *fd);
+
typedef struct dpaa2_sec_session_entry {
void *ctxt;
uint8_t ctxt_type;
@@ -165,6 +193,8 @@ typedef struct dpaa2_sec_session_entry {
enum rte_crypto_cipher_algorithm cipher_alg; /*!< Cipher Algorithm*/
enum rte_crypto_auth_algorithm auth_alg; /*!< Authentication Algorithm*/
enum rte_crypto_aead_algorithm aead_alg; /*!< AEAD Algorithm*/
+ dpaa2_sec_build_fd_t build_fd;
+ dpaa2_sec_build_raw_dp_fd_t build_raw_dp_fd;
union {
struct {
uint8_t *data; /**< pointer to key data */
@@ -547,26 +577,6 @@ static const struct rte_cryptodev_capabilities
dpaa2_sec_capabilities[] = {
}, }
}, }
},
- { /* NULL (CIPHER) */
- .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- {.sym = {
- .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
- {.cipher = {
- .algo = RTE_CR
[dpdk-dev] [RFC 06/16] crypto/dpaa2_sec: support AUTH only with raw buffer APIs
From: Gagandeep Singh
Auth only with raw buffer APIs has been supported in this patch.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 21
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 114 ++--
2 files changed, 108 insertions(+), 27 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 860c9b6520..f6507855e3 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -231,27 +231,6 @@ typedef struct dpaa2_sec_session_entry {
static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
/* Symmetric capabilities */
- { /* NULL (AUTH) */
- .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- {.sym = {
- .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
- {.auth = {
- .algo = RTE_CRYPTO_AUTH_NULL,
- .block_size = 1,
- .key_size = {
- .min = 0,
- .max = 0,
- .increment = 0
- },
- .digest_size = {
- .min = 0,
- .max = 0,
- .increment = 0
- },
- .iv_size = { 0 }
- }, },
- }, },
- },
{ /* MD5 */
.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
{.sym = {
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 10cb4247b0..4c11a79d90 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -11,6 +11,8 @@
#include "dpaa2_sec_priv.h"
#include "dpaa2_sec_logs.h"
+#include
+
struct dpaa2_sec_raw_dp_ctx {
dpaa2_sec_session *session;
uint32_t tail;
@@ -73,14 +75,114 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx,
void *userdata,
struct qbman_fd *fd)
{
- RTE_SET_USED(drv_ctx);
- RTE_SET_USED(sgl);
RTE_SET_USED(iv);
- RTE_SET_USED(digest);
RTE_SET_USED(auth_iv);
- RTE_SET_USED(ofs);
- RTE_SET_USED(userdata);
- RTE_SET_USED(fd);
+
+ dpaa2_sec_session *sess =
+ ((struct dpaa2_sec_raw_dp_ctx *)drv_ctx)->session;
+ struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
+ struct sec_flow_context *flc;
+ int total_len = 0, data_len = 0, data_offset;
+ uint8_t *old_digest;
+ struct ctxt_priv *priv = sess->ctxt;
+ unsigned int i;
+
+ for (i = 0; i < sgl->num; i++)
+ total_len += sgl->vec[i].len;
+
+ data_len = total_len - ofs.ofs.auth.head - ofs.ofs.auth.tail;
+ data_offset = ofs.ofs.auth.head;
+
+ if (sess->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
+ sess->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
+ if ((data_len & 7) || (data_offset & 7)) {
+ DPAA2_SEC_ERR("AUTH: len/offset must be full bytes");
+ return -ENOTSUP;
+ }
+
+ data_len = data_len >> 3;
+ data_offset = data_offset >> 3;
+ }
+ fle = (struct qbman_fle *)rte_malloc(NULL,
+ FLE_SG_MEM_SIZE(2 * sgl->num),
+ RTE_CACHE_LINE_SIZE);
+ if (unlikely(!fle)) {
+ DPAA2_SEC_ERR("AUTH SG: Memory alloc failed for SGE");
+ return -ENOMEM;
+ }
+ memset(fle, 0, FLE_SG_MEM_SIZE(2*sgl->num));
+ /* first FLE entry used to store mbuf and session ctxt */
+ DPAA2_SET_FLE_ADDR(fle, (size_t)userdata);
+ DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
+ op_fle = fle + 1;
+ ip_fle = fle + 2;
+ sge = fle + 3;
+
+ flc = &priv->flc_desc[DESC_INITFINAL].flc;
+
+ /* sg FD */
+ DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
+ DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
+ DPAA2_SET_FD_COMPOUND_FMT(fd);
+
+ /* o/p fle */
+ DPAA2_SET_FLE_ADDR(op_fle,
+ DPAA2_VADDR_TO_IOVA(digest->va));
+ op_fle->length = sess->digest_length;
+
+ /* i/p fle */
+ DPAA2_SET_FLE_SG_EXT(ip_fle);
+ DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
+ ip_fle->length = data_len;
+
+ if (sess->iv.length) {
+ uint8_t *iv_ptr;
+
+ iv_ptr = rte_crypto_op_ctod_offset(userdata, uint8_t *,
+ sess->iv.offset);
+
+ if (sess->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2) {
+ iv_ptr = conv_to_snow_f9_iv(iv_ptr);
+ sg
[dpdk-dev] [RFC 07/16] crypto/dpaa2_sec: support AUTHENC with raw buffer APIs
From: Gagandeep Singh
This patch supports AUTHENC with raw buufer APIs
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 128 ++--
1 file changed, 121 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 4c11a79d90..79ba0ecb81 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -31,14 +31,128 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,
void *userdata,
struct qbman_fd *fd)
{
- RTE_SET_USED(drv_ctx);
- RTE_SET_USED(sgl);
- RTE_SET_USED(iv);
- RTE_SET_USED(digest);
RTE_SET_USED(auth_iv);
- RTE_SET_USED(ofs);
- RTE_SET_USED(userdata);
- RTE_SET_USED(fd);
+
+ dpaa2_sec_session *sess =
+ ((struct dpaa2_sec_raw_dp_ctx *)drv_ctx)->session;
+ struct ctxt_priv *priv = sess->ctxt;
+ struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
+ struct sec_flow_context *flc;
+ int data_len = 0, auth_len = 0, cipher_len = 0;
+ unsigned int i = 0;
+ uint16_t auth_hdr_len = ofs.ofs.cipher.head -
+ ofs.ofs.auth.head;
+
+ uint16_t auth_tail_len = ofs.ofs.auth.tail;
+ uint32_t auth_only_len = (auth_tail_len << 16) | auth_hdr_len;
+ int icv_len = sess->digest_length;
+ uint8_t *old_icv;
+ uint8_t *iv_ptr = iv->va;
+
+ for (i = 0; i < sgl->num; i++)
+ data_len += sgl->vec[i].len;
+
+ cipher_len = data_len - ofs.ofs.cipher.head - ofs.ofs.cipher.tail;
+ auth_len = data_len - ofs.ofs.auth.head - ofs.ofs.auth.tail;
+ /* first FLE entry used to store session ctxt */
+ fle = (struct qbman_fle *)rte_malloc(NULL,
+ FLE_SG_MEM_SIZE(2 * sgl->num),
+ RTE_CACHE_LINE_SIZE);
+ if (unlikely(!fle)) {
+ DPAA2_SEC_ERR("AUTHENC SG: Memory alloc failed for SGE");
+ return -ENOMEM;
+ }
+ memset(fle, 0, FLE_SG_MEM_SIZE(2 * sgl->num));
+ DPAA2_SET_FLE_ADDR(fle, (size_t)userdata);
+ DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
+
+ op_fle = fle + 1;
+ ip_fle = fle + 2;
+ sge = fle + 3;
+
+ /* Save the shared descriptor */
+ flc = &priv->flc_desc[0].flc;
+
+ /* Configure FD as a FRAME LIST */
+ DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
+ DPAA2_SET_FD_COMPOUND_FMT(fd);
+ DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
+
+ /* Configure Output FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_SG_EXT(op_fle);
+ DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
+
+ if (auth_only_len)
+ DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
+
+ op_fle->length = (sess->dir == DIR_ENC) ?
+ (cipher_len + icv_len) :
+ cipher_len;
+
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);
+ sge->length = sgl->vec[0].len - ofs.ofs.auth.head;
+
+ /* o/p segs */
+ for (i = 1; i < sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = sgl->vec[i].len;
+ }
+
+ if (sess->dir == DIR_ENC) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge,
+ digest->iova);
+ sge->length = icv_len;
+ }
+ DPAA2_SET_FLE_FIN(sge);
+
+ sge++;
+
+ /* Configure Input FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
+ DPAA2_SET_FLE_SG_EXT(ip_fle);
+ DPAA2_SET_FLE_FIN(ip_fle);
+
+ ip_fle->length = (sess->dir == DIR_ENC) ?
+ (auth_len + sess->iv.length) :
+ (auth_len + sess->iv.length +
+ icv_len);
+
+ /* Configure Input SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
+ sge->length = sess->iv.length;
+
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);
+ sge->length = sgl->vec[0].len - ofs.ofs.auth.head;
+
+ for (i = 1; i < sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = sgl->vec[i].len;
+ }
+
+ if (sess->dir == DIR_DEC) {
+ sge++;
+ old_icv = (uint8_t *)(sge + 1);
+ memcpy(old_icv, digest->va,
+ icv_len);
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
+ sge->length = icv_len;
+ }
+
+ DPAA2_SET_FLE_FI
[dpdk-dev] [RFC 08/16] crypto/dpaa2_sec: support AEAD with raw buffer APIs
From: Gagandeep Singh
add raw vector API support for AEAD algos.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 249 +---
1 file changed, 214 insertions(+), 35 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 79ba0ecb81..41f24c93b6 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -167,14 +167,126 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx,
void *userdata,
struct qbman_fd *fd)
{
- RTE_SET_USED(drv_ctx);
- RTE_SET_USED(sgl);
- RTE_SET_USED(iv);
- RTE_SET_USED(digest);
- RTE_SET_USED(auth_iv);
- RTE_SET_USED(ofs);
- RTE_SET_USED(userdata);
- RTE_SET_USED(fd);
+ dpaa2_sec_session *sess =
+ ((struct dpaa2_sec_raw_dp_ctx *)drv_ctx)->session;
+ struct ctxt_priv *priv = sess->ctxt;
+ struct qbman_fle *fle, *sge, *ip_fle, *op_fle;
+ struct sec_flow_context *flc;
+ uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
+ int icv_len = sess->digest_length;
+ uint8_t *old_icv;
+ uint8_t *IV_ptr = iv->va;
+ unsigned int i = 0;
+ int data_len = 0, aead_len = 0;
+
+ for (i = 0; i < sgl->num; i++)
+ data_len += sgl->vec[i].len;
+
+ aead_len = data_len - ofs.ofs.cipher.head - ofs.ofs.cipher.tail;
+
+ /* first FLE entry used to store mbuf and session ctxt */
+ fle = (struct qbman_fle *)rte_malloc(NULL,
+ FLE_SG_MEM_SIZE(2 * sgl->num),
+ RTE_CACHE_LINE_SIZE);
+ if (unlikely(!fle)) {
+ DPAA2_SEC_ERR("GCM SG: Memory alloc failed for SGE");
+ return -ENOMEM;
+ }
+ memset(fle, 0, FLE_SG_MEM_SIZE(2 * sgl->num));
+ DPAA2_SET_FLE_ADDR(fle, (size_t)userdata);
+ DPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);
+
+ op_fle = fle + 1;
+ ip_fle = fle + 2;
+ sge = fle + 3;
+
+ /* Save the shared descriptor */
+ flc = &priv->flc_desc[0].flc;
+
+ /* Configure FD as a FRAME LIST */
+ DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));
+ DPAA2_SET_FD_COMPOUND_FMT(fd);
+ DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
+
+ /* Configure Output FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_SG_EXT(op_fle);
+ DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
+
+ if (auth_only_len)
+ DPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);
+
+ op_fle->length = (sess->dir == DIR_ENC) ?
+ (aead_len + icv_len) :
+ aead_len;
+
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+
+ /* o/p segs */
+ for (i = 1; i < sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = sgl->vec[i].len;
+ }
+
+ if (sess->dir == DIR_ENC) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, digest->iova);
+ sge->length = icv_len;
+ }
+ DPAA2_SET_FLE_FIN(sge);
+
+ sge++;
+
+ /* Configure Input FLE with Scatter/Gather Entry */
+ DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));
+ DPAA2_SET_FLE_SG_EXT(ip_fle);
+ DPAA2_SET_FLE_FIN(ip_fle);
+ ip_fle->length = (sess->dir == DIR_ENC) ?
+ (aead_len + sess->iv.length + auth_only_len) :
+ (aead_len + sess->iv.length + auth_only_len +
+ icv_len);
+
+ /* Configure Input SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
+ sge->length = sess->iv.length;
+
+ sge++;
+ if (auth_only_len) {
+ DPAA2_SET_FLE_ADDR(sge, auth_iv->iova);
+ sge->length = auth_only_len;
+ sge++;
+ }
+
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+
+ /* i/p segs */
+ for (i = 1; i < sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = sgl->vec[i].len;
+ }
+
+ if (sess->dir == DIR_DEC) {
+ sge++;
+ old_icv = (uint8_t *)(sge + 1);
+ memcpy(old_icv, digest->va, icv_len);
+ DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
+ sge->length = icv_len;
+ }
+
+ DPAA2_SET_FLE_FIN(sge);
+ if (auth_only_len) {
+ DPAA2_SET_FLE_INTERNAL_JD(ip_fle, aut
[dpdk-dev] [RFC 09/16] crypto/dpaa2_sec: support OOP with raw buffer API
From: Gagandeep Singh
add support for out of order processing with raw vector APIs.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 1 +
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 156 +++-
2 files changed, 116 insertions(+), 41 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index f6507855e3..db72c11a5f 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -179,6 +179,7 @@ typedef int (*dpaa2_sec_build_fd_t)(
typedef int (*dpaa2_sec_build_raw_dp_fd_t)(uint8_t *drv_ctx,
struct rte_crypto_sgl *sgl,
+ struct rte_crypto_sgl *dest_sgl,
struct rte_crypto_va_iova_ptr *iv,
struct rte_crypto_va_iova_ptr *digest,
struct rte_crypto_va_iova_ptr *auth_iv,
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 41f24c93b6..87a1a10268 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -24,6 +24,7 @@ struct dpaa2_sec_raw_dp_ctx {
static int
build_raw_dp_chain_fd(uint8_t *drv_ctx,
struct rte_crypto_sgl *sgl,
+ struct rte_crypto_sgl *dest_sgl,
struct rte_crypto_va_iova_ptr *iv,
struct rte_crypto_va_iova_ptr *digest,
struct rte_crypto_va_iova_ptr *auth_iv,
@@ -89,17 +90,33 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,
(cipher_len + icv_len) :
cipher_len;
- /* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);
- sge->length = sgl->vec[0].len - ofs.ofs.auth.head;
+ /* OOP */
+ if (dest_sgl) {
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head;
- /* o/p segs */
- for (i = 1; i < sgl->num; i++) {
- sge++;
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
- sge->length = sgl->vec[i].len;
+ /* o/p segs */
+ for (i = 1; i < dest_sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = dest_sgl->vec[i].len;
+ }
+ } else {
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+
+ /* o/p segs */
+ for (i = 1; i < sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+ sge->length = sgl->vec[i].len;
+ }
}
if (sess->dir == DIR_ENC) {
@@ -160,6 +177,7 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,
static int
build_raw_dp_aead_fd(uint8_t *drv_ctx,
struct rte_crypto_sgl *sgl,
+ struct rte_crypto_sgl *dest_sgl,
struct rte_crypto_va_iova_ptr *iv,
struct rte_crypto_va_iova_ptr *digest,
struct rte_crypto_va_iova_ptr *auth_iv,
@@ -219,17 +237,33 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx,
(aead_len + icv_len) :
aead_len;
- /* Configure Output SGE for Encap/Decap */
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);
- DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
- sge->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+ /* OOP */
+ if (dest_sgl) {
+ /* Configure Output SGE for Encap/Decap */
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova);
+ DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head);
+ sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head;
- /* o/p segs */
- for (i = 1; i < sgl->num; i++) {
- sge++;
- DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);
- DPAA2_SET_FLE_OFFSET(sge, 0);
- sge->length = sgl->vec[i].len;
+ /* o/p segs */
+ for (i = 1; i < dest_sgl->num; i++) {
+ sge++;
+ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova);
+ DPAA2_SET_FLE_OFFSET(sge, 0);
+
[dpdk-dev] [RFC 10/16] crypto/dpaa2_sec: fix ctx memset size
From: Gagandeep Singh
Driver is doing memset on memory more than its allocation.
This patch fixes the size of memset.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 87a1a10268..51e316cc00 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -1019,8 +1019,7 @@ dpaa2_sec_configure_raw_dp_ctx(struct rte_cryptodev *dev,
uint16_t qp_id,
RTE_SET_USED(qp_id);
if (!is_update) {
- memset(raw_dp_ctx, 0, sizeof(*raw_dp_ctx) +
- sizeof(dpaa2_sec_session));
+ memset(raw_dp_ctx, 0, sizeof(*raw_dp_ctx));
raw_dp_ctx->qp_data = dev->data->queue_pairs[qp_id];
}
--
2.17.1
[dpdk-dev] [RFC 11/16] crypto/dpaa2_sec: enhance error checks with raw buffer APIs
From: Gagandeep Singh
This patch improves error conditions and support of
Wireless algos with raw buffers.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 31 -
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
index 51e316cc00..25364454c9 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c
@@ -355,16 +355,7 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx,
data_len = total_len - ofs.ofs.auth.head - ofs.ofs.auth.tail;
data_offset = ofs.ofs.auth.head;
- if (sess->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
- sess->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
- if ((data_len & 7) || (data_offset & 7)) {
- DPAA2_SEC_ERR("AUTH: len/offset must be full bytes");
- return -ENOTSUP;
- }
-
- data_len = data_len >> 3;
- data_offset = data_offset >> 3;
- }
+ /* For SNOW3G and ZUC, lengths in bits only supported */
fle = (struct qbman_fle *)rte_malloc(NULL,
FLE_SG_MEM_SIZE(2 * sgl->num),
RTE_CACHE_LINE_SIZE);
@@ -609,17 +600,7 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx,
data_len = total_len - ofs.ofs.cipher.head - ofs.ofs.cipher.tail;
data_offset = ofs.ofs.cipher.head;
- if (sess->cipher_alg == RTE_CRYPTO_CIPHER_SNOW3G_UEA2 ||
- sess->cipher_alg == RTE_CRYPTO_CIPHER_ZUC_EEA3) {
- if ((data_len & 7) || (data_offset & 7)) {
- DPAA2_SEC_ERR("CIPHER: len/offset must be full bytes");
- return -ENOTSUP;
- }
-
- data_len = data_len >> 3;
- data_offset = data_offset >> 3;
- }
-
+ /* For SNOW3G and ZUC, lengths in bits only supported */
/* first FLE entry used to store mbuf and session ctxt */
fle = (struct qbman_fle *)rte_malloc(NULL,
FLE_SG_MEM_SIZE(2*sgl->num),
@@ -878,7 +859,7 @@ dpaa2_sec_raw_dequeue_burst(void *qp_data, uint8_t *drv_ctx,
struct qbman_result *dq_storage;
uint32_t fqid = dpaa2_qp->rx_vq.fqid;
int ret, num_rx = 0;
- uint8_t is_last = 0, status;
+ uint8_t is_last = 0, status, is_success = 0;
struct qbman_swp *swp;
const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
@@ -957,11 +938,11 @@ dpaa2_sec_raw_dequeue_burst(void *qp_data, uint8_t
*drv_ctx,
/* TODO Parse SEC errors */
DPAA2_SEC_ERR("SEC returned Error - %x",
fd->simple.frc);
- status = RTE_CRYPTO_OP_STATUS_ERROR;
+ is_success = false;
} else {
- status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+ is_success = true;
}
- post_dequeue(user_data, num_rx, status);
+ post_dequeue(user_data, num_rx, is_success);
num_rx++;
dq_storage++;
--
2.17.1
[dpdk-dev] [RFC 12/16] crypto/dpaa_sec: support raw datapath APIs
From: Gagandeep Singh
This patch add raw vector API framework for dpaa_sec driver.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec.c| 23 +-
drivers/crypto/dpaa_sec/dpaa_sec.h| 39 +-
drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 485 ++
drivers/crypto/dpaa_sec/meson.build | 4 +-
4 files changed, 537 insertions(+), 14 deletions(-)
create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 19d4684e24..7534f80195 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -45,10 +45,7 @@
#include
#include
-static uint8_t cryptodev_driver_id;
-
-static int
-dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess);
+uint8_t dpaa_cryptodev_driver_id;
static inline void
dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
@@ -1745,8 +1742,8 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op
**ops,
case RTE_CRYPTO_OP_WITH_SESSION:
ses = (dpaa_sec_session *)
get_sym_session_private_data(
- op->sym->session,
- cryptodev_driver_id);
+ op->sym->session,
+ dpaa_cryptodev_driver_id);
break;
#ifdef RTE_LIB_SECURITY
case RTE_CRYPTO_OP_SECURITY_SESSION:
@@ -2307,7 +2304,7 @@ dpaa_sec_detach_rxq(struct dpaa_sec_dev_private *qi,
struct qman_fq *fq)
return -1;
}
-static int
+int
dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
{
int ret;
@@ -3115,7 +3112,7 @@ dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
info->feature_flags = dev->feature_flags;
info->capabilities = dpaa_sec_capabilities;
info->sym.max_nb_sessions = internals->max_nb_sessions;
- info->driver_id = cryptodev_driver_id;
+ info->driver_id = dpaa_cryptodev_driver_id;
}
}
@@ -3311,7 +3308,10 @@ static struct rte_cryptodev_ops crypto_ops = {
.queue_pair_release = dpaa_sec_queue_pair_release,
.sym_session_get_size = dpaa_sec_sym_session_get_size,
.sym_session_configure= dpaa_sec_sym_session_configure,
- .sym_session_clear= dpaa_sec_sym_session_clear
+ .sym_session_clear= dpaa_sec_sym_session_clear,
+ /* Raw data-path API related operations */
+ .sym_get_raw_dp_ctx_size = dpaa_sec_get_dp_ctx_size,
+ .sym_configure_raw_dp_ctx = dpaa_sec_configure_raw_dp_ctx,
};
#ifdef RTE_LIB_SECURITY
@@ -3362,7 +3362,7 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
PMD_INIT_FUNC_TRACE();
- cryptodev->driver_id = cryptodev_driver_id;
+ cryptodev->driver_id = dpaa_cryptodev_driver_id;
cryptodev->dev_ops = &crypto_ops;
cryptodev->enqueue_burst = dpaa_sec_enqueue_burst;
@@ -3371,6 +3371,7 @@ dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
RTE_CRYPTODEV_FF_HW_ACCELERATED |
RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
RTE_CRYPTODEV_FF_SECURITY |
+ RTE_CRYPTODEV_FF_SYM_RAW_DP |
RTE_CRYPTODEV_FF_IN_PLACE_SGL |
RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
@@ -3536,5 +3537,5 @@ static struct cryptodev_driver dpaa_sec_crypto_drv;
RTE_PMD_REGISTER_DPAA(CRYPTODEV_NAME_DPAA_SEC_PMD, rte_dpaa_sec_driver);
RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa_sec_crypto_drv, rte_dpaa_sec_driver.driver,
- cryptodev_driver_id);
+ dpaa_cryptodev_driver_id);
RTE_LOG_REGISTER(dpaa_logtype_sec, pmd.crypto.dpaa, NOTICE);
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h
b/drivers/crypto/dpaa_sec/dpaa_sec.h
index 368699678b..f6e83d46e7 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -19,6 +19,8 @@
#define AES_CTR_IV_LEN 16
#define AES_GCM_IV_LEN 12
+extern uint8_t dpaa_cryptodev_driver_id;
+
#define DPAA_IPv6_DEFAULT_VTC_FLOW 0x6000
/* Minimum job descriptor consists of a oneword job descriptor HEADER and
@@ -117,6 +119,24 @@ struct sec_pdcp_ctxt {
uint32_t hfn_threshold; /*!< HFN Threashold for key renegotiation */
};
#endif
+
+typedef int (*dpaa_sec_build_fd_t)(
+ void *qp, uint8_t *drv_ctx, struct rte_crypto_vec *data_vec,
+ uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs,
+ struct rte_crypto_va_iova_ptr *iv,
+ struct rte_crypto_va_iova_ptr *digest,
+ struct rte_crypto_va_iova_ptr *aad_or_auth_iv,
+ void *user_data);
+
+typedef struct dpaa_sec_job
[dpdk-dev] [RFC 13/16] crypto/dpaa_sec: support authonly and chain with raw APIs
From: Gagandeep Singh
This patch improves the raw vector support in dpaa_sec driver
for authonly and chain usecase.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec.h| 3 +-
drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 296 +-
2 files changed, 287 insertions(+), 12 deletions(-)
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h
b/drivers/crypto/dpaa_sec/dpaa_sec.h
index f6e83d46e7..2e0ab93ff0 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -135,7 +135,8 @@ typedef struct dpaa_sec_job*
(*dpaa_sec_build_raw_dp_fd_t)(uint8_t *drv_ctx,
struct rte_crypto_va_iova_ptr *digest,
struct rte_crypto_va_iova_ptr *auth_iv,
union rte_crypto_sym_ofs ofs,
- void *userdata);
+ void *userdata,
+ struct qm_fd *fd);
typedef struct dpaa_sec_session_entry {
struct sec_cdb cdb; /**< cmd block associated with qp */
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
b/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
index ee0ca2e0d5..4e34629f18 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
@@ -12,6 +12,7 @@
#endif
/* RTA header files */
+#include
#include
#include
@@ -26,6 +27,17 @@ struct dpaa_sec_raw_dp_ctx {
uint16_t cached_dequeue;
};
+static inline int
+is_encode(dpaa_sec_session *ses)
+{
+ return ses->dir == DIR_ENC;
+}
+
+static inline int is_decode(dpaa_sec_session *ses)
+{
+ return ses->dir == DIR_DEC;
+}
+
static __rte_always_inline int
dpaa_sec_raw_enqueue_done(void *qp_data, uint8_t *drv_ctx, uint32_t n)
{
@@ -82,18 +94,276 @@ build_dpaa_raw_dp_auth_fd(uint8_t *drv_ctx,
struct rte_crypto_va_iova_ptr *digest,
struct rte_crypto_va_iova_ptr *auth_iv,
union rte_crypto_sym_ofs ofs,
- void *userdata)
+ void *userdata,
+ struct qm_fd *fd)
{
- RTE_SET_USED(drv_ctx);
- RTE_SET_USED(sgl);
RTE_SET_USED(dest_sgl);
RTE_SET_USED(iv);
- RTE_SET_USED(digest);
RTE_SET_USED(auth_iv);
- RTE_SET_USED(ofs);
- RTE_SET_USED(userdata);
+ RTE_SET_USED(fd);
- return NULL;
+ dpaa_sec_session *ses =
+ ((struct dpaa_sec_raw_dp_ctx *)drv_ctx)->session;
+ struct dpaa_sec_job *cf;
+ struct dpaa_sec_op_ctx *ctx;
+ struct qm_sg_entry *sg, *out_sg, *in_sg;
+ phys_addr_t start_addr;
+ uint8_t *old_digest, extra_segs;
+ int data_len, data_offset, total_len = 0;
+ unsigned int i;
+
+ for (i = 0; i < sgl->num; i++)
+ total_len += sgl->vec[i].len;
+
+ data_len = total_len - ofs.ofs.auth.head - ofs.ofs.auth.tail;
+ data_offset = ofs.ofs.auth.head;
+
+ /* Support only length in bits for SNOW3G and ZUC */
+
+ if (is_decode(ses))
+ extra_segs = 3;
+ else
+ extra_segs = 2;
+
+ if (sgl->num > MAX_SG_ENTRIES) {
+ DPAA_SEC_DP_ERR("Auth: Max sec segs supported is %d",
+ MAX_SG_ENTRIES);
+ return NULL;
+ }
+ ctx = dpaa_sec_alloc_raw_ctx(ses, sgl->num * 2 + extra_segs);
+ if (!ctx)
+ return NULL;
+
+ cf = &ctx->job;
+ ctx->userdata = (void *)userdata;
+ old_digest = ctx->digest;
+
+ /* output */
+ out_sg = &cf->sg[0];
+ qm_sg_entry_set64(out_sg, digest->iova);
+ out_sg->length = ses->digest_length;
+ cpu_to_hw_sg(out_sg);
+
+ /* input */
+ in_sg = &cf->sg[1];
+ /* need to extend the input to a compound frame */
+ in_sg->extension = 1;
+ in_sg->final = 1;
+ in_sg->length = data_len;
+ qm_sg_entry_set64(in_sg, rte_dpaa_mem_vtop(&cf->sg[2]));
+
+ /* 1st seg */
+ sg = in_sg + 1;
+
+ if (ses->iv.length) {
+ uint8_t *iv_ptr;
+
+ iv_ptr = rte_crypto_op_ctod_offset(userdata, uint8_t *,
+ ses->iv.offset);
+
+ if (ses->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2) {
+ iv_ptr = conv_to_snow_f9_iv(iv_ptr);
+ sg->length = 12;
+ } else if (ses->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
+ iv_ptr = conv_to_zuc_eia_iv(iv_ptr);
+ sg->length = 8;
+ } else {
+ sg->length = ses->iv.length;
+ }
+ qm_sg_entry_set64(sg, rte_dpaa_mem_vtop(iv_ptr));
+ in_sg->length += sg->length;
+ cpu_to_hw_sg(sg);
+ sg++;
+ }
+
+ qm_sg_entry_set64(sg, sgl->vec[0].iova);
+ sg->offset = data_offset;
+
+ if (data_len <= (int)(
[dpdk-dev] [RFC 14/16] crypto/dpaa_sec: support AEAD and proto with raw APIs
From: Gagandeep Singh
This add support for AEAD and proto offload with raw APIs
for dpaa_sec driver.
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c | 293 ++
1 file changed, 293 insertions(+)
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
b/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
index 4e34629f18..b0c22a7c26 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec_raw_dp.c
@@ -218,6 +218,163 @@ build_dpaa_raw_dp_auth_fd(uint8_t *drv_ctx,
return cf;
}
+static inline struct dpaa_sec_job *
+build_raw_cipher_auth_gcm_sg(uint8_t *drv_ctx,
+ struct rte_crypto_sgl *sgl,
+ struct rte_crypto_sgl *dest_sgl,
+ struct rte_crypto_va_iova_ptr *iv,
+ struct rte_crypto_va_iova_ptr *digest,
+ struct rte_crypto_va_iova_ptr *auth_iv,
+ union rte_crypto_sym_ofs ofs,
+ void *userdata,
+ struct qm_fd *fd)
+{
+ dpaa_sec_session *ses =
+ ((struct dpaa_sec_raw_dp_ctx *)drv_ctx)->session;
+ struct dpaa_sec_job *cf;
+ struct dpaa_sec_op_ctx *ctx;
+ struct qm_sg_entry *sg, *out_sg, *in_sg;
+ uint8_t extra_req_segs;
+ uint8_t *IV_ptr = iv->va;
+ int data_len = 0, aead_len = 0;
+ unsigned int i;
+
+ for (i = 0; i < sgl->num; i++)
+ data_len += sgl->vec[i].len;
+
+ extra_req_segs = 4;
+ aead_len = data_len - ofs.ofs.cipher.head - ofs.ofs.cipher.tail;
+
+ if (ses->auth_only_len)
+ extra_req_segs++;
+
+ if (sgl->num > MAX_SG_ENTRIES) {
+ DPAA_SEC_DP_ERR("AEAD: Max sec segs supported is %d",
+ MAX_SG_ENTRIES);
+ return NULL;
+ }
+
+ ctx = dpaa_sec_alloc_raw_ctx(ses, sgl->num * 2 + extra_req_segs);
+ if (!ctx)
+ return NULL;
+
+ cf = &ctx->job;
+ ctx->userdata = (void *)userdata;
+
+ rte_prefetch0(cf->sg);
+
+ /* output */
+ out_sg = &cf->sg[0];
+ out_sg->extension = 1;
+ if (is_encode(ses))
+ out_sg->length = aead_len + ses->digest_length;
+ else
+ out_sg->length = aead_len;
+
+ /* output sg entries */
+ sg = &cf->sg[2];
+ qm_sg_entry_set64(out_sg, rte_dpaa_mem_vtop(sg));
+ cpu_to_hw_sg(out_sg);
+
+ if (dest_sgl) {
+ /* 1st seg */
+ qm_sg_entry_set64(sg, dest_sgl->vec[0].iova);
+ sg->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head;
+ sg->offset = ofs.ofs.cipher.head;
+
+ /* Successive segs */
+ for (i = 1; i < dest_sgl->num; i++) {
+ cpu_to_hw_sg(sg);
+ sg++;
+ qm_sg_entry_set64(sg, dest_sgl->vec[i].iova);
+ sg->length = dest_sgl->vec[i].len;
+ }
+ } else {
+ /* 1st seg */
+ qm_sg_entry_set64(sg, sgl->vec[0].iova);
+ sg->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+ sg->offset = ofs.ofs.cipher.head;
+
+ /* Successive segs */
+ for (i = 1; i < sgl->num; i++) {
+ cpu_to_hw_sg(sg);
+ sg++;
+ qm_sg_entry_set64(sg, sgl->vec[i].iova);
+ sg->length = sgl->vec[i].len;
+ }
+
+ }
+
+ if (is_encode(ses)) {
+ cpu_to_hw_sg(sg);
+ /* set auth output */
+ sg++;
+ qm_sg_entry_set64(sg, digest->iova);
+ sg->length = ses->digest_length;
+ }
+ sg->final = 1;
+ cpu_to_hw_sg(sg);
+
+ /* input */
+ in_sg = &cf->sg[1];
+ in_sg->extension = 1;
+ in_sg->final = 1;
+ if (is_encode(ses))
+ in_sg->length = ses->iv.length + aead_len
+ + ses->auth_only_len;
+ else
+ in_sg->length = ses->iv.length + aead_len
+ + ses->auth_only_len + ses->digest_length;
+
+ /* input sg entries */
+ sg++;
+ qm_sg_entry_set64(in_sg, rte_dpaa_mem_vtop(sg));
+ cpu_to_hw_sg(in_sg);
+
+ /* 1st seg IV */
+ qm_sg_entry_set64(sg, rte_dpaa_mem_vtop(IV_ptr));
+ sg->length = ses->iv.length;
+ cpu_to_hw_sg(sg);
+
+ /* 2 seg auth only */
+ if (ses->auth_only_len) {
+ sg++;
+ qm_sg_entry_set64(sg, auth_iv->iova);
+ sg->length = ses->auth_only_len;
+ cpu_to_hw_sg(sg);
+ }
+
+ /* 3rd seg */
+ sg++;
+ qm_sg_entry_set64(sg, sgl->vec[0].iova);
+ sg->length = sgl->vec[0].len - ofs.ofs.cipher.head;
+ sg->offset = ofs.ofs.cipher.head;
+
+ /* Suc
[dpdk-dev] [RFC 15/16] test/crypto: add raw API test for dpaax
This patch add support for raw API tests for
dpaa_sec and dpaa2_sec platforms.
Signed-off-by: Gagandeep Singh
Signed-off-by: Hemant Agrawal
---
app/test/test_cryptodev.c | 116 +++---
1 file changed, 109 insertions(+), 7 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index aecd507fa1..59bed6e6d2 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -175,11 +175,11 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id,
{
struct rte_crypto_sym_op *sop = op->sym;
struct rte_crypto_op *ret_op = NULL;
- struct rte_crypto_vec data_vec[UINT8_MAX];
+ struct rte_crypto_vec data_vec[UINT8_MAX], dest_data_vec[UINT8_MAX];
struct rte_crypto_va_iova_ptr cipher_iv, digest, aad_auth_iv;
union rte_crypto_sym_ofs ofs;
struct rte_crypto_sym_vec vec;
- struct rte_crypto_sgl sgl;
+ struct rte_crypto_sgl sgl, dest_sgl;
uint32_t max_len;
union rte_cryptodev_session_ctx sess;
uint32_t count = 0;
@@ -315,6 +315,19 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id,
}
sgl.num = n;
+ /* Out of place */
+ if (sop->m_dst != NULL) {
+ dest_sgl.vec = dest_data_vec;
+ vec.dest_sgl = &dest_sgl;
+ n = rte_crypto_mbuf_to_vec(sop->m_dst, 0, max_len,
+ dest_data_vec, RTE_DIM(dest_data_vec));
+ if (n < 0 || n > sop->m_dst->nb_segs) {
+ op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+ goto exit;
+ }
+ dest_sgl.num = n;
+ } else
+ vec.dest_sgl = NULL;
if (rte_cryptodev_raw_enqueue_burst(ctx, &vec, ofs, (void **)&op,
&enqueue_status) < 1) {
@@ -8305,10 +8318,21 @@ test_pdcp_proto_SGL(int i, int oop,
int to_trn_tbl[16];
int segs = 1;
unsigned int trn_data = 0;
+ struct rte_cryptodev_info dev_info;
+ uint64_t feat_flags;
struct rte_security_ctx *ctx = (struct rte_security_ctx *)
rte_cryptodev_get_sec_ctx(
ts_params->valid_devs[0]);
+ struct rte_mbuf *temp_mbuf;
+
+ rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);
+ feat_flags = dev_info.feature_flags;
+ if ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&
+ (!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {
+ printf("Device does not support RAW data-path APIs.\n");
+ return -ENOTSUP;
+ }
/* Verify the capabilities */
struct rte_security_capability_idx sec_cap_idx;
@@ -8492,8 +8516,23 @@ test_pdcp_proto_SGL(int i, int oop,
ut_params->op->sym->m_dst = ut_params->obuf;
/* Process crypto operation */
- if (process_crypto_request(ts_params->valid_devs[0], ut_params->op)
- == NULL) {
+ temp_mbuf = ut_params->op->sym->m_src;
+ if (global_api_test_type == CRYPTODEV_RAW_API_TEST) {
+ /* filling lengths */
+ while (temp_mbuf) {
+ ut_params->op->sym->cipher.data.length
+ += temp_mbuf->pkt_len;
+ ut_params->op->sym->auth.data.length
+ += temp_mbuf->pkt_len;
+ temp_mbuf = temp_mbuf->next;
+ }
+ process_sym_raw_dp_op(ts_params->valid_devs[0], 0,
+ ut_params->op, 1, 1, 0, 0);
+ } else {
+ ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+ ut_params->op);
+ }
+ if (ut_params->op == NULL) {
printf("TestCase %s()-%d line %d failed %s: ",
__func__, i, __LINE__,
"failed to process sym crypto op");
@@ -9934,6 +9973,7 @@ test_authenticated_encryption_oop(const struct
aead_test_data *tdata)
int retval;
uint8_t *ciphertext, *auth_tag;
uint16_t plaintext_pad_len;
+ struct rte_cryptodev_info dev_info;
/* Verify the capabilities */
struct rte_cryptodev_sym_capability_idx cap_idx;
@@ -9943,7 +9983,11 @@ test_authenticated_encryption_oop(const struct
aead_test_data *tdata)
&cap_idx) == NULL)
return TEST_SKIPPED;
- if (global_api_test_type == CRYPTODEV_RAW_API_TEST)
+ rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);
+ uint64_t feat_flags = dev_info.feature_flags;
+
+ if ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&
+ (!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP)))
return TEST_SKIPPED;
/* not supported with CPU crypto */
@@ -9980,7 +10024,11 @@ test_authenticated_encryption_oop(const struct
aead_tes
[dpdk-dev] [RFC 16/16] test/crypto: enabling raw API support in 5G algos
This patch add support for RAW API testing with ZUC
and SNOW test cases.
Signed-off-by: Gagandeep Singh
Signed-off-by: Hemant Agrawal
---
app/test/test_cryptodev.c | 57 ++-
1 file changed, 51 insertions(+), 6 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 59bed6e6d2..ab3394bb09 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -368,6 +368,7 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id,
}
op->status = (count == MAX_RAW_DEQUEUE_COUNT + 1 || ret_op != op ||
+ ret_op->status == RTE_CRYPTO_OP_STATUS_ERROR ||
n_success < 1) ? RTE_CRYPTO_OP_STATUS_ERROR :
RTE_CRYPTO_OP_STATUS_SUCCESS;
@@ -4152,6 +4153,16 @@ test_snow3g_encryption_oop(const struct snow3g_test_data
*tdata)
int retval;
unsigned plaintext_pad_len;
unsigned plaintext_len;
+ struct rte_cryptodev_info dev_info;
+
+ rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);
+ uint64_t feat_flags = dev_info.feature_flags;
+
+ if ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&
+ (!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {
+ printf("Device does not support RAW data-path APIs.\n");
+ return -ENOTSUP;
+ }
/* Verify the capabilities */
struct rte_cryptodev_sym_capability_idx cap_idx;
@@ -4207,7 +4218,11 @@ test_snow3g_encryption_oop(const struct snow3g_test_data
*tdata)
if (retval < 0)
return retval;
- ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+ if (global_api_test_type == CRYPTODEV_RAW_API_TEST)
+ process_sym_raw_dp_op(ts_params->valid_devs[0], 0,
+ ut_params->op, 1, 0, 1, tdata->cipher_iv.len);
+ else
+ ut_params->op = process_crypto_request(ts_params->valid_devs[0],
ut_params->op);
TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
@@ -4267,6 +4282,12 @@ test_snow3g_encryption_oop_sgl(const struct
snow3g_test_data *tdata)
return TEST_SKIPPED;
}
+ if ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&
+ (!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {
+ printf("Device does not support RAW data-path APIs.\n");
+ return -ENOTSUP;
+ }
+
/* Create SNOW 3G session */
retval = create_wireless_algo_cipher_session(ts_params->valid_devs[0],
RTE_CRYPTO_CIPHER_OP_ENCRYPT,
@@ -4301,7 +4322,11 @@ test_snow3g_encryption_oop_sgl(const struct
snow3g_test_data *tdata)
if (retval < 0)
return retval;
- ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+ if (global_api_test_type == CRYPTODEV_RAW_API_TEST)
+ process_sym_raw_dp_op(ts_params->valid_devs[0], 0,
+ ut_params->op, 1, 0, 1, tdata->cipher_iv.len);
+ else
+ ut_params->op = process_crypto_request(ts_params->valid_devs[0],
ut_params->op);
TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
@@ -4428,7 +4453,11 @@ test_snow3g_encryption_offset_oop(const struct
snow3g_test_data *tdata)
if (retval < 0)
return retval;
- ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+ if (global_api_test_type == CRYPTODEV_RAW_API_TEST)
+ process_sym_raw_dp_op(ts_params->valid_devs[0], 0,
+ ut_params->op, 1, 0, 1, tdata->cipher_iv.len);
+ else
+ ut_params->op = process_crypto_request(ts_params->valid_devs[0],
ut_params->op);
TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
@@ -4559,7 +4588,16 @@ static int test_snow3g_decryption_oop(const struct
snow3g_test_data *tdata)
uint8_t *plaintext, *ciphertext;
unsigned ciphertext_pad_len;
unsigned ciphertext_len;
+ struct rte_cryptodev_info dev_info;
+
+ rte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);
+ uint64_t feat_flags = dev_info.feature_flags;
+ if ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&
+ (!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {
+ printf("Device does not support RAW data-path APIs.\n");
+ return -ENOTSUP;
+ }
/* Verify the capabilities */
struct rte_cryptodev_sym_capability_idx cap_idx;
cap_idx.type = RTE_CRYPTO_SYM_XFORM_CIPHER;
@@ -4617,7 +4655,11 @@ static int test_snow3g_decryption_oop(const struct
snow3g_test_data *tdata)
if (retval < 0)
return retval;
- ut_par
Re: [dpdk-dev] [PATCH] net/iavf: remove interrupt handler
> > -Original Message-
> > From: Zhang, RobinX
> > Sent: Friday, July 23, 2021 3:47 PM
> > To: dev@dpdk.org
> > Cc: Wu, Jingjing ; Xing, Beilei
> > ; Zhang, Qi Z ; Guo,
> > Junfeng ; Yang, SteveX
> ;
> > Zhang, RobinX
> > Subject: [PATCH] net/iavf: remove interrupt handler
>
> As you are not going to remove interrupt handler for all the cases, the title
> is
> misleading Better replace it with "enable interrupt polling"
>
> >
> > For VF hosted by Intel 700 series NICs, internal rx interrupt and
> > adminq interrupt share the same source, that cause a lot cpu cycles be
> > wasted on interrupt handler on rx path.
> >
> > The patch disable pci interrupt and remove the interrupt handler,
> > replace it with a low frequency(50ms) interrupt polling daemon which
> > is implemtented by registering an alarm callback periodly.
> >
> > The virtual channel capability bit VIRTCHNL_VF_OFFLOAD_WB_ON_ITR can
> > be used to negotiate if iavf PMD needs to enable background alarm or
> > not, so ideally this change will not impact the case hosted by Intel 800
> > series
> NICS.
> >
> > Suggested-by: Jingjing Wu
> > Signed-off-by: Qi Zhang
>
As it is a kind of problem solving, can it be sent to dpdk-stable too?
> No need to add me as the author for this patch but, you can add a reference
> to the original i40e commit to explain you implement the same logic.
>
> > Signed-off-by: Robin Zhang
> > ---
> > drivers/net/iavf/iavf.h| 3 +++
> > drivers/net/iavf/iavf_ethdev.c | 37
> > ++
> > drivers/net/iavf/iavf_vchnl.c | 11 --
> > 3 files changed, 22 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h index
> > b3bd078111..771f3b79d7 100644
> > --- a/drivers/net/iavf/iavf.h
> > +++ b/drivers/net/iavf/iavf.h
> > @@ -69,6 +69,8 @@
> > #define IAVF_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
> > #define IAVF_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
> >
> > +#define IAVF_ALARM_INTERVAL 5 /* us */
> > +
> > /* The overhead from MTU to max frame size.
> > * Considering QinQ packet, the VLAN tag needs to be counted twice.
> > */
> > @@ -372,6 +374,7 @@ int iavf_config_irq_map_lv(struct iavf_adapter
> > *adapter, uint16_t num, void iavf_add_del_all_mac_addr(struct
> > iavf_adapter *adapter, bool add); int iavf_dev_link_update(struct
> > rte_eth_dev *dev, __rte_unused int wait_to_complete);
> > +void iavf_dev_alarm_handler(void *param);
> > int iavf_query_stats(struct iavf_adapter *adapter,
> > struct virtchnl_eth_stats **pstats); int
> > iavf_config_promisc(struct iavf_adapter *adapter, bool enable_unicast,
> > diff --git a/drivers/net/iavf/iavf_ethdev.c
> > b/drivers/net/iavf/iavf_ethdev.c index
> > 41382c6d66..bbe5b3ddb1 100644
> > --- a/drivers/net/iavf/iavf_ethdev.c
> > +++ b/drivers/net/iavf/iavf_ethdev.c
> > @@ -16,6 +16,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -692,9 +693,9 @@ static int iavf_config_rx_queues_irqs(struct
> > rte_eth_dev *dev,
> > */
> > vf->msix_base = IAVF_MISC_VEC_ID;
> >
> > -/* set ITR to max */
> > +/* set ITR to default */
> > interval = iavf_calc_itr_interval(
> > -IAVF_QUEUE_ITR_INTERVAL_MAX);
> > +IAVF_QUEUE_ITR_INTERVAL_DEFAULT);
> > IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,
> > IAVF_VFINT_DYN_CTL01_INTENA_MASK |
> > (IAVF_ITR_INDEX_DEFAULT <<
> > @@ -853,9 +854,8 @@ iavf_dev_start(struct rte_eth_dev *dev)
> > PMD_DRV_LOG(ERR, "configure irq failed"); goto err_queue; }
> > -/* re-enable intr again, because efd assign may change */
> > +/* only enable interrupt in rx interrupt mode */
> > if (dev->data->dev_conf.intr_conf.rxq != 0) {
> > -rte_intr_disable(intr_handle); rte_intr_enable(intr_handle); }
> >
> > @@ -889,6 +889,9 @@ iavf_dev_stop(struct rte_eth_dev *dev)
> >
> > PMD_INIT_FUNC_TRACE();
> >
> > +if (dev->data->dev_conf.intr_conf.rxq != 0)
> > +rte_intr_disable(intr_handle);
> > +
> > if (adapter->stopped == 1)
> > return 0;
> >
> > @@ -1669,8 +1672,6 @@ iavf_dev_rx_queue_intr_enable(struct
> rte_eth_dev
> > *dev, uint16_t queue_id)
> >
> > IAVF_WRITE_FLUSH(hw);
> >
> > -rte_intr_ack(&pci_dev->intr_handle);
> > -
> > return 0;
> > }
> >
> > @@ -2201,8 +2202,8 @@ iavf_disable_irq0(struct iavf_hw *hw)
> > IAVF_WRITE_FLUSH(hw); }
> >
> > -static void
> > -iavf_dev_interrupt_handler(void *param)
> > +void
> > +iavf_dev_alarm_handler(void *param)
> > {
> > struct rte_eth_dev *dev = (struct rte_eth_dev *)param; struct
> > iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> > @@ -2212,6 +2213,9 @@ iavf_dev_interrupt_handler(void *param)
> > iavf_handle_virtchnl_msg(dev);
> >
> > iavf_enable_irq0(hw);
> > +
> > +rte_eal_alarm_set(IAVF_ALARM_INTERVAL,
> > + iavf_dev_alarm_handler, dev);
> > }
> >
> > static int
> > @@ -2314,13 +2318,8 @@ iavf_dev_init(struct rte_eth_dev *eth_dev)
> > rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr
Re: [dpdk-dev] [EXT] [RFC 04/16] crypto: enhance raw process for protocol offload
> From: Gagandeep Singh > > This patch improves the raw vector processing for security > protocol with OOP processing. > > Signed-off-by: Gagandeep Singh > --- Can you explain the reasoning for this change in commit message. Is this a bug? Do we need to backport it? ++Fan/Konstantin > lib/cryptodev/rte_crypto_sym.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/lib/cryptodev/rte_crypto_sym.h > b/lib/cryptodev/rte_crypto_sym.h > index 978708845f..a48228a646 100644 > --- a/lib/cryptodev/rte_crypto_sym.h > +++ b/lib/cryptodev/rte_crypto_sym.h > @@ -1003,6 +1003,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf > *mb, uint32_t ofs, uint32_t len, > vec[i].len = left; > vec[i].tot_len = mb->buf_len; > left = 0; > + i++; > break; > } > > @@ -1013,7 +1014,7 @@ rte_crypto_mbuf_to_vec(const struct rte_mbuf > *mb, uint32_t ofs, uint32_t len, > } > > RTE_ASSERT(left == 0); > - return i + 1; > + return i; > } > > > -- > 2.17.1
Re: [dpdk-dev] [EXT] [RFC 01/16] crypto: change sgl to src_sgl in vector
> This patch renames the sgl to src_sgl to help differentiating > between source and destination sgl. > > Signed-off-by: Hemant Agrawal > --- ++Fan/Konstantin
[dpdk-dev] [Bug 789] [build]ICC 32bit build failed on Ubuntu 20.04.2 LTS when has "--werror".
https://bugs.dpdk.org/show_bug.cgi?id=789
Bug ID: 789
Summary: [build]ICC 32bit build failed on Ubuntu 20.04.2 LTS
when has "--werror".
Product: DPDK
Version: 21.08
Hardware: All
OS: All
Status: UNCONFIRMED
Severity: normal
Priority: Normal
Component: meson
Assignee: dev@dpdk.org
Reporter: longfengx.li...@intel.com
Target Milestone: ---
Environment:
DPDK version:
commit 4ac3f3d76e9507a93bcf48d165ffd3a1faba08bb (HEAD -> main, tag: v21.08,
origin/main, origin/HEAD)
Author: Thomas Monjalon
Date: Sun Aug 8 17:23:21 2021 +0200
version: 21.08.0
Signed-off-by: Thomas Monjalon
OS version:
DISTRIB_DESCRIPTION="Ubuntu 20.04.2 LTS"
icc version: icc (ICC) 19.1.3.304 20200925
gcc version: gcc (Ubuntu 10.3.0-1ubuntu1~20.04) 10.3.0
Env setup:
env: DPDK build 32 bit is to be tested on a 64 bit OS.
root@dpdk-xuemin4x-ub2004-i686-icc:~/dpdk# dpkg --print-foreign-architectures
i386
set 32bit build env:
#echo "source /opt/intel/bin/iccvars.sh ia32" >> ~/.bashrc
#source ~/.bashrc
Note:
There are two situations:
1.build command has "–werror", build failed.
2.build command no "–werror", build passed.
Test Setup:
32bit icc build cmd(has --werror),output as below:
#export RTE_TARGET=i686-native-linuxapp-icc
#export RTE_SDK=`pwd`
#export PKG_CONFIG_LIBDIR=/usr/lib/i386-linux-gnu/pkgconfig
#export LIBRARY_PATH=/usr/lib/gcc/i686-linux-gnu/10/:$LIBRARY_PATH
#CC=icc meson -Dc_args='-m32' -Dc_link_args='-m32' --werror -Denable_kmods=True
-Dlibdir=lib -Dexamples=all --default-library=static i686-native-linuxapp-icc
#ninja -C i686-native-linuxapp-icc/
root@dpdk-xuemin4x-ub2004-i686-icc:~/dpdk# ninja -C i686-native-linuxapp-icc/
ninja: Entering directory `i686-native-linuxapp-icc/'
[507/2388] Compiling C object lib/librte_graph.a.p/graph_graph_stats.c.o
../lib/graph/graph_stats.c(39): warning #2405: array of elements containing a
flexible array member is nonstandard
struct cluster_node clusters[];
^
[1128/2388] Compiling C object
drivers/net/hinic/base/libhinic_base.a.p/hinic_pmd_hwdev.c.o
FAILED: drivers/net/hinic/base/libhinic_base.a.p/hinic_pmd_hwdev.c.o
icc -Idrivers/net/hinic/base/libhinic_base.a.p -Idrivers/net/hinic/base
-I../drivers/net/hinic/base -I. -I.. -Iconfig -I../config -Ilib/eal/include
-I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include
-Ilib/eal/x86/include -I../lib/eal/x86/include -Ilib/eal/common
-I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/kvargs -I../lib/kvargs
-Ilib/metrics -I../lib/metrics -Ilib/telemetry -I../lib/telemetry -Ilib/ethdev
-I../lib/ethdev -Ilib/net -I../lib/net -Ilib/mbuf -I../lib/mbuf -Ilib/mempool
-I../lib/mempool -Ilib/ring -I../lib/ring -Ilib/meter -I../lib/meter
-Idrivers/bus/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux -Ilib/pci
-I../lib/pci -Ilib/hash -I../lib/hash -Ilib/rcu -I../lib/rcu -pipe
-D_FILE_OFFSET_BITS=64 -Wall -w3 -diag-disable:remark -Werror -O3 -include
rte_config.h -Wextra -Wcast-qual -Wdeprecated -Wformat -Wformat-security
-Wmissing-declarations -Wmissing-prototypes -Wold-style-definition
-Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings
-Wno-missing-field-initializers -Wno-pointer-to-int-cast -diag-disable=181
-diag-disable=188 -diag-disable=2203 -diag-disable=2279 -diag-disable=2557
-diag-disable=3179 -diag-disable=3656 -D_GNU_SOURCE -m32 -fPIC -march=native
-DALLOW_EXPERIMENTAL_API -DALLOW_INTERNAL_API -Wno-int-to-pointer-cast
-Wno-pointer-to-int-cast -MD -MQ
drivers/net/hinic/base/libhinic_base.a.p/hinic_pmd_hwdev.c.o -MF
drivers/net/hinic/base/libhinic_base.a.p/hinic_pmd_hwdev.c.o.d -o
drivers/net/hinic/base/libhinic_base.a.p/hinic_pmd_hwdev.c.o -c
../drivers/net/hinic/base/hinic_pmd_hwdev.c
../drivers/net/hinic/base/hinic_pmd_hwdev.c(148): error #2259: non-pointer
conversion from "rte_iova_t={uint64_t={__uint64_t={unsigned long long}}}" to
"void *" may lose significant bits
PMD_DRV_LOG(ERR, "Dma addr: %p already in hash table, error:
%d, mz_name: %s",
^
../drivers/net/hinic/base/hinic_pmd_hwdev.c(157): error #2259: non-pointer
conversion from "u64={uint64_t={__uint64_t={unsigned long long}}}" to "void *"
may lose significant bits
(void *)(u64)mz);
^
../drivers/net/hinic/base/hinic_pmd_hwdev.c(160): error #2259: non-pointer
conversion from "rte_iova_t={uint64_t={__uint64_t={unsigned long long}}}" to
"void *" may lose significant bits
PMD_DRV_LOG(ERR, "Insert dma addr: %p hash failed, error: %d,
mz_name: %s",
^
../drivers/net/hinic/base/hinic_pmd_hwdev.c(192): error #2259: non-pointer
conversion from "dma_addr_t={uint64_t={__uint64_t={unsigned long long}}}" to
"void *" may lose significant bits
PMD_DRV_LOG(ERR, "Can not find phys_addr: %
Re: [dpdk-dev] [External] Re: [PATCH v2] app/testpmd: flowgen support ip and udp fields
On Wed, Aug 11, 2021 at 6:31 PM Ferruh Yigit wrote: > > On 8/11/2021 3:48 AM, 王志宏 wrote: > > On Tue, Aug 10, 2021 at 5:12 PM Ferruh Yigit wrote: > >> > >> On 8/10/2021 8:57 AM, 王志宏 wrote: > >>> Thanks for the review Ferruh :) > >>> > >>> On Mon, Aug 9, 2021 at 11:18 PM Ferruh Yigit > >>> wrote: > > On 8/9/2021 7:52 AM, Zhihong Wang wrote: > > This patch aims to: > > 1. Add flexibility by supporting IP & UDP src/dst fields > > What is the reason/"use case" of this flexibility? > >>> > >>> The purpose is to emulate pkt generator behaviors. > >>> > >> > >> 'flowgen' forwarding is already to emulate pkt generator, but it was only > >> changing destination IP. > >> > >> What additional benefit does changing udp ports of the packets brings? > >> What is > >> your usecase for this change? > > > > Pkt generators like pktgen/trex/ixia/spirent can change various fields > > including ip/udp src/dst. > > > > But testpmd is not packet generator, it has very simple 'flowgen' forwarding > engine, I would like to understand motivation to make it more complex. I agree this *simplicity* point. In fact my sole intention is to make flowgen useable for multi-core test. I'll keep the original setup in the next patch. > > > Keeping the cfg_n_* while setting cfg_n_ip_dst = 1024 and others = 1 > > makes the default behavior exactly unchanged. Do you think it makes > > sense? > > > >> > > > 2. Improve multi-core performance by using per-core vars> > > On multi core this also has syncronization problem, OK to make it > per-core. Do > you have any observed performance difference, if so how much is it? > >>> > >>> Huge difference, one example: 8 core flowgen -> rxonly results: 43 > >>> Mpps (per-core) vs. 9.3 Mpps (shared), of course the numbers "varies > >>> depending on system configuration". > >>> > >> > >> Thanks for clarification. > >> > > And can you please separate this to its own patch? This can be before > ip/udp update. > >>> > >>> Will do. > >>> > > > v2: fix assigning ip header cksum > > > > +1 to update, can you please make it as seperate patch? > >>> > >>> Sure. > >>> > > So overall this can be a patchset with 4 patches: > 1- Fix retry logic (nb_rx -> nb_pkt) > 2- Use 'rte_ipv4_cksum()' API (instead of static 'ip_sum()') > 3- User per-core varible (for 'next_flow') > 4- Support ip/udp src/dst variaty of packets > > >>> > >>> Great summary. Thanks a lot. > >>> > > Signed-off-by: Zhihong Wang > > --- > > app/test-pmd/flowgen.c | 137 > > +++-- > > 1 file changed, 86 insertions(+), 51 deletions(-) > > > > <...> > > > @@ -185,30 +193,57 @@ pkt_burst_flow_gen(struct fwd_stream *fs) > > } > > pkts_burst[nb_pkt] = pkt; > > > > - next_flow = (next_flow + 1) % cfg_n_flows; > > + if (++next_udp_dst < cfg_n_udp_dst) > > + continue; > > + next_udp_dst = 0; > > + if (++next_udp_src < cfg_n_udp_src) > > + continue; > > + next_udp_src = 0; > > + if (++next_ip_dst < cfg_n_ip_dst) > > + continue; > > + next_ip_dst = 0; > > + if (++next_ip_src < cfg_n_ip_src) > > + continue; > > + next_ip_src = 0; > > What is the logic here, can you please clarifiy the packet generation > logic both > in a comment here and in the commit log? > >>> > >>> It's round-robin field by field. Will add the comments. > >>> > >> > >> Thanks. If the receiving end is doing RSS based on IP address, dst address > >> will > >> change in every 100 packets and src will change in every 1 packets. > >> This is > >> a slight behavior change. > >> > >> When it was only dst ip, it was simple to just increment it, not sure > >> about it > >> in this case. I wonder if we should set all randomly for each packet. I > >> don't > >> know what is the better logic here, we can discuss it more in the next > >> version. > > > > A more sophisticated pkt generator provides various options among > > "step-by-step" / "random" / etc. > > > > But supporting multiple fields naturally brings this implicitly. It > > won't be a problem as it can be configured by setting the cfg_n_* as > > we discussed above. > > > > I think rte_rand() is a good option, anyway this can be tweaked easily > > once the framework becomes shaped. > > > > Can be done, but do we really want to add more packet generator capability to > testpmd? > > >> > > > } > > > > nb_tx = rte_eth_tx_burst(fs->tx_port, fs->tx_queue, pkts_burst, > > nb_pkt); > > /* > >* Retry if necessary > >*/ > > - if (unlikely(nb_tx < nb_rx) && f
[dpdk-dev] [PATCH 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent
common/octeontx2 will be soon be going away. Also a new DMA driver will
be coming in this place once the rte_dmadev library is in.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS | 6 -
doc/guides/rawdevs/octeontx2_dma.rst| 103 -
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_dma/meson.build | 18 -
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 -
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 -
drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 --
drivers/raw/octeontx2_dma/version.map | 3 -
9 files changed, 1092 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst
delete mode 100644 drivers/raw/octeontx2_dma/meson.build
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c
delete mode 100644 drivers/raw/octeontx2_dma/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..9f9aa37c68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 DMA
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_dma/
-F: doc/guides/rawdevs/octeontx2_dma.rst
-
Marvell OCTEON TX2 EP
M: Radha Mohan Chintakuntla
M: Veerasenareddy Burru
diff --git a/doc/guides/rawdevs/octeontx2_dma.rst
b/doc/guides/rawdevs/octeontx2_dma.rst
deleted file mode 100644
index 6887da5278..00
--- a/doc/guides/rawdevs/octeontx2_dma.rst
+++ /dev/null
@@ -1,103 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-OCTEON TX2 DMA Driver
-=
-
-OCTEON TX2 has an internal DMA unit which can be used by applications to
initiate
-DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End
-Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues.
-Each DMA queue was exposed as a VF function when SRIOV enabled.
-
-Features
-
-
-This DMA PMD supports below 3 modes of memory transfers
-
-#. Internal - OCTEON TX2 DRAM to DRAM without core intervention
-
-#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores
involvement
-
-#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores
involvement
-
-Prerequisites and Compilation procedure
-
- See :doc:`../platform/octeontx2` for setup information.
-
-
-Enabling logs
--
-
-For enabling logs, use the following EAL parameter:
-
-.. code-block:: console
-
- ./your_dma_application --log-level=pmd.raw.octeontx2.dpi,
-
-Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs
-can be enabled which are lower than logging ``level``.
-
-Initialization
---
-
-The number of DMA VFs (queues) enabled can be controlled by setting sysfs
-entry, `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo >
/sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
--
-
-The OCTEON TX2 DPI DMA HW devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring DMA rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to submit DMA
-commands to HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct dpi_rawdev_conf_s conf = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &conf};
-
- conf.chunk_pool = (void *)rte_mempool_create_empty(...);
- rte_mempool_set_ops_byname(conf.chunk_pool,
rte_mbuf_platform_mempool_ops(), NULL);
- rte_mempool_populate_default(conf.chunk_pool);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info, sizeof(conf));
-
-Performing Data Transfer
-
-
-To perform data transfer using OCTEON TX2 DMA rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, dma devices will be probed and popul
[dpdk-dev] [PATCH 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS | 6 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
12 files changed, 2519 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, SDP VF devices will be probed and populated into the
-raw devices. The rawdev ID of the device can be obtained using
-
-* Invoke ``rte_rawdev_get_dev_id("SDPEP:x")`` from the test application
- where x is the VF device's bus id specified in "bus:device.func"(BDF)
- format. Use this index for further rawdev function calls.
-
-* The driver's selftest rawdev API can be used to verify the SDP EP mode
- functional tests which can send/receive the r
[dpdk-dev] [PATCH v3 0/4] app/testpmd: flowgen fixes and improvements
This series fixes a tx retry defect and improves multi-core performance by using per-core variable for flow indexing. v3: split changes and keep original flow generation logic v2: fix assigning ip header cksum Zhihong Wang (4): app/testpmd: fix tx retry in flowgen app/testpmd: use rte_ipv4_cksum in flowgen app/testpmd: record rx_burst and fwd_dropped in flowgen app/testpmd: use per-core variable in flowgen app/test-pmd/flowgen.c | 47 ++- 1 file changed, 14 insertions(+), 33 deletions(-) -- 2.11.0
[dpdk-dev] [PATCH v3 1/4] app/testpmd: fix tx retry in flowgen
Fix tx_pkt number in tx retry logic.
Fixes: bf56fce1fb4 ("app/testpmd: add retry option")
Cc: sta...@dpdk.org
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 3bf6e1ce97..f2e6255c36 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -192,12 +192,12 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
/*
* Retry if necessary
*/
- if (unlikely(nb_tx < nb_rx) && fs->retry_enabled) {
+ if (unlikely(nb_tx < nb_pkt) && fs->retry_enabled) {
retry = 0;
- while (nb_tx < nb_rx && retry++ < burst_tx_retry_num) {
+ while (nb_tx < nb_pkt && retry++ < burst_tx_retry_num) {
rte_delay_us(burst_tx_delay_time);
nb_tx += rte_eth_tx_burst(fs->tx_port, fs->tx_queue,
- &pkts_burst[nb_tx], nb_rx - nb_tx);
+ &pkts_burst[nb_tx], nb_pkt - nb_tx);
}
}
fs->tx_packets += nb_tx;
--
2.11.0
[dpdk-dev] [PATCH v3 2/4] app/testpmd: use rte_ipv4_cksum in flowgen
Use the rte_ipv4_cksum API to replace local ip_sum implementation.
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 25 +
1 file changed, 1 insertion(+), 24 deletions(-)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index f2e6255c36..96d0cc79df 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -53,28 +53,6 @@ static struct rte_ether_addr cfg_ether_dst =
#define IP_DEFTTL 64 /* from RFC 1340. */
-/* Use this type to inform GCC that ip_sum violates aliasing rules. */
-typedef unaligned_uint16_t alias_int16_t __attribute__((__may_alias__));
-
-static inline uint16_t
-ip_sum(const alias_int16_t *hdr, int hdr_len)
-{
- uint32_t sum = 0;
-
- while (hdr_len > 1)
- {
- sum += *hdr++;
- if (sum & 0x8000)
- sum = (sum & 0x) + (sum >> 16);
- hdr_len -= 2;
- }
-
- while (sum >> 16)
- sum = (sum & 0x) + (sum >> 16);
-
- return ~sum;
-}
-
/*
* Multi-flow generation mode.
*
@@ -160,8 +138,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
next_flow);
ip_hdr->total_length= RTE_CPU_TO_BE_16(pkt_size -
sizeof(*eth_hdr));
- ip_hdr->hdr_checksum= ip_sum((const alias_int16_t
*)ip_hdr,
-sizeof(*ip_hdr));
+ ip_hdr->hdr_checksum= rte_ipv4_cksum(ip_hdr);
/* Initialize UDP header. */
udp_hdr = (struct rte_udp_hdr *)(ip_hdr + 1);
--
2.11.0
[dpdk-dev] [PATCH v3 3/4] app/testpmd: record rx_burst and fwd_dropped in flowgen
Call inc_rx_burst_stats for rx operation, and record fwd_dropped.
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 96d0cc79df..229794ee9c 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -87,6 +87,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
/* Receive a burst of packets and discard them. */
nb_rx = rte_eth_rx_burst(fs->rx_port, fs->rx_queue, pkts_burst,
nb_pkt_per_burst);
+ inc_rx_burst_stats(fs, nb_rx);
fs->rx_packets += nb_rx;
for (i = 0; i < nb_rx; i++)
@@ -186,6 +187,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
while (next_flow < 0)
next_flow += cfg_n_flows;
+ fs->fwd_dropped += nb_pkt - nb_tx;
do {
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_pkt);
--
2.11.0
[dpdk-dev] [PATCH v3 4/4] app/testpmd: use per-core variable in flowgen
Use per-core variable for flow indexing to solve cache contention in
multi-core scenarios.
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 229794ee9c..fc9dae4ab3 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -51,6 +51,8 @@ static struct rte_ether_addr cfg_ether_src =
static struct rte_ether_addr cfg_ether_dst =
{{ 0x00, 0x01, 0x02, 0x03, 0x04, 0x01 }};
+RTE_DEFINE_PER_LCORE(int, _next_flow);
+
#define IP_DEFTTL 64 /* from RFC 1340. */
/*
@@ -80,7 +82,6 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
uint32_t retry;
uint64_t tx_offloads;
uint64_t start_tsc = 0;
- static int next_flow = 0;
get_start_cycles(&start_tsc);
@@ -136,7 +137,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
ip_hdr->packet_id = 0;
ip_hdr->src_addr= rte_cpu_to_be_32(cfg_ip_src);
ip_hdr->dst_addr= rte_cpu_to_be_32(cfg_ip_dst +
- next_flow);
+ RTE_PER_LCORE(_next_flow));
ip_hdr->total_length= RTE_CPU_TO_BE_16(pkt_size -
sizeof(*eth_hdr));
ip_hdr->hdr_checksum= rte_ipv4_cksum(ip_hdr);
@@ -163,7 +164,8 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
}
pkts_burst[nb_pkt] = pkt;
- next_flow = (next_flow + 1) % cfg_n_flows;
+ RTE_PER_LCORE(_next_flow) = (RTE_PER_LCORE(_next_flow) + 1) %
+ cfg_n_flows;
}
nb_tx = rte_eth_tx_burst(fs->tx_port, fs->tx_queue, pkts_burst, nb_pkt);
@@ -183,9 +185,9 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
inc_tx_burst_stats(fs, nb_tx);
if (unlikely(nb_tx < nb_pkt)) {
/* Back out the flow counter. */
- next_flow -= (nb_pkt - nb_tx);
- while (next_flow < 0)
- next_flow += cfg_n_flows;
+ RTE_PER_LCORE(_next_flow) -= (nb_pkt - nb_tx);
+ while (RTE_PER_LCORE(_next_flow) < 0)
+ RTE_PER_LCORE(_next_flow) += cfg_n_flows;
fs->fwd_dropped += nb_pkt - nb_tx;
do {
--
2.11.0
[dpdk-dev] [PATCH v4 0/4] security: Improve inline fast path routines
Improvements to Inline inbound and outbound processing fast path routines rte_security_set_pkt_metadata() and rte_security_get_userdata() to make them inline functions and also provide mechanism for drivers to support fast userdata and metadata access instead of driver specific per-pkt function callbacks. This series updates requirements of mbuf fields to be updated for outbound inline processing. Nithin Dabilpuram (4): security: enforce semantics for Tx inline processing security: add option for faster udata or mdata access examples/ipsec-secgw: update event mode inline path doc: remove deprecation notice for security fast path change v4: - Removed entry from deprecation notice. - Fixed issue with rte_security_set_pkt_metadata() to pass instance instead of device ptr to non-inline C function. v3: - Rebased and fixed compilation issue with rte_security_get_userdata() on 32-bit platform - Updated l2_len on patch 3/3 only for outbound. v2: - Remove restrictions on rte_security_set_pkt_metadata() w.r.t pkt content - Add inline functions for rte_security_set_pkt_metadata() and rte_security_get_userdata() and also faster mdata, udata access via patch 2/3 doc/guides/nics/features.rst | 2 ++ doc/guides/rel_notes/deprecation.rst | 4 --- examples/ipsec-secgw/ipsec-secgw.c | 2 ++ examples/ipsec-secgw/ipsec_worker.c | 41 +++--- lib/mbuf/rte_mbuf_core.h | 2 ++ lib/security/rte_security.c | 8 +++--- lib/security/rte_security.h | 48 +--- lib/security/version.map | 2 ++ 8 files changed, 83 insertions(+), 26 deletions(-) -- 2.8.4
[dpdk-dev] [PATCH v4 1/4] security: enforce semantics for Tx inline processing
Not all net PMD's/HW can parse packet and identify L2 header and
L3 header locations on Tx. This is inline with other Tx offloads
requirements such as L3 checksum, L4 checksum offload, etc,
where mbuf.l2_len, mbuf.l3_len etc, needs to be set for HW to be
able to generate checksum. Since Inline IPSec is also such a Tx
offload, some PMD's at least need mbuf.l2_len to be valid to
find L3 header and perform Outbound IPSec processing.
Hence, this patch updates documentation to enforce setting
mbuf.l2_len while setting PKT_TX_SEC_OFFLOAD in mbuf.ol_flags
for Inline IPSec Crypto / Protocol offload processing to
work on Tx.
Signed-off-by: Nithin Dabilpuram
---
doc/guides/nics/features.rst | 2 ++
lib/mbuf/rte_mbuf_core.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst
index a96e12d..4fce8cd 100644
--- a/doc/guides/nics/features.rst
+++ b/doc/guides/nics/features.rst
@@ -430,6 +430,7 @@ of protocol operations. See Security library and PMD
documentation for more deta
* **[uses] rte_eth_rxconf,rte_eth_rxmode**:
``offloads:DEV_RX_OFFLOAD_SECURITY``,
* **[uses] rte_eth_txconf,rte_eth_txmode**:
``offloads:DEV_TX_OFFLOAD_SECURITY``.
+* **[uses] mbuf**: ``mbuf.l2_len``.
* **[implements] rte_security_ops**: ``session_create``, ``session_update``,
``session_stats_get``, ``session_destroy``, ``set_pkt_metadata``,
``capabilities_get``.
* **[provides] rte_eth_dev_info**:
``rx_offload_capa,rx_queue_offload_capa:DEV_RX_OFFLOAD_SECURITY``,
@@ -451,6 +452,7 @@ protocol operations. See security library and PMD
documentation for more details
* **[uses] rte_eth_rxconf,rte_eth_rxmode**:
``offloads:DEV_RX_OFFLOAD_SECURITY``,
* **[uses] rte_eth_txconf,rte_eth_txmode**:
``offloads:DEV_TX_OFFLOAD_SECURITY``.
+* **[uses] mbuf**: ``mbuf.l2_len``.
* **[implements] rte_security_ops**: ``session_create``, ``session_update``,
``session_stats_get``, ``session_destroy``, ``set_pkt_metadata``,
``get_userdata``,
``capabilities_get``.
diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index bb38d7f..9d8e3dd 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -228,6 +228,8 @@ extern "C" {
/**
* Request security offload processing on the TX packet.
+ * To use Tx security offload, the user needs to fill l2_len in mbuf
+ * indicating L2 header size and where L3 header starts.
*/
#define PKT_TX_SEC_OFFLOAD (1ULL << 43)
--
2.8.4
[dpdk-dev] [PATCH v4 2/4] security: add option for faster udata or mdata access
Currently rte_security_set_pkt_metadata() and rte_security_get_userdata()
methods to set pkt metadata on Inline outbound and get userdata
after Inline inbound processing is always driver specific callbacks.
For drivers that do not have much to do in the callbacks but just
to update metadata in rte_security dynamic field and get userdata
from rte_security dynamic field, having to just to PMD specific
callback is costly per packet operation. This patch provides
a mechanism to do the same in inline function and avoid function
pointer jump if a driver supports the same.
Signed-off-by: Nithin Dabilpuram
---
lib/security/rte_security.c | 8
lib/security/rte_security.h | 48 +
lib/security/version.map| 2 ++
3 files changed, 50 insertions(+), 8 deletions(-)
diff --git a/lib/security/rte_security.c b/lib/security/rte_security.c
index e8116d5..fe81ed3 100644
--- a/lib/security/rte_security.c
+++ b/lib/security/rte_security.c
@@ -122,9 +122,9 @@ rte_security_session_destroy(struct rte_security_ctx
*instance,
}
int
-rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
- struct rte_security_session *sess,
- struct rte_mbuf *m, void *params)
+__rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
+ struct rte_security_session *sess,
+ struct rte_mbuf *m, void *params)
{
#ifdef RTE_DEBUG
RTE_PTR_OR_ERR_RET(sess, -EINVAL);
@@ -137,7 +137,7 @@ rte_security_set_pkt_metadata(struct rte_security_ctx
*instance,
}
void *
-rte_security_get_userdata(struct rte_security_ctx *instance, uint64_t md)
+__rte_security_get_userdata(struct rte_security_ctx *instance, uint64_t md)
{
void *userdata = NULL;
diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 88d31de..1f73dee 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -71,8 +71,18 @@ struct rte_security_ctx {
/**< Pointer to security ops for the device */
uint16_t sess_cnt;
/**< Number of sessions attached to this context */
+ uint32_t flags;
+ /**< Flags for security context */
};
+#define RTE_SEC_CTX_F_FAST_SET_MDATA 0x0001
+/**< Driver uses fast metadata update without using driver specific callback */
+
+#define RTE_SEC_CTX_F_FAST_GET_UDATA 0x0002
+/**< Driver provides udata using fast method without using driver specific
+ * callback.
+ */
+
/**
* IPSEC tunnel parameters
*
@@ -493,6 +503,12 @@ static inline bool
rte_security_dynfield_is_registered(void)
return rte_security_dynfield_offset >= 0;
}
+/** Function to call PMD specific function pointer set_pkt_metadata() */
+__rte_experimental
+extern int __rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
+ struct rte_security_session *sess,
+ struct rte_mbuf *m, void *params);
+
/**
* Updates the buffer with device-specific defined metadata
*
@@ -506,10 +522,26 @@ static inline bool
rte_security_dynfield_is_registered(void)
* - On success, zero.
* - On failure, a negative value.
*/
-int
+static inline int
rte_security_set_pkt_metadata(struct rte_security_ctx *instance,
struct rte_security_session *sess,
- struct rte_mbuf *mb, void *params);
+ struct rte_mbuf *mb, void *params)
+{
+ /* Fast Path */
+ if (instance->flags & RTE_SEC_CTX_F_FAST_SET_MDATA) {
+ *rte_security_dynfield(mb) =
+ (rte_security_dynfield_t)(sess->sess_private_data);
+ return 0;
+ }
+
+ /* Jump to PMD specific function pointer */
+ return __rte_security_set_pkt_metadata(instance, sess, mb, params);
+}
+
+/** Function to call PMD specific function pointer get_userdata() */
+__rte_experimental
+extern void *__rte_security_get_userdata(struct rte_security_ctx *instance,
+uint64_t md);
/**
* Get userdata associated with the security session. Device specific metadata
@@ -529,8 +561,16 @@ rte_security_set_pkt_metadata(struct rte_security_ctx
*instance,
* - On failure, NULL
*/
__rte_experimental
-void *
-rte_security_get_userdata(struct rte_security_ctx *instance, uint64_t md);
+static inline void *
+rte_security_get_userdata(struct rte_security_ctx *instance, uint64_t md)
+{
+ /* Fast Path */
+ if (instance->flags & RTE_SEC_CTX_F_FAST_GET_UDATA)
+ return (void *)(uintptr_t)md;
+
+ /* Jump to PMD specific function pointer */
+ return __rte_security_get_userdata(instance, md);
+}
/**
* Attach a session to a symmetric crypto operation
diff --git a/lib/security/version.map b/lib/security/version.map
index 2277555..e1c8148 100644
--- a/lib/security/version.map
+
[dpdk-dev] [PATCH v4 3/4] examples/ipsec-secgw: update event mode inline path
Update mbuf.l2_len with L2 header size for outbound
inline processing.
This patch also fixes a bug in arg parsing.
Signed-off-by: Nithin Dabilpuram
---
examples/ipsec-secgw/ipsec-secgw.c | 2 ++
examples/ipsec-secgw/ipsec_worker.c | 41 -
2 files changed, 29 insertions(+), 14 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c
b/examples/ipsec-secgw/ipsec-secgw.c
index f252d34..7ad94cb 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -1495,6 +1495,8 @@ parse_portmask(const char *portmask)
char *end = NULL;
unsigned long pm;
+ errno = 0;
+
/* parse hexadecimal string */
pm = strtoul(portmask, &end, 16);
if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
diff --git a/examples/ipsec-secgw/ipsec_worker.c
b/examples/ipsec-secgw/ipsec_worker.c
index 647e22d..c545497 100644
--- a/examples/ipsec-secgw/ipsec_worker.c
+++ b/examples/ipsec-secgw/ipsec_worker.c
@@ -12,6 +12,11 @@
#include "ipsec-secgw.h"
#include "ipsec_worker.h"
+struct port_drv_mode_data {
+ struct rte_security_session *sess;
+ struct rte_security_ctx *ctx;
+};
+
static inline enum pkt_type
process_ipsec_get_pkt_type(struct rte_mbuf *pkt, uint8_t **nlp)
{
@@ -60,7 +65,8 @@ ipsec_event_pre_forward(struct rte_mbuf *m, unsigned int
port_id)
static inline void
prepare_out_sessions_tbl(struct sa_ctx *sa_out,
- struct rte_security_session **sess_tbl, uint16_t size)
+struct port_drv_mode_data *data,
+uint16_t size)
{
struct rte_ipsec_session *pri_sess;
struct ipsec_sa *sa;
@@ -95,9 +101,10 @@ prepare_out_sessions_tbl(struct sa_ctx *sa_out,
}
/* Use only first inline session found for a given port */
- if (sess_tbl[sa->portid])
+ if (data[sa->portid].sess)
continue;
- sess_tbl[sa->portid] = pri_sess->security.ses;
+ data[sa->portid].sess = pri_sess->security.ses;
+ data[sa->portid].ctx = pri_sess->security.ctx;
}
}
@@ -356,9 +363,8 @@ process_ipsec_ev_outbound(struct ipsec_ctx *ctx, struct
route_table *rt,
goto drop_pkt_and_exit;
}
- if (sess->security.ol_flags & RTE_SECURITY_TX_OLOAD_NEED_MDATA)
- *(struct rte_security_session **)rte_security_dynfield(pkt) =
- sess->security.ses;
+ rte_security_set_pkt_metadata(sess->security.ctx,
+ sess->security.ses, pkt, NULL);
/* Mark the packet for Tx security offload */
pkt->ol_flags |= PKT_TX_SEC_OFFLOAD;
@@ -367,6 +373,9 @@ process_ipsec_ev_outbound(struct ipsec_ctx *ctx, struct
route_table *rt,
port_id = sa->portid;
send_pkt:
+ /* Provide L2 len for Outbound processing */
+ pkt->l2_len = RTE_ETHER_HDR_LEN;
+
/* Update mac addresses */
update_mac_addrs(pkt, port_id);
@@ -398,7 +407,7 @@ static void
ipsec_wrkr_non_burst_int_port_drv_mode(struct eh_event_link_info *links,
uint8_t nb_links)
{
- struct rte_security_session *sess_tbl[RTE_MAX_ETHPORTS] = { NULL };
+ struct port_drv_mode_data data[RTE_MAX_ETHPORTS];
unsigned int nb_rx = 0;
struct rte_mbuf *pkt;
struct rte_event ev;
@@ -412,6 +421,8 @@ ipsec_wrkr_non_burst_int_port_drv_mode(struct
eh_event_link_info *links,
return;
}
+ memset(&data, 0, sizeof(struct port_drv_mode_data));
+
/* Get core ID */
lcore_id = rte_lcore_id();
@@ -422,8 +433,8 @@ ipsec_wrkr_non_burst_int_port_drv_mode(struct
eh_event_link_info *links,
* Prepare security sessions table. In outbound driver mode
* we always use first session configured for a given port
*/
- prepare_out_sessions_tbl(socket_ctx[socket_id].sa_out, sess_tbl,
- RTE_MAX_ETHPORTS);
+ prepare_out_sessions_tbl(socket_ctx[socket_id].sa_out, data,
+RTE_MAX_ETHPORTS);
RTE_LOG(INFO, IPSEC,
"Launching event mode worker (non-burst - Tx internal port - "
@@ -460,19 +471,21 @@ ipsec_wrkr_non_burst_int_port_drv_mode(struct
eh_event_link_info *links,
if (!is_unprotected_port(port_id)) {
- if (unlikely(!sess_tbl[port_id])) {
+ if (unlikely(!data[port_id].sess)) {
rte_pktmbuf_free(pkt);
continue;
}
/* Save security session */
- if (rte_security_dynfield_is_registered())
- *(struct rte_security_session **)
- rte_security_dynfield(pkt) =
- sess_t
[dpdk-dev] [PATCH v4 4/4] doc: remove deprecation notice for security fast path change
Remove deprecation notice for security fast path change. Signed-off-by: Nithin Dabilpuram --- doc/guides/rel_notes/deprecation.rst | 4 1 file changed, 4 deletions(-) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index 76a4abf..2e38a36 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -279,10 +279,6 @@ Deprecation Notices content. On Linux and FreeBSD, supported prior to DPDK 20.11, original structure will be kept until DPDK 21.11. -* security: The functions ``rte_security_set_pkt_metadata`` and - ``rte_security_get_userdata`` will be made inline functions and additional - flags will be added in structure ``rte_security_ctx`` in DPDK 21.11. - * cryptodev: The structure ``rte_crypto_op`` would be updated to reduce reserved bytes to 2 (from 3), and use 1 byte to indicate warnings and other information from the crypto/security operation. This field will be used to -- 2.8.4
[dpdk-dev] [PATCH v2 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent
common/octeontx2 will be soon be going away. Also a new DMA driver will
be coming in this place once the rte_dmadev library is in.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst| 1 -
doc/guides/rawdevs/octeontx2_dma.rst| 103 -
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_dma/meson.build | 18 -
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 -
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 -
drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 --
drivers/raw/octeontx2_dma/version.map | 3 -
10 files changed, 1093 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst
delete mode 100644 drivers/raw/octeontx2_dma/meson.build
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c
delete mode 100644 drivers/raw/octeontx2_dma/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..9f9aa37c68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 DMA
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_dma/
-F: doc/guides/rawdevs/octeontx2_dma.rst
-
Marvell OCTEON TX2 EP
M: Radha Mohan Chintakuntla
M: Veerasenareddy Burru
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 7fbae40ea9..228d4a7743 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,5 +17,4 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_dma
octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_dma.rst
b/doc/guides/rawdevs/octeontx2_dma.rst
deleted file mode 100644
index 6887da5278..00
--- a/doc/guides/rawdevs/octeontx2_dma.rst
+++ /dev/null
@@ -1,103 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-OCTEON TX2 DMA Driver
-=
-
-OCTEON TX2 has an internal DMA unit which can be used by applications to
initiate
-DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End
-Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues.
-Each DMA queue was exposed as a VF function when SRIOV enabled.
-
-Features
-
-
-This DMA PMD supports below 3 modes of memory transfers
-
-#. Internal - OCTEON TX2 DRAM to DRAM without core intervention
-
-#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores
involvement
-
-#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores
involvement
-
-Prerequisites and Compilation procedure
-
- See :doc:`../platform/octeontx2` for setup information.
-
-
-Enabling logs
--
-
-For enabling logs, use the following EAL parameter:
-
-.. code-block:: console
-
- ./your_dma_application --log-level=pmd.raw.octeontx2.dpi,
-
-Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs
-can be enabled which are lower than logging ``level``.
-
-Initialization
---
-
-The number of DMA VFs (queues) enabled can be controlled by setting sysfs
-entry, `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo >
/sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
--
-
-The OCTEON TX2 DPI DMA HW devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring DMA rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to submit DMA
-commands to HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct dpi_rawdev_conf_s conf = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &conf};
-
- conf.chunk_pool = (void *)rte_mempool_create_empty(...);
- rte_mempool_set_ops_byname(conf.chunk_pool,
rte_mbuf_platform_mempool_ops(), NULL);
- rte_mempoo
[dpdk-dev] [PATCH v2 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
13 files changed, 2520 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, SDP VF devices will be probed and populated into the
-raw dev
[dpdk-dev] [PATCH v4 0/4] app/testpmd: flowgen fixes and improvements
This series fixes a tx retry defect and improves multi-core performance by using per-core variable for flow indexing. v4: use loop local variable to improve performance v3: split changes and keep original flow generation logic v2: fix assigning ip header cksum Zhihong Wang (4): app/testpmd: fix tx retry in flowgen app/testpmd: use rte_ipv4_cksum in flowgen app/testpmd: record rx_burst and fwd_dropped in flowgen app/testpmd: use per-core variable in flowgen app/test-pmd/flowgen.c | 47 ++- 1 file changed, 14 insertions(+), 33 deletions(-) -- 2.11.0
[dpdk-dev] [PATCH v4 1/4] app/testpmd: fix tx retry in flowgen
Fix tx_pkt number in tx retry logic.
Fixes: bf56fce1fb4 ("app/testpmd: add retry option")
Cc: sta...@dpdk.org
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 3bf6e1ce97..f2e6255c36 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -192,12 +192,12 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
/*
* Retry if necessary
*/
- if (unlikely(nb_tx < nb_rx) && fs->retry_enabled) {
+ if (unlikely(nb_tx < nb_pkt) && fs->retry_enabled) {
retry = 0;
- while (nb_tx < nb_rx && retry++ < burst_tx_retry_num) {
+ while (nb_tx < nb_pkt && retry++ < burst_tx_retry_num) {
rte_delay_us(burst_tx_delay_time);
nb_tx += rte_eth_tx_burst(fs->tx_port, fs->tx_queue,
- &pkts_burst[nb_tx], nb_rx - nb_tx);
+ &pkts_burst[nb_tx], nb_pkt - nb_tx);
}
}
fs->tx_packets += nb_tx;
--
2.11.0
[dpdk-dev] [PATCH v4 2/4] app/testpmd: use rte_ipv4_cksum in flowgen
Use the rte_ipv4_cksum API to replace local ip_sum implementation.
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 25 +
1 file changed, 1 insertion(+), 24 deletions(-)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index f2e6255c36..96d0cc79df 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -53,28 +53,6 @@ static struct rte_ether_addr cfg_ether_dst =
#define IP_DEFTTL 64 /* from RFC 1340. */
-/* Use this type to inform GCC that ip_sum violates aliasing rules. */
-typedef unaligned_uint16_t alias_int16_t __attribute__((__may_alias__));
-
-static inline uint16_t
-ip_sum(const alias_int16_t *hdr, int hdr_len)
-{
- uint32_t sum = 0;
-
- while (hdr_len > 1)
- {
- sum += *hdr++;
- if (sum & 0x8000)
- sum = (sum & 0x) + (sum >> 16);
- hdr_len -= 2;
- }
-
- while (sum >> 16)
- sum = (sum & 0x) + (sum >> 16);
-
- return ~sum;
-}
-
/*
* Multi-flow generation mode.
*
@@ -160,8 +138,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
next_flow);
ip_hdr->total_length= RTE_CPU_TO_BE_16(pkt_size -
sizeof(*eth_hdr));
- ip_hdr->hdr_checksum= ip_sum((const alias_int16_t
*)ip_hdr,
-sizeof(*ip_hdr));
+ ip_hdr->hdr_checksum= rte_ipv4_cksum(ip_hdr);
/* Initialize UDP header. */
udp_hdr = (struct rte_udp_hdr *)(ip_hdr + 1);
--
2.11.0
[dpdk-dev] [PATCH v4 3/4] app/testpmd: record rx_burst and fwd_dropped in flowgen
Call inc_rx_burst_stats for rx operation, and record fwd_dropped.
Signed-off-by: Zhihong Wang
---
app/test-pmd/flowgen.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c
index 96d0cc79df..229794ee9c 100644
--- a/app/test-pmd/flowgen.c
+++ b/app/test-pmd/flowgen.c
@@ -87,6 +87,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
/* Receive a burst of packets and discard them. */
nb_rx = rte_eth_rx_burst(fs->rx_port, fs->rx_queue, pkts_burst,
nb_pkt_per_burst);
+ inc_rx_burst_stats(fs, nb_rx);
fs->rx_packets += nb_rx;
for (i = 0; i < nb_rx; i++)
@@ -186,6 +187,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs)
while (next_flow < 0)
next_flow += cfg_n_flows;
+ fs->fwd_dropped += nb_pkt - nb_tx;
do {
rte_pktmbuf_free(pkts_burst[nb_tx]);
} while (++nb_tx < nb_pkt);
--
2.11.0
[dpdk-dev] [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen
Use per-core variable for flow indexing to solve cache contention in multi-core scenarios. v4: use loop local variable to improve performance Signed-off-by: Zhihong Wang --- app/test-pmd/flowgen.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/app/test-pmd/flowgen.c b/app/test-pmd/flowgen.c index 229794ee9c..b541485304 100644 --- a/app/test-pmd/flowgen.c +++ b/app/test-pmd/flowgen.c @@ -53,6 +53,8 @@ static struct rte_ether_addr cfg_ether_dst = #define IP_DEFTTL 64 /* from RFC 1340. */ +RTE_DEFINE_PER_LCORE(int, _next_flow); + /* * Multi-flow generation mode. * @@ -80,7 +82,7 @@ pkt_burst_flow_gen(struct fwd_stream *fs) uint32_t retry; uint64_t tx_offloads; uint64_t start_tsc = 0; - static int next_flow = 0; + int next_flow = RTE_PER_LCORE(_next_flow); get_start_cycles(&start_tsc); @@ -193,6 +195,8 @@ pkt_burst_flow_gen(struct fwd_stream *fs) } while (++nb_tx < nb_pkt); } + RTE_PER_LCORE(_next_flow) = next_flow; + get_end_cycles(fs, start_tsc); } -- 2.11.0
[dpdk-dev] [PATCH v2 00/10] new features for ipsec and security libraries
Add support for: TSO, NAT-T/UDP encapsulation, ESN AES_CCM, CHACHA20_POLY1305 and AES_GMAC SA telemetry mbuf offload flags Initial SQN value Radu Nicolau (10): security: add support for TSO on IPsec session security: add UDP params for IPsec NAT-T security: add ESN field to ipsec_xform mbuf: add IPsec ESP tunnel type ipsec: add support for AEAD algorithms ipsec: add transmit segmentation offload support ipsec: add support for NAT-T ipsec: add support for SA telemetry ipsec: add support for initial SQN value ipsec: add ol_flags support lib/ipsec/crypto.h | 137 lib/ipsec/esp_inb.c | 88 +++- lib/ipsec/esp_outb.c| 262 +++ lib/ipsec/iph.h | 23 +- lib/ipsec/meson.build | 2 +- lib/ipsec/rte_ipsec.h | 11 + lib/ipsec/rte_ipsec_sa.h| 11 +- lib/ipsec/sa.c | 406 ++-- lib/ipsec/sa.h | 43 lib/ipsec/version.map | 9 + lib/mbuf/rte_mbuf_core.h| 1 + lib/security/rte_security.h | 31 +++ 12 files changed, 951 insertions(+), 73 deletions(-) -- 2.25.1
[dpdk-dev] [PATCH v2 01/10] security: add support for TSO on IPsec session
Allow user to provision a per security session maximum segment size
(MSS) for use when Transmit Segmentation Offload (TSO) is supported.
The MSS value will be used when PKT_TX_TCP_SEG or PKT_TX_UDP_SEG
ol_flags are specified in mbuf.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/security/rte_security.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 88d31de0a6..45896a77d0 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -181,6 +181,19 @@ struct rte_security_ipsec_sa_options {
* * 0: Disable per session security statistics collection for this SA.
*/
uint32_t stats : 1;
+
+ /** Transmit Segmentation Offload (TSO)
+*
+* * 1: Enable per session security TSO support, use MSS value provide
+* in IPsec security session when PKT_TX_TCP_SEG or PKT_TX_UDP_SEG
+* ol_flags are set in mbuf.
+* this SA, if supported by the driver.
+* * 0: No TSO support for offload IPsec packets. Hardware will not
+* attempt to segment packet, and packet transmission will fail if
+* larger than MTU of interface
+*/
+ uint32_t tso : 1;
+
};
/** IPSec security association direction */
@@ -217,6 +230,8 @@ struct rte_security_ipsec_xform {
/**< Anti replay window size to enable sequence replay attack handling.
* replay checking is disabled if the window size is 0.
*/
+ uint32_t mss;
+ /**< IPsec payload Maximum Segment Size */
};
/**
--
2.25.1
[dpdk-dev] [PATCH v2 02/10] security: add UDP params for IPsec NAT-T
Add support for specifying UDP port params for UDP encapsulation option.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/security/rte_security.h | 8
1 file changed, 8 insertions(+)
diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 45896a77d0..03572b10ab 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -112,6 +112,12 @@ struct rte_security_ipsec_tunnel_param {
};
};
+struct rte_security_ipsec_udp_param {
+
+ uint16_t sport;
+ uint16_t dport;
+};
+
/**
* IPsec Security Association option flags
*/
@@ -224,6 +230,8 @@ struct rte_security_ipsec_xform {
/**< IPsec SA Mode - transport/tunnel */
struct rte_security_ipsec_tunnel_param tunnel;
/**< Tunnel parameters, NULL for transport mode */
+ struct rte_security_ipsec_udp_param udp;
+ /**< UDP parameters, ignored when udp_encap option not specified */
uint64_t esn_soft_limit;
/**< ESN for which the overflow event need to be raised */
uint32_t replay_win_sz;
--
2.25.1
[dpdk-dev] [PATCH v2 03/10] security: add ESN field to ipsec_xform
Update ipsec_xform definition to include ESN field.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/security/rte_security.h | 8
1 file changed, 8 insertions(+)
diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h
index 03572b10ab..702de58b48 100644
--- a/lib/security/rte_security.h
+++ b/lib/security/rte_security.h
@@ -240,6 +240,14 @@ struct rte_security_ipsec_xform {
*/
uint32_t mss;
/**< IPsec payload Maximum Segment Size */
+ union {
+ uint64_t value;
+ struct {
+ uint32_t low;
+ uint32_t hi;
+ };
+ } esn;
+ /**< Extended Sequence Number */
};
/**
--
2.25.1
[dpdk-dev] [PATCH v2 04/10] mbuf: add IPsec ESP tunnel type
Add tunnel type for IPsec ESP tunnels
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/mbuf/rte_mbuf_core.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index bb38d7f581..a4d95deee6 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -253,6 +253,7 @@ extern "C" {
#define PKT_TX_TUNNEL_MPLSINUDP (0x5ULL << 45)
#define PKT_TX_TUNNEL_VXLAN_GPE (0x6ULL << 45)
#define PKT_TX_TUNNEL_GTP (0x7ULL << 45)
+#define PKT_TX_TUNNEL_ESP (0x8ULL << 45)
/**
* Generic IP encapsulated tunnel type, used for TSO and checksum offload.
* It can be used for tunnels which are not standards or listed above.
--
2.25.1
[dpdk-dev] [PATCH v2 05/10] ipsec: add support for AEAD algorithms
Add support for AES_CCM, CHACHA20_POLY1305 and AES_GMAC.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/crypto.h | 137 +++
lib/ipsec/esp_inb.c | 66 -
lib/ipsec/esp_outb.c | 70 +-
lib/ipsec/sa.c | 54 +++--
lib/ipsec/sa.h | 6 ++
5 files changed, 322 insertions(+), 11 deletions(-)
diff --git a/lib/ipsec/crypto.h b/lib/ipsec/crypto.h
index 3d03034590..598ee9cebd 100644
--- a/lib/ipsec/crypto.h
+++ b/lib/ipsec/crypto.h
@@ -21,6 +21,37 @@ struct aesctr_cnt_blk {
uint32_t cnt;
} __rte_packed;
+ /*
+ * CHACHA20-POLY1305 devices have some specific requirements
+ * for IV and AAD formats.
+ * Ideally that to be done by the driver itself.
+ */
+
+struct aead_chacha20_poly1305_iv {
+ uint32_t salt;
+ uint64_t iv;
+ uint32_t cnt;
+} __rte_packed;
+
+struct aead_chacha20_poly1305_aad {
+ uint32_t spi;
+ /*
+* RFC 4106, section 5:
+* Two formats of the AAD are defined:
+* one for 32-bit sequence numbers, and one for 64-bit ESN.
+*/
+ union {
+ uint32_t u32[2];
+ uint64_t u64;
+ } sqn;
+ uint32_t align0; /* align to 16B boundary */
+} __rte_packed;
+
+struct chacha20_poly1305_esph_iv {
+ struct rte_esp_hdr esph;
+ uint64_t iv;
+} __rte_packed;
+
/*
* AES-GCM devices have some specific requirements for IV and AAD formats.
* Ideally that to be done by the driver itself.
@@ -51,6 +82,47 @@ struct gcm_esph_iv {
uint64_t iv;
} __rte_packed;
+ /*
+ * AES-CCM devices have some specific requirements for IV and AAD formats.
+ * Ideally that to be done by the driver itself.
+ */
+union aead_ccm_salt {
+ uint32_t salt;
+ struct inner {
+ uint8_t salt8[3];
+ uint8_t ccm_flags;
+ } inner;
+} salt_union;
+
+
+struct aead_ccm_iv {
+ uint8_t ccm_flags;
+ uint8_t salt[3];
+ uint64_t iv;
+ uint32_t cnt;
+} __rte_packed;
+
+struct aead_ccm_aad {
+ uint8_t padding[18];
+ uint32_t spi;
+ /*
+* RFC 4309, section 5:
+* Two formats of the AAD are defined:
+* one for 32-bit sequence numbers, and one for 64-bit ESN.
+*/
+ union {
+ uint32_t u32[2];
+ uint64_t u64;
+ } sqn;
+ uint32_t align0; /* align to 16B boundary */
+} __rte_packed;
+
+struct ccm_esph_iv {
+ struct rte_esp_hdr esph;
+ uint64_t iv;
+} __rte_packed;
+
+
static inline void
aes_ctr_cnt_blk_fill(struct aesctr_cnt_blk *ctr, uint64_t iv, uint32_t nonce)
{
@@ -59,6 +131,16 @@ aes_ctr_cnt_blk_fill(struct aesctr_cnt_blk *ctr, uint64_t
iv, uint32_t nonce)
ctr->cnt = rte_cpu_to_be_32(1);
}
+static inline void
+aead_chacha20_poly1305_iv_fill(struct aead_chacha20_poly1305_iv
+ *chacha20_poly1305,
+ uint64_t iv, uint32_t salt)
+{
+ chacha20_poly1305->salt = salt;
+ chacha20_poly1305->iv = iv;
+ chacha20_poly1305->cnt = rte_cpu_to_be_32(1);
+}
+
static inline void
aead_gcm_iv_fill(struct aead_gcm_iv *gcm, uint64_t iv, uint32_t salt)
{
@@ -67,6 +149,21 @@ aead_gcm_iv_fill(struct aead_gcm_iv *gcm, uint64_t iv,
uint32_t salt)
gcm->cnt = rte_cpu_to_be_32(1);
}
+static inline void
+aead_ccm_iv_fill(struct aead_ccm_iv *ccm, uint64_t iv, uint32_t salt)
+{
+ union aead_ccm_salt tsalt;
+
+ tsalt.salt = salt;
+ ccm->ccm_flags = tsalt.inner.ccm_flags;
+ ccm->salt[0] = tsalt.inner.salt8[0];
+ ccm->salt[1] = tsalt.inner.salt8[1];
+ ccm->salt[2] = tsalt.inner.salt8[2];
+ ccm->iv = iv;
+ ccm->cnt = rte_cpu_to_be_32(1);
+}
+
+
/*
* RFC 4106, 5 AAD Construction
* spi and sqn should already be converted into network byte order.
@@ -86,6 +183,25 @@ aead_gcm_aad_fill(struct aead_gcm_aad *aad, rte_be32_t spi,
rte_be64_t sqn,
aad->align0 = 0;
}
+/*
+ * RFC 4309, 5 AAD Construction
+ * spi and sqn should already be converted into network byte order.
+ * Make sure that not used bytes are zeroed.
+ */
+static inline void
+aead_ccm_aad_fill(struct aead_ccm_aad *aad, rte_be32_t spi, rte_be64_t sqn,
+ int esn)
+{
+ aad->spi = spi;
+ if (esn)
+ aad->sqn.u64 = sqn;
+ else {
+ aad->sqn.u32[0] = sqn_low32(sqn);
+ aad->sqn.u32[1] = 0;
+ }
+ aad->align0 = 0;
+}
+
static inline void
gen_iv(uint64_t iv[IPSEC_MAX_IV_QWORD], rte_be64_t sqn)
{
@@ -93,6 +209,27 @@ gen_iv(uint64_t iv[IPSEC_MAX_IV_QWORD], rte_be64_t sqn)
iv[1] = 0;
}
+
+/*
+ * RFC 4106, 5 AAD Construction
+ * spi and sqn should already be converted into network byte order.
+ * Make sure that not used bytes are zeroed.
+ */
+static inline void
+aead_chacha20_poly1305_aad_
[dpdk-dev] [PATCH v2 06/10] ipsec: add transmit segmentation offload support
Add support for transmit segmentation offload to inline crypto processing
mode. This offload is not supported by other offload modes, as at a
minimum it requires inline crypto for IPsec to be supported on the
network interface.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/esp_inb.c | 4 +-
lib/ipsec/esp_outb.c | 115 +++
lib/ipsec/iph.h | 10 +++-
lib/ipsec/sa.c | 6 +++
lib/ipsec/sa.h | 4 ++
5 files changed, 114 insertions(+), 25 deletions(-)
diff --git a/lib/ipsec/esp_inb.c b/lib/ipsec/esp_inb.c
index d66c88f05d..a6ab8fbdd5 100644
--- a/lib/ipsec/esp_inb.c
+++ b/lib/ipsec/esp_inb.c
@@ -668,8 +668,8 @@ trs_process(const struct rte_ipsec_sa *sa, struct rte_mbuf
*mb[],
/* modify packet's layout */
np = trs_process_step2(mb[i], ml[i], hl[i], cofs,
to[i], tl, sqn + k);
- update_trs_l3hdr(sa, np + l2, mb[i]->pkt_len,
- l2, hl[i] - l2, espt[i].next_proto);
+ update_trs_l34hdrs(sa, np + l2, mb[i]->pkt_len,
+ l2, hl[i] - l2, espt[i].next_proto, 0);
/* update mbuf's metadata */
trs_process_step3(mb[i]);
diff --git a/lib/ipsec/esp_outb.c b/lib/ipsec/esp_outb.c
index a3f77469c3..9fc7075796 100644
--- a/lib/ipsec/esp_outb.c
+++ b/lib/ipsec/esp_outb.c
@@ -2,6 +2,8 @@
* Copyright(c) 2018-2020 Intel Corporation
*/
+#include
+
#include
#include
#include
@@ -156,11 +158,20 @@ outb_tun_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
/* number of bytes to encrypt */
clen = plen + sizeof(*espt);
- clen = RTE_ALIGN_CEIL(clen, sa->pad_align);
+
+ /* We don't need to pad/ailgn packet when using TSO offload */
+ if (likely(!(mb->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_UDP_SEG
+ clen = RTE_ALIGN_CEIL(clen, sa->pad_align);
+
/* pad length + esp tail */
pdlen = clen - plen;
- tlen = pdlen + sa->icv_len + sqh_len;
+
+ /* We don't append ICV length when using TSO offload */
+ if (likely(!(mb->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_UDP_SEG
+ tlen = pdlen + sa->icv_len + sqh_len;
+ else
+ tlen = pdlen + sqh_len;
/* do append and prepend */
ml = rte_pktmbuf_lastseg(mb);
@@ -337,6 +348,7 @@ outb_trs_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
char *ph, *pt;
uint64_t *iv;
uint32_t l2len, l3len;
+ uint8_t tso = mb->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_UDP_SEG) ? 1 : 0;
l2len = mb->l2_len;
l3len = mb->l3_len;
@@ -349,11 +361,19 @@ outb_trs_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
/* number of bytes to encrypt */
clen = plen + sizeof(*espt);
- clen = RTE_ALIGN_CEIL(clen, sa->pad_align);
+
+ /* We don't need to pad/ailgn packet when using TSO offload */
+ if (likely(!tso))
+ clen = RTE_ALIGN_CEIL(clen, sa->pad_align);
/* pad length + esp tail */
pdlen = clen - plen;
- tlen = pdlen + sa->icv_len + sqh_len;
+
+ /* We don't append ICV length when using TSO offload */
+ if (likely(!tso))
+ tlen = pdlen + sa->icv_len + sqh_len;
+ else
+ tlen = pdlen + sqh_len;
/* do append and insert */
ml = rte_pktmbuf_lastseg(mb);
@@ -375,8 +395,8 @@ outb_trs_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
insert_esph(ph, ph + hlen, uhlen);
/* update ip header fields */
- np = update_trs_l3hdr(sa, ph + l2len, mb->pkt_len - sqh_len, l2len,
- l3len, IPPROTO_ESP);
+ np = update_trs_l34hdrs(sa, ph + l2len, mb->pkt_len - sqh_len, l2len,
+ l3len, IPPROTO_ESP, tso);
/* update spi, seqn and iv */
esph = (struct rte_esp_hdr *)(ph + uhlen);
@@ -651,6 +671,33 @@ inline_outb_mbuf_prepare(const struct rte_ipsec_session
*ss,
}
}
+/* check if packet will exceed MSS and segmentation is required */
+static inline int
+esn_outb_nb_segments(const struct rte_ipsec_sa *sa, struct rte_mbuf *m) {
+ uint16_t segments = 1;
+ uint16_t pkt_l3len = m->pkt_len - m->l2_len;
+
+ /* Only support segmentation for UDP/TCP flows */
+ if (!(m->packet_type & (RTE_PTYPE_L4_UDP | RTE_PTYPE_L4_TCP)))
+ return segments;
+
+ if (sa->tso.enabled && pkt_l3len > sa->tso.mss) {
+ segments = ceil((float)pkt_l3len / sa->tso.mss);
+
+ if (m->packet_type & RTE_PTYPE_L4_TCP) {
+ m->ol_flags |= (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM);
+ m->l4_len = sizeof(struct rte_tcp_hdr);
+ } else {
+ m->ol_flags |= (P
[dpdk-dev] [PATCH v2 07/10] ipsec: add support for NAT-T
Add support for the IPsec NAT-Traversal use case for Tunnel mode
packets.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/iph.h | 13 +
lib/ipsec/rte_ipsec_sa.h | 8 +++-
lib/ipsec/sa.c | 13 -
lib/ipsec/sa.h | 4
4 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/lib/ipsec/iph.h b/lib/ipsec/iph.h
index 2d223199ac..093f86d34a 100644
--- a/lib/ipsec/iph.h
+++ b/lib/ipsec/iph.h
@@ -251,6 +251,7 @@ update_tun_outb_l3hdr(const struct rte_ipsec_sa *sa, void
*outh,
{
struct rte_ipv4_hdr *v4h;
struct rte_ipv6_hdr *v6h;
+ struct rte_udp_hdr *udph;
uint8_t is_outh_ipv4;
if (sa->type & RTE_IPSEC_SATP_MODE_TUNLV4) {
@@ -258,11 +259,23 @@ update_tun_outb_l3hdr(const struct rte_ipsec_sa *sa, void
*outh,
v4h = outh;
v4h->packet_id = pid;
v4h->total_length = rte_cpu_to_be_16(plen - l2len);
+
+ if (sa->type & RTE_IPSEC_SATP_NATT_ENABLE) {
+ udph = (struct rte_udp_hdr *)(v4h + 1);
+ udph->dgram_len = rte_cpu_to_be_16(plen - l2len -
+ (sizeof(*v4h) + sizeof(*udph)));
+ }
} else {
is_outh_ipv4 = 0;
v6h = outh;
v6h->payload_len = rte_cpu_to_be_16(plen - l2len -
sizeof(*v6h));
+
+ if (sa->type & RTE_IPSEC_SATP_NATT_ENABLE) {
+ udph = (struct rte_udp_hdr *)(v6h + 1);
+ udph->dgram_len = rte_cpu_to_be_16(plen - l2len -
+ (sizeof(*v6h) + sizeof(*udph)));
+ }
}
if (sa->type & TUN_HDR_MSK)
diff --git a/lib/ipsec/rte_ipsec_sa.h b/lib/ipsec/rte_ipsec_sa.h
index cf51ad8338..40d1e70d45 100644
--- a/lib/ipsec/rte_ipsec_sa.h
+++ b/lib/ipsec/rte_ipsec_sa.h
@@ -76,6 +76,7 @@ struct rte_ipsec_sa_prm {
* - inbound/outbound
* - mode (TRANSPORT/TUNNEL)
* - for TUNNEL outer IP version (IPv4/IPv6)
+ * - NAT-T UDP encapsulated (TUNNEL mode only)
* - are SA SQN operations 'atomic'
* - ESN enabled/disabled
* ...
@@ -86,7 +87,8 @@ enum {
RTE_SATP_LOG2_PROTO,
RTE_SATP_LOG2_DIR,
RTE_SATP_LOG2_MODE,
- RTE_SATP_LOG2_SQN = RTE_SATP_LOG2_MODE + 2,
+ RTE_SATP_LOG2_NATT = RTE_SATP_LOG2_MODE + 2,
+ RTE_SATP_LOG2_SQN,
RTE_SATP_LOG2_ESN,
RTE_SATP_LOG2_ECN,
RTE_SATP_LOG2_DSCP
@@ -109,6 +111,10 @@ enum {
#define RTE_IPSEC_SATP_MODE_TUNLV4 (1ULL << RTE_SATP_LOG2_MODE)
#define RTE_IPSEC_SATP_MODE_TUNLV6 (2ULL << RTE_SATP_LOG2_MODE)
+#define RTE_IPSEC_SATP_NATT_MASK (1ULL << RTE_SATP_LOG2_NATT)
+#define RTE_IPSEC_SATP_NATT_DISABLE(0ULL << RTE_SATP_LOG2_NATT)
+#define RTE_IPSEC_SATP_NATT_ENABLE (1ULL << RTE_SATP_LOG2_NATT)
+
#define RTE_IPSEC_SATP_SQN_MASK(1ULL << RTE_SATP_LOG2_SQN)
#define RTE_IPSEC_SATP_SQN_RAW (0ULL << RTE_SATP_LOG2_SQN)
#define RTE_IPSEC_SATP_SQN_ATOM(1ULL << RTE_SATP_LOG2_SQN)
diff --git a/lib/ipsec/sa.c b/lib/ipsec/sa.c
index 2ecbbce0a4..8e369e4618 100644
--- a/lib/ipsec/sa.c
+++ b/lib/ipsec/sa.c
@@ -217,6 +217,10 @@ fill_sa_type(const struct rte_ipsec_sa_prm *prm, uint64_t
*type)
} else
return -EINVAL;
+ /* check for UDP encapsulation flag */
+ if (prm->ipsec_xform.options.udp_encap == 1)
+ tp |= RTE_IPSEC_SATP_NATT_ENABLE;
+
/* check for ESN flag */
if (prm->ipsec_xform.options.esn == 0)
tp |= RTE_IPSEC_SATP_ESN_DISABLE;
@@ -372,7 +376,8 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm,
const struct crypto_xform *cxf)
{
static const uint64_t msk = RTE_IPSEC_SATP_DIR_MASK |
- RTE_IPSEC_SATP_MODE_MASK;
+ RTE_IPSEC_SATP_MODE_MASK |
+ RTE_IPSEC_SATP_NATT_MASK;
if (prm->ipsec_xform.options.ecn)
sa->tos_mask |= RTE_IPV4_HDR_ECN_MASK;
@@ -475,10 +480,16 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm,
case (RTE_IPSEC_SATP_DIR_IB | RTE_IPSEC_SATP_MODE_TRANS):
esp_inb_init(sa);
break;
+ case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TUNLV4 |
+ RTE_IPSEC_SATP_NATT_ENABLE):
+ case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TUNLV6 |
+ RTE_IPSEC_SATP_NATT_ENABLE):
case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TUNLV4):
case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TUNLV6):
esp_outb_tun_init(sa, prm);
break;
+ case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TRANS |
+ RTE_IPSEC_SATP_NATT_ENABLE):
[dpdk-dev] [PATCH v2 08/10] ipsec: add support for SA telemetry
Add telemetry support for ipsec SAs
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/esp_inb.c | 1 +
lib/ipsec/esp_outb.c | 12 +-
lib/ipsec/meson.build | 2 +-
lib/ipsec/rte_ipsec.h | 11 ++
lib/ipsec/sa.c| 255 +-
lib/ipsec/sa.h| 21
lib/ipsec/version.map | 9 ++
7 files changed, 305 insertions(+), 6 deletions(-)
diff --git a/lib/ipsec/esp_inb.c b/lib/ipsec/esp_inb.c
index a6ab8fbdd5..8cb4c16302 100644
--- a/lib/ipsec/esp_inb.c
+++ b/lib/ipsec/esp_inb.c
@@ -722,6 +722,7 @@ esp_inb_pkt_process(struct rte_ipsec_sa *sa, struct
rte_mbuf *mb[],
/* process packets, extract seq numbers */
k = process(sa, mb, sqn, dr, num, sqh_len);
+ sa->statistics.count += k;
/* handle unprocessed mbufs */
if (k != num && k != 0)
diff --git a/lib/ipsec/esp_outb.c b/lib/ipsec/esp_outb.c
index 9fc7075796..2c02c3bb12 100644
--- a/lib/ipsec/esp_outb.c
+++ b/lib/ipsec/esp_outb.c
@@ -617,7 +617,7 @@ uint16_t
esp_outb_sqh_process(const struct rte_ipsec_session *ss, struct rte_mbuf *mb[],
uint16_t num)
{
- uint32_t i, k, icv_len, *icv;
+ uint32_t i, k, icv_len, *icv, bytes;
struct rte_mbuf *ml;
struct rte_ipsec_sa *sa;
uint32_t dr[num];
@@ -626,10 +626,12 @@ esp_outb_sqh_process(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[],
k = 0;
icv_len = sa->icv_len;
+ bytes = 0;
for (i = 0; i != num; i++) {
if ((mb[i]->ol_flags & PKT_RX_SEC_OFFLOAD_FAILED) == 0) {
ml = rte_pktmbuf_lastseg(mb[i]);
+ bytes += mb[i]->data_len;
/* remove high-order 32 bits of esn from packet len */
mb[i]->pkt_len -= sa->sqh_len;
ml->data_len -= sa->sqh_len;
@@ -640,6 +642,8 @@ esp_outb_sqh_process(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[],
} else
dr[i - k] = i;
}
+ sa->statistics.count += k;
+ sa->statistics.bytes += bytes - (sa->hdr_len * k);
/* handle unprocessed mbufs */
if (k != num) {
@@ -659,16 +663,19 @@ static inline void
inline_outb_mbuf_prepare(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[], uint16_t num)
{
- uint32_t i, ol_flags;
+ uint32_t i, ol_flags, bytes = 0;
ol_flags = ss->security.ol_flags & RTE_SECURITY_TX_OLOAD_NEED_MDATA;
for (i = 0; i != num; i++) {
mb[i]->ol_flags |= PKT_TX_SEC_OFFLOAD;
+ bytes += mb[i]->data_len;
if (ol_flags != 0)
rte_security_set_pkt_metadata(ss->security.ctx,
ss->security.ses, mb[i], NULL);
}
+ ss->sa->statistics.count += num;
+ ss->sa->statistics.bytes += bytes - (ss->sa->hdr_len * num);
}
/* check if packet will exceed MSS and segmentation is required */
@@ -752,6 +759,7 @@ inline_outb_tun_pkt_process(const struct rte_ipsec_session
*ss,
sqn += nb_segs[i] - 1;
}
+
/* copy not processed mbufs beyond good ones */
if (k != num && k != 0)
move_bad_mbufs(mb, dr, num, num - k);
diff --git a/lib/ipsec/meson.build b/lib/ipsec/meson.build
index 1497f573bb..f5e44cfe47 100644
--- a/lib/ipsec/meson.build
+++ b/lib/ipsec/meson.build
@@ -6,4 +6,4 @@ sources = files('esp_inb.c', 'esp_outb.c', 'sa.c', 'ses.c',
'ipsec_sad.c')
headers = files('rte_ipsec.h', 'rte_ipsec_sa.h', 'rte_ipsec_sad.h')
indirect_headers += files('rte_ipsec_group.h')
-deps += ['mbuf', 'net', 'cryptodev', 'security', 'hash']
+deps += ['mbuf', 'net', 'cryptodev', 'security', 'hash', 'telemetry']
diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index dd60d95915..d34798bc7f 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -158,6 +158,17 @@ rte_ipsec_pkt_process(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[],
return ss->pkt_func.process(ss, mb, num);
}
+
+struct rte_ipsec_telemetry;
+
+__rte_experimental
+int
+rte_ipsec_telemetry_init(void);
+
+__rte_experimental
+int
+rte_ipsec_telemetry_sa_add(struct rte_ipsec_sa *sa);
+
#include
#ifdef __cplusplus
diff --git a/lib/ipsec/sa.c b/lib/ipsec/sa.c
index 8e369e4618..5b55bbc098 100644
--- a/lib/ipsec/sa.c
+++ b/lib/ipsec/sa.c
@@ -7,7 +7,7 @@
#include
#include
#include
-
+#include
#include "sa.h"
#include "ipsec_sqn.h"
#include "crypto.h"
@@ -25,6 +25,7 @@ struct crypto_xform {
struct rte_crypto_aead_xform *aead;
};
+
/*
* helper routine, fills internal crypto_xform structure.
*/
@@ -532,6 +533,249 @@ rte_ipsec_sa_size(const struct rte_ipsec_sa_prm *prm)
wsz = prm->ipsec_xform.replay_win_sz;
return ipsec_sa_size(type, &wsz, &nb);
}
+struct rte_ipsec_telemetry {
[dpdk-dev] [PATCH v2 09/10] ipsec: add support for initial SQN value
Update IPsec library to support initial SQN value.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/esp_outb.c | 19 ---
lib/ipsec/sa.c | 29 ++---
2 files changed, 34 insertions(+), 14 deletions(-)
diff --git a/lib/ipsec/esp_outb.c b/lib/ipsec/esp_outb.c
index 2c02c3bb12..8a6d09558f 100644
--- a/lib/ipsec/esp_outb.c
+++ b/lib/ipsec/esp_outb.c
@@ -661,7 +661,7 @@ esp_outb_sqh_process(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[],
*/
static inline void
inline_outb_mbuf_prepare(const struct rte_ipsec_session *ss,
- struct rte_mbuf *mb[], uint16_t num)
+ struct rte_mbuf *mb[], uint16_t num, uint64_t *sqn)
{
uint32_t i, ol_flags, bytes = 0;
@@ -672,7 +672,7 @@ inline_outb_mbuf_prepare(const struct rte_ipsec_session *ss,
bytes += mb[i]->data_len;
if (ol_flags != 0)
rte_security_set_pkt_metadata(ss->security.ctx,
- ss->security.ses, mb[i], NULL);
+ ss->security.ses, mb[i], sqn);
}
ss->sa->statistics.count += num;
ss->sa->statistics.bytes += bytes - (ss->sa->hdr_len * num);
@@ -764,7 +764,10 @@ inline_outb_tun_pkt_process(const struct rte_ipsec_session
*ss,
if (k != num && k != 0)
move_bad_mbufs(mb, dr, num, num - k);
- inline_outb_mbuf_prepare(ss, mb, k);
+ if (sa->sqn_mask > UINT32_MAX)
+ inline_outb_mbuf_prepare(ss, mb, k, &sqn);
+ else
+ inline_outb_mbuf_prepare(ss, mb, k, NULL);
return k;
}
@@ -799,8 +802,7 @@ inline_outb_trs_pkt_process(const struct rte_ipsec_session
*ss,
if (nb_sqn_alloc != nb_sqn)
rte_errno = EOVERFLOW;
- k = 0;
- for (i = 0; i != num; i++) {
+ for (i = 0, k = 0; i != num; i++) {
sqc = rte_cpu_to_be_64(sqn + i);
gen_iv(iv, sqc);
@@ -828,7 +830,10 @@ inline_outb_trs_pkt_process(const struct rte_ipsec_session
*ss,
if (k != num && k != 0)
move_bad_mbufs(mb, dr, num, num - k);
- inline_outb_mbuf_prepare(ss, mb, k);
+ if (sa->sqn_mask > UINT32_MAX)
+ inline_outb_mbuf_prepare(ss, mb, k, &sqn);
+ else
+ inline_outb_mbuf_prepare(ss, mb, k, NULL);
return k;
}
@@ -840,6 +845,6 @@ uint16_t
inline_proto_outb_pkt_process(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[], uint16_t num)
{
- inline_outb_mbuf_prepare(ss, mb, num);
+ inline_outb_mbuf_prepare(ss, mb, num, NULL);
return num;
}
diff --git a/lib/ipsec/sa.c b/lib/ipsec/sa.c
index 5b55bbc098..242fdcd461 100644
--- a/lib/ipsec/sa.c
+++ b/lib/ipsec/sa.c
@@ -294,11 +294,11 @@ esp_inb_tun_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm)
* Init ESP outbound specific things.
*/
static void
-esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen)
+esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen, uint64_t sqn)
{
uint8_t algo_type;
- sa->sqn.outb = 1;
+ sa->sqn.outb = sqn;
algo_type = sa->algo_type;
@@ -356,6 +356,8 @@ esp_outb_init(struct rte_ipsec_sa *sa, uint32_t hlen)
static void
esp_outb_tun_init(struct rte_ipsec_sa *sa, const struct rte_ipsec_sa_prm *prm)
{
+ uint64_t sqn = prm->ipsec_xform.esn.value > 0 ?
+ prm->ipsec_xform.esn.value : 0;
sa->proto = prm->tun.next_proto;
sa->hdr_len = prm->tun.hdr_len;
sa->hdr_l3_off = prm->tun.hdr_l3_off;
@@ -366,7 +368,7 @@ esp_outb_tun_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm)
memcpy(sa->hdr, prm->tun.hdr, sa->hdr_len);
- esp_outb_init(sa, sa->hdr_len);
+ esp_outb_init(sa, sa->hdr_len, sqn);
}
/*
@@ -376,6 +378,8 @@ static int
esp_sa_init(struct rte_ipsec_sa *sa, const struct rte_ipsec_sa_prm *prm,
const struct crypto_xform *cxf)
{
+ uint64_t sqn = prm->ipsec_xform.esn.value > 0 ?
+ prm->ipsec_xform.esn.value : 0;
static const uint64_t msk = RTE_IPSEC_SATP_DIR_MASK |
RTE_IPSEC_SATP_MODE_MASK |
RTE_IPSEC_SATP_NATT_MASK;
@@ -492,7 +496,7 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm,
case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TRANS |
RTE_IPSEC_SATP_NATT_ENABLE):
case (RTE_IPSEC_SATP_DIR_OB | RTE_IPSEC_SATP_MODE_TRANS):
- esp_outb_init(sa, 0);
+ esp_outb_init(sa, 0, sqn);
break;
}
@@ -503,15 +507,19 @@ esp_sa_init(struct rte_ipsec_sa *sa, const struct
rte_ipsec_sa_prm *prm,
* helper function, init SA replay structure.
*/
static void
-fill_sa_replay(struct rte_ipsec_sa *sa, uint32_t wnd_sz, uint32_t nb_bucket)
[dpdk-dev] [PATCH v2 10/10] ipsec: add ol_flags support
Set mbuff->ol_flags for IPsec packets.
Signed-off-by: Declan Doherty
Signed-off-by: Radu Nicolau
Signed-off-by: Abhijit Sinha
Signed-off-by: Daniel Martin Buckley
---
lib/ipsec/esp_inb.c | 17 --
lib/ipsec/esp_outb.c | 48 ++-
lib/ipsec/rte_ipsec_sa.h | 3 ++-
lib/ipsec/sa.c | 49 ++--
lib/ipsec/sa.h | 8 +++
5 files changed, 109 insertions(+), 16 deletions(-)
diff --git a/lib/ipsec/esp_inb.c b/lib/ipsec/esp_inb.c
index 8cb4c16302..5fcb41297e 100644
--- a/lib/ipsec/esp_inb.c
+++ b/lib/ipsec/esp_inb.c
@@ -559,7 +559,8 @@ trs_process_step3(struct rte_mbuf *mb)
* - tx_offload
*/
static inline void
-tun_process_step3(struct rte_mbuf *mb, uint64_t txof_msk, uint64_t txof_val)
+tun_process_step3(struct rte_mbuf *mb, uint8_t is_ipv4, uint64_t txof_msk,
+ uint64_t txof_val)
{
/* reset mbuf metatdata: L2/L3 len, packet type */
mb->packet_type = RTE_PTYPE_UNKNOWN;
@@ -567,6 +568,14 @@ tun_process_step3(struct rte_mbuf *mb, uint64_t txof_msk,
uint64_t txof_val)
/* clear the PKT_RX_SEC_OFFLOAD flag if set */
mb->ol_flags &= ~PKT_RX_SEC_OFFLOAD;
+
+ if (is_ipv4) {
+ mb->l3_len = sizeof(struct rte_ipv4_hdr);
+ mb->ol_flags |= (PKT_TX_IPV4 | PKT_TX_IP_CKSUM);
+ } else {
+ mb->l3_len = sizeof(struct rte_ipv6_hdr);
+ mb->ol_flags |= PKT_TX_IPV6;
+ }
}
/*
@@ -618,8 +627,12 @@ tun_process(const struct rte_ipsec_sa *sa, struct rte_mbuf
*mb[],
update_tun_inb_l3hdr(sa, outh, inh);
/* update mbuf's metadata */
- tun_process_step3(mb[i], sa->tx_offload.msk,
+ tun_process_step3(mb[i],
+ (sa->type & RTE_IPSEC_SATP_IPV_MASK) ==
+ RTE_IPSEC_SATP_IPV4 ? 1 : 0,
+ sa->tx_offload.msk,
sa->tx_offload.val);
+
k++;
} else
dr[i - k] = i;
diff --git a/lib/ipsec/esp_outb.c b/lib/ipsec/esp_outb.c
index 8a6d09558f..d8e261e6fb 100644
--- a/lib/ipsec/esp_outb.c
+++ b/lib/ipsec/esp_outb.c
@@ -19,7 +19,7 @@
typedef int32_t (*esp_outb_prepare_t)(struct rte_ipsec_sa *sa, rte_be64_t sqc,
const uint64_t ivp[IPSEC_MAX_IV_QWORD], struct rte_mbuf *mb,
- union sym_op_data *icv, uint8_t sqh_len);
+ union sym_op_data *icv, uint8_t sqh_len, uint8_t icrypto);
/*
* helper function to fill crypto_sym op for cipher+auth algorithms.
@@ -140,9 +140,9 @@ outb_cop_prepare(struct rte_crypto_op *cop,
static inline int32_t
outb_tun_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t sqc,
const uint64_t ivp[IPSEC_MAX_IV_QWORD], struct rte_mbuf *mb,
- union sym_op_data *icv, uint8_t sqh_len)
+ union sym_op_data *icv, uint8_t sqh_len, uint8_t icrypto)
{
- uint32_t clen, hlen, l2len, pdlen, pdofs, plen, tlen;
+ uint32_t clen, hlen, l2len, l3len, pdlen, pdofs, plen, tlen;
struct rte_mbuf *ml;
struct rte_esp_hdr *esph;
struct rte_esp_tail *espt;
@@ -154,6 +154,8 @@ outb_tun_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
/* size of ipsec protected data */
l2len = mb->l2_len;
+ l3len = mb->l3_len;
+
plen = mb->pkt_len - l2len;
/* number of bytes to encrypt */
@@ -190,8 +192,26 @@ outb_tun_pkt_prepare(struct rte_ipsec_sa *sa, rte_be64_t
sqc,
pt = rte_pktmbuf_mtod_offset(ml, typeof(pt), pdofs);
/* update pkt l2/l3 len */
- mb->tx_offload = (mb->tx_offload & sa->tx_offload.msk) |
- sa->tx_offload.val;
+ if (icrypto) {
+ mb->tx_offload =
+ (mb->tx_offload & sa->inline_crypto.tx_offload.msk) |
+ sa->inline_crypto.tx_offload.val;
+ mb->l3_len = l3len;
+
+ mb->ol_flags |= sa->inline_crypto.tx_ol_flags;
+
+ /* set ip checksum offload for inner */
+ if ((sa->type & RTE_IPSEC_SATP_IPV_MASK) == RTE_IPSEC_SATP_IPV4)
+ mb->ol_flags |= (PKT_TX_IPV4 | PKT_TX_IP_CKSUM);
+ else if ((sa->type & RTE_IPSEC_SATP_IPV_MASK)
+ == RTE_IPSEC_SATP_IPV6)
+ mb->ol_flags |= PKT_TX_IPV6;
+ } else {
+ mb->tx_offload = (mb->tx_offload & sa->tx_offload.msk) |
+ sa->tx_offload.val;
+
+ mb->ol_flags |= sa->tx_ol_flags;
+ }
/* copy tunnel pkt header */
rte_memcpy(ph, sa->hdr, sa->hdr_len);
@@ -311,7 +331,7 @@ esp_outb_tun_prepare(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[],
/* try to update the packet itself */
rc = outb_tun_pkt_prepare(sa, sqc, iv, mb[i], &icv,
-
[dpdk-dev] [PATCH v1 0/2] fips validation app fixes
Included are patches with small fixes for unnecessary memory allocation, and incomplete resetting of a pointer. Ciara Power (2): examples/fips_validation: fix unused malloc examples/fips_validation: fix resetting pointer examples/fips_validation/main.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.25.1
[dpdk-dev] [PATCH v1 1/2] examples/fips_validation: fix unused malloc
The val.val pointer is allocated memory, however this memory is then
freed in get_writeback_data() without being used beforehand.
The pointer is then allocated memory again before use,
so the very first allocation is removed as it was unnecessary.
Fixes: f4797bae0050 ("examples/fips_validation: support plain SHA")
Cc: damianx.no...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Ciara Power
---
examples/fips_validation/main.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/examples/fips_validation/main.c b/examples/fips_validation/main.c
index c175fe6ac2..2db00620ce 100644
--- a/examples/fips_validation/main.c
+++ b/examples/fips_validation/main.c
@@ -1635,7 +1635,6 @@ fips_mct_sha_test(void)
int ret;
uint32_t i, j;
- val.val = rte_malloc(NULL, (MAX_DIGEST_SIZE*SHA_MD_BLOCK), 0);
for (i = 0; i < SHA_MD_BLOCK; i++)
md[i].val = rte_malloc(NULL, (MAX_DIGEST_SIZE*2), 0);
--
2.25.1
[dpdk-dev] [PATCH v1 2/2] examples/fips_validation: fix resetting pointer
The env.digest memory was freed, but the pointer was not set to NULL
afterwards. This caused an "Invalid Memory" error, as the pointer tries
to free twice.
Fixes: 952e10cdad5e ("examples/fips_validation: support scatter gather list")
Cc: roy.fan.zh...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Ciara Power
---
examples/fips_validation/main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/examples/fips_validation/main.c b/examples/fips_validation/main.c
index 2db00620ce..5d14513a58 100644
--- a/examples/fips_validation/main.c
+++ b/examples/fips_validation/main.c
@@ -1846,8 +1846,10 @@ fips_test_one_file(void)
fips_test_clear();
- if (env.digest)
+ if (env.digest) {
rte_free(env.digest);
+ env.digest = NULL;
+ }
if (env.mbuf)
rte_pktmbuf_free(env.mbuf);
--
2.25.1
Re: [dpdk-dev] [PATCH] version: 21.11-rc0
On 8/8/2021 8:26 PM, Thomas Monjalon wrote: > Start a new release cycle with empty release notes. > > The ABI version becomes 22.0. > The map files are updated to the new ABI major number (22). > The ABI exceptions are dropped > and CI ABI checks are disabled > because compatibility is not preserved. > > Signed-off-by: Thomas Monjalon Acked-by: Ferruh Yigit (Applied to dpdk-next-net/main until patch merged to main repo.)
Re: [dpdk-dev] [PATCH v3 1/2] net: macro for MAC address print
On 8/10/2021 8:35 AM, Aman Singh wrote: > Added macro to print six bytes of MAC address. > The MAC addresses will be printed in lower case > hexdecimal format. s/hexdecimal/hexadecimal > In case there is a specific check for upper case > MAC address, the user may need to make a change in > such test case after this patch. > > Signed-off-by: Aman Singh For the patch title we have a convention to start with a word, something like: "net: add MAC address print format macro" Except from above issues, Reviewed-by: Ferruh Yigit If you will send a new version to fix above minor issues, please keep the tag.
Re: [dpdk-dev] [PATCH v3 2/2] net: macro to extract MAC address bytes
On 8/10/2021 8:35 AM, Aman Singh wrote: > Added macros to simplyfy print of MAC address. s/simplyfy/simplify > The other method of first formatting mac address > into a string and string printed, is avoided. > There are some cases that 'rte_ether_format_addr()' API is used to convert MAC address into string and later that string is printed. If you mean above usage, that usage is still exist after this patch. As far as I can see this patch is just to add helper macro to get octets of the MAC address. Can you please clarify? > Signed-off-by: Aman Singh > --- > The change in the document will be done in seperate patch. > To ensure document has direct reference of the code. +1, you can add the link of mentioned patch here. And patch title comment in previous patch applies here too, can you please update it? Except above issues, Reviewed-by: Ferruh Yigit
[dpdk-dev] Q on rte hash table
Hello,
Using dpdk 19.11 and trying to understand the index returned by
'rte_hash_add_key', API says
...
* - A positive value that can be used by the caller as an offset into an
* array of user data. This value is unique for this key.
*/
int32_t
rte_hash_add_key(const struct rte_hash *h, const void *key);
I create hash with 64 entries and other params as follows
struct rte_hash_parameters user_params = {
.name = "test_hash",
.entries = 64,
.key_len = sizeof(uint32_t),
.hash_func = rte_hash_crc,
.hash_func_init_val = 0,
};
Extra flags has
extra_flag =
RTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY |
RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD;
user_hash_tbl = rte_hash_create(&user_params);
When I add a key to the table I was expecting returned index to be in the
range '0 - 63'
user_idx = rte_hash_add_key(user_hash_tbl, (void *)&user_id);
However, I am seeing user_idx values 127, 128, ...
Due to MULTI_WRITE_ADD num_of_slots is calculated is as follows when
creating a table.
num_key_slots = params->entries + (RTE_MAX_LCORE - 1) *
(LCORE_CACHE_SIZE - 1) + 1;
with RTE_MAX_LCORE = 255, LCORE_CACHE_SIZE = 64
num_key_slots come to 16067
In my case the user_idx range can be '0 - 16067' . Is this correct?
Thanks,
Ravi
[dpdk-dev] [RFC] mempool: add non-IO flag
We propose to add a mempool flag MEMPOOL_F_NON_IO to mark pools of objects that will not be used with device IO and their memory for DMA. This will allow saving IOMMU entries by not mapping the memory used by such pools. Immediate use case is MLX5 PMD. The hardware has its internal IOMMU where PMD registers the memory. On the data path, PMD translates VA into a key consumed by the device IOMMU. It is impractical for the PMD to register all allocated memory because of increased lookup cost both in HW and SW. Most often mbuf memory comes from mempools, so if PMD tracked them, it could almost always have mbuf memory registered before an mbuf hits the PMD. The new flag would prevent the PMD for registering memory that will never need it. Tracking the mempools and dealing with them in MLX5 PMD is the next step after the proposed change. A possible use case is IOMMU management in EAL. Mempool could translate the new flag to a hint to the memory manager, which would use it to skip adding IOMMU entries in some cases. It was considered to add MEMPOOL_F_IO with the opposite meaning. It would be automatically set for pktmbuf pools; user would be able to set it for other pools. However, current assumption is that all DPDK memory is DMA-able, it is controversial to have a flag asserting this fact.
Re: [dpdk-dev] [RFC] ethdev: change queue release callback
> -Original Message-
> From: dev On Behalf Of Xueming(Steven) Li
> Sent: Wednesday, August 11, 2021 8:13 PM
> To: Ferruh Yigit ; Singh, Aman Deep
> ; Andrew Rybchenko
>
> Cc: dev@dpdk.org; Slava Ovsiienko ;
> NBU-Contact-Thomas Monjalon ;
> jer...@marvell.com
> Subject: Re: [dpdk-dev] [RFC] ethdev: change queue release callback
>
>
>
> > -Original Message-
> > From: Ferruh Yigit
> > Sent: Wednesday, August 11, 2021 7:58 PM
> > To: Xueming(Steven) Li ; Singh, Aman Deep
> > ; Andrew Rybchenko
> >
> > Cc: dev@dpdk.org; Slava Ovsiienko ;
> > NBU-Contact-Thomas Monjalon ; jer...@marvell.com
> > Subject: Re: [dpdk-dev] [RFC] ethdev: change queue release callback
> >
> > On 8/10/2021 10:07 AM, Xueming(Steven) Li wrote:
> > >
> > >
> > >> -Original Message-
> > >> From: Ferruh Yigit
> > >> Sent: Tuesday, August 10, 2021 4:54 PM
> > >> To: Xueming(Steven) Li ; Singh, Aman Deep
> > >> ; Andrew Rybchenko
> > >>
> > >> Cc: dev@dpdk.org; Slava Ovsiienko ;
> > >> NBU-Contact-Thomas Monjalon
> > >> Subject: Re: [dpdk-dev] [RFC] ethdev: change queue release callback
> > >>
> > >> On 8/10/2021 9:03 AM, Xueming(Steven) Li wrote:
> > >>> Hi Singh and Ferruh,
> > >>>
> > -Original Message-
> > From: Ferruh Yigit
> > Sent: Monday, August 9, 2021 11:31 PM
> > To: Singh, Aman Deep ; Andrew
> > Rybchenko ; Xueming(Steven) Li
> >
> > Cc: dev@dpdk.org; Slava Ovsiienko ;
> > NBU-Contact-Thomas Monjalon
> > Subject: Re: [dpdk-dev] [RFC] ethdev: change queue release
> > callback
> >
> > On 8/9/2021 3:39 PM, Singh, Aman Deep wrote:
> > > Hi Xueming,
> > >
> > > On 7/28/2021 1:10 PM, Andrew Rybchenko wrote:
> > >> On 7/27/21 6:41 AM, Xueming Li wrote:
> > >>> To align with other eth device queue configuration callbacks,
> > >>> change RX and TX queue release callback API parameter from
> > >>> queue object to device and queue index.
> > >>>
> > >>> Signed-off-by: Xueming Li
> > >>
> > >> In fact, there is no strong reasons to do it, but I think it is
> > >> a nice cleanup to use (dev + queue index) on control path.
> > >>
> > >> Hopefully it will not result in any regressions.
> > >
> > > Combined there are 100+ API's for Rx/Tx queue_release that need
> > > to be modified for it.
> > >
> > > I believe all regression possibilities here will be caught, in
> > > compilation phase itself.
> > >
> >
> > Same here, it is a good cleanup but there is no strong reason for it.
> >
> > Since it is all internal, there is no ABI restriction on the
> > patch, and v21.11 will be full ABI break patches, to not cause
> > conflicts with this change, what would you think to have it on
> v22.02?
> > >>>
> > >>> This patch is required by shared-rxq feature which ABI broken, target
> > >>> to 21.11.
> > >>
> > >> Why it is required?
> > >
> > > In rx burst function, rxq object is used in data path. For best data
> > > performance, it's shared-rxq object in case of shared rxq enabled.
> > > I think eth api defined rxq object for performance as well, specific on
> > > data plane.
> > > Hardware saves port info received packet descriptor for my case.
> > > Can't tell which device's queue with this shared rxq object, control
> > > path can't use this shared rxq anymore, have to be specific on
> > dev and queue id.
> > >
> >
> > I have seen shared Rx queue patch, but that just introduces the
> > offload and doesn't have the PMD implementation, so hard to see the
> > dependency, can you please put the pseudocode for PMDs
> for shared-rxq?
>
> The code is almost ready, I'll upload the PMD part soon.
Seems lots of PMD conflicts to rebase, have to hold it due to other urgent
tasks. Here is the overall data structure:
Struct mlx5_rxq_ctrl {
Bool shared;
LIST_HEAD owners; // owner rxq(s)
// datapath resources
}
Struct mlx5_rxq_priv { // rx queue
U16 queue_index;
LIST_ENTRY owner_entry; // membership in shared rxq
Struct mlx5_rxq_ctrl *ctrl; // save to dev->data->rx_queues[]
// other per queue resources
}
Rxq_ctrl could be 1:1 mapping to rxq_priv in case of standard rxq, 1:N in case
of shared
Shared rxq_ctrl will be released till last owner rxq_priv released.
BTW, v1 posted, please check.
> But firstly, I'll upload v1 patch for this RFC, the make PMD patches depends
> on this v1 patch.
>
> > How a queue will know if it is shared or not, during release?
>
> That's why this RFC want to change callback parameter to device and queue id.
> There is an offloading flag during rxq setup, either in device or in queue
> configuration.
> PMD driver saves the flag and operate accordingly.
> Ethdev api doesn't need to save this, unless a solid reason.
>
> >
> > Btw, shared Rx doesn't mention from this dependency in the patch.
>
> Agree, indeed a strong dependency, thanks!
>
> >
> > >>
> >
Re: [dpdk-dev] [PATCH v1] ethdev: introduce shared Rx queue
> -Original Message- > From: dev On Behalf Of Xueming(Steven) Li > Sent: Wednesday, August 11, 2021 8:59 PM > To: Ferruh Yigit ; Jerin Jacob > Cc: dpdk-dev ; NBU-Contact-Thomas Monjalon > ; Andrew Rybchenko > > Subject: Re: [dpdk-dev] [PATCH v1] ethdev: introduce shared Rx queue > > > > > -Original Message- > > From: Ferruh Yigit > > Sent: Wednesday, August 11, 2021 8:04 PM > > To: Xueming(Steven) Li ; Jerin Jacob > > > > Cc: dpdk-dev ; NBU-Contact-Thomas Monjalon > > ; Andrew Rybchenko > > > > Subject: Re: [dpdk-dev] [PATCH v1] ethdev: introduce shared Rx queue > > > > On 8/11/2021 9:28 AM, Xueming(Steven) Li wrote: > > > > > > > > >> -Original Message- > > >> From: Jerin Jacob > > >> Sent: Wednesday, August 11, 2021 4:03 PM > > >> To: Xueming(Steven) Li > > >> Cc: dpdk-dev ; Ferruh Yigit ; > > >> NBU-Contact-Thomas Monjalon ; Andrew Rybchenko > > >> > > >> Subject: Re: [dpdk-dev] [PATCH v1] ethdev: introduce shared Rx > > >> queue > > >> > > >> On Mon, Aug 9, 2021 at 7:46 PM Xueming(Steven) Li > > >> wrote: > > >>> > > >>> Hi, > > >>> > > -Original Message- > > From: Jerin Jacob > > Sent: Monday, August 9, 2021 9:51 PM > > To: Xueming(Steven) Li > > Cc: dpdk-dev ; Ferruh Yigit > > ; NBU-Contact-Thomas Monjalon > > ; Andrew Rybchenko > > > > Subject: Re: [dpdk-dev] [PATCH v1] ethdev: introduce shared Rx > > queue > > > > On Mon, Aug 9, 2021 at 5:18 PM Xueming Li wrote: > > > > > > In current DPDK framework, each RX queue is pre-loaded with > > > mbufs for incoming packets. When number of representors scale > > > out in a switch domain, the memory consumption became > > > significant. Most important, polling all ports leads to high > > > cache miss, high latency and low throughput. > > > > > > This patch introduces shared RX queue. Ports with same > > > configuration in a switch domain could share RX queue set by > > > specifying sharing group. > > > Polling any queue using same shared RX queue receives packets > > > from all member ports. Source port is identified by mbuf->port. > > > > > > Port queue number in a shared group should be identical. Queue > > > index is > > > 1:1 mapped in shared group. > > > > > > Share RX queue is supposed to be polled on same thread. > > > > > > Multiple groups is supported by group ID. > > > > Is this offload specific to the representor? If so can this name be > > changed specifically to representor? > > >>> > > >>> Yes, PF and representor in switch domain could take advantage. > > >>> > > If it is for a generic case, how the flow ordering will be maintained? > > >>> > > >>> Not quite sure that I understood your question. The control path > > >>> of is almost same as before, PF and representor port still needed, rte > > >>> flows not impacted. > > >>> Queues still needed for each member port, descriptors(mbuf) will > > >>> be supplied from shared Rx queue in my PMD implementation. > > >> > > >> My question was if create a generic RTE_ETH_RX_OFFLOAD_SHARED_RXQ > > >> offload, multiple ethdev receive queues land into the same receive > > >> queue, In that case, how the flow order is maintained for > > respective receive queues. > > > > > > I guess the question is testpmd forward stream? The forwarding logic has > > > to be changed slightly in case of shared rxq. > > > basically for each packet in rx_burst result, lookup source stream > > > according to mbuf->port, forwarding to target fs. > > > Packets from same source port could be grouped as a small burst to > > > process, this will accelerates the performance if traffic come from > > > limited ports. I'll introduce some common api to do shard rxq > > > forwarding, call it with packets handling callback, so it suites for > > > all > > forwarding engine. Will sent patches soon. > > > > > > > All ports will put the packets in to the same queue (share queue), > > right? Does this means only single core will poll only, what will happen if > > there are multiple cores polling, won't it cause problem? > > This has been mentioned in commit log, the shared rxq is supposed to be > polling in single thread(core) - I think it should be "MUST". > Result is unexpected if there are multiple cores pooling, that's why I added > a polling schedule check in testpmd. V2 with testpmd code uploaded, please check. > Similar for rx/tx burst function, a queue can't be polled on multiple > thread(core), and for performance concern, no such check in eal > api. > > If users want to utilize multiple cores to distribute workloads, it's > possible to define more groups, queues in different group could be > could be polled on multiple cores. > > It's possible to poll every member port in group, but not necessary, any port > in group could be polled to get packets for all ports in > group. > > If the member port subject to hot
Re: [dpdk-dev] [EXT] Re: [PATCH] version: 21.11-rc0
> On 8/8/2021 8:26 PM, Thomas Monjalon wrote: > > Start a new release cycle with empty release notes. > > > > The ABI version becomes 22.0. > > The map files are updated to the new ABI major number (22). > > The ABI exceptions are dropped > > and CI ABI checks are disabled > > because compatibility is not preserved. > > > > Signed-off-by: Thomas Monjalon > > Acked-by: Ferruh Yigit > > > (Applied to dpdk-next-net/main until patch merged to main repo.) Applied to dpdk-next-crypto as well.
[dpdk-dev] [PATCHv3] include: fix sys/queue.h.
Currently there are a couple of public header files include
'sys/queue.h', which is a POSIX functionality. When compiling DPDK
with OVS on Windows, we encountered issues such as, found the missing
header. In file included from ../lib/dpdk.c:27:
C:\temp\dpdk\include\rte_log.h:24:10: fatal error: 'sys/queue.h' file
not found
The patch fixes it by removing the #include from
DPDK public headers, so programs including DPDK headers don't depend
on POSIX sys/queue.h. For Linux/FreeBSD, DPDK public headers only need a
handful of macros for list/tailq heads and links. Those macros should be
provided by DPDK, with RTE_ prefix. For Linux and FreeBSD it will just be:
#include
#define RTE_TAILQ_ENTRY(type) TAILQ_ENTRY(type)
/* ... */
For Windows, we copy these definitions from to rte_os.h.
With this patch, all the public headers should not have
"#include " or "TAILQ_xxx" macros.
Suggested-by: Nick Connolly
Suggested-by: Dmitry Kozliuk
Signed-off-by: William Tu
---
v2->v3:
* follow the suggestion by Dmitry
* run checkpatches, there are some errors but I think either
the original file has over 80-char line due to comments,
or some false positive about macro.
v1->v2:
- follow the suggestion by Nick and Dmitry
- http://mails.dpdk.org/archives/dev/2021-August/216304.html
Signed-off-by: William Tu
---
drivers/bus/auxiliary/private.h | 1 +
drivers/bus/auxiliary/rte_bus_auxiliary.h | 5 +-
drivers/bus/ifpga/rte_bus_ifpga.h | 8 +-
drivers/bus/pci/pci_params.c | 2 +
drivers/bus/pci/rte_bus_pci.h | 13 +-
drivers/bus/pci/windows/pci.c | 3 +
drivers/bus/pci/windows/pci_netuio.c | 2 +
drivers/bus/vdev/rte_bus_vdev.h | 7 +-
drivers/bus/vmbus/rte_bus_vmbus.h | 13 +-
drivers/net/i40e/i40e_ethdev.h| 1 +
drivers/net/ice/ice_dcf_ethdev.c | 1 +
lib/bbdev/rte_bbdev.h | 2 +-
lib/cryptodev/rte_cryptodev.h | 2 +-
lib/cryptodev/rte_cryptodev_pmd.h | 2 +-
lib/eal/common/eal_common_devargs.c | 2 +
lib/eal/common/eal_common_fbarray.c | 1 +
lib/eal/common/eal_common_log.c | 1 +
lib/eal/common/eal_common_memalloc.c | 1 +
lib/eal/common/eal_common_options.c | 1 +
lib/eal/common/eal_trace.h| 2 +
lib/eal/freebsd/include/rte_os.h | 33 ++
lib/eal/include/rte_bus.h | 5 +-
lib/eal/include/rte_class.h | 6 +-
lib/eal/include/rte_dev.h | 5 +-
lib/eal/include/rte_devargs.h | 3 +-
lib/eal/include/rte_log.h | 1 -
lib/eal/include/rte_service.h | 1 -
lib/eal/include/rte_tailq.h | 15 ++-
lib/eal/linux/include/rte_os.h| 33 ++
lib/eal/windows/eal_alarm.c | 1 +
lib/eal/windows/include/rte_os.h | 138 ++
lib/ethdev/rte_ethdev_core.h | 2 +-
lib/hash/rte_fbk_hash.h | 1 -
lib/hash/rte_thash.c | 2 +
lib/ip_frag/rte_ip_frag.h | 4 +-
lib/mempool/rte_mempool.h | 9 +-
lib/pci/rte_pci.h | 1 -
lib/ring/rte_ring_core.h | 1 -
lib/table/rte_swx_table.h | 7 +-
lib/table/rte_swx_table_selector.h| 5 +-
lib/vhost/rte_vdpa_dev.h | 2 +-
41 files changed, 277 insertions(+), 68 deletions(-)
diff --git a/drivers/bus/auxiliary/private.h b/drivers/bus/auxiliary/private.h
index 9987e8b501..d22e83cf7a 100644
--- a/drivers/bus/auxiliary/private.h
+++ b/drivers/bus/auxiliary/private.h
@@ -7,6 +7,7 @@
#include
#include
+#include
#include "rte_bus_auxiliary.h"
diff --git a/drivers/bus/auxiliary/rte_bus_auxiliary.h
b/drivers/bus/auxiliary/rte_bus_auxiliary.h
index 2462bad2ba..b1f5610404 100644
--- a/drivers/bus/auxiliary/rte_bus_auxiliary.h
+++ b/drivers/bus/auxiliary/rte_bus_auxiliary.h
@@ -19,7 +19,6 @@ extern "C" {
#include
#include
#include
-#include
#include
#include
@@ -113,7 +112,7 @@ typedef int (rte_auxiliary_dma_unmap_t)(struct
rte_auxiliary_device *dev,
* A structure describing an auxiliary device.
*/
struct rte_auxiliary_device {
- TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */
+ RTE_TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */
struct rte_device device; /**< Inherit core device */
char name[RTE_DEV_NAME_MAX_LEN + 1]; /**< ASCII device name */
struct rte_intr_handle intr_handle; /**< Interrupt handle */
@@ -124,7 +123,7 @@ struct rte_auxiliary_device {
* A structure describing an auxiliary driver.
*/
struct rte_auxiliary_driver {
- TAILQ_ENTRY(rte_auxiliary_driver) next; /**< Next in list. */
+ RTE_TAILQ_ENTRY(rte_auxiliary_driver) next; /**< Next in list. */
Re: [dpdk-dev] [PATCHv3] include: fix sys/queue.h.
2021-08-12 20:05 (UTC+), William Tu: > Currently there are a couple of public header files include Suggested subject: "eal: remove sys/queue.h from public headers". 1. The state before the patch should be described in the past tense. 2. Really ten times more than "a couple", suggesting "some" (nit). 2. "files _that_ include"? > 'sys/queue.h', which is a POSIX functionality. It's not POSIX, it's found on many Unix systems. > When compiling DPDK with OVS on Windows, we encountered issues such as, found > the missing > header. This sentence is a little hard to parse. Instead, suggesting: This file is missing on Windows. During the build, DPDK uses a bundled copy, but it cannot be installed because macros it exports may conflict with the ones from application code or environment. > In file included from ../lib/dpdk.c:27: > C:\temp\dpdk\include\rte_log.h:24:10: fatal error: 'sys/queue.h' file > not found An explanation is missing why embedded in DPDK shouldn't be installed (see above, maybe you can come up with something better). > > The patch fixes it by removing the #include from > DPDK public headers, so programs including DPDK headers don't depend > on POSIX sys/queue.h. For Linux/FreeBSD, DPDK public headers only need a > handful of macros for list/tailq heads and links. Those macros should be > provided by DPDK, with RTE_ prefix. It is worth noting that RTE_ macros must be compatible with at the level of API (to use with macros in C files) and ABI (to avoid breaking it). Nit: "Should" is not the right word for things done in the patch. Same below. > For Linux and FreeBSD it will just be: > #include > #define RTE_TAILQ_ENTRY(type) TAILQ_ENTRY(type) > /* ... */ > For Windows, we copy these definitions from to rte_os.h. No need to describe what's inside the patch, diff already does it :) > With this patch, all the public headers should not have > "#include " or "TAILQ_xxx" macros. > > Suggested-by: Nick Connolly > Suggested-by: Dmitry Kozliuk > Signed-off-by: William Tu > --- > v2->v3: > * follow the suggestion by Dmitry > * run checkpatches, there are some errors but I think either > the original file has over 80-char line due to comments, > or some false positive about macro. > v1->v2: > - follow the suggestion by Nick and Dmitry > - http://mails.dpdk.org/archives/dev/2021-August/216304.html > > Signed-off-by: William Tu > --- [...] > diff --git a/lib/eal/freebsd/include/rte_os.h > b/lib/eal/freebsd/include/rte_os.h > index 627f0483ab..dc889e5826 100644 > --- a/lib/eal/freebsd/include/rte_os.h > +++ b/lib/eal/freebsd/include/rte_os.h > @@ -11,6 +11,39 @@ > */ > > #include > +#include > + > +/* These macros are compatible with system's sys/queue.h. */ > +#define RTE_TAILQ_INIT(head) TAILQ_INIT(head) > +#define RTE_TAILQ_HEAD(name, type) TAILQ_HEAD(name, type) > +#define RTE_TAILQ_LAST(head, headname) TAILQ_LAST(head, headname) > +#define RTE_TAILQ_ENTRY(type) TAILQ_ENTRY(type) > +#define RTE_TAILQ_FIRST(head) TAILQ_FIRST(head) > +#define RTE_TAILQ_EMPTY(head) TAILQ_EMPTY(head) > +#define RTE_TAILQ_NEXT(elem, field) TAILQ_NEXT(elem, field) > +#define RTE_TAILQ_HEAD_INITIALIZER(head) TAILQ_HEAD_INITIALIZER(head) > +#define RTE_TAILQ_FOREACH(var, head, field) TAILQ_FOREACH(var, head, field) > +#define RTE_TAILQ_INSERT_TAIL(head, elm, field) \ > + TAILQ_INSERT_TAIL(head, elm, field) > +#define RTE_TAILQ_REMOVE(head, elm, field) TAILQ_REMOVE(head, elm, field) > +#define RTE_TAILQ_INSERT_BEFORE(listelm, elm, field) \ > + TAILQ_INSERT_BEFORE(listelm, elm, field) > +#define RTE_TAILQ_INSERT_AFTER(head, listelm, elm, field) \ > + TAILQ_INSERT_AFTER(head, listelm, elm, field) > +#define RTE_TAILQ_INSERT_HEAD(head, elm, field) \ > + TAILQ_INSERT_HEAD(head, elm, field) > + > +#define RTE_STAILQ_HEAD(name, type) STAILQ_HEAD(name, type) > +#define RTE_STAILQ_HEAD_INITIALIZER(head) STAILQ_HEAD_INITIALIZER(head) > +#define RTE_STAILQ_ENTRY(type) STAILQ_ENTRY(type) Most of these macros are not used in public headers and are not needed. The idea is that TAILQ_* macros from sys/queue.h can be used in C files with variables declared with RTE_TAILQ_HEAD/ENTRY in public headers. Needed macros: RTE_TAILQ_HEAD RTE_TAILQ_ENTRY RTE_TAILQ_FOREACH RTE_TAILQ_FIRST (for RTE_TAILQ_FOREACH_SAFE only) RTE_TAILQ_NEXT (ditto) RTE_STAILQ_HEAD RTE_STAILQ_ENTRY > + > +/* This is not defined in sys/queue.h */ > +#ifndef TAILQ_FOREACH_SAFE > +#define TAILQ_FOREACH_SAFE(var, head, field, tvar) \ > + for ((var) = RTE_TAILQ_FIRST((head)); \ > + (var) && ((tvar) = RTE_TAILQ_NEXT((var), field), 1);\ > + (var) = (tvar)) > +#endif Please simply change the three usages of TAILQ_FOREACH_SAFE to RTE_TAILQ_FOREACH_SAFE and remove this one. It cannot be placed in rte_os.h, because rte_os.h is public and it must not export non-RTE symbols.
[dpdk-dev] [PATCHv4] eal: remove sys/queue.h from public headers.
Currently there are some public headers that include 'sys/queue.h', which is not POSIX, but usually provided by Linux/BSD system library. (Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.) The file is missing on Windows. During the windows build, DPDK uses a bundled copy, so building DPDK library works fine. But when OVS or other applications use DPDK as a library, because some DPDK public headers include 'sys/queue.h', on Windows, it triggers error due to no such file. One solution is to installl the 'lib/eal/windows/include/sys/queue.h' into Windows environment, such as [1]. However, this means DPDK exports the functinoalities of 'sys/queue.h' into the environment, which might cause symbols, macros, headers clashing with other applications. The patch fixes it by removing the "#include " from DPDK public headers, so programs including DPDK headers don't depend on system to provide 'sys/queue.h'. When these public headers use macros such as TAILQ_xxx, we replace it with RTE_ prefix. For Windows, we copy the definitions from to rte_os.h under windows. Note that these RTE_ macros are compatible with , only at the level of API (to use with macros in C files) and ABI (to avoid breaking it). Additionally, the TAILQ_FOREACH_SAFE is not part of , the patch replaces it with RTE_TAILQ_FOREACH_SAFE. With this patch, all the public headers no longer have "#include " or "TAILQ_xxx" macros. [1] http://mails.dpdk.org/archives/dev/2021-August/216304.html Suggested-by: Nick Connolly Suggested-by: Dmitry Kozliuk Signed-off-by: William Tu --- v3-v4: * address comments from Dmitry --- drivers/bus/auxiliary/private.h| 1 + drivers/bus/auxiliary/rte_bus_auxiliary.h | 5 ++-- drivers/bus/dpaa/dpaa_bus.c| 4 +-- drivers/bus/fslmc/fslmc_bus.c | 4 +-- drivers/bus/fslmc/fslmc_vfio.c | 9 --- drivers/bus/ifpga/rte_bus_ifpga.h | 8 +++--- drivers/bus/pci/pci_params.c | 2 ++ drivers/bus/pci/rte_bus_pci.h | 13 + drivers/bus/pci/windows/pci.c | 3 +++ drivers/bus/pci/windows/pci_netuio.c | 2 ++ drivers/bus/vdev/rte_bus_vdev.h| 7 +++-- drivers/bus/vdev/vdev.c| 3 ++- drivers/bus/vmbus/rte_bus_vmbus.h | 13 + drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 2 +- drivers/net/bonding/rte_eth_bond_flow.c| 2 +- drivers/net/failsafe/failsafe_flow.c | 2 +- drivers/net/i40e/i40e_ethdev.c | 9 --- drivers/net/i40e/i40e_ethdev.h | 1 + drivers/net/i40e/i40e_flow.c | 6 ++--- drivers/net/i40e/i40e_hash.c | 2 +- drivers/net/i40e/rte_pmd_i40e.c| 6 ++--- drivers/net/iavf/iavf_generic_flow.c | 14 +- drivers/net/ice/ice_dcf_ethdev.c | 1 + drivers/net/ice/ice_ethdev.c | 4 +-- drivers/net/ice/ice_generic_flow.c | 14 +- drivers/net/softnic/rte_eth_softnic_flow.c | 3 ++- drivers/net/softnic/rte_eth_softnic_swq.c | 2 +- drivers/raw/dpaa2_qdma/dpaa2_qdma.c| 2 +- lib/bbdev/rte_bbdev.h | 2 +- lib/cryptodev/rte_cryptodev.h | 2 +- lib/cryptodev/rte_cryptodev_pmd.h | 2 +- lib/eal/common/eal_common_devargs.c| 6 +++-- lib/eal/common/eal_common_fbarray.c| 1 + lib/eal/common/eal_common_log.c| 1 + lib/eal/common/eal_common_memalloc.c | 1 + lib/eal/common/eal_common_options.c| 3 ++- lib/eal/common/eal_trace.h | 2 ++ lib/eal/freebsd/include/rte_os.h | 15 +++ lib/eal/include/rte_bus.h | 5 ++-- lib/eal/include/rte_class.h| 6 ++--- lib/eal/include/rte_dev.h | 5 ++-- lib/eal/include/rte_devargs.h | 3 +-- lib/eal/include/rte_log.h | 1 - lib/eal/include/rte_service.h | 1 - lib/eal/include/rte_tailq.h| 15 +-- lib/eal/linux/include/rte_os.h | 15 +++ lib/eal/windows/eal_alarm.c| 1 + lib/eal/windows/include/rte_os.h | 31 ++ lib/efd/rte_efd.c | 2 +- lib/ethdev/rte_ethdev_core.h | 2 +- lib/hash/rte_fbk_hash.h| 1 - lib/hash/rte_thash.c | 2 ++ lib/ip_frag/rte_ip_frag.h | 4 +-- lib/mempool/rte_mempool.c | 2 +- lib/mempool/rte_mempool.h | 9 +++ lib/pci/rte_pci.h | 1 - lib/ring/rte_ring_core.h | 1 - lib/table/rte_swx_table.h | 7 ++--- lib/table/rte_swx_table_selector.h | 5 ++-- lib/vhost/iotlb.c | 11 lib/vhost/rte_vdpa_dev.h | 2 +- lib/vhost/vdpa.c | 2 +- 62 files changed, 193 inse
Re: [dpdk-dev] [PATCHv4] eal: remove sys/queue.h from public headers.
On Fri, 13 Aug 2021 01:02:50 + William Tu wrote: > Currently there are some public headers that include 'sys/queue.h', which > is not POSIX, but usually provided by Linux/BSD system library. > (Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.) > The file is missing on Windows. During the windows build, DPDK uses a > bundled copy, so building DPDK library works fine. But when OVS or other > applications use DPDK as a library, because some DPDK public headers > include 'sys/queue.h', on Windows, it triggers error due to no such file. > > One solution is to installl the 'lib/eal/windows/include/sys/queue.h' into > Windows environment, such as [1]. However, this means DPDK exports the > functinoalities of 'sys/queue.h' into the environment, which might cause > symbols, macros, headers clashing with other applications. > > The patch fixes it by removing the "#include " from > DPDK public headers, so programs including DPDK headers don't depend > on system to provide 'sys/queue.h'. When these public headers use > macros such as TAILQ_xxx, we replace it with RTE_ prefix. > For Windows, we copy the definitions from to rte_os.h > under windows. Note that these RTE_ macros are compatible with > , only at the level of API (to use with > macros in C files) and ABI (to avoid breaking it). > > Additionally, the TAILQ_FOREACH_SAFE is not part of , > the patch replaces it with RTE_TAILQ_FOREACH_SAFE. > With this patch, all the public headers no longer have > "#include " or "TAILQ_xxx" macros. Please run a spell checker on the commit message if you resubmit.
Re: [dpdk-dev] [PATCH v4 1/4] app/testpmd: fix tx retry in flowgen
Hi
> -Original Message-
> From: Zhihong Wang
> Sent: Thursday, August 12, 2021 21:19
> To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun
> ; Singh, Aman Deep ;
> irussk...@marvell.com; cchempara...@tilera.com
> Cc: Zhihong Wang ; sta...@dpdk.org
> Subject: [PATCH v4 1/4] app/testpmd: fix tx retry in flowgen
>
> Fix tx_pkt number in tx retry logic.
>
> Fixes: bf56fce1fb4 ("app/testpmd: add retry option")
Missing one character, it should be 12.
Fixes: bf56fce1fb45 ("app/testpmd: add retry option")
Except this, Acked-by: Xiaoyun Li
Re: [dpdk-dev] [PATCHv4] eal: remove sys/queue.h from public headers.
On Thu, Aug 12, 2021 at 6:11 PM Stephen Hemminger wrote: > > On Fri, 13 Aug 2021 01:02:50 + > William Tu wrote: > > > Currently there are some public headers that include 'sys/queue.h', which > > is not POSIX, but usually provided by Linux/BSD system library. > > (Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.) > > The file is missing on Windows. During the windows build, DPDK uses a > > bundled copy, so building DPDK library works fine. But when OVS or other > > applications use DPDK as a library, because some DPDK public headers > > include 'sys/queue.h', on Windows, it triggers error due to no such file. > > > > One solution is to installl the 'lib/eal/windows/include/sys/queue.h' into > > Windows environment, such as [1]. However, this means DPDK exports the > > functinoalities of 'sys/queue.h' into the environment, which might cause > > symbols, macros, headers clashing with other applications. > > > > The patch fixes it by removing the "#include " from > > DPDK public headers, so programs including DPDK headers don't depend > > on system to provide 'sys/queue.h'. When these public headers use > > macros such as TAILQ_xxx, we replace it with RTE_ prefix. > > For Windows, we copy the definitions from to rte_os.h > > under windows. Note that these RTE_ macros are compatible with > > , only at the level of API (to use with > > macros in C files) and ABI (to avoid breaking it). > > > > Additionally, the TAILQ_FOREACH_SAFE is not part of , > > the patch replaces it with RTE_TAILQ_FOREACH_SAFE. > > With this patch, all the public headers no longer have > > "#include " or "TAILQ_xxx" macros. > > > Please run a spell checker on the commit message if you resubmit. OK, will do it, thanks! William
Re: [dpdk-dev] [PATCH v4 2/4] app/testpmd: use rte_ipv4_cksum in flowgen
Hi > -Original Message- > From: Zhihong Wang > Sent: Thursday, August 12, 2021 21:19 > To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun > ; Singh, Aman Deep ; > irussk...@marvell.com; cchempara...@tilera.com > Cc: Zhihong Wang > Subject: [PATCH v4 2/4] app/testpmd: use rte_ipv4_cksum in flowgen > > Use the rte_ipv4_cksum API to replace local ip_sum implementation. > > Signed-off-by: Zhihong Wang > --- > app/test-pmd/flowgen.c | 25 + > 1 file changed, 1 insertion(+), 24 deletions(-) > Acked-by: Xiaoyun Li
Re: [dpdk-dev] [PATCH v4 3/4] app/testpmd: record rx_burst and fwd_dropped in flowgen
> -Original Message- > From: Zhihong Wang > Sent: Thursday, August 12, 2021 21:19 > To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun > ; Singh, Aman Deep ; > irussk...@marvell.com; cchempara...@tilera.com > Cc: Zhihong Wang > Subject: [PATCH v4 3/4] app/testpmd: record rx_burst and fwd_dropped in > flowgen > > Call inc_rx_burst_stats for rx operation, and record fwd_dropped. > > Signed-off-by: Zhihong Wang > --- > app/test-pmd/flowgen.c | 2 ++ > 1 file changed, 2 insertions(+) > Acked-by: Xiaoyun Li
Re: [dpdk-dev] [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen
> -Original Message- > From: Zhihong Wang > Sent: Thursday, August 12, 2021 21:19 > To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun > ; Singh, Aman Deep ; > irussk...@marvell.com; cchempara...@tilera.com > Cc: Zhihong Wang > Subject: [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen > > Use per-core variable for flow indexing to solve cache contention in > multi-core > scenarios. > > v4: use loop local variable to improve performance Usually, the changes should be after sign-off and "---" not in commit log. > > Signed-off-by: Zhihong Wang > --- > app/test-pmd/flowgen.c | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > Acked-by: Xiaoyun Li
Re: [dpdk-dev] [RFC V2] ethdev: fix issue that dev close in PMD calls twice
Hi, all
This patch can enhance the security of device uninstallation to
eliminate dependency on user usage methods.
Can you check this patch?
在 2021/8/3 10:30, Huisong Li 写道:
Ethernet devices in DPDK can be released by rte_eth_dev_close() and
rte_dev_remove(). These APIs both call xxx_dev_close() in PMD layer
to uninstall hardware. However, the two APIs do not have explicit
invocation restrictions. In other words, at the ethdev layer, it is
possible to call rte_eth_dev_close() before calling rte_dev_remove()
or rte_eal_hotplug_remove(). In such a bad scenario, the primary
process may be fine, but it may cause that xxx_dev_close() in the PMD
layer will be called twice in the secondary process. So this patch
fixes it.
Fixes: 99a2dd955fba ("lib: remove librte_ prefix from directory names")
Signed-off-by: Huisong Li
---
v2: fix commit description
---
lib/ethdev/ethdev_pci.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/lib/ethdev/ethdev_pci.h b/lib/ethdev/ethdev_pci.h
index 8edca82..429c4c7 100644
--- a/lib/ethdev/ethdev_pci.h
+++ b/lib/ethdev/ethdev_pci.h
@@ -151,6 +151,19 @@ rte_eth_dev_pci_generic_remove(struct rte_pci_device
*pci_dev,
if (!eth_dev)
return 0;
+ /*
+* The eth_dev->data->name doesn't be cleared by the secondary process,
+* so above "eth_dev" isn't NULL after rte_eth_dev_close() called.
+* Namely, whether "eth_dev" is NULL cannot be used to determine whether
+* an ethdev port has been released.
+* For both primary process and secondary process, eth_dev->state is
+* RTE_ETH_DEV_UNUSED, which means the ethdev port has been released.
+*/
+ if (eth_dev->state == RTE_ETH_DEV_UNUSED) {
+ RTE_ETHDEV_LOG(INFO, "The ethdev port has been released.");
+ return 0;
+ }
+
if (dev_uninit) {
ret = dev_uninit(eth_dev);
if (ret)
Re: [dpdk-dev] [External] RE: [PATCH v4 1/4] app/testpmd: fix tx retry in flowgen
On Fri, Aug 13, 2021 at 9:33 AM Li, Xiaoyun wrote:
>
> Hi
>
> > -Original Message-
> > From: Zhihong Wang
> > Sent: Thursday, August 12, 2021 21:19
> > To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun
> > ; Singh, Aman Deep ;
> > irussk...@marvell.com; cchempara...@tilera.com
> > Cc: Zhihong Wang ; sta...@dpdk.org
> > Subject: [PATCH v4 1/4] app/testpmd: fix tx retry in flowgen
> >
> > Fix tx_pkt number in tx retry logic.
> >
> > Fixes: bf56fce1fb4 ("app/testpmd: add retry option")
>
> Missing one character, it should be 12.
Got it. Thanks Xiaoyun.
> Fixes: bf56fce1fb45 ("app/testpmd: add retry option")
>
> Except this, Acked-by: Xiaoyun Li
Re: [dpdk-dev] [External] RE: [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen
On Fri, Aug 13, 2021 at 9:56 AM Li, Xiaoyun wrote: > > > > -Original Message- > > From: Zhihong Wang > > Sent: Thursday, August 12, 2021 21:19 > > To: dev@dpdk.org; Yigit, Ferruh ; Li, Xiaoyun > > ; Singh, Aman Deep ; > > irussk...@marvell.com; cchempara...@tilera.com > > Cc: Zhihong Wang > > Subject: [PATCH v4 4/4] app/testpmd: use per-core variable in flowgen > > > > Use per-core variable for flow indexing to solve cache contention in > > multi-core > > scenarios. > > > > v4: use loop local variable to improve performance > > Usually, the changes should be after sign-off and "---" not in commit log. Ok. I'll wait to see if there's more comments and then send a v5 to correct these. Thanks. > > > > > Signed-off-by: Zhihong Wang > > --- > > app/test-pmd/flowgen.c | 6 +- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > Acked-by: Xiaoyun Li
[dpdk-dev] [PATCHv5] eal: remove sys/queue.h from public headers.
Currently there are some public headers that include 'sys/queue.h', which is not POSIX, but usually provided by the Linux/BSD system library. (Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.) The file is missing on Windows. During the windows build, DPDK uses a bundled copy, so building a DPDK library works fine. But when OVS or other applications use DPDK as a library, because some DPDK public headers include 'sys/queue.h', on Windows, it triggers an error due to no such file. One solution is to install the 'lib/eal/windows/include/sys/queue.h' into Windows environment, such as [1]. However, this means DPDK exports the functionalities of 'sys/queue.h' into the environment, which might cause symbols, macros, headers clashing with other applications. The patch fixes it by removing the "#include " from DPDK public headers, so programs including DPDK headers don't depend on the system to provide 'sys/queue.h'. When these public headers use macros such as TAILQ_xxx, we replace it with RTE_ prefix. For Windows, we copy the definitions from to rte_os.h under windows. Note that these RTE_ macros are compatible with , only at the level of API (to use with macros in C files) and ABI (to avoid breaking it). Additionally, the TAILQ_FOREACH_SAFE is not part of , the patch replaces it with RTE_TAILQ_FOREACH_SAFE. With this patch, all the public headers no longer have "#include " or "TAILQ_xxx" macros. [1] http://mails.dpdk.org/archives/dev/2021-August/216304.html Suggested-by: Nick Connolly Suggested-by: Dmitry Kozliuk Signed-off-by: William Tu --- v4-v5 * fix compile error due to drivers/net/ipn3ke/ipn3ke_flow.c:1234 * run spell check --- drivers/bus/auxiliary/private.h| 1 + drivers/bus/auxiliary/rte_bus_auxiliary.h | 5 ++-- drivers/bus/dpaa/dpaa_bus.c| 4 +-- drivers/bus/fslmc/fslmc_bus.c | 4 +-- drivers/bus/fslmc/fslmc_vfio.c | 9 --- drivers/bus/ifpga/rte_bus_ifpga.h | 8 +++--- drivers/bus/pci/pci_params.c | 2 ++ drivers/bus/pci/rte_bus_pci.h | 13 + drivers/bus/pci/windows/pci.c | 3 +++ drivers/bus/pci/windows/pci_netuio.c | 2 ++ drivers/bus/vdev/rte_bus_vdev.h| 7 +++-- drivers/bus/vdev/vdev.c| 3 ++- drivers/bus/vmbus/rte_bus_vmbus.h | 13 + drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 2 +- drivers/net/bonding/rte_eth_bond_flow.c| 2 +- drivers/net/failsafe/failsafe_flow.c | 2 +- drivers/net/i40e/i40e_ethdev.c | 9 --- drivers/net/i40e/i40e_ethdev.h | 1 + drivers/net/i40e/i40e_flow.c | 6 ++--- drivers/net/i40e/i40e_hash.c | 2 +- drivers/net/i40e/rte_pmd_i40e.c| 6 ++--- drivers/net/iavf/iavf_generic_flow.c | 14 +- drivers/net/ice/ice_dcf_ethdev.c | 1 + drivers/net/ice/ice_ethdev.c | 4 +-- drivers/net/ice/ice_generic_flow.c | 14 +- drivers/net/ipn3ke/ipn3ke_flow.c | 2 +- drivers/net/softnic/rte_eth_softnic_flow.c | 3 ++- drivers/net/softnic/rte_eth_softnic_swq.c | 2 +- drivers/raw/dpaa2_qdma/dpaa2_qdma.c| 2 +- lib/bbdev/rte_bbdev.h | 2 +- lib/cryptodev/rte_cryptodev.h | 2 +- lib/cryptodev/rte_cryptodev_pmd.h | 2 +- lib/eal/common/eal_common_devargs.c| 6 +++-- lib/eal/common/eal_common_fbarray.c| 1 + lib/eal/common/eal_common_log.c| 1 + lib/eal/common/eal_common_memalloc.c | 1 + lib/eal/common/eal_common_options.c| 3 ++- lib/eal/common/eal_trace.h | 2 ++ lib/eal/freebsd/include/rte_os.h | 15 +++ lib/eal/include/rte_bus.h | 5 ++-- lib/eal/include/rte_class.h| 6 ++--- lib/eal/include/rte_dev.h | 5 ++-- lib/eal/include/rte_devargs.h | 3 +-- lib/eal/include/rte_log.h | 1 - lib/eal/include/rte_service.h | 1 - lib/eal/include/rte_tailq.h| 15 +-- lib/eal/linux/include/rte_os.h | 15 +++ lib/eal/windows/eal_alarm.c| 1 + lib/eal/windows/include/rte_os.h | 31 ++ lib/efd/rte_efd.c | 2 +- lib/ethdev/rte_ethdev_core.h | 2 +- lib/hash/rte_fbk_hash.h| 1 - lib/hash/rte_thash.c | 2 ++ lib/ip_frag/rte_ip_frag.h | 4 +-- lib/mempool/rte_mempool.c | 2 +- lib/mempool/rte_mempool.h | 9 +++ lib/pci/rte_pci.h | 1 - lib/ring/rte_ring_core.h | 1 - lib/table/rte_swx_table.h | 7 ++--- lib/table/rte_swx_table_selector.h | 5 ++-- lib/vhost/iotlb.c | 11 lib/vhost/rte
[dpdk-dev] [PATCH] app/crypto-perf: add throughput test for asymmetric crypto
From: Kiran Kumar K
Adding support for asymmetric crypto perf test.
Only modex is supported for now.
Signed-off-by: Kiran Kumar K
---
app/test-crypto-perf/cperf_ops.c | 59 ++-
app/test-crypto-perf/cperf_options.h | 3 +-
app/test-crypto-perf/cperf_options_parsing.c | 4 +
app/test-crypto-perf/cperf_test_common.c | 16 +++
app/test-crypto-perf/cperf_test_throughput.c | 24 +++--
app/test-crypto-perf/cperf_test_vectors.c| 36 +++
app/test-crypto-perf/cperf_test_vectors.h| 11 ++
app/test-crypto-perf/main.c | 105 +--
8 files changed, 242 insertions(+), 16 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
#include "cperf_ops.h"
#include "cperf_test_vectors.h"
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ struct rte_cryptodev_sym_session *sess,
+ const struct cperf_options *options __rte_unused,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused)
+{
+ uint16_t i;
+ uint8_t result[sizeof(perf_mod_p)] = { 0 };
+ struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ asym_op->modex.base.data = perf_base;
+ asym_op->modex.base.length = sizeof(perf_base);
+ asym_op->modex.result.data = result;
+ asym_op->modex.result.length = sizeof(result);
+ rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+ }
+ return 0;
+}
+
#ifdef RTE_LIB_SECURITY
static int
cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+ struct rte_crypto_asym_xform xform = {0};
+ int rc;
+
+ if (options->op_type == CPERF_ASYM_MODEX) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+ xform.modex.modulus.data = perf_mod_p;
+ xform.modex.modulus.length = sizeof(perf_mod_p);
+ xform.modex.exponent.data = perf_mod_e;
+ xform.modex.exponent.length = sizeof(perf_mod_e);
+
+ sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+ if (sess == NULL)
+ return NULL;
+ rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+ if (rc < 0) {
+ if (sess != NULL) {
+ rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+ rte_cryptodev_asym_session_free((void *)sess);
+ }
+ return NULL;
+ }
+ return sess;
+ }
#ifdef RTE_LIB_SECURITY
/*
* security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
op_fns->sess_create = cperf_create_session;
+ if (options->op_type == CPERF_ASYM_MODEX) {
+ op_fns->populate_ops = cperf_set_ops_asym;
+ return 0;
+ }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
- CPERF_DOCSIS
+ CPERF_DOCSIS,
+ CPERF_ASYM_MODEX
};
extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c
b/app/test-crypto-perf/cperf_options_parsing.c
index e84f56cfaa..fcff187257 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -457,6 +457,10 @@ parse_op_type(struct cperf_options *opts, const char *arg)
{
cperf_op_type_strs[CPERF_DOCSIS],
CPERF_DOCSIS
+ },
+ {
+
Re: [dpdk-dev] [PATCH v1] examples/l3fwd: fix jumbo packet drop issue
> -Original Message-
> From: Ferruh Yigit
> Sent: Wednesday, August 11, 2021 5:01 PM
> To: Rohit Raj
> Cc: dev@dpdk.org; Nipun Gupta ; Hemant Agrawal
> ; Sachin Saxena ;
> Vanshika Shukla
> Subject: Re: [dpdk-dev] [PATCH v1] examples/l3fwd: fix jumbo packet drop
> issue
>
> On 7/27/2021 10:25 AM, rohit@nxp.com wrote:
> > From: Rohit Raj
> >
> > l3fwd uses mbufs with 2KB data size. If we enable jumbo packets, it is
> > not able to store packets with size greater than 2KB, hence these
> > packets are dropped.
> >
> > This patch fixes this issue by enabling scatter for jumbo packet, if
> > it is supported by NIC.
> >
> > If scatter is not supported by NIC and max jumbo packet length is
> > greater than default mbuf data size, then application exits with
> > proper error message.
> >
> > Fixes: f68aad7904f ("examples/l3fwd: update")
> >
> > Signed-off-by: Rohit Raj
> > Signed-off-by: Sachin Saxena
> > Signed-off-by: Vanshika Shukla
> > ---
> > examples/l3fwd/main.c | 14 ++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c index
> > 4cb800aa15..68ecb5 100644
> > --- a/examples/l3fwd/main.c
> > +++ b/examples/l3fwd/main.c
> > @@ -1035,6 +1035,20 @@ l3fwd_poll_resource_setup(void)
> > "Error during getting device (port %u) info:
> > %s\n",
> > portid, strerror(-ret));
> >
> > + /* Enable Receive side SCATTER, if supported by NIC,
> > + * when jumbo packet is enabled.
> > + */
> > + if (local_port_conf.rxmode.offloads &
> > + DEV_RX_OFFLOAD_JUMBO_FRAME){
> > + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SCATTER)
> > + local_port_conf.rxmode.offloads |=
> > + DEV_RX_OFFLOAD_SCATTER;
> > + else if (local_port_conf.rxmode.max_rx_pkt_len >
> > + RTE_MBUF_DEFAULT_DATAROOM)
> > + rte_exit(EXIT_FAILURE,
> > + "Max packet length greater than
> > + default MBUF size\n");
>
> This is a configuration set by application. So application is failing itself
> because
> of configuration it sets, seems odd.
>
> I guess the jumbo frame can be enabled when user provides '--enable-jumbo'
> argument. What do you think adding above check where that argument is
> parsed.
We need to check if hardware supports Rx scatter. To do this, we need to get Rx
capability. Hence, this is a better place to perform this check.
>
> Btw, no need to enable scattered Rx if the packets fits into buffer, so above
> check can be done slightly different:
>
> if (max_rx_pkt_len > buffer_size)
> if (OFFLOAD_SCATTER supported)
> enable OFFLOAD_SCATTER
> else
> fail
Agreed. I will do this in next version of the patch.
>
>
> > + }
> > +
> > if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
> > local_port_conf.txmode.offloads |=
> > DEV_TX_OFFLOAD_MBUF_FAST_FREE;
> >
Re: [dpdk-dev] [RFC V2] ethdev: fix issue that dev close in PMD calls twice
13/08/2021 04:11, Huisong Li:
> Hi, all
>
> This patch can enhance the security of device uninstallation to
> eliminate dependency on user usage methods.
>
> Can you check this patch?
>
>
> 在 2021/8/3 10:30, Huisong Li 写道:
> > Ethernet devices in DPDK can be released by rte_eth_dev_close() and
> > rte_dev_remove(). These APIs both call xxx_dev_close() in PMD layer
> > to uninstall hardware. However, the two APIs do not have explicit
> > invocation restrictions. In other words, at the ethdev layer, it is
> > possible to call rte_eth_dev_close() before calling rte_dev_remove()
> > or rte_eal_hotplug_remove(). In such a bad scenario,
It is not a bad scenario.
If there is no more port for the device after calling close,
the device should be removed automatically.
Keep in mind "close" is for one port, "remove" is for the entire device
which can have more than one port.
> > the primary
> > process may be fine, but it may cause that xxx_dev_close() in the PMD
> > layer will be called twice in the secondary process. So this patch
> > fixes it.
If a port is closed in primary, it should be the same in secondary.
> > + /*
> > +* The eth_dev->data->name doesn't be cleared by the secondary process,
> > +* so above "eth_dev" isn't NULL after rte_eth_dev_close() called.
This assumption is not clear. All should be closed together.
> > +* Namely, whether "eth_dev" is NULL cannot be used to determine whether
> > +* an ethdev port has been released.
> > +* For both primary process and secondary process, eth_dev->state is
> > +* RTE_ETH_DEV_UNUSED, which means the ethdev port has been released.
> > +*/
> > + if (eth_dev->state == RTE_ETH_DEV_UNUSED) {
> > + RTE_ETHDEV_LOG(INFO, "The ethdev port has been released.");
> > + return 0;
> > + }
[dpdk-dev] [PATCH v1] net/ice: fix memzone leak when device init failed
When flow engine initialization or FXP resource reset failed, it needs
to free the memory zone and unregister the interrupt callback.
Bugzilla ID: 752
Fixes: 84dc7a95a2d3 ("net/ice: enable flow director engine")
Fixes: 7615a6895009 ("net/ice: rework for generic flow enabling")
Fixes: 7edc7158d771 ("net/ice: cleanup RSS/FDIR profile on device init")
Cc: sta...@dpdk.org
Reported-by: David Marchand
Signed-off-by: Haiyue Wang
---
drivers/net/ice/ice_ethdev.c | 10 --
drivers/net/ice/ice_fdir_filter.c | 2 ++
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 64ee569525..8d62b84805 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -2139,20 +2139,26 @@ ice_dev_init(struct rte_eth_dev *dev)
ret = ice_flow_init(ad);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to initialize flow");
- return ret;
+ goto err_flow_init;
}
}
ret = ice_reset_fxp_resource(hw);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to reset fxp resource");
- return ret;
+ goto err_flow_init;
}
pf->supported_rxdid = ice_get_supported_rxdid(hw);
return 0;
+err_flow_init:
+ ice_flow_uninit(ad);
+ rte_intr_disable(intr_handle);
+ ice_pf_disable_irq0(hw);
+ rte_intr_callback_unregister(intr_handle,
+ice_interrupt_handler, dev);
err_pf_setup:
ice_res_pool_destroy(&pf->msix_pool);
err_msix_pool_init:
diff --git a/drivers/net/ice/ice_fdir_filter.c
b/drivers/net/ice/ice_fdir_filter.c
index 82adb1fc8b..7ba65b9b04 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -651,8 +651,10 @@ ice_fdir_teardown(struct ice_pf *pf)
ice_tx_queue_release(pf->fdir.txq);
pf->fdir.txq = NULL;
+ rte_eth_dma_zone_free(eth_dev, "fdir_tx_ring", ICE_FDIR_QUEUE_ID);
ice_rx_queue_release(pf->fdir.rxq);
pf->fdir.rxq = NULL;
+ rte_eth_dma_zone_free(eth_dev, "fdir_rx_ring", ICE_FDIR_QUEUE_ID);
ice_fdir_prof_rm_all(pf);
ice_fdir_prof_free(hw);
ice_release_vsi(vsi);
--
2.32.0
