[dpdk-dev] [PATCH v3 1/2] devargs: add common key definition

2021-06-13 Thread Xueming Li
Adds common devargs key definition for "bus", "class" and "driver".

Signed-off-by: Xueming Li 
---
 drivers/common/mlx5/mlx5_common.h   |  2 --
 drivers/common/mlx5/mlx5_common_pci.c   |  2 +-
 drivers/common/sfc_efx/sfc_efx.h|  2 --
 drivers/net/bonding/rte_eth_bond_args.c |  2 +-
 drivers/net/i40e/i40e_ethdev_vf.c   |  5 ++---
 drivers/net/iavf/iavf_ethdev.c  |  5 ++---
 drivers/net/mlx5/mlx5.c |  4 ++--
 drivers/net/sfc/sfc_kvargs.c|  2 +-
 drivers/vdpa/mlx5/mlx5_vdpa.c   |  2 +-
 lib/eal/common/eal_common_devargs.c | 12 ++--
 lib/eal/include/rte_devargs.h   |  4 
 11 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_common.h 
b/drivers/common/mlx5/mlx5_common.h
index 1fbefe0fa6..306f2f1ab7 100644
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -208,8 +208,6 @@ __rte_internal
 int mlx5_get_ifname_sysfs(const char *ibdev_path, char *ifname);
 
 
-#define MLX5_CLASS_ARG_NAME "class"
-
 enum mlx5_class {
MLX5_CLASS_INVALID,
MLX5_CLASS_NET = RTE_BIT64(0),
diff --git a/drivers/common/mlx5/mlx5_common_pci.c 
b/drivers/common/mlx5/mlx5_common_pci.c
index 3f16cd21cf..34747c4e07 100644
--- a/drivers/common/mlx5/mlx5_common_pci.c
+++ b/drivers/common/mlx5/mlx5_common_pci.c
@@ -118,7 +118,7 @@ bus_cmdline_options_handler(__rte_unused const char *key,
 static int
 parse_class_options(const struct rte_devargs *devargs)
 {
-   const char *key = MLX5_CLASS_ARG_NAME;
+   const char *key = RTE_DEVARGS_KEY_CLASS;
struct rte_kvargs *kvlist;
int ret = 0;
 
diff --git a/drivers/common/sfc_efx/sfc_efx.h b/drivers/common/sfc_efx/sfc_efx.h
index 6b6164cb1f..c16eca60f3 100644
--- a/drivers/common/sfc_efx/sfc_efx.h
+++ b/drivers/common/sfc_efx/sfc_efx.h
@@ -19,8 +19,6 @@
 extern "C" {
 #endif
 
-#define SFC_EFX_KVARG_DEV_CLASS"class"
-
 enum sfc_efx_dev_class {
SFC_EFX_DEV_CLASS_INVALID = 0,
SFC_EFX_DEV_CLASS_NET,
diff --git a/drivers/net/bonding/rte_eth_bond_args.c 
b/drivers/net/bonding/rte_eth_bond_args.c
index 764b1b8c8e..5406e1c934 100644
--- a/drivers/net/bonding/rte_eth_bond_args.c
+++ b/drivers/net/bonding/rte_eth_bond_args.c
@@ -18,7 +18,7 @@ const char *pmd_bond_init_valid_arguments[] = {
PMD_BOND_SOCKET_ID_KVARG,
PMD_BOND_MAC_ADDR_KVARG,
PMD_BOND_AGG_MODE_KVARG,
-   "driver",
+   RTE_DEVARGS_KEY_DRIVER,
NULL
 };
 
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c 
b/drivers/net/i40e/i40e_ethdev_vf.c
index cb898bdb68..1d8ca42a0f 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1660,7 +1660,6 @@ static int
 i40evf_driver_selected(struct rte_devargs *devargs)
 {
struct rte_kvargs *kvlist;
-   const char *key = "driver";
int ret = 0;
 
if (devargs == NULL)
@@ -1670,13 +1669,13 @@ i40evf_driver_selected(struct rte_devargs *devargs)
if (kvlist == NULL)
return 0;
 
-   if (!rte_kvargs_count(kvlist, key))
+   if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))
goto exit;
 
/* i40evf driver selected when there's a key-value pair:
 * driver=i40evf
 */
-   if (rte_kvargs_process(kvlist, key,
+   if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,
   i40evf_check_driver_handler, NULL) < 0)
goto exit;
 
diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index d688c31cfb..4e79319017 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -2440,7 +2440,6 @@ static int
 iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)
 {
struct rte_kvargs *kvlist;
-   const char *key = "driver";
int ret = 0;
 
if (device_id != IAVF_DEV_ID_VF &&
@@ -2456,13 +2455,13 @@ iavf_drv_i40evf_selected(struct rte_devargs *devargs, 
uint16_t device_id)
if (kvlist == NULL)
return 0;
 
-   if (!rte_kvargs_count(kvlist, key))
+   if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))
goto exit;
 
/* i40evf driver selected when there's a key-value pair:
 * driver=i40evf
 */
-   if (rte_kvargs_process(kvlist, key,
+   if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,
   iavf_drv_i40evf_check_handler, NULL) < 0)
goto exit;
 
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index cf1815cb74..d0faa45944 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1931,7 +1931,7 @@ mlx5_args_check(const char *key, const char *val, void 
*opaque)
config->max_dump_files_num = tmp;
} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
config->lro.timeout = tmp;
-   } else if (strcmp(MLX5_CLASS_ARG_NAME, key) == 0) {
+   

[dpdk-dev] [PATCH v3 2/2] bus/auxiliary: introduce auxiliary bus

2021-06-13 Thread Xueming Li
Auxiliary bus [1] provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.

Auxiliary device is identified by unique device name, sysfs path:
  /sys/bus/auxiliary/devices/

Devargs syntax of auxiliary device:
  -a auxiliary:[,args...]

[1] kernel auxiliary bus document:
https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html

Signed-off-by: Xueming Li 
Cc: Wang Haiyue 
Cc: Thomas Monjalon 
Cc: Kinsella Ray 
---
 MAINTAINERS   |   5 +
 doc/guides/rel_notes/release_21_08.rst|   7 +
 drivers/bus/auxiliary/auxiliary_common.c  | 419 ++
 drivers/bus/auxiliary/auxiliary_params.c  |  58 +++
 drivers/bus/auxiliary/linux/auxiliary.c   | 142 
 drivers/bus/auxiliary/meson.build |  11 +
 drivers/bus/auxiliary/private.h   | 112 ++
 drivers/bus/auxiliary/rte_bus_auxiliary.h | 201 +++
 drivers/bus/auxiliary/version.map |   7 +
 drivers/bus/meson.build   |   1 +
 10 files changed, 963 insertions(+)
 create mode 100644 drivers/bus/auxiliary/auxiliary_common.c
 create mode 100644 drivers/bus/auxiliary/auxiliary_params.c
 create mode 100644 drivers/bus/auxiliary/linux/auxiliary.c
 create mode 100644 drivers/bus/auxiliary/meson.build
 create mode 100644 drivers/bus/auxiliary/private.h
 create mode 100644 drivers/bus/auxiliary/rte_bus_auxiliary.h
 create mode 100644 drivers/bus/auxiliary/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 5877a16971..eaf691ca6a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6 +525,11 @@ F: doc/guides/mempool/octeontx2.rst
 Bus Drivers
 ---
 
+Auxiliary bus driver
+M: Parav Pandit 
+M: Xueming Li 
+F: drivers/bus/auxiliary/
+
 Intel FPGA bus
 M: Rosen Xu 
 F: drivers/bus/ifpga/
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..b335064963 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -55,6 +55,13 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Added auxiliary bus support.**
+
+  * Auxiliary bus provides a way to split function into child-devices
+representing sub-domains of functionality. Each auxiliary device
+represents a part of its parent functionality.
+  * Devargs syntax of auxiliary device: -a auxiliary:[,args...]
+
 
 Removed Items
 -
diff --git a/drivers/bus/auxiliary/auxiliary_common.c 
b/drivers/bus/auxiliary/auxiliary_common.c
new file mode 100644
index 00..91008bdc80
--- /dev/null
+++ b/drivers/bus/auxiliary/auxiliary_common.c
@@ -0,0 +1,419 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 Mellanox Technologies, Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "private.h"
+#include "rte_bus_auxiliary.h"
+
+static struct rte_devargs *
+auxiliary_devargs_lookup(const char *name)
+{
+   struct rte_devargs *devargs;
+
+   RTE_EAL_DEVARGS_FOREACH(RTE_BUS_AXILIARY_NAME, devargs) {
+   if (strcmp(devargs->name, name) == 0)
+   return devargs;
+   }
+   return NULL;
+}
+
+/*
+ * Test whether the auxiliary device exist
+ *
+ * Stub for OS not supporting auxiliary bus.
+ */
+__rte_weak bool
+auxiliary_dev_exists(const char *name)
+{
+   RTE_SET_USED(name);
+   return false;
+}
+
+/*
+ * Scan the content of the auxiliary bus, and the devices in the devices
+ * list
+ *
+ * Stub for OS not supporting auxiliary bus.
+ */
+__rte_weak int
+auxiliary_scan(void)
+{
+   return 0;
+}
+
+/**
+ * Update a device being scanned.
+ *
+ * @param aux_dev
+ * AUXILIARY device.
+ */
+void
+auxiliary_on_scan(struct rte_auxiliary_device *aux_dev)
+{
+   aux_dev->device.devargs = auxiliary_devargs_lookup(aux_dev->name);
+}
+
+/*
+ * Match the auxiliary driver and device using driver function.
+ */
+bool
+auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
+   const struct rte_auxiliary_device *aux_dev)
+{
+   if (aux_drv->match == NULL)
+   return false;
+   return aux_drv->match(aux_dev->name);
+}
+
+/*
+ * Call the probe() function of the driver.
+ */
+static int
+rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *dr,
+  struct rte_auxiliary_device *dev)
+{
+   enum rte_iova_mode iova_mode;
+   int ret;
+
+   if ((dr == NULL) || (dev == NULL))
+   return -EINVAL;
+
+   /* The device is not blocked; Check if driver supports it. */
+   if (!auxiliary_match(dr, dev))
+   /* Match of device and driver failed */
+   return 1;
+
+   AUXILIARY_LOG(DEB

[dpdk-dev] [PATCH v2] eal: save error in string copy

2021-06-13 Thread Xueming Li
From: Thomas Monjalon 

The string copy api rte_strscpy() doesn't set rte_errno during failures,
instead it just return negative error number.

Sets rte_errrno if the destination buffer is too small.

Signed-off-by: Thomas Monjalon 
Signed-off-by: Xueming Li 
---
 lib/eal/common/eal_common_string_fns.c |  4 +++-
 lib/eal/common/eal_common_trace.c  |  1 -
 lib/eal/include/rte_string_fns.h   |  5 ++---
 lib/graph/node.c   | 12 +++-
 4 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/lib/eal/common/eal_common_string_fns.c 
b/lib/eal/common/eal_common_string_fns.c
index 60c5dd66f9..ddd1891656 100644
--- a/lib/eal/common/eal_common_string_fns.c
+++ b/lib/eal/common/eal_common_string_fns.c
@@ -8,6 +8,7 @@
 #include 
 
 #include 
+#include 
 
 /* split string into tokens */
 int
@@ -62,5 +63,6 @@ rte_strscpy(char *dst, const char *src, size_t dsize)
/* Not enough room in dst, set NUL and return error. */
if (res != 0)
dst[res - 1] = '\0';
-   return -E2BIG;
+   rte_errno = E2BIG;
+   return -rte_errno;
 }
diff --git a/lib/eal/common/eal_common_trace.c 
b/lib/eal/common/eal_common_trace.c
index 24e27387b1..7bff1cd2ce 100644
--- a/lib/eal/common/eal_common_trace.c
+++ b/lib/eal/common/eal_common_trace.c
@@ -500,7 +500,6 @@ __rte_trace_point_register(rte_trace_point_t *handle, const 
char *name,
/* Initialize the trace point */
if (rte_strscpy(tp->name, name, TRACE_POINT_NAME_SIZE) < 0) {
trace_err("name is too long");
-   rte_errno = E2BIG;
goto free;
}
 
diff --git a/lib/eal/include/rte_string_fns.h b/lib/eal/include/rte_string_fns.h
index 8bac8243c9..bb43b2cba3 100644
--- a/lib/eal/include/rte_string_fns.h
+++ b/lib/eal/include/rte_string_fns.h
@@ -97,8 +97,6 @@ rte_strlcat(char *dst, const char *src, size_t size)
  * Copy string src to buffer dst of size dsize.
  * At most dsize-1 chars will be copied.
  * Always NUL-terminates, unless (dsize == 0).
- * Returns number of bytes copied (terminating NUL-byte excluded) on success ;
- * negative errno on error.
  *
  * @param dst
  *   The destination string.
@@ -110,8 +108,9 @@ rte_strlcat(char *dst, const char *src, size_t size)
  *   Length in bytes of the destination buffer.
  *
  * @return
- *   The number of bytes copied on success
+ *   The number of bytes copied (terminating NUL-byte excluded) on success.
  *   -E2BIG if the destination buffer is too small.
+ *   rte_errno is set.
  */
 ssize_t
 rte_strscpy(char *dst, const char *src, size_t dsize);
diff --git a/lib/graph/node.c b/lib/graph/node.c
index 873c9ab16d..86ec4316f9 100644
--- a/lib/graph/node.c
+++ b/lib/graph/node.c
@@ -86,10 +86,8 @@ __rte_node_register(const struct rte_node_register *reg)
}
 
/* Initialize the node */
-   if (rte_strscpy(node->name, reg->name, RTE_NODE_NAMESIZE) < 0) {
-   rte_errno = E2BIG;
+   if (rte_strscpy(node->name, reg->name, RTE_NODE_NAMESIZE) < 0)
goto free;
-   }
node->flags = reg->flags;
node->process = reg->process;
node->init = reg->init;
@@ -98,10 +96,8 @@ __rte_node_register(const struct rte_node_register *reg)
node->parent_id = reg->parent_id;
for (i = 0; i < reg->nb_edges; i++) {
if (rte_strscpy(node->next_nodes[i], reg->next_nodes[i],
-   RTE_NODE_NAMESIZE) < 0) {
-   rte_errno = E2BIG;
+   RTE_NODE_NAMESIZE) < 0)
goto free;
-   }
}
 
node->id = node_id++;
@@ -278,10 +274,8 @@ edge_update(struct node *node, struct node *prev, 
rte_edge_t from,
/* Update the new nodes name */
for (i = from; i < max_edges; i++, count++) {
if (rte_strscpy(node->next_nodes[i], next_nodes[count],
-   RTE_NODE_NAMESIZE) < 0) {
-   rte_errno = E2BIG;
+   RTE_NODE_NAMESIZE) < 0)
goto restore;
-   }
}
 restore:
/* Update the linked list to point new node address in prev node */
-- 
2.25.1



Re: [dpdk-dev] [PATCH] net/mlx5: fix switchdev mode recognition

2021-06-13 Thread Matan Azrad



From: Slava Ovsiienko
> The new kernels might add the switch_id attribute to the Netlink replies and
> this caused the wrong recognition of the E-Switch presence. The single uplink
> device was erroneously recognized as master and it caused the extending
> match for source vport index on all installed flows, including the default 
> ones,
> and adding extra hops in the steering engine, that affected the maximal
> throughput packet rate.
> 
> The extra check for the new device name format (it supposes the new
> kernel) and the device is only one is added. If this check succeeds the E-
> Switch presence is considered as wrongly detected and overridden.
> 
> Fixes: 30a86157f6d5 ("net/mlx5: support PF representor")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko 
Acked-by: Matan Azrad 


[dpdk-dev] [PATCH] vdpa/mlx5: fix TSO offload without CSUM

2021-06-13 Thread Xueming Li
Packet was corrupted when TSO requested without CSUM update.

Enables CSUM automatically if only TSO requested.

Fixes: 2aa8444b0084 ("vdpa/mlx5: support stateless offloads")
Cc: ma...@nvidia.com
Cc: sta...@dpdk.org

Signed-off-by: Xueming Li 
---
 drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c 
b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c
index 024c5c4180..f530646058 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c
@@ -442,6 +442,13 @@ mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
DRV_LOG(ERR, "Failed to configure negotiated features.");
return -1;
}
+   if ((priv->features & (1ULL << VIRTIO_NET_F_CSUM)) == 0 &&
+   ((priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) > 0 ||
+(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) > 0)) {
+   /* Packet may be corrupted if TSO is enabled without CSUM. */
+   DRV_LOG(INFO, "TSO is enabled without CSUM, force CSUM.");
+   priv->features |= (1ULL << VIRTIO_NET_F_CSUM);
+   }
if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
(int)priv->caps.max_num_virtio_queues * 2,
-- 
2.25.1



[dpdk-dev] [PATCH v4 1/2] devargs: add common key definition

2021-06-13 Thread Xueming Li
Adds common devargs key definition for "bus", "class" and "driver".

Signed-off-by: Xueming Li 
---
 drivers/common/mlx5/mlx5_common.h   |  2 --
 drivers/common/mlx5/mlx5_common_pci.c   |  2 +-
 drivers/common/sfc_efx/sfc_efx.c|  7 +++
 drivers/common/sfc_efx/sfc_efx.h|  2 --
 drivers/net/bonding/rte_eth_bond_args.c |  2 +-
 drivers/net/i40e/i40e_ethdev_vf.c   |  5 ++---
 drivers/net/iavf/iavf_ethdev.c  |  5 ++---
 drivers/net/mlx5/mlx5.c |  4 ++--
 drivers/net/sfc/sfc_kvargs.c|  2 +-
 drivers/vdpa/mlx5/mlx5_vdpa.c   |  2 +-
 lib/eal/common/eal_common_devargs.c | 12 ++--
 lib/eal/include/rte_devargs.h   |  4 
 12 files changed, 23 insertions(+), 26 deletions(-)

diff --git a/drivers/common/mlx5/mlx5_common.h 
b/drivers/common/mlx5/mlx5_common.h
index 1fbefe0fa6..306f2f1ab7 100644
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -208,8 +208,6 @@ __rte_internal
 int mlx5_get_ifname_sysfs(const char *ibdev_path, char *ifname);
 
 
-#define MLX5_CLASS_ARG_NAME "class"
-
 enum mlx5_class {
MLX5_CLASS_INVALID,
MLX5_CLASS_NET = RTE_BIT64(0),
diff --git a/drivers/common/mlx5/mlx5_common_pci.c 
b/drivers/common/mlx5/mlx5_common_pci.c
index 3f16cd21cf..34747c4e07 100644
--- a/drivers/common/mlx5/mlx5_common_pci.c
+++ b/drivers/common/mlx5/mlx5_common_pci.c
@@ -118,7 +118,7 @@ bus_cmdline_options_handler(__rte_unused const char *key,
 static int
 parse_class_options(const struct rte_devargs *devargs)
 {
-   const char *key = MLX5_CLASS_ARG_NAME;
+   const char *key = RTE_DEVARGS_KEY_CLASS;
struct rte_kvargs *kvlist;
int ret = 0;
 
diff --git a/drivers/common/sfc_efx/sfc_efx.c b/drivers/common/sfc_efx/sfc_efx.c
index 0b78933d9f..2dc5545760 100644
--- a/drivers/common/sfc_efx/sfc_efx.c
+++ b/drivers/common/sfc_efx/sfc_efx.c
@@ -42,7 +42,6 @@ enum sfc_efx_dev_class
 sfc_efx_dev_class_get(struct rte_devargs *devargs)
 {
struct rte_kvargs *kvargs;
-   const char *key = SFC_EFX_KVARG_DEV_CLASS;
enum sfc_efx_dev_class dev_class = SFC_EFX_DEV_CLASS_NET;
 
if (devargs == NULL)
@@ -52,9 +51,9 @@ sfc_efx_dev_class_get(struct rte_devargs *devargs)
if (kvargs == NULL)
return dev_class;
 
-   if (rte_kvargs_count(kvargs, key) != 0) {
-   rte_kvargs_process(kvargs, key, sfc_efx_kvarg_dev_class_handler,
-  &dev_class);
+   if (rte_kvargs_count(kvargs, RTE_DEVARGS_KEY_CLASS) != 0) {
+   rte_kvargs_process(kvargs, RTE_DEVARGS_KEY_CLASS,
+  sfc_efx_kvarg_dev_class_handler, &dev_class);
}
 
rte_kvargs_free(kvargs);
diff --git a/drivers/common/sfc_efx/sfc_efx.h b/drivers/common/sfc_efx/sfc_efx.h
index 6b6164cb1f..c16eca60f3 100644
--- a/drivers/common/sfc_efx/sfc_efx.h
+++ b/drivers/common/sfc_efx/sfc_efx.h
@@ -19,8 +19,6 @@
 extern "C" {
 #endif
 
-#define SFC_EFX_KVARG_DEV_CLASS"class"
-
 enum sfc_efx_dev_class {
SFC_EFX_DEV_CLASS_INVALID = 0,
SFC_EFX_DEV_CLASS_NET,
diff --git a/drivers/net/bonding/rte_eth_bond_args.c 
b/drivers/net/bonding/rte_eth_bond_args.c
index 764b1b8c8e..5406e1c934 100644
--- a/drivers/net/bonding/rte_eth_bond_args.c
+++ b/drivers/net/bonding/rte_eth_bond_args.c
@@ -18,7 +18,7 @@ const char *pmd_bond_init_valid_arguments[] = {
PMD_BOND_SOCKET_ID_KVARG,
PMD_BOND_MAC_ADDR_KVARG,
PMD_BOND_AGG_MODE_KVARG,
-   "driver",
+   RTE_DEVARGS_KEY_DRIVER,
NULL
 };
 
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c 
b/drivers/net/i40e/i40e_ethdev_vf.c
index cb898bdb68..1d8ca42a0f 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1660,7 +1660,6 @@ static int
 i40evf_driver_selected(struct rte_devargs *devargs)
 {
struct rte_kvargs *kvlist;
-   const char *key = "driver";
int ret = 0;
 
if (devargs == NULL)
@@ -1670,13 +1669,13 @@ i40evf_driver_selected(struct rte_devargs *devargs)
if (kvlist == NULL)
return 0;
 
-   if (!rte_kvargs_count(kvlist, key))
+   if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))
goto exit;
 
/* i40evf driver selected when there's a key-value pair:
 * driver=i40evf
 */
-   if (rte_kvargs_process(kvlist, key,
+   if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,
   i40evf_check_driver_handler, NULL) < 0)
goto exit;
 
diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index d688c31cfb..4e79319017 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -2440,7 +2440,6 @@ static int
 iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)
 {
struct rte_kvargs *kvlist;
-   const char *key = "driver";
int ret = 0;
 
if (de

[dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus

2021-06-13 Thread Xueming Li
Auxiliary bus [1] provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.

Auxiliary device is identified by unique device name, sysfs path:
  /sys/bus/auxiliary/devices/

Devargs syntax of auxiliary device:
  -a auxiliary:[,args...]

[1] kernel auxiliary bus document:
https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html

Signed-off-by: Xueming Li 
Cc: Wang Haiyue 
Cc: Thomas Monjalon 
Cc: Kinsella Ray 
---
 MAINTAINERS   |   5 +
 doc/guides/rel_notes/release_21_08.rst|   7 +
 drivers/bus/auxiliary/auxiliary_common.c  | 419 ++
 drivers/bus/auxiliary/auxiliary_params.c  |  58 +++
 drivers/bus/auxiliary/linux/auxiliary.c   | 142 
 drivers/bus/auxiliary/meson.build |  11 +
 drivers/bus/auxiliary/private.h   | 112 ++
 drivers/bus/auxiliary/rte_bus_auxiliary.h | 201 +++
 drivers/bus/auxiliary/version.map |   7 +
 drivers/bus/meson.build   |   1 +
 10 files changed, 963 insertions(+)
 create mode 100644 drivers/bus/auxiliary/auxiliary_common.c
 create mode 100644 drivers/bus/auxiliary/auxiliary_params.c
 create mode 100644 drivers/bus/auxiliary/linux/auxiliary.c
 create mode 100644 drivers/bus/auxiliary/meson.build
 create mode 100644 drivers/bus/auxiliary/private.h
 create mode 100644 drivers/bus/auxiliary/rte_bus_auxiliary.h
 create mode 100644 drivers/bus/auxiliary/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 5877a16971..eaf691ca6a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6 +525,11 @@ F: doc/guides/mempool/octeontx2.rst
 Bus Drivers
 ---
 
+Auxiliary bus driver
+M: Parav Pandit 
+M: Xueming Li 
+F: drivers/bus/auxiliary/
+
 Intel FPGA bus
 M: Rosen Xu 
 F: drivers/bus/ifpga/
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..b335064963 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -55,6 +55,13 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Added auxiliary bus support.**
+
+  * Auxiliary bus provides a way to split function into child-devices
+representing sub-domains of functionality. Each auxiliary device
+represents a part of its parent functionality.
+  * Devargs syntax of auxiliary device: -a auxiliary:[,args...]
+
 
 Removed Items
 -
diff --git a/drivers/bus/auxiliary/auxiliary_common.c 
b/drivers/bus/auxiliary/auxiliary_common.c
new file mode 100644
index 00..91008bdc80
--- /dev/null
+++ b/drivers/bus/auxiliary/auxiliary_common.c
@@ -0,0 +1,419 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 Mellanox Technologies, Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "private.h"
+#include "rte_bus_auxiliary.h"
+
+static struct rte_devargs *
+auxiliary_devargs_lookup(const char *name)
+{
+   struct rte_devargs *devargs;
+
+   RTE_EAL_DEVARGS_FOREACH(RTE_BUS_AXILIARY_NAME, devargs) {
+   if (strcmp(devargs->name, name) == 0)
+   return devargs;
+   }
+   return NULL;
+}
+
+/*
+ * Test whether the auxiliary device exist
+ *
+ * Stub for OS not supporting auxiliary bus.
+ */
+__rte_weak bool
+auxiliary_dev_exists(const char *name)
+{
+   RTE_SET_USED(name);
+   return false;
+}
+
+/*
+ * Scan the content of the auxiliary bus, and the devices in the devices
+ * list
+ *
+ * Stub for OS not supporting auxiliary bus.
+ */
+__rte_weak int
+auxiliary_scan(void)
+{
+   return 0;
+}
+
+/**
+ * Update a device being scanned.
+ *
+ * @param aux_dev
+ * AUXILIARY device.
+ */
+void
+auxiliary_on_scan(struct rte_auxiliary_device *aux_dev)
+{
+   aux_dev->device.devargs = auxiliary_devargs_lookup(aux_dev->name);
+}
+
+/*
+ * Match the auxiliary driver and device using driver function.
+ */
+bool
+auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
+   const struct rte_auxiliary_device *aux_dev)
+{
+   if (aux_drv->match == NULL)
+   return false;
+   return aux_drv->match(aux_dev->name);
+}
+
+/*
+ * Call the probe() function of the driver.
+ */
+static int
+rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *dr,
+  struct rte_auxiliary_device *dev)
+{
+   enum rte_iova_mode iova_mode;
+   int ret;
+
+   if ((dr == NULL) || (dev == NULL))
+   return -EINVAL;
+
+   /* The device is not blocked; Check if driver supports it. */
+   if (!auxiliary_match(dr, dev))
+   /* Match of device and driver failed */
+   return 1;
+
+   AUXILIARY_LOG(DEB

Re: [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath

2021-06-13 Thread Jerin Jacob
On Mon, May 24, 2021 at 6:36 PM  wrote:
>
> From: Pavan Nikhilesh 
>
> Add Rx event vector fastpath to convert HW defined metadata into
> rte_mbuf and rte_event_vector.
>
> Signed-off-by: Pavan Nikhilesh 
> ---
>  drivers/event/cnxk/cn10k_worker.h | 50 +++
>  1 file changed, 50 insertions(+)
>
> diff --git a/drivers/event/cnxk/cn10k_worker.h 
> b/drivers/event/cnxk/cn10k_worker.h
> index b3f71202ad..8c2cd72873 100644
> --- a/drivers/event/cnxk/cn10k_worker.h
> +++ b/drivers/event/cnxk/cn10k_worker.h
> @@ -5,6 +5,8 @@
>  #ifndef __CN10K_WORKER_H__
>  #define __CN10K_WORKER_H__
>
> +#include 
> +
>  #include "cnxk_ethdev.h"
>  #include "cnxk_eventdev.h"
>  #include "cnxk_worker.h"
> @@ -101,6 +103,44 @@ cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, 
> uint8_t port_id,
>   mbuf_init.value, flags);
>  }
>
> +static __rte_always_inline void
> +cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags,
> +  void *lookup_mem)
> +{
> +   union mbuf_initializer mbuf_init = {
> +   .fields = {.data_off = RTE_PKTMBUF_HEADROOM,
> +  .refcnt = 1,
> +  .nb_segs = 1,
> +  .port = port_id},
> +   };


If there is performance improvement move mbuf_init population to slow
path and store it
in HWS software structure or so.

> +   struct rte_event_vector *vec;
> +   uint16_t nb_mbufs, non_vec;
> +   uint64_t **wqe;
> +
> +   vec = (struct rte_event_vector *)vwqe;
> +   wqe = vec->u64s;
> +
> +   nb_mbufs = RTE_ALIGN_FLOOR(vec->nb_elem, NIX_DESCS_PER_LOOP);
> +   nb_mbufs = cn10k_nix_recv_pkts_vector(&mbuf_init.value, vec->mbufs,
> + nb_mbufs, flags | NIX_RX_VWQE_F,
> + lookup_mem);
> +   wqe += nb_mbufs;
> +   non_vec = vec->nb_elem - nb_mbufs;
> +
> +   while (non_vec) {
> +   struct nix_cqe_hdr_s *cqe = (struct nix_cqe_hdr_s *)wqe[0];
> +   struct rte_mbuf *mbuf;
> +
> +   mbuf = (struct rte_mbuf *)((char *)cqe -
> +  sizeof(struct rte_mbuf));
> +   cn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem,
> + mbuf_init.value, flags);
> +   wqe[0] = (uint64_t *)mbuf;
> +   non_vec--;
> +   wqe++;
> +   }
> +}
> +
>  static __rte_always_inline uint16_t
>  cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
>const uint32_t flags, void *lookup_mem)
> @@ -141,6 +181,16 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct 
> rte_event *ev,
>   gw.u64[0] & 0xF, flags,
>   lookup_mem);
> gw.u64[1] = mbuf;
> +   } else if (CNXK_EVENT_TYPE_FROM_TAG(gw.u64[0]) ==
> +  RTE_EVENT_TYPE_ETHDEV_VECTOR) {
> +   uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]);
> +   __uint128_t vwqe_hdr = *(__uint128_t *)gw.u64[1];
> +
> +   vwqe_hdr = ((vwqe_hdr >> 64) & 0xFFF) | BIT_ULL(31) |
> +  ((vwqe_hdr & 0x) << 48) |
> +  ((uint64_t)port << 32);
> +   *(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr;
> +   cn10k_process_vwqe(gw.u64[1], port, flags, 
> lookup_mem);
> }
> }
>
> --
> 2.17.1
>


Re: [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support

2021-06-13 Thread Jerin Jacob
On Mon, May 24, 2021 at 6:36 PM  wrote:
>
> From: Pavan Nikhilesh 
>
> Add event vector support for cnxk event Rx adapter, add control path
> APIs to get vector limits and ability to configure event vectorization
> on a given Rx queue.
>
> Signed-off-by: Pavan Nikhilesh 

> +
> +static int
> +cn10k_sso_rx_adapter_vector_config(
> +   const struct rte_eventdev *event_dev, const struct rte_eth_dev 
> *eth_dev,
> +   int32_t rx_queue_id,
> +   const struct rte_event_eth_rx_adapter_event_vector_config *config)
> +{
> +   struct cnxk_eth_dev *cnxk_eth_dev;
> +   struct cnxk_sso_evdev *dev;
> +   int i, rc;
> +
> +   rc = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
> +   if (rc)
> +   return -EINVAL;
> +
> +   dev = cnxk_sso_pmd_priv(event_dev);
> +   cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
> +   if (rx_queue_id < 0) {
> +   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
> +   cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
> + RTE_EVENT_TYPE_ETHDEV_VECTOR);
> +   rc = cnxk_sso_xae_reconfigure(
> +   (struct rte_eventdev *)(uintptr_t)event_dev);
> +   rc = cnxk_sso_rx_adapter_vwqe_enable(
> +   cnxk_eth_dev, eth_dev->data->port_id, i,
> +   config->vector_sz, config->vector_timeout_ns,
> +   config->vector_mp);
> +   if (rc)
> +   return -EINVAL;
> +   }

See below

> +   } else {
> +
> +   cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
> + RTE_EVENT_TYPE_ETHDEV_VECTOR);
> +   rc = cnxk_sso_xae_reconfigure(
> +   (struct rte_eventdev *)(uintptr_t)event_dev);
> +   rc = cnxk_sso_rx_adapter_vwqe_enable(
> +   cnxk_eth_dev, eth_dev->data->port_id, rx_queue_id,
> +   config->vector_sz, config->vector_timeout_ns,
> +   config->vector_mp);
> +   if (rc)
> +   return -EINVAL;
> +   }

Parameterize and move this separate function to avoid code duplication.

> +
> +   return 0;
> +}
> +


# Add update this feature in doc/guides/eventdevs/cnxk.rst.
# Please add a new section in the release not for the enhancement of
event cnxk driver and add new feature there
as you update the feature in code.


Re: [dpdk-dev] [PATCH v2 00/62] Marvell CNXK Ethdev Driver

2021-06-13 Thread Jerin Jacob
On Mon, Jun 7, 2021 at 11:33 PM Nithin Dabilpuram
 wrote:
>
> This patchset adds support for Marvell CN106XX SoC based on 'common/cnxk'
> driver. In future, CN9K a.k.a octeontx2 will also be supported by same
> driver when code is ready and 'net/octeontx2' will be deprecated.


A couple of checkpatch and check-git-log issue to check and fix.


Wrong headline format:
net/cnxk: support for rss in rte_flow
net/cnxk: added reta and rss_hash operations
Wrong headline prefix:
net/cnxk: add flow ops get operation
Wrong headline case:
"net/cnxk: added reta and rss_hash
operations": reta --> RETA
Wrong headline case:
"net/cnxk: support for rss in rte_flow": rss --> RSS
Is it candidate for Cc: sta...@dpdk.org backport?
common/cnxk: fix batch alloc completion poll logic
common/cnxk: fix flow create on CN98xx


CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#267: FILE: drivers/net/cnxk/cn9k_rx.h:195:
+   rte_prefetch_non_temporal(


CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#178: FILE: drivers/net/cnxk/cn9k_rx.h:397:
+   ol_flags0 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#181: FILE: drivers/net/cnxk/cn9k_rx.h:400:
+   ol_flags1 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#184: FILE: drivers/net/cnxk/cn9k_rx.h:403:
+   ol_flags2 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#187: FILE: drivers/net/cnxk/cn9k_rx.h:406:
+   ol_flags3 = nix_update_match_id(



CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#173: FILE: drivers/net/cnxk/cn9k_tx.h:89:
+   *oudplen = rte_cpu_to_be_16(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#268: FILE: drivers/net/cnxk/cn10k_rx.h:193:
+   rte_prefetch_non_temporal(


CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#190: FILE: drivers/net/cnxk/cn10k_rx.h:394:
+   ol_flags0 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#193: FILE: drivers/net/cnxk/cn10k_rx.h:397:
+   ol_flags1 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#196: FILE: drivers/net/cnxk/cn10k_rx.h:400:
+   ol_flags2 = nix_update_match_id(

CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#199: FILE: drivers/net/cnxk/cn10k_rx.h:403:
+   ol_flags3 = nix_update_match_id(


WARNING:STRLCPY: Prefer strscpy over strlcpy - see:
https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=v6a6g1ouzcprm...@mail.gmail.com/
#131: FILE: drivers/net/cnxk/cnxk_stats.c:125:
+   strlcpy(xstats_names[i].name, roc_xstats_name[i].name,

WARNING:STRLCPY: Prefer strscpy over strlcpy - see:
https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=v6a6g1ouzcprm...@mail.gmail.com/
#161: FILE: drivers/net/cnxk/cnxk_stats.c:155:
+   strlcpy(xstats_names[i].name, xnames[ids[i]].name,

total: 0 errors, 2 warnings, 0 checks, 184 lines checked

### net/cnxk: add ethdev firmware version get

WARNING:STRLCPY: Prefer strscpy over strlcpy - see:
https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=v6a6g1ouzcprm...@mail.gmail.com/
#90: FILE: drivers/net/cnxk/cnxk_ethdev_ops.c:647:
+   strlcpy(fw_version, str, fw_size);


WARNING:TYPO_SPELLING: 'cant' may be misspelled - perhaps 'can't'?
#79: FILE: drivers/net/cnxk/cn10k_ethdev.c:327:
+   /* In case of VF, setting of MTU cant be done directly in this
 

WARNING:TYPO_SPELLING: 'cant' may be misspelled - perhaps 'can't'?
#208: FILE: drivers/net/cnxk/cn9k_ethdev.c:336:
+   /* In case of VF, setting of MTU cant be done directly in this
 

total: 0 errors, 2 warnings, 0 checks, 248 lines checked


>
> Harman Kalra (1):
>   common/cnxk: allocate lmt region in userspace
>
> Jerin Jacob (7):
>   common/cnxk: fix batch alloc completion poll logic
>   net/cnxk: add Rx support for cn9k
>   net/cnxk: add Rx vector version for cn9k
>   net/cnxk: add Tx support for cn9k
>   net/cnxk: add Rx support for cn10k
>   net/cnxk: add Rx vector version for cn10k
>   net/cnxk: add Tx support for cn10k
>
> Kiran Kumar K (2):
>   net/cnxk: add support to configure npc
>   net/cnxk: add initial version of rte flow support
>
> Nithin Dabilpuram (17):
>   net/cnxk: add build infra and common probe
>   net/cnxk: add platform specific probe and remove
>   net/cnxk: add common devargs parsing function
>   net/cnxk: add common dev infos get support
>   net/cnxk: add device configuration operation
>   net/cnxk: add link status update support
>   net/cnxk: add Rx queue setup and release
>   net/cnxk: add Tx queue setup and release
>   net/cnxk: add packet type suppor

Re: [dpdk-dev] [PATCH v2 02/62] common/cnxk: update Rx inline IPsec mbox message format

2021-06-13 Thread Jerin Jacob
On Mon, Jun 7, 2021 at 11:33 PM Nithin Dabilpuram
 wrote:
>
> From: Srujana Challa 
>
> Updates Rx inline IPSEC mailbox message format to make it
> sync with latest CPT PF driver.
>
> Signed-off-by: Srujana Challa 
> ---
>  drivers/common/cnxk/roc_mbox.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
> index f6b11b6..fe4df21 100644
> --- a/drivers/common/cnxk/roc_mbox.h
> +++ b/drivers/common/cnxk/roc_mbox.h
> @@ -1328,6 +1328,9 @@ struct cpt_rxc_time_cfg_req {
>  struct cpt_rx_inline_lf_cfg_msg {
> struct mbox_msghdr hdr;
> uint16_t __io sso_pf_func;
> +   uint16_t __io param1;
> +   uint16_t __io param2;
> +   uint16_t __io reserved;

Items like 3 lines changes, Please squash to some other patches in the series.

>  };
>
>  enum cpt_eng_type {
> --
> 2.8.4
>


Re: [dpdk-dev] [PATCH v2 06/62] common/cnxk: allocate lmt region in userspace

2021-06-13 Thread Jerin Jacob
On Mon, Jun 7, 2021 at 11:33 PM Nithin Dabilpuram
 wrote:
>
> From: Harman Kalra 
>
> As per the new LMTST design, userspace shall allocate lmt region,
> setup the DMA translation and share the IOVA with kernel via MBOX.
> Kernel will convert this IOVA to physical memory and update the
> LMT table entry with the same.
> With this new design also shared mode (i.e. all pci funcs sharing
> the LMT region allocated by primary/base pci func) is intact.
>
> Signed-off-by: Harman Kalra 

Reviewed-by: Jerin Jacob 


Re: [dpdk-dev] [PATCH v2 09/62] net/cnxk: add build infra and common probe

2021-06-13 Thread Jerin Jacob
On Mon, Jun 7, 2021 at 11:34 PM Nithin Dabilpuram
 wrote:
>
> Add build infrastructure and common probe and remove for cnxk driver
> which is used by both CN10K and CN9K SoC.
>
> Signed-off-by: Nithin Dabilpuram 
> ---
>  MAINTAINERS   |   3 +
>  doc/guides/nics/cnxk.rst  |  29 +
>  doc/guides/nics/features/cnxk.ini |   9 ++
>  doc/guides/nics/features/cnxk_vec.ini |   9 ++
>  doc/guides/nics/features/cnxk_vf.ini  |   9 ++
>  doc/guides/nics/index.rst |   1 +
>  doc/guides/platform/cnxk.rst  |   3 +
>  drivers/net/cnxk/cnxk_ethdev.c| 219 
> ++
>  drivers/net/cnxk/cnxk_ethdev.h|  57 +
>  drivers/net/cnxk/meson.build  |  21 
>  drivers/net/cnxk/version.map  |   3 +
>  drivers/net/meson.build   |   1 +
>  12 files changed, 364 insertions(+)
>  create mode 100644 doc/guides/nics/cnxk.rst
>  create mode 100644 doc/guides/nics/features/cnxk.ini
>  create mode 100644 doc/guides/nics/features/cnxk_vec.ini
>  create mode 100644 doc/guides/nics/features/cnxk_vf.ini
>  create mode 100644 drivers/net/cnxk/cnxk_ethdev.c
>  create mode 100644 drivers/net/cnxk/cnxk_ethdev.h
>  create mode 100644 drivers/net/cnxk/meson.build
>  create mode 100644 drivers/net/cnxk/version.map


21.08 release note update also can be done in this patch.


>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5877a16..2be220e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -746,6 +746,9 @@ M: Sunil Kumar Kori 
>  M: Satha Rao 
>  T: git://dpdk.org/next/dpdk-next-net-mrvl
>  F: drivers/common/cnxk/
> +F: drivers/net/cnxk/
> +F: doc/guides/nics/cnxk.rst
> +F: doc/guides/nics/features/cnxk*.ini
>  F: doc/guides/platform/cnxk.rst

Sort this in alphabetical order.

> +
> +extra_flags = ['-flax-vector-conversions', '-Wno-strict-aliasing']

Move this to patch where this actually required and have one line
comment on need.


> +foreach flag: extra_flags
> +   if cc.has_argument(flag)
> +   cflags += flag
> +   endif
> +endforeach


Re: [dpdk-dev] [PATCH v2 11/62] net/cnxk: add common devargs parsing function

2021-06-13 Thread Jerin Jacob
On Mon, Jun 7, 2021 at 11:34 PM Nithin Dabilpuram
 wrote:
>
> Add various devargs parsing command line arguments
> parsing functions supported by CN9K and CN10K.
>
> Signed-off-by: Nithin Dabilpuram 
> ---
>  doc/guides/nics/cnxk.rst   |  94 +++
>  drivers/net/cnxk/cnxk_ethdev.c |   7 ++
>  drivers/net/cnxk/cnxk_ethdev.h |   9 ++
>  drivers/net/cnxk/cnxk_ethdev_devargs.c | 166 
> +
>  drivers/net/cnxk/meson.build   |   3 +-
>  5 files changed, 278 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/net/cnxk/cnxk_ethdev_devargs.c
>
> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
> index ca21842..611ffb4 100644
> --- a/doc/guides/nics/cnxk.rst
> +++ b/doc/guides/nics/cnxk.rst
> @@ -27,3 +27,97 @@ Driver compilation and testing
>
>  Refer to the document :ref:`compiling and testing a PMD for a NIC 
> `
>  for details.
> +
> +Runtime Config Options
> +--
> +
> +- ``Rx&Tx scalar mode enable`` (default ``0``)
> +
> +   Ethdev supports both scalar and vector mode, it may be selected at runtime

Ethdev->PMD

> +   using ``scalar_enable`` ``devargs`` parameter.
> +
> +- ``RSS reta size`` (default ``64``)
> +
> +   RSS redirection table size may be configured during runtime using 
> ``reta_size``
> +   ``devargs`` parameter.
> +
> +   For example::
> +
> +  -a 0002:02:00.0,reta_size=256
> +
> +   With the above configuration, reta table of size 256 is populated.
> +
> +- ``Flow priority levels`` (default ``3``)
> +
> +   RTE Flow priority levels can be configured during runtime using
> +   ``flow_max_priority`` ``devargs`` parameter.
> +
> +   For example::
> +
> +  -a 0002:02:00.0,flow_max_priority=10
> +
> +   With the above configuration, priority level was set to 10 (0-9). Max
> +   priority level supported is 32.
> +
> +- ``Reserve Flow entries`` (default ``8``)
> +
> +   RTE flow entries can be pre allocated and the size of pre allocation can 
> be
> +   selected runtime using ``flow_prealloc_size`` ``devargs`` parameter.
> +
> +   For example::
> +
> +  -a 0002:02:00.0,flow_prealloc_size=4
> +
> +   With the above configuration, pre alloc size was set to 4. Max pre alloc
> +   size supported is 32.
> +
> +- ``Max SQB buffer count`` (default ``512``)
> +
> +   Send queue descriptor buffer count may be limited during runtime using
> +   ``max_sqb_count`` ``devargs`` parameter.
> +
> +   For example::
> +
> +  -a 0002:02:00.0,max_sqb_count=64
> +
> +   With the above configuration, each send queue's decscriptor buffer count 
> is

Typo

> +   limited to a maximum of 64 buffers.
> +
> +- ``Switch header enable`` (default ``none``)
> +
> +   A port can be configured to a specific switch header type by using
> +   ``switch_header`` ``devargs`` parameter.
> +
> +   For example::
> +
> +  -a 0002:02:00.0,switch_header="higig2"
> +
> +   With the above configuration, higig2 will be enabled on that port and the
> +   traffic on this port should be higig2 traffic only. Supported switch 
> header
> +   types are "higig2", "dsa", "chlen90b" and "chlen24b".
> +
> +- ``RSS tag as XOR`` (default ``0``)
> +
> +   The HW gives two options to configure the RSS adder i.e
> +
> +   * ``rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^ flow_tag<23:16> ^ 
> flow_tag<31:24>``
> +
> +   * ``rss_adder<7:0> = flow_tag<7:0>``
> +


Re: [dpdk-dev] 19.11.9 patches review and test - V2

2021-06-13 Thread Christian Ehrhardt
On Fri, Jun 11, 2021 at 10:55 AM Jiang, YuX  wrote:
>
> Hi Christian,
>
> Testing with dpdk v19.11.9-rc2 from Intel is almost finished, some build 
> issues and telemetry issue are found.

Thank you for completing this on -rc2 and thereby giving us a preview
of the final results.

> # Basic Intel(R) NIC testing
> * PF(i40e, ixgbe): test scenarios including rte_flow/TSO/Jumboframe/checksum 
> offload/Tunnel, etc. Listed but not all.
> - Known issues as below:
> 1) https://bugs.dpdk.org/show_bug.cgi?id=731 – [dpdk-19.11.9] 
> telemetry: python3 /root/dpdk/usertools/dpdk-telemetry-client.py prompt 
> connection refused)
> Fixed commit  is af68c1d699be6c369e296b775bdbf13ae18b79cc 
> eal: fix hang in control thread creation

This one was in the candidate list of patches for 19.11.x, but it
didn't apply cleanly.
I've asked for a backport in my mail on 20th May - in this thread [1]
But in the meantime that was all done and -rc2 that you have tested contains

34cc55cce6b1 ("eal: fix race in control thread creation")
af68c1d699be ("eal: fix hang in control thread creation")

In the form of these backports:
$ git tag --contains 555da24882e1ca836f9532304f5f58034e57ff5e
v19.11.9-rc2
$ git tag --contains 0b8f4f0462f2260fc618e297e91317a891c6d255
v19.11.9-rc2

So if af68c1d699be really was meant to fix this known issue then it
does not do so in 19.11.x.
@Luc - I'm setting you to CC in case you happen to know why.

> 2) https://bugs.dpdk.org/show_bug.cgi?id=687: 
> unit_tests_power/power_cpufreq: unit test failed. This issue is found in 
> 21.05 and dev has patches to fix it but not merged into main.

Ok, so hopefully this will eventually be fixed in 21.08 and then also
in the respective 19.11.x afterwards.

> * VF(i40e,ixgbe): test scenarios including 
> vf-rte_flow/TSO/Jumboframe/checksum offload/Tunnel, Listed but not all.  - No 
> new issues are found.
> * PF/VF(ice): test scenarios including switch features/Flow Director/Advanced 
> RSS/ACL/DCF/Flexible Descriptor and so on, Listed but not all.
> - One 4 known issues is found, but won't fix on LTS19.11. 
> [dpdk-19.11.7] userspace_ethtool/retrieve_eeprom: Dumped eeprom not same as 
> linux dumped. Fixed patches are based on 4 ice share code, not be contained 
> in LTS19.11.
> * Build or compile:
> * Build: cover the build test combination with different GCC/Clang 
> and the popular OS revision such as Ubuntu20.04, CentOS8.3, SUSE15, Fedora34 
> and so on. Listed but not all.
> - Two new issues are found
> 1) https://bugs.dpdk.org/show_bug.cgi?id=732 
> [dpdk-19.11.9-rc2] DPDK build failed on Win10
> 2) https://bugs.dpdk.org/show_bug.cgi?id=728 
> [dpdk-19.11.9-rc2]When compiling dpdk with make or meson under SUSE Linux 
> Enterprise Server 15 SP2, the compilation fails

Known - currently we have to decide if we break SP3 (no change) or fix
SP3 but thereby break SP2 (that is what was in -rc2).
DIscussions and mail threads are ongoing, Ferruh and I tried to pull
in Suse people as well since it all started with a kernel change
backport.

> - Known issue is Fedora34 GCC11 and Clang12 build issue
> a.GCC11 issue is same as 
> https://bugs.dpdk.org/show_bug.cgi?id=692 : Bug 692 - bnx2x build fail on 
> Fedora 34 with gcc 11. This issue is found in 21.05 with Fedora34 GCC 11. Has 
> patches to fix in 21.05 and merged into main.
> Applies below tree patches can build passed. Patches 
> link:
> [v3,1/4] net/bnx2x: fix build with gcc11 - 
> Patchwork (dpdk.org)
> [v3,2/4] net/bnx2x: fix build with gcc11 - 
> Patchwork (dpdk.org)
> test/table: fix build with GCC 11 - Patchwork 
> (dpdk.org)
> b.Clang12 issue: app/test/dpdk-test.p/test_cmdline_num.c.o 
> build failed on Fedora34 with Clang12.
> Fixed commits are 5ac070cfed test/cmdline: silence 
> clang 12 warning &   414245bbc5 test/cmdline: fix inputs array(Refer to 
> Kevin's reply)

Thanks for confirming, the coming -rc3 (still a while to give everone
a chance for more backports) will have those fixed.
If anyone needs it asap, it already is in the WIP branch on
https://github.com/cpaelzer/dpdk-stable-queue/commits/19.11

> * Intel NIC single core/NIC performance: test scenarios including PF/VF 
> single core performance test(AVX2+AVX512) test and so on. Listed but not all. 
>   - All passed. No big data drop.
>
> # Basic cryptodev and virtio testing
> * Virtio: both function and performance test are covered. Such as 
> PVP/Virtio_loopback/virtio-user loopback/virtio-net VM2VM perf testing, etc.. 
> Listed but not all.
> - One known issues about The UDP fragmentation offload feature of 
> Virtio-net device can’t be turned on in the VM, kernel issue, bugzilla has 
> been submited: https://bugzilla.kernel.org/show_bug.cgi?id=207075, not 

Re: [dpdk-dev] [PATCH 02/11] common/cnxk: add CPT dev config routines

2021-06-13 Thread Akhil Goyal
> diff --git a/drivers/common/cnxk/roc_cpt_priv.h
> b/drivers/common/cnxk/roc_cpt_priv.h
> new file mode 100644
> index 000..8cb2dbd
> --- /dev/null
> +++ b/drivers/common/cnxk/roc_cpt_priv.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(C) 2021 Marvell.
> + */
> +
> +#ifndef _ROC_CPT_PRIV_H_
> +#define _ROC_CPT_PRIV_H_
> +
> +/* Set number of number of hystbits to 6.
Fix typo
Set number of hystbits to 6.

> + * This will trigger the FC writes whenever
> + * number of outstanding commands in the queue
> + * becomes multiple of 32.
> + */
> +#define CPT_FC_NUM_HYST_BITS 6
> +
> +struct cpt {
> + struct plt_pci_device *pci_dev;
> + struct dev dev;

dev is very generic name for a struct, can we make it roc_dev?

> + uint16_t lf_msix_off[ROC_CPT_MAX_LFS];
> + uint8_t lf_blkaddr[ROC_CPT_MAX_LFS];
> +} __plt_cache_aligned;
> +
> +static inline struct cpt *
> +roc_cpt_to_cpt_priv(struct roc_cpt *roc_cpt)
> +{
> + return (struct cpt *)&roc_cpt->reserved[0];
> +}
> +
> +#endif /* _ROC_CPT_PRIV_H_ */



Re: [dpdk-dev] [PATCH 01/11] common/cnxk: add CPT HW defines

2021-06-13 Thread Akhil Goyal
> From: Vidya Sagar Velumuri 
> 
> Add CPT hardware definitions. CPT is the hardware block on
> cnxk family of processors, that can be used to offload
> cryptographic operations.
> 
> Signed-off-by: Anoob Joseph 
> Signed-off-by: Vidya Sagar Velumuri 
> 
Acked-by: Akhil Goyal