[dpdk-dev] [PATCH v1] net/ice: fix wrong FDIR flow type for IPv4 fragment

[Ting Xu]

When creating FDIR rule and parsing the pattern, if IPv4 fragment type is
detected, the flow type is not changed to ICE_FLTR_PTYPE_FRAG_IPV4 from
ICE_FLTR_PTYPE_NONF_IPV4_OTHER. It will cause profile confilict with
other FDIR rules for IPv4 other type.

Fixes: b7e8781de768 ("net/ice: support flow director for IP fragment packet")
Cc: sta...@dpdk.org

Signed-off-by: Ting Xu 
---
 drivers/net/ice/ice_fdir_filter.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/ice_fdir_filter.c 
b/drivers/net/ice/ice_fdir_filter.c
index 092c704503..5cba56918a 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1780,6 +1780,7 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter 
*ad,
 * ethertype, if the spec is for all valid
 * packet id, set ethertype into input set.
 */
+   flow_type = ICE_FLTR_PTYPE_FRAG_IPV4;
*input_set |= ICE_INSET_ETHERTYPE;
input_set_o |= ICE_INSET_ETHERTYPE;
} else if (ipv4_mask->hdr.packet_id == UINT16_MAX) {
-- 
2.17.1

[dpdk-dev] [PATCH] vhost: allow to check in-flight packets for async vhost

[Jiayu Hu]

This patch allows to check the amount of in-flight packets
for vhost queues which register async channel acceleration.

Signed-off-by: Jiayu Hu 
---
 doc/guides/prog_guide/vhost_lib.rst |  5 +
 lib/vhost/rte_vhost_async.h | 14 ++
 lib/vhost/version.map   |  3 +++
 lib/vhost/vhost.c   | 35 +++
 4 files changed, 57 insertions(+)

diff --git a/doc/guides/prog_guide/vhost_lib.rst 
b/doc/guides/prog_guide/vhost_lib.rst
index d18fb98..9fdc6d5 100644
--- a/doc/guides/prog_guide/vhost_lib.rst
+++ b/doc/guides/prog_guide/vhost_lib.rst
@@ -281,6 +281,11 @@ The following is an overview of some key Vhost API 
functions:
   Poll enqueue completion status from async data path. Completed packets
   are returned to applications through ``pkts``.
 
+* ``rte_vhost_async_get_inflight(vid, queue_id)``
+
+  This function returns the amount of in-flight packets by now for the
+  vhost queue which registers async channel acceleration.
+
 Vhost-user Implementations
 --
 
diff --git a/lib/vhost/rte_vhost_async.h b/lib/vhost/rte_vhost_async.h
index 6faa31f..553da4d 100644
--- a/lib/vhost/rte_vhost_async.h
+++ b/lib/vhost/rte_vhost_async.h
@@ -193,4 +193,18 @@ __rte_experimental
 uint16_t rte_vhost_poll_enqueue_completed(int vid, uint16_t queue_id,
struct rte_mbuf **pkts, uint16_t count);
 
+/**
+ * This function returns the amount of in-flight packets by now
+ * for the vhost queue which registers async channel acceleration.
+ *
+ * @param vid
+ *  id of vhost device to enqueue data
+ * @param queue_id
+ *  queue id to enqueue data
+ * @return
+ *  the amount of in-flight packets on success; -1 on failure
+ */
+__rte_experimental
+int rte_vhost_async_get_inflight(int vid, uint16_t queue_id);
+
 #endif /* _RTE_VHOST_ASYNC_H_ */
diff --git a/lib/vhost/version.map b/lib/vhost/version.map
index 9103a23..28238cb 100644
--- a/lib/vhost/version.map
+++ b/lib/vhost/version.map
@@ -79,4 +79,7 @@ EXPERIMENTAL {
 
# added in 21.05
rte_vhost_get_negotiated_protocol_features;
+
+   # added in 21.08
+   rte_vhost_async_get_inflight;
 };
diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
index c96f633..4547705 100644
--- a/lib/vhost/vhost.c
+++ b/lib/vhost/vhost.c
@@ -1780,5 +1780,40 @@ int rte_vhost_async_channel_unregister(int vid, uint16_t 
queue_id)
return ret;
 }
 
+int rte_vhost_async_get_inflight(int vid, uint16_t queue_id)
+{
+   struct vhost_virtqueue *vq;
+   struct virtio_net *dev = get_device(vid);
+   int ret = -1;
+
+   if (dev == NULL)
+   return ret;
+
+   if (queue_id >= VHOST_MAX_VRING)
+   return ret;
+
+   vq = dev->virtqueue[queue_id];
+
+   if (vq == NULL)
+   return ret;
+
+   ret = 0;
+
+   if (!vq->async_registered)
+   return ret;
+
+   if (!rte_spinlock_trylock(&vq->access_lock)) {
+   VHOST_LOG_CONFIG(ERR, "Failed to check in-flight packets. "
+   "virt queue busy.\n");
+   return -1;
+   }
+
+   ret = vq->async_pkts_inflight_n;
+   rte_spinlock_unlock(&vq->access_lock);
+
+   return ret;
+
+}
+
 RTE_LOG_REGISTER_SUFFIX(vhost_config_log_level, config, INFO);
 RTE_LOG_REGISTER_SUFFIX(vhost_data_log_level, data, WARNING);
-- 
2.7.4

[dpdk-dev] [PATCH 0/1] lib/vhost: support async dequeue for split ring

[Yuan Wang]

This patch implements asynchronous dequeue data path for split ring.
A new asynchronous dequeue function is introduced. With this function,
the application can try to receive packets from the guest with
offloading large copies to the DMA engine, thus saving precious CPU
cycles.

Yuan Wang (1):
  lib/vhost: support async dequeue for split ring

 doc/guides/prog_guide/vhost_lib.rst |  10 +
 examples/vhost/ioat.c   |  30 +-
 examples/vhost/ioat.h   |   3 +
 examples/vhost/main.c   |  60 +--
 lib/vhost/rte_vhost_async.h |  44 ++-
 lib/vhost/version.map   |   3 +
 lib/vhost/virtio_net.c  | 549 
 7 files changed, 664 insertions(+), 35 deletions(-)

-- 
2.25.1

[dpdk-dev] [PATCH 1/1] lib/vhost: support async dequeue for split ring

[Yuan Wang]

This patch implements asynchronous dequeue data path for split ring.
A new asynchronous dequeue function is introduced. With this function,
the application can try to receive packets from the guest with
offloading large copies to the DMA engine, thus saving precious CPU
cycles.

Signed-off-by: Wenwu Ma 
Signed-off-by: Yuan Wang 
Signed-off-by: Jiayu Hu 
---
 doc/guides/prog_guide/vhost_lib.rst |  10 +
 examples/vhost/ioat.c   |  30 +-
 examples/vhost/ioat.h   |   3 +
 examples/vhost/main.c   |  60 +--
 lib/vhost/rte_vhost_async.h |  44 ++-
 lib/vhost/version.map   |   3 +
 lib/vhost/virtio_net.c  | 549 
 7 files changed, 664 insertions(+), 35 deletions(-)

diff --git a/doc/guides/prog_guide/vhost_lib.rst 
b/doc/guides/prog_guide/vhost_lib.rst
index 6b7206bc1d..785ab0fb34 100644
--- a/doc/guides/prog_guide/vhost_lib.rst
+++ b/doc/guides/prog_guide/vhost_lib.rst
@@ -281,6 +281,16 @@ The following is an overview of some key Vhost API 
functions:
   Poll enqueue completion status from async data path. Completed packets
   are returned to applications through ``pkts``.
 
+* ``rte_vhost_try_dequeue_burst(vid, queue_id, mbuf_pool, pkts, count, 
nr_inflight)``
+
+  Try to receive packets from the guest with offloading large packets
+  to the DMA engine. Successfully dequeued packets are transfer
+  completed and returned in ``pkts``. But there may be other packets
+  that are sent from the guest but being transferred by the DMA engine,
+  called in-flight packets. This function will return in-flight packets
+  only after the DMA engine finishes transferring. The amount of
+  in-flight packets by now is returned in ``nr_inflight``.
+
 Vhost-user Implementations
 --
 
diff --git a/examples/vhost/ioat.c b/examples/vhost/ioat.c
index 2a2c2d7202..236306c9c7 100644
--- a/examples/vhost/ioat.c
+++ b/examples/vhost/ioat.c
@@ -17,7 +17,6 @@ struct packet_tracker {
unsigned short next_read;
unsigned short next_write;
unsigned short last_remain;
-   unsigned short ioat_space;
 };
 
 struct packet_tracker cb_tracker[MAX_VHOST_DEVICE];
@@ -61,18 +60,30 @@ open_ioat(const char *value)
goto out;
}
while (i < args_nr) {
+   char *txd, *rxd;
+   bool is_txd;
char *arg_temp = dma_arg[i];
uint8_t sub_nr;
+
sub_nr = rte_strsplit(arg_temp, strlen(arg_temp), ptrs, 2, '@');
if (sub_nr != 2) {
ret = -1;
goto out;
}
 
-   start = strstr(ptrs[0], "txd");
-   if (start == NULL) {
+   txd = strstr(ptrs[0], "txd");
+   rxd = strstr(ptrs[0], "rxd");
+   if (txd == NULL && rxd == NULL) {
ret = -1;
goto out;
+   } else if (txd) {
+   is_txd = true;
+   start = txd;
+   ret |= ASYNC_RX_VHOST;
+   } else {
+   is_txd = false;
+   start = rxd;
+   ret |= ASYNC_TX_VHOST;
}
 
start += 3;
@@ -82,7 +93,8 @@ open_ioat(const char *value)
goto out;
}
 
-   vring_id = 0 + VIRTIO_RXQ;
+   vring_id = is_txd ? VIRTIO_RXQ : VIRTIO_TXQ;
+
if (rte_pci_addr_parse(ptrs[1],
&(dma_info + vid)->dmas[vring_id].addr) < 0) {
ret = -1;
@@ -113,7 +125,6 @@ open_ioat(const char *value)
goto out;
}
rte_rawdev_start(dev_id);
-   cb_tracker[dev_id].ioat_space = IOAT_RING_SIZE - 1;
dma_info->nr++;
i++;
}
@@ -128,7 +139,7 @@ ioat_transfer_data_cb(int vid, uint16_t queue_id,
struct rte_vhost_async_status *opaque_data, uint16_t count)
 {
uint32_t i_desc;
-   uint16_t dev_id = dma_bind[vid].dmas[queue_id * 2 + VIRTIO_RXQ].dev_id;
+   uint16_t dev_id = dma_bind[vid].dmas[queue_id].dev_id;
struct rte_vhost_iov_iter *src = NULL;
struct rte_vhost_iov_iter *dst = NULL;
unsigned long i_seg;
@@ -140,7 +151,7 @@ ioat_transfer_data_cb(int vid, uint16_t queue_id,
src = descs[i_desc].src;
dst = descs[i_desc].dst;
i_seg = 0;
-   if (cb_tracker[dev_id].ioat_space < src->nr_segs)
+   if (rte_ioat_burst_capacity(dev_id) < src->nr_segs)
break;
while (i_seg < src->nr_segs) {
rte_ioat_enqueue_copy(dev_id,
@@ -155,7 +166,6 @@ ioat_transfer_data_cb(int vid, uint16_t queue_id,
}

[dpdk-dev] [PATCH] bitmap: fix buffer overrun in bitmap init function

[Andrew Rybchenko]

From: Ivan Ilchenko 

Bitmap initialization function is allowed to memset
caller-provided buffer with number of bytes exceeded
this buffer size. This happens due to wrong comparision
sign between buffer size and number of bytes required
to initialize bitmap.

Fixes: 602c9ca33a4 ("sched: bitmap is now dynamically allocated")
Cc: sta...@dpdk.org

Reported-by: Andy Moreton 
Signed-off-by: Ivan Ilchenko 
Signed-off-by: Andrew Rybchenko 
Reviewed-by: Andy Moreton 
---
 lib/eal/include/rte_bitmap.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h
index 9e2b8f2cbf..870aecc594 100644
--- a/lib/eal/include/rte_bitmap.h
+++ b/lib/eal/include/rte_bitmap.h
@@ -185,7 +185,7 @@ rte_bitmap_init(uint32_t n_bits, uint8_t *mem, uint32_t 
mem_size)
size = __rte_bitmap_get_memory_footprint(n_bits,
&array1_byte_offset, &array1_slabs,
&array2_byte_offset, &array2_slabs);
-   if (size < mem_size) {
+   if (size > mem_size) {
return NULL;
}
 
-- 
2.30.2

[dpdk-dev] [PATCH v5 00/24] net: ngbe PMD

[Jiawen Wu]

This patch set provides a skeleton of ngbe PMD,
which adapted to Wangxun WX1860 series NICs.

v5:
- Extend patches with device initialization and RxTx functions.

v4:
- Fix compile error.

v3:
- Use rte_ether functions to define marcos.

v2:
- Correct some clerical errors.
- Use ethdev debug flags instead of driver own.

Jiawen Wu (24):
  net/ngbe: add build and doc infrastructure
  net/ngbe: add device IDs
  net/ngbe: support probe and remove
  net/ngbe: add device init and uninit
  net/ngbe: add log type and error type
  net/ngbe: define registers
  net/ngbe: set MAC type and LAN id
  net/ngbe: init and validate EEPROM
  net/ngbe: add HW initialization
  net/ngbe: identify PHY and reset PHY
  net/ngbe: store MAC address
  net/ngbe: add info get operation
  net/ngbe: support link update
  net/ngbe: setup the check PHY link
  net/ngbe: add Rx queue setup and release
  net/ngbe: add Tx queue setup and release
  net/ngbe: add Rx and Tx init
  net/ngbe: add packet type
  net/ngbe: add simple Rx and Tx flow
  net/ngbe: support bulk and scatter Rx
  net/ngbe: support full-featured Tx path
  net/ngbe: add device start operation
  net/ngbe: start and stop RxTx
  net/ngbe: add device stop operation

 MAINTAINERS|6 +
 doc/guides/nics/features/ngbe.ini  |   25 +
 doc/guides/nics/index.rst  |1 +
 doc/guides/nics/ngbe.rst   |   58 +
 doc/guides/rel_notes/release_21_08.rst |6 +
 drivers/net/meson.build|1 +
 drivers/net/ngbe/base/meson.build  |   26 +
 drivers/net/ngbe/base/ngbe.h   |   11 +
 drivers/net/ngbe/base/ngbe_devids.h|   84 +
 drivers/net/ngbe/base/ngbe_dummy.h |  209 ++
 drivers/net/ngbe/base/ngbe_eeprom.c|  203 ++
 drivers/net/ngbe/base/ngbe_eeprom.h|   17 +
 drivers/net/ngbe/base/ngbe_hw.c| 1069 +
 drivers/net/ngbe/base/ngbe_hw.h|   59 +
 drivers/net/ngbe/base/ngbe_mng.c   |  198 ++
 drivers/net/ngbe/base/ngbe_mng.h   |   65 +
 drivers/net/ngbe/base/ngbe_osdep.h |  178 ++
 drivers/net/ngbe/base/ngbe_phy.c   |  451 
 drivers/net/ngbe/base/ngbe_phy.h   |   62 +
 drivers/net/ngbe/base/ngbe_phy_mvl.c   |  251 +++
 drivers/net/ngbe/base/ngbe_phy_mvl.h   |   97 +
 drivers/net/ngbe/base/ngbe_phy_rtl.c   |  240 ++
 drivers/net/ngbe/base/ngbe_phy_rtl.h   |   89 +
 drivers/net/ngbe/base/ngbe_phy_yt.c|  272 +++
 drivers/net/ngbe/base/ngbe_phy_yt.h|   76 +
 drivers/net/ngbe/base/ngbe_regs.h  | 1490 +
 drivers/net/ngbe/base/ngbe_status.h|  125 ++
 drivers/net/ngbe/base/ngbe_type.h  |  210 ++
 drivers/net/ngbe/meson.build   |   22 +
 drivers/net/ngbe/ngbe_ethdev.c | 1266 +++
 drivers/net/ngbe/ngbe_ethdev.h |  146 ++
 drivers/net/ngbe/ngbe_logs.h   |   46 +
 drivers/net/ngbe/ngbe_ptypes.c |  640 ++
 drivers/net/ngbe/ngbe_ptypes.h |  351 +++
 drivers/net/ngbe/ngbe_rxtx.c   | 2829 
 drivers/net/ngbe/ngbe_rxtx.h   |  366 +++
 drivers/net/ngbe/version.map   |3 +
 37 files changed, 11248 insertions(+)
 create mode 100644 doc/guides/nics/features/ngbe.ini
 create mode 100644 doc/guides/nics/ngbe.rst
 create mode 100644 drivers/net/ngbe/base/meson.build
 create mode 100644 drivers/net/ngbe/base/ngbe.h
 create mode 100644 drivers/net/ngbe/base/ngbe_devids.h
 create mode 100644 drivers/net/ngbe/base/ngbe_dummy.h
 create mode 100644 drivers/net/ngbe/base/ngbe_eeprom.c
 create mode 100644 drivers/net/ngbe/base/ngbe_eeprom.h
 create mode 100644 drivers/net/ngbe/base/ngbe_hw.c
 create mode 100644 drivers/net/ngbe/base/ngbe_hw.h
 create mode 100644 drivers/net/ngbe/base/ngbe_mng.c
 create mode 100644 drivers/net/ngbe/base/ngbe_mng.h
 create mode 100644 drivers/net/ngbe/base/ngbe_osdep.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_mvl.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_mvl.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_rtl.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_rtl.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_yt.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_yt.h
 create mode 100644 drivers/net/ngbe/base/ngbe_regs.h
 create mode 100644 drivers/net/ngbe/base/ngbe_status.h
 create mode 100644 drivers/net/ngbe/base/ngbe_type.h
 create mode 100644 drivers/net/ngbe/meson.build
 create mode 100644 drivers/net/ngbe/ngbe_ethdev.c
 create mode 100644 drivers/net/ngbe/ngbe_ethdev.h
 create mode 100644 drivers/net/ngbe/ngbe_logs.h
 create mode 100644 drivers/net/ngbe/ngbe_ptypes.c
 create mode 100644 drivers/net/ngbe/ngbe_ptypes.h
 create mode 100644 drivers/net/ngbe/ngbe_rxtx.c
 create mode 100644 drivers/net/ngbe/ngbe_rxtx.h
 create mode 100644 drivers/net/ngbe/version.map

-- 
2.27.0

[dpdk-dev] [PATCH v5 01/24] net/ngbe: add build and doc infrastructure

[Jiawen Wu]

Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for ngbe PMD.

Signed-off-by: Jiawen Wu 
---
 MAINTAINERS|  6 ++
 doc/guides/nics/features/ngbe.ini  | 10 +
 doc/guides/nics/index.rst  |  1 +
 doc/guides/nics/ngbe.rst   | 28 ++
 doc/guides/rel_notes/release_21_08.rst |  6 ++
 drivers/net/meson.build|  1 +
 drivers/net/ngbe/meson.build   | 12 +++
 drivers/net/ngbe/ngbe_ethdev.c |  5 +
 drivers/net/ngbe/ngbe_ethdev.h |  5 +
 drivers/net/ngbe/version.map   |  3 +++
 10 files changed, 77 insertions(+)
 create mode 100644 doc/guides/nics/features/ngbe.ini
 create mode 100644 doc/guides/nics/ngbe.rst
 create mode 100644 drivers/net/ngbe/meson.build
 create mode 100644 drivers/net/ngbe/ngbe_ethdev.c
 create mode 100644 drivers/net/ngbe/ngbe_ethdev.h
 create mode 100644 drivers/net/ngbe/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 5877a16971..04672f6eaa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -903,6 +903,12 @@ F: drivers/net/txgbe/
 F: doc/guides/nics/txgbe.rst
 F: doc/guides/nics/features/txgbe.ini
 
+Wangxun ngbe
+M: Jiawen Wu 
+F: drivers/net/ngbe/
+F: doc/guides/nics/ngbe.rst
+F: doc/guides/nics/features/ngbe.ini
+
 VMware vmxnet3
 M: Yong Wang 
 F: drivers/net/vmxnet3/
diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
new file mode 100644
index 00..a7a524defc
--- /dev/null
+++ b/doc/guides/nics/features/ngbe.ini
@@ -0,0 +1,10 @@
+;
+; Supported features of the 'ngbe' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Linux= Y
+ARMv8= Y
+x86-32   = Y
+x86-64   = Y
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index 799697caf0..31a3e6bcdc 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -47,6 +47,7 @@ Network Interface Controller Drivers
 netvsc
 nfb
 nfp
+ngbe
 null
 octeontx
 octeontx2
diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
new file mode 100644
index 00..4ec2623a05
--- /dev/null
+++ b/doc/guides/nics/ngbe.rst
@@ -0,0 +1,28 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+
+NGBE Poll Mode Driver
+==
+
+The NGBE PMD (librte_pmd_ngbe) provides poll mode driver support
+for Wangxun 1 Gigabit Ethernet NICs.
+
+Prerequisites
+-
+
+- Learning about Wangxun 1 Gigabit Ethernet NICs using
+  ``_.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
+
+Driver compilation and testing
+--
+
+Refer to the document :ref:`compiling and testing a PMD for a NIC 
`
+for details.
+
+Limitations or Known issues
+---
+
+Build with ICC is not supported yet.
+Power8, ARMv7 and BSD are not supported yet.
diff --git a/doc/guides/rel_notes/release_21_08.rst 
b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..2deac4f398 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -55,6 +55,12 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Added Wangxun ngbe PMD.**
+
+  Added a new PMD driver for Wangxun 1 Gigabit Ethernet NICs.
+
+  See the :doc:`../nics/ngbe` for more details.
+
 
 Removed Items
 -
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index c8b5ce2980..d6c1751540 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -40,6 +40,7 @@ drivers = [
 'netvsc',
 'nfb',
 'nfp',
+   'ngbe',
 'null',
 'octeontx',
 'octeontx2',
diff --git a/drivers/net/ngbe/meson.build b/drivers/net/ngbe/meson.build
new file mode 100644
index 00..de2d7be716
--- /dev/null
+++ b/drivers/net/ngbe/meson.build
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+
+if is_windows
+   build = false
+   reason = 'not supported on Windows'
+   subdir_done()
+endif
+
+sources = files(
+   'ngbe_ethdev.c',
+)
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
new file mode 100644
index 00..e424ff11a2
--- /dev/null
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
new file mode 100644
index 00..e424ff11a2
--- /dev/null
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@

[dpdk-dev] [PATCH v5 02/24] net/ngbe: add device IDs

[Jiawen Wu]

Add device IDs for Wangxun 1Gb NICs, and register rte_ngbe_pmd.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/meson.build   | 18 +++
 drivers/net/ngbe/base/ngbe_devids.h | 84 +
 drivers/net/ngbe/meson.build|  6 +++
 drivers/net/ngbe/ngbe_ethdev.c  | 51 ++
 4 files changed, 159 insertions(+)
 create mode 100644 drivers/net/ngbe/base/meson.build
 create mode 100644 drivers/net/ngbe/base/ngbe_devids.h

diff --git a/drivers/net/ngbe/base/meson.build 
b/drivers/net/ngbe/base/meson.build
new file mode 100644
index 00..c5f6467743
--- /dev/null
+++ b/drivers/net/ngbe/base/meson.build
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+
+sources = []
+
+error_cflags = []
+
+c_args = cflags
+foreach flag: error_cflags
+   if cc.has_argument(flag)
+   c_args += flag
+   endif
+endforeach
+
+base_lib = static_library('ngbe_base', sources,
+   dependencies: [static_rte_eal, static_rte_ethdev, static_rte_bus_pci],
+   c_args: c_args)
+base_objs = base_lib.extract_all_objects()
diff --git a/drivers/net/ngbe/base/ngbe_devids.h 
b/drivers/net/ngbe/base/ngbe_devids.h
new file mode 100644
index 00..81671f71da
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_devids.h
@@ -0,0 +1,84 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_DEVIDS_H_
+#define _NGBE_DEVIDS_H_
+
+/*
+ * Vendor ID
+ */
+#ifndef PCI_VENDOR_ID_WANGXUN
+#define PCI_VENDOR_ID_WANGXUN   0x8088
+#endif
+
+/*
+ * Device IDs
+ */
+#define NGBE_DEV_ID_EM_VF  0x0110
+#define   NGBE_SUB_DEV_ID_EM_VF0x0110
+#define NGBE_DEV_ID_EM 0x0100
+#define   NGBE_SUB_DEV_ID_EM_MVL_RGMII 0x0200
+#define   NGBE_SUB_DEV_ID_EM_MVL_SFP   0x0403
+#define   NGBE_SUB_DEV_ID_EM_RTL_SGMII 0x0410
+#define   NGBE_SUB_DEV_ID_EM_YT8521S_SFP   0x0460
+
+#define NGBE_DEV_ID_EM_WX1860AL_W  0x0100
+#define NGBE_DEV_ID_EM_WX1860AL_W_VF   0x0110
+#define NGBE_DEV_ID_EM_WX1860A20x0101
+#define NGBE_DEV_ID_EM_WX1860A2_VF 0x0111
+#define NGBE_DEV_ID_EM_WX1860A2S   0x0102
+#define NGBE_DEV_ID_EM_WX1860A2S_VF0x0112
+#define NGBE_DEV_ID_EM_WX1860A40x0103
+#define NGBE_DEV_ID_EM_WX1860A4_VF 0x0113
+#define NGBE_DEV_ID_EM_WX1860A4S   0x0104
+#define NGBE_DEV_ID_EM_WX1860A4S_VF0x0114
+#define NGBE_DEV_ID_EM_WX1860AL2   0x0105
+#define NGBE_DEV_ID_EM_WX1860AL2_VF0x0115
+#define NGBE_DEV_ID_EM_WX1860AL2S  0x0106
+#define NGBE_DEV_ID_EM_WX1860AL2S_VF   0x0116
+#define NGBE_DEV_ID_EM_WX1860AL4   0x0107
+#define NGBE_DEV_ID_EM_WX1860AL4_VF0x0117
+#define NGBE_DEV_ID_EM_WX1860AL4S  0x0108
+#define NGBE_DEV_ID_EM_WX1860AL4S_VF   0x0118
+#define NGBE_DEV_ID_EM_WX1860NCSI  0x0109
+#define NGBE_DEV_ID_EM_WX1860NCSI_VF   0x0119
+#define NGBE_DEV_ID_EM_WX1860A10x010A
+#define NGBE_DEV_ID_EM_WX1860A1_VF 0x011A
+#define NGBE_DEV_ID_EM_WX1860A1L   0x010B
+#define NGBE_DEV_ID_EM_WX1860A1L_VF0x011B
+#define   NGBE_SUB_DEV_ID_EM_ZTE5201_RJ45  0x0100
+#define   NGBE_SUB_DEV_ID_EM_SF100F_LP 0x0103
+#define   NGBE_SUB_DEV_ID_EM_M88E1512_RJ45 0x0200
+#define   NGBE_SUB_DEV_ID_EM_SF100HT   0x0102
+#define   NGBE_SUB_DEV_ID_EM_SF200T0x0201
+#define   NGBE_SUB_DEV_ID_EM_SF200HT   0x0202
+#define   NGBE_SUB_DEV_ID_EM_SF200T_S  0x0210
+#define   NGBE_SUB_DEV_ID_EM_SF200HT_S 0x0220
+#define   NGBE_SUB_DEV_ID_EM_SF200HXT  0x0230
+#define   NGBE_SUB_DEV_ID_EM_SF400T0x0401
+#define   NGBE_SUB_DEV_ID_EM_SF400HT   0x0402
+#define   NGBE_SUB_DEV_ID_EM_M88E1512_SFP  0x0403
+#define   NGBE_SUB_DEV_ID_EM_SF400T_S  0x0410
+#define   NGBE_SUB_DEV_ID_EM_SF400HT_S 0x0420
+#define   NGBE_SUB_DEV_ID_EM_SF400HXT  0x0430
+#define   NGBE_SUB_DEV_ID_EM_SF400_OCP 0x0440
+#define   NGBE_SUB_DEV_ID_EM_SF400_LY  0x0450
+#define   NGBE_SUB_DEV_ID_EM_SF400_LY_YT   0x0470
+
+/* Assign excessive id with masks */
+#define NGBE_INTERNAL_MASK 0x000F
+#define NGBE_OEM_MASK  0x00F0
+#define NGBE_WOL_SUP_MASK  0x4000
+#define NGBE_NCSI_SUP_MASK 0x8000
+
+#define NGBE_INTERNAL_SFP  0x0003
+#define NGBE_OCP_CARD  0x0040
+#define NGBE_LY_M88E1512_SFP   0x0050
+#define NGBE_YT8521S_SFP   0x0060
+#define NGBE_LY_YT8521S_SFP0x0070
+#define NGBE_WO

[dpdk-dev] [PATCH v5 04/24] net/ngbe: add device init and uninit

[Jiawen Wu]

Add basic init and uninit function.
Map device IDs and subsystem IDs to single ID for easy operation.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/meson.build  |   4 +-
 drivers/net/ngbe/base/ngbe.h   |  11 ++
 drivers/net/ngbe/base/ngbe_hw.c|  60 ++
 drivers/net/ngbe/base/ngbe_hw.h|  13 +++
 drivers/net/ngbe/base/ngbe_osdep.h | 175 +
 drivers/net/ngbe/base/ngbe_type.h  |  28 +
 drivers/net/ngbe/ngbe_ethdev.c |  36 +-
 drivers/net/ngbe/ngbe_ethdev.h |   7 ++
 8 files changed, 331 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/ngbe/base/ngbe.h
 create mode 100644 drivers/net/ngbe/base/ngbe_hw.c
 create mode 100644 drivers/net/ngbe/base/ngbe_hw.h
 create mode 100644 drivers/net/ngbe/base/ngbe_osdep.h
 create mode 100644 drivers/net/ngbe/base/ngbe_type.h

diff --git a/drivers/net/ngbe/base/meson.build 
b/drivers/net/ngbe/base/meson.build
index c5f6467743..fdbfa99916 100644
--- a/drivers/net/ngbe/base/meson.build
+++ b/drivers/net/ngbe/base/meson.build
@@ -1,7 +1,9 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
 
-sources = []
+sources = [
+   'ngbe_hw.c',
+]
 
 error_cflags = []
 
diff --git a/drivers/net/ngbe/base/ngbe.h b/drivers/net/ngbe/base/ngbe.h
new file mode 100644
index 00..63fad12ad3
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ */
+
+#ifndef _NGBE_H_
+#define _NGBE_H_
+
+#include "ngbe_type.h"
+#include "ngbe_hw.h"
+
+#endif /* _NGBE_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
new file mode 100644
index 00..0fab47f272
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#include "ngbe_hw.h"
+
+void ngbe_map_device_id(struct ngbe_hw *hw)
+{
+   u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
+   u16 internal = hw->sub_system_id & NGBE_INTERNAL_MASK;
+   hw->is_pf = true;
+
+   /* move subsystem_device_id to device_id */
+   switch (hw->device_id) {
+   case NGBE_DEV_ID_EM_WX1860AL_W_VF:
+   case NGBE_DEV_ID_EM_WX1860A2_VF:
+   case NGBE_DEV_ID_EM_WX1860A2S_VF:
+   case NGBE_DEV_ID_EM_WX1860A4_VF:
+   case NGBE_DEV_ID_EM_WX1860A4S_VF:
+   case NGBE_DEV_ID_EM_WX1860AL2_VF:
+   case NGBE_DEV_ID_EM_WX1860AL2S_VF:
+   case NGBE_DEV_ID_EM_WX1860AL4_VF:
+   case NGBE_DEV_ID_EM_WX1860AL4S_VF:
+   case NGBE_DEV_ID_EM_WX1860NCSI_VF:
+   case NGBE_DEV_ID_EM_WX1860A1_VF:
+   case NGBE_DEV_ID_EM_WX1860A1L_VF:
+   hw->device_id = NGBE_DEV_ID_EM_VF;
+   hw->sub_device_id = NGBE_SUB_DEV_ID_EM_VF;
+   hw->is_pf = false;
+   break;
+   case NGBE_DEV_ID_EM_WX1860AL_W:
+   case NGBE_DEV_ID_EM_WX1860A2:
+   case NGBE_DEV_ID_EM_WX1860A2S:
+   case NGBE_DEV_ID_EM_WX1860A4:
+   case NGBE_DEV_ID_EM_WX1860A4S:
+   case NGBE_DEV_ID_EM_WX1860AL2:
+   case NGBE_DEV_ID_EM_WX1860AL2S:
+   case NGBE_DEV_ID_EM_WX1860AL4:
+   case NGBE_DEV_ID_EM_WX1860AL4S:
+   case NGBE_DEV_ID_EM_WX1860NCSI:
+   case NGBE_DEV_ID_EM_WX1860A1:
+   case NGBE_DEV_ID_EM_WX1860A1L:
+   hw->device_id = NGBE_DEV_ID_EM;
+   if (oem == NGBE_LY_M88E1512_SFP ||
+   internal == NGBE_INTERNAL_SFP)
+   hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_SFP;
+   else if (hw->sub_system_id == NGBE_SUB_DEV_ID_EM_M88E1512_RJ45)
+   hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_RGMII;
+   else if (oem == NGBE_YT8521S_SFP ||
+   oem == NGBE_LY_YT8521S_SFP)
+   hw->sub_device_id = NGBE_SUB_DEV_ID_EM_YT8521S_SFP;
+   else
+   hw->sub_device_id = NGBE_SUB_DEV_ID_EM_RTL_SGMII;
+   break;
+   default:
+   break;
+   }
+}
+
diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h
new file mode 100644
index 00..b320d126ec
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_hw.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_HW_H_
+#define _NGBE_HW_H_
+
+#include "ngbe_type.h"
+
+void ngbe_map_device_id(struct ngbe_hw *hw);
+
+#endif /* _NGBE_HW_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_osdep.h 
b/drivers/net/ngbe/base/ngbe_osdep.h
new file mode 100644
index 00..ef3d3d9180
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_osdep.h
@@ -0,0 +1,175 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun

[dpdk-dev] [PATCH v5 03/24] net/ngbe: support probe and remove

[Jiawen Wu]

Add basic PCIe ethdev probe and remove.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini |  1 +
 drivers/net/ngbe/ngbe_ethdev.c| 44 ---
 drivers/net/ngbe/ngbe_ethdev.h| 10 +++
 3 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index a7a524defc..977286ac04 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -4,6 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Multiprocess aware   = Y
 Linux= Y
 ARMv8= Y
 x86-32   = Y
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 0f1fa86fe6..83af1a6bc7 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -3,9 +3,11 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include 
 #include 
 
 #include 
+#include "ngbe_ethdev.h"
 
 /*
  * The set of PCI devices this driver supports
@@ -26,20 +28,56 @@ static const struct rte_pci_id pci_id_ngbe_map[] = {
{ .vendor_id = 0, /* sentinel */ },
 };
 
+static int
+eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
+   rte_eth_copy_pci_info(eth_dev, pci_dev);
+
+   return 0;
+}
+
+static int
+eth_ngbe_dev_uninit(struct rte_eth_dev *eth_dev)
+{
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
+   RTE_SET_USED(eth_dev);
+
+   return 0;
+}
+
 static int
 eth_ngbe_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
 {
-   RTE_SET_USED(pci_dev);
+   int retval;
+
+   retval = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name,
+   sizeof(struct ngbe_adapter),
+   eth_dev_pci_specific_init, pci_dev,
+   eth_ngbe_dev_init, NULL);
+
+   if (retval)
+   return retval;
 
return 0;
 }
 
 static int eth_ngbe_pci_remove(struct rte_pci_device *pci_dev)
 {
-   RTE_SET_USED(pci_dev);
+   struct rte_eth_dev *ethdev;
 
-   return 0;
+   ethdev = rte_eth_dev_allocated(pci_dev->device.name);
+   if (!ethdev)
+   return 0;
+
+   return rte_eth_dev_destroy(ethdev, eth_ngbe_dev_uninit);
 }
 
 static struct rte_pci_driver rte_ngbe_pmd = {
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index e424ff11a2..b79570dc51 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -3,3 +3,13 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#ifndef _NGBE_ETHDEV_H_
+#define _NGBE_ETHDEV_H_
+
+/*
+ * Structure to store private data for each driver instance (for each port).
+ */
+struct ngbe_adapter {
+};
+
+#endif /* _NGBE_ETHDEV_H_ */
-- 
2.27.0

[dpdk-dev] [PATCH v5 05/24] net/ngbe: add log type and error type

[Jiawen Wu]

Add log type and error type to trace functions.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/ngbe.rst|  20 +
 drivers/net/ngbe/base/ngbe_status.h | 125 
 drivers/net/ngbe/base/ngbe_type.h   |   1 +
 drivers/net/ngbe/ngbe_ethdev.c  |  16 
 drivers/net/ngbe/ngbe_logs.h|  46 ++
 5 files changed, 208 insertions(+)
 create mode 100644 drivers/net/ngbe/base/ngbe_status.h
 create mode 100644 drivers/net/ngbe/ngbe_logs.h

diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index 4ec2623a05..c274a15aab 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -15,6 +15,26 @@ Prerequisites
 
 - Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
 
+Pre-Installation Configuration
+--
+
+Dynamic Logging Parameters
+~~
+
+One may leverage EAL option "--log-level" to change default levels
+for the log types supported by the driver. The option is used with
+an argument typically consisting of two parts separated by a colon.
+
+NGBE PMD provides the following log types available for control:
+
+- ``pmd.net.ngbe.driver`` (default level is **notice**)
+
+  Affects driver-wide messages unrelated to any particular devices.
+
+- ``pmd.net.ngbe.init`` (default level is **notice**)
+
+  Extra logging of the messages during PMD initialization.
+
 Driver compilation and testing
 --
 
diff --git a/drivers/net/ngbe/base/ngbe_status.h 
b/drivers/net/ngbe/base/ngbe_status.h
new file mode 100644
index 00..b1836c6479
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_status.h
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_STATUS_H_
+#define _NGBE_STATUS_H_
+
+/* Error Codes:
+ * common error
+ * module error(simple)
+ * module error(detailed)
+ *
+ * (-256, 256): reserved for non-ngbe defined error code
+ */
+#define TERR_BASE (0x100)
+enum ngbe_error {
+   TERR_NULL = TERR_BASE,
+   TERR_ANY,
+   TERR_NOSUPP,
+   TERR_NOIMPL,
+   TERR_NOMEM,
+   TERR_NOSPACE,
+   TERR_NOENTRY,
+   TERR_CONFIG,
+   TERR_ARGS,
+   TERR_PARAM,
+   TERR_INVALID,
+   TERR_TIMEOUT,
+   TERR_VERSION,
+   TERR_REGISTER,
+   TERR_FEATURE,
+   TERR_RESET,
+   TERR_AUTONEG,
+   TERR_MBX,
+   TERR_I2C,
+   TERR_FC,
+   TERR_FLASH,
+   TERR_DEVICE,
+   TERR_HOSTIF,
+   TERR_SRAM,
+   TERR_EEPROM,
+   TERR_EEPROM_CHECKSUM,
+   TERR_EEPROM_PROTECT,
+   TERR_EEPROM_VERSION,
+   TERR_MAC,
+   TERR_MAC_ADDR,
+   TERR_SFP,
+   TERR_SFP_INITSEQ,
+   TERR_SFP_PRESENT,
+   TERR_SFP_SUPPORT,
+   TERR_SFP_SETUP,
+   TERR_PHY,
+   TERR_PHY_ADDR,
+   TERR_PHY_INIT,
+   TERR_FDIR_CMD,
+   TERR_FDIR_REINIT,
+   TERR_SWFW_SYNC,
+   TERR_SWFW_COMMAND,
+   TERR_FC_CFG,
+   TERR_FC_NEGO,
+   TERR_LINK_SETUP,
+   TERR_PCIE_PENDING,
+   TERR_PBA_SECTION,
+   TERR_OVERTEMP,
+   TERR_UNDERTEMP,
+   TERR_XPCS_POWERUP,
+};
+
+/* WARNING: just for legacy compatibility */
+#define NGBE_NOT_IMPLEMENTED 0x7FFF
+#define NGBE_ERR_OPS_DUMMY   0x3FFF
+
+/* Error Codes */
+#define NGBE_ERR_EEPROM-(TERR_BASE + 1)
+#define NGBE_ERR_EEPROM_CHECKSUM   -(TERR_BASE + 2)
+#define NGBE_ERR_PHY   -(TERR_BASE + 3)
+#define NGBE_ERR_CONFIG-(TERR_BASE + 4)
+#define NGBE_ERR_PARAM -(TERR_BASE + 5)
+#define NGBE_ERR_MAC_TYPE  -(TERR_BASE + 6)
+#define NGBE_ERR_UNKNOWN_PHY   -(TERR_BASE + 7)
+#define NGBE_ERR_LINK_SETUP-(TERR_BASE + 8)
+#define NGBE_ERR_ADAPTER_STOPPED   -(TERR_BASE + 9)
+#define NGBE_ERR_INVALID_MAC_ADDR  -(TERR_BASE + 10)
+#define NGBE_ERR_DEVICE_NOT_SUPPORTED  -(TERR_BASE + 11)
+#define NGBE_ERR_MASTER_REQUESTS_PENDING   -(TERR_BASE + 12)
+#define NGBE_ERR_INVALID_LINK_SETTINGS -(TERR_BASE + 13)
+#define NGBE_ERR_AUTONEG_NOT_COMPLETE  -(TERR_BASE + 14)
+#define NGBE_ERR_RESET_FAILED  -(TERR_BASE + 15)
+#define NGBE_ERR_SWFW_SYNC -(TERR_BASE + 16)
+#define NGBE_ERR_PHY_ADDR_INVALID  -(TERR_BASE + 17)
+#define NGBE_ERR_I2C   -(TERR_BASE + 18)
+#define NGBE_ERR_SFP_NOT_SUPPORTED -(TERR_BASE + 19)
+#define NGBE_ERR_SFP_NOT_PRESENT   -(TERR_BASE + 20)
+#define NGBE_ERR_SFP_NO_INIT_SEQ_PRESENT   -(TERR_BASE + 21)
+#define NGBE_ERR_NO_SAN_ADDR_PTR   -(TERR_BASE + 22)
+#define NGBE_ERR_FDIR_REINIT_FAILED-(TERR_BASE + 23)
+#define NGBE_ERR_EEPROM_VERSION-(TERR_BASE

[dpdk-dev] [PATCH v5 07/24] net/ngbe: set MAC type and LAN id

[Jiawen Wu]

Initialize the shared code.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_dummy.h |  37 +
 drivers/net/ngbe/base/ngbe_hw.c| 122 +
 drivers/net/ngbe/base/ngbe_hw.h|   5 ++
 drivers/net/ngbe/base/ngbe_osdep.h |   2 +
 drivers/net/ngbe/base/ngbe_type.h  |  53 +
 drivers/net/ngbe/ngbe_ethdev.c |   8 ++
 6 files changed, 227 insertions(+)
 create mode 100644 drivers/net/ngbe/base/ngbe_dummy.h

diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
new file mode 100644
index 00..75b4e50bca
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ */
+
+#ifndef _NGBE_TYPE_DUMMY_H_
+#define _NGBE_TYPE_DUMMY_H_
+
+#ifdef TUP
+#elif defined(__GNUC__)
+#define TUP(x) x##_unused ngbe_unused
+#elif defined(__LCLINT__)
+#define TUP(x) x /*@unused@*/
+#else
+#define TUP(x) x
+#endif /*TUP*/
+#define TUP0 TUP(p0)
+#define TUP1 TUP(p1)
+#define TUP2 TUP(p2)
+#define TUP3 TUP(p3)
+#define TUP4 TUP(p4)
+#define TUP5 TUP(p5)
+#define TUP6 TUP(p6)
+#define TUP7 TUP(p7)
+#define TUP8 TUP(p8)
+#define TUP9 TUP(p9)
+
+/* struct ngbe_bus_operations */
+static inline void ngbe_bus_set_lan_id_dummy(struct ngbe_hw *TUP0)
+{
+}
+static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
+{
+   hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
+}
+
+#endif /* _NGBE_TYPE_DUMMY_H_ */
+
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 0fab47f272..014bb0faee 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -3,8 +3,74 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include "ngbe_type.h"
 #include "ngbe_hw.h"
 
+/**
+ *  ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers and swaps
+ *  the port value if requested, and set MAC instance for devices.
+ **/
+void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)
+{
+   struct ngbe_bus_info *bus = &hw->bus;
+   u32 reg = 0;
+
+   DEBUGFUNC("ngbe_set_lan_id_multi_port");
+
+   reg = rd32(hw, NGBE_PORTSTAT);
+   bus->lan_id = NGBE_PORTSTAT_ID(reg);
+   bus->func = bus->lan_id;
+}
+
+/**
+ *  ngbe_set_mac_type - Sets MAC type
+ *  @hw: pointer to the HW structure
+ *
+ *  This function sets the mac type of the adapter based on the
+ *  vendor ID and device ID stored in the hw structure.
+ **/
+s32 ngbe_set_mac_type(struct ngbe_hw *hw)
+{
+   s32 err = 0;
+
+   DEBUGFUNC("ngbe_set_mac_type");
+
+   if (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {
+   DEBUGOUT("Unsupported vendor id: %x", hw->vendor_id);
+   return NGBE_ERR_DEVICE_NOT_SUPPORTED;
+   }
+
+   switch (hw->sub_device_id) {
+   case NGBE_SUB_DEV_ID_EM_RTL_SGMII:
+   case NGBE_SUB_DEV_ID_EM_MVL_RGMII:
+   hw->phy.media_type = ngbe_media_type_copper;
+   hw->mac.type = ngbe_mac_em;
+   break;
+   case NGBE_SUB_DEV_ID_EM_MVL_SFP:
+   case NGBE_SUB_DEV_ID_EM_YT8521S_SFP:
+   hw->phy.media_type = ngbe_media_type_fiber;
+   hw->mac.type = ngbe_mac_em;
+   break;
+   case NGBE_SUB_DEV_ID_EM_VF:
+   hw->phy.media_type = ngbe_media_type_virtual;
+   hw->mac.type = ngbe_mac_em_vf;
+   break;
+   default:
+   err = NGBE_ERR_DEVICE_NOT_SUPPORTED;
+   hw->phy.media_type = ngbe_media_type_unknown;
+   hw->mac.type = ngbe_mac_unknown;
+   DEBUGOUT("Unsupported device id: %x", hw->device_id);
+   break;
+   }
+
+   DEBUGOUT("found mac: %d media: %d, returns: %d\n",
+ hw->mac.type, hw->phy.media_type, err);
+   return err;
+}
+
 void ngbe_map_device_id(struct ngbe_hw *hw)
 {
u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
@@ -58,3 +124,59 @@ void ngbe_map_device_id(struct ngbe_hw *hw)
}
 }
 
+/**
+ *  ngbe_init_ops_pf - Inits func ptrs and MAC type
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the function pointers and assign the MAC type.
+ *  Does not touch the hardware.
+ **/
+s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
+{
+   struct ngbe_bus_info *bus = &hw->bus;
+
+   DEBUGFUNC("ngbe_init_ops_pf");
+
+   /* BUS */
+   bus->set_lan_id = ngbe_set_lan_id_multi_port;
+
+   return 0;
+}
+
+/**
+ *  ngbe_init_shared_code - Initialize the shared code
+ *  @hw: pointer to hardware structure
+ *
+ *  This will assign function pointers and assign the MAC type and PHY code.
+ *  Does not touch the hardware. This function must be called prior to any
+ *  other function in the shared code. The ngbe_hw structure should be
+ *  memset to 0 prior to calling this function.  The following fields in
+ *  hw 

[dpdk-dev] [PATCH v5 06/24] net/ngbe: define registers

[Jiawen Wu]

Define all registers that will be used.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_regs.h | 1490 +
 drivers/net/ngbe/base/ngbe_type.h |2 +
 2 files changed, 1492 insertions(+)
 create mode 100644 drivers/net/ngbe/base/ngbe_regs.h

diff --git a/drivers/net/ngbe/base/ngbe_regs.h 
b/drivers/net/ngbe/base/ngbe_regs.h
new file mode 100644
index 00..737bd796a1
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_regs.h
@@ -0,0 +1,1490 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_REGS_H_
+#define _NGBE_REGS_H_
+
+#define NGBE_PVMBX_QSIZE  (16) /* 16*4B */
+#define NGBE_PVMBX_BSIZE  (NGBE_PVMBX_QSIZE * 4)
+
+#define NGBE_REMOVED(a) (0)
+
+#define NGBE_REG_DUMMY 0xFF
+
+#define MS8(shift, mask)  (((u8)(mask)) << (shift))
+#define LS8(val, shift, mask) (((u8)(val) & (u8)(mask)) << (shift))
+#define RS8(reg, shift, mask) (((u8)(reg) >> (shift)) & (u8)(mask))
+
+#define MS16(shift, mask) (((u16)(mask)) << (shift))
+#define LS16(val, shift, mask)(((u16)(val) & (u16)(mask)) << (shift))
+#define RS16(reg, shift, mask)(((u16)(reg) >> (shift)) & (u16)(mask))
+
+#define MS32(shift, mask) (((u32)(mask)) << (shift))
+#define LS32(val, shift, mask)(((u32)(val) & (u32)(mask)) << (shift))
+#define RS32(reg, shift, mask)(((u32)(reg) >> (shift)) & (u32)(mask))
+
+#define MS64(shift, mask) (((u64)(mask)) << (shift))
+#define LS64(val, shift, mask)(((u64)(val) & (u64)(mask)) << (shift))
+#define RS64(reg, shift, mask)(((u64)(reg) >> (shift)) & (u64)(mask))
+
+#define MS(shift, mask)   MS32(shift, mask)
+#define LS(val, shift, mask)  LS32(val, shift, mask)
+#define RS(reg, shift, mask)  RS32(reg, shift, mask)
+
+#define ROUND_UP(x, y)  (((x) + (y) - 1) / (y) * (y))
+#define ROUND_DOWN(x, y)((x) / (y) * (y))
+#define ROUND_OVER(x, maxbits, unitbits) \
+   ((x) >= 1 << (maxbits) ? 0 : (x) >> (unitbits))
+
+/* autoc bits definition */
+#define NGBE_AUTOC   NGBE_REG_DUMMY
+#define   NGBE_AUTOC_FLU MS64(0, 0x1)
+#define   NGBE_AUTOC_10G_PMA_PMD_MASKMS64(7, 0x3) /* parallel */
+#define   NGBE_AUTOC_10G_XAUILS64(0, 7, 0x3)
+#define   NGBE_AUTOC_10G_KX4 LS64(1, 7, 0x3)
+#define   NGBE_AUTOC_10G_CX4 LS64(2, 7, 0x3)
+#define   NGBE_AUTOC_10G_KR  LS64(3, 7, 0x3) /* fixme */
+#define   NGBE_AUTOC_1G_PMA_PMD_MASK MS64(9, 0x7)
+#define   NGBE_AUTOC_1G_BX   LS64(0, 9, 0x7)
+#define   NGBE_AUTOC_1G_KX   LS64(1, 9, 0x7)
+#define   NGBE_AUTOC_1G_SFI  LS64(0, 9, 0x7)
+#define   NGBE_AUTOC_1G_KX_BXLS64(1, 9, 0x7)
+#define   NGBE_AUTOC_AN_RESTART  MS64(12, 0x1)
+#define   NGBE_AUTOC_LMS_MASKMS64(13, 0x7)
+#define   NGBE_AUTOC_LMS_10G LS64(3, 13, 0x7)
+#define   NGBE_AUTOC_LMS_KX4_KX_KR   LS64(4, 13, 0x7)
+#define   NGBE_AUTOC_LMS_SGMII_1G_100M   LS64(5, 13, 0x7)
+#define   NGBE_AUTOC_LMS_KX4_KX_KR_1G_AN LS64(6, 13, 0x7)
+#define   NGBE_AUTOC_LMS_KX4_KX_KR_SGMII LS64(7, 13, 0x7)
+#define   NGBE_AUTOC_LMS_1G_LINK_NO_AN   LS64(0, 13, 0x7)
+#define   NGBE_AUTOC_LMS_10G_LINK_NO_AN  LS64(1, 13, 0x7)
+#define   NGBE_AUTOC_LMS_1G_AN   LS64(2, 13, 0x7)
+#define   NGBE_AUTOC_LMS_KX4_AN  LS64(4, 13, 0x7)
+#define   NGBE_AUTOC_LMS_KX4_AN_1G_ANLS64(6, 13, 0x7)
+#define   NGBE_AUTOC_LMS_ATTACH_TYPE LS64(7, 13, 0x7)
+#define   NGBE_AUTOC_LMS_AN  MS64(15, 0x7)
+
+#define   NGBE_AUTOC_KR_SUPP MS64(16, 0x1)
+#define   NGBE_AUTOC_FECRMS64(17, 0x1)
+#define   NGBE_AUTOC_FECAMS64(18, 0x1)
+#define   NGBE_AUTOC_AN_RX_ALIGN MS64(18, 0x1F) /* fixme */
+#define   NGBE_AUTOC_AN_RX_DRIFT MS64(23, 0x3)
+#define   NGBE_AUTOC_AN_RX_LOOSE MS64(24, 0x3)
+#define   NGBE_AUTOC_PD_TMR  MS64(25, 0x3)
+#define   NGBE_AUTOC_RF  MS64(27, 0x1)
+#define   NGBE_AUTOC_ASM_PAUSE   MS64(29, 0x1)
+#define   NGBE_AUTOC_SYM_PAUSE   MS64(28, 0x1)
+#define   NGBE_AUTOC_PAUSE   MS64(28, 0x3)
+#define   NGBE_AUTOC_KX_SUPP MS64(30, 0x1)
+#define   NGBE_AUTOC_KX4_SUPPMS64(31, 0x1)
+
+#define   NGBE_AUTOC_10GS_PMA_PMD_MASK   MS64(48, 0x3)  /* serial */
+#define   NGBE_AUTOC_10GS_KR LS64(0, 48, 0x3)
+#define   NGBE_AUTOC_10GS_XFILS64(1, 48, 0x3)
+#define   NGBE_AUTOC_10GS_SFILS64(2, 48, 0x3)
+#define   NGBE_AUTOC_LINK_DIA_MASK   MS64(60, 0x7)
+#define   NGBE_AUTOC_LINK_DIA_D3_MASKLS64(5, 60, 0x7)
+
+#define   NGBE_AUTOC_SPEED_MASK  MS64(32, 0x)
+#define   NGBD_AUTOC_SPEED(r)RS64(r, 32, 0x)
+#define   NGBE_AUTOC_SPEED(v)LS64(v, 32, 0x)
+#define NGBE_LINK_SPEED

[dpdk-dev] [PATCH v5 08/24] net/ngbe: init and validate EEPROM

[Jiawen Wu]

Reset swfw lock before NVM access, init EEPROM and validate the
checksum.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/meson.build   |   2 +
 drivers/net/ngbe/base/ngbe_dummy.h  |  23 
 drivers/net/ngbe/base/ngbe_eeprom.c | 203 
 drivers/net/ngbe/base/ngbe_eeprom.h |  17 +++
 drivers/net/ngbe/base/ngbe_hw.c |  83 
 drivers/net/ngbe/base/ngbe_hw.h |   3 +
 drivers/net/ngbe/base/ngbe_mng.c| 198 +++
 drivers/net/ngbe/base/ngbe_mng.h|  65 +
 drivers/net/ngbe/base/ngbe_type.h   |  24 
 drivers/net/ngbe/ngbe_ethdev.c  |  39 ++
 10 files changed, 657 insertions(+)
 create mode 100644 drivers/net/ngbe/base/ngbe_eeprom.c
 create mode 100644 drivers/net/ngbe/base/ngbe_eeprom.h
 create mode 100644 drivers/net/ngbe/base/ngbe_mng.c
 create mode 100644 drivers/net/ngbe/base/ngbe_mng.h

diff --git a/drivers/net/ngbe/base/meson.build 
b/drivers/net/ngbe/base/meson.build
index fdbfa99916..ddd122ec45 100644
--- a/drivers/net/ngbe/base/meson.build
+++ b/drivers/net/ngbe/base/meson.build
@@ -2,7 +2,9 @@
 # Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
 
 sources = [
+   'ngbe_eeprom.c',
'ngbe_hw.c',
+   'ngbe_mng.c',
 ]
 
 error_cflags = []
diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index 75b4e50bca..ade03eae81 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -28,9 +28,32 @@
 static inline void ngbe_bus_set_lan_id_dummy(struct ngbe_hw *TUP0)
 {
 }
+/* struct ngbe_rom_operations */
+static inline s32 ngbe_rom_init_params_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_rom_validate_checksum_dummy(struct ngbe_hw *TUP0,
+   u16 *TUP1)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
+   u32 TUP1)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,
+   u32 TUP1)
+{
+}
 static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
 {
hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
+   hw->rom.init_params = ngbe_rom_init_params_dummy;
+   hw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;
+   hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
+   hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
 }
 
 #endif /* _NGBE_TYPE_DUMMY_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_eeprom.c 
b/drivers/net/ngbe/base/ngbe_eeprom.c
new file mode 100644
index 00..0ebbb7a29e
--- /dev/null
+++ b/drivers/net/ngbe/base/ngbe_eeprom.c
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#include "ngbe_hw.h"
+#include "ngbe_mng.h"
+#include "ngbe_eeprom.h"
+
+/**
+ *  ngbe_init_eeprom_params - Initialize EEPROM params
+ *  @hw: pointer to hardware structure
+ *
+ *  Initializes the EEPROM parameters ngbe_rom_info within the
+ *  ngbe_hw struct in order to set up EEPROM access.
+ **/
+s32 ngbe_init_eeprom_params(struct ngbe_hw *hw)
+{
+   struct ngbe_rom_info *eeprom = &hw->rom;
+   u32 eec;
+   u16 eeprom_size;
+
+   DEBUGFUNC("ngbe_init_eeprom_params");
+
+   if (eeprom->type != ngbe_eeprom_unknown)
+   return 0;
+
+   eeprom->type = ngbe_eeprom_none;
+   /* Set default semaphore delay to 10ms which is a well
+* tested value
+*/
+   eeprom->semaphore_delay = 10; /*ms*/
+   /* Clear EEPROM page size, it will be initialized as needed */
+   eeprom->word_page_size = 0;
+
+   /*
+* Check for EEPROM present first.
+* If not present leave as none
+*/
+   eec = rd32(hw, NGBE_SPISTAT);
+   if (!(eec & NGBE_SPISTAT_BPFLASH)) {
+   eeprom->type = ngbe_eeprom_flash;
+
+   /*
+* SPI EEPROM is assumed here.  This code would need to
+* change if a future EEPROM is not SPI.
+*/
+   eeprom_size = 4096;
+   eeprom->word_size = eeprom_size >> 1;
+   }
+
+   eeprom->address_bits = 16;
+   eeprom->sw_addr = 0x80;
+
+   DEBUGOUT("eeprom params: type = %d, size = %d, address bits: "
+ "%d %d\n", eeprom->type, eeprom->word_size,
+ eeprom->address_bits, eeprom->sw_addr);
+
+   return 0;
+}
+
+/**
+ *  ngbe_get_eeprom_semaphore - Get hardware semaphore
+ *  @hw: pointer to hardware structure
+ *
+ *  Sets the hardware semaphores so EEPROM access can occur for bit-bang method
+ **/
+s32 ngbe_get_eeprom_semaphore(struct ngbe_hw *hw)
+{
+   s32 status = NGBE_ERR_EEPROM;
+   u32 timeout = 2000;
+   u32 i;
+   u32 swsm;
+
+   DE

[dpdk-dev] [PATCH v5 09/24] net/ngbe: add HW initialization

[Jiawen Wu]

Initialize the hardware by resetting the hardware in base code.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_dummy.h |  21 +++
 drivers/net/ngbe/base/ngbe_hw.c| 235 +
 drivers/net/ngbe/base/ngbe_hw.h|   9 ++
 drivers/net/ngbe/base/ngbe_type.h  |  24 +++
 drivers/net/ngbe/ngbe_ethdev.c |   7 +
 5 files changed, 296 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index ade03eae81..d0081acc2b 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -38,6 +38,19 @@ static inline s32 ngbe_rom_validate_checksum_dummy(struct 
ngbe_hw *TUP0,
 {
return NGBE_ERR_OPS_DUMMY;
 }
+/* struct ngbe_mac_operations */
+static inline s32 ngbe_mac_init_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_reset_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
u32 TUP1)
 {
@@ -47,13 +60,21 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct 
ngbe_hw *TUP0,
u32 TUP1)
 {
 }
+static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
 {
hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
hw->rom.init_params = ngbe_rom_init_params_dummy;
hw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;
+   hw->mac.init_hw = ngbe_mac_init_hw_dummy;
+   hw->mac.reset_hw = ngbe_mac_reset_hw_dummy;
+   hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
+   hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
 }
 
 #endif /* _NGBE_TYPE_DUMMY_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index de6b75e1c0..9fa40f7de1 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -8,6 +8,133 @@
 #include "ngbe_mng.h"
 #include "ngbe_hw.h"
 
+/**
+ *  ngbe_init_hw - Generic hardware initialization
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the hardware by resetting the hardware, filling the bus info
+ *  structure and media type, clears all on chip counters, initializes receive
+ *  address registers, multicast table, VLAN filter table, calls routine to set
+ *  up link and flow control settings, and leaves transmit and receive units
+ *  disabled and uninitialized
+ **/
+s32 ngbe_init_hw(struct ngbe_hw *hw)
+{
+   s32 status;
+
+   DEBUGFUNC("ngbe_init_hw");
+
+   /* Reset the hardware */
+   status = hw->mac.reset_hw(hw);
+
+   if (status != 0)
+   DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
+
+   return status;
+}
+
+static void
+ngbe_reset_misc_em(struct ngbe_hw *hw)
+{
+   int i;
+
+   wr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0x);
+   wr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);
+
+   /* receive packets that size > 2048 */
+   wr32m(hw, NGBE_MACRXCFG,
+   NGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);
+
+   wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
+   NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
+
+   /* clear counters on read */
+   wr32m(hw, NGBE_MACCNTCTL,
+   NGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);
+
+   wr32m(hw, NGBE_RXFCCFG,
+   NGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);
+   wr32m(hw, NGBE_TXFCCFG,
+   NGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);
+
+   wr32m(hw, NGBE_MACRXFLT,
+   NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);
+
+   wr32m(hw, NGBE_RSTSTAT,
+   NGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));
+
+   /* errata 4: initialize mng flex tbl and wakeup flex tbl*/
+   wr32(hw, NGBE_MNGFLEXSEL, 0);
+   for (i = 0; i < 16; i++) {
+   wr32(hw, NGBE_MNGFLEXDWL(i), 0);
+   wr32(hw, NGBE_MNGFLEXDWH(i), 0);
+   wr32(hw, NGBE_MNGFLEXMSK(i), 0);
+   }
+   wr32(hw, NGBE_LANFLEXSEL, 0);
+   for (i = 0; i < 16; i++) {
+   wr32(hw, NGBE_LANFLEXDWL(i), 0);
+   wr32(hw, NGBE_LANFLEXDWH(i), 0);
+   wr32(hw, NGBE_LANFLEXMSK(i), 0);
+   }
+
+   /* set pause frame dst mac addr */
+   wr32(hw, NGBE_RXPBPFCDMACL, 0xC201);
+   wr32(hw, NGBE_RXPBPFCDMACH, 0x0180);
+
+   wr32(hw, NGBE_MDIOMODE, 0xF);
+
+   wr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);
+
+   if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
+   (hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
+  

[dpdk-dev] [PATCH v5 10/24] net/ngbe: identify PHY and reset PHY

[Jiawen Wu]

Identify PHY to get the PHY type, and perform a PHY reset.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/meson.build|   4 +
 drivers/net/ngbe/base/ngbe_dummy.h   |  40 +++
 drivers/net/ngbe/base/ngbe_hw.c  |  38 +++
 drivers/net/ngbe/base/ngbe_hw.h  |   2 +
 drivers/net/ngbe/base/ngbe_phy.c | 426 +++
 drivers/net/ngbe/base/ngbe_phy.h |  60 
 drivers/net/ngbe/base/ngbe_phy_mvl.c |  89 ++
 drivers/net/ngbe/base/ngbe_phy_mvl.h |  92 ++
 drivers/net/ngbe/base/ngbe_phy_rtl.c |  44 +++
 drivers/net/ngbe/base/ngbe_phy_rtl.h |  83 ++
 drivers/net/ngbe/base/ngbe_phy_yt.c  | 112 +++
 drivers/net/ngbe/base/ngbe_phy_yt.h  |  66 +
 drivers/net/ngbe/base/ngbe_type.h|  17 ++
 13 files changed, 1073 insertions(+)
 create mode 100644 drivers/net/ngbe/base/ngbe_phy.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_mvl.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_mvl.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_rtl.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_rtl.h
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_yt.c
 create mode 100644 drivers/net/ngbe/base/ngbe_phy_yt.h

diff --git a/drivers/net/ngbe/base/meson.build 
b/drivers/net/ngbe/base/meson.build
index ddd122ec45..146134f671 100644
--- a/drivers/net/ngbe/base/meson.build
+++ b/drivers/net/ngbe/base/meson.build
@@ -5,6 +5,10 @@ sources = [
'ngbe_eeprom.c',
'ngbe_hw.c',
'ngbe_mng.c',
+   'ngbe_phy.c',
+   'ngbe_phy_rtl.c',
+   'ngbe_phy_mvl.c',
+   'ngbe_phy_yt.c',
 ]
 
 error_cflags = []
diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index d0081acc2b..15017cfd82 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -64,6 +64,39 @@ static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct 
ngbe_hw *TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_mac_check_overtemp_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+/* struct ngbe_phy_operations */
+static inline s32 ngbe_phy_identify_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_reset_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_read_reg_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   u32 TUP2, u16 *TUP3)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_write_reg_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   u32 TUP2, u16 TUP3)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_read_reg_unlocked_dummy(struct ngbe_hw *TUP0,
+   u32 TUP1, u32 TUP2, u16 *TUP3)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_write_reg_unlocked_dummy(struct ngbe_hw *TUP0,
+   u32 TUP1, u32 TUP2, u16 TUP3)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
 {
hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
@@ -75,6 +108,13 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
+   hw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy;
+   hw->phy.identify = ngbe_phy_identify_dummy;
+   hw->phy.reset_hw = ngbe_phy_reset_hw_dummy;
+   hw->phy.read_reg = ngbe_phy_read_reg_dummy;
+   hw->phy.write_reg = ngbe_phy_write_reg_dummy;
+   hw->phy.read_reg_unlocked = ngbe_phy_read_reg_unlocked_dummy;
+   hw->phy.write_reg_unlocked = ngbe_phy_write_reg_unlocked_dummy;
 }
 
 #endif /* _NGBE_TYPE_DUMMY_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 9fa40f7de1..ebd163d9e6 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -4,6 +4,7 @@
  */
 
 #include "ngbe_type.h"
+#include "ngbe_phy.h"
 #include "ngbe_eeprom.h"
 #include "ngbe_mng.h"
 #include "ngbe_hw.h"
@@ -124,6 +125,15 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
if (status != 0)
return status;
 
+   /* Identify PHY and related function pointers */
+   status = ngbe_init_phy(hw);
+   if (status)
+   return status;
+
+   /* Reset PHY */
+   if (!hw->phy.reset_disable)
+   hw->phy.reset_hw(hw);
+
wr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));
ngbe_flush(hw);
msec_delay(50);
@@ -307,6 +317,24 @@ s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)
return 0;
 }
 
+s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw)
+{
+   s32 status = 0;
+   u32 ts_state;
+
+   DEBUGFUNC("ngbe_mac_check_overtemp");
+

[dpdk-dev] [PATCH v5 11/24] net/ngbe: store MAC address

[Jiawen Wu]

Store MAC addresses and init receive address filters.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_dummy.h |  33 +++
 drivers/net/ngbe/base/ngbe_hw.c| 323 +
 drivers/net/ngbe/base/ngbe_hw.h|  13 ++
 drivers/net/ngbe/base/ngbe_osdep.h |   1 +
 drivers/net/ngbe/base/ngbe_type.h  |  19 ++
 drivers/net/ngbe/ngbe_ethdev.c |  25 +++
 drivers/net/ngbe/ngbe_ethdev.h |   2 +
 7 files changed, 416 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index 15017cfd82..8462d6d1cb 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -51,6 +51,10 @@ static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw 
*TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_mac_get_mac_addr_dummy(struct ngbe_hw *TUP0, u8 *TUP1)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
u32 TUP1)
 {
@@ -60,6 +64,29 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct 
ngbe_hw *TUP0,
u32 TUP1)
 {
 }
+static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   u8 *TUP2, u32 TUP3, u32 TUP4)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_clear_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_set_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   u32 TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_clear_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   u32 TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_init_rx_addrs_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
@@ -105,8 +132,14 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.init_hw = ngbe_mac_init_hw_dummy;
hw->mac.reset_hw = ngbe_mac_reset_hw_dummy;
hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
+   hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
+   hw->mac.set_rar = ngbe_mac_set_rar_dummy;
+   hw->mac.clear_rar = ngbe_mac_clear_rar_dummy;
+   hw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy;
+   hw->mac.clear_vmdq = ngbe_mac_clear_vmdq_dummy;
+   hw->mac.init_rx_addrs = ngbe_mac_init_rx_addrs_dummy;
hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
hw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy;
hw->phy.identify = ngbe_phy_identify_dummy;
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index ebd163d9e6..386557f468 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -142,9 +142,49 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
 
msec_delay(50);
 
+   /* Store the permanent mac address */
+   hw->mac.get_mac_addr(hw, hw->mac.perm_addr);
+
+   /*
+* Store MAC address from RAR0, clear receive address registers, and
+* clear the multicast table.
+*/
+   hw->mac.num_rar_entries = NGBE_EM_RAR_ENTRIES;
+   hw->mac.init_rx_addrs(hw);
+
return status;
 }
 
+/**
+ *  ngbe_get_mac_addr - Generic get MAC address
+ *  @hw: pointer to hardware structure
+ *  @mac_addr: Adapter MAC address
+ *
+ *  Reads the adapter's MAC address from first Receive Address Register (RAR0)
+ *  A reset of the adapter must be performed prior to calling this function
+ *  in order for the MAC address to have been loaded from the EEPROM into RAR0
+ **/
+s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr)
+{
+   u32 rar_high;
+   u32 rar_low;
+   u16 i;
+
+   DEBUGFUNC("ngbe_get_mac_addr");
+
+   wr32(hw, NGBE_ETHADDRIDX, 0);
+   rar_high = rd32(hw, NGBE_ETHADDRH);
+   rar_low = rd32(hw, NGBE_ETHADDRL);
+
+   for (i = 0; i < 2; i++)
+   mac_addr[i] = (u8)(rar_high >> (1 - i) * 8);
+
+   for (i = 0; i < 4; i++)
+   mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8);
+
+   return 0;
+}
+
 /**
  *  ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
  *  @hw: pointer to the HW structure
@@ -215,6 +255,196 @@ s32 ngbe_stop_hw(struct ngbe_hw *hw)
return 0;
 }
 
+/**
+ *  ngbe_validate_mac_addr - Validate MAC address
+ *  @mac_addr: pointer to MAC address.
+ *
+ *  Tests a MAC address to ensure it is a valid Individual Address.
+ **/
+s32 ngbe_validate_mac_addr(u8 *mac_addr)
+{
+   s32 status = 0;
+
+   DEBUGFUNC("ngbe_validate_mac_addr");
+
+   /* Make sure it is not a m

[dpdk-dev] [PATCH v5 12/24] net/ngbe: add info get operation

[Jiawen Wu]

Add device information get operation.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini |  1 +
 drivers/net/ngbe/meson.build  |  1 +
 drivers/net/ngbe/ngbe_ethdev.c| 86 +++
 drivers/net/ngbe/ngbe_ethdev.h| 26 ++
 drivers/net/ngbe/ngbe_rxtx.c  | 67 
 drivers/net/ngbe/ngbe_rxtx.h  | 15 ++
 6 files changed, 196 insertions(+)
 create mode 100644 drivers/net/ngbe/ngbe_rxtx.c
 create mode 100644 drivers/net/ngbe/ngbe_rxtx.h

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index 977286ac04..ca03a255de 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -4,6 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Multiprocess aware   = Y
 Linux= Y
 ARMv8= Y
diff --git a/drivers/net/ngbe/meson.build b/drivers/net/ngbe/meson.build
index 81173fa7f0..9e75b82f1c 100644
--- a/drivers/net/ngbe/meson.build
+++ b/drivers/net/ngbe/meson.build
@@ -12,6 +12,7 @@ objs = [base_objs]
 
 sources = files(
'ngbe_ethdev.c',
+   'ngbe_rxtx.c',
 )
 
 includes += include_directories('base')
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index e9ddbe9753..07df677b64 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -9,6 +9,7 @@
 #include "ngbe_logs.h"
 #include "base/ngbe.h"
 #include "ngbe_ethdev.h"
+#include "ngbe_rxtx.h"
 
 static int ngbe_dev_close(struct rte_eth_dev *dev);
 
@@ -31,6 +32,22 @@ static const struct rte_pci_id pci_id_ngbe_map[] = {
{ .vendor_id = 0, /* sentinel */ },
 };
 
+static const struct rte_eth_desc_lim rx_desc_lim = {
+   .nb_max = NGBE_RING_DESC_MAX,
+   .nb_min = NGBE_RING_DESC_MIN,
+   .nb_align = NGBE_RXD_ALIGN,
+};
+
+static const struct rte_eth_desc_lim tx_desc_lim = {
+   .nb_max = NGBE_RING_DESC_MAX,
+   .nb_min = NGBE_RING_DESC_MIN,
+   .nb_align = NGBE_TXD_ALIGN,
+   .nb_seg_max = NGBE_TX_MAX_SEG,
+   .nb_mtu_seg_max = NGBE_TX_MAX_SEG,
+};
+
+static const struct eth_dev_ops ngbe_eth_dev_ops;
+
 /*
  * Ensure that all locks are released before first NVM or PHY access
  */
@@ -64,6 +81,8 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 
PMD_INIT_FUNC_TRACE();
 
+   eth_dev->dev_ops = &ngbe_eth_dev_ops;
+
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
 
@@ -206,6 +225,73 @@ ngbe_dev_close(struct rte_eth_dev *dev)
return 0;
 }
 
+static int
+ngbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct ngbe_hw *hw = NGBE_DEV_HW(dev);
+
+   dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
+   dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
+   dev_info->min_rx_bufsize = 1024;
+   dev_info->max_rx_pktlen = 15872;
+   dev_info->max_mac_addrs = hw->mac.num_rar_entries;
+   dev_info->max_hash_mac_addrs = NGBE_VMDQ_NUM_UC_MAC;
+   dev_info->max_vfs = pci_dev->max_vfs;
+   dev_info->max_vmdq_pools = ETH_64_POOLS;
+   dev_info->vmdq_queue_num = dev_info->max_rx_queues;
+   dev_info->rx_queue_offload_capa = ngbe_get_rx_queue_offloads(dev);
+   dev_info->rx_offload_capa = (ngbe_get_rx_port_offloads(dev) |
+dev_info->rx_queue_offload_capa);
+   dev_info->tx_queue_offload_capa = 0;
+   dev_info->tx_offload_capa = ngbe_get_tx_port_offloads(dev);
+
+   dev_info->default_rxconf = (struct rte_eth_rxconf) {
+   .rx_thresh = {
+   .pthresh = NGBE_DEFAULT_RX_PTHRESH,
+   .hthresh = NGBE_DEFAULT_RX_HTHRESH,
+   .wthresh = NGBE_DEFAULT_RX_WTHRESH,
+   },
+   .rx_free_thresh = NGBE_DEFAULT_RX_FREE_THRESH,
+   .rx_drop_en = 0,
+   .offloads = 0,
+   };
+
+   dev_info->default_txconf = (struct rte_eth_txconf) {
+   .tx_thresh = {
+   .pthresh = NGBE_DEFAULT_TX_PTHRESH,
+   .hthresh = NGBE_DEFAULT_TX_HTHRESH,
+   .wthresh = NGBE_DEFAULT_TX_WTHRESH,
+   },
+   .tx_free_thresh = NGBE_DEFAULT_TX_FREE_THRESH,
+   .offloads = 0,
+   };
+
+   dev_info->rx_desc_lim = rx_desc_lim;
+   dev_info->tx_desc_lim = tx_desc_lim;
+
+   dev_info->hash_key_size = NGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
+   dev_info->reta_size = ETH_RSS_RETA_SIZE_128;
+   dev_info->flow_type_rss_offloads = NGBE_RSS_OFFLOAD_ALL;
+
+   dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G;
+   dev_info->speed_capa |= ETH_LINK_SPEED_100M;
+
+   /* Driver-preferred Rx/Tx parameters */
+   dev_info->default_rxportcon

[dpdk-dev] [PATCH v5 13/24] net/ngbe: support link update

[Jiawen Wu]

Register to handle device interrupt.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini  |   2 +
 doc/guides/nics/ngbe.rst   |   5 +
 drivers/net/ngbe/base/ngbe_dummy.h |   6 +
 drivers/net/ngbe/base/ngbe_type.h  |  11 +
 drivers/net/ngbe/ngbe_ethdev.c | 364 +
 drivers/net/ngbe/ngbe_ethdev.h |  28 +++
 6 files changed, 416 insertions(+)

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index ca03a255de..291a542a42 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -5,6 +5,8 @@
 ;
 [Features]
 Speed capabilities   = Y
+Link status  = Y
+Link status event= Y
 Multiprocess aware   = Y
 Linux= Y
 ARMv8= Y
diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index c274a15aab..de2ef65664 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -7,6 +7,11 @@ NGBE Poll Mode Driver
 The NGBE PMD (librte_pmd_ngbe) provides poll mode driver support
 for Wangxun 1 Gigabit Ethernet NICs.
 
+Features
+
+
+- Link state information
+
 Prerequisites
 -
 
diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index 8462d6d1cb..4273e5af36 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -64,6 +64,11 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct 
ngbe_hw *TUP0,
u32 TUP1)
 {
 }
+static inline s32 ngbe_mac_check_link_dummy(struct ngbe_hw *TUP0, u32 *TUP1,
+   bool *TUP3, bool TUP4)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1,
u8 *TUP2, u32 TUP3, u32 TUP4)
 {
@@ -135,6 +140,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
+   hw->mac.check_link = ngbe_mac_check_link_dummy;
hw->mac.set_rar = ngbe_mac_set_rar_dummy;
hw->mac.clear_rar = ngbe_mac_clear_rar_dummy;
hw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy;
diff --git a/drivers/net/ngbe/base/ngbe_type.h 
b/drivers/net/ngbe/base/ngbe_type.h
index 5add9ec2a3..d05d2ff28a 100644
--- a/drivers/net/ngbe/base/ngbe_type.h
+++ b/drivers/net/ngbe/base/ngbe_type.h
@@ -96,6 +96,8 @@ struct ngbe_mac_info {
s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
 
+   s32 (*check_link)(struct ngbe_hw *hw, u32 *speed,
+  bool *link_up, bool link_up_wait_to_complete);
/* RAR */
s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr);
@@ -116,6 +118,7 @@ struct ngbe_mac_info {
u32 num_rar_entries;
u32 max_tx_queues;
u32 max_rx_queues;
+   bool get_link_status;
struct ngbe_thermal_sensor_data  thermal_sensor_data;
bool set_lben;
 };
@@ -141,6 +144,14 @@ struct ngbe_phy_info {
bool reset_disable;
 };
 
+enum ngbe_isb_idx {
+   NGBE_ISB_HEADER,
+   NGBE_ISB_MISC,
+   NGBE_ISB_VEC0,
+   NGBE_ISB_VEC1,
+   NGBE_ISB_MAX
+};
+
 struct ngbe_hw {
void IOMEM *hw_addr;
void *back;
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 07df677b64..97b6de3aa4 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -6,6 +6,8 @@
 #include 
 #include 
 
+#include 
+
 #include "ngbe_logs.h"
 #include "base/ngbe.h"
 #include "ngbe_ethdev.h"
@@ -13,6 +15,9 @@
 
 static int ngbe_dev_close(struct rte_eth_dev *dev);
 
+static void ngbe_dev_interrupt_handler(void *param);
+static void ngbe_dev_interrupt_delayed_handler(void *param);
+
 /*
  * The set of PCI devices this driver supports
  */
@@ -47,6 +52,26 @@ static const struct rte_eth_desc_lim tx_desc_lim = {
 };
 
 static const struct eth_dev_ops ngbe_eth_dev_ops;
+static inline void
+ngbe_enable_intr(struct rte_eth_dev *dev)
+{
+   struct ngbe_interrupt *intr = NGBE_DEV_INTR(dev);
+   struct ngbe_hw *hw = NGBE_DEV_HW(dev);
+
+   wr32(hw, NGBE_IENMISC, intr->mask_misc);
+   wr32(hw, NGBE_IMC(0), intr->mask & BIT_MASK32);
+   ngbe_flush(hw);
+}
+
+static void
+ngbe_disable_intr(struct ngbe_hw *hw)
+{
+   PMD_INIT_FUNC_TRACE();
+
+   wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
+   ngbe_flush(hw);
+}
+
 
 /*
  * Ensure that all locks are released before first NVM or PHY access
@@ -76,7 +101,9 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 {
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct ngbe_hw *hw = NGBE_DEV_HW(eth_dev);
+   str

[dpdk-dev] [PATCH v5 15/24] net/ngbe: add Rx queue setup and release

[Jiawen Wu]

Setup device Rx queue and release Rx queue.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/ngbe_ethdev.c |   9 +
 drivers/net/ngbe/ngbe_ethdev.h |   8 +
 drivers/net/ngbe/ngbe_rxtx.c   | 305 +
 drivers/net/ngbe/ngbe_rxtx.h   |  90 ++
 4 files changed, 412 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 97b6de3aa4..8eb41a7a2b 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -262,12 +262,19 @@ static int
 ngbe_dev_configure(struct rte_eth_dev *dev)
 {
struct ngbe_interrupt *intr = NGBE_DEV_INTR(dev);
+   struct ngbe_adapter *adapter = NGBE_DEV_ADAPTER(dev);
 
PMD_INIT_FUNC_TRACE();
 
/* set flag to update link status after init */
intr->flags |= NGBE_FLAG_NEED_LINK_UPDATE;
 
+   /*
+* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
+* allocation Rx preconditions we will reset it.
+*/
+   adapter->rx_bulk_alloc_allowed = true;
+
return 0;
 }
 
@@ -654,6 +661,8 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = {
.dev_configure  = ngbe_dev_configure,
.dev_infos_get  = ngbe_dev_info_get,
.link_update= ngbe_dev_link_update,
+   .rx_queue_setup = ngbe_dev_rx_queue_setup,
+   .rx_queue_release   = ngbe_dev_rx_queue_release,
 };
 
 RTE_PMD_REGISTER_PCI(net_ngbe, rte_ngbe_pmd);
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index 10c23c41d1..c324ca7e0f 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -43,6 +43,7 @@ struct ngbe_interrupt {
 struct ngbe_adapter {
struct ngbe_hw hw;
struct ngbe_interrupt  intr;
+   bool rx_bulk_alloc_allowed;
 };
 
 #define NGBE_DEV_ADAPTER(dev) \
@@ -54,6 +55,13 @@ struct ngbe_adapter {
 #define NGBE_DEV_INTR(dev) \
(&((struct ngbe_adapter *)(dev)->data->dev_private)->intr)
 
+void ngbe_dev_rx_queue_release(void *rxq);
+
+int  ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
+   uint16_t nb_rx_desc, unsigned int socket_id,
+   const struct rte_eth_rxconf *rx_conf,
+   struct rte_mempool *mb_pool);
+
 int
 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
int wait_to_complete);
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index ae24367b18..9992983bef 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -3,9 +3,14 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include 
+
 #include 
 #include 
+#include 
+#include 
 
+#include "ngbe_logs.h"
 #include "base/ngbe.h"
 #include "ngbe_ethdev.h"
 #include "ngbe_rxtx.h"
@@ -37,6 +42,166 @@ ngbe_get_tx_port_offloads(struct rte_eth_dev *dev)
return tx_offload_capa;
 }
 
+/**
+ * ngbe_free_sc_cluster - free the not-yet-completed scattered cluster
+ *
+ * The "next" pointer of the last segment of (not-yet-completed) RSC clusters
+ * in the sw_rsc_ring is not set to NULL but rather points to the next
+ * mbuf of this RSC aggregation (that has not been completed yet and still
+ * resides on the HW ring). So, instead of calling for rte_pktmbuf_free() we
+ * will just free first "nb_segs" segments of the cluster explicitly by calling
+ * an rte_pktmbuf_free_seg().
+ *
+ * @m scattered cluster head
+ */
+static void __rte_cold
+ngbe_free_sc_cluster(struct rte_mbuf *m)
+{
+   uint16_t i, nb_segs = m->nb_segs;
+   struct rte_mbuf *next_seg;
+
+   for (i = 0; i < nb_segs; i++) {
+   next_seg = m->next;
+   rte_pktmbuf_free_seg(m);
+   m = next_seg;
+   }
+}
+
+static void __rte_cold
+ngbe_rx_queue_release_mbufs(struct ngbe_rx_queue *rxq)
+{
+   unsigned int i;
+
+   if (rxq->sw_ring != NULL) {
+   for (i = 0; i < rxq->nb_rx_desc; i++) {
+   if (rxq->sw_ring[i].mbuf != NULL) {
+   rte_pktmbuf_free_seg(rxq->sw_ring[i].mbuf);
+   rxq->sw_ring[i].mbuf = NULL;
+   }
+   }
+   if (rxq->rx_nb_avail) {
+   for (i = 0; i < rxq->rx_nb_avail; ++i) {
+   struct rte_mbuf *mb;
+
+   mb = rxq->rx_stage[rxq->rx_next_avail + i];
+   rte_pktmbuf_free_seg(mb);
+   }
+   rxq->rx_nb_avail = 0;
+   }
+   }
+
+   if (rxq->sw_sc_ring)
+   for (i = 0; i < rxq->nb_rx_desc; i++)
+   if (rxq->sw_sc_ring[i].fbuf) {
+   ngbe_free_sc_cluster(rxq->sw_sc_ring[i].fbuf);
+   rxq->sw_sc_ring[i].fbuf = NULL;
+   }
+}
+
+static void __rte_cold
+ngbe_rx_queue_release(struct ngbe_r

[dpdk-dev] [PATCH v5 14/24] net/ngbe: setup the check PHY link

[Jiawen Wu]

Setup PHY, determine link and speed status from PHY.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_dummy.h   |  18 
 drivers/net/ngbe/base/ngbe_hw.c  |  53 ++
 drivers/net/ngbe/base/ngbe_hw.h  |   6 ++
 drivers/net/ngbe/base/ngbe_phy.c |  22 +
 drivers/net/ngbe/base/ngbe_phy.h |   2 +
 drivers/net/ngbe/base/ngbe_phy_mvl.c |  98 +++
 drivers/net/ngbe/base/ngbe_phy_mvl.h |   4 +
 drivers/net/ngbe/base/ngbe_phy_rtl.c | 138 +++
 drivers/net/ngbe/base/ngbe_phy_rtl.h |   4 +
 drivers/net/ngbe/base/ngbe_phy_yt.c  | 134 ++
 drivers/net/ngbe/base/ngbe_phy_yt.h  |   9 ++
 drivers/net/ngbe/base/ngbe_type.h|   9 ++
 12 files changed, 497 insertions(+)

diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index 4273e5af36..709e01659c 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -64,6 +64,11 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct 
ngbe_hw *TUP0,
u32 TUP1)
 {
 }
+static inline s32 ngbe_mac_setup_link_dummy(struct ngbe_hw *TUP0, u32 TUP1,
+   bool TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_check_link_dummy(struct ngbe_hw *TUP0, u32 *TUP1,
bool *TUP3, bool TUP4)
 {
@@ -129,6 +134,16 @@ static inline s32 ngbe_phy_write_reg_unlocked_dummy(struct 
ngbe_hw *TUP0,
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_phy_setup_link_dummy(struct ngbe_hw *TUP0,
+   u32 TUP1, bool TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_phy_check_link_dummy(struct ngbe_hw *TUP0, u32 *TUP1,
+   bool *TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
 {
hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
@@ -140,6 +155,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
+   hw->mac.setup_link = ngbe_mac_setup_link_dummy;
hw->mac.check_link = ngbe_mac_check_link_dummy;
hw->mac.set_rar = ngbe_mac_set_rar_dummy;
hw->mac.clear_rar = ngbe_mac_clear_rar_dummy;
@@ -154,6 +170,8 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->phy.write_reg = ngbe_phy_write_reg_dummy;
hw->phy.read_reg_unlocked = ngbe_phy_read_reg_unlocked_dummy;
hw->phy.write_reg_unlocked = ngbe_phy_write_reg_unlocked_dummy;
+   hw->phy.setup_link = ngbe_phy_setup_link_dummy;
+   hw->phy.check_link = ngbe_phy_check_link_dummy;
 }
 
 #endif /* _NGBE_TYPE_DUMMY_H_ */
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 386557f468..00ac4ce838 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -599,6 +599,54 @@ s32 ngbe_init_uta_tables(struct ngbe_hw *hw)
return 0;
 }
 
+/**
+ *  ngbe_check_mac_link_em - Determine link and speed status
+ *  @hw: pointer to hardware structure
+ *  @speed: pointer to link speed
+ *  @link_up: true when link is up
+ *  @link_up_wait_to_complete: bool used to wait for link up or not
+ *
+ *  Reads the links register to determine if link is up and the current speed
+ **/
+s32 ngbe_check_mac_link_em(struct ngbe_hw *hw, u32 *speed,
+   bool *link_up, bool link_up_wait_to_complete)
+{
+   u32 i, reg;
+   s32 status = 0;
+
+   DEBUGFUNC("ngbe_check_mac_link_em");
+
+   reg = rd32(hw, NGBE_GPIOINTSTAT);
+   wr32(hw, NGBE_GPIOEOI, reg);
+
+   if (link_up_wait_to_complete) {
+   for (i = 0; i < hw->mac.max_link_up_time; i++) {
+   status = hw->phy.check_link(hw, speed, link_up);
+   if (*link_up)
+   break;
+   msec_delay(100);
+   }
+   } else {
+   status = hw->phy.check_link(hw, speed, link_up);
+   }
+
+   return status;
+}
+
+s32 ngbe_setup_mac_link_em(struct ngbe_hw *hw,
+  u32 speed,
+  bool autoneg_wait_to_complete)
+{
+   s32 status;
+
+   DEBUGFUNC("\n");
+
+   /* Setup the PHY according to input speed */
+   status = hw->phy.setup_link(hw, speed, autoneg_wait_to_complete);
+
+   return status;
+}
+
 /**
  *  ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
  *  @hw: pointer to hardware structure
@@ -806,6 +854,10 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
mac->set_vmdq = ngbe_set_vmdq;
mac->clear_vmdq = ngbe_clear_vmdq;
 
+   /* Link */
+   mac->check_link = ngbe_check_mac_link_em;
+ 

[dpdk-dev] [PATCH v5 16/24] net/ngbe: add Tx queue setup and release

[Jiawen Wu]

Setup device Tx queue and release Tx queue.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/ngbe_ethdev.c |   2 +
 drivers/net/ngbe/ngbe_ethdev.h |   6 +
 drivers/net/ngbe/ngbe_rxtx.c   | 212 +
 drivers/net/ngbe/ngbe_rxtx.h   |  91 ++
 4 files changed, 311 insertions(+)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 8eb41a7a2b..2f8ac48f33 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -663,6 +663,8 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = {
.link_update= ngbe_dev_link_update,
.rx_queue_setup = ngbe_dev_rx_queue_setup,
.rx_queue_release   = ngbe_dev_rx_queue_release,
+   .tx_queue_setup = ngbe_dev_tx_queue_setup,
+   .tx_queue_release   = ngbe_dev_tx_queue_release,
 };
 
 RTE_PMD_REGISTER_PCI(net_ngbe, rte_ngbe_pmd);
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index c324ca7e0f..f52d813a47 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -57,11 +57,17 @@ struct ngbe_adapter {
 
 void ngbe_dev_rx_queue_release(void *rxq);
 
+void ngbe_dev_tx_queue_release(void *txq);
+
 int  ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
uint16_t nb_rx_desc, unsigned int socket_id,
const struct rte_eth_rxconf *rx_conf,
struct rte_mempool *mb_pool);
 
+int  ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
+   uint16_t nb_tx_desc, unsigned int socket_id,
+   const struct rte_eth_txconf *tx_conf);
+
 int
 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
int wait_to_complete);
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 9992983bef..2d8db3245f 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -15,6 +15,99 @@
 #include "ngbe_ethdev.h"
 #include "ngbe_rxtx.h"
 
+#ifndef DEFAULT_TX_FREE_THRESH
+#define DEFAULT_TX_FREE_THRESH 32
+#endif
+
+/*
+ *
+ *  Queue management functions
+ *
+ **/
+
+static void __rte_cold
+ngbe_tx_queue_release_mbufs(struct ngbe_tx_queue *txq)
+{
+   unsigned int i;
+
+   if (txq->sw_ring != NULL) {
+   for (i = 0; i < txq->nb_tx_desc; i++) {
+   if (txq->sw_ring[i].mbuf != NULL) {
+   rte_pktmbuf_free_seg(txq->sw_ring[i].mbuf);
+   txq->sw_ring[i].mbuf = NULL;
+   }
+   }
+   }
+}
+
+static void __rte_cold
+ngbe_tx_free_swring(struct ngbe_tx_queue *txq)
+{
+   if (txq != NULL &&
+   txq->sw_ring != NULL)
+   rte_free(txq->sw_ring);
+}
+
+static void __rte_cold
+ngbe_tx_queue_release(struct ngbe_tx_queue *txq)
+{
+   if (txq != NULL && txq->ops != NULL) {
+   txq->ops->release_mbufs(txq);
+   txq->ops->free_swring(txq);
+   rte_free(txq);
+   }
+}
+
+void __rte_cold
+ngbe_dev_tx_queue_release(void *txq)
+{
+   ngbe_tx_queue_release(txq);
+}
+
+/* (Re)set dynamic ngbe_tx_queue fields to defaults */
+static void __rte_cold
+ngbe_reset_tx_queue(struct ngbe_tx_queue *txq)
+{
+   static const struct ngbe_tx_desc zeroed_desc = {0};
+   struct ngbe_tx_entry *txe = txq->sw_ring;
+   uint16_t prev, i;
+
+   /* Zero out HW ring memory */
+   for (i = 0; i < txq->nb_tx_desc; i++)
+   txq->tx_ring[i] = zeroed_desc;
+
+   /* Initialize SW ring entries */
+   prev = (uint16_t)(txq->nb_tx_desc - 1);
+   for (i = 0; i < txq->nb_tx_desc; i++) {
+   volatile struct ngbe_tx_desc *txd = &txq->tx_ring[i];
+
+   txd->dw3 = rte_cpu_to_le_32(NGBE_TXD_DD);
+   txe[i].mbuf = NULL;
+   txe[i].last_id = i;
+   txe[prev].next_id = i;
+   prev = i;
+   }
+
+   txq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1);
+   txq->tx_tail = 0;
+
+   /*
+* Always allow 1 descriptor to be un-allocated to avoid
+* a H/W race condition
+*/
+   txq->last_desc_cleaned = (uint16_t)(txq->nb_tx_desc - 1);
+   txq->nb_tx_free = (uint16_t)(txq->nb_tx_desc - 1);
+   txq->ctx_curr = 0;
+   memset((void *)&txq->ctx_cache, 0,
+   NGBE_CTX_NUM * sizeof(struct ngbe_ctx_info));
+}
+
+static const struct ngbe_txq_ops def_txq_ops = {
+   .release_mbufs = ngbe_tx_queue_release_mbufs,
+   .free_swring = ngbe_tx_free_swring,
+   .reset = ngbe_reset_tx_queue,
+};
+
 uint64_t
 ngbe_get_tx_port_offloads(struct rte_eth_dev *dev)
 {
@@ -42,6 +135,125 @@ ngbe_get_tx_port_offloads(struct rte_eth_dev *dev)
return tx_offload_capa;
 }
 
+int __rte_cold
+ngbe_dev_tx_

[dpdk-dev] [PATCH v5 18/24] net/ngbe: add packet type

[Jiawen Wu]

Add packet type marco definition and convert ptype to ptid.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini |   1 +
 doc/guides/nics/ngbe.rst  |   1 +
 drivers/net/ngbe/meson.build  |   1 +
 drivers/net/ngbe/ngbe_ethdev.c|   8 +
 drivers/net/ngbe/ngbe_ethdev.h|   4 +
 drivers/net/ngbe/ngbe_ptypes.c| 640 ++
 drivers/net/ngbe/ngbe_ptypes.h| 351 
 drivers/net/ngbe/ngbe_rxtx.h  |   1 -
 8 files changed, 1006 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ngbe/ngbe_ptypes.c
 create mode 100644 drivers/net/ngbe/ngbe_ptypes.h

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index abde1e2a67..e24d8d0b55 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -13,6 +13,7 @@ CRC offload  = P
 VLAN offload = P
 L3 checksum offload  = P
 L4 checksum offload  = P
+Packet type parsing  = Y
 Multiprocess aware   = Y
 Linux= Y
 ARMv8= Y
diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index e56baf26b4..04fa3e90a8 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -10,6 +10,7 @@ for Wangxun 1 Gigabit Ethernet NICs.
 Features
 
 
+- Packet type information
 - Checksum offload
 - Jumbo frames
 - Link state information
diff --git a/drivers/net/ngbe/meson.build b/drivers/net/ngbe/meson.build
index 9e75b82f1c..fd571399b3 100644
--- a/drivers/net/ngbe/meson.build
+++ b/drivers/net/ngbe/meson.build
@@ -12,6 +12,7 @@ objs = [base_objs]
 
 sources = files(
'ngbe_ethdev.c',
+   'ngbe_ptypes.c',
'ngbe_rxtx.c',
 )
 
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 2f8ac48f33..672db88133 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -354,6 +354,13 @@ ngbe_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
return 0;
 }
 
+const uint32_t *
+ngbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
+{
+   RTE_SET_USED(dev);
+   return ngbe_get_supported_ptypes();
+}
+
 /* return 0 means link status changed, -1 means not changed */
 int
 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
@@ -661,6 +668,7 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = {
.dev_configure  = ngbe_dev_configure,
.dev_infos_get  = ngbe_dev_info_get,
.link_update= ngbe_dev_link_update,
+   .dev_supported_ptypes_get   = ngbe_dev_supported_ptypes_get,
.rx_queue_setup = ngbe_dev_rx_queue_setup,
.rx_queue_release   = ngbe_dev_rx_queue_release,
.tx_queue_setup = ngbe_dev_tx_queue_setup,
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index a9482f3001..6881351252 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -6,6 +6,8 @@
 #ifndef _NGBE_ETHDEV_H_
 #define _NGBE_ETHDEV_H_
 
+#include "ngbe_ptypes.h"
+
 /* need update link, bit flag */
 #define NGBE_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
 #define NGBE_FLAG_MAILBOX  (uint32_t)(1 << 1)
@@ -94,4 +96,6 @@ ngbe_dev_link_update_share(struct rte_eth_dev *dev,
 #define NGBE_DEFAULT_TX_HTHRESH  0
 #define NGBE_DEFAULT_TX_WTHRESH  0
 
+const uint32_t *ngbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
+
 #endif /* _NGBE_ETHDEV_H_ */
diff --git a/drivers/net/ngbe/ngbe_ptypes.c b/drivers/net/ngbe/ngbe_ptypes.c
new file mode 100644
index 00..4b6cd374f6
--- /dev/null
+++ b/drivers/net/ngbe/ngbe_ptypes.c
@@ -0,0 +1,640 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ */
+
+#include 
+#include 
+
+#include "base/ngbe_type.h"
+#include "ngbe_ptypes.h"
+
+/* The ngbe_ptype_lookup is used to convert from the 8-bit ptid in the
+ * hardware to a bit-field that can be used by SW to more easily determine the
+ * packet type.
+ *
+ * Macros are used to shorten the table lines and make this table human
+ * readable.
+ *
+ * We store the PTYPE in the top byte of the bit field - this is just so that
+ * we can check that the table doesn't have a row missing, as the index into
+ * the table should be the PTYPE.
+ */
+#define TPTE(ptid, l2, l3, l4, tun, el2, el3, el4) \
+   [ptid] = (RTE_PTYPE_L2_##l2 | \
+   RTE_PTYPE_L3_##l3 | \
+   RTE_PTYPE_L4_##l4 | \
+   RTE_PTYPE_TUNNEL_##tun | \
+   RTE_PTYPE_INNER_L2_##el2 | \
+   RTE_PTYPE_INNER_L3_##el3 | \
+   RTE_PTYPE_INNER_L4_##el4)
+
+#define RTE_PTYPE_L2_NONE   0
+#define RTE_PTYPE_L3_NONE   0
+#define RTE_PTYPE_L4_NONE   0
+#define RTE_PTYPE_TUNNEL_NONE   0
+#define RTE_PTYPE_INNER_L2_NONE 0
+#define RTE_PTYPE_INNER_L3_NONE 0
+#define RTE_PTYPE_INNER_L4_NONE 0
+
+static u32 ngbe_pt

[dpdk-dev] [PATCH v5 17/24] net/ngbe: add Rx and Tx init

[Jiawen Wu]

Initializes receive unit and transmit unit.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini |   6 +
 doc/guides/nics/ngbe.rst  |   2 +
 drivers/net/ngbe/ngbe_ethdev.h|   5 +
 drivers/net/ngbe/ngbe_rxtx.c  | 187 ++
 4 files changed, 200 insertions(+)

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index 291a542a42..abde1e2a67 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -7,6 +7,12 @@
 Speed capabilities   = Y
 Link status  = Y
 Link status event= Y
+Jumbo frame  = Y
+Scattered Rx = Y
+CRC offload  = P
+VLAN offload = P
+L3 checksum offload  = P
+L4 checksum offload  = P
 Multiprocess aware   = Y
 Linux= Y
 ARMv8= Y
diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index de2ef65664..e56baf26b4 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -10,6 +10,8 @@ for Wangxun 1 Gigabit Ethernet NICs.
 Features
 
 
+- Checksum offload
+- Jumbo frames
 - Link state information
 
 Prerequisites
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index f52d813a47..a9482f3001 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -13,6 +13,7 @@
 #define NGBE_FLAG_MACSEC   (uint32_t)(1 << 3)
 #define NGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4)
 
+#define NGBE_VLAN_TAG_SIZE 4
 #define NGBE_HKEY_MAX_INDEX 10
 
 #define NGBE_RSS_OFFLOAD_ALL ( \
@@ -68,6 +69,10 @@ int  ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, 
uint16_t tx_queue_id,
uint16_t nb_tx_desc, unsigned int socket_id,
const struct rte_eth_txconf *tx_conf);
 
+int ngbe_dev_rx_init(struct rte_eth_dev *dev);
+
+void ngbe_dev_tx_init(struct rte_eth_dev *dev);
+
 int
 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
int wait_to_complete);
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 2d8db3245f..68d7e651af 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -582,3 +582,190 @@ ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev,
return 0;
 }
 
+/*
+ * Initializes Receive Unit.
+ */
+int __rte_cold
+ngbe_dev_rx_init(struct rte_eth_dev *dev)
+{
+   struct ngbe_hw *hw;
+   struct ngbe_rx_queue *rxq;
+   uint64_t bus_addr;
+   uint32_t fctrl;
+   uint32_t hlreg0;
+   uint32_t srrctl;
+   uint32_t rdrxctl;
+   uint32_t rxcsum;
+   uint16_t buf_size;
+   uint16_t i;
+   struct rte_eth_rxmode *rx_conf = &dev->data->dev_conf.rxmode;
+
+   PMD_INIT_FUNC_TRACE();
+   hw = NGBE_DEV_HW(dev);
+
+   /*
+* Make sure receives are disabled while setting
+* up the RX context (registers, descriptor rings, etc.).
+*/
+   wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
+   wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
+
+   /* Enable receipt of broadcasted frames */
+   fctrl = rd32(hw, NGBE_PSRCTL);
+   fctrl |= NGBE_PSRCTL_BCA;
+   wr32(hw, NGBE_PSRCTL, fctrl);
+
+   /*
+* Configure CRC stripping, if any.
+*/
+   hlreg0 = rd32(hw, NGBE_SECRXCTL);
+   if (rx_conf->offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+   hlreg0 &= ~NGBE_SECRXCTL_CRCSTRIP;
+   else
+   hlreg0 |= NGBE_SECRXCTL_CRCSTRIP;
+   hlreg0 &= ~NGBE_SECRXCTL_XDSA;
+   wr32(hw, NGBE_SECRXCTL, hlreg0);
+
+   /*
+* Configure jumbo frame support, if any.
+*/
+   if (rx_conf->offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
+   wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
+   NGBE_FRMSZ_MAX(rx_conf->max_rx_pkt_len));
+   } else {
+   wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
+   NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
+   }
+
+   /*
+* If loopback mode is configured, set LPBK bit.
+*/
+   hlreg0 = rd32(hw, NGBE_PSRCTL);
+   if (hw->is_pf && dev->data->dev_conf.lpbk_mode)
+   hlreg0 |= NGBE_PSRCTL_LBENA;
+   else
+   hlreg0 &= ~NGBE_PSRCTL_LBENA;
+
+   wr32(hw, NGBE_PSRCTL, hlreg0);
+
+   /*
+* Assume no header split and no VLAN strip support
+* on any Rx queue first .
+*/
+   rx_conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
+
+   /* Setup RX queues */
+   for (i = 0; i < dev->data->nb_rx_queues; i++) {
+   rxq = dev->data->rx_queues[i];
+
+   /*
+* Reset crc_len in case it was changed after queue setup by a
+* call to configure.
+*/
+   if (rx_conf->offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+   rxq->crc_len = RTE_ETHER_CRC_LEN;
+   else
+   rxq->crc_len = 0;
+
+   /* Setup the Base and Length of the Rx Descriptor 

[dpdk-dev] [PATCH v5 19/24] net/ngbe: add simple Rx and Tx flow

[Jiawen Wu]

Initialize device with the simplest receive and transmit functions.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/ngbe_ethdev.c |   8 +-
 drivers/net/ngbe/ngbe_ethdev.h |   6 +
 drivers/net/ngbe/ngbe_rxtx.c   | 482 +
 drivers/net/ngbe/ngbe_rxtx.h   | 110 
 4 files changed, 604 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 672db88133..4dab920caa 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -109,6 +109,8 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
PMD_INIT_FUNC_TRACE();
 
eth_dev->dev_ops = &ngbe_eth_dev_ops;
+   eth_dev->rx_pkt_burst = &ngbe_recv_pkts;
+   eth_dev->tx_pkt_burst = &ngbe_xmit_pkts_simple;
 
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
@@ -357,8 +359,10 @@ ngbe_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
 const uint32_t *
 ngbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 {
-   RTE_SET_USED(dev);
-   return ngbe_get_supported_ptypes();
+   if (dev->rx_pkt_burst == ngbe_recv_pkts)
+   return ngbe_get_supported_ptypes();
+
+   return NULL;
 }
 
 /* return 0 means link status changed, -1 means not changed */
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index 6881351252..c0f8483eca 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -75,6 +75,12 @@ int ngbe_dev_rx_init(struct rte_eth_dev *dev);
 
 void ngbe_dev_tx_init(struct rte_eth_dev *dev);
 
+uint16_t ngbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t ngbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
 int
 ngbe_dev_link_update_share(struct rte_eth_dev *dev,
int wait_to_complete);
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 68d7e651af..9462da5b7a 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -15,10 +15,492 @@
 #include "ngbe_ethdev.h"
 #include "ngbe_rxtx.h"
 
+/*
+ * Prefetch a cache line into all cache levels.
+ */
+#define rte_ngbe_prefetch(p)   rte_prefetch0(p)
+
+/*
+ *
+ *  TX functions
+ *
+ **/
+
+/*
+ * Check for descriptors with their DD bit set and free mbufs.
+ * Return the total number of buffers freed.
+ */
+static __rte_always_inline int
+ngbe_tx_free_bufs(struct ngbe_tx_queue *txq)
+{
+   struct ngbe_tx_entry *txep;
+   uint32_t status;
+   int i, nb_free = 0;
+   struct rte_mbuf *m, *free[RTE_NGBE_TX_MAX_FREE_BUF_SZ];
+
+   /* check DD bit on threshold descriptor */
+   status = txq->tx_ring[txq->tx_next_dd].dw3;
+   if (!(status & rte_cpu_to_le_32(NGBE_TXD_DD))) {
+   if (txq->nb_tx_free >> 1 < txq->tx_free_thresh)
+   ngbe_set32_masked(txq->tdc_reg_addr,
+   NGBE_TXCFG_FLUSH, NGBE_TXCFG_FLUSH);
+   return 0;
+   }
+
+   /*
+* first buffer to free from S/W ring is at index
+* tx_next_dd - (tx_free_thresh-1)
+*/
+   txep = &txq->sw_ring[txq->tx_next_dd - (txq->tx_free_thresh - 1)];
+   for (i = 0; i < txq->tx_free_thresh; ++i, ++txep) {
+   /* free buffers one at a time */
+   m = rte_pktmbuf_prefree_seg(txep->mbuf);
+   txep->mbuf = NULL;
+
+   if (unlikely(m == NULL))
+   continue;
+
+   if (nb_free >= RTE_NGBE_TX_MAX_FREE_BUF_SZ ||
+   (nb_free > 0 && m->pool != free[0]->pool)) {
+   rte_mempool_put_bulk(free[0]->pool,
+(void **)free, nb_free);
+   nb_free = 0;
+   }
+
+   free[nb_free++] = m;
+   }
+
+   if (nb_free > 0)
+   rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
+
+   /* buffers were freed, update counters */
+   txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_free_thresh);
+   txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_free_thresh);
+   if (txq->tx_next_dd >= txq->nb_tx_desc)
+   txq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1);
+
+   return txq->tx_free_thresh;
+}
+
+/* Populate 4 descriptors with data from 4 mbufs */
+static inline void
+tx4(volatile struct ngbe_tx_desc *txdp, struct rte_mbuf **pkts)
+{
+   uint64_t buf_dma_addr;
+   uint32_t pkt_len;
+   int i;
+
+   for (i = 0; i < 4; ++i, ++txdp, ++pkts) {
+   buf_dma_addr = rte_mbuf_data_iova(*pkts);
+   pkt_len = (*pkts)->data_len;
+
+   /* write data to descriptor */
+   txdp

[dpdk-dev] [PATCH v5 20/24] net/ngbe: support bulk and scatter Rx

[Jiawen Wu]

Add bulk allocation receive function, and support scattered Rx rely on
Rx offload.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/ngbe.rst   |   1 +
 drivers/net/ngbe/ngbe_ethdev.c |  15 +-
 drivers/net/ngbe/ngbe_ethdev.h |   8 +
 drivers/net/ngbe/ngbe_rxtx.c   | 583 +
 drivers/net/ngbe/ngbe_rxtx.h   |   2 +
 5 files changed, 607 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index 04fa3e90a8..e999e0b580 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -14,6 +14,7 @@ Features
 - Checksum offload
 - Jumbo frames
 - Link state information
+- Scattered and gather for RX
 
 Prerequisites
 -
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 4dab920caa..260bca0e4f 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -112,8 +112,16 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
eth_dev->rx_pkt_burst = &ngbe_recv_pkts;
eth_dev->tx_pkt_burst = &ngbe_xmit_pkts_simple;
 
-   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   /*
+* For secondary processes, we don't initialise any further as primary
+* has already done this work. Only check we don't need a different
+* RX and TX function.
+*/
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+   ngbe_set_rx_function(eth_dev);
+
return 0;
+   }
 
rte_eth_copy_pci_info(eth_dev, pci_dev);
 
@@ -359,7 +367,10 @@ ngbe_dev_info_get(struct rte_eth_dev *dev, struct 
rte_eth_dev_info *dev_info)
 const uint32_t *
 ngbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 {
-   if (dev->rx_pkt_burst == ngbe_recv_pkts)
+   if (dev->rx_pkt_burst == ngbe_recv_pkts ||
+   dev->rx_pkt_burst == ngbe_recv_pkts_sc_single_alloc ||
+   dev->rx_pkt_burst == ngbe_recv_pkts_sc_bulk_alloc ||
+   dev->rx_pkt_burst == ngbe_recv_pkts_bulk_alloc)
return ngbe_get_supported_ptypes();
 
return NULL;
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index c0f8483eca..1e21db5e25 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -78,6 +78,14 @@ void ngbe_dev_tx_init(struct rte_eth_dev *dev);
 uint16_t ngbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
 
+uint16_t ngbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t ngbe_recv_pkts_sc_single_alloc(void *rx_queue,
+   struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+uint16_t ngbe_recv_pkts_sc_bulk_alloc(void *rx_queue,
+   struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+
 uint16_t ngbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
 
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 9462da5b7a..f633718237 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -321,6 +321,257 @@ rx_desc_error_to_pkt_flags(uint32_t rx_status)
return pkt_flags;
 }
 
+/*
+ * LOOK_AHEAD defines how many desc statuses to check beyond the
+ * current descriptor.
+ * It must be a pound define for optimal performance.
+ * Do not change the value of LOOK_AHEAD, as the ngbe_rx_scan_hw_ring
+ * function only works with LOOK_AHEAD=8.
+ */
+#define LOOK_AHEAD 8
+#if (LOOK_AHEAD != 8)
+#error "PMD NGBE: LOOK_AHEAD must be 8\n"
+#endif
+static inline int
+ngbe_rx_scan_hw_ring(struct ngbe_rx_queue *rxq)
+{
+   volatile struct ngbe_rx_desc *rxdp;
+   struct ngbe_rx_entry *rxep;
+   struct rte_mbuf *mb;
+   uint16_t pkt_len;
+   uint64_t pkt_flags;
+   int nb_dd;
+   uint32_t s[LOOK_AHEAD];
+   uint32_t pkt_info[LOOK_AHEAD];
+   int i, j, nb_rx = 0;
+   uint32_t status;
+
+   /* get references to current descriptor and S/W ring entry */
+   rxdp = &rxq->rx_ring[rxq->rx_tail];
+   rxep = &rxq->sw_ring[rxq->rx_tail];
+
+   status = rxdp->qw1.lo.status;
+   /* check to make sure there is at least 1 packet to receive */
+   if (!(status & rte_cpu_to_le_32(NGBE_RXD_STAT_DD)))
+   return 0;
+
+   /*
+* Scan LOOK_AHEAD descriptors at a time to determine which descriptors
+* reference packets that are ready to be received.
+*/
+   for (i = 0; i < RTE_PMD_NGBE_RX_MAX_BURST;
+i += LOOK_AHEAD, rxdp += LOOK_AHEAD, rxep += LOOK_AHEAD) {
+   /* Read desc statuses backwards to avoid race condition */
+   for (j = 0; j < LOOK_AHEAD; j++)
+   s[j] = rte_le_to_cpu_32(rxdp[j].qw1.lo.status);
+
+   rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
+
+   /* Compute how many status bits were set */
+   for (nb_dd = 0; nb_dd < LOOK_AHEAD &&

[dpdk-dev] [PATCH v5 21/24] net/ngbe: support full-featured Tx path

[Jiawen Wu]

Add the full-featured transmit function, which supports checksum, TSO,
tunnel parse, etc.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini |   3 +
 doc/guides/nics/ngbe.rst  |   3 +-
 drivers/net/ngbe/meson.build  |   2 +
 drivers/net/ngbe/ngbe_ethdev.c|  16 +-
 drivers/net/ngbe/ngbe_ethdev.h|   3 +
 drivers/net/ngbe/ngbe_rxtx.c  | 639 ++
 drivers/net/ngbe/ngbe_rxtx.h  |  56 +++
 7 files changed, 720 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index e24d8d0b55..443c6691a3 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -9,10 +9,13 @@ Link status  = Y
 Link status event= Y
 Jumbo frame  = Y
 Scattered Rx = Y
+TSO  = Y
 CRC offload  = P
 VLAN offload = P
 L3 checksum offload  = P
 L4 checksum offload  = P
+Inner L3 checksum= P
+Inner L4 checksum= P
 Packet type parsing  = Y
 Multiprocess aware   = Y
 Linux= Y
diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst
index e999e0b580..cf3fafabd8 100644
--- a/doc/guides/nics/ngbe.rst
+++ b/doc/guides/nics/ngbe.rst
@@ -12,9 +12,10 @@ Features
 
 - Packet type information
 - Checksum offload
+- TSO offload
 - Jumbo frames
 - Link state information
-- Scattered and gather for RX
+- Scattered and gather for TX and RX
 
 Prerequisites
 -
diff --git a/drivers/net/ngbe/meson.build b/drivers/net/ngbe/meson.build
index fd571399b3..069e648a36 100644
--- a/drivers/net/ngbe/meson.build
+++ b/drivers/net/ngbe/meson.build
@@ -16,5 +16,7 @@ sources = files(
'ngbe_rxtx.c',
 )
 
+deps += ['security']
+
 includes += include_directories('base')
 
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 260bca0e4f..1a6419e5a4 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -110,7 +110,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 
eth_dev->dev_ops = &ngbe_eth_dev_ops;
eth_dev->rx_pkt_burst = &ngbe_recv_pkts;
-   eth_dev->tx_pkt_burst = &ngbe_xmit_pkts_simple;
+   eth_dev->tx_pkt_burst = &ngbe_xmit_pkts;
 
/*
 * For secondary processes, we don't initialise any further as primary
@@ -118,6 +118,20 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 * RX and TX function.
 */
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+   struct ngbe_tx_queue *txq;
+   /* TX queue function in primary, set by last queue initialized
+* Tx queue may not initialized by primary process
+*/
+   if (eth_dev->data->tx_queues) {
+   uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues;
+   txq = eth_dev->data->tx_queues[nb_tx_queues - 1];
+   ngbe_set_tx_function(eth_dev, txq);
+   } else {
+   /* Use default TX function if we get here */
+   PMD_INIT_LOG(NOTICE, "No TX queues configured yet. "
+"Using default TX function.");
+   }
+
ngbe_set_rx_function(eth_dev);
 
return 0;
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index 1e21db5e25..035b1ad5c8 100644
--- a/drivers/net/ngbe/ngbe_ethdev.h
+++ b/drivers/net/ngbe/ngbe_ethdev.h
@@ -86,6 +86,9 @@ uint16_t ngbe_recv_pkts_sc_single_alloc(void *rx_queue,
 uint16_t ngbe_recv_pkts_sc_bulk_alloc(void *rx_queue,
struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
 
+uint16_t ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
 uint16_t ngbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
 
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index f633718237..3f3f2cab06 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "ngbe_logs.h"
@@ -15,6 +16,18 @@
 #include "ngbe_ethdev.h"
 #include "ngbe_rxtx.h"
 
+/* Bit Mask to indicate what bits required for building TX context */
+static const u64 NGBE_TX_OFFLOAD_MASK = (PKT_TX_IP_CKSUM |
+   PKT_TX_OUTER_IPV6 |
+   PKT_TX_OUTER_IPV4 |
+   PKT_TX_IPV6 |
+   PKT_TX_IPV4 |
+   PKT_TX_VLAN_PKT |
+   PKT_TX_L4_MASK |
+   PKT_TX_TCP_SEG |
+   PKT_TX_TUNNEL_MASK |
+   PKT_TX_OUTER_IP_CKSUM);
+
 /*
  * Prefetch a cache line into all cache levels.
  */
@@ -248,10 +261,608 @@ ngbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf 
**tx_pkts,
return nb_tx;
 }
 
+static inline void
+ngbe_set_xmit_ctx(struct ngbe_tx_queu

[dpdk-dev] [PATCH v5 22/24] net/ngbe: add device start operation

[Jiawen Wu]

Setup misx interrupt, complete PHY configuration and set device link speed,
to start device.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/base/ngbe_dummy.h   |  16 +
 drivers/net/ngbe/base/ngbe_hw.c  |  50 
 drivers/net/ngbe/base/ngbe_hw.h  |   4 +
 drivers/net/ngbe/base/ngbe_phy.c |   3 +
 drivers/net/ngbe/base/ngbe_phy_mvl.c |  64 
 drivers/net/ngbe/base/ngbe_phy_mvl.h |   1 +
 drivers/net/ngbe/base/ngbe_phy_rtl.c |  58 
 drivers/net/ngbe/base/ngbe_phy_rtl.h |   2 +
 drivers/net/ngbe/base/ngbe_phy_yt.c  |  26 ++
 drivers/net/ngbe/base/ngbe_phy_yt.h  |   1 +
 drivers/net/ngbe/base/ngbe_type.h|  17 ++
 drivers/net/ngbe/ngbe_ethdev.c   | 420 ++-
 drivers/net/ngbe/ngbe_ethdev.h   |   6 +
 13 files changed, 667 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index 709e01659c..dfc7b13192 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -47,6 +47,10 @@ static inline s32 ngbe_mac_reset_hw_dummy(struct ngbe_hw 
*TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_mac_start_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
@@ -74,6 +78,11 @@ static inline s32 ngbe_mac_check_link_dummy(struct ngbe_hw 
*TUP0, u32 *TUP1,
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_mac_get_link_capabilities_dummy(struct ngbe_hw *TUP0,
+   u32 *TUP1, bool *TUP2)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1,
u8 *TUP2, u32 TUP3, u32 TUP4)
 {
@@ -110,6 +119,10 @@ static inline s32 ngbe_phy_identify_dummy(struct ngbe_hw 
*TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_phy_init_hw_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_phy_reset_hw_dummy(struct ngbe_hw *TUP0)
 {
return NGBE_ERR_OPS_DUMMY;
@@ -151,12 +164,14 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;
hw->mac.init_hw = ngbe_mac_init_hw_dummy;
hw->mac.reset_hw = ngbe_mac_reset_hw_dummy;
+   hw->mac.start_hw = ngbe_mac_start_hw_dummy;
hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
hw->mac.setup_link = ngbe_mac_setup_link_dummy;
hw->mac.check_link = ngbe_mac_check_link_dummy;
+   hw->mac.get_link_capabilities = ngbe_mac_get_link_capabilities_dummy;
hw->mac.set_rar = ngbe_mac_set_rar_dummy;
hw->mac.clear_rar = ngbe_mac_clear_rar_dummy;
hw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy;
@@ -165,6 +180,7 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
hw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy;
hw->phy.identify = ngbe_phy_identify_dummy;
+   hw->phy.init_hw = ngbe_phy_init_hw_dummy;
hw->phy.reset_hw = ngbe_phy_reset_hw_dummy;
hw->phy.read_reg = ngbe_phy_read_reg_dummy;
hw->phy.write_reg = ngbe_phy_write_reg_dummy;
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index 00ac4ce838..b0bc714741 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -9,6 +9,22 @@
 #include "ngbe_mng.h"
 #include "ngbe_hw.h"
 
+/**
+ *  ngbe_start_hw - Prepare hardware for Tx/Rx
+ *  @hw: pointer to hardware structure
+ *
+ *  Starts the hardware.
+ **/
+s32 ngbe_start_hw(struct ngbe_hw *hw)
+{
+   DEBUGFUNC("ngbe_start_hw");
+
+   /* Clear adapter stopped flag */
+   hw->adapter_stopped = false;
+
+   return 0;
+}
+
 /**
  *  ngbe_init_hw - Generic hardware initialization
  *  @hw: pointer to hardware structure
@@ -27,6 +43,10 @@ s32 ngbe_init_hw(struct ngbe_hw *hw)
 
/* Reset the hardware */
status = hw->mac.reset_hw(hw);
+   if (status == 0) {
+   /* Start the HW */
+   status = hw->mac.start_hw(hw);
+   }
 
if (status != 0)
DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
@@ -633,6 +653,30 @@ s32 ngbe_check_mac_link_em(struct ngbe_hw *hw, u32 *speed,
return status;
 }
 
+s32 ngbe_get_link_capabilities_em(struct ngbe_hw *hw,
+ u32 *speed,
+ bool *autoneg)
+{
+   s32 status = 0;
+
+   DEBUGFUNC("\n");
+
+   switch (hw->sub_device_id) {
+   case NGBE_SUB_DEV_ID_EM_RTL_SGMII:
+   *speed = NGBE_LINK_SPEED_1GB_FU

[dpdk-dev] [PATCH v5 23/24] net/ngbe: start and stop RxTx

[Jiawen Wu]

Support to start and stop receive and transmit unit for specified
queues.

Signed-off-by: Jiawen Wu 
---
 doc/guides/nics/features/ngbe.ini  |   1 +
 drivers/net/ngbe/base/ngbe_dummy.h |  15 ++
 drivers/net/ngbe/base/ngbe_hw.c| 105 ++
 drivers/net/ngbe/base/ngbe_hw.h|   4 +
 drivers/net/ngbe/base/ngbe_type.h  |   5 +
 drivers/net/ngbe/ngbe_ethdev.c |  10 +
 drivers/net/ngbe/ngbe_ethdev.h |  15 ++
 drivers/net/ngbe/ngbe_rxtx.c   | 307 +
 drivers/net/ngbe/ngbe_rxtx.h   |   3 +
 9 files changed, 465 insertions(+)

diff --git a/doc/guides/nics/features/ngbe.ini 
b/doc/guides/nics/features/ngbe.ini
index 443c6691a3..43b6b2c2c7 100644
--- a/doc/guides/nics/features/ngbe.ini
+++ b/doc/guides/nics/features/ngbe.ini
@@ -7,6 +7,7 @@
 Speed capabilities   = Y
 Link status  = Y
 Link status event= Y
+Queue start/stop = Y
 Jumbo frame  = Y
 Scattered Rx = Y
 TSO  = Y
diff --git a/drivers/net/ngbe/base/ngbe_dummy.h 
b/drivers/net/ngbe/base/ngbe_dummy.h
index dfc7b13192..384631b4f1 100644
--- a/drivers/net/ngbe/base/ngbe_dummy.h
+++ b/drivers/net/ngbe/base/ngbe_dummy.h
@@ -59,6 +59,18 @@ static inline s32 ngbe_mac_get_mac_addr_dummy(struct ngbe_hw 
*TUP0, u8 *TUP1)
 {
return NGBE_ERR_OPS_DUMMY;
 }
+static inline s32 ngbe_mac_enable_rx_dma_dummy(struct ngbe_hw *TUP0, u32 TUP1)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_disable_sec_rx_path_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_enable_sec_rx_path_dummy(struct ngbe_hw *TUP0)
+{
+   return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
u32 TUP1)
 {
@@ -167,6 +179,9 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
hw->mac.start_hw = ngbe_mac_start_hw_dummy;
hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
hw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;
+   hw->mac.enable_rx_dma = ngbe_mac_enable_rx_dma_dummy;
+   hw->mac.disable_sec_rx_path = ngbe_mac_disable_sec_rx_path_dummy;
+   hw->mac.enable_sec_rx_path = ngbe_mac_enable_sec_rx_path_dummy;
hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
hw->mac.setup_link = ngbe_mac_setup_link_dummy;
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index b0bc714741..030068f3f7 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -536,6 +536,63 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)
ngbe_release_eeprom_semaphore(hw);
 }
 
+/**
+ *  ngbe_disable_sec_rx_path - Stops the receive data path
+ *  @hw: pointer to hardware structure
+ *
+ *  Stops the receive data path and waits for the HW to internally empty
+ *  the Rx security block
+ **/
+s32 ngbe_disable_sec_rx_path(struct ngbe_hw *hw)
+{
+#define NGBE_MAX_SECRX_POLL 4000
+
+   int i;
+   u32 secrxreg;
+
+   DEBUGFUNC("ngbe_disable_sec_rx_path");
+
+
+   secrxreg = rd32(hw, NGBE_SECRXCTL);
+   secrxreg |= NGBE_SECRXCTL_XDSA;
+   wr32(hw, NGBE_SECRXCTL, secrxreg);
+   for (i = 0; i < NGBE_MAX_SECRX_POLL; i++) {
+   secrxreg = rd32(hw, NGBE_SECRXSTAT);
+   if (!(secrxreg & NGBE_SECRXSTAT_RDY))
+   /* Use interrupt-safe sleep just in case */
+   usec_delay(10);
+   else
+   break;
+   }
+
+   /* For informational purposes only */
+   if (i >= NGBE_MAX_SECRX_POLL)
+   DEBUGOUT("Rx unit being enabled before security "
+"path fully disabled.  Continuing with init.\n");
+
+   return 0;
+}
+
+/**
+ *  ngbe_enable_sec_rx_path - Enables the receive data path
+ *  @hw: pointer to hardware structure
+ *
+ *  Enables the receive data path.
+ **/
+s32 ngbe_enable_sec_rx_path(struct ngbe_hw *hw)
+{
+   u32 secrxreg;
+
+   DEBUGFUNC("ngbe_enable_sec_rx_path");
+
+   secrxreg = rd32(hw, NGBE_SECRXCTL);
+   secrxreg &= ~NGBE_SECRXCTL_XDSA;
+   wr32(hw, NGBE_SECRXCTL, secrxreg);
+   ngbe_flush(hw);
+
+   return 0;
+}
+
 /**
  *  ngbe_clear_vmdq - Disassociate a VMDq pool index from a rx address
  *  @hw: pointer to hardware struct
@@ -757,6 +814,21 @@ void ngbe_disable_rx(struct ngbe_hw *hw)
wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
 }
 
+void ngbe_enable_rx(struct ngbe_hw *hw)
+{
+   u32 pfdtxgswc;
+
+   wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, NGBE_MACRXCFG_ENA);
+   wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, NGBE_PBRXCTL_ENA);
+
+   if (hw->mac.set_lben) {
+   pfdtxgswc = rd32(hw, NGBE_PSRCTL);
+   pfdtxgswc |= NGBE_PSRCTL_LBENA;
+   wr32(hw, NGBE_PSRCTL, pfdtxgswc);
+   hw->mac.set_lben = false;
+   }

[dpdk-dev] [PATCH v5 24/24] net/ngbe: add device stop operation

[Jiawen Wu]

Support to stop, close and reset device.

Signed-off-by: Jiawen Wu 
---
 drivers/net/ngbe/ngbe_ethdev.c | 123 -
 drivers/net/ngbe/ngbe_ethdev.h |   7 ++
 drivers/net/ngbe/ngbe_rxtx.c   |  47 +
 3 files changed, 175 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 2b551c00c7..d6ea621b86 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -531,20 +531,136 @@ ngbe_dev_start(struct rte_eth_dev *dev)
 
 error:
PMD_INIT_LOG(ERR, "failure in dev start: %d", err);
+   ngbe_dev_clear_queues(dev);
return -EIO;
 }
 
+/*
+ * Stop device: disable rx and tx functions to allow for reconfiguring.
+ */
+static int
+ngbe_dev_stop(struct rte_eth_dev *dev)
+{
+   struct rte_eth_link link;
+   struct ngbe_hw *hw = NGBE_DEV_HW(dev);
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+
+   if (hw->adapter_stopped)
+   return 0;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
+   (hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
+   /* gpio0 is used to power on/off control*/
+   wr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);
+   }
+
+   /* disable interrupts */
+   ngbe_disable_intr(hw);
+
+   /* reset the NIC */
+   ngbe_pf_reset_hw(hw);
+   hw->adapter_stopped = 0;
+
+   /* stop adapter */
+   ngbe_stop_hw(hw);
+
+   ngbe_dev_clear_queues(dev);
+
+   /* Clear stored conf */
+   dev->data->scattered_rx = 0;
+
+   /* Clear recorded link status */
+   memset(&link, 0, sizeof(link));
+   rte_eth_linkstatus_set(dev, &link);
+
+   if (!rte_intr_allow_others(intr_handle))
+   /* resume to the default handler */
+   rte_intr_callback_register(intr_handle,
+  ngbe_dev_interrupt_handler,
+  (void *)dev);
+
+   /* Clean datapath event and queue/vec mapping */
+   rte_intr_efd_disable(intr_handle);
+   if (intr_handle->intr_vec != NULL) {
+   rte_free(intr_handle->intr_vec);
+   intr_handle->intr_vec = NULL;
+   }
+
+   hw->adapter_stopped = true;
+   dev->data->dev_started = 0;
+
+   return 0;
+}
+
 /*
  * Reset and stop device.
  */
 static int
 ngbe_dev_close(struct rte_eth_dev *dev)
 {
+   struct ngbe_hw *hw = NGBE_DEV_HW(dev);
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+   int retries = 0;
+   int ret;
+
PMD_INIT_FUNC_TRACE();
 
-   RTE_SET_USED(dev);
+   ngbe_pf_reset_hw(hw);
 
-   return 0;
+   ret = ngbe_dev_stop(dev);
+
+   ngbe_dev_free_queues(dev);
+
+   /* reprogram the RAR[0] in case user changed it. */
+   ngbe_set_rar(hw, 0, hw->mac.addr, 0, true);
+
+   /* Unlock any pending hardware semaphore */
+   ngbe_swfw_lock_reset(hw);
+
+   /* disable uio intr before callback unregister */
+   rte_intr_disable(intr_handle);
+
+   do {
+   ret = rte_intr_callback_unregister(intr_handle,
+   ngbe_dev_interrupt_handler, dev);
+   if (ret >= 0 || ret == -ENOENT) {
+   break;
+   } else if (ret != -EAGAIN) {
+   PMD_INIT_LOG(ERR,
+   "intr callback unregister failed: %d",
+   ret);
+   }
+   rte_delay_ms(100);
+   } while (retries++ < (10 + NGBE_LINK_UP_TIME));
+
+   rte_free(dev->data->mac_addrs);
+   dev->data->mac_addrs = NULL;
+
+   rte_free(dev->data->hash_mac_addrs);
+   dev->data->hash_mac_addrs = NULL;
+
+   return ret;
+}
+
+/*
+ * Reset PF device.
+ */
+static int
+ngbe_dev_reset(struct rte_eth_dev *dev)
+{
+   int ret;
+
+   ret = eth_ngbe_dev_uninit(dev);
+   if (ret)
+   return ret;
+
+   ret = eth_ngbe_dev_init(dev, NULL);
+
+   return ret;
 }
 
 static int
@@ -1120,6 +1236,9 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = {
.dev_configure  = ngbe_dev_configure,
.dev_infos_get  = ngbe_dev_info_get,
.dev_start  = ngbe_dev_start,
+   .dev_stop   = ngbe_dev_stop,
+   .dev_close  = ngbe_dev_close,
+   .dev_reset  = ngbe_dev_reset,
.link_update= ngbe_dev_link_update,
.dev_supported_ptypes_get   = ngbe_dev_supported_ptypes_get,
.rx_queue_start = ngbe_dev_rx_queue_start,
diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
index 97ced40e4b..7ca3ebbda3 100644

Re: [dpdk-dev] [PATCH] bitmap: fix buffer overrun in bitmap init function

[Andrew Rybchenko]

On 6/2/21 12:06 PM, Andrew Rybchenko wrote:
> From: Ivan Ilchenko 
> 
> Bitmap initialization function is allowed to memset
> caller-provided buffer with number of bytes exceeded
> this buffer size. This happens due to wrong comparision
> sign between buffer size and number of bytes required
> to initialize bitmap.
> 
> Fixes: 602c9ca33a4 ("sched: bitmap is now dynamically allocated")
> Cc: sta...@dpdk.org
> 
> Reported-by: Andy Moreton 
> Signed-off-by: Ivan Ilchenko 
> Signed-off-by: Andrew Rybchenko 
> Reviewed-by: Andy Moreton 
> ---
>  lib/eal/include/rte_bitmap.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h
> index 9e2b8f2cbf..870aecc594 100644
> --- a/lib/eal/include/rte_bitmap.h
> +++ b/lib/eal/include/rte_bitmap.h
> @@ -185,7 +185,7 @@ rte_bitmap_init(uint32_t n_bits, uint8_t *mem, uint32_t 
> mem_size)
>   size = __rte_bitmap_get_memory_footprint(n_bits,
>   &array1_byte_offset, &array1_slabs,
>   &array2_byte_offset, &array2_slabs);
> - if (size < mem_size) {
> + if (size > mem_size) {
>   return NULL;
>   }
>  
> 

Self-NACK, will fix spelling in v2 and remove curly brackets.
Strictly speaking it is out of scope of the patch, but nice
cleanup on the way.

[dpdk-dev] [PATCH v2] bitmap: fix buffer overrun in bitmap init function

[Andrew Rybchenko]

From: Ivan Ilchenko 

Bitmap initialization function is allowed to memset()
caller-provided buffer with number of bytes exceeded
this buffer size. This happens due to wrong comparison
sign between buffer size and number of bytes required
to initialize bitmap.

Fixes: 602c9ca33a4 ("sched: bitmap is now dynamically allocated")
Cc: sta...@dpdk.org

Reported-by: Andy Moreton 
Signed-off-by: Ivan Ilchenko 
Reviewed-by: Andy Moreton 
Signed-off-by: Andrew Rybchenko 
---
 lib/eal/include/rte_bitmap.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h
index 9e2b8f2cbf..e4623bb176 100644
--- a/lib/eal/include/rte_bitmap.h
+++ b/lib/eal/include/rte_bitmap.h
@@ -185,9 +185,8 @@ rte_bitmap_init(uint32_t n_bits, uint8_t *mem, uint32_t 
mem_size)
size = __rte_bitmap_get_memory_footprint(n_bits,
&array1_byte_offset, &array1_slabs,
&array2_byte_offset, &array2_slabs);
-   if (size < mem_size) {
+   if (size > mem_size)
return NULL;
-   }
 
/* Setup bitmap */
memset(mem, 0, size);
-- 
2.30.2

Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields

[Gregory Etelson]

Hello,

Is there another concern about that patch ?
Please comment.

Regards,
Gregory

> -Original Message-
> From: Gregory Etelson
> Sent: Monday, May 31, 2021 14:10
> To: Ananyev, Konstantin ; Morten Brørup
> ; dev@dpdk.org
> Cc: Matan Azrad ; Ori Kam ;
> Raslan Darawsheh ; Iremonger, Bernard
> ; Olivier Matz 
> Subject: RE: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
> 
> > > > > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > > > > fields into a single structure member.
> > > > > > > This patch introduces dedicated structure members for both
> > > > > `version'
> > > > > > > and `ihl' IPv4 fields. Separated header fields definitions
> > > > > > > allow to create simplified code to match on the IHL value in
> > > > > > > a flow
> > rule.
> > > > > > > The original `version_ihl' structure member is kept for
> > > > > > > backward compatibility.
> > > > > > >
> > > > > > > Signed-off-by: Gregory Etelson 
> > > > > > > ---
> > > > > > >  app/test/test_flow_classify.c |  8 
> > > > > > >  lib/net/rte_ip.h  | 16 +++-
> > > > > > >  2 files changed, 19 insertions(+), 5 deletions(-)
> > > > > > >
> > > > > > > diff --git a/app/test/test_flow_classify.c
> > > > > > > b/app/test/test_flow_classify.c index 951606f248..4f64be5357
> > > > > > > 100644
> > > > > > > --- a/app/test/test_flow_classify.c
> > > > > > > +++ b/app/test/test_flow_classify.c
> > > > > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > > > >   *  dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > > > >   */
> > > > > > >  static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}  };  static
> > > > > > > const struct rte_flow_item_ipv4 ipv4_mask_24 = { @@ -131,7
> > > > > > > +131,7 @@ static struct rte_flow_item  end_item = {
> > > > RTE_FLOW_ITEM_TYPE_END,
> > > > > > >   *  dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > > > >   */
> > > > > > >  static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}  };
> > > > > > >
> > > > > > > @@ -150,8 +150,8 @@ static struct rte_flow_item  tcp_item_1
> > > > > > > = { RTE_FLOW_ITEM_TYPE_TCP,
> > > > > > >   *  dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > > > >   */
> > > > > > >  static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13,
> > > > > > > 14),
> > > > > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > > > >  };
> > > > > > >
> > > > > > >  static struct rte_flow_item_sctp sctp_spec_1 = { diff --git
> > > > > > > a/lib/net/rte_ip.h b/lib/net/rte_ip.h index
> > > > > > > 4b728969c1..684bb028b2
> > > > > > > 100644
> > > > > > > --- a/lib/net/rte_ip.h
> > > > > > > +++ b/lib/net/rte_ip.h
> > > > > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > > > >   * IPv4 Header
> > > > > > >   */
> > > > > > >  struct rte_ipv4_hdr {
> > > > > > > - uint8_t  version_ihl;   /**< version and header length 
> > > > > > > */
> > > > > > > + __extension__
> > > > > > > + union {
> > > > > > > + uint8_t version_ihl;/**< version and header length 
> > > > > > > */
> > > > > > > + struct {
> > > > > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > > > > + uint8_t ihl:4;
> > > > > > > + uint8_t version:4; #elif RTE_BYTE_ORDER ==
> > > > > > > +RTE_BIG_ENDIAN
> > > > > > > + uint8_t version:4;
> > > > > > > + uint8_t ihl:4; #else #error "setup endian
> > > > > > > +definition"
> > > > > > > +#endif
> > > > > > > + };
> > > > > > > + };
> > > > > > >   uint8_t  type_of_service;   /**< type of service */
> > > > > > >   rte_be16_t total_length;/**< length of packet */
> > > > > > >   rte_be16_t packet_id;   /**< packet ID */
> > > > > > > --
> > > > > > > 2.31.1
> > > > > > >
> > > > > >
> > > > > > This does not break the ABI, but it could be discussed if it
> > > > > > breaks
> > > > > the API due to the required structure initialization changes
> > > > > shown in
> > > > > > test_flow_classify.c.
> > > > >
> > > > > Yep, I guess it might be classified as API change.
> > > > > Another thing that concerns me - it is not the only place in
> > > > > IPv4 header when we unite multiple bit-fields into one field:
> > > > > type_of_service, fragment_offset.
> > > > > If we start splitting ipv4 fields into actual bitfields, I
> > > > > suppose we'll end-up splitting 

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Eli Britstein]

On 6/1/2021 5:53 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 5:44 PM, Eli Britstein wrote:

On 6/1/2021 5:35 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 4:24 PM, Eli Britstein wrote:

On 6/1/2021 3:10 PM, Ilya Maximets wrote:

External email: Use caution opening links or attachments


On 6/1/21 1:14 PM, Ivan Malov wrote:

By its very name, action PORT_ID means that packets hit an ethdev
with the
given DPDK port ID. At least the current comments don't state the
opposite.
That said, since port representors had been adopted, applications
like OvS
have been misusing the action. They misread its purpose as sending
packets
to the opposite end of the "wire" plugged to the given ethdev, for
example,
redirecting packets to the VF itself rather than to its representor
ethdev.
Another example: OvS relies on this action with the admin PF's ethdev
port
ID specified in it in order to send offloaded packets to the physical
port.

Since there might be applications which use this action in its valid
sense,
one can't just change the documentation to greenlight the opposite
meaning.
This patch adds an explicit bit to the action configuration which
will let
applications, depending on their needs, leverage the two meanings
properly.
Applications like OvS, as well as PMDs, will have to be corrected
when the
patch has been applied. But the improved clarity of the action is
worth it.

The proposed change is not the only option. One could avoid changes
in OvS
and PMDs if the new configuration field had the opposite meaning,
with the
action itself meaning delivery to the represented port and not to
DPDK one.
Alternatively, one could define a brand new action with the said
behaviour.

It doesn't make any sense to attach the VF itself to OVS, but only its
representor.

OvS is not the only DPDK application.

True. It is just the focus of this commit message is OVS.

For the PF, when in switchdev mode, it is the "uplink representor", so
it is also a representor.

Strictly speaking it is not a representor from DPDK point of
view. E.g. representors have corresponding flag set which is
definitely clear in the case of PF.

This is the per-PMD responsibility. The API should not care.

That said, OVS does not care of the type of the port. It doesn't matter
if it's an "upstream" or not, or if it's a representor or not.

Yes, it is clear, but let's put OvS aside. Let's consider a
DPDK application which has a number of ethdev port. Some may
belong to single switch domain, some may be from different
switch domains (i.e. different NICs). Can I use PORT_ID action
to redirect ingress traffic to a specified ethdev port using
PORT_ID action? It looks like no, but IMHO it is the definition
of the PORT_ID action.

Let's separate API from implementation. By API point of view, yes, the
user may request it. Nothing wrong with it.

 From implementation point of view - yes, it might fail, but not for
sure, even if on different NICs. Maybe the HW of a certain vendor has
the capability to do it?

We can't know, so I think the API should allow it.

Hold on. What should it allow? It is two opposite meanings:
  1. Direct traffic to DPDK ethdev port specified using ID to be
 received and processed by the DPDK application.
  2. Direct traffic to an upstream port represented by the
 DPDK port.

The patch tries to address the ambiguity, misuse it in OvS
(from my point of view in accordance with the action
documentation), mis-implementation in a number of PMDs
(to work in OvS) and tries to sort it out with an explanation
why proposed direction is chosen. I realize that it could be
painful, but IMHO it is the best option here. Yes, it is a
point to discuss.

To start with we should agree that that problem exists.
Second, we should agree on direction how to solve it.


I agree. Suppose port 0 is the PF, and port 1 is a VF representor.

IIUC, there are two options:

1. flow create 1 ingress transfer pattern eth / end action port_id id 0 
upstream 1 / end


2. flow create 1 ingress transfer pattern eth / end action port_id id 0 
upstream 0 / end


[1] is the same behavior as today.

[2] is a new behavior, the packet received by port 0 as if it arrived 
from the wire.


Then, let's have more:

3. flow create 0 ingress transfer pattern eth / end action port_id id 1 
upstream 1 / end


4. flow create 0 ingress transfer pattern eth / end action port_id id 1 
upstream 0 / end


if we have [2] and [4], the packet going from the VF will hit [2], then 
hit [4] and then [2] again in an endless loop?



If this is your meaning, maybe what you are looking for is an action to 
change the in_port and continue processing?


Please comment on the examples I gave or clarify the use case you are 
trying to do.



Thanks,

Eli




We had already very similar discussions regarding the understanding of
what
the representor really is from the DPDK API's point of view, and th

[dpdk-dev] [PATCH 0/2] Support compressed firmwares

[David Marchand]

Fedora 34 only provides compressed firmwares.

Introduce an internal driver helper to handle transparently compression.

I chose libarchive for decompressing as it seems widely available and
DPDK had used it in the past.

Windows support only matters for net/ice and firmware loading was skipped
in this driver before this series. Since I don't know if/how we want to
load firmwares on Windows, I let an empty stub for this OS.

This series has been compile tested on Linux (I'll trust the CI for
others OSes).
I only tested basic init with a net/ice device (no DCF test).

So please drivers maintainers, check nothing is broken.


-- 
David Marchand

David Marchand (2):
  net/ice: factorize firmware loading
  eal: handle compressed firmwares

 .github/workflows/build.yml  |   1 +
 .travis.yml  |   1 +
 config/meson.build   |   9 ++
 drivers/net/bnx2x/bnx2x.c|  35 +++
 drivers/net/ice/base/ice_osdep.h |   6 --
 drivers/net/ice/ice_dcf_parent.c |  97 ++---
 drivers/net/ice/ice_ethdev.c | 175 ---
 drivers/net/ice/ice_ethdev.h |   3 +-
 drivers/net/nfp/nfp_net.c|  57 +++---
 drivers/net/qede/qede_main.c |  44 +++-
 lib/eal/include/rte_firmware.h   |  35 +++
 lib/eal/unix/eal_firmware.c  | 106 +++
 lib/eal/unix/meson.build |   1 +
 lib/eal/version.map  |   2 +
 lib/eal/windows/eal.c|   9 ++
 15 files changed, 283 insertions(+), 298 deletions(-)
 create mode 100644 lib/eal/include/rte_firmware.h
 create mode 100644 lib/eal/unix/eal_firmware.c

-- 
2.23.0

[dpdk-dev] [PATCH 1/2] net/ice: factorize firmware loading

[David Marchand]

Both "normal" and "dcf" inits have their copy of some firmware loading
code.

The DSN query is moved in specific parts for the "normal" and "dcf" init.

A common helper ice_load_pkg is then introduced and takes an adapter
pointer as its main input.

This helper takes care of finding the right firmware file and loading
it.
The adapter active_pkg_type field is set by this helper.

The ice_access macro is removed from the osdep.h header: osdep.h should
only hosts wrappers for base driver code.

Signed-off-by: David Marchand 
---
 drivers/net/ice/base/ice_osdep.h |   6 --
 drivers/net/ice/ice_dcf_parent.c |  97 ++-
 drivers/net/ice/ice_ethdev.c | 161 +++
 drivers/net/ice/ice_ethdev.h |   3 +-
 4 files changed, 88 insertions(+), 179 deletions(-)

diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h
index 878c5597d4..78093adb00 100644
--- a/drivers/net/ice/base/ice_osdep.h
+++ b/drivers/net/ice/base/ice_osdep.h
@@ -74,12 +74,6 @@ typedef uint64_ts64;
 #define min(a, b) RTE_MIN(a, b)
 #define max(a, b) RTE_MAX(a, b)
 
-#ifdef RTE_EXEC_ENV_WINDOWS
-#define ice_access _access
-#else
-#define ice_access access
-#endif
-
 #define FIELD_SIZEOF(t, f) RTE_SIZEOF_FIELD(t, f)
 #define ARRAY_SIZE(arr) RTE_DIM(arr)
 
diff --git a/drivers/net/ice/ice_dcf_parent.c b/drivers/net/ice/ice_dcf_parent.c
index 1d7aa8bc87..a30cfefaaf 100644
--- a/drivers/net/ice/ice_dcf_parent.c
+++ b/drivers/net/ice/ice_dcf_parent.c
@@ -298,13 +298,14 @@ static void ice_dcf_uninit_parent_hw(struct ice_hw *hw)
 }
 
 static int
-ice_dcf_request_pkg_name(struct ice_hw *hw, char *pkg_name)
+ice_dcf_load_pkg(struct ice_adapter *adapter)
 {
struct ice_dcf_adapter *dcf_adapter =
-   container_of(hw, struct ice_dcf_adapter, parent.hw);
+   container_of(&adapter->hw, struct ice_dcf_adapter, 
parent.hw);
struct virtchnl_pkg_info pkg_info;
struct dcf_virtchnl_cmd vc_cmd;
-   uint64_t dsn;
+   bool use_dsn;
+   uint64_t dsn = 0;
 
vc_cmd.v_op = VIRTCHNL_OP_DCF_GET_PKG_INFO;
vc_cmd.req_msglen = 0;
@@ -312,90 +313,11 @@ ice_dcf_request_pkg_name(struct ice_hw *hw, char 
*pkg_name)
vc_cmd.rsp_buflen = sizeof(pkg_info);
vc_cmd.rsp_msgbuf = (uint8_t *)&pkg_info;
 
-   if (ice_dcf_execute_virtchnl_cmd(&dcf_adapter->real_hw, &vc_cmd))
-   goto pkg_file_direct;
+   use_dsn = ice_dcf_execute_virtchnl_cmd(&dcf_adapter->real_hw, &vc_cmd) 
== 0;
+   if (use_dsn)
+   rte_memcpy(&dsn, pkg_info.dsn, sizeof(dsn));
 
-   rte_memcpy(&dsn, pkg_info.dsn, sizeof(dsn));
-
-   snprintf(pkg_name, ICE_MAX_PKG_FILENAME_SIZE,
-ICE_PKG_FILE_SEARCH_PATH_UPDATES "ice-%016llx.pkg",
-(unsigned long long)dsn);
-   if (!ice_access(pkg_name, 0))
-   return 0;
-
-   snprintf(pkg_name, ICE_MAX_PKG_FILENAME_SIZE,
-ICE_PKG_FILE_SEARCH_PATH_DEFAULT "ice-%016llx.pkg",
-(unsigned long long)dsn);
-   if (!ice_access(pkg_name, 0))
-   return 0;
-
-pkg_file_direct:
-   snprintf(pkg_name,
-ICE_MAX_PKG_FILENAME_SIZE, "%s", ICE_PKG_FILE_UPDATES);
-   if (!ice_access(pkg_name, 0))
-   return 0;
-
-   snprintf(pkg_name,
-ICE_MAX_PKG_FILENAME_SIZE, "%s", ICE_PKG_FILE_DEFAULT);
-   if (!ice_access(pkg_name, 0))
-   return 0;
-
-   return -1;
-}
-
-static int
-ice_dcf_load_pkg(struct ice_hw *hw)
-{
-   char pkg_name[ICE_MAX_PKG_FILENAME_SIZE];
-   uint8_t *pkg_buf;
-   uint32_t buf_len;
-   struct stat st;
-   FILE *fp;
-   int err;
-
-   if (ice_dcf_request_pkg_name(hw, pkg_name)) {
-   PMD_INIT_LOG(ERR, "Failed to locate the package file");
-   return -ENOENT;
-   }
-
-   PMD_INIT_LOG(DEBUG, "DDP package name: %s", pkg_name);
-
-   err = stat(pkg_name, &st);
-   if (err) {
-   PMD_INIT_LOG(ERR, "Failed to get file status");
-   return err;
-   }
-
-   buf_len = st.st_size;
-   pkg_buf = rte_malloc(NULL, buf_len, 0);
-   if (!pkg_buf) {
-   PMD_INIT_LOG(ERR, "failed to allocate buffer of size %u for 
package",
-buf_len);
-   return -1;
-   }
-
-   fp = fopen(pkg_name, "rb");
-   if (!fp)  {
-   PMD_INIT_LOG(ERR, "failed to open file: %s", pkg_name);
-   err = -1;
-   goto ret;
-   }
-
-   err = fread(pkg_buf, buf_len, 1, fp);
-   fclose(fp);
-   if (err != 1) {
-   PMD_INIT_LOG(ERR, "failed to read package data");
-   err = -1;
-   goto ret;
-   }
-
-   err = ice_copy_and_init_pkg(hw, pkg_buf, buf_len);
-   if (err)
-   PMD_INIT_LOG(ERR, "ice_copy_and_init_hw failed: %d", err);
-
-ret:
-   rte_free(pkg_buf);
-   retur

[dpdk-dev] [PATCH 2/2] eal: handle compressed firmwares

[David Marchand]

Introduce an internal firmware loading helper to remove code duplication
in our drivers and handle xz compressed firmwares by calling libarchive.

This helper tries to look for .xz suffixes so that drivers are not aware
the firmwares have been compressed.

libarchive is set as an optional dependency: without libarchive, a
runtime warning is emitted so that users know there is a compressed
firmware.

Windows implementation is left as an empty stub.

Signed-off-by: David Marchand 
---
 .github/workflows/build.yml|   1 +
 .travis.yml|   1 +
 config/meson.build |   9 +++
 drivers/net/bnx2x/bnx2x.c  |  35 ---
 drivers/net/ice/ice_ethdev.c   |  60 ---
 drivers/net/nfp/nfp_net.c  |  57 --
 drivers/net/qede/qede_main.c   |  44 ++
 lib/eal/include/rte_firmware.h |  35 +++
 lib/eal/unix/eal_firmware.c| 106 +
 lib/eal/unix/meson.build   |   1 +
 lib/eal/version.map|   2 +
 lib/eal/windows/eal.c  |   9 +++
 12 files changed, 218 insertions(+), 142 deletions(-)
 create mode 100644 lib/eal/include/rte_firmware.h
 create mode 100644 lib/eal/unix/eal_firmware.c

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 7c4d6dcdbf..7dac20ddeb 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -93,6 +93,7 @@ jobs:
   run: sudo apt install -y ccache libnuma-dev python3-setuptools
 python3-wheel python3-pip python3-pyelftools ninja-build libbsd-dev
 libpcap-dev libibverbs-dev libcrypto++-dev libfdt-dev libjansson-dev
+libarchive-dev
 - name: Install libabigail build dependencies if no cache is available
   if: env.ABI_CHECKS == 'true' && steps.libabigail-cache.outputs.cache-hit 
!= 'true'
   run: sudo apt install -y autoconf automake libtool pkg-config libxml2-dev
diff --git a/.travis.yml b/.travis.yml
index 5b702cc9bb..23067d9e3c 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -16,6 +16,7 @@ addons:
 packages: &required_packages
   - [libnuma-dev, python3-setuptools, python3-wheel, python3-pip, 
python3-pyelftools, ninja-build]
   - [libbsd-dev, libpcap-dev, libibverbs-dev, libcrypto++-dev, libfdt-dev, 
libjansson-dev]
+  - [libarchive-dev]
 
 _aarch64_packages: &aarch64_packages
   - *required_packages
diff --git a/config/meson.build b/config/meson.build
index 017bb2efbb..337daa2719 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -166,6 +166,15 @@ if fdt_dep.found() and cc.has_header('fdt.h')
 dpdk_extra_ldflags += '-lfdt'
 endif
 
+has_libarchive = 0
+archive_dep = cc.find_library('libarchive', required: false)
+if archive_dep.found() and cc.has_header('archive.h')
+dpdk_conf.set10('RTE_HAS_LIBARCHIVE', true)
+has_libarchive = 1
+add_project_link_arguments('-larchive', language: 'c')
+dpdk_extra_ldflags += '-larchive'
+endif
+
 libexecinfo = cc.find_library('libexecinfo', required: false)
 if libexecinfo.found() and cc.has_header('execinfo.h')
 add_project_link_arguments('-lexecinfo', language: 'c')
diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c
index 654878d9de..60292753e2 100644
--- a/drivers/net/bnx2x/bnx2x.c
+++ b/drivers/net/bnx2x/bnx2x.c
@@ -26,7 +26,9 @@
 #include 
 #include 
 #include 
+
 #include 
+#include 
 #include 
 
 #define BNX2X_PMD_VER_PREFIX "BNX2X PMD"
@@ -9655,44 +9657,33 @@ static void bnx2x_init_rte(struct bnx2x_softc *sc)
 void bnx2x_load_firmware(struct bnx2x_softc *sc)
 {
const char *fwname;
-   int f;
-   struct stat st;
+   void *buf;
+   size_t bufsz;
 
fwname = sc->devinfo.device_id == CHIP_NUM_57711
? FW_NAME_57711 : FW_NAME_57810;
-   f = open(fwname, O_RDONLY);
-   if (f < 0) {
+   if (rte_firmware_read(fwname, &buf, &bufsz) != 0) {
PMD_DRV_LOG(NOTICE, sc, "Can't open firmware file");
return;
}
 
-   if (fstat(f, &st) < 0) {
-   PMD_DRV_LOG(NOTICE, sc, "Can't stat firmware file");
-   close(f);
-   return;
-   }
-
-   sc->firmware = rte_zmalloc("bnx2x_fw", st.st_size, RTE_CACHE_LINE_SIZE);
+   sc->firmware = rte_zmalloc("bnx2x_fw", bufsz, RTE_CACHE_LINE_SIZE);
if (!sc->firmware) {
PMD_DRV_LOG(NOTICE, sc, "Can't allocate memory for firmware");
-   close(f);
-   return;
+   goto out;
}
 
-   if (read(f, sc->firmware, st.st_size) != st.st_size) {
-   PMD_DRV_LOG(NOTICE, sc, "Can't read firmware data");
-   close(f);
-   return;
-   }
-   close(f);
-
-   sc->fw_len = st.st_size;
+   sc->fw_len = bufsz;
if (sc->fw_len < FW_HEADER_LEN) {
PMD_DRV_LOG(NOTICE, sc,
"Invalid fw size: %" PRIu64, sc->fw_len);
-   return;
+   goto out;
}

Re: [dpdk-dev] [EXT] [PATCH 0/2] Support compressed firmwares

[Igor Russkikh]

> Fedora 34 only provides compressed firmwares.
> 
> Introduce an internal driver helper to handle transparently compression.
> 
> I chose libarchive for decompressing as it seems widely available and
> DPDK had used it in the past.
> 
> Windows support only matters for net/ice and firmware loading was skipped
> in this driver before this series. Since I don't know if/how we want to
> load firmwares on Windows, I let an empty stub for this OS.
> 
> This series has been compile tested on Linux (I'll trust the CI for
> others OSes).
> I only tested basic init with a net/ice device (no DCF test).
> 
> So please drivers maintainers, check nothing is broken.

Hi David,

We (Marvell QED) already provide packed version of FW in linux-firmware:
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/qed
 

But thats a custom name, and zlib.

I'm just wondering if its a good solution to try transparently load .xz variant?
User may not expect that. M.b. through this api, give a driver an option to 
specify
archive format? Or even autodetect it from content?

Regards,
  Igor

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Andrew Rybchenko]

On 6/2/21 12:57 PM, Eli Britstein wrote:
> 
> On 6/1/2021 5:53 PM, Andrew Rybchenko wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 6/1/21 5:44 PM, Eli Britstein wrote:
>>> On 6/1/2021 5:35 PM, Andrew Rybchenko wrote:
 External email: Use caution opening links or attachments


 On 6/1/21 4:24 PM, Eli Britstein wrote:
> On 6/1/2021 3:10 PM, Ilya Maximets wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 6/1/21 1:14 PM, Ivan Malov wrote:
>>> By its very name, action PORT_ID means that packets hit an ethdev
>>> with the
>>> given DPDK port ID. At least the current comments don't state the
>>> opposite.
>>> That said, since port representors had been adopted, applications
>>> like OvS
>>> have been misusing the action. They misread its purpose as sending
>>> packets
>>> to the opposite end of the "wire" plugged to the given ethdev, for
>>> example,
>>> redirecting packets to the VF itself rather than to its representor
>>> ethdev.
>>> Another example: OvS relies on this action with the admin PF's
>>> ethdev
>>> port
>>> ID specified in it in order to send offloaded packets to the
>>> physical
>>> port.
>>>
>>> Since there might be applications which use this action in its valid
>>> sense,
>>> one can't just change the documentation to greenlight the opposite
>>> meaning.
>>> This patch adds an explicit bit to the action configuration which
>>> will let
>>> applications, depending on their needs, leverage the two meanings
>>> properly.
>>> Applications like OvS, as well as PMDs, will have to be corrected
>>> when the
>>> patch has been applied. But the improved clarity of the action is
>>> worth it.
>>>
>>> The proposed change is not the only option. One could avoid changes
>>> in OvS
>>> and PMDs if the new configuration field had the opposite meaning,
>>> with the
>>> action itself meaning delivery to the represented port and not to
>>> DPDK one.
>>> Alternatively, one could define a brand new action with the said
>>> behaviour.
> It doesn't make any sense to attach the VF itself to OVS, but only its
> representor.
 OvS is not the only DPDK application.
>>> True. It is just the focus of this commit message is OVS.
> For the PF, when in switchdev mode, it is the "uplink representor", so
> it is also a representor.
 Strictly speaking it is not a representor from DPDK point of
 view. E.g. representors have corresponding flag set which is
 definitely clear in the case of PF.
>>> This is the per-PMD responsibility. The API should not care.
> That said, OVS does not care of the type of the port. It doesn't
> matter
> if it's an "upstream" or not, or if it's a representor or not.
 Yes, it is clear, but let's put OvS aside. Let's consider a
 DPDK application which has a number of ethdev port. Some may
 belong to single switch domain, some may be from different
 switch domains (i.e. different NICs). Can I use PORT_ID action
 to redirect ingress traffic to a specified ethdev port using
 PORT_ID action? It looks like no, but IMHO it is the definition
 of the PORT_ID action.
>>> Let's separate API from implementation. By API point of view, yes, the
>>> user may request it. Nothing wrong with it.
>>>
>>>  From implementation point of view - yes, it might fail, but not for
>>> sure, even if on different NICs. Maybe the HW of a certain vendor has
>>> the capability to do it?
>>>
>>> We can't know, so I think the API should allow it.
>> Hold on. What should it allow? It is two opposite meanings:
>>   1. Direct traffic to DPDK ethdev port specified using ID to be
>>  received and processed by the DPDK application.
>>   2. Direct traffic to an upstream port represented by the
>>  DPDK port.
>>
>> The patch tries to address the ambiguity, misuse it in OvS
>> (from my point of view in accordance with the action
>> documentation), mis-implementation in a number of PMDs
>> (to work in OvS) and tries to sort it out with an explanation
>> why proposed direction is chosen. I realize that it could be
>> painful, but IMHO it is the best option here. Yes, it is a
>> point to discuss.
>>
>> To start with we should agree that that problem exists.
>> Second, we should agree on direction how to solve it.
> 
> I agree. Suppose port 0 is the PF, and port 1 is a VF representor.
> 
> IIUC, there are two options:
> 
> 1. flow create 1 ingress transfer pattern eth / end action port_id id 0
> upstream 1 / end
> 
> 2. flow create 1 ingress transfer pattern eth / end action port_id id 0
> upstream 0 / end
> 
> [1] is the same behavior as today.
> 
> [2] is a new behavior, the packet received by port 0 as if it arrived
> from the wire.
> 
> Then, let's have more:
> 
> 3. flow create 0 ingress transfer pattern eth / end a

Re: [dpdk-dev] [EXT] [PATCH 0/2] Support compressed firmwares

[David Marchand]

On Wed, Jun 2, 2021 at 12:38 PM Igor Russkikh  wrote:
> We (Marvell QED) already provide packed version of FW in linux-firmware:
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/qed
>
> But thats a custom name, and zlib.

Whatever binary blob is available in linux-firmware upstream repo, it
ends up compressed on Fedora 34 (and later).

# fc33
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115649&filename=/usr/lib/firmware/qed/qed_init_values-8.10.9.0.bin
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115649&filename=/usr/lib/firmware/qed/qed_init_values_zipped-8.10.10.0.bin
# fc34
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115322&filename=/usr/lib/firmware/qed/qed_init_values-8.10.9.0.bin.xz
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115322&filename=/usr/lib/firmware/qed/qed_init_values_zipped-8.10.10.0.bin.xz
# fc35
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115234&filename=/usr/lib/firmware/qed/qed_init_values-8.10.9.0.bin.xz
https://koji.fedoraproject.org/koji/fileinfo?rpmID=26115234&filename=/usr/lib/firmware/qed/qed_init_values_zipped-8.10.10.0.bin.xz

Did you try the qede pmd on fc34?


>
> I'm just wondering if its a good solution to try transparently load .xz 
> variant?

The linux kernel (since v5.2, I think) uncompresses this transparently
without kernel drivers knowing.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=82fd7a8142a10b8eb41313074b3859d82c0857dc


> User may not expect that. M.b. through this api, give a driver an option to 
> specify
> archive format? Or even autodetect it from content?

User should (do ?) not care about firmwares, only drivers do.

If not doing transparently, each driver will have to implement (or ask
a common helper for) support of compressed blobs.
While this issue is common to all drivers.

As for autodetecting compression, libarchive can do this, I added only
xz support because this is the only supported compression in the Linux
kernel loader.


-- 
David Marchand

Re: [dpdk-dev] [PATCH v2] vfio: fix stdbool usage without include

[Burakov, Anatoly]

On 01-Jun-21 9:28 AM, Christian Ehrhardt wrote:

This became visible by backporting the following for the 19.11 stable tree:
  c13ca4e8 "vfio: fix DMA mapping granularity for IOVA as VA"

The usage of type bool in the vfio code would require "#include
", but rte_vfio.h has no direct paths to stdbool.h.
It happens that in eal_vfio_mp_sync.c it comes after "#include
".

And rte_log.h since 20.05 includes stdbool since this change:
  241e67bfe "log: add API to check if a logtype can log in a given level"
and thereby mitigates the issue.

It should be safe to include stdbool.h from rte_vfio.h itself
to be present exactly when needed for the struct it defines using that
type.

Fixes: c13ca4e81cac ("vfio: fix DMA mapping granularity for IOVA as VA")

Signed-off-by: Christian Ehrhardt 
---
  lib/eal/include/rte_vfio.h | 1 +
  1 file changed, 1 insertion(+)

diff --git a/lib/eal/include/rte_vfio.h b/lib/eal/include/rte_vfio.h
index e7a87454bea..2d90b364801 100644
--- a/lib/eal/include/rte_vfio.h
+++ b/lib/eal/include/rte_vfio.h
@@ -14,6 +14,7 @@
  extern "C" {
  #endif
  
+#include 

  #include 
  
  /*



Acked-by: Anatoly Burakov 

--
Thanks,
Anatoly

Re: [dpdk-dev] [PATCH 2/2] eal: handle compressed firmwares

[Jerin Jacob]

On Wed, Jun 2, 2021 at 3:29 PM David Marchand  wrote:
>
> Introduce an internal firmware loading helper to remove code duplication
> in our drivers and handle xz compressed firmwares by calling libarchive.
>
> This helper tries to look for .xz suffixes so that drivers are not aware
> the firmwares have been compressed.
>
> libarchive is set as an optional dependency: without libarchive, a
> runtime warning is emitted so that users know there is a compressed
> firmware.
>
> Windows implementation is left as an empty stub.
>
> Signed-off-by: David Marchand 

> + */
> +
> +#ifndef __RTE_FIRMWARE_H__
> +#define __RTE_FIRMWARE_H__
> +
> +#include 
> +
> +#include 
> +
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice
> + *
> + * Load a firmware in a dynamically allocated buffer, dealing with compressed
> + * files if libarchive is available.
> + *
> + * @param name
> + *  Firmware filename to load.
> + * @param buf

Adding out to express the output useful. i.e
@param[out] buf

> + *  Buffer allocated by this function. If this function succeeds, the
> + *  caller is responsible for freeing the buffer.

I think, we can chnange to "freeing the buffer using free()" to avoid
confusion with rte_free()

> + * @param bufsz

@param[out] bufsz

> + *  Size of the data in the buffer.
> + *
> + * @return
> + *  0 if successful.
> + *  Negative otherwise, buf and bufsize contents are invalid.
> + */
> +__rte_internal
> +int
> +rte_firmware_read(const char *name, void **buf, size_t *bufsz);
> +
> +#endif
> diff --git a/lib/eal/unix/eal_firmware.c b/lib/eal/unix/eal_firmware.c
> new file mode 100644
> index 00..ea66fecfe9
> --- /dev/null
> +++ b/lib/eal/unix/eal_firmware.c
> @@ -0,0 +1,106 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2021 Red Hat, Inc.
> + */
> +
> +#ifdef RTE_HAS_LIBARCHIVE
> +#include 
> +#endif
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +static int
> +firmware_read(const char *name, void **buf, size_t *bufsz)
> +{
> +   const size_t blocksize = 4096;
> +   int ret = -1;
> +   int err;
> +#ifdef RTE_HAS_LIBARCHIVE


I think, better to have small inline functions for libarchive variant
vs normal file accessors
in the group for open, access, read etc to avoid the ifdef clutter and
manage with one ifdef.



> +   struct archive_entry *entry;
> +   struct archive *a;
> +#else
> +   int fd;
> +#endif
> +
> +   *buf = NULL;
> +   *bufsz = 0;
> +
> +#ifdef RTE_HAS_LIBARCHIVE

See above

> +   a = archive_read_new();
> +   if (a == NULL || archive_read_support_format_raw(a) != ARCHIVE_OK ||
> +   archive_read_support_filter_xz(a) != ARCHIVE_OK ||
> +   archive_read_open_filename(a, name, blocksize) != 
> ARCHIVE_OK ||
> +   archive_read_next_header(a, &entry) != ARCHIVE_OK)
> +   goto out;
> +#else
> +   fd = open(name, O_RDONLY);
> +   if (fd < 0)
> +   goto out;
> +#endif
> +
> +   do {
> +   void *tmp;
> +
> +   tmp = realloc(*buf, *bufsz + blocksize);
> +   if (tmp == NULL) {
> +   free(*buf);
> +   *buf = NULL;
> +   *bufsz = 0;
> +   break;
> +   }
> +   *buf = tmp;
> +
> +#ifdef RTE_HAS_LIBARCHIVE

See above

> +   err = archive_read_data(a, RTE_PTR_ADD(*buf, *bufsz), 
> blocksize);
> +#else
> +   err = read(fd, RTE_PTR_ADD(*buf, *bufsz), blocksize);
> +#endif
> +   if (err < 0) {
> +   free(*buf);
> +   *buf = NULL;
> +   *bufsz = 0;
> +   break;
> +   }
> +   *bufsz += err;
> +
> +   } while (err != 0);
> +
> +   if (*buf != NULL)
> +   ret = 0;
> +out:
> +#ifdef RTE_HAS_LIBARCHIVE

See above

> +   if (a != NULL)
> +   archive_read_free(a);
> +#else
> +   if (fd >= 0)
> +   close(fd);
> +#endif
> +   return ret;
> +}
> +
> +int
> +rte_firmware_read(const char *name, void **buf, size_t *bufsz)
> +{
> +   char path[PATH_MAX];
> +   int ret;
> +
> +   ret = firmware_read(name, buf, bufsz);
> +   if (ret < 0) {
> +   snprintf(path, sizeof(path), "%s.xz", name);
> +   path[PATH_MAX - 1] = '\0';
> +#ifndef RTE_HAS_LIBARCHIVE

See above

> +   if (access(path, F_OK) == 0) {
> +   RTE_LOG(WARNING, EAL, "libarchive not available, %s 
> cannot be decompressed\n",
> +   path);
> +   }
> +#else
> +   ret = firmware_read(path, buf, bufsz);
> +#endif
>

Re: [dpdk-dev] [PATCH v1] examples/power: add baseline mode to PMD power

[Burakov, Anatoly]

On 31-May-21 12:30 PM, David Hunt wrote:

The PMD Power Management scheme currently has 3 modes,
scale, monitor and pause. However, it would be nice to
have a baseline mode for easy comparison of power savings
with and without these modes.

This patch adds a 'baseline' mode were the pmd power
management is not enabled. Use --pmg-mgmt=baseline.

Signed-off-by: David Hunt 
---
  examples/l3fwd-power/main.c | 10 --
  1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index f8dfed1634..34b0eaa401 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -1617,7 +1617,7 @@ print_usage(const char *prgname)
" empty polls, full polls, and core busyness to telemetry\n"
" --interrupt-only: enable interrupt-only mode\n"
" --pmd-mgmt MODE: enable PMD power management mode. "
-   "Currently supported modes: monitor, pause, scale\n",
+   "Currently supported modes: baseline, monitor, pause, scale\n",
prgname);
  }
  
@@ -1714,6 +1714,7 @@ parse_pmd_mgmt_config(const char *name)

  #define PMD_MGMT_MONITOR "monitor"
  #define PMD_MGMT_PAUSE   "pause"
  #define PMD_MGMT_SCALE   "scale"
+#define PMD_MGMT_BASELINE  "baseline"
  
  	if (strncmp(PMD_MGMT_MONITOR, name, sizeof(PMD_MGMT_MONITOR)) == 0) {

pmgmt_type = RTE_POWER_MGMT_TYPE_MONITOR;
@@ -1729,6 +1730,10 @@ parse_pmd_mgmt_config(const char *name)
pmgmt_type = RTE_POWER_MGMT_TYPE_SCALE;
return 0;
}
+   if (strncmp(PMD_MGMT_BASELINE, name, sizeof(PMD_MGMT_BASELINE)) == 0) {
+   pmgmt_type = -1;
+   return 0;
+   }


I don't particularly like the enum abuse, type safety exists for a 
reason :) perhaps just add a bool that enables/disables this? you're 
effectively doing that anyway with pmgmt_type >= 0.



/* unknown PMD power management mode */
return -1;
  }
@@ -2767,7 +2772,8 @@ main(int argc, char **argv)
 "Fail to add ptype cb\n");
}
  
-			if (app_mode == APP_MODE_PMD_MGMT) {

+   if ((app_mode == APP_MODE_PMD_MGMT) &&
+   (pmgmt_type >= 0)) {
ret = rte_power_ethdev_pmgmt_queue_enable(
lcore_id, portid, queueid,
pmgmt_type);




--
Thanks,
Anatoly

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Eli Britstein]

On 6/2/2021 1:50 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/2/21 12:57 PM, Eli Britstein wrote:

On 6/1/2021 5:53 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 5:44 PM, Eli Britstein wrote:

On 6/1/2021 5:35 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 4:24 PM, Eli Britstein wrote:

On 6/1/2021 3:10 PM, Ilya Maximets wrote:

External email: Use caution opening links or attachments


On 6/1/21 1:14 PM, Ivan Malov wrote:

By its very name, action PORT_ID means that packets hit an ethdev
with the
given DPDK port ID. At least the current comments don't state the
opposite.
That said, since port representors had been adopted, applications
like OvS
have been misusing the action. They misread its purpose as sending
packets
to the opposite end of the "wire" plugged to the given ethdev, for
example,
redirecting packets to the VF itself rather than to its representor
ethdev.
Another example: OvS relies on this action with the admin PF's
ethdev
port
ID specified in it in order to send offloaded packets to the
physical
port.

Since there might be applications which use this action in its valid
sense,
one can't just change the documentation to greenlight the opposite
meaning.
This patch adds an explicit bit to the action configuration which
will let
applications, depending on their needs, leverage the two meanings
properly.
Applications like OvS, as well as PMDs, will have to be corrected
when the
patch has been applied. But the improved clarity of the action is
worth it.

The proposed change is not the only option. One could avoid changes
in OvS
and PMDs if the new configuration field had the opposite meaning,
with the
action itself meaning delivery to the represented port and not to
DPDK one.
Alternatively, one could define a brand new action with the said
behaviour.

It doesn't make any sense to attach the VF itself to OVS, but only its
representor.

OvS is not the only DPDK application.

True. It is just the focus of this commit message is OVS.

For the PF, when in switchdev mode, it is the "uplink representor", so
it is also a representor.

Strictly speaking it is not a representor from DPDK point of
view. E.g. representors have corresponding flag set which is
definitely clear in the case of PF.

This is the per-PMD responsibility. The API should not care.

That said, OVS does not care of the type of the port. It doesn't
matter
if it's an "upstream" or not, or if it's a representor or not.

Yes, it is clear, but let's put OvS aside. Let's consider a
DPDK application which has a number of ethdev port. Some may
belong to single switch domain, some may be from different
switch domains (i.e. different NICs). Can I use PORT_ID action
to redirect ingress traffic to a specified ethdev port using
PORT_ID action? It looks like no, but IMHO it is the definition
of the PORT_ID action.

Let's separate API from implementation. By API point of view, yes, the
user may request it. Nothing wrong with it.

  From implementation point of view - yes, it might fail, but not for
sure, even if on different NICs. Maybe the HW of a certain vendor has
the capability to do it?

We can't know, so I think the API should allow it.

Hold on. What should it allow? It is two opposite meanings:
   1. Direct traffic to DPDK ethdev port specified using ID to be
  received and processed by the DPDK application.
   2. Direct traffic to an upstream port represented by the
  DPDK port.

The patch tries to address the ambiguity, misuse it in OvS
(from my point of view in accordance with the action
documentation), mis-implementation in a number of PMDs
(to work in OvS) and tries to sort it out with an explanation
why proposed direction is chosen. I realize that it could be
painful, but IMHO it is the best option here. Yes, it is a
point to discuss.

To start with we should agree that that problem exists.
Second, we should agree on direction how to solve it.

I agree. Suppose port 0 is the PF, and port 1 is a VF representor.

IIUC, there are two options:

1. flow create 1 ingress transfer pattern eth / end action port_id id 0
upstream 1 / end

2. flow create 1 ingress transfer pattern eth / end action port_id id 0
upstream 0 / end

[1] is the same behavior as today.

[2] is a new behavior, the packet received by port 0 as if it arrived
from the wire.

Then, let's have more:

3. flow create 0 ingress transfer pattern eth / end action port_id id 1
upstream 1 / end

4. flow create 0 ingress transfer pattern eth / end action port_id id 1
upstream 0 / end

if we have [2] and [4], the packet going from the VF will hit [2], then
hit [4] and then [2] again in an endless loop?

As I understand PORT_ID is a fate action. So, no more lookups
are done. If the packet is loop back from applications, loop is
possible.


I referred a HW loop, not SW. For example with JUMP action (also fate):

flow create 0 grou

Re: [dpdk-dev] [EXT] [PATCH 0/2] Support compressed firmwares

[Igor Russkikh]

On 6/2/2021 1:05 PM, David Marchand wrote:
> On Wed, Jun 2, 2021 at 12:38 PM Igor Russkikh  wrote:
>> We (Marvell QED) already provide packed version of FW in linux-firmware:

>>
>> But thats a custom name, and zlib.
> 
> Whatever binary blob is available in linux-firmware upstream repo, it
> ends up compressed on Fedora 34 (and later).
> 
> Did you try the qede pmd on fc34?

Got it, thanks.
No, have not tried, but think qede pmd will fail now on fedora without your 
patch.

> The linux kernel (since v5.2, I think) uncompresses this transparently
> without kernel drivers knowing.

Was not aware of that, thanks.
In that perspective your patch fits good with the existing linux kernel 
behavior, agree.

Adding more people from my team.

Regards,
  Igor

Re: [dpdk-dev] [EXT] [PATCH 2/2] eal: handle compressed firmwares

[Igor Russkikh]

> Introduce an internal firmware loading helper to remove code duplication
> in our drivers and handle xz compressed firmwares by calling libarchive.
> 
> This helper tries to look for .xz suffixes so that drivers are not aware
> the firmwares have been compressed.
> 
> libarchive is set as an optional dependency: without libarchive, a
> runtime warning is emitted so that users know there is a compressed
> firmware.
> 
> Windows implementation is left as an empty stub.
> 
> Signed-off-by: David Marchand 

for QEDE,

Reviewed-by: Igor Russkikh 

Devendra, please give it a try when possible.

Regards,
  Igor

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Andrew Rybchenko]

On 6/2/21 2:21 PM, Eli Britstein wrote:
> 
> On 6/2/2021 1:50 PM, Andrew Rybchenko wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 6/2/21 12:57 PM, Eli Britstein wrote:
>>> On 6/1/2021 5:53 PM, Andrew Rybchenko wrote:
 External email: Use caution opening links or attachments


 On 6/1/21 5:44 PM, Eli Britstein wrote:
> On 6/1/2021 5:35 PM, Andrew Rybchenko wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 6/1/21 4:24 PM, Eli Britstein wrote:
>>> On 6/1/2021 3:10 PM, Ilya Maximets wrote:
 External email: Use caution opening links or attachments


 On 6/1/21 1:14 PM, Ivan Malov wrote:
> By its very name, action PORT_ID means that packets hit an ethdev
> with the
> given DPDK port ID. At least the current comments don't state the
> opposite.
> That said, since port representors had been adopted, applications
> like OvS
> have been misusing the action. They misread its purpose as sending
> packets
> to the opposite end of the "wire" plugged to the given ethdev, for
> example,
> redirecting packets to the VF itself rather than to its
> representor
> ethdev.
> Another example: OvS relies on this action with the admin PF's
> ethdev
> port
> ID specified in it in order to send offloaded packets to the
> physical
> port.
>
> Since there might be applications which use this action in its
> valid
> sense,
> one can't just change the documentation to greenlight the opposite
> meaning.
> This patch adds an explicit bit to the action configuration which
> will let
> applications, depending on their needs, leverage the two meanings
> properly.
> Applications like OvS, as well as PMDs, will have to be corrected
> when the
> patch has been applied. But the improved clarity of the action is
> worth it.
>
> The proposed change is not the only option. One could avoid
> changes
> in OvS
> and PMDs if the new configuration field had the opposite meaning,
> with the
> action itself meaning delivery to the represented port and not to
> DPDK one.
> Alternatively, one could define a brand new action with the said
> behaviour.
>>> It doesn't make any sense to attach the VF itself to OVS, but
>>> only its
>>> representor.
>> OvS is not the only DPDK application.
> True. It is just the focus of this commit message is OVS.
>>> For the PF, when in switchdev mode, it is the "uplink
>>> representor", so
>>> it is also a representor.
>> Strictly speaking it is not a representor from DPDK point of
>> view. E.g. representors have corresponding flag set which is
>> definitely clear in the case of PF.
> This is the per-PMD responsibility. The API should not care.
>>> That said, OVS does not care of the type of the port. It doesn't
>>> matter
>>> if it's an "upstream" or not, or if it's a representor or not.
>> Yes, it is clear, but let's put OvS aside. Let's consider a
>> DPDK application which has a number of ethdev port. Some may
>> belong to single switch domain, some may be from different
>> switch domains (i.e. different NICs). Can I use PORT_ID action
>> to redirect ingress traffic to a specified ethdev port using
>> PORT_ID action? It looks like no, but IMHO it is the definition
>> of the PORT_ID action.
> Let's separate API from implementation. By API point of view, yes, the
> user may request it. Nothing wrong with it.
>
>   From implementation point of view - yes, it might fail, but not for
> sure, even if on different NICs. Maybe the HW of a certain vendor has
> the capability to do it?
>
> We can't know, so I think the API should allow it.
 Hold on. What should it allow? It is two opposite meanings:
    1. Direct traffic to DPDK ethdev port specified using ID to be
   received and processed by the DPDK application.
    2. Direct traffic to an upstream port represented by the
   DPDK port.

 The patch tries to address the ambiguity, misuse it in OvS
 (from my point of view in accordance with the action
 documentation), mis-implementation in a number of PMDs
 (to work in OvS) and tries to sort it out with an explanation
 why proposed direction is chosen. I realize that it could be
 painful, but IMHO it is the best option here. Yes, it is a
 point to discuss.

 To start with we should agree that that problem exists.
 Second, we should agree on direction how to solve it.
>>> I agree. Suppose port 0 is the PF, and port 1 is a VF representor.
>>>
>>> IIUC, there are two options:
>>>

[dpdk-dev] [PATCH v2] doc: add deprecation notice for PIE active queue management changes

[Liguzinski, WojciechX]

Add deprecation note for making changes related to implementation of
PIE based active queue management support to DPDK scheduler library.
These changes are aligned as suggested in the RFC[1].

https://mails.dpdk.org/archives/dev/2021-May/210067.html

Signed-off-by: Liguzinski, WojciechX 
---
 doc/guides/rel_notes/deprecation.rst | 8 
 1 file changed, 8 insertions(+)

diff --git a/doc/guides/rel_notes/deprecation.rst 
b/doc/guides/rel_notes/deprecation.rst
index 9584d6bfd7..113b5b55c1 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -141,6 +141,14 @@ Deprecation Notices
   in "rte_sched.h". These changes are aligned to improvements suggested in the
   RFC https://mails.dpdk.org/archives/dev/2018-November/120035.html.
 
+* sched: To add PIE based active queue management support to DPDK scheduler
+  library, changes will be made to data structures
+  ``rte_sched_subport_params``, ``rte_sched_subport_stats``,
+  ``rte_sched_queue_stats``, ``rte_sched_queue_extra``, ``rte_sched_subport``.
+  New structures are introduced for PIE ``rte_pie_params``, ``rte_pie_config``,
+  ``rte_pie``. These changes are aligned to improvements suggested in the RFC
+  https://mails.dpdk.org/archives/dev/2021-May/210067.html.
+
 * metrics: The function ``rte_metrics_init`` will have a non-void return
   in order to notify errors instead of calling ``rte_exit``.
 
-- 
2.17.1

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Thomas Monjalon]

01/06/2021 14:10, Ilya Maximets:
> On 6/1/21 1:14 PM, Ivan Malov wrote:
> > By its very name, action PORT_ID means that packets hit an ethdev with the
> > given DPDK port ID. At least the current comments don't state the opposite.
> > That said, since port representors had been adopted, applications like OvS
> > have been misusing the action. They misread its purpose as sending packets
> > to the opposite end of the "wire" plugged to the given ethdev, for example,
> > redirecting packets to the VF itself rather than to its representor ethdev.
> > Another example: OvS relies on this action with the admin PF's ethdev port
> > ID specified in it in order to send offloaded packets to the physical port.
> > 
> > Since there might be applications which use this action in its valid sense,
> > one can't just change the documentation to greenlight the opposite meaning.
> > This patch adds an explicit bit to the action configuration which will let
> > applications, depending on their needs, leverage the two meanings properly.
> > Applications like OvS, as well as PMDs, will have to be corrected when the
> > patch has been applied. But the improved clarity of the action is worth it.
> > 
> > The proposed change is not the only option. One could avoid changes in OvS
> > and PMDs if the new configuration field had the opposite meaning, with the
> > action itself meaning delivery to the represented port and not to DPDK one.
> > Alternatively, one could define a brand new action with the said behaviour.
> 
> We had already very similar discussions regarding the understanding of what
> the representor really is from the DPDK API's point of view, and the last
> time, IIUC, it was concluded by a tech. board that representor should be
> a "ghost of a VF", i.e. DPDK APIs should apply configuration by default to
> VF and not to the representor device:
>   
> https://patches.dpdk.org/project/dpdk/cover/20191029185051.32203-1-tho...@monjalon.net/#104376
> This wasn't enforced though, IIUC, for existing code and semantics is still 
> mixed.

Quoting myself from above link:
"the representor port must be a real DPDK port, not a ghost."
and
"During the Technical Board yesterday, it was decided to go with Intel
understanding of what is a representor, i.e. a ghost of the VF."
and
"we will continue to mix VF and representor operations
with the same port ID. For the record, I believe it is very bad."

> I still think that configuration should be applied to VF, and the same applies
> to rte_flow API.  IMHO, average application should not care if device is
> a VF itself or its representor.  Everything should work exactly the same.

What means "work exactly the same"?
Is it considering what is behind the representor silently,
or considering the representor as a real port?

There is a need to really consider representor port as any other port,
and stop this ugly mix. I want to propose such change again for DPDK 21.11.
To me the real solution is to use a bit in the port id of a representor
for explicitly identifying the port behind the representor.
This bit could be translated as a flag or a sign in testpmd text grammar.

> I think this matches with the original idea/design of the switchdev 
> functionality
> in the linux kernel and also matches with how the average user thinks about
> representor devices.

There is no "average" user or application, just right and wrong.
In the switchdev model, a representor is a port of a switch like
any other port, not a ghost of its peer.

> If some specific use-case requires to distinguish VF from the representor,
> there should probably be a separate special API/flag for that.

Yes, port ID of a representor must be the representor itself,
and a bit can help reaching the port behind the representor.

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Ivan Malov]

On 02/06/2021 14:21, Eli Britstein wrote:


On 6/2/2021 1:50 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/2/21 12:57 PM, Eli Britstein wrote:

On 6/1/2021 5:53 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 5:44 PM, Eli Britstein wrote:

On 6/1/2021 5:35 PM, Andrew Rybchenko wrote:

External email: Use caution opening links or attachments


On 6/1/21 4:24 PM, Eli Britstein wrote:

On 6/1/2021 3:10 PM, Ilya Maximets wrote:

External email: Use caution opening links or attachments


On 6/1/21 1:14 PM, Ivan Malov wrote:

By its very name, action PORT_ID means that packets hit an ethdev
with the
given DPDK port ID. At least the current comments don't state the
opposite.
That said, since port representors had been adopted, applications
like OvS
have been misusing the action. They misread its purpose as sending
packets
to the opposite end of the "wire" plugged to the given ethdev, for
example,
redirecting packets to the VF itself rather than to its 
representor

ethdev.
Another example: OvS relies on this action with the admin PF's
ethdev
port
ID specified in it in order to send offloaded packets to the
physical
port.

Since there might be applications which use this action in its 
valid

sense,
one can't just change the documentation to greenlight the opposite
meaning.
This patch adds an explicit bit to the action configuration which
will let
applications, depending on their needs, leverage the two meanings
properly.
Applications like OvS, as well as PMDs, will have to be corrected
when the
patch has been applied. But the improved clarity of the action is
worth it.

The proposed change is not the only option. One could avoid 
changes

in OvS
and PMDs if the new configuration field had the opposite meaning,
with the
action itself meaning delivery to the represented port and not to
DPDK one.
Alternatively, one could define a brand new action with the said
behaviour.
It doesn't make any sense to attach the VF itself to OVS, but 
only its

representor.

OvS is not the only DPDK application.

True. It is just the focus of this commit message is OVS.
For the PF, when in switchdev mode, it is the "uplink 
representor", so

it is also a representor.

Strictly speaking it is not a representor from DPDK point of
view. E.g. representors have corresponding flag set which is
definitely clear in the case of PF.

This is the per-PMD responsibility. The API should not care.

That said, OVS does not care of the type of the port. It doesn't
matter
if it's an "upstream" or not, or if it's a representor or not.

Yes, it is clear, but let's put OvS aside. Let's consider a
DPDK application which has a number of ethdev port. Some may
belong to single switch domain, some may be from different
switch domains (i.e. different NICs). Can I use PORT_ID action
to redirect ingress traffic to a specified ethdev port using
PORT_ID action? It looks like no, but IMHO it is the definition
of the PORT_ID action.

Let's separate API from implementation. By API point of view, yes, the
user may request it. Nothing wrong with it.

  From implementation point of view - yes, it might fail, but not for
sure, even if on different NICs. Maybe the HW of a certain vendor has
the capability to do it?

We can't know, so I think the API should allow it.

Hold on. What should it allow? It is two opposite meanings:
   1. Direct traffic to DPDK ethdev port specified using ID to be
  received and processed by the DPDK application.
   2. Direct traffic to an upstream port represented by the
  DPDK port.

The patch tries to address the ambiguity, misuse it in OvS
(from my point of view in accordance with the action
documentation), mis-implementation in a number of PMDs
(to work in OvS) and tries to sort it out with an explanation
why proposed direction is chosen. I realize that it could be
painful, but IMHO it is the best option here. Yes, it is a
point to discuss.

To start with we should agree that that problem exists.
Second, we should agree on direction how to solve it.

I agree. Suppose port 0 is the PF, and port 1 is a VF representor.

IIUC, there are two options:

1. flow create 1 ingress transfer pattern eth / end action port_id id 0
upstream 1 / end

2. flow create 1 ingress transfer pattern eth / end action port_id id 0
upstream 0 / end

[1] is the same behavior as today.

[2] is a new behavior, the packet received by port 0 as if it arrived
from the wire.

Then, let's have more:

3. flow create 0 ingress transfer pattern eth / end action port_id id 1
upstream 1 / end

4. flow create 0 ingress transfer pattern eth / end action port_id id 1
upstream 0 / end

if we have [2] and [4], the packet going from the VF will hit [2], then
hit [4] and then [2] again in an endless loop?

As I understand PORT_ID is a fate action. So, no more lookups
are done. If the packet is loop back from applications, loop is
possible.


I referred a HW loop, not SW. For example

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Ilya Maximets]

On 6/1/21 4:28 PM, Ivan Malov wrote:
> Hi Ilya,
> 
> Thank you for reviewing the proposal at such short notice. I'm afraid that 
> prior discussions overlook the simple fact that the whole problem is not 
> limited to just VF representors. Action PORT_ID is also used with respect to 
> the admin PF's ethdev, which "represents itself" (and by no means it 
> represents the underlying physical/network port). In this case, one cannot 
> state that the application treats it as a physical port, just like one states 
> that the application perceives representors as VFs themselves.


I don't think that it was overlooked.  If device is in a switchdev mode than
there is a PF representor and VF representors.  Application typically works
only with representors in this case is it doesn't make much sense to have
representor and the upstream port attached to the same application at the
same time.  Configuration that is applied by application to the representor
(PF or VF, it doesn't matter) applies to the corresponding upstream port
(actual PF or VF) by default.

Exactly same thing here with PORT_ID action.  You have a packet and action
to send it to the port, but it's not specified if HW needs to send it to
the representor or the upstream port (again, VF or PF, it doesn't matter).
Since there is no extra information, HW should send it to the upstream
port by default.  The same as configuration applies by default to the
upstream port.

Let's look at some workflow examples:

  DPDK Application
| |
| |
   +--PF-rep--VF-rep---+
   |   |
   |NIC (switchdev)|
   |   |
   +---PF-VF---+
   |  |
   |  |
   External   VM or whatever
   Network

a. Workflow for "DPDK Application" to set MAC to VF:

1. "DPDK Application" calls rte_set_etheraddr("VF-rep", new_mac);
2.  DPDK sets MAC for "VF".

b. Workflow for "DPDK Application" to set MAC to PF:

1. "DPDK Application" calls rte_set_etheraddr("PF-rep", new_mac);
2.  DPDK sets MAC for "PF".

c. Workflow for "DPDK Application" to send packet to the external network:

1. "DPDK Application" calls rte_eth_tx_burst("PF-rep", packet);
2. NIC receives the packet from "PF-rep" and sends it to "PF".
3. packet egresses to the external network from "PF".

d. Workflow for "DPDK Application" to send packet to the "VM or whatever":

1. "DPDK Application" calls rte_eth_tx_burst("VF-rep", packet);
2. NIC receives the packet from "VF-rep" and sends it to "VF".
3. "VM or whatever" receives the packet from "VF".

In two workflows above there is no rte_flow processing on step 2, i.e.,
NIC does not perform any lookups/matches/actions, because it's not possible
to configure actions for packets received from "PF-rep" or
"VF-rep" as these ports doesn't own a port id and all the configuration
and rte_flow actions translated and applied for the devices that these
ports represents ("PF" and "VF") and not representors themselves ("PF-rep"
or "VF-rep").

e. Workflow for the packet received on PF and PORT_ID action:

1. "DPDK Application" configures rte_flow for all packets from "PF-rep"
   to execute PORT_ID "VF-rep".
2. NIC receives packet on "PF".
3. NIC executes 'PORT_ID "VF-rep"' action by sending packet to "VF".
4. "VM or whatever" receives the packet from "VF".

f. Workflow for the packet received on VF and PORT_ID action:

1. "DPDK Application" configures rte_flow for all packets from "VF-rep"
   to execute 'PORT_ID "PF-rep"'.
2. NIC receives packet on "VF".
3. NIC executes 'PORT_ID "PF-rep"' action by sending packet to "PF".
4. Packet egresses from the "PF" to the external network.

Above is what, IMHO, the logic should look like and this matches with
the overall switchdev design in kernel.

I understand that this logic could seem flipped-over from the HW point
of view, but it's perfectly logical from the user's perspective, because
user should not care if the application works with representors or
some real devices.  If application configures that all packets from port
A should be sent to port B, user will expect that these packets will
egress from port B once received from port A.  That will be highly
inconvenient if the packet will ingress from port B back to the
application instead.

  DPDK Application
|  |
|  |
 port A port B
|  |
  *MAGIC*
|  |
   External  Another Network
   Network   or VM or whatever

It should not matter if there is an extra layer between ports A and B
and the external network and VM.  Everything should work in exactly the
same way, transparently for the application.

The point of hardware offloading, and therefore rte_flow API, is to take
what user does in software and make this "magically" work in hardware in
the exactly same way.  And this will be broken if user will have to
use different logic based on the mode the hardware works in, i.e. based on
the fact

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Ilya Maximets]

On 6/2/21 2:16 PM, Thomas Monjalon wrote:
> 01/06/2021 14:10, Ilya Maximets:
>> On 6/1/21 1:14 PM, Ivan Malov wrote:
>>> By its very name, action PORT_ID means that packets hit an ethdev with the
>>> given DPDK port ID. At least the current comments don't state the opposite.
>>> That said, since port representors had been adopted, applications like OvS
>>> have been misusing the action. They misread its purpose as sending packets
>>> to the opposite end of the "wire" plugged to the given ethdev, for example,
>>> redirecting packets to the VF itself rather than to its representor ethdev.
>>> Another example: OvS relies on this action with the admin PF's ethdev port
>>> ID specified in it in order to send offloaded packets to the physical port.
>>>
>>> Since there might be applications which use this action in its valid sense,
>>> one can't just change the documentation to greenlight the opposite meaning.
>>> This patch adds an explicit bit to the action configuration which will let
>>> applications, depending on their needs, leverage the two meanings properly.
>>> Applications like OvS, as well as PMDs, will have to be corrected when the
>>> patch has been applied. But the improved clarity of the action is worth it.
>>>
>>> The proposed change is not the only option. One could avoid changes in OvS
>>> and PMDs if the new configuration field had the opposite meaning, with the
>>> action itself meaning delivery to the represented port and not to DPDK one.
>>> Alternatively, one could define a brand new action with the said behaviour.
>>
>> We had already very similar discussions regarding the understanding of what
>> the representor really is from the DPDK API's point of view, and the last
>> time, IIUC, it was concluded by a tech. board that representor should be
>> a "ghost of a VF", i.e. DPDK APIs should apply configuration by default to
>> VF and not to the representor device:
>>   
>> https://patches.dpdk.org/project/dpdk/cover/20191029185051.32203-1-tho...@monjalon.net/#104376
>> This wasn't enforced though, IIUC, for existing code and semantics is still 
>> mixed.
> 
> Quoting myself from above link:
> "the representor port must be a real DPDK port, not a ghost."
> and
> "During the Technical Board yesterday, it was decided to go with Intel
> understanding of what is a representor, i.e. a ghost of the VF."
> and
> "we will continue to mix VF and representor operations
> with the same port ID. For the record, I believe it is very bad."
> 
>> I still think that configuration should be applied to VF, and the same 
>> applies
>> to rte_flow API.  IMHO, average application should not care if device is
>> a VF itself or its representor.  Everything should work exactly the same.
> 
> What means "work exactly the same"?
> Is it considering what is behind the representor silently,
> or considering the representor as a real port?

Check ut my other email where I described some workflows and how, I think,
they should work.  Hopefully that will answer this question.  (This email
arrived while I was writing another one, so I had no chance to read this
question).

> 
> There is a need to really consider representor port as any other port,
> and stop this ugly mix. I want to propose such change again for DPDK 21.11.
> To me the real solution is to use a bit in the port id of a representor
> for explicitly identifying the port behind the representor.
> This bit could be translated as a flag or a sign in testpmd text grammar.

This makes sense.

> 
>> I think this matches with the original idea/design of the switchdev 
>> functionality
>> in the linux kernel and also matches with how the average user thinks about
>> representor devices.
> 
> There is no "average" user or application, just right and wrong.
> In the switchdev model, a representor is a port of a switch like
> any other port, not a ghost of its peer.
> 
>> If some specific use-case requires to distinguish VF from the representor,
>> there should probably be a separate special API/flag for that.
> 
> Yes, port ID of a representor must be the representor itself,
> and a bit can help reaching the port behind the representor.

I still think that the logic should be opposite, i.e. special bit should
be set to identify that we want to reach the representor and not the
port behind it.  But we discussed this already several times and I also
wrote some of the thoughts in the other email that I just sent.

Best regards, Ilya Maximets.

Re: [dpdk-dev] [PATCH v1 2/7] net/af_xdp: add power monitor support

[Loftus, Ciara]

> Subject: [PATCH v1 2/7] net/af_xdp: add power monitor support
> 
> Implement support for .get_monitor_addr in AF_XDP driver.
> 
> Signed-off-by: Anatoly Burakov 

Thanks Anatoly. LGTM.

Acked-by: Ciara Loftus 

> ---
>  drivers/net/af_xdp/rte_eth_af_xdp.c | 25 +
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/net/af_xdp/rte_eth_af_xdp.c
> b/drivers/net/af_xdp/rte_eth_af_xdp.c
> index eb5660a3dc..dfbf74ea53 100644
> --- a/drivers/net/af_xdp/rte_eth_af_xdp.c
> +++ b/drivers/net/af_xdp/rte_eth_af_xdp.c
> @@ -37,6 +37,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
> 
>  #include "compat.h"
> 
> @@ -788,6 +789,29 @@ eth_dev_configure(struct rte_eth_dev *dev)
>   return 0;
>  }
> 
> +static int
> +eth_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond
> *pmc)
> +{
> + struct pkt_rx_queue *rxq = rx_queue;
> + unsigned int *prod = rxq->rx.producer;
> + const uint32_t cur_val = rxq->rx.cached_prod; /* use cached value */
> +
> + /* watch for changes in producer ring */
> + pmc->addr = (void*)prod;
> +
> + /* store current value */
> + pmc->val = cur_val;
> + pmc->mask = (uint32_t)~0; /* mask entire uint32_t value */
> +
> + /* AF_XDP producer ring index is 32-bit */
> + pmc->size = sizeof(uint32_t);
> +
> + /* this requires an inverted check */
> + pmc->invert = 1;
> +
> + return 0;
> +}
> +
>  static int
>  eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
>  {
> @@ -1448,6 +1472,7 @@ static const struct eth_dev_ops ops = {
>   .link_update = eth_link_update,
>   .stats_get = eth_stats_get,
>   .stats_reset = eth_stats_reset,
> + .get_monitor_addr = eth_get_monitor_addr
>  };
> 
>  /** parse busy_budget argument */
> --
> 2.25.1

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Andrew Rybchenko]

On 6/2/21 3:16 PM, Thomas Monjalon wrote:
> 01/06/2021 14:10, Ilya Maximets:
>> On 6/1/21 1:14 PM, Ivan Malov wrote:
>>> By its very name, action PORT_ID means that packets hit an ethdev with the
>>> given DPDK port ID. At least the current comments don't state the opposite.
>>> That said, since port representors had been adopted, applications like OvS
>>> have been misusing the action. They misread its purpose as sending packets
>>> to the opposite end of the "wire" plugged to the given ethdev, for example,
>>> redirecting packets to the VF itself rather than to its representor ethdev.
>>> Another example: OvS relies on this action with the admin PF's ethdev port
>>> ID specified in it in order to send offloaded packets to the physical port.
>>>
>>> Since there might be applications which use this action in its valid sense,
>>> one can't just change the documentation to greenlight the opposite meaning.
>>> This patch adds an explicit bit to the action configuration which will let
>>> applications, depending on their needs, leverage the two meanings properly.
>>> Applications like OvS, as well as PMDs, will have to be corrected when the
>>> patch has been applied. But the improved clarity of the action is worth it.
>>>
>>> The proposed change is not the only option. One could avoid changes in OvS
>>> and PMDs if the new configuration field had the opposite meaning, with the
>>> action itself meaning delivery to the represented port and not to DPDK one.
>>> Alternatively, one could define a brand new action with the said behaviour.
>>
>> We had already very similar discussions regarding the understanding of what
>> the representor really is from the DPDK API's point of view, and the last
>> time, IIUC, it was concluded by a tech. board that representor should be
>> a "ghost of a VF", i.e. DPDK APIs should apply configuration by default to
>> VF and not to the representor device:
>>   
>> https://patches.dpdk.org/project/dpdk/cover/20191029185051.32203-1-tho...@monjalon.net/#104376
>> This wasn't enforced though, IIUC, for existing code and semantics is still 
>> mixed.
> 
> Quoting myself from above link:
> "the representor port must be a real DPDK port, not a ghost."

That days I had no opinion on the topic. Now I tend to agree
with it, but I'm not sure that I understand all implications.
I'm afraid it is more complex:
 - it is a real DPDK port since application can send
   traffic to it, and receive traffic from it
 - however, in our case, it is basically just a direct pipe:
- packets sent to representor bypass transfer and go
  directly to represented function (VF or PF)
- packets sent by represented function go to representor
  by default, but transfer rules (HW offload) may change it
   Of course, it is just a vendor implementation detail.
 - I doubt that all ethdev operation makes sense for
   representor itself, but some, for example stats, definitely
   makes sense (representor and represented entity stats could
   differ a lot because of HW offload). So, if operation does
   not make sense or simply not supported, it should return an
   error and that's it.

In fact, I see nothing bad in attaching both representor and
represented entity (VF, PF or sub-function) to the same DPDK
application, for example, for testing purposes. So, it should
behave consistently.

> and
> "During the Technical Board yesterday, it was decided to go with Intel
> understanding of what is a representor, i.e. a ghost of the VF."
> and
> "we will continue to mix VF and representor operations
> with the same port ID. For the record, I believe it is very bad."
> 
>> I still think that configuration should be applied to VF, and the same 
>> applies
>> to rte_flow API.  IMHO, average application should not care if device is
>> a VF itself or its representor.  Everything should work exactly the same.
> 
> What means "work exactly the same"?
> Is it considering what is behind the representor silently,
> or considering the representor as a real port?
> 
> There is a need to really consider representor port as any other port,
> and stop this ugly mix. I want to propose such change again for DPDK 21.11.
> To me the real solution is to use a bit in the port id of a representor
> for explicitly identifying the port behind the representor.
> This bit could be translated as a flag or a sign in testpmd text grammar.

+1, if so, it will allow to use it in PORT_ID action and item
without any changes in flow API. Just clarification in
documentation what it means for various cases.

However, I'd like to draw attention to network port <-> PF
ethdev port case. Strictly speaking it is not a representor
(as I tried to proove in other mail) and requires to be a
part of solution.

>> I think this matches with the original idea/design of the switchdev 
>> functionality
>> in the linux kernel and also matches with how the average user thinks about
>> representor devices.
> 
> There is no "average" user or application, just right and w

[dpdk-dev] [RFC] Support metering policy for yellow color in mlx5 PMD

[Bing Zhao]

The current API of metering can support different policies for different
colors, as described in the header file "rte_mtr.h".

/**
* Meter policy
*/
struct rte_mtr_meter_policy_params {
/**
* Policy action list per color.
* actions[i] potentially represents a chain of rte_flow actions
* terminated by the END action, exactly as specified by the 
rte_flow
* API for the flow definition, and not just a single action.
*/
const struct rte_flow_action *actions[RTE_COLORS];
};

In the real-life, when doing QoS or traffic shaping with metering, there is no
restriction of the packets handling for different colors. After the metering,
the packet will be marked with different colors and it is the application's
responsibility to decide the next step of handling packets with different
colors. The policies of different colors can be either the same or different.

In the current implementation of mlx5 PMD, when adding a meter policy, only
the actions list for GREEN was supported, like RSS, queue, mark, etc., but no
support for YELLOW. The support of policy actions of YELLOW color is added to
provide better flexibility.

  1. The actions to be supported are as same as those for GREEN, including
 terminating and non-terminating actions.
  2. The policies of GREEN and YELLOW colors are independent.
  3. When RSS is used for both GREEN and YELLOW in one policy parameter,
 except the queues list, all the other configurations of RSS should be
 the same, like level, hash fields, and so on.
  4. No change for the RED color is needed, and the default behavior should
 still be the "drop".

The testpmd command line example is like below:

add port meter profile srtcm_rfc2697 0 24 65536 1024 0 0
add port meter policy 0 1 g_actions rss queues 0 end types udp end / end 
y_actions rss queues 1 end types udp end / end r_actions drop / end
create port meter 0 1 24 1 yes 0x 1 0
...

The actions list configuration for different colors in testpmd CLI was
already supported. There is no major change needed for the testpmd CLI.

Signed-off-by: Bing Zhao 

Re: [dpdk-dev] [RFC PATCH] ethdev: add support for testpmd-compliant flow rule dumping

[Ori Kam]

Hi Ivan,

> -Original Message-
> From: Ivan Malov 
> 
> Hi Ori,
> 
> Your review efforts are much appreciated. I understand your concern
> about the partial item/action coverage, but there are some points to be
> considered when addressing it:
> - It's anyway hardly possible to use the printed flow directly in
> testpmd if it contains "opaque", or "PMD-specific", items/actions in
> terms of the tunnel offload model. These items/actions have to be
> omitted when printing the flow, and their absence in the resulting
> string means that copy/pasting the flow to testpmd isn't helpful in this
> particular case.
I fully agree with you that some of the rules can't be printed. That is why.
I'm not sure having partial solution is the way to go. If OVS for example cares 
about
some of the item/action, maybe this log should be on their part.

> - There's action ENCAP which also can't be fully represented by the tool
> in question, simply because it has no parameters. In tespmd, one first
> has to issue "set vxlan" command to configure the encap. header, whilst
> "vxlan" token in the flow rule string just refers to the previously set
> encap. parameters. The suggested flow print helper can't reliably print
> these two components ("set vxlan" and the flow rule itself) as they
> belong to different testpmd command strings.
> 
Again, I agree with you but like my above answer, do we want a partial solution 
in DPDK?

> As you might see, completeness of the solution wouldn't necessarily be
> reachable, even if full item/action coverage was provided.
> 
> As for the item/action coverage itself, it's rather controversial. On
> the one hand, yes, we should probably try to cover more items and
> actions in the suggested patch, to the extent allowed by our current
> priorities. But on the other hand, the existing coverage might not be
> that poor: it's fairly elaborate and at least allows to print the most
> common flow rules.
> 
That is my main issue you are going to push something that is good for you
and maybe some other cases, but it can't be used by all application, even with
the most basic commands like encap.

> Yes, macros and some other cunning ways to cover more flow specifics
> might come in handy, but, at the same time, can be rather error prone.
> Sometimes it's more robust to just write the code out in full.
> 
I'm always in favor of easy of extra complex but too hard is also not good.

Thanks,
Ori
> Thank you.
> 
> On 30/05/2021 10:27, Ori Kam wrote:
> > Hi Ivan,
> >
> > First nice idea and thanks for the picking up the ball.
> >
> > Before a detail review,
> > The main thing I'm concerned about is that this print will be partially
> supported,
> > I know that you covered this issue by printing unknown for unsupported
> item/actions,
> > but this will mean that it is enough that one item/action is not supported
> and already the
> > flow can't be used in testpmd.
> > To get full support it means that the developer needs to add such print
> with each new
> > item/action. I agree it is possible, but it has high overhead for each 
> > feature.
> >
> > Maybe we should somehow create a macros for the prints or other easier
> to support ways.
> >
> > For example, just printing the ipv4 has 7 function calls inside of it each 
> > one
> with error checking,
> > and I'm not counting the dedicated functions.
> >
> >
> >
> > Best,
> > Ori
> >
> >
> >> -Original Message-
> >> From: Ivan Malov 
> >> Sent: Thursday, May 27, 2021 11:25 AM
> >> To: dev@dpdk.org
> >> Cc: NBU-Contact-Thomas Monjalon ; Ferruh
> Yigit
> >> ; Andrew Rybchenko
> >> ; Ori Kam ; Ray
> >> Kinsella ; Neil Horman 
> >> Subject: [RFC PATCH] ethdev: add support for testpmd-compliant flow
> rule
> >> dumping
> >>
> >> DPDK applications (for example, OvS) or tests which use RTE flow API
> need to
> >> log created or rejected flow rules to help to recognise what goes right or
> >> wrong. From this standpoint, testpmd-compliant format is nice for the
> >> purpose because it allows to copy-paste the flow rules and debug using
> >> testpmd.
> >>
> >> Recognisable pattern items:
> >> VOID, VF, PF, PHY_PORT, PORT_ID, ETH, VLAN, IPV4, IPV6, UDP, TCP,
> VXLAN,
> >> NVGRE, GENEVE, MARK, PPPOES, PPPOED.
> >>
> >> Recognisable actions:
> >> VOID, JUMP, MARK, FLAG, QUEUE, DROP, COUNT, RSS, PF, VF,
> PHY_PORT,
> >> PORT_ID, OF_POP_VLAN, OF_PUSH_VLAN, OF_SET_VLAN_VID,
> >> OF_SET_VLAN_PCP, VXLAN_ENCAP, VXLAN_DECAP.
> >>
> >> Recognisable RSS types (action RSS):
> >> IPV4, FRAG_IPV4, NONFRAG_IPV4_TCP, NONFRAG_IPV4_UDP,
> >> NONFRAG_IPV4_OTHER, IPV6, FRAG_IPV6, NONFRAG_IPV6_TCP,
> >> NONFRAG_IPV6_UDP, NONFRAG_IPV6_OTHER, IPV6_EX, IPV6_TCP_EX,
> >> IPV6_UDP_EX, L3_SRC_ONLY, L3_DST_ONLY, L4_SRC_ONLY,
> L4_DST_ONLY.
> >>
> >> Unrecognised parts of the flow specification are represented by tokens
> >> "{unknown}" and "{unknown bits}". Interested parties are welcome to
> >> extend this tool to recognise more items and actions.
> >>
> >> Signed-off-by: Ivan Malov 
>

Re: [dpdk-dev] [RFC PATCH] ethdev: add support for testpmd-compliant flow rule dumping

[Andrew Rybchenko]

Hi Ori,

On 6/2/21 4:32 PM, Ori Kam wrote:
> Hi Ivan,
> 
>> -Original Message-
>> From: Ivan Malov 
>>
>> Hi Ori,
>>
>> Your review efforts are much appreciated. I understand your concern
>> about the partial item/action coverage, but there are some points to be
>> considered when addressing it:
>> - It's anyway hardly possible to use the printed flow directly in
>> testpmd if it contains "opaque", or "PMD-specific", items/actions in
>> terms of the tunnel offload model. These items/actions have to be
>> omitted when printing the flow, and their absence in the resulting
>> string means that copy/pasting the flow to testpmd isn't helpful in this
>> particular case.
> I fully agree with you that some of the rules can't be printed. That is why.
> I'm not sure having partial solution is the way to go.

Sorry, I disagree that possibility to cover 99% and
impossibility to cover just 1% is the reason to discard.

> If OVS for example cares about
> some of the item/action, maybe this log should be on their part.

OvS does and as far as I can see already has bugs there.
Of course, nobody says that it is testpmd-complient format,
but it definitely looks so.

Anyway, it sounds strange do duplicate the functionality in
many-many DPDK apps. Of course, it removes the headache
from DPDK maintainers, but it is hardly friendly to DPDK
community in general.

>> - There's action ENCAP which also can't be fully represented by the tool
>> in question, simply because it has no parameters. In tespmd, one first
>> has to issue "set vxlan" command to configure the encap. header, whilst
>> "vxlan" token in the flow rule string just refers to the previously set
>> encap. parameters. The suggested flow print helper can't reliably print
>> these two components ("set vxlan" and the flow rule itself) as they
>> belong to different testpmd command strings.
>>
> Again, I agree with you but like my above answer, do we want a partial 
> solution 
> in DPDK?

My answer is YES.

>> As you might see, completeness of the solution wouldn't necessarily be
>> reachable, even if full item/action coverage was provided.
>>
>> As for the item/action coverage itself, it's rather controversial. On
>> the one hand, yes, we should probably try to cover more items and
>> actions in the suggested patch, to the extent allowed by our current
>> priorities. But on the other hand, the existing coverage might not be
>> that poor: it's fairly elaborate and at least allows to print the most
>> common flow rules.
>>
> That is my main issue you are going to push something that is good for you
> and maybe some other cases, but it can't be used by all application, even with
> the most basic commands like encap.

Isn't it fair: if one wants to use something, be ready to help
and extend it. No pain, no gain :) Jokes aside - we're ready to
support "the most basic commands", just list it, but do not say
everything is basic. "everything" will delay the feature and
simply unfair to demand (IMHO).

IMHO, the feature would make flow API more friendly and easier
to debug, report bugs etc.

>> Yes, macros and some other cunning ways to cover more flow specifics
>> might come in handy, but, at the same time, can be rather error prone.
>> Sometimes it's more robust to just write the code out in full.
>>
> I'm always in favor of easy of extra complex but too hard is also not good.
> 
> Thanks,
> Ori
>> Thank you.
>>
>> On 30/05/2021 10:27, Ori Kam wrote:
>>> Hi Ivan,
>>>
>>> First nice idea and thanks for the picking up the ball.
>>>
>>> Before a detail review,
>>> The main thing I'm concerned about is that this print will be partially
>> supported,
>>> I know that you covered this issue by printing unknown for unsupported
>> item/actions,
>>> but this will mean that it is enough that one item/action is not supported
>> and already the
>>> flow can't be used in testpmd.
>>> To get full support it means that the developer needs to add such print
>> with each new
>>> item/action. I agree it is possible, but it has high overhead for each 
>>> feature.
>>>
>>> Maybe we should somehow create a macros for the prints or other easier
>> to support ways.
>>>
>>> For example, just printing the ipv4 has 7 function calls inside of it each 
>>> one
>> with error checking,
>>> and I'm not counting the dedicated functions.
>>>
>>>
>>>
>>> Best,
>>> Ori
>>>
>>>
 -Original Message-
 From: Ivan Malov 
 Sent: Thursday, May 27, 2021 11:25 AM
 To: dev@dpdk.org
 Cc: NBU-Contact-Thomas Monjalon ; Ferruh
>> Yigit
 ; Andrew Rybchenko
 ; Ori Kam ; Ray
 Kinsella ; Neil Horman 
 Subject: [RFC PATCH] ethdev: add support for testpmd-compliant flow
>> rule
 dumping

 DPDK applications (for example, OvS) or tests which use RTE flow API
>> need to
 log created or rejected flow rules to help to recognise what goes right or
 wrong. From this standpoint, testpmd-compliant format is nice for the
 purpose because it allows to copy-paste the fl

[dpdk-dev] DTS Workgroup: MoM 06/02/2021

[Honnappa Nagarahalli]

Attendees:
Aaron Conole
Daniel Martin Buckley
Honnappa Nagarahalli
Juraj Linkes
Lijuan Tu
Lincoln Lavoie

The meeting announcements are sent to dev@dpdk.org.

Minutes:
1) Juraj has completed creating the excel sheet identifying the test cases that 
modify the code [2].
2) The work item related discussions are captured in [1]

Action Items:
1) Capture the link to the excel sheet [2] that identifies the test cases 
modifying the DPDK code in the DTS doc - Honnappa
2) Take a look at Juraj's document [2] and discuss how to handle these items in 
the next meeting - All
3) Add 4 more weeks of meetings - Honnappa

[1] 
https://docs.google.com/document/d/1c5S0_mZzFvzZfYkqyORLT2-qNvUb-fBdjA6DGusy4yM/edit?usp=sharing
[2] 
https://docs.google.com/spreadsheets/d/1i7x4ecPiRXNKOrOy0the5WyGSWbdMxPLK7aWbuWI4ew/edit#gid=880561943

[dpdk-dev] [PATCH] kni: fix compilation on SLES15-SP3

[Christian Ehrhardt]

Like what was done for mainline kernel in commit 38ad54f3bc76 ("kni: fix
build with Linux 5.6"), a new parameter 'txqueue' has to be added to
'ndo_tx_timeout' ndo on SLES 15-SP3 kernel.

Caused by:
  commit c3bf155c40e9db722feb8a08c19efd44c12d5294
  Author: Thomas Bogendoerfer 
  Date:   Fri Sep 11 16:08:31 2020 +0200
  - netdev: pass the stuck queue to the timeout handler
(jsc#SLE-13536).
  - Refresh patches.suse/sfc-move-various-functions.patch.

That is part of the SLES 5.3.18 kernel and therefore the
version we check for.

Cc: sta...@dpdk.org

Signed-off-by: Christian Ehrhardt 
---
 kernel/linux/kni/compat.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/kernel/linux/kni/compat.h b/kernel/linux/kni/compat.h
index 5f65640d5ed..70e014fd1da 100644
--- a/kernel/linux/kni/compat.h
+++ b/kernel/linux/kni/compat.h
@@ -133,7 +133,9 @@
 
 #if KERNEL_VERSION(5, 6, 0) <= LINUX_VERSION_CODE || \
(defined(RHEL_RELEASE_CODE) && \
-RHEL_RELEASE_VERSION(8, 3) <= RHEL_RELEASE_CODE)
+RHEL_RELEASE_VERSION(8, 3) <= RHEL_RELEASE_CODE) || \
+   (defined(CONFIG_SUSE_KERNEL) && \
+KERNEL_VERSION(5, 3, 18) <= LINUX_VERSION_CODE)
 #define HAVE_TX_TIMEOUT_TXQUEUE
 #endif
 
-- 
2.31.1

[dpdk-dev] 19.11.9 patches review and test

[Christian Ehrhardt]

Hi all,

Here is a list of patches targeted for stable release 19.11.9.

The planned date for the final release is the 16th of June.

Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.

A release candidate tarball can be found at:

https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.9-rc1

These patches are located at branch 19.11 of dpdk-stable repo:
https://dpdk.org/browse/dpdk-stable/

Thanks.

Christian Ehrhardt 

---
Adam Dybkowski (2):
  common/qat: increase IM buffer size for GEN3
  compress/qat: enable compression on GEN3

Ajit Khaparde (3):
  net/bnxt: fix RSS context cleanup
  net/bnxt: fix mismatched type comparison in MAC restore
  net/bnxt: check PCI config read

Alvin Zhang (6):
  net/ice: fix VLAN filter with PF
  net/i40e: fix input set field mask
  net/e1000: fix Rx error counter for bad length
  net/e1000: fix max Rx packet size
  net/ice: fix fast mbuf freeing
  net/iavf: fix VF to PF command failure handling

Anatoly Burakov (3):
  fbarray: fix log message on truncation error
  power: do not skip saving original P-state governor
  power: save original ACPI governor always

Andrew Rybchenko (2):
  net/failsafe: fix RSS hash offload reporting
  net/failsafe: report minimum and maximum MTU

Apeksha Gupta (1):
  examples/l2fwd-crypto: skip masked devices

Arek Kusztal (1):
  crypto/qat: fix offset for out-of-place scatter-gather

Beilei Xing (1):
  net/i40evf: fix packet loss for X722

Bruce Richardson (1):
  build: exclude meson files from examples installation

Chaoyong He (1):
  doc: fix multiport syntax in nfp guide

Chenbo Xia (1):
  examples/vhost: check memory table query

Chengchang Tang (12):
  ethdev: validate input in module EEPROM dump
  ethdev: validate input in register info
  ethdev: validate input in EEPROM info
  net/hns3: fix rollback after setting PVID failure
  examples: add eal cleanup to examples
  net/bonding: fix adding itself as its slave
  app/testpmd: fix max queue number for Tx offloads
  net/tap: fix interrupt vector array size
  net/bonding: fix socket ID check
  net/tap: check ioctl on restore
  net/hns3: fix HW buffer size on MTU update
  net/hns3: fix processing Tx offload flags

Chengwen Feng (24):
  net/hns3: fix flow counter value
  net/hns3: fix VF mailbox head field
  net/hns3: support get device version when dump register
  test: check thread creation
  common/dpaax: fix possible null pointer access
  examples/ethtool: remove unused parsing
  net/e1000/base: fix timeout for shadow RAM write
  mbuf: check shared memory before dumping dynamic space
  eventdev: remove redundant thread name setting
  eventdev: fix memory leakage on thread creation failure
  net/kni: check init result
  net/hns3: fix mailbox error message
  net/hns3: remove unused mailbox macro and struct
  net/bonding: fix leak on remove
  net/i40e: fix negative VEB index
  net/i40e: remove redundant VSI check in Tx queue setup
  net/hns3: log time delta in decimal format
  net/hns3: remove unused macros
  net/hns3: remove unused VMDq code
  raw/ntb: check SPAD user index
  raw/ntb: check memory allocations
  ipc: check malloc sync reply result
  eal: fix service core list parsing
  net/hns3: fix handling link update

Christian Ehrhardt (2):
  vfio: fix stdbool usage without include
  kni: fix compilation on SLES15-SP3

Ciara Loftus (1):
  net/af_xdp: fix error handling during Rx queue setup

Conor Walsh (1):
  examples/l3fwd: fix LPM IPv6 subnets

Dapeng Yu (2):
  net/e1000: remove MTU setting limitation
  examples/packet_ordering: fix port configuration

David Christensen (1):
  config/ppc: reduce number of cores and NUMA nodes

David Harton (1):
  net/ena: fix releasing Tx ring mbufs

David Marchand (2):
  doc: fix sphinx rtd theme import in GHA
  service: clean references to removed symbol

Dmitry Kozlyuk (1):
  net/pcap: fix format string

Ed Czeck (2):
  net/ark: update packet director initial state
  net/ark: refactor Rx buffer recovery

Feifei Wang (1):
  net/i40e: fix parsing packet type for NEON

Ferruh Yigit (3):
  power: remove duplicated symbols from map file
  log/linux: make default output stderr
  license: fix typos

Guoyang Zhou (1):
  net/hinic: fix crash in secondary process

Haiyue Wang (1):
  net/ixgbe: fix Rx errors statistics for UDP checksum

Harman Kalra (1):
  event/octeontx2: fix device reconfigure for single slot

Hemant Agrawal (2):
  ethdev: add missing buses in device iterator
  crypto/dpaa2_sec: fix close and uninit functions

Hongbo Zheng (4):
  app/testpmd: fix Tx/Rx descript

Re: [dpdk-dev] [PATCH 2/2] eal: handle compressed firmwares

[David Marchand]

On Wed, Jun 2, 2021 at 1:13 PM Jerin Jacob  wrote:
> > +static int
> > +firmware_read(const char *name, void **buf, size_t *bufsz)
> > +{
> > +   const size_t blocksize = 4096;
> > +   int ret = -1;
> > +   int err;
> > +#ifdef RTE_HAS_LIBARCHIVE
>
>
> I think, better to have small inline functions for libarchive variant
> vs normal file accessors
> in the group for open, access, read etc to avoid the ifdef clutter and
> manage with one ifdef.

That may be a bit artificial, since there is no reuse of such helpers for now.
I'll have a try and see how it looks.


> > +int
> > +rte_firmware_read(const char *name, void **buf, size_t *bufsz)
> > +{
> > +   char path[PATH_MAX];
> > +   int ret;
> > +
> > +   ret = firmware_read(name, buf, bufsz);
> > +   if (ret < 0) {
> > +   snprintf(path, sizeof(path), "%s.xz", name);
> > +   path[PATH_MAX - 1] = '\0';
> > +#ifndef RTE_HAS_LIBARCHIVE
>
> See above

There is nothing to abstract here.

If you don't have libarchive, returning the .xz content to a driver is wrong.
I prefer to leave this block as is.



>
> > +   if (access(path, F_OK) == 0) {
> > +   RTE_LOG(WARNING, EAL, "libarchive not available, %s 
> > cannot be decompressed\n",
> > +   path);
> > +   }
> > +#else
> > +   ret = firmware_read(path, buf, bufsz);
> > +#endif
> >
>

-- 
David Marchand

Re: [dpdk-dev] [PATCH v7 10/10] Enable the new EAL thread API

[Tal Shnaiderman]

> Subject: [PATCH v7 10/10] Enable the new EAL thread API
> 
> External email: Use caution opening links or attachments
> 
> 
> From: Narcisa Vasile 
> 
> Rename pthread_* occurrences with the new rte_thread_* API.
> Enable the new API in the build system.
> ---

Hi Naty,

I wanted to run some basic tests on your series but I cannot apply this patch.

Same issue in CI 
(http://mails.dpdk.org/archives/test-report/2021-June/197522.html)

Can you send a rebased version?

Thanks,

Tal.

[dpdk-dev] [PATCH 00/11] Add CPT in Marvell CNXK common driver

[Anoob Joseph]

This patchset adds initial support for CPT in common code for Marvell CN10K SoC.

CPT is the hardware cryptographic block available in 'cnxk' family SoC. CPT,
with its microcoded engines can support symmetric, asymmetric and IPsec
operations. CPT can associate with NIX (rte_ethdev) to enable inline IPsec
functionality. Similarly, CPT can associate with SSO (rte_eventdev) to
enable crypto adapter.

Based on CNXK common driver, new crypto PMDs would be added under 'crypto/cnxk'.

Aakash Sasidharan (2):
  common/cnxk: add CPT diagnostics
  common/cnxk: add CPT LF flush

Anoob Joseph (2):
  common/cnxk: add CPT dev config routines
  common/cnxk: add lmtline init

Archana Muniganti (1):
  common/cnxk: add CPT LF config

Kiran Kumar Kokkilagadda (3):
  common/cnxk: add SE microcode defines
  common/cnxk: add AE microcode defines
  common/cnxk: add fpm tables

Srujana Challa (1):
  common/cnxk: add IE microcode defines

Vidya Sagar Velumuri (2):
  common/cnxk: add CPT HW defines
  common/cnxk: add mbox to configure RXC

 drivers/common/cnxk/hw/cpt.h|  201 ++
 drivers/common/cnxk/meson.build |2 +
 drivers/common/cnxk/roc_ae.h|   56 ++
 drivers/common/cnxk/roc_ae_fpm_tables.c | 1140 +++
 drivers/common/cnxk/roc_ae_fpm_tables.h |   13 +
 drivers/common/cnxk/roc_api.h   |   14 +
 drivers/common/cnxk/roc_cpt.c   |  782 +
 drivers/common/cnxk/roc_cpt.h   |   99 +++
 drivers/common/cnxk/roc_cpt_priv.h  |   28 +
 drivers/common/cnxk/roc_dev.c   |2 +
 drivers/common/cnxk/roc_dev_priv.h  |1 +
 drivers/common/cnxk/roc_ie.h|   19 +
 drivers/common/cnxk/roc_ie_on.h |   18 +
 drivers/common/cnxk/roc_ie_ot.h |  588 
 drivers/common/cnxk/roc_platform.c  |1 +
 drivers/common/cnxk/roc_platform.h  |3 +
 drivers/common/cnxk/roc_priv.h  |3 +
 drivers/common/cnxk/roc_se.h|  287 
 drivers/common/cnxk/version.map |   16 +
 19 files changed, 3273 insertions(+)
 create mode 100644 drivers/common/cnxk/hw/cpt.h
 create mode 100644 drivers/common/cnxk/roc_ae.h
 create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.c
 create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.h
 create mode 100644 drivers/common/cnxk/roc_cpt.c
 create mode 100644 drivers/common/cnxk/roc_cpt.h
 create mode 100644 drivers/common/cnxk/roc_cpt_priv.h
 create mode 100644 drivers/common/cnxk/roc_ie.h
 create mode 100644 drivers/common/cnxk/roc_ie_on.h
 create mode 100644 drivers/common/cnxk/roc_ie_ot.h
 create mode 100644 drivers/common/cnxk/roc_se.h

-- 
2.7.4

[dpdk-dev] [PATCH 01/11] common/cnxk: add CPT HW defines

[Anoob Joseph]

From: Vidya Sagar Velumuri 

Add CPT hardware definitions. CPT is the hardware block on
cnxk family of processors, that can be used to offload
cryptographic operations.

Signed-off-by: Anoob Joseph 
Signed-off-by: Vidya Sagar Velumuri 

---
 drivers/common/cnxk/hw/cpt.h  | 201 ++
 drivers/common/cnxk/roc_api.h |   6 ++
 2 files changed, 207 insertions(+)
 create mode 100644 drivers/common/cnxk/hw/cpt.h

diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
new file mode 100644
index 000..d6a935c
--- /dev/null
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -0,0 +1,201 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __CPT_HW_H__
+#define __CPT_HW_H__
+
+/* Register offsets */
+
+#define CPT_COMP_NOT_DONE (0x0ull)
+#define CPT_COMP_GOOD(0x1ull)
+#define CPT_COMP_FAULT   (0x2ull)
+#define CPT_COMP_SWERR   (0x3ull)
+#define CPT_COMP_HWERR   (0x4ull)
+#define CPT_COMP_INSTERR  (0x5ull)
+#define CPT_COMP_WARN(0x6ull) /* [CN10K, .) */
+
+#define CPT_LF_INT_VEC_MISC(0x0ull)
+#define CPT_LF_INT_VEC_DONE(0x1ull)
+#define CPT_LF_CTL (0x10ull)
+#define CPT_LF_DONE_WAIT   (0x30ull)
+#define CPT_LF_INPROG  (0x40ull)
+#define CPT_LF_DONE(0x50ull)
+#define CPT_LF_DONE_ACK(0x60ull)
+#define CPT_LF_DONE_INT_ENA_W1S (0x90ull)
+#define CPT_LF_DONE_INT_ENA_W1C (0xa0ull)
+#define CPT_LF_MISC_INT(0xb0ull)
+#define CPT_LF_MISC_INT_W1S(0xc0ull)
+#define CPT_LF_MISC_INT_ENA_W1S (0xd0ull)
+#define CPT_LF_MISC_INT_ENA_W1C (0xe0ull)
+#define CPT_LF_Q_BASE  (0xf0ull)
+#define CPT_LF_Q_SIZE  (0x100ull)
+#define CPT_LF_Q_INST_PTR  (0x110ull)
+#define CPT_LF_Q_GRP_PTR   (0x120ull)
+#define CPT_LF_NQX(a)  (0x400ull | (uint64_t)(a) << 3)
+#define CPT_LF_CTX_CTL (0x500ull)
+#define CPT_LF_CTX_FLUSH   (0x510ull)
+#define CPT_LF_CTX_ERR (0x520ull)
+#define CPT_LF_CTX_ENC_BYTE_CNT (0x530ull)
+#define CPT_LF_CTX_ENC_PKT_CNT (0x540ull)
+#define CPT_LF_CTX_DEC_BYTE_CNT (0x550ull)
+#define CPT_LF_CTX_DEC_PKT_CNT (0x560ull)
+
+#define CPT_AF_LFX_CTL(a)  (0x27000ull | (uint64_t)(a) << 3)
+#define CPT_AF_LFX_CTL2(a) (0x29000ull | (uint64_t)(a) << 3)
+
+/* Structures definitions */
+
+union cpt_lf_ctl {
+   uint64_t u;
+   struct cpt_lf_ctl_s {
+   uint64_t ena : 1;
+   uint64_t fc_ena : 1;
+   uint64_t fc_up_crossing : 1;
+   uint64_t reserved_3_3 : 1;
+   uint64_t fc_hyst_bits : 4;
+   uint64_t reserved_8_63 : 56;
+   } s;
+};
+
+union cpt_lf_ctx_flush {
+   uint64_t u;
+   struct {
+   uint64_t cptr : 46;
+   uint64_t inval : 1;
+   uint64_t res : 1;
+   uint64_t pf_func : 16;
+   } s;
+};
+
+union cpt_lf_inprog {
+   uint64_t u;
+   struct cpt_lf_inprog_s {
+   uint64_t inflight : 9;
+   uint64_t reserved_9_15 : 7;
+   uint64_t eena : 1;
+   uint64_t grp_drp : 1;
+   uint64_t reserved_18_30 : 13;
+   uint64_t grb_partial : 1;
+   uint64_t grb_cnt : 8;
+   uint64_t gwb_cnt : 8;
+   uint64_t reserved_48_63 : 16;
+   } s;
+};
+
+union cpt_lf_q_base {
+   uint64_t u;
+   struct cpt_lf_q_base_s {
+   uint64_t fault : 1;
+   uint64_t stopped : 1;
+   uint64_t reserved_2_6 : 5;
+   uint64_t addr : 46;
+   uint64_t reserved_53_63 : 11;
+   } s;
+};
+
+union cpt_lf_q_size {
+   uint64_t u;
+   struct cpt_lf_q_size_s {
+   uint64_t size_div40 : 15;
+   uint64_t reserved_15_63 : 49;
+   } s;
+};
+
+union cpt_lf_misc_int {
+   uint64_t u;
+   struct cpt_lf_misc_int_s {
+   uint64_t reserved_0_0 : 1;
+   uint64_t nqerr : 1;
+   uint64_t irde : 1;
+   uint64_t nwrp : 1;
+   uint64_t reserved_4_4 : 1;
+   uint64_t hwerr : 1;
+   uint64_t fault : 1;
+   uint64_t reserved_7_63 : 57;
+   } s;
+};
+
+union cpt_inst_w4 {
+   uint64_t u64;
+   struct {
+   uint64_t dlen : 16;
+   uint64_t param2 : 16;
+   uint64_t param1 : 16;
+   uint64_t opcode_major : 8;
+   uint64_t opcode_minor : 8;
+   } s;
+};
+
+union cpt_inst_w7 {
+   uint64_t u64;
+   struct {
+   uint64_t cptr : 60;
+   uint64_t ctx_val : 1;
+   uint64_t egrp : 3;
+   } s;
+};
+
+struct cpt_inst_s {
+   union cpt_inst_w0 {
+   struct {
+   uint64_t nixtxl : 3;
+   uint64_t doneint : 1;
+   uint64_t nixtx_addr : 60;
+   } s;
+   uint64_t u64;
+   } w0;
+
+   uint64_t res_addr;
+
+  

[dpdk-dev] [PATCH 02/11] common/cnxk: add CPT dev config routines

[Anoob Joseph]

Add routines to init, fini, configure & clear CPT device.

Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Vidya Sagar Velumuri 

---
 drivers/common/cnxk/meson.build|   1 +
 drivers/common/cnxk/roc_api.h  |   3 +
 drivers/common/cnxk/roc_cpt.c  | 273 +
 drivers/common/cnxk/roc_cpt.h  |  32 +
 drivers/common/cnxk/roc_cpt_priv.h |  28 
 drivers/common/cnxk/roc_dev.c  |   2 +
 drivers/common/cnxk/roc_dev_priv.h |   1 +
 drivers/common/cnxk/roc_platform.c |   1 +
 drivers/common/cnxk/roc_platform.h |   2 +
 drivers/common/cnxk/roc_priv.h |   3 +
 drivers/common/cnxk/version.map|   6 +
 11 files changed, 352 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_cpt.c
 create mode 100644 drivers/common/cnxk/roc_cpt.h
 create mode 100644 drivers/common/cnxk/roc_cpt_priv.h

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 178bce7..739e0e4 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -11,6 +11,7 @@ endif
 config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
 deps = ['eal', 'pci', 'bus_pci', 'mbuf']
 sources = files(
+'roc_cpt.c',
 'roc_dev.c',
 'roc_idev.c',
 'roc_irq.c',
diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
index 049854d..88a5611 100644
--- a/drivers/common/cnxk/roc_api.h
+++ b/drivers/common/cnxk/roc_api.h
@@ -106,4 +106,7 @@
 /* Idev */
 #include "roc_idev.h"
 
+/* CPT */
+#include "roc_cpt.h"
+
 #endif /* _ROC_API_H_ */
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
new file mode 100644
index 000..3c0683c
--- /dev/null
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -0,0 +1,273 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+static int
+cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp)
+{
+   struct mbox *mbox = dev->mbox;
+   int rc;
+
+   /* Get MSIX vector offsets */
+   mbox_alloc_msg_msix_offset(mbox);
+   rc = mbox_process_msg(mbox, (void *)msix_rsp);
+
+   return rc;
+}
+
+static int
+cpt_lfs_attach(struct dev *dev, int nb_lf)
+{
+   struct mbox *mbox;
+   struct rsrc_attach_req *req;
+
+   mbox = dev->mbox;
+   /* Attach CPT(lf) */
+   req = mbox_alloc_msg_attach_resources(mbox);
+   if (req == NULL)
+   return -ENOSPC;
+
+   req->cptlfs = nb_lf;
+
+   return mbox_process(mbox);
+}
+
+static int
+cpt_lfs_detach(struct dev *dev)
+{
+   struct mbox *mbox = dev->mbox;
+   struct rsrc_detach_req *req;
+
+   req = mbox_alloc_msg_detach_resources(mbox);
+   if (req == NULL)
+   return -ENOSPC;
+
+   req->cptlfs = 1;
+   req->partial = 1;
+
+   return mbox_process(mbox);
+}
+
+static int
+cpt_available_lfs_get(struct dev *dev, uint16_t *nb_lf)
+{
+   struct mbox *mbox = dev->mbox;
+   struct free_rsrcs_rsp *rsp;
+   int rc;
+
+   mbox_alloc_msg_free_rsrc_cnt(mbox);
+
+   rc = mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return -EIO;
+
+   *nb_lf = rsp->cpt;
+   return 0;
+}
+
+static int
+cpt_lfs_alloc(struct dev *dev, uint8_t eng_grpmsk)
+{
+   struct cpt_lf_alloc_req_msg *req;
+   struct mbox *mbox = dev->mbox;
+
+   req = mbox_alloc_msg_cpt_lf_alloc(mbox);
+   req->nix_pf_func = 0;
+   req->sso_pf_func = idev_sso_pffunc_get();
+   req->eng_grpmsk = eng_grpmsk;
+
+   return mbox_process(mbox);
+}
+
+static int
+cpt_lfs_free(struct dev *dev)
+{
+   mbox_alloc_msg_cpt_lf_free(dev->mbox);
+
+   return mbox_process(dev->mbox);
+}
+
+static int
+cpt_hardware_caps_get(struct dev *dev, union cpt_eng_caps *hw_caps)
+{
+   struct cpt_caps_rsp_msg *rsp;
+   int ret;
+
+   mbox_alloc_msg_cpt_caps_get(dev->mbox);
+
+   ret = mbox_process_msg(dev->mbox, (void *)&rsp);
+   if (ret)
+   return -EIO;
+
+   mbox_memcpy(hw_caps, rsp->eng_caps,
+   sizeof(union cpt_eng_caps) * CPT_MAX_ENG_TYPES);
+
+   return 0;
+}
+
+int
+roc_cpt_dev_configure(struct roc_cpt *roc_cpt, int nb_lf)
+{
+   struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+   struct msix_offset_rsp *rsp;
+   uint8_t eng_grpmsk;
+   int rc, i;
+
+   /* Request LF resources */
+   rc = cpt_lfs_attach(&cpt->dev, nb_lf);
+   if (rc)
+   return rc;
+
+   eng_grpmsk = (1 << roc_cpt->eng_grp[CPT_ENG_TYPE_AE]) |
+(1 << roc_cpt->eng_grp[CPT_ENG_TYPE_SE]) |
+(1 << roc_cpt->eng_grp[CPT_ENG_TYPE_IE]);
+
+   rc = cpt_lfs_alloc(&cpt->dev, eng_grpmsk);
+   if (rc)
+   goto lfs_detach;
+
+   rc = cpt_get_msix_offset(&cpt->dev, &rsp);
+   if (rc)
+   goto lfs_free;
+
+   for (i = 0; i < nb_lf; i++)
+   cpt->lf_msix_off[i] =
+   

[dpdk-dev] [PATCH 03/11] common/cnxk: add mbox to configure RXC

[Anoob Joseph]

From: Vidya Sagar Velumuri 

Add mailbox to configure tiemouts and thresholds in
CPT RXC unit.

Signed-off-by: Aakash Sasidharan 
Signed-off-by: Vidya Sagar Velumuri 

---
 drivers/common/cnxk/roc_cpt.c   | 27 +++
 drivers/common/cnxk/roc_cpt.h   | 10 ++
 drivers/common/cnxk/version.map |  1 +
 3 files changed, 38 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 3c0683c..11d8b9d 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -5,6 +5,33 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+int
+roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)
+{
+   struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+   struct cpt_rxc_time_cfg_req *req;
+   struct dev *dev = &cpt->dev;
+
+   req = mbox_alloc_msg_cpt_rxc_time_cfg(dev->mbox);
+   if (req == NULL)
+   return -ENOSPC;
+
+   req->blkaddr = 0;
+
+   /* The step value is in microseconds. */
+   req->step = cfg->step;
+
+   /* The timeout will be: limit * step microseconds */
+   req->zombie_limit = cfg->zombie_limit;
+   req->zombie_thres = cfg->zombie_thres;
+
+   /* The timeout will be: limit * step microseconds */
+   req->active_limit = cfg->active_limit;
+   req->active_thres = cfg->active_thres;
+
+   return mbox_process(dev->mbox);
+}
+
 static int
 cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp)
 {
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 2630955..5b84ec5 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -23,6 +23,16 @@ struct roc_cpt {
uint8_t reserved[ROC_CPT_MEM_SZ] __plt_cache_aligned;
 } __plt_cache_aligned;
 
+struct roc_cpt_rxc_time_cfg {
+   uint32_t step;
+   uint16_t active_limit;
+   uint16_t active_thres;
+   uint16_t zombie_limit;
+   uint16_t zombie_thres;
+};
+
+int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt,
+  struct roc_cpt_rxc_time_cfg *cfg);
 int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_dev_fini(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt,
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index f8e286e..1dbeebe 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -16,6 +16,7 @@ INTERNAL {
roc_cpt_dev_fini;
roc_cpt_dev_init;
roc_cpt_eng_grp_add;
+   roc_cpt_rxc_time_cfg;
roc_error_msg_get;
roc_idev_lmt_base_addr_get;
roc_idev_npa_maxpools_get;
-- 
2.7.4

[dpdk-dev] [PATCH 04/11] common/cnxk: add CPT LF config

[Anoob Joseph]

From: Archana Muniganti 

Add routines to init & fini CPT LFs. CPT LFs are
queues to the hardware enabling instruction submissions.

Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Vidya Sagar Velumuri 

---
 drivers/common/cnxk/roc_cpt.c   | 262 
 drivers/common/cnxk/roc_cpt.h   |  20 +++
 drivers/common/cnxk/version.map |   3 +
 3 files changed, 285 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 11d8b9d..0ee3c02 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -5,6 +5,119 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+#define CPT_IQ_FC_LEN  128
+#define CPT_IQ_GRP_LEN 16
+
+#define CPT_IQ_NB_DESC_MULTIPLIER 40
+
+/* The effective queue size to software is (CPT_LF_Q_SIZE[SIZE_DIV40] - 1 - 8).
+ *
+ * CPT requires 320 free entries (+8). And 40 entries are required for
+ * allowing CPT to discard packet when the queues are full (+1).
+ */
+#define CPT_IQ_NB_DESC_SIZE_DIV40(nb_desc) 
\
+   (PLT_DIV_CEIL(nb_desc, CPT_IQ_NB_DESC_MULTIPLIER) + 1 + 8)
+
+#define CPT_IQ_GRP_SIZE(nb_desc)   
\
+   (CPT_IQ_NB_DESC_SIZE_DIV40(nb_desc) * CPT_IQ_GRP_LEN)
+
+#define CPT_LF_MAX_NB_DESC 128000
+#define CPT_LF_DEFAULT_NB_DESC 1024
+
+static void
+cpt_lf_misc_intr_enb_dis(struct roc_cpt_lf *lf, bool enb)
+{
+   /* Enable all cpt lf error irqs except RQ_DISABLED and CQ_DISABLED */
+   if (enb)
+   plt_write64((BIT_ULL(6) | BIT_ULL(5) | BIT_ULL(3) | BIT_ULL(2) |
+BIT_ULL(1)),
+   lf->rbase + CPT_LF_MISC_INT_ENA_W1S);
+   else
+   plt_write64((BIT_ULL(6) | BIT_ULL(5) | BIT_ULL(3) | BIT_ULL(2) |
+BIT_ULL(1)),
+   lf->rbase + CPT_LF_MISC_INT_ENA_W1C);
+}
+
+static void
+cpt_lf_misc_irq(void *param)
+{
+   struct roc_cpt_lf *lf = (struct roc_cpt_lf *)param;
+   struct dev *dev = lf->dev;
+   uint64_t intr;
+
+   intr = plt_read64(lf->rbase + CPT_LF_MISC_INT);
+   if (intr == 0)
+   return;
+
+   plt_err("Err_irq=0x%" PRIx64 " pf=%d, vf=%d", intr, dev->pf, dev->vf);
+
+   /* Clear interrupt */
+   plt_write64(intr, lf->rbase + CPT_LF_MISC_INT);
+}
+
+static int
+cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)
+{
+   struct plt_pci_device *pci_dev = lf->roc_cpt->pci_dev;
+   struct plt_intr_handle *handle;
+   int rc, vec;
+
+   handle = &pci_dev->intr_handle;
+
+   vec = lf->msixoff + CPT_LF_INT_VEC_MISC;
+   /* Clear err interrupt */
+   cpt_lf_misc_intr_enb_dis(lf, false);
+   /* Set used interrupt vectors */
+   rc = dev_irq_register(handle, cpt_lf_misc_irq, lf, vec);
+   /* Enable all dev interrupt except for RQ_DISABLED */
+   cpt_lf_misc_intr_enb_dis(lf, true);
+
+   return rc;
+}
+
+static void
+cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf)
+{
+   struct plt_pci_device *pci_dev = lf->roc_cpt->pci_dev;
+   struct plt_intr_handle *handle;
+   int vec;
+
+   handle = &pci_dev->intr_handle;
+
+   vec = lf->msixoff + CPT_LF_INT_VEC_MISC;
+   /* Clear err interrupt */
+   cpt_lf_misc_intr_enb_dis(lf, false);
+   dev_irq_unregister(handle, cpt_lf_misc_irq, lf, vec);
+}
+
+static int
+cpt_lf_register_irqs(struct roc_cpt_lf *lf)
+{
+   int rc;
+
+   if (lf->msixoff == MSIX_VECTOR_INVALID) {
+   plt_err("Invalid CPTLF MSIX vector offset vector: 0x%x",
+   lf->msixoff);
+   return -EINVAL;
+   }
+
+   /* Register lf err interrupt */
+   rc = cpt_lf_register_misc_irq(lf);
+   if (rc)
+   plt_err("Error registering IRQs");
+
+   /* TODO */
+   /* rc = cpt_lf_register_done_irq(cpt); */
+
+   return rc;
+}
+
+static void
+cpt_lf_unregister_irqs(struct roc_cpt_lf *lf)
+{
+   cpt_lf_unregister_misc_irq(lf);
+}
+
 int
 roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)
 {
@@ -135,6 +248,69 @@ cpt_hardware_caps_get(struct dev *dev, union cpt_eng_caps 
*hw_caps)
return 0;
 }
 
+static uint32_t
+cpt_lf_iq_mem_calc(uint32_t nb_desc)
+{
+   uint32_t len;
+
+   /* Space for instruction group memory */
+   len = CPT_IQ_GRP_SIZE(nb_desc);
+
+   /* Align to 128B */
+   len = PLT_ALIGN(len, ROC_ALIGN);
+
+   /* Space for FC */
+   len += CPT_IQ_FC_LEN;
+
+   /* For instruction queues */
+   len += CPT_IQ_NB_DESC_SIZE_DIV40(nb_desc) * CPT_IQ_NB_DESC_MULTIPLIER *
+  sizeof(struct cpt_inst_s);
+
+   return len;
+}
+
+static inline void
+cpt_iq_init(struct roc_cpt_lf *lf)
+{
+   union cpt_lf_q_size lf_q_size = {.u = 0x0};
+   union cpt_lf_q_base lf_q_base = {.u = 0x0};
+   union cpt_lf_inprog lf_inprog;
+   union cpt_lf_ctl lf_ctl;
+   uintptr_t a

[dpdk-dev] [PATCH 05/11] common/cnxk: add CPT diagnostics

[Anoob Joseph]

From: Aakash Sasidharan 

Add routines to fetch and dump CPT statistics and states.

Signed-off-by: Aakash Sasidharan 
Signed-off-by: Srujana Challa 

---
 drivers/common/cnxk/roc_cpt.c   | 182 
 drivers/common/cnxk/roc_cpt.h   |   2 +
 drivers/common/cnxk/version.map |   2 +
 3 files changed, 186 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 0ee3c02..a23e4bb 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -118,6 +118,34 @@ cpt_lf_unregister_irqs(struct roc_cpt_lf *lf)
cpt_lf_unregister_misc_irq(lf);
 }
 
+static void
+cpt_lf_dump(struct roc_cpt_lf *lf)
+{
+   plt_cpt_dbg("CPT LF");
+   plt_cpt_dbg("RBASE: 0x%016lx", lf->rbase);
+   plt_cpt_dbg("LMT_BASE: 0x%016lx", lf->lmt_base);
+   plt_cpt_dbg("MSIXOFF: 0x%x", lf->msixoff);
+   plt_cpt_dbg("LF_ID: 0x%x", lf->lf_id);
+   plt_cpt_dbg("NB DESC: %d", lf->nb_desc);
+   plt_cpt_dbg("FC_ADDR: 0x%016lx", (uintptr_t)lf->fc_addr);
+   plt_cpt_dbg("CQ.VADDR: 0x%016lx", (uintptr_t)lf->iq_vaddr);
+
+   plt_cpt_dbg("CPT LF REG:");
+   plt_cpt_dbg("LF_CTL[0x%016llx]: 0x%016lx", CPT_LF_CTL,
+   plt_read64(lf->rbase + CPT_LF_CTL));
+   plt_cpt_dbg("Q_SIZE[0x%016llx]: 0x%016lx", CPT_LF_INPROG,
+   plt_read64(lf->rbase + CPT_LF_INPROG));
+
+   plt_cpt_dbg("Q_BASE[0x%016llx]: 0x%016lx", CPT_LF_Q_BASE,
+   plt_read64(lf->rbase + CPT_LF_Q_BASE));
+   plt_cpt_dbg("Q_SIZE[0x%016llx]: 0x%016lx", CPT_LF_Q_SIZE,
+   plt_read64(lf->rbase + CPT_LF_Q_SIZE));
+   plt_cpt_dbg("Q_INST_PTR[0x%016llx]: 0x%016lx", CPT_LF_Q_INST_PTR,
+   plt_read64(lf->rbase + CPT_LF_Q_INST_PTR));
+   plt_cpt_dbg("Q_GRP_PTR[0x%016llx]: 0x%016lx", CPT_LF_Q_GRP_PTR,
+   plt_read64(lf->rbase + CPT_LF_Q_GRP_PTR));
+}
+
 int
 roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)
 {
@@ -387,6 +415,8 @@ roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf 
*lf)
 
lf->pf_func = cpt->dev.pf_func;
 
+   cpt_lf_dump(lf);
+
return 0;
 
 lf_destroy:
@@ -530,6 +560,158 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum 
cpt_eng_type eng_type)
return rsp->eng_grp_num;
 }
 
+static int
+cpt_af_reg_read(struct roc_cpt *roc_cpt, uint64_t reg, uint64_t *val)
+{
+   struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+   struct cpt_rd_wr_reg_msg *msg;
+   struct dev *dev = &cpt->dev;
+   int ret;
+
+   msg = mbox_alloc_msg_cpt_rd_wr_register(dev->mbox);
+   if (msg == NULL)
+   return -EIO;
+
+   msg->hdr.pcifunc = dev->pf_func;
+
+   msg->is_write = 0;
+   msg->reg_offset = reg;
+   msg->ret_val = val;
+
+   ret = mbox_process_msg(dev->mbox, (void *)&msg);
+   if (ret)
+   return -EIO;
+
+   *val = msg->val;
+
+   return 0;
+}
+
+static int
+cpt_sts_print(struct roc_cpt *roc_cpt)
+{
+   struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+   struct dev *dev = &cpt->dev;
+   struct cpt_sts_req *req;
+   struct cpt_sts_rsp *rsp;
+   int ret;
+
+   req = mbox_alloc_msg_cpt_sts_get(dev->mbox);
+   if (req == NULL)
+   return -EIO;
+
+   req->blkaddr = 0;
+   ret = mbox_process_msg(dev->mbox, (void *)&rsp);
+   if (ret)
+   return -EIO;
+
+   plt_print("%s:\t0x%016lx", "inst_req_pc", rsp->inst_req_pc);
+   plt_print("%s:\t0x%016lx", "inst_lat_pc", rsp->inst_lat_pc);
+   plt_print("%s:\t\t0x%016lx", "rd_req_pc", rsp->rd_req_pc);
+   plt_print("%s:\t\t0x%016lx", "rd_lat_pc", rsp->rd_lat_pc);
+   plt_print("%s:\t\t0x%016lx", "rd_uc_pc", rsp->rd_uc_pc);
+   plt_print("%s:\t0x%016lx", "active_cycles_pc",
+ rsp->active_cycles_pc);
+   plt_print("%s:\t\t0x%016lx", "ctx_mis_pc", rsp->ctx_mis_pc);
+   plt_print("%s:\t\t0x%016lx", "ctx_hit_pc", rsp->ctx_hit_pc);
+   plt_print("%s:\t\t0x%016lx", "ctx_aop_pc", rsp->ctx_aop_pc);
+   plt_print("%s:\t0x%016lx", "ctx_aop_lat_pc", rsp->ctx_aop_lat_pc);
+   plt_print("%s:\t0x%016lx", "ctx_ifetch_pc", rsp->ctx_ifetch_pc);
+   plt_print("%s:\t0x%016lx", "ctx_ifetch_lat_pc",
+ rsp->ctx_ifetch_lat_pc);
+   plt_print("%s:\t0x%016lx", "ctx_ffetch_pc", rsp->ctx_ffetch_pc);
+   plt_print("%s:\t0x%016lx", "ctx_ffetch_lat_pc",
+ rsp->ctx_ffetch_lat_pc);
+   plt_print("%s:\t0x%016lx", "ctx_wback_pc", rsp->ctx_wback_pc);
+   plt_print("%s:\t0x%016lx", "ctx_wback_lat_pc",
+ rsp->ctx_wback_lat_pc);
+   plt_print("%s:\t\t0x%016lx", "ctx_psh_pc", rsp->ctx_psh_pc);
+   plt_print("%s:\t0x%016lx", "ctx_psh_lat_pc", rsp->ctx_psh_lat_pc);
+   plt_print("%s:\t\t0x%016lx", "ctx_err", rsp->ctx_err);
+   plt_print("%s:\t\t0x%

[dpdk-dev] [PATCH 06/11] common/cnxk: add CPT LF flush

[Anoob Joseph]

From: Aakash Sasidharan 

Add routine to flush context from CPT context processor cache.

Signed-off-by: Aakash Sasidharan 
Signed-off-by: Vidya Sagar Velumuri 

---
 drivers/common/cnxk/roc_cpt.c   | 18 ++
 drivers/common/cnxk/roc_cpt.h   |  1 +
 drivers/common/cnxk/version.map |  1 +
 3 files changed, 20 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index a23e4bb..d95b94c 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -477,6 +477,24 @@ roc_cpt_dev_init(struct roc_cpt *roc_cpt)
return rc;
 }
 
+int
+roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, uint64_t cptr)
+{
+   union cpt_lf_ctx_flush reg;
+
+   if (lf == NULL)
+   return -ENOTSUP;
+
+   reg.u = 0;
+   reg.s.pf_func = lf->pf_func;
+   reg.s.inval = 1;
+   reg.s.cptr = cptr;
+
+   plt_write64(reg.u, lf->rbase + CPT_LF_CTX_FLUSH);
+
+   return 0;
+}
+
 void
 roc_cpt_lf_fini(struct roc_cpt_lf *lf)
 {
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 692fa79..2b43a5a 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -58,6 +58,7 @@ int __roc_api roc_cpt_dev_configure(struct roc_cpt *roc_cpt, 
int nb_lf);
 void __roc_api roc_cpt_dev_clear(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf);
 void __roc_api roc_cpt_lf_fini(struct roc_cpt_lf *lf);
+int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, uint64_t cptr);
 int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
 void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 4f28f64..ad559a4 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -18,6 +18,7 @@ INTERNAL {
roc_cpt_dev_init;
roc_cpt_eng_grp_add;
roc_cpt_iq_disable;
+   roc_cpt_lf_ctx_flush;
roc_cpt_lf_init;
roc_cpt_lf_fini;
roc_cpt_lfs_print;
-- 
2.7.4

[dpdk-dev] [PATCH 07/11] common/cnxk: add SE microcode defines

[Anoob Joseph]

From: Kiran Kumar Kokkilagadda 

Microcode SE opcodes support symmetric operations. Add defines
and structs defined by microcode.

Signed-off-by: Anoob Joseph 
Signed-off-by: Kiran Kumar Kokkilagadda 
Signed-off-by: Vidya Sagar Velumuri 
---
 drivers/common/cnxk/roc_api.h |   3 +
 drivers/common/cnxk/roc_se.h  | 287 ++
 2 files changed, 290 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_se.h

diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
index 88a5611..6511614 100644
--- a/drivers/common/cnxk/roc_api.h
+++ b/drivers/common/cnxk/roc_api.h
@@ -109,4 +109,7 @@
 /* CPT */
 #include "roc_cpt.h"
 
+/* CPT microcode */
+#include "roc_se.h"
+
 #endif /* _ROC_API_H_ */
diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h
new file mode 100644
index 000..165468a
--- /dev/null
+++ b/drivers/common/cnxk/roc_se.h
@@ -0,0 +1,287 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_SE_H__
+#define __ROC_SE_H__
+
+/* SE opcodes */
+#define ROC_SE_MAJOR_OP_FC   0x33
+#define ROC_SE_FC_MINOR_OP_ENCRYPT0x0
+#define ROC_SE_FC_MINOR_OP_DECRYPT0x1
+#define ROC_SE_FC_MINOR_OP_HMAC_FIRST 0x10
+
+#define ROC_SE_MAJOR_OP_HASH  0x34
+#define ROC_SE_MAJOR_OP_HMAC  0x35
+#define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
+#define ROC_SE_MAJOR_OP_KASUMI0x38
+#define ROC_SE_MAJOR_OP_MISC  0x01
+
+#define ROC_SE_MAX_AAD_SIZE 64
+#define ROC_SE_MAX_MAC_LEN  64
+
+#define ROC_SE_OFF_CTRL_LEN 8
+#define ROC_SE_DMA_MODE(1 << 7)
+
+#define ROC_SE_MAX_SG_IN_OUT_CNT 32
+#define ROC_SE_MAX_SG_CNT   (ROC_SE_MAX_SG_IN_OUT_CNT / 2)
+
+#define ROC_SE_SG_LIST_HDR_SIZE (8u)
+#define ROC_SE_SG_ENTRY_SIZE   sizeof(struct roc_se_sglist_comp)
+
+#define ROC_SE_ZS_EA 0x1
+#define ROC_SE_ZS_IA 0x2
+#define ROC_SE_K_F8  0x4
+#define ROC_SE_K_F9  0x8
+
+#define ROC_SE_FC_GEN   0x1
+#define ROC_SE_PDCP 0x2
+#define ROC_SE_KASUMI   0x3
+#define ROC_SE_HASH_HMAC 0x4
+
+#define ROC_SE_OP_CIPHER_ENCRYPT 0x1
+#define ROC_SE_OP_CIPHER_DECRYPT 0x2
+#define ROC_SE_OP_CIPHER_MASK  
\
+   (ROC_SE_OP_CIPHER_ENCRYPT | ROC_SE_OP_CIPHER_DECRYPT)
+
+#define ROC_SE_OP_AUTH_VERIFY  0x4
+#define ROC_SE_OP_AUTH_GENERATE 0x8
+#define ROC_SE_OP_AUTH_MASK
\
+   (ROC_SE_OP_AUTH_VERIFY | ROC_SE_OP_AUTH_GENERATE)
+
+#define ROC_SE_OP_ENCODE (ROC_SE_OP_CIPHER_ENCRYPT | ROC_SE_OP_AUTH_GENERATE)
+#define ROC_SE_OP_DECODE (ROC_SE_OP_CIPHER_DECRYPT | ROC_SE_OP_AUTH_VERIFY)
+
+#define ROC_SE_ALWAYS_USE_SEPARATE_BUF
+
+/*
+ * Parameters for Flexi Crypto
+ * requests
+ */
+#define ROC_SE_VALID_AAD_BUF  0x01
+#define ROC_SE_VALID_MAC_BUF  0x02
+#define ROC_SE_VALID_IV_BUF   0x04
+#define ROC_SE_SINGLE_BUF_INPLACE  0x08
+#define ROC_SE_SINGLE_BUF_HEADROOM 0x10
+
+#define ROC_SE_ENCR_IV_OFFSET(__d_offs) (((__d_offs) >> 32) & 0x)
+#define ROC_SE_ENCR_OFFSET(__d_offs)   (((__d_offs) >> 16) & 0x)
+#define ROC_SE_AUTH_OFFSET(__d_offs)   ((__d_offs) & 0x)
+#define ROC_SE_ENCR_DLEN(__d_lens) ((__d_lens) >> 32)
+#define ROC_SE_AUTH_DLEN(__d_lens) ((__d_lens) & 0x)
+
+/* Salt length for AES-CTR/GCM/CCM and AES-GMAC */
+#define ROC_SALT_LEN 4
+
+/* Key lengths */
+#define ROC_DES3_KEY_LEN   24
+#define ROC_AES128_KEY_LEN 16
+#define ROC_AES192_KEY_LEN 24
+#define ROC_AES256_KEY_LEN 32
+
+#define ROC_AH_HDR_LEN 12
+
+#define ROC_MD5_KEY_LENGTH16
+#define ROC_SHA1_KEY_LENGTH   20
+#define ROC_SHA256_KEY_LENGTH 32
+#define ROC_SHA384_KEY_LENGTH 48
+#define ROC_SHA512_KEY_LENGTH 64
+
+#define ROC_DES_BLOCK_LENGTH 8
+#define ROC_AES_BLOCK_LENGTH 16
+
+typedef enum { ROC_SE_FROM_CTX = 0, ROC_SE_FROM_DPTR = 1 } roc_se_input_type;
+
+typedef enum {
+   ROC_SE_MD5_TYPE = 1,
+   ROC_SE_SHA1_TYPE = 2,
+   ROC_SE_SHA2_SHA224 = 3,
+   ROC_SE_SHA2_SHA256 = 4,
+   ROC_SE_SHA2_SHA384 = 5,
+   ROC_SE_SHA2_SHA512 = 6,
+   ROC_SE_GMAC_TYPE = 7,
+   ROC_SE_POLY1305 = 8,
+   ROC_SE_SHA3_SHA224 = 10,
+   ROC_SE_SHA3_SHA256 = 11,
+   ROC_SE_SHA3_SHA384 = 12,
+   ROC_SE_SHA3_SHA512 = 13,
+   ROC_SE_SHA3_SHAKE256 = 14,
+   ROC_SE_SHA3_SHAKE512 = 15,
+
+   /* These are only for software use */
+   ROC_SE_ZUC_EIA3 = 0x90,
+   ROC_SE_SNOW3G_UIA2 = 0x91,
+   ROC_SE_AES_CMAC_EIA2 = 0x92,
+   ROC_SE_KASUMI_F9_CBC = 0x93,
+   ROC_SE_KASUMI_F9_ECB = 0x94,
+} roc_se_auth_type;
+
+typedef enum {
+   /* To support passthrough */
+   ROC_SE_PASSTHROUGH = 0x0,
+   /*
+* These are defined by MC for Flexi crypto
+* for field of 4 bits
+*/
+   ROC_SE_DES3_CBC = 0x1,
+   ROC_SE_DES3_ECB = 0x2,
+   ROC_SE_AES_CBC = 0x3,
+   ROC_SE_AES_ECB = 0x4,
+   ROC_SE_AES_CFB = 0x5,
+   ROC_SE_AES_CTR = 0x6,
+   ROC_SE_AES_GCM = 0x7,
+   ROC_SE_AES_XTS = 0x8,

[dpdk-dev] [PATCH 08/11] common/cnxk: add IE microcode defines

[Anoob Joseph]

From: Srujana Challa 

Microcode IE opcodes support IPsec operations. Add defines
and structs defined by microcode.

Signed-off-by: Anoob Joseph 
Signed-off-by: Srujana Challa 
Signed-off-by: Tejasree Kondoj 
---
 drivers/common/cnxk/roc_api.h  |   2 +
 drivers/common/cnxk/roc_ie.h   |  19 ++
 drivers/common/cnxk/roc_ie_on.h|  18 ++
 drivers/common/cnxk/roc_ie_ot.h| 588 +
 drivers/common/cnxk/roc_platform.h |   1 +
 5 files changed, 628 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_ie.h
 create mode 100644 drivers/common/cnxk/roc_ie_on.h
 create mode 100644 drivers/common/cnxk/roc_ie_ot.h

diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h
index 6511614..d545bb9 100644
--- a/drivers/common/cnxk/roc_api.h
+++ b/drivers/common/cnxk/roc_api.h
@@ -110,6 +110,8 @@
 #include "roc_cpt.h"
 
 /* CPT microcode */
+#include "roc_ie_on.h"
+#include "roc_ie_ot.h"
 #include "roc_se.h"
 
 #endif /* _ROC_API_H_ */
diff --git a/drivers/common/cnxk/roc_ie.h b/drivers/common/cnxk/roc_ie.h
new file mode 100644
index 000..a330ea1
--- /dev/null
+++ b/drivers/common/cnxk/roc_ie.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_IE_H__
+#define __ROC_IE_H__
+
+/* CNXK IPSEC helper macros */
+#define ROC_IE_AH_HDR_LEN  12
+#define ROC_IE_AES_GCM_IV_LEN  8
+#define ROC_IE_AES_GCM_MAC_LEN 16
+#define ROC_IE_AES_CBC_IV_LEN  16
+#define ROC_IE_SHA1_HMAC_LEN   12
+#define ROC_IE_AUTH_KEY_LEN_MAX 64
+
+#define ROC_IE_AES_GCM_ROUNDUP_BYTE_LEN 4
+#define ROC_IE_AES_CBC_ROUNDUP_BYTE_LEN 16
+
+#endif /* __ROC_IE_H__ */
diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
new file mode 100644
index 000..72ea037
--- /dev/null
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_IE_ON_H__
+#define __ROC_IE_ON_H__
+
+/* CN9K IPSEC LA opcodes */
+#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_OUTBOUND   0x20
+#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_INBOUND   0x21
+#define ROC_IE_ONL_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23
+#define ROC_IE_ONL_MAJOR_OP_PROCESS_INBOUND_IPSEC  0x24
+
+/* CN9K IPSEC FP opcodes */
+#define ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x25
+#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC  0x26
+
+#endif /* __ROC_IE_ON_H__ */
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
new file mode 100644
index 000..1b382de
--- /dev/null
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -0,0 +1,588 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_IE_OT_H__
+#define __ROC_IE_OT_H__
+
+/* CN10K IPSEC opcodes */
+#define ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x28
+#define ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC  0x29
+
+enum roc_ie_ot_ucc_ipsec {
+   ROC_IE_OT_UCC_SUCCESS = 0x00,
+   ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM = 0x02,
+   ROC_IE_OT_UCC_ERR_SA_INVAL = 0x03,
+   ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0x04,
+   ROC_IE_OT_UCC_ERR_SA_EXPIRED = 0x05,
+   ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM = 0x06,
+   ROC_IE_OT_UCC_ERR_SA_OVERFLOW = 0x07,
+   ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM = 0x08,
+   ROC_IE_OT_UCC_ERR_SA_ESP_BAD_ALGO = 0x09,
+   ROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM = 0x0a,
+   ROC_IE_OT_UCC_ERR_SA_ESP_BAD_KEYS = 0x0b,
+   ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST = 0x0c,
+   ROC_IE_OT_UCC_ERR_SA_AH_BAD_ALGO = 0x0d,
+   ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN = 0x0e,
+   ROC_IE_OT_UCC_ERR_SA_AH_BAD_KEYS = 0x0f,
+   ROC_IE_OT_UCC_ERR_SA_BAD_IP = 0x11,
+   ROC_IE_OT_UCC_ERR_SA_BAD_CTX = 0x13,
+   ROC_IE_OT_UCC_ERR_AOP_IPSEC = 0x17,
+   ROC_IE_OT_UCC_ERR_PKT_IP = 0x23,
+   ROC_IE_OT_UCC_ERR_PKT_IP6_BAD_EXT = 0x25,
+   ROC_IE_OT_UCC_ERR_PKT_IP6_HBH = 0x27,
+   ROC_IE_OT_UCC_ERR_PKT_IP6_BIGEXT = 0x29,
+   ROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0x2b,
+   ROC_IE_OT_UCC_ERR_PKT_IP_ULP = 0x2d,
+   ROC_IE_OT_UCC_ERR_PKT_SA_MISMATCH = 0x2f,
+   ROC_IE_OT_UCC_ERR_PKT_SPI_MISMATCH = 0x31,
+   ROC_IE_OT_UCC_ERR_PKT_ESP_BADPAD = 0x33,
+   ROC_IE_OT_UCC_ERR_PKT_BADICV = 0x35,
+   ROC_IE_OT_UCC_ERR_PKT_REPLAY_SEQ = 0x37,
+   ROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0x39,
+   ROC_IE_OT_UCC_ERR_PKT_BADNH = 0x3b,
+   ROC_IE_OT_UCC_ERR_PKT_SA_PORT_MISMATCH = 0x3d,
+};
+
+enum {
+   ROC_IE_OT_SA_AR_WIN_DISABLED = 0,
+   ROC_IE_OT_SA_AR_WIN_64 = 1,
+   ROC_IE_OT_SA_AR_WIN_128 = 2,
+   ROC_IE_OT_SA_AR_WIN_256 = 3,
+   ROC_IE_OT_SA_AR_WIN_512 = 4,
+   ROC_IE_OT_SA_AR_WIN_1024 = 5,
+   ROC_IE_OT_SA_AR_WIN_2048 = 6,
+   ROC_IE_OT_SA_AR_WIN_4096 = 7,
+};
+
+enum {
+   ROC_IE_OT_SA_PKT_FMT_FULL = 0,
+   ROC_IE_OT_SA_PKT_FMT_META = 1,
+};
+
+enum {
+   ROC_IE_OT_SA_PKT_OUTPUT_DECRYPTED = 0,
+   ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG = 1,
+

[dpdk-dev] [PATCH 09/11] common/cnxk: add AE microcode defines

[Anoob Joseph]

From: Kiran Kumar Kokkilagadda 

Microcode AE opcodes support asymmetric operations. Add defines
and structs defined by microcode.

Signed-off-by: Anoob Joseph 
Signed-off-by: Kiran Kumar Kokkilagadda 

---
 drivers/common/cnxk/roc_ae.h  | 56 +++
 drivers/common/cnxk/roc_cpt.h |  3 +++
 2 files changed, 59 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_ae.h

diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h
new file mode 100644
index 000..c549e18
--- /dev/null
+++ b/drivers/common/cnxk/roc_ae.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __ROC_AE_H__
+#define __ROC_AE_H__
+
+/* AE opcodes */
+#define ROC_AE_MAJOR_OP_MODEX   0x03
+#define ROC_AE_MAJOR_OP_ECDSA   0x04
+#define ROC_AE_MAJOR_OP_ECC 0x05
+#define ROC_AE_MINOR_OP_MODEX   0x01
+#define ROC_AE_MINOR_OP_PKCS_ENC 0x02
+#define ROC_AE_MINOR_OP_PKCS_ENC_CRT 0x03
+#define ROC_AE_MINOR_OP_PKCS_DEC 0x04
+#define ROC_AE_MINOR_OP_PKCS_DEC_CRT 0x05
+#define ROC_AE_MINOR_OP_MODEX_CRT0x06
+#define ROC_AE_MINOR_OP_ECDSA_SIGN   0x01
+#define ROC_AE_MINOR_OP_ECDSA_VERIFY 0x02
+#define ROC_AE_MINOR_OP_ECC_UMP 0x03
+
+/**
+ * Enumeration roc_ae_ec_id
+ *
+ * Enumerates supported elliptic curves
+ */
+typedef enum {
+   ROC_AE_EC_ID_P192 = 0,
+   ROC_AE_EC_ID_P224 = 1,
+   ROC_AE_EC_ID_P256 = 2,
+   ROC_AE_EC_ID_P384 = 3,
+   ROC_AE_EC_ID_P521 = 4,
+   ROC_AE_EC_ID_PMAX = 5
+} roc_ae_ec_id;
+
+/* Prime and order fields of built-in elliptic curves */
+struct roc_ae_ec_group {
+   struct {
+   /* P521 maximum length */
+   uint8_t data[66];
+   unsigned int length;
+   } prime;
+
+   struct {
+   /* P521 maximum length */
+   uint8_t data[66];
+   unsigned int length;
+   } order;
+};
+
+struct roc_ae_ec_ctx {
+   /* Prime length defined by microcode for EC operations */
+   uint8_t curveid;
+};
+
+#endif /* __ROC_AE_H__ */
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 2b43a5a..1e7a208 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -7,6 +7,9 @@
 
 #include "roc_api.h"
 
+#define ROC_AE_CPT_BLOCK_TYPE1 0
+#define ROC_AE_CPT_BLOCK_TYPE2 1
+
 #define ROC_CPT_MAX_LFS 64
 
 struct roc_cpt_lf {
-- 
2.7.4

[dpdk-dev] [PATCH 10/11] common/cnxk: add lmtline init

[Anoob Joseph]

Add routine to initialize LMTLINE which facilitates instruction
submission to CPT. Add common macros required in the enqueue
operations.

Signed-off-by: Anoob Joseph 
Signed-off-by: Ankur Dwivedi 

---
 drivers/common/cnxk/roc_cpt.c   | 20 
 drivers/common/cnxk/roc_cpt.h   | 31 +++
 drivers/common/cnxk/version.map |  1 +
 3 files changed, 52 insertions(+)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index d95b94c..6f344ee 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -760,3 +760,23 @@ roc_cpt_iq_disable(struct roc_cpt_lf *lf)
lf_inprog.s.eena = 0x0;
plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
 }
+
+int
+roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, struct roc_cpt_lmtline *lmtline,
+int lf_id)
+{
+   struct roc_cpt_lf *lf;
+
+   lf = roc_cpt->lf[lf_id];
+   if (lf == NULL)
+   return -ENOTSUP;
+
+   lmtline->io_addr = lf->io_addr;
+   if (roc_model_is_cn10k())
+   lmtline->io_addr |= ROC_CN10K_CPT_INST_DW_M1 << 4;
+
+   lmtline->fc_addr = lf->fc_addr;
+   lmtline->lmt_base = lf->lmt_base;
+
+   return 0;
+}
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 1e7a208..885c84d 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -11,6 +11,34 @@
 #define ROC_AE_CPT_BLOCK_TYPE2 1
 
 #define ROC_CPT_MAX_LFS 64
+#define ROC_CN10K_CPT_INST_DW_M1   
\
+   ((uint64_t)(((sizeof(struct cpt_inst_s) / 16) - 1) & 0x7))
+
+/* Vector of sizes in the burst of 16 CPT inst except first in 63:19 of
+ * APT_LMT_ARG_S
+ */
+#define ROC_CN10K_CPT_LMT_ARG  
\
+   (ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 0) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 1) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 2) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 3) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 4) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 5) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 6) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 7) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 8) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 9) |\
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 10) |   \
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 11) |   \
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 12) |   \
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 13) |   \
+ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 14))
+
+struct roc_cpt_lmtline {
+   uint64_t io_addr;
+   uint64_t *fc_addr;
+   uintptr_t lmt_base;
+};
 
 struct roc_cpt_lf {
/* Input parameters */
@@ -65,4 +93,7 @@ int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, 
uint64_t cptr);
 int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
 void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
+int __roc_api roc_cpt_lmtline_init(struct roc_cpt *roc_cpt,
+  struct roc_cpt_lmtline *lmtline, int lf_id);
+
 #endif /* _ROC_CPT_H_ */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index ad559a4..1fa01f1 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -22,6 +22,7 @@ INTERNAL {
roc_cpt_lf_init;
roc_cpt_lf_fini;
roc_cpt_lfs_print;
+   roc_cpt_lmtline_init;
roc_cpt_rxc_time_cfg;
roc_error_msg_get;
roc_idev_lmt_base_addr_get;
-- 
2.7.4

[dpdk-dev] [PATCH 11/11] common/cnxk: add fpm tables

[Anoob Joseph]

From: Kiran Kumar Kokkilagadda 

Add scalar FPM tables to be used for asymmetric operations.

Signed-off-by: Anoob Joseph 
Signed-off-by: Kiran Kumar Kokkilagadda 

---
 drivers/common/cnxk/meson.build |1 +
 drivers/common/cnxk/roc_ae_fpm_tables.c | 1140 +++
 drivers/common/cnxk/roc_ae_fpm_tables.h |   13 +
 drivers/common/cnxk/version.map |2 +
 4 files changed, 1156 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.c
 create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.h

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 739e0e4..fbe4a48 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -11,6 +11,7 @@ endif
 config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'
 deps = ['eal', 'pci', 'bus_pci', 'mbuf']
 sources = files(
+'roc_ae_fpm_tables.c',
 'roc_cpt.c',
 'roc_dev.c',
 'roc_idev.c',
diff --git a/drivers/common/cnxk/roc_ae_fpm_tables.c 
b/drivers/common/cnxk/roc_ae_fpm_tables.c
new file mode 100644
index 000..afb2a50
--- /dev/null
+++ b/drivers/common/cnxk/roc_ae_fpm_tables.c
@@ -0,0 +1,1140 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_ae_fpm_tables.h"
+#include "roc_ae.h"
+
+#define AE_FPM_TBL_NAME "ae_fpm_tbl"
+
+/*
+ * AE FPM table sizes Enumeration
+ *
+ * 15 table entries * (X, Y, Z coordinates) * Coordinate Offset
+ * Coordinate Offset depends on elliptic curve as mentioned below,
+ * 6 quadwords for P-192, P-224 and P-256
+ * 7 quadwords for P-384
+ * 9 quadwords for P-521
+ */
+typedef enum {
+   AE_FPM_P192_LEN = 2160,
+   AE_FPM_P224_LEN = 2160,
+   AE_FPM_P256_LEN = 2160,
+   AE_FPM_P384_LEN = 2520,
+   AE_FPM_P521_LEN = 3240
+} ae_fpm_len;
+
+/* FPM table address and length */
+struct ae_fpm_entry {
+   const uint8_t *data;
+   int len;
+};
+
+struct ae_fpm_tbl {
+   uint64_t refcount;
+   uint8_t fpm_tbl[];
+};
+
+/*
+ * Pre-computed ECC FMUL tables needed by cpt microcode
+ * for NIST curves P-192, P-256, P-384, P-521, P-224.
+ */
+
+const uint8_t ae_fpm_tbl_p192[AE_FPM_P192_LEN] = {
+   0xf4, 0xff, 0x0a, 0xfd, 0x82, 0xff, 0x10, 0x12, 0x7c, 0xbf, 0x20, 0xeb,
+   0x43, 0xa1, 0x88, 0x00, 0x18, 0x8d, 0xa8, 0x0e, 0xb0, 0x30, 0x90, 0xf6,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x73, 0xf9, 0x77, 0xa1, 0x1e, 0x79, 0x48, 0x11, 0x63, 0x10, 0x11, 0xed,
+   0x6b, 0x24, 0xcd, 0xd5, 0x07, 0x19, 0x2b, 0x95, 0xff, 0xc8, 0xda, 0x78,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0xc3, 0x96, 0x49, 0xc5, 0x5d, 0x7c, 0x48, 0xd8, 0xeb, 0x2c, 0xdf, 0xae,
+   0x5a, 0x92, 0x7c, 0x35, 0x67, 0xe3, 0x0c, 0xbd, 0xcb, 0xa6, 0x71, 0xfb,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x7a, 0x83, 0xce, 0xe1, 0xec, 0xbf, 0xbe, 0x7d, 0xce, 0x32, 0xd0, 0x3c,
+   0x06, 0x30, 0x15, 0x77, 0xa9, 0x35, 0x49, 0xc4, 0x58, 0x10, 0xf5, 0xc3,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x6f, 0x5e, 0xf8, 0x89, 0x66, 0xe3, 0xea, 0xd3, 0xf2, 0x9e, 0x6f, 0xea,
+   0xdf, 0xc9, 0xbf, 0x1a, 0xce, 0x21, 0x6b, 0xb8, 0x45, 0x20, 0x06, 0xe0,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x46, 0xb9, 0x09, 0x2d, 0x92, 0x7b, 0x37, 0x79, 0x1d, 0x0a, 0xeb, 0x4b,
+   0xb5, 0xb8, 0x0a, 0x20, 0xd9, 0x8a, 0x2e, 0xe2, 0x5a, 0xae, 0xc9, 0x58,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 

Re: [dpdk-dev] [PATCH v7 10/10] Enable the new EAL thread API

[Narcisa Ana Maria Vasile]

On Wed, Jun 02, 2021 at 03:50:02PM +, Tal Shnaiderman wrote:
> > Subject: [PATCH v7 10/10] Enable the new EAL thread API
> > 
> > External email: Use caution opening links or attachments
> > 
> > 
> > From: Narcisa Vasile 
> > 
> > Rename pthread_* occurrences with the new rte_thread_* API.
> > Enable the new API in the build system.
> > ---
> 
> Hi Naty,
> 
> I wanted to run some basic tests on your series but I cannot apply this patch.
> 
> Same issue in CI 
> (http://mails.dpdk.org/archives/test-report/2021-June/197522.html)
> 
> Can you send a rebased version?
> 

Thanks Tal, I will rebase.

> Thanks,
> 
> Tal.
>   

Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics

[Andrew Rybchenko]

On 6/2/21 3:46 PM, Ilya Maximets wrote:
> On 6/1/21 4:28 PM, Ivan Malov wrote:
>> Hi Ilya,
>>
>> Thank you for reviewing the proposal at such short notice. I'm afraid that 
>> prior discussions overlook the simple fact that the whole problem is not 
>> limited to just VF representors. Action PORT_ID is also used with respect to 
>> the admin PF's ethdev, which "represents itself" (and by no means it 
>> represents the underlying physical/network port). In this case, one cannot 
>> state that the application treats it as a physical port, just like one 
>> states that the application perceives representors as VFs themselves.
> 
> 
> I don't think that it was overlooked.  If device is in a switchdev mode than
> there is a PF representor and VF representors.  Application typically works
> only with representors in this case is it doesn't make much sense to have
> representor and the upstream port attached to the same application at the
> same time.  Configuration that is applied by application to the representor
> (PF or VF, it doesn't matter) applies to the corresponding upstream port
> (actual PF or VF) by default.

PF is not necessarily associated with a network port. It
could  be many PFs and just one network port on NIC.
Extra PFs are like VFs in this case. These PFs may be
passed to a VM in a similar way. So, we can have PF
representors similar to VF representors. I.e. it is
incorrect to say that PF in the case of switchdev is
a representor of a network port.

If we prefer to talk in representors terminology, we
need 4 types of prepresentors:
 - PF representor for PCIe physical function
 - VF representor for PCIe virtual function
 - SF representor for PCIe sub-function (PASID)
 - network port representor
In fact above is PCIe oriented, but there are
other buses and ways to deliver traffic to applications.
Basically representor for any virtual port in virtual
switch which DPDK app can control using transfer rules.

> Exactly same thing here with PORT_ID action.  You have a packet and action
> to send it to the port, but it's not specified if HW needs to send it to
> the representor or the upstream port (again, VF or PF, it doesn't matter).
> Since there is no extra information, HW should send it to the upstream
> port by default.  The same as configuration applies by default to the
> upstream port.
> 
> Let's look at some workflow examples:
> 
>   DPDK Application
> | |
> | |
>+--PF-rep--VF-rep---+
>|   |
>|NIC (switchdev)|
>|   |
>+---PF-VF---+
>|  |
>|  |
>External   VM or whatever
>Network

See above. PF <-> External Network is incorrect above
since it not always the case. It should be
"NP <-> External network" and "NP-rep" above (NP -
network port). Sometimes PF is an NP-rep, but sometimes
it is not. It is just a question of default rules in
switchdev on what to do with traffic incoming from
network port.

A bit more complicated picture is:

++
|DPDK Application|
++-+-+-+-+
 |PF0  |PF1  | |
 | | | |
+--NP1-rep---NP2-rep---PF2-rep---VF-rep--+
||
| NIC (switchdev)|
||
+---NP1---NP2---PF2VF+
 | | | |
 | | | |
 External   ExternalVM or VM or
Network 1  Network 2  whatever   whatever

So, sometimes PF plays network port representor role (PF0,
PF1), sometimes it requires representor itself (PF2).
What to do if PF2 itself is attached to application?
Can we route traffic to it using PORT_ID action?
It has DPDK ethdev port. It is one of arguments why
plain PORT_ID should route DPDK application.

Of course, some applications would like to see it as
(simpler is better):

++
|DPDK Application|
||
+---PF0---PF1--PF2-rep---VF-rep--+
 | | | |
 | | | |
 External   ExternalVM or VM or
Network 1  Network 2  whatever   whatever

but some, I believe, require full picture. For examples,
I'd really like to know how much traffic goes via all 8
switchdev ports and running rte_eth_stats_get(0, ...)
(i.e. DPDK port 0 attached to PF0) I'd like to get
NP1-rep stats (not NP1 stats). It will match exactly
what I see in DPDK application. It is an argument why
plain PORT_ID should be treated as a DPDK ethdev port,
not a represented (upstream) entity.

> a. Workflow for "DPDK Application" to set MAC to VF:
> 
> 1. "DPDK Application" calls rte_set_etheraddr("VF-rep", new_mac);
> 2.  DPDK s

[dpdk-dev] [PATCH 00/20] Add Marvell CNXK crypto PMDs

[Anoob Joseph]

Add cnxk crypto PMDs supporting Marvell CN106XX SoC, based on 'common/cnxk'.

This series utilizes 'common/cnxk' to register cn9k & cn10k crypto PMDs and
add symmetric cryptographic features for the same.

Depends-on: series-17212 ("Add CPT in Marvell CNXK common driver")

Ankur Dwivedi (5):
  crypto/cnxk: add driver skeleton
  crypto/cnxk: add probe and remove
  crypto/cnxk: add device control ops
  crypto/cnxk: add symmetric crypto capabilities
  crypto/cnxk: add queue pair ops

Anoob Joseph (5):
  crypto/cnxk: add session ops framework
  crypto/cnxk: add enqueue burst op
  crypto/cnxk: add dequeue burst op
  crypto/cnxk: add cipher operation in session
  crypto/cnxk: add auth operation in session

Archana Muniganti (5):
  crypto/cnxk: add aead operation in session
  crypto/cnxk: add chained operation in session
  crypto/cnxk: add flexi crypto cipher encrypt
  crypto/cnxk: add flexi crypto cipher decrypt
  crypto/cnxk: add ZUC and SNOW3G encrypt

Tejasree Kondoj (5):
  crypto/cnxk: add ZUC and SNOW3G decrypt
  crypto/cnxk: add KASUMI encrypt
  crypto/cnxk: add KASUMI decrypt
  crypto/cnxk: add digest support
  test/crypto: enable cnxk crypto PMDs

 MAINTAINERS   |9 +
 app/test/meson.build  |2 +
 app/test/test_cryptodev.c |   14 +
 app/test/test_cryptodev.h |2 +
 doc/guides/cryptodevs/features/cn10k.ini  |   62 +
 doc/guides/cryptodevs/features/cn9k.ini   |   66 +
 drivers/crypto/cnxk/cn10k_cryptodev.c |  147 +
 drivers/crypto/cnxk/cn10k_cryptodev.h |   13 +
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  357 +++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.h |   15 +
 drivers/crypto/cnxk/cn9k_cryptodev.c  |  145 +
 drivers/crypto/cnxk/cn9k_cryptodev.h  |   13 +
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  319 +++
 drivers/crypto/cnxk/cn9k_cryptodev_ops.h  |   14 +
 drivers/crypto/cnxk/cnxk_cpt_ops_helper.c |   28 +
 drivers/crypto/cnxk/cnxk_cpt_ops_helper.h |   20 +
 drivers/crypto/cnxk/cnxk_cryptodev.c  |   33 +
 drivers/crypto/cnxk/cnxk_cryptodev.h  |   38 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c |  755 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h |   25 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  |  534 
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  109 +
 drivers/crypto/cnxk/cnxk_se.h | 3052 +
 drivers/crypto/cnxk/meson.build   |   22 +
 drivers/crypto/cnxk/version.map   |3 +
 drivers/crypto/meson.build|1 +
 26 files changed, 5798 insertions(+)
 create mode 100644 doc/guides/cryptodevs/features/cn10k.ini
 create mode 100644 doc/guides/cryptodevs/features/cn9k.ini
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.h
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.h
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.h
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.h
 create mode 100644 drivers/crypto/cnxk/cnxk_se.h
 create mode 100644 drivers/crypto/cnxk/meson.build
 create mode 100644 drivers/crypto/cnxk/version.map

-- 
2.7.4

[dpdk-dev] [PATCH 01/20] crypto/cnxk: add driver skeleton

[Anoob Joseph]

From: Ankur Dwivedi 

Add driver skeleton for crypto_cn9k & crypto_cn10k PMDs leveraging cnxk
common framework.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 MAINTAINERS  |  9 +++
 doc/guides/cryptodevs/features/cn10k.ini | 21 
 doc/guides/cryptodevs/features/cn9k.ini  | 21 
 drivers/crypto/cnxk/cn10k_cryptodev.c| 42 
 drivers/crypto/cnxk/cn10k_cryptodev.h| 13 ++
 drivers/crypto/cnxk/cn9k_cryptodev.c | 40 ++
 drivers/crypto/cnxk/cn9k_cryptodev.h | 13 ++
 drivers/crypto/cnxk/meson.build  | 16 
 drivers/crypto/cnxk/version.map  |  3 +++
 drivers/crypto/meson.build   |  1 +
 10 files changed, 179 insertions(+)
 create mode 100644 doc/guides/cryptodevs/features/cn10k.ini
 create mode 100644 doc/guides/cryptodevs/features/cn9k.ini
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.h
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.h
 create mode 100644 drivers/crypto/cnxk/meson.build
 create mode 100644 drivers/crypto/cnxk/version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index 5877a16..ecfd1a4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1080,6 +1080,15 @@ F: drivers/crypto/octeontx2/
 F: doc/guides/cryptodevs/octeontx2.rst
 F: doc/guides/cryptodevs/features/octeontx2.ini
 
+Marvell cnxk
+M: Ankur Dwivedi 
+M: Anoob Joseph 
+M: Tejasree Kondoj 
+F: drivers/crypto/cnxk/
+F: doc/guides/cryptodevs/cnxk.rst
+F: doc/guides/cryptodevs/features/cn9k.ini
+F: doc/guides/cryptodevs/features/cn10k.ini
+
 Null Crypto
 M: Declan Doherty 
 F: drivers/crypto/null/
diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
new file mode 100644
index 000..0aa097d
--- /dev/null
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -0,0 +1,21 @@
+;
+; Supported features of the 'cn10k' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+
+;
+; Supported crypto algorithms of 'cn10k' crypto driver.
+;
+[Cipher]
+
+;
+; Supported authentication algorithms of 'cn10k' crypto driver.
+;
+[Auth]
+
+;
+; Supported AEAD algorithms of 'cn10k' crypto driver.
+;
+[AEAD]
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
new file mode 100644
index 000..64ee929
--- /dev/null
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -0,0 +1,21 @@
+;
+; Supported features of the 'cn9k' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+
+;
+; Supported crypto algorithms of 'cn9k' crypto driver.
+;
+[Cipher]
+
+;
+; Supported authentication algorithms of 'cn9k' crypto driver.
+;
+[Auth]
+
+;
+; Supported AEAD algorithms of 'cn9k' crypto driver.
+;
+[AEAD]
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
new file mode 100644
index 000..4d2140c
--- /dev/null
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "cn10k_cryptodev.h"
+#include "roc_api.h"
+
+uint8_t cn10k_cryptodev_driver_id;
+
+static struct rte_pci_id pci_id_cpt_table[] = {
+   {
+   RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+  PCI_DEVID_CN10K_RVU_CPT_VF)
+   },
+   /* sentinel */
+   {
+   .device_id = 0
+   },
+};
+
+static struct rte_pci_driver cn10k_cryptodev_pmd = {
+   .id_table = pci_id_cpt_table,
+   .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
+   .probe = NULL,
+   .remove = NULL,
+};
+
+static struct cryptodev_driver cn10k_cryptodev_drv;
+
+RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_CN10K_PMD, cn10k_cryptodev_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_CN10K_PMD, pci_id_cpt_table);
+RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_CN10K_PMD, "vfio-pci");
+RTE_PMD_REGISTER_CRYPTO_DRIVER(cn10k_cryptodev_drv, cn10k_cryptodev_pmd.driver,
+  cn10k_cryptodev_driver_id);
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.h 
b/drivers/crypto/cnxk/cn10k_cryptodev.h
new file mode 100644
index 000..61f62ef
--- /dev/null
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _CN10K_CRYPTODEV_H_
+#define _CN10K_CRYPTODEV_H_
+
+/* Marvell OCTEON CN10K Crypto PMD device name */
+#define CRYPTODEV_NAME_CN10K_PMD crypto_cn10k
+
+extern uint8_t cn10k_cryptodev_driver_id;
+
+#endif /* _CN10K_CRYPTODEV_H_ */
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c 
b/drivers/crypt

[dpdk-dev] [PATCH 02/20] crypto/cnxk: add probe and remove

[Anoob Joseph]

From: Ankur Dwivedi 

Add probe & remove for cn9k & cn10k crypto PMDs.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph >
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev.c | 93 ++-
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 34 +++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.h | 13 +
 drivers/crypto/cnxk/cn9k_cryptodev.c  | 93 ++-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 34 +++
 drivers/crypto/cnxk/cn9k_cryptodev_ops.h  | 12 
 drivers/crypto/cnxk/cnxk_cryptodev.c  | 33 +++
 drivers/crypto/cnxk/cnxk_cryptodev.h  | 33 +++
 drivers/crypto/cnxk/meson.build   |  3 +
 9 files changed, 344 insertions(+), 4 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.h
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index 4d2140c..ef2c3df 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -11,6 +11,8 @@
 #include 
 
 #include "cn10k_cryptodev.h"
+#include "cn10k_cryptodev_ops.h"
+#include "cnxk_cryptodev.h"
 #include "roc_api.h"
 
 uint8_t cn10k_cryptodev_driver_id;
@@ -26,11 +28,98 @@ static struct rte_pci_id pci_id_cpt_table[] = {
},
 };
 
+static int
+cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+   struct rte_pci_device *pci_dev)
+{
+   struct rte_cryptodev_pmd_init_params init_params = {
+   .name = "",
+   .socket_id = rte_socket_id(),
+   .private_data_size = sizeof(struct cnxk_cpt_vf)
+   };
+   char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+   struct rte_cryptodev *dev;
+   struct roc_cpt *roc_cpt;
+   struct cnxk_cpt_vf *vf;
+   int rc;
+
+   rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+   dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);
+   if (dev == NULL) {
+   rc = -ENODEV;
+   goto exit;
+   }
+
+   dev->dev_ops = &cn10k_cpt_ops;
+
+   dev->driver_id = cn10k_cryptodev_driver_id;
+
+   /* Get private data space allocated */
+   vf = dev->data->dev_private;
+
+   roc_cpt = &vf->cpt;
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   roc_cpt->pci_dev = pci_dev;
+   rc = roc_cpt_dev_init(roc_cpt);
+   if (rc) {
+   plt_err("Failed to initialize roc cpt rc=%d", rc);
+   goto pmd_destroy;
+   }
+
+   rc = cnxk_cpt_eng_grp_add(roc_cpt);
+   if (rc) {
+   plt_err("Failed to add engine group rc=%d", rc);
+   goto dev_fini;
+   }
+   }
+
+   return 0;
+
+dev_fini:
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   roc_cpt_dev_fini(roc_cpt);
+pmd_destroy:
+   rte_cryptodev_pmd_destroy(dev);
+exit:
+   plt_err("Could not create device (vendor_id: 0x%x device_id: 0x%x)",
+   pci_dev->id.vendor_id, pci_dev->id.device_id);
+   return rc;
+}
+
+static int
+cn10k_cpt_pci_remove(struct rte_pci_device *pci_dev)
+{
+   char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+   struct rte_cryptodev *dev;
+   struct cnxk_cpt_vf *vf;
+   int ret;
+
+   if (pci_dev == NULL)
+   return -EINVAL;
+
+   rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+   dev = rte_cryptodev_pmd_get_named_dev(name);
+   if (dev == NULL)
+   return -ENODEV;
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   vf = dev->data->dev_private;
+   ret = roc_cpt_dev_fini(&vf->cpt);
+   if (ret)
+   return ret;
+   }
+
+   return rte_cryptodev_pmd_destroy(dev);
+}
+
 static struct rte_pci_driver cn10k_cryptodev_pmd = {
.id_table = pci_id_cpt_table,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
-   .probe = NULL,
-   .remove = NULL,
+   .probe = cn10k_cpt_pci_probe,
+   .remove = cn10k_cpt_pci_remove,
 };
 
 static struct cryptodev_driver cn10k_cryptodev_drv;
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
new file mode 100644
index 000..6f80f74
--- /dev/null
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+#include 
+
+#include "cn10k_cryptodev.h"
+#include "cn10k_cryptodev_ops.h"
+
+struct rte_cryptodev_ops cn10k_

[dpdk-dev] [PATCH 03/20] crypto/cnxk: add device control ops

[Anoob Joseph]

From: Ankur Dwivedi 

Add ops for
- dev_configure()
- dev_start()
- dev_stop()
- dev_close()
- dev_infos_get()

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 21 +++--
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 21 +++--
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 77 +++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  | 25 ++
 drivers/crypto/cnxk/meson.build   |  1 +
 5 files changed, 135 insertions(+), 10 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 6f80f74..b0eccb3 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -7,14 +7,25 @@
 
 #include "cn10k_cryptodev.h"
 #include "cn10k_cryptodev_ops.h"
+#include "cnxk_cryptodev_ops.h"
+
+static void
+cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,
+  struct rte_cryptodev_info *info)
+{
+   if (info != NULL) {
+   cnxk_cpt_dev_info_get(dev, info);
+   info->driver_id = cn10k_cryptodev_driver_id;
+   }
+}
 
 struct rte_cryptodev_ops cn10k_cpt_ops = {
/* Device control ops */
-   .dev_configure = NULL,
-   .dev_start = NULL,
-   .dev_stop = NULL,
-   .dev_close = NULL,
-   .dev_infos_get = NULL,
+   .dev_configure = cnxk_cpt_dev_config,
+   .dev_start = cnxk_cpt_dev_start,
+   .dev_stop = cnxk_cpt_dev_stop,
+   .dev_close = cnxk_cpt_dev_close,
+   .dev_infos_get = cn10k_cpt_dev_info_get,
 
.stats_get = NULL,
.stats_reset = NULL,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 51f9845..acfb071 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -7,14 +7,25 @@
 
 #include "cn9k_cryptodev.h"
 #include "cn9k_cryptodev_ops.h"
+#include "cnxk_cryptodev_ops.h"
+
+static void
+cn9k_cpt_dev_info_get(struct rte_cryptodev *dev,
+ struct rte_cryptodev_info *info)
+{
+   if (info != NULL) {
+   cnxk_cpt_dev_info_get(dev, info);
+   info->driver_id = cn9k_cryptodev_driver_id;
+   }
+}
 
 struct rte_cryptodev_ops cn9k_cpt_ops = {
/* Device control ops */
-   .dev_configure = NULL,
-   .dev_start = NULL,
-   .dev_stop = NULL,
-   .dev_close = NULL,
-   .dev_infos_get = NULL,
+   .dev_configure = cnxk_cpt_dev_config,
+   .dev_start = cnxk_cpt_dev_start,
+   .dev_stop = cnxk_cpt_dev_stop,
+   .dev_close = cnxk_cpt_dev_close,
+   .dev_infos_get = cn9k_cpt_dev_info_get,
 
.stats_get = NULL,
.stats_reset = NULL,
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
new file mode 100644
index 000..3d0efc7
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+#include 
+#include 
+
+#include "roc_cpt.h"
+
+#include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_ops.h"
+
+int
+cnxk_cpt_dev_config(struct rte_cryptodev *dev,
+   struct rte_cryptodev_config *conf)
+{
+   struct cnxk_cpt_vf *vf = dev->data->dev_private;
+   struct roc_cpt *roc_cpt = &vf->cpt;
+   uint16_t nb_lf_avail, nb_lf;
+   int ret;
+
+   dev->feature_flags &= ~conf->ff_disable;
+
+   nb_lf_avail = roc_cpt->nb_lf_avail;
+   nb_lf = conf->nb_queue_pairs;
+
+   if (nb_lf > nb_lf_avail)
+   return -ENOTSUP;
+
+   ret = roc_cpt_dev_configure(roc_cpt, nb_lf);
+   if (ret) {
+   plt_err("Could not configure device");
+   return ret;
+   }
+
+   return 0;
+}
+
+int
+cnxk_cpt_dev_start(struct rte_cryptodev *dev)
+{
+   RTE_SET_USED(dev);
+
+   return 0;
+}
+
+void
+cnxk_cpt_dev_stop(struct rte_cryptodev *dev)
+{
+   RTE_SET_USED(dev);
+}
+
+int
+cnxk_cpt_dev_close(struct rte_cryptodev *dev)
+{
+   struct cnxk_cpt_vf *vf = dev->data->dev_private;
+
+   roc_cpt_dev_clear(&vf->cpt);
+
+   return 0;
+}
+
+void
+cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
+ struct rte_cryptodev_info *info)
+{
+   struct cnxk_cpt_vf *vf = dev->data->dev_private;
+   struct roc_cpt *roc_cpt = &vf->cpt;
+
+   info->max_nb_queue_pairs = roc_cpt->nb_lf_avail;
+   info->feature_flags = dev->feature_flags;
+   info->capabilities = NULL;
+   info->sym.max_nb_sessions = 0;
+   info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;
+   info->min_mbuf_tailroom_req = CNXK_CPT_MIN_TAILROOM_REQ;
+}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h 
b/drivers/crypto/c

[dpdk-dev] [PATCH 04/20] crypto/cnxk: add symmetric crypto capabilities

[Anoob Joseph]

From: Ankur Dwivedi 

Add symmetric crypto capabilities for cn9k & cn10k.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev.c |   4 +
 drivers/crypto/cnxk/cn9k_cryptodev.c  |   4 +
 drivers/crypto/cnxk/cnxk_cryptodev.h  |   5 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 755 ++
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h |  25 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  |   3 +-
 drivers/crypto/cnxk/meson.build   |   1 +
 7 files changed, 796 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index ef2c3df..79397d5 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -13,6 +13,8 @@
 #include "cn10k_cryptodev.h"
 #include "cn10k_cryptodev_ops.h"
 #include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_capabilities.h"
+
 #include "roc_api.h"
 
 uint8_t cn10k_cryptodev_driver_id;
@@ -75,6 +77,8 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
}
}
 
+   cnxk_cpt_caps_populate(vf);
+
return 0;
 
 dev_fini:
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c 
b/drivers/crypto/cnxk/cn9k_cryptodev.c
index 54610c7..424f812 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c
@@ -13,6 +13,8 @@
 #include "cn9k_cryptodev.h"
 #include "cn9k_cryptodev_ops.h"
 #include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_capabilities.h"
+
 #include "roc_api.h"
 
 uint8_t cn9k_cryptodev_driver_id;
@@ -73,6 +75,8 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
}
}
 
+   cnxk_cpt_caps_populate(vf);
+
return 0;
 
 dev_fini:
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h 
b/drivers/crypto/cnxk/cnxk_cryptodev.h
index 769f784..dcbdc53 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -21,11 +21,16 @@
 #define CPT_LOG_DP_WARN(fmt, args...)  CPT_LOG_DP(WARNING, fmt, ##args)
 #define CPT_LOG_DP_ERR(fmt, args...)   CPT_LOG_DP(ERR, fmt, ##args)
 
+#define CNXK_CPT_MAX_CAPS   34
+#define CNXK_SEC_CRYPTO_MAX_CAPS 4
+#define CNXK_SEC_MAX_CAPS   3
+
 /**
  * Device private data
  */
 struct cnxk_cpt_vf {
struct roc_cpt cpt;
+   struct rte_cryptodev_capabilities crypto_caps[CNXK_CPT_MAX_CAPS];
 };
 
 int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt);
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
new file mode 100644
index 000..e627854
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -0,0 +1,755 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+
+#include "roc_api.h"
+
+#include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_capabilities.h"
+
+#define CPT_CAPS_ADD(cnxk_caps, cur_pos, hw_caps, name)
\
+   do {   \
+   if ((hw_caps[CPT_ENG_TYPE_SE].name) || \
+   (hw_caps[CPT_ENG_TYPE_IE].name) || \
+   (hw_caps[CPT_ENG_TYPE_AE].name))   \
+   cpt_caps_add(cnxk_caps, cur_pos, caps_##name,  \
+RTE_DIM(caps_##name));\
+   } while (0)
+
+static const struct rte_cryptodev_capabilities caps_mul[] = {
+   {   /* RSA */
+   .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
+   {.asym = {
+   .xform_capa = {
+   .xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,
+   .op_types = ((1 << RTE_CRYPTO_ASYM_OP_SIGN) |
+   (1 << RTE_CRYPTO_ASYM_OP_VERIFY) |
+   (1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) |
+   (1 << RTE_CRYPTO_ASYM_OP_DECRYPT)),
+   {.modlen = {
+   .min = 17,
+   .max = 1024,
+   .increment = 1
+   }, }
+   }
+   }, }
+   },
+   {   /* MOD_EXP */
+   .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
+   {.asym = {
+   .xform_capa = {
+   .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+   .op_types = 0,
+   {.modlen = {
+

[dpdk-dev] [PATCH 05/20] crypto/cnxk: add queue pair ops

[Anoob Joseph]

From: Ankur Dwivedi 

Add ops for
- queue_pair_setup()
- queue_pair_release()

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   4 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |   4 +-
 drivers/crypto/cnxk/cnxk_cpt_ops_helper.c |  28 
 drivers/crypto/cnxk/cnxk_cpt_ops_helper.h |  20 +++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 236 ++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  48 ++
 drivers/crypto/cnxk/meson.build   |   1 +
 7 files changed, 337 insertions(+), 4 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index b0eccb3..007d449 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {
 
.stats_get = NULL,
.stats_reset = NULL,
-   .queue_pair_setup = NULL,
-   .queue_pair_release = NULL,
+   .queue_pair_setup = cnxk_cpt_queue_pair_setup,
+   .queue_pair_release = cnxk_cpt_queue_pair_release,
 
/* Symmetric crypto ops */
.sym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index acfb071..73ccf5b 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {
 
.stats_get = NULL,
.stats_reset = NULL,
-   .queue_pair_setup = NULL,
-   .queue_pair_release = NULL,
+   .queue_pair_setup = cnxk_cpt_queue_pair_setup,
+   .queue_pair_release = cnxk_cpt_queue_pair_release,
 
/* Symmetric crypto ops */
.sym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c 
b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
new file mode 100644
index 000..103195e
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+
+#include "hw/cpt.h"
+#include "roc_api.h"
+
+#include "cnxk_cpt_ops_helper.h"
+
+int
+cnxk_cpt_ops_helper_get_mlen(void)
+{
+   uint32_t len;
+
+   /* For MAC */
+   len = 2 * sizeof(uint64_t);
+   len += ROC_SE_MAX_MAC_LEN * sizeof(uint8_t);
+
+   len += CPT_OFFSET_CONTROL_BYTES + CPT_MAX_IV_LEN;
+   len += RTE_ALIGN_CEIL((ROC_SE_SG_LIST_HDR_SIZE +
+  (RTE_ALIGN_CEIL(ROC_SE_MAX_SG_IN_OUT_CNT, 4) >>
+   2) * SG_ENTRY_SIZE),
+ 8);
+
+   return len;
+}
diff --git a/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h 
b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
new file mode 100644
index 000..23c6fed
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _CNXK_CPT_OPS_HELPER_H_
+#define _CNXK_CPT_OPS_HELPER_H_
+
+#define CPT_MAX_IV_LEN  16
+#define CPT_OFFSET_CONTROL_BYTES 8
+#define SG_ENTRY_SIZE   sizeof(struct roc_se_sglist_comp)
+
+/*
+ * Get size of contiguous meta buffer to be allocated
+ *
+ * @return
+ *   - length
+ */
+int cnxk_cpt_ops_helper_get_mlen(void);
+
+#endif /* _CNXK_CPT_OPS_HELPER_H_ */
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 7f71c29..d36258b 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -8,6 +8,7 @@
 
 #include "roc_cpt.h"
 
+#include "cnxk_cpt_ops_helper.h"
 #include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_ops.h"
 #include "cnxk_cryptodev_capabilities.h"
@@ -56,6 +57,16 @@ int
 cnxk_cpt_dev_close(struct rte_cryptodev *dev)
 {
struct cnxk_cpt_vf *vf = dev->data->dev_private;
+   uint16_t i;
+   int ret;
+
+   for (i = 0; i < dev->data->nb_queue_pairs; i++) {
+   ret = cnxk_cpt_queue_pair_release(dev, i);
+   if (ret < 0) {
+   plt_err("Could not release queue pair %u", i);
+   return ret;
+   }
+   }
 
roc_cpt_dev_clear(&vf->cpt);
 
@@ -76,3 +87,228 @@ cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;
info->min_mbuf_tailroom_req = CNXK_CPT_MIN_TAILROOM_REQ;
 }
+
+static void
+qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
+{
+   snprintf(name, size, "cnxk_cpt_pq_mem_%u:%u", dev_id, qp_id);
+}
+
+static int
+cnxk_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
+   struct cnxk_cpt_qp *qp, uint8_t qp_id,
+   uint

[dpdk-dev] [PATCH 06/20] crypto/cnxk: add session ops framework

[Anoob Joseph]

Add session ops
- sym_session_get_size
- sym_session_configure
- sym_session_clear

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   6 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |   6 +-
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 187 ++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  27 +
 drivers/crypto/cnxk/cnxk_se.h |  31 +
 5 files changed, 251 insertions(+), 6 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_se.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 007d449..34dc107 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {
.queue_pair_release = cnxk_cpt_queue_pair_release,
 
/* Symmetric crypto ops */
-   .sym_session_get_size = NULL,
-   .sym_session_configure = NULL,
-   .sym_session_clear = NULL,
+   .sym_session_get_size = cnxk_cpt_sym_session_get_size,
+   .sym_session_configure = cnxk_cpt_sym_session_configure,
+   .sym_session_clear = cnxk_cpt_sym_session_clear,
 
/* Asymmetric crypto ops */
.asym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 73ccf5b..bef6159 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {
.queue_pair_release = cnxk_cpt_queue_pair_release,
 
/* Symmetric crypto ops */
-   .sym_session_get_size = NULL,
-   .sym_session_configure = NULL,
-   .sym_session_clear = NULL,
+   .sym_session_get_size = cnxk_cpt_sym_session_get_size,
+   .sym_session_configure = cnxk_cpt_sym_session_configure,
+   .sym_session_clear = cnxk_cpt_sym_session_clear,
 
/* Asymmetric crypto ops */
.asym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index d36258b..c2e07cf 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -12,6 +12,7 @@
 #include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_ops.h"
 #include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_se.h"
 
 int
 cnxk_cpt_dev_config(struct rte_cryptodev *dev,
@@ -312,3 +313,189 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, 
uint16_t qp_id,
cnxk_cpt_qp_destroy(dev, qp);
return ret;
 }
+
+unsigned int
+cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
+{
+   return sizeof(struct cnxk_se_sess);
+}
+
+static int
+sym_xform_verify(struct rte_crypto_sym_xform *xform)
+{
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
+   xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
+   return -ENOTSUP;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
+   return CNXK_CPT_CIPHER;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
+   return CNXK_CPT_AUTH;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD && xform->next == NULL)
+   return CNXK_CPT_AEAD;
+
+   if (xform->next == NULL)
+   return -EIO;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+   xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
+   xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
+   return -ENOTSUP;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
+   xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+   xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
+   return -ENOTSUP;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+   xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
+   xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->next->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
+   return CNXK_CPT_CIPHER_ENC_AUTH_GEN;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY &&
+   xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+   xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)
+   return CNXK_CPT_AUTH_VRFY_CIPHER_DEC;
+
+   if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+   xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE &&
+   xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+   xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
+   switch (xform->auth.algo) {
+  

[dpdk-dev] [PATCH 07/20] crypto/cnxk: add enqueue burst op

[Anoob Joseph]

Add enqueue_burst op in cn9k & cn10k.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev.c |   2 +
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 189 ++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.h |   2 +
 drivers/crypto/cnxk/cn9k_cryptodev.c  |   2 +
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 154 
 drivers/crypto/cnxk/cn9k_cryptodev_ops.h  |   2 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |   9 ++
 7 files changed, 360 insertions(+)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index 79397d5..a34dbbf 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -79,6 +79,8 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
 
cnxk_cpt_caps_populate(vf);
 
+   cn10k_cpt_set_enqdeq_fns(dev);
+
return 0;
 
 dev_fini:
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 34dc107..afdd43c 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -7,7 +7,196 @@
 
 #include "cn10k_cryptodev.h"
 #include "cn10k_cryptodev_ops.h"
+#include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_ops.h"
+#include "cnxk_se.h"
+
+static inline struct cnxk_se_sess *
+cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op 
*op)
+{
+   const int driver_id = cn10k_cryptodev_driver_id;
+   struct rte_crypto_sym_op *sym_op = op->sym;
+   struct rte_cryptodev_sym_session *sess;
+   struct cnxk_se_sess *priv;
+   int ret;
+
+   /* Create temporary session */
+   sess = rte_cryptodev_sym_session_create(qp->sess_mp);
+   if (sess == NULL)
+   return NULL;
+
+   ret = sym_session_configure(qp->lf.roc_cpt, driver_id, sym_op->xform,
+   sess, qp->sess_mp_priv);
+   if (ret)
+   goto sess_put;
+
+   priv = get_sym_session_private_data(sess, driver_id);
+
+   sym_op->session = sess;
+
+   return priv;
+
+sess_put:
+   rte_mempool_put(qp->sess_mp, sess);
+   return NULL;
+}
+
+static __rte_always_inline int __rte_hot
+cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
+ struct cnxk_se_sess *sess, struct cpt_inflight_req *infl_req,
+ struct cpt_inst_s *inst)
+{
+   RTE_SET_USED(qp);
+   RTE_SET_USED(op);
+   RTE_SET_USED(sess);
+   RTE_SET_USED(infl_req);
+   RTE_SET_USED(inst);
+
+   return -ENOTSUP;
+}
+
+static inline int
+cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],
+   struct cpt_inst_s inst[], struct cpt_inflight_req *infl_req)
+{
+   struct rte_crypto_sym_op *sym_op;
+   struct cnxk_se_sess *sess;
+   struct rte_crypto_op *op;
+   uint64_t w7;
+   int ret;
+
+   op = ops[0];
+
+   inst[0].w0.u64 = 0;
+   inst[0].w2.u64 = 0;
+   inst[0].w3.u64 = 0;
+
+   sym_op = op->sym;
+
+   if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+   if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
+   sess = get_sym_session_private_data(
+   sym_op->session, cn10k_cryptodev_driver_id);
+   ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
+   &inst[0]);
+   if (unlikely(ret))
+   return 0;
+   w7 = sess->cpt_inst_w7;
+   } else {
+   sess = cn10k_cpt_sym_temp_sess_create(qp, op);
+   if (unlikely(sess == NULL)) {
+   CPT_LOG_DP_ERR("Could not create temp session");
+   return 0;
+   }
+
+   ret = cpt_sym_inst_fill(qp, op, sess, infl_req,
+   &inst[0]);
+   if (unlikely(ret)) {
+   sym_session_clear(cn10k_cryptodev_driver_id,
+ op->sym->session);
+   rte_mempool_put(qp->sess_mp, op->sym->session);
+   return 0;
+   }
+   w7 = sess->cpt_inst_w7;
+   }
+   } else {
+   CPT_LOG_DP_ERR("Unsupported op type");
+   return 0;
+   }
+
+   inst[0].res_addr = (uint64_t)&infl_req->res;
+   infl_req->res.cn10k.compcode = CPT_COMP_NOT_DONE;
+   infl_req->cop = op;
+
+   inst[0].w7.u64 = w7;
+
+   return 1;
+}
+
+#define PKTS_PER_LOOP  32
+#define PKTS_PER_STEORL 16
+
+static uint16_t
+cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t 
nb_ops)
+

[dpdk-dev] [PATCH 08/20] crypto/cnxk: add dequeue burst op

[Anoob Joseph]

Add dequeue_burst op in cn9k & cn10k.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini  |   3 +
 doc/guides/cryptodevs/features/cn9k.ini   |   3 +
 drivers/crypto/cnxk/cn10k_cryptodev.c |   4 ++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 105 ++
 drivers/crypto/cnxk/cn9k_cryptodev.c  |   4 ++
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 103 +
 6 files changed, 222 insertions(+)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index 0aa097d..7f433fa 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -4,6 +4,9 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Symmetric crypto   = Y
+HW Accelerated = Y
+Symmetric sessionless  = Y
 
 ;
 ; Supported crypto algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index 64ee929..9c9d54d 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -4,6 +4,9 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Symmetric crypto   = Y
+HW Accelerated = Y
+Symmetric sessionless  = Y
 
 ;
 ; Supported crypto algorithms of 'cn9k' crypto driver.
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index a34dbbf..2abd396 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -79,6 +79,10 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
 
cnxk_cpt_caps_populate(vf);
 
+   dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+RTE_CRYPTODEV_FF_HW_ACCELERATED |
+RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+
cn10k_cpt_set_enqdeq_fns(dev);
 
return 0;
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index afdd43c..83b24c9 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -190,10 +190,115 @@ cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op 
**ops, uint16_t nb_ops)
return count + i;
 }
 
+static inline void
+cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
+  struct rte_crypto_op *cop,
+  struct cpt_inflight_req *infl_req)
+{
+   struct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;
+   unsigned int sz;
+
+   if (likely(res->compcode == CPT_COMP_GOOD ||
+  res->compcode == CPT_COMP_WARN)) {
+   if (unlikely(res->uc_compcode)) {
+   cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+
+   CPT_LOG_DP_DEBUG("Request failed with microcode error");
+   CPT_LOG_DP_DEBUG("MC completion code 0x%x",
+res->uc_compcode);
+   goto temp_sess_free;
+   }
+
+   cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+   } else {
+   cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+   CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
+
+   switch (res->compcode) {
+   case CPT_COMP_INSTERR:
+   CPT_LOG_DP_ERR("Request failed with instruction error");
+   break;
+   case CPT_COMP_FAULT:
+   CPT_LOG_DP_ERR("Request failed with DMA fault");
+   break;
+   case CPT_COMP_HWERR:
+   CPT_LOG_DP_ERR("Request failed with hardware error");
+   break;
+   default:
+   CPT_LOG_DP_ERR(
+   "Request failed with unknown completion code");
+   }
+   }
+
+temp_sess_free:
+   if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
+   if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+   sym_session_clear(cn10k_cryptodev_driver_id,
+ cop->sym->session);
+   sz = rte_cryptodev_sym_get_existing_header_session_size(
+   cop->sym->session);
+   memset(cop->sym->session, 0, sz);
+   rte_mempool_put(qp->sess_mp, cop->sym->session);
+   cop->sym->session = NULL;
+   }
+   }
+}
+
+static uint16_t
+cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t 
nb_ops)
+{
+   struct cpt_inflight_req *infl_req;
+   struct cnxk_cpt_qp *qp = qptr;
+   struct pending_queue *pend_q;
+   struct cpt_cn

[dpdk-dev] [PATCH 09/20] crypto/cnxk: add cipher operation in session

[Anoob Joseph]

Add support for cipher operation in session.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c |   3 +
 drivers/crypto/cnxk/cnxk_se.h| 386 +++
 2 files changed, 389 insertions(+)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index c2e07cf..4e29396 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -441,6 +441,9 @@ sym_session_configure(struct roc_cpt *roc_cpt, int 
driver_id,
sess_priv = priv;
 
switch (ret) {
+   case CNXK_CPT_CIPHER:
+   ret = fill_sess_cipher(xform, sess_priv);
+   break;
default:
ret = -1;
}
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 9cccab0..f14016c 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -28,4 +28,390 @@ struct cnxk_se_sess {
struct roc_se_ctx roc_se_ctx;
 } __rte_cache_aligned;
 
+static uint8_t zuc_d[32] = {0x44, 0xD7, 0x26, 0xBC, 0x62, 0x6B, 0x13, 0x5E,
+   0x57, 0x89, 0x35, 0xE2, 0x71, 0x35, 0x09, 0xAF,
+   0x4D, 0x78, 0x2F, 0x13, 0x6B, 0xC4, 0x1A, 0xF1,
+   0x5E, 0x26, 0x3C, 0x4D, 0x78, 0x9A, 0x47, 0xAC};
+
+static __rte_always_inline void
+gen_key_snow3g(const uint8_t *ck, uint32_t *keyx)
+{
+   int i, base;
+
+   for (i = 0; i < 4; i++) {
+   base = 4 * i;
+   keyx[3 - i] = (ck[base] << 24) | (ck[base + 1] << 16) |
+ (ck[base + 2] << 8) | (ck[base + 3]);
+   keyx[3 - i] = rte_cpu_to_be_32(keyx[3 - i]);
+   }
+}
+
+static __rte_always_inline void
+cpt_fc_salt_update(struct roc_se_ctx *se_ctx, uint8_t *salt)
+{
+   struct roc_se_context *fctx = &se_ctx->se_ctx.fctx;
+   memcpy(fctx->enc.encr_iv, salt, 4);
+}
+
+static __rte_always_inline int
+cpt_fc_ciph_validate_key_aes(uint16_t key_len)
+{
+   switch (key_len) {
+   case 16:
+   case 24:
+   case 32:
+   return 0;
+   default:
+   return -1;
+   }
+}
+
+static __rte_always_inline int
+cpt_fc_ciph_set_type(roc_se_cipher_type type, struct roc_se_ctx *ctx,
+uint16_t key_len)
+{
+   int fc_type = 0;
+   switch (type) {
+   case ROC_SE_PASSTHROUGH:
+   fc_type = ROC_SE_FC_GEN;
+   break;
+   case ROC_SE_DES3_CBC:
+   case ROC_SE_DES3_ECB:
+   fc_type = ROC_SE_FC_GEN;
+   break;
+   case ROC_SE_AES_CBC:
+   case ROC_SE_AES_ECB:
+   case ROC_SE_AES_CFB:
+   case ROC_SE_AES_CTR:
+   case ROC_SE_AES_GCM:
+   if (unlikely(cpt_fc_ciph_validate_key_aes(key_len) != 0))
+   return -1;
+   fc_type = ROC_SE_FC_GEN;
+   break;
+   case ROC_SE_CHACHA20:
+   fc_type = ROC_SE_FC_GEN;
+   break;
+   case ROC_SE_AES_XTS:
+   key_len = key_len / 2;
+   if (unlikely(key_len == 24)) {
+   CPT_LOG_DP_ERR("Invalid AES key len for XTS");
+   return -1;
+   }
+   if (unlikely(cpt_fc_ciph_validate_key_aes(key_len) != 0))
+   return -1;
+   fc_type = ROC_SE_FC_GEN;
+   break;
+   case ROC_SE_ZUC_EEA3:
+   case ROC_SE_SNOW3G_UEA2:
+   if (unlikely(key_len != 16))
+   return -1;
+   /* No support for AEAD yet */
+   if (unlikely(ctx->hash_type))
+   return -1;
+   fc_type = ROC_SE_PDCP;
+   break;
+   case ROC_SE_KASUMI_F8_CBC:
+   case ROC_SE_KASUMI_F8_ECB:
+   if (unlikely(key_len != 16))
+   return -1;
+   /* No support for AEAD yet */
+   if (unlikely(ctx->hash_type))
+   return -1;
+   fc_type = ROC_SE_KASUMI;
+   break;
+   default:
+   return -1;
+   }
+
+   ctx->fc_type = fc_type;
+   return 0;
+}
+
+static __rte_always_inline void
+cpt_fc_ciph_set_key_passthrough(struct roc_se_ctx *se_ctx,
+   struct roc_se_context *fctx)
+{
+   se_ctx->enc_cipher = 0;
+   fctx->enc.enc_cipher = 0;
+}
+
+static __rte_always_inline void
+cpt_fc_ciph_set_key_set_aes_key_type(struct roc_se_context *fctx,
+uint16_t key_len)
+{
+   roc_se_aes_type aes_key_type = 0;
+   switch (key_len) {
+   case 16:
+   aes_key_type = ROC_SE_AES_128_BIT;
+   break;
+   case 24:
+   aes_key_type = ROC_SE_AES_192_BIT;
+   break;
+   case 32:
+   aes_key_ty

[dpdk-dev] [PATCH 10/20] crypto/cnxk: add auth operation in session

[Anoob Joseph]

Add support for auth operations in session.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c |  13 ++
 drivers/crypto/cnxk/cnxk_se.h| 283 +++
 2 files changed, 296 insertions(+)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 4e29396..f060763 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -444,6 +444,12 @@ sym_session_configure(struct roc_cpt *roc_cpt, int 
driver_id,
case CNXK_CPT_CIPHER:
ret = fill_sess_cipher(xform, sess_priv);
break;
+   case CNXK_CPT_AUTH:
+   if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
+   ret = fill_sess_gmac(xform, sess_priv);
+   else
+   ret = fill_sess_auth(xform, sess_priv);
+   break;
default:
ret = -1;
}
@@ -451,6 +457,13 @@ sym_session_configure(struct roc_cpt *roc_cpt, int 
driver_id,
if (ret)
goto priv_put;
 
+   if ((sess_priv->roc_se_ctx.fc_type == ROC_SE_HASH_HMAC) &&
+   cpt_mac_len_verify(&xform->auth)) {
+   CPT_LOG_DP_ERR("MAC length is not supported");
+   ret = -ENOTSUP;
+   goto priv_put;
+   }
+
sess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt);
 
set_sym_session_private_data(sess, driver_id, sess_priv);
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index f14016c..2f406f6 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -46,6 +46,47 @@ gen_key_snow3g(const uint8_t *ck, uint32_t *keyx)
}
 }
 
+static __rte_always_inline int
+cpt_mac_len_verify(struct rte_crypto_auth_xform *auth)
+{
+   uint16_t mac_len = auth->digest_length;
+   int ret;
+
+   switch (auth->algo) {
+   case RTE_CRYPTO_AUTH_MD5:
+   case RTE_CRYPTO_AUTH_MD5_HMAC:
+   ret = (mac_len == 16) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_SHA1:
+   case RTE_CRYPTO_AUTH_SHA1_HMAC:
+   ret = (mac_len == 20) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_SHA224:
+   case RTE_CRYPTO_AUTH_SHA224_HMAC:
+   ret = (mac_len == 28) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_SHA256:
+   case RTE_CRYPTO_AUTH_SHA256_HMAC:
+   ret = (mac_len == 32) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_SHA384:
+   case RTE_CRYPTO_AUTH_SHA384_HMAC:
+   ret = (mac_len == 48) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_SHA512:
+   case RTE_CRYPTO_AUTH_SHA512_HMAC:
+   ret = (mac_len == 64) ? 0 : -1;
+   break;
+   case RTE_CRYPTO_AUTH_NULL:
+   ret = 0;
+   break;
+   default:
+   ret = -1;
+   }
+
+   return ret;
+}
+
 static __rte_always_inline void
 cpt_fc_salt_update(struct roc_se_ctx *se_ctx, uint8_t *salt)
 {
@@ -308,6 +349,95 @@ cpt_fc_ciph_set_key(struct roc_se_ctx *se_ctx, 
roc_se_cipher_type type,
 }
 
 static __rte_always_inline int
+cpt_fc_auth_set_key(struct roc_se_ctx *se_ctx, roc_se_auth_type type,
+   const uint8_t *key, uint16_t key_len, uint16_t mac_len)
+{
+   struct roc_se_zuc_snow3g_ctx *zs_ctx;
+   struct roc_se_kasumi_ctx *k_ctx;
+   struct roc_se_context *fctx;
+
+   if (se_ctx == NULL)
+   return -1;
+
+   zs_ctx = &se_ctx->se_ctx.zs_ctx;
+   k_ctx = &se_ctx->se_ctx.k_ctx;
+   fctx = &se_ctx->se_ctx.fctx;
+
+   if ((type >= ROC_SE_ZUC_EIA3) && (type <= ROC_SE_KASUMI_F9_ECB)) {
+   uint32_t keyx[4];
+
+   if (key_len != 16)
+   return -1;
+   /* No support for AEAD yet */
+   if (se_ctx->enc_cipher)
+   return -1;
+   /* For ZUC/SNOW3G/Kasumi */
+   switch (type) {
+   case ROC_SE_SNOW3G_UIA2:
+   se_ctx->pdcp_alg_type = ROC_SE_PDCP_ALG_TYPE_SNOW3G;
+   gen_key_snow3g(key, keyx);
+   memcpy(zs_ctx->ci_key, keyx, key_len);
+   se_ctx->fc_type = ROC_SE_PDCP;
+   se_ctx->zsk_flags = 0x1;
+   break;
+   case ROC_SE_ZUC_EIA3:
+   se_ctx->pdcp_alg_type = ROC_SE_PDCP_ALG_TYPE_ZUC;
+   memcpy(zs_ctx->ci_key, key, key_len);
+   memcpy(zs_ctx->zuc_const, zuc_d, 32);
+   se_ctx->fc_type = ROC_SE_PDCP;
+   se_ctx->zsk_flags = 0x1;
+   break;
+   case ROC_SE_KASUMI_F9_ECB:
+   /* Kasumi ECB mode */
+  

[dpdk-dev] [PATCH 11/20] crypto/cnxk: add aead operation in session

[Anoob Joseph]

From: Archana Muniganti 

Add support for AEAD operations in session.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c |  3 ++
 drivers/crypto/cnxk/cnxk_se.h| 65 
 2 files changed, 68 insertions(+)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index f060763..3cc3b4d 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -450,6 +450,9 @@ sym_session_configure(struct roc_cpt *roc_cpt, int 
driver_id,
else
ret = fill_sess_auth(xform, sess_priv);
break;
+   case CNXK_CPT_AEAD:
+   ret = fill_sess_aead(xform, sess_priv);
+   break;
default:
ret = -1;
}
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 2f406f6..c522d2e 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -438,6 +438,71 @@ cpt_fc_auth_set_key(struct roc_se_ctx *se_ctx, 
roc_se_auth_type type,
 }
 
 static __rte_always_inline int
+fill_sess_aead(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
+{
+   struct rte_crypto_aead_xform *aead_form;
+   roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
+   roc_se_auth_type auth_type = 0;  /* NULL Auth type */
+   uint32_t cipher_key_len = 0;
+   uint8_t aes_gcm = 0;
+   aead_form = &xform->aead;
+
+   if (aead_form->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) {
+   sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT;
+   sess->cpt_op |= ROC_SE_OP_AUTH_GENERATE;
+   } else if (aead_form->op == RTE_CRYPTO_AEAD_OP_DECRYPT) {
+   sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT;
+   sess->cpt_op |= ROC_SE_OP_AUTH_VERIFY;
+   } else {
+   CPT_LOG_DP_ERR("Unknown aead operation\n");
+   return -1;
+   }
+   switch (aead_form->algo) {
+   case RTE_CRYPTO_AEAD_AES_GCM:
+   enc_type = ROC_SE_AES_GCM;
+   cipher_key_len = 16;
+   aes_gcm = 1;
+   break;
+   case RTE_CRYPTO_AEAD_AES_CCM:
+   CPT_LOG_DP_ERR("Crypto: Unsupported cipher algo %u",
+  aead_form->algo);
+   return -1;
+   case RTE_CRYPTO_AEAD_CHACHA20_POLY1305:
+   enc_type = ROC_SE_CHACHA20;
+   auth_type = ROC_SE_POLY1305;
+   cipher_key_len = 32;
+   sess->chacha_poly = 1;
+   break;
+   default:
+   CPT_LOG_DP_ERR("Crypto: Undefined cipher algo %u specified",
+  aead_form->algo);
+   return -1;
+   }
+   if (aead_form->key.length < cipher_key_len) {
+   CPT_LOG_DP_ERR("Invalid cipher params keylen %u",
+  aead_form->key.length);
+   return -1;
+   }
+   sess->zsk_flag = 0;
+   sess->aes_gcm = aes_gcm;
+   sess->mac_len = aead_form->digest_length;
+   sess->iv_offset = aead_form->iv.offset;
+   sess->iv_length = aead_form->iv.length;
+   sess->aad_length = aead_form->aad_length;
+
+   if (unlikely(cpt_fc_ciph_set_key(&sess->roc_se_ctx, enc_type,
+aead_form->key.data,
+aead_form->key.length, NULL)))
+   return -1;
+
+   if (unlikely(cpt_fc_auth_set_key(&sess->roc_se_ctx, auth_type, NULL, 0,
+aead_form->digest_length)))
+   return -1;
+
+   return 0;
+}
+
+static __rte_always_inline int
 fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
 {
struct rte_crypto_cipher_xform *c_form;
-- 
2.7.4

[dpdk-dev] [PATCH 12/20] crypto/cnxk: add chained operation in session

[Anoob Joseph]

From: Archana Muniganti 

Add support for chained operations in session.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini |  2 ++
 doc/guides/cryptodevs/features/cn9k.ini  |  2 ++
 drivers/crypto/cnxk/cn10k_cryptodev.c|  4 +++-
 drivers/crypto/cnxk/cn9k_cryptodev.c |  4 +++-
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 14 ++
 5 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index 7f433fa..175fbf7 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -5,8 +5,10 @@
 ;
 [Features]
 Symmetric crypto   = Y
+Sym operation chaining = Y
 HW Accelerated = Y
 Symmetric sessionless  = Y
+Digest encrypted   = Y
 
 ;
 ; Supported crypto algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index 9c9d54d..c22b25c 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -5,8 +5,10 @@
 ;
 [Features]
 Symmetric crypto   = Y
+Sym operation chaining = Y
 HW Accelerated = Y
 Symmetric sessionless  = Y
+Digest encrypted   = Y
 
 ;
 ; Supported crypto algorithms of 'cn9k' crypto driver.
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index 2abd396..4d20409 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -81,7 +81,9 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
 
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 RTE_CRYPTODEV_FF_HW_ACCELERATED |
-RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
 
cn10k_cpt_set_enqdeq_fns(dev);
 
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c 
b/drivers/crypto/cnxk/cn9k_cryptodev.c
index db61175..f629dac 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c
@@ -79,7 +79,9 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
 
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 RTE_CRYPTODEV_FF_HW_ACCELERATED |
-RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
 
cn9k_cpt_set_enqdeq_fns(dev);
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 3cc3b4d..3b7cd44 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -453,6 +453,20 @@ sym_session_configure(struct roc_cpt *roc_cpt, int 
driver_id,
case CNXK_CPT_AEAD:
ret = fill_sess_aead(xform, sess_priv);
break;
+   case CNXK_CPT_CIPHER_ENC_AUTH_GEN:
+   case CNXK_CPT_CIPHER_DEC_AUTH_VRFY:
+   ret = fill_sess_cipher(xform, sess_priv);
+   if (ret < 0)
+   break;
+   ret = fill_sess_auth(xform->next, sess_priv);
+   break;
+   case CNXK_CPT_AUTH_VRFY_CIPHER_DEC:
+   case CNXK_CPT_AUTH_GEN_CIPHER_ENC:
+   ret = fill_sess_auth(xform, sess_priv);
+   if (ret < 0)
+   break;
+   ret = fill_sess_cipher(xform->next, sess_priv);
+   break;
default:
ret = -1;
}
-- 
2.7.4

[dpdk-dev] [PATCH 13/20] crypto/cnxk: add flexi crypto cipher encrypt

[Anoob Joseph]

From: Archana Muniganti 

Add flexi crypto cipher encrypt in enqueue API. Flexi crypto
opcode covers a broad set of ciphers including variants of AES.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini  |  16 +
 doc/guides/cryptodevs/features/cn9k.ini   |  20 +
 drivers/crypto/cnxk/cn10k_cryptodev.c |   4 +
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  14 +-
 drivers/crypto/cnxk/cn9k_cryptodev.c  |   4 +
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  14 +-
 drivers/crypto/cnxk/cnxk_se.h | 815 ++
 7 files changed, 875 insertions(+), 12 deletions(-)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index 175fbf7..f097d8e 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -7,6 +7,10 @@
 Symmetric crypto   = Y
 Sym operation chaining = Y
 HW Accelerated = Y
+In Place SGL   = Y
+OOP SGL In LB  Out = Y
+OOP SGL In SGL Out = Y
+OOP LB  In LB  Out = Y
 Symmetric sessionless  = Y
 Digest encrypted   = Y
 
@@ -14,6 +18,18 @@ Digest encrypted   = Y
 ; Supported crypto algorithms of 'cn10k' crypto driver.
 ;
 [Cipher]
+NULL   = Y
+3DES CBC   = Y
+3DES ECB   = Y
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+AES CTR (128)  = Y
+AES CTR (192)  = Y
+AES CTR (256)  = Y
+AES XTS (128)  = Y
+AES XTS (256)  = Y
+DES CBC= Y
 
 ;
 ; Supported authentication algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index c22b25c..7007d11 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -7,6 +7,10 @@
 Symmetric crypto   = Y
 Sym operation chaining = Y
 HW Accelerated = Y
+In Place SGL   = Y
+OOP SGL In LB  Out = Y
+OOP SGL In SGL Out = Y
+OOP LB  In LB  Out = Y
 Symmetric sessionless  = Y
 Digest encrypted   = Y
 
@@ -14,6 +18,18 @@ Digest encrypted   = Y
 ; Supported crypto algorithms of 'cn9k' crypto driver.
 ;
 [Cipher]
+NULL   = Y
+3DES CBC   = Y
+3DES ECB   = Y
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+AES CTR (128)  = Y
+AES CTR (192)  = Y
+AES CTR (256)  = Y
+AES XTS (128)  = Y
+AES XTS (256)  = Y
+DES CBC= Y
 
 ;
 ; Supported authentication algorithms of 'cn9k' crypto driver.
@@ -24,3 +40,7 @@ Digest encrypted   = Y
 ; Supported AEAD algorithms of 'cn9k' crypto driver.
 ;
 [AEAD]
+AES GCM (128) = Y
+AES GCM (192) = Y
+AES GCM (256) = Y
+CHACHA20-POLY1305 = Y
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index 4d20409..ca3adea 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -82,6 +82,10 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 RTE_CRYPTODEV_FF_HW_ACCELERATED |
 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
+RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
 RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
 RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
 
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 83b24c9..b0faebc 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -46,13 +46,15 @@ cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op,
  struct cnxk_se_sess *sess, struct cpt_inflight_req *infl_req,
  struct cpt_inst_s *inst)
 {
-   RTE_SET_USED(qp);
-   RTE_SET_USED(op);
-   RTE_SET_USED(sess);
-   RTE_SET_USED(infl_req);
-   RTE_SET_USED(inst);
+   uint64_t cpt_op;
+   int ret;
+
+   cpt_op = sess->cpt_op;
+
+   if (cpt_op & ROC_SE_OP_CIPHER_MASK)
+   ret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst);
 
-   return -ENOTSUP;
+   return ret;
 }
 
 static inline int
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c 
b/drivers/crypto/cnxk/cn9k_cryptodev.c
index f629dac..ffa01a2 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c
@@ -80,6 +80,10 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 RTE_CRYPTODEV_FF_HW_ACCELERATED |
 RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+

[dpdk-dev] [PATCH 14/20] crypto/cnxk: add flexi crypto cipher decrypt

[Anoob Joseph]

From: Archana Muniganti 

Add flexi crypto cipher decrypt support in enqueue API. Flexi crypto
opcode covers a broad set of ciphers including variants of AES.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_se.h | 328 +-
 1 file changed, 327 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 34ed75a..6b2e82d 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -789,6 +789,331 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, 
uint64_t d_lens,
 }
 
 static __rte_always_inline int
+cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
+ struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)
+{
+   uint32_t iv_offset = 0, size;
+   int32_t inputlen, outputlen, enc_dlen, auth_dlen;
+   struct roc_se_ctx *se_ctx;
+   int32_t hash_type, mac_len;
+   uint8_t iv_len = 16;
+   struct roc_se_buf_ptr *aad_buf = NULL;
+   uint32_t encr_offset, auth_offset;
+   uint32_t encr_data_len, auth_data_len, aad_len = 0;
+   uint32_t passthrough_len = 0;
+   union cpt_inst_w4 cpt_inst_w4;
+   void *offset_vaddr;
+   uint8_t op_minor;
+
+   encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
+   auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
+   encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
+   auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
+
+   if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
+   /*
+* We dont support both aad
+* and auth data separately
+*/
+   auth_data_len = 0;
+   auth_offset = 0;
+   aad_len = fc_params->aad_buf.size;
+   aad_buf = &fc_params->aad_buf;
+   }
+
+   se_ctx = fc_params->ctx_buf.vaddr;
+   hash_type = se_ctx->hash_type;
+   mac_len = se_ctx->mac_len;
+   op_minor = se_ctx->template_w4.s.opcode_minor;
+
+   if (unlikely(!(flags & ROC_SE_VALID_IV_BUF))) {
+   iv_len = 0;
+   iv_offset = ROC_SE_ENCR_IV_OFFSET(d_offs);
+   }
+
+   if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
+   /*
+* When AAD is given, data above encr_offset is pass through
+* Since AAD is given as separate pointer and not as offset,
+* this is a special case as we need to fragment input data
+* into passthrough + encr_data and then insert AAD in between.
+*/
+   if (hash_type != ROC_SE_GMAC_TYPE) {
+   passthrough_len = encr_offset;
+   auth_offset = passthrough_len + iv_len;
+   encr_offset = passthrough_len + aad_len + iv_len;
+   auth_data_len = aad_len + encr_data_len;
+   } else {
+   passthrough_len = 16 + aad_len;
+   auth_offset = passthrough_len + iv_len;
+   auth_data_len = aad_len;
+   }
+   } else {
+   encr_offset += iv_len;
+   auth_offset += iv_len;
+   }
+
+   /* Decryption */
+   cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_FC;
+   cpt_inst_w4.s.opcode_minor = ROC_SE_FC_MINOR_OP_DECRYPT;
+   cpt_inst_w4.s.opcode_minor |= (uint64_t)op_minor;
+
+   if (hash_type == ROC_SE_GMAC_TYPE) {
+   encr_offset = 0;
+   encr_data_len = 0;
+   }
+
+   enc_dlen = encr_offset + encr_data_len;
+   auth_dlen = auth_offset + auth_data_len;
+
+   if (auth_dlen > enc_dlen) {
+   inputlen = auth_dlen + mac_len;
+   outputlen = auth_dlen;
+   } else {
+   inputlen = enc_dlen + mac_len;
+   outputlen = enc_dlen;
+   }
+
+   if (op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST)
+   outputlen = inputlen = enc_dlen;
+
+   cpt_inst_w4.s.param1 = encr_data_len;
+   cpt_inst_w4.s.param2 = auth_data_len;
+
+   /*
+* In cn9k, cn10k since we have a limitation of
+* IV & Offset control word not part of instruction
+* and need to be part of Data Buffer, we check if
+* head room is there and then only do the Direct mode processing
+*/
+   if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) &&
+  (flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
+   void *dm_vaddr = fc_params->bufs[0].vaddr;
+
+   /* Use Direct mode */
+
+   offset_vaddr =
+   (uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;
+   inst->dptr = (uint64_t)offset_vaddr;
+
+   /* RPTR should just exclude offset control word */
+   inst->rptr = (uint64_t)dm_vaddr - iv_len;
+
+   cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
+
+  

[dpdk-dev] [PATCH 15/20] crypto/cnxk: add ZUC and SNOW3G encrypt

[Anoob Joseph]

From: Archana Muniganti 

Add PDCP opcode which handles ZUC and SNOW3G.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini |   2 +
 doc/guides/cryptodevs/features/cn9k.ini  |   2 +
 drivers/crypto/cnxk/cnxk_se.h| 270 ++-
 3 files changed, 273 insertions(+), 1 deletion(-)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index f097d8e..8f20d07 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -30,6 +30,8 @@ AES CTR (256)  = Y
 AES XTS (128)  = Y
 AES XTS (256)  = Y
 DES CBC= Y
+SNOW3G UEA2= Y
+ZUC EEA3   = Y
 
 ;
 ; Supported authentication algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index 7007d11..fb0c09b 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -30,6 +30,8 @@ AES CTR (256)  = Y
 AES XTS (128)  = Y
 AES XTS (256)  = Y
 DES CBC= Y
+SNOW3G UEA2= Y
+ZUC EEA3   = Y
 
 ;
 ; Supported authentication algorithms of 'cn9k' crypto driver.
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 6b2e82d..d24b2f3 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -1098,6 +1098,270 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, 
uint64_t d_lens,
 }
 
 static __rte_always_inline int
+cpt_zuc_snow3g_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
+   struct roc_se_fc_params *params,
+   struct cpt_inst_s *inst)
+{
+   uint32_t size;
+   int32_t inputlen, outputlen;
+   struct roc_se_ctx *se_ctx;
+   uint32_t mac_len = 0;
+   uint8_t pdcp_alg_type, j;
+   uint32_t encr_offset = 0, auth_offset = 0;
+   uint32_t encr_data_len = 0, auth_data_len = 0;
+   int flags, iv_len = 16;
+   uint64_t offset_ctrl;
+   uint64_t *offset_vaddr;
+   uint32_t *iv_s, iv[4];
+   union cpt_inst_w4 cpt_inst_w4;
+
+   se_ctx = params->ctx_buf.vaddr;
+   flags = se_ctx->zsk_flags;
+   mac_len = se_ctx->mac_len;
+   pdcp_alg_type = se_ctx->pdcp_alg_type;
+
+   cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_ZUC_SNOW3G;
+
+   /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
+
+   cpt_inst_w4.s.opcode_minor = ((1 << 7) | (pdcp_alg_type << 5) |
+ (0 << 4) | (0 << 3) | (flags & 0x7));
+
+   if (flags == 0x1) {
+   /*
+* Microcode expects offsets in bytes
+* TODO: Rounding off
+*/
+   auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
+
+   /* EIA3 or UIA2 */
+   auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
+   auth_offset = auth_offset / 8;
+
+   /* consider iv len */
+   auth_offset += iv_len;
+
+   inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);
+   outputlen = mac_len;
+
+   offset_ctrl = rte_cpu_to_be_64((uint64_t)auth_offset);
+
+   } else {
+   /* EEA3 or UEA2 */
+   /*
+* Microcode expects offsets in bytes
+* TODO: Rounding off
+*/
+   encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
+
+   encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
+   encr_offset = encr_offset / 8;
+   /* consider iv len */
+   encr_offset += iv_len;
+
+   inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);
+   outputlen = inputlen;
+
+   /* iv offset is 0 */
+   offset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);
+   }
+
+   if (unlikely((encr_offset >> 16) || (auth_offset >> 8))) {
+   CPT_LOG_DP_ERR("Offset not supported");
+   CPT_LOG_DP_ERR("enc_offset: %d", encr_offset);
+   CPT_LOG_DP_ERR("auth_offset: %d", auth_offset);
+   return -1;
+   }
+
+   /* IV */
+   iv_s = (flags == 0x1) ? params->auth_iv_buf : params->iv_buf;
+
+   if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) {
+   /*
+* DPDK seems to provide it in form of IV3 IV2 IV1 IV0
+* and BigEndian, MC needs it as IV0 IV1 IV2 IV3
+*/
+
+   for (j = 0; j < 4; j++)
+   iv[j] = iv_s[3 - j];
+   } else {
+   /* ZUC doesn't need a swap */
+   for (j = 0; j < 4; j++)
+   iv[j] = iv_s[j];
+   }
+
+   /*
+* GP op header, lengths are expected in bits.
+*/
+   cpt_inst_w4.s.param1 = encr_data_len;
+   cpt_inst_w4.s.param2 = auth_data_len;
+
+   /

[dpdk-dev] [PATCH 16/20] crypto/cnxk: add ZUC and SNOW3G decrypt

[Anoob Joseph]

From: Tejasree Kondoj 

Add PDCP opcode which handles ZUC and SNOW3G.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_se.h | 209 +-
 1 file changed, 208 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index d24b2f3..b23fbd6 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -1362,6 +1362,209 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, uint64_t 
d_offs, uint64_t d_lens,
 }
 
 static __rte_always_inline int
+cpt_zuc_snow3g_dec_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
+   struct roc_se_fc_params *params,
+   struct cpt_inst_s *inst)
+{
+   uint32_t size;
+   int32_t inputlen = 0, outputlen;
+   struct roc_se_ctx *se_ctx;
+   uint8_t pdcp_alg_type, iv_len = 16;
+   uint32_t encr_offset;
+   uint32_t encr_data_len;
+   int flags;
+   uint64_t *offset_vaddr;
+   uint32_t *iv_s, iv[4], j;
+   union cpt_inst_w4 cpt_inst_w4;
+
+   /*
+* Microcode expects offsets in bytes
+* TODO: Rounding off
+*/
+   encr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8;
+   encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
+
+   se_ctx = params->ctx_buf.vaddr;
+   flags = se_ctx->zsk_flags;
+   pdcp_alg_type = se_ctx->pdcp_alg_type;
+
+   cpt_inst_w4.u64 = 0;
+   cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_ZUC_SNOW3G;
+
+   /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
+
+   cpt_inst_w4.s.opcode_minor = ((1 << 7) | (pdcp_alg_type << 5) |
+ (0 << 4) | (0 << 3) | (flags & 0x7));
+
+   /* consider iv len */
+   encr_offset += iv_len;
+
+   inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);
+   outputlen = inputlen;
+
+   /* IV */
+   iv_s = params->iv_buf;
+   if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) {
+   /*
+* DPDK seems to provide it in form of IV3 IV2 IV1 IV0
+* and BigEndian, MC needs it as IV0 IV1 IV2 IV3
+*/
+
+   for (j = 0; j < 4; j++)
+   iv[j] = iv_s[3 - j];
+   } else {
+   /* ZUC doesn't need a swap */
+   for (j = 0; j < 4; j++)
+   iv[j] = iv_s[j];
+   }
+
+   /*
+* GP op header, lengths are expected in bits.
+*/
+   cpt_inst_w4.s.param1 = encr_data_len;
+
+   /*
+* In cn9k, cn10k since we have a limitation of
+* IV & Offset control word not part of instruction
+* and need to be part of Data Buffer, we check if
+* head room is there and then only do the Direct mode processing
+*/
+   if (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) &&
+  (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
+   void *dm_vaddr = params->bufs[0].vaddr;
+
+   /* Use Direct mode */
+
+   offset_vaddr = (uint64_t *)((uint8_t *)dm_vaddr -
+   ROC_SE_OFF_CTRL_LEN - iv_len);
+
+   /* DPTR */
+   inst->dptr = (uint64_t)offset_vaddr;
+
+   /* RPTR should just exclude offset control word */
+   inst->rptr = (uint64_t)dm_vaddr - iv_len;
+
+   cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
+
+   if (likely(iv_len)) {
+   uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr +
+ ROC_SE_OFF_CTRL_LEN);
+   memcpy(iv_d, iv, 16);
+   }
+
+   /* iv offset is 0 */
+   *offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16);
+   } else {
+   void *m_vaddr = params->meta_buf.vaddr;
+   uint32_t i, g_size_bytes, s_size_bytes;
+   struct roc_se_sglist_comp *gather_comp;
+   struct roc_se_sglist_comp *scatter_comp;
+   uint8_t *in_buffer;
+   uint32_t *iv_d;
+
+   /* save space for offset and iv... */
+   offset_vaddr = m_vaddr;
+
+   m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;
+
+   cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
+
+   /* DPTR has SG list */
+   in_buffer = m_vaddr;
+
+   ((uint16_t *)in_buffer)[0] = 0;
+   ((uint16_t *)in_buffer)[1] = 0;
+
+   /* TODO Add error check if space will be sufficient */
+   gather_comp =
+   (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
+
+   /*
+* Input Gather List
+*/
+   i = 0;
+
+   /* Offset control word */
+
+ 

[dpdk-dev] [PATCH 17/20] crypto/cnxk: add KASUMI encrypt

[Anoob Joseph]

From: Tejasree Kondoj 

Add KASUMI encrypt support.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini |   1 +
 doc/guides/cryptodevs/features/cn9k.ini  |   1 +
 drivers/crypto/cnxk/cnxk_se.h| 196 +++
 3 files changed, 198 insertions(+)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index 8f20d07..23ec100 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -30,6 +30,7 @@ AES CTR (256)  = Y
 AES XTS (128)  = Y
 AES XTS (256)  = Y
 DES CBC= Y
+KASUMI F8  = Y
 SNOW3G UEA2= Y
 ZUC EEA3   = Y
 
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index fb0c09b..e833dc0 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -30,6 +30,7 @@ AES CTR (256)  = Y
 AES XTS (128)  = Y
 AES XTS (256)  = Y
 DES CBC= Y
+KASUMI F8  = Y
 SNOW3G UEA2= Y
 ZUC EEA3   = Y
 
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index b23fbd6..c0e5cff 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -1565,6 +1565,199 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, uint64_t 
d_offs, uint64_t d_lens,
 }
 
 static __rte_always_inline int
+cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
+   struct roc_se_fc_params *params, struct cpt_inst_s *inst)
+{
+   void *m_vaddr = params->meta_buf.vaddr;
+   uint32_t size;
+   int32_t inputlen = 0, outputlen = 0;
+   struct roc_se_ctx *se_ctx;
+   uint32_t mac_len = 0;
+   uint8_t i = 0;
+   uint32_t encr_offset, auth_offset;
+   uint32_t encr_data_len, auth_data_len;
+   int flags;
+   uint8_t *iv_s, *iv_d, iv_len = 8;
+   uint8_t dir = 0;
+   uint64_t *offset_vaddr;
+   union cpt_inst_w4 cpt_inst_w4;
+   uint8_t *in_buffer;
+   uint32_t g_size_bytes, s_size_bytes;
+   struct roc_se_sglist_comp *gather_comp;
+   struct roc_se_sglist_comp *scatter_comp;
+
+   encr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8;
+   auth_offset = ROC_SE_AUTH_OFFSET(d_offs) / 8;
+   encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
+   auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
+
+   se_ctx = params->ctx_buf.vaddr;
+   flags = se_ctx->zsk_flags;
+   mac_len = se_ctx->mac_len;
+
+   if (flags == 0x0)
+   iv_s = params->iv_buf;
+   else
+   iv_s = params->auth_iv_buf;
+
+   dir = iv_s[8] & 0x1;
+
+   cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_KASUMI | ROC_SE_DMA_MODE;
+
+   /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */
+   cpt_inst_w4.s.opcode_minor = ((1 << 6) | (se_ctx->k_ecb << 5) |
+ (dir << 4) | (0 << 3) | (flags & 0x7));
+
+   /*
+* GP op header, lengths are expected in bits.
+*/
+   cpt_inst_w4.s.param1 = encr_data_len;
+   cpt_inst_w4.s.param2 = auth_data_len;
+
+   /* consider iv len */
+   if (flags == 0x0) {
+   encr_offset += iv_len;
+   auth_offset += iv_len;
+   }
+
+   /* save space for offset ctrl and iv */
+   offset_vaddr = m_vaddr;
+
+   m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;
+
+   /* DPTR has SG list */
+   in_buffer = m_vaddr;
+
+   ((uint16_t *)in_buffer)[0] = 0;
+   ((uint16_t *)in_buffer)[1] = 0;
+
+   /* TODO Add error check if space will be sufficient */
+   gather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
+
+   /*
+* Input Gather List
+*/
+   i = 0;
+
+   /* Offset control word followed by iv */
+
+   if (flags == 0x0) {
+   inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);
+   outputlen = inputlen;
+   /* iv offset is 0 */
+   *offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16);
+   if (unlikely((encr_offset >> 16))) {
+   CPT_LOG_DP_ERR("Offset not supported");
+   CPT_LOG_DP_ERR("enc_offset: %d", encr_offset);
+   return -1;
+   }
+   } else {
+   inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);
+   outputlen = mac_len;
+   /* iv offset is 0 */
+   *offset_vaddr = rte_cpu_to_be_64((uint64_t)auth_offset);
+   if (unlikely((auth_offset >> 8))) {
+   CPT_LOG_DP_ERR("Offset not supported");
+   CPT_LOG_DP_ERR("auth_offset: %d", auth_offset);
+   return -1;
+   }
+   }
+
+   i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
+ROC

[dpdk-dev] [PATCH 18/20] crypto/cnxk: add KASUMI decrypt

[Anoob Joseph]

From: Tejasree Kondoj 

Add KASUMI decrypt support.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_se.h | 133 ++
 1 file changed, 133 insertions(+)

diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index c0e5cff..1bdd028 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -1758,6 +1758,137 @@ cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t 
d_offs, uint64_t d_lens,
 }
 
 static __rte_always_inline int
+cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t d_lens,
+   struct roc_se_fc_params *params, struct cpt_inst_s *inst)
+{
+   void *m_vaddr = params->meta_buf.vaddr;
+   uint32_t size;
+   int32_t inputlen = 0, outputlen;
+   struct roc_se_ctx *se_ctx;
+   uint8_t i = 0, iv_len = 8;
+   uint32_t encr_offset;
+   uint32_t encr_data_len;
+   int flags;
+   uint8_t dir = 0;
+   uint64_t *offset_vaddr;
+   union cpt_inst_w4 cpt_inst_w4;
+   uint8_t *in_buffer;
+   uint32_t g_size_bytes, s_size_bytes;
+   struct roc_se_sglist_comp *gather_comp;
+   struct roc_se_sglist_comp *scatter_comp;
+
+   encr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8;
+   encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
+
+   se_ctx = params->ctx_buf.vaddr;
+   flags = se_ctx->zsk_flags;
+
+   cpt_inst_w4.u64 = 0;
+   cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_KASUMI | ROC_SE_DMA_MODE;
+
+   /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */
+   cpt_inst_w4.s.opcode_minor = ((1 << 6) | (se_ctx->k_ecb << 5) |
+ (dir << 4) | (0 << 3) | (flags & 0x7));
+
+   /*
+* GP op header, lengths are expected in bits.
+*/
+   cpt_inst_w4.s.param1 = encr_data_len;
+
+   /* consider iv len */
+   encr_offset += iv_len;
+
+   inputlen = iv_len + (RTE_ALIGN(encr_data_len, 8) / 8);
+   outputlen = inputlen;
+
+   /* save space for offset ctrl & iv */
+   offset_vaddr = m_vaddr;
+
+   m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;
+
+   /* DPTR has SG list */
+   in_buffer = m_vaddr;
+
+   ((uint16_t *)in_buffer)[0] = 0;
+   ((uint16_t *)in_buffer)[1] = 0;
+
+   /* TODO Add error check if space will be sufficient */
+   gather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
+
+   /*
+* Input Gather List
+*/
+   i = 0;
+
+   /* Offset control word followed by iv */
+   *offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16);
+   if (unlikely((encr_offset >> 16))) {
+   CPT_LOG_DP_ERR("Offset not supported");
+   CPT_LOG_DP_ERR("enc_offset: %d", encr_offset);
+   return -1;
+   }
+
+   i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
+ROC_SE_OFF_CTRL_LEN + iv_len);
+
+   /* IV */
+   memcpy((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN, params->iv_buf,
+  iv_len);
+
+   /* Add input data */
+   size = inputlen - iv_len;
+   if (size) {
+   i = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0,
+ &size, NULL, 0);
+   if (unlikely(size)) {
+   CPT_LOG_DP_ERR("Insufficient buffer space,"
+  " size %d needed",
+  size);
+   return -1;
+   }
+   }
+   ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);
+   g_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
+
+   /*
+* Output Scatter List
+*/
+
+   i = 0;
+   scatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +
+g_size_bytes);
+
+   /* IV */
+   i = fill_sg_comp(scatter_comp, i,
+(uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN, iv_len);
+
+   /* Add output data */
+   size = outputlen - iv_len;
+   if (size) {
+   i = fill_sg_comp_from_iov(scatter_comp, i, params->dst_iov, 0,
+ &size, NULL, 0);
+   if (unlikely(size)) {
+   CPT_LOG_DP_ERR("Insufficient buffer space,"
+  " size %d needed",
+  size);
+   return -1;
+   }
+   }
+   ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);
+   s_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
+
+   size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;
+
+   /* This is DPTR len in case of SG mode */
+   cpt_inst_w4.s.dlen = size;
+
+   inst->dptr = (uint64_t)in_buffer;
+   inst->w4.u64 = cpt_in

[dpdk-dev] [PATCH 19/20] crypto/cnxk: add digest support

[Anoob Joseph]

From: Tejasree Kondoj 

Add support for digest support for various algorithms.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 doc/guides/cryptodevs/features/cn10k.ini  |  17 ++
 doc/guides/cryptodevs/features/cn9k.ini   |  17 ++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  18 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  17 +-
 drivers/crypto/cnxk/cnxk_se.h | 342 ++
 5 files changed, 409 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/features/cn10k.ini 
b/doc/guides/cryptodevs/features/cn10k.ini
index 23ec100..41e936b 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -38,6 +38,23 @@ ZUC EEA3   = Y
 ; Supported authentication algorithms of 'cn10k' crypto driver.
 ;
 [Auth]
+NULL = Y
+AES GMAC = Y
+KASUMI F9= Y
+MD5  = Y
+MD5 HMAC = Y
+SHA1 = Y
+SHA1 HMAC= Y
+SHA224   = Y
+SHA224 HMAC  = Y
+SHA256   = Y
+SHA256 HMAC  = Y
+SHA384   = Y
+SHA384 HMAC  = Y
+SHA512   = Y
+SHA512 HMAC  = Y
+SNOW3G UIA2  = Y
+ZUC EIA3 = Y
 
 ;
 ; Supported AEAD algorithms of 'cn10k' crypto driver.
diff --git a/doc/guides/cryptodevs/features/cn9k.ini 
b/doc/guides/cryptodevs/features/cn9k.ini
index e833dc0..7b310e6 100644
--- a/doc/guides/cryptodevs/features/cn9k.ini
+++ b/doc/guides/cryptodevs/features/cn9k.ini
@@ -38,6 +38,23 @@ ZUC EEA3   = Y
 ; Supported authentication algorithms of 'cn9k' crypto driver.
 ;
 [Auth]
+NULL = Y
+AES GMAC = Y
+KASUMI F9= Y
+MD5  = Y
+MD5 HMAC = Y
+SHA1 = Y
+SHA1 HMAC= Y
+SHA224   = Y
+SHA224 HMAC  = Y
+SHA256   = Y
+SHA256 HMAC  = Y
+SHA384   = Y
+SHA384 HMAC  = Y
+SHA512   = Y
+SHA512 HMAC  = Y
+SNOW3G UIA2  = Y
+ZUC EIA3 = Y
 
 ;
 ; Supported AEAD algorithms of 'cn9k' crypto driver.
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index b0faebc..22704df 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -53,6 +53,9 @@ cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op,
 
if (cpt_op & ROC_SE_OP_CIPHER_MASK)
ret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst);
+   else
+   ret = fill_digest_params(op, sess, &qp->meta_info, infl_req,
+inst);
 
return ret;
 }
@@ -203,7 +206,10 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
if (likely(res->compcode == CPT_COMP_GOOD ||
   res->compcode == CPT_COMP_WARN)) {
if (unlikely(res->uc_compcode)) {
-   cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+   if (res->uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)
+   cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+   else
+   cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 
CPT_LOG_DP_DEBUG("Request failed with microcode error");
CPT_LOG_DP_DEBUG("MC completion code 0x%x",
@@ -212,6 +218,16 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
}
 
cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+   if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+
+   /* Verify authentication data if required */
+   if (unlikely(infl_req->op_flags &
+CPT_OP_FLAGS_AUTH_VERIFY)) {
+   uintptr_t *rsp = infl_req->mdata;
+   compl_auth_verify(cop, (uint8_t *)rsp[0],
+ rsp[1]);
+   }
+   }
} else {
cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c 
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index fed67c9..23b596f 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -24,6 +24,9 @@ cn9k_cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct 
rte_crypto_op *op,
 
if (cpt_op & ROC_SE_OP_CIPHER_MASK)
ret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst);
+   else
+   ret = fill_digest_params(op, sess, &qp->meta_info, infl_req,
+inst);
 
return ret;
 }
@@ -166,7 +169,10 @@ cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, 
struct rte_crypto_op *cop,
 
if (likely(res->compcode == CPT_COMP_GOOD)) {
if (unlikely(res->uc_compcode)) {
-   cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+   if (res->uc_compcode == RO

[dpdk-dev] [PATCH 20/20] test/crypto: enable cnxk crypto PMDs

[Anoob Joseph]

From: Tejasree Kondoj 

Enable tests for cn9k & cn10k crypto PMDs.

Signed-off-by: Ankur Dwivedi 
Signed-off-by: Anoob Joseph 
Signed-off-by: Archana Muniganti 
Signed-off-by: Tejasree Kondoj 
---
 app/test/meson.build  |  2 ++
 app/test/test_cryptodev.c | 14 ++
 app/test/test_cryptodev.h |  2 ++
 3 files changed, 18 insertions(+)

diff --git a/app/test/meson.build b/app/test/meson.build
index 08c82d3..bffce05 100644
--- a/app/test/meson.build
+++ b/app/test/meson.build
@@ -314,6 +314,8 @@ perf_test_names = [
 driver_test_names = [
 'cryptodev_aesni_mb_autotest',
 'cryptodev_aesni_gcm_autotest',
+'cryptodev_cn9k_autotest',
+'cryptodev_cn10k_autotest',
 'cryptodev_dpaa_sec_autotest',
 'cryptodev_dpaa2_sec_autotest',
 'cryptodev_null_autotest',
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 39db52b..ead8c6e 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -14778,6 +14778,18 @@ test_cryptodev_qat_raw_api(void /*argv __rte_unused, 
int argc __rte_unused*/)
return ret;
 }
 
+static int
+test_cryptodev_cn9k(void)
+{
+   return run_cryptodev_testsuite(RTE_STR(CRYPTODEV_NAME_CN9K_PMD));
+}
+
+static int
+test_cryptodev_cn10k(void)
+{
+   return run_cryptodev_testsuite(RTE_STR(CRYPTODEV_NAME_CN10K_PMD));
+}
+
 REGISTER_TEST_COMMAND(cryptodev_qat_raw_api_autotest,
test_cryptodev_qat_raw_api);
 REGISTER_TEST_COMMAND(cryptodev_qat_autotest, test_cryptodev_qat);
@@ -14803,3 +14815,5 @@ REGISTER_TEST_COMMAND(cryptodev_octeontx2_autotest, 
test_cryptodev_octeontx2);
 REGISTER_TEST_COMMAND(cryptodev_caam_jr_autotest, test_cryptodev_caam_jr);
 REGISTER_TEST_COMMAND(cryptodev_nitrox_autotest, test_cryptodev_nitrox);
 REGISTER_TEST_COMMAND(cryptodev_bcmfs_autotest, test_cryptodev_bcmfs);
+REGISTER_TEST_COMMAND(cryptodev_cn9k_autotest, test_cryptodev_cn9k);
+REGISTER_TEST_COMMAND(cryptodev_cn10k_autotest, test_cryptodev_cn10k);
diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h
index f81f8e3..5bf1e88 100644
--- a/app/test/test_cryptodev.h
+++ b/app/test/test_cryptodev.h
@@ -71,6 +71,8 @@
 #define CRYPTODEV_NAME_CAAM_JR_PMD crypto_caam_jr
 #define CRYPTODEV_NAME_NITROX_PMD  crypto_nitrox_sym
 #define CRYPTODEV_NAME_BCMFS_PMD   crypto_bcmfs
+#define CRYPTODEV_NAME_CN9K_PMDcrypto_cn9k
+#define CRYPTODEV_NAME_CN10K_PMD   crypto_cn10k
 
 enum cryptodev_api_test_type {
CRYPTODEV_API_TEST = 0,
-- 
2.7.4

[dpdk-dev] [PATCH 0/4] Add rte_security in crypto_cn10k PMD

[Anoob Joseph]

Add rte_security (lookaside protocol - IPsec) support in crypto_cn10k.

IPsec operations can be offloaded to CPT's SE and IE engines, which
can process IPsec protcol operations including atomic sequence number
increment (for outbound operations) and anti replay window check (for
inbound operations).

Depends-on: series-17212 ("Add CPT in Marvell CNXK common driver")
Depends-on: series-17213 ("Add Marvell CNXK crypto PMDs")

Anoob Joseph (1):
  crypto/cnxk: add security capabilities

Srujana Challa (1):
  crypto/cnxk: add security ctx skeleton

Tejasree Kondoj (2):
  crypto/cnxk: add security session ops
  crypto/cnxk: add security handling in datapath ops

 drivers/crypto/cnxk/cn10k_cryptodev.c |  12 +
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |  78 +++-
 drivers/crypto/cnxk/cn10k_ipsec.c | 520 ++
 drivers/crypto/cnxk/cn10k_ipsec.h |  38 ++
 drivers/crypto/cnxk/cn10k_ipsec_la_ops.h  |  74 +++
 drivers/crypto/cnxk/cnxk_cryptodev.h  |   4 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 114 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h |   9 +-
 drivers/crypto/cnxk/cnxk_cryptodev_sec.c  |  48 ++
 drivers/crypto/cnxk/cnxk_cryptodev_sec.h  |  14 +
 drivers/crypto/cnxk/cnxk_ipsec.h  |  18 +
 drivers/crypto/cnxk/meson.build   |   4 +-
 12 files changed, 930 insertions(+), 3 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cn10k_ipsec.c
 create mode 100644 drivers/crypto/cnxk/cn10k_ipsec.h
 create mode 100644 drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.h
 create mode 100644 drivers/crypto/cnxk/cnxk_ipsec.h

-- 
2.7.4

[dpdk-dev] [PATCH 1/4] crypto/cnxk: add security ctx skeleton

[Anoob Joseph]

From: Srujana Challa 

Add security ctx in cn10k crypto PMD.

Signed-off-by: Anoob Joseph 
Signed-off-by: Srujana Challa 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cn10k_cryptodev.c| 10 +++
 drivers/crypto/cnxk/cnxk_cryptodev_sec.c | 47 
 drivers/crypto/cnxk/cnxk_cryptodev_sec.h | 14 ++
 drivers/crypto/cnxk/meson.build  |  3 +-
 4 files changed, 73 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.c
 create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c 
b/drivers/crypto/cnxk/cn10k_cryptodev.c
index ca3adea..b58d390 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c
@@ -14,6 +14,7 @@
 #include "cn10k_cryptodev_ops.h"
 #include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_cryptodev_sec.h"
 
 #include "roc_api.h"
 
@@ -75,6 +76,11 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
plt_err("Failed to add engine group rc=%d", rc);
goto dev_fini;
}
+
+   /* Create security context */
+   rc = cnxk_crypto_sec_ctx_create(dev);
+   if (rc)
+   goto dev_fini;
}
 
cnxk_cpt_caps_populate(vf);
@@ -87,6 +93,7 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv 
__rte_unused,
 RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
 RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
 RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+RTE_CRYPTODEV_FF_SECURITY |
 RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
 
cn10k_cpt_set_enqdeq_fns(dev);
@@ -121,6 +128,9 @@ cn10k_cpt_pci_remove(struct rte_pci_device *pci_dev)
if (dev == NULL)
return -ENODEV;
 
+   /* Destroy security context */
+   cnxk_crypto_sec_ctx_destroy(dev);
+
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
vf = dev->data->dev_private;
ret = roc_cpt_dev_fini(&vf->cpt);
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
new file mode 100644
index 000..f03d2ed
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "cnxk_cryptodev_sec.h"
+
+/* Common security ops */
+struct rte_security_ops cnxk_sec_ops = {
+   .session_create = NULL,
+   .session_destroy = NULL,
+   .session_get_size = NULL,
+   .set_pkt_metadata = NULL,
+   .get_userdata = NULL,
+   .capabilities_get = NULL,
+};
+
+int
+cnxk_crypto_sec_ctx_create(struct rte_cryptodev *cdev)
+{
+   struct rte_security_ctx *ctx;
+
+   ctx = rte_malloc("cnxk_cpt_dev_sec_ctx",
+sizeof(struct rte_security_ctx), 0);
+
+   if (ctx == NULL)
+   return -ENOMEM;
+
+   /* Populate ctx */
+   ctx->device = cdev;
+   ctx->ops = &cnxk_sec_ops;
+   ctx->sess_cnt = 0;
+
+   cdev->security_ctx = ctx;
+
+   return 0;
+}
+
+void
+cnxk_crypto_sec_ctx_destroy(struct rte_cryptodev *cdev)
+{
+   rte_free(cdev->security_ctx);
+}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.h 
b/drivers/crypto/cnxk/cnxk_cryptodev_sec.h
new file mode 100644
index 000..9ab0e9e
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef __CNXK_CRYPTODEV_SEC_H__
+#define __CNXK_CRYPTODEV_SEC_H__
+
+#include 
+
+int cnxk_crypto_sec_ctx_create(struct rte_cryptodev *crypto_dev);
+
+void cnxk_crypto_sec_ctx_destroy(struct rte_cryptodev *crypto_dev);
+
+#endif /* __CNXK_CRYPTODEV_SEC_H__ */
diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build
index b0aa3c0..ab45483 100644
--- a/drivers/crypto/cnxk/meson.build
+++ b/drivers/crypto/cnxk/meson.build
@@ -17,6 +17,7 @@ sources = files(
 'cnxk_cryptodev.c',
 'cnxk_cryptodev_capabilities.c',
 'cnxk_cryptodev_ops.c',
+'cnxk_cryptodev_sec.c',
 )
 
-deps += ['bus_pci', 'common_cnxk']
+deps += ['bus_pci', 'common_cnxk', 'security']
-- 
2.7.4

[dpdk-dev] [PATCH 2/4] crypto/cnxk: add security capabilities

[Anoob Joseph]

Add security capabilities supported by crypto cn10k PMD.


Signed-off-by: Anoob Joseph 
Signed-off-by: Srujana Challa 
Signed-off-by: Tejasree Kondoj 
---
 drivers/crypto/cnxk/cnxk_cryptodev.h  |   4 +
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 114 ++
 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h |   9 +-
 drivers/crypto/cnxk/cnxk_cryptodev_sec.c  |   3 +-
 4 files changed, 128 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h 
b/drivers/crypto/cnxk/cnxk_cryptodev.h
index dcbdc53..1568be3 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -6,6 +6,7 @@
 #define _CNXK_CRYPTODEV_H_
 
 #include 
+#include 
 
 #include "roc_cpt.h"
 
@@ -31,6 +32,9 @@
 struct cnxk_cpt_vf {
struct roc_cpt cpt;
struct rte_cryptodev_capabilities crypto_caps[CNXK_CPT_MAX_CAPS];
+   struct rte_cryptodev_capabilities
+   sec_crypto_caps[CNXK_SEC_CRYPTO_MAX_CAPS];
+   struct rte_security_capability sec_caps[CNXK_SEC_MAX_CAPS];
 };
 
 int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt);
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c 
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index e627854..ab37f9c 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -3,6 +3,7 @@
  */
 
 #include 
+#include 
 
 #include "roc_api.h"
 
@@ -18,6 +19,15 @@
 RTE_DIM(caps_##name));\
} while (0)
 
+#define SEC_CAPS_ADD(cnxk_caps, cur_pos, hw_caps, name)
\
+   do {   \
+   if ((hw_caps[CPT_ENG_TYPE_SE].name) || \
+   (hw_caps[CPT_ENG_TYPE_IE].name) || \
+   (hw_caps[CPT_ENG_TYPE_AE].name))   \
+   sec_caps_add(cnxk_caps, cur_pos, sec_caps_##name,  \
+RTE_DIM(sec_caps_##name));\
+   } while (0)
+
 static const struct rte_cryptodev_capabilities caps_mul[] = {
{   /* RSA */
.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
@@ -713,6 +723,69 @@ static const struct rte_cryptodev_capabilities caps_end[] 
= {
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
+static const struct rte_cryptodev_capabilities sec_caps_aes[] = {
+   {   /* AES GCM */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
+   {.aead = {
+   .algo = RTE_CRYPTO_AEAD_AES_GCM,
+   .block_size = 16,
+   .key_size = {
+   .min = 16,
+   .max = 32,
+   .increment = 8
+   },
+   .digest_size = {
+   .min = 16,
+   .max = 16,
+   .increment = 0
+   },
+   .aad_size = {
+   .min = 8,
+   .max = 12,
+   .increment = 4
+   },
+   .iv_size = {
+   .min = 12,
+   .max = 12,
+   .increment = 0
+   }
+   }, }
+   }, }
+   },
+};
+
+static const struct rte_security_capability sec_caps_templ[] = {
+   {   /* IPsec Lookaside Protocol ESP Tunnel Ingress */
+   .action = RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL,
+   .protocol = RTE_SECURITY_PROTOCOL_IPSEC,
+   .ipsec = {
+   .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
+   .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
+   .direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS,
+   .options = { 0 }
+   },
+   .crypto_capabilities = NULL,
+   .ol_flags = RTE_SECURITY_TX_OLOAD_NEED_MDATA
+   },
+   {   /* IPsec Lookaside Protocol ESP Tunnel Egress */
+   .action = RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL,
+   .protocol = RTE_SECURITY_PROTOCOL_IPSEC,
+   .ipsec = {
+   .proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
+   .mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
+   .direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS,
+   .options = { 0