Re: [dpdk-dev] [PATCH] doc: fix guide for DLB v2.5

2021-05-16 Thread David Marchand
On Sat, May 15, 2021 at 7:29 PM Timothy McDaniel
 wrote:
>
> - Remove references to deferred scheduling. That feature applies
>   to DLB v1.0 only.
> - Replace vdev references with the pci devargs equivalent
> - Add section for new "vector_opts_enabled" devarg
>
> Fixes: 7c6cc633fc7d ("doc: update guide for DLB v2.5")
> Cc: timothy.mcdan...@intel.com
>
> Signed-off-by: Timothy McDaniel 
> ---
>  doc/guides/eventdevs/dlb2.rst | 54 +++
>  1 file changed, 23 insertions(+), 31 deletions(-)
>
> diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst
> index 31de6bc47..bce984ca0 100644
> --- a/doc/guides/eventdevs/dlb2.rst
> +++ b/doc/guides/eventdevs/dlb2.rst
> @@ -152,19 +152,19 @@ These pools' sizes are controlled by the 
> nb_events_limit field in struct
>  rte_event_dev_config. The load-balanced pool is sized to contain
>  nb_events_limit credits, and the directed pool is sized to contain
>  nb_events_limit/4 credits. The directed pool size can be overridden with the
> -num_dir_credits vdev argument, like so:
> +num_dir_credits devargs argument, like so:
>
>  .. code-block:: console
>
> -   --vdev=dlb2_event,num_dir_credits=
> +   --allow ea:00.0,num_dir_credits=
>
>  This can be used if the default allocation is too low or too high for the
> -specific application needs. The PMD also supports a vdev arg that limits the
> +specific application needs. The PMD also supports a devarg that limits the
>  max_num_events reported by rte_event_dev_info_get():
>
>  .. code-block:: console
>
> -   --vdev=dlb2_event,max_num_events=
> +   --allow ea:00.0,max_num_events=
>
>  By default, max_num_events is reported as the total available load-balanced
>  credits. If multiple DLB-based applications are being used, it may be 
> desirable
> @@ -293,27 +293,6 @@ The PMD does not support the following configuration 
> sequences:
>  This sequence is not supported because the event device must be reconfigured
>  before its ports or queues can be.
>
> -Deferred Scheduling
> -~~~
> -
> -The DLB PMD's default behavior for managing a CQ is to "pop" the CQ once per
> -dequeued event before returning from rte_event_dequeue_burst(). This frees 
> the
> -corresponding entries in the CQ, which enables the DLB to schedule more 
> events
> -to it.
> -
> -To support applications seeking finer-grained scheduling control -- for 
> example
> -deferring scheduling to get the best possible priority scheduling and
> -load-balancing -- the PMD supports a deferred scheduling mode. In this mode,
> -the CQ entry is not popped until the *subsequent* rte_event_dequeue_burst()
> -call. This mode only applies to load-balanced event ports with dequeue depth 
> of
> -1.
> -
> -To enable deferred scheduling, use the defer_sched vdev argument like so:
> -
> -.. code-block:: console
> -
> -   --vdev=dlb2_event,defer_sched=on
> -
>  Atomic Inflights Allocation
>  ~~~
>
> @@ -336,11 +315,11 @@ buffer space (e.g. if not all queues are used, or 
> aren't used for atomic
>  scheduling).
>
>  The PMD provides a dev arg to override the default per-queue allocation. To
> -increase a vdev's per-queue atomic-inflight allocation to (for example) 64:
> +increase per-queue atomic-inflight allocation to (for example) 64:
>
>  .. code-block:: console
>
> -   --vdev=dlb2_event,atm_inflights=64
> +   --allow ea:00.0,atm_inflights=64
>
>  QID Depth Threshold
>  ~~~
> @@ -363,9 +342,9 @@ shown below.
>
>  .. code-block:: console
>
> -   --vdev=dlb2_event,qid_depth_thresh=all:
> -   --vdev=dlb2_event,qid_depth_thresh=qidA-qidB:
> -   --vdev=dlb2_event,qid_depth_thresh=qid:
> +   --allow ea:00.0,qid_depth_thresh=all:
> +   --allow ea:00.0,qid_depth_thresh=qidA-qidB:
> +   --allow ea:00.0,qid_depth_thresh=qid:

Did you try this syntax?
The previous syntax with vdev did not work, and the new one probably
won't either.
Only the first devargs will be passed to the driver.

Example with the null pmd:
$ ./build/app/dpdk-testpmd -m 512 --no-huge --log-level=*:debug --vdev
net_null,copy=1 --vdev net_null,size=1024 -- -ia
--total-num-mbufs=2048
...
vdev_probe_all_drivers(): Search driver to probe device net_null
rte_pmd_null_probe(): Initializing pmd_null for net_null
rte_pmd_null_probe(): Configure pmd_null: packet size is 64, packet
copy is enabled
 ^^
 ^^^
eth_dev_null_create(): Creating null ethdev on numa socket 0
...


If you want to pass multiple options for a single device, pass them all at once.
Like:
--allow 
ea:00.0,qid_depth_thresh=all:,qid_depth_thresh=qidA-qidB:,qid_depth_thresh=qid:

>
>  Class of service
>  
> @@ -387,4 +366,17 @@ Class of service can be specified in the devargs, as 
> follows
>
>  .. code-block:: console
>
> -   --vdev=dlb2_event,cos=<0..4>
> +   --allow ea:00.0,cos=<0..4>
> +
> +Use X86 V

[dpdk-dev] [PATCH v2] crypto/qat: fix uninitilized compiler warning

2021-05-16 Thread Feifei Wang
In Arm platform, when "RTE_ARCH_ARM64_MEMCPY" is set as true, compiler
will report variable uninitilized warning:

../drivers/crypto/qat/qat_sym_session.c: In function ‘partial_hash_compute’:
../lib/eal/include/generic/rte_byteorder.h:241:24: warning:
‘’ may be used uninitialized in this function [-Wmaybe-uninitialized]
241 | #define rte_bswap32(x) __builtin_bswap32(x)
...

This is because "digest" will be initialized by "rte_memcpy" function
rather than "memcpy" if "RTE_ARCH_ARM64_MEMCPY" is set as true. However,
compiler cannot know it is initialized by the function.

To fix this, use "calloc" to initialize "digest".

Fixes: cd7fc8a84b48 ("eal/arm64: optimize memcpy")
Cc: sta...@dpdk.org

Signed-off-by: Feifei Wang 
Reviewed-by: Ruifeng Wang 
---
v2: add check and free for memory dynamic allocation (David Marchand)

 drivers/crypto/qat/qat_sym_session.c | 27 ++-
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/drivers/crypto/qat/qat_sym_session.c 
b/drivers/crypto/qat/qat_sym_session.c
index 231b1640da..32b1c45046 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -1190,8 +1190,7 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo 
hash_alg,
uint8_t *data_out)
 {
int digest_size;
-   uint8_t digest[qat_hash_get_digest_size(
-   ICP_QAT_HW_AUTH_ALGO_DELIMITER)];
+   uint8_t *digest;
uint32_t *hash_state_out_be32;
uint64_t *hash_state_out_be64;
int i;
@@ -1200,55 +1199,65 @@ static int partial_hash_compute(enum 
icp_qat_hw_auth_algo hash_alg,
if (digest_size <= 0)
return -EFAULT;
 
+   digest = calloc(qat_hash_get_digest_size(
+   ICP_QAT_HW_AUTH_ALGO_DELIMITER), 
sizeof(uint8_t));
+   if (!digest)
+   return -ENOMEM;
+
hash_state_out_be32 = (uint32_t *)data_out;
hash_state_out_be64 = (uint64_t *)data_out;
 
switch (hash_alg) {
case ICP_QAT_HW_AUTH_ALGO_SHA1:
if (partial_hash_sha1(data_in, digest))
-   return -EFAULT;
+   goto fail
for (i = 0; i < digest_size >> 2; i++, hash_state_out_be32++)
*hash_state_out_be32 =
rte_bswap32(*(((uint32_t *)digest)+i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA224:
if (partial_hash_sha224(data_in, digest))
-   return -EFAULT;
+   goto fail;
for (i = 0; i < digest_size >> 2; i++, hash_state_out_be32++)
*hash_state_out_be32 =
rte_bswap32(*(((uint32_t *)digest)+i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA256:
if (partial_hash_sha256(data_in, digest))
-   return -EFAULT;
+   goto fail;
for (i = 0; i < digest_size >> 2; i++, hash_state_out_be32++)
*hash_state_out_be32 =
rte_bswap32(*(((uint32_t *)digest)+i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA384:
if (partial_hash_sha384(data_in, digest))
-   return -EFAULT;
+   goto fail;
for (i = 0; i < digest_size >> 3; i++, hash_state_out_be64++)
*hash_state_out_be64 =
rte_bswap64(*(((uint64_t *)digest)+i));
break;
case ICP_QAT_HW_AUTH_ALGO_SHA512:
if (partial_hash_sha512(data_in, digest))
-   return -EFAULT;
+   goto fail;
for (i = 0; i < digest_size >> 3; i++, hash_state_out_be64++)
*hash_state_out_be64 =
rte_bswap64(*(((uint64_t *)digest)+i));
break;
case ICP_QAT_HW_AUTH_ALGO_MD5:
if (partial_hash_md5(data_in, data_out))
-   return -EFAULT;
+   goto fail;
break;
default:
QAT_LOG(ERR, "invalid hash alg %u", hash_alg);
-   return -EFAULT;
+   goto fail;
}
 
+   free(digest);
return 0;
+
+fail:
+   free(digest);
+   return -EFAULT;
 }
 #define HMAC_IPAD_VALUE0x36
 #define HMAC_OPAD_VALUE0x5c
-- 
2.25.1