Re: [dpdk-dev] [PATCH] ethdev: fix RSS flow expansion in case of mismatch
> -Original Message- > From: Dekel Peled > Subject: RE: [PATCH] ethdev: fix RSS flow expansion in case of mismatch [...] Acked-by: Ori Kam Thanks, Ori
[dpdk-dev] [PATCH] meter: remove experimental alias
Remove ABI versioning for APIs:
'rte_meter_trtcm_rfc4115_profile_config()'
'rte_meter_trtcm_rfc4115_config()'
The alias was introduced in
commit 60197bda97a0 ("meter: provide experimental alias for matured API")
Signed-off-by: Ferruh Yigit
---
lib/librte_meter/rte_meter.c | 73 ++
lib/librte_meter/rte_meter_version.map | 7 ---
2 files changed, 3 insertions(+), 77 deletions(-)
diff --git a/lib/librte_meter/rte_meter.c b/lib/librte_meter/rte_meter.c
index 149cf58bdd..da01429a8b 100644
--- a/lib/librte_meter/rte_meter.c
+++ b/lib/librte_meter/rte_meter.c
@@ -9,7 +9,6 @@
#include
#include
#include
-#include
#include "rte_meter.h"
@@ -120,15 +119,8 @@ rte_meter_trtcm_config(struct rte_meter_trtcm *m,
return 0;
}
-/*
- * ABI aliasing done for 'rte_meter_trtcm_rfc4115_profile_config'
- * to support both EXPERIMENTAL and DPDK_21 versions
- * This versioning will be removed on next ABI version (v20.11)
- * and '__rte_meter_trtcm_rfc4115_profile_config' will be restrored back to
- * 'rte_meter_trtcm_rfc4115_profile_config' without versioning.
- */
-static int
-__rte_meter_trtcm_rfc4115_profile_config(
+int
+rte_meter_trtcm_rfc4115_profile_config(
struct rte_meter_trtcm_rfc4115_profile *p,
struct rte_meter_trtcm_rfc4115_params *params)
{
@@ -153,42 +145,7 @@ __rte_meter_trtcm_rfc4115_profile_config(
}
int
-rte_meter_trtcm_rfc4115_profile_config_s(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params);
-int
-rte_meter_trtcm_rfc4115_profile_config_s(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params)
-{
- return __rte_meter_trtcm_rfc4115_profile_config(p, params);
-}
-BIND_DEFAULT_SYMBOL(rte_meter_trtcm_rfc4115_profile_config, _s, 21);
-MAP_STATIC_SYMBOL(int rte_meter_trtcm_rfc4115_profile_config(struct
rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params),
rte_meter_trtcm_rfc4115_profile_config_s);
-
-int
-rte_meter_trtcm_rfc4115_profile_config_e(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params);
-int
-rte_meter_trtcm_rfc4115_profile_config_e(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params)
-{
- return __rte_meter_trtcm_rfc4115_profile_config(p, params);
-}
-VERSION_SYMBOL_EXPERIMENTAL(rte_meter_trtcm_rfc4115_profile_config, _e);
-
-/*
- * ABI aliasing done for 'rte_meter_trtcm_rfc4115_config'
- * to support both EXPERIMENTAL and DPDK_21 versions
- * This versioning will be removed on next ABI version (v20.11)
- * and '__rte_meter_trtcm_rfc4115_config' will be restrored back to
- * 'rte_meter_trtcm_rfc4115_config' without versioning.
- */
-static int
-__rte_meter_trtcm_rfc4115_config(
+rte_meter_trtcm_rfc4115_config(
struct rte_meter_trtcm_rfc4115 *m,
struct rte_meter_trtcm_rfc4115_profile *p)
{
@@ -203,27 +160,3 @@ __rte_meter_trtcm_rfc4115_config(
return 0;
}
-
-int
-rte_meter_trtcm_rfc4115_config_s(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p);
-int
-rte_meter_trtcm_rfc4115_config_s(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p)
-{
- return __rte_meter_trtcm_rfc4115_config(m, p);
-}
-BIND_DEFAULT_SYMBOL(rte_meter_trtcm_rfc4115_config, _s, 21);
-MAP_STATIC_SYMBOL(int rte_meter_trtcm_rfc4115_config(struct
rte_meter_trtcm_rfc4115 *m,
-struct rte_meter_trtcm_rfc4115_profile *p),
rte_meter_trtcm_rfc4115_config_s);
-
-int
-rte_meter_trtcm_rfc4115_config_e(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p);
-int
-rte_meter_trtcm_rfc4115_config_e(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p)
-{
- return __rte_meter_trtcm_rfc4115_config(m, p);
-}
-VERSION_SYMBOL_EXPERIMENTAL(rte_meter_trtcm_rfc4115_config, _e);
diff --git a/lib/librte_meter/rte_meter_version.map
b/lib/librte_meter/rte_meter_version.map
index e2a2607f28..b67f860b15 100644
--- a/lib/librte_meter/rte_meter_version.map
+++ b/lib/librte_meter/rte_meter_version.map
@@ -10,10 +10,3 @@ DPDK_21 {
local: *;
};
-
-EXPERIMENTAL {
- global:
-
- rte_meter_trtcm_rfc4115_config;
- rte_meter_trtcm_rfc4115_profile_config;
-};
--
2.25.4
[dpdk-dev] [PATCH v2] meter: remove experimental alias
Remove ABI versioning for APIs:
'rte_meter_trtcm_rfc4115_profile_config()'
'rte_meter_trtcm_rfc4115_config()'
The alias was introduced in
commit 60197bda97a0 ("meter: provide experimental alias for matured API")
Signed-off-by: Ferruh Yigit
---
v2:
* Update meson to remove 'use_function_versioning' flag
---
lib/librte_meter/meson.build | 1 -
lib/librte_meter/rte_meter.c | 73 ++
lib/librte_meter/rte_meter_version.map | 7 ---
3 files changed, 3 insertions(+), 78 deletions(-)
diff --git a/lib/librte_meter/meson.build b/lib/librte_meter/meson.build
index fce0368437..646fd4d43f 100644
--- a/lib/librte_meter/meson.build
+++ b/lib/librte_meter/meson.build
@@ -3,4 +3,3 @@
sources = files('rte_meter.c')
headers = files('rte_meter.h')
-use_function_versioning = true
diff --git a/lib/librte_meter/rte_meter.c b/lib/librte_meter/rte_meter.c
index 149cf58bdd..da01429a8b 100644
--- a/lib/librte_meter/rte_meter.c
+++ b/lib/librte_meter/rte_meter.c
@@ -9,7 +9,6 @@
#include
#include
#include
-#include
#include "rte_meter.h"
@@ -120,15 +119,8 @@ rte_meter_trtcm_config(struct rte_meter_trtcm *m,
return 0;
}
-/*
- * ABI aliasing done for 'rte_meter_trtcm_rfc4115_profile_config'
- * to support both EXPERIMENTAL and DPDK_21 versions
- * This versioning will be removed on next ABI version (v20.11)
- * and '__rte_meter_trtcm_rfc4115_profile_config' will be restrored back to
- * 'rte_meter_trtcm_rfc4115_profile_config' without versioning.
- */
-static int
-__rte_meter_trtcm_rfc4115_profile_config(
+int
+rte_meter_trtcm_rfc4115_profile_config(
struct rte_meter_trtcm_rfc4115_profile *p,
struct rte_meter_trtcm_rfc4115_params *params)
{
@@ -153,42 +145,7 @@ __rte_meter_trtcm_rfc4115_profile_config(
}
int
-rte_meter_trtcm_rfc4115_profile_config_s(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params);
-int
-rte_meter_trtcm_rfc4115_profile_config_s(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params)
-{
- return __rte_meter_trtcm_rfc4115_profile_config(p, params);
-}
-BIND_DEFAULT_SYMBOL(rte_meter_trtcm_rfc4115_profile_config, _s, 21);
-MAP_STATIC_SYMBOL(int rte_meter_trtcm_rfc4115_profile_config(struct
rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params),
rte_meter_trtcm_rfc4115_profile_config_s);
-
-int
-rte_meter_trtcm_rfc4115_profile_config_e(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params);
-int
-rte_meter_trtcm_rfc4115_profile_config_e(
- struct rte_meter_trtcm_rfc4115_profile *p,
- struct rte_meter_trtcm_rfc4115_params *params)
-{
- return __rte_meter_trtcm_rfc4115_profile_config(p, params);
-}
-VERSION_SYMBOL_EXPERIMENTAL(rte_meter_trtcm_rfc4115_profile_config, _e);
-
-/*
- * ABI aliasing done for 'rte_meter_trtcm_rfc4115_config'
- * to support both EXPERIMENTAL and DPDK_21 versions
- * This versioning will be removed on next ABI version (v20.11)
- * and '__rte_meter_trtcm_rfc4115_config' will be restrored back to
- * 'rte_meter_trtcm_rfc4115_config' without versioning.
- */
-static int
-__rte_meter_trtcm_rfc4115_config(
+rte_meter_trtcm_rfc4115_config(
struct rte_meter_trtcm_rfc4115 *m,
struct rte_meter_trtcm_rfc4115_profile *p)
{
@@ -203,27 +160,3 @@ __rte_meter_trtcm_rfc4115_config(
return 0;
}
-
-int
-rte_meter_trtcm_rfc4115_config_s(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p);
-int
-rte_meter_trtcm_rfc4115_config_s(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p)
-{
- return __rte_meter_trtcm_rfc4115_config(m, p);
-}
-BIND_DEFAULT_SYMBOL(rte_meter_trtcm_rfc4115_config, _s, 21);
-MAP_STATIC_SYMBOL(int rte_meter_trtcm_rfc4115_config(struct
rte_meter_trtcm_rfc4115 *m,
-struct rte_meter_trtcm_rfc4115_profile *p),
rte_meter_trtcm_rfc4115_config_s);
-
-int
-rte_meter_trtcm_rfc4115_config_e(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p);
-int
-rte_meter_trtcm_rfc4115_config_e(struct rte_meter_trtcm_rfc4115 *m,
- struct rte_meter_trtcm_rfc4115_profile *p)
-{
- return __rte_meter_trtcm_rfc4115_config(m, p);
-}
-VERSION_SYMBOL_EXPERIMENTAL(rte_meter_trtcm_rfc4115_config, _e);
diff --git a/lib/librte_meter/rte_meter_version.map
b/lib/librte_meter/rte_meter_version.map
index e2a2607f28..b67f860b15 100644
--- a/lib/librte_meter/rte_meter_version.map
+++ b/lib/librte_meter/rte_meter_version.map
@@ -10,10 +10,3 @@ DPDK_21 {
local: *;
};
-
-EXPERIMENTAL {
- global:
-
- rte_meter_trtcm_rfc4115_config;
- rte_meter_trtcm_rfc4115_profile_config;
-};
--
2.25.4
[dpdk-dev] [PATCH] kni: fix build with Linux 5.9
Starting from Linux 5.9 'get_user_pages_remote()' API doesn't get
'struct task_struct' parameter:
commit 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code")
The change reflected to the KNI with version check.
Signed-off-by: Ferruh Yigit
---
kernel/linux/kni/compat.h | 4
kernel/linux/kni/kni_dev.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/kernel/linux/kni/compat.h b/kernel/linux/kni/compat.h
index 9ee45dbf6f..d515b27669 100644
--- a/kernel/linux/kni/compat.h
+++ b/kernel/linux/kni/compat.h
@@ -134,3 +134,7 @@
#if KERNEL_VERSION(5, 6, 0) <= LINUX_VERSION_CODE
#define HAVE_TX_TIMEOUT_TXQUEUE
#endif
+
+#if KERNEL_VERSION(5, 9, 0) > LINUX_VERSION_CODE
+#define HAVE_TSK_IN_GUP
+#endif
diff --git a/kernel/linux/kni/kni_dev.h b/kernel/linux/kni/kni_dev.h
index ca5f92a47b..c15da311ba 100644
--- a/kernel/linux/kni/kni_dev.h
+++ b/kernel/linux/kni/kni_dev.h
@@ -101,8 +101,13 @@ static inline phys_addr_t iova_to_phys(struct task_struct
*tsk,
offset = iova & (PAGE_SIZE - 1);
/* Read one page struct info */
+#ifdef HAVE_TSK_IN_GUP
ret = get_user_pages_remote(tsk, tsk->mm, iova, 1,
FOLL_TOUCH, &page, NULL, NULL);
+#else
+ ret = get_user_pages_remote(tsk->mm, iova, 1,
+ FOLL_TOUCH, &page, NULL, NULL);
+#endif
if (ret < 0)
return 0;
--
2.25.4
[dpdk-dev] [PATCH v2] kni: fix build with Linux 5.9
Starting from Linux 5.9 'get_user_pages_remote()' API doesn't get
'struct task_struct' parameter:
commit 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code")
The change reflected to the KNI with version check.
Cc: sta...@dpdk.org
Signed-off-by: Ferruh Yigit
---
v2:
* Add stable tag to request backport.
---
kernel/linux/kni/compat.h | 4
kernel/linux/kni/kni_dev.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/kernel/linux/kni/compat.h b/kernel/linux/kni/compat.h
index 9ee45dbf6f..d515b27669 100644
--- a/kernel/linux/kni/compat.h
+++ b/kernel/linux/kni/compat.h
@@ -134,3 +134,7 @@
#if KERNEL_VERSION(5, 6, 0) <= LINUX_VERSION_CODE
#define HAVE_TX_TIMEOUT_TXQUEUE
#endif
+
+#if KERNEL_VERSION(5, 9, 0) > LINUX_VERSION_CODE
+#define HAVE_TSK_IN_GUP
+#endif
diff --git a/kernel/linux/kni/kni_dev.h b/kernel/linux/kni/kni_dev.h
index ca5f92a47b..c15da311ba 100644
--- a/kernel/linux/kni/kni_dev.h
+++ b/kernel/linux/kni/kni_dev.h
@@ -101,8 +101,13 @@ static inline phys_addr_t iova_to_phys(struct task_struct
*tsk,
offset = iova & (PAGE_SIZE - 1);
/* Read one page struct info */
+#ifdef HAVE_TSK_IN_GUP
ret = get_user_pages_remote(tsk, tsk->mm, iova, 1,
FOLL_TOUCH, &page, NULL, NULL);
+#else
+ ret = get_user_pages_remote(tsk->mm, iova, 1,
+ FOLL_TOUCH, &page, NULL, NULL);
+#endif
if (ret < 0)
return 0;
--
2.25.4
Re: [dpdk-dev] [PATCH] eal: add option to put timestamp on console output
On Fri, Aug 14, 2020 at 12:20:28PM -0700, Stephen Hemminger wrote: > On Fri, 14 Aug 2020 22:09:11 +0300 > Dmitry Kozlyuk wrote: > > > On Fri, 14 Aug 2020 11:45:49 -0700, Stephen Hemminger wrote: > > > On Fri, 14 Aug 2020 21:39:29 +0300 > > > Dmitry Kozlyuk wrote: > > [...] > > > FreeBsd doesn't go through the same log code. > > > > Then --log-timestamp shouldn't appear on FreeBSD if it's unsupported. > > Was using same ifdef that is already there. There are several options already > (like syslog facility) which do nothing on FreeBSD anyway. > While that is correct, I think that we really should support this on FreeBSD also, since I don't think there is any technical reason we can't do so, right? Even a sub-optimal solution where the timestamp write and log write are non-atomic would be better than nothing. /Bruce
[dpdk-dev] Ipsec-secgw packet processing
Hello, While we are running ipsec-secgw application in transport-mode on dpdk-19.02, we found that inline packet processing is not happening. And also we are not observing any encrypt/decrypt packets on pdump before sending packets out from tx-port(rte_eth_tx_burst()). Please help us on how to proceed further. Thanks, Jagadeesh
Re: [dpdk-dev] [PATCH v2] meter: remove experimental alias
> -Original Message-
> From: Yigit, Ferruh
> Sent: Monday, August 17, 2020 11:22 AM
> To: Dumitrescu, Cristian ; Ray Kinsella
> ; Neil Horman
> Cc: dev@dpdk.org; Yigit, Ferruh
> Subject: [PATCH v2] meter: remove experimental alias
>
> Remove ABI versioning for APIs:
> 'rte_meter_trtcm_rfc4115_profile_config()'
> 'rte_meter_trtcm_rfc4115_config()'
>
> The alias was introduced in
> commit 60197bda97a0 ("meter: provide experimental alias for matured API")
>
> Signed-off-by: Ferruh Yigit
> ---
> v2:
> * Update meson to remove 'use_function_versioning' flag
> ---
Acked-by: Cristian Dumitrescu
[dpdk-dev] [PATCH v2] mempool: enhance dump function to print ops name
Enhance the dump function to also print the ops index
and associated mempool ops name
Signed-off-by: Hemant Agrawal
---
lib/librte_mempool/rte_mempool.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 7774f0c8da..10c5cb708f 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -1266,6 +1266,7 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
unsigned lcore_id;
#endif
struct rte_mempool_memhdr *memhdr;
+ struct rte_mempool_ops *ops;
unsigned common_count;
unsigned cache_count;
size_t mem_len = 0;
@@ -1288,6 +1289,10 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
fprintf(f, " private_data_size=%"PRIu32"\n", mp->private_data_size);
+ fprintf(f, " ops_index=%d\n", mp->ops_index);
+ ops = rte_mempool_get_ops(mp->ops_index);
+ fprintf(f, " ops_name: <%s>\n", ops ? ops->name : "NA");
+
STAILQ_FOREACH(memhdr, &mp->mem_list, next)
mem_len += memhdr->len;
if (mem_len != 0) {
--
2.17.1
Re: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64
Hi, Ruifeng Wang
On 2020/7/22 14:35, Ruifeng Wang wrote:
Hi Xavier,
-Original Message-
From: Wei Hu (Xavier)
Sent: Saturday, July 18, 2020 10:18 AM
To: Honnappa Nagarahalli ;
dev@dpdk.org
Cc: nd ; Ruifeng Wang ; Wei Hu
(Xavier)
Subject: Re: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64
Hi, Honnappa Nagarahalli
On 2020/7/18 7:04, Honnappa Nagarahalli wrote:
Hi,
Thanks for the patch. Has this been tested on any platform (simulator,
emulator etc)? Do you plan to add more code using SVE?
We have tested it on FPGA board and will upstream some code using SVE
later.
For completeness, cpuflags unit test also needs an update to check for the
newly added SVE flag.
BTW, is there a plan to add SVE2 flag as well?
I will add more flags to rte_cpu_feature_table in V2, sunch as SVE2, etc.
Thanks,
Xavier
Thanks.
Ruifeng
Thanks, Xavier
Thank you,
Honnappa
-Original Message-
From: dev On Behalf Of Wei Hu (Xavier)
Sent: Friday, July 17, 2020 7:08 AM
To: dev@dpdk.org
Cc: xavier.hu...@huawei.com
Subject: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64
From: Chengwen Feng
SVE is the next-generation SIMD extension of the ARMv8-A AArch64
instruction set.
The related marco definition can be found in linux kernel:
arch/arm64/include/uapi/asm/hwcap.h
This patch supports getting cpu SVE feature on ARM64 platform.
Signed-off-by: Chengwen Feng
Signed-off-by: Wei Hu (Xavier)
---
lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 +
lib/librte_eal/arm/rte_cpuflags.c| 1 +
2 files changed, 2 insertions(+)
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
b/lib/librte_eal/arm/include/rte_cpuflags_64.h
index 95cc014..069844d 100644
--- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
+++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
@@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
RTE_CPUFLAG_ATOMICS,
+ RTE_CPUFLAG_SVE,
RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
diff
--git a/lib/librte_eal/arm/rte_cpuflags.c
b/lib/librte_eal/arm/rte_cpuflags.c
index caf3dc8..b1e220b 100644
--- a/lib/librte_eal/arm/rte_cpuflags.c
+++ b/lib/librte_eal/arm/rte_cpuflags.c
@@ -95,6 +95,7 @@ const struct feature_entry rte_cpu_feature_table[]
= {
FEAT_DEF(SHA2, REG_HWCAP,6)
FEAT_DEF(CRC32, REG_HWCAP,7)
FEAT_DEF(ATOMICS, REG_HWCAP,8)
+ FEAT_DEF(SVE, REG_HWCAP,22)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */
--
2.7.4
[dpdk-dev] [PATCH v2] lib/librte_eal: support SVE flag on ARM64
From: "Wei Hu (Xavier)"
SVE is the next-generation SIMD extension of the ARMv8-A AArch64
instruction set.
The related marco definition can be found in linux kernel:
arch/arm64/include/uapi/asm/hwcap.h
This patch supports getting cpu SVE feature on ARM64 platform.
Signed-off-by: Chengwen Feng
Signed-off-by: Wei Hu (Xavier)
---
v1 -> v2:
Adds more sve-related definition to rte_cpu_feature_table,
sunch as SVE2, etc.
---
lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 +
lib/librte_eal/arm/rte_cpuflags.c| 11 +++
2 files changed, 12 insertions(+)
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
b/lib/librte_eal/arm/include/rte_cpuflags_64.h
index 95cc01474..069844ddb 100644
--- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
+++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
@@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
RTE_CPUFLAG_ATOMICS,
+ RTE_CPUFLAG_SVE,
RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
diff --git a/lib/librte_eal/arm/rte_cpuflags.c
b/lib/librte_eal/arm/rte_cpuflags.c
index caf3dc83a..97a9fcfd4 100644
--- a/lib/librte_eal/arm/rte_cpuflags.c
+++ b/lib/librte_eal/arm/rte_cpuflags.c
@@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(SHA2, REG_HWCAP,6)
FEAT_DEF(CRC32, REG_HWCAP,7)
FEAT_DEF(ATOMICS, REG_HWCAP,8)
+ FEAT_DEF(SVE, REG_HWCAP,22)
+ FEAT_DEF(SVE2, REG_HWCAP2, 1)
+ FEAT_DEF(SVEAES,REG_HWCAP2, 2)
+ FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
+ FEAT_DEF(SVEBITPERM,REG_HWCAP2, 4)
+ FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
+ FEAT_DEF(SVESM4,REG_HWCAP2, 6)
+ FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
+ FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
+ FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
+ FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */
--
2.27.0
Re: [dpdk-dev] [PATCH v2] lib/librte_eal: support SVE flag on ARM64
On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier)
wrote:
>
> From: "Wei Hu (Xavier)"
>
> SVE is the next-generation SIMD extension of the ARMv8-A AArch64
> instruction set.
> The related marco definition can be found in linux kernel:
> arch/arm64/include/uapi/asm/hwcap.h
>
> This patch supports getting cpu SVE feature on ARM64 platform.
>
> Signed-off-by: Chengwen Feng
> Signed-off-by: Wei Hu (Xavier)
Change the git commit like
eal/arm64: update CPU flags
> ---
> v1 -> v2:
> Adds more sve-related definition to rte_cpu_feature_table,
> sunch as SVE2, etc.
> ---
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 +
> lib/librte_eal/arm/rte_cpuflags.c| 11 +++
> 2 files changed, 12 insertions(+)
>
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..069844ddb 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SHA2,
> RTE_CPUFLAG_CRC32,
> RTE_CPUFLAG_ATOMICS,
> + RTE_CPUFLAG_SVE,
Please intrdouce the flag for all newly added items as well.
> RTE_CPUFLAG_AARCH64,
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c
> b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..97a9fcfd4 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SHA2, REG_HWCAP,6)
> FEAT_DEF(CRC32, REG_HWCAP,7)
> FEAT_DEF(ATOMICS, REG_HWCAP,8)
> + FEAT_DEF(SVE, REG_HWCAP,22)
> + FEAT_DEF(SVE2, REG_HWCAP2, 1)
> + FEAT_DEF(SVEAES,REG_HWCAP2, 2)
> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
> + FEAT_DEF(SVEBITPERM,REG_HWCAP2, 4)
> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
> + FEAT_DEF(SVESM4,REG_HWCAP2, 6)
Following stuff is missing
HWCAP2_FLAGM2 (1 << 7)
HWCAP2_FRINT(1 << 8)
> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> FEAT_DEF(AARCH64, REG_PLATFORM, 1)
> };
> #endif /* RTE_ARCH */
> --
> 2.27.0
>
Re: [dpdk-dev] [PATCH 20.11 16/19] doc: remove references to make in prog guides
On Fri, Aug 07, 2020 at 01:30:06PM +0100, Ciara Power wrote: > Make is no longer supported for compiling DPDK, references are now > removed in the documentation. > > Signed-off-by: Ciara Power > --- > doc/guides/prog_guide/build_app.rst | 46 +--- > .../prog_guide/dev_kit_build_system.rst | 218 +- > .../prog_guide/dev_kit_root_make_help.rst | 188 --- > .../prog_guide/env_abstraction_layer.rst | 17 +- > .../prog_guide/ext_app_lib_make_help.rst | 25 +- > doc/guides/prog_guide/graph_lib.rst | 6 +- > doc/guides/prog_guide/intro.rst | 2 +- > .../prog_guide/ip_fragment_reassembly_lib.rst | 5 - > .../link_bonding_poll_mode_drv_lib.rst| 5 - > doc/guides/prog_guide/lto.rst | 13 +- > doc/guides/prog_guide/mbuf_lib.rst| 4 +- > doc/guides/prog_guide/mempool_lib.rst | 7 +- > doc/guides/prog_guide/overview.rst| 12 +- > doc/guides/prog_guide/profile_app.rst | 15 +- > doc/guides/prog_guide/qos_framework.rst | 10 +- > doc/guides/prog_guide/rcu_lib.rst | 7 +- > doc/guides/prog_guide/source_org.rst | 23 +- > doc/guides/prog_guide/trace_lib.rst | 3 +- > .../prog_guide/writing_efficient_code.rst | 3 +- > 19 files changed, 36 insertions(+), 573 deletions(-) > delete mode 100644 doc/guides/prog_guide/dev_kit_root_make_help.rst > > diff --git a/doc/guides/prog_guide/dev_kit_build_system.rst > b/doc/guides/prog_guide/dev_kit_build_system.rst > index 74dba4dd16..91d2120e22 100644 > --- a/doc/guides/prog_guide/dev_kit_build_system.rst > +++ b/doc/guides/prog_guide/dev_kit_build_system.rst > @@ -31,51 +31,17 @@ Each build directory contains include files, libraries, > and applications. > A build directory is specific to a configuration that includes architecture > + execution environment + toolchain. > It is possible to have several build directories sharing the same sources > with different configurations. > > -For instance, to create a new build directory called my_sdk_build_dir using > the default configuration template config/defconfig_x86_64-linux, > -we use: > - Rather than selectively removing parts of this file and then looking to replace them with meson equivalents, I think we should just completely remove this section. The info for using the build system and the variables that meson uses are already covered in the contributors guide (section 1.11 specifically).
[dpdk-dev] [PATCH v2 1/1] librte_eal: rte_intr_callback_unregister_sync() - wrapper around rte_intr_callback_unregister().
Avoid race with unregister interrupt hanlder if interrupt
source has some active callbacks at the moment, use wrapper
around rte_intr_callback_unregister() to check for -EAGAIN
return value and to loop until rte_intr_callback_unregister()
succeeds.
Signed-off-by: Renata Saiakhova
---
drivers/bus/pci/linux/pci_vfio.c| 2 +-
lib/librte_eal/freebsd/eal_interrupts.c | 12
lib/librte_eal/include/rte_interrupts.h | 25 +
lib/librte_eal/linux/eal_interrupts.c | 12
lib/librte_eal/rte_eal_version.map | 1 +
5 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 07e072e13..a4bfdf553 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -415,7 +415,7 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev)
return -1;
}
- ret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,
+ ret = rte_intr_callback_unregister_sync(&dev->vfio_req_intr_handle,
pci_vfio_req_handler,
(void *)&dev->device);
if (ret < 0) {
diff --git a/lib/librte_eal/freebsd/eal_interrupts.c
b/lib/librte_eal/freebsd/eal_interrupts.c
index 6d53d33c8..7d99bdaff 100644
--- a/lib/librte_eal/freebsd/eal_interrupts.c
+++ b/lib/librte_eal/freebsd/eal_interrupts.c
@@ -345,6 +345,18 @@ rte_intr_callback_unregister(const struct rte_intr_handle
*intr_handle,
return ret;
}
+int
+rte_intr_callback_unregister_sync(const struct rte_intr_handle *intr_handle,
+ rte_intr_callback_fn cb_fn, void *cb_arg)
+{
+ int ret = 0;
+
+ while ((ret = rte_intr_callback_unregister(intr_handle, cb_fn, cb_arg))
== -EAGAIN)
+ rte_pause();
+
+ return ret;
+}
+
int
rte_intr_enable(const struct rte_intr_handle *intr_handle)
{
diff --git a/lib/librte_eal/include/rte_interrupts.h
b/lib/librte_eal/include/rte_interrupts.h
index e3b406abc..cc3bf45d8 100644
--- a/lib/librte_eal/include/rte_interrupts.h
+++ b/lib/librte_eal/include/rte_interrupts.h
@@ -94,6 +94,31 @@ rte_intr_callback_unregister_pending(const struct
rte_intr_handle *intr_handle,
rte_intr_callback_fn cb_fn, void *cb_arg,
rte_intr_unregister_callback_fn ucb_fn);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ *
+ * Loop until rte_intr_callback_unregister() succeeds.
+ * After a call to this function,
+ * the callback provided by the specified interrupt handle is unregistered.
+ *
+ * @param intr_handle
+ * pointer to the interrupt handle.
+ * @param cb
+ * callback address.
+ * @param cb_arg
+ * address of parameter for callback, (void *)-1 means to remove all
+ * registered which has the same callback address.
+ *
+ * @return
+ * - On success, return the number of callback entities removed.
+ * - On failure, a negative value.
+ */
+__rte_experimental
+int
+rte_intr_callback_unregister_sync(const struct rte_intr_handle *intr_handle,
+ rte_intr_callback_fn cb, void *cb_arg);
+
/**
* It enables the interrupt for the specified handle.
*
diff --git a/lib/librte_eal/linux/eal_interrupts.c
b/lib/librte_eal/linux/eal_interrupts.c
index 13db5c4e8..c99d5dbd4 100644
--- a/lib/librte_eal/linux/eal_interrupts.c
+++ b/lib/librte_eal/linux/eal_interrupts.c
@@ -662,6 +662,18 @@ rte_intr_callback_unregister(const struct rte_intr_handle
*intr_handle,
return ret;
}
+int
+rte_intr_callback_unregister_sync(const struct rte_intr_handle *intr_handle,
+ rte_intr_callback_fn cb_fn, void *cb_arg)
+{
+ int ret = 0;
+
+ while ((ret = rte_intr_callback_unregister(intr_handle, cb_fn, cb_arg))
== -EAGAIN)
+ rte_pause();
+
+ return ret;
+}
+
int
rte_intr_enable(const struct rte_intr_handle *intr_handle)
{
diff --git a/lib/librte_eal/rte_eal_version.map
b/lib/librte_eal/rte_eal_version.map
index bf0c17c23..b1d824f59 100644
--- a/lib/librte_eal/rte_eal_version.map
+++ b/lib/librte_eal/rte_eal_version.map
@@ -325,6 +325,7 @@ EXPERIMENTAL {
rte_fbarray_find_rev_biggest_free;
rte_fbarray_find_rev_biggest_used;
rte_intr_callback_unregister_pending;
+ rte_intr_callback_unregister_sync;
rte_realloc_socket;
# added in 19.08
--
2.17.2
[dpdk-dev] [PATCH v2 0/1] pci_vfio_disable_notifier(): avoid race with unregister
For pci_vfio, while removing the device by rte_dev_remove(), pci_vfio_disable_notifier() will call rte_intr_callback_unregister(), which may return -EAGAIN, if an interrupt source (kernel) has some active callbacks right now. As a result, the callback (req notifier) can be never unregistered, and the corresponding descriptor (vfio_req_intr_handle.fd) can be never closed. The kernel will continuously try to notify the user space using req notifier, but as the device is already removed, in this case it even cannot find a bus for that device, the log is full of messages "EAL: Cannot find bus for device (XX:XX.X)" v1->v2: Use only for pci-vfio in pci_vfio_disable_notifier() Renata Saiakhova (1): librte_eal: rte_intr_callback_unregister_sync() - wrapper around rte_intr_callback_unregister(). drivers/bus/pci/linux/pci_vfio.c| 2 +- lib/librte_eal/freebsd/eal_interrupts.c | 12 lib/librte_eal/include/rte_interrupts.h | 25 + lib/librte_eal/linux/eal_interrupts.c | 12 lib/librte_eal/rte_eal_version.map | 1 + 5 files changed, 51 insertions(+), 1 deletion(-) -- 2.17.2
Re: [dpdk-dev] [PATCH] eal: add option to put timestamp on console output
On Mon, 17 Aug 2020 11:37:40 +0100 Bruce Richardson wrote: > On Fri, Aug 14, 2020 at 12:20:28PM -0700, Stephen Hemminger wrote: > > On Fri, 14 Aug 2020 22:09:11 +0300 > > Dmitry Kozlyuk wrote: > > > > > On Fri, 14 Aug 2020 11:45:49 -0700, Stephen Hemminger wrote: > > > > On Fri, 14 Aug 2020 21:39:29 +0300 > > > > Dmitry Kozlyuk wrote: > > > [...] > > > > FreeBsd doesn't go through the same log code. > > > > > > Then --log-timestamp shouldn't appear on FreeBSD if it's unsupported. > > > > Was using same ifdef that is already there. There are several options > > already > > (like syslog facility) which do nothing on FreeBSD anyway. > > > While that is correct, I think that we really should support this on > FreeBSD also, since I don't think there is any technical reason we can't do > so, right? Even a sub-optimal solution where the timestamp write and log > write are non-atomic would be better than nothing. > > /Bruce FreeBSD now just uses default log stream (stdout). Linux has log stream to syslog and stdout. There is nothing Linux specific in the old or new code. The Linux code could just be moved to common, and both could use it. That is a separate patch, and someone with expertise and build setup for FreeBSD needs to do it.
Re: [dpdk-dev] [PATCH] net/tap: avoid using SIGIO
On 7/28/2020 11:48 AM, Morten Brørup wrote: >> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Stephen Hemminger >> Sent: Monday, July 27, 2020 9:44 PM >> >> On Mon, 27 Jul 2020 15:19:32 +0200 >> Morten Brørup wrote: >> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Stephen >> Hemminger Sent: Wednesday, July 15, 2020 1:58 AM SIGIO maybe used by application, instead choose another rt-signal. Linux allows any signal to be used for signal based IO. Search for an unused signal in the available rt-signal range. >>> >>> Just an observation. Feel free to ignore at your convenience: >>> >>> The problem is the same as for SIGIO if the application sets up its >> own signal handler after this, and uses some hardcoded rt-signal that >> happens to be the one found to be free. >>> >>> Unless the application doesn't use a hardcoded rt-signal, but also >> searches for an unused one. >>> >>> So perhaps the "search for unused rt-signal" should be exposed as a >> generic support function for the application (and this driver) to use. >> >> There is no safe way to use a signal deep inside DPDK in a driver. >> >> This is not the kind of thing that should be exposed to the >> application. >> >> The algorithm for finding an RT signal conforms to the recommended >> policy on the signal(7) >> manual page. >> >>programs should never refer to real-time signals using hard- >>coded numbers, but instead should always refer to real-time >> signals >>using the notation SIGRTMIN+n, and include suitable (run-time) >> checks >>that SIGRTMIN+n does not exceed SIGRTMAX. >> >> The application should be following the proscribed policy on the man >> page. >> If it doesn't it is broken. > > Great. That fully addresses my concern. > > Acked-by: Morten Brørup > Reviewed-by: Ferruh Yigit
[dpdk-dev] [RFC] ethdev: introduce Rx buffer split
>From 7f7052d8b85ff3ff7011bd844b6d3169c6e51923 Mon Sep 17 00:00:00 2001
From: Viacheslav Ovsiienko
Date: Mon, 17 Aug 2020 16:57:43 +
Subject: [RFC] ethdev: introduce Rx buffer split
The DPDK datapath in the transmit direction is very flexible.
An application can build the multisegment packet and manages
almost all data aspects - the memory pools where segments
are allocated from, the segment lengths, the memory attributes
like external buffers, registered for DMA, etc.
In the receiving direction, the datapath is much less flexible,
an application can only specify the memory pool to configure the
receiving queue and nothing more. In order to extend receiving
datapath capabilities it is proposed to add the way to provide
extended infoirmation how to split the packets being received.
The following structure is introduced to specify the Rx packet
segment:
struct rte_eth_rxseg {
struct rte_mempool *mp; /* memory pools to allocate segment from */
uint16_t length; /* segment maximal data length */
uint16_t offset; /* data offset from beginning of mbuf data buffer */
uint32_t reserved; /* reserved field */
};
The new routine rte_eth_rx_queue_setup_ex() is introduced to
setup the given Rx queue using the new extended Rx packet segment
description:
int
rte_eth_rx_queue_setup_ex(uint16_t port_id, uint16_t rx_queue_id,
uint16_t nb_rx_desc, unsigned int socket_id,
const struct rte_eth_rxconf *rx_conf,
const struct rte_eth_rxseg *rx_seg,
uint16_t n_seg)
This routine presents the two new parameters:
rx_seg - pointer the array of segment descriptions, each element
describes the memory pool, maximal data length, initial
data offset from the beginning of data buffer in mbuf
n_seg - number of elements in the array
The new offload flag DEV_RX_OFFLOAD_BUFFER_SPLIT in device
capabilities is introduced to present the way for PMD to report to
application about supporting Rx packet split to configurable
segments. Prior invoking the rte_eth_rx_queue_setup_ex() routine
application should check DEV_RX_OFFLOAD_BUFFER_SPLIT flag.
If the Rx queue is configured with new routine the packets being
received will be split into multiple segments pushed to the mbufs
with specified attributes. The PMD will allocate the first mbuf
from the pool specified in the first segment descriptor and puts
the data staring at specified offeset in the allocated mbuf data
buffer. If packet length exceeds the specified segment length
the next mbuf will be allocated according to the next segment
descriptor (if any) and data will be put in its data buffer at
specified offset and not exceeding specified length. If there is
no next descriptor the next mbuf will be allocated and filled in the
same way (from the same pool and with the same buffer offset/length)
as the current one.
For example, let's suppose we configured the Rx queue with the
following segments:
seg0 - pool0, len0=14B, off0=RTE_PKTMBUF_HEADROOM
seg1 - pool1, len1=20B, off1=0B
seg2 - pool2, len2=20B, off2=0B
seg3 - pool3, len3=512B, off3=0B
The packet 46 bytes long will look like the following:
seg0 - 14B long @ RTE_PKTMBUF_HEADROOM in mbuf from pool0
seg1 - 20B long @ 0 in mbuf from pool1
seg2 - 12B long @ 0 in mbuf from pool2
The packet 1500 bytes long will look like the following:
seg0 - 14B @ RTE_PKTMBUF_HEADROOM in mbuf from pool0
seg1 - 20B @ 0 in mbuf from pool1
seg2 - 20B @ 0 in mbuf from pool2
seg3 - 512B @ 0 in mbuf from pool3
seg4 - 512B @ 0 in mbuf from pool3
seg5 - 422B @ 0 in mbuf from pool3
The offload DEV_RX_OFFLOAD_SCATTER must be present and
configured to support new buffer spllit feature (if n_seg
is greater than one).
The new approach would allow splitting the ingress packets into
multiple parts pushed to the memory with different attributes.
For example, the packet headers can be pushed to the embedded
data buffers within mbufs and the application data into
the external buffers attached to mbufs allocated from the
different memory pools. The memory attributes for the split
parts may differ either - for example the application data
may be pushed into the external memory located on the dedicated
physical device, say GPU or NVMe. This would improve the DPDK
receiving datapath flexibility with preserving compatibility
with existing API.
Also, the proposed segment description might be used to specify
Rx packet split for some other features. For example, provide
the way to specify the extra memory pool for the Header Split
feature of some Intel PMD.
Signed-off-by: Viacheslav Ovsiienko
---
lib/librte_ethdev/rte_ethdev.c | 166
lib/librte_ethdev/rte_ethdev.h | 15
lib/librte_ethdev/rte_ethdev_core.h | 10 +++
3 files changed, 191 insertions(+)
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rt
[dpdk-dev] [PATCH v1 06/11] baseband/acc100: add HARQ loopback support
Additional support for HARQ memory loopback
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 158 +++
1 file changed, 158 insertions(+)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index 5cada0c..b715075 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -658,6 +658,7 @@
RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE |
RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE |
#ifdef ACC100_EXT_MEM
+ RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK |
RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE |
RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE |
#endif
@@ -1480,12 +1481,169 @@
return 1;
}
+static inline int
+harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
+ uint16_t total_enqueued_cbs) {
+ struct acc100_fcw_ld *fcw;
+ union acc100_dma_desc *desc;
+ int next_triplet = 1;
+ struct rte_mbuf *hq_output_head, *hq_output;
+ uint16_t harq_in_length = op->ldpc_dec.harq_combined_input.length;
+ if (harq_in_length == 0) {
+ rte_bbdev_log(ERR, "Loopback of invalid null size\n");
+ return -EINVAL;
+ }
+
+ int h_comp = check_bit(op->ldpc_dec.op_flags,
+ RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION
+ ) ? 1 : 0;
+ if (h_comp == 1)
+ harq_in_length = harq_in_length * 8 / 6;
+ harq_in_length = RTE_ALIGN(harq_in_length, 64);
+ uint16_t harq_dma_length_in = (h_comp == 0) ?
+ harq_in_length :
+ harq_in_length * 6 / 8;
+ uint16_t harq_dma_length_out = harq_dma_length_in;
+ bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
+ RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);
+ union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
+ uint16_t harq_index = (ddr_mem_in ?
+ op->ldpc_dec.harq_combined_input.offset :
+ op->ldpc_dec.harq_combined_output.offset)
+ / ACC100_HARQ_OFFSET;
+
+ uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
+ & q->sw_ring_wrap_mask);
+ desc = q->ring_addr + desc_idx;
+ fcw = &desc->req.fcw_ld;
+ /* Set the FCW from loopback into DDR */
+ memset(fcw, 0, sizeof(struct acc100_fcw_ld));
+ fcw->FCWversion = ACC100_FCW_VER;
+ fcw->qm = 2;
+ fcw->Zc = 384;
+ if (harq_in_length < 16 * N_ZC_1)
+ fcw->Zc = 16;
+ fcw->ncb = fcw->Zc * N_ZC_1;
+ fcw->rm_e = 2;
+ fcw->hcin_en = 1;
+ fcw->hcout_en = 1;
+
+ rte_bbdev_log(DEBUG, "Loopback IN %d Index %d offset %d length %d %d\n",
+ ddr_mem_in, harq_index,
+ harq_layout[harq_index].offset, harq_in_length,
+ harq_dma_length_in);
+
+ if (ddr_mem_in && (harq_layout[harq_index].offset > 0)) {
+ fcw->hcin_size0 = harq_layout[harq_index].size0;
+ fcw->hcin_offset = harq_layout[harq_index].offset;
+ fcw->hcin_size1 = harq_in_length - fcw->hcin_offset;
+ harq_dma_length_in = (fcw->hcin_size0 + fcw->hcin_size1);
+ if (h_comp == 1)
+ harq_dma_length_in = harq_dma_length_in * 6 / 8;
+ } else {
+ fcw->hcin_size0 = harq_in_length;
+ }
+ harq_layout[harq_index].val = 0;
+ rte_bbdev_log(DEBUG, "Loopback FCW Config %d %d %d\n",
+ fcw->hcin_size0, fcw->hcin_offset, fcw->hcin_size1);
+ fcw->hcout_size0 = harq_in_length;
+ fcw->hcin_decomp_mode = h_comp;
+ fcw->hcout_comp_mode = h_comp;
+ fcw->gain_i = 1;
+ fcw->gain_h = 1;
+
+ /* Set the prefix of descriptor. This could be done at polling */
+ desc->req.word0 = ACC100_DMA_DESC_TYPE;
+ desc->req.word1 = 0; /**< Timestamp could be disabled */
+ desc->req.word2 = 0;
+ desc->req.word3 = 0;
+ desc->req.numCBs = 1;
+
+ /* Null LLR input for Decoder */
+ desc->req.data_ptrs[next_triplet].address =
+ q->lb_in_addr_phys;
+ desc->req.data_ptrs[next_triplet].blen = 2;
+ desc->req.data_ptrs[next_triplet].blkid = ACC100_DMA_BLKID_IN;
+ desc->req.data_ptrs[next_triplet].last = 0;
+ desc->req.data_ptrs[next_triplet].dma_ext = 0;
+ next_triplet++;
+
+ /* HARQ Combine input from either Memory interface */
+ if (!ddr_mem_in) {
+ next_triplet = acc100_dma_fill_blk_type_out(&desc->req,
+ op->ldpc_dec.harq_combined_input.data,
+ op->ldpc_dec.harq_combined_input.offset,
+
[dpdk-dev] [PATCH v1 01/11] drivers/baseband: add PMD for ACC100
Add stubs for the ACC100 PMD Signed-off-by: Nicolas Chautru --- config/common_base | 4 + doc/guides/bbdevs/acc100.rst | 233 + doc/guides/bbdevs/index.rst| 1 + doc/guides/rel_notes/release_20_11.rst | 6 + drivers/baseband/Makefile | 2 + drivers/baseband/acc100/Makefile | 25 +++ drivers/baseband/acc100/meson.build| 6 + drivers/baseband/acc100/rte_acc100_pmd.c | 175 drivers/baseband/acc100/rte_acc100_pmd.h | 37 .../acc100/rte_pmd_bbdev_acc100_version.map| 3 + drivers/baseband/meson.build | 2 +- mk/rte.app.mk | 1 + 12 files changed, 494 insertions(+), 1 deletion(-) create mode 100644 doc/guides/bbdevs/acc100.rst create mode 100644 drivers/baseband/acc100/Makefile create mode 100644 drivers/baseband/acc100/meson.build create mode 100644 drivers/baseband/acc100/rte_acc100_pmd.c create mode 100644 drivers/baseband/acc100/rte_acc100_pmd.h create mode 100644 drivers/baseband/acc100/rte_pmd_bbdev_acc100_version.map diff --git a/config/common_base b/config/common_base index fbf0ee7..218ab16 100644 --- a/config/common_base +++ b/config/common_base @@ -584,6 +584,10 @@ CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=y # CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y +# Compile PMD for ACC100 bbdev device +# +CONFIG_RTE_LIBRTE_PMD_BBDEV_ACC100=y + # # Compile PMD for Intel FPGA LTE FEC bbdev device # diff --git a/doc/guides/bbdevs/acc100.rst b/doc/guides/bbdevs/acc100.rst new file mode 100644 index 000..9ae05df --- /dev/null +++ b/doc/guides/bbdevs/acc100.rst @@ -0,0 +1,233 @@ +.. SPDX-License-Identifier: BSD-3-Clause +Copyright(c) 2020 Intel Corporation + +Intel(R) ACC100 5G/4G FEC Poll Mode Driver +== + +The BBDEV ACC100 5G/4G FEC poll mode driver (PMD) supports an +implementation of a VRAN FEC wireless acceleration function. +This device is also known as Mount Bryce. + +Features + + +ACC100 5G/4G FEC PMD supports the following features: + +- LDPC Encode in the DL (5GNR) +- LDPC Decode in the UL (5GNR) +- Turbo Encode in the DL (4G) +- Turbo Decode in the UL (4G) +- 16 VFs per PF (physical device) +- Maximum of 128 queues per VF +- PCIe Gen-3 x16 Interface +- MSI +- SR-IOV + +ACC100 5G/4G FEC PMD supports the following BBDEV capabilities: + +* For the LDPC encode operation: + - ``RTE_BBDEV_LDPC_CRC_24B_ATTACH`` : set to attach CRC24B to CB(s) + - ``RTE_BBDEV_LDPC_RATE_MATCH`` : if set then do not do Rate Match bypass + - ``RTE_BBDEV_LDPC_INTERLEAVER_BYPASS`` : if set then bypass interleaver + +* For the LDPC decode operation: + - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK`` : check CRC24B from CB(s) + - ``RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE`` : disable early termination + - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP`` : drops CRC24B bits appended while decoding + - ``RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE`` : provides an input for HARQ combining + - ``RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE`` : provides an input for HARQ combining + - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE`` : HARQ memory input is internal + - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE`` : HARQ memory output is internal + - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK`` : loopback data to/from HARQ memory + - ``RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS`` : HARQ memory includes the fillers bits + - ``RTE_BBDEV_LDPC_DEC_SCATTER_GATHER`` : supports scatter-gather for input/output data + - ``RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION`` : supports compression of the HARQ input/output + - ``RTE_BBDEV_LDPC_LLR_COMPRESSION`` : supports LLR input compression + +* For the turbo encode operation: + - ``RTE_BBDEV_TURBO_CRC_24B_ATTACH`` : set to attach CRC24B to CB(s) + - ``RTE_BBDEV_TURBO_RATE_MATCH`` : if set then do not do Rate Match bypass + - ``RTE_BBDEV_TURBO_ENC_INTERRUPTS`` : set for encoder dequeue interrupts + - ``RTE_BBDEV_TURBO_RV_INDEX_BYPASS`` : set to bypass RV index + - ``RTE_BBDEV_TURBO_ENC_SCATTER_GATHER`` : supports scatter-gather for input/output data + +* For the turbo decode operation: + - ``RTE_BBDEV_TURBO_CRC_TYPE_24B`` : check CRC24B from CB(s) + - ``RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE`` : perform subblock de-interleave + - ``RTE_BBDEV_TURBO_DEC_INTERRUPTS`` : set for decoder dequeue interrupts + - ``RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN`` : set if negative LLR encoder i/p is supported + - ``RTE_BBDEV_TURBO_POS_LLR_1_BIT_IN`` : set if positive LLR encoder i/p is supported + - ``RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP`` : keep CRC24B bits appended while decoding + - ``RTE_BBDEV_TURBO_EARLY_TERMINATION`` : set early early termination feature + - ``RTE_BBDEV_TURBO_DEC_SCATTER_GATHER`` : supports scatter-gather f
[dpdk-dev] [PATCH v1 00/11] bbdev PMD ACC100
This set includes a new PMD for the accelerator ACC100 for 4G+5G FEC in 20.11. Documentation is updated as well accordingly. Existing unit tests are all still supported. Nicolas Chautru (11): drivers/baseband: add PMD for ACC100 baseband/acc100: add register definition file baseband/acc100: add info_get function baseband/acc100: add queue configuration baseband/acc100: add LDPC processing functions baseband/acc100: add HARQ loopback support baseband/acc100: add support for 4G processing baseband/acc100: add interrupt support to PMD baseband/acc100: add debug function to validate input baseband/acc100: add configure function doc: update bbdev feature table app/test-bbdev/Makefile|3 + app/test-bbdev/meson.build |3 + app/test-bbdev/test_bbdev_perf.c | 72 + config/common_base |4 + doc/guides/bbdevs/acc100.rst | 233 + doc/guides/bbdevs/features/acc100.ini | 14 + doc/guides/bbdevs/features/mbc.ini | 14 - doc/guides/bbdevs/index.rst|1 + doc/guides/rel_notes/release_20_11.rst |6 + drivers/baseband/Makefile |2 + drivers/baseband/acc100/Makefile | 28 + drivers/baseband/acc100/acc100_pf_enum.h | 1068 + drivers/baseband/acc100/acc100_vf_enum.h | 73 + drivers/baseband/acc100/meson.build|8 + drivers/baseband/acc100/rte_acc100_cfg.h | 113 + drivers/baseband/acc100/rte_acc100_pmd.c | 4695 drivers/baseband/acc100/rte_acc100_pmd.h | 590 +++ .../acc100/rte_pmd_bbdev_acc100_version.map| 10 + drivers/baseband/meson.build |2 +- mk/rte.app.mk |1 + 20 files changed, 6925 insertions(+), 15 deletions(-) create mode 100644 doc/guides/bbdevs/acc100.rst create mode 100644 doc/guides/bbdevs/features/acc100.ini delete mode 100644 doc/guides/bbdevs/features/mbc.ini create mode 100644 drivers/baseband/acc100/Makefile create mode 100644 drivers/baseband/acc100/acc100_pf_enum.h create mode 100644 drivers/baseband/acc100/acc100_vf_enum.h create mode 100644 drivers/baseband/acc100/meson.build create mode 100644 drivers/baseband/acc100/rte_acc100_cfg.h create mode 100644 drivers/baseband/acc100/rte_acc100_pmd.c create mode 100644 drivers/baseband/acc100/rte_acc100_pmd.h create mode 100644 drivers/baseband/acc100/rte_pmd_bbdev_acc100_version.map -- 1.8.3.1
[dpdk-dev] [PATCH v1 02/11] baseband/acc100: add register definition file
Add in the list of registers for the device and related
HW specs definitions.
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/acc100_pf_enum.h | 1068 ++
drivers/baseband/acc100/acc100_vf_enum.h | 73 ++
drivers/baseband/acc100/rte_acc100_pmd.h | 490 ++
3 files changed, 1631 insertions(+)
create mode 100644 drivers/baseband/acc100/acc100_pf_enum.h
create mode 100644 drivers/baseband/acc100/acc100_vf_enum.h
diff --git a/drivers/baseband/acc100/acc100_pf_enum.h
b/drivers/baseband/acc100/acc100_pf_enum.h
new file mode 100644
index 000..a1ee416
--- /dev/null
+++ b/drivers/baseband/acc100/acc100_pf_enum.h
@@ -0,0 +1,1068 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Intel Corporation
+ */
+
+#ifndef ACC100_PF_ENUM_H
+#define ACC100_PF_ENUM_H
+
+/*
+ * ACC100 Register mapping on PF BAR0
+ * This is automatically generated from RDL, format may change with new RDL
+ * Release.
+ * Variable names are as is
+ */
+enum {
+ HWPfQmgrEgressQueuesTemplate = 0x0007FE00,
+ HWPfQmgrIngressAq = 0x0008,
+ HWPfQmgrArbQAvail = 0x00A00010,
+ HWPfQmgrArbQBlock = 0x00A00014,
+ HWPfQmgrAqueueDropNotifEn = 0x00A00024,
+ HWPfQmgrAqueueDisableNotifEn = 0x00A00028,
+ HWPfQmgrSoftReset = 0x00A00038,
+ HWPfQmgrInitStatus= 0x00A0003C,
+ HWPfQmgrAramWatchdogCount = 0x00A00040,
+ HWPfQmgrAramWatchdogCounterEn = 0x00A00044,
+ HWPfQmgrAxiWatchdogCount = 0x00A00048,
+ HWPfQmgrAxiWatchdogCounterEn = 0x00A0004C,
+ HWPfQmgrProcessWatchdogCount = 0x00A00050,
+ HWPfQmgrProcessWatchdogCounterEn = 0x00A00054,
+ HWPfQmgrProcessUl4GWatchdogCounter= 0x00A00058,
+ HWPfQmgrProcessDl4GWatchdogCounter= 0x00A0005C,
+ HWPfQmgrProcessUl5GWatchdogCounter= 0x00A00060,
+ HWPfQmgrProcessDl5GWatchdogCounter= 0x00A00064,
+ HWPfQmgrProcessMldWatchdogCounter = 0x00A00068,
+ HWPfQmgrMsiOverflowUpperVf= 0x00A00070,
+ HWPfQmgrMsiOverflowLowerVf= 0x00A00074,
+ HWPfQmgrMsiWatchdogOverflow = 0x00A00078,
+ HWPfQmgrMsiOverflowEnable = 0x00A0007C,
+ HWPfQmgrDebugAqPointerMemGrp = 0x00A00100,
+ HWPfQmgrDebugOutputArbQFifoGrp= 0x00A00140,
+ HWPfQmgrDebugMsiFifoGrp = 0x00A00180,
+ HWPfQmgrDebugAxiWdTimeoutMsiFifo = 0x00A001C0,
+ HWPfQmgrDebugProcessWdTimeoutMsiFifo = 0x00A001C4,
+ HWPfQmgrDepthLog2Grp = 0x00A00200,
+ HWPfQmgrTholdGrp = 0x00A00300,
+ HWPfQmgrGrpTmplateReg0Indx= 0x00A00600,
+ HWPfQmgrGrpTmplateReg1Indx= 0x00A00680,
+ HWPfQmgrGrpTmplateReg2indx= 0x00A00700,
+ HWPfQmgrGrpTmplateReg3Indx= 0x00A00780,
+ HWPfQmgrGrpTmplateReg4Indx= 0x00A00800,
+ HWPfQmgrVfBaseAddr= 0x00A01000,
+ HWPfQmgrUl4GWeightRrVf= 0x00A02000,
+ HWPfQmgrDl4GWeightRrVf= 0x00A02100,
+ HWPfQmgrUl5GWeightRrVf= 0x00A02200,
+ HWPfQmgrDl5GWeightRrVf= 0x00A02300,
+ HWPfQmgrMldWeightRrVf = 0x00A02400,
+ HWPfQmgrArbQDepthGrp = 0x00A02F00,
+ HWPfQmgrGrpFunction0 = 0x00A02F40,
+ HWPfQmgrGrpFunction1 = 0x00A02F44,
+ HWPfQmgrGrpPriority = 0x00A02F48,
+ HWPfQmgrWeightSync= 0x00A03000,
+ HWPfQmgrAqEnableVf= 0x00A1,
+ HWPfQmgrAqResetVf = 0x00A2,
+ HWPfQmgrRingSizeVf= 0x00A20004,
+ HWPfQmgrGrpDepthLog20Vf = 0x00A20008,
+ HWPfQmgrGrpDepthLog21Vf = 0x00A2000C,
+ HWPfQmgrGrpFunction0Vf= 0x00A20010,
+ HWPfQmgrGrpFunction1Vf= 0x00A20014,
+ HWPfDmaConfig0Reg = 0x00B8,
+ HWPfDmaConfig1Reg = 0x00B80004,
+ HWPfDmaQmgrAddrReg= 0x00B80008,
+ HWPfDmaSoftResetReg = 0x00B8000C,
+ HWPfDmaAxcacheReg = 0x00B80010,
+ HWPfDmaVersionReg = 0x00B80014,
+ HWPfDmaFrameThreshold = 0x00B80018,
+ HWPfDmaTimestampLo= 0x00B8001C,
+ HWPfDmaTimestampHi= 0x00B80020,
+ HWPfDmaAxiStatus = 0x00B80028,
+ HWPfDmaAxiControl = 0x00B8002C,
+ HWPfDmaNoQmgr = 0x00B80030,
+ HWPfDmaQosScale
[dpdk-dev] [PATCH v1 04/11] baseband/acc100: add queue configuration
Adding function to create and configure queues for
the device. Still no capability.
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 420 ++-
drivers/baseband/acc100/rte_acc100_pmd.h | 45
2 files changed, 464 insertions(+), 1 deletion(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7807a30..7a21c57 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -26,6 +26,22 @@
RTE_LOG_REGISTER(acc100_logtype, pmd.bb.acc100, NOTICE);
#endif
+/* Write to MMIO register address */
+static inline void
+mmio_write(void *addr, uint32_t value)
+{
+ *((volatile uint32_t *)(addr)) = rte_cpu_to_le_32(value);
+}
+
+/* Write a register of a ACC100 device */
+static inline void
+acc100_reg_write(struct acc100_device *d, uint32_t offset, uint32_t payload)
+{
+ void *reg_addr = RTE_PTR_ADD(d->mmio_base, offset);
+ mmio_write(reg_addr, payload);
+ usleep(1000);
+}
+
/* Read a register of a ACC100 device */
static inline uint32_t
acc100_reg_read(struct acc100_device *d, uint32_t offset)
@@ -36,6 +52,22 @@
return rte_le_to_cpu_32(ret);
}
+/* Basic Implementation of Log2 for exact 2^N */
+static inline uint32_t
+log2_basic(uint32_t value)
+{
+ return (value == 0) ? 0 : __builtin_ctz(value);
+}
+
+/* Calculate memory alignment offset assuming alignment is 2^N */
+static inline uint32_t
+calc_mem_alignment_offset(void *unaligned_virt_mem, uint32_t alignment)
+{
+ rte_iova_t unaligned_phy_mem = rte_malloc_virt2iova(unaligned_virt_mem);
+ return (uint32_t)(alignment -
+ (unaligned_phy_mem & (alignment-1)));
+}
+
/* Calculate the offset of the enqueue register */
static inline uint32_t
queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
@@ -204,10 +236,393 @@
acc100_conf->q_dl_5g.aq_depth_log2);
}
+static void
+free_base_addresses(void **base_addrs, int size)
+{
+ int i;
+ for (i = 0; i < size; i++)
+ rte_free(base_addrs[i]);
+}
+
+static inline uint32_t
+get_desc_len(void)
+{
+ return sizeof(union acc100_dma_desc);
+}
+
+/* Allocate the 2 * 64MB block for the sw rings */
+static int
+alloc_2x64mb_sw_rings_mem(struct rte_bbdev *dev, struct acc100_device *d,
+ int socket)
+{
+ uint32_t sw_ring_size = ACC100_SIZE_64MBYTE;
+ d->sw_rings_base = rte_zmalloc_socket(dev->device->driver->name,
+ 2 * sw_ring_size, RTE_CACHE_LINE_SIZE, socket);
+ if (d->sw_rings_base == NULL) {
+ rte_bbdev_log(ERR, "Failed to allocate memory for %s:%u",
+ dev->device->driver->name,
+ dev->data->dev_id);
+ return -ENOMEM;
+ }
+ memset(d->sw_rings_base, 0, ACC100_SIZE_64MBYTE);
+ uint32_t next_64mb_align_offset = calc_mem_alignment_offset(
+ d->sw_rings_base, ACC100_SIZE_64MBYTE);
+ d->sw_rings = RTE_PTR_ADD(d->sw_rings_base, next_64mb_align_offset);
+ d->sw_rings_phys = rte_malloc_virt2iova(d->sw_rings_base) +
+ next_64mb_align_offset;
+ d->sw_ring_size = MAX_QUEUE_DEPTH * get_desc_len();
+ d->sw_ring_max_depth = d->sw_ring_size / get_desc_len();
+
+ return 0;
+}
+
+/* Attempt to allocate minimised memory space for sw rings */
+static void
+alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc100_device *d,
+ uint16_t num_queues, int socket)
+{
+ rte_iova_t sw_rings_base_phy, next_64mb_align_addr_phy;
+ uint32_t next_64mb_align_offset;
+ rte_iova_t sw_ring_phys_end_addr;
+ void *base_addrs[SW_RING_MEM_ALLOC_ATTEMPTS];
+ void *sw_rings_base;
+ int i = 0;
+ uint32_t q_sw_ring_size = MAX_QUEUE_DEPTH * get_desc_len();
+ uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues;
+
+ /* Find an aligned block of memory to store sw rings */
+ while (i < SW_RING_MEM_ALLOC_ATTEMPTS) {
+ /*
+* sw_ring allocated memory is guaranteed to be aligned to
+* q_sw_ring_size at the condition that the requested size is
+* less than the page size
+*/
+ sw_rings_base = rte_zmalloc_socket(
+ dev->device->driver->name,
+ dev_sw_ring_size, q_sw_ring_size, socket);
+
+ if (sw_rings_base == NULL) {
+ rte_bbdev_log(ERR,
+ "Failed to allocate memory for %s:%u",
+ dev->device->driver->name,
+ dev->data->dev_id);
+ break;
+ }
+
+ sw_rings_base_phy = rte_malloc_virt2iova(sw_rings_base);
+ next_64mb_
[dpdk-dev] [PATCH v1 03/11] baseband/acc100: add info_get function
Add in the "info_get" function to the driver, to allow us to query the
device.
No processing capability are available yet.
Linking bbdev-test to support the PMD with null capability.
Signed-off-by: Nicolas Chautru
---
app/test-bbdev/Makefile | 3 +
app/test-bbdev/meson.build | 3 +
drivers/baseband/acc100/rte_acc100_cfg.h | 96 +
drivers/baseband/acc100/rte_acc100_pmd.c | 225 +++
drivers/baseband/acc100/rte_acc100_pmd.h | 3 +
5 files changed, 330 insertions(+)
create mode 100644 drivers/baseband/acc100/rte_acc100_cfg.h
diff --git a/app/test-bbdev/Makefile b/app/test-bbdev/Makefile
index dc29557..dbc3437 100644
--- a/app/test-bbdev/Makefile
+++ b/app/test-bbdev/Makefile
@@ -26,5 +26,8 @@ endif
ifeq ($(CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC),y)
LDLIBS += -lrte_pmd_bbdev_fpga_5gnr_fec
endif
+ifeq ($(CONFIG_RTE_LIBRTE_PMD_BBDEV_ACC100),y)
+LDLIBS += -lrte_pmd_bbdev_acc100
+endif
include $(RTE_SDK)/mk/rte.app.mk
diff --git a/app/test-bbdev/meson.build b/app/test-bbdev/meson.build
index 18ab6a8..fbd8ae3 100644
--- a/app/test-bbdev/meson.build
+++ b/app/test-bbdev/meson.build
@@ -12,3 +12,6 @@ endif
if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC')
deps += ['pmd_bbdev_fpga_5gnr_fec']
endif
+if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_ACC100')
+ deps += ['pmd_bbdev_acc100']
+endif
\ No newline at end of file
diff --git a/drivers/baseband/acc100/rte_acc100_cfg.h
b/drivers/baseband/acc100/rte_acc100_cfg.h
new file mode 100644
index 000..73bbe36
--- /dev/null
+++ b/drivers/baseband/acc100/rte_acc100_cfg.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2020 Intel Corporation
+ */
+
+#ifndef _RTE_ACC100_CFG_H_
+#define _RTE_ACC100_CFG_H_
+
+/**
+ * @file rte_acc100_cfg.h
+ *
+ * Functions for configuring ACC100 HW, exposed directly to applications.
+ * Configuration related to encoding/decoding is done through the
+ * librte_bbdev library.
+ *
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ */
+
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/**< Number of Virtual Functions ACC100 supports */
+#define RTE_ACC100_NUM_VFS 16
+
+/**
+ * Definition of Queue Topology for ACC100 Configuration
+ * Some level of details is abstracted out to expose a clean interface
+ * given that comprehensive flexibility is not required
+ */
+struct rte_q_topology_t {
+ /** Number of QGroups in incremental order of priority */
+ uint16_t num_qgroups;
+ /**
+* All QGroups have the same number of AQs here.
+* Note : Could be made a 16-array if more flexibility is really
+* required
+*/
+ uint16_t num_aqs_per_groups;
+ /**
+* Depth of the AQs is the same of all QGroups here. Log2 Enum : 2^N
+* Note : Could be made a 16-array if more flexibility is really
+* required
+*/
+ uint16_t aq_depth_log2;
+ /**
+* Index of the first Queue Group Index - assuming contiguity
+* Initialized as -1
+*/
+ int8_t first_qgroup_index;
+};
+
+/**
+ * Definition of Arbitration related parameters for ACC100 Configuration
+ */
+struct rte_arbitration_t {
+ /** Default Weight for VF Fairness Arbitration */
+ uint16_t round_robin_weight;
+ uint32_t gbr_threshold1; /**< Guaranteed Bitrate Threshold 1 */
+ uint32_t gbr_threshold2; /**< Guaranteed Bitrate Threshold 2 */
+};
+
+/**
+ * Structure to pass ACC100 configuration.
+ * Note: all VF Bundles will have the same configuration.
+ */
+struct acc100_conf {
+ bool pf_mode_en; /**< 1 if PF is used for dataplane, 0 for VFs */
+ /** 1 if input '1' bit is represented by a positive LLR value, 0 if '1'
+* bit is represented by a negative value.
+*/
+ bool input_pos_llr_1_bit;
+ /** 1 if output '1' bit is represented by a positive value, 0 if '1'
+* bit is represented by a negative value.
+*/
+ bool output_pos_llr_1_bit;
+ uint16_t num_vf_bundles; /**< Number of VF bundles to setup */
+ /** Queue topology for each operation type */
+ struct rte_q_topology_t q_ul_4g;
+ struct rte_q_topology_t q_dl_4g;
+ struct rte_q_topology_t q_ul_5g;
+ struct rte_q_topology_t q_dl_5g;
+ /** Arbitration configuration for each operation type */
+ struct rte_arbitration_t arb_ul_4g[RTE_ACC100_NUM_VFS];
+ struct rte_arbitration_t arb_dl_4g[RTE_ACC100_NUM_VFS];
+ struct rte_arbitration_t arb_ul_5g[RTE_ACC100_NUM_VFS];
+ struct rte_arbitration_t arb_dl_5g[RTE_ACC100_NUM_VFS];
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ACC100_CFG_H_ */
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index 1b4cd13..7807a30 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -26,6 +26,18
[dpdk-dev] [PATCH v1 05/11] baseband/acc100: add LDPC processing functions
Adding LDPC decode and encode processing operations
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 1636 +-
1 file changed, 1634 insertions(+), 2 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7a21c57..5cada0c 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -15,6 +15,9 @@
#include
#include
#include
+#ifdef RTE_BBDEV_OFFLOAD_COST
+#include
+#endif
#include
#include
@@ -449,7 +452,6 @@
return 0;
}
-
/**
* Report a ACC100 queue index which is free
* Return 0 to 16k for a valid queue_idx or -1 when no queue is available
@@ -634,6 +636,46 @@
struct acc100_device *d = dev->data->dev_private;
static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
+ {
+ .type = RTE_BBDEV_OP_LDPC_ENC,
+ .cap.ldpc_enc = {
+ .capability_flags =
+ RTE_BBDEV_LDPC_RATE_MATCH |
+ RTE_BBDEV_LDPC_CRC_24B_ATTACH |
+ RTE_BBDEV_LDPC_INTERLEAVER_BYPASS,
+ .num_buffers_src =
+ RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
+ .num_buffers_dst =
+ RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
+ }
+ },
+ {
+ .type = RTE_BBDEV_OP_LDPC_DEC,
+ .cap.ldpc_dec = {
+ .capability_flags =
+ RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK |
+ RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP |
+ RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE |
+ RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE |
+#ifdef ACC100_EXT_MEM
+ RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE |
+ RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE |
+#endif
+ RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE |
+ RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS |
+ RTE_BBDEV_LDPC_DECODE_BYPASS |
+ RTE_BBDEV_LDPC_DEC_SCATTER_GATHER |
+ RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION |
+ RTE_BBDEV_LDPC_LLR_COMPRESSION,
+ .llr_size = 8,
+ .llr_decimals = 1,
+ .num_buffers_src =
+ RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
+ .num_buffers_hard_out =
+ RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
+ .num_buffers_soft_out = 0,
+ }
+ },
RTE_BBDEV_END_OF_CAPABILITIES_LIST()
};
@@ -669,9 +711,14 @@
dev_info->cpu_flag_reqs = NULL;
dev_info->min_alignment = 64;
dev_info->capabilities = bbdev_capabilities;
+#ifdef ACC100_EXT_MEM
dev_info->harq_buffer_size = d->ddr_size;
+#else
+ dev_info->harq_buffer_size = 0;
+#endif
}
+
static const struct rte_bbdev_ops acc100_bbdev_ops = {
.setup_queues = acc100_setup_queues,
.close = acc100_dev_close,
@@ -696,6 +743,1588 @@
{.device_id = 0},
};
+/* Read flag value 0/1 from bitmap */
+static inline bool
+check_bit(uint32_t bitmap, uint32_t bitmask)
+{
+ return bitmap & bitmask;
+}
+
+static inline char *
+mbuf_append(struct rte_mbuf *m_head, struct rte_mbuf *m, uint16_t len)
+{
+ if (unlikely(len > rte_pktmbuf_tailroom(m)))
+ return NULL;
+
+ char *tail = (char *)m->buf_addr + m->data_off + m->data_len;
+ m->data_len = (uint16_t)(m->data_len + len);
+ m_head->pkt_len = (m_head->pkt_len + len);
+ return tail;
+}
+
+/* Compute value of k0.
+ * Based on 3GPP 38.212 Table 5.4.2.1-2
+ * Starting position of different redundancy versions, k0
+ */
+static inline uint16_t
+get_k0(uint16_t n_cb, uint16_t z_c, uint8_t bg, uint8_t rv_index)
+{
+ if (rv_index == 0)
+ return 0;
+ uint16_t n = (bg == 1 ? N_ZC_1 : N_ZC_2) * z_c;
+ if (n_cb == n) {
+ if (rv_index == 1)
+ return (bg == 1 ? K0_1_1 : K0_1_2) * z_c;
+ else if (rv_index == 2)
+ return (bg == 1 ? K0_2_1 : K0_2_2) * z_c;
+ else
+ return (bg == 1 ? K0_3_1 : K0_3_2) * z_c;
+ }
+ /* LBRM case - includes a division by N */
+ if (rv_index == 1)
+ return (((bg == 1 ? K0_1_1 : K0_1_2) * n_cb)
+ / n) * z_c;
+ else if (rv_index == 2)
+ ret
[dpdk-dev] [PATCH v1 08/11] baseband/acc100: add interrupt support to PMD
Adding capability and functions to support MSI
interrupts, call backs and inforing.
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 285 ++-
drivers/baseband/acc100/rte_acc100_pmd.h | 15 ++
2 files changed, 298 insertions(+), 2 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index 4826c4d..cc6c640 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -339,6 +339,213 @@
free_base_addresses(base_addrs, i);
}
+/*
+ * Find queue_id of a device queue based on details from the Info Ring.
+ * If a queue isn't found UINT16_MAX is returned.
+ */
+static inline uint16_t
+get_queue_id_from_ring_info(struct rte_bbdev_data *data,
+ const union acc100_info_ring_data ring_data)
+{
+ uint16_t queue_id;
+
+ for (queue_id = 0; queue_id < data->num_queues; ++queue_id) {
+ struct acc100_queue *acc100_q =
+ data->queues[queue_id].queue_private;
+ if (acc100_q != NULL && acc100_q->aq_id == ring_data.aq_id &&
+ acc100_q->qgrp_id == ring_data.qg_id &&
+ acc100_q->vf_id == ring_data.vf_id)
+ return queue_id;
+ }
+
+ return UINT16_MAX;
+}
+
+/* Checks PF Info Ring to find the interrupt cause and handles it accordingly
*/
+static inline void
+acc100_check_ir(struct acc100_device *acc100_dev)
+{
+ volatile union acc100_info_ring_data *ring_data;
+ uint16_t info_ring_head = acc100_dev->info_ring_head;
+ if (acc100_dev->info_ring == NULL)
+ return;
+
+ ring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head &
+ ACC100_INFO_RING_MASK);
+
+ while (ring_data->valid) {
+ if ((ring_data->int_nb < ACC100_PF_INT_DMA_DL_DESC_IRQ) || (
+ ring_data->int_nb >
+ ACC100_PF_INT_DMA_DL5G_DESC_IRQ))
+ rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
+ ring_data->int_nb, ring_data->detailed_info);
+ /* Initialize Info Ring entry and move forward */
+ ring_data->val = 0;
+ info_ring_head++;
+ ring_data = acc100_dev->info_ring +
+ (info_ring_head & ACC100_INFO_RING_MASK);
+ }
+}
+
+/* Checks PF Info Ring to find the interrupt cause and handles it accordingly
*/
+static inline void
+acc100_pf_interrupt_handler(struct rte_bbdev *dev)
+{
+ struct acc100_device *acc100_dev = dev->data->dev_private;
+ volatile union acc100_info_ring_data *ring_data;
+ struct acc100_deq_intr_details deq_intr_det;
+
+ ring_data = acc100_dev->info_ring + (acc100_dev->info_ring_head &
+ ACC100_INFO_RING_MASK);
+
+ while (ring_data->valid) {
+
+ rte_bbdev_log_debug(
+ "ACC100 PF Interrupt received, Info Ring data:
0x%x",
+ ring_data->val);
+
+ switch (ring_data->int_nb) {
+ case ACC100_PF_INT_DMA_DL_DESC_IRQ:
+ case ACC100_PF_INT_DMA_UL_DESC_IRQ:
+ case ACC100_PF_INT_DMA_UL5G_DESC_IRQ:
+ case ACC100_PF_INT_DMA_DL5G_DESC_IRQ:
+ deq_intr_det.queue_id = get_queue_id_from_ring_info(
+ dev->data, *ring_data);
+ if (deq_intr_det.queue_id == UINT16_MAX) {
+ rte_bbdev_log(ERR,
+ "Couldn't find queue: aq_id:
%u, qg_id: %u, vf_id: %u",
+ ring_data->aq_id,
+ ring_data->qg_id,
+ ring_data->vf_id);
+ return;
+ }
+ rte_bbdev_pmd_callback_process(dev,
+ RTE_BBDEV_EVENT_DEQUEUE, &deq_intr_det);
+ break;
+ default:
+ rte_bbdev_pmd_callback_process(dev,
+ RTE_BBDEV_EVENT_ERROR, NULL);
+ break;
+ }
+
+ /* Initialize Info Ring entry and move forward */
+ ring_data->val = 0;
+ ++acc100_dev->info_ring_head;
+ ring_data = acc100_dev->info_ring +
+ (acc100_dev->info_ring_head &
+ ACC100_INFO_RING_MASK);
+ }
+}
+
+/* Checks VF Info Ring to find the interrupt cause and handles it accordingly
*/
+static inline void
+acc100_vf_interrupt_handler(struct rte_bbdev *dev)
+{
+ struct acc100_device *acc100_dev =
[dpdk-dev] [PATCH v1 07/11] baseband/acc100: add support for 4G processing
Adding capability for 4G encode and decoder processing
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 1012 --
1 file changed, 945 insertions(+), 67 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index b715075..4826c4d 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -339,7 +339,6 @@
free_base_addresses(base_addrs, i);
}
-
/* Allocate 64MB memory used for all software rings */
static int
acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
@@ -637,6 +636,41 @@
static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
{
+ .type = RTE_BBDEV_OP_TURBO_DEC,
+ .cap.turbo_dec = {
+ .capability_flags =
+ RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE |
+ RTE_BBDEV_TURBO_CRC_TYPE_24B |
+ RTE_BBDEV_TURBO_HALF_ITERATION_EVEN |
+ RTE_BBDEV_TURBO_EARLY_TERMINATION |
+ RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |
+ RTE_BBDEV_TURBO_MAP_DEC |
+ RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |
+ RTE_BBDEV_TURBO_DEC_SCATTER_GATHER,
+ .max_llr_modulus = INT8_MAX,
+ .num_buffers_src =
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS,
+ .num_buffers_hard_out =
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS,
+ .num_buffers_soft_out =
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS,
+ }
+ },
+ {
+ .type = RTE_BBDEV_OP_TURBO_ENC,
+ .cap.turbo_enc = {
+ .capability_flags =
+ RTE_BBDEV_TURBO_CRC_24B_ATTACH |
+ RTE_BBDEV_TURBO_RV_INDEX_BYPASS |
+ RTE_BBDEV_TURBO_RATE_MATCH |
+ RTE_BBDEV_TURBO_ENC_SCATTER_GATHER,
+ .num_buffers_src =
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS,
+ .num_buffers_dst =
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS,
+ }
+ },
+ {
.type = RTE_BBDEV_OP_LDPC_ENC,
.cap.ldpc_enc = {
.capability_flags =
@@ -719,7 +753,6 @@
#endif
}
-
static const struct rte_bbdev_ops acc100_bbdev_ops = {
.setup_queues = acc100_setup_queues,
.close = acc100_dev_close,
@@ -763,6 +796,58 @@
return tail;
}
+/* Fill in a frame control word for turbo encoding. */
+static inline void
+acc100_fcw_te_fill(const struct rte_bbdev_enc_op *op, struct acc100_fcw_te
*fcw)
+{
+ fcw->code_block_mode = op->turbo_enc.code_block_mode;
+ if (fcw->code_block_mode == 0) { /* For TB mode */
+ fcw->k_neg = op->turbo_enc.tb_params.k_neg;
+ fcw->k_pos = op->turbo_enc.tb_params.k_pos;
+ fcw->c_neg = op->turbo_enc.tb_params.c_neg;
+ fcw->c = op->turbo_enc.tb_params.c;
+ fcw->ncb_neg = op->turbo_enc.tb_params.ncb_neg;
+ fcw->ncb_pos = op->turbo_enc.tb_params.ncb_pos;
+
+ if (check_bit(op->turbo_enc.op_flags,
+ RTE_BBDEV_TURBO_RATE_MATCH)) {
+ fcw->bypass_rm = 0;
+ fcw->cab = op->turbo_enc.tb_params.cab;
+ fcw->ea = op->turbo_enc.tb_params.ea;
+ fcw->eb = op->turbo_enc.tb_params.eb;
+ } else {
+ /* E is set to the encoding output size when RM is
+* bypassed.
+*/
+ fcw->bypass_rm = 1;
+ fcw->cab = fcw->c_neg;
+ fcw->ea = 3 * fcw->k_neg + 12;
+ fcw->eb = 3 * fcw->k_pos + 12;
+ }
+ } else { /* For CB mode */
+ fcw->k_pos = op->turbo_enc.cb_params.k;
+ fcw->ncb_pos = op->turbo_enc.cb_params.ncb;
+
+ if (check_bit(op->turbo_enc.op_flags,
+ RTE_BBDEV_TURBO_RATE_MATCH)) {
+ fcw->bypass_rm = 0;
+ fcw->eb = op->turbo_enc.cb_params.e;
+ } else {
+
[dpdk-dev] [PATCH v1 09/11] baseband/acc100: add debug function to validate input
Debug functions to validate the input API from user
Only enabled in DEBUG mode at build time
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 424 +++
1 file changed, 424 insertions(+)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
b/drivers/baseband/acc100/rte_acc100_pmd.c
index cc6c640..9d88b99 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1945,6 +1945,231 @@
}
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+/* Validates turbo encoder parameters */
+static inline int
+validate_enc_op(struct rte_bbdev_enc_op *op)
+{
+ struct rte_bbdev_op_turbo_enc *turbo_enc = &op->turbo_enc;
+ struct rte_bbdev_op_enc_turbo_cb_params *cb = NULL;
+ struct rte_bbdev_op_enc_turbo_tb_params *tb = NULL;
+ uint16_t kw, kw_neg, kw_pos;
+
+ if (op->mempool == NULL) {
+ rte_bbdev_log(ERR, "Invalid mempool pointer");
+ return -1;
+ }
+ if (turbo_enc->input.data == NULL) {
+ rte_bbdev_log(ERR, "Invalid input pointer");
+ return -1;
+ }
+ if (turbo_enc->output.data == NULL) {
+ rte_bbdev_log(ERR, "Invalid output pointer");
+ return -1;
+ }
+ if (turbo_enc->rv_index > 3) {
+ rte_bbdev_log(ERR,
+ "rv_index (%u) is out of range 0 <= value <= 3",
+ turbo_enc->rv_index);
+ return -1;
+ }
+ if (turbo_enc->code_block_mode != 0 &&
+ turbo_enc->code_block_mode != 1) {
+ rte_bbdev_log(ERR,
+ "code_block_mode (%u) is out of range 0 <=
value <= 1",
+ turbo_enc->code_block_mode);
+ return -1;
+ }
+
+ if (turbo_enc->code_block_mode == 0) {
+ tb = &turbo_enc->tb_params;
+ if ((tb->k_neg < RTE_BBDEV_TURBO_MIN_CB_SIZE
+ || tb->k_neg > RTE_BBDEV_TURBO_MAX_CB_SIZE)
+ && tb->c_neg > 0) {
+ rte_bbdev_log(ERR,
+ "k_neg (%u) is out of range %u <= value
<= %u",
+ tb->k_neg, RTE_BBDEV_TURBO_MIN_CB_SIZE,
+ RTE_BBDEV_TURBO_MAX_CB_SIZE);
+ return -1;
+ }
+ if (tb->k_pos < RTE_BBDEV_TURBO_MIN_CB_SIZE
+ || tb->k_pos > RTE_BBDEV_TURBO_MAX_CB_SIZE) {
+ rte_bbdev_log(ERR,
+ "k_pos (%u) is out of range %u <= value
<= %u",
+ tb->k_pos, RTE_BBDEV_TURBO_MIN_CB_SIZE,
+ RTE_BBDEV_TURBO_MAX_CB_SIZE);
+ return -1;
+ }
+ if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1))
+ rte_bbdev_log(ERR,
+ "c_neg (%u) is out of range 0 <= value
<= %u",
+ tb->c_neg,
+ RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1);
+ if (tb->c < 1 || tb->c > RTE_BBDEV_TURBO_MAX_CODE_BLOCKS) {
+ rte_bbdev_log(ERR,
+ "c (%u) is out of range 1 <= value <=
%u",
+ tb->c, RTE_BBDEV_TURBO_MAX_CODE_BLOCKS);
+ return -1;
+ }
+ if (tb->cab > tb->c) {
+ rte_bbdev_log(ERR,
+ "cab (%u) is greater than c (%u)",
+ tb->cab, tb->c);
+ return -1;
+ }
+ if ((tb->ea < RTE_BBDEV_TURBO_MIN_CB_SIZE || (tb->ea % 2))
+ && tb->r < tb->cab) {
+ rte_bbdev_log(ERR,
+ "ea (%u) is less than %u or it is not
even",
+ tb->ea, RTE_BBDEV_TURBO_MIN_CB_SIZE);
+ return -1;
+ }
+ if ((tb->eb < RTE_BBDEV_TURBO_MIN_CB_SIZE || (tb->eb % 2))
+ && tb->c > tb->cab) {
+ rte_bbdev_log(ERR,
+ "eb (%u) is less than %u or it is not
even",
+ tb->eb, RTE_BBDEV_TURBO_MIN_CB_SIZE);
+ return -1;
+ }
+
+ kw_neg = 3 * RTE_ALIGN_CEIL(tb->k_neg + 4,
+ RTE_BBDEV_TURBO_C_SUBBLOCK);
+ if (tb->ncb_neg < tb->k_neg || tb->ncb_neg > kw_neg) {
+ rte_bbdev_log(ERR,
+ "ncb_neg (%u) is out of range (%u)
k_neg <= valu
[dpdk-dev] [PATCH v1 10/11] baseband/acc100: add configure function
Add configure function to configure the PF from within
the bbdev-test itself without external application
configuration the device.
Signed-off-by: Nicolas Chautru
---
app/test-bbdev/test_bbdev_perf.c | 72 +++
drivers/baseband/acc100/Makefile | 3 +
drivers/baseband/acc100/meson.build| 2 +
drivers/baseband/acc100/rte_acc100_cfg.h | 17 +
drivers/baseband/acc100/rte_acc100_pmd.c | 504 +
.../acc100/rte_pmd_bbdev_acc100_version.map| 7 +
6 files changed, 605 insertions(+)
diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
index 45c0d62..32f23ff 100644
--- a/app/test-bbdev/test_bbdev_perf.c
+++ b/app/test-bbdev/test_bbdev_perf.c
@@ -52,6 +52,18 @@
#define FLR_5G_TIMEOUT 610
#endif
+#ifdef RTE_LIBRTE_PMD_BBDEV_ACC100
+#include
+#define ACC100PF_DRIVER_NAME ("intel_acc100_pf")
+#define ACC100VF_DRIVER_NAME ("intel_acc100_vf")
+#define ACC100_QMGR_NUM_AQS 16
+#define ACC100_QMGR_NUM_QGS 2
+#define ACC100_QMGR_AQ_DEPTH 5
+#define ACC100_QMGR_INVALID_IDX -1
+#define ACC100_QMGR_RR 1
+#define ACC100_QOS_GBR 0
+#endif
+
#define OPS_CACHE_SIZE 256U
#define OPS_POOL_SIZE_MIN 511U /* 0.5K per queue */
@@ -653,6 +665,66 @@ typedef int (test_case_function)(struct active_device *ad,
info->dev_name);
}
#endif
+#ifdef RTE_LIBRTE_PMD_BBDEV_ACC100
+ if ((get_init_device() == true) &&
+ (!strcmp(info->drv.driver_name, ACC100PF_DRIVER_NAME))) {
+ struct acc100_conf conf;
+ unsigned int i;
+
+ printf("Configure ACC100 FEC Driver %s with default values\n",
+ info->drv.driver_name);
+
+ /* clear default configuration before initialization */
+ memset(&conf, 0, sizeof(struct acc100_conf));
+
+ /* Always set in PF mode for built-in configuration */
+ conf.pf_mode_en = true;
+ for (i = 0; i < RTE_ACC100_NUM_VFS; ++i) {
+ conf.arb_dl_4g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_dl_4g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_dl_4g[i].round_robin_weight = ACC100_QMGR_RR;
+ conf.arb_ul_4g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_ul_4g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_ul_4g[i].round_robin_weight = ACC100_QMGR_RR;
+ conf.arb_dl_5g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_dl_5g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_dl_5g[i].round_robin_weight = ACC100_QMGR_RR;
+ conf.arb_ul_5g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_ul_5g[i].gbr_threshold1 = ACC100_QOS_GBR;
+ conf.arb_ul_5g[i].round_robin_weight = ACC100_QMGR_RR;
+ }
+
+ conf.input_pos_llr_1_bit = true;
+ conf.output_pos_llr_1_bit = true;
+ conf.num_vf_bundles = 1; /**< Number of VF bundles to setup */
+
+ conf.q_ul_4g.num_qgroups = ACC100_QMGR_NUM_QGS;
+ conf.q_ul_4g.first_qgroup_index = ACC100_QMGR_INVALID_IDX;
+ conf.q_ul_4g.num_aqs_per_groups = ACC100_QMGR_NUM_AQS;
+ conf.q_ul_4g.aq_depth_log2 = ACC100_QMGR_AQ_DEPTH;
+ conf.q_dl_4g.num_qgroups = ACC100_QMGR_NUM_QGS;
+ conf.q_dl_4g.first_qgroup_index = ACC100_QMGR_INVALID_IDX;
+ conf.q_dl_4g.num_aqs_per_groups = ACC100_QMGR_NUM_AQS;
+ conf.q_dl_4g.aq_depth_log2 = ACC100_QMGR_AQ_DEPTH;
+ conf.q_ul_5g.num_qgroups = ACC100_QMGR_NUM_QGS;
+ conf.q_ul_5g.first_qgroup_index = ACC100_QMGR_INVALID_IDX;
+ conf.q_ul_5g.num_aqs_per_groups = ACC100_QMGR_NUM_AQS;
+ conf.q_ul_5g.aq_depth_log2 = ACC100_QMGR_AQ_DEPTH;
+ conf.q_dl_5g.num_qgroups = ACC100_QMGR_NUM_QGS;
+ conf.q_dl_5g.first_qgroup_index = ACC100_QMGR_INVALID_IDX;
+ conf.q_dl_5g.num_aqs_per_groups = ACC100_QMGR_NUM_AQS;
+ conf.q_dl_5g.aq_depth_log2 = ACC100_QMGR_AQ_DEPTH;
+
+ /* setup PF with configuration information */
+ ret = acc100_configure(info->dev_name, &conf);
+ TEST_ASSERT_SUCCESS(ret,
+ "Failed to configure ACC100 PF for bbdev %s",
+ info->dev_name);
+ /* Let's refresh this now this is configured */
+ }
+ rte_bbdev_info_get(dev_id, info);
+#endif
+
nb_queues = RTE_MIN(rte_lcore_count(), info->drv.max_num_queues);
nb_queues = RTE_MIN(nb_queues, (unsigned int) MAX_QUEUES);
diff --git a/drivers/baseband/acc100/Makefile b/drivers/baseband/acc100/Makefile
index c79e487..37e73af 100644
--- a/drivers/baseba
[dpdk-dev] [PATCH v1 11/11] doc: update bbdev feature table
Correcting overview matrix to use acc100 name Signed-off-by: Nicolas Chautru --- doc/guides/bbdevs/features/acc100.ini | 14 ++ doc/guides/bbdevs/features/mbc.ini| 14 -- 2 files changed, 14 insertions(+), 14 deletions(-) create mode 100644 doc/guides/bbdevs/features/acc100.ini delete mode 100644 doc/guides/bbdevs/features/mbc.ini diff --git a/doc/guides/bbdevs/features/acc100.ini b/doc/guides/bbdevs/features/acc100.ini new file mode 100644 index 000..642cd48 --- /dev/null +++ b/doc/guides/bbdevs/features/acc100.ini @@ -0,0 +1,14 @@ +; +; Supported features of the 'acc100' bbdev driver. +; +; Refer to default.ini for the full list of available PMD features. +; +[Features] +Turbo Decoder (4G) = Y +Turbo Encoder (4G) = Y +LDPC Decoder (5G) = Y +LDPC Encoder (5G) = Y +LLR/HARQ Compression = Y +External DDR Access= Y +HW Accelerated = Y +BBDEV API = Y diff --git a/doc/guides/bbdevs/features/mbc.ini b/doc/guides/bbdevs/features/mbc.ini deleted file mode 100644 index 78a7b95..000 --- a/doc/guides/bbdevs/features/mbc.ini +++ /dev/null @@ -1,14 +0,0 @@ -; -; Supported features of the 'mbc' bbdev driver. -; -; Refer to default.ini for the full list of available PMD features. -; -[Features] -Turbo Decoder (4G) = Y -Turbo Encoder (4G) = Y -LDPC Decoder (5G) = Y -LDPC Encoder (5G) = Y -LLR/HARQ Compression = Y -External DDR Access= Y -HW Accelerated = Y -BBDEV API = Y -- 1.8.3.1
Re: [dpdk-dev] [RFC]lib/ethdev: fix data type in tc_rxq and tc_txq
Dear all:
Are there any suggestions for this patch?
在 2020/8/7 20:33, humin (Q) 写道:
Currently, base and nb_queue in the tc_rxq and tc_txq information
of queue and TC mapping on both TX and RX paths are uint8_t.
The structure is as follows:
struct rte_eth_dcb_tc_queue_mapping {
/** rx queues assigned to tc per Pool */
struct {
uint8_t base;
uint8_t nb_queue;
} tc_rxq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
/** rx queues assigned to tc per Pool */
struct {
uint8_t base;
uint8_t nb_queue;
} tc_txq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
};
However, these datas will be truncated when queue number under a TC
is greater than 256. So it is necessay for data type of base and
nb_queue to change from uint8_t to uint16_t.
[RFC]lib/ethdev: fix rx/tx queue stats mapping API
Currently, only statistics of rx/tx queues with queue_id less than
RTE_ETHDEV_QUEUE_STAT_CNTRS can be displayed. If there is a certain
application scenario that it needs to use 256 or more than 256 queues
and display all statistics of rx/tx queue. At this moment, we have to
change the macro to be equaled to the queue number.
However, modifying the macro to be greater than 256 will trigger
many errors and warnings from test-pmd, PMD driver and librte_ethdev
during compiling dpdk project. But it is possible and permited that
rx/tx queue number is greater than 256 and all statistics of rx/tx
queue need to be displayed. In addition, the data type of rx/tx queue
number in rte_eth_dev_configure API is 'uint16_t'. So It is unreasonable
to use the 'uint8_t' type for variables that control which per-queue
statistics can be displayed.
In these modifications, related API in /lib/librte_ethdev/rte_ethdev.c
is as follows:
static int
-set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t
stat_idx,
+set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint16_t
stat_idx,
uint8_t is_rx)
int
rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t
tx_queue_id,
- uint8_t stat_idx)
+ uint16_t stat_idx)
int
rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t
rx_queue_id,
- uint8_t stat_idx)
+ uint16_t stat_idx)
[dpdk-dev] [PATCH v3] eal/arm64: update CPU flags
From: "Wei Hu (Xavier)"
SVE is the next-generation SIMD extension of the ARMv8-A AArch64
instruction set.
The related marco definition can be found in linux kernel:
arch/arm64/include/uapi/asm/hwcap.h
This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc.
Signed-off-by: Chengwen Feng
Signed-off-by: Wei Hu (Xavier)
---
v2 -> v3:
1. Change commit log.
2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[].
3. Add the flags for newly added items into enum rte_cpu_flag_t.
v1 -> v2:
Adds more sve-related definition to rte_cpu_feature_table,
sunch as SVE2, etc.
---
lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +
lib/librte_eal/arm/rte_cpuflags.c| 13 +
2 files changed, 26 insertions(+)
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
b/lib/librte_eal/arm/include/rte_cpuflags_64.h
index 95cc01474..aa7a56d49 100644
--- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
+++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
@@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
RTE_CPUFLAG_ATOMICS,
+ RTE_CPUFLAG_SVE,
+ RTE_CPUFLAG_SVE2,
+ RTE_CPUFLAG_SVEAES,
+ RTE_CPUFLAG_SVEPMULL,
+ RTE_CPUFLAG_SVEBITPERM,
+ RTE_CPUFLAG_SVESHA3,
+ RTE_CPUFLAG_SVESM4,
+ RTE_CPUFLAG_FLAGM2,
+ RTE_CPUFLAG_FRINT,
+ RTE_CPUFLAG_SVEI8MM,
+ RTE_CPUFLAG_SVEF32MM,
+ RTE_CPUFLAG_SVEF64MM,
+ RTE_CPUFLAG_SVEBF16,
RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
diff --git a/lib/librte_eal/arm/rte_cpuflags.c
b/lib/librte_eal/arm/rte_cpuflags.c
index caf3dc83a..7b257b787 100644
--- a/lib/librte_eal/arm/rte_cpuflags.c
+++ b/lib/librte_eal/arm/rte_cpuflags.c
@@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(SHA2, REG_HWCAP,6)
FEAT_DEF(CRC32, REG_HWCAP,7)
FEAT_DEF(ATOMICS, REG_HWCAP,8)
+ FEAT_DEF(SVE, REG_HWCAP,22)
+ FEAT_DEF(SVE2, REG_HWCAP2, 1)
+ FEAT_DEF(SVEAES,REG_HWCAP2, 2)
+ FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
+ FEAT_DEF(SVEBITPERM,REG_HWCAP2, 4)
+ FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
+ FEAT_DEF(SVESM4,REG_HWCAP2, 6)
+ FEAT_DEF(FLAGM2,REG_HWCAP2, 7)
+ FEAT_DEF(FRINT, REG_HWCAP2, 8)
+ FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
+ FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
+ FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
+ FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */
--
2.27.0
Re: [dpdk-dev] [PATCH v2] lib/librte_eal: support SVE flag on ARM64
Hi, Jerin Jacob
On 2020/8/17 21:07, Jerin Jacob wrote:
On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier)
wrote:
From: "Wei Hu (Xavier)"
SVE is the next-generation SIMD extension of the ARMv8-A AArch64
instruction set.
The related marco definition can be found in linux kernel:
arch/arm64/include/uapi/asm/hwcap.h
This patch supports getting cpu SVE feature on ARM64 platform.
Signed-off-by: Chengwen Feng
Signed-off-by: Wei Hu (Xavier)
Change the git commit like
eal/arm64: update CPU flags
OK, I will update it in V3.
---
v1 -> v2:
Adds more sve-related definition to rte_cpu_feature_table,
sunch as SVE2, etc.
---
lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 +
lib/librte_eal/arm/rte_cpuflags.c| 11 +++
2 files changed, 12 insertions(+)
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
b/lib/librte_eal/arm/include/rte_cpuflags_64.h
index 95cc01474..069844ddb 100644
--- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
+++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
@@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
RTE_CPUFLAG_ATOMICS,
+ RTE_CPUFLAG_SVE,
Please intrdouce the flag for all newly added items as well.
OK, I will update it in V3.
RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
diff --git a/lib/librte_eal/arm/rte_cpuflags.c
b/lib/librte_eal/arm/rte_cpuflags.c
index caf3dc83a..97a9fcfd4 100644
--- a/lib/librte_eal/arm/rte_cpuflags.c
+++ b/lib/librte_eal/arm/rte_cpuflags.c
@@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(SHA2, REG_HWCAP,6)
FEAT_DEF(CRC32, REG_HWCAP,7)
FEAT_DEF(ATOMICS, REG_HWCAP,8)
+ FEAT_DEF(SVE, REG_HWCAP,22)
+ FEAT_DEF(SVE2, REG_HWCAP2, 1)
+ FEAT_DEF(SVEAES,REG_HWCAP2, 2)
+ FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
+ FEAT_DEF(SVEBITPERM,REG_HWCAP2, 4)
+ FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
+ FEAT_DEF(SVESM4,REG_HWCAP2, 6)
Following stuff is missing
HWCAP2_FLAGM2 (1 << 7)
HWCAP2_FRINT(1 << 8)
OK, I will update it in V3.
Thanks, Xavier
+ FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
+ FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
+ FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
+ FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
FEAT_DEF(AARCH64, REG_PLATFORM, 1)
};
#endif /* RTE_ARCH */
--
2.27.0
[dpdk-dev] [PATCH] net/hns3: support getting Tx and Rx queue information
From: Huisong Li
This patch adds support for querying Rx/Tx queue information.
Currently, if there are not available Rx buffer descriptors in recieving
direction based on hns3 network engine, incoming packets will always be
dropped by hardware. This patch reports the '.rx_drop_en' information to
DPDK framework in the '.dev_infos_get', '.rxq_info_get' and
'.rx_queue_setup' ops implementation function.
Signed-off-by: Huisong Li
Signed-off-by: Wei Hu (Xavier)
---
drivers/net/hns3/hns3_ethdev.c| 11 +++
drivers/net/hns3/hns3_ethdev_vf.c | 11 +++
drivers/net/hns3/hns3_rxtx.c | 51 +++
drivers/net/hns3/hns3_rxtx.h | 5 ++-
4 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 81e773046..fab1914c3 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2495,6 +2495,15 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct
rte_eth_dev_info *info)
.nb_mtu_seg_max = HNS3_MAX_NON_TSO_BD_PER_PKT,
};
+ info->default_rxconf = (struct rte_eth_rxconf) {
+ /*
+* If there are no available Rx buffer descriptors, incoming
+* packets are always dropped by hardware based on hns3 network
+* engine.
+*/
+ .rx_drop_en = 1,
+ };
+
info->vmdq_queue_num = 0;
info->reta_size = HNS3_RSS_IND_TBL_SIZE;
@@ -5413,6 +5422,8 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.tx_queue_release = hns3_dev_tx_queue_release,
.rx_queue_intr_enable = hns3_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = hns3_dev_rx_queue_intr_disable,
+ .rxq_info_get = hns3_rxq_info_get,
+ .txq_info_get = hns3_txq_info_get,
.dev_configure = hns3_dev_configure,
.flow_ctrl_get = hns3_flow_ctrl_get,
.flow_ctrl_set = hns3_flow_ctrl_set,
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c
b/drivers/net/hns3/hns3_ethdev_vf.c
index 1d2941f0e..60b576b02 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -947,6 +947,15 @@ hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct
rte_eth_dev_info *info)
.nb_mtu_seg_max = HNS3_MAX_NON_TSO_BD_PER_PKT,
};
+ info->default_rxconf = (struct rte_eth_rxconf) {
+ /*
+* If there are no available Rx buffer descriptors, incoming
+* packets are always dropped by hardware based on hns3 network
+* engine.
+*/
+ .rx_drop_en = 1,
+ };
+
info->vmdq_queue_num = 0;
info->reta_size = HNS3_RSS_IND_TBL_SIZE;
@@ -2473,6 +2482,8 @@ static const struct eth_dev_ops hns3vf_eth_dev_ops = {
.tx_queue_release = hns3_dev_tx_queue_release,
.rx_queue_intr_enable = hns3_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = hns3_dev_rx_queue_intr_disable,
+ .rxq_info_get = hns3_rxq_info_get,
+ .txq_info_get = hns3_txq_info_get,
.dev_configure = hns3vf_dev_configure,
.mac_addr_add = hns3vf_add_mac_addr,
.mac_addr_remove= hns3vf_remove_mac_addr,
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index c0f798159..67920370a 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -1251,6 +1251,12 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
idx, uint16_t nb_desc,
return -EINVAL;
}
+ if (conf->rx_drop_en == 0)
+ hns3_warn(hw, "if there are no available Rx descriptors,"
+ "incoming packets are always dropped. input parameter"
+ " conf->rx_drop_en(%u) is uneffective.",
+ conf->rx_drop_en);
+
if (dev->data->rx_queues[idx]) {
hns3_rx_queue_release(dev->data->rx_queues[idx]);
dev->data->rx_queues[idx] = NULL;
@@ -2814,3 +2820,48 @@ void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_prepare = hns3_dummy_rxtx_burst;
}
}
+
+void
+hns3_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_rxq_info *qinfo)
+{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct hns3_rx_queue *rxq = dev->data->rx_queues[queue_id];
+
+ if (rxq == NULL) {
+ hns3_err(hw, "queue pointer of rx queue_id (%u) is NULL.",
+queue_id);
+ return;
+ }
+
+ qinfo->mp = rxq->mb_pool;
+ qinfo->nb_desc = rxq->nb_rx_desc;
+ qinfo->scattered_rx = dev->data->scattered_rx;
+
+ /*
+* If there are no available Rx buffer descriptors, incoming packets
+* are always dropped by hardwar
[dpdk-dev] [PATCH V2] net/hns3: support getting Tx and Rx queue information
From: Huisong Li
This patch adds support for querying Rx/Tx queue information.
Currently, if there are not available Rx buffer descriptors in receiving
direction based on hns3 network engine, incoming packets will always be
dropped by hardware. This patch reports the '.rx_drop_en' information to
DPDK framework in the '.dev_infos_get', '.rxq_info_get' and
'.rx_queue_setup' ops implementation function.
Signed-off-by: Huisong Li
Signed-off-by: Wei Hu (Xavier)
---
v1 -> v2: fix the typo in the commit log.
---
drivers/net/hns3/hns3_ethdev.c| 11 +++
drivers/net/hns3/hns3_ethdev_vf.c | 11 +++
drivers/net/hns3/hns3_rxtx.c | 51 +++
drivers/net/hns3/hns3_rxtx.h | 5 ++-
4 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 81e773046..fab1914c3 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2495,6 +2495,15 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct
rte_eth_dev_info *info)
.nb_mtu_seg_max = HNS3_MAX_NON_TSO_BD_PER_PKT,
};
+ info->default_rxconf = (struct rte_eth_rxconf) {
+ /*
+* If there are no available Rx buffer descriptors, incoming
+* packets are always dropped by hardware based on hns3 network
+* engine.
+*/
+ .rx_drop_en = 1,
+ };
+
info->vmdq_queue_num = 0;
info->reta_size = HNS3_RSS_IND_TBL_SIZE;
@@ -5413,6 +5422,8 @@ static const struct eth_dev_ops hns3_eth_dev_ops = {
.tx_queue_release = hns3_dev_tx_queue_release,
.rx_queue_intr_enable = hns3_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = hns3_dev_rx_queue_intr_disable,
+ .rxq_info_get = hns3_rxq_info_get,
+ .txq_info_get = hns3_txq_info_get,
.dev_configure = hns3_dev_configure,
.flow_ctrl_get = hns3_flow_ctrl_get,
.flow_ctrl_set = hns3_flow_ctrl_set,
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c
b/drivers/net/hns3/hns3_ethdev_vf.c
index 1d2941f0e..60b576b02 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -947,6 +947,15 @@ hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct
rte_eth_dev_info *info)
.nb_mtu_seg_max = HNS3_MAX_NON_TSO_BD_PER_PKT,
};
+ info->default_rxconf = (struct rte_eth_rxconf) {
+ /*
+* If there are no available Rx buffer descriptors, incoming
+* packets are always dropped by hardware based on hns3 network
+* engine.
+*/
+ .rx_drop_en = 1,
+ };
+
info->vmdq_queue_num = 0;
info->reta_size = HNS3_RSS_IND_TBL_SIZE;
@@ -2473,6 +2482,8 @@ static const struct eth_dev_ops hns3vf_eth_dev_ops = {
.tx_queue_release = hns3_dev_tx_queue_release,
.rx_queue_intr_enable = hns3_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = hns3_dev_rx_queue_intr_disable,
+ .rxq_info_get = hns3_rxq_info_get,
+ .txq_info_get = hns3_txq_info_get,
.dev_configure = hns3vf_dev_configure,
.mac_addr_add = hns3vf_add_mac_addr,
.mac_addr_remove= hns3vf_remove_mac_addr,
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index c0f798159..67920370a 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -1251,6 +1251,12 @@ hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
idx, uint16_t nb_desc,
return -EINVAL;
}
+ if (conf->rx_drop_en == 0)
+ hns3_warn(hw, "if there are no available Rx descriptors,"
+ "incoming packets are always dropped. input parameter"
+ " conf->rx_drop_en(%u) is uneffective.",
+ conf->rx_drop_en);
+
if (dev->data->rx_queues[idx]) {
hns3_rx_queue_release(dev->data->rx_queues[idx]);
dev->data->rx_queues[idx] = NULL;
@@ -2814,3 +2820,48 @@ void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_prepare = hns3_dummy_rxtx_burst;
}
}
+
+void
+hns3_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_rxq_info *qinfo)
+{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct hns3_rx_queue *rxq = dev->data->rx_queues[queue_id];
+
+ if (rxq == NULL) {
+ hns3_err(hw, "queue pointer of rx queue_id (%u) is NULL.",
+queue_id);
+ return;
+ }
+
+ qinfo->mp = rxq->mb_pool;
+ qinfo->nb_desc = rxq->nb_rx_desc;
+ qinfo->scattered_rx = dev->data->scattered_rx;
+
+ /*
+* If there are no available Rx buffer descriptors, incoming pa
Re: [dpdk-dev] [PATCH v3] eal/arm64: update CPU flags
Hi,
> -Original Message-
> From: Wei Hu (Xavier)
> Sent: Tuesday, August 18, 2020 10:44 AM
> To: dev@dpdk.org
> Cc: xavier.hu...@huawei.com; nd ; Honnappa Nagarahalli
> ; Ruifeng Wang
> ; jerinjac...@gmail.com
> Subject: [PATCH v3] eal/arm64: update CPU flags
>
> From: "Wei Hu (Xavier)"
>
> SVE is the next-generation SIMD extension of the ARMv8-A AArch64
> instruction set.
> The related marco definition can be found in linux kernel:
> arch/arm64/include/uapi/asm/hwcap.h
>
> This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc.
>
> Signed-off-by: Chengwen Feng
> Signed-off-by: Wei Hu (Xavier)
> ---
> v2 -> v3:
> 1. Change commit log.
> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to
> rte_cpu_feature_table[].
> 3. Add the flags for newly added items into enum rte_cpu_flag_t.
> v1 -> v2:
> Adds more sve-related definition to rte_cpu_feature_table,
> sunch as SVE2, etc.
> ---
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +
> lib/librte_eal/arm/rte_cpuflags.c| 13 +
> 2 files changed, 26 insertions(+)
>
How about updating test_cpuflags() too to cover these new flags?
Thanks.
/Ruifeng
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..aa7a56d49 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SHA2,
> RTE_CPUFLAG_CRC32,
> RTE_CPUFLAG_ATOMICS,
> + RTE_CPUFLAG_SVE,
> + RTE_CPUFLAG_SVE2,
> + RTE_CPUFLAG_SVEAES,
> + RTE_CPUFLAG_SVEPMULL,
> + RTE_CPUFLAG_SVEBITPERM,
> + RTE_CPUFLAG_SVESHA3,
> + RTE_CPUFLAG_SVESM4,
> + RTE_CPUFLAG_FLAGM2,
> + RTE_CPUFLAG_FRINT,
> + RTE_CPUFLAG_SVEI8MM,
> + RTE_CPUFLAG_SVEF32MM,
> + RTE_CPUFLAG_SVEF64MM,
> + RTE_CPUFLAG_SVEBF16,
> RTE_CPUFLAG_AARCH64,
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c
> b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..7b257b787 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SHA2, REG_HWCAP,6)
> FEAT_DEF(CRC32, REG_HWCAP,7)
> FEAT_DEF(ATOMICS, REG_HWCAP,8)
> + FEAT_DEF(SVE, REG_HWCAP,22)
> + FEAT_DEF(SVE2, REG_HWCAP2, 1)
> + FEAT_DEF(SVEAES,REG_HWCAP2, 2)
> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
> + FEAT_DEF(SVEBITPERM,REG_HWCAP2, 4)
> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
> + FEAT_DEF(SVESM4,REG_HWCAP2, 6)
> + FEAT_DEF(FLAGM2,REG_HWCAP2, 7)
> + FEAT_DEF(FRINT, REG_HWCAP2, 8)
> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> FEAT_DEF(AARCH64, REG_PLATFORM, 1)
> };
> #endif /* RTE_ARCH */
> --
> 2.27.0
Re: [dpdk-dev] [PATCH] app/testpmd: fix the default RSS key configuration
在 2020/8/4 17:36, Phil Yang 写道:
-Original Message-
From: oulijun
Sent: Tuesday, August 4, 2020 9:29 AM
To: Phil Yang ; wenzhuo...@intel.com;
beilei.x...@intel.com; bernard.iremon...@intel.com;
adrien.mazarg...@6wind.com; ferruh.yi...@intel.com
Cc: dev@dpdk.org; linux...@huawei.com; nd
Subject: Re: [dpdk-dev] [PATCH] app/testpmd: fix the default RSS key
configuration
在 2020/7/17 15:29, Phil Yang 写道:
Subject: [dpdk-dev] [PATCH] app/testpmd: fix the default RSS key
configuration
When an user runs a flow create cmd to configure an RSS rule
without specifying the empty rss actions in testpmd, this mean
that the flow gets the default RSS functions. However, the
testpmd is not set the default RSS key incorrectly when RSS key
is specified in flow create cmd.
Hi Lijun,
I think it works.
When we create an RSS flow rule which doesn't specify any 'rss-hash-
key',
the 'rss-hash-key' will be updated with the default key.
Step 1:
testpmd> show port 0 rss-hash key
RSS functions:
all ipv4-frag ipv4-other ipv6-frag ipv6-other ip
RSS key:
4439796BB54C5023B675EA5B124F9F30B8A2C03DDFDC4D02A08C9B334AF64A4
C05C6FA343958D8557D99583AE138C92E81150366
Step 2:
testpmd> flow create 0 ingress pattern eth / ipv4 / udp / end actions rss
types ipv4-udp end queues end / end
Flow rule #0 created
Step 3:
testpmd> show port 0 rss-hash key
RSS functions:
all ipv4-udp udp
RSS key:
74657374706D6427732064656661756C74205253532068617368206B65792C206F
7665727269646520697420666F722062657474
Thanks,
Phil
Yes, However, it is not the default value that users use when testpmd
starts. This may mislead users. When the driver is initialized, the
default key used by the driver is provided for users. The key varies
according to the DPDK vendor.However, after the DPDK is initialized, if
the user runs the flow create command without specifying the rss key,
the driver obtains another default key value, which may be different
from the default value expected by the user.
It needs a dummy key.
a4391f8bae85 - app/testpmd: set default RSS key as null
Hi, Phil Yang
Yes, I've reviewed the patch("a4391f8bae85 - app/testpmd: set
default RSS key as null") and read all other people's comments.
However, the patch has been reverted in V2 and restored to the orginal
states. The link as follows:
https://patches.dpdk.org/patch/47961/
I got your point now.
Your patch makes testpmd using the valid NIC default RSS hash key as the flow
rule default RSS, is that right?
Yes. Recently, I've been further testing the patch. I found the other
question. When I create a flow with RSS by used the following cmd.
testpmd>flow create 0 ingress pattern end actions rss types ipv4-tcp end
/ end
next, I run flow flush 0 and re-create a flow with RSS
testpmd> flow flush 0
testpmd> flow create 0 ingress pattern end actions rss types ipv4-tcp end
As a result, the key is 0 by show port rss-hash key because it needs to
memset 0 for rss_info when flush
Thanks
Lijun Ou
The patch looks good to me. Please fix the typo in your commit message and make
it more accurate.
For example, you can put the cmd line and the expected output in the commit
message.
I also don't think the key_len parameter is very profitable
for users to configure. Others say that other optimizations will be
considered later. Do you have any plans?
I have no plans for it now.
Thanks,
Phil
Re: [dpdk-dev] [PATCH v3] eal/arm64: update CPU flags
On Tue, Aug 18, 2020 at 9:11 AM Ruifeng Wang wrote: > > Hi, > > > -Original Message- > > From: Wei Hu (Xavier) > > Sent: Tuesday, August 18, 2020 10:44 AM > > To: dev@dpdk.org > > Cc: xavier.hu...@huawei.com; nd ; Honnappa Nagarahalli > > ; Ruifeng Wang > > ; jerinjac...@gmail.com > > Subject: [PATCH v3] eal/arm64: update CPU flags > > > > From: "Wei Hu (Xavier)" > > > > SVE is the next-generation SIMD extension of the ARMv8-A AArch64 > > instruction set. > > The related marco definition can be found in linux kernel: > > arch/arm64/include/uapi/asm/hwcap.h > > > > This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. Suggested rewording: ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. This patch incorporates those changes to the eal library. > > > > Signed-off-by: Chengwen Feng > > Signed-off-by: Wei Hu (Xavier) > > --- > > v2 -> v3: > > 1. Change commit log. > > 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to > > rte_cpu_feature_table[]. > > 3. Add the flags for newly added items into enum rte_cpu_flag_t. > > v1 -> v2: > > Adds more sve-related definition to rte_cpu_feature_table, > > sunch as SVE2, etc. > > --- > > lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 + > > lib/librte_eal/arm/rte_cpuflags.c| 13 + > > 2 files changed, 26 insertions(+) > > > How about updating test_cpuflags() too to cover these new flags? +1 . Wei, Please update the test_cpuflags() functions for new flags.
