Re: [dpdk-dev] [PATCH v2] net/i40e: remove VF interrupt handler
Hi Stephen:
> -Original Message-
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Friday, June 22, 2018 11:44 PM
> To: Zhang, Qi Z
> Cc: Xing, Beilei ; Wu, Jingjing
> ;
> Yu, De ; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: remove VF interrupt handler
>
> On Fri, 22 Jun 2018 08:44:14 +0800
> Qi Zhang wrote:
>
> > For i40evf, internal rx interrupt and adminq interrupt share the same
> > source, that cause a lot cpu cycles be wasted on interrupt handler on
> > rx path. This is complained by customers which require low latency
> > (when set I40E_ITR_INTERVAL to small value), but have to be sufferred
> > by tremendous interrupts handling that eat significant CPU resources.
> >
> > The patch disable pci interrupt and remove the interrupt handler,
> > replace it with a low frequency (50ms) interrupt polling daemon which
> > is implemented by registering a alarm callback periodly, this save CPU
> > time significently: On a typical x86 server with 2.1GHz CPU, with low
> > latency configure (32us) we saw CPU usage from top commmand reduced
> > from 20% to 0% on management core in testpmd).
> >
> > Also with the new method we can remove compile option:
> > I40E_ITR_INTERVAL which is used to balance between low latency and low
> CPU usage previously.
> > Now we don't need it since we can reach both at same time.
> >
> > Suggested-by: Jingjing Wu
> > Signed-off-by: Qi Zhang
> > ---
> >
> > v2:
> > - update doc
> >
> > config/common_base| 2 --
> > doc/guides/nics/i40e.rst | 5 -
> > drivers/net/i40e/i40e_ethdev.c| 3 +--
> > drivers/net/i40e/i40e_ethdev.h| 22 +++---
> > drivers/net/i40e/i40e_ethdev_vf.c | 36
> > ++--
> > 5 files changed, 26 insertions(+), 42 deletions(-)
> >
> > diff --git a/config/common_base b/config/common_base index
> > 6b0d1cbbb..9e21c6865 100644
> > --- a/config/common_base
> > +++ b/config/common_base
> > @@ -264,8 +264,6 @@ CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
> > CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
> > CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
> > CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
> > -# interval up to 8160 us, aligned to 2 (or default value)
> > -CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
> >
> > #
> > # Compile burst-oriented FM10K PMD
> > diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index
> > 18549bf5a..3fc4ceac7 100644
> > --- a/doc/guides/nics/i40e.rst
> > +++ b/doc/guides/nics/i40e.rst
> > @@ -96,11 +96,6 @@ Please note that enabling debugging options may
> affect system performance.
> >
> >Number of queues reserved for each VMDQ Pool.
> >
> > -- ``CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL`` (default ``-1``)
> > -
> > - Interrupt Throttling interval.
> > -
> > -
> > Runtime Config Options
> > ~~
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index 13c5d3296..c8f9566e0 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> > @@ -1829,8 +1829,7 @@ __vsi_queues_bind_intr(struct i40e_vsi *vsi,
> uint16_t msix_vect,
> > /* Write first RX queue to Link list register as the head element */
> > if (vsi->type != I40E_VSI_SRIOV) {
> > uint16_t interval =
> > - i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 1,
> > - pf->support_multi_driver);
> > + i40e_calc_itr_interval(1, pf->support_multi_driver);
> >
> > if (msix_vect == I40E_MISC_VEC_ID) {
> > I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0, diff --git
> > a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
> > index 11c4c76bd..53dac 100644
> > --- a/drivers/net/i40e/i40e_ethdev.h
> > +++ b/drivers/net/i40e/i40e_ethdev.h
> > @@ -178,7 +178,7 @@ enum i40e_flxpld_layer_idx {
> > #define I40E_ITR_INDEX_NONE 3
> > #define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
> > #define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
> > -#define I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT 8160 /* 8160 us */
> > +#define I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
> > /* Special FW support this floating VEB feature */ #define
> > FLOATING_VEB_SUPPORTED_FW_MAJ 5 #define
> FLOATING_VEB_SUPPORTED_FW_MIN
> > 0 @@ -1328,17 +1328,17 @@ i40e_align_floor(int n) }
> >
> > static inline uint16_t
> > -i40e_calc_itr_interval(int16_t interval, bool is_pf, bool
> > is_multi_drv)
> > +i40e_calc_itr_interval(bool is_pf, bool is_multi_drv)
> > {
> > - if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX) {
> > - if (is_multi_drv) {
> > - interval = I40E_QUEUE_ITR_INTERVAL_MAX;
> > - } else {
> > - if (is_pf)
> > - interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
> > - else
> > - interval = I40E_VF_QUEUE_ITR_INTE
Re: [dpdk-dev] [PATCH v12 3/6] build: fix the meson build warning
-Original Message-
> Date: Tue, 19 Jun 2018 18:36:54 +0800
> From: Gavin Hu
> To: dev@dpdk.org
> CC: n...@arm.com, gavin...@arm.com, sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH v12 3/6] build: fix the meson build warning
> X-Mailer: git-send-email 2.11.0
>
>
> This is to fix the unnecessary warning output, it is not consistent with
> the configurations of other platforms.
>
> WARNING: Cross file does not specify strip binary, result will not be
> stripped.
>
> Fixes: e53a5299d2 ("build: support vendor specific ARM cross builds")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Gavin Hu
> Reviewed-by: Phil Yang
> Reviewed-by: Song Zhu
> Acked-by: Bruce Richardson
Acked-by: Jerin Jacob
> ---
> config/arm/arm64_thunderx_linuxapp_gcc | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/config/arm/arm64_thunderx_linuxapp_gcc
> b/config/arm/arm64_thunderx_linuxapp_gcc
> index 7ff34af74..967d9d46d 100644
> --- a/config/arm/arm64_thunderx_linuxapp_gcc
> +++ b/config/arm/arm64_thunderx_linuxapp_gcc
> @@ -2,6 +2,7 @@
> c = 'aarch64-linux-gnu-gcc'
> cpp = 'aarch64-linux-gnu-cpp'
> ar = 'aarch64-linux-gnu-gcc-ar'
> +strip = 'aarch64-linux-gnu-strip'
>
> [host_machine]
> system = 'linux'
> --
> 2.11.0
>
Re: [dpdk-dev] [PATCH] eventdev: update get id from name to include PCI devices
-Original Message- > Date: Sun, 17 Jun 2018 20:01:51 +0530 > From: Jerin Jacob > To: Pavan Nikhilesh > CC: dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH] eventdev: update get id from name to > include PCI devices > User-Agent: Mutt/1.10.0 (2018-05-17) > > > -Original Message- > > Date: Fri, 15 Jun 2018 09:15:24 +0530 > > From: Pavan Nikhilesh > > To: jerin.ja...@caviumnetworks.com > > Cc: dev@dpdk.org, Pavan Nikhilesh > > Subject: [dpdk-dev] [PATCH] eventdev: update get id from name to include > > PCI devices > > X-Mailer: git-send-email 2.17.1 > > > > Currently, rte_event_dev_get_dev_id works only for virtual devices(vdev) > > update the function to include devices probed through pci. > > > > Signed-off-by: Pavan Nikhilesh > > > Acked-by: Jerin Jacob Applied to dpdk-next-eventdev/master. Thanks.
Re: [dpdk-dev] [PATCH] event/octeontx: fix flush callback
-Original Message-
> Date: Sun, 17 Jun 2018 19:57:46 +0530
> From: Jerin Jacob
> To: Pavan Nikhilesh
> CC: dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] event/octeontx: fix flush callback
> User-Agent: Mutt/1.10.0 (2018-05-17)
>
>
> -Original Message-
> > Date: Fri, 15 Jun 2018 11:14:06 +0530
> > From: Pavan Nikhilesh
> > To: jerin.ja...@caviumnetworks.com
> > Cc: dev@dpdk.org, Pavan Nikhilesh
> > Subject: [dpdk-dev] [PATCH] event/octeontx: fix flush callback
> > X-Mailer: git-send-email 2.17.1
> >
> > When event queues are being flushed the getwork operation used to extract
> > events should be a grouped getwork operation to the specific event queue.
> >
> > Fixes: 8384f0e039ea ("event/octeontx: support device stop flush callback")
>
> Cc: sta...@dpdk.org
>
> >
> > Signed-off-by: Pavan Nikhilesh
>
> Acked-by: Jerin Jacob
Applied to dpdk-next-eventdev/master. Thanks.
Re: [dpdk-dev] [PATCH v3 0/2] Improve service stop support
-Original Message- > Date: Thu, 21 Jun 2018 09:23:21 -0500 > From: Gage Eads > To: dev@dpdk.org > CC: jerin.ja...@caviumnetworks.com, harry.van.haa...@intel.com, > bruce.richard...@intel.com, nikhil@intel.com, > erik.g.carri...@intel.com, abhinandan.guj...@intel.com, > tho...@monjalon.net > Subject: [PATCH v3 0/2] Improve service stop support > X-Mailer: git-send-email 2.13.6 > > > Existing service functions allow us to stop a service, but doing so doesn't > guarantee that the service has finished running on a service core. This > patch set introduces a function, rte_service_may_be_active(), to check > whether a stopped service is truly stopped. > > This is needed for flows that modify a resource that the service is > using; for example when stopping an eventdev, any event adapters and/or > scheduler service need to be quiesced first. > > This patch set also adds support for the event sw PMD's device stop flush > callback, which relies on this new mechanism to ensure that the > scheduler service is no longer active. > > v2: > - Move function to DPDK_18.08 block in rte_eal_version.map > - Fix signed vs. unsigned comparison compiler warning > > v3: > - Move function to EXPERIMENTAL block and add experimental tags > - Fix typo in function documentation > Applied series to dpdk-next-eventdev/master. Thanks. > Gage Eads (2): > service: add mechanism for quiescing a service > event/sw: support device stop flush callback > > drivers/event/sw/sw_evdev.c | 114 > +++- > drivers/event/sw/sw_evdev_selftest.c| 81 +++- > lib/librte_eal/common/include/rte_service.h | 20 + > lib/librte_eal/common/rte_service.c | 32 +++- > lib/librte_eal/rte_eal_version.map | 1 + > test/test/test_service_cores.c | 43 +++ > 6 files changed, 284 insertions(+), 7 deletions(-) > > -- > 2.13.6 >
Re: [dpdk-dev] [PATCH v12 2/6] doc: add a guide doc for cross compiling from x86
-Original Message- > Date: Tue, 19 Jun 2018 18:36:53 +0800 > From: Gavin Hu > To: dev@dpdk.org > CC: n...@arm.com, gavin...@arm.com > Subject: [dpdk-dev] [PATCH v12 2/6] doc: add a guide doc for cross > compiling from x86 > X-Mailer: git-send-email 2.11.0 > > > From: gavin hu > > This is the guide for cross compiling ARM64 DPDK from X86 hosts. > > Signed-off-by: Gavin Hu > Reviewed-by: Steve Capper > Reviewed-by: Honnappa Nagarahalli > Acked-by: Marko Kovacevic There is a build warning. Please check it ➜ [master][dpdk.org] $ make doc-guides-html sphinx processing guides-html... /export/dpdk.org/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst:133: WARNING: Unexpected indentation. > --- > .../linux_gsg/cross_build_dpdk_for_arm64.rst | 137 > + > doc/guides/linux_gsg/index.rst | 1 + > 2 files changed, 138 insertions(+) > create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst > > diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst > b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst > new file mode 100644 > index 0..551f0aef8 > --- /dev/null > +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst > @@ -0,0 +1,137 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > +Copyright(c) 2018 ARM Corporation. > + > +Cross compile DPDK for ARM64 > + > +This chapter describes how to cross compile DPDK for ARM64 from x86 build > hosts. > + > +.. note:: > + > + Whilst it is recommended to natively build DPDK on ARM64 (just > + like with x86), it is also possible to cross-build DPDK for ARM64. An > + ARM64 cross compile GNU toolchain is used for this. > + > +Obtain the cross tool chain > +--- > +The latest cross compile tool chain can be downloaded from: > +https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-linux-gnu/. A newline is better here for readability in rendered html file. > +Following is the step to get the version 7.2.1, latest one at the time of > this writing. > + > +.. code-block:: console > + > + wget https://releases.linaro.org/components/toolchain/binaries/latest/ > + aarch64-linux-gnu/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz Please make this single line for easy access to URL in rendered html. > + > +Unzip and add into the PATH > +--- > + > +.. code-block:: console > + > + tar -xvf gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz > + export PATH=$PATH:/gcc-linaro-7.2.1-2017.11-x86_64 > + _aarch64-linux-gnu/bin Please make this single line for easy access to URL in rendered html. > + > +.. note:: > + > + For the host requirements and other info, refer to the release note > section: > + https://releases.linaro.org/components/toolchain/binaries/latest/ > + > +Getting the prerequisite library > + > + > +NUMA is required by most modern machines, not needed for non-NUMA > architectures. > + > +.. note:: > + > + For compiling the NUMA lib, run libtool --version to ensure the libtool > version >= 2.2, > + otherwise the compilation will fail with errors. > + > +.. code-block:: console > + > + git clone https://github.com/numactl/numactl.git > + cd numactl > + git checkout v2.0.11 -b v2.0.11 > + ./autogen.sh > + autoconf -i > + ./configure --host=x86_64 CC=aarch64-linux-gnu-gcc prefix= dir> > + make install > + > +The numa header files and lib file is generated in the include and lib > folder respectively under . > + > +.. _argment_the_cross_toolcain_with_numa_support: s/toolchin/toolchain > + > +Augment the cross toolchain with NUMA support > +- > + > +.. note:: > + > + This way is optional, an alternative is to use extra CFLAGS and LDFLAGS, > depicted in :ref:`configure_and_cross_compile_dpdk_build` below. > + > +Copy the NUMA header files to the cross compiler's include directory: > + > +.. code-block:: console > + > + cp /include/numa*.h > /gcc-linaro-7.2.1-2017.11 > + -x86_64_aarch64-linux-gnu/bin/../aarch64-linux-gnu/libc/usr/include/ Please make this single line for easy access in rendered html. > + cp /lib/libnuma.a > /gcc-linaro-7.2.1-2017.11 > + -x86_64_aarch64-linux-gnu/lib/gcc/aarch64-linux-gnu/7.2.1/ Please make this single line for easy access in rendered html. > + > +.. _configure_and_cross_compile_dpdk_build: > + > +Configure and cross compile DPDK Build > +-- > +To configure a build, choose one of the target configurations, like > arm64-dpaa2-linuxapp-gcc and arm64-thunderx-linuxapp-gcc. > + > +.. code-block:: console > + > + make config T=arm64-armv8a-linuxapp-gcc > + > +To cross-compile, without compiling the kernel modules, use the following > command: > + > +.. code-block:: console > + > + make -j CROSS=aarch64-linux-gnu- CONFIG_RTE_KNI_KMOD=n > CONFIG_RTE_EAL
Re: [dpdk-dev] [PATCH] net/thunderx: fix build with gcc optimization on
-Original Message-
> Date: Thu, 21 Jun 2018 19:14:50 +0100
> From: Ferruh Yigit
> To: Jerin Jacob , Maciej Czekaj
>
> CC: dev@dpdk.org, Ferruh Yigit , sta...@dpdk.org
> Subject: [PATCH] net/thunderx: fix build with gcc optimization on
> X-Mailer: git-send-email 2.17.1
>
>
> build error gcc version 6.3.1 20161221 (Red Hat 6.3.1-1),
> with EXTRA_CFLAGS="-O3":
>
> .../drivers/net/thunderx/nicvf_ethdev.c:907:9:
>error: ‘txq’ may be used uninitialized in this function
>[-Werror=maybe-uninitialized]
> if (txq->pool_free == nicvf_single_pool_free_xmited_buffers)
> ~~~^~~
> .../drivers/net/thunderx/nicvf_ethdev.c:886:20:
>note: ‘txq’ was declared here
> struct nicvf_txq *txq;
> ^~~
>
> Same error on function 'nicvf_eth_dev_init' and 'nicvf_dev_start', it
> seems 'nicvf_set_tx_function' inlined when optimization enabled.
>
> Initialize the txq and add NULL check before using it to fix.
>
> Fixes: 7413feee662d ("net/thunderx: add device start/stop and close")
> Cc: sta...@dpdk.org
>
> Reported-by: Richard Walsh
> Signed-off-by: Ferruh Yigit
Acked-by: Jerin Jacob
> ---
>
> Btw, no compiler optimization enabled, only nicvf_rxtx.c has -Ofast,
> is this intentional?
Yes. At least in our setup, -Ofast turns out to be super set of -O3.
Re: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA machine
-Original Message- > Date: Thu, 14 Jun 2018 06:42:40 + > From: Sachin Saxena > To: Jerin Jacob > CC: Hemant Agrawal , "dev@dpdk.org" , > "nitin.sax...@cavium.com" , > "narayanaprasad.athr...@cavium.com" > Subject: RE: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA > machine > > > > -Original Message- > > From: Jerin Jacob [mailto:jerin.ja...@caviumnetworks.com] > > Sent: Monday, June 11, 2018 1:15 PM > > To: Sachin Saxena > > Cc: Hemant Agrawal ; dev@dpdk.org; > > nitin.sax...@cavium.com; narayanaprasad.athr...@cavium.com > > Subject: Re: [dpdk-dev] [PATCH] mk: change TLS model for ARMv8 and DPAA > > machine > > > > [] > > > > > > Signed-off-by: Sachin Saxena > > > > > --- > > > > > mk/machine/armv8a/rte.vars.mk | 3 +++ > > > > > mk/machine/dpaa/rte.vars.mk | 3 +++ > > > > > mk/machine/dpaa2/rte.vars.mk | 3 +++ > > > > > 3 files changed, 9 insertions(+) > > > > > > > > > > diff --git a/mk/machine/armv8a/rte.vars.mk > > > > > b/mk/machine/armv8a/rte.vars.mk index 8252efb..6897cd6 100644 > > > > > --- a/mk/machine/armv8a/rte.vars.mk > > > > > +++ b/mk/machine/armv8a/rte.vars.mk > > > > > @@ -29,3 +29,6 @@ > > > > > # CPU_ASFLAGS = > > > > > > > > > > MACHINE_CFLAGS += -march=armv8-a+crc+crypto > > > > > + > > > > > +# To avoid TLS corruption issue. > > > > > +MACHINE_CFLAGS += -mtls-dialect=trad > > > > > > > > This issue is not reproducible on Cavium ARMv8 platforms. Just > > > > wondering, Do we need to change default ARMv8 config? > > > [Sachin Saxena] The issue is currently visible On NXP platforms with VPP- > > dpdk solution only. Similar behavior like random crashes or initialization > > failures have been seen by Cavium guys on VPP but they are still > > investigating whether the issues are related to TLS corruption. > > > > I checked with Cavium-VPP team. According to them, they are not facing any > > issue related to TLS > > > [Sachin Saxena] Some more information. - The issue is appearing on NXP ARM > platforms as DPDK drivers are also using __thread TLS variables. If the total > number of TLS variables (main application + dpdk shared Lib) increases beyond > Static TLS Size limit, one will start facing issue like Corruption in TLS > variable values. OK. Then it is generic problem. Any information on what is the limit of number of __thread variable ? Is it possible to increase that limit by gcc command line arguments? You may not have answers for this, but, could you ask in Linaro/gcc mailing list. If it is fixed in some specific gcc/glibc version and applying blindly to all GCC versions is not good IMO.
Re: [dpdk-dev] [PATCH v2 6/7] net/mlx5: probe all port representors
One more input,
Sunday, June 17, 2018 1:15 PM, Shahaf Shuler:
> Subject: RE: [dpdk-dev] [PATCH v2 6/7] net/mlx5: probe all port representors
[...]
> > > + eth_list = tmp;
> > > for (i = 0; i < attr.orig_attr.phys_port_cnt; ++i) {
> > > - eth_list[i] = mlx5_dev_spawn_one(dpdk_dev, ibv_dev, vf,
> > > - &attr, i + 1);
> > > - if (eth_list[i])
> > > - continue;
> > > - /* Save rte_errno and roll back in case of failure. */
> > > - ret = rte_errno;
> > > - while (i--) {
> > > - mlx5_dev_close(eth_list[i]);
> > > - if (rte_eal_process_type() == RTE_PROC_PRIMARY)
> > > - rte_free(eth_list[i]->data->dev_private);
> > > - claim_zero(rte_eth_dev_release_port(eth_list[i]));
> > > - }
> > > - free(eth_list);
> > > - rte_errno = ret;
> > > - return NULL;
> > > + eth_list[n] = mlx5_dev_spawn_one(dpdk_dev, ibv_dev[j],
> > vf,
> > > + &attr, i + 1,
> > > + j ? eth_list[0] : NULL,
> > > + j - 1);
>
> The representor id is according to the sort made by qsort (based on device
> names).
> A better way may be to set it according to the sysfs information, like you do
> in the mlx5_get_ifname function.
> What do you think?
In fact relaying on linear increasing port numbers is dangerous. In may break
on special scenarios like BlueField.
In BlueField there are representors between the x86 and the ARM cores. Those
are not VF representors. The phys_port_name of those is -1 and each of them
belongs to different phys_switch_id.
We can argue whether it is correct/not to assign them w/ -1 value, but I think
the suggested approach above can detect the right "vf_id" for those and not
break the current behavior on x86.
Let me know if you have other suggestions.
Re: [dpdk-dev] [PATCH v5 1/2] net/tap: calculate checksums of multi segs packets
> On Jun 23, 2018, at 6:17 PM, Ophir Munk wrote: > > Prior to this commit IP/UDP/TCP checksum offload calculations > were skipped in case of a multi segments packet. > This commit enables TAP checksum calculations for multi segments > packets. > The only restriction is that the first segment must contain > headers of layers 3 (IP) and 4 (UDP or TCP) > > Reviewed-by: Raslan Darawsheh > Signed-off-by: Ophir Munk > — Looks good. Still could have had a few more blank lines IMHO :-) Acked-by: Keith Wiles for Series Regards, Keith
Re: [dpdk-dev] [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
Hi,
> -Original Message-
> From: Zhang, Qi Z
> Sent: Friday, June 22, 2018 9:47 PM
> To: Zhao1, Wei ; dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org
> Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
>
> Hi Wei:
>
> > -Original Message-
> > From: Zhao1, Wei
> > Sent: Friday, June 22, 2018 4:39 PM
> > To: dev@dpdk.org
> > Cc: Lu, Wenzhuo ; Zhang, Qi Z
> > ; sta...@dpdk.org; Zhao1, Wei
> >
> > Subject: [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
> >
> > This is a issue involve RS bit set rule in ixgbe.
> > Let us take function ixgbe_xmit_pkts_vec () as an example, in this
> > function RS bit will be set for descriptor with index
> > txq->tx_next_rs, and also descriptor free function
> > ixgbe_tx_free_bufs() also check RS bit for descriptor with index
> > txq->tx_next_rs, This is perfect ok. Let us take an example,
> > if app set tx_rs_thresh = 32 and nb_desc = 512, then ixgbe PMD code
> > will init
> > txq->tx_next_rs = 31 in function ixgbe_reset_tx_queue when tx queue
> setup.
> > And also txq->tx_next_rs will be update as 63, 95 and so on. But, in
> > the function ixgbe_dev_tx_descriptor_status(), the RS bit to check is
> > " desc = ((desc
> > + txq->tx_rs_thresh - 1) /
> > txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on.
> > So, they are all wrong! In tx function of ixgbe_xmit_pkts_simple, the
> > RS bit rule is also the same, it also set index 31 ,64, 95.
> > we need to correct it.
>
> One question:
> does only the descriptor with RS bit will have DD status, or NIC will always
> update all descriptor's DD status but this happens when the next descriptor
> with RS bit has been sent?
> If it is the first case, I think you fix still have problem, because
> multi-seg mbuf
> or tso offload will break the 31, 63, 95 pattern
> See:
> nb_used = (uint16_t)(tx_pkt-
> >nb_segs + new_ctx);
>
> if (txp != NULL &&
> nb_used + txq->nb_tx_used >=
> txq->tx_rs_thresh)
> /* set RS on the previous packet in the burst */
> txp->read.cmd_type_len |=
> rte_cpu_to_le_32(IXGBE_TXD_CMD_RS);
>
> so the possible solution is store each RS position in a list at tx, and find
> the
> next RS from the list in ixgbe_dev_tx_descriptor_status
>
> If it is the second case, it will be simple we don't need to check forward
> with
> tx_rs_thresh, just check the exact position ( I hope it is this case :))
In this patch, code "desc = txq->sw_ring[desc].last_id;" will get the last
index for several segments packet, that solve the case when packet contain
more than one segment.
>
> Regards
> Qi
> >
> > Fixes: a2919e13d95e ("net/ixgbe: implement descriptor status API")
> >
> > Signed-off-by: Wei Zhao
> > ---
> > drivers/net/ixgbe/ixgbe_rxtx.c | 12 ++--
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c
> > b/drivers/net/ixgbe/ixgbe_rxtx.c index 3e13d26..f185219 100644
> > --- a/drivers/net/ixgbe/ixgbe_rxtx.c
> > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c
> > @@ -3146,15 +3146,15 @@ ixgbe_dev_tx_descriptor_status(void
> *tx_queue,
> > uint16_t offset)
> > return -EINVAL;
> >
> > desc = txq->tx_tail + offset;
> > + if (desc >= txq->nb_tx_desc)
> > + desc -= txq->nb_tx_desc;
> > /* go to next desc that has the RS bit */
> > - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *
> > - txq->tx_rs_thresh;
> > - if (desc >= txq->nb_tx_desc) {
> > + desc = (desc / txq->tx_rs_thresh + 1) *
> > + txq->tx_rs_thresh - 1;
> > + if (desc >= txq->nb_tx_desc)
> > desc -= txq->nb_tx_desc;
> > - if (desc >= txq->nb_tx_desc)
> > - desc -= txq->nb_tx_desc;
> > - }
> >
> > + desc = txq->sw_ring[desc].last_id;
> > status = &txq->tx_ring[desc].wb.status;
> > if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD))
> > return RTE_ETH_TX_DESC_DONE;
> > --
> > 2.7.5
Re: [dpdk-dev] [PATCH v2 4/7] vhost: translate iovas at vectors fill time
On Sat, Jun 23, 2018 at 09:11:24AM +0200, Maxime Coquelin wrote:
> This patch aims at simplifying the desc to mbuf and mbuf to desc
> copy functions. It performs the iova to hva translations at
> vectors fill time.
>
> Doing this, in case desc buffer isn't contiguous in hva space,
> it gets split into multiple vectors.
>
> Signed-off-by: Maxime Coquelin
> ---
> lib/librte_vhost/vhost.h | 1 +
> lib/librte_vhost/virtio_net.c | 340
> ++
> 2 files changed, 144 insertions(+), 197 deletions(-)
>
> diff --git a/lib/librte_vhost/vhost.h b/lib/librte_vhost/vhost.h
> index 786a74f64..e3b2ed2ff 100644
> --- a/lib/librte_vhost/vhost.h
> +++ b/lib/librte_vhost/vhost.h
> @@ -43,6 +43,7 @@
> * from vring to do scatter RX.
> */
> struct buf_vector {
> + uint64_t buf_iova;
> uint64_t buf_addr;
> uint32_t buf_len;
> uint32_t desc_idx;
> diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c
> index 4816e8003..1ab1edd67 100644
> --- a/lib/librte_vhost/virtio_net.c
> +++ b/lib/librte_vhost/virtio_net.c
> @@ -225,12 +225,12 @@ static __rte_always_inline int
> fill_vec_buf(struct virtio_net *dev, struct vhost_virtqueue *vq,
>uint32_t avail_idx, uint32_t *vec_idx,
>struct buf_vector *buf_vec, uint16_t *desc_chain_head,
> - uint16_t *desc_chain_len)
> + uint16_t *desc_chain_len, uint8_t perm)
> {
> uint16_t idx = vq->avail->ring[avail_idx & (vq->size - 1)];
> uint32_t vec_id = *vec_idx;
> uint32_t len= 0;
> - uint64_t dlen;
> + uint64_t dlen, desc_avail, desc_iova;
> struct vring_desc *descs = vq->desc;
> struct vring_desc *idesc = NULL;
>
> @@ -267,10 +267,31 @@ fill_vec_buf(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> }
>
> len += descs[idx].len;
> - buf_vec[vec_id].buf_addr = descs[idx].addr;
> - buf_vec[vec_id].buf_len = descs[idx].len;
> - buf_vec[vec_id].desc_idx = idx;
> - vec_id++;
> + desc_avail = descs[idx].len;
> + desc_iova = descs[idx].addr;
> +
> + while (desc_avail) {
We also need to check whether:
vec_id >= BUF_VECTOR_MAX
> + uint64_t desc_addr;
> + uint64_t desc_chunck_len = desc_avail;
> +
> + desc_addr = vhost_iova_to_vva(dev, vq,
> + desc_iova,
> + &desc_chunck_len,
> + perm);
> + if (unlikely(!desc_addr)) {
> + free_ind_table(idesc);
> + return -1;
> + }
> +
> + buf_vec[vec_id].buf_iova = desc_iova;
> + buf_vec[vec_id].buf_addr = desc_addr;
> + buf_vec[vec_id].buf_len = desc_chunck_len;
> + buf_vec[vec_id].desc_idx = idx;
> +
> + desc_avail -= desc_chunck_len;
> + desc_iova += desc_chunck_len;
> + vec_id++;
> + }
>
> if ((descs[idx].flags & VRING_DESC_F_NEXT) == 0)
> break;
> @@ -293,7 +314,8 @@ fill_vec_buf(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> static inline int
> reserve_avail_buf(struct virtio_net *dev, struct vhost_virtqueue *vq,
> uint32_t size, struct buf_vector *buf_vec,
> - uint16_t *num_buffers, uint16_t avail_head)
> + uint16_t *num_buffers, uint16_t avail_head,
> + uint16_t *nr_vec)
> {
> uint16_t cur_idx;
> uint32_t vec_idx = 0;
> @@ -315,7 +337,8 @@ reserve_avail_buf(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> return -1;
>
> if (unlikely(fill_vec_buf(dev, vq, cur_idx, &vec_idx, buf_vec,
> - &head_idx, &len) < 0))
> + &head_idx, &len,
> + VHOST_ACCESS_RO) < 0))
reserve_avail_buf() is called by virtio_dev_rx(),
so the write perm is needed.
> return -1;
> len = RTE_MIN(len, size);
> update_shadow_used_ring(vq, head_idx, len);
> @@ -334,21 +357,22 @@ reserve_avail_buf(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> return -1;
> }
>
> + *nr_vec = vec_idx;
> +
> return 0;
> }
[...]
> @@ -455,18 +454,12 @@ copy_mbuf_to_desc(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> uint64_t len;
> uint64_t remain = dev->vhost_hlen;
> uint64_t src = (uint64_t)(uintptr_t)hdr, dst;
> -
Re: [dpdk-dev] [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
> -Original Message-
> From: Zhao1, Wei
> Sent: Monday, June 25, 2018 9:58 AM
> To: Zhang, Qi Z ; dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org
> Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
>
> Hi,
>
> > -Original Message-
> > From: Zhang, Qi Z
> > Sent: Friday, June 22, 2018 9:47 PM
> > To: Zhao1, Wei ; dev@dpdk.org
> > Cc: Lu, Wenzhuo ; sta...@dpdk.org
> > Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > error
> >
> > Hi Wei:
> >
> > > -Original Message-
> > > From: Zhao1, Wei
> > > Sent: Friday, June 22, 2018 4:39 PM
> > > To: dev@dpdk.org
> > > Cc: Lu, Wenzhuo ; Zhang, Qi Z
> > > ; sta...@dpdk.org; Zhao1, Wei
> > >
> > > Subject: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > > error
> > >
> > > This is a issue involve RS bit set rule in ixgbe.
> > > Let us take function ixgbe_xmit_pkts_vec () as an example, in this
> > > function RS bit will be set for descriptor with index
> > > txq->tx_next_rs, and also descriptor free function
> > > ixgbe_tx_free_bufs() also check RS bit for descriptor with index
> > > txq->tx_next_rs, This is perfect ok. Let us take an example,
> > > if app set tx_rs_thresh = 32 and nb_desc = 512, then ixgbe PMD code
> > > will init
> > > txq->tx_next_rs = 31 in function ixgbe_reset_tx_queue when tx queue
> > setup.
> > > And also txq->tx_next_rs will be update as 63, 95 and so on. But, in
> > > the function ixgbe_dev_tx_descriptor_status(), the RS bit to check
> > > is " desc = ((desc
> > > + txq->tx_rs_thresh - 1) /
> > > txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on.
> > > So, they are all wrong! In tx function of ixgbe_xmit_pkts_simple,
> > > the RS bit rule is also the same, it also set index 31 ,64, 95.
> > > we need to correct it.
> >
> > One question:
> > does only the descriptor with RS bit will have DD status, or NIC will
> > always update all descriptor's DD status but this happens when the
> > next descriptor with RS bit has been sent?
> > If it is the first case, I think you fix still have problem, because
> > multi-seg mbuf or tso offload will break the 31, 63, 95 pattern
> > See:
> > nb_used = (uint16_t)(tx_pkt-
> > >nb_segs + new_ctx);
> >
> > if (txp != NULL &&
> > nb_used + txq->nb_tx_used >=
> txq->tx_rs_thresh)
> > /* set RS on the previous packet in the burst */
> > txp->read.cmd_type_len |=
> >
> rte_cpu_to_le_32(IXGBE_TXD_CMD_RS);
> >
> > so the possible solution is store each RS position in a list at tx,
> > and find the next RS from the list in ixgbe_dev_tx_descriptor_status
> >
> > If it is the second case, it will be simple we don't need to check
> > forward with tx_rs_thresh, just check the exact position ( I hope it
> > is this case :))
>
> In this patch, code "desc = txq->sw_ring[desc].last_id;" will get the last
> index
> for several segments packet, that solve the case when packet contain more
> than one segment.
Yes, but my understanding is we "set RS on the previous packet" but not the
packet cross tx_rs_thresh boundary
So even without multi-seg , it will be 30, 62, 94, but not 31, 63, 95, probably
the reason we didn't see the issue, is because if we test
it with 32 burst, the latest packet still will be set RS, so it will be 30,31,
62,63, 94, 95,
but if we tested with 64 burst, I assume it will be 30, 62, 63, 94 ... right?
>
> >
> > Regards
> > Qi
> > >
> > > Fixes: a2919e13d95e ("net/ixgbe: implement descriptor status API")
> > >
> > > Signed-off-by: Wei Zhao
> > > ---
> > > drivers/net/ixgbe/ixgbe_rxtx.c | 12 ++--
> > > 1 file changed, 6 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c
> > > b/drivers/net/ixgbe/ixgbe_rxtx.c index 3e13d26..f185219 100644
> > > --- a/drivers/net/ixgbe/ixgbe_rxtx.c
> > > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c
> > > @@ -3146,15 +3146,15 @@ ixgbe_dev_tx_descriptor_status(void
> > *tx_queue,
> > > uint16_t offset)
> > > return -EINVAL;
> > >
> > > desc = txq->tx_tail + offset;
> > > + if (desc >= txq->nb_tx_desc)
> > > + desc -= txq->nb_tx_desc;
> > > /* go to next desc that has the RS bit */
> > > - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *
> > > - txq->tx_rs_thresh;
> > > - if (desc >= txq->nb_tx_desc) {
> > > + desc = (desc / txq->tx_rs_thresh + 1) *
> > > + txq->tx_rs_thresh - 1;
> > > + if (desc >= txq->nb_tx_desc)
> > > desc -= txq->nb_tx_desc;
> > > - if (desc >= txq->nb_tx_desc)
> > > - desc -= txq->nb_tx_desc;
> > > - }
> > >
> > > + desc = txq->sw_ring[desc].last_id;
> > > status = &txq->tx_ring[desc].wb.status;
> > > if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD))
> > > return RTE_ETH_TX_DESC_DONE;
> > > --
> > > 2.7.5
[dpdk-dev] [PATCH v13 0/6] Fix the cross compiling errors
1. Pre-v5 of this patch set(two patches) is to fix the GNU Makefile based cross compiling errors and add a guiding doc for this. 2. v6 add 5 more new patches to cover meson cross fixes 3. v7 Some minor changes to address the comments: a) trim the commit message b) at the start of the script, test ninja or ninja-build and use it to work out the command to work out. c) use host gcc and clang for the general v8a only to avoid overkill, and use gcc for others. 4. v8 drop one of the new patch as it a similar fix was already upstreamed 5. v9 some minor changes to address the comments, as well some commit message refined. a) move if clause out of the loop for a better program structure. b) echo the correct ninja command actually used. 6. v10 Fix the whitespace issues. 7. v11 Shorten the command to a single line with all hardcoded values in order to be shorter and more readable. 8. v12 Fix the following issues: a) return directly instead exiting with an error, if cross gcc is missing, meaning the cross compiling tests are skipped. b) move the check for cross gcc presence ahead to cover the clang case c) remove host-gcc from the build dir for brevity 9. v13 Fix the indention issue and merge lines to make the html doc more readable Gavin Hu (4): build: fix the meson build warning devtools: fix the missing ninja command error build: fix the meson cross compile error devtools: expand meson cross compiling test coverage gavin hu (2): mk: fix makefile based cross build errors doc: add a guide doc for cross compiling from x86 buildtools/pmdinfogen/Makefile | 2 +- config/arm/arm64_thunderx_linuxapp_gcc | 1 + config/meson.build | 3 +- devtools/test-meson-builds.sh | 31 +++-- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 132 + doc/guides/linux_gsg/index.rst | 1 + drivers/meson.build| 3 + examples/meson.build | 4 + lib/meson.build| 4 + mk/toolchain/gcc/rte.toolchain-compat.mk | 5 + mk/toolchain/gcc/rte.vars.mk | 9 ++ test/test/meson.build | 7 +- 12 files changed, 191 insertions(+), 11 deletions(-) create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst -- 2.11.0
[dpdk-dev] [PATCH v13 3/6] build: fix the meson build warning
This is to fix the unnecessary warning output, it is not consistent with
the configurations of other platforms.
WARNING: Cross file does not specify strip binary, result will not be
stripped.
Fixes: e53a5299d2 ("build: support vendor specific ARM cross builds")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
Reviewed-by: Song Zhu
Acked-by: Bruce Richardson
Acked-by: Jerin Jacob
---
config/arm/arm64_thunderx_linuxapp_gcc | 1 +
1 file changed, 1 insertion(+)
diff --git a/config/arm/arm64_thunderx_linuxapp_gcc
b/config/arm/arm64_thunderx_linuxapp_gcc
index 7ff34af74..967d9d46d 100644
--- a/config/arm/arm64_thunderx_linuxapp_gcc
+++ b/config/arm/arm64_thunderx_linuxapp_gcc
@@ -2,6 +2,7 @@
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
[host_machine]
system = 'linux'
--
2.11.0
[dpdk-dev] [PATCH v13 1/6] mk: fix makefile based cross build errors
From: gavin hu
The "-Wimplicit-fallthrough=2" option was introduced into gcc 7.0, it was
enabled when the cross compiler gcc is greater than 7.0, but for the host
side buildtools/pmdinfogen, if the native gcc is older than 7.0, or the
host cc compiler is clang, it should not be enabled.
The fix is to differentiate the host gcc Werror options from the cross gcc.
gcc -Wp,-MD,./.pmdinfogen.o.d.tmp -W -Wall -Wstrict-prototypes
-Wmissing-prototypes -Wmissing-declarations -Wold-style-definition
-Wpointer-arith -Wcast-align -Wnested-externs -Wcast-qual
-Wformat-nonliteral -Wformat-security -Wundef -Wwrite-strings -Wdeprecated
-Werror -Wimplicit-fallthrough=2 -Dbbb -Wno-format-truncation -g
-I/home/gavin/arm_repo/dpdk/build/include-o pmdinfogen.o -c
~/dpdk/buildtools/pmdinfogen/pmdinfogen.c gcc: error:
unrecognized command line option ‘-Wimplicit-fallthrough=2’
~/dpdk/mk/internal/rte.compile-pre.mk:114: recipe for target 'pmdinfogen.o'
failed make[3]: *** [pmdinfogen.o] Error 1
Fixes: ced3e6f8 ("mk: adjust gcc flags for new gcc 7 warnings")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
Reviewed-by: Honnappa Nagarahalli
Reviewed-by: Steve Capper
---
buildtools/pmdinfogen/Makefile | 2 +-
mk/toolchain/gcc/rte.toolchain-compat.mk | 5 +
mk/toolchain/gcc/rte.vars.mk | 9 +
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/buildtools/pmdinfogen/Makefile b/buildtools/pmdinfogen/Makefile
index bf07b6f2e..ff7a5fae6 100644
--- a/buildtools/pmdinfogen/Makefile
+++ b/buildtools/pmdinfogen/Makefile
@@ -41,7 +41,7 @@ HOSTAPP = dpdk-pmdinfogen
#
SRCS-y += pmdinfogen.c
-HOST_CFLAGS += $(WERROR_FLAGS) -g
+HOST_CFLAGS += $(HOST_WERROR_FLAGS) -g
HOST_CFLAGS += -I$(RTE_OUTPUT)/include
include $(RTE_SDK)/mk/rte.hostapp.mk
diff --git a/mk/toolchain/gcc/rte.toolchain-compat.mk
b/mk/toolchain/gcc/rte.toolchain-compat.mk
index 255c89677..1e4434fa9 100644
--- a/mk/toolchain/gcc/rte.toolchain-compat.mk
+++ b/mk/toolchain/gcc/rte.toolchain-compat.mk
@@ -15,6 +15,11 @@ GCC_MINOR = $(shell echo __GNUC_MINOR__ | $(CC) -E -x c - |
tail -n 1)
GCC_PATCHLEVEL = $(shell echo __GNUC_PATCHLEVEL__ | $(CC) -E -x c - | tail -n
1)
GCC_VERSION = $(GCC_MAJOR)$(GCC_MINOR)
+HOST_GCC_MAJOR = $(shell echo __GNUC__ | $(HOSTCC) -E -x c - | tail -n 1)
+HOST_GCC_MINOR = $(shell echo __GNUC_MINOR__ | $(HOSTCC) -E -x c - | tail -n 1)
+HOST_GCC_PATCHLEVEL = $(shell echo __GNUC_PATCHLEVEL__ | $(HOSTCC) -E -x c - |
tail -n 1)
+HOST_GCC_VERSION = $(HOST_GCC_MAJOR)$(HOST_GCC_MINOR)
+
# if GCC is older than 4.x
ifeq ($(shell test $(GCC_VERSION) -lt 40 && echo 1), 1)
MACHINE_CFLAGS =
diff --git a/mk/toolchain/gcc/rte.vars.mk b/mk/toolchain/gcc/rte.vars.mk
index 7e4531bab..d8b99faf6 100644
--- a/mk/toolchain/gcc/rte.vars.mk
+++ b/mk/toolchain/gcc/rte.vars.mk
@@ -71,6 +71,15 @@ ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1)
WERROR_FLAGS += -Wno-uninitialized
endif
+HOST_WERROR_FLAGS := $(WERROR_FLAGS)
+
+ifeq ($(shell test $(HOST_GCC_VERSION) -gt 70 && echo 1), 1)
+# Tell GCC only to error for switch fallthroughs without a suitable comment
+HOST_WERROR_FLAGS += -Wimplicit-fallthrough=2
+# Ignore errors for snprintf truncation
+HOST_WERROR_FLAGS += -Wno-format-truncation
+endif
+
ifeq ($(shell test $(GCC_VERSION) -gt 70 && echo 1), 1)
# Tell GCC only to error for switch fallthroughs without a suitable comment
WERROR_FLAGS += -Wimplicit-fallthrough=2
--
2.11.0
[dpdk-dev] [PATCH v13 5/6] build: fix the meson cross compile error
The following error hits if host cc compiler is clang(default one in most
linux distributions) and the cross compiler is gcc.
The root cause is: the hybride compilers add the warning options to the
meson project as project arguments, which apply for both host compiling and
cross compiling. But some options such as '-Wno-format-truncation' are not
supported nor recognized by clang, so they have to be removed from the
project arguments for the host compiler to run smoothily and added back as
cflags for the cross compiler to compile for cross source files.
The fix is remove unrecognized warning options from the meson project
arguments shared by gcc and clang, as add them specifically for gcc or
clang as cflags.
[265/893] Compiling C object
'buildtools/pmdinfogen/pmdinfogen@exe/pmdinfogen.c.o'. warning: unknown
warning option '-Wno-format-truncation' [-Wunknown-warning-option]
Fixes: a55277a788 ("devtools: add test script for meson builds")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
Reviewed-by: Song Zhu
Reviewed-by: Steve Capper
Acked-by: Bruce Richardson
---
config/meson.build| 3 +--
drivers/meson.build | 3 +++
examples/meson.build | 4
lib/meson.build | 4
test/test/meson.build | 7 ++-
5 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/config/meson.build b/config/meson.build
index 50081b572..272d4a838 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -57,8 +57,7 @@ add_project_arguments('-include', 'rte_config.h', language:
'c')
warning_flags = [
'-Wsign-compare',
'-Wcast-qual',
- '-Wno-address-of-packed-member',
- '-Wno-format-truncation'
+ '-Wno-address-of-packed-member'
]
foreach arg: warning_flags
if cc.has_argument(arg)
diff --git a/drivers/meson.build b/drivers/meson.build
index ac6c97297..1737d86b8 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -32,6 +32,9 @@ foreach class:driver_classes
sources = []
objs = []
cflags = machine_args
+ if cc.has_argument('-Wno-format-truncation')
+ cflags += '-Wno-format-truncation'
+ endif
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 3d1568497..e6558875a 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -24,6 +24,10 @@ foreach example: examples
sources = []
allow_experimental_apis = false
cflags = machine_args
+ if cc.has_argument('-Wno-format-truncation')
+ cflags += '-Wno-format-truncation'
+ endif
+
ext_deps = [execinfo]
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 9d11571f9..fefb3605d 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -34,6 +34,10 @@ foreach l:libraries
headers = []
includes = []
cflags = machine_args
+ if cc.has_argument('-Wno-format-truncation')
+ cflags += '-Wno-format-truncation'
+ endif
+
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/test/test/meson.build b/test/test/meson.build
index a907fd256..dc4ba5514 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -235,6 +235,11 @@ if dpdk_conf.has('RTE_LIBRTE_KNI')
test_deps += 'kni'
endif
+cflags = machine_args
+if cc.has_argument('-Wno-format-truncation')
+cflags += '-Wno-format-truncation'
+endif
+
test_dep_objs = []
compress_test_dep = dependency('zlib', required: false)
if compress_test_dep.found()
@@ -260,7 +265,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: [machine_args, '-DALLOW_EXPERIMENTAL_API'],
+ c_args: [cflags, '-DALLOW_EXPERIMENTAL_API'],
install_rpath: driver_install_path,
install: false)
--
2.11.0
[dpdk-dev] [PATCH v13 4/6] devtools: fix the missing ninja command error
On some linux distributions, eg: CentOS, the ninja executable has a
different name: ninja-build, this patch is to check and adapt to it
accordingly.
./devtools/test-meson-builds.sh: line 24: ninja: command not found
Fixes: a55277a788 ("devtools: add test script for meson builds")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
Reviewed-by: Song Zhu
Acked-by: Bruce Richardson
---
devtools/test-meson-builds.sh | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index f2ad05f32..9bb5b93bd 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -10,6 +10,15 @@
srcdir=$(dirname $(readlink -m $0))/..
MESON=${MESON:-meson}
+if command -v ninja >/dev/null 2>&1 ; then
+ninja_cmd=ninja
+elif command -v ninja-build >/dev/null 2>&1 ; then
+ninja_cmd=ninja-build
+else
+echo "## ERROR: ninja is missing, please install..."
+exit 1
+fi
+
build () #
{
builddir=$1
@@ -20,8 +29,8 @@ build () #
$MESON $options $srcdir $builddir
unset CC
fi
- echo "ninja -C $builddir"
- ninja -C $builddir
+ echo "$ninja_cmd -C $builddir"
+ $ninja_cmd -C $builddir
}
# shared and static linked builds with gcc and clang
--
2.11.0
[dpdk-dev] [PATCH v13 2/6] doc: add a guide doc for cross compiling from x86
From: gavin hu This is the guide for cross compiling ARM64 DPDK from X86 hosts. Signed-off-by: Gavin Hu Reviewed-by: Steve Capper Reviewed-by: Honnappa Nagarahalli Acked-by: Marko Kovacevic --- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 132 + doc/guides/linux_gsg/index.rst | 1 + 2 files changed, 133 insertions(+) create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst new file mode 100644 index 0..bad3d0288 --- /dev/null +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -0,0 +1,132 @@ +.. SPDX-License-Identifier: BSD-3-Clause +Copyright(c) 2018 ARM Corporation. + +Cross compile DPDK for ARM64 + +This chapter describes how to cross compile DPDK for ARM64 from x86 build hosts. + +.. note:: + + Whilst it is recommended to natively build DPDK on ARM64 (just + like with x86), it is also possible to cross-build DPDK for ARM64. An + ARM64 cross compile GNU toolchain is used for this. + +Obtain the cross tool chain +--- +The latest cross compile tool chain can be downloaded from: +https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-linux-gnu/. + +Following is the step to get the version 7.2.1, latest one at the time of this writing. + +.. code-block:: console + + wget https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-linux-gnu/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz + +Unzip and add into the PATH +--- + +.. code-block:: console + + tar -xvf gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz + export PATH=$PATH:/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu/bin + +.. note:: + + For the host requirements and other info, refer to the release note section: https://releases.linaro.org/components/toolchain/binaries/latest/ + +Getting the prerequisite library + + +NUMA is required by most modern machines, not needed for non-NUMA architectures. + +.. note:: + + For compiling the NUMA lib, run libtool --version to ensure the libtool version >= 2.2, + otherwise the compilation will fail with errors. + +.. code-block:: console + + git clone https://github.com/numactl/numactl.git + cd numactl + git checkout v2.0.11 -b v2.0.11 + ./autogen.sh + autoconf -i + ./configure --host=x86_64 CC=aarch64-linux-gnu-gcc prefix= + make install + +The numa header files and lib file is generated in the include and lib folder respectively under . + +.. _augment_the_cross_toolchain_with_numa_support: + +Augment the cross toolchain with NUMA support +- + +.. note:: + + This way is optional, an alternative is to use extra CFLAGS and LDFLAGS, depicted in :ref:`configure_and_cross_compile_dpdk_build` below. + +Copy the NUMA header files and lib to the cross compiler's directories: + +.. code-block:: console + + cp /include/numa*.h /gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu/bin/../aarch64-linux-gnu/libc/usr/include/ + cp /lib/libnuma.a /gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu/lib/gcc/aarch64-linux-gnu/7.2.1/ + +.. _configure_and_cross_compile_dpdk_build: + +Configure and cross compile DPDK Build +-- +To configure a build, choose one of the target configurations, like arm64-dpaa2-linuxapp-gcc and arm64-thunderx-linuxapp-gcc. + +.. code-block:: console + + make config T=arm64-armv8a-linuxapp-gcc + +To cross-compile, without compiling the kernel modules, use the following command: + +.. code-block:: console + + make -j CROSS=aarch64-linux-gnu- CONFIG_RTE_KNI_KMOD=n CONFIG_RTE_EAL_IGB_UIO=n + +To cross-compile, including the kernel modules, the kernel source tree needs to be specified by setting +RTE_KERNELDIR: + +.. code-block:: console + + make -j CROSS=aarch64-linux-gnu- RTE_KERNELDIR= CROSS_COMPILE=aarch64-linux-gnu- + +To compile for non-NUMA targets, without compiling the kernel modules, use the following command: + +.. code-block:: console + + make -j CROSS=aarch64-linux-gnu- CONFIG_RTE_KNI_KMOD=n CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_LIBRTE_VHOST_NUMA=n CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n + +.. note:: + + 1. EXTRA_CFLAGS and EXTRA_LDFLAGS should be added to include the NUMA headers and link the library respectively, + if the above step :ref:`augment_the_cross_toolchain_with_numa_support` was skipped therefore the toolchain was not + augmented with NUMA support. + + 2. "-isystem /include" should be add to EXTRA_CFLAGS, otherwise the numa.h file will get a lot of compiling + errors of Werror=cast-qual, Werror=strict-prototypes and Werror=old-style-definition. + + An example is given below: + + .. code-block:: console + + make -j CROSS=aarch64-linux-gnu- CONFIG_RTE_KNI_KM
[dpdk-dev] [PATCH v13 6/6] devtools: expand meson cross compiling test coverage
The default test script covers only default host cc compiler, either gcc or
clang, the fix is to increase the coverage by adding one more to cover
clang and the others for gcc.
Fixes: a55277a788 ("devtools: add test script for meson builds")
Cc: sta...@dpdk.org
Signed-off-by: Gavin Hu
Reviewed-by: Phil Yang
Reviewed-by: Song Zhu
Acked-by: Bruce Richardson
---
devtools/test-meson-builds.sh | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index 9bb5b93bd..e7db0abe9 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -45,10 +45,18 @@ done
build build-x86-default -Dmachine=nehalem
# enable cross compilation if gcc cross-compiler is found
+c=aarch64-linux-gnu-gcc
+if ! command -v $c >/dev/null 2>&1 ; then
+ echo "## ERROR: $c is missing, cross compiling is aborting..."
+ return
+fi
+
+# compile the general v8a also for clang to increase coverage
+export CC="ccache clang"
+build build-arm64-host-clang --cross-file config/arm/arm64_armv8_linuxapp_gcc
+
for f in config/arm/arm*gcc ; do
- c=aarch64-linux-gnu-gcc
- if ! command -v $c >/dev/null 2>&1 ; then
- continue
- fi
- build build-$(basename $f | tr '_' '-' | cut -d'-' -f-2) --cross-file $f
+ export CC="ccache gcc"
+ build build-$(basename $f | tr '_' '-' | cut -d'-' -f-2) \
+ --cross-file $f
done
--
2.11.0
Re: [dpdk-dev] [PATCH v3 0/3] Support UDP/IPv4 GSO
Hi, > -Original Message- > From: Hu, Jiayu > Sent: Friday, June 22, 2018 1:54 PM > To: dev@dpdk.org > Cc: Wang, Xiao W ; Ananyev, Konstantin > ; Zhang, Yuwei1 ; > Iremonger, Bernard ; tho...@monjalon.net; > Hu, Jiayu > Subject: [PATCH v3 0/3] Support UDP/IPv4 GSO > > With the support of UDP Fragmentation Offload (UFO) and TCP Segmentation > Offload (TSO) in virtio, VMs can exchange large UDP and TCP packets > exceeding MTU between each other, which can greatly reduce per-packet > processing overheads. > > When the destination of the large TCP and UDP packets is crossing > machines, the host application needs to call two different libraries, > GSO and IP fragmentation, to split the large packets respectively. > However,the GSO and IP fragmentation library have quite different APIs, > which greatly complicates the host application implementation. > > To simplify application development, we propose to support UDP/IPv4 > fragmentation in the GSO library. With supporting UDP GSO, host > applicationss can use the unified APIs to split large UDP and TCP packets. > > This patchset is to support UDP/IPv4 GSO. The first patch is to provide > UDP GSO function, the second patch is to enable UDP/IPv4 GSO in the > testpmd checksum forwarding engine, and the last patch is to update the > programmer guide and testpmd user guide. > > Change log > == > v3: > - replace rte_pktmbuf_mtod() with rte_pktmbuf_mtod_offset(). > - fix meson build. > - add updates to document for better explaining how UDP GSO works. > V2: > - fix fragment offset calculation bug. > - add UDP GSO description in testpmd user guide. > - shorten the second patch name. > > Jiayu Hu (3): > gso: support UDP/IPv4 fragmentation > app/testpmd: enable UDP GSO in csum engine > gso: update documents for UDP/IPv4 GSO > > app/test-pmd/cmdline.c | 5 +- > app/test-pmd/csumonly.c| 2 + > app/test-pmd/testpmd.c | 2 +- > .../generic_segmentation_offload_lib.rst | 10 +++ > doc/guides/testpmd_app_ug/testpmd_funcs.rst| 7 ++ > lib/librte_gso/Makefile| 1 + > lib/librte_gso/gso_common.h| 3 + > lib/librte_gso/gso_udp4.c | 81 > ++ > lib/librte_gso/gso_udp4.h | 42 +++ > lib/librte_gso/meson.build | 2 +- > lib/librte_gso/rte_gso.c | 24 +-- > lib/librte_gso/rte_gso.h | 6 +- > 12 files changed, 175 insertions(+), 10 deletions(-) > create mode 100644 lib/librte_gso/gso_udp4.c > create mode 100644 lib/librte_gso/gso_udp4.h > > -- > 2.7.4 Series Acked-by: Xiao Wang BRs, Xiao
[dpdk-dev] [PATCH] crypto/zuc: add dynamic logging to zuc
From: Agalya Babu Radha Krishnan
1.added new logtype for zuc driver.
2.registered new logtype.
3.ZUC_LOG_ERR and CDEV_LOG_ERR are
replaced with new logtype name ZUC_PMD_LOG
Signed-off-by: Agalya Babu RadhaKrishnan
Reviewed-by: Reshma Pattan
---
drivers/crypto/zuc/rte_zuc_pmd.c | 28 +---
drivers/crypto/zuc/rte_zuc_pmd_ops.c | 13 +++--
drivers/crypto/zuc/rte_zuc_pmd_private.h | 27 +++
3 files changed, 31 insertions(+), 37 deletions(-)
diff --git a/drivers/crypto/zuc/rte_zuc_pmd.c b/drivers/crypto/zuc/rte_zuc_pmd.c
index a805b2278..2a6c2caf7 100644
--- a/drivers/crypto/zuc/rte_zuc_pmd.c
+++ b/drivers/crypto/zuc/rte_zuc_pmd.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2017 Intel Corporation
+ * Copyright(c) 2016-2018 Intel Corporation
*/
#include
@@ -11,7 +11,6 @@
#include
#include "rte_zuc_pmd_private.h"
-
#define ZUC_MAX_BURST 4
#define BYTE_LEN 8
@@ -78,7 +77,7 @@ zuc_set_session_parameters(struct zuc_session *sess,
break;
case ZUC_OP_NOT_SUPPORTED:
default:
- ZUC_LOG_ERR("Unsupported operation chain order parameter");
+ ZUC_PMD_LOG(ERR, "Unsupported operation chain order parameter");
return -ENOTSUP;
}
@@ -88,7 +87,7 @@ zuc_set_session_parameters(struct zuc_session *sess,
return -ENOTSUP;
if (cipher_xform->cipher.iv.length != ZUC_IV_KEY_LENGTH) {
- ZUC_LOG_ERR("Wrong IV length");
+ ZUC_PMD_LOG(ERR, "Wrong IV length");
return -EINVAL;
}
sess->cipher_iv_offset = cipher_xform->cipher.iv.offset;
@@ -104,14 +103,14 @@ zuc_set_session_parameters(struct zuc_session *sess,
return -ENOTSUP;
if (auth_xform->auth.digest_length != ZUC_DIGEST_LENGTH) {
- ZUC_LOG_ERR("Wrong digest length");
+ ZUC_PMD_LOG(ERR, "Wrong digest length");
return -EINVAL;
}
sess->auth_op = auth_xform->auth.op;
if (auth_xform->auth.iv.length != ZUC_IV_KEY_LENGTH) {
- ZUC_LOG_ERR("Wrong IV length");
+ ZUC_PMD_LOG(ERR, "Wrong IV length");
return -EINVAL;
}
sess->auth_iv_offset = auth_xform->auth.iv.offset;
@@ -187,7 +186,7 @@ process_zuc_cipher_op(struct rte_crypto_op **ops,
|| ((ops[i]->sym->cipher.data.offset
% BYTE_LEN) != 0)) {
ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
- ZUC_LOG_ERR("Data Length or offset");
+ ZUC_PMD_LOG(ERR, "Data Length or offset");
break;
}
@@ -198,7 +197,7 @@ process_zuc_cipher_op(struct rte_crypto_op **ops,
(ops[i]->sym->m_dst != NULL &&
!rte_pktmbuf_is_contiguous(
ops[i]->sym->m_dst))) {
- ZUC_LOG_ERR("PMD supports only contiguous mbufs, "
+ ZUC_PMD_LOG(ERR, "PMD supports only contiguous mbufs, "
"op (%p) provides noncontiguous mbuf as "
"source/destination buffer.\n", ops[i]);
ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
@@ -246,7 +245,7 @@ process_zuc_hash_op(struct zuc_qp *qp, struct rte_crypto_op
**ops,
/* Data must be byte aligned */
if ((ops[i]->sym->auth.data.offset % BYTE_LEN) != 0) {
ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
- ZUC_LOG_ERR("Offset");
+ ZUC_PMD_LOG(ERR, "Offset");
break;
}
@@ -461,7 +460,7 @@ cryptodev_zuc_create(const char *name,
dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
if (dev == NULL) {
- ZUC_LOG_ERR("failed to create cryptodev vdev");
+ ZUC_PMD_LOG(ERR, "failed to create cryptodev vdev");
goto init_error;
}
@@ -483,7 +482,7 @@ cryptodev_zuc_create(const char *name,
return 0;
init_error:
- ZUC_LOG_ERR("driver %s: cryptodev_zuc_create failed",
+ ZUC_PMD_LOG(ERR, "driver %s: failed",
init_params->name);
cryptodev_zuc_remove(vdev);
@@ -545,3 +544,10 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_ZUC_PMD,
"socket_id=");
RTE_PMD_REGISTER_CRYPTO_DRIVER(zuc_crypto_drv, cryptodev_zuc_pmd_drv.driver,
cryptodev_driver_id);
+
+RTE_INIT(zuc_init_log);
+static void
+zuc_init_log(void)
+{
+ zuc_logtype_driver = rte_
[dpdk-dev] [PATCH] crypto/kasumi: add dynamic logging to kasumi
1.added new logtype for kasumi driver.
2.registered new logtype.
3.KASUMI_LOG_ERR and CDEV_LOG_ERR are
replaced with new logtype name KASUMI_PMD_LOG.
Signed-off-by: Naga Suresh Somarowthu
Reviewed-by: Reshma Pattan
---
drivers/crypto/kasumi/rte_kasumi_pmd.c | 29 +-
drivers/crypto/kasumi/rte_kasumi_pmd_ops.c | 14 ++---
drivers/crypto/kasumi/rte_kasumi_pmd_private.h | 26 +++
3 files changed, 33 insertions(+), 36 deletions(-)
diff --git a/drivers/crypto/kasumi/rte_kasumi_pmd.c
b/drivers/crypto/kasumi/rte_kasumi_pmd.c
index 205dc1de7..bf48b7006 100644
--- a/drivers/crypto/kasumi/rte_kasumi_pmd.c
+++ b/drivers/crypto/kasumi/rte_kasumi_pmd.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2017 Intel Corporation
+ * Copyright(c) 2016-2018 Intel Corporation
*/
#include
@@ -79,18 +79,19 @@ kasumi_set_session_parameters(struct kasumi_session *sess,
break;
case KASUMI_OP_NOT_SUPPORTED:
default:
- KASUMI_LOG_ERR("Unsupported operation chain order parameter");
+ KASUMI_PMD_LOG(ERR, "Unsupported operation chain order
parameter");
return -ENOTSUP;
}
if (cipher_xform) {
/* Only KASUMI F8 supported */
if (cipher_xform->cipher.algo != RTE_CRYPTO_CIPHER_KASUMI_F8)
+ KASUMI_PMD_LOG(ERR, "Unsupported cipher algorithm ");
return -ENOTSUP;
sess->cipher_iv_offset = cipher_xform->cipher.iv.offset;
if (cipher_xform->cipher.iv.length != KASUMI_IV_LENGTH) {
- KASUMI_LOG_ERR("Wrong IV length");
+ KASUMI_PMD_LOG(ERR, "Wrong IV length");
return -EINVAL;
}
@@ -102,10 +103,11 @@ kasumi_set_session_parameters(struct kasumi_session *sess,
if (auth_xform) {
/* Only KASUMI F9 supported */
if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_KASUMI_F9)
+ KASUMI_PMD_LOG(ERR, "Unsupported authentication");
return -ENOTSUP;
if (auth_xform->auth.digest_length != KASUMI_DIGEST_LENGTH) {
- KASUMI_LOG_ERR("Wrong digest length");
+ KASUMI_PMD_LOG(ERR, "Wrong digest length");
return -EINVAL;
}
@@ -213,7 +215,7 @@ process_kasumi_cipher_op_bit(struct rte_crypto_op *op,
src = rte_pktmbuf_mtod(op->sym->m_src, uint8_t *);
if (op->sym->m_dst == NULL) {
op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
- KASUMI_LOG_ERR("bit-level in-place not supported\n");
+ KASUMI_PMD_LOG(ERR, "bit-level in-place not supported");
return 0;
}
dst = rte_pktmbuf_mtod(op->sym->m_dst, uint8_t *);
@@ -244,7 +246,7 @@ process_kasumi_hash_op(struct kasumi_qp *qp, struct
rte_crypto_op **ops,
/* Data must be byte aligned */
if ((ops[i]->sym->auth.data.offset % BYTE_LEN) != 0) {
ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
- KASUMI_LOG_ERR("offset");
+ KASUMI_PMD_LOG(ERR, "Invalid Offset");
break;
}
@@ -409,9 +411,9 @@ kasumi_pmd_enqueue_burst(void *queue_pair, struct
rte_crypto_op **ops,
(curr_c_op->sym->m_dst != NULL &&
!rte_pktmbuf_is_contiguous(
curr_c_op->sym->m_dst))) {
- KASUMI_LOG_ERR("PMD supports only contiguous mbufs, "
+ KASUMI_PMD_LOG(ERR, "PMD supports only contiguous
mbufs, "
"op (%p) provides noncontiguous mbuf as "
- "source/destination buffer.\n", curr_c_op);
+ "source/destination buffer.", curr_c_op);
curr_c_op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
break;
}
@@ -531,7 +533,7 @@ cryptodev_kasumi_create(const char *name,
dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
if (dev == NULL) {
- KASUMI_LOG_ERR("failed to create cryptodev vdev");
+ KASUMI_PMD_LOG(ERR, "failed to create cryptodev vdev");
goto init_error;
}
@@ -559,7 +561,7 @@ cryptodev_kasumi_create(const char *name,
return 0;
init_error:
- KASUMI_LOG_ERR("driver %s: cryptodev_kasumi_create failed",
+ KASUMI_PMD_LOG(ERR, "driver %s: failed",
init_params->name);
cryptodev_kasumi_remove(vdev);
@@ -621,3 +623,10 @@ RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_KASUMI_PMD,
"socket_id=");
RTE_PMD_REGISTER_CRYPTO_DRIVER(kasumi_crypto_drv,
[dpdk-dev] [PATCH] net/virtio-user: add unsupported features mask
This patch introduces unsupported features mask for virtio-user device.
For virtio-user server mode, when reconnecting virtio-user will
retrieve vhost devcie features as base and then unmask unsupported
features.
Signed-off-by: Marvin Liu
diff --git a/drivers/net/virtio/virtio_user/virtio_user_dev.c
b/drivers/net/virtio/virtio_user/virtio_user_dev.c
index 4322527f2..360a92eae 100644
--- a/drivers/net/virtio/virtio_user/virtio_user_dev.c
+++ b/drivers/net/virtio/virtio_user/virtio_user_dev.c
@@ -384,6 +384,7 @@ virtio_user_dev_init(struct virtio_user_dev *dev, char
*path, int queues,
dev->queue_pairs = 1; /* mq disabled by default */
dev->queue_size = queue_size;
dev->mac_specified = 0;
+ dev->unmask_features = 0;
parse_mac(dev, mac);
if (*ifname) {
@@ -421,8 +422,10 @@ virtio_user_dev_init(struct virtio_user_dev *dev, char
*path, int queues,
if (dev->mac_specified)
dev->device_features |= (1ull << VIRTIO_NET_F_MAC);
- else
+ else {
dev->device_features &= ~(1ull << VIRTIO_NET_F_MAC);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_MAC);
+ }
if (cq) {
/* device does not really need to know anything about CQ,
@@ -437,6 +440,12 @@ virtio_user_dev_init(struct virtio_user_dev *dev, char
*path, int queues,
dev->device_features &= ~(1ull << VIRTIO_NET_F_GUEST_ANNOUNCE);
dev->device_features &= ~(1ull << VIRTIO_NET_F_MQ);
dev->device_features &= ~(1ull << VIRTIO_NET_F_CTRL_MAC_ADDR);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_CTRL_VQ);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_CTRL_RX);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_CTRL_VLAN);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_GUEST_ANNOUNCE);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_MQ);
+ dev->unmask_features |= (1ull << VIRTIO_NET_F_CTRL_MAC_ADDR);
}
/* The backend will not report this feature, we add it explicitly */
@@ -444,6 +453,7 @@ virtio_user_dev_init(struct virtio_user_dev *dev, char
*path, int queues,
dev->device_features |= (1ull << VIRTIO_NET_F_STATUS);
dev->device_features &= VIRTIO_USER_SUPPORTED_FEATURES;
+ dev->unmask_features |= ~VIRTIO_USER_SUPPORTED_FEATURES;
if (rte_mem_event_callback_register(VIRTIO_USER_MEM_EVENT_CLB_NAME,
virtio_user_mem_event_cb, dev)) {
diff --git a/drivers/net/virtio/virtio_user/virtio_user_dev.h
b/drivers/net/virtio/virtio_user/virtio_user_dev.h
index d2d4cb825..a1da5f56c 100644
--- a/drivers/net/virtio/virtio_user/virtio_user_dev.h
+++ b/drivers/net/virtio/virtio_user/virtio_user_dev.h
@@ -33,6 +33,7 @@ struct virtio_user_dev {
* and will be sync with device
*/
uint64_tdevice_features; /* supported features by device */
+ uint64_tunmask_features; /* unsupported features mask */
uint8_t status;
uint16_tport_id;
uint8_t mac_addr[ETHER_ADDR_LEN];
diff --git a/drivers/net/virtio/virtio_user_ethdev.c
b/drivers/net/virtio/virtio_user_ethdev.c
index 1c102ca72..0c02c6851 100644
--- a/drivers/net/virtio/virtio_user_ethdev.c
+++ b/drivers/net/virtio/virtio_user_ethdev.c
@@ -30,7 +30,6 @@ virtio_user_server_reconnect(struct virtio_user_dev *dev)
int ret;
int flag;
int connectfd;
- uint64_t features = dev->device_features;
struct rte_eth_dev *eth_dev = &rte_eth_devices[dev->port_id];
connectfd = accept(dev->listenfd, NULL, NULL);
@@ -45,15 +44,8 @@ virtio_user_server_reconnect(struct virtio_user_dev *dev)
return -1;
}
- features &= ~dev->device_features;
- /* For following bits, vhost-user doesn't really need to know */
- features &= ~(1ull << VIRTIO_NET_F_MAC);
- features &= ~(1ull << VIRTIO_NET_F_CTRL_VLAN);
- features &= ~(1ull << VIRTIO_NET_F_CTRL_MAC_ADDR);
- features &= ~(1ull << VIRTIO_NET_F_STATUS);
- if (features)
- PMD_INIT_LOG(ERR, "WARNING: Some features 0x%" PRIx64 " are not
supported by vhost-user!",
-features);
+ /* umask vhost-user unsupported features */
+ dev->device_features &= ~(dev->unmask_features);
dev->features &= dev->device_features;
--
2.17.0
Re: [dpdk-dev] [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
Hi, qi
> -Original Message-
> From: Zhang, Qi Z
> Sent: Monday, June 25, 2018 10:49 AM
> To: Zhao1, Wei ; dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org
> Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
>
>
>
> > -Original Message-
> > From: Zhao1, Wei
> > Sent: Monday, June 25, 2018 9:58 AM
> > To: Zhang, Qi Z ; dev@dpdk.org
> > Cc: Lu, Wenzhuo ; sta...@dpdk.org
> > Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > error
> >
> > Hi,
> >
> > > -Original Message-
> > > From: Zhang, Qi Z
> > > Sent: Friday, June 22, 2018 9:47 PM
> > > To: Zhao1, Wei ; dev@dpdk.org
> > > Cc: Lu, Wenzhuo ; sta...@dpdk.org
> > > Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > > error
> > >
> > > Hi Wei:
> > >
> > > > -Original Message-
> > > > From: Zhao1, Wei
> > > > Sent: Friday, June 22, 2018 4:39 PM
> > > > To: dev@dpdk.org
> > > > Cc: Lu, Wenzhuo ; Zhang, Qi Z
> > > > ; sta...@dpdk.org; Zhao1, Wei
> > > >
> > > > Subject: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > > > error
> > > >
> > > > This is a issue involve RS bit set rule in ixgbe.
> > > > Let us take function ixgbe_xmit_pkts_vec () as an example, in this
> > > > function RS bit will be set for descriptor with index
> > > > txq->tx_next_rs, and also descriptor free function
> > > > ixgbe_tx_free_bufs() also check RS bit for descriptor with index
> > > > txq->tx_next_rs, This is perfect ok. Let us take an example,
> > > > if app set tx_rs_thresh = 32 and nb_desc = 512, then ixgbe PMD
> > > > code will init
> > > > txq->tx_next_rs = 31 in function ixgbe_reset_tx_queue when tx
> > > > txq->queue
> > > setup.
> > > > And also txq->tx_next_rs will be update as 63, 95 and so on. But,
> > > > in the function ixgbe_dev_tx_descriptor_status(), the RS bit to
> > > > check is " desc = ((desc
> > > > + txq->tx_rs_thresh - 1) /
> > > > txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on.
> > > > So, they are all wrong! In tx function of ixgbe_xmit_pkts_simple,
> > > > the RS bit rule is also the same, it also set index 31 ,64, 95.
> > > > we need to correct it.
> > >
> > > One question:
> > > does only the descriptor with RS bit will have DD status, or NIC
> > > will always update all descriptor's DD status but this happens when
> > > the next descriptor with RS bit has been sent?
> > > If it is the first case, I think you fix still have problem, because
> > > multi-seg mbuf or tso offload will break the 31, 63, 95 pattern
> > > See:
> > > nb_used = (uint16_t)(tx_pkt-
> > > >nb_segs + new_ctx);
> > >
> > > if (txp != NULL &&
> > > nb_used + txq->nb_tx_used >=
> > txq->tx_rs_thresh)
> > > /* set RS on the previous packet in the burst */
> > > txp->read.cmd_type_len |=
> > >
> > rte_cpu_to_le_32(IXGBE_TXD_CMD_RS);
> > >
> > > so the possible solution is store each RS position in a list at tx,
> > > and find the next RS from the list in ixgbe_dev_tx_descriptor_status
> > >
> > > If it is the second case, it will be simple we don't need to check
> > > forward with tx_rs_thresh, just check the exact position ( I hope it
> > > is this case :))
> >
> > In this patch, code "desc = txq->sw_ring[desc].last_id;" will get the
> > last index for several segments packet, that solve the case when
> > packet contain more than one segment.
>
> Yes, but my understanding is we "set RS on the previous packet" but not the
> packet cross tx_rs_thresh boundary So even without multi-seg , it will be 30,
> 62, 94, but not 31, 63, 95, probably the reason we didn't see the issue, is
> because if we test it with 32 burst, the latest packet still will be set RS,
> so it
> will be 30,31, 62,63, 94, 95, but if we tested with 64 burst, I assume it
> will be
> 30, 62, 63, 94 ... right?
There are 3 tx packet function in ixgbe PMD:
ixgbe_xmit_pkts_vec AND ixgbe_xmit_pkts_simple set RS bit in index 31 63 and 9,
they also do not support multiple segment packet tx.
ixgbe_xmit_pkts() will set RS bit as your description in index 30 62 and 94, it
also set to 31 63 95 if we tx use 32 as burst number.
But ixgbe_xmit_cleanup function will check 31 63 and 95 DD bit to free
descriptor, so this is a bug in ixgbe_xmit_pkts.
I will commit other patch to fix this problem.
>
> >
> > >
> > > Regards
> > > Qi
> > > >
> > > > Fixes: a2919e13d95e ("net/ixgbe: implement descriptor status API")
> > > >
> > > > Signed-off-by: Wei Zhao
> > > > ---
> > > > drivers/net/ixgbe/ixgbe_rxtx.c | 12 ++--
> > > > 1 file changed, 6 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c
> > > > b/drivers/net/ixgbe/ixgbe_rxtx.c index 3e13d26..f185219 100644
> > > > --- a/drivers/net/ixgbe/ixgbe_rxtx.c
> > > > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c
> > > > @@ -3146,15 +3146,15 @@ ixgbe_dev_tx
Re: [dpdk-dev] [PATCH] net/mlx5: separate generic tunnel TSO from the standard one
On Sun, Jun 24, 2018 at 09:22:26AM +0300, Shahaf Shuler wrote:
> The generic tunnel TSO was depended in the regular one capabilities to
> be enabled.
>
> Cc: sta...@dpdk.org
>
> Signed-off-by: Shahaf Shuler
> Acked-by: Yongseok Koh
> ---
> drivers/net/mlx5/mlx5_txq.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
> index 068f36d99d..669b91319f 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -113,15 +113,20 @@ mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)
>DEV_TX_OFFLOAD_TCP_CKSUM);
> if (config->tso)
> offloads |= DEV_TX_OFFLOAD_TCP_TSO;
> + if (config->swp) {
> + if (config->hw_csum)
> + offloads |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
> + if (config->tso)
> + offloads |= (DEV_TX_OFFLOAD_IP_TNL_TSO |
> + DEV_TX_OFFLOAD_UDP_TNL_TSO);
> + }
> +
> if (config->tunnel_en) {
> if (config->hw_csum)
> offloads |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
> if (config->tso)
> offloads |= (DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
>DEV_TX_OFFLOAD_GRE_TNL_TSO);
> - if (config->swp)
> - offloads |= (DEV_TX_OFFLOAD_IP_TNL_TSO |
> - DEV_TX_OFFLOAD_UDP_TNL_TSO);
> }
> return offloads;
> }
> @@ -707,7 +712,7 @@ txq_set_params(struct mlx5_txq_ctrl *txq_ctrl)
> max_tso_inline);
> txq_ctrl->txq.tso_en = 1;
> }
> - txq_ctrl->txq.tunnel_en = config->tunnel_en;
> + txq_ctrl->txq.tunnel_en = config->tunnel_en | config->swp;
> txq_ctrl->txq.swp_en = ((DEV_TX_OFFLOAD_IP_TNL_TSO |
>DEV_TX_OFFLOAD_UDP_TNL_TSO |
>DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) &
> --
> 2.12.0
>
Is not it a fix?
Regards,
--
Nélio Laranjeiro
6WIND
Re: [dpdk-dev] [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
Hi，qi
> -Original Message-
> From: Zhang, Qi Z
> Sent: Monday, June 25, 2018 10:49 AM
> To: Zhao1, Wei ; dev@dpdk.org
> Cc: Lu, Wenzhuo ; sta...@dpdk.org
> Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs error
>
>
>
> > -Original Message-
> > From: Zhao1, Wei
> > Sent: Monday, June 25, 2018 9:58 AM
> > To: Zhang, Qi Z ; dev@dpdk.org
> > Cc: Lu, Wenzhuo ; sta...@dpdk.org
> > Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > error
> >
> > Hi,
> >
> > > -Original Message-
> > > From: Zhang, Qi Z
> > > Sent: Friday, June 22, 2018 9:47 PM
> > > To: Zhao1, Wei ; dev@dpdk.org
> > > Cc: Lu, Wenzhuo ; sta...@dpdk.org
> > > Subject: RE: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > > error
> > >
> > > Hi Wei:
> > >
> > > > -Original Message-
> > > > From: Zhao1, Wei
> > > > Sent: Friday, June 22, 2018 4:39 PM
> > > > To: dev@dpdk.org
> > > > Cc: Lu, Wenzhuo ; Zhang, Qi Z
> > > > ; sta...@dpdk.org; Zhao1, Wei
> > > >
> > > > Subject: [PATCH] net/ixgbe: fix Tx check descriptor status APIs
> > > > error
> > > >
> > > > This is a issue involve RS bit set rule in ixgbe.
> > > > Let us take function ixgbe_xmit_pkts_vec () as an example, in this
> > > > function RS bit will be set for descriptor with index
> > > > txq->tx_next_rs, and also descriptor free function
> > > > ixgbe_tx_free_bufs() also check RS bit for descriptor with index
> > > > txq->tx_next_rs, This is perfect ok. Let us take an example,
> > > > if app set tx_rs_thresh = 32 and nb_desc = 512, then ixgbe PMD
> > > > code will init
> > > > txq->tx_next_rs = 31 in function ixgbe_reset_tx_queue when tx
> > > > txq->queue
> > > setup.
> > > > And also txq->tx_next_rs will be update as 63, 95 and so on. But,
> > > > in the function ixgbe_dev_tx_descriptor_status(), the RS bit to
> > > > check is " desc = ((desc
> > > > + txq->tx_rs_thresh - 1) /
> > > > txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on.
> > > > So, they are all wrong! In tx function of ixgbe_xmit_pkts_simple,
> > > > the RS bit rule is also the same, it also set index 31 ,64, 95.
> > > > we need to correct it.
> > >
> > > One question:
> > > does only the descriptor with RS bit will have DD status, or NIC
> > > will always update all descriptor's DD status but this happens when
> > > the next descriptor with RS bit has been sent?
> > > If it is the first case, I think you fix still have problem, because
> > > multi-seg mbuf or tso offload will break the 31, 63, 95 pattern
> > > See:
> > > nb_used = (uint16_t)(tx_pkt-
> > > >nb_segs + new_ctx);
> > >
> > > if (txp != NULL &&
> > > nb_used + txq->nb_tx_used >=
> > txq->tx_rs_thresh)
> > > /* set RS on the previous packet in the burst */
> > > txp->read.cmd_type_len |=
> > >
> > rte_cpu_to_le_32(IXGBE_TXD_CMD_RS);
> > >
> > > so the possible solution is store each RS position in a list at tx,
> > > and find the next RS from the list in ixgbe_dev_tx_descriptor_status
> > >
> > > If it is the second case, it will be simple we don't need to check
> > > forward with tx_rs_thresh, just check the exact position ( I hope it
> > > is this case :))
> >
> > In this patch, code "desc = txq->sw_ring[desc].last_id;" will get the
> > last index for several segments packet, that solve the case when
> > packet contain more than one segment.
>
> Yes, but my understanding is we "set RS on the previous packet" but not the
> packet cross tx_rs_thresh boundary So even without multi-seg , it will be 30,
> 62, 94, but not 31, 63, 95, probably the reason we didn't see the issue, is
> because if we test it with 32 burst, the latest packet still will be set RS,
> so it
> will be 30,31, 62,63, 94, 95, but if we tested with 64 burst, I assume it
> will be
> 30, 62, 63, 94 ... right?
>
Update to last mail.
There are another RS bit set code, which set RS bit on last descriptor of the
threshold packet.
So, that is to say ixgbe_xmit_pkts() not only set 30 62 94, but also 31 63 95.
And it also set the last packet of the burst, so we do not need fix this
function, it is not bug.
/* Set RS bit only on threshold packets' last descriptor */
if (txq->nb_tx_used >= txq->tx_rs_thresh) {
PMD_TX_FREE_LOG(DEBUG,
"Setting RS bit on TXD id="
"%4u (port=%d queue=%d)",
tx_last, txq->port_id, txq->queue_id);
cmd_type_len |= IXGBE_TXD_CMD_RS;
/* Update txq RS bit counters */
txq->nb_tx_used = 0;
txp = NULL;
}
> >
> > >
> > > Regards
> > > Qi
> > > >
> > > > Fixes: a2919e13d95e ("net/ixgbe: implement descriptor status API")
> > > >
