RE: r283716 - [x86][inline-asm][clang] accept 'v' constraint
Thanks ,
We will check it.
From: Daniel Jasper [mailto:djas...@google.com]
Sent: Monday, October 10, 2016 14:50
To: Ismail Donmez
Cc: Zuckerman, Michael ; cfe-commits
Subject: Re: r283716 - [x86][inline-asm][clang] accept 'v' constraint
I have reverted this in r283743 for now.
On Mon, Oct 10, 2016 at 1:43 PM, Ismail Donmez via cfe-commits
mailto:cfe-commits@lists.llvm.org>> wrote:
Hi,
On Mon, Oct 10, 2016 at 8:45 AM, Michael Zuckerman via cfe-commits
mailto:cfe-commits@lists.llvm.org>> wrote:
> Author: mzuckerm
> Date: Mon Oct 10 00:45:54 2016
> New Revision: 283716
>
> URL: http://llvm.org/viewvc/llvm-project?rev=283716&view=rev
> Log:
> [x86][inline-asm][clang] accept 'v' constraint
>
> Commit in the name of: Coby Tayree
>
> 1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x'
> constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch
> & mode (32/64).
> 2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)
>
> This patch applies the needed changes to clang
> LLVM patch: https://reviews.llvm.org/D25005
>
> Differential Revision: D25004
This fails on Linux x86-64:
--
Exit Code: 1
Command Output (stderr):
--
/home/abuild/rpmbuild/BUILD/llvm/tools/clang/test/CodeGen/x86-inline-asm-v-constraint.c:10:9:
error: expected string not found in input
// SSE: call <4 x float> asm "vmovhlps $1, $2, $0",
"=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %0, <4 x float> %1)
^
:1:1: note: scanning from here
; ModuleID =
'/home/abuild/rpmbuild/BUILD/llvm/tools/clang/test/CodeGen/x86-inline-asm-v-constraint.c'
^
:14:7: note: possible intended match here
%3 = call <4 x float> asm "vmovhlps $1, $2, $0",
"=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %1, <4 x float> %2) #1,
!srcloc !1
^
--
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RE: r269680 - [Clang][AVX512] completing missing intrinsics for [vpabs] instruction set
Hi ,
Yes, I saw the thread.
We have an internal discussion on this subject.
Regards,
Michael Zuckerman
From: tha...@google.com [mailto:tha...@google.com] On Behalf Of Nico Weber
Sent: Monday, May 16, 2016 22:06
To: Zuckerman, Michael
Cc: cfe-commits
Subject: Re: r269680 - [Clang][AVX512] completing missing intrinsics for
[vpabs] instruction set
Hi Michael,
have you see then trhead "The intrinsics headers (especially avx512) are too
big. What to do about it?"? Can you maybe comment on it?
Thanks,
Nico
On Mon, May 16, 2016 at 2:57 PM, Michael Zuckerman via cfe-commits
mailto:cfe-commits@lists.llvm.org>> wrote:
Author: mzuckerm
Date: Mon May 16 13:57:24 2016
New Revision: 269680
URL: http://llvm.org/viewvc/llvm-project?rev=269680&view=rev
Log:
[Clang][AVX512] completing missing intrinsics for [vpabs] instruction set
Differential Revision: http://reviews.llvm.org/D20069
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=269680&r1=269679&r2=269680&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Mon May 16 13:57:24 2016
@@ -1631,6 +1631,23 @@ _mm512_abs_epi64(__m512i __A)
(__mmask8) -1);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_pabsq512_mask ((__v8di) __A,
+ (__v8di) __W,
+ (__mmask8) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_pabsq512_mask ((__v8di) __A,
+ (__v8di)
+ _mm512_setzero_si512 (),
+ (__mmask8) __U);
+}
+
static __inline __m512i __DEFAULT_FN_ATTRS
_mm512_abs_epi32(__m512i __A)
{
@@ -1640,6 +1657,23 @@ _mm512_abs_epi32(__m512i __A)
(__mmask16) -1);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_pabsd512_mask ((__v16si) __A,
+ (__v16si) __W,
+ (__mmask16) __U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)
+{
+ return (__m512i) __builtin_ia32_pabsd512_mask ((__v16si) __A,
+ (__v16si)
+ _mm512_setzero_si512 (),
+ (__mmask16) __U);
+}
+
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
return (__m128) __builtin_ia32_addss_round_mask ((__v4sf) __A,
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=269680&r1=269679&r2=269680&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Mon May 16 13:57:24 2016
@@ -6574,3 +6574,30 @@ __m512 test_mm512_set_ps (float __A, flo
__I, __J, __K, __L, __M, __N, __O, __P);
}
+__m512i test_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)
+{
+ // CHECK-LABEL: @test_mm512_mask_abs_epi64
+ // CHECK: @llvm.x86.avx512.mask.pabs.q.512
+ return _mm512_mask_abs_epi64 (__W,__U,__A);
+}
+
+__m512i test_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)
+{
+ // CHECK-LABEL: @test_mm512_maskz_abs_epi64
+ // CHECK: @llvm.x86.avx512.mask.pabs.q.512
+ return _mm512_maskz_abs_epi64 (__U,__A);
+}
+
+__m512i test_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
+{
+ // CHECK-LABEL: @test_mm512_mask_abs_epi32
+ // CHECK: @llvm.x86.avx512.mask.pabs.d.512
+ return _mm512_mask_abs_epi32 (__W,__U,__A);
+}
+
+__m512i test_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)
+{
+ // CHECK-LABEL: @test_mm512_maskz_abs_epi32
+ // CHECK: @llvm.x86.avx512.mask.pabs.d.512
+ return _mm512_maskz_abs_epi32 (__U,__A);
+}
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RE: r270047 - [Clang][AVX512][intrinsics] continue completing missing set intrinsics
No problem,
I will look at it.
Regards
Michael Zuckerman
-Original Message-
From: steve...@apple.com [mailto:steve...@apple.com]
Sent: Thursday, May 19, 2016 23:27
To: Zuckerman, Michael
Cc: cfe-commits@lists.llvm.org
Subject: Re: r270047 - [Clang][AVX512][intrinsics] continue completing missing
set intrinsics
Hi Michael
This commit seems break darwin LTO bootstrap bot.
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/7916/
Also breaks the Asan Ubsan bot:
http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1742/
Can you talk a look? I don't why the failure doesn't show up in other
configuration. Let me know if you need any help.
Thanks
Steven
> On May 19, 2016, at 5:07 AM, Michael Zuckerman via cfe-commits
> wrote:
>
> Author: mzuckerm
> Date: Thu May 19 07:07:49 2016
> New Revision: 270047
>
> URL: http://llvm.org/viewvc/llvm-project?rev=270047&view=rev
> Log:
> [Clang][AVX512][intrinsics] continue completing missing set intrinsics
>
> Differential Revision: http://reviews.llvm.org/D20160
>
>
> Modified:
>cfe/trunk/lib/Headers/avx512fintrin.h
>cfe/trunk/test/CodeGen/avx512f-builtins.c
>
> Modified: cfe/trunk/lib/Headers/avx512fintrin.h
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintri
> n.h?rev=270047&r1=270046&r2=270047&view=diff
> ==
>
> --- cfe/trunk/lib/Headers/avx512fintrin.h (original)
> +++ cfe/trunk/lib/Headers/avx512fintrin.h Thu May 19 07:07:49 2016
> @@ -8983,6 +8983,21 @@ _mm512_mask_set1_epi64 (__m512i __O, __m
> __M);
> }
>
> +static __inline __m512i __DEFAULT_FN_ATTRS
> +_mm512_set_epi32 (int __A, int __B, int __C, int __D,
> + int __E, int __F, int __G, int __H,
> + int __I, int __J, int __K, int __L,
> + int __M, int __N, int __O, int __P) {
> + return __extension__ (__m512i)(__v16si)
> + { __P, __O, __N, __M, __L, __K, __J, __I,
> +__H, __G, __F, __E, __D, __C, __B, __A }; }
> +
> +#define _mm512_setr_epi32(e0,e1,e2,e3,e4,e5,e6,e7, \
> + e8,e9,e10,e11,e12,e13,e14,e15) \
> +
> +_mm512_set_epi32(e15,e14,e13,e12,e11,e10,e9,e8,e7,e6,e5,e4,e3,e2,e1,e
> +0)
> +
> static __inline__ __m512i __DEFAULT_FN_ATTRS
> _mm512_set_epi64 (long long __A, long long __B, long long __C,
> long long __D, long long __E, long long __F, @@ -8992,6 +9007,9
> @@ _mm512_set_epi64 (long long __A, long lo
> { __H, __G, __F, __E, __D, __C, __B, __A }; }
>
> +#define _mm512_setr_epi64(e0,e1,e2,e3,e4,e5,e6,e7) \
> + _mm512_set_epi64(e7,e6,e5,e4,e3,e2,e1,e0)
> +
> static __inline__ __m512d __DEFAULT_FN_ATTRS _mm512_set_pd (double
> __A, double __B, double __C, double __D,
> double __E, double __F, double __G, double __H) @@ -9000,6
> +9018,9 @@ _mm512_set_pd (double __A, double __B, d
> { __H, __G, __F, __E, __D, __C, __B, __A }; }
>
> +#define _mm512_setr_pd(e0,e1,e2,e3,e4,e5,e6,e7) \
> + _mm512_set_pd(e7,e6,e5,e4,e3,e2,e1,e0)
> +
> static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_set_ps (float __A,
> float __B, float __C, float __D,
> float __E, float __F, float __G, float __H, @@ -9011,6 +9032,9
> @@ _mm512_set_ps (float __A, float __B, flo
> __H, __G, __F, __E, __D, __C, __B, __A }; }
>
> +#define
> +_mm512_setr_ps(e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,e14,e15)
> +\
> +
> +_mm512_set_ps(e15,e14,e13,e12,e11,e10,e9,e8,e7,e6,e5,e4,e3,e2,e1,e0)
> +
> #undef __DEFAULT_FN_ATTRS
>
> #endif // __AVX512FINTRIN_H
>
> Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-bui
> ltins.c?rev=270047&r1=270046&r2=270047&view=diff
> ==
>
> --- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
> +++ cfe/trunk/test/CodeGen/avx512f-builtins.c Thu May 19 07:07:49 2016
> @@ -6521,6 +6521,74 @@ __m512i test_mm512_mask_set1_epi32 (__m5
> return _mm512_mask_set1_epi32 ( __O, __M, __A); }
>
> +__m512i test_mm512_set_epi32 (int __A, int __B, int __C, int __D,
> + int __E, int __F, int __G, int __H,
> + int __I, int __J, int __K, int __L,
> + int __M, int __N, int __O, int __P) {
> + //CHECK-LABLE: @test_mm512_set_epi32
> + //CHECK: insertelement{{.*}}i32 0
> +//CHECK: insertelement{{.*}}i32 1
> +//CHECK: insertelement{{.*}}i32 2
> +//CHECK: insertelement{{.*}}i32 3
> +//CHECK: insertelement{{.*}}i32 4
> +//CHECK: insertelement{{.*}}i32 5
> +//CHECK: insertelement{{.*}}i32 6
> +//CHECK: insertelement{{.*}}i32 7
> +//CHECK: insertelement{{.*}}i32 8
> +//CHECK: insertelement{{.*}}i32 9
> +//CHECK: insertelement{{.*}}i32 10
> +//CHECK: insertelement{{.*}}i32 11
> +//CHECK: insertelement{{.*}}i32 12
> +//CHECK: insertelement{{.*}}i32 13
> +//CHECK: insertelement{{.*}}i32
