r342100 - [AArch64] Support reserving x1-7 registers.
Author: trong
Date: Wed Sep 12 16:45:04 2018
New Revision: 342100
URL: http://llvm.org/viewvc/llvm-project?rev=342100&view=rev
Log:
[AArch64] Support reserving x1-7 registers.
Summary: Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS
in Linux kernel. This change adds support for reserving registers x1 through x7.
Reviewers: javed.absar, efriedma, nickdesaulniers, srhines, phosek
Reviewed By: nickdesaulniers
Subscribers: manojgupta, jfb, cfe-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D48581
Added:
cfe/trunk/test/Driver/aarch64-fixed-x-register.c
Removed:
cfe/trunk/test/Driver/aarch64-fixed-x18.c
cfe/trunk/test/Driver/aarch64-fixed-x20.c
Modified:
cfe/trunk/docs/ClangCommandLineReference.rst
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp
Modified: cfe/trunk/docs/ClangCommandLineReference.rst
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ClangCommandLineReference.rst?rev=342100&r1=342099&r2=342100&view=diff
==
--- cfe/trunk/docs/ClangCommandLineReference.rst (original)
+++ cfe/trunk/docs/ClangCommandLineReference.rst Wed Sep 12 16:45:04 2018
@@ -2298,6 +2298,34 @@ The thread model to use, e.g. posix, sin
AARCH64
---
+.. option:: -ffixed-x1
+
+Reserve the x1 register (AArch64 only)
+
+.. option:: -ffixed-x2
+
+Reserve the x2 register (AArch64 only)
+
+.. option:: -ffixed-x3
+
+Reserve the x3 register (AArch64 only)
+
+.. option:: -ffixed-x4
+
+Reserve the x4 register (AArch64 only)
+
+.. option:: -ffixed-x5
+
+Reserve the x5 register (AArch64 only)
+
+.. option:: -ffixed-x6
+
+Reserve the x6 register (AArch64 only)
+
+.. option:: -ffixed-x7
+
+Reserve the x7 register (AArch64 only)
+
.. option:: -ffixed-x18
Reserve the x18 register (AArch64 only)
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=342100&r1=342099&r2=342100&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Wed Sep 12 16:45:04 2018
@@ -2050,10 +2050,9 @@ def mfix_cortex_a53_835769 : Flag<["-"],
def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
Group,
HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
-def ffixed_x18 : Flag<["-"], "ffixed-x18">, Group,
- HelpText<"Reserve the x18 register (AArch64 only)">;
-def ffixed_x20 : Flag<["-"], "ffixed-x20">, Group,
- HelpText<"Reserve the x20 register (AArch64 only)">;
+foreach i = {1-7,18,20} in
+ def ffixed_x#i : Flag<["-"], "ffixed-x"#i>, Group,
+HelpText<"Reserve the "#i#" register (AArch64 only)">;
def msign_return_address : Joined<["-"], "msign-return-address=">,
Flags<[CC1Option]>, Group,
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp?rev=342100&r1=342099&r2=342100&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp Wed Sep 12 16:45:04 2018
@@ -198,6 +198,27 @@ void aarch64::getAArch64TargetFeatures(c
if (A->getOption().matches(options::OPT_mno_unaligned_access))
Features.push_back("+strict-align");
+ if (Args.hasArg(options::OPT_ffixed_x1))
+Features.push_back("+reserve-x1");
+
+ if (Args.hasArg(options::OPT_ffixed_x2))
+Features.push_back("+reserve-x2");
+
+ if (Args.hasArg(options::OPT_ffixed_x3))
+Features.push_back("+reserve-x3");
+
+ if (Args.hasArg(options::OPT_ffixed_x4))
+Features.push_back("+reserve-x4");
+
+ if (Args.hasArg(options::OPT_ffixed_x5))
+Features.push_back("+reserve-x5");
+
+ if (Args.hasArg(options::OPT_ffixed_x6))
+Features.push_back("+reserve-x6");
+
+ if (Args.hasArg(options::OPT_ffixed_x7))
+Features.push_back("+reserve-x7");
+
if (Args.hasArg(options::OPT_ffixed_x18))
Features.push_back("+reserve-x18");
Added: cfe/trunk/test/Driver/aarch64-fixed-x-register.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/aarch64-fixed-x-register.c?rev=342100&view=auto
==
--- cfe/trunk/test/Driver/aarch64-fixed-x-register.c (added)
+++ cfe/trunk/test/Driver/aarch64-fixed-x-register.c Wed Sep 12 16:45:04 2018
@@ -0,0 +1,71 @@
+// RUN: %clang -target aarch64-none-gnu -ffixed-x1 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X1 < %t %s
+// CHECK-FIXED-X1: "-target-feature" "+reserve-x1"
+
+// RUN: %clang -target aarch64-none-gnu -ffixed-x2 -### %s 2> %t
+// RUN: FileCheck --check-prefix=CHECK-FIXED-X2 < %t %s
+// CHECK-FIXED-X2: "-target-feature" "+reserve-x2"
+
+
r342990 - [AArch64] Support adding X[8-15,18] registers as CSRs.
Author: trong
Date: Tue Sep 25 09:48:40 2018
New Revision: 342990
URL: http://llvm.org/viewvc/llvm-project?rev=342990&view=rev
Log:
[AArch64] Support adding X[8-15,18] registers as CSRs.
Summary:
Making X[8-15,18] registers call-saved is used to support
CONFIG_ARM64_LSE_ATOMICS in Linux kernel.
Signed-off-by: Tri Vo
Reviewers: srhines, nickdesaulniers, javed.absar
Reviewed By: nickdesaulniers
Subscribers: kristof.beyls, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D52399
Added:
cfe/trunk/test/Driver/aarch64-call-saved-x-register.c
cfe/trunk/test/Driver/aarch64-fixed-call-saved-x-register.c
Modified:
cfe/trunk/docs/ClangCommandLineReference.rst
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp
Modified: cfe/trunk/docs/ClangCommandLineReference.rst
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ClangCommandLineReference.rst?rev=342990&r1=342989&r2=342990&view=diff
==
--- cfe/trunk/docs/ClangCommandLineReference.rst (original)
+++ cfe/trunk/docs/ClangCommandLineReference.rst Tue Sep 25 09:48:40 2018
@@ -2334,6 +2334,42 @@ Reserve the x18 register (AArch64 only)
Reserve the x20 register (AArch64 only)
+.. option:: -fcall-saved-x8
+
+Make the x8 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x9
+
+Make the x9 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x10
+
+Make the x10 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x11
+
+Make the x11 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x12
+
+Make the x12 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x13
+
+Make the x13 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x14
+
+Make the x14 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x15
+
+Make the x15 register call-saved (AArch64 only)
+
+.. option:: -fcall-saved-x18
+
+Make the x18 register call-saved (AArch64 only)
+
.. option:: -mfix-cortex-a53-835769, -mno-fix-cortex-a53-835769
Workaround Cortex-A53 erratum 835769 (AArch64 only)
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=342990&r1=342989&r2=342990&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Tue Sep 25 09:48:40 2018
@@ -2054,6 +2054,10 @@ foreach i = {1-7,18,20} in
def ffixed_x#i : Flag<["-"], "ffixed-x"#i>, Group,
HelpText<"Reserve the "#i#" register (AArch64 only)">;
+foreach i = {8-15,18} in
+ def fcall_saved_x#i : Flag<["-"], "fcall-saved-x"#i>,
Group,
+HelpText<"Make the x"#i#" register call-saved (AArch64 only)">;
+
def msign_return_address : Joined<["-"], "msign-return-address=">,
Flags<[CC1Option]>, Group,
HelpText<"Select return address signing scope">, Values<"none,all,non-leaf">;
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp?rev=342990&r1=342989&r2=342990&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp Tue Sep 25 09:48:40 2018
@@ -251,6 +251,33 @@ fp16_fml_fallthrough:
if (Args.hasArg(options::OPT_ffixed_x20))
Features.push_back("+reserve-x20");
+ if (Args.hasArg(options::OPT_fcall_saved_x8))
+Features.push_back("+call-saved-x8");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x9))
+Features.push_back("+call-saved-x9");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x10))
+Features.push_back("+call-saved-x10");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x11))
+Features.push_back("+call-saved-x11");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x12))
+Features.push_back("+call-saved-x12");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x13))
+Features.push_back("+call-saved-x13");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x14))
+Features.push_back("+call-saved-x14");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x15))
+Features.push_back("+call-saved-x15");
+
+ if (Args.hasArg(options::OPT_fcall_saved_x18))
+Features.push_back("+call-saved-x18");
+
if (Args.hasArg(options::OPT_mno_neg_immediates))
Features.push_back("+no-neg-immediates");
}
Added: cfe/trunk/test/Driver/aarch64-call-saved-x-register.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/aarch64-call-saved-x-register.c?rev=342990&view=auto
==
--- cfe/trunk/test/Driver/aarch64-call-saved-x-register.c (added)
+++ cfe/trunk/test/Driver/aarch64-call-saved-x-register.c Tue Sep 25 09:48:40
2018
@@ -0,0 +1,58 @@
+// RUN: %clang
