[PATCH] D42978: Make march/target-cpu print a note with the list of valid values for ARM

2018-03-15 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 added a comment.

@erichkeane Could you please tell me why this was done only for -cc1 and if 
there is any plan to add this to the driver in general ?


Repository:
  rL LLVM

https://reviews.llvm.org/D42978



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[PATCH] D65000: [ARM] Set default alignment to 64bits

2019-07-26 Thread Simi Pallipurath via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL367119: [ARM] Set default alignment to 64bits (authored by 
simpal01, committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65000/new/

https://reviews.llvm.org/D65000

Files:
  cfe/trunk/lib/Basic/Targets/ARM.cpp
  cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp
  cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp


Index: cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
===
--- cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
+++ cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
@@ -2,11 +2,12 @@
 // RUN: %clang_cc1 -triple arm64-apple-ios10 -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple arm64-apple-tvos10 -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple arm64-apple-watchos4 -verify -fsyntax-only 
-std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
+// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions  -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple x86_64-apple-macosx10.14 -verify -fsyntax-only 
-std=c++11 -fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple arm64-apple-ios12 -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple arm64-apple-tvos12 -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple arm64-apple-watchos5 -verify -fsyntax-only 
-std=c++11 -fcxx-exceptions -fexceptions %s
-// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions %s
+// RUN: %clang_cc1 -triple arm-linux-androideabi -verify -fsyntax-only 
-std=c++11 -fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple aarch64-linux-gnueabi -verify -fsyntax-only 
-std=c++11 -fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple mipsel-linux-gnu -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple mips64el-linux-gnu -verify -fsyntax-only -std=c++11 
-fcxx-exceptions -fexceptions %s
Index: cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp
===
--- cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp
+++ cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp
@@ -0,0 +1,19 @@
+// Bug: https://bugs.llvm.org/show_bug.cgi?id=42668
+// REQUIRES: arm-registered-target
+// RUN: %clang --target=arm-arm-none-eabi -march=armv8-a -S -emit-llvm -Os -o 
- %s | FileCheck --check-prefixes=CHECK,A8 %s
+// RUN: %clang --target=arm-linux-androideabi -march=armv8-a -S -emit-llvm -Os 
-o - %s | FileCheck --check-prefixes=CHECK,A16 %s
+// CHECK: [[E:%[A-z0-9]+]] = tail call i8* @__cxa_allocate_exception
+// CHECK-NEXT: [[BC:%[A-z0-9]+]] = bitcast i8* [[E]] to <2 x i64>*
+// A8-NEXT: store <2 x i64> , <2 x i64>* [[BC]], align 8
+// A16-NEXT: store <2 x i64> , <2 x i64>* [[BC]], align 16
+#include 
+
+int main(void) {
+  try {
+throw vld1q_u64(((const uint64_t[2]){1, 2}));
+  } catch (uint64x2_t exc) {
+return 0;
+  }
+  return 1;
+}
+
Index: cfe/trunk/lib/Basic/Targets/ARM.cpp
===
--- cfe/trunk/lib/Basic/Targets/ARM.cpp
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp
@@ -309,8 +309,9 @@
   setAtomic();
 
   // Maximum alignment for ARM NEON data types should be 64-bits (AAPCS)
+  // as well the default alignment
   if (IsAAPCS && (Triple.getEnvironment() != llvm::Triple::Android))
-MaxVectorAlign = 64;
+DefaultAlignForAttributeAligned = MaxVectorAlign = 64;
 
   // Do force alignment of members that follow zero length bitfields.  If
   // the alignment of the zero-length bitfield is greater than the member


Index: cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
===
--- cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
+++ cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp
@@ -2,11 +2,12 @@
 // RUN: %clang_cc1 -triple arm64-apple-ios10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple arm64-apple-tvos10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple arm64-apple-watchos4 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
+// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions  -DUNDERALIGNED %s
 // RUN: %clang_cc1 -triple x86_64-apple-macosx10.14 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
 // RUN: %clang_cc1 -triple arm64-apple-ios12 -verify -fsyntax-only -std=c++11 -fc

[PATCH] D136957: [AArch64] Add support for the Cortex-A715 CPU

2022-10-28 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 created this revision.
simpal01 added reviewers: vhscampos, dmgreen, stuij.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
simpal01 requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Cortex-A715 is an Armv9-A AArch64 CPU.

This patch introduces support for Cortex-A715.

Technical Reference Manual: 
https://developer.arm.com/documentation/101590/latest.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136957

Files:
  clang/docs/ReleaseNotes.rst
  clang/test/Driver/aarch64-mcpu.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/lib/Support/Host.cpp
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1016,6 +1016,19 @@
  AArch64::AEK_FLAGM | AArch64::AEK_SB |
  AArch64::AEK_I8MM | AArch64::AEK_BF16,
  "9-A"),
+ARMCPUTestParams("cortex-a715", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_MTE | AArch64::AEK_PAUTH |
+ AArch64::AEK_SVE | AArch64::AEK_SVE2 |
+ AArch64::AEK_SVE2BITPERM | AArch64::AEK_SSBS |
+ AArch64::AEK_SB | AArch64::AEK_I8MM |
+ AArch64::AEK_PERFMON | AArch64::AEK_PREDRES |
+ AArch64::AEK_PROFILE | AArch64::AEK_FP16FML |
+ AArch64::AEK_FP16 | AArch64::AEK_FLAGM,
+ "9-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1296,7 +1309,7 @@
  "8.2-A")));
 
 // Note: number of CPUs includes aliases.
-static constexpr unsigned NumAArch64CPUArchs = 59;
+static constexpr unsigned NumAArch64CPUArchs = 60;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -64,6 +64,7 @@
 CortexA78,
 CortexA78C,
 CortexA710,
+CortexA715,
 CortexR82,
 CortexX1,
 CortexX1C,
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -142,6 +142,7 @@
 MaxBytesForLoopAlignment = 8;
 break;
   case CortexA710:
+  case CortexA715:
   case CortexX2:
 PrefFunctionLogAlignment = 4;
 VScaleForTuning = 1;
Index: llvm/lib/Target/AArch64/AArch64.td
===
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -764,6 +764,12 @@
FeatureLSLFast,
FeaturePostRAScheduler]>;
 
+def TuneA715 : SubtargetFeature<"a715", "ARMProcFamily", "CortexA715",
+ "Cortex-A715 ARM processors", [
+ FeatureFuseAES,
+ FeaturePostRAScheduler,
+ FeatureCmpBccFusion]>;
+
 def TuneR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
"CortexR82",
"Cortex-R82 ARM processors", [
@@ -1093,6 +1099,10 @@
   list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
  FeatureETE, FeatureMTE, FeatureFP16FML,
  FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8];
+  list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE,
+ FeatureFP16FML, FeatureSVE, FeatureTRBE,
+ FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
+ FeaturePerfMon, FeatureMatMulInt8, FeatureSPE];
   list R82  = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
  FeatureFP16FML, FeatureSSBS, FeaturePredRes,
  FeatureSB];
@@ -1231,6 +1241,8 @@

[PATCH] D136957: [AArch64] Add support for the Cortex-A715 CPU

2022-10-31 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 471991.
simpal01 added a comment.

Comments Addressed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136957/new/

https://reviews.llvm.org/D136957

Files:
  clang/docs/ReleaseNotes.rst
  clang/test/Driver/aarch64-mcpu.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/lib/Support/Host.cpp
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1016,6 +1016,19 @@
  AArch64::AEK_FLAGM | AArch64::AEK_SB |
  AArch64::AEK_I8MM | AArch64::AEK_BF16,
  "9-A"),
+ARMCPUTestParams("cortex-a715", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_MTE | AArch64::AEK_PAUTH |
+ AArch64::AEK_SVE | AArch64::AEK_SVE2 |
+ AArch64::AEK_SVE2BITPERM | AArch64::AEK_SSBS |
+ AArch64::AEK_SB | AArch64::AEK_I8MM |
+ AArch64::AEK_PERFMON | AArch64::AEK_PREDRES |
+ AArch64::AEK_PROFILE | AArch64::AEK_FP16FML |
+ AArch64::AEK_FP16 | AArch64::AEK_FLAGM,
+ "9-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1296,7 +1309,7 @@
  "8.2-A")));
 
 // Note: number of CPUs includes aliases.
-static constexpr unsigned NumAArch64CPUArchs = 59;
+static constexpr unsigned NumAArch64CPUArchs = 60;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -64,6 +64,7 @@
 CortexA78,
 CortexA78C,
 CortexA710,
+CortexA715,
 CortexR82,
 CortexX1,
 CortexX1C,
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -142,6 +142,7 @@
 MaxBytesForLoopAlignment = 8;
 break;
   case CortexA710:
+  case CortexA715:
   case CortexX2:
 PrefFunctionLogAlignment = 4;
 VScaleForTuning = 1;
Index: llvm/lib/Target/AArch64/AArch64.td
===
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -764,6 +764,14 @@
FeatureLSLFast,
FeaturePostRAScheduler]>;
 
+def TuneA715 : SubtargetFeature<"a715", "ARMProcFamily", "CortexA715",
+ "Cortex-A715 ARM processors", [
+ FeatureFuseAES,
+ FeaturePostRAScheduler,
+ FeatureCmpBccFusion,
+ FeatureLSLFast,
+ FeatureFuseAdrpAdd]>;
+
 def TuneR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
"CortexR82",
"Cortex-R82 ARM processors", [
@@ -1093,6 +1101,10 @@
   list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
  FeatureETE, FeatureMTE, FeatureFP16FML,
  FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8];
+  list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE,
+ FeatureFP16FML, FeatureSVE, FeatureTRBE,
+ FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
+ FeaturePerfMon, FeatureMatMulInt8, FeatureSPE];
   list R82  = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
  FeatureFP16FML, FeatureSSBS, FeaturePredRes,
  FeatureSB];
@@ -1231,6 +1243,8 @@
  [TuneA78C]>;
 def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
  [TuneA710]>;
+def : ProcessorModel<"cortex-a715", NeoverseN2Model, Processor

[PATCH] D136957: [AArch64] Add support for the Cortex-A715 CPU

2022-11-02 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 472560.
simpal01 marked 2 inline comments as done.
simpal01 added a comment.

Comments addressed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136957/new/

https://reviews.llvm.org/D136957

Files:
  clang/docs/ReleaseNotes.rst
  clang/test/Driver/aarch64-mcpu.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/lib/Support/Host.cpp
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1016,6 +1016,19 @@
  AArch64::AEK_FLAGM | AArch64::AEK_SB |
  AArch64::AEK_I8MM | AArch64::AEK_BF16,
  "9-A"),
+ARMCPUTestParams("cortex-a715", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_MTE | AArch64::AEK_PAUTH |
+ AArch64::AEK_SVE | AArch64::AEK_SVE2 |
+ AArch64::AEK_SVE2BITPERM | AArch64::AEK_SSBS |
+ AArch64::AEK_SB | AArch64::AEK_I8MM |
+ AArch64::AEK_PERFMON | AArch64::AEK_PREDRES |
+ AArch64::AEK_PROFILE | AArch64::AEK_FP16FML |
+ AArch64::AEK_FP16 | AArch64::AEK_FLAGM,
+ "9-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1296,7 +1309,7 @@
  "8.2-A")));
 
 // Note: number of CPUs includes aliases.
-static constexpr unsigned NumAArch64CPUArchs = 59;
+static constexpr unsigned NumAArch64CPUArchs = 60;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -64,6 +64,7 @@
 CortexA78,
 CortexA78C,
 CortexA710,
+CortexA715,
 CortexR82,
 CortexX1,
 CortexX1C,
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -142,6 +142,7 @@
 MaxBytesForLoopAlignment = 8;
 break;
   case CortexA710:
+  case CortexA715:
   case CortexX2:
 PrefFunctionLogAlignment = 4;
 VScaleForTuning = 1;
Index: llvm/lib/Target/AArch64/AArch64.td
===
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -764,6 +764,14 @@
FeatureLSLFast,
FeaturePostRAScheduler]>;
 
+def TuneA715 : SubtargetFeature<"a715", "ARMProcFamily", "CortexA715",
+ "Cortex-A715 ARM processors", [
+ FeatureFuseAES,
+ FeaturePostRAScheduler,
+ FeatureCmpBccFusion,
+ FeatureLSLFast,
+ FeatureFuseAdrpAdd]>;
+
 def TuneR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
"CortexR82",
"Cortex-R82 ARM processors", [
@@ -1093,6 +1101,10 @@
   list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
  FeatureETE, FeatureMTE, FeatureFP16FML,
  FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8];
+  list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE,
+ FeatureFP16FML, FeatureSVE, FeatureTRBE,
+ FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
+ FeaturePerfMon, FeatureMatMulInt8, FeatureSPE];
   list R82  = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
  FeatureFP16FML, FeatureSSBS, FeaturePredRes,
  FeatureSB];
@@ -1231,6 +1243,8 @@
  [TuneA78C]>;
 def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
  [TuneA710]>;
+def : ProcessorMode

[PATCH] D136957: [AArch64] Add support for the Cortex-A715 CPU

2022-11-03 Thread Simi Pallipurath via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGfa8aeab606c1: [AArch64] Add support for the Cortex-A715 CPU 
(authored by simpal01).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136957/new/

https://reviews.llvm.org/D136957

Files:
  clang/docs/ReleaseNotes.rst
  clang/test/Driver/aarch64-mcpu.c
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/lib/Support/Host.cpp
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1016,6 +1016,19 @@
  AArch64::AEK_FLAGM | AArch64::AEK_SB |
  AArch64::AEK_I8MM | AArch64::AEK_BF16,
  "9-A"),
+ARMCPUTestParams("cortex-a715", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_MTE | AArch64::AEK_PAUTH |
+ AArch64::AEK_SVE | AArch64::AEK_SVE2 |
+ AArch64::AEK_SVE2BITPERM | AArch64::AEK_SSBS |
+ AArch64::AEK_SB | AArch64::AEK_I8MM |
+ AArch64::AEK_PERFMON | AArch64::AEK_PREDRES |
+ AArch64::AEK_PROFILE | AArch64::AEK_FP16FML |
+ AArch64::AEK_FP16 | AArch64::AEK_FLAGM,
+ "9-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1296,7 +1309,7 @@
  "8.2-A")));
 
 // Note: number of CPUs includes aliases.
-static constexpr unsigned NumAArch64CPUArchs = 59;
+static constexpr unsigned NumAArch64CPUArchs = 60;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -64,6 +64,7 @@
 CortexA78,
 CortexA78C,
 CortexA710,
+CortexA715,
 CortexR82,
 CortexX1,
 CortexX1C,
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -142,6 +142,7 @@
 MaxBytesForLoopAlignment = 8;
 break;
   case CortexA710:
+  case CortexA715:
   case CortexX2:
 PrefFunctionLogAlignment = 4;
 VScaleForTuning = 1;
Index: llvm/lib/Target/AArch64/AArch64.td
===
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -764,6 +764,14 @@
FeatureLSLFast,
FeaturePostRAScheduler]>;
 
+def TuneA715 : SubtargetFeature<"a715", "ARMProcFamily", "CortexA715",
+ "Cortex-A715 ARM processors", [
+ FeatureFuseAES,
+ FeaturePostRAScheduler,
+ FeatureCmpBccFusion,
+ FeatureLSLFast,
+ FeatureFuseAdrpAdd]>;
+
 def TuneR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
"CortexR82",
"Cortex-R82 ARM processors", [
@@ -1093,6 +1101,10 @@
   list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
  FeatureETE, FeatureMTE, FeatureFP16FML,
  FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8];
+  list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE,
+ FeatureFP16FML, FeatureSVE, FeatureTRBE,
+ FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
+ FeaturePerfMon, FeatureMatMulInt8, FeatureSPE];
   list R82  = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
  FeatureFP16FML, FeatureSSBS, FeaturePredRes,
  FeatureSB];
@@ -1231,6 +1243,8 @@
  [TuneA78C]>;
 def : ProcessorModel<"cortex-a710",

[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-18 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 added a comment.

@MaskRay

[Gentle Reminder] I have implemented the requested changes. Could you please 
have a look again. Thanks.


Repository:
  rG LLVM Github Monorepo

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[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-18 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 541522.
simpal01 added a comment.

isArmBigEndian -> isARMBigEndian


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154786/new/

https://reviews.llvm.org/D154786

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp

Index: clang/test/Driver/baremetal.cpp
===
--- clang/test/Driver/baremetal.cpp
+++ clang/test/Driver/baremetal.cpp
@@ -15,7 +15,7 @@
 // CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
 // CHECK-V6M-C-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-V6M-C-SAME: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
@@ -34,7 +34,7 @@
 // CHECK-ARMV7M-PER-TARGET: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-ARMV7M-PER-TARGET: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-ARMV7M-PER-TARGET: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-ARMV7M-PER-TARGET: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-ARMV7M-PER-TARGET: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}armv7m-vendor-none-eabi
 // CHECK-ARMV7M-PER-TARGET: "-lc" "-lm" "-lclang_rt.builtins"
@@ -42,7 +42,7 @@
 // RUN: %clangxx %s -### --target=armv6m-none-eabi 2>&1 \
 // RUN: --sysroot=%S/Inputs/baremetal_arm | FileCheck --check-prefix=CHECK-V6M-DEFAULTCXX %s
 // CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -53,7 +53,7 @@
 // CHECK-V6M-LIBCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}{{[^v].*}}"
 // CHECK-V6M-LIBCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -66,7 +66,7 @@
 // CHECK-V6M-LIBSTDCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBSTDCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECK-V6M-LIBSTDCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}6.0.0"
-// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBSTDCXX-SAME: "-lstdc++" "-lsupc++" "-lunwind"
@@ -77,7 +77,7 @@
 // RUN: -nodefaultlibs \
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-NDL %s
 // CHECK-V6M-NDL: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-NDL-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-NDL-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 
@@ -117,6 +117,46 @@
 // RUN:   | FileCheck %s --check-prefix=CHECK-SYSROOT-INC
 // CHECK-SYSROOT-INC-NOT: "-internal-isystem" "include"
 
+// RUN: %clang -### %s --target=armebv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+// CHECK-ARMV7EB: "{{.*}}ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "--be8" "-EB"
+
+// RUN: %clang -### %s --target=armv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armebv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   |

[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-19 Thread Simi Pallipurath via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc1873d84a331: [Clang][Driver] Pass through the --be8 endian 
flag to linker in BareMetal… (authored by simpal01).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154786/new/

https://reviews.llvm.org/D154786

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp

Index: clang/test/Driver/baremetal.cpp
===
--- clang/test/Driver/baremetal.cpp
+++ clang/test/Driver/baremetal.cpp
@@ -15,7 +15,7 @@
 // CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
 // CHECK-V6M-C-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-V6M-C-SAME: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
@@ -34,7 +34,7 @@
 // CHECK-ARMV7M-PER-TARGET: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-ARMV7M-PER-TARGET: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-ARMV7M-PER-TARGET: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-ARMV7M-PER-TARGET: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-ARMV7M-PER-TARGET: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}armv7m-vendor-none-eabi
 // CHECK-ARMV7M-PER-TARGET: "-lc" "-lm" "-lclang_rt.builtins"
@@ -42,7 +42,7 @@
 // RUN: %clangxx %s -### --target=armv6m-none-eabi 2>&1 \
 // RUN: --sysroot=%S/Inputs/baremetal_arm | FileCheck --check-prefix=CHECK-V6M-DEFAULTCXX %s
 // CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -53,7 +53,7 @@
 // CHECK-V6M-LIBCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}{{[^v].*}}"
 // CHECK-V6M-LIBCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -66,7 +66,7 @@
 // CHECK-V6M-LIBSTDCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBSTDCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECK-V6M-LIBSTDCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}6.0.0"
-// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBSTDCXX-SAME: "-lstdc++" "-lsupc++" "-lunwind"
@@ -77,7 +77,7 @@
 // RUN: -nodefaultlibs \
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-NDL %s
 // CHECK-V6M-NDL: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-NDL-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-NDL-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 
@@ -117,6 +117,46 @@
 // RUN:   | FileCheck %s --check-prefix=CHECK-SYSROOT-INC
 // CHECK-SYSROOT-INC-NOT: "-internal-isystem" "include"
 
+// RUN: %clang -### %s --target=armebv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+// CHECK-ARMV7EB: "{{.*}}ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "--be8" "-EB"
+
+// RUN: %clang -### %s --target=armv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armebv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+//

[PATCH] D155808: [clang][driver] Missing the condition in ISARMBigEndain function.

2023-07-20 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 created this revision.
Herald added a subscriber: kristof.beyls.
Herald added a project: All.
simpal01 requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

IsARMBIgEndian function returns true only if:

1. The triples are either arm or thumb and the commandline has the  option 
-mbig-endian
2. The triples are either armeb or thumbeb.

Missing the checking of arm or thumb triples in the
first case pass through the --be8 endian flag to
linker For AArch64 as well which is not expected.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D155808

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp


Index: clang/lib/Driver/ToolChains/Arch/ARM.cpp
===
--- clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -37,9 +37,12 @@
 // '-mbig-endian'/'-EB'. Unlike other targets the flag does not result in a
 // normalized triple so we must handle the flag here.
 bool arm::isARMBigEndian(const llvm::Triple &Triple, const ArgList &Args) {
-  if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
-   options::OPT_mbig_endian)) {
-return !A->getOption().matches(options::OPT_mlittle_endian);
+  if ((Triple.getArch() == llvm::Triple::arm ||
+   Triple.getArch() == llvm::Triple::thumb)) {
+if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
+ options::OPT_mbig_endian)) {
+  return !A->getOption().matches(options::OPT_mlittle_endian);
+}
   }
 
   return Triple.getArch() == llvm::Triple::armeb ||


Index: clang/lib/Driver/ToolChains/Arch/ARM.cpp
===
--- clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -37,9 +37,12 @@
 // '-mbig-endian'/'-EB'. Unlike other targets the flag does not result in a
 // normalized triple so we must handle the flag here.
 bool arm::isARMBigEndian(const llvm::Triple &Triple, const ArgList &Args) {
-  if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
-   options::OPT_mbig_endian)) {
-return !A->getOption().matches(options::OPT_mlittle_endian);
+  if ((Triple.getArch() == llvm::Triple::arm ||
+   Triple.getArch() == llvm::Triple::thumb)) {
+if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian,
+ options::OPT_mbig_endian)) {
+  return !A->getOption().matches(options::OPT_mlittle_endian);
+}
   }
 
   return Triple.getArch() == llvm::Triple::armeb ||
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[PATCH] D155808: [clang][driver] Missing the condition in IsARMBigEndain function.

2023-07-24 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 543484.
simpal01 added a comment.

Addressing review comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155808/new/

https://reviews.llvm.org/D155808

Files:
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp


Index: clang/lib/Driver/ToolChains/Gnu.cpp
===
--- clang/lib/Driver/ToolChains/Gnu.cpp
+++ clang/lib/Driver/ToolChains/Gnu.cpp
@@ -424,12 +424,13 @@
   if (Args.hasArg(options::OPT_s))
 CmdArgs.push_back("-s");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   // Most Android ARM64 targets should enable the linker fix for erratum
Index: clang/lib/Driver/ToolChains/BareMetal.cpp
===
--- clang/lib/Driver/ToolChains/BareMetal.cpp
+++ clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,12 +443,13 @@
 
   CmdArgs.push_back("-Bstatic");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   Args.AddAllArgs(CmdArgs,


Index: clang/lib/Driver/ToolChains/Gnu.cpp
===
--- clang/lib/Driver/ToolChains/Gnu.cpp
+++ clang/lib/Driver/ToolChains/Gnu.cpp
@@ -424,12 +424,13 @@
   if (Args.hasArg(options::OPT_s))
 CmdArgs.push_back("-s");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   // Most Android ARM64 targets should enable the linker fix for erratum
Index: clang/lib/Driver/ToolChains/BareMetal.cpp
===
--- clang/lib/Driver/ToolChains/BareMetal.cpp
+++ clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,12 +443,13 @@
 
   CmdArgs.push_back("-Bstatic");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   Args.AddAllArgs(CmdArgs,
___
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[PATCH] D155808: [clang][driver][NFC] Call IsARMBigEndain function only for isARM and isThumb.

2023-07-24 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 added a comment.

In D155808#4528543 , @MaskRay wrote:

> Add NFC if this is NFC?

Done


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155808/new/

https://reviews.llvm.org/D155808

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[PATCH] D155808: [clang][driver][NFC] Call IsARMBigEndain function only for isARM and isThumb.

2023-07-25 Thread Simi Pallipurath via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9dcd232f4afa: [clang][driver][NFC] Call IsARMBigEndain 
function only for isARM and isThumb. (authored by simpal01).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155808/new/

https://reviews.llvm.org/D155808

Files:
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp


Index: clang/lib/Driver/ToolChains/Gnu.cpp
===
--- clang/lib/Driver/ToolChains/Gnu.cpp
+++ clang/lib/Driver/ToolChains/Gnu.cpp
@@ -424,12 +424,13 @@
   if (Args.hasArg(options::OPT_s))
 CmdArgs.push_back("-s");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   // Most Android ARM64 targets should enable the linker fix for erratum
Index: clang/lib/Driver/ToolChains/BareMetal.cpp
===
--- clang/lib/Driver/ToolChains/BareMetal.cpp
+++ clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,12 +443,13 @@
 
   CmdArgs.push_back("-Bstatic");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   Args.AddAllArgs(CmdArgs,


Index: clang/lib/Driver/ToolChains/Gnu.cpp
===
--- clang/lib/Driver/ToolChains/Gnu.cpp
+++ clang/lib/Driver/ToolChains/Gnu.cpp
@@ -424,12 +424,13 @@
   if (Args.hasArg(options::OPT_s))
 CmdArgs.push_back("-s");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   // Most Android ARM64 targets should enable the linker fix for erratum
Index: clang/lib/Driver/ToolChains/BareMetal.cpp
===
--- clang/lib/Driver/ToolChains/BareMetal.cpp
+++ clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -443,12 +443,13 @@
 
   CmdArgs.push_back("-Bstatic");
 
-  if (Triple.isARM() || Triple.isThumb() || Triple.isAArch64()) {
+  if (Triple.isARM() || Triple.isThumb()) {
 bool IsBigEndian = arm::isARMBigEndian(Triple, Args);
 if (IsBigEndian)
   arm::appendBE8LinkFlag(Args, CmdArgs, Triple);
-IsBigEndian = IsBigEndian || Arch == llvm::Triple::aarch64_be;
 CmdArgs.push_back(IsBigEndian ? "-EB" : "-EL");
+  } else if (Triple.isAArch64()) {
+CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
   }
 
   Args.AddAllArgs(CmdArgs,
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[PATCH] D156427: [clang] Improve hermeticity of clang header tests.

2023-07-27 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 created this revision.
Herald added a project: All.
simpal01 requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Specifying --sysroot prevents these header tests

  from  being located in standard library directories.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156427

Files:
  clang/test/Headers/arm-fp16-header.c
  clang/test/Headers/arm-neon-header.c


Index: clang/test/Headers/arm-neon-header.c
===
--- clang/test/Headers/arm-neon-header.c
+++ clang/test/Headers/arm-neon-header.c
@@ -2,27 +2,27 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -flax-vector-conversions=none -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
-// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c89 --sysroot=%S/Inputs 
-xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c99 --sysroot=%S/Inputs 
-xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c11 --sysroot=%S/Inputs 
-xc %s
 
-// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c89 -xc 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c99 -xc 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c11 -xc 
--sysroot=%S/Inputs %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ 
--sysroot=%S/Inputs %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ 
--sysroot=%S/Inputs %s

[PATCH] D156427: [clang] Improve hermeticity of clang header tests.

2023-07-31 Thread Simi Pallipurath via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3f75d38a4d4d: [clang] Improve hermeticity of clang header 
tests. (authored by simpal01).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156427/new/

https://reviews.llvm.org/D156427

Files:
  clang/test/Headers/arm-fp16-header.c
  clang/test/Headers/arm-neon-header.c


Index: clang/test/Headers/arm-neon-header.c
===
--- clang/test/Headers/arm-neon-header.c
+++ clang/test/Headers/arm-neon-header.c
@@ -2,27 +2,27 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -flax-vector-conversions=none -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
-// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c89 --sysroot=%S/Inputs 
-xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c99 --sysroot=%S/Inputs 
-xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c11 --sysroot=%S/Inputs 
-xc %s
 
-// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c89 -xc 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c99 -xc 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c11 -xc 
--sysroot=%S/Inputs %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ 
--sysroot=%S/Inputs %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++98 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++11 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++14 -xc++ 
--sysroot=%S/Inputs %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding -nostdinc++ 
--target=aarch64_be-none-elf -march=armv8.2-a+fp16 -std=c++17 -xc++ 
-

[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-09 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 created this revision.
Herald added subscribers: abidh, kristof.beyls.
Herald added a project: All.
simpal01 requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

When linking a big-endian image for Arm, clang has
to select  between BE8 and BE32 formats. The default
is dependent on the selected target architecture.
For ARMv6 and later architectures the default is
BE8, for older architectures the default is BE32.
For BE8 and BE32, compiler outputs a big endian ELF
relocatable object file with the instructions and
data both big endian. The difference is that at
link time, for BE8 a linker must endian reverse
the instructions to little endian. For BE8, the
clang has to pass --be8 to the linker for Arm.

At the moment clang is not passing the --be8 flag
to linker for the baremetal target architectures
above ArmV6 for Arm. This patch passes through --be8
and -BE or EL to the linker, taking into account the
target and the -mbig-endian and -mlittle-endian flag.
Also there are few more changes in the baremetal
driver so that the code can cope with AArch64 being
big-endian as well.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154786

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp

Index: clang/test/Driver/baremetal.cpp
===
--- clang/test/Driver/baremetal.cpp
+++ clang/test/Driver/baremetal.cpp
@@ -15,7 +15,7 @@
 // CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
 // CHECK-V6M-C-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-V6M-C-SAME: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
@@ -34,7 +34,7 @@
 // CHECK-ARMV7M-PER-TARGET: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-ARMV7M-PER-TARGET: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-ARMV7M-PER-TARGET: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-ARMV7M-PER-TARGET: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-ARMV7M-PER-TARGET: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}armv7m-vendor-none-eabi
 // CHECK-ARMV7M-PER-TARGET: "-lc" "-lm" "-lclang_rt.builtins"
@@ -42,7 +42,7 @@
 // RUN: %clangxx %s -### --target=armv6m-none-eabi 2>&1 \
 // RUN: --sysroot=%S/Inputs/baremetal_arm | FileCheck --check-prefix=CHECK-V6M-DEFAULTCXX %s
 // CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -53,7 +53,7 @@
 // CHECK-V6M-LIBCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}{{[^v].*}}"
 // CHECK-V6M-LIBCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -66,7 +66,7 @@
 // CHECK-V6M-LIBSTDCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBSTDCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECK-V6M-LIBSTDCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}6.0.0"
-// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBSTDCXX-SAME: "-lstdc++" "-lsupc++" "-lunwind"
@@ -77,7 +77,7 @@
 // RUN: -nodefaultlibs \
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-NDL %s
 // CHECK-V6M-NDL: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-NDL: ld{{(.exe)?}}" "

[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-11 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 539031.
simpal01 added a comment.

Addressing Review comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154786/new/

https://reviews.llvm.org/D154786

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp

Index: clang/test/Driver/baremetal.cpp
===
--- clang/test/Driver/baremetal.cpp
+++ clang/test/Driver/baremetal.cpp
@@ -15,7 +15,7 @@
 // CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
 // CHECK-V6M-C-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-V6M-C-SAME: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
@@ -34,7 +34,7 @@
 // CHECK-ARMV7M-PER-TARGET: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-ARMV7M-PER-TARGET: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-ARMV7M-PER-TARGET: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-ARMV7M-PER-TARGET: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-ARMV7M-PER-TARGET: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}armv7m-vendor-none-eabi
 // CHECK-ARMV7M-PER-TARGET: "-lc" "-lm" "-lclang_rt.builtins"
@@ -42,7 +42,7 @@
 // RUN: %clangxx %s -### --target=armv6m-none-eabi 2>&1 \
 // RUN: --sysroot=%S/Inputs/baremetal_arm | FileCheck --check-prefix=CHECK-V6M-DEFAULTCXX %s
 // CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -53,7 +53,7 @@
 // CHECK-V6M-LIBCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}{{[^v].*}}"
 // CHECK-V6M-LIBCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -66,7 +66,7 @@
 // CHECK-V6M-LIBSTDCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBSTDCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECK-V6M-LIBSTDCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}6.0.0"
-// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBSTDCXX-SAME: "-lstdc++" "-lsupc++" "-lunwind"
@@ -77,7 +77,7 @@
 // RUN: -nodefaultlibs \
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-NDL %s
 // CHECK-V6M-NDL: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-NDL-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-NDL-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 
@@ -117,6 +117,46 @@
 // RUN:   | FileCheck %s --check-prefix=CHECK-SYSROOT-INC
 // CHECK-SYSROOT-INC-NOT: "-internal-isystem" "include"
 
+// RUN: %clang -### %s --target=armebv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+// CHECK-ARMV7EB: "{{.*}}ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "--be8" "-EB"
+
+// RUN: %clang -### %s --target=armv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armebv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileC

[PATCH] D154786: [Clang][Driver] Pass through the --be8 endian flag to linker in BareMetal driver For Arm.

2023-07-12 Thread Simi Pallipurath via Phabricator via cfe-commits 
simpal01 updated this revision to Diff 539582.
simpal01 added a comment.

Addressing Review comment - Removing the variable IsBigEndian.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154786/new/

https://reviews.llvm.org/D154786

Files:
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/BareMetal.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/test/Driver/baremetal.cpp

Index: clang/test/Driver/baremetal.cpp
===
--- clang/test/Driver/baremetal.cpp
+++ clang/test/Driver/baremetal.cpp
@@ -15,7 +15,7 @@
 // CHECK-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECk-V6M-C-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-C-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-C-SAME: "-T" "semihosted.lds" "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
 // CHECK-V6M-C-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-V6M-C-SAME: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
@@ -34,7 +34,7 @@
 // CHECK-ARMV7M-PER-TARGET: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-ARMV7M-PER-TARGET: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-ARMV7M-PER-TARGET: "-x" "c++" "{{.*}}baremetal.cpp"
-// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-ARMV7M-PER-TARGET: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-ARMV7M-PER-TARGET: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}lib"
 // CHECK-ARMV7M-PER-TARGET: "-L[[RESOURCE_DIR:[^"]+]]{{[/\\]+}}lib{{[/\\]+}}armv7m-vendor-none-eabi
 // CHECK-ARMV7M-PER-TARGET: "-lc" "-lm" "-lclang_rt.builtins"
@@ -42,7 +42,7 @@
 // RUN: %clangxx %s -### --target=armv6m-none-eabi 2>&1 \
 // RUN: --sysroot=%S/Inputs/baremetal_arm | FileCheck --check-prefix=CHECK-V6M-DEFAULTCXX %s
 // CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-DEFAULTCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -53,7 +53,7 @@
 // CHECK-V6M-LIBCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}{{[^v].*}}"
 // CHECK-V6M-LIBCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
@@ -66,7 +66,7 @@
 // CHECK-V6M-LIBSTDCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-V6M-LIBSTDCXX-NOT: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
 // CHECK-V6M-LIBSTDCXX-SAME: "-internal-isystem" "{{[^"]+}}{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}6.0.0"
-// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-LIBSTDCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-LIBSTDCXX-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 // CHECK-V6M-LIBSTDCXX-SAME: "-lstdc++" "-lsupc++" "-lunwind"
@@ -77,7 +77,7 @@
 // RUN: -nodefaultlibs \
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-NDL %s
 // CHECK-V6M-NDL: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
-// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
+// CHECK-V6M-NDL: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
 // CHECK-V6M-NDL-SAME: "-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
 // CHECK-V6M-NDL-SAME: "-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
 
@@ -117,6 +117,46 @@
 // RUN:   | FileCheck %s --check-prefix=CHECK-SYSROOT-INC
 // CHECK-SYSROOT-INC-NOT: "-internal-isystem" "include"
 
+// RUN: %clang -### %s --target=armebv7-none-eabi --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+// CHECK-ARMV7EB: "{{.*}}ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "--be8" "-EB"
+
+// RUN: %clang -### %s --target=armv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armebv7-none-eabi -mbig-endian --sysroot=%S/Inputs/baremetal_arm 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV7EB %s
+
+// RUN: %clang -### %s --target=armv7-none-eabi --sysroot=%S/Inputs/bare