r325492 - [ARM] disable FPU features when using soft floating point.
Author: kwalker
Date: Mon Feb 19 04:40:26 2018
New Revision: 325492
URL: http://llvm.org/viewvc/llvm-project?rev=325492&view=rev
Log:
[ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,
-mfloat-abi=soft -fpu=neon
If any floating point features which require FPU hardware are enabled
they must be disable.
There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).
Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.
Differential Revision: https://reviews.llvm.org/D42569
Modified:
cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
cfe/trunk/test/Driver/arm-cortex-cpus.c
cfe/trunk/test/Driver/arm-dotprod.c
cfe/trunk/test/Driver/arm-mfpu.c
cfe/trunk/test/Preprocessor/arm-target-features.c
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp?rev=325492&r1=325491&r2=325492&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp Mon Feb 19 04:40:26 2018
@@ -391,12 +391,22 @@ void arm::getARMTargetFeatures(const Too
} else if (HDivArg)
getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
- // Setting -msoft-float effectively disables NEON because of the GCC
- // implementation, although the same isn't true of VFP or VFP3.
+ // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
+ // ignores the -mfpu options in this case).
+ // Note that the ABI can also be set implicitly by the target selected.
if (ABI == arm::FloatABI::Soft) {
-Features.push_back("-neon");
-// Also need to explicitly disable features which imply NEON.
-Features.push_back("-crypto");
+llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
+
+// Disable hardware FP features which have been enabled.
+// FIXME: Disabling vfp2 and neon should be enough as all the other
+//features are dependant on these 2 features in LLVM. However
+//there is currently no easy way to test this in clang, so for
+//now just be explicit and disable all known dependent features
+//as well.
+for (std::string Feature : {"vfp2", "vfp3", "vfp4", "fp-armv8", "fullfp16",
+"neon", "crypto", "dotprod"})
+ if (std::find(std::begin(Features), std::end(Features), "+" + Feature)
!= std::end(Features))
+Features.push_back(Args.MakeArgString("-" + Feature));
}
// En/disable crc code generation.
Modified: cfe/trunk/test/Driver/arm-cortex-cpus.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/arm-cortex-cpus.c?rev=325492&r1=325491&r2=325492&view=diff
==
--- cfe/trunk/test/Driver/arm-cortex-cpus.c (original)
+++ cfe/trunk/test/Driver/arm-cortex-cpus.c Mon Feb 19 04:40:26 2018
@@ -284,13 +284,13 @@
// RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s
2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s
// CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}"
"-target-cpu" "generic"
-// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-V82A-FP16 %s
+// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-V82A-FP16 %s
// CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu"
"generic" {{.*}}"-target-feature" "+fullfp16"
// Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it
// on and off. Cortex-A53 is a placeholder for now.
-// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
-// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
+// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
+// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s
2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
// CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"
[PATCH] D24998: Add a new optimization option -Og
keith.walker.arm added a comment. Looking into what optimisations would be relevant to -Og (or rather what optimisation should be omitted because they are too disruptive to the debug experience) is something that I have on my road-map as something to look into and gather feedback on. I agree that this should be considered as just the starting point for enabling a fully functional -Og option. https://reviews.llvm.org/D24998 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r319420 - [ARM] disable FPU features when using soft floating point.
Author: kwalker
Date: Thu Nov 30 03:38:56 2017
New Revision: 319420
URL: http://llvm.org/viewvc/llvm-project?rev=319420&view=rev
Log:
[ARM] disable FPU features when using soft floating point.
To be compatible with GCC if soft floating point is in effect any FPU
specified is effectively ignored, eg,
-mfloat-abi=soft -fpu=neon
If any floating point features which require FPU hardware are enabled
they must be disable.
There was some support for doing this for NEON, but it did not handle
VFP, nor did it prevent the backend from emitting the build attribute
Tag_FP_arch describing the generated code as using the floating point
hardware if a FPU was specified (even though soft float does not use
the FPU).
Disabling the hardware floating point features for targets which are
compiling for soft float has meant that some tests which were incorrectly
checking for hardware support also needed to be updated. In such cases,
where appropriate the tests have been updated to check compiling for
soft float and a non-soft float variant (usually softfp). This was
usually because the target specified in the test defaulted to soft float.
Differential Revision: https://reviews.llvm.org/D40256
Modified:
cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
cfe/trunk/test/Driver/arm-cortex-cpus.c
cfe/trunk/test/Driver/arm-dotprod.c
cfe/trunk/test/Driver/arm-mfpu.c
cfe/trunk/test/Preprocessor/arm-target-features.c
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp?rev=319420&r1=319419&r2=319420&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp Thu Nov 30 03:38:56 2017
@@ -391,12 +391,22 @@ void arm::getARMTargetFeatures(const Too
} else if (HDivArg)
getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
- // Setting -msoft-float effectively disables NEON because of the GCC
- // implementation, although the same isn't true of VFP or VFP3.
+ // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
+ // ignores the -mfpu options in this case).
+ // Note that the ABI can also be set implicitly by the target selected.
if (ABI == arm::FloatABI::Soft) {
-Features.push_back("-neon");
-// Also need to explicitly disable features which imply NEON.
-Features.push_back("-crypto");
+llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
+
+// Disable hardware FP features which have been enabled.
+// FIXME: Disabling vfp2 and neon should be enough as all the other
+//features are dependant on these 2 features in LLVM. However
+//there is currently no easy way to test this in clang, so for
+//now just be explicit and disable all known dependent features
+//as well.
+for (std::string Feature : {"vfp2", "vfp3", "vfp4", "fp-armv8", "fullfp16",
+"neon", "crypto", "dotprod"})
+ if (std::find(std::begin(Features), std::end(Features), "+" + Feature)
!= std::end(Features))
+Features.push_back("-" + Feature);
}
// En/disable crc code generation.
Modified: cfe/trunk/test/Driver/arm-cortex-cpus.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/arm-cortex-cpus.c?rev=319420&r1=319419&r2=319420&view=diff
==
--- cfe/trunk/test/Driver/arm-cortex-cpus.c (original)
+++ cfe/trunk/test/Driver/arm-cortex-cpus.c Thu Nov 30 03:38:56 2017
@@ -284,13 +284,13 @@
// RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s
2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s
// CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}"
"-target-cpu" "generic"
-// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-V82A-FP16 %s
+// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-V82A-FP16 %s
// CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu"
"generic" {{.*}}"-target-feature" "+fullfp16"
// Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it
// on and off. Cortex-A53 is a placeholder for now.
-// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
-// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
+// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
+// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s
2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
// CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"-target-cpu" "cortex
r319425 - Revert [ARM] disable FPU features when using soft floating point.
Author: kwalker
Date: Thu Nov 30 04:05:18 2017
New Revision: 319425
URL: http://llvm.org/viewvc/llvm-project?rev=319425&view=rev
Log:
Revert [ARM] disable FPU features when using soft floating point.
This reverts r319420
It is failing the test Driver/arm-mfpu.c so reverting while I investigate the
failure.
Modified:
cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
cfe/trunk/test/Driver/arm-cortex-cpus.c
cfe/trunk/test/Driver/arm-dotprod.c
cfe/trunk/test/Driver/arm-mfpu.c
cfe/trunk/test/Preprocessor/arm-target-features.c
Modified: cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp?rev=319425&r1=319424&r2=319425&view=diff
==
--- cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp Thu Nov 30 04:05:18 2017
@@ -391,22 +391,12 @@ void arm::getARMTargetFeatures(const Too
} else if (HDivArg)
getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
- // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
- // ignores the -mfpu options in this case).
- // Note that the ABI can also be set implicitly by the target selected.
+ // Setting -msoft-float effectively disables NEON because of the GCC
+ // implementation, although the same isn't true of VFP or VFP3.
if (ABI == arm::FloatABI::Soft) {
-llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
-
-// Disable hardware FP features which have been enabled.
-// FIXME: Disabling vfp2 and neon should be enough as all the other
-//features are dependant on these 2 features in LLVM. However
-//there is currently no easy way to test this in clang, so for
-//now just be explicit and disable all known dependent features
-//as well.
-for (std::string Feature : {"vfp2", "vfp3", "vfp4", "fp-armv8", "fullfp16",
-"neon", "crypto", "dotprod"})
- if (std::find(std::begin(Features), std::end(Features), "+" + Feature)
!= std::end(Features))
-Features.push_back("-" + Feature);
+Features.push_back("-neon");
+// Also need to explicitly disable features which imply NEON.
+Features.push_back("-crypto");
}
// En/disable crc code generation.
Modified: cfe/trunk/test/Driver/arm-cortex-cpus.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/arm-cortex-cpus.c?rev=319425&r1=319424&r2=319425&view=diff
==
--- cfe/trunk/test/Driver/arm-cortex-cpus.c (original)
+++ cfe/trunk/test/Driver/arm-cortex-cpus.c Thu Nov 30 04:05:18 2017
@@ -284,13 +284,13 @@
// RUN: %clang -target arm -march=armebv8.2-a -mbig-endian -mthumb -### -c %s
2>&1 | FileCheck -check-prefix=CHECK-BE-V82A-THUMB %s
// CHECK-BE-V82A-THUMB: "-cc1"{{.*}} "-triple" "thumbebv8.2a-{{.*}}"
"-target-cpu" "generic"
-// RUN: %clang -target armv8a-linux-eabi -march=armv8.2-a+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-V82A-FP16 %s
+// RUN: %clang -target armv8a -march=armv8.2-a+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-V82A-FP16 %s
// CHECK-V82A-FP16: "-cc1"{{.*}} "-triple" "armv8.2{{.*}}" "-target-cpu"
"generic" {{.*}}"-target-feature" "+fullfp16"
// Once we have CPUs with optional v8.2-A FP16, we will need a way to turn it
// on and off. Cortex-A53 is a placeholder for now.
-// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+fp16 -### -c %s 2>&1
| FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
-// RUN: %clang -target armv8a-linux-eabi -mcpu=cortex-a53+nofp16 -### -c %s
2>&1 | FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
+// RUN: %clang -target armv8a -mcpu=cortex-a53+fp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-FP16 %s
+// RUN: %clang -target armv8a -mcpu=cortex-a53+nofp16 -### -c %s 2>&1 |
FileCheck --check-prefix CHECK-CORTEX-A53-NOFP16 %s
// CHECK-CORTEX-A53-FP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53"
{{.*}}"-target-feature" "+fullfp16"
// CHECK-CORTEX-A53-NOFP16: "-cc1" {{.*}}"-target-cpu" "cortex-a53"
{{.*}}"-target-feature" "-fullfp16"
Modified: cfe/trunk/test/Driver/arm-dotprod.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/arm-dotprod.c?rev=319425&r1=319424&r2=319425&view=diff
==
--- cfe/trunk/test/Driver/arm-dotprod.c (original)
+++ cfe/trunk/test/Driver/arm-dotprod.c Thu Nov 30 04:05:18 2017
@@ -4,21 +4,8 @@
// RUN: %clang -### -target arm -march=armv8.3a %s 2>&1 | FileCheck %s
--check-prefix=CHECK-NONE
// CHECK-NONE-NOT: "-target-feature" "+dotprod"
-// RUN: %clang -### -target arm-linux-eabi -march=armv8.2a+dotprod %s 2>&1 |
FileCheck %s
-// RUN: %clang -### -target arm-linux-eabi -march=armv8.3a+dotprod %s 2>&1 |
FileCheck %s
-// RUN: %clang -### -ta
[clang] acc5db2 - [Thumb1] Do not allow Armv6-m XO and PI code
Author: Keith Walker
Date: 2023-08-22T11:08:11+01:00
New Revision: acc5db2bedd50a66f156b63be8469271f7b19322
URL:
https://github.com/llvm/llvm-project/commit/acc5db2bedd50a66f156b63be8469271f7b19322
DIFF:
https://github.com/llvm/llvm-project/commit/acc5db2bedd50a66f156b63be8469271f7b19322.diff
LOG: [Thumb1] Do not allow Armv6-m XO and PI code
When generating armv6-m (Thumb1) Position Independent (PI) code
there are currently some code sequences that are not compatible
with eXecute-Only (XO) code.
For example, this simple code sequence when compiler for XO & PI:
extern int x;
int fn() { return x; }
is a problem as the address of x is currently loaded by:
ldr r0, .L0
:
:
.L0:
.long x
which is not XO compiant as this involves reading the value at
.L0 which is in the code section. Generating correct code is
currently hindered by lack of suitable relocations.
Disallow the generation of armv6-m PI code together with XO code
until they can be made to work together.
Differential Revision: https://reviews.llvm.org/D157620
Added:
Modified:
clang/include/clang/Basic/DiagnosticCommonKinds.td
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/test/Driver/arm-execute-only.c
Removed:
diff --git a/clang/include/clang/Basic/DiagnosticCommonKinds.td
b/clang/include/clang/Basic/DiagnosticCommonKinds.td
index 195a61127c2a67..cd72e254ea3b1a 100644
--- a/clang/include/clang/Basic/DiagnosticCommonKinds.td
+++ b/clang/include/clang/Basic/DiagnosticCommonKinds.td
@@ -338,6 +338,8 @@ def err_target_unsupported_mcmse : Error<
"-mcmse is not supported for %0">;
def err_opt_not_valid_with_opt : Error<
"option '%0' cannot be specified with '%1'">;
+def err_opt_not_valid_with_opt_on_target : Error<
+ "option '%0' cannot be specified with '%1' for the %2 sub-architecture">;
def err_opt_not_valid_without_opt : Error<
"option '%0' cannot be specified without '%1'">;
def err_opt_not_valid_on_target : Error<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index dad1e9e5bd3304..bb66db5feae8c3 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -847,7 +847,13 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
llvm::ARM::parseArch(Triple.getArchName()) !=
llvm::ARM::ArchKind::ARMV6T2 &&
llvm::ARM::parseArch(Triple.getArchName()) !=
llvm::ARM::ArchKind::ARMV6M)
D.Diag(diag::err_target_unsupported_execute_only) <<
Triple.getArchName();
-else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
+else if (llvm::ARM::parseArch(Triple.getArchName()) ==
llvm::ARM::ArchKind::ARMV6M) {
+ if (Arg *PIArg = Args.getLastArg(options::OPT_fropi,
options::OPT_frwpi,
+ options::OPT_fpic,
options::OPT_fpie,
+ options::OPT_fPIC,
options::OPT_fPIE))
+D.Diag(diag::err_opt_not_valid_with_opt_on_target)
+<< A->getAsString(Args) << PIArg->getAsString(Args) <<
Triple.getArchName();
+} else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
D.Diag(diag::err_opt_not_valid_with_opt)
<< A->getAsString(Args) << B->getAsString(Args);
Features.push_back("+execute-only");
diff --git a/clang/test/Driver/arm-execute-only.c
b/clang/test/Driver/arm-execute-only.c
index 1b2fad7299484a..a9bf1656fd27e5 100644
--- a/clang/test/Driver/arm-execute-only.c
+++ b/clang/test/Driver/arm-execute-only.c
@@ -20,3 +20,27 @@
// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv8-m.main
-mpure-code -mno-movt %s 2>&1 \
// RUN:| FileCheck %s -check-prefix CHECK-PURE-CODE-NO-MOVT
// CHECK-PURE-CODE-NO-MOVT: error: option '-mpure-code' cannot be specified
with '-mno-movt'
+
+// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m
-mexecute-only -fropi %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-ROPI
+// CHECK-NO-EXECUTE-ROPI: error: option '-mexecute-only' cannot be specified
with '-fropi' for the thumbv6m sub-architecture
+
+// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m
-mexecute-only -frwpi %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-RWPI
+// CHECK-NO-EXECUTE-RWPI: error: option '-mexecute-only' cannot be specified
with '-frwpi' for the thumbv6m sub-architecture
+
+// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m
-mexecute-only -fpic %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIC
+// CHECK-NO-EXECUTE-PIC: error: option '-mexecute-only' cannot be specified
with '-fpic' for the thumbv6m sub-architecture
+
+// RUN: not %clang -### --target=arm-arm-none-eabi -march=armv6-m
-mexecute-only -fpie %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-NO-EXECUTE-PIE
+// CHECK-NO-E
[PATCH] D12240: [AArch64] Define the macro __ARM_FP16_ARGS
keith.walker.arm created this revision.
keith.walker.arm added reviewers: olista01, rengolin, cfe-commits.
Herald added subscribers: rengolin, aemerson.
The ACLE (ARM C Language Extensions) 2.0 defines that the predefined macro
__ARM_FP16_ARGS should be defined if __fp16 can be used as an argument and
result.
The support for __fp16 to be used as an argument and result is already
implemented for AArch64 so this change is just adding the missing macro.
http://reviews.llvm.org/D12240
Files:
lib/Basic/Targets.cpp
test/Preprocessor/aarch64-target-features.c
Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -19,6 +19,7 @@
// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
// CHECK: __ARM_FEATURE_UNALIGNED 1
// CHECK: __ARM_FP 0xe
+// CHECK: __ARM_FP16_ARGS 1
// CHECK: __ARM_FP16_FORMAT_IEEE 1
// CHECK-NOT: __ARM_FP_FAST 1
// CHECK: __ARM_FP_FENV_ROUNDING 1
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -5264,6 +5264,7 @@
// PCS specifies this for SysV variants, which is all we support. Other
ABIs
// may choose __ARM_FP16_FORMAT_ALTERNATIVE.
Builder.defineMacro("__ARM_FP16_FORMAT_IEEE");
+Builder.defineMacro("__ARM_FP16_ARGS");
if (Opts.FastMath || Opts.FiniteMathOnly)
Builder.defineMacro("__ARM_FP_FAST");
Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -19,6 +19,7 @@
// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
// CHECK: __ARM_FEATURE_UNALIGNED 1
// CHECK: __ARM_FP 0xe
+// CHECK: __ARM_FP16_ARGS 1
// CHECK: __ARM_FP16_FORMAT_IEEE 1
// CHECK-NOT: __ARM_FP_FAST 1
// CHECK: __ARM_FP_FENV_ROUNDING 1
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -5264,6 +5264,7 @@
// PCS specifies this for SysV variants, which is all we support. Other ABIs
// may choose __ARM_FP16_FORMAT_ALTERNATIVE.
Builder.defineMacro("__ARM_FP16_FORMAT_IEEE");
+Builder.defineMacro("__ARM_FP16_ARGS");
if (Opts.FastMath || Opts.FiniteMathOnly)
Builder.defineMacro("__ARM_FP_FAST");
___
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r245833 - [AArch64] Define the macro __ARM_FP16_ARGS
Author: kwalker
Date: Mon Aug 24 05:11:14 2015
New Revision: 245833
URL: http://llvm.org/viewvc/llvm-project?rev=245833&view=rev
Log:
[AArch64] Define the macro __ARM_FP16_ARGS
The ACLE (ARM C Language Extensions) 2.0 defines that the predefined macro
__ARM_FP16_ARGS should be defined if __fp16 can be used as an argument and
result.
The support for __fp16 to be used as an argument and result is already
implemented for AArch64 so this change is just adding the missing macro.
Differential Revision: http://reviews.llvm.org/D12240
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/Preprocessor/aarch64-target-features.c
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=245833&r1=245832&r2=245833&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Aug 24 05:11:14 2015
@@ -5176,6 +5176,7 @@ public:
// PCS specifies this for SysV variants, which is all we support. Other
ABIs
// may choose __ARM_FP16_FORMAT_ALTERNATIVE.
Builder.defineMacro("__ARM_FP16_FORMAT_IEEE");
+Builder.defineMacro("__ARM_FP16_ARGS");
if (Opts.FastMath || Opts.FiniteMathOnly)
Builder.defineMacro("__ARM_FP_FAST");
Modified: cfe/trunk/test/Preprocessor/aarch64-target-features.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/aarch64-target-features.c?rev=245833&r1=245832&r2=245833&view=diff
==
--- cfe/trunk/test/Preprocessor/aarch64-target-features.c (original)
+++ cfe/trunk/test/Preprocessor/aarch64-target-features.c Mon Aug 24 05:11:14
2015
@@ -19,6 +19,7 @@
// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
// CHECK: __ARM_FEATURE_UNALIGNED 1
// CHECK: __ARM_FP 0xe
+// CHECK: __ARM_FP16_ARGS 1
// CHECK: __ARM_FP16_FORMAT_IEEE 1
// CHECK-NOT: __ARM_FP_FAST 1
// CHECK: __ARM_FP_FENV_ROUNDING 1
___
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[clang] 109bf25 - [AArch64] Change __ARM_FEATURE_FP16FML macro name to __ARM_FEATURE_FP16_FML
Author: Keith Walker
Date: 2021-04-30T11:03:15+01:00
New Revision: 109bf25e2c425ea5dd20836f25176cf9d9479016
URL:
https://github.com/llvm/llvm-project/commit/109bf25e2c425ea5dd20836f25176cf9d9479016
DIFF:
https://github.com/llvm/llvm-project/commit/109bf25e2c425ea5dd20836f25176cf9d9479016.diff
LOG: [AArch64] Change __ARM_FEATURE_FP16FML macro name to
__ARM_FEATURE_FP16_FML
The "Arm C Language extensions" document (the current version can be
found at https://developer.arm.com/documentation/101028/0012/?lang=en)
states that the name of the feature test macro for the FP16 FML extension
is __ARM_FEATURE_FP16_FML.
Differential Revision: https://reviews.llvm.org/D101532
Added:
Modified:
clang/include/clang/Basic/arm_neon.td
clang/lib/Basic/Targets/AArch64.cpp
clang/test/Preprocessor/aarch64-target-features.c
Removed:
diff --git a/clang/include/clang/Basic/arm_neon.td
b/clang/include/clang/Basic/arm_neon.td
index fdd82692223c3..173003d171eea 100644
--- a/clang/include/clang/Basic/arm_neon.td
+++ b/clang/include/clang/Basic/arm_neon.td
@@ -1889,7 +1889,7 @@ let ArchGuard = "defined(__ARM_FEATURE_DOTPROD) &&
defined(__aarch64__)" in {
}
// v8.2-A FP16 fused multiply-add long instructions.
-let ArchGuard = "defined(__ARM_FEATURE_FP16FML) && defined(__aarch64__)" in {
+let ArchGuard = "defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)" in {
def VFMLAL_LOW : SInst<"vfmlal_low", ">>..", "hQh">;
def VFMLSL_LOW : SInst<"vfmlsl_low", ">>..", "hQh">;
def VFMLAL_HIGH : SInst<"vfmlal_high", ">>..", "hQh">;
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index 270b03a218fc2..d26ae943b2e8a 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -352,7 +352,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions
&Opts,
Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_INT8", "1");
if ((FPU & NeonMode) && HasFP16FML)
-Builder.defineMacro("__ARM_FEATURE_FP16FML", "1");
+Builder.defineMacro("__ARM_FEATURE_FP16_FML", "1");
if (Opts.hasSignReturnAddress()) {
// Bitmask:
diff --git a/clang/test/Preprocessor/aarch64-target-features.c
b/clang/test/Preprocessor/aarch64-target-features.c
index 0e27b91349084..fa9b80b7de4ab 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -207,8 +207,8 @@
// RUN: %clang -target aarch64-none-linux-gnueabi
-march=armv8.4-a+fp16+nofp16fml -x c -E -dM %s -o - | FileCheck
-match-full-lines --check-prefix=CHECK-FULLFP16-NOFML
--check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml -x
c -E -dM %s -o - | FileCheck -match-full-lines
--check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16 -x c
-E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML
--check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
-// CHECK-FULLFP16-FML: #define __ARM_FEATURE_FP16FML 1
-// CHECK-FULLFP16-NOFML-NOT: #define __ARM_FEATURE_FP16FML 1
+// CHECK-FULLFP16-FML: #define __ARM_FEATURE_FP16_FML 1
+// CHECK-FULLFP16-NOFML-NOT: #define __ARM_FEATURE_FP16_FML 1
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FP 0xE
@@ -220,7 +220,7 @@
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16+nosimd
-x c -E -dM %s -o - | FileCheck -match-full-lines
--check-prefix=CHECK-FULLFP16-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi
-march=armv8.4-a+fp16fml+nosimd -x c -E -dM %s -o - | FileCheck
-match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16+nosimd
-x c -E -dM %s -o - | FileCheck -match-full-lines
--check-prefix=CHECK-FULLFP16-SCALAR %s
-// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16FML 1
+// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16_FML 1
// CHECK-FULLFP16-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
// CHECK-FULLFP16-SCALAR: #define __ARM_FP 0xE
@@ -234,7 +234,7 @@
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16 -x c
-E -dM %s -o - | FileCheck -match-full-lines
--check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16fml
-x c -E -dM %s -o - | FileCheck -match-full-lines
--check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi
-march=armv8.4-a+fp16fml+nofp16 -x c
