[PATCH] D23753: [AVX512] Arguments to _mm512_[mask_]abs_ps|d must have "__" prefix
AsafBadouh created this revision.
AsafBadouh added a reviewer: igorb.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
Repository:
rL LLVM
https://reviews.llvm.org/D23753
Files:
../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
Index: ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
+++ ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
@@ -9557,27 +9557,27 @@
(e4),(e3),(e2),(e1),(e0))
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_abs_ps(__m512 A)
+_mm512_abs_ps(__m512 __A)
{
- return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_mask_abs_ps(__m512 W, __mmask16 K, __m512 A)
+_mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A)
{
- return (__m512)_mm512_mask_and_epi32((__m512i)W, K,
_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K,
_mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_abs_pd(__m512d A)
+_mm512_abs_pd(__m512d __A)
{
- return
(__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)A) ;
+ return
(__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_mask_abs_pd(__m512d W, __mmask8 K, __m512d A)
+_mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
{
- return (__m512d)_mm512_mask_and_epi64((__v8di)W, K,
_mm512_set1_epi64(0x7FFF),(__v8di)A);
+ return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K,
_mm512_set1_epi64(0x7FFF),(__v8di)__A);
}
#undef __DEFAULT_FN_ATTRS
Index: ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
+++ ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
@@ -9557,27 +9557,27 @@
(e4),(e3),(e2),(e1),(e0))
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_abs_ps(__m512 A)
+_mm512_abs_ps(__m512 __A)
{
- return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_mask_abs_ps(__m512 W, __mmask16 K, __m512 A)
+_mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A)
{
- return (__m512)_mm512_mask_and_epi32((__m512i)W, K, _mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K, _mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_abs_pd(__m512d A)
+_mm512_abs_pd(__m512d __A)
{
- return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)A) ;
+ return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_mask_abs_pd(__m512d W, __mmask8 K, __m512d A)
+_mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
{
- return (__m512d)_mm512_mask_and_epi64((__v8di)W, K, _mm512_set1_epi64(0x7FFF),(__v8di)A);
+ return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFF),(__v8di)__A);
}
#undef __DEFAULT_FN_ATTRS
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r279392 - [X86][AVX512F] minor fix of the parameter names
Author: abadouh
Date: Sun Aug 21 02:56:47 2016
New Revision: 279392
URL: http://llvm.org/viewvc/llvm-project?rev=279392&view=rev
Log:
[X86][AVX512F] minor fix of the parameter names
add "__" prefix
Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=29040
Differential Revision: https://reviews.llvm.org/D23753
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=279392&r1=279391&r2=279392&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Sun Aug 21 02:56:47 2016
@@ -9557,27 +9557,27 @@ _mm512_set_ps (float __A, float __B, flo
(e4),(e3),(e2),(e1),(e0))
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_abs_ps(__m512 A)
+_mm512_abs_ps(__m512 __A)
{
- return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_mask_abs_ps(__m512 W, __mmask16 K, __m512 A)
+_mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A)
{
- return (__m512)_mm512_mask_and_epi32((__m512i)W, K,
_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+ return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K,
_mm512_set1_epi32(0x7FFF),(__m512i)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_abs_pd(__m512d A)
+_mm512_abs_pd(__m512d __A)
{
- return
(__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)A) ;
+ return
(__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)__A) ;
}
static __inline__ __m512d __DEFAULT_FN_ATTRS
-_mm512_mask_abs_pd(__m512d W, __mmask8 K, __m512d A)
+_mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
{
- return (__m512d)_mm512_mask_and_epi64((__v8di)W, K,
_mm512_set1_epi64(0x7FFF),(__v8di)A);
+ return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K,
_mm512_set1_epi64(0x7FFF),(__v8di)__A);
}
#undef __DEFAULT_FN_ATTRS
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r247881 - [X86][AVX512DQ] add new intrinsics
Author: abadouh
Date: Thu Sep 17 06:56:04 2015
New Revision: 247881
URL: http://llvm.org/viewvc/llvm-project?rev=247881&view=rev
Log:
[X86][AVX512DQ] add new intrinsics
convert i64 to FP and vice versa
reduceps & reducepd
rangeps & rangepd
all in their 512bit versions
Differential Revision: http://reviews.llvm.org/D11716
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512dqintrin.h
cfe/trunk/test/CodeGen/avx512dq-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=247881&r1=247880&r2=247881&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Sep 17 06:56:04 2015
@@ -1469,7 +1469,6 @@ TARGET_BUILTIN(__builtin_ia32_vpermt2var
TARGET_BUILTIN(__builtin_ia32_vpermt2varq128_maskz, "V2LLiV2LLiV2LLiV2LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_mask, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_maskz, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
-
TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi", "", "avx512bw")
@@ -1477,7 +1476,6 @@ TARGET_BUILTIN(__builtin_ia32_punpckhbw5
TARGET_BUILTIN(__builtin_ia32_punpckhwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklbw512_mask, "V64cV64cV64cV64cULLi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
-
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq256_mask, "V4LLiV4dV4LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
@@ -1510,7 +1508,6 @@ TARGET_BUILTIN(__builtin_ia32_reducepd12
TARGET_BUILTIN(__builtin_ia32_reducepd256_mask, "V4dV4dIiV4dUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps128_mask, "V4fV4fIiV4fUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps256_mask, "V8fV8fIiV8fUc", "",
"avx512vl,avx512dq")
-
TARGET_BUILTIN(__builtin_ia32_pmaddubsw128_mask, "V8sV16cV16cV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddubsw256_mask, "V16sV32cV32cV16sUs", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd128_mask, "V4iV8sV8sV4iUc", "",
"avx512vl,avx512bw")
@@ -1535,6 +1532,22 @@ TARGET_BUILTIN(__builtin_ia32_punpcklbw1
TARGET_BUILTIN(__builtin_ia32_punpcklbw256_mask, "V32cV32cV32cV32cUi", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd128_mask, "V8sV8sV8sV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd256_mask, "V16sV16sV16sV16sUs", "",
"avx512vl,avx512bw")
+BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
+BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
+BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
+BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
+BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi", "")
+BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi", "")
+BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi", "")
+BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi", "")
#undef BUILTIN
#undef TARGET_BUILTIN
Modified: cfe/trunk/lib/Headers/avx512dqintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512dqintrin.h?rev=247881&r1=247880&r2=247881&view=diff
==
--- cfe/trunk/lib/Headers/avx512dqintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512dqintrin.h Thu Sep 17 06:56:04 2015
@@ -237,6 +237,542 @@ _mm512_maskz_andnot_ps (__mmask16 __U, _
(__mmask16) __U);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_cvtpd_epi64 (__m512d __A) {
+ return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
+(__v8di) _mm512_setzero_si512(),
+(__mmask8) -1,
+_MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm51
r247883 - revert r.247881 due to tests failures
Author: abadouh
Date: Thu Sep 17 08:09:33 2015
New Revision: 247883
URL: http://llvm.org/viewvc/llvm-project?rev=247883&view=rev
Log:
revert r.247881 due to tests failures
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512dqintrin.h
cfe/trunk/test/CodeGen/avx512dq-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=247883&r1=247882&r2=247883&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Sep 17 08:09:33 2015
@@ -1469,6 +1469,7 @@ TARGET_BUILTIN(__builtin_ia32_vpermt2var
TARGET_BUILTIN(__builtin_ia32_vpermt2varq128_maskz, "V2LLiV2LLiV2LLiV2LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_mask, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_maskz, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
+
TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi", "", "avx512bw")
@@ -1476,6 +1477,7 @@ TARGET_BUILTIN(__builtin_ia32_punpckhbw5
TARGET_BUILTIN(__builtin_ia32_punpckhwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklbw512_mask, "V64cV64cV64cV64cULLi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
+
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq256_mask, "V4LLiV4dV4LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
@@ -1508,6 +1510,7 @@ TARGET_BUILTIN(__builtin_ia32_reducepd12
TARGET_BUILTIN(__builtin_ia32_reducepd256_mask, "V4dV4dIiV4dUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps128_mask, "V4fV4fIiV4fUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps256_mask, "V8fV8fIiV8fUc", "",
"avx512vl,avx512dq")
+
TARGET_BUILTIN(__builtin_ia32_pmaddubsw128_mask, "V8sV16cV16cV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddubsw256_mask, "V16sV32cV32cV16sUs", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd128_mask, "V4iV8sV8sV4iUc", "",
"avx512vl,avx512bw")
@@ -1532,22 +1535,6 @@ TARGET_BUILTIN(__builtin_ia32_punpcklbw1
TARGET_BUILTIN(__builtin_ia32_punpcklbw256_mask, "V32cV32cV32cV32cUi", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd128_mask, "V8sV8sV8sV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd256_mask, "V16sV16sV16sV16sUs", "",
"avx512vl,avx512bw")
-BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
-BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
-BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
-BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
-BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
-BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi", "")
-BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi", "")
-BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi", "")
-BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi", "")
#undef BUILTIN
#undef TARGET_BUILTIN
Modified: cfe/trunk/lib/Headers/avx512dqintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512dqintrin.h?rev=247883&r1=247882&r2=247883&view=diff
==
--- cfe/trunk/lib/Headers/avx512dqintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512dqintrin.h Thu Sep 17 08:09:33 2015
@@ -237,542 +237,6 @@ _mm512_maskz_andnot_ps (__mmask16 __U, _
(__mmask16) __U);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS
-_mm512_cvtpd_epi64 (__m512d __A) {
- return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
-(__v8di) _mm512_setzero_si512(),
-(__mmask8) -1,
-_MM_FROUND_CUR_DIRECTION);
-}
-
-static __inline__ __m512i __DEFAULT_FN_ATTRS
-_mm512_mask_cvtpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
- return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
-(__v8di
r247892 - re-apply r.247881
Author: abadouh
Date: Thu Sep 17 09:53:37 2015
New Revision: 247892
URL: http://llvm.org/viewvc/llvm-project?rev=247892&view=rev
Log:
re-apply r.247881
fixed the tests.
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512dqintrin.h
cfe/trunk/test/CodeGen/avx512dq-builtins.c
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=247892&r1=247891&r2=247892&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Sep 17 09:53:37 2015
@@ -1469,7 +1469,6 @@ TARGET_BUILTIN(__builtin_ia32_vpermt2var
TARGET_BUILTIN(__builtin_ia32_vpermt2varq128_maskz, "V2LLiV2LLiV2LLiV2LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_mask, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq256_maskz, "V4LLiV4LLiV4LLiV4LLiUc",
"", "avx512vl")
-
TARGET_BUILTIN(__builtin_ia32_pmovswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovuswb512_mask, "V32cV32sV32cUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmovwb512_mask, "V32cV32sV32cUi", "", "avx512bw")
@@ -1477,7 +1476,6 @@ TARGET_BUILTIN(__builtin_ia32_punpckhbw5
TARGET_BUILTIN(__builtin_ia32_punpckhwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklbw512_mask, "V64cV64cV64cV64cULLi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd512_mask, "V32sV32sV32sV32sUi", "",
"avx512bw")
-
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2qq256_mask, "V4LLiV4dV4LLiUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtpd2uqq128_mask, "V2LLiV2dV2LLiUc", "",
"avx512vl,avx512dq")
@@ -1510,7 +1508,6 @@ TARGET_BUILTIN(__builtin_ia32_reducepd12
TARGET_BUILTIN(__builtin_ia32_reducepd256_mask, "V4dV4dIiV4dUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps128_mask, "V4fV4fIiV4fUc", "",
"avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_reduceps256_mask, "V8fV8fIiV8fUc", "",
"avx512vl,avx512dq")
-
TARGET_BUILTIN(__builtin_ia32_pmaddubsw128_mask, "V8sV16cV16cV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddubsw256_mask, "V16sV32cV32cV16sUs", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd128_mask, "V4iV8sV8sV4iUc", "",
"avx512vl,avx512bw")
@@ -1535,6 +1532,22 @@ TARGET_BUILTIN(__builtin_ia32_punpcklbw1
TARGET_BUILTIN(__builtin_ia32_punpcklbw256_mask, "V32cV32cV32cV32cUi", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd128_mask, "V8sV8sV8sV8sUc", "",
"avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_punpcklwd256_mask, "V16sV16sV16sV16sUs", "",
"avx512vl,avx512bw")
+BUILTIN(__builtin_ia32_cvtpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
+BUILTIN(__builtin_ia32_cvtqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
+BUILTIN(__builtin_ia32_cvttpd2qq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttpd2uqq512_mask, "V8LLiV8dV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttps2qq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvttps2uqq512_mask, "V8LLiV8fV8LLiUcIi", "")
+BUILTIN(__builtin_ia32_cvtuqq2pd512_mask, "V8dV8LLiV8dUcIi", "")
+BUILTIN(__builtin_ia32_cvtuqq2ps512_mask, "V8fV8LLiV8fUcIi", "")
+BUILTIN(__builtin_ia32_rangepd512_mask, "V8dV8dV8dIiV8dUcIi", "")
+BUILTIN(__builtin_ia32_rangeps512_mask, "V16fV16fV16fIiV16fUsIi", "")
+BUILTIN(__builtin_ia32_reducepd512_mask, "V8dV8dIiV8dUcIi", "")
+BUILTIN(__builtin_ia32_reduceps512_mask, "V16fV16fIiV16fUsIi", "")
#undef BUILTIN
#undef TARGET_BUILTIN
Modified: cfe/trunk/lib/Headers/avx512dqintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512dqintrin.h?rev=247892&r1=247891&r2=247892&view=diff
==
--- cfe/trunk/lib/Headers/avx512dqintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512dqintrin.h Thu Sep 17 09:53:37 2015
@@ -237,6 +237,542 @@ _mm512_maskz_andnot_ps (__mmask16 __U, _
(__mmask16) __U);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_cvtpd_epi64 (__m512d __A) {
+ return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
+(__v8di) _mm512_setzero_si512(),
+(__mmask8) -1,
+_MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS
+_mm512_mask_cvtpd_epi64 (__m512i __W, __mmask8 __U, __m512d __A) {
+ return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A,
+(__v8di) _
Re: [PATCH] D13009: [X86] Fix some non-reserved parameter names in intrinsic headers
AsafBadouh accepted this revision. AsafBadouh added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D13009 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D13015: [X86] Make f16c intrinsics accessible through emmintrin.h, per Intel docs
AsafBadouh accepted this revision. AsafBadouh added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D13015 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r277955 - [AVX512] integer comparisions enumeration.
Author: abadouh
Date: Sun Aug 7 05:43:04 2016
New Revision: 277955
URL: http://llvm.org/viewvc/llvm-project?rev=277955&view=rev
Log:
[AVX512] integer comparisions enumeration.
fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842
Differential Revision: https://reviews.llvm.org/D22212
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
cfe/trunk/test/CodeGen/avx512vl-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=277955&r1=277954&r2=277955&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Sun Aug 7 05:43:04 2016
@@ -54,6 +54,19 @@ typedef unsigned short __mmask16;
#define _MM_FROUND_TO_ZERO 0x03
#define _MM_FROUND_CUR_DIRECTION0x04
+/* Constants for integer comparison predicates */
+typedef enum {
+_MM_CMPINT_EQ, /* Equal */
+_MM_CMPINT_LT, /* Less than */
+_MM_CMPINT_LE, /* Less than or Equal */
+_MM_CMPINT_UNUSED,
+_MM_CMPINT_NE, /* Not Equal */
+_MM_CMPINT_NLT, /* Not Less than */
+#define _MM_CMPINT_GE _MM_CMPINT_NLT /* Greater than or Equal */
+_MM_CMPINT_NLE /* Not Less than or Equal */
+#define _MM_CMPINT_GT _MM_CMPINT_NLE /* Greater than */
+} _MM_CMPINT_ENUM;
+
typedef enum
{
_MM_PERM_ = 0x00, _MM_PERM_AAAB = 0x01, _MM_PERM_AAAC = 0x02,
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=277955&r1=277954&r2=277955&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Sun Aug 7 05:43:04 2016
@@ -1342,30 +1342,30 @@ __mmask8 test_mm512_mask_cmpneq_epu64_ma
return (__mmask8)_mm512_mask_cmpneq_epu64_mask(__u, __a, __b);
}
-__mmask16 test_mm512_cmp_epi32_mask(__m512i __a, __m512i __b) {
- // CHECK-LABEL: @test_mm512_cmp_epi32_mask
+__mmask16 test_mm512_cmp_eq_epi32_mask(__m512i __a, __m512i __b) {
+ // CHECK-LABEL: @test_mm512_cmp_eq_epi32_mask
// CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}
- return (__mmask16)_mm512_cmp_epi32_mask(__a, __b, 0);
+ return (__mmask16)_mm512_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);
}
-__mmask16 test_mm512_mask_cmp_epi32_mask(__mmask16 __u, __m512i __a, __m512i
__b) {
- // CHECK-LABEL: @test_mm512_mask_cmp_epi32_mask
+__mmask16 test_mm512_mask_cmp_eq_epi32_mask(__mmask16 __u, __m512i __a,
__m512i __b) {
+ // CHECK-LABEL: @test_mm512_mask_cmp_eq_epi32_mask
// CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}
// CHECK: and <16 x i1> %{{.*}}, %{{.*}}
- return (__mmask16)_mm512_mask_cmp_epi32_mask(__u, __a, __b, 0);
+ return (__mmask16)_mm512_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_EQ);
}
-__mmask8 test_mm512_cmp_epi64_mask(__m512i __a, __m512i __b) {
- // CHECK-LABEL: @test_mm512_cmp_epi64_mask
+__mmask8 test_mm512_cmp_eq_epi64_mask(__m512i __a, __m512i __b) {
+ // CHECK-LABEL: @test_mm512_cmp_eq_epi64_mask
// CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}
- return (__mmask8)_mm512_cmp_epi64_mask(__a, __b, 0);
+ return (__mmask8)_mm512_cmp_epi64_mask(__a, __b, _MM_CMPINT_EQ);
}
-__mmask8 test_mm512_mask_cmp_epi64_mask(__mmask8 __u, __m512i __a, __m512i
__b) {
- // CHECK-LABEL: @test_mm512_mask_cmp_epi64_mask
+__mmask8 test_mm512_mask_cmp_eq_epi64_mask(__mmask8 __u, __m512i __a, __m512i
__b) {
+ // CHECK-LABEL: @test_mm512_mask_cmp_eq_epi64_mask
// CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}
// CHECK: and <8 x i1> %{{.*}}, %{{.*}}
- return (__mmask8)_mm512_mask_cmp_epi64_mask(__u, __a, __b, 0);
+ return (__mmask8)_mm512_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ);
}
__mmask16 test_mm512_cmp_epu32_mask(__m512i __a, __m512i __b) {
Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=277955&r1=277954&r2=277955&view=diff
==
--- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Sun Aug 7 05:43:04 2016
@@ -501,56 +501,56 @@ __mmask8 test_mm256_mask_cmpneq_epu64_ma
return (__mmask8)_mm256_mask_cmpneq_epu64_mask(__u, __a, __b);
}
-__mmask8 test_mm_cmp_epi32_mask(__m128i __a, __m128i __b) {
- // CHECK-LABEL: @test_mm_cmp_epi32_mask
+__mmask8 test_mm_cmp_eq_epi32_mask(__m128i __a, __m128i __b) {
+ // CHECK-LABEL: @test_mm_cmp_eq_epi32_mask
// CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}}
- return (__mmask8)_mm_cmp_epi32_mask(__a, __b, 0);
+ return (__mmask8)_mm_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);
}
-__mmask8 test_mm_mask_cmp_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
- // CHECK-LABEL: @test_mm_
Re: [PATCH] D20521: [Clang][AVX512][Builtin] adding missing intrinsics for vpmultishiftqb{128|256|512} instruction set
AsafBadouh accepted this revision. AsafBadouh added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D20521 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20523: [Clang][AVX512][BUILTIN] Add missing intrinsics for cast .
AsafBadouh accepted this revision. AsafBadouh added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D20523 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D20562: [Clang][AVX512][BUILTIN] Adding intrinsics for set1
AsafBadouh accepted this revision.
AsafBadouh added a comment.
This revision is now accepted and ready to land.
LGTM with small fix
Comment at: test/CodeGen/avx512f-builtins.c:341
@@ +340,3 @@
+ // CHECK: insertelement <64 x i8> {{.*}}, i32 6
+ // CHECK: insertelement <64 x i8> {{.*}}, i32 7
+ return _mm512_set1_epi8(d);
can you add
// CHECK: insertelement <64 x i8> {{.*}}, i32 63
Comment at: test/CodeGen/avx512f-builtins.c:356
@@ +355,3 @@
+ // CHECK: insertelement <32 x i16> {{.*}}, i32 7
+ return _mm512_set1_epi16(d);
+}
same here:
// CHECK: insertelement <32 x i16> {{.*}}, i32 31
http://reviews.llvm.org/D20562
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[PATCH] D20861: [AVX512] add missing integer to float conversion
AsafBadouh created this revision.
AsafBadouh added reviewers: m_zuckerman, opaparo, igorb, delena, craig.topper.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
I used SSE intrinsics to implement some of the conversion.
for example:
```
#define _mm_cvtss_i32 _mm_cvtss_si32
```
Backend will generate avx512 asm in cases we compile with avx512f flag.
Repository:
rL LLVM
http://reviews.llvm.org/D20861
Files:
tools/clang/lib/Headers/avx512fintrin.h
tools/clang/test/CodeGen/avx512f-builtins.c
Index: tools/clang/lib/Headers/avx512fintrin.h
===
--- tools/clang/lib/Headers/avx512fintrin.h
+++ tools/clang/lib/Headers/avx512fintrin.h
@@ -9267,6 +9267,33 @@
(__v4sf)_mm_setzero_ps(), \
(__mmask8)(U), (int)(R)); })
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_cvtsd_ss (__m128 W, __mmask8 U, __m128 A, __m128d B)
+{
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
+ (__v2df)(B),
+ (__v4sf)(W),
+ (__mmask8)(U), _MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_cvtsd_ss (__mmask8 U, __m128 A, __m128d B)
+{
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
+ (__v2df)(B),
+ (__v4sf)_mm_setzero_ps(),
+ (__mmask8)(U), _MM_FROUND_CUR_DIRECTION);
+}
+
+#define _mm_cvtss_i32 _mm_cvtss_si32
+#define _mm_cvtss_i64 _mm_cvtss_si64
+#define _mm_cvtsd_i32 _mm_cvtsd_si32
+#define _mm_cvtsd_i64 _mm_cvtsd_si64
+#define _mm_cvti32_sd _mm_cvtsi32_sd
+#define _mm_cvti64_sd _mm_cvtsi64_sd
+#define _mm_cvti32_ss _mm_cvtsi32_ss
+#define _mm_cvti64_ss _mm_cvtsi64_ss
+
#define _mm_cvt_roundi64_sd(A, B, R) __extension__ ({ \
(__m128d)__builtin_ia32_cvtsi2sd64((__v2df)(__m128d)(A), (long long)(B), \
(int)(R)); })
@@ -9308,6 +9335,24 @@
(__mmask8)(U), (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_cvtss_sd (__m128d W, __mmask8 U, __m128d A, __m128 B)
+{
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
+ (__v4sf)(B),
+ (__v2df)(W),
+ (__mmask8)(U), _MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_cvtss_sd (__mmask8 U, __m128d A, __m128 B)
+{
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
+ (__v4sf)(B),
+ (__v2df)_mm_setzero_pd(),
+ (__mmask8)(U), _MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtu32_sd (__m128d __A, unsigned __B)
{
return (__m128d) __builtin_ia32_cvtusi2sd32 ((__v2df) __A, __B);
Index: tools/clang/test/CodeGen/avx512f-builtins.c
===
--- tools/clang/test/CodeGen/avx512f-builtins.c
+++ tools/clang/test/CodeGen/avx512f-builtins.c
@@ -7202,3 +7202,80 @@
return _mm512_setr_ps( __A, __B, __C, __D, __E, __F, __G, __H,
__I, __J, __K, __L, __M, __N, __O, __P);
}
+
+int test_mm_cvtss_i32(__m128 A) {
+ // CHECK-LABEL: test_mm_cvtss_i32
+ // CHECK: call i32 @llvm.x86.sse.cvtss2si(<4 x float> %{{.*}})
+ return _mm_cvtss_i32(A);
+}
+
+long long test_mm_cvtss_i64(__m128 A) {
+ // CHECK-LABEL: test_mm_cvtss_i64
+ // CHECK: call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %{{.*}})
+ return _mm_cvtss_i64(A);
+}
+
+__m128d test_mm_cvti32_sd(__m128d A, int B) {
+ // CHECK-LABEL: test_mm_cvti32_sd
+ // CHECK: sitofp i32 %{{.*}} to double
+ // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
+ return _mm_cvti32_sd(A, B);
+}
+
+__m128d test_mm_cvti64_sd(__m128d A, long long B) {
+ // CHECK-LABEL: test_mm_cvti64_sd
+ // CHECK: sitofp i64 %{{.*}} to double
+ // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
+ return _mm_cvti64_sd(A, B);
+}
+
+__m128 test_mm_cvti32_ss(__m128 A, int B) {
+ // CHECK-LABEL: test_mm_cvti32_ss
+ // CHECK: sitofp i32 %{{.*}} to float
+ // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 0
+ return _mm_cvti32_ss(A, B);
+}
+
+__m128 test_mm_cvti64_ss(__m128 A, long long B) {
+ // CHECK-LABEL: test_mm_cvti64_ss
+ // CHECK: sitofp i64 %{{.*}} to float
+ // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 0
+ return _mm_cvti64_ss(A, B);
+}
+
+int test_mm_cvtsd_i32(__m128d A) {
+ // CHECK-LABEL: test_mm_cvtsd_i32
+ // CHECK: call i32 @ll
Re: [PATCH] D20810: [Clang][Intrinsics][avx512] Continue Adding round cvt to clang
AsafBadouh accepted this revision.
AsafBadouh added a comment.
This revision is now accepted and ready to land.
minor fixes, LGTM
Comment at: lib/Headers/avx512fintrin.h:3658
@@ +3657,3 @@
+_mm256_undefined_si256 (),\
+-1);\
+})
please add (__mmask16)
Comment at: lib/Headers/avx512fintrin.h:3669
@@ +3668,3 @@
+#define _mm512_maskz_cvt_roundps_ph( __W, __A, __I) __extension__ ({ \
+__builtin_ia32_vcvtps2ph512_mask ((__v16sf)( __A),\
+ ( __I),\
please add casting to return type (__m256i)
same for the rest
Comment at: test/CodeGen/avx512f-builtins.c:3121
@@ +3120,3 @@
+// CHECK: @llvm.x86.avx512.mask.cvttps2udq.512
+
+return _mm512_mask_cvtt_roundps_epu32(__W, __U, __A,
_MM_FROUND_CUR_DIRECTION);
remove empty line
Comment at: test/CodeGen/avx512f-builtins.c:3129
@@ +3128,3 @@
+// CHECK: @llvm.x86.avx512.mask.cvttps2udq.512
+
+return _mm512_maskz_cvtt_roundps_epu32(__U, __A, _MM_FROUND_CUR_DIRECTION);
remove empty line
http://reviews.llvm.org/D20810
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Re: [PATCH] D20866: [Clang][AVX512]Adding set4 intrinsics
AsafBadouh added inline comments.
Comment at: test/CodeGen/avx512f-builtins.c:6161
@@ +6160,3 @@
+
+__m512i test_mm512_setr4_epi32(e0,e1,e2,e3)
+{
types are missing
http://reviews.llvm.org/D20866
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r271499 - [X86][AVX512] add intrinsics of Scalar FP to integer
Author: abadouh
Date: Thu Jun 2 03:11:35 2016
New Revision: 271499
URL: http://llvm.org/viewvc/llvm-project?rev=271499&view=rev
Log:
[X86][AVX512] add intrinsics of Scalar FP to integer
Differential Revision: http://reviews.llvm.org/D20861
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=271499&r1=271498&r2=271499&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Thu Jun 2 03:11:35 2016
@@ -9331,6 +9331,33 @@ _mm512_mask_compressstoreu_epi32 (void *
(__v4sf)_mm_setzero_ps(), \
(__mmask8)(U), (int)(R)); })
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_cvtsd_ss (__m128 W, __mmask8 U, __m128 A, __m128d B)
+{
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
+ (__v2df)(B),
+ (__v4sf)(W),
+ (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_cvtsd_ss (__mmask8 U, __m128 A, __m128d B)
+{
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
+ (__v2df)(B),
+ (__v4sf)_mm_setzero_ps(),
+ (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+}
+
+#define _mm_cvtss_i32 _mm_cvtss_si32
+#define _mm_cvtss_i64 _mm_cvtss_si64
+#define _mm_cvtsd_i32 _mm_cvtsd_si32
+#define _mm_cvtsd_i64 _mm_cvtsd_si64
+#define _mm_cvti32_sd _mm_cvtsi32_sd
+#define _mm_cvti64_sd _mm_cvtsi64_sd
+#define _mm_cvti32_ss _mm_cvtsi32_ss
+#define _mm_cvti64_ss _mm_cvtsi64_ss
+
#define _mm_cvt_roundi64_sd(A, B, R) __extension__ ({ \
(__m128d)__builtin_ia32_cvtsi2sd64((__v2df)(__m128d)(A), (long long)(B), \
(int)(R)); })
@@ -9372,6 +9399,24 @@ _mm512_mask_compressstoreu_epi32 (void *
(__mmask8)(U), (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_cvtss_sd (__m128d W, __mmask8 U, __m128d A, __m128 B)
+{
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
+ (__v4sf)(B),
+ (__v2df)(W),
+ (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_cvtss_sd (__mmask8 U, __m128d A, __m128 B)
+{
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
+ (__v4sf)(B),
+ (__v2df)_mm_setzero_pd(),
+ (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtu32_sd (__m128d __A, unsigned __B)
{
return (__m128d) __builtin_ia32_cvtusi2sd32 ((__v2df) __A, __B);
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=271499&r1=271498&r2=271499&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Thu Jun 2 03:11:35 2016
@@ -7266,3 +7266,80 @@ __m512 test_mm512_setr_ps (float __A, fl
return _mm512_setr_ps( __A, __B, __C, __D, __E, __F, __G, __H,
__I, __J, __K, __L, __M, __N, __O, __P);
}
+
+int test_mm_cvtss_i32(__m128 A) {
+ // CHECK-LABEL: test_mm_cvtss_i32
+ // CHECK: call i32 @llvm.x86.sse.cvtss2si(<4 x float> %{{.*}})
+ return _mm_cvtss_i32(A);
+}
+
+long long test_mm_cvtss_i64(__m128 A) {
+ // CHECK-LABEL: test_mm_cvtss_i64
+ // CHECK: call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %{{.*}})
+ return _mm_cvtss_i64(A);
+}
+
+__m128d test_mm_cvti32_sd(__m128d A, int B) {
+ // CHECK-LABEL: test_mm_cvti32_sd
+ // CHECK: sitofp i32 %{{.*}} to double
+ // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
+ return _mm_cvti32_sd(A, B);
+}
+
+__m128d test_mm_cvti64_sd(__m128d A, long long B) {
+ // CHECK-LABEL: test_mm_cvti64_sd
+ // CHECK: sitofp i64 %{{.*}} to double
+ // CHECK: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0
+ return _mm_cvti64_sd(A, B);
+}
+
+__m128 test_mm_cvti32_ss(__m128 A, int B) {
+ // CHECK-LABEL: test_mm_cvti32_ss
+ // CHECK: sitofp i32 %{{.*}} to float
+ // CHECK: insertelement <4 x float> %{{.*}}, float %{{.*}}, i32 0
+ return _mm_cvti32_ss(A, B);
+}
+
+__m128 test_mm_cvti64_ss(__m128 A, long long B) {
+ // CHECK-LABEL: test_mm_cvti64_ss
+
Re: [PATCH] D20866: [Clang][AVX512]Adding set4 intrinsics
AsafBadouh accepted this revision. AsafBadouh added a comment. This revision is now accepted and ready to land. LGTM http://reviews.llvm.org/D20866 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r272549 - [X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter
Author: abadouh
Date: Mon Jun 13 10:15:57 2016
New Revision: 272549
URL: http://llvm.org/viewvc/llvm-project?rev=272549&view=rev
Log:
[X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter
CR: Michael Zuckerman
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=272549&r1=272548&r2=272549&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Mon Jun 13 10:15:57 2016
@@ -1585,7 +1585,7 @@ _mm512_sqrt_ps(__m512 __a)
}
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_mask_sqrt_ps(__m512 __W, __mmask8 __U, __m512 __A)
+_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)
{
return (__m512)__builtin_ia32_sqrtps512_mask((__v16sf)__A,
(__v16sf) __W,
@@ -1594,7 +1594,7 @@ _mm512_mask_sqrt_ps(__m512 __W, __mmask8
}
static __inline__ __m512 __DEFAULT_FN_ATTRS
-_mm512_maskz_sqrt_ps( __mmask8 __U, __m512 __A)
+_mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)
{
return (__m512)__builtin_ia32_sqrtps512_mask((__v16sf)__A,
(__v16sf) _mm512_setzero_ps (),
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=272549&r1=272548&r2=272549&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Mon Jun 13 10:15:57 2016
@@ -54,14 +54,14 @@ __m512 test_mm512_sqrt_ps(__m512 a)
return _mm512_sqrt_ps(a);
}
-__m512 test_mm512_mask_sqrt_ps(__m512 __W, __mmask8 __U, __m512 __A)
+__m512 test_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)
{
// CHECK-LABEL: @test_mm512_mask_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.512
return _mm512_mask_sqrt_ps( __W, __U, __A);
}
-__m512 test_mm512_maskz_sqrt_ps( __mmask8 __U, __m512 __A)
+__m512 test_mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)
{
// CHECK-LABEL: @test_mm512_maskz_sqrt_ps
// CHECK: @llvm.x86.avx512.mask.sqrt.ps.512
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[PATCH] D21504: [X86] add _mm_loadu_si64
AsafBadouh created this revision.
AsafBadouh added reviewers: delena, igorb, m_zuckerman.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
Repository:
rL LLVM
http://reviews.llvm.org/D21504
Files:
tools/clang/lib/Headers/emmintrin.h
tools/clang/test/CodeGen/sse2-builtins.c
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,14 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %4, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ // CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16
+ // CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16
+ return _mm_loadu_si64(A);
+}
+
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,14 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %4, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ // CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16
+ // CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16
+ return _mm_loadu_si64(A);
+}
+
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Re: [PATCH] D21504: [X86] add _mm_loadu_si64
AsafBadouh updated this revision to Diff 61200.
AsafBadouh added a comment.
small changes according to Simon review.
Repository:
rL LLVM
http://reviews.llvm.org/D21504
Files:
tools/clang/lib/Headers/emmintrin.h
tools/clang/test/CodeGen/sse2-builtins.c
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
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Re: [PATCH] D21504: [X86] add _mm_loadu_si64
AsafBadouh updated this revision to Diff 61661.
AsafBadouh added a comment.
add align to CHECK
Repository:
rL LLVM
http://reviews.llvm.org/D21504
Files:
tools/clang/lib/Headers/emmintrin.h
tools/clang/test/CodeGen/sse2-builtins.c
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %{{.*}}, align 1
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %{{.*}}, align 1
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
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Re: [PATCH] D21504: [X86] add _mm_loadu_si64
AsafBadouh updated this revision to Diff 61903.
Repository:
rL LLVM
http://reviews.llvm.org/D21504
Files:
tools/clang/lib/Headers/emmintrin.h
tools/clang/test/CodeGen/sse2-builtins.c
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %{{.*}}, align 1{{$}}
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
Index: tools/clang/lib/Headers/emmintrin.h
===
--- tools/clang/lib/Headers/emmintrin.h
+++ tools/clang/lib/Headers/emmintrin.h
@@ -505,6 +505,16 @@
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Index: tools/clang/test/CodeGen/sse2-builtins.c
===
--- tools/clang/test/CodeGen/sse2-builtins.c
+++ tools/clang/test/CodeGen/sse2-builtins.c
@@ -1520,3 +1520,12 @@
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %{{.*}}, align 1{{$}}
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
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r273812 - [X86] add _mm_loadu_si64
Author: abadouh
Date: Sun Jun 26 08:51:54 2016
New Revision: 273812
URL: http://llvm.org/viewvc/llvm-project?rev=273812&view=rev
Log:
[X86] add _mm_loadu_si64
Differential Revision: http://reviews.llvm.org/D21504
Modified:
cfe/trunk/lib/Headers/emmintrin.h
cfe/trunk/test/CodeGen/sse2-builtins.c
Modified: cfe/trunk/lib/Headers/emmintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/emmintrin.h?rev=273812&r1=273811&r2=273812&view=diff
==
--- cfe/trunk/lib/Headers/emmintrin.h (original)
+++ cfe/trunk/lib/Headers/emmintrin.h Sun Jun 26 08:51:54 2016
@@ -505,6 +505,16 @@ _mm_loadu_pd(double const *__dp)
return ((struct __loadu_pd*)__dp)->__v;
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_loadu_si64(void const *__a)
+{
+ struct __loadu_si64 {
+long long __v;
+ } __attribute__((__packed__, __may_alias__));
+ long long __u = ((struct __loadu_si64*)__a)->__v;
+ return (__m128i){__u, 0L};
+}
+
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const *__dp)
{
Modified: cfe/trunk/test/CodeGen/sse2-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/sse2-builtins.c?rev=273812&r1=273811&r2=273812&view=diff
==
--- cfe/trunk/test/CodeGen/sse2-builtins.c (original)
+++ cfe/trunk/test/CodeGen/sse2-builtins.c Sun Jun 26 08:51:54 2016
@@ -1532,3 +1532,12 @@ __m128i test_mm_xor_si128(__m128i A, __m
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128i test_mm_loadu_si64(void const* A) {
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %{{.*}}, align 1{{$}}
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
+ return _mm_loadu_si64(A);
+}
+
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[PATCH] D21973: [AVX512] add float/double abs intrinsics
AsafBadouh created this revision.
AsafBadouh added reviewers: igorb, craig.topper, m_zuckerman, guyblank.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
add abs intrinsics that use native LLVM-IR.
change and_epi{32|64} to use select intrinsic.
Repository:
rL LLVM
http://reviews.llvm.org/D21973
Files:
../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
Index: ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
+++ ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
@@ -515,19 +515,16 @@
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandd512_mask((__v16si) __a,
- (__v16si) __b,
- (__v16si) __src,
- (__mmask16) __k);
+ return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __k,
+(__v16si) _mm512_and_epi32(__a, __b),
+(__v16si) __src);
}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandd512_mask((__v16si) __a,
- (__v16si) __b,
- (__v16si)
- _mm512_setzero_si512 (),
- (__mmask16) __k);
+ return (__m512i) _mm512_mask_and_epi32(_mm512_setzero_si512 (),
+ __k, __a, __b);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
@@ -539,19 +536,16 @@
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandq512_mask ((__v8di) __a,
- (__v8di) __b,
- (__v8di) __src,
- (__mmask8) __k);
+return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k,
+(__v8di) _mm512_and_epi64(__a, __b),
+(__v8di) __src);
}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandq512_mask ((__v8di) __a,
- (__v8di) __b,
- (__v8di)
- _mm512_setzero_si512 (),
- (__mmask8) __k);
+ return (__m512i) _mm512_mask_and_epi64((__v8di)_mm512_setzero_si512 (),
+ __k, __a, __b);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
@@ -9498,6 +9492,30 @@
_mm512_set_ps((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6),(e5), \
(e4),(e3),(e2),(e1),(e0))
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_abs_ps(__m512 A)
+{
+ return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+}
+
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_mask_abs_ps(__m512 W, __mmask16 K, __m512 A)
+{
+ return (__m512)_mm512_mask_and_epi32((__m512i)W, K, _mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+}
+
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_abs_pd(__m512d A)
+{
+ return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)A) ;
+}
+
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_mask_abs_pd(__m512d W, __mmask8 K, __m512d A)
+{
+ return (__m512d)_mm512_mask_and_epi64((__v8di)W, K, _mm512_set1_epi64(0x7FFF),(__v8di)A);
+}
+
#undef __DEFAULT_FN_ATTRS
#endif // __AVX512FINTRIN_H
Index: ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
===
--- ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
+++ ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
@@ -1410,25 +1410,29 @@
__m512i test_mm512_mask_and_epi32(__m512i __src,__mmask16 __k, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_mask_and_epi32
- // CHECK: @llvm.x86.avx512.mask.pand.d.512
+ // CHECK: and <16 x i32>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_mask_and_epi32(__src, __k,__a, __b);
}
__m512i test_mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_maskz_and_epi32
- // CHECK: @llvm.x86.avx512.mask.pand.d.512
+ // CHECK: and <16 x i32>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_maskz_and_epi32(__k,__a, __b);
}
__m512i test_mm512_mask_and_epi64(__m512i __src,__mmask8 __k, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_mask_and_epi64
- // CHECK: @llvm.x86.avx512.mask.pand.q.512
+ // CHECK: and <8 x i64>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
return _mm512_mask_and_epi64(__src, __k,__a, __b);
}
__m512i test_mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_maskz_and_e
[PATCH] D21988: [AVX512] minor fix in sqrt{ss|sd} intrinsics arguments
AsafBadouh created this revision.
AsafBadouh added reviewers: m_zuckerman, guyblank, delena.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
Repository:
rL LLVM
http://reviews.llvm.org/D21988
Files:
../llvm/tools/clang/lib/Headers/avx512fintrin.h
Index: ../llvm/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../llvm/tools/clang/lib/Headers/avx512fintrin.h
+++ ../llvm/tools/clang/lib/Headers/avx512fintrin.h
@@ -7208,62 +7208,62 @@
(__mmask16)(U)); })
#define _mm_sqrt_round_sd(A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)_mm_setzero_pd(), \
(__mmask8)-1, (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mask_sqrt_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
{
- return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __B,
- (__v2df) __A,
+ return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A,
+ (__v2df) __B,
(__v2df) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_mask_sqrt_round_sd(W, U, A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)(__m128d)(W), \
(__mmask8)(U), (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maskz_sqrt_sd (__mmask8 __U, __m128d __A, __m128d __B)
{
- return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __B,
- (__v2df) __A,
+ return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A,
+ (__v2df) __B,
(__v2df) _mm_setzero_pd (),
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_maskz_sqrt_round_sd(U, A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)_mm_setzero_pd(), \
(__mmask8)(U), (int)(R)); })
#define _mm_sqrt_round_ss(A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
(__mmask8)-1, (int)(R)); })
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_sqrt_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
{
- return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __B,
- (__v4sf) __A,
+ return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __A,
+ (__v4sf) __B,
(__v4sf) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_mask_sqrt_round_ss(W, U, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)(__m128)(W), (__mmask8)(U),
\
(int)(R)); })
@@ -7278,8 +7278,8 @@
}
#define _mm_maskz_sqrt_round_ss(U, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
(__mmask8)(U), (int)(R)); })
Index: ../llvm/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../llvm/tools/clang/lib/Headers/avx512fi
Re: [PATCH] D21973: [AVX512] add float/double abs intrinsics
AsafBadouh added inline comments.
Comment at: ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c:1413-1414
@@ -1412,3 +1412,4 @@
// CHECK-LABEL: @test_mm512_mask_and_epi32
- // CHECK: @llvm.x86.avx512.mask.pand.d.512
+ // CHECK: and <16 x i32>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_mask_and_epi32(__src, __k,__a, __b);
delena wrote:
> The right thing to do here:
>
> // CHECK: %[[MASK:.*]] = bitcast
> // CHECK: %[[AND_RES:.*]] = and <16 x i32>
> // CHECK: select <16 x i1> %[[MASK]], <16 x i32>%[[AND_RES]]
>
> Up to you.
will do,
thanks for the review!
Repository:
rL LLVM
http://reviews.llvm.org/D21973
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r274541 - [AVX512] minor fix in sqrt{ss|sd} intrinsics arguments
Author: abadouh
Date: Tue Jul 5 06:36:21 2016
New Revision: 274541
URL: http://llvm.org/viewvc/llvm-project?rev=274541&view=rev
Log:
[AVX512] minor fix in sqrt{ss|sd} intrinsics arguments
Differential Revision: http://reviews.llvm.org/D21988
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=274541&r1=274540&r2=274541&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Tue Jul 5 06:36:21 2016
@@ -7208,62 +7208,62 @@ _mm_maskz_scalef_ss (__mmask8 __U, __m12
(__mmask16)(U)); })
#define _mm_sqrt_round_sd(A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)_mm_setzero_pd(), \
(__mmask8)-1, (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mask_sqrt_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
{
- return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __B,
- (__v2df) __A,
+ return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A,
+ (__v2df) __B,
(__v2df) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_mask_sqrt_round_sd(W, U, A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)(__m128d)(W), \
(__mmask8)(U), (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maskz_sqrt_sd (__mmask8 __U, __m128d __A, __m128d __B)
{
- return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __B,
- (__v2df) __A,
+ return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A,
+ (__v2df) __B,
(__v2df) _mm_setzero_pd (),
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_maskz_sqrt_round_sd(U, A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(B), \
-(__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \
+(__v2df)(__m128d)(B), \
(__v2df)_mm_setzero_pd(), \
(__mmask8)(U), (int)(R)); })
#define _mm_sqrt_round_ss(A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
(__mmask8)-1, (int)(R)); })
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_sqrt_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
{
- return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __B,
- (__v4sf) __A,
+ return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __A,
+ (__v4sf) __B,
(__v4sf) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_mask_sqrt_round_ss(W, U, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)(__m128)(W), (__mmask8)(U),
\
(int)(R)); })
@@ -7278,8 +7278,8 @@ _mm_maskz_sqrt_ss (__mmask8 __U, __m128
}
#define _mm_maskz_sqrt_round_ss(U, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(B), \
- (__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \
+ (__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
r274542 - [X86][AVX512F] add float/double abs intrinsics
Author: abadouh
Date: Tue Jul 5 07:24:14 2016
New Revision: 274542
URL: http://llvm.org/viewvc/llvm-project?rev=274542&view=rev
Log:
[X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic
Differential Revision: http://reviews.llvm.org/D21973
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
cfe/trunk/test/CodeGen/avx512f-builtins.c
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=274542&r1=274541&r2=274542&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Tue Jul 5 07:24:14 2016
@@ -515,19 +515,16 @@ _mm512_and_epi32(__m512i __a, __m512i __
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandd512_mask((__v16si) __a,
- (__v16si) __b,
- (__v16si) __src,
- (__mmask16) __k);
+ return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __k,
+(__v16si) _mm512_and_epi32(__a, __b),
+(__v16si) __src);
}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandd512_mask((__v16si) __a,
- (__v16si) __b,
- (__v16si)
- _mm512_setzero_si512 (),
- (__mmask16) __k);
+ return (__m512i) _mm512_mask_and_epi32(_mm512_setzero_si512 (),
+ __k, __a, __b);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
@@ -539,19 +536,16 @@ _mm512_and_epi64(__m512i __a, __m512i __
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandq512_mask ((__v8di) __a,
- (__v8di) __b,
- (__v8di) __src,
- (__mmask8) __k);
+return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k,
+(__v8di) _mm512_and_epi64(__a, __b),
+(__v8di) __src);
}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b)
{
- return (__m512i) __builtin_ia32_pandq512_mask ((__v8di) __a,
- (__v8di) __b,
- (__v8di)
- _mm512_setzero_si512 (),
- (__mmask8) __k);
+ return (__m512i) _mm512_mask_and_epi64((__v8di)_mm512_setzero_si512 (),
+ __k, __a, __b);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
@@ -9539,6 +9533,30 @@ _mm512_set_ps (float __A, float __B, flo
_mm512_set_ps((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6),(e5), \
(e4),(e3),(e2),(e1),(e0))
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_abs_ps(__m512 A)
+{
+ return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+}
+
+static __inline__ __m512 __DEFAULT_FN_ATTRS
+_mm512_mask_abs_ps(__m512 W, __mmask16 K, __m512 A)
+{
+ return (__m512)_mm512_mask_and_epi32((__m512i)W, K,
_mm512_set1_epi32(0x7FFF),(__m512i)A) ;
+}
+
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_abs_pd(__m512d A)
+{
+ return
(__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFF),(__v8di)A) ;
+}
+
+static __inline__ __m512d __DEFAULT_FN_ATTRS
+_mm512_mask_abs_pd(__m512d W, __mmask8 K, __m512d A)
+{
+ return (__m512d)_mm512_mask_and_epi64((__v8di)W, K,
_mm512_set1_epi64(0x7FFF),(__v8di)A);
+}
+
#undef __DEFAULT_FN_ATTRS
#endif // __AVX512FINTRIN_H
Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=274542&r1=274541&r2=274542&view=diff
==
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Tue Jul 5 07:24:14 2016
@@ -1410,25 +1410,33 @@ __mmask8 test_mm512_mask_cmp_epu64_mask(
__m512i test_mm512_mask_and_epi32(__m512i __src,__mmask16 __k, __m512i __a,
__m512i __b) {
// CHECK-LABEL: @test_mm512_mask_and_epi32
- // CHECK: @llvm.x86.avx512.mask.pand.d.512
+ // CHECK: and <16 x i32>
+ // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_mask_and_epi32(__src, __k,__a, __b);
}
__m512i test_mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_maskz_and_epi32
- // CHECK: @llvm.x86.avx512.mask.pand.d.512
+ // CHECK: and <16 x i32>
+ // CHECK: %[[MASK:.*]] = bitcast i16 %{{.*}} to <16 x i1>
+ // CHECK: select <16 x i1> %[[MASK]], <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
[PATCH] D22212: [X86][AVX512] Constants for integer comparison predicates
AsafBadouh created this revision.
AsafBadouh added reviewers: guyblank, m_zuckerman, delena.
AsafBadouh added a subscriber: cfe-commits.
AsafBadouh set the repository for this revision to rL LLVM.
Repository:
rL LLVM
http://reviews.llvm.org/D22212
Files:
../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
../tunkClang/tools/clang/test/CodeGen/avx512vl-builtins.c
Index: ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
===
--- ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
+++ ../tunkClang/tools/clang/lib/Headers/avx512fintrin.h
@@ -54,6 +54,19 @@
#define _MM_FROUND_TO_ZERO 0x03
#define _MM_FROUND_CUR_DIRECTION0x04
+/* Constants for integer comparison predicates */
+typedef enum {
+_MM_CMPINT_EQ, /* Equal */
+_MM_CMPINT_LT, /* Less than */
+_MM_CMPINT_LE, /* Less than or Equal */
+_MM_CMPINT_UNUSED,
+_MM_CMPINT_NE, /* Not Equal */
+_MM_CMPINT_NLT, /* Not Less than */
+#define _MM_CMPINT_GE _MM_CMPINT_NLT /* Greater than or Equal */
+_MM_CMPINT_NLE /* Not Less than or Equal */
+#define _MM_CMPINT_GT _MM_CMPINT_NLE /* Greater than */
+} _MM_CMPINT_ENUM;
+
typedef enum
{
_MM_PERM_ = 0x00, _MM_PERM_AAAB = 0x01, _MM_PERM_AAAC = 0x02,
Index: ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
===
--- ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
+++ ../tunkClang/tools/clang/test/CodeGen/avx512f-builtins.c
@@ -1359,27 +1359,27 @@
__mmask16 test_mm512_cmp_epi32_mask(__m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_cmp_epi32_mask
// CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}
- return (__mmask16)_mm512_cmp_epi32_mask(__a, __b, 0);
+ return (__mmask16)_mm512_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);
}
__mmask16 test_mm512_mask_cmp_epi32_mask(__mmask16 __u, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_mask_cmp_epi32_mask
// CHECK: icmp eq <16 x i32> %{{.*}}, %{{.*}}
// CHECK: and <16 x i1> %{{.*}}, %{{.*}}
- return (__mmask16)_mm512_mask_cmp_epi32_mask(__u, __a, __b, 0);
+ return (__mmask16)_mm512_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_EQ);
}
__mmask8 test_mm512_cmp_epi64_mask(__m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_cmp_epi64_mask
// CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}
- return (__mmask8)_mm512_cmp_epi64_mask(__a, __b, 0);
+ return (__mmask8)_mm512_cmp_epi64_mask(__a, __b, _MM_CMPINT_EQ);
}
__mmask8 test_mm512_mask_cmp_epi64_mask(__mmask8 __u, __m512i __a, __m512i __b) {
// CHECK-LABEL: @test_mm512_mask_cmp_epi64_mask
// CHECK: icmp eq <8 x i64> %{{.*}}, %{{.*}}
// CHECK: and <8 x i1> %{{.*}}, %{{.*}}
- return (__mmask8)_mm512_mask_cmp_epi64_mask(__u, __a, __b, 0);
+ return (__mmask8)_mm512_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ);
}
__mmask16 test_mm512_cmp_epu32_mask(__m512i __a, __m512i __b) {
Index: ../tunkClang/tools/clang/test/CodeGen/avx512vl-builtins.c
===
--- ../tunkClang/tools/clang/test/CodeGen/avx512vl-builtins.c
+++ ../tunkClang/tools/clang/test/CodeGen/avx512vl-builtins.c
@@ -504,53 +504,53 @@
__mmask8 test_mm_cmp_epi32_mask(__m128i __a, __m128i __b) {
// CHECK-LABEL: @test_mm_cmp_epi32_mask
// CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}}
- return (__mmask8)_mm_cmp_epi32_mask(__a, __b, 0);
+ return (__mmask8)_mm_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);
}
__mmask8 test_mm_mask_cmp_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) {
// CHECK-LABEL: @test_mm_mask_cmp_epi32_mask
- // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}}
+ // CHECK: icmp slt <4 x i32> %{{.*}}, %{{.*}}
// CHECK: and <4 x i1> %{{.*}}, %{{.*}}
- return (__mmask8)_mm_mask_cmp_epi32_mask(__u, __a, __b, 0);
+ return (__mmask8)_mm_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_LT);
}
__mmask8 test_mm_cmp_epi64_mask(__m128i __a, __m128i __b) {
// CHECK-LABEL: @test_mm_cmp_epi64_mask
- // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}}
- return (__mmask8)_mm_cmp_epi64_mask(__a, __b, 0);
+ // CHECK: icmp slt <2 x i64> %{{.*}}, %{{.*}}
+ return (__mmask8)_mm_cmp_epi64_mask(__a, __b, _MM_CMPINT_LT);
}
__mmask8 test_mm_mask_cmp_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) {
// CHECK-LABEL: @test_mm_mask_cmp_epi64_mask
// CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}}
// CHECK: and <2 x i1> %{{.*}}, %{{.*}}
- return (__mmask8)_mm_mask_cmp_epi64_mask(__u, __a, __b, 0);
+ return (__mmask8)_mm_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ);
}
__mmask8 test_mm256_cmp_epi32_mask(__m256i __a, __m256i __b) {
// CHECK-LABEL: @test_mm256_cmp_epi32_mask
// CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}}
- return (__mmask8)_mm256_cmp_epi32_mask(__a, __b, 0);
+ return (__mmask8)_mm256_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ);
}
__mmask
r275384 - [X86][AVX512F] minor fix of the parameter names
Author: abadouh
Date: Thu Jul 14 03:40:30 2016
New Revision: 275384
URL: http://llvm.org/viewvc/llvm-project?rev=275384&view=rev
Log:
[X86][AVX512F] minor fix of the parameter names
add "__" prefix
Modified:
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=275384&r1=275383&r2=275384&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Thu Jul 14 03:40:30 2016
@@ -9323,21 +9323,21 @@ _mm512_mask_compressstoreu_epi32 (void *
(__mmask8)(U), (int)(R)); })
static __inline__ __m128 __DEFAULT_FN_ATTRS
-_mm_mask_cvtsd_ss (__m128 W, __mmask8 U, __m128 A, __m128d B)
+_mm_mask_cvtsd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128d __B)
{
- return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
- (__v2df)(B),
- (__v4sf)(W),
- (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(__A),
+ (__v2df)(__B),
+ (__v4sf)(__W),
+ (__mmask8)(__U),
_MM_FROUND_CUR_DIRECTION);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS
-_mm_maskz_cvtsd_ss (__mmask8 U, __m128 A, __m128d B)
+_mm_maskz_cvtsd_ss (__mmask8 __U, __m128 __A, __m128d __B)
{
- return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(A),
- (__v2df)(B),
+ return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)(__A),
+ (__v2df)(__B),
(__v4sf)_mm_setzero_ps(),
- (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+ (__mmask8)(__U),
_MM_FROUND_CUR_DIRECTION);
}
#define _mm_cvtss_i32 _mm_cvtss_si32
@@ -9390,21 +9390,21 @@ _mm_maskz_cvtsd_ss (__mmask8 U, __m128 A
(__mmask8)(U), (int)(R)); })
static __inline__ __m128d __DEFAULT_FN_ATTRS
-_mm_mask_cvtss_sd (__m128d W, __mmask8 U, __m128d A, __m128 B)
+_mm_mask_cvtss_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128 __B)
{
- return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
- (__v4sf)(B),
- (__v2df)(W),
- (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(__A),
+ (__v4sf)(__B),
+ (__v2df)(__W),
+ (__mmask8)(__U),
_MM_FROUND_CUR_DIRECTION);
}
static __inline__ __m128d __DEFAULT_FN_ATTRS
-_mm_maskz_cvtss_sd (__mmask8 U, __m128d A, __m128 B)
+_mm_maskz_cvtss_sd (__mmask8 __U, __m128d __A, __m128 __B)
{
- return __builtin_ia32_cvtss2sd_round_mask((__v2df)(A),
- (__v4sf)(B),
+ return __builtin_ia32_cvtss2sd_round_mask((__v2df)(__A),
+ (__v4sf)(__B),
(__v2df)_mm_setzero_pd(),
- (__mmask8)(U),
_MM_FROUND_CUR_DIRECTION);
+ (__mmask8)(__U),
_MM_FROUND_CUR_DIRECTION);
}
static __inline__ __m128d __DEFAULT_FN_ATTRS
___
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r256672 - [X86][PKU] add clang intrinsic for {RD|WR}PKRU
Author: abadouh
Date: Thu Dec 31 08:14:07 2015
New Revision: 256672
URL: http://llvm.org/viewvc/llvm-project?rev=256672&view=rev
Log:
[X86][PKU] add clang intrinsic for {RD|WR}PKRU
Differential Revision: http://reviews.llvm.org/D15837
Added:
cfe/trunk/lib/Headers/pkuintrin.h
cfe/trunk/test/CodeGen/pku.c
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Headers/CMakeLists.txt
cfe/trunk/lib/Headers/immintrin.h
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=256672&r1=256671&r2=256672&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Thu Dec 31 08:14:07 2015
@@ -917,6 +917,9 @@ TARGET_BUILTIN(__builtin_ia32_xtest, "i"
BUILTIN(__builtin_ia32_rdpmc, "ULLii", "")
BUILTIN(__builtin_ia32_rdtsc, "ULLi", "")
BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*", "")
+// PKU
+TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui", "", "pku")
+TARGET_BUILTIN(__builtin_ia32_wrpkru, "vUi", "", "pku")
// AVX-512
TARGET_BUILTIN(__builtin_ia32_sqrtpd512_mask, "V8dV8dV8dUcIi", "", "avx512f")
Modified: cfe/trunk/include/clang/Driver/Options.td
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=256672&r1=256671&r2=256672&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Dec 31 08:14:07 2015
@@ -1369,6 +1369,7 @@ def mno_xsave : Flag<["-"], "mno-xsave">
def mno_xsaveopt : Flag<["-"], "mno-xsaveopt">, Group;
def mno_xsavec : Flag<["-"], "mno-xsavec">, Group;
def mno_xsaves : Flag<["-"], "mno-xsaves">, Group;
+def mno_pku : Flag<["-"], "mno-pku">, Group;
def munaligned_access : Flag<["-"], "munaligned-access">,
Group,
HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64 only)">;
@@ -1520,6 +1521,7 @@ def mf16c : Flag<["-"], "mf16c">, Group<
def mrtm : Flag<["-"], "mrtm">, Group;
def mprfchw : Flag<["-"], "mprfchw">, Group;
def mrdseed : Flag<["-"], "mrdseed">, Group;
+def mpku : Flag<["-"], "mpku">, Group;
def madx : Flag<["-"], "madx">, Group;
def msha : Flag<["-"], "msha">, Group;
def mcx16 : Flag<["-"], "mcx16">, Group;
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=256672&r1=256671&r2=256672&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu Dec 31 08:14:07 2015
@@ -2095,6 +2095,7 @@ class X86TargetInfo : public TargetInfo
bool HasXSAVEOPT = false;
bool HasXSAVEC = false;
bool HasXSAVES = false;
+ bool HasPKU = false;
/// \brief Enumeration of all of the X86 CPUs supported by Clang.
///
@@ -2596,6 +2597,7 @@ bool X86TargetInfo::initFeatureMap(
setFeatureEnabledImpl(Features, "avx512vl", true);
setFeatureEnabledImpl(Features, "xsavec", true);
setFeatureEnabledImpl(Features, "xsaves", true);
+setFeatureEnabledImpl(Features, "pku", true);
// FALLTHROUGH
case CK_Broadwell:
setFeatureEnabledImpl(Features, "rdseed", true);
@@ -3021,6 +3023,8 @@ bool X86TargetInfo::handleTargetFeatures
HasXSAVEC = true;
} else if (Feature == "+xsaves") {
HasXSAVES = true;
+} else if (Feature == "+pku") {
+ HasPKU = true;
}
X86SSEEnum Level = llvm::StringSwitch(Feature)
@@ -3322,7 +3326,8 @@ void X86TargetInfo::getTargetDefines(con
Builder.defineMacro("__XSAVEC__");
if (HasXSAVES)
Builder.defineMacro("__XSAVES__");
-
+ if (HasPKU)
+Builder.defineMacro("__PKU__");
if (HasCX16)
Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16");
@@ -3440,6 +3445,7 @@ bool X86TargetInfo::hasFeature(StringRef
.Case("xsavec", HasXSAVEC)
.Case("xsaves", HasXSAVES)
.Case("xsaveopt", HasXSAVEOPT)
+ .Case("pku", HasPKU)
.Default(false);
}
Modified: cfe/trunk/lib/Headers/CMakeLists.txt
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/CMakeLists.txt?rev=256672&r1=256671&r2=256672&view=diff
==
--- cfe/trunk/lib/Headers/CMakeLists.txt (original)
+++ cfe/trunk/lib/Headers/CMakeLists.txt Thu Dec 31 08:14:07 2015
@@ -12,6 +12,7 @@ set(files
avx512vlintrin.h
avx512dqintrin.h
avx512vldqintrin.h
+ pkuintrin.h
avxintrin.h
bmi2intrin.h
bmiintrin.h
Modified: cfe/trunk/lib/Headers/immintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/immintrin.h?rev=256672&r1=256671&r2=256672&view=diff
===
r254906 - [avx512] rename gcc intrinsics to be align with gcc format
Author: abadouh
Date: Mon Dec 7 07:14:22 2015
New Revision: 254906
URL: http://llvm.org/viewvc/llvm-project?rev=254906&view=rev
Log:
[avx512] rename gcc intrinsics to be align with gcc format
rename the gcc intrinsics suffix : _mask ->_round
Differential Revision: http://reviews.llvm.org/D15284
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=254906&r1=254905&r2=254906&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Mon Dec 7 07:14:22 2015
@@ -1300,18 +1300,18 @@ TARGET_BUILTIN(__builtin_ia32_subps512_m
TARGET_BUILTIN(__builtin_ia32_pmaddubsw512_mask, "V32sV64cV64cV32sUi", "",
"avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaddwd512_mask, "V16iV32sV32sV16iUs", "",
"avx512bw")
-TARGET_BUILTIN(__builtin_ia32_addss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_divss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_mulss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_subss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_maxss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_minss_mask, "V4fV4fV4fV4fUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_addsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_divsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_mulsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_subsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_maxsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_minsd_mask, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_addss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_divss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_mulss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_subss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_maxss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_minss_round, "V4fV4fV4fV4fUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_addsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_divsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_mulsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_subsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_maxsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_minsd_round, "V2dV2dV2dV2dUcIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_addpd128_mask, "V2dV2dV2dV2dUc", "", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_addpd256_mask, "V4dV4dV4dV4dUc", "", "avx512vl")
Modified: cfe/trunk/lib/Headers/avx512fintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=254906&r1=254905&r2=254906&view=diff
==
--- cfe/trunk/lib/Headers/avx512fintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512fintrin.h Mon Dec 7 07:14:22 2015
@@ -569,7 +569,7 @@ _mm512_max_ps(__m512 __A, __m512 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
- return (__m128) __builtin_ia32_maxss_mask ((__v4sf) __A,
+ return (__m128) __builtin_ia32_maxss_round ((__v4sf) __A,
(__v4sf) __B,
(__v4sf) __W,
(__mmask8) __U,
@@ -578,7 +578,7 @@ _mm_mask_max_ss(__m128 __W, __mmask8 __U
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) {
- return (__m128) __builtin_ia32_maxss_mask ((__v4sf) __A,
+ return (__m128) __builtin_ia32_maxss_round ((__v4sf) __A,
(__v4sf) __B,
(__v4sf) _mm_setzero_ps (),
(__mmask8) __U,
@@ -586,20 +586,20 @@ _mm_maskz_max_ss(__mmask8 __U,__m128 __A
}
#define _mm_max_round_ss(__A, __B, __R) __extension__ ({ \
- (__m128) __builtin_ia32_maxss_mask ((__v4sf) __A, (__v4sf) __B, \
+ (__m128) __builtin_ia32_maxss_round ((__v4sf) __A, (__v4sf) __B, \
(__v4sf) _mm_setzero_ps(), (__mmask8) -1, __R); })
#define _mm_mask_max_round_ss(__W, __U, __A, __B, __R) __extension__ ({ \
- (__m128) __builtin_ia32_maxss_mask ((__v4sf) __A, (__v4sf) __B, \
+ (__m128) __builtin_ia32_maxss_round ((__v4sf) __A, (__v4sf) __B, \
(__v4sf) __W, (__mmask8) __U,__R); })
#define _mm_maskz_max_round_ss(__U, __A, __B, __R) __extension__ ({ \
- (__m128) __builtin_ia32_maxss_mask ((__v4sf) __A, (__v4sf) __B, \
+
r255012 - [x86][avx512] more changes in intrinsics to be align with gcc format
Author: abadouh
Date: Tue Dec 8 06:34:38 2015
New Revision: 255012
URL: http://llvm.org/viewvc/llvm-project?rev=255012&view=rev
Log:
[x86][avx512] more changes in intrinsics to be align with gcc format
Differential Revision: http://reviews.llvm.org/D15328
Modified:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512erintrin.h
cfe/trunk/lib/Headers/avx512fintrin.h
Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=255012&r1=255011&r2=255012&view=diff
==
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue Dec 8 06:34:38 2015
@@ -921,23 +921,23 @@ BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*"
// AVX-512
TARGET_BUILTIN(__builtin_ia32_sqrtpd512_mask, "V8dV8dV8dUcIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_sqrtps512_mask, "V16fV16fV16fUsIi", "",
"avx512f")
-TARGET_BUILTIN(__builtin_ia32_rsqrt14sd_mask, "V2dV2dV2dV2dUc", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_rsqrt14ss_mask, "V4fV4fV4fV4fUc", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_rsqrt14sd, "V2dV2dV2dV2dUc", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_rsqrt14ss, "V4fV4fV4fV4fUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_rsqrt14pd512_mask, "V8dV8dV8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_rsqrt14ps512_mask, "V16fV16fV16fUs", "",
"avx512f")
-TARGET_BUILTIN(__builtin_ia32_rsqrt28sd_mask, "V2dV2dV2dV2dUcIi", "",
"avx512er")
-TARGET_BUILTIN(__builtin_ia32_rsqrt28ss_mask, "V4fV4fV4fV4fUcIi", "",
"avx512er")
+TARGET_BUILTIN(__builtin_ia32_rsqrt28sd_round, "V2dV2dV2dV2dUcIi", "",
"avx512er")
+TARGET_BUILTIN(__builtin_ia32_rsqrt28ss_round, "V4fV4fV4fV4fUcIi", "",
"avx512er")
TARGET_BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUcIi", "", "avx512er")
TARGET_BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsIi", "",
"avx512er")
-TARGET_BUILTIN(__builtin_ia32_rcp14sd_mask, "V2dV2dV2dV2dUc", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_rcp14ss_mask, "V4fV4fV4fV4fUc", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_rcp14sd, "V2dV2dV2dV2dUc", "", "avx512f")
+TARGET_BUILTIN(__builtin_ia32_rcp14ss, "V4fV4fV4fV4fUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_rcp14pd512_mask, "V8dV8dV8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_rcp14ps512_mask, "V16fV16fV16fUs", "", "avx512f")
-TARGET_BUILTIN(__builtin_ia32_rcp28sd_mask, "V2dV2dV2dV2dUcIi", "", "avx512er")
-TARGET_BUILTIN(__builtin_ia32_rcp28ss_mask, "V4fV4fV4fV4fUcIi", "", "avx512er")
+TARGET_BUILTIN(__builtin_ia32_rcp28sd_round, "V2dV2dV2dV2dUcIi", "",
"avx512er")
+TARGET_BUILTIN(__builtin_ia32_rcp28ss_round, "V4fV4fV4fV4fUcIi", "",
"avx512er")
TARGET_BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUcIi", "", "avx512er")
TARGET_BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsIi", "", "avx512er")
TARGET_BUILTIN(__builtin_ia32_exp2pd_mask, "V8dV8dV8dUcIi", "", "avx512er")
Modified: cfe/trunk/lib/Headers/avx512erintrin.h
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512erintrin.h?rev=255012&r1=255011&r2=255012&view=diff
==
--- cfe/trunk/lib/Headers/avx512erintrin.h (original)
+++ cfe/trunk/lib/Headers/avx512erintrin.h Tue Dec 8 06:34:38 2015
@@ -126,19 +126,19 @@
_mm512_maskz_rsqrt28_round_ps((M), (A), _MM_FROUND_CUR_DIRECTION)
#define _mm_rsqrt28_round_ss(A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_rsqrt28ss_mask((__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_rsqrt28ss_round((__v4sf)(__m128)(A), \
(__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
(__mmask8)-1, (R)); })
#define _mm_mask_rsqrt28_round_ss(S, M, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_rsqrt28ss_mask((__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_rsqrt28ss_round((__v4sf)(__m128)(A), \
(__v4sf)(__m128)(B), \
(__v4sf)(__m128)(S), \
(__mmask8)(M), (R)); })
#define _mm_maskz_rsqrt28_round_ss(M, A, B, R) __extension__ ({ \
- (__m128)__builtin_ia32_rsqrt28ss_mask((__v4sf)(__m128)(A), \
+ (__m128)__builtin_ia32_rsqrt28ss_round((__v4sf)(__m128)(A), \
(__v4sf)(__m128)(B), \
(__v4sf)_mm_setzero_ps(), \
(__mmask8)(M), (R)); })
@@ -153,19 +153,19 @@
_mm_maskz_rsqrt28_round_ss((M), (A), (B), _MM_FROUND_CUR_DIRECTION)
#define _mm_rsqrt28_round_sd(A, B, R) __extension__ ({ \
- (__m128d)__builtin_ia32_rsqrt28sd_mask((__v2df)(__m128d)(A), \
+ (__m128d)__builtin_ia32_rsqrt28sd_round((__v2df)(__m128d)(A), \
