r332704 - This patch aims to match the changes introduced

2018-05-18 Thread Alexander Ivchenko via cfe-commits
Author: aivchenk
Date: Fri May 18 04:56:21 2018
New Revision: 332704

URL: http://llvm.org/viewvc/llvm-project?rev=332704&view=rev
Log:
This patch aims to match the changes introduced
in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html.
The -mibt feature flag is being removed, and the -fcf-protection
option now also defines a CET macro and causes errors when used
on non-X86 targets, while X86 targets no longer check for -mibt
and -mshstk to determine if -fcf-protection is supported. -mshstk
is now used only to determine availability of shadow stack intrinsics.

Comes with an LLVM patch (D46882).

Patch by mike.dvoretsky

Differential Revision: https://reviews.llvm.org/D46881


Modified:
cfe/trunk/docs/ClangCommandLineReference.rst
cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
cfe/trunk/include/clang/Basic/TargetInfo.h
cfe/trunk/include/clang/Driver/Options.td
cfe/trunk/lib/Basic/TargetInfo.cpp
cfe/trunk/lib/Basic/Targets/X86.cpp
cfe/trunk/lib/Basic/Targets/X86.h
cfe/trunk/lib/Frontend/CompilerInvocation.cpp
cfe/trunk/test/CodeGen/attributes.c
cfe/trunk/test/CodeGen/builtins-x86.c
cfe/trunk/test/CodeGen/x86-cf-protection.c
cfe/trunk/test/Driver/x86-target-features.c
cfe/trunk/test/Preprocessor/x86_target_features.c
cfe/trunk/test/Sema/attr-nocf_check.c
cfe/trunk/test/Sema/attr-nocf_check.cpp

Modified: cfe/trunk/docs/ClangCommandLineReference.rst
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ClangCommandLineReference.rst?rev=332704&r1=332703&r2=332704&view=diff
==
--- cfe/trunk/docs/ClangCommandLineReference.rst (original)
+++ cfe/trunk/docs/ClangCommandLineReference.rst Fri May 18 04:56:21 2018
@@ -2486,8 +2486,6 @@ X86
 
 .. option:: -mgfni, -mno-gfni
 
-.. option:: -mibt, -mno-ibt
-
 .. option:: -mlwp, -mno-lwp
 
 .. option:: -mlzcnt, -mno-lzcnt

Modified: cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td?rev=332704&r1=332703&r2=332704&view=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticCommonKinds.td Fri May 18 04:56:21 
2018
@@ -206,6 +206,8 @@ def err_opt_not_valid_with_opt : Error<
   "option '%0' cannot be specified with '%1'">;
 def err_opt_not_valid_without_opt : Error<
   "option '%0' cannot be specified without '%1'">;
+def err_opt_not_valid_on_target : Error<
+  "option '%0' cannot be specified on this target">;
 
 // Source manager
 def err_cannot_open_file : Error<"cannot open file '%0': %1">, DefaultFatal;

Modified: cfe/trunk/include/clang/Basic/TargetInfo.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/TargetInfo.h?rev=332704&r1=332703&r2=332704&view=diff
==
--- cfe/trunk/include/clang/Basic/TargetInfo.h (original)
+++ cfe/trunk/include/clang/Basic/TargetInfo.h Fri May 18 04:56:21 2018
@@ -1075,15 +1075,11 @@ public:
 
   /// Check if the target supports CFProtection branch.
   virtual bool
-  checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const {
-return false;
-  }
+  checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const;
 
   /// Check if the target supports CFProtection branch.
   virtual bool
-  checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const {
-return false;
-  }
+  checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const;
 
   /// Whether target allows to overalign ABI-specified preferred alignment
   virtual bool allowsLargerPreferedTypeAlignment() const { return true; }

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=332704&r1=332703&r2=332704&view=diff
==
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Fri May 18 04:56:21 2018
@@ -2747,8 +2747,6 @@ def mxsaves : Flag<["-"], "mxsaves">, Gr
 def mno_xsaves : Flag<["-"], "mno-xsaves">, Group;
 def mshstk : Flag<["-"], "mshstk">, Group;
 def mno_shstk : Flag<["-"], "mno-shstk">, Group;
-def mibt : Flag<["-"], "mibt">, Group;
-def mno_ibt : Flag<["-"], "mno-ibt">, Group;
 def mretpoline : Flag<["-"], "mretpoline">, Group;
 def mno_retpoline : Flag<["-"], "mno-retpoline">, Group;
 def mretpoline_external_thunk : Flag<["-"], "mretpoline-external-thunk">, 
Group;

Modified: cfe/trunk/lib/Basic/TargetInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/TargetInfo.cpp?rev=332704&r1=332703&r2=332704&view=diff
==
--- cfe/trunk/lib/Basic/TargetInfo.cpp (original)

r324594 - Fix for #31362 - ms_abi is implemented incorrectly for values >=16 bytes.

2018-02-08 Thread Alexander Ivchenko via cfe-commits
Author: aivchenk
Date: Thu Feb  8 03:15:21 2018
New Revision: 324594

URL: http://llvm.org/viewvc/llvm-project?rev=324594&view=rev
Log:
Fix for #31362 - ms_abi is implemented incorrectly for values >=16 bytes.

Summary:
This patch is a fix for following issue:
https://bugs.llvm.org/show_bug.cgi?id=31362 The problem was caused by front end
lowering C calling conventions without taking into account calling conventions
enforced by attribute. In this case win64cc was no correctly lowered on targets
other than Windows.

Reviewed By: rnk (Reid Kleckner)

Differential Revision: https://reviews.llvm.org/D43016

Author: belickim 



Modified:
cfe/trunk/lib/CodeGen/TargetInfo.cpp
cfe/trunk/test/CodeGen/ms_abi.c

Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=324594&r1=324593&r2=324594&view=diff
==
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Thu Feb  8 03:15:21 2018
@@ -3529,7 +3529,17 @@ ABIArgInfo X86_64ABIInfo::classifyRegCal
 
 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
 
-  bool IsRegCall = FI.getCallingConvention() == llvm::CallingConv::X86_RegCall;
+  const unsigned CallingConv = FI.getCallingConvention();
+  // It is possible to force Win64 calling convention on any x86_64 target by
+  // using __attribute__((ms_abi)). In such case to correctly emit Win64
+  // compatible code delegate this call to WinX86_64ABIInfo::computeInfo.
+  if (CallingConv == llvm::CallingConv::Win64) {
+WinX86_64ABIInfo Win64ABIInfo(CGT);
+Win64ABIInfo.computeInfo(FI);
+return;
+  }
+
+  bool IsRegCall = CallingConv == llvm::CallingConv::X86_RegCall;
 
   // Keep track of the number of assigned registers.
   unsigned FreeIntRegs = IsRegCall ? 11 : 6;

Modified: cfe/trunk/test/CodeGen/ms_abi.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ms_abi.c?rev=324594&r1=324593&r2=324594&view=diff
==
--- cfe/trunk/test/CodeGen/ms_abi.c (original)
+++ cfe/trunk/test/CodeGen/ms_abi.c Thu Feb  8 03:15:21 2018
@@ -146,3 +146,16 @@ void __attribute__((sysv_abi)) f6(__buil
   // WIN64: %[[AP_VAL:.*]] = load i8*, i8** %[[AP]]
   // WIN64-NEXT: store i8* %[[AP_VAL]], i8** %[[AP2:.*]]
 }
+
+// This test checks if structs are passed according to Win64 calling convention
+// when it's enforced by __attribute((ms_abi)).
+struct i128 {
+  unsigned long long a;
+  unsigned long long b;
+};
+
+__attribute__((ms_abi)) struct i128 f7(struct i128 a) {
+  // WIN64: define void @f7(%struct.i128* noalias sret %agg.result, 
%struct.i128* %a)
+  // FREEBSD: define win64cc void @f7(%struct.i128* noalias sret %agg.result, 
%struct.i128* %a)
+  return a;
+}


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r326689 - [x86][CET] Introduce _get_ssp, _inc_ssp intrinsics

2018-03-05 Thread Alexander Ivchenko via cfe-commits
Author: aivchenk
Date: Mon Mar  5 03:30:28 2018
New Revision: 326689

URL: http://llvm.org/viewvc/llvm-project?rev=326689&view=rev
Log:
[x86][CET] Introduce _get_ssp, _inc_ssp intrinsics

Summary:
The _get_ssp intrinsic can be used to retrieve the
shadow stack pointer, independent of the current arch -- in
contract with the rdsspd and the rdsspq intrinsics.
Also, this intrinsic returns zero on CPUs which don't
support CET. The rdssp[d|q] instruction is decoded as nop,
essentially just returning the input operand, which is zero.
Example result of compilation:

```
xorl%eax, %eax
movl%eax, %ecx
rdsspq  %rcx # NOP when CET is not supported
movq%rcx, %rax   # return zero
```

Reviewers: craig.topper

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43814

Modified:
cfe/trunk/lib/Headers/cetintrin.h
cfe/trunk/test/CodeGen/cetintrin.c

Modified: cfe/trunk/lib/Headers/cetintrin.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/cetintrin.h?rev=326689&r1=326688&r2=326689&view=diff
==
--- cfe/trunk/lib/Headers/cetintrin.h (original)
+++ cfe/trunk/lib/Headers/cetintrin.h Mon Mar  5 03:30:28 2018
@@ -42,6 +42,16 @@ static __inline__ void __DEFAULT_FN_ATTR
 }
 #endif /* __x86_64__ */
 
+#ifdef __x86_64__
+static __inline__ void __DEFAULT_FN_ATTRS _inc_ssp(unsigned int __a) {
+  __builtin_ia32_incsspq(__a);
+}
+#else /* __x86_64__ */
+static __inline__ void __DEFAULT_FN_ATTRS _inc_ssp(unsigned int __a) {
+  __builtin_ia32_incsspd((int)__a);
+}
+#endif /* __x86_64__ */
+
 static __inline__ unsigned int __DEFAULT_FN_ATTRS _rdsspd(unsigned int __a) {
   return __builtin_ia32_rdsspd(__a);
 }
@@ -52,6 +62,16 @@ static __inline__ unsigned long long __D
 }
 #endif /* __x86_64__ */
 
+#ifdef __x86_64__
+static __inline__ unsigned long long __DEFAULT_FN_ATTRS _get_ssp(void) {
+  return __builtin_ia32_rdsspq(0);
+}
+#else /* __x86_64__ */
+static __inline__ unsigned int __DEFAULT_FN_ATTRS _get_ssp(void) {
+  return __builtin_ia32_rdsspd(0);
+}
+#endif /* __x86_64__ */
+
 static __inline__ void __DEFAULT_FN_ATTRS _saveprevssp() {
   __builtin_ia32_saveprevssp();
 }

Modified: cfe/trunk/test/CodeGen/cetintrin.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/cetintrin.c?rev=326689&r1=326688&r2=326689&view=diff
==
--- cfe/trunk/test/CodeGen/cetintrin.c (original)
+++ cfe/trunk/test/CodeGen/cetintrin.c Mon Mar  5 03:30:28 2018
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -ffreestanding %s -triple=i386-apple-darwin -target-feature 
+shstk -emit-llvm -o - -Wall -Werror | FileCheck %s
-// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin 
-target-feature +shstk  -emit-llvm -o - -Wall -Werror | FileCheck %s 
--check-prefix=X86_64
+// RUN: %clang_cc1 -ffreestanding %s -triple=i386-apple-darwin -target-feature 
+shstk -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefix=I386 
--check-prefix=CHECK
+// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin 
-target-feature +shstk  -emit-llvm -o - -Wall -Werror | FileCheck %s 
--check-prefix=X86_64  --check-prefix=CHECK
 
 #include 
 
@@ -15,6 +15,20 @@ void test_incsspq(int a) {
   // X86_64:   call void @llvm.x86.incsspq(i64 %{{[a-z0-9.]+}})
   _incsspq(a);
 }
+
+void test_inc_ssp(unsigned int a) {
+  // X86_64-LABEL: @test_inc_ssp
+  // X86_64:   call void @llvm.x86.incsspq(i64 %{{[a-z0-9.]+}})
+  _inc_ssp(a);
+}
+#else
+
+void test_inc_ssp(unsigned int a) {
+  // I386-LABEL: @test_inc_ssp
+  // I386:   call void @llvm.x86.incsspd(i32 %{{[0-9]+}})
+  _inc_ssp(a);
+}
+
 #endif
 
 unsigned int test_rdsspd(unsigned int a) {
@@ -29,6 +43,21 @@ unsigned long long test_rdsspq(unsigned
   // X86_64:   call i64 @llvm.x86.rdsspq(i64 %{{[a-z0-9.]+}})
   return _rdsspq(a);
 }
+
+unsigned long long test_get_ssp(void) {
+  // X86_64-LABEL: @test_get_ssp
+  // X86_64:   call i64 @llvm.x86.rdsspq(i64 0)
+  return _get_ssp();
+}
+
+#else
+
+unsigned int test_get_ssp(void) {
+  // I386-LABEL: @test_get_ssp
+  // I386:   call i32 @llvm.x86.rdsspd(i32 0)
+  return _get_ssp();
+}
+
 #endif
 
 void  test_saveprevssp() {


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r330323 - Lowering x86 adds/addus/subs/subus intrinsics (clang)

2018-04-19 Thread Alexander Ivchenko via cfe-commits
Author: aivchenk
Date: Thu Apr 19 05:15:11 2018
New Revision: 330323

URL: http://llvm.org/viewvc/llvm-project?rev=330323&view=rev
Log:
Lowering x86 adds/addus/subs/subus intrinsics (clang)

This is the patch that lowers x86 intrinsics to native IR
in order to enable optimizations.

Patch by tkrupa

Differential Revision: https://reviews.llvm.org/D44786

Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
cfe/trunk/test/CodeGen/avx2-builtins.c
cfe/trunk/test/CodeGen/avx512bw-builtins.c
cfe/trunk/test/CodeGen/avx512vlbw-builtins.c
cfe/trunk/test/CodeGen/sse2-builtins.c

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=330323&r1=330322&r2=330323&view=diff
==
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Apr 19 05:15:11 2018
@@ -8449,6 +8449,76 @@ static Value *EmitX86SExtMask(CodeGenFun
   return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2");
 }
 
+// Emit addition or subtraction with saturation.
+// Handles both signed and unsigned intrinsics.
+static Value *EmitX86AddSubSatExpr(CodeGenFunction &CGF, const CallExpr *E,
+   SmallVectorImpl &Ops,
+   bool IsAddition, bool Signed) {
+
+  // Collect vector elements and type data.
+  llvm::Type *ResultType = CGF.ConvertType(E->getType());
+  int NumElements = ResultType->getVectorNumElements();
+  Value *Res;
+  if (!IsAddition && !Signed) {
+Value *ICmp = CGF.Builder.CreateICmp(ICmpInst::ICMP_UGT, Ops[0], Ops[1]);
+Value *Select = CGF.Builder.CreateSelect(ICmp, Ops[0], Ops[1]);
+Res = CGF.Builder.CreateSub(Select, Ops[1]);
+  } else {
+unsigned EltSizeInBits = ResultType->getScalarSizeInBits();
+llvm::Type *ExtElementType = EltSizeInBits == 8 ?
+ CGF.Builder.getInt16Ty() :
+ CGF.Builder.getInt32Ty();
+
+// Extending vectors to next possible width to make space for possible
+// overflow.
+llvm::Type *ExtType = llvm::VectorType::get(ExtElementType, NumElements);
+Value *VecA = Signed ? CGF.Builder.CreateSExt(Ops[0], ExtType)
+ : CGF.Builder.CreateZExt(Ops[0], ExtType);
+Value *VecB = Signed ? CGF.Builder.CreateSExt(Ops[1], ExtType)
+ : CGF.Builder.CreateZExt(Ops[1], ExtType);
+
+llvm::Value *ExtProduct = IsAddition ? CGF.Builder.CreateAdd(VecA, VecB)
+ : CGF.Builder.CreateSub(VecA, VecB);
+
+// Create vector of the same type as expected result with max possible
+// values and extend it to the same type as the product of the addition.
+APInt SignedMaxValue =
+llvm::APInt::getSignedMaxValue(EltSizeInBits);
+Value *Max = Signed ? llvm::ConstantInt::get(ResultType, SignedMaxValue)
+: llvm::Constant::getAllOnesValue(ResultType);
+Value *ExtMaxVec = Signed ? CGF.Builder.CreateSExt(Max, ExtType)
+  : CGF.Builder.CreateZExt(Max, ExtType);
+// In Product, replace all overflowed values with max values of 
non-extended
+// type.
+ICmpInst::Predicate Pred = Signed ? ICmpInst::ICMP_SLE : 
ICmpInst::ICMP_ULE;
+Value *Cmp = CGF.Builder.CreateICmp(Pred, ExtProduct,
+ExtMaxVec); // 1 if no overflow.
+Value *SaturatedProduct = CGF.Builder.CreateSelect(
+Cmp, ExtProduct, ExtMaxVec); // If overflowed, copy from max values.
+
+if (Signed) {
+  APInt SignedMinValue =
+  llvm::APInt::getSignedMinValue(EltSizeInBits);
+  Value *Min = llvm::ConstantInt::get(ResultType, SignedMinValue);
+  Value *ExtMinVec = CGF.Builder.CreateSExt(Min, ExtType);
+  Value *IsNegative =
+CGF.Builder.CreateICmp(ICmpInst::ICMP_SLT, SaturatedProduct, 
ExtMinVec);
+  SaturatedProduct =
+CGF.Builder.CreateSelect(IsNegative, ExtMinVec, SaturatedProduct);
+}
+
+Res = CGF.Builder.CreateTrunc(SaturatedProduct,
+  ResultType); // Trunc to ResultType.
+  }
+  if (E->getNumArgs() == 4) { // For masked intrinsics.
+Value *VecSRC = Ops[2];
+Value *Mask = Ops[3];
+return EmitX86Select(CGF, Mask, Res, VecSRC);
+  }
+
+  return Res;
+}
+
 Value *CodeGenFunction::EmitX86CpuIs(const CallExpr *E) {
   const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
   StringRef CPUStr = cast(CPUExpr)->getString();
@@ -9516,10 +9586,37 @@ Value *CodeGenFunction::EmitX86BuiltinEx
 Load->setVolatile(true);
 return Load;
   }
+  case X86::BI__builtin_ia32_paddusb512_mask:
+  case X86::BI__builtin_ia32_paddusw512_mask:
+  case X86::BI__builtin_ia32_paddusb256:
+  case X86::BI__builtin_ia32_paddusw256:
+  case X86::BI__builtin_ia32_paddusb128:
+  case X86::BI__builtin_ia32_paddusw128:
+return EmitX86AddSubSatExpr(*th