Allwinner H3: other UART ports (not console UART0) support
On Allwinner H3, currently we can use UART0 for debug/console port.
To use UART1-3 port, we have to make proper device tree blob
and fix kernel code like this.
- com_fdt.c needs to add reset signal de-assert code
- sciccmu_clocks.h requires to add reset signal definition
If there is no problem, I want to commit.
Index: com_fdt.c
===
RCS file: /cvs/src/sys/dev/fdt/com_fdt.c,v
retrieving revision 1.3
diff -u -p -r1.3 com_fdt.c
--- com_fdt.c 6 Aug 2018 10:52:30 - 1.3
+++ com_fdt.c 23 Mar 2020 13:02:26 -
@@ -105,6 +105,7 @@ com_fdt_attach(struct device *parent, st
return;
clock_enable(faa->fa_node, NULL);
+ reset_deassert_all(faa->fa_node);
/*
* Determine the clock frequency after enabling the clock.
Index: sxiccmu_clocks.h
===
RCS file: /cvs/src/sys/dev/fdt/sxiccmu_clocks.h,v
retrieving revision 1.28
diff -u -p -r1.28 sxiccmu_clocks.h
--- sxiccmu_clocks.h20 Sep 2019 22:42:05 - 1.28
+++ sxiccmu_clocks.h23 Mar 2020 13:02:26 -
@@ -746,6 +746,10 @@ struct sxiccmu_ccu_bit sun9i_a80_mmc_res
#define H3_RST_BUS_I2C046
#define H3_RST_BUS_I2C147
#define H3_RST_BUS_I2C248
+#define H3_RST_BUS_UART0 49
+#define H3_RST_BUS_UART1 50
+#define H3_RST_BUS_UART2 51
+#define H3_RST_BUS_UART3 52
struct sxiccmu_ccu_bit sun8i_h3_resets[] = {
[H3_RST_USB_PHY0] = { 0x00cc, 0 },
@@ -769,6 +773,10 @@ struct sxiccmu_ccu_bit sun8i_h3_resets[]
[H3_RST_BUS_I2C0] = { 0x02d8, 0 },
[H3_RST_BUS_I2C1] = { 0x02d8, 1 },
[H3_RST_BUS_I2C2] = { 0x02d8, 2 },
+ [H3_RST_BUS_UART0] = { 0x02d8, 16 },
+ [H3_RST_BUS_UART1] = { 0x02d8, 17 },
+ [H3_RST_BUS_UART2] = { 0x02d8, 18 },
+ [H3_RST_BUS_UART3] = { 0x02d8, 19 },
};
#define H3_R_RST_APB0_RSB 2
--
SASANO Takayoshi (JG1UAA)
Re: Allwinner H3: other UART ports (not console UART0) support
> Date: Mon, 23 Mar 2020 22:51:05 +0900
> From: SASANO Takayoshi
>
> On Allwinner H3, currently we can use UART0 for debug/console port.
> To use UART1-3 port, we have to make proper device tree blob
> and fix kernel code like this.
>
> - com_fdt.c needs to add reset signal de-assert code
> - sciccmu_clocks.h requires to add reset signal definition
>
> If there is no problem, I want to commit.
ok kettenis@
> Index: com_fdt.c
> ===
> RCS file: /cvs/src/sys/dev/fdt/com_fdt.c,v
> retrieving revision 1.3
> diff -u -p -r1.3 com_fdt.c
> --- com_fdt.c 6 Aug 2018 10:52:30 - 1.3
> +++ com_fdt.c 23 Mar 2020 13:02:26 -
> @@ -105,6 +105,7 @@ com_fdt_attach(struct device *parent, st
> return;
>
> clock_enable(faa->fa_node, NULL);
> + reset_deassert_all(faa->fa_node);
>
> /*
>* Determine the clock frequency after enabling the clock.
> Index: sxiccmu_clocks.h
> ===
> RCS file: /cvs/src/sys/dev/fdt/sxiccmu_clocks.h,v
> retrieving revision 1.28
> diff -u -p -r1.28 sxiccmu_clocks.h
> --- sxiccmu_clocks.h 20 Sep 2019 22:42:05 - 1.28
> +++ sxiccmu_clocks.h 23 Mar 2020 13:02:26 -
> @@ -746,6 +746,10 @@ struct sxiccmu_ccu_bit sun9i_a80_mmc_res
> #define H3_RST_BUS_I2C0 46
> #define H3_RST_BUS_I2C1 47
> #define H3_RST_BUS_I2C2 48
> +#define H3_RST_BUS_UART0 49
> +#define H3_RST_BUS_UART1 50
> +#define H3_RST_BUS_UART2 51
> +#define H3_RST_BUS_UART3 52
>
> struct sxiccmu_ccu_bit sun8i_h3_resets[] = {
> [H3_RST_USB_PHY0] = { 0x00cc, 0 },
> @@ -769,6 +773,10 @@ struct sxiccmu_ccu_bit sun8i_h3_resets[]
> [H3_RST_BUS_I2C0] = { 0x02d8, 0 },
> [H3_RST_BUS_I2C1] = { 0x02d8, 1 },
> [H3_RST_BUS_I2C2] = { 0x02d8, 2 },
> + [H3_RST_BUS_UART0] = { 0x02d8, 16 },
> + [H3_RST_BUS_UART1] = { 0x02d8, 17 },
> + [H3_RST_BUS_UART2] = { 0x02d8, 18 },
> + [H3_RST_BUS_UART3] = { 0x02d8, 19 },
> };
>
> #define H3_R_RST_APB0_RSB2
>
> --
> SASANO Takayoshi (JG1UAA)
>
>
Re: Pinebook Pro
o...@drijf.net (Otto Moerbeek), 2020.03.22 (Sun) 20:21 (CET):
> On Sun, Mar 22, 2020 at 08:07:05PM +0100, Otto Moerbeek wrote:
>
> > On Sun, Mar 22, 2020 at 07:30:49PM +0100, Marcus MERIGHI wrote:
> >
> > > From: Mark Kettenis
> > > > > U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
> > > > Unfortunately that particular version of U-Boot has an annoying bug
> > > > that makes it impossible for the OpenBSD bootloader to detect the
> > > > device you booted from.
> > >
> > > From: Otto Moerbeek
> > > > Here's shell script that can help, I forgat if it came from patrick@
> > > > or somebody else. I'll aslo attach a tarball with the neccesary extra
> > > > files. That's the .pbp file used by the script and two other files
> > > > that need to be dropped into /etc/firmware to get the wifi going.
> > >
> > > Thank you, Mark and Otto!
> > >
> > > Your hints got me a lot further; OpenBSD arm64 is now installed
> > > on a MicroSD card which the PineBook Pro can boot from.
> > >
> > > TL;DR: No video, No USB, no suspend. further pointers, anyone? thanks!
[...]
> > > Next reboot I tried, at the boot> prompt
> > > boot> set tty fb0
> >
> > fb as console is not yet supported. Only serial console, which works
> > wit a special cable and after flipping an internal switch. But X
> > should work. At lest it does for me and others.
>
> You also need to copy the .ptb file to you boot ('i') partition.
>
> That wil make a big difference
>
> -Ott
Yes, that was it! Thank you!
rk3399-pinebook-pro.dtb -> root of boot ('i') partition helped!
Writing this message with mutt on the pinebookpro.
Currently setting up the rest of my daily driver stuff, lets seee...
Thanks!
Marcus
P.S.: Details...
$ cat /etc/boot.conf
stty com0 150
set tty com0
set timeout 3
does not work:
apm: "Battery state: unknown, 0% remaining, unknown life estimate"
brightness key combo
volume key combo
zzz key combo
pwr button no shutdown action. but power off after 5 secs.
sound (not with linux as well; maybe due to serial/headphone jack
switch?)
youtube (:flan_soooimportant:): "audio render problem"
libreoffice,gimp missing from aarch64
audio/video player (ffmpeg,mpv,mplayer,vlc) missing from aarch64
works:
halt -p
apmd -A
wsconsctl display.brightness
not sure:
wlan bwfm(4) fails unrecoverably for me quite often.
the automatic start of xenodm fails, thus
@reboot sleep 10; rcctl restart xenodm > /dev/null
other notes:
disable xconsole, to retain serial access
runs off the sdcard, not internal eMMC
softraid crypt for $HOME
boot works without serial attached
OpenBSD 6.6-current (GENERIC.MP) #518: Sun Mar 22 14:33:03 MDT 2020
dera...@arm64.openbsd.org:/usr/src/sys/arch/arm64/compile/GENERIC.MP
real mem = 4059160576 (3871MB)
avail mem = 3861471232 (3682MB)
mainbus0 at root: Pine64 Pinebook Pro
cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 512KB 64b/line 16-way L2 cache
efi0 at mainbus0: UEFI 2.0.5
efi0: Das U-boot rev 0x0
apm0 at mainbus0
psci0 at mainbus0: PSCI 1.0
agintc0 at mainbus0 sec shift 3:4 nirq 288 nredist 6 ipi: 0, 1:
"interrupt-controller"
agintcmsi0 at agintc0
syscon0 at mainbus0: "qos"
syscon1 at mainbus0: "qos"
syscon2 at mainbus0: "qos"
syscon3 at mainbus0: "qos"
syscon4 at mainbus0: "qos"
syscon5 at mainbus0: "qos"
syscon6 at mainbus0: "qos"
syscon7 at mainbus0: "qos"
syscon8 at mainbus0: "qos"
syscon9 at mainbus0: "qos"
syscon10 at mainbus0: "qos"
syscon11 at mainbus0: "qos"
syscon12 at mainbus0: "qos"
syscon13 at mainbus0: "qos"
syscon14 at mainbus0: "qos"
syscon15 at mainbus0: "qos"
syscon16 at mainbus0: "qos"
syscon17 at mainbus0: "qos"
syscon18 at mainbus0: "qos"
syscon19 at mainbus0: "qos"
syscon20 at mainbus0: "qos"
syscon21 at mainbus0: "qos"
syscon22 at mainbus0: "qos"
syscon23 at mainbus0: "qos"
syscon24 at mainbus0: "qos"
syscon25 at mainbus0: "power-management"
"power-controller" at syscon25 not configured
syscon26 at mainbus0: "syscon"
"io-domains" at syscon26 not configured
rkclock0 at mainbus0
rkclock1 at mainbus0
syscon27 at mainbus0: "syscon"
"io-domains" at syscon27 not configured
"usb2-phy" at syscon27 not configured
"usb2-phy" at syscon27 not configured
rkemmcphy0 at syscon27
"pcie-phy" at syscon27 not configured
rkpinctrl0 at mainbus0: "pinctrl"
rkgpio0 at rkpinctrl0
rkgpio1 at rkpinctrl0
rkgpio2 at rkpinctrl0
rkgpio3 at rkpinctrl0
rkgpio4 at rkpinctrl0
pwmreg0 at mainbus0
rkdrm0 at mainbus0
drm0 at rkdrm0
"pmu_a53" at mainbus0 not configured
"pmu_a72" at mainbus0 not configured
agtimer0 at mainbus0: tick rate 24000 KHz
"xin24m" at mainbus0 not configured
simplebus0 at mainbus0: "amba"
"dma-controller" at simplebus0 not configured
"dma-controller" at simplebus0 not configured
rkpcie0 at mainbus0
rkpcie0: link training timeout
dwmmc0 at mainbus0: 50 MHz base clock
sdmmc0 at dwmmc0: 4-bit, sd high-speed, dma
dwmmc1 at mainbus0: 50 MHz
