Re: new bme code

2018-05-08 Thread s_graf
Yes this works.

>From dmesg:

sxitwi0 at simplebus0
iic0 at sxitwi0
bme0 at iic0 addr 0x76: BME280 60
sxitwi1 at simplebus0
iic1 at sxitwi1
bme1 at iic1 addr 0x77: BME280 60

And from sysctl:

op1bsdsnap# sysctl hw.sensors
hw.sensors.sxitemp0.temp0=187.74 degC (CPU)
hw.sensors.bme0.temp0=22.95 degC
hw.sensors.bme0.humidity0=52.01%
hw.sensors.bme0.pressure0=101.36 Pa
hw.sensors.bme1.temp0=24.02 degC
hw.sensors.bme1.humidity0=47.54%
hw.sensors.bme1.pressure0=101.33 Pa
op1bsdsnap# sysctl hw.sensors
hw.sensors.sxitemp0.temp0=187.74 degC (CPU)
hw.sensors.bme0.temp0=22.84 degC
hw.sensors.bme0.humidity0=52.32%
hw.sensors.bme0.pressure0=101.36 Pa
hw.sensors.bme1.temp0=24.01 degC
hw.sensors.bme1.humidity0=47.54%
hw.sensors.bme1.pressure0=101.34 Pa

The " hw.sensors.sxitemp0.temp0=187.74 degC (CPU)" will be the topic in another 
conversation.  I have added h3 to the sxitemp driver, but I can  not get the 
hardware to provide a reading.

-Original Message-
From: aa e30  
Sent: May 7, 2018 2:27 PM
To: s_g...@telus.net
Subject: Re: new bme code

On 8 May 2018 at 00:25,   wrote:
> Would you please send me the diff as an attachment.  The inline has 
> some lines wrapped and the diff does not apply cleanly.
>
> -Original Message-
> From: Artturi Alm 
> Sent: May 6, 2018 3:05 AM
> To: s_g...@telus.net
> Cc: arm@openbsd.org
> Subject: Re: gtk libool slow on arm
>
> On Thu, May 03, 2018 at 09:55:21PM -0700, s_g...@telus.net wrote:
>> Thank you for the updates.  I will build and test as soon as I get
> finished with the php build.  My system is still flailing away at gtk 
> with each ld session taking about 20 minutes.  Could be days yet.
>>
>
> fixed the diff with moving dev/fdt/bme.c to dev/i2c/bme280.c, thanks 
> to clue by kettenis@.
>
> -Artturi
>
>
> diff --git share/man/man4/Makefile share/man/man4/Makefile index
> 8004d8b575d..3ac02b89788 100644
> --- share/man/man4/Makefile
> +++ share/man/man4/Makefile
> @@ -15,7 +15,7 @@ MAN=  aac.4 ac97.4 acphy.4 acrtc.4 \
> auacer.4 audio.4 aue.4 auglx.4 auich.4 auixp.4 autri.4 auvia.4 \
> axe.4 axen.4 axppmic.4 azalia.4 \
> bce.4 bcmaux.4 bcmdog.4  bcmrng.4 bcmtemp.4 berkwdt.4 bge.4 \
> -   bgw.4 bio.4 bktr.4 bmtphy.4 bnx.4 \
> +   bgw.4 bio.4 bktr.4 bme.4 bmtphy.4 bnx.4 \
> boca.4 bpf.4 brgphy.4 bridge.4 brswphy.4 bwfm.4 bwi.4 bytgpio.4 \
> cac.4 cas.4 cardbus.4 carp.4 ccp.4 cd.4 cdce.4 cfxga.4 \
> ch.4 chvgpio.4 ciphy.4 ciss.4 clcs.4 clct.4 cmpci.4 \ diff 
> --git
> share/man/man4/bme.4 share/man/man4/bme.4 new file mode 100644 index 
> 000..bb48513d9dc
> --- /dev/null
> +++ share/man/man4/bme.4
> @@ -0,0 +1,44 @@
> +.\"$OpenBSD: tsl.4,v 1.10 2015/10/02 09:29:02 sobrado Exp $
> +.\"
> +.\" Copyright (c) 2005 Mark Kettenis  .\"
> +Copyright (c) 2018 Artturi Alm .\"
> +.\" Permission to use, copy, modify, and distribute this software for 
> +any .\" purpose with or without fee is hereby granted, provided that 
> +the above .\" copyright notice and this permission notice appear in 
> +all
> copies.
> +.\"
> +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 
> +WARRANTIES .\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 
> +WARRANTIES OF .\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 
> +AUTHOR BE LIABLE FOR .\" ANY SPECIAL, DIRECT, INDIRECT, OR 
> +CONSEQUENTIAL DAMAGES OR ANY DAMAGES .\" WHATSOEVER RESULTING FROM 
> +LOSS OF USE, DATA OR PROFITS, WHETHER IN AN .\" ACTION OF CONTRACT, 
> +NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF .\" OR IN 
> +CONNECTION
> WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +.\"
> +.Dd $Mdocdate$
> +.Dt BME 4
> +.Os
> +.Sh NAME
> +.Nm bme
> +.Nd Bosch BME280 Environmental sensor .Sh SYNOPSIS .Cd "bme* at iic?"
> +.Sh DESCRIPTION
> +The
> +.Nm
> +driver provides support for the Bosch BME280 Environmental sensor.
> +These sensors contain combined digital humidity, pressure and 
> +temperature sensing capabilities.
> +These values are made available through the .Xr sysctl 8 interface.
> +.Sh SEE ALSO
> +.Xr iic 4 ,
> +.Xr intro 4 ,
> +.Xr sensorsd 8 ,
> +.Xr sysctl 8
> +.Sh HISTORY
> +The
> +.Nm
> +driver first appeared in
> +.Ox 6.4 .
> diff --git sys/dev/i2c/bme280.c sys/dev/i2c/bme280.c new file mode 
> 100644 index 000..8d35f5ae44d
> --- /dev/null
> +++ sys/dev/i2c/bme280.c
> @@ -0,0 +1,543 @@
> +/* $OpenBSD: tsl2560.c,v 1.7 2008/04/18 01:17:51 deraadt Exp $ */
> +
> +/*
> + * Copyright (c) 2005 Mark Kettenis
> + * Copyright (c) 2017 Artturi Alm
> + *
> + * Permission to use, copy, modify, and distribute this software for 
> +any
> + * purpose with or without fee is hereby granted, provided that the 
> +above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 
> +WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE 
> +LIA

BOOTARM.EFI from latest snapshot resets with "undefined instruction"

2018-05-08 Thread Josh Elsasser
After upgrading my sabre lite board to the latest snapshot,
BOOTARM.EFI causes the machine to reset. Building the bootloader with
-msoft-float, however, gives a working binary. Perhaps this is a
result of the recent armv7 float ABI change?

Below is a console log of the non-working BOOTARM.EFI:


U-Boot 2017.07-28647-g66aadfb (Jan 24 2018 - 15:46:14 -0800), Build: 
jenkins-uboot_v2017.07-66

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: WDOG
Board: nitrogen6x
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected sst25vf016b with page size 256 Bytes, erase size 4 KiB, total 2 MiB
Display: hdmi:1280x720M@60 (1280x720)
In:serial
Out:   serial
Err:   serial
Net:   Micrel ksz9021 at 6
FEC [PRIME], usb_ether
Hit any key to stop autoboot:  0
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: ncq stag pm led clo only pmp pio slum part
SATA Device Info:
S/N: CVSC2251009T080D
Product model number: INTEL SSDMAEMC080G2
Firmware version: 2CV102M3
Capacity: 156301488 sectors

Device 0: Model: INTEL SSDMAEMC080G2 Firm: 2CV102M3 Ser#: CVSC2251009T080D
Type: Hard Disk
Supports 48-bit addressing
Capacity: 76319.0 MB = 74.5 GB (156301488 x 512)
... is now current device
Scanning sata 0:1...
reading /imx6q-sabrelite.dtb
43023 bytes read in 6 ms (6.8 MiB/s)
Found EFI removable media binary efi/boot/bootarm.efi
reading efi/boot/bootarm.efi
87652 bytes read in 8 ms (10.4 MiB/s)
## Starting EFI application at 1200 ...
Scanning disks on usb...
Scanning disks on mmc...
MMC: no card present
mmc_init: -123, time 1
MMC: no card present
mmc_init: -123, time 1
MMC Device 2 not found
MMC Device 3 not found
Scanning disks on sata...
Found 5 disks
>> OpenBSD/armv7 BOOTARM 1.1
undefined instruction
pc : [<4e31a874>]  lr : [<4f32ac70>]
reloc pc : [<15bec874>]lr : [<16bfcc70>]
sp : 4f32ac50  ip : 4e213000 fp : 4f32ac60
r10: 1800  r9 : 0065 r8 : 4e327040
r7 : 4e213000  r6 : 4f32ac70 r5 : 4e2131f0  r4 : 4f32ae60
r3 :   r2 : fff0 r1 : 0200  r0 : 4f32ac70
Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...



Re: BOOTARM.EFI from latest snapshot resets with "undefined instruction"

2018-05-08 Thread Mark Kettenis
> Date: Tue, 8 May 2018 13:06:30 -0700
> From: Josh Elsasser 
> 
> After upgrading my sabre lite board to the latest snapshot,
> BOOTARM.EFI causes the machine to reset. Building the bootloader with
> -msoft-float, however, gives a working binary. Perhaps this is a
> result of the recent armv7 float ABI change?

Yes that almost certainly is the right solution.

> Below is a console log of the non-working BOOTARM.EFI:
> 
> 
> U-Boot 2017.07-28647-g66aadfb (Jan 24 2018 - 15:46:14 -0800), Build: 
> jenkins-uboot_v2017.07-66
> 
> CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
> Reset cause: WDOG
> Board: nitrogen6x
> I2C:   ready
> DRAM:  1 GiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
> SF: Detected sst25vf016b with page size 256 Bytes, erase size 4 KiB, total 2 
> MiB
> Display: hdmi:1280x720M@60 (1280x720)
> In:serial
> Out:   serial
> Err:   serial
> Net:   Micrel ksz9021 at 6
> FEC [PRIME], usb_ether
> Hit any key to stop autoboot:  0
> AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
> flags: ncq stag pm led clo only pmp pio slum part
> SATA Device Info:
> S/N: CVSC2251009T080D
> Product model number: INTEL SSDMAEMC080G2
> Firmware version: 2CV102M3
> Capacity: 156301488 sectors
> 
> Device 0: Model: INTEL SSDMAEMC080G2 Firm: 2CV102M3 Ser#: CVSC2251009T080D
> Type: Hard Disk
> Supports 48-bit addressing
> Capacity: 76319.0 MB = 74.5 GB (156301488 x 512)
> ... is now current device
> Scanning sata 0:1...
> reading /imx6q-sabrelite.dtb
> 43023 bytes read in 6 ms (6.8 MiB/s)
> Found EFI removable media binary efi/boot/bootarm.efi
> reading efi/boot/bootarm.efi
> 87652 bytes read in 8 ms (10.4 MiB/s)
> ## Starting EFI application at 1200 ...
> Scanning disks on usb...
> Scanning disks on mmc...
> MMC: no card present
> mmc_init: -123, time 1
> MMC: no card present
> mmc_init: -123, time 1
> MMC Device 2 not found
> MMC Device 3 not found
> Scanning disks on sata...
> Found 5 disks
> >> OpenBSD/armv7 BOOTARM 1.1
> undefined instruction
> pc : [<4e31a874>]  lr : [<4f32ac70>]
> reloc pc : [<15bec874>]lr : [<16bfcc70>]
> sp : 4f32ac50  ip : 4e213000 fp : 4f32ac60
> r10: 1800  r9 : 0065 r8 : 4e327040
> r7 : 4e213000  r6 : 4f32ac70 r5 : 4e2131f0  r4 : 4f32ae60
> r3 :   r2 : fff0 r1 : 0200  r0 : 4f32ac70
> Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
> Resetting CPU ...
> 
> resetting ...
> 
> 



sxitemp with h3

2018-05-08 Thread s_graf

HI Mark.  I am trying to add H3 support to the sxitemp driver.  The H3 SOC
only has the CPU thermal sensor, but it maps well to the CPU thermal sensor
on the H5.  With the diff below I think I have been able to do all the
mechanical stuff to get the sensor to register.  I also had to add a dtb
entry for the sensor, also shown below.  The sensor shows up in sysctl and
the readout value corresponds to a value of 0 from the device temperature
register.

To figure out why the sensor is not providing a readout I added some
printouts to the driver.  It would seem that the registers are not being set
or that the address is not correct.  But everything looks good.

Do you have any suggestions as to what to look at next?

***
Sysctl output
***
op1bsdsnap# sysctl hw.sensors
hw.sensors.sxitemp0.temp0=187.74 degC (CPU)
hw.sensors.bme0.temp0=21.88 degC
hw.sensors.bme0.humidity0=54.37%
hw.sensors.bme0.pressure0=100.37 Pa
hw.sensors.bme1.temp0=22.64 degC
hw.sensors.bme1.humidity0=50.28%
hw.sensors.bme1.pressure0=100.34 Pa

***
Dmesg after additional debug printouts
***
sxitemp0 at simplebus0
addr: 0x1c25000, size: 0x400
Before start acquistion
reg: 0x70, data: 0x1
reg: 0x44, data: 0x0
reg: 0x0, data: 0xf
reg: 0x40, data: 0x4
reg: 0x80, data: 0x0
After start acquistion
reg: 0x70, data: 0x1
reg: 0x44, data: 0x0
reg: 0x0, data: 0xf
reg: 0x40, data: 0x4
reg: 0x80, data: 0x0


***
Code for debug
***

pinctrl_byname(node, "default");
printf("addr: 0x%llx, size: 0x%llx\n", faa->fa_reg[0].addr,
faa->fa_reg[0].size);
clock_enable_all(node);
reset_deassert_all(node);

printf("Before start acquistion\n");
printf("reg: 0x%x, data: 0x%x\n", THS_FILTER, HREAD4(sc, 0x70));
printf("reg: 0x%x, data: 0x%x\n", THS_INT_CTRL, HREAD4(sc, 0x44));
printf("reg: 0x%x, data: 0x%x\n", THS_CTRL0, HREAD4(sc, 0x0));
printf("reg: 0x%x, data: 0x%x\n", THS_CTRL2, HREAD4(sc, 0x40));
printf("reg: 0x%x, data: 0x%x\n", THS0_DATA, HREAD4(sc, 0x80));

/* Start data acquisition. */
HWRITE4(sc, THS_FILTER, THS_FILTER_EN | THS_FILTER_TYPE(1));
HWRITE4(sc, THS_INT_CTRL, THS_INT_CTRL_THERMAL_PER(800));
HWRITE4(sc, THS_CTRL0, THS_CTRL0_SENSOR_ACQ(31));
HWRITE4(sc, THS_CTRL2, THS_CTRL2_ADC_ACQ(31) |
THS_CTRL2_SENSE0_EN | THS_CTRL2_SENSE1_EN);

printf("After start acquistion\n");
printf("reg: 0x%x, data: 0x%x\n", THS_FILTER, HREAD4(sc, 0x70));
printf("reg: 0x%x, data: 0x%x\n", THS_INT_CTRL, HREAD4(sc, 0x44));
printf("reg: 0x%x, data: 0x%x\n", THS_CTRL0, HREAD4(sc, 0x0));
printf("reg: 0x%x, data: 0x%x\n", THS_CTRL2, HREAD4(sc, 0x40));
printf("reg: 0x%x, data: 0x%x\n", THS0_DATA, HREAD4(sc, 0x80));



***
Diff
***
sxitemp0 at simplebus0
addr: 0x1c25000, size: 0x400
Before start acquistion
reg: 0x70, data: 0x1
reg: 0x44, data: 0x0
reg: 0x0, data: 0xf
reg: 0x40, data: 0x4
reg: 0x80, data: 0x0
After start acquistion
reg: 0x70, data: 0x1
reg: 0x44, data: 0x0
reg: 0x0, data: 0xf
reg: 0x40, data: 0x4
reg: 0x80, data: 0x0
op1bsdsnap$ diff -u -p sxitemp.c.orig sxitemp.c
--- sxitemp.c.orig  Sun Dec 31 07:41:25 2017
+++ sxitemp.c   Tue May  8 15:46:30 2018
@@ -76,7 +76,9 @@ struct cfdriver sxitemp_cd = {
 uint64_t sxitemp_r40_calc_temp(int64_t);
 uint64_t sxitemp_h5_calc_temp0(int64_t);
 uint64_t sxitemp_h5_calc_temp1(int64_t);
+uint64_t sxitemp_h3_calc_temp(int64_t);
 void   sxitemp_refresh_sensors(void *);
+voidsxitemp_refresh_h3_sensors(void *);

 int
 sxitemp_match(struct device *parent, void *match, void *aux)
@@ -84,6 +86,7 @@ sxitemp_match(struct device *parent, void *match, void
struct fdt_attach_args *faa = aux;

return (OF_is_compatible(faa->fa_node, "allwinner,sun8i-r40-ths") ||
+OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-ths") ||
OF_is_compatible(faa->fa_node, "allwinner,sun50i-h5-ths"));
 }

@@ -113,12 +116,17 @@ sxitemp_attach(struct device *parent, struct device *s
clock_enable_all(node);
reset_deassert_all(node);

-   if (OF_is_compatible(faa->fa_node, "allwinner,sun8i-r40-ths")) {
-   sc->sc_calc_temp0 = sxitemp_r40_calc_temp;
-   sc->sc_calc_temp1 = sxitemp_r40_calc_temp;
-   } else {
-   sc->sc_calc_temp0 = sxitemp_h5_calc_temp0;
-   sc->sc_calc_temp1 = sxitemp_h5_calc_temp1;
+if (OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-ths"))
+sc->sc_calc_temp0 = sxitemp_h3_calc_temp;
+else {
+
+   if (OF_is_compatible(faa->fa_node,
"allwinner,sun8i-r40-ths")) {
+   sc->sc_calc_temp0 = sxitemp_r40_calc_temp;
+   sc->sc_calc_temp1 = sxitemp_r40_calc_temp;
+   } else {
+   sc->sc_calc_temp0 = sxitemp_h5_calc_temp0;
+   sc->sc_calc_temp1 = sxitemp_h5_calc_temp1;
+   }
}

/* Start data acquisition. */
@@ -135,15 +143,29 @@ sxitemp_attach(struct device *parent, struct device *s

sxitemp for H3 SOC

2018-05-08 Thread s_graf
I am trying to add H3 support to the sxitemp driver.  The H3 SOC only has
the CPU thermal sensor, but it maps well to the CPU thermal sensor on the
H5.  With the diff below I think I have been able to do all the mechanical
stuff to get the sensor to register.  I also had to add a dtb entry for the
sensor, also shown below.  The sensor shows up in sysctl and the readout
value corresponds to a value of 0 from the device temperature register.

 

To figure out why the sensor is not providing a readout I added some
printouts to the driver.  It would seem that the registers are not being set
or that the address is not correct.  But everything looks good.

 

Does anyone have suggestions as to what to look at next?

 

***

Sysctl output

***

op1bsdsnap# sysctl hw.sensors

hw.sensors.sxitemp0.temp0=187.74 degC (CPU)

hw.sensors.bme0.temp0=21.88 degC

hw.sensors.bme0.humidity0=54.37%

hw.sensors.bme0.pressure0=100.37 Pa

hw.sensors.bme1.temp0=22.64 degC

hw.sensors.bme1.humidity0=50.28%

hw.sensors.bme1.pressure0=100.34 Pa

 

***

Dmesg after additional debug printouts

***

sxitemp0 at simplebus0

addr: 0x1c25000, size: 0x400

Before start acquistion

reg: 0x70, data: 0x1

reg: 0x44, data: 0x0

reg: 0x0, data: 0xf

reg: 0x40, data: 0x4

reg: 0x80, data: 0x0

After start acquistion

reg: 0x70, data: 0x1

reg: 0x44, data: 0x0

reg: 0x0, data: 0xf

reg: 0x40, data: 0x4

reg: 0x80, data: 0x0

 

 

***

Code for debug

***

 

pinctrl_byname(node, "default");

printf("addr: 0x%llx, size: 0x%llx\n", faa->fa_reg[0].addr,
faa->fa_reg[0].size);

clock_enable_all(node);

reset_deassert_all(node);

 

printf("Before start acquistion\n");

printf("reg: 0x%x, data: 0x%x\n", THS_FILTER, HREAD4(sc, 0x70));

printf("reg: 0x%x, data: 0x%x\n", THS_INT_CTRL, HREAD4(sc, 0x44));

printf("reg: 0x%x, data: 0x%x\n", THS_CTRL0, HREAD4(sc, 0x0));

printf("reg: 0x%x, data: 0x%x\n", THS_CTRL2, HREAD4(sc, 0x40));

printf("reg: 0x%x, data: 0x%x\n", THS0_DATA, HREAD4(sc, 0x80));

 

/* Start data acquisition. */

HWRITE4(sc, THS_FILTER, THS_FILTER_EN | THS_FILTER_TYPE(1));

HWRITE4(sc, THS_INT_CTRL, THS_INT_CTRL_THERMAL_PER(800));

HWRITE4(sc, THS_CTRL0, THS_CTRL0_SENSOR_ACQ(31));

HWRITE4(sc, THS_CTRL2, THS_CTRL2_ADC_ACQ(31) |

THS_CTRL2_SENSE0_EN | THS_CTRL2_SENSE1_EN);

 

printf("After start acquistion\n");

printf("reg: 0x%x, data: 0x%x\n", THS_FILTER, HREAD4(sc, 0x70));

printf("reg: 0x%x, data: 0x%x\n", THS_INT_CTRL, HREAD4(sc, 0x44));

printf("reg: 0x%x, data: 0x%x\n", THS_CTRL0, HREAD4(sc, 0x0));

printf("reg: 0x%x, data: 0x%x\n", THS_CTRL2, HREAD4(sc, 0x40));

printf("reg: 0x%x, data: 0x%x\n", THS0_DATA, HREAD4(sc, 0x80));

 

 

 

***

Diff

***

sxitemp0 at simplebus0

addr: 0x1c25000, size: 0x400

Before start acquistion

reg: 0x70, data: 0x1

reg: 0x44, data: 0x0

reg: 0x0, data: 0xf

reg: 0x40, data: 0x4

reg: 0x80, data: 0x0

After start acquistion

reg: 0x70, data: 0x1

reg: 0x44, data: 0x0

reg: 0x0, data: 0xf

reg: 0x40, data: 0x4

reg: 0x80, data: 0x0

op1bsdsnap$ diff -u -p sxitemp.c.orig sxitemp.c

--- sxitemp.c.orig  Sun Dec 31 07:41:25 2017

+++ sxitemp.c   Tue May  8 15:46:30 2018

@@ -76,7 +76,9 @@ struct cfdriver sxitemp_cd = {  uint64_t
sxitemp_r40_calc_temp(int64_t);  uint64_t sxitemp_h5_calc_temp0(int64_t);
uint64_t sxitemp_h5_calc_temp1(int64_t);

+uint64_t sxitemp_h3_calc_temp(int64_t);

void   sxitemp_refresh_sensors(void *);

+voidsxitemp_refresh_h3_sensors(void *);

 

int

sxitemp_match(struct device *parent, void *match, void *aux) @@ -84,6 +86,7
@@ sxitemp_match(struct device *parent, void *match, void

struct fdt_attach_args *faa = aux;

 

return (OF_is_compatible(faa->fa_node, "allwinner,sun8i-r40-ths") ||

+OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-ths") ||

OF_is_compatible(faa->fa_node, "allwinner,sun50i-h5-ths"));  }

 

@@ -113,12 +116,17 @@ sxitemp_attach(struct device *parent, struct device *s

clock_enable_all(node);

reset_deassert_all(node);

 

-   if (OF_is_compatible(faa->fa_node, "allwinner,sun8i-r40-ths")) {

-   sc->sc_calc_temp0 = sxitemp_r40_calc_temp;

-   sc->sc_calc_temp1 = sxitemp_r40_calc_temp;

-   } else {

-   sc->sc_calc_temp0 = sxitemp_h5_calc_temp0;

-   sc->sc_calc_temp1 = sxitemp_h5_calc_temp1;

+if (OF_is_compatible(faa->fa_node, "allwinner,sun8i-h3-ths"))

+sc->sc_calc_temp0 = sxitemp_h3_calc_temp;

+else {

+

+   if (OF_is_compatible(faa->fa_node,
"allwinner,sun8i-r40-ths")) {

+   sc->sc_calc_temp0 = sxitemp_r40_calc_temp;

+   sc->sc_calc_temp1 = sxitemp_r40_calc_temp;

+   } else {

+   sc->sc_calc_temp0 = sxitemp_h5_calc_temp0;

+   sc->sc_calc_temp1 = sxitemp_h5_calc_temp1;

+   }