[PATCH v2] drm/amd/pm: replace kmalloc+memcpy by kmemdup

2020-10-29 Thread Deepak R Varma
Use kmemdup() for instructions using kmalloc() + memcpy(). More
information here: https://lwn.net/Articles/198928/
Issue reported by coccinelle script: scripts/coccinelle/api/memdup.cocci

Signed-off-by: Deepak R Varma 
---
Changes since v1:
   - Update patch subject and log message to match proposed change.
   
Please Note: This is a Outreachy project task patch.

 .../gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c  | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c 
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
index 740e2fc7a034..1e79baab753e 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
@@ -252,12 +252,11 @@ static int init_powerplay_table_information(
phm_copy_clock_limits_array(hwmgr, 
&pptable_information->power_saving_clock_max, 
powerplay_table->PowerSavingClockMax, ATOM_VEGA12_PPCLOCK_COUNT);
phm_copy_clock_limits_array(hwmgr, 
&pptable_information->power_saving_clock_min, 
powerplay_table->PowerSavingClockMin, ATOM_VEGA12_PPCLOCK_COUNT);
 
-   pptable_information->smc_pptable = kmalloc(sizeof(PPTable_t), 
GFP_KERNEL);
+   pptable_information->smc_pptable = 
kmemdup(&(powerplay_table->smcPPTable),
+  sizeof(PPTable_t), 
GFP_KERNEL);
if (pptable_information->smc_pptable == NULL)
return -ENOMEM;
 
-   memcpy(pptable_information->smc_pptable, 
&(powerplay_table->smcPPTable), sizeof(PPTable_t));
-
result = append_vbios_pptable(hwmgr, 
(pptable_information->smc_pptable));
 
return result;
-- 
2.25.1

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[PATCH] drm/amd/pm: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()

2020-10-29 Thread Deepak R Varma
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498

Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci

Signed-off-by: Deepak R Varma 
---
Please Note: This is a Outreachy project task patch.

 .../gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c  | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c 
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
index 740e2fc7a034..1e79baab753e 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c
@@ -252,12 +252,11 @@ static int init_powerplay_table_information(
phm_copy_clock_limits_array(hwmgr, 
&pptable_information->power_saving_clock_max, 
powerplay_table->PowerSavingClockMax, ATOM_VEGA12_PPCLOCK_COUNT);
phm_copy_clock_limits_array(hwmgr, 
&pptable_information->power_saving_clock_min, 
powerplay_table->PowerSavingClockMin, ATOM_VEGA12_PPCLOCK_COUNT);
 
-   pptable_information->smc_pptable = kmalloc(sizeof(PPTable_t), 
GFP_KERNEL);
+   pptable_information->smc_pptable = 
kmemdup(&(powerplay_table->smcPPTable),
+  sizeof(PPTable_t), 
GFP_KERNEL);
if (pptable_information->smc_pptable == NULL)
return -ENOMEM;
 
-   memcpy(pptable_information->smc_pptable, 
&(powerplay_table->smcPPTable), sizeof(PPTable_t));
-
result = append_vbios_pptable(hwmgr, 
(pptable_information->smc_pptable));
 
return result;
-- 
2.25.1

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[PATCH] drm/amdgpu: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()

2020-10-29 Thread Deepak R Varma
Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
function in place of the debugfs_create_file() function will make the
file operation struct "reset" aware of the file's lifetime. Additional
details here: https://lists.archive.carbon60.com/linux/kernel/2369498

Issue reported by Coccinelle script:
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci

Signed-off-by: Deepak R Varma 
---
Please Note: This is a Outreachy project task patch.

 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index 2d125b8b15ee..f076b1ba7319 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1551,29 +1551,29 @@ static int amdgpu_debugfs_sclk_set(void *data, u64 val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(fops_ib_preempt, NULL,
-   amdgpu_debugfs_ib_preempt, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
+amdgpu_debugfs_ib_preempt, "%llu\n");
 
-DEFINE_SIMPLE_ATTRIBUTE(fops_sclk_set, NULL,
-   amdgpu_debugfs_sclk_set, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
+amdgpu_debugfs_sclk_set, "%llu\n");
 
 int amdgpu_debugfs_init(struct amdgpu_device *adev)
 {
int r, i;
 
adev->debugfs_preempt =
-   debugfs_create_file("amdgpu_preempt_ib", 0600,
-   adev_to_drm(adev)->primary->debugfs_root, 
adev,
-   &fops_ib_preempt);
+   debugfs_create_file_unsafe("amdgpu_preempt_ib", 0600,
+  
adev_to_drm(adev)->primary->debugfs_root, adev,
+  &fops_ib_preempt);
if (!(adev->debugfs_preempt)) {
DRM_ERROR("unable to create amdgpu_preempt_ib debugsfs file\n");
return -EIO;
}
 
adev->smu.debugfs_sclk =
-   debugfs_create_file("amdgpu_force_sclk", 0200,
-   adev_to_drm(adev)->primary->debugfs_root, 
adev,
-   &fops_sclk_set);
+   debugfs_create_file_unsafe("amdgpu_force_sclk", 0200,
+  
adev_to_drm(adev)->primary->debugfs_root, adev,
+  &fops_sclk_set);
if (!(adev->smu.debugfs_sclk)) {
DRM_ERROR("unable to create amdgpu_set_sclk debugsfs file\n");
return -EIO;
-- 
2.25.1

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Re: [Outreachy kernel] [PATCH] drm/amdgpu: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()

2020-10-30 Thread Deepak R Varma
On Fri, Oct 30, 2020 at 08:11:20AM +0100, Greg KH wrote:
> On Fri, Oct 30, 2020 at 08:52:45AM +0530, Deepak R Varma wrote:
> > Using DEFINE_DEBUGFS_ATTRIBUTE macro with debugfs_create_file_unsafe()
> > function in place of the debugfs_create_file() function will make the
> > file operation struct "reset" aware of the file's lifetime. Additional
> > details here: https://lists.archive.carbon60.com/linux/kernel/2369498
> > 
> > Issue reported by Coccinelle script:
> > scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
> > 
> > Signed-off-by: Deepak R Varma 
> > ---
> > Please Note: This is a Outreachy project task patch.
> > 
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 ++--
> >  1 file changed, 10 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > index 2d125b8b15ee..f076b1ba7319 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > @@ -1551,29 +1551,29 @@ static int amdgpu_debugfs_sclk_set(void *data, u64 
> > val)
> > return 0;
> >  }
> >  
> > -DEFINE_SIMPLE_ATTRIBUTE(fops_ib_preempt, NULL,
> > -   amdgpu_debugfs_ib_preempt, "%llu\n");
> > +DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
> > +amdgpu_debugfs_ib_preempt, "%llu\n");
> 
> Are you sure this is ok?  Do these devices need this additional
> "protection"?  Do they have the problem that these macros were written
> for?
> 
> Same for the other patches you just submitted here, I think you need to
> somehow "prove" that these changes are necessary, checkpatch isn't able
> to determine this all the time.

Hi Greg,
Based on my understanding, the current function debugfs_create_file()
adds an overhead of lifetime managing proxy for such fop structs. This
should be applicable to these set of drivers as well. Hence I think this
change will be useful.

I will wait for comments from other experts for driver specific
consideration / behavior.

Thanks,
drv


> 
> thanks,
> 
> greg k-h
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Re: [Outreachy kernel] [PATCH] drm/amdgpu: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()

2020-10-30 Thread Deepak R Varma
On Fri, Oct 30, 2020 at 10:24:57AM +0100, Daniel Vetter wrote:
> On Fri, Oct 30, 2020 at 10:15:21AM +0100, Daniel Vetter wrote:
> > On Fri, Oct 30, 2020 at 09:25:18AM +0100, Greg KH wrote:
> > > On Fri, Oct 30, 2020 at 09:00:04AM +0100, Christian König wrote:
> > > > Am 30.10.20 um 08:57 schrieb Deepak R Varma:
> > > > > On Fri, Oct 30, 2020 at 08:11:20AM +0100, Greg KH wrote:
> > > > > > On Fri, Oct 30, 2020 at 08:52:45AM +0530, Deepak R Varma wrote:
> > > > > > > Using DEFINE_DEBUGFS_ATTRIBUTE macro with 
> > > > > > > debugfs_create_file_unsafe()
> > > > > > > function in place of the debugfs_create_file() function will make 
> > > > > > > the
> > > > > > > file operation struct "reset" aware of the file's lifetime. 
> > > > > > > Additional
> > > > > > > details here: 
> > > > > > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.archive.carbon60.com%2Flinux%2Fkernel%2F2369498&data=04%7C01%7Cchristian.koenig%40amd.com%7Cddd7a6ac8164415a639708d87ca97004%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637396414464384011%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=o6GOHvMxNMuOPlC4nhDyURCHBLqfQZhYQq%2BiIMt3D3s%3D&reserved=0
> > > > > > > 
> > > > > > > Issue reported by Coccinelle script:
> > > > > > > scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
> > > > > > > 
> > > > > > > Signed-off-by: Deepak R Varma 
> > > > > > > ---
> > > > > > > Please Note: This is a Outreachy project task patch.
> > > > > > > 
> > > > > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 
> > > > > > > ++--
> > > > > > >   1 file changed, 10 insertions(+), 10 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
> > > > > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > > > > > > index 2d125b8b15ee..f076b1ba7319 100644
> > > > > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > > > > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > > > > > > @@ -1551,29 +1551,29 @@ static int amdgpu_debugfs_sclk_set(void 
> > > > > > > *data, u64 val)
> > > > > > >   return 0;
> > > > > > >   }
> > > > > > > -DEFINE_SIMPLE_ATTRIBUTE(fops_ib_preempt, NULL,
> > > > > > > - amdgpu_debugfs_ib_preempt, "%llu\n");
> > > > > > > +DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
> > > > > > > +  amdgpu_debugfs_ib_preempt, "%llu\n");
> > > > > > Are you sure this is ok?  Do these devices need this additional
> > > > > > "protection"?  Do they have the problem that these macros were 
> > > > > > written
> > > > > > for?
> > > > > > 
> > > > > > Same for the other patches you just submitted here, I think you 
> > > > > > need to
> > > > > > somehow "prove" that these changes are necessary, checkpatch isn't 
> > > > > > able
> > > > > > to determine this all the time.
> > > > > Hi Greg,
> > > > > Based on my understanding, the current function debugfs_create_file()
> > > > > adds an overhead of lifetime managing proxy for such fop structs. This
> > > > > should be applicable to these set of drivers as well. Hence I think 
> > > > > this
> > > > > change will be useful.
> > > > 
> > > > Well since this is only created once per device instance I don't really 
> > > > care
> > > > about this little overhead.
> > > > 
> > > > But what exactly is debugfs doing or not doing here?
> > > 
> > > It is trying to save drivers from having debugfs files open that point
> > > to memory that can go away at any time.  For graphics devices, I doubt
> > > that is the case.
> > 
> > So for anything we add/remove we have two-stage cleanup
> > 
> > 1. drm_dev_unregister (or drm_connector_unregisters, those are the only
> > two hotunpluggable t

[PATCH 2/6] drm/amdgpu/gfx: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c  |  2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 56fdbe626d30..987f9b6dbc3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3192,7 +3192,7 @@ static void gfx_v10_0_set_irq_funcs(struct amdgpu_device 
*adev);
 static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev);
 static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev);
 static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev,
- struct amdgpu_cu_info *cu_info);
+struct amdgpu_cu_info *cu_info);
 static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev);
 static void gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num,
   u32 sh_num, u32 instance);
@@ -4200,10 +4200,10 @@ static void gfx_v10_0_read_wave_vgprs(struct 
amdgpu_device *adev, uint32_t simd,
 }
 
 static void gfx_v10_0_select_me_pipe_q(struct amdgpu_device *adev,
- u32 
me, u32 pipe, u32 q, u32 vm)
- {
-   nv_grbm_select(adev, me, pipe, q, vm);
- }
+  u32 me, u32 pipe, u32 q, u32 vm)
+{
+   nv_grbm_select(adev, me, pipe, q, vm);
+}
 
 
 static const struct amdgpu_gfx_funcs gfx_v10_0_gfx_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 94b7e0531d09..3e9a230f84df 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5058,7 +5058,7 @@ static int gfx_v8_0_pre_soft_reset(void *handle)
gfx_v8_0_cp_compute_enable(adev, false);
}
 
-   return 0;
+   return 0;
 }
 
 static int gfx_v8_0_soft_reset(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 6959aebae6d4..48f98c750956 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -787,7 +787,7 @@ static void gfx_v9_0_set_irq_funcs(struct amdgpu_device 
*adev);
 static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev);
 static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev);
 static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
- struct amdgpu_cu_info *cu_info);
+   struct amdgpu_cu_info *cu_info);
 static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev);
 static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring);
 static u64 gfx_v9_0_ring_get_rptr_compute(struct amdgpu_ring *ring);
-- 
2.25.1

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[PATCH 5/6] drm/amdgpu/amdgpu: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. The patch corrects issues for various amdgpu_*.c files
for this driver. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 22 +--
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  | 20 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 18 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c   | 10 -
 .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c   | 14 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c  |  2 +-
 13 files changed, 62 insertions(+), 62 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index d3e51d361179..1400957034a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -36,17 +36,17 @@
 
 #include "acp_gfx_if.h"
 
-#define ACP_TILE_ON_MASK   0x03
-#define ACP_TILE_OFF_MASK  0x02
-#define ACP_TILE_ON_RETAIN_REG_MASK0x1f
-#define ACP_TILE_OFF_RETAIN_REG_MASK   0x20
+#define ACP_TILE_ON_MASK   0x03
+#define ACP_TILE_OFF_MASK  0x02
+#define ACP_TILE_ON_RETAIN_REG_MASK0x1f
+#define ACP_TILE_OFF_RETAIN_REG_MASK   0x20
 
-#define ACP_TILE_P1_MASK   0x3e
-#define ACP_TILE_P2_MASK   0x3d
-#define ACP_TILE_DSP0_MASK 0x3b
-#define ACP_TILE_DSP1_MASK 0x37
+#define ACP_TILE_P1_MASK   0x3e
+#define ACP_TILE_P2_MASK   0x3d
+#define ACP_TILE_DSP0_MASK 0x3b
+#define ACP_TILE_DSP1_MASK 0x37
 
-#define ACP_TILE_DSP2_MASK 0x2f
+#define ACP_TILE_DSP2_MASK 0x2f
 
 #define ACP_DMA_REGS_END   0x146c0
 #define ACP_I2S_PLAY_REGS_START0x14840
@@ -75,8 +75,8 @@
 #define mmACP_CONTROL  0x5131
 #define mmACP_STATUS   0x5133
 #define mmACP_SOFT_RESET   0x5134
-#define ACP_CONTROL__ClkEn_MASK0x1
-#define ACP_SOFT_RESET__SoftResetAud_MASK  0x100
+#define ACP_CONTROL__ClkEn_MASK0x1
+#define ACP_SOFT_RESET__SoftResetAud_MASK  0x100
 #define ACP_SOFT_RESET__SoftResetAudDone_MASK  0x100
 #define ACP_CLOCK_EN_TIME_OUT_VALUE0x00FF
 #define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x00FF
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 5da487b64a66..3fee885f6ac8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1115,19 +1115,19 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct 
kgd_dev *kgd, void *vm)
 void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)
 {
struct amdgpu_device *adev = get_amdgpu_device(kgd);
-struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
+   struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
 
if (WARN_ON(!kgd || !vm))
-return;
+   return;
 
-pr_debug("Releasing process vm %p\n", vm);
+   pr_debug("Releasing process vm %p\n", vm);
 
-/* The original pasid of amdgpu vm has already been
- * released during making a amdgpu vm to a compute vm
- * The current pasid is managed by kfd and will be
- * released on kfd process destroy. Set amdgpu pasid
- * to 0 to avoid duplicate release.
- */
+   /* The original pasid of amdgpu vm has already been
+* released during making a amdgpu vm to a compute vm
+* The current pasid is managed by kfd and will be
+* released on kfd process destroy. Set amdgpu pasid
+* to 0 to avoid duplicate release.
+*/
amdgpu_vm_release_compute(adev, avm);
 }
 
@@ -1694,7 +1694,7 @@ int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
 
INIT_LIST_HEAD(&(*mem)->bo_va_list);
mutex_init(&(*mem)->lock);
-   
+
(*mem)->alloc_flags =
((bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) ?
KFD_IOC_ALLOC_MEM_FLAGS_VRAM : KFD_IOC_ALLOC_MEM_FLAGS_GTT)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/dri

[PATCH 3/6] drm/amdgpu/vcn: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 10 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index e5d29dee0c88..136270e4af7b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -45,7 +45,7 @@
 #define mmUVD_SCRATCH9_INTERNAL_OFFSET 0xc01d
 
 #define mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET  0x1e1
-#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x5a6
+#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x5a6
 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET 0x5a7
 #define mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET  0x1e2
 
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 0f1d3ef8baa7..4094718ae27a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -45,7 +45,7 @@
 
 #define mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET  0x431
 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET 0x3b4
-#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x3b5
+#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x3b5
 #define mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET  0x25c
 
 #define VCN25_MAX_HW_INSTANCES_ARCTURUS2
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index e074f7ed388c..13e511d77bb1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -44,10 +44,10 @@
 
 #define mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET  0x431
 #define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET 0x3b4
-#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x3b5
+#define mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET0x3b5
 #define mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET  0x25c
 
-#define VCN_INSTANCES_SIENNA_CICHLID   2
+#define VCN_INSTANCES_SIENNA_CICHLID   2
 
 static int amdgpu_ih_clientid_vcns[] = {
SOC15_IH_CLIENTID_VCN,
@@ -55,8 +55,8 @@ static int amdgpu_ih_clientid_vcns[] = {
 };
 
 static int amdgpu_ucode_id_vcns[] = {
-   AMDGPU_UCODE_ID_VCN,
-   AMDGPU_UCODE_ID_VCN1
+   AMDGPU_UCODE_ID_VCN,
+   AMDGPU_UCODE_ID_VCN1
 };
 
 static int vcn_v3_0_start_sriov(struct amdgpu_device *adev);
@@ -1371,7 +1371,7 @@ static int vcn_v3_0_start_sriov(struct amdgpu_device 
*adev)
}
 
/* Update init table header in memory */
-size = sizeof(struct mmsch_v3_0_init_header);
+   size = sizeof(struct mmsch_v3_0_init_header);
table_loc = (uint32_t *)table->cpu_addr;
memcpy((void *)table_loc, &header, size);
 
-- 
2.25.1

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[PATCH 4/6] drm/amdgpu/nbio: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c 
b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
index 7b2fb050407d..d2f1fe55d388 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
@@ -32,7 +32,7 @@
 
 static u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev)
 {
-u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
+   u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
 
tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
@@ -114,7 +114,7 @@ static void 
nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
 static void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev,
bool use_doorbell, int doorbell_index)
 {
-   u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
+   u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE);
 
if (use_doorbell) {
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, 
BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c 
b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
index d34628e113fc..ae685813c419 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
@@ -43,7 +43,7 @@ static void nbio_v7_0_remap_hdp_registers(struct 
amdgpu_device *adev)
 
 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev)
 {
-u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
+   u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
 
tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
@@ -126,7 +126,7 @@ static void 
nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *ad
 static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev,
bool use_doorbell, int doorbell_index)
 {
-   u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0 , mmBIF_IH_DOORBELL_RANGE);
+   u32 ih_doorbell_range = RREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE);
 
if (use_doorbell) {
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, 
BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
-- 
2.25.1

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[PATCH 6/6] drm/amdgpu: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. The patch covers various .c files for this driver.
Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/atom.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/df_v1_7.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c  | 8 
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/si_ih.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c  | 2 +-
 9 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
b/drivers/gpu/drm/amd/amdgpu/atom.c
index 4cfc786699c7..696e97ab77eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/atom.c
+++ b/drivers/gpu/drm/amd/amdgpu/atom.c
@@ -71,8 +71,8 @@ static int amdgpu_atom_execute_table_locked(struct 
atom_context *ctx, int index,
 int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * 
params);
 
 static uint32_t atom_arg_mask[8] =
-{ 0x, 0x, 0x00, 0x, 0xFF, 0xFF00, 0xFF,
-0xFF00 };
+   { 0x, 0x, 0x00, 0x, 0xFF, 0xFF00, 0xFF,
+ 0xFF00 };
 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
 
 static int atom_dst_to_src[8][4] = {
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 20f108818b2b..52f05d2f5ed9 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
@@ -195,7 +195,7 @@ static void cik_sdma_ring_set_wptr(struct amdgpu_ring *ring)
struct amdgpu_device *adev = ring->adev;
 
WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me],
-   (lower_32_bits(ring->wptr) << 2) & 0x3fffc);
+  (lower_32_bits(ring->wptr) << 2) & 0x3fffc);
 }
 
 static void cik_sdma_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
diff --git a/drivers/gpu/drm/amd/amdgpu/df_v1_7.c 
b/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
index d6aca1c08068..2d01ac0d4c11 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
@@ -41,7 +41,7 @@ static void df_v1_7_sw_fini(struct amdgpu_device *adev)
 }
 
 static void df_v1_7_enable_broadcast_mode(struct amdgpu_device *adev,
-  bool enable)
+ bool enable)
 {
u32 tmp;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index dbc8b76b9b78..6b04729d8fec 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -145,7 +145,7 @@ static const struct amdgpu_irq_src_funcs 
gmc_v10_0_ecc_funcs = {
.process = amdgpu_umc_process_ecc_irq,
 };
 
- static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev)
+static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev)
 {
adev->gmc.vm_fault.num_types = 1;
adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs;
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index 94caf5204c8b..7b1a18cbafc4 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -32,19 +32,19 @@
 #include "vcn/vcn_2_0_0_sh_mask.h"
 #include "ivsrcid/vcn/irqsrcs_vcn_2_0.h"
 
-#define mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET0x1bfff
+#define mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET
0x1bfff
 #define mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET   0x4029
 #define mmUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET 0x402a
 #define mmUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET 0x402b
 #define mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET 0x40ea
-#define mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET0x40eb
+#define mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET
0x40eb
 #define mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET 0x40cf
 #define mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET0x40d1
-#define mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET0x40e8
+#define mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET
0x40e8
 #define mmUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET   0x40e9
 #define mmUVD_JRBC_IB_SIZE_INTERNAL_OFFSET 0x4082
 #define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW_INTERNAL_OFFSET 0x40ec
-#define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET0x40ed
+#define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET
0x40ed
 #define mmUVD_JRBC_RB_CO

[PATCH 1/6] drm/amdgpu/dce: improve code indentation and alignment

2020-11-02 Thread Deepak R Varma
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c  | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 5963cbe0d455..00f8e60909b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2677,7 +2677,7 @@ static int dce_v10_0_crtc_set_base_atomic(struct drm_crtc 
*crtc,
 struct drm_framebuffer *fb,
 int x, int y, enum mode_set_atomic 
state)
 {
-   return dce_v10_0_crtc_do_set_base(crtc, fb, x, y, 1);
+   return dce_v10_0_crtc_do_set_base(crtc, fb, x, y, 1);
 }
 
 static const struct drm_crtc_helper_funcs dce_v10_0_crtc_helper_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 1954472c8e8f..80036f7ce560 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2785,7 +2785,7 @@ static int dce_v11_0_crtc_set_base_atomic(struct drm_crtc 
*crtc,
 struct drm_framebuffer *fb,
 int x, int y, enum mode_set_atomic 
state)
 {
-   return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1);
+   return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1);
 }
 
 static const struct drm_crtc_helper_funcs dce_v11_0_crtc_helper_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 3a44753a80d1..943976349346 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2567,7 +2567,7 @@ static int dce_v6_0_crtc_set_base_atomic(struct drm_crtc 
*crtc,
 struct drm_framebuffer *fb,
 int x, int y, enum mode_set_atomic 
state)
 {
-   return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1);
+   return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1);
 }
 
 static const struct drm_crtc_helper_funcs dce_v6_0_crtc_helper_funcs = {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 3603e5f13077..7973183fa335 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2498,7 +2498,7 @@ static void dce_v8_0_crtc_disable(struct drm_crtc *crtc)
case ATOM_PPLL2:
/* disable the ppll */
amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, 
amdgpu_crtc->pll_id,
- 0, 0, ATOM_DISABLE, 0, 0, 0, 
0, 0, false, &ss);
+0, 0, ATOM_DISABLE, 0, 0, 0, 
0, 0, false, &ss);
break;
case ATOM_PPLL0:
/* disable the ppll */
@@ -2585,7 +2585,7 @@ static int dce_v8_0_crtc_set_base_atomic(struct drm_crtc 
*crtc,
 struct drm_framebuffer *fb,
 int x, int y, enum mode_set_atomic 
state)
 {
-   return dce_v8_0_crtc_do_set_base(crtc, fb, x, y, 1);
+   return dce_v8_0_crtc_do_set_base(crtc, fb, x, y, 1);
 }
 
 static const struct drm_crtc_helper_funcs dce_v8_0_crtc_helper_funcs = {
-- 
2.25.1

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[PATCH] drm/amdgpu: do not initialise global variables to 0 or NULL

2020-11-02 Thread Deepak R Varma
Initializing global variable to 0 or NULL is not necessary and should
be avoided. Issue reported by checkpatch script as:
ERROR: do not initialise globals to 0 (or NULL).

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 46 -
 drivers/gpu/drm/amd/amdgpu/atom.c   |  4 +--
 2 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 8ab6126ff70c..6de94c46bc91 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -94,16 +94,16 @@
 #define KMS_DRIVER_MINOR   40
 #define KMS_DRIVER_PATCHLEVEL  0
 
-int amdgpu_vram_limit = 0;
-int amdgpu_vis_vram_limit = 0;
+int amdgpu_vram_limit;
+int amdgpu_vis_vram_limit;
 int amdgpu_gart_size = -1; /* auto */
 int amdgpu_gtt_size = -1; /* auto */
 int amdgpu_moverate = -1; /* auto */
-int amdgpu_benchmarking = 0;
-int amdgpu_testing = 0;
+int amdgpu_benchmarking;
+int amdgpu_testing;
 int amdgpu_audio = -1;
-int amdgpu_disp_priority = 0;
-int amdgpu_hw_i2c = 0;
+int amdgpu_disp_priority;
+int amdgpu_hw_i2c;
 int amdgpu_pcie_gen2 = -1;
 int amdgpu_msi = -1;
 char amdgpu_lockup_timeout[AMDGPU_MAX_TIMEOUT_PARAM_LENGTH];
@@ -113,43 +113,43 @@ int amdgpu_aspm = -1;
 int amdgpu_runtime_pm = -1;
 uint amdgpu_ip_block_mask = 0x;
 int amdgpu_bapm = -1;
-int amdgpu_deep_color = 0;
+int amdgpu_deep_color;
 int amdgpu_vm_size = -1;
 int amdgpu_vm_fragment_size = -1;
 int amdgpu_vm_block_size = -1;
-int amdgpu_vm_fault_stop = 0;
-int amdgpu_vm_debug = 0;
+int amdgpu_vm_fault_stop;
+int amdgpu_vm_debug;
 int amdgpu_vm_update_mode = -1;
-int amdgpu_exp_hw_support = 0;
+int amdgpu_exp_hw_support;
 int amdgpu_dc = -1;
 int amdgpu_sched_jobs = 32;
 int amdgpu_sched_hw_submission = 2;
-uint amdgpu_pcie_gen_cap = 0;
-uint amdgpu_pcie_lane_cap = 0;
+uint amdgpu_pcie_gen_cap;
+uint amdgpu_pcie_lane_cap;
 uint amdgpu_cg_mask = 0x;
 uint amdgpu_pg_mask = 0x;
 uint amdgpu_sdma_phase_quantum = 32;
-char *amdgpu_disable_cu = NULL;
-char *amdgpu_virtual_display = NULL;
+char *amdgpu_disable_cu;
+char *amdgpu_virtual_display;
 /* OverDrive(bit 14) disabled by default*/
 uint amdgpu_pp_feature_mask = 0xbfff;
-uint amdgpu_force_long_training = 0;
-int amdgpu_job_hang_limit = 0;
+uint amdgpu_force_long_training;
+int amdgpu_job_hang_limit;
 int amdgpu_lbpw = -1;
 int amdgpu_compute_multipipe = -1;
 int amdgpu_gpu_recovery = -1; /* auto */
-int amdgpu_emu_mode = 0;
-uint amdgpu_smu_memory_pool_size = 0;
+int amdgpu_emu_mode;
+uint amdgpu_smu_memory_pool_size;
 /* FBC (bit 0) disabled by default*/
-uint amdgpu_dc_feature_mask = 0;
-uint amdgpu_dc_debug_mask = 0;
+uint amdgpu_dc_feature_mask;
+uint amdgpu_dc_debug_mask;
 int amdgpu_async_gfx_ring = 1;
-int amdgpu_mcbp = 0;
+int amdgpu_mcbp;
 int amdgpu_discovery = -1;
-int amdgpu_mes = 0;
+int amdgpu_mes;
 int amdgpu_noretry = -1;
 int amdgpu_force_asic_type = -1;
-int amdgpu_tmz = 0;
+int amdgpu_tmz;
 int amdgpu_reset_method = -1; /* auto */
 int amdgpu_num_kcq = -1;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
b/drivers/gpu/drm/amd/amdgpu/atom.c
index 696e97ab77eb..46c00ee580b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/atom.c
+++ b/drivers/gpu/drm/amd/amdgpu/atom.c
@@ -66,7 +66,7 @@ typedef struct {
bool abort;
 } atom_exec_context;
 
-int amdgpu_atom_debug = 0;
+int amdgpu_atom_debug;
 static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int 
index, uint32_t * params);
 int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * 
params);
 
@@ -88,7 +88,7 @@ static int atom_dst_to_src[8][4] = {
 };
 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
 
-static int debug_depth = 0;
+static int debug_depth;
 #ifdef ATOM_DEBUG
 static void debug_print_spaces(int n)
 {
-- 
2.25.1

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[PATCH 6/6] drm/amdgpu: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/atom.c | 16 
 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c|  2 +-
 5 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
b/drivers/gpu/drm/amd/amdgpu/atom.c
index 46c00ee580b1..515890f4f5a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/atom.c
+++ b/drivers/gpu/drm/amd/amdgpu/atom.c
@@ -67,8 +67,8 @@ typedef struct {
 } atom_exec_context;
 
 int amdgpu_atom_debug;
-static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int 
index, uint32_t * params);
-int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * 
params);
+static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int 
index, uint32_t *params);
+int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t 
*params);
 
 static uint32_t atom_arg_mask[8] =
{ 0x, 0x, 0x00, 0x, 0xFF, 0xFF00, 0xFF,
@@ -1201,7 +1201,7 @@ static struct {
atom_op_div32, ATOM_ARG_WS},
 };
 
-static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int 
index, uint32_t * params)
+static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int 
index, uint32_t *params)
 {
int base = CU16(ctx->cmd_table + 4 + 2 * index);
int len, ws, ps, ptr;
@@ -1262,7 +1262,7 @@ static int amdgpu_atom_execute_table_locked(struct 
atom_context *ctx, int index,
return ret;
 }
 
-int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * 
params)
+int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t 
*params)
 {
int r;
 
@@ -1388,8 +1388,8 @@ void amdgpu_atom_destroy(struct atom_context *ctx)
 }
 
 bool amdgpu_atom_parse_data_header(struct atom_context *ctx, int index,
-   uint16_t * size, uint8_t * frev, uint8_t * crev,
-   uint16_t * data_start)
+   uint16_t *size, uint8_t *frev, uint8_t *crev,
+   uint16_t *data_start)
 {
int offset = index * 2 + 4;
int idx = CU16(ctx->data_table + offset);
@@ -1408,8 +1408,8 @@ bool amdgpu_atom_parse_data_header(struct atom_context 
*ctx, int index,
return true;
 }
 
-bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t 
* frev,
-  uint8_t * crev)
+bool amdgpu_atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t 
*frev,
+  uint8_t *crev)
 {
int offset = index * 2 + 4;
int idx = CU16(ctx->cmd_table + offset);
diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
index 09a538465ffd..af0335535f82 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_i2c.c
@@ -159,7 +159,7 @@ u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap)
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
-void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev, u8 
slave_addr, u8 line_number, u8 offset, u8 data)
+void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device *adev, u8 
slave_addr, u8 line_number, u8 offset, u8 data)
 {
PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
int index = GetIndexIntoMasterTable(COMMAND, 
ProcessI2cChannelTransaction);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 48f98c750956..e96ab5325af5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -5167,7 +5167,7 @@ static void gfx_v9_0_ring_set_wptr_gfx(struct amdgpu_ring 
*ring)
 
if (ring->use_doorbell) {
/* XXX check if swapping is necessary on BE */
-   atomic64_set((atomic64_t*)&adev->wb.wb[ring->wptr_offs], 
ring->wptr);
+   atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 
ring->wptr);
WDOORBELL64(ring->doorbell_index, ring->wptr);
} else {
WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));
@@ -5353,7 +5353,7 @@ static void gfx_v9_0_ring_set_wptr_compute(struct 
amdgpu_ring *ring)
 
/* XXX check if swapping is necessary on BE */
if (ring->use_doorbel

[PATCH 3/6] drm/amdgpu/jpeg: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 6 +++---
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index 7b1a18cbafc4..6b80dcea80ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -247,7 +247,7 @@ static int jpeg_v2_0_disable_power_gating(struct 
amdgpu_device *adev)
return 0;
 }
 
-static int jpeg_v2_0_enable_power_gating(struct amdgpu_device* adev)
+static int jpeg_v2_0_enable_power_gating(struct amdgpu_device *adev)
 {
if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {
uint32_t data;
@@ -274,7 +274,7 @@ static int jpeg_v2_0_enable_power_gating(struct 
amdgpu_device* adev)
return 0;
 }
 
-static void jpeg_v2_0_disable_clock_gating(struct amdgpu_device* adev)
+static void jpeg_v2_0_disable_clock_gating(struct amdgpu_device *adev)
 {
uint32_t data;
 
@@ -297,7 +297,7 @@ static void jpeg_v2_0_disable_clock_gating(struct 
amdgpu_device* adev)
WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data);
 }
 
-static void jpeg_v2_0_enable_clock_gating(struct amdgpu_device* adev)
+static void jpeg_v2_0_enable_clock_gating(struct amdgpu_device *adev)
 {
uint32_t data;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c 
b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
index 845306f63cdb..c6724a0e0c43 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
@@ -247,7 +247,7 @@ static int jpeg_v2_5_resume(void *handle)
return r;
 }
 
-static void jpeg_v2_5_disable_clock_gating(struct amdgpu_device* adev, int 
inst)
+static void jpeg_v2_5_disable_clock_gating(struct amdgpu_device *adev, int 
inst)
 {
uint32_t data;
 
@@ -276,7 +276,7 @@ static void jpeg_v2_5_disable_clock_gating(struct 
amdgpu_device* adev, int inst)
WREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL, data);
 }
 
-static void jpeg_v2_5_enable_clock_gating(struct amdgpu_device* adev, int inst)
+static void jpeg_v2_5_enable_clock_gating(struct amdgpu_device *adev, int inst)
 {
uint32_t data;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index 3a0dff53654d..e8fbb2a0de34 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
@@ -213,7 +213,7 @@ static int jpeg_v3_0_resume(void *handle)
return r;
 }
 
-static void jpeg_v3_0_disable_clock_gating(struct amdgpu_device* adev)
+static void jpeg_v3_0_disable_clock_gating(struct amdgpu_device *adev)
 {
uint32_t data = 0;
 
@@ -243,7 +243,7 @@ static void jpeg_v3_0_disable_clock_gating(struct 
amdgpu_device* adev)
WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data);
 }
 
-static void jpeg_v3_0_enable_clock_gating(struct amdgpu_device* adev)
+static void jpeg_v3_0_enable_clock_gating(struct amdgpu_device *adev)
 {
uint32_t data = 0;
 
@@ -286,7 +286,7 @@ static int jpeg_v3_0_disable_static_power_gating(struct 
amdgpu_device *adev)
return 0;
 }
 
-static int jpeg_v3_0_enable_static_power_gating(struct amdgpu_device* adev)
+static int jpeg_v3_0_enable_static_power_gating(struct amdgpu_device *adev)
 {
/* enable anti hang mechanism */
WREG32_P(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_POWER_STATUS),
-- 
2.25.1

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[PATCH 4/6] drm/amdgpu/sdma: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 86fb1eddf5a6..d1150c33d02e 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -568,7 +568,7 @@ static void sdma_v4_0_destroy_inst_ctx(struct amdgpu_device 
*adev)
break;
}
 
-   memset((void*)adev->sdma.instance, 0,
+   memset((void *)adev->sdma.instance, 0,
sizeof(struct amdgpu_sdma_instance) * 
AMDGPU_MAX_SDMA_INSTANCES);
 }
 
@@ -639,8 +639,8 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device 
*adev)
if (adev->asic_type == CHIP_ARCTURUS) {
/* Acturus will leverage the same FW memory
   for every SDMA instance */
-   memcpy((void*)&adev->sdma.instance[i],
-  (void*)&adev->sdma.instance[0],
+   memcpy((void *)&adev->sdma.instance[i],
+  (void *)&adev->sdma.instance[0],
   sizeof(struct amdgpu_sdma_instance));
}
else {
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 9f3952723c63..90c47f1801fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
@@ -124,7 +124,7 @@ static void sdma_v5_2_destroy_inst_ctx(struct amdgpu_device 
*adev)
break;
}
 
-   memset((void*)adev->sdma.instance, 0,
+   memset((void *)adev->sdma.instance, 0,
   sizeof(struct amdgpu_sdma_instance) * AMDGPU_MAX_SDMA_INSTANCES);
 }
 
@@ -177,8 +177,8 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device 
*adev)
for (i = 1; i < adev->sdma.num_instances; i++) {
if (adev->asic_type == CHIP_SIENNA_CICHLID ||
adev->asic_type == CHIP_NAVY_FLOUNDER) {
-   memcpy((void*)&adev->sdma.instance[i],
-  (void*)&adev->sdma.instance[0],
+   memcpy((void *)&adev->sdma.instance[i],
+  (void *)&adev->sdma.instance[0],
   sizeof(struct amdgpu_sdma_instance));
} else {
snprintf(fw_name, sizeof(fw_name), 
"amdgpu/%s_sdma%d.bin", chip_name, i);
-- 
2.25.1

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[PATCH 1/6] drm/amdgpu/vcn: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding style standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 136270e4af7b..e285f9c9d460 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -800,7 +800,7 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_device 
*adev, bool indirect)
WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp);
 
if (indirect)
-   adev->vcn.inst->dpg_sram_curr_addr = 
(uint32_t*)adev->vcn.inst->dpg_sram_cpu_addr;
+   adev->vcn.inst->dpg_sram_curr_addr = (uint32_t 
*)adev->vcn.inst->dpg_sram_cpu_addr;
 
/* enable clock gating */
vcn_v2_0_clock_gating_dpg_mode(adev, 0, indirect);
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 4094718ae27a..b6e0f4ba6272 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -777,7 +777,7 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_device 
*adev, int inst_idx, boo
WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);
 
if (indirect)
-   adev->vcn.inst[inst_idx].dpg_sram_curr_addr = 
(uint32_t*)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr;
+   adev->vcn.inst[inst_idx].dpg_sram_curr_addr = (uint32_t 
*)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr;
 
/* enable clock gating */
vcn_v2_5_clock_gating_dpg_mode(adev, 0, inst_idx, indirect);
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c 
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 13e511d77bb1..749bf9503470 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -915,7 +915,7 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_device 
*adev, int inst_idx, boo
WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);
 
if (indirect)
-   adev->vcn.inst[inst_idx].dpg_sram_curr_addr = 
(uint32_t*)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr;
+   adev->vcn.inst[inst_idx].dpg_sram_curr_addr = (uint32_t 
*)adev->vcn.inst[inst_idx].dpg_sram_cpu_addr;
 
/* enable clock gating */
vcn_v3_0_clock_gating_dpg_mode(adev, 0, inst_idx, indirect);
-- 
2.25.1

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[PATCH 2/6] drm/amdgpu/umc: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c 
b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
index 5288617ca552..96d7769609f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
@@ -253,7 +253,7 @@ static void 
umc_v6_1_querry_uncorrectable_error_count(struct amdgpu_device *adev
 static void umc_v6_1_query_ras_error_count(struct amdgpu_device *adev,
   void *ras_error_status)
 {
-   struct ras_err_data* err_data = (struct ras_err_data*)ras_error_status;
+   struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
 
uint32_t umc_inst= 0;
uint32_t ch_inst = 0;
@@ -368,7 +368,7 @@ static void umc_v6_1_query_error_address(struct 
amdgpu_device *adev,
 static void umc_v6_1_query_ras_error_address(struct amdgpu_device *adev,
 void *ras_error_status)
 {
-   struct ras_err_data* err_data = (struct ras_err_data*)ras_error_status;
+   struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
 
uint32_t umc_inst= 0;
uint32_t ch_inst = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c 
b/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
index 5665c77a9d58..a064c097690c 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
@@ -170,7 +170,7 @@ static void 
umc_v8_7_querry_uncorrectable_error_count(struct amdgpu_device *adev
 static void umc_v8_7_query_ras_error_count(struct amdgpu_device *adev,
   void *ras_error_status)
 {
-   struct ras_err_data* err_data = (struct ras_err_data*)ras_error_status;
+   struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
 
uint32_t umc_inst= 0;
uint32_t ch_inst = 0;
@@ -260,7 +260,7 @@ static void umc_v8_7_query_error_address(struct 
amdgpu_device *adev,
 static void umc_v8_7_query_ras_error_address(struct amdgpu_device *adev,
 void *ras_error_status)
 {
-   struct ras_err_data* err_data = (struct ras_err_data*)ras_error_status;
+   struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
 
uint32_t umc_inst= 0;
uint32_t ch_inst = 0;
-- 
2.25.1

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[PATCH 5/6] drm/amdgpu/amdgpu: use "*" adjacent to data name

2020-11-02 Thread Deepak R Varma
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
ERROR: "foo *   bar" should be "foo *bar"
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c  | 14 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c |  8 
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c  |  6 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c|  4 ++--
 9 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 469352e2d6ec..86add0f4ea4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1401,7 +1401,7 @@ static ATOM_VOLTAGE_OBJECT_V3 
*amdgpu_atombios_lookup_voltage_object_v3(ATOM_VOL
 {
u32 size = le16_to_cpu(v3->sHeader.usStructureSize);
u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1, asVoltageObj[0]);
-   u8 *start = (u8*)v3;
+   u8 *start = (u8 *)v3;
 
while (offset < size) {
ATOM_VOLTAGE_OBJECT_V3 *vo = (ATOM_VOLTAGE_OBJECT_V3 *)(start + 
offset);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index b4df6460e45a..70da779a4ba7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -70,7 +70,7 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct 
amdgpu_device *adev)
struct atom_context *ctx = adev->mode_info.atom_context;
int index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
vram_usagebyfirmware);
-   struct vram_usagebyfirmware_v2_1 *  firmware_usage;
+   struct vram_usagebyfirmware_v2_1 *firmware_usage;
uint32_t start_addr, size;
uint16_t data_offset;
int usage_bytes = 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 309464a8c06b..79342976fa76 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1461,7 +1461,7 @@ int amdgpu_cs_fence_to_handle_ioctl(struct drm_device 
*dev, void *data,
dma_fence_put(fence);
if (r)
return r;
-   r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+   r = drm_syncobj_get_fd(syncobj, (int *)&info->out.handle);
drm_syncobj_put(syncobj);
return r;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index c80d8339f58c..6efdd5f6427e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -450,7 +450,7 @@ int amdgpu_ctx_put(struct amdgpu_ctx *ctx)
 
 void amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx,
  struct drm_sched_entity *entity,
- struct dma_fence *fence, uint64_t* handle)
+ struct dma_fence *fence, uint64_t *handle)
 {
struct amdgpu_ctx_entity *centity = to_amdgpu_ctx_entity(entity);
uint64_t seq = centity->sequence;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index c3b1b27df153..73f563b65a15 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -806,7 +806,7 @@ int psp_xgmi_get_hive_id(struct psp_context *psp, uint64_t 
*hive_id)
struct ta_xgmi_shared_memory *xgmi_cmd;
int ret;
 
-   xgmi_cmd = (struct 
ta_xgmi_shared_memory*)psp->xgmi_context.xgmi_shared_buf;
+   xgmi_cmd = (struct ta_xgmi_shared_memory 
*)psp->xgmi_context.xgmi_shared_buf;
memset(xgmi_cmd, 0, sizeof(struct ta_xgmi_shared_memory));
 
xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_HIVE_ID;
@@ -826,7 +826,7 @@ int psp_xgmi_get_node_id(struct psp_context *psp, uint64_t 
*node_id)
struct ta_xgmi_shared_memory *xgmi_cmd;
int ret;
 
-   xgmi_cmd = (struct 
ta_xgmi_shared_memory*)psp->xgmi_context.xgmi_shared_buf;
+   xgmi_cmd = (struct ta_xgmi_shared_memory 
*)psp->xgmi_context.xgmi_shared_buf;
memset(xgmi_cmd, 0, sizeof(struct ta_xgmi_shared_memory));
 

[PATCH] drm/amdkfd: replace idr_init() by idr_init_base()

2020-11-04 Thread Deepak R Varma
idr_init() uses base 0 which is an invalid identifier. The new function
idr_init_base allows IDR to set the ID lookup from base 1. This avoids
all lookups that otherwise starts from 0 since 0 is always unused.

References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_process.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index ba2c2ce0c55a..b3339b53c8ad 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
@@ -230,7 +230,7 @@ static int create_other_event(struct kfd_process *p, struct 
kfd_event *ev)
 void kfd_event_init_process(struct kfd_process *p)
 {
mutex_init(&p->event_mutex);
-   idr_init(&p->event_idr);
+   idr_init_base(&p->event_idr, 1);
p->signal_page = NULL;
p->signal_event_count = 0;
 }
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index 65803e153a22..022e61babe30 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1289,7 +1289,7 @@ struct kfd_process_device 
*kfd_create_process_device_data(struct kfd_dev *dev,
list_add(&pdd->per_device_list, &p->per_device_data);
 
/* Init idr used for memory handle translation */
-   idr_init(&pdd->alloc_idr);
+   idr_init_base(&pdd->alloc_idr, 1);
 
return pdd;
 
-- 
2.25.1

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[PATCH] drm/amdgpu: replace idr_init() by idr_init_base()

2020-11-04 Thread Deepak R Varma
idr_init() uses base 0 which is an invalid identifier. The new function
idr_init_base allows IDR to set the ID lookup from base 1. This avoids
all lookups that otherwise starts from 0 since 0 is always unused.

References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index c80d8339f58c..b98ae173a9de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -576,7 +576,7 @@ int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx,
 void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
 {
mutex_init(&mgr->lock);
-   idr_init(&mgr->ctx_handles);
+   idr_init_base(&mgr->ctx_handles, 1);
 }
 
 long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index efda38349a03..d65a1888683b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1052,7 +1052,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
}
 
mutex_init(&fpriv->bo_list_lock);
-   idr_init(&fpriv->bo_list_handles);
+   idr_init_base(&fpriv->bo_list_handles, 1);
 
amdgpu_ctx_mgr_init(&fpriv->ctx_mgr);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index df110afa97bf..0154282771c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -3199,7 +3199,7 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
adev->vm_manager.vm_update_mode = 0;
 #endif
 
-   idr_init(&adev->vm_manager.pasid_idr);
+   idr_init_base(&adev->vm_manager.pasid_idr, 1);
spin_lock_init(&adev->vm_manager.pasid_lock);
 }
 
-- 
2.25.1

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Re: [PATCH] drm/amdkfd: replace idr_init() by idr_init_base()

2020-11-05 Thread Deepak R Varma
On Wed, Nov 04, 2020 at 03:01:17PM -0500, Felix Kuehling wrote:
> On 2020-11-04 10:13 a.m., Deepak R Varma wrote:
> > idr_init() uses base 0 which is an invalid identifier. The new function
> > idr_init_base allows IDR to set the ID lookup from base 1. This avoids
> > all lookups that otherwise starts from 0 since 0 is always unused.
> 
> I disagree. We call idr_alloc with start=0 for both these IDRs. That means 0
> seems to be a valid handle.

Hello Felix,
You are correct. There are calls made to idr_alloc with start range from
0. So, for this driver, id=0 seems a valid use case. The change I
proposed is not relevant for this driver. You may please ignore the
patch.

Thank you,
./drv

> 
> Regards,
>   Felix
> 
> 
> > 
> > References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")
> > 
> > Signed-off-by: Deepak R Varma 
> > ---
> >   drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 2 +-
> >   drivers/gpu/drm/amd/amdkfd/kfd_process.c | 2 +-
> >   2 files changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c 
> > b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > index ba2c2ce0c55a..b3339b53c8ad 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > @@ -230,7 +230,7 @@ static int create_other_event(struct kfd_process *p, 
> > struct kfd_event *ev)
> >   void kfd_event_init_process(struct kfd_process *p)
> >   {
> > mutex_init(&p->event_mutex);
> > -   idr_init(&p->event_idr);
> > +   idr_init_base(&p->event_idr, 1);
> > p->signal_page = NULL;
> > p->signal_event_count = 0;
> >   }
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c 
> > b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > index 65803e153a22..022e61babe30 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > @@ -1289,7 +1289,7 @@ struct kfd_process_device 
> > *kfd_create_process_device_data(struct kfd_dev *dev,
> > list_add(&pdd->per_device_list, &p->per_device_data);
> > /* Init idr used for memory handle translation */
> > -   idr_init(&pdd->alloc_idr);
> > +   idr_init_base(&pdd->alloc_idr, 1);
> > return pdd;
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[PATCH] drm/amd/display: Remove duplicate/repeating expressions

2023-02-10 Thread Deepak R Varma
Remove duplicate or repeating expressions in the if condition
evaluation. Issue identified using doubletest.cocci Coccinelle semantic
patch.

Signed-off-by: Deepak R Varma 
---
 .../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c| 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 4b8f5fa0f0ad..ae89760d887d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -2335,8 +2335,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct 
display_mode_lib *mode_l
 
if (mode_lib->vba.DSCEnable[k] && 
mode_lib->vba.ForcedOutputLinkBPP[k] != 0)
mode_lib->vba.DSCOnlyIfNecessaryWithBPP = true;
-   if ((mode_lib->vba.DSCEnable[k] || 
mode_lib->vba.DSCEnable[k])
-   && mode_lib->vba.OutputFormat[k] == 
dm_n422
+   if (mode_lib->vba.DSCEnable[k] && 
mode_lib->vba.OutputFormat[k] == dm_n422
&& !mode_lib->vba.DSC422NativeSupport)
mode_lib->vba.DSC422NativeNotSupported = true;
 
@@ -3639,7 +3638,6 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct 
display_mode_lib *mode_l
if (mode_lib->vba.SourcePixelFormat[k] != dm_444_64
&& mode_lib->vba.SourcePixelFormat[k] 
!= dm_444_32
&& mode_lib->vba.SourcePixelFormat[k] 
!= dm_444_16
-   && mode_lib->vba.SourcePixelFormat[k] 
!= dm_444_16
&& mode_lib->vba.SourcePixelFormat[k] 
!= dm_444_8
&& mode_lib->vba.SourcePixelFormat[k] 
!= dm_rgbe) {
if (mode_lib->vba.ViewportWidthChroma[k] > 
mode_lib->vba.SurfaceWidthC[k]
-- 
2.34.1





[PATCH] drm/amd/display: Remove duplicate/repeating expression

2023-02-10 Thread Deepak R Varma
Remove duplicate or repeating expressions in the if condition
evaluation. Issue identified using doubletest.cocci Coccinelle semantic
patch.

Signed-off-by: Deepak R Varma 
---
 .../gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
index 61ee9ba063a7..6576b897a512 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
@@ -51,7 +51,7 @@ static bool CalculateBytePerPixelAnd256BBlockSizes(
*BytePerPixelDETC = 0;
*BytePerPixelY = 4;
*BytePerPixelC = 0;
-   } else if (SourcePixelFormat == dm_444_16 || SourcePixelFormat == 
dm_444_16) {
+   } else if (SourcePixelFormat == dm_444_16) {
*BytePerPixelDETY = 2;
*BytePerPixelDETC = 0;
*BytePerPixelY = 2;
-- 
2.34.1





Re: [PATCH] drm/amd/display: Remove duplicate/repeating expression

2023-02-10 Thread Deepak R Varma
On Fri, Feb 10, 2023 at 10:22:00AM -0500, Harry Wentland wrote:
> On 2/10/23 05:11, Deepak R Varma wrote:
> > Remove duplicate or repeating expressions in the if condition
> > evaluation. Issue identified using doubletest.cocci Coccinelle semantic
> > patch.
> > 
> > Signed-off-by: Deepak R Varma 
> 
> Reviewed-by: Harry Wentland 

Thank you Harry. There is another similar patch I submitted for a different
file. Could you please also review that and share your feedback?

Thank you,
./drv

> 
> Harry
> 
> > ---
> >  .../gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git 
> > a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c 
> > b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
> > index 61ee9ba063a7..6576b897a512 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
> > @@ -51,7 +51,7 @@ static bool CalculateBytePerPixelAnd256BBlockSizes(
> > *BytePerPixelDETC = 0;
> > *BytePerPixelY = 4;
> > *BytePerPixelC = 0;
> > -   } else if (SourcePixelFormat == dm_444_16 || SourcePixelFormat == 
> > dm_444_16) {
> > +   } else if (SourcePixelFormat == dm_444_16) {
> > *BytePerPixelDETY = 2;
> > *BytePerPixelDETC = 0;
> > *BytePerPixelY = 2;
> 




Re: [PATCH] drm/amd/display: Simplify same effect if/else blocks

2023-03-01 Thread Deepak R Varma
On Mon, Jan 23, 2023 at 12:23:19AM +0530, Deepak R Varma wrote:
> On Sun, Jan 15, 2023 at 12:52:10PM -0800, Joe Perches wrote:
> > On Sun, 2023-01-15 at 15:30 +0530, Deepak R Varma wrote:
> > > The if / else block code has same effect irrespective of the logical
> > > evaluation.  Hence, simply the implementation by removing the unnecessary
> > > conditional evaluation. While at it, also fix the long line checkpatch
> > > complaint. Issue identified using cond_no_effect.cocci Coccinelle
> > > semantic patch script.
> > > 
> > > Signed-off-by: Deepak R Varma 
> > > ---
> > > Please note: The proposed change is compile tested only. If there are any
> > > inbuilt test cases that I should run for further verification, I will 
> > > appreciate
> > > guidance about it. Thank you.
> > 
> > Preface: I do not know the code.
> > 
> > Perhaps Rodrigo Siqueira made a copy/paste error submitting the code for
> > commit 9114b55fabae ("drm/amd/display: Fix SubVP control flow in the MPO 
> > context")
> > as the code prior to this change is identical.
> > 
> > Perhaps one of the false uses should be true or dependent on the
> > interdependent_update_lock state.
> 
> Thank you Joe for the recommendation.
> 
> Hi Rodrigo,
> Can you review and comment on if and what is wrong with your commit?

Hello Rodrigo, Alex,
Could you please suggest what would be the necessary fix for this typo error?

Thank you,
Deepak.

> 
> Thank you,
> ./drv
> 
> > 
> > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
> > > b/drivers/gpu/drm/amd/display/dc/core/dc.c
> > []
> > > @@ -3470,14 +3470,9 @@ static void commit_planes_for_stream(struct dc *dc,
> > >   /* Since phantom pipe programming is moved to 
> > > post_unlock_program_front_end,
> > >* move the SubVP lock to after the phantom pipes have been 
> > > setup
> > >*/
> > > - if (should_lock_all_pipes && 
> > > dc->hwss.interdependent_update_lock) {
> > > - if (dc->hwss.subvp_pipe_control_lock)
> > > - dc->hwss.subvp_pipe_control_lock(dc, context, 
> > > false, should_lock_all_pipes, NULL, subvp_prev_use);
> > > - } else {
> > > - if (dc->hwss.subvp_pipe_control_lock)
> > > - dc->hwss.subvp_pipe_control_lock(dc, context, 
> > > false, should_lock_all_pipes, NULL, subvp_prev_use);
> > > - }
> > > -
> > 
> > Perhaps something like:
> > 
> > if (dc->hwss.subvp_pipe_control_lock)
> > dc->hwss.subvp_pipe_control_lock(dc, context,
> >  should_lock_all_pipes 
> > &&
> >  
> > dc->hwss.interdependent_update_lock,
> >  should_lock_all_pipes, 
> > NULL, subvp_prev_use);
> > 
> > > + if (dc->hwss.subvp_pipe_control_lock)
> > > + dc->hwss.subvp_pipe_control_lock(dc, context, false, 
> > > should_lock_all_pipes,
> > > +  NULL, subvp_prev_use);
> > >   return;
> > >   }
> > >  
> > 
> 
> 




Re: [PATCH] drm/amd/display: Simplify same effect if/else blocks

2023-03-03 Thread Deepak R Varma
On Thu, Mar 02, 2023 at 11:37:30AM -0500, Harry Wentland wrote:
> 
> 
> On 3/1/23 15:21, Deepak R Varma wrote:
> > On Mon, Jan 23, 2023 at 12:23:19AM +0530, Deepak R Varma wrote:
> >> On Sun, Jan 15, 2023 at 12:52:10PM -0800, Joe Perches wrote:
> >>> On Sun, 2023-01-15 at 15:30 +0530, Deepak R Varma wrote:
> >>>> The if / else block code has same effect irrespective of the logical
> >>>> evaluation.  Hence, simply the implementation by removing the unnecessary
> >>>> conditional evaluation. While at it, also fix the long line checkpatch
> >>>> complaint. Issue identified using cond_no_effect.cocci Coccinelle
> >>>> semantic patch script.
> >>>>
> >>>> Signed-off-by: Deepak R Varma 
> >>>> ---
> >>>> Please note: The proposed change is compile tested only. If there are any
> >>>> inbuilt test cases that I should run for further verification, I will 
> >>>> appreciate
> >>>> guidance about it. Thank you.
> >>>
> >>> Preface: I do not know the code.
> >>>
> >>> Perhaps Rodrigo Siqueira made a copy/paste error submitting the code for
> >>> commit 9114b55fabae ("drm/amd/display: Fix SubVP control flow in the MPO 
> >>> context")
> >>> as the code prior to this change is identical.
> >>>
> >>> Perhaps one of the false uses should be true or dependent on the
> >>> interdependent_update_lock state.
> >>
> >> Thank you Joe for the recommendation.
> >>
> >> Hi Rodrigo,
> >> Can you review and comment on if and what is wrong with your commit?
> > 
> > Hello Rodrigo, Alex,
> > Could you please suggest what would be the necessary fix for this typo 
> > error?
> > 
> 
> It's not quite a "typo" error. When I look at this code in our internal repo 
> I see
> a couple missing lock calls here that differ between the two cases. I don't 
> know why
> this was never ported over and am surprised it doesn't lead to issues.
> 
> I would prefer we keep the code as-is for now until this gets sorted.

Sounds good. Do let me know if I can be of any help.

Deepak.

> 
> Harry
> 
> > Thank you,
> > Deepak.
> > 
> >>
> >> Thank you,
> >> ./drv
> >>
> >>>
> >>>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
> >>>> b/drivers/gpu/drm/amd/display/dc/core/dc.c
> >>> []
> >>>> @@ -3470,14 +3470,9 @@ static void commit_planes_for_stream(struct dc 
> >>>> *dc,
> >>>>  /* Since phantom pipe programming is moved to 
> >>>> post_unlock_program_front_end,
> >>>>   * move the SubVP lock to after the phantom pipes have 
> >>>> been setup
> >>>>   */
> >>>> -if (should_lock_all_pipes && 
> >>>> dc->hwss.interdependent_update_lock) {
> >>>> -if (dc->hwss.subvp_pipe_control_lock)
> >>>> -dc->hwss.subvp_pipe_control_lock(dc, 
> >>>> context, false, should_lock_all_pipes, NULL, subvp_prev_use);
> >>>> -} else {
> >>>> -if (dc->hwss.subvp_pipe_control_lock)
> >>>> -dc->hwss.subvp_pipe_control_lock(dc, 
> >>>> context, false, should_lock_all_pipes, NULL, subvp_prev_use);
> >>>> -}
> >>>> -
> >>>
> >>> Perhaps something like:
> >>>
> >>>   if (dc->hwss.subvp_pipe_control_lock)
> >>>   dc->hwss.subvp_pipe_control_lock(dc, context,
> >>>should_lock_all_pipes 
> >>> &&
> >>>
> >>> dc->hwss.interdependent_update_lock,
> >>>should_lock_all_pipes, 
> >>> NULL, subvp_prev_use);
> >>>
> >>>> +if (dc->hwss.subvp_pipe_control_lock)
> >>>> +dc->hwss.subvp_pipe_control_lock(dc, context, 
> >>>> false, should_lock_all_pipes,
> >>>> + NULL, 
> >>>> subvp_prev_use);
> >>>>  return;
> >>>>  }
> >>>>  
> >>>
> >>
> >>
> > 
> > 
> 




Re: [PATCH] drm/amd/display: No need for Null pointer check before kfree

2023-01-09 Thread Deepak R Varma
On Wed, Dec 28, 2022 at 12:09:51AM +0530, Deepak R Varma wrote:
> kfree() & vfree() internally performs NULL check on the pointer handed
> to it and take no action if it indeed is NULL. Hence there is no need
> for a pre-check of the memory pointer before handing it to
> kfree()/vfree().
>
> Issue reported by ifnullfree.cocci Coccinelle semantic patch script.
>
> Signed-off-by: Deepak R Varma 
> ---

Hello,
Requesting a review and feedback on this patch proposal.

Thank you,
./drv





[PATCH] drm/amd/display: Conversion to bool not necessary

2023-01-12 Thread Deepak R Varma
A logical evaluation already results in bool. There is no need for using
a ternary operator based evaluation and bool conversion of the outcome.
Issue identified using boolconv.cocci Coccinelle semantic patch.
This was also reported by the Kernel Test Robot. Hence

Fixes: 473683a03495 ("drm/amd/display: Create a file dedicated for CRTC")

Reported-by: kernel test robot 
Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index 22125daf9dcf..1e39d0939700 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -105,8 +105,7 @@ static void vblank_control_worker(struct work_struct *work)
else if (dm->active_vblank_irq_count)
dm->active_vblank_irq_count--;
 
-   dc_allow_idle_optimizations(
-   dm->dc, dm->active_vblank_irq_count == 0 ? true : false);
+   dc_allow_idle_optimizations(dm->dc, dm->active_vblank_irq_count == 0);
 
DRM_DEBUG_KMS("Allow idle optimizations (MALL): %d\n", 
dm->active_vblank_irq_count == 0);
 
-- 
2.34.1





[PATCH 0/3] drm/amd/pm/powerplay: use bitwise or for bitmasks addition

2023-01-15 Thread Deepak R Varma
The patch series proposes usage of bitwise or "|" operator for addition of
bitmasks instead of using numerial additions. The former is quicker and cleaner.

The proposed change is compile tested.

Deepak R Varma (3):
  drm/amd/pm/powerplay/smumgr: use bitwise or for addition
  drm/amd/pm/powerplay/hwmgr: use bitwise or for bitmasks addition
  drm/amd/pm/powerplay/smumgr/ci: use bitwise or for bitmasks addition

 drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c  | 8 
 drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c  | 2 +-
 drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c | 2 +-
 drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c   | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

-- 
2.34.1





[PATCH] drm/amd/display: Simplify same effect if/else blocks

2023-01-15 Thread Deepak R Varma
The if / else block code has same effect irrespective of the logical
evaluation.  Hence, simply the implementation by removing the unnecessary
conditional evaluation. While at it, also fix the long line checkpatch
complaint. Issue identified using cond_no_effect.cocci Coccinelle
semantic patch script.

Signed-off-by: Deepak R Varma 
---
Please note: The proposed change is compile tested only. If there are any
inbuilt test cases that I should run for further verification, I will appreciate
guidance about it. Thank you.

 drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 0cb8d1f934d1..776209e5d21f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3470,14 +3470,9 @@ static void commit_planes_for_stream(struct dc *dc,
/* Since phantom pipe programming is moved to 
post_unlock_program_front_end,
 * move the SubVP lock to after the phantom pipes have been 
setup
 */
-   if (should_lock_all_pipes && 
dc->hwss.interdependent_update_lock) {
-   if (dc->hwss.subvp_pipe_control_lock)
-   dc->hwss.subvp_pipe_control_lock(dc, context, 
false, should_lock_all_pipes, NULL, subvp_prev_use);
-   } else {
-   if (dc->hwss.subvp_pipe_control_lock)
-   dc->hwss.subvp_pipe_control_lock(dc, context, 
false, should_lock_all_pipes, NULL, subvp_prev_use);
-   }
-
+   if (dc->hwss.subvp_pipe_control_lock)
+   dc->hwss.subvp_pipe_control_lock(dc, context, false, 
should_lock_all_pipes,
+NULL, subvp_prev_use);
return;
}
 
-- 
2.34.1





[PATCH] drm/amd/display: use swap() helper macro in bios_parser

2023-01-15 Thread Deepak R Varma
Use swap() helper macro instead of open coded swap instructions. The
change also facilitates code cleanup and realignment for improved
readability.  Issue identified using swap.cocci Coccinelle semantic
patch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 11 ++-
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 
b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 074e70a5c458..7b5894adbf51 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -2929,7 +2929,6 @@ static enum bp_result construct_integrated_info(
struct atom_common_table_header *header;
struct atom_data_revision revision;
 
-   struct clock_voltage_caps temp = {0, 0};
uint32_t i;
uint32_t j;
 
@@ -3032,14 +3031,8 @@ static enum bp_result construct_integrated_info(
for (i = 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) {
for (j = i; j > 0; --j) {
if (info->disp_clk_voltage[j].max_supported_clk <
-   info->disp_clk_voltage[j-1].max_supported_clk
-   ) {
-   /* swap j and j - 1*/
-   temp = info->disp_clk_voltage[j-1];
-   info->disp_clk_voltage[j-1] =
-   info->disp_clk_voltage[j];
-   info->disp_clk_voltage[j] = temp;
-   }
+   info->disp_clk_voltage[j-1].max_supported_clk)
+   swap(info->disp_clk_voltage[j-1], 
info->disp_clk_voltage[j]);
}
}
 
-- 
2.34.1





[PATCH 1/4] drm/amd/display: Use min()/max() macros in dcn_calc_math

2023-01-15 Thread Deepak R Varma
Use the standard min() / max() helper macros instead of direct variable
comparison using if/else blocks or ternary operator. Change identified
using minmax.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 .../gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c   | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c 
b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c
index cac72413a097..81629f3715d3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c
@@ -52,12 +52,12 @@ float dcn_bw_min2(const float arg1, const float arg2)
return arg2;
if (isNaN(arg2))
return arg1;
-   return arg1 < arg2 ? arg1 : arg2;
+   return min(arg1, arg2);
 }
 
 unsigned int dcn_bw_max(const unsigned int arg1, const unsigned int arg2)
 {
-   return arg1 > arg2 ? arg1 : arg2;
+   return max(arg1, arg2);
 }
 float dcn_bw_max2(const float arg1, const float arg2)
 {
@@ -65,7 +65,7 @@ float dcn_bw_max2(const float arg1, const float arg2)
return arg2;
if (isNaN(arg2))
return arg1;
-   return arg1 > arg2 ? arg1 : arg2;
+   return max(arg1, arg2);
 }
 
 float dcn_bw_floor2(const float arg, const float significance)
@@ -93,12 +93,12 @@ float dcn_bw_ceil2(const float arg, const float 
significance)
 
 float dcn_bw_max3(float v1, float v2, float v3)
 {
-   return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2);
+   return max(v3, dcn_bw_max2(v1, v2));
 }
 
 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5)
 {
-   return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, 
v2, v3) : dcn_bw_max2(v4, v5);
+   return max(dcn_bw_max3(v1, v2, v3), dcn_bw_max2(v4, v5));
 }
 
 float dcn_bw_pow(float a, float exp)
-- 
2.34.1





[PATCH 3/3] drm/amd/pm/powerplay/smumgr/ci: use bitwise or for bitmasks addition

2023-01-15 Thread Deepak R Varma
For bit mask addition, it is recommended to use or operator "|" instead
of numerical addition as the former is quicker and cleaner. Change
suggested by orplus.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index 5ca3c422f7d4..a164d12b88ad 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -2203,7 +2203,7 @@ static int ci_program_mem_timing_parameters(struct 
pp_hwmgr *hwmgr)
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
if (data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK))
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK))
return ci_program_memory_timing_parameters(hwmgr);
 
return 0;
-- 
2.34.1





[PATCH] drm/amd/display: avoid variable reinitialization

2023-01-15 Thread Deepak R Varma
The member variable set_odm_combine is already initialized and hence the
reinitialization instruction can be removed. Issue identified using the
dubleinit.cocci Coccinelle semantic patch script.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c 
b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c
index 41edbd64ea21..777d8efee977 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c
@@ -254,7 +254,6 @@ static struct timing_generator_funcs dcn314_tg_funcs = {
.get_hw_timing = optc1_get_hw_timing,
.init_odm = optc3_init_odm,
.set_odm_bypass = optc314_set_odm_bypass,
-   .set_odm_combine = optc314_set_odm_combine,
.set_h_timing_div_manual_mode = 
optc314_set_h_timing_div_manual_mode,
 };
 
-- 
2.34.1





[PATCH 3/4] drm/amd/display: dcn21: Use min()/max() helper macros

2023-01-15 Thread Deepak R Varma
Use the standard min() / max() helper macros instead of direct variable
comparison using if/else blocks or ternary operator. Change identified
using minmax.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 .../gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c   | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 1d84ae50311d..41fb5fddd85d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -838,10 +838,7 @@ static bool CalculatePrefetchSchedule(
 
dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 
4.0;
 
-   if (dst_y_prefetch_oto < dst_y_prefetch_equ)
-   *DestinationLinesForPrefetch = dst_y_prefetch_oto;
-   else
-   *DestinationLinesForPrefetch = dst_y_prefetch_equ;
+   *DestinationLinesForPrefetch = min(dst_y_prefetch_oto, 
dst_y_prefetch_equ);
 
// Limit to prevent overflow in DST_Y_PREFETCH register
*DestinationLinesForPrefetch = dml_min(*DestinationLinesForPrefetch, 
63.75);
-- 
2.34.1





[PATCH 4/4] drm/amd/display: dcn32: Use min()/max() helper macros

2023-01-15 Thread Deepak R Varma
Use the standard min() / max() helper macros instead of direct variable
comparison using if/else blocks or ternary operator. Change identified
using minmax.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index f94abd124021..80820f012891 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -908,7 +908,7 @@ static bool subvp_drr_schedulable(struct dc *dc, struct 
dc_state *context, struc
stretched_drr_us = drr_frame_us + mall_region_us + SUBVP_DRR_MARGIN_US;
drr_stretched_vblank_us = (drr_timing->v_total - 
drr_timing->v_addressable) * drr_timing->h_total /
(double)(drr_timing->pix_clk_100hz * 100) * 100 + 
(stretched_drr_us - drr_frame_us);
-   max_vblank_mallregion = drr_stretched_vblank_us > mall_region_us ? 
drr_stretched_vblank_us : mall_region_us;
+   max_vblank_mallregion = max(drr_stretched_vblank_us, mall_region_us);
 
/* We consider SubVP + DRR schedulable if the stretched frame duration 
of the DRR display (i.e. the
 * highest refresh rate + margin that can support UCLK P-State switch) 
passes the static analysis
@@ -999,7 +999,7 @@ static bool subvp_vblank_schedulable(struct dc *dc, struct 
dc_state *context)
(double)(vblank_timing->pix_clk_100hz * 100) * 
100;
subvp_active_us = main_timing->v_addressable * 
main_timing->h_total /
(double)(main_timing->pix_clk_100hz * 100) * 
100;
-   max_vblank_mallregion = vblank_blank_us > mall_region_us ? 
vblank_blank_us : mall_region_us;
+   max_vblank_mallregion = max(vblank_blank_us, mall_region_us);
 
// Schedulable if VACTIVE region of the SubVP pipe can fit the 
MALL prefetch, VBLANK frame time,
// and the max of (VBLANK blanking time, MALL region)
-- 
2.34.1





[PATCH 2/3] drm/amd/pm/powerplay/hwmgr: use bitwise or for bitmasks addition

2023-01-15 Thread Deepak R Varma
For bit mask addition, it is recommended to use or operator "|" instead
of numerical addition as the former is quicker and cleaner. Change
suggested by orplus.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 7ef7e81525a3..bf9bcc4e5338 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -4153,7 +4153,7 @@ static int smu7_freeze_sclk_mclk_dpm(struct pp_hwmgr 
*hwmgr)
 
if ((0 == data->sclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {
PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),
"Trying to freeze SCLK DPM when DPM is 
disabled",
);
@@ -4210,7 +4210,7 @@ static int smu7_populate_and_upload_sclk_mclk_dpm_levels(
}
 
if (data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK)) {
result = smum_populate_all_graphic_levels(hwmgr);
PP_ASSERT_WITH_CODE((0 == result),
"Failed to populate SCLK during 
PopulateNewDPMClocksStates Function!",
@@ -4218,7 +4218,7 @@ static int smu7_populate_and_upload_sclk_mclk_dpm_levels(
}
 
if (data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) {
+   (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) {
/*populate MCLK dpm table to SMU7 */
result = smum_populate_all_memory_levels(hwmgr);
PP_ASSERT_WITH_CODE((0 == result),
@@ -4309,7 +4309,7 @@ static int smu7_unfreeze_sclk_mclk_dpm(struct pp_hwmgr 
*hwmgr)
 
if ((0 == data->sclk_dpm_key_disabled) &&
(data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {
 
PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),
"Trying to Unfreeze SCLK DPM when DPM is 
disabled",
-- 
2.34.1





[PATCH 0/4] drm/amd/display: Use min()/max() helper macros

2023-01-15 Thread Deepak R Varma
This patch series proposes using standard min() / max() helper macros instead of
direct variable comparison using the ternary operator or if/else evaluations. I
have tested the change using a dummy module and similar simulations on my x86
machine.

Deepak R Varma (4):
  drm/amd/display: Use min()/max() macros in dcn_calc_math
  drm/amd/display: dcn20: Use min()/max() helper macros
  drm/amd/display: dcn21: Use min()/max() helper macros
  drm/amd/display: dcn32: Use min()/max() helper macros

 .../gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c   | 10 +-
 .../drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c |  5 +
 .../amd/display/dc/dml/dcn20/display_mode_vba_20v2.c   |  5 +
 .../drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c |  5 +
 drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c   |  4 ++--
 5 files changed, 10 insertions(+), 19 deletions(-)

-- 
2.34.1





[PATCH 1/3] drm/amd/pm/powerplay/smumgr: use bitwise or for addition

2023-01-15 Thread Deepak R Varma
For bit mask addition, it is recommended to use or operator "|" instead
of numerical addition as the former is quicker and cleaner. Change
suggested by orplus.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c | 2 +-
 drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
index 03df35dee8ba..060fc140c574 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c
@@ -2165,7 +2165,7 @@ static int iceland_program_mem_timing_parameters(struct 
pp_hwmgr *hwmgr)
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
if (data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK))
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK))
return iceland_program_memory_timing_parameters(hwmgr);
 
return 0;
diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c 
b/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
index 04b561f5d932..acbe41174d7e 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c
@@ -2554,7 +2554,7 @@ static int tonga_program_mem_timing_parameters(struct 
pp_hwmgr *hwmgr)
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
if (data->need_update_smu7_dpm_table &
-   (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK))
+   (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK))
return tonga_program_memory_timing_parameters(hwmgr);
 
return 0;
-- 
2.34.1





[PATCH 2/4] drm/amd/display: dcn20: Use min()/max() helper macros

2023-01-15 Thread Deepak R Varma
Use the standard min() / max() helper macros instead of direct variable
comparison using if/else blocks or ternary operator. Change identified
using minmax.cocci Coccinelle semantic patch.

Signed-off-by: Deepak R Varma 
---
 .../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c   | 5 +
 .../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 5 +
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index d3b5b6fedf04..850bb0f973d4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -626,10 +626,7 @@ static bool CalculatePrefetchSchedule(
 
dst_y_prefetch_oto = Tpre_oto / LineTime;
 
-   if (dst_y_prefetch_oto < dst_y_prefetch_equ)
-   *DestinationLinesForPrefetch = dst_y_prefetch_oto;
-   else
-   *DestinationLinesForPrefetch = dst_y_prefetch_equ;
+   *DestinationLinesForPrefetch = min(dst_y_prefetch_oto, 
dst_y_prefetch_equ);
 
*DestinationLinesForPrefetch = dml_floor(4.0 * 
(*DestinationLinesForPrefetch + 0.125), 1)
/ 4;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index edd098c7eb92..6f4903525acc 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -686,10 +686,7 @@ static bool CalculatePrefetchSchedule(
 
dst_y_prefetch_oto = Tpre_oto / LineTime;
 
-   if (dst_y_prefetch_oto < dst_y_prefetch_equ)
-   *DestinationLinesForPrefetch = dst_y_prefetch_oto;
-   else
-   *DestinationLinesForPrefetch = dst_y_prefetch_equ;
+   *DestinationLinesForPrefetch = min(dst_y_prefetch_oto, 
dst_y_prefetch_equ);
 
*DestinationLinesForPrefetch = dml_floor(4.0 * 
(*DestinationLinesForPrefetch + 0.125), 1)
/ 4;
-- 
2.34.1





Re: [PATCH] drm/amd/display: Simplify same effect if/else blocks

2023-01-22 Thread Deepak R Varma
On Sun, Jan 15, 2023 at 12:52:10PM -0800, Joe Perches wrote:
> On Sun, 2023-01-15 at 15:30 +0530, Deepak R Varma wrote:
> > The if / else block code has same effect irrespective of the logical
> > evaluation.  Hence, simply the implementation by removing the unnecessary
> > conditional evaluation. While at it, also fix the long line checkpatch
> > complaint. Issue identified using cond_no_effect.cocci Coccinelle
> > semantic patch script.
> > 
> > Signed-off-by: Deepak R Varma 
> > ---
> > Please note: The proposed change is compile tested only. If there are any
> > inbuilt test cases that I should run for further verification, I will 
> > appreciate
> > guidance about it. Thank you.
> 
> Preface: I do not know the code.
> 
> Perhaps Rodrigo Siqueira made a copy/paste error submitting the code for
> commit 9114b55fabae ("drm/amd/display: Fix SubVP control flow in the MPO 
> context")
> as the code prior to this change is identical.
> 
> Perhaps one of the false uses should be true or dependent on the
> interdependent_update_lock state.

Thank you Joe for the recommendation.

Hi Rodrigo,
Can you review and comment on if and what is wrong with your commit?

Thank you,
./drv

> 
> > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
> > b/drivers/gpu/drm/amd/display/dc/core/dc.c
> []
> > @@ -3470,14 +3470,9 @@ static void commit_planes_for_stream(struct dc *dc,
> > /* Since phantom pipe programming is moved to 
> > post_unlock_program_front_end,
> >  * move the SubVP lock to after the phantom pipes have been 
> > setup
> >  */
> > -   if (should_lock_all_pipes && 
> > dc->hwss.interdependent_update_lock) {
> > -   if (dc->hwss.subvp_pipe_control_lock)
> > -   dc->hwss.subvp_pipe_control_lock(dc, context, 
> > false, should_lock_all_pipes, NULL, subvp_prev_use);
> > -   } else {
> > -   if (dc->hwss.subvp_pipe_control_lock)
> > -   dc->hwss.subvp_pipe_control_lock(dc, context, 
> > false, should_lock_all_pipes, NULL, subvp_prev_use);
> > -   }
> > -
> 
> Perhaps something like:
> 
>   if (dc->hwss.subvp_pipe_control_lock)
>   dc->hwss.subvp_pipe_control_lock(dc, context,
>should_lock_all_pipes 
> &&
>
> dc->hwss.interdependent_update_lock,
>should_lock_all_pipes, 
> NULL, subvp_prev_use);
> 
> > +   if (dc->hwss.subvp_pipe_control_lock)
> > +   dc->hwss.subvp_pipe_control_lock(dc, context, false, 
> > should_lock_all_pipes,
> > +NULL, subvp_prev_use);
> > return;
> > }
> >  
> 




Re: [PATCH 0/4] drm/amd/display: Use min()/max() helper macros

2023-01-22 Thread Deepak R Varma
On Sun, Jan 15, 2023 at 02:48:45AM +0530, Deepak R Varma wrote:
> This patch series proposes using standard min() / max() helper macros instead 
> of
> direct variable comparison using the ternary operator or if/else evaluations. 
> I
> have tested the change using a dummy module and similar simulations on my x86
> machine.

Hello,
May I request a review feedback and comments on this patch set please?

Thank you,
./drv

> 
> Deepak R Varma (4):
>   drm/amd/display: Use min()/max() macros in dcn_calc_math
>   drm/amd/display: dcn20: Use min()/max() helper macros
>   drm/amd/display: dcn21: Use min()/max() helper macros
>   drm/amd/display: dcn32: Use min()/max() helper macros
> 
>  .../gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c   | 10 +-
>  .../drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c |  5 +
>  .../amd/display/dc/dml/dcn20/display_mode_vba_20v2.c   |  5 +
>  .../drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c |  5 +
>  drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c   |  4 ++--
>  5 files changed, 10 insertions(+), 19 deletions(-)
> 
> -- 
> 2.34.1
> 
> 
>