date:20240927


Arun please take a look at that.

Looks valid to me in general.

Thanks,
Christian.

Am 23.09.24 um 10:19 schrieb Yifan Zhang:

Make vram alloc loop simpler after 2GB limitation removed.

Signed-off-by: Yifan Zhang 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 15 +--
  1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 7d26a962f811..3d129fd61fa7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -455,7 +455,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager 
*man,
struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);
u64 vis_usage = 0, max_bytes, min_block_size;
struct amdgpu_vram_mgr_resource *vres;
-   u64 size, remaining_size, lpfn, fpfn;
+   u64 size, lpfn, fpfn;
unsigned int adjust_dcc_size = 0;
struct drm_buddy *mm = &mgr->mm;
struct drm_buddy_block *block;
@@ -516,25 +516,23 @@ static int amdgpu_vram_mgr_new(struct 
ttm_resource_manager *man,
adev->gmc.gmc_funcs->get_dcc_alignment)
adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);
  
-	remaining_size = (u64)vres->base.size;

+   size = (u64)vres->base.size;
if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {
unsigned int dcc_size;
  
  		dcc_size = roundup_pow_of_two(vres->base.size + adjust_dcc_size);

-   remaining_size = (u64)dcc_size;
+   size = (u64)dcc_size;
  
  		vres->flags |= DRM_BUDDY_TRIM_DISABLE;

}
  
  	mutex_lock(&mgr->lock);

-   while (remaining_size) {
+   while (true) {
if (tbo->page_alignment)
min_block_size = (u64)tbo->page_alignment << PAGE_SHIFT;
else
min_block_size = mgr->default_page_size;
  
-		size = remaining_size;

-
if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && 
adjust_dcc_size)
min_block_size = size;
else if ((size >= (u64)pages_per_block << PAGE_SHIFT) &&
@@ -562,10 +560,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager 
*man,
if (unlikely(r))
goto error_free_blocks;
  
-		if (size > remaining_size)

-   remaining_size = 0;
-   else
-   remaining_size -= size;
+   break;
}
mutex_unlock(&mgr->lock);

Re: [PATCH v4 0/6] DRM_SET_CLIENT_NAME ioctl


Am 27.09.24 um 10:48 schrieb Pierre-Eric Pelloux-Prayer:

v4 changelog:
* DRM_SET_NAME -> DRM_SET_CLIENT_NAME (Dmitry)
* reject names that would mess up with formatting (Sima),
   and use a stricter filter (isgraph allowed extended ASCII
   which weren't looking great)
* documentation edits, minor fixups (Dmitry, Trvtko)
* clarified commit message of commit 3/6 (Trvtko)
* reworked amdgpu_vm_set_task_info a bit in 4/6 (Trvtko)


If nobody has any more additional comments on this I'm going to pick it 
up and merge it through drm-misc-next by the end of today.


Regards,
Christian



v3: https://lists.freedesktop.org/archives/dri-devel/2024-September/470488.html

Pierre-Eric Pelloux-Prayer (6):
   drm: add DRM_SET_CLIENT_NAME ioctl
   drm: use drm_file client_name in fdinfo
   drm/amdgpu: delay the use of amdgpu_vm_set_task_info
   drm/amdgpu: alloc and init vm::task_info from first submit
   drm/amdgpu: make process_name a flexible array
   drm/amdgpu: use drm_file::name in task_info::process_desc

  Documentation/gpu/drm-usage-stats.rst |  5 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h|  1 +
  .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  |  3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  6 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c   |  2 +-
  .../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c  |  4 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 62 +--
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h|  4 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c|  2 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c|  2 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c|  2 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  2 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  2 +-
  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c|  2 +-
  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  |  2 +-
  drivers/gpu/drm/amd/amdkfd/kfd_events.c   |  2 +-
  drivers/gpu/drm/amd/amdkfd/kfd_process.c  |  3 +
  drivers/gpu/drm/drm_debugfs.c | 14 +++--
  drivers/gpu/drm/drm_file.c| 10 +++
  drivers/gpu/drm/drm_ioctl.c   | 55 
  include/drm/drm_file.h|  9 +++
  include/uapi/drm/drm.h| 17 +
  23 files changed, 171 insertions(+), 42 deletions(-)

Re: [PATCH v2 0/7] Add support for dynamic NPS switch

2024-09-27 Thread Xu, Feifei


Series is Reviewed-by: Feifei Xu 

On 9/27/2024 12:52 PM, Lijo Lazar wrote:

This series adds supports for dynamic NPS switch on GC v9.4.3/9.4.4 SOC
variants.

In order to do dynamic NPS switch a sysfs interface is provided to request a new
NPS mode. If the device is part of a hive, all hive devices are required to be
in the same NPS mode. Hence a hive device request is saved in a hive variable.
For individual device, it's saved in a gmc block variable.

In order to do a NPS mode switch, the workflow is -

1) User places a requests through sysfs node.
2) User unloads the driver
3) During unload, driver checks for any pending NPS switch request. If any
request is pending, it places the request to PSP FW.
4) For a hive, request is placed in one-go for all devices in the hive. If
one of the requests fails, a request is placed again to revert to current NPS
mode on the successful devices.
5) User reloads the driver.
6) On reload, driver checks if NPS switch is pending and initiates a mode-1
reset.
7) During resume after a reset, NPS ranges are read again from discovery table.
8) Driver detects the new NPS mode and makes a compatible compute partition mode
switch if required.

v2:
Move NPS request check ahead of TOS reload requirement check (Feifei)

Lijo Lazar (7):
   drm/amdgpu: Add option to refresh NPS data
   drm/amdgpu: Add PSP interface for NPS switch
   drm/amdgpu: Add gmc interface to request NPS mode
   drm/amdgpu: Add sysfs interfaces for NPS mode
   drm/amdgpu: Place NPS mode request on unload
   drm/amdgpu: Check gmc requirement for reset on init
   drm/amdgpu: Add NPS switch support for GC 9.4.3

  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |  68 +--
  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h |   2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |   1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c   | 190 --
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h   |  19 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h  |   1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   |  25 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h   |   1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c  |  39 
  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h  |   5 +
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  44 
  drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c|  12 ++
  drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h   |  14 +-
  drivers/gpu/drm/amd/amdgpu/soc15.c|   2 +
  14 files changed, 387 insertions(+), 36 deletions(-)

Re: [PATCH v5 47/80] drm/xlnx: Run DRM default client setup


On 24/09/2024 10:12, Thomas Zimmermann wrote:

Call drm_client_setup_with_fourcc() to run the kernel's default client
setup for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.

v5:
- select DRM_CLIENT_SELECTION
v2:
- use drm_client_setup_with_fourcc()

Signed-off-by: Thomas Zimmermann 
Cc: Laurent Pinchart 
Cc: Tomi Valkeinen 
Cc: Michal Simek 
Reviewed-by: Laurent Pinchart 
---
  drivers/gpu/drm/xlnx/Kconfig  | 1 +
  drivers/gpu/drm/xlnx/zynqmp_kms.c | 4 +++-
  2 files changed, 4 insertions(+), 1 deletion(-)



Tested on zynqmp zcu106.

Reviewed-by: Tomi Valkeinen 

 Tomi


diff --git a/drivers/gpu/drm/xlnx/Kconfig b/drivers/gpu/drm/xlnx/Kconfig
index 626e5ac4c33d..4197f44e202f 100644
--- a/drivers/gpu/drm/xlnx/Kconfig
+++ b/drivers/gpu/drm/xlnx/Kconfig
@@ -6,6 +6,7 @@ config DRM_ZYNQMP_DPSUB
depends on PHY_XILINX_ZYNQMP
depends on XILINX_ZYNQMP_DPDMA
select DMA_ENGINE
+   select DRM_CLIENT_SELECTION
select DRM_DISPLAY_DP_HELPER
select DRM_DISPLAY_HELPER
select DRM_BRIDGE_CONNECTOR
diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c 
b/drivers/gpu/drm/xlnx/zynqmp_kms.c
index bd1368df7870..2452c2f09161 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_kms.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c
@@ -14,6 +14,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -402,6 +403,7 @@ static const struct drm_driver zynqmp_dpsub_drm_driver = {
  DRIVER_ATOMIC,
  
  	DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(zynqmp_dpsub_dumb_create),

+   DRM_FBDEV_DMA_DRIVER_OPS,
  
  	.fops= &zynqmp_dpsub_drm_fops,
  
@@ -523,7 +525,7 @@ int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)

goto err_poll_fini;
  
  	/* Initialize fbdev generic emulation. */

-   drm_fbdev_dma_setup(drm, 24);
+   drm_client_setup_with_fourcc(drm, DRM_FORMAT_RGB888);
  
  	return 0;

Re: [PATCH v5 79/80] drm/omapdrm: Remove struct drm_fb_helper from struct omap_fbdev.


Hi,

On 24/09/2024 10:13, Thomas Zimmermann wrote:

Store instances of drm_fb_helper and struct omap_fbdev separately.
This will allow omapdrm to use the common fbdev client, which allocates
its own instance of struct drm_fb_helper.

There is at most one instance of each per DRM device, so both can be
referenced directly from the omap and DRM device structures. A later
patchset might rework the common fbdev client to allow for storing
both, drm_fb_helper and omap_fbdev, together in the same place.

Signed-off-by: Thomas Zimmermann 
Cc: Tomi Valkeinen 
Acked-by: Javier Martinez Canillas 
---
  drivers/gpu/drm/omapdrm/omap_drv.h   |  3 ++
  drivers/gpu/drm/omapdrm/omap_fbdev.c | 42 +++-
  2 files changed, 26 insertions(+), 19 deletions(-)


The ywrap seems to be broken, but it's broken without this series too. 
With some quick hacks I managed to get the omapdrm's panning function 
called, and it works the same way with or without this series.


Tested on DRA76 EVM.

Reviewed-by: Tomi Valkeinen 

For reference, in case someone is interested fixing omapdrm's ywrap code:

- get_fb() doesn't work. I don't understand the point of the function. 
It compares fbi->fix.id and MODULE_NAME, and the "fbi->fix.id" has 
changed along the years so the check no longer works. Afaik, the whole 
function is not needed, and we can just use fbi->par.


- omap_fbdev_pan_display() doesn't seem to get called when the console 
scrolls. I can get it called with an userspace app that does some y 
panning. Maybe FBINFO_HWACCEL_YWRAP is not supported anymore?


 Tomi


diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h 
b/drivers/gpu/drm/omapdrm/omap_drv.h
index 4c7217b35f6b..d903568fd8cc 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -32,6 +32,7 @@
  #define MODULE_NAME "omapdrm"
  
  struct omap_drm_usergart;

+struct omap_fbdev;
  
  struct omap_drm_pipeline {

struct drm_crtc *crtc;
@@ -97,6 +98,8 @@ struct omap_drm_private {
  
  	/* memory bandwidth limit if it is needed on the platform */

unsigned int max_bandwidth;
+
+   struct omap_fbdev *fbdev;
  };
  
  
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c b/drivers/gpu/drm/omapdrm/omap_fbdev.c

index 523be34682ca..044e80403c3b 100644
--- a/drivers/gpu/drm/omapdrm/omap_fbdev.c
+++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c
@@ -13,6 +13,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  
  #include "omap_drv.h"

@@ -26,10 +27,8 @@ module_param_named(ywrap, ywrap_enabled, bool, 0644);
   * fbdev funcs, to implement legacy fbdev interface on top of drm driver
   */
  
-#define to_omap_fbdev(x) container_of(x, struct omap_fbdev, base)

-
  struct omap_fbdev {
-   struct drm_fb_helper base;
+   struct drm_device *dev;
bool ywrap_enabled;
  
  	/* for deferred dmm roll when getting called in atomic ctx */

@@ -41,7 +40,7 @@ static struct drm_fb_helper *get_fb(struct fb_info *fbi);
  static void pan_worker(struct work_struct *work)
  {
struct omap_fbdev *fbdev = container_of(work, struct omap_fbdev, work);
-   struct drm_fb_helper *helper = &fbdev->base;
+   struct drm_fb_helper *helper = fbdev->dev->fb_helper;
struct fb_info *fbi = helper->info;
struct drm_gem_object *bo = drm_gem_fb_get_obj(helper->fb, 0);
int npages;
@@ -55,24 +54,25 @@ FB_GEN_DEFAULT_DEFERRED_DMAMEM_OPS(omap_fbdev,
   drm_fb_helper_damage_range,
   drm_fb_helper_damage_area)
  
-static int omap_fbdev_pan_display(struct fb_var_screeninfo *var,

-   struct fb_info *fbi)
+static int omap_fbdev_pan_display(struct fb_var_screeninfo *var, struct 
fb_info *fbi)
  {
struct drm_fb_helper *helper = get_fb(fbi);
-   struct omap_fbdev *fbdev = to_omap_fbdev(helper);
+   struct omap_drm_private *priv;
+   struct omap_fbdev *fbdev;
  
  	if (!helper)

goto fallback;
  
+	priv = helper->dev->dev_private;

+   fbdev = priv->fbdev;
+
if (!fbdev->ywrap_enabled)
goto fallback;
  
-	if (drm_can_sleep()) {

+   if (drm_can_sleep())
pan_worker(&fbdev->work);
-   } else {
-   struct omap_drm_private *priv = helper->dev->dev_private;
+   else
queue_work(priv->wq, &fbdev->work);
-   }
  
  	return 0;
  
@@ -92,7 +92,6 @@ static void omap_fbdev_fb_destroy(struct fb_info *info)

struct drm_fb_helper *helper = info->par;
struct drm_framebuffer *fb = helper->fb;
struct drm_gem_object *bo = drm_gem_fb_get_obj(fb, 0);
-   struct omap_fbdev *fbdev = to_omap_fbdev(helper);
  
  	DBG();
  
@@ -104,7 +103,7 @@ static void omap_fbdev_fb_destroy(struct fb_info *info)
  
  	drm_client_release(&helper->client);

drm_fb_helper_unprepare(helper);
-   kfree(fbdev);
+   kfree(helper);
  }
  
  /*

@@ -128,9 +127,9 @@ static const struct fb_ops omap_fb_ops = {

Re: [PATCH v2] drm/sched: Further optimise drm_sched_entity_push_job

2024-09-27 Thread Tvrtko Ursulin




On 26/09/2024 09:15, Philipp Stanner wrote:

On Mon, 2024-09-23 at 15:35 +0100, Tvrtko Ursulin wrote:


Ping Christian and Philipp - reasonably happy with v2? I think it's
the
only unreviewed patch from the series.


Howdy,

sry for the delay, I had been traveling.

I have a few nits below regarding the commit message. Besides, I'm OK
with that, thx for your work :)


No worries.


On 16/09/2024 18:30, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

Having removed one re-lock cycle on the entity->lock in a patch
titled
"drm/sched: Optimise drm_sched_entity_push_job",
with only a tiny bit
larger refactoring we can do the same optimisation


Well, the commit message does not state which optimization that is. One
would have to look for the previous patch, which you apparently cannot
provide a commit ID for yet because it's not in Big Boss's branch.


With added emphasis:

"Having _removed one re-lock cycle_ on the entity-lock..."

"...do the same optimisation on the rq->lock."

How it is not clear?


In this case I am for including a sentence about what is being
optimized also because


on the rq->lock.
(Currently both drm_sched_rq_add_entity() and
drm_sched_rq_update_fifo_locked() take and release the same lock.)

To achieve this we make drm_sched_rq_update_fifo_locked() and


it's not clear what the "this" that's being achieved is.


"This" is the optimisation previous paragraph talks about.

What/why followed by how.

I honestly think this part of the commit text is good enough.


drm_sched_rq_add_entity() expect the rq->lock to be held.

We also align drm_sched_rq_update_fifo_locked(),
drm_sched_rq_add_entity() and
drm_sched_rq_remove_fifo_locked() function signatures, by adding rq
as a
parameter to the latter.

v2:
   * Fix after rebase of the series.
   * Avoid naming incosistency between drm_sched_rq_add/remove.
(Christian)

Signed-off-by: Tvrtko Ursulin 


Reviewed-by: Philipp Stanner 


Thank you!


Cc: Christian König 
Cc: Alex Deucher 
Cc: Luben Tuikov 
Cc: Matthew Brost 
Cc: Philipp Stanner 
---
   drivers/gpu/drm/scheduler/sched_entity.c | 12 --
   drivers/gpu/drm/scheduler/sched_main.c   | 29 ---
-
   include/drm/gpu_scheduler.h  |  3 ++-
   3 files changed, 26 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_entity.c
b/drivers/gpu/drm/scheduler/sched_entity.c
index d982cebc6bee..8ace1f1ea66b 100644
--- a/drivers/gpu/drm/scheduler/sched_entity.c
+++ b/drivers/gpu/drm/scheduler/sched_entity.c
@@ -515,9 +515,14 @@ struct drm_sched_job
*drm_sched_entity_pop_job(struct drm_sched_entity *entity)
   
   		next = to_drm_sched_job(spsc_queue_peek(&entity-

job_queue));

    if (next) {
+   struct drm_sched_rq *rq;
+
    spin_lock(&entity->lock);
-   drm_sched_rq_update_fifo_locked(entity,
+   rq = entity->rq;
+   spin_lock(&rq->lock);
+   drm_sched_rq_update_fifo_locked(entity,
rq,
    next-

submit_ts);

+   spin_unlock(&rq->lock);
    spin_unlock(&entity->lock);
    }
    }
@@ -618,11 +623,14 @@ void drm_sched_entity_push_job(struct
drm_sched_job *sched_job)
    sched = rq->sched;
   
   		atomic_inc(sched->score);

+
+   spin_lock(&rq->lock);
    drm_sched_rq_add_entity(rq, entity);
   
   		if (drm_sched_policy == DRM_SCHED_POLICY_FIFO)

-   drm_sched_rq_update_fifo_locked(entity,
submit_ts);
+   drm_sched_rq_update_fifo_locked(entity,
rq, submit_ts);
   
+		spin_unlock(&rq->lock);

    spin_unlock(&entity->lock);
   
   		drm_sched_wakeup(sched, entity);

diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 18a952f73ecb..5c83fb92bb89 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -153,17 +153,18 @@ static __always_inline bool
drm_sched_entity_compare_before(struct rb_node *a,
    return ktime_before(ent_a->oldest_job_waiting, ent_b-

oldest_job_waiting);

   }
   
-static inline void drm_sched_rq_remove_fifo_locked(struct

drm_sched_entity *entity)
+static void drm_sched_rq_remove_fifo_locked(struct


I think the commit message should contain a short sentence about why
you removed the inline.

AKA "As we're at it, remove the inline function specifier from
drm_sched_rq_remove_fifo_locked() because XYZ"


Fair play on this one, should have mentioned it. Probably just removed 
the inline by habit while touching the function signature. Under the 
"compiler knows better" mantra.


Regards,

Tvrtko


drm_sched_entity *entity,
+       struct drm_sched_rq
*rq)
   {
-   struct drm_sched_rq *rq = entity->rq;
-
    if (!RB_EMPTY_NODE(&entity->rb_tree_node)) {

Re: [PATCH v5 80/80] drm/omapdrm: Run DRM default client setup


On 24/09/2024 10:13, Thomas Zimmermann wrote:

Rework fbdev probing to support fbdev_probe in struct drm_driver
and remove the old fb_probe callback. Provide an initializer macro
for struct drm_driver that sets the callback according to the kernel
configuration.

Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.

The omapdrm driver specifies a preferred color mode of 32. As this
is the default if no format has been given, leave it out entirely.

v5:
- select DRM_CLIENT_SELECTION

Signed-off-by: Thomas Zimmermann 
Cc: Tomi Valkeinen 
Acked-by: Javier Martinez Canillas 
---
  drivers/gpu/drm/omapdrm/Kconfig  |   1 +
  drivers/gpu/drm/omapdrm/omap_drv.c   |   1 +
  drivers/gpu/drm/omapdrm/omap_fbdev.c | 131 ++-
  drivers/gpu/drm/omapdrm/omap_fbdev.h |   8 ++
  4 files changed, 39 insertions(+), 102 deletions(-)


Reviewed-by: Tomi Valkeinen 

 Tomi


diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
index fbd9af758581..9d4016bd0f44 100644
--- a/drivers/gpu/drm/omapdrm/Kconfig
+++ b/drivers/gpu/drm/omapdrm/Kconfig
@@ -4,6 +4,7 @@ config DRM_OMAP
depends on MMU
depends on DRM && OF
depends on ARCH_OMAP2PLUS || (COMPILE_TEST && PAGE_SIZE_LESS_THAN_64KB)
+   select DRM_CLIENT_SELECTION
select DRM_KMS_HELPER
select DRM_DISPLAY_HELPER
select DRM_BRIDGE_CONNECTOR
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index a982378aa141..1796cd20a877 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -647,6 +647,7 @@ static const struct drm_driver omap_drm_driver = {
.gem_prime_import = omap_gem_prime_import,
.dumb_create = omap_gem_dumb_create,
.dumb_map_offset = omap_gem_dumb_map_offset,
+   OMAP_FBDEV_DRIVER_OPS,
.ioctls = ioctls,
.num_ioctls = DRM_OMAP_NUM_IOCTLS,
.fops = &omapdriver_fops,
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c 
b/drivers/gpu/drm/omapdrm/omap_fbdev.c
index 044e80403c3b..f4bd0c6e3f34 100644
--- a/drivers/gpu/drm/omapdrm/omap_fbdev.c
+++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c
@@ -6,6 +6,7 @@
  
  #include 
  
+#include 

  #include 
  #include 
  #include 
@@ -124,8 +125,32 @@ static const struct fb_ops omap_fb_ops = {
.fb_destroy = omap_fbdev_fb_destroy,
  };
  
-static int omap_fbdev_create(struct drm_fb_helper *helper,

-   struct drm_fb_helper_surface_size *sizes)
+static int omap_fbdev_dirty(struct drm_fb_helper *helper, struct drm_clip_rect 
*clip)
+{
+   if (!(clip->x1 < clip->x2 && clip->y1 < clip->y2))
+   return 0;
+
+   if (helper->fb->funcs->dirty)
+   return helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 
1);
+
+   return 0;
+}
+
+static const struct drm_fb_helper_funcs omap_fbdev_helper_funcs = {
+   .fb_dirty = omap_fbdev_dirty,
+};
+
+static struct drm_fb_helper *get_fb(struct fb_info *fbi)
+{
+   if (!fbi || strcmp(fbi->fix.id, MODULE_NAME)) {
+   /* these are not the fb's you're looking for */
+   return NULL;
+   }
+   return fbi->par;
+}
+
+int omap_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
+ struct drm_fb_helper_surface_size *sizes)
  {
struct drm_device *dev = helper->dev;
struct omap_drm_private *priv = dev->dev_private;
@@ -207,6 +232,7 @@ static int omap_fbdev_create(struct drm_fb_helper *helper,
  
  	DBG("fbi=%p, dev=%p", fbi, dev);
  
+	helper->funcs = &omap_fbdev_helper_funcs;

helper->fb = fb;
  
  	fbi->fbops = &omap_fb_ops;

@@ -253,94 +279,10 @@ static int omap_fbdev_create(struct drm_fb_helper *helper,
return ret;
  }
  
-static int omap_fbdev_dirty(struct drm_fb_helper *helper, struct drm_clip_rect *clip)

-{
-   if (!(clip->x1 < clip->x2 && clip->y1 < clip->y2))
-   return 0;
-
-   if (helper->fb->funcs->dirty)
-   return helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, clip, 
1);
-
-   return 0;
-}
-
-static const struct drm_fb_helper_funcs omap_fb_helper_funcs = {
-   .fb_probe = omap_fbdev_create,
-   .fb_dirty = omap_fbdev_dirty,
-};
-
-static struct drm_fb_helper *get_fb(struct fb_info *fbi)
-{
-   if (!fbi || strcmp(fbi->fix.id, MODULE_NAME)) {
-   /* these are not the fb's you're looking for */
-   return NULL;
-   }
-   return fbi->par;
-}
-
-/*
- * struct drm_client
- */
-
-static void omap_fbdev_client_unregister(struct drm_client_dev *client)
-{
-   struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client);
-
-   if (fb_helper->info) {
-   drm_fb_helper_unregister_info(fb_helper);
-   } else {
-   drm_client_release(&fb_helper->client);
-   drm_fb_helper_unprepare(fb_helper);

Re: [PATCH] drm/amdgpu: fix PTE copy corruption for sdma 7

2024-09-27 Thread Alex Deucher

On Thu, Sep 26, 2024 at 4:43 AM Min, Frank  wrote:
>
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> From: Frank Min 
>
> Without setting dcc bit, there is ramdon PTE copy corruption on sdma 7.
>
> so add this bit and update the packet format accordingly.
>
> Signed-off-by: Frank Min 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> index cfd8e183ad50..a8763496aed3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> @@ -1080,13 +1080,16 @@ static void sdma_v7_0_vm_copy_pte(struct amdgpu_ib 
> *ib,
> unsigned bytes = count * 8;
>
> ib->ptr[ib->length_dw++] = 
> SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) |
> -   SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR);
> +   SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |
> +   SDMA_PKT_COPY_LINEAR_HEADER_CPV(1);
> +
> ib->ptr[ib->length_dw++] = bytes - 1;
> ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
> ib->ptr[ib->length_dw++] = lower_32_bits(src);
> ib->ptr[ib->length_dw++] = upper_32_bits(src);
> ib->ptr[ib->length_dw++] = lower_32_bits(pe);
> ib->ptr[ib->length_dw++] = upper_32_bits(pe);
> +   ib->ptr[ib->length_dw++] = 0;
>
>  }
>
> @@ -1744,7 +1747,7 @@ static void sdma_v7_0_set_buffer_funcs(struct 
> amdgpu_device *adev)  }
>
>  static const struct amdgpu_vm_pte_funcs sdma_v7_0_vm_pte_funcs = {
> -   .copy_pte_num_dw = 7,
> +   .copy_pte_num_dw = 8,
> .copy_pte = sdma_v7_0_vm_copy_pte,
> .write_pte = sdma_v7_0_vm_write_pte,
> .set_pte_pde = sdma_v7_0_vm_set_pte_pde,
> --
> 2.43.0
>
>

Re: [PATCH v4 0/6] DRM_SET_CLIENT_NAME ioctl

2024-09-27 Thread Jani Nikula

On Fri, 27 Sep 2024, Christian König  wrote:
> Am 27.09.24 um 10:48 schrieb Pierre-Eric Pelloux-Prayer:
>> v4 changelog:
>> * DRM_SET_NAME -> DRM_SET_CLIENT_NAME (Dmitry)
>> * reject names that would mess up with formatting (Sima),
>>and use a stricter filter (isgraph allowed extended ASCII
>>which weren't looking great)
>> * documentation edits, minor fixups (Dmitry, Trvtko)
>> * clarified commit message of commit 3/6 (Trvtko)
>> * reworked amdgpu_vm_set_task_info a bit in 4/6 (Trvtko)
>
> If nobody has any more additional comments on this I'm going to pick it 
> up and merge it through drm-misc-next by the end of today.

AFAICT the userspace is not reviewed and ready for merging [1].

BR,
Jani.


[1] https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1428


-- 
Jani Nikula, Intel

[PATCH v1 1/5] drm/amdgpu: update the handle ptr in early_init

update the handle ptr to amdgpu_ip_block ptr
for all functions pointers on early_init.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 5 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   | 4 ++--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
 drivers/gpu/dr

[PATCH v1 0/5] Update the *handle with ip_block ptr

Update for function ptrs early_init, late_init, sw_init, sw_fini,
early_fini



Sunil Khatri (5):
  drm/amdgpu: update the handle ptr in early_init
  drm/amdgpu: update the handle ptr in late_init
  drm/amdgpu: update the handle ptr in sw_init
  drm/amdgpu: update the handle ptr in sw_fini
  drm/amdgpu: update the handle ptr in early_fini

 drivers/gpu/drm/amd/amdgpu/aldebaran.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 10 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 14 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   |  9 
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 16 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c  |  8 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/cik.c  |  8 +++
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 22 +--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16 +++---
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h|  6 ++---
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 12 +-
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/nv.c   | 14 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 16 +++---
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/si.c   |  8 +++
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 12 +-
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 12 +-
 drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c| 16 +++---
 drivers/gpu/drm/amd/amdgpu/soc21.c| 14 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c| 14 ++--
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 12 +-
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 12 +-
 drive

Re: [PATCH v3] docs/gpu: ci: update flake tests requirements

2024-09-27 Thread Rodrigo Vivi

On Fri, Sep 27, 2024 at 10:54:14AM +0530, Vignesh Raman wrote:
> Update the documentation to specify linking to a relevant GitLab
> issue or email report for each new flake entry. Added specific
> GitLab issue urls for i915, msm and amdgpu driver.
> 
> Acked-by: Abhinav Kumar  # msm
> Acked-by: Dmitry Baryshkov  # msm
> Signed-off-by: Vignesh Raman 
> ---
> 
> v2:
> - Add gitlab issue link for msm driver.
> 
> v3:
> - Update docs to specify we use email reporting or GitLab issues for flake 
> entries.
> 
> ---
>  Documentation/gpu/automated_testing.rst | 13 +
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/gpu/automated_testing.rst 
> b/Documentation/gpu/automated_testing.rst
> index 2d5a28866afe..03769b4a17cf 100644
> --- a/Documentation/gpu/automated_testing.rst
> +++ b/Documentation/gpu/automated_testing.rst
> @@ -68,19 +68,24 @@ known to behave unreliably. These tests won't cause a job 
> to fail regardless of
>  the result. They will still be run.
>  
>  Each new flake entry must be associated with a link to the email reporting 
> the
> -bug to the author of the affected driver, the board name or Device Tree name 
> of
> -the board, the first kernel version affected, the IGT version used for tests,
> -and an approximation of the failure rate.
> +bug to the author of the affected driver or the relevant GitLab issue. The 
> entry
> +must also include the board name or Device Tree name, the first kernel 
> version
> +affected, the IGT version used for tests, and an approximation of the 
> failure rate.
>  
>  They should be provided under the following format::
>  
> -  # Bug Report: $LORE_OR_PATCHWORK_URL
> +  # Bug Report: $LORE_URL_OR_GITLAB_ISSUE
># Board Name: broken-board.dtb
># Linux Version: 6.6-rc1
># IGT Version: 1.28-gd2af13d9f
># Failure Rate: 100
>flaky-test
>  
> +Use the appropriate link below to create a GitLab issue:
> +amdgpu driver: https://gitlab.freedesktop.org/drm/amd/-/issues
> +i915 driver: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues

Probably good to add:

xe driver: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues

Acked-by: Rodrigo Vivi 

> +msm driver: https://gitlab.freedesktop.org/drm/msm/-/issues
> +
>  drivers/gpu/drm/ci/${DRIVER_NAME}-${HW_REVISION}-skips.txt
>  ---
>  
> -- 
> 2.43.0
>

Re: [PATCH v2] drm/amdgpu/gfx9: Convert `//` to `/* ... */` in cleaner shader code


Am 25.09.24 um 21:45 schrieb Felix Kuehling:


On 2024-09-04 07:03, Christian König wrote:

It could be that the automated testing tools will run amok on that.

I need to ask Felix for details but I think the code for the CWSR 
trap handlers were converted to C style comments as well because of 
that.


I'm not aware of that. I see both comment styles in 
amdkfd/cwsr_trap_handler_*.asm.


Oh, I was assuming that this is the C header with the binary variant and 
not the asm file.


My fault, in that case it indeed doesn't matter.

Regards,
Christian.




Regards,
  Felix




Christian.

Am 04.09.24 um 12:52 schrieb Deucher, Alexander:


[AMD Official Use Only - AMD Internal Distribution Only]


I think you can drop this patch.  This code is not compiled, it's 
just for reference, and changing all of the comments will just make 
it harder to keep in sync with the internal version.


Alex

 


*From:* SHANMUGAM, SRINIVASAN 
*Sent:* Wednesday, September 4, 2024 5:51 AM
*To:* Koenig, Christian ; Deucher, 
Alexander 
*Cc:* amd-gfx@lists.freedesktop.org ; 
SHANMUGAM, SRINIVASAN 
*Subject:* [PATCH v2] drm/amdgpu/gfx9: Convert `//` to `/* ... */` 
in cleaner shader code

This commit updates the comment style in the cleaner shader code from
`//` to `/* ... */` to adhere to the Linux kernel coding style.

The comments describe the operation of the cleaner shader, which is 
used

to clean LDS, SGPRs, and VGPRs. The shader uses two kernels launched
separately to clean VGPRs, LDS, and lower SGPRs, and to clean remaining
SGPRs.

Fixes: 3b721dfb2c95 ("drm/amdgpu/gfx9: Add cleaner shader for 
GFX9.4.3")

Cc: Christian König 
Cc: Alex Deucher 
Signed-off-by: Srinivasan Shanmugam 
---
v2:
 - Corrected typo for iteraions
 - Added fixes tag

 .../amd/amdgpu/gfx_v9_4_3_cleaner_shader.asm  | 139 +-
 1 file changed, 72 insertions(+), 67 deletions(-)

diff --git 
a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3_cleaner_shader.asm 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3_cleaner_shader.asm

index d5325ef80ab0..8951b5a87ae1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3_cleaner_shader.asm
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3_cleaner_shader.asm
@@ -21,47 +21,52 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */

-// This shader is to clean LDS, SGPRs and VGPRs. It is  first 64 
Dwords or 256 bytes of 192 Dwords cleaner shader.
-//To turn this shader program on for complitaion change this to 
main and lower shader main to main_1

-
-// MI300 : Clear SGPRs, VGPRs and LDS
-//   Uses two kernels launched separately:
-//   1. Clean VGPRs, LDS, and lower SGPRs
-//    Launches one workgroup per CU, each workgroup with 4x 
wave64 per SIMD in the CU
-//    Waves are "wave64" and have 128 VGPRs each, which uses 
all 512 VGPRs per SIMD

-//    Waves in the workgroup share the 64KB of LDS
-//    Each wave clears SGPRs 0 - 95. Because there are 4 
waves/SIMD, this is physical SGPRs 0-383

-//    Each wave clears 128 VGPRs, so all 512 in the SIMD
-//    The first wave of the workgroup clears its 64KB of LDS
-//    The shader starts with "S_BARRIER" to ensure SPI has 
launched all waves of the workgroup
-//  before any wave in the workgroup could end. Without 
this, it is possible not all SGPRs get cleared.

-//    2. Clean remaining SGPRs
-//    Launches a workgroup with 24 waves per workgroup, 
yielding 6 waves per SIMD in each CU

-//    Waves are allocating 96 SGPRs
-//  CP sets up SPI_RESOURCE_RESERVE_* registers to prevent 
these waves from allocating SGPRs 0-223.
-//  As such, these 6 waves per SIMD are allocated physical 
SGPRs 224-799
-//    Barriers do not work for >16 waves per workgroup, so we 
cannot start with S_BARRIER
-//  Instead, the shader starts with an S_SETHALT 1. Once 
all waves are launched CP will send unhalt command
-//    The shader then clears all SGPRs allocated to it, 
cleaning out physical SGPRs 224-799

+/*
+ * This shader is to clean LDS, SGPRs and VGPRs. It is  first 64 
Dwords or 256 bytes of 192 Dwords cleaner shader.
+ * To turn this shader program on for complitaion change this to 
main and lower shader main to main_1

+ *
+ * MI300 : Clear SGPRs, VGPRs and LDS
+ *   Uses two kernels launched separately:
+ *   1. Clean VGPRs, LDS, and lower SGPRs
+ *    Launches one workgroup per CU, each workgroup with 4x 
wave64 per SIMD in the CU
+ *    Waves are "wave64" and have 128 VGPRs each, which uses 
all 512 VGPRs per SIMD

+ *    Waves in the workgroup share the 64KB of LDS
+ *    Each wave clears SGPRs 0 - 95. Because there are 4 
waves/SIMD, this is physical SGPRs 0-383

+ *    Each wave clears 128 VGPRs, so all 512 in the SIMD
+ *    The first wave of the workgroup clears its 64KB of LDS
+ *    The shader starts with "S_BARRIER" to ensure SPI has 
launched all waves of the workgroup
+ *  before any wave in the workgroup

[PATCH 06/13] drm/amd/display: Introduce New ABC Framework for Brightness Control

From: Muyuan Yang 

Adjust the existing brightness control functions to use the new
ABC Framework and prioritize Aux-based brightness control.

Reviewed-by: Anthony Koo 
Signed-off-by: Muyuan Yang 
Signed-off-by: Fangzhi Zuo 
---
 .../link/protocols/link_edp_panel_control.c   | 40 +--
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git 
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c 
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 070b6c8c1aef..7680bc8845d4 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -157,31 +157,11 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
uint32_t backlight_millinits,
uint32_t transition_time_in_ms)
 {
-   struct dpcd_source_backlight_set dpcd_backlight_set;
-   uint8_t backlight_control = isHDR ? 1 : 0;
-
if (!link || (link->connector_signal != SIGNAL_TYPE_EDP &&
link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
return false;
 
-   // OLEDs have no PWM, they can only use AUX
-   if (link->dpcd_sink_ext_caps.bits.oled == 1)
-   backlight_control = 1;
-
-   *(uint32_t *)&dpcd_backlight_set.backlight_level_millinits = 
backlight_millinits;
-   *(uint16_t *)&dpcd_backlight_set.backlight_transition_time_ms = 
(uint16_t)transition_time_in_ms;
-
-
-   if (!link->dpcd_caps.panel_luminance_control) {
-   if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
-   (uint8_t *)(&dpcd_backlight_set),
-   sizeof(dpcd_backlight_set)) != DC_OK)
-   return false;
-
-   if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_CONTROL,
-   &backlight_control, 1) != DC_OK)
-   return false;
-   } else {
+   if (link->backlight_control_type == BACKLIGHT_CONTROL_VESA_AUX) {
uint8_t backlight_enable = 0;
struct target_luminance_value *target_luminance = NULL;
 
@@ -205,6 +185,24 @@ bool edp_set_backlight_level_nits(struct dc_link *link,
(uint8_t *)(target_luminance),
sizeof(struct target_luminance_value)) != DC_OK)
return false;
+   } else {
+   struct dpcd_source_backlight_set dpcd_backlight_set;
+   *(uint32_t *)&dpcd_backlight_set.backlight_level_millinits = 
backlight_millinits;
+   *(uint16_t *)&dpcd_backlight_set.backlight_transition_time_ms = 
(uint16_t)transition_time_in_ms;
+
+   uint8_t backlight_control = isHDR ? 1 : 0;
+   // OLEDs have no PWM, they can only use AUX
+   if (link->dpcd_sink_ext_caps.bits.oled == 1)
+   backlight_control = 1;
+
+   if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
+   (uint8_t *)(&dpcd_backlight_set),
+   sizeof(dpcd_backlight_set)) != DC_OK)
+   return false;
+
+   if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_CONTROL,
+   &backlight_control, 1) != DC_OK)
+   return false;
}
 
return true;
-- 
2.34.1

[PATCH 03/13] drm/amd/display: Add logs to record register read/write

From: Paul Hsieh 

[Why]
There are some issues which customer only can provide full
dump for analyze, without register history, it's hard to
debug HW status.

[How]
1. Put register read/write into WPP log so we can trace the logs
from full memory dump.
2. MALL doesn't add into WPP, add it.

Reviewed-by: Aric Cyr 
Signed-off-by: Paul Hsieh 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/include/logger_types.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h 
b/drivers/gpu/drm/amd/display/include/logger_types.h
index a48d564d1660..4d68c1c6e210 100644
--- a/drivers/gpu/drm/amd/display/include/logger_types.h
+++ b/drivers/gpu/drm/amd/display/include/logger_types.h
@@ -61,11 +61,13 @@
 #define DC_LOG_ALL_TF_CHANNELS(...) pr_debug("[GAMMA]:"__VA_ARGS__)
 #define DC_LOG_DSC(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_SMU(...) pr_debug("[SMU_MSG]:"__VA_ARGS__)
-#define DC_LOG_MALL(...) pr_debug("[MALL]:"__VA_ARGS__)
 #define DC_LOG_DWB(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__)
 #define DC_LOG_IPS(...) pr_debug("[IPS]: "__VA_ARGS__)
+#define DC_LOG_MALL(...) pr_debug("[MALL]:"__VA_ARGS__)
+#define DC_LOG_REGISTER_READ(...) pr_debug("[REGISTER_READ]: "__VA_ARGS__)
+#define DC_LOG_REGISTER_WRITE(...) pr_debug("[REGISTER_WRITE]: "__VA_ARGS__)
 
 struct dc_log_buffer_ctx {
char *buf;
-- 
2.34.1

[PATCH 07/13] drm/amd/display: Remove always-false branches

From: Alex Hung 

[WHAT & HOW]
MacroTileSizeBytes is set to either 256 or 65535 and it is never
4096. Its branch is not taken, and should be removed. Similarly,
mode_422 is always 0 and thus ppe will always be 1. The ternary
operator should be removed.

This fixes 2 DEADCODE issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Alex Hung 
Signed-off-by: Fangzhi Zuo 
---
 .../drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c   | 9 -
 .../drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c| 3 +--
 2 files changed, 1 insertion(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 1c10ba4dcdde..4822fad6ce3a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -1775,15 +1775,6 @@ static unsigned int CalculateVMAndRowBytes(
*PixelPTEReqWidth = 32768.0 / BytePerPixel;
*PTERequestSize = 64;
FractionOfPTEReturnDrop = 0;
-   } else if (MacroTileSizeBytes == 4096) {
-   PixelPTEReqHeightPTEs = 1;
-   *PixelPTEReqHeight = MacroTileHeight;
-   *PixelPTEReqWidth = 8 * *MacroTileWidth;
-   *PTERequestSize = 64;
-   if (ScanDirection != dm_vert)
-   FractionOfPTEReturnDrop = 0;
-   else
-   FractionOfPTEReturnDrop = 7.0 / 8;
} else if (GPUVMMinPageSize == 4 && MacroTileSizeBytes > 4096) {
PixelPTEReqHeightPTEs = 16;
*PixelPTEReqHeight = 16 * BlockHeight256Bytes;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 
b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
index d8bfc85e5dcd..88dc2b97e7bf 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
@@ -559,12 +559,11 @@ static void get_surf_rq_param(
const struct _vcs_dpi_display_pipe_source_params_st 
*pipe_src_param,
bool is_chroma)
 {
-   bool mode_422 = 0;
unsigned int vp_width = 0;
unsigned int vp_height = 0;
unsigned int data_pitch = 0;
unsigned int meta_pitch = 0;
-   unsigned int ppe = mode_422 ? 2 : 1;
+   unsigned int ppe = 1;
bool surf_linear;
bool surf_vert;
unsigned int bytes_per_element;
-- 
2.34.1

[PATCH 04/13] drm/amd/display: add more support for UHBR10 eDP

From: "Liu Xi (Alex)" 

[Why and how]

The current UHBR10 eDP panel has new security feature update. Add support for 
the new FW

Reviewed-by: Wenjing Liu 
Signed-off-by: Liu Xi (Alex) 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/dc/dc.h| 1 -
 .../drm/amd/display/dc/link/protocols/link_edp_panel_control.c | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 51fdc0085935..8878a770c376 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1771,7 +1771,6 @@ struct dc_link {
bool dongle_mode_timing_override;
bool blank_stream_on_ocs_change;
bool read_dpcd204h_on_irq_hpd;
-   bool disable_assr_for_uhbr;
} wa_flags;
struct link_mst_stream_allocation_table mst_stream_alloc_table;
 
diff --git 
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c 
b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 3aa05a2be6c0..070b6c8c1aef 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -1168,9 +1168,6 @@ static void edp_set_assr_enable(const struct dc *pDC, 
struct dc_link *link,
link_enc_index = link->link_enc->transmitter - TRANSMITTER_UNIPHY_A;
 
if (link_res->hpo_dp_link_enc) {
-   if (link->wa_flags.disable_assr_for_uhbr)
-   return;
-
link_enc_index = link_res->hpo_dp_link_enc->inst;
use_hpo_dp_link_enc = true;
}
-- 
2.34.1

[PATCH 05/13] drm/amd/display: Change Brightness Control Priority

From: Muyuan Yang 

Prioritize Aux-based over PWM-based brightness control
for more types of panels and introduce a new structure
to store and manage the type of brightness control used.

Reviewed-by: Anthony Koo 
Signed-off-by: Muyuan Yang 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/dc/dc.h   | 1 +
 drivers/gpu/drm/amd/display/dc/dc_types.h | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 8878a770c376..059e5f4ede49 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1786,6 +1786,7 @@ struct dc_link {
// BW ALLOCATON USB4 ONLY
struct dc_dpia_bw_alloc dpia_bw_alloc_config;
bool skip_implict_edp_power_control;
+   enum backlight_control_type backlight_control_type;
 };
 
 /* Return an enumerated dc_link.
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h 
b/drivers/gpu/drm/amd/display/dc/dc_types.h
index b0b7102fdbc7..3401f4c9fb10 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -923,6 +923,12 @@ struct display_endpoint_id {
enum display_endpoint_type ep_type;
 };
 
+enum backlight_control_type {
+   BACKLIGHT_CONTROL_PWM = 0,
+   BACKLIGHT_CONTROL_VESA_AUX = 1,
+   BACKLIGHT_CONTROL_AMD_AUX = 2,
+};
+
 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
 struct otg_phy_mux {
uint8_t phy_output_num;
-- 
2.34.1

Re: [PATCH v7 00/10] drm/amd/display: Use drm_edid for more code

2024-09-27 Thread Alex Hung


Hi Mario and Melissa,

There are three regressions identified during the test, and improvement 
is required before the patches can be merged. Please see details below.


1. null pointer when hot-plugging a dsc hub (+ three 4k60 monitors).

This may point to "drm/amd/display: use drm_edid_product_id for parsing 
EDID product info" since that's the only patch calling 
drm_edid_get_product_id.



[  227.797361] RIP: 0010:drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797388] Code: 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 44 00 
00 55 48 89 e5 48 85 ff 74 24 48 8b 47 08 48 85 c0 74 1b 48 83 3f 7f 76 
15 <48> 8b 50 08 5d 48 89 16 0f b7 40 10 66 89 46 08 e9 a9 47 ee ce 31

[  227.797391] RSP: 0018:ac58126f7930 EFLAGS: 00010216
[  227.797394] RAX: 372d RBX: 8eaeaf8ac808 RCX: 
8eaeaf8ac107
[  227.797396] RDX: 0002 RSI: ac58126f7944 RDI: 
8eaeeeaf9f80
[  227.797398] RBP: ac58126f7930 R08: 8eae8e500d00 R09: 
0001
[  227.797400] R10: ac58126f7978 R11: 0017f81b R12: 
8eae84cb
[  227.797402] R13: 8eaeeeaf9f80 R14:  R15: 
0100
[  227.797405] FS:  7f031a616ac0() GS:8eb57cd8() 
knlGS:

[  227.797407] CS:  0010 DS:  ES:  CR0: 80050033
[  227.797409] CR2: 3735 CR3: 00014decc000 CR4: 
00750ef0

[  227.797411] PKRU: 5554
[  227.797413] Call Trace:
[  227.797415]  
[  227.797417]  ? show_regs+0x64/0x70
[  227.797423]  ? __die+0x24/0x70
[  227.797427]  ? page_fault_oops+0x160/0x520
[  227.797435]  ? do_user_addr_fault+0x2e9/0x6a0
[  227.797438]  ? dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.797654]  ? dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.797882]  ? drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]

[  227.797894]  ? exc_page_fault+0x7f/0x190
[  227.797899]  ? asm_exc_page_fault+0x27/0x30
[  227.797906]  ? drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797932]  dm_helpers_parse_edid_caps+0x69/0x260 [amdgpu]
[  227.798139] amdgpu :0b:00.0: [drm:drm_dp_dpcd_write 
[drm_display_helper]] AMDGPU DM aux hw bus 2: 0x02003 AUX <- (ret=  1) 10

[  227.798158]  link_add_remote_sink+0xa8/0x1a0 [amdgpu]
[  227.798402]  dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.798615]  dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.798843]  ? srso_alias_return_thunk+0x5/0xfbef5
[  227.798848]  drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]



2. DP2 Display is not listed as an audio device

Steps to reproduce:
- Attach display to system.
- Boot to Desktop (Wayland)
- Attempt to select display as an audio device.

This points to patch "drm/amd/display: get SAD from drm_eld when parsing 
EDID caps"



3. IGT amd_mem_leak'sconnector-suspend-resume fails on Navi 31.

This points to the patch "drm/amd/display: remove dc_edid handler from 
dm_helpers_parse_edid_caps".



Using IGT_SRANDOM=1727192429 for randomisation
Opened device: /dev/dri/card0
Starting subtest: connector-suspend-resume
[cmd] rtcwake: assuming RTC uses UTC ...
rtcwake: wakeup from "mem" using /dev/rtc0 at Tue Sep 24 15:40:50 2024
unreferenced object 0x95c683517b00 (size 256):
  comm "kworker/u64:30", pid 3636, jiffies 4295452761
  hex dump (first 32 bytes):
00 ff ff ff ff ff ff 00 22 0e c2 36 00 00 00 00  "..6
33 1d 01 04 b5 3c 22 78 3b 28 91 a7 55 4e a3 26  3<"x;(..UN.&
  backtrace (crc 5800a91d):
[] kmemleak_alloc+0x4a/0x80
[] kmalloc_node_track_caller_noprof+0x337/0x410
[] krealloc_noprof+0x58/0xb0
[] _drm_do_get_edid+0x138/0x410 [drm]
[] drm_edid_read_custom+0x35/0xd0 [drm]
[] drm_edid_read_ddc+0x44/0x80 [drm]
[] dm_helpers_read_local_edid+0x1d8/0x340 [amdgpu]
[] detect_link_and_local_sink+0x356/0x1230 [amdgpu]
[] link_detect+0x36/0x4f0 [amdgpu]
[] dc_link_detect+0x20/0x30 [amdgpu]
[] dm_resume+0x1e0/0x7d0 [amdgpu]
[] amdgpu_device_ip_resume_phase2+0x58/0xd0 [amdgpu]
[] amdgpu_device_resume+0xa7/0x2e0 [amdgpu]
[] amdgpu_pmops_resume+0x4c/0x90 [amdgpu]
[] pci_pm_resume+0x71/0x100
[] dpm_run_callback+0x91/0x1e0
unreferenced object 0x95c6c58dd0c0 (size 16):
  comm "kworker/u64:30", pid 3636, jiffies 4295452764
  hex dump (first 16 bytes):
00 01 00 00 00 00 00 00 00 7b 51 83 c6 95 ff ff  .{Q.
  backtrace (crc 70d89717):
[] kmemleak_alloc+0x4a/0x80
[] kmalloc_trace_noprof+0x28e/0x300
[] _drm_edid_alloc+0x35/0x60 [drm]
[] drm_edid_read_custom+0x55/0xd0 [drm]
[] drm_edid_read_ddc+0x44/0x80 [drm]
[] dm_helpers_read_local_edid+0x1d8/0x340 [amdgpu]
[] detect_link_and_local_sink+0x356/0x1230 [amdgpu]
[] link_detect+0x36/0x4f0 [amdgpu]
[] dc_link_detect+0x20/0x30 [amdgpu]
[] dm_resume+0x1e0/0x7d0 [amdgpu]
[] amdgpu_device_ip_resume_phase2+0x58/0xd0 [amdgpu]
[] amdgpu_device_resume+0xa7/0x2e0 [amdgpu]
[] amdgpu_pmops_resume+0x4c/0x90 [amdgpu]
[] pci_pm_resume+0x71/0x100

[PATCH 10/13] drm/amd/display: Add IPS residency capture helpers to dc_dmub_srv

From: Ovidiu Bunea 

This enables starting and stopping IPS residency measurements
and querying the IPS residency information consisting of residency
percent, entry counter, total time active & inactive, and histograms
for the specified IPS mode.

Reviewed-by: Nicholas Kazlauskas 
Reviewed-by: Aric Cyr 
Signed-off-by: Ovidiu Bunea 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  | 78 +++
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  | 39 
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |  8 ++
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   | 95 +++
 4 files changed, 220 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c 
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 1e7de0f03290..9291f078ffde 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1862,3 +1862,81 @@ void dc_dmub_srv_fams2_passthrough_flip(
dm_execute_dmub_cmd_list(dc->ctx, num_cmds, cmds, 
DM_DMUB_WAIT_TYPE_WAIT);
}
 }
+
+bool dc_dmub_srv_ips_residency_cntl(struct dc_dmub_srv *dc_dmub_srv, bool 
start_measurement)
+{
+   bool result;
+
+   if (!dc_dmub_srv || !dc_dmub_srv->dmub)
+   return false;
+
+   result = dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__IPS_RESIDENCY,
+  start_measurement, NULL, 
DM_DMUB_WAIT_TYPE_WAIT);
+
+   return result;
+}
+
+void dc_dmub_srv_ips_query_residency_info(struct dc_dmub_srv *dc_dmub_srv, 
struct ips_residency_info *output)
+{
+   uint32_t i;
+   enum dmub_gpint_command command_code;
+
+   if (!dc_dmub_srv || !dc_dmub_srv->dmub)
+   return;
+
+   switch (output->ips_mode) {
+   case DMUB_IPS_MODE_IPS1_MAX:
+   command_code = DMUB_GPINT__GET_IPS1_HISTOGRAM_COUNTER;
+   break;
+   case DMUB_IPS_MODE_IPS2:
+   command_code = DMUB_GPINT__GET_IPS2_HISTOGRAM_COUNTER;
+   break;
+   case DMUB_IPS_MODE_IPS1_RCG:
+   command_code = DMUB_GPINT__GET_IPS1_RCG_HISTOGRAM_COUNTER;
+   break;
+   case DMUB_IPS_MODE_IPS1_ONO2_ON:
+   command_code = DMUB_GPINT__GET_IPS1_ONO2_ON_HISTOGRAM_COUNTER;
+   break;
+   default:
+   command_code = DMUB_GPINT__INVALID_COMMAND;
+   break;
+   }
+
+   if (command_code == DMUB_GPINT__INVALID_COMMAND)
+   return;
+
+   // send gpint commands and wait for ack
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_RESIDENCY_PERCENT,
+ (uint16_t)(output->ips_mode),
+  &output->residency_percent, 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->residency_percent = 0;
+
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_RESIDENCY_ENTRY_COUNTER,
+ (uint16_t)(output->ips_mode),
+  &output->entry_counter, 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->entry_counter = 0;
+
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_RESIDENCY_DURATION_US_LO,
+ (uint16_t)(output->ips_mode),
+  &output->total_active_time_us[0], 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->total_active_time_us[0] = 0;
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_RESIDENCY_DURATION_US_HI,
+ (uint16_t)(output->ips_mode),
+  &output->total_active_time_us[1], 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->total_active_time_us[1] = 0;
+
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_LO,
+ (uint16_t)(output->ips_mode),
+  &output->total_inactive_time_us[0], 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->total_inactive_time_us[0] = 0;
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, 
DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_HI,
+ (uint16_t)(output->ips_mode),
+  &output->total_inactive_time_us[1], 
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->total_inactive_time_us[1] = 0;
+
+   // NUM_IPS_HISTOGRAM_BUCKETS = 16
+   for (i = 0; i < 16; i++)
+   if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, command_code, 
i, &output->histogram[i],
+  
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
+   output->histogram[i] = 0;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h 
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
index 4

[PATCH 00/13] DC Patches Sept 23, 2024

This DC patchset brings improvements in multiple areas.
In summary, we highlight:

* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup

Cc: Daniel Wheeler 

Alex Hung (3):
  drm/amd/display: Remove always-false branches
  drm/amd/display: Eliminate recursive header inclusion
  drm/amd/display: Removed unused assignments and variables

Aric Cyr (1):
  drm/amd/display: 3.2.303

Dillon Varone (1):
  drm/amd/display: Configure DTBCLK_P with OPTC only for dcn401

Liu Xi (Alex) (1):
  drm/amd/display: add more support for UHBR10 eDP

Muyuan Yang (2):
  drm/amd/display: Change Brightness Control Priority
  drm/amd/display: Introduce New ABC Framework for Brightness Control

Ovidiu Bunea (1):
  drm/amd/display: Add IPS residency capture helpers to dc_dmub_srv

Paul Hsieh (1):
  drm/amd/display: Add logs to record register read/write

Ryan Seto (1):
  drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS

Taimur Hassan (1):
  drm/amd/display: [FW Promotion] Release 0.0.236.0

Tom Chung (1):
  drm/amd/display: Fix system hang while resume with TBT monitor

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   9 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  48 +
 drivers/gpu/drm/amd/display/dc/dc.h   |   4 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |  78 
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |  39 
 drivers/gpu/drm/amd/display/dc/dc_plane.h |   1 -
 drivers/gpu/drm/amd/display/dc/dc_state.h |   1 -
 drivers/gpu/drm/amd/display/dc/dc_types.h |   6 +
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  |  84 
 .../dc/dml/dcn30/display_mode_vba_30.c|   9 -
 .../display/dc/dml/dml1_display_rq_dlg_calc.c |   3 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 187 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |  11 ++
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |   6 +-
 .../link/protocols/link_edp_panel_control.c   |  43 ++--
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |   8 +
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   | 157 ++-
 .../drm/amd/display/include/logger_types.h|   4 +-
 18 files changed, 521 insertions(+), 177 deletions(-)

-- 
2.34.1

[PATCH 09/13] drm/amd/display: Removed unused assignments and variables

From: Alex Hung 

[WHAT]
A number of values are assigned to variables but the stored values are
not used afterwards.

[HOW]
The assignments are removed. If the variables are not used, they are
removed as well.

This fixes 9 UNUSED_VALUE issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Alex Hung 
Signed-off-by: Fangzhi Zuo 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  3 --
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 48 ---
 2 files changed, 8 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 054608d4a0db..96a8b9b79267 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -12214,9 +12214,6 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
} else if (edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) {
i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
if (i >= 0 && vsdb_info.freesync_supported) {
-   timing  = &edid->detailed_timings[i];
-   data= &timing->data.other_data;
-
amdgpu_dm_connector->min_vfreq = 
vsdb_info.min_refresh_rate_hz;
amdgpu_dm_connector->max_vfreq = 
vsdb_info.max_refresh_rate_hz;
if (amdgpu_dm_connector->max_vfreq - 
amdgpu_dm_connector->min_vfreq > 10)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index db56b0aa5454..6a97bb2d9160 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -1529,7 +1529,6 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char 
__user *buf,
size_t size, loff_t *pos)
 {
char *rd_buf = NULL;
-   char *rd_buf_ptr = NULL;
struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
struct display_stream_compressor *dsc;
struct dcn_dsc_state dsc_state = {0};
@@ -1543,8 +1542,6 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char 
__user *buf,
if (!rd_buf)
return -ENOMEM;
 
-   rd_buf_ptr = rd_buf;
-
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = 
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
@@ -1558,10 +1555,9 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char 
__user *buf,
if (dsc)
dsc->funcs->dsc_read_state(dsc, &dsc_state);
 
-   snprintf(rd_buf_ptr, str_len,
+   snprintf(rd_buf, str_len,
"%d\n",
dsc_state.dsc_clock_en);
-   rd_buf_ptr += str_len;
 
while (size) {
if (*pos >= rd_buf_size)
@@ -1719,7 +1715,6 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, 
char __user *buf,
size_t size, loff_t *pos)
 {
char *rd_buf = NULL;
-   char *rd_buf_ptr = NULL;
struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
struct display_stream_compressor *dsc;
struct dcn_dsc_state dsc_state = {0};
@@ -1733,8 +1728,6 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, 
char __user *buf,
if (!rd_buf)
return -ENOMEM;
 
-   rd_buf_ptr = rd_buf;
-
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = 
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
@@ -1748,10 +1741,9 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, 
char __user *buf,
if (dsc)
dsc->funcs->dsc_read_state(dsc, &dsc_state);
 
-   snprintf(rd_buf_ptr, str_len,
+   snprintf(rd_buf, str_len,
"%d\n",
dsc_state.dsc_slice_width);
-   rd_buf_ptr += str_len;
 
while (size) {
if (*pos >= rd_buf_size)
@@ -1907,7 +1899,6 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, 
char __user *buf,
size_t size, loff_t *pos)
 {
char *rd_buf = NULL;
-   char *rd_buf_ptr = NULL;
struct amdgpu_dm_connector *aconnector = file_inode(f)->i_private;
struct display_stream_compressor *dsc;
struct dcn_dsc_state dsc_state = {0};
@@ -1921,8 +1912,6 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, 
char __user *buf,
if (!rd_buf)
return -ENOMEM;
 
-   rd_buf_ptr = rd_buf;
-
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = 
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx->stream &&
@@ -1936,10 +1925,9 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, 
char __user *buf,
if (dsc)

Re: [PATCH 0/5] drm: Introduce DRM client library

2024-09-27 Thread Felix Kuehling




On 2024-09-27 10:37, Thomas Zimmermann wrote:

With the next DRM client coming soon (drm_log) and most of DRM's
fbdev emulation consolidated in a few places, it's time to provide
a single place for the clients.

The new module drm_client_lib.ko stores most of the common client
code. It's designed such that drivers can opt into client support,
but the presence of the client module depends on the user's kernel
configuration. Without selected clients, no client module will be
build.

Thomas Zimmermann (5):
   drm/i915: Select DRM_CLIENT_SELECTION
   drm/xe: Select DRM_CLIENT_SELECTION


BTW, we are using drm_client in amdgpu, as well: 
https://elixir.bootlin.com/linux/v6.11/source/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c#L155


Regards,
  Felix



   drm: Move client-device functions in to drm_client_dev.c
   drm: Select fbdev helpers for modules that require them
   drm: Add client-lib module

  Documentation/gpu/drm-client.rst   |   3 +
  drivers/gpu/drm/Kconfig|  34 +--
  drivers/gpu/drm/Makefile   |  20 +++--
  drivers/gpu/drm/amd/amdgpu/Kconfig |   1 +
  drivers/gpu/drm/drm_client.c   | 122 +
  drivers/gpu/drm/drm_client_dev.c   | 138 +
  drivers/gpu/drm/drm_dumb_buffers.c |   2 +
  drivers/gpu/drm/drm_file.c |   2 +
  drivers/gpu/drm/drm_framebuffer.c  |   2 +
  drivers/gpu/drm/drm_gem.c  |   2 +
  drivers/gpu/drm/i915/Kconfig   |   1 +
  drivers/gpu/drm/xe/Kconfig |   1 +
  12 files changed, 196 insertions(+), 132 deletions(-)
  create mode 100644 drivers/gpu/drm/drm_client_dev.c

Re: [PATCH v7 00/10] drm/amd/display: Use drm_edid for more code

2024-09-27 Thread Alex Hung





On 9/27/24 14:45, Melissa Wen wrote:

Hi Alex,

Thanks for the intensive testing.

I'll need some time to reproduce and debug these regressions.

So, we can divide this series into four steps:
1-2 are the basis for drm_edid migration
3-4 are code cleanups
5-9 are drm_edid_product_id migration
10 is for ACPI EDID feature.

Bearing this and the reported regressions around the product_id part in 
mind, I wonder if we can start by applying the drm_edid migration and 
the ACPI EDID feature, which means applying patches 1-4 and 10. And then 
let the second part of product_id migration for the next iteration.

IMHO it seems a smoother transition.

WDYT?


This sounds like a good plan.

Not all tests were completed on 1-4 + 10 as the series were dropped due 
to the regressions. I can send the 5 patches for tests next week again; 
however, 10 cannot be applied cleanly on top of 1-4, and help from Mario 
to rebase is probably needed.


As for the rest, let me know if you cannot reproduce these issues since 
you may or may not have the same hardware configs.




Melissa


On 27/09/2024 15:48, Alex Hung wrote:

Hi Mario and Melissa,

There are three regressions identified during the test, and 
improvement is required before the patches can be merged. Please see 
details below.


1. null pointer when hot-plugging a dsc hub (+ three 4k60 monitors).

This may point to "drm/amd/display: use drm_edid_product_id for 
parsing EDID product info" since that's the only patch calling 
drm_edid_get_product_id.



[  227.797361] RIP: 0010:drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797388] Code: 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 44 
00 00 55 48 89 e5 48 85 ff 74 24 48 8b 47 08 48 85 c0 74 1b 48 83 3f 
7f 76 15 <48> 8b 50 08 5d 48 89 16 0f b7 40 10 66 89 46 08 e9 a9 47 ee 
ce 31

[  227.797391] RSP: 0018:ac58126f7930 EFLAGS: 00010216
[  227.797394] RAX: 372d RBX: 8eaeaf8ac808 RCX: 
8eaeaf8ac107
[  227.797396] RDX: 0002 RSI: ac58126f7944 RDI: 
8eaeeeaf9f80
[  227.797398] RBP: ac58126f7930 R08: 8eae8e500d00 R09: 
0001
[  227.797400] R10: ac58126f7978 R11: 0017f81b R12: 
8eae84cb
[  227.797402] R13: 8eaeeeaf9f80 R14:  R15: 
0100
[  227.797405] FS:  7f031a616ac0() GS:8eb57cd8() 
knlGS:

[  227.797407] CS:  0010 DS:  ES:  CR0: 80050033
[  227.797409] CR2: 3735 CR3: 00014decc000 CR4: 
00750ef0

[  227.797411] PKRU: 5554
[  227.797413] Call Trace:
[  227.797415]  
[  227.797417]  ? show_regs+0x64/0x70
[  227.797423]  ? __die+0x24/0x70
[  227.797427]  ? page_fault_oops+0x160/0x520
[  227.797435]  ? do_user_addr_fault+0x2e9/0x6a0
[  227.797438]  ? dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.797654]  ? dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.797882]  ? drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]

[  227.797894]  ? exc_page_fault+0x7f/0x190
[  227.797899]  ? asm_exc_page_fault+0x27/0x30
[  227.797906]  ? drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797932]  dm_helpers_parse_edid_caps+0x69/0x260 [amdgpu]
[  227.798139] amdgpu :0b:00.0: [drm:drm_dp_dpcd_write 
[drm_display_helper]] AMDGPU DM aux hw bus 2: 0x02003 AUX <- (ret=  1) 10

[  227.798158]  link_add_remote_sink+0xa8/0x1a0 [amdgpu]
[  227.798402]  dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.798615]  dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.798843]  ? srso_alias_return_thunk+0x5/0xfbef5
[  227.798848] drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]



2. DP2 Display is not listed as an audio device

Steps to reproduce:
- Attach display to system.
- Boot to Desktop (Wayland)
- Attempt to select display as an audio device.

This points to patch "drm/amd/display: get SAD from drm_eld when 
parsing EDID caps"



3. IGT amd_mem_leak'sconnector-suspend-resume fails on Navi 31.

This points to the patch "drm/amd/display: remove dc_edid handler from 
dm_helpers_parse_edid_caps".



Using IGT_SRANDOM=1727192429 for randomisation
Opened device: /dev/dri/card0
Starting subtest: connector-suspend-resume
[cmd] rtcwake: assuming RTC uses UTC ...
rtcwake: wakeup from "mem" using /dev/rtc0 at Tue Sep 24 15:40:50 2024
unreferenced object 0x95c683517b00 (size 256):
  comm "kworker/u64:30", pid 3636, jiffies 4295452761
  hex dump (first 32 bytes):
    00 ff ff ff ff ff ff 00 22 0e c2 36 00 00 00 00 "..6
    33 1d 01 04 b5 3c 22 78 3b 28 91 a7 55 4e a3 26 3<"x;(..UN.&
  backtrace (crc 5800a91d):
    [] kmemleak_alloc+0x4a/0x80
    [] kmalloc_node_track_caller_noprof+0x337/0x410
    [] krealloc_noprof+0x58/0xb0
    [] _drm_do_get_edid+0x138/0x410 [drm]
    [] drm_edid_read_custom+0x35/0xd0 [drm]
    [] drm_edid_read_ddc+0x44/0x80 [drm]
    [] dm_helpers_read_local_edid+0x1d8/0x340 [amdgpu]
    [] detect_link_and_local_sink+0x356/0x1230 [amdgpu]
    [] link_detect+0x36/0x4f0 [amdgpu]
    [] dc_link_det

Re: [PATCH v5 42/80] drm/tilcdc: Run DRM default client setup


On 24/09/2024 10:12, Thomas Zimmermann wrote:

Call drm_client_setup_with_color_mode() to run the kernel's default
client setup for DRM. Set fbdev_probe in struct drm_driver, so that
the client setup can start the common fbdev client.

v5:
- select DRM_CLIENT_SELECTION
v3:
- add DRM_FBDEV_DMA_DRIVER_OPS macro

Signed-off-by: Thomas Zimmermann 
Cc: Jyri Sarha 
Cc: Tomi Valkeinen 
Acked-by: Javier Martinez Canillas 
---
  drivers/gpu/drm/tilcdc/Kconfig  | 1 +
  drivers/gpu/drm/tilcdc/tilcdc_drv.c | 5 -
  2 files changed, 5 insertions(+), 1 deletion(-)


Reviewed-by: Tomi Valkeinen 

 Tomi


diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig
index d3bd2d7a181e..24f9a245ba59 100644
--- a/drivers/gpu/drm/tilcdc/Kconfig
+++ b/drivers/gpu/drm/tilcdc/Kconfig
@@ -2,6 +2,7 @@
  config DRM_TILCDC
tristate "DRM Support for TI LCDC Display Controller"
depends on DRM && OF && ARM
+   select DRM_CLIENT_SELECTION
select DRM_KMS_HELPER
select DRM_GEM_DMA_HELPER
select DRM_BRIDGE
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index cd5eefa06060..8c9f3705aa6c 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -14,6 +14,7 @@
  #include 
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -374,7 +375,8 @@ static int tilcdc_init(const struct drm_driver *ddrv, 
struct device *dev)
goto init_failed;
priv->is_registered = true;
  
-	drm_fbdev_dma_setup(ddev, bpp);

+   drm_client_setup_with_color_mode(ddev, bpp);
+
return 0;
  
  init_failed:

@@ -472,6 +474,7 @@ DEFINE_DRM_GEM_DMA_FOPS(fops);
  static const struct drm_driver tilcdc_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
DRM_GEM_DMA_DRIVER_OPS,
+   DRM_FBDEV_DMA_DRIVER_OPS,
  #ifdef CONFIG_DEBUG_FS
.debugfs_init   = tilcdc_debugfs_init,
  #endif

[PATCH -next] drm/amdkfd: Remove the redundant parameter comments in function get_wave_count

2024-09-27 Thread Jiapeng Chong

This commit updates described non-existent parameters 'wave_cnt' and
'vmid', and failed to describe the existing 'queue_cnt' parameter.

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:954: warning: Excess function 
parameter 'vmid' description in 'get_wave_count'.
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:954: warning: Excess function 
parameter 'wave_cnt' description in 'get_wave_count'.

Reported-by: Abaci Robot 
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=11144
Signed-off-by: Jiapeng Chong 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 3bc0cbf45bc5..247d927438e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -944,9 +944,7 @@ static void unlock_spi_csq_mutexes(struct amdgpu_device 
*adev)
  *
  * @adev: Handle of device whose registers are to be read
  * @queue_idx: Index of queue in the queue-map bit-field
- * @wave_cnt: Output parameter updated with number of waves in flight
- * @vmid: Output parameter updated with VMID of queue whose wave count
- *is being collected
+ * @queue_cnt: Output parameter updated with number of waves in flight
  * @inst: xcc's instance number on a multi-XCC setup
  */
 static void get_wave_count(struct amdgpu_device *adev, int queue_idx,
-- 
2.32.0.3.g01195cf9f

[PATCH v1 3/5] drm/amdgpu: update the handle ptr in sw_init

update the *handle to amdgpu_ip_block ptr for all
functions pointers of sw_init.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   | 4 ++--
 drivers/gpu/drm/amd/display/amd

Re: [PATCH v1 1/5] drm/amdgpu: update the handle ptr in early_init

2024-09-27 Thread Khatri, Sunil




On 9/27/2024 5:51 PM, Christian König wrote:

Am 27.09.24 um 11:57 schrieb Sunil Khatri:

update the handle ptr to amdgpu_ip_block ptr
for all functions pointers on early_init.

Signed-off-by: Sunil Khatri 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    | 6 --
  drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 5 +++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cz_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h    | 2 +-
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/navi10_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc15.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc21.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc24.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vega10_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdg

Re: AMD Radeon out of memory causes system instability.

Am 05.08.24 um 08:02 schrieb James Lawrence:
Apologies if I'm hitting the wrong mailing list. long time user, first
time reporter and all that.

Sorry for the delayed reply Without a maintainer in CC such requests
are usually overlooked on the mailing list.

recently my system has been suffering from instability with the
graphics system. essentially some application on my system is causing
oom for graphics memory.
normally I'd just expect a hard crash of the application in such a
scenario. instead the system enters a spin loop of command submissions,

slows down dramatically generally resulting in the system freezing up.

There are a couple issues I'd like to point out with the current
situation I'm experiencing:

* most importantly the error message doesn't provide any useful
information for tracing the source of the issue. no pid, or other
diagnostic information.
* its very noisy when trying to debug. I can occasionally drop my
system to a separate TTY and the message just spams the entire
screen. making it impossible to interact with my system even if I
wanted to load up debugging tools to analyze the situation.

given the error message I believe this line is the source of the log
statement.
|[drm:amdgpu_cs_ioctl [amdgpu]] *ERROR* Not enough memory for command
submission!|

https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c#L1431

Generally I'm wondering if there is anything that can be done to
improve the experience for end users in such a scenario.

Ideally the system would nuke the misbehaving process similar to how
ram ooms are handled.

If you see this message you should get the OOM killer running along with it.

If you don't see this then you probably run into a BUG or something like
that.

What kernel version are you using and what did you do to trigger that?

Regards,
Christian.

but at a minimum I'd like to be able to figure out how to back track
this to the misbehaving process. any help in this regard would be
appreciated.

Sent with Proton Mail secure email.

[PATCH 02/13] drm/amd/display: Fix system hang while resume with TBT monitor

From: Tom Chung 

[Why]
Connected with a Thunderbolt monitor and do the suspend and the system
may hang while resume.

The TBT monitor HPD will be triggered during the resume procedure
and call the drm_client_modeset_probe() while
struct drm_connector connector->dev->master is NULL.

It will mess up the pipe topology after resume.

[How]
Skip the TBT monitor HPD during the resume procedure because we
currently will probe the connectors after resume by default.

Reviewed-by: Wayne Lin 
Signed-off-by: Tom Chung 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0d32f9cbf8aa..054608d4a0db 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -770,6 +770,12 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,
return;
}
 
+   /* Skip DMUB HPD IRQ in suspend/resume. We will probe them later. */
+   if (notify->type == DMUB_NOTIFICATION_HPD && adev->in_suspend) {
+   DRM_INFO("Skip DMUB HPD IRQ callback in suspend/resume\n");
+   return;
+   }
+
link_index = notify->link_index;
link = adev->dm.dc->links[link_index];
dev = adev->dm.ddev;
-- 
2.34.1

[PATCH 01/13] drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS

From: Ryan Seto 

[Why]
If two monitors with TMDS signals were timing synced and one was
disconnected, the stream would go out of sync too early due to
the PLL turning off and the system could hang

[How]
On link disable output, change PHY FSM transition from TX_EN-to-PHY_OFF
to TX_EN-to-PLL_ON for TMDS

Reviewed-by: Wenjing Liu 
Signed-off-by: Ryan Seto 
Signed-off-by: Fangzhi Zuo 
---
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  | 81 ---
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 52 
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |  4 +
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |  2 +-
 4 files changed, 57 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c 
b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
index 0b889004509a..5babd53025ae 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
@@ -805,33 +805,6 @@ static void dccg401_enable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_inst
 {
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
-   switch (link_enc_inst) {
-   case 0:
-   REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
-   SYMCLKA_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKA_ROOT_GATE_DISABLE, 1);
-   break;
-   case 1:
-   REG_UPDATE(SYMCLKB_CLOCK_ENABLE,
-   SYMCLKB_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKB_ROOT_GATE_DISABLE, 1);
-   break;
-   case 2:
-   REG_UPDATE(SYMCLKC_CLOCK_ENABLE,
-   SYMCLKC_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKC_ROOT_GATE_DISABLE, 1);
-   break;
-   case 3:
-   REG_UPDATE(SYMCLKD_CLOCK_ENABLE,
-   SYMCLKD_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKD_ROOT_GATE_DISABLE, 1);
-   break;
-   }
-
switch (stream_enc_inst) {
case 0:
REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,
@@ -864,37 +837,8 @@ static void dccg401_enable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_inst
}
 }
 
-/*get other front end connected to this backend*/
-static uint8_t dccg401_get_number_enabled_symclk_fe_connected_to_be(struct 
dccg *dccg, uint32_t link_enc_inst)
-{
-   uint8_t num_enabled_symclk_fe = 0;
-   uint32_t fe_clk_en[4] = {0}, be_clk_sel[4] = {0};
-   struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
-   uint8_t i;
-
-   REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_EN, &fe_clk_en[0],
-   SYMCLKA_FE_SRC_SEL, &be_clk_sel[0]);
-
-   REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_EN, &fe_clk_en[1],
-   SYMCLKB_FE_SRC_SEL, &be_clk_sel[1]);
-
-   REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_EN, &fe_clk_en[2],
-   SYMCLKC_FE_SRC_SEL, &be_clk_sel[2]);
-
-   REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_EN, &fe_clk_en[3],
-   SYMCLKD_FE_SRC_SEL, &be_clk_sel[3]);
-
-   for (i = 0; i < ARRAY_SIZE(fe_clk_en); i++) {
-   if (fe_clk_en[i] && be_clk_sel[i] == link_enc_inst)
-   num_enabled_symclk_fe++;
-   }
-
-   return num_enabled_symclk_fe;
-}
-
 static void dccg401_disable_symclk_se(struct dccg *dccg, uint32_t 
stream_enc_inst, uint32_t link_enc_inst)
 {
-   uint8_t num_enabled_symclk_fe = 0;
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
switch (stream_enc_inst) {
@@ -919,31 +863,6 @@ static void dccg401_disable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_ins
SYMCLKD_FE_SRC_SEL, 0);
break;
}
-
-   /*check other enabled symclk fe connected to this be */
-   num_enabled_symclk_fe = 
dccg401_get_number_enabled_symclk_fe_connected_to_be(dccg, link_enc_inst);
-   /*only turn off backend clk if other front ends attached to this 
backend are all off,
-for mst, only turn off the backend if this is the last front end*/
-   if (num_enabled_symclk_fe == 0) {
-   switch (link_enc_inst) {
-   case 0:
-   REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
-   SYMCLKA_CLOCK_ENABLE, 0);
-   break;
-   case 1:
-   REG_UPDATE(SYMCLKB_CLOCK_ENABLE,
-   SYMCLKB_CLOCK_ENABLE, 0);
-

[PATCH 11/13] drm/amd/display: Configure DTBCLK_P with OPTC only for dcn401

From: Dillon Varone 

[WHY]
DTBCLK_P is used to generate virtual pixel clock, and to drive the HPO
stream encoder clock. Programming the required clock when
enabling/disabling both components can cause issues.
For example, if HPO is being disabled and clock source is changed to
REFCLK, virtual pixel rate will then be wrong, causing issues in CRTC.

[HOW]
Only program the DTBCLK_P when programming CRTC, as its expected it will
be enabled prior to HPO, and disabled after HPO in all valid cases.

Reviewed-by: Alvin Lee 
Signed-off-by: Dillon Varone 
Signed-off-by: Fangzhi Zuo 
---
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  |   3 -
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 135 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |   7 +
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |   4 +-
 4 files changed, 142 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c 
b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
index 5babd53025ae..d3e46c3cfa57 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
@@ -580,9 +580,6 @@ static void dccg401_set_dpstreamclk(
int otg_inst,
int dp_hpo_inst)
 {
-   /* set the dtbclk_p source */
-   dccg401_set_dtbclk_p_src(dccg, src, otg_inst);
-
/* enabled to select one of the DTBCLKs for pipe */
if (src == REFCLK)
dccg401_disable_dpstreamclk(dccg, dp_hpo_inst);
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index b690f0565d28..49a37f5ee28e 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -844,6 +844,13 @@ enum dc_status dcn401_enable_stream_timing(
odm_slice_width, last_odm_slice_width);
}
 
+   /* set DTBCLK_P */
+   if (dc->res_pool->dccg->funcs->set_dtbclk_p_src) {
+   if (dc_is_dp_signal(stream->signal) || 
dc_is_virtual_signal(stream->signal)) {
+   
dc->res_pool->dccg->funcs->set_dtbclk_p_src(dc->res_pool->dccg, DPREFCLK, 
pipe_ctx->stream_res.tg->inst);
+   }
+   }
+
/* HW program guide assume display already disable
 * by unplug sequence. OTG assume stop.
 */
@@ -1004,8 +1011,6 @@ void dcn401_enable_stream(struct pipe_ctx *pipe_ctx)
 
dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, 
phyd32clk);
} else {
-   /* need to set DTBCLK_P source to DPREFCLK for DP8B10B 
*/
-   dccg->funcs->set_dtbclk_p_src(dccg, DPREFCLK, tg->inst);
dccg->funcs->enable_symclk_se(dccg, 
stream_enc->stream_enc_inst,
link_enc->transmitter - 
TRANSMITTER_UNIPHY_A);
}
@@ -1819,3 +1824,129 @@ void dcn401_program_outstanding_updates(struct dc *dc,
if (hubbub->funcs->program_compbuf_segments)
hubbub->funcs->program_compbuf_segments(hubbub, 
context->bw_ctx.bw.dcn.arb_regs.compbuf_size, true);
 }
+
+void dcn401_reset_back_end_for_pipe(
+   struct dc *dc,
+   struct pipe_ctx *pipe_ctx,
+   struct dc_state *context)
+{
+   int i;
+   struct dc_link *link = pipe_ctx->stream->link;
+   const struct link_hwss *link_hwss = get_link_hwss(link, 
&pipe_ctx->link_res);
+
+   DC_LOGGER_INIT(dc->ctx->logger);
+   if (pipe_ctx->stream_res.stream_enc == NULL) {
+   pipe_ctx->stream = NULL;
+   return;
+   }
+
+   /* DPMS may already disable or */
+   /* dpms_off status is incorrect due to fastboot
+* feature. When system resume from S4 with second
+* screen only, the dpms_off would be true but
+* VBIOS lit up eDP, so check link status too.
+*/
+   if (!pipe_ctx->stream->dpms_off || link->link_status.link_active)
+   dc->link_srv->set_dpms_off(pipe_ctx);
+   else if (pipe_ctx->stream_res.audio)
+   dc->hwss.disable_audio_stream(pipe_ctx);
+
+   /* free acquired resources */
+   if (pipe_ctx->stream_res.audio) {
+   /*disable az_endpoint*/
+   
pipe_ctx->stream_res.audio->funcs->az_disable(pipe_ctx->stream_res.audio);
+
+   /*free audio*/
+   if (dc->caps.dynamic_audio == true) {
+   /*we have to dynamic arbitrate the audio endpoints*/
+   /*we free the resource, need reset is_audio_acquired*/
+   update_audio_usage(&dc->current_state->res_ctx, 
dc->res_pool,
+   pipe_ctx->stream_res.audio, false);
+   pipe_ctx->stream_res.audio = NULL;
+   }
+   }
+
+   /* by upper caller loop, p

[PATCH 08/13] drm/amd/display: Eliminate recursive header inclusion

From: Alex Hung 

[WHAT & HOW]
This removes recursive inclusion like dc.h -> dc_state.h -> dc.h and
dc.h -> dc_plane.h -> dc.h

This fixes 4 PW.INCLUDE_RECURSION issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira 
Signed-off-by: Alex Hung 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/dc/dc_plane.h | 1 -
 drivers/gpu/drm/amd/display/dc/dc_state.h | 1 -
 2 files changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_plane.h 
b/drivers/gpu/drm/amd/display/dc/dc_plane.h
index 44afcd989224..bd37ec82b42d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_plane.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_plane.h
@@ -26,7 +26,6 @@
 #ifndef _DC_PLANE_H_
 #define _DC_PLANE_H_
 
-#include "dc.h"
 #include "dc_hw_types.h"
 
 struct dc_plane_state *dc_create_plane_state(const struct dc *dc);
diff --git a/drivers/gpu/drm/amd/display/dc/dc_state.h 
b/drivers/gpu/drm/amd/display/dc/dc_state.h
index caa45db50232..db1e63a7d460 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_state.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_state.h
@@ -26,7 +26,6 @@
 #ifndef _DC_STATE_H_
 #define _DC_STATE_H_
 
-#include "dc.h"
 #include "inc/core_status.h"
 
 struct dc_state *dc_state_create(struct dc *dc, struct dc_state_create_params 
*params);
-- 
2.34.1

Re: [PATCH v7 00/10] drm/amd/display: Use drm_edid for more code

2024-09-27 Thread Melissa Wen


Hi Alex,

Thanks for the intensive testing.

I'll need some time to reproduce and debug these regressions.

So, we can divide this series into four steps:
1-2 are the basis for drm_edid migration
3-4 are code cleanups
5-9 are drm_edid_product_id migration
10 is for ACPI EDID feature.

Bearing this and the reported regressions around the product_id part in 
mind, I wonder if we can start by applying the drm_edid migration and 
the ACPI EDID feature, which means applying patches 1-4 and 10. And then 
let the second part of product_id migration for the next iteration.

IMHO it seems a smoother transition.

WDYT?

Melissa


On 27/09/2024 15:48, Alex Hung wrote:

Hi Mario and Melissa,

There are three regressions identified during the test, and 
improvement is required before the patches can be merged. Please see 
details below.


1. null pointer when hot-plugging a dsc hub (+ three 4k60 monitors).

This may point to "drm/amd/display: use drm_edid_product_id for 
parsing EDID product info" since that's the only patch calling 
drm_edid_get_product_id.



[  227.797361] RIP: 0010:drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797388] Code: 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 44 
00 00 55 48 89 e5 48 85 ff 74 24 48 8b 47 08 48 85 c0 74 1b 48 83 3f 
7f 76 15 <48> 8b 50 08 5d 48 89 16 0f b7 40 10 66 89 46 08 e9 a9 47 ee 
ce 31

[  227.797391] RSP: 0018:ac58126f7930 EFLAGS: 00010216
[  227.797394] RAX: 372d RBX: 8eaeaf8ac808 RCX: 
8eaeaf8ac107
[  227.797396] RDX: 0002 RSI: ac58126f7944 RDI: 
8eaeeeaf9f80
[  227.797398] RBP: ac58126f7930 R08: 8eae8e500d00 R09: 
0001
[  227.797400] R10: ac58126f7978 R11: 0017f81b R12: 
8eae84cb
[  227.797402] R13: 8eaeeeaf9f80 R14:  R15: 
0100
[  227.797405] FS:  7f031a616ac0() GS:8eb57cd8() 
knlGS:

[  227.797407] CS:  0010 DS:  ES:  CR0: 80050033
[  227.797409] CR2: 3735 CR3: 00014decc000 CR4: 
00750ef0

[  227.797411] PKRU: 5554
[  227.797413] Call Trace:
[  227.797415]  
[  227.797417]  ? show_regs+0x64/0x70
[  227.797423]  ? __die+0x24/0x70
[  227.797427]  ? page_fault_oops+0x160/0x520
[  227.797435]  ? do_user_addr_fault+0x2e9/0x6a0
[  227.797438]  ? dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.797654]  ? dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.797882]  ? drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]

[  227.797894]  ? exc_page_fault+0x7f/0x190
[  227.797899]  ? asm_exc_page_fault+0x27/0x30
[  227.797906]  ? drm_edid_get_product_id+0x1d/0x50 [drm]
[  227.797932]  dm_helpers_parse_edid_caps+0x69/0x260 [amdgpu]
[  227.798139] amdgpu :0b:00.0: [drm:drm_dp_dpcd_write 
[drm_display_helper]] AMDGPU DM aux hw bus 2: 0x02003 AUX <- (ret=  1) 10

[  227.798158]  link_add_remote_sink+0xa8/0x1a0 [amdgpu]
[  227.798402]  dc_link_add_remote_sink+0x20/0x30 [amdgpu]
[  227.798615]  dm_dp_mst_get_modes+0xee/0x520 [amdgpu]
[  227.798843]  ? srso_alias_return_thunk+0x5/0xfbef5
[  227.798848] drm_helper_probe_single_connector_modes+0x1b5/0x670 
[drm_kms_helper]



2. DP2 Display is not listed as an audio device

Steps to reproduce:
- Attach display to system.
- Boot to Desktop (Wayland)
- Attempt to select display as an audio device.

This points to patch "drm/amd/display: get SAD from drm_eld when 
parsing EDID caps"



3. IGT amd_mem_leak'sconnector-suspend-resume fails on Navi 31.

This points to the patch "drm/amd/display: remove dc_edid handler from 
dm_helpers_parse_edid_caps".



Using IGT_SRANDOM=1727192429 for randomisation
Opened device: /dev/dri/card0
Starting subtest: connector-suspend-resume
[cmd] rtcwake: assuming RTC uses UTC ...
rtcwake: wakeup from "mem" using /dev/rtc0 at Tue Sep 24 15:40:50 2024
unreferenced object 0x95c683517b00 (size 256):
  comm "kworker/u64:30", pid 3636, jiffies 4295452761
  hex dump (first 32 bytes):
    00 ff ff ff ff ff ff 00 22 0e c2 36 00 00 00 00 "..6
    33 1d 01 04 b5 3c 22 78 3b 28 91 a7 55 4e a3 26 3<"x;(..UN.&
  backtrace (crc 5800a91d):
    [] kmemleak_alloc+0x4a/0x80
    [] kmalloc_node_track_caller_noprof+0x337/0x410
    [] krealloc_noprof+0x58/0xb0
    [] _drm_do_get_edid+0x138/0x410 [drm]
    [] drm_edid_read_custom+0x35/0xd0 [drm]
    [] drm_edid_read_ddc+0x44/0x80 [drm]
    [] dm_helpers_read_local_edid+0x1d8/0x340 [amdgpu]
    [] detect_link_and_local_sink+0x356/0x1230 [amdgpu]
    [] link_detect+0x36/0x4f0 [amdgpu]
    [] dc_link_detect+0x20/0x30 [amdgpu]
    [] dm_resume+0x1e0/0x7d0 [amdgpu]
    [] amdgpu_device_ip_resume_phase2+0x58/0xd0 
[amdgpu]

    [] amdgpu_device_resume+0xa7/0x2e0 [amdgpu]
    [] amdgpu_pmops_resume+0x4c/0x90 [amdgpu]
    [] pci_pm_resume+0x71/0x100
    [] dpm_run_callback+0x91/0x1e0
unreferenced object 0x95c6c58dd0c0 (size 16):
  comm "kworker/u64:30", pid 3636, jiffies 4295452764
  hex dump (first 16 bytes):
    00 01 00 00 00 00 00 00 00 7b 51 83

RE: [PATCH 1/2] drm/amd/display: increase max surfaces in line with planes and streams

2024-09-27 Thread Mohamed, Zaeem

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Melissa,

MAX_SURFACE_NUM and MAX_PLANES both represent the upper bound of planes that 
are supported by HW. It is best to replace MAX_SURFACE_NUM with MAX_PLANES to 
remove redundancy. MAX_SURFACES is used to represent the upper bound of 
surfaces that can be piped to a single CRTC. Keep MAX_SURFACES as is to keep 
stack size down, and replace MAX_SURFACE_NUM with MAX_PLANES.

Thanks,
Zaeem


-Original Message-
From: dri-devel  On Behalf Of Melissa 
Wen
Sent: Wednesday, September 25, 2024 11:37 AM
To: harry.wentl...@amd.com; sunpeng...@amd.com; rodrigo.sique...@amd.com; 
alexander.deuc...@amd.com; christian.koe...@amd.com; xinhui@amd.com; 
airl...@gmail.com; dan...@ffwll.ch
Cc: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 1/2] drm/amd/display: increase max surfaces in line with planes 
and streams

091a97e542cf ("drm/amd/display: Fix warning. Set MAX_SURFACES to 3") reduced 
the max number of surfaces since, at that time, there was no use for more. 
However, HW and driver evolves and there are now driver versions that allow two 
overlay planes (max_slave_planes). Moreover, commit 3cfd03b79425 
("drm/amd/display: update max streams per surface") states 6 is the max 
surfaces supported asics can have. Therefore, update MAX_SURFACES to match 
MAX_SURFACE_NUM, MAX_PLANES and MAX_STREAMS.

It also addresses array-index-out-of-bounds reported in the link.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3594
Signed-off-by: Melissa Wen 
---
 drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 3992ad73165b..08b00b263533 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -57,7 +57,7 @@ struct dmub_notification;

 #define DC_VER "3.2.301"

-#define MAX_SURFACES 3
+#define MAX_SURFACES 6
 #define MAX_PLANES 6
 #define MAX_STREAMS 6
 #define MIN_VIEWPORT_SIZE 12
--
2.45.2

Re: [PATCH 1/2] drm/amd/display: increase max surfaces in line with planes and streams

2024-09-27 Thread Melissa Wen


Hi Zaeem,

Thanks for explaining their relationship.

So IIUC, current DM implementation for dc_surface_updates array is 
wrong, since it's taking MAX_SURFACES (=3) for allocation but MAX_PLANES 
(=6) as the upper bound of size of the dc_surface_updates array, as you 
can see in this allocation and after an iteration from 0 to `plane_count`:


https://github.com/torvalds/linux/blob/master/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c#L9861

Another question to understand what would be the right fix for the 
implementation above-mentioned: with the cursor overlay mode, it means 
we are using one of the overlay planes for this cursor overlay mode (one 
from the "max_slave_planes") or this cursor plane is an extra plane, 
which means, for some drivers, one primary plane + two overlay planes + 
one plane for cursor overlay mode (max 4 planes) ?


BR,

Melissa

On 27/09/2024 14:40, Mohamed, Zaeem wrote:

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Melissa,

MAX_SURFACE_NUM and MAX_PLANES both represent the upper bound of planes that 
are supported by HW. It is best to replace MAX_SURFACE_NUM with MAX_PLANES to 
remove redundancy. MAX_SURFACES is used to represent the upper bound of 
surfaces that can be piped to a single CRTC. Keep MAX_SURFACES as is to keep 
stack size down, and replace MAX_SURFACE_NUM with MAX_PLANES.

Thanks,
Zaeem


-Original Message-
From: dri-devel  On Behalf Of Melissa 
Wen
Sent: Wednesday, September 25, 2024 11:37 AM
To: harry.wentl...@amd.com; sunpeng...@amd.com; rodrigo.sique...@amd.com; 
alexander.deuc...@amd.com; christian.koe...@amd.com; xinhui@amd.com; 
airl...@gmail.com; dan...@ffwll.ch
Cc: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 1/2] drm/amd/display: increase max surfaces in line with planes 
and streams

091a97e542cf ("drm/amd/display: Fix warning. Set MAX_SURFACES to 3") reduced the max 
number of surfaces since, at that time, there was no use for more. However, HW and driver evolves 
and there are now driver versions that allow two overlay planes (max_slave_planes). Moreover, 
commit 3cfd03b79425 ("drm/amd/display: update max streams per surface") states 6 is the 
max surfaces supported asics can have. Therefore, update MAX_SURFACES to match MAX_SURFACE_NUM, 
MAX_PLANES and MAX_STREAMS.

It also addresses array-index-out-of-bounds reported in the link.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3594
Signed-off-by: Melissa Wen 
---
  drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 3992ad73165b..08b00b263533 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -57,7 +57,7 @@ struct dmub_notification;

  #define DC_VER "3.2.301"

-#define MAX_SURFACES 3
+#define MAX_SURFACES 6
  #define MAX_PLANES 6
  #define MAX_STREAMS 6
  #define MIN_VIEWPORT_SIZE 12
--
2.45.2

Re: [PATCH] drm/amdkfd: Fix an eviction fence leak

2024-09-27 Thread Felix Kuehling




On 2024-09-27 06:36, Lang Yu wrote:

dma_fence_get/put() should be called balanced in
init_kfd_vm() and amdgpu_amdkfd_gpuvm_destroy_cb().


I don't think that's correct. The reference taken in init_kfd_vm is 
returned to the caller of amdgpu_amdkfd_gpuvm_acquire_process_vm, which 
gets stored in the kfd_process structure. I think it's that caller's 
responsibility to drop their reference. I think the real problem is, 
that we're creating a new reference for each VM, but the kfd_process 
structure is only one per process. So the RCU_INIT_POINTER(p->ef, ef); 
in kfd_process_device_init_vm leaks the previous references.


Since we only need to get the eviction fence reference when creating the 
first VM, I suggest this fix in kfd_process_device_init_vm:


 ret = amdgpu_amdkfd_gpuvm_acquire_process_vm(dev->adev, avm,
  &p->kgd_process_info,
- &ef);
+ p->ef ? NULL : &ef);

And in init_kfd_vm:

 if (ef)
-*ef = dma_fence_get(&vm->process_info->eviction_fence->base);
+*ef = dma_fence_get(&vm->process_info->eviction_fence->base);

Regards,
  Felix




Fixes: 9a1c1339abf9 ("drm/amdkfd: Run restore_workers on freezable WQs")

Signed-off-by: Lang Yu 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index ce5ca304dba9..c3a4f8d297f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1586,6 +1586,7 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device 
*adev,
  
  	/* Update process info */

mutex_lock(&process_info->lock);
+   dma_fence_put(&process_info->eviction_fence->base);
process_info->n_vms--;
list_del(&vm->vm_list_node);
mutex_unlock(&process_info->lock);
@@ -1598,7 +1599,6 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device 
*adev,
WARN_ON(!list_empty(&process_info->userptr_valid_list));
WARN_ON(!list_empty(&process_info->userptr_inval_list));
  
-		dma_fence_put(&process_info->eviction_fence->base);

cancel_delayed_work_sync(&process_info->restore_userptr_work);
put_pid(process_info->pid);
mutex_destroy(&process_info->lock);

[pull] amdgpu, amdkfd drm-fixes-6.12

2024-09-27 Thread Alex Deucher

Hi Dave, Simona,

Fixes for 6.12.

The following changes since commit 84f76408abe989809de19d02e476b044fd985adc:

  drm/amdgpu/mes12: reduce timeout (2024-09-18 16:15:13 -0400)

are available in the Git repository at:

  https://gitlab.freedesktop.org/agd5f/linux.git 
tags/amd-drm-fixes-6.12-2024-09-27

for you to fetch changes up to d7d2688bf4ea58734d73e18edcbf4684b1496d30:

  drm/amd/pm: update workload mask after the setting (2024-09-26 17:05:10 -0400)


amd-drm-fixes-6.12-2024-09-27:

amdgpu:
- MES 12 fix
- KFD fence sync fix
- SR-IOV fixes
- VCN 4.0.6 fix
- SDMA 7.x fix
- Bump driver version to note cleared VRAM support
- SWSMU fix

amdgpu:
- CU occupancy logic fix
- SDMA queue fix


Alex Deucher (2):
  drm/amdgpu: fix vbios fetching for SR-IOV
  drm/amdgpu: bump driver version for cleared VRAM

Christian König (1):
  drm/amdgpu: sync to KFD fences before clearing PTEs

Frank Min (1):
  drm/amdgpu: fix PTE copy corruption for sdma 7

Jack Xiao (1):
  drm/amdgpu/mes12: set enable_level_process_quantum_check

Kenneth Feng (1):
  drm/amd/pm: update workload mask after the setting

Mukul Joshi (2):
  drm/amdkfd: Update logic for CU occupancy calculations
  drm/amdkfd: Fix CU occupancy for GFX 9.4.3

Saleemkhan Jamadar (1):
  drm/amdgpu/vcn: enable AV1 on both instances

Sreekant Somasekharan (1):
  drm/amdkfd: Add SDMA queue quantum support for GFX12

ZhenGuo Yin (1):
  drm/amdgpu: skip coredump after job timeout in SRIOV

 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c  | 108 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h  |   5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c   |  11 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c|   5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c   |  30 
 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h   |   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |   6 +
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c |   1 +
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c |   7 +-
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c| 165 -
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  24 +++
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h  |   3 +
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c   |   4 +
 drivers/gpu/drm/amd/amdkfd/kfd_process.c   |  30 +++-
 drivers/gpu/drm/amd/include/kgd_kfd_interface.h|  10 +-
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c   |   6 +-
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c   |   3 +
 .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c   |   6 +-
 19 files changed, 186 insertions(+), 242 deletions(-)

Re: [PATCH v3] docs/gpu: ci: update flake tests requirements

2024-09-27 Thread Maxime Ripard

On Fri, 27 Sep 2024 10:54:14 +0530, Vignesh Raman wrote:
> Update the documentation to specify linking to a relevant GitLab
> issue or email report for each new flake entry. Added specific
> GitLab issue urls for i915, msm and amdgpu driver.
> 
> Acked-by: Abhinav Kumar  # msm
> 
> [ ... ]

Acked-by: Maxime Ripard 

Thanks!
Maxime

RE: [PATCH v1 0/9] drm/amd/pm runtime pm changes

2024-09-27 Thread Feng, Kenneth

[AMD Official Use Only - AMD Internal Distribution Only]

Series is Reviewed-by: Kenneth Feng 


-Original Message-
From: Pelloux-Prayer, Pierre-Eric 
Sent: Wednesday, September 25, 2024 3:54 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander 
; Feng, Kenneth ; Limonciello, 
Mario 
Cc: Pelloux-Prayer, Pierre-Eric 
Subject: [PATCH v1 0/9] drm/amd/pm runtime pm changes

This series rework how runtime power management is handled in drm/amd/pm.

The main ideas are:
* simplify code and reduce copy-pate of runtimepm calls
* avoid waking up suspended GPU when reading debugfs files.

It is similar to Mario's earlier series:
   https://lists.freedesktop.org/archives/amd-gfx/2024-August/113213.html
It's not a direct successor of it, hence v1.
Instead, this is part of a larger series that applies the same ideas to the 
whole amdgpu module.


Pierre-Eric Pelloux-Prayer (9):
  drm/amd/pm: remove dump_pptable functions
  drm/amd/pm: fix rpm refcount handling on error
  drm/amd/pm: use pm_runtime_resume_and_get
  drm/amd/pm: don't update runpm last_usage on debugfs getter
  drm/amd/pm: use pm_runtime_get_if_active for debugfs getters
  drm/amd/pm: stop extra checks for runtime pm state
  drm/amd/pm: add sysfs attribute access wrappers
  drm/amd/pm: move private definitions to the .c file
  drm/amd/pm: use pm_runtime_get_if_active in amdgpu_debugfs_sensor_read

 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c   |9 +-
 drivers/gpu/drm/amd/pm/amdgpu_pm.c|  734 +++---
 drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h|   96 --
 .../powerplay/hwmgr/vega20_processpptables.c  |  574 
 drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h |5 -
 .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c |  433 --
 .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c   | 1269 -
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  |   14 -
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  |   14 -
 .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c  |   14 -
 drivers/gpu/drm/amd/pm/swsmu/smu_internal.h   |1 -
 11 files changed, 208 insertions(+), 2955 deletions(-)

--
2.40.1

[PATCH] drm/amdkfd: Fix an eviction fence leak

2024-09-27 Thread Lang Yu

dma_fence_get/put() should be called balanced in
init_kfd_vm() and amdgpu_amdkfd_gpuvm_destroy_cb().

Fixes: 9a1c1339abf9 ("drm/amdkfd: Run restore_workers on freezable WQs")

Signed-off-by: Lang Yu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index ce5ca304dba9..c3a4f8d297f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1586,6 +1586,7 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device 
*adev,
 
/* Update process info */
mutex_lock(&process_info->lock);
+   dma_fence_put(&process_info->eviction_fence->base);
process_info->n_vms--;
list_del(&vm->vm_list_node);
mutex_unlock(&process_info->lock);
@@ -1598,7 +1599,6 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device 
*adev,
WARN_ON(!list_empty(&process_info->userptr_valid_list));
WARN_ON(!list_empty(&process_info->userptr_inval_list));
 
-   dma_fence_put(&process_info->eviction_fence->base);
cancel_delayed_work_sync(&process_info->restore_userptr_work);
put_pid(process_info->pid);
mutex_destroy(&process_info->lock);
-- 
2.25.1

[PATCH 01/13] drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS

From: Ryan Seto 

[Why]
If two monitors with TMDS signals were timing synced and one was
disconnected, the stream would go out of sync too early due to
the PLL turning off and the system could hang

[How]
On link disable output, change PHY FSM transition from TX_EN-to-PHY_OFF
to TX_EN-to-PLL_ON for TMDS

Reviewed-by: Wenjing Liu 
Signed-off-by: Ryan Seto 
Signed-off-by: Fangzhi Zuo 
---
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  | 81 ---
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 52 
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |  4 +
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |  2 +-
 4 files changed, 57 insertions(+), 82 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c 
b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
index 0b889004509a..5babd53025ae 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
@@ -805,33 +805,6 @@ static void dccg401_enable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_inst
 {
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
-   switch (link_enc_inst) {
-   case 0:
-   REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
-   SYMCLKA_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKA_ROOT_GATE_DISABLE, 1);
-   break;
-   case 1:
-   REG_UPDATE(SYMCLKB_CLOCK_ENABLE,
-   SYMCLKB_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKB_ROOT_GATE_DISABLE, 1);
-   break;
-   case 2:
-   REG_UPDATE(SYMCLKC_CLOCK_ENABLE,
-   SYMCLKC_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKC_ROOT_GATE_DISABLE, 1);
-   break;
-   case 3:
-   REG_UPDATE(SYMCLKD_CLOCK_ENABLE,
-   SYMCLKD_CLOCK_ENABLE, 1);
-   if 
(dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
-   REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, 
SYMCLKD_ROOT_GATE_DISABLE, 1);
-   break;
-   }
-
switch (stream_enc_inst) {
case 0:
REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,
@@ -864,37 +837,8 @@ static void dccg401_enable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_inst
}
 }
 
-/*get other front end connected to this backend*/
-static uint8_t dccg401_get_number_enabled_symclk_fe_connected_to_be(struct 
dccg *dccg, uint32_t link_enc_inst)
-{
-   uint8_t num_enabled_symclk_fe = 0;
-   uint32_t fe_clk_en[4] = {0}, be_clk_sel[4] = {0};
-   struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
-   uint8_t i;
-
-   REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_EN, &fe_clk_en[0],
-   SYMCLKA_FE_SRC_SEL, &be_clk_sel[0]);
-
-   REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_EN, &fe_clk_en[1],
-   SYMCLKB_FE_SRC_SEL, &be_clk_sel[1]);
-
-   REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_EN, &fe_clk_en[2],
-   SYMCLKC_FE_SRC_SEL, &be_clk_sel[2]);
-
-   REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_EN, &fe_clk_en[3],
-   SYMCLKD_FE_SRC_SEL, &be_clk_sel[3]);
-
-   for (i = 0; i < ARRAY_SIZE(fe_clk_en); i++) {
-   if (fe_clk_en[i] && be_clk_sel[i] == link_enc_inst)
-   num_enabled_symclk_fe++;
-   }
-
-   return num_enabled_symclk_fe;
-}
-
 static void dccg401_disable_symclk_se(struct dccg *dccg, uint32_t 
stream_enc_inst, uint32_t link_enc_inst)
 {
-   uint8_t num_enabled_symclk_fe = 0;
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
 
switch (stream_enc_inst) {
@@ -919,31 +863,6 @@ static void dccg401_disable_symclk_se(struct dccg *dccg, 
uint32_t stream_enc_ins
SYMCLKD_FE_SRC_SEL, 0);
break;
}
-
-   /*check other enabled symclk fe connected to this be */
-   num_enabled_symclk_fe = 
dccg401_get_number_enabled_symclk_fe_connected_to_be(dccg, link_enc_inst);
-   /*only turn off backend clk if other front ends attached to this 
backend are all off,
-for mst, only turn off the backend if this is the last front end*/
-   if (num_enabled_symclk_fe == 0) {
-   switch (link_enc_inst) {
-   case 0:
-   REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
-   SYMCLKA_CLOCK_ENABLE, 0);
-   break;
-   case 1:
-   REG_UPDATE(SYMCLKB_CLOCK_ENABLE,
-   SYMCLKB_CLOCK_ENABLE, 0);
-

[PATCH v4 0/6] DRM_SET_CLIENT_NAME ioctl

v4 changelog:
* DRM_SET_NAME -> DRM_SET_CLIENT_NAME (Dmitry)
* reject names that would mess up with formatting (Sima),
  and use a stricter filter (isgraph allowed extended ASCII
  which weren't looking great)
* documentation edits, minor fixups (Dmitry, Trvtko)
* clarified commit message of commit 3/6 (Trvtko)
* reworked amdgpu_vm_set_task_info a bit in 4/6 (Trvtko)

v3: https://lists.freedesktop.org/archives/dri-devel/2024-September/470488.html

Pierre-Eric Pelloux-Prayer (6):
  drm: add DRM_SET_CLIENT_NAME ioctl
  drm: use drm_file client_name in fdinfo
  drm/amdgpu: delay the use of amdgpu_vm_set_task_info
  drm/amdgpu: alloc and init vm::task_info from first submit
  drm/amdgpu: make process_name a flexible array
  drm/amdgpu: use drm_file::name in task_info::process_desc

 Documentation/gpu/drm-usage-stats.rst |  5 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h|  1 +
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c   |  2 +-
 .../gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c  |  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 62 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h|  4 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  |  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_events.c   |  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_process.c  |  3 +
 drivers/gpu/drm/drm_debugfs.c | 14 +++--
 drivers/gpu/drm/drm_file.c| 10 +++
 drivers/gpu/drm/drm_ioctl.c   | 55 
 include/drm/drm_file.h|  9 +++
 include/uapi/drm/drm.h| 17 +
 23 files changed, 171 insertions(+), 42 deletions(-)

-- 
2.40.1

[PATCH v4 6/6] drm/amdgpu: use drm_file::name in task_info::process_desc

If a drm_file name is set append it to the process name.

This information is useful with the virtio/native-context driver: this
allows the guest applications identifier to visible in amdgpu's output.

The output in amdgpu_vm_info/amdgpu_gem_info looks like this:
   pid:12255Process:glxgears/test-set-fd-name --

Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h|  1 +
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  |  3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c| 26 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h|  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_process.c  |  3 +++
 6 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index f9d119448442..ad909173e419 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
@@ -299,6 +299,7 @@ int amdgpu_amdkfd_gpuvm_set_vm_pasid(struct amdgpu_device 
*adev,
 struct amdgpu_vm *avm, u32 pasid);
 int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
struct amdgpu_vm *avm,
+   struct drm_file *filp,
void **process_info,
struct dma_fence **ef);
 void amdgpu_amdkfd_gpuvm_release_process_vm(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 6d5fd371d5ce..172882af6705 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1558,6 +1558,7 @@ int amdgpu_amdkfd_gpuvm_set_vm_pasid(struct amdgpu_device 
*adev,
 
 int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct amdgpu_device *adev,
   struct amdgpu_vm *avm,
+  struct drm_file *filp,
   void **process_info,
   struct dma_fence **ef)
 {
@@ -1577,7 +1578,7 @@ int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct 
amdgpu_device *adev,
if (ret)
return ret;
 
-   amdgpu_vm_set_task_info(avm);
+   amdgpu_vm_set_task_info(avm, filp);
 
return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 891128ecee6d..5d43e24906d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1178,7 +1178,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser 
*p)
}
 
/* Use this opportunity to fill in task info for the vm */
-   amdgpu_vm_set_task_info(vm);
+   amdgpu_vm_set_task_info(vm, p->filp);
 
if (adev->debug_vm) {
/* Invalidate all BOs to test for userspace bugs */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index cec0a5cffcc8..f6e2be6d4e9e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2355,25 +2355,40 @@ amdgpu_vm_get_task_info_pasid(struct amdgpu_device 
*adev, u32 pasid)
amdgpu_vm_get_vm_from_pasid(adev, pasid));
 }
 
-static int amdgpu_vm_create_task_info(struct amdgpu_vm *vm)
+static int amdgpu_vm_create_task_info(struct amdgpu_vm *vm, struct drm_file 
*filp)
 {
char process_name[TASK_COMM_LEN];
-   int desc_len;
+   size_t desc_len;
 
get_task_comm(process_name, current->group_leader);
desc_len = strlen(process_name);
 
+   mutex_lock(&filp->client_name_lock);
+   if (filp->client_name)
+   desc_len += 1 + strlen(filp->client_name);
+
vm->task_info = kzalloc(
struct_size(vm->task_info, process_desc, desc_len + 1),
GFP_KERNEL);
 
-   if (!vm->task_info)
+   if (!vm->task_info) {
+   mutex_unlock(&filp->client_name_lock);
return -ENOMEM;
+   }
 
/* Set process attributes now. */
vm->task_info->tgid = current->group_leader->pid;
strscpy(vm->task_info->process_desc, process_name, desc_len + 1);
 
+   if (filp->client_name) {
+   size_t p_len = strlen(process_name);
+
+   vm->task_info->process_desc[p_len] = '/';
+   strscpy(&vm->task_info->process_desc[p_len + 1],
+   filp->client_name, (desc_len + 1) - (p_len + 1));
+   }
+   mutex_unlock(&filp->client_name_lock);
+
kref_init(&vm->task_info->refcount);
return 0;
 }
@@ -2382,11 +2397,12 @@ static int amdgpu_vm_create_task_info(struct amdgpu_vm 
*vm)
  * amdgpu_vm_set_task_info - Sets VMs task info.
  *
  * @vm: vm for which to set the info

[PATCH v4 5/6] drm/amdgpu: make process_name a flexible array

And rename it process_desc, since it will soon contain more than
just the process_name.

Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c   | 13 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h   |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c |  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_events.c  |  2 +-
 13 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index cbef720de779..c2185e43e38d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -1786,7 +1786,7 @@ static int amdgpu_debugfs_vm_info_show(struct seq_file 
*m, void *unused)
 
ti = amdgpu_vm_get_task_info_vm(vm);
if (ti) {
-   seq_printf(m, "pid:%d\tProcess:%s --\n", 
ti->pid, ti->process_name);
+   seq_printf(m, "pid:%d\tProcess:%s --\n", 
ti->pid, ti->process_desc);
amdgpu_vm_put_task_info(ti);
}
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
index 5ac59b62020c..4ca0a372984b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
@@ -220,8 +220,8 @@ amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t 
count,
   coredump->reset_time.tv_nsec);
 
if (coredump->reset_task_info.pid)
-   drm_printf(&p, "process_name: %s PID: %d\n",
-  coredump->reset_task_info.process_name,
+   drm_printf(&p, "process: %s PID: %d\n",
+  coredump->reset_task_info.process_desc,
   coredump->reset_task_info.pid);
 
/* SOC Information */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index ad6bf5d4e0a9..d1678eebbff3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -125,7 +125,7 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct 
drm_sched_job *s_job)
if (ti) {
dev_err(adev->dev,
"Process information: process %s pid %d thread %s pid 
%d\n",
-   ti->process_name, ti->tgid, ti->task_name, ti->pid);
+   ti->process_desc, ti->tgid, ti->task_name, ti->pid);
amdgpu_vm_put_task_info(ti);
}
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6cd5bd5362d4..cec0a5cffcc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2357,13 +2357,22 @@ amdgpu_vm_get_task_info_pasid(struct amdgpu_device 
*adev, u32 pasid)
 
 static int amdgpu_vm_create_task_info(struct amdgpu_vm *vm)
 {
-   vm->task_info = kzalloc(sizeof(struct amdgpu_task_info), GFP_KERNEL);
+   char process_name[TASK_COMM_LEN];
+   int desc_len;
+
+   get_task_comm(process_name, current->group_leader);
+   desc_len = strlen(process_name);
+
+   vm->task_info = kzalloc(
+   struct_size(vm->task_info, process_desc, desc_len + 1),
+   GFP_KERNEL);
+
if (!vm->task_info)
return -ENOMEM;
 
/* Set process attributes now. */
vm->task_info->tgid = current->group_leader->pid;
-   get_task_comm(vm->task_info->process_name, current->group_leader);
+   strscpy(vm->task_info->process_desc, process_name, desc_len + 1);
 
kref_init(&vm->task_info->refcount);
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index d12d66dca8e9..44da250217be 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -232,11 +232,11 @@ struct amdgpu_vm_pte_funcs {
 };
 
 struct amdgpu_task_info {
-   charprocess_name[TASK_COMM_LEN];
chartask_name[TASK_COMM_LEN];
pid_t   pid;
pid_t   tgid;
struct kref refcount;
+   charprocess_desc[];
 };
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 9784a2892185..c82364e43a15 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

[PATCH v4 3/6] drm/amdgpu: delay the use of amdgpu_vm_set_task_info

At the point the VM is locked (through the root PDs dma_resv object), so
it's safer to call amdgpu_vm_set_task_info.

The original place was not protected against concurrent access, but the
risk was limited to mangled process/task name.

Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 1e475eb01417..891128ecee6d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -309,9 +309,6 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p,
p->gang_leader->uf_addr = uf_offset;
kvfree(chunk_array);
 
-   /* Use this opportunity to fill in task info for the vm */
-   amdgpu_vm_set_task_info(vm);
-
return 0;
 
 free_all_kdata:
@@ -1180,6 +1177,9 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser 
*p)
job->vm_pd_addr = amdgpu_gmc_pd_addr(vm->root.bo);
}
 
+   /* Use this opportunity to fill in task info for the vm */
+   amdgpu_vm_set_task_info(vm);
+
if (adev->debug_vm) {
/* Invalidate all BOs to test for userspace bugs */
amdgpu_bo_list_for_each_entry(e, p->bo_list) {
-- 
2.40.1

[PATCH v4 4/6] drm/amdgpu: alloc and init vm::task_info from first submit

This will allow to use flexible array to store the process name and
other information.

This also means that process name will be determined once and for all,
instead of at each submit.

Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 29 --
 1 file changed, 13 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index e20d19ae01b2..6cd5bd5362d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2331,7 +2331,7 @@ amdgpu_vm_get_task_info_vm(struct amdgpu_vm *vm)
 {
struct amdgpu_task_info *ti = NULL;
 
-   if (vm) {
+   if (vm && vm->task_info) {
ti = vm->task_info;
kref_get(&vm->task_info->refcount);
}
@@ -2361,6 +2361,10 @@ static int amdgpu_vm_create_task_info(struct amdgpu_vm 
*vm)
if (!vm->task_info)
return -ENOMEM;
 
+   /* Set process attributes now. */
+   vm->task_info->tgid = current->group_leader->pid;
+   get_task_comm(vm->task_info->process_name, current->group_leader);
+
kref_init(&vm->task_info->refcount);
return 0;
 }
@@ -2372,20 +2376,16 @@ static int amdgpu_vm_create_task_info(struct amdgpu_vm 
*vm)
  */
 void amdgpu_vm_set_task_info(struct amdgpu_vm *vm)
 {
-   if (!vm->task_info)
-   return;
-
-   if (vm->task_info->pid == current->pid)
+   if (!vm->task_info) {
+   if (amdgpu_vm_create_task_info(vm))
+   return;
+   } else if (vm->task_info->pid == current->pid) {
return;
+   }
 
+   /* Update task attributes. */
vm->task_info->pid = current->pid;
get_task_comm(vm->task_info->task_name, current);
-
-   if (current->group_leader->mm != current->mm)
-   return;
-
-   vm->task_info->tgid = current->group_leader->pid;
-   get_task_comm(vm->task_info->process_name, current->group_leader);
 }
 
 /**
@@ -2482,10 +2482,6 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct 
amdgpu_vm *vm,
if (r)
goto error_free_root;
 
-   r = amdgpu_vm_create_task_info(vm);
-   if (r)
-   DRM_DEBUG("Failed to create task info for VM\n");
-
amdgpu_bo_unreserve(vm->root.bo);
amdgpu_bo_unref(&root_bo);
 
@@ -2608,7 +2604,8 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
 
root = amdgpu_bo_ref(vm->root.bo);
amdgpu_bo_reserve(root, true);
-   amdgpu_vm_put_task_info(vm->task_info);
+   if (vm->task_info)
+   amdgpu_vm_put_task_info(vm->task_info);
amdgpu_vm_set_pasid(adev, vm, 0);
dma_fence_wait(vm->last_unlocked, false);
dma_fence_put(vm->last_unlocked);
-- 
2.40.1

[PATCH v4 2/6] drm: use drm_file client_name in fdinfo

Add an optional drm-client-name field to drm fdinfo's output.

Reviewed-by: Christian König 
Reviewed-by: Tvrtko Ursulin 
Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 Documentation/gpu/drm-usage-stats.rst | 5 +
 drivers/gpu/drm/drm_file.c| 5 +
 2 files changed, 10 insertions(+)

diff --git a/Documentation/gpu/drm-usage-stats.rst 
b/Documentation/gpu/drm-usage-stats.rst
index a80f95ca1b2f..566e122e6e60 100644
--- a/Documentation/gpu/drm-usage-stats.rst
+++ b/Documentation/gpu/drm-usage-stats.rst
@@ -73,6 +73,11 @@ scope of each device, in which case `drm-pdev` shall be 
present as well.
 Userspace should make sure to not double account any usage statistics by using
 the above described criteria in order to associate data to individual clients.
 
+- drm-client-name: 
+
+String optionally set by userspace using DRM_IOCTL_SET_CLIENT_NAME.
+
+
 Utilization
 ^^^
 
diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c
index 64f5e15304e7..1c9e03477a24 100644
--- a/drivers/gpu/drm/drm_file.c
+++ b/drivers/gpu/drm/drm_file.c
@@ -955,6 +955,11 @@ void drm_show_fdinfo(struct seq_file *m, struct file *f)
   PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
}
 
+   mutex_lock(&file->client_name_lock);
+   if (file->client_name)
+   drm_printf(&p, "drm-client-name:\t%s\n", file->client_name);
+   mutex_unlock(&file->client_name_lock);
+
if (dev->driver->show_fdinfo)
dev->driver->show_fdinfo(&p, file);
 }
-- 
2.40.1

[PATCH v4 1/6] drm: add DRM_SET_CLIENT_NAME ioctl

Giving the opportunity to userspace to associate a free-form
name with a drm_file struct is helpful for tracking and debugging.

This is similar to the existing DMA_BUF_SET_NAME ioctl.

Access to client_name is protected by a mutex, and the 'clients' debugfs
file has been updated to print it.

Userspace MR to use this ioctl:
   https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1428

If the string passed by userspace contains chars that would mess up output
when it's going to be printed (in dmesg, fdinfo, etc), -EINVAL is returned.

A 0-length string is a valid use, and clears the existing name.

Reviewed-by: Tvrtko Ursulin 
Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/drm_debugfs.c | 14 ++---
 drivers/gpu/drm/drm_file.c|  5 
 drivers/gpu/drm/drm_ioctl.c   | 55 +++
 include/drm/drm_file.h|  9 ++
 include/uapi/drm/drm.h| 17 +++
 5 files changed, 96 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index 6b239a24f1df..5c99322a4c6f 100644
--- a/drivers/gpu/drm/drm_debugfs.c
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -78,12 +78,14 @@ static int drm_clients_info(struct seq_file *m, void *data)
kuid_t uid;
 
seq_printf(m,
-  "%20s %5s %3s master a %5s %10s\n",
+  "%20s %5s %3s master a %5s %10s %*s\n",
   "command",
   "tgid",
   "dev",
   "uid",
-  "magic");
+  "magic",
+  DRM_CLIENT_NAME_MAX_LEN,
+  "name");
 
/* dev->filelist is sorted youngest first, but we want to present
 * oldest first (i.e. kernel, servers, clients), so walk backwardss.
@@ -94,19 +96,23 @@ static int drm_clients_info(struct seq_file *m, void *data)
struct task_struct *task;
struct pid *pid;
 
+   mutex_lock(&priv->client_name_lock);
rcu_read_lock(); /* Locks priv->pid and pid_task()->comm! */
pid = rcu_dereference(priv->pid);
task = pid_task(pid, PIDTYPE_TGID);
uid = task ? __task_cred(task)->euid : GLOBAL_ROOT_UID;
-   seq_printf(m, "%20s %5d %3d   %c%c %5d %10u\n",
+   seq_printf(m, "%20s %5d %3d   %c%c %5d %10u %*s\n",
   task ? task->comm : "",
   pid_vnr(pid),
   priv->minor->index,
   is_current_master ? 'y' : 'n',
   priv->authenticated ? 'y' : 'n',
   from_kuid_munged(seq_user_ns(m), uid),
-  priv->magic);
+  priv->magic,
+  DRM_CLIENT_NAME_MAX_LEN,
+  priv->client_name ? priv->client_name : "");
rcu_read_unlock();
+   mutex_unlock(&priv->client_name_lock);
}
mutex_unlock(&dev->filelist_mutex);
return 0;
diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c
index 01fde94fe2a9..64f5e15304e7 100644
--- a/drivers/gpu/drm/drm_file.c
+++ b/drivers/gpu/drm/drm_file.c
@@ -158,6 +158,7 @@ struct drm_file *drm_file_alloc(struct drm_minor *minor)
 
spin_lock_init(&file->master_lookup_lock);
mutex_init(&file->event_read_lock);
+   mutex_init(&file->client_name_lock);
 
if (drm_core_check_feature(dev, DRIVER_GEM))
drm_gem_open(dev, file);
@@ -259,6 +260,10 @@ void drm_file_free(struct drm_file *file)
WARN_ON(!list_empty(&file->event_list));
 
put_pid(rcu_access_pointer(file->pid));
+
+   mutex_destroy(&file->client_name_lock);
+   kfree(file->client_name);
+
kfree(file);
 }
 
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 51f39912866f..df8d59bd5241 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -540,6 +540,59 @@ int drm_version(struct drm_device *dev, void *data,
return err;
 }
 
+/*
+ * Check if the passed string contains control char or spaces or
+ * anything that would mess up a formatted output.
+ */
+static int drm_validate_value_string(const char *value, size_t len)
+{
+   int i;
+
+   for (i = 0; i < len; i++) {
+   if (value[i] <= 32 || value[i] >= 127)
+   return -EINVAL;
+   }
+   return 0;
+}
+
+static int drm_set_client_name(struct drm_device *dev, void *data,
+  struct drm_file *file_priv)
+{
+   struct drm_set_client_name *name = data;
+   void __user *user_ptr;
+   char *new_name;
+   size_t len;
+
+   if (name->name_len > DRM_CLIENT_NAME_MAX_LEN)
+   return -EINVAL;
+
+   user_ptr = u64_to_user_ptr(name->name);
+
+   new_name = memdup_user_nul(user_ptr, name->name_len);
+   if (IS_E

[PATCH v1 5/5] drm/amdgpu: update the handle ptr in early_fini

Update the *handle to amdgpu_ip_block ptr for all
functions pointers of early_fini.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
 drivers/gpu/drm/amd/include/amd_shared.h  | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0c3d31e4d314..e54a04171a2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3307,7 +3307,7 @@ static int amdgpu_device_ip_fini_early(struct 
amdgpu_device *adev)
if (!adev->ip_blocks[i].version->funcs->early_fini)
continue;
 
-   r = adev->ip_blocks[i].version->funcs->early_fini((void *)adev);
+   r = 
adev->ip_blocks[i].version->funcs->early_fini(&adev->ip_blocks[i]);
if (r) {
DRM_DEBUG("early_fini of IP block <%s> failed %d\n",
  adev->ip_blocks[i].version->funcs->name, r);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3f44227b7d4b..bc694e214533 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2108,9 +2108,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
return -EINVAL;
 }
 
-static int amdgpu_dm_early_fini(void *handle)
+static int amdgpu_dm_early_fini(struct amdgpu_ip_block *ip_block)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+   struct amdgpu_device *adev = ip_block->adev;
 
amdgpu_dm_audio_fini(adev);
 
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h 
b/drivers/gpu/drm/amd/include/amd_shared.h
index 4a10a804f130..980a6a740689 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -383,7 +383,7 @@ struct amd_ip_funcs {
int (*late_init)(struct amdgpu_ip_block *ip_block);
int (*sw_init)(struct amdgpu_ip_block *ip_block);
int (*sw_fini)(struct amdgpu_ip_block *ip_block);
-   int (*early_fini)(void *handle);
+   int (*early_fini)(struct amdgpu_ip_block *ip_block);
int (*hw_init)(void *handle);
int (*hw_fini)(void *handle);
void (*late_fini)(void *handle);
-- 
2.34.1

[PATCH v1 4/5] drm/amdgpu: update the handle ptr in sw_fini

update the *handle to amdgpu_ip_block ptr for all
functions pointers of sw_fini.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/soc24.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/a

[PATCH v1 2/5] drm/amdgpu: update the handle ptr in late_init

Update the ptr handle to amdgpu_ip_block ptr in all
the functions of late_init function ptr.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/aldebaran.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   |  4 ++--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 ++--
 drivers/gpu/drm/amd/include/amd_shared.h  |  2 +-
 drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c|  4 ++--
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c|  4 ++--
 drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c  |  4 ++--
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  6 +++---
 34 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c 
b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
index 98fb0ba4f9cb..574aeca993e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
@@ -304,7 +304,7 @@ static int aldebaran_mode2_restore_ip(struct amdgpu_device 
*adev)
 
if (adev->ip_blocks[i].version->funcs->late_init) {
r = adev->ip_blocks[i].version->funcs->late_init(
-   (void *)adev);
+   &adev->ip_blocks[i]);
if (r) {
dev_err(adev->dev,
"late_init of IP block <%s> failed %d 
after reset\n",
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 48a7549fb21d..1afd67cb6db0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3198,7 +3198,7 @@ static int amdgpu_device_ip_late_init(struct 
amdgpu_device *adev)
if (!adev->ip_blocks[i].status.hw)
continue;
if (adev->ip_blocks[i].version->funcs->late_init) {
-   r = adev->ip_blocks[i].version->funcs->late_init((void 
*)adev);
+   r = 
adev->ip_blocks[i].version->funcs->late_init(&adev->ip_blocks[i]);
if (r) {
DRM_ERROR("late_init of IP block <%s> failed 
%d\n",
  
adev->ip_blocks[i].version->funcs->name, r);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
index d7e377341367..74b1ec10be2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
@@ -784,9 +784,9 @@ static int umsch_mm_early_init(struct amdgpu_ip_block 
*ip_block)
return 0;
 }
 
-static int umsch_mm_late_init(void *handle)
+static int umsch_mm_late_init(struct amdgpu_ip_block *ip_block)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+   struct amdgpu_device *adev = ip_block->adev;
 
if (amdgpu_in_reset(adev) || adev->in_s0ix || adev->in_suspend)
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 3d0969a7ba69..8008dbd24967 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -7722,9 +7722,9 @@ static int gfx_v10_0_early_init(struct amdgpu_ip_block 
*ip_block)
return gfx_v10_0_init_microcode(adev);
 }
 
-static int gfx_v10_0_late_init(void *handle)
+static int gfx_v10_0_late_init(str

RE: [PATCH v1 5/9] drm/amd/pm: use pm_runtime_get_if_active for debugfs getters

2024-09-27 Thread Feng, Kenneth

[AMD Official Use Only - AMD Internal Distribution Only]

-Original Message-
From: Pelloux-Prayer, Pierre-Eric 
Sent: Wednesday, September 25, 2024 3:54 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander 
; Feng, Kenneth ; Limonciello, 
Mario 
Cc: Pelloux-Prayer, Pierre-Eric 
Subject: [PATCH v1 5/9] drm/amd/pm: use pm_runtime_get_if_active for debugfs 
getters

Don't wake up the GPU for reading pm values. Instead, take a runtime 
powermanagement ref when trying to read it iff the GPU is already awake.
Kenneth - just a nit-pick iff(typo) -> if

This avoids spurious wake ups (eg: from applets).

We use pm_runtime_get_if_in_active(ign_usage_count=true) because we care about 
"is the GPU awake?" not about "is the GPU awake and something else prevents 
suspend?".

Tested-by: Mario Limonciello 
Signed-off-by: Pierre-Eric Pelloux-Prayer 
---
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 138 ++---
 1 file changed, 69 insertions(+), 69 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index c8f34b1a4d8e..f1f339b75380 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -145,9 +145,9 @@ static ssize_t amdgpu_get_power_dpm_state(struct device 
*dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

amdgpu_dpm_get_current_power_state(adev, &pm);

@@ -268,9 +268,9 @@ static ssize_t 
amdgpu_get_power_dpm_force_performance_level(struct device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

level = amdgpu_dpm_get_performance_level(adev);

@@ -364,9 +364,9 @@ static ssize_t amdgpu_get_pp_num_states(struct device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

if (amdgpu_dpm_get_pp_num_states(adev, &data))
memset(&data, 0, sizeof(data));
@@ -399,9 +399,9 @@ static ssize_t amdgpu_get_pp_cur_state(struct device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

amdgpu_dpm_get_current_power_state(adev, &pm);

@@ -526,9 +526,9 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

size = amdgpu_dpm_get_pp_table(adev, &table);

@@ -840,9 +840,9 @@ static ssize_t amdgpu_get_pp_od_clk_voltage(struct device 
*dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

for (clk_index = 0 ; clk_index < 6 ; clk_index++) {
ret = amdgpu_dpm_emit_clock_levels(adev, od_clocks[clk_index], 
buf, &size); @@ -930,9 +930,9 @@ static ssize_t amdgpu_get_pp_features(struct 
device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

size = amdgpu_dpm_get_ppfeature_status(adev, buf);
if (size <= 0)
@@ -996,9 +996,9 @@ static ssize_t amdgpu_get_pp_dpm_clock(struct device *dev,
if (adev->in_suspend && !adev->in_runpm)
return -EPERM;

-   ret = pm_runtime_resume_and_get(ddev->dev);
-   if (ret < 0)
-   return ret;
+   ret = pm_runtime_get_if_active(ddev->dev, true);
+   if (ret <= 0)
+   return ret ?: -EPERM;

ret = amdgpu_dpm_emit_clock_levels(adev, type, buf, &size);
if (ret == -ENOENT)
@@ -1245,9 +1245,9 @@ static ssize_t amdgpu_get_pp_sclk_od(struct device *dev,

Re: [PATCH v1 1/5] drm/amdgpu: update the handle ptr in early_init


Am 27.09.24 um 11:57 schrieb Sunil Khatri:

update the handle ptr to amdgpu_ip_block ptr
for all functions pointers on early_init.

Signed-off-by: Sunil Khatri 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 6 --
  drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 5 +++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/si.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc21.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc24.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
  drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
  drivers/gpu

[PATCH 3/5] drm: Move client-device functions in to drm_client_dev.c

A number of DRM-client functions serve as entry points from device
operations to client code. Move them info a separate file, so that
the other client functions can be moved into a different module.

Signed-off-by: Thomas Zimmermann 
---
 Documentation/gpu/drm-client.rst |   3 +
 drivers/gpu/drm/Makefile |   1 +
 drivers/gpu/drm/drm_client.c | 121 ---
 drivers/gpu/drm/drm_client_dev.c | 138 +++
 4 files changed, 142 insertions(+), 121 deletions(-)
 create mode 100644 drivers/gpu/drm/drm_client_dev.c

diff --git a/Documentation/gpu/drm-client.rst b/Documentation/gpu/drm-client.rst
index 58b5a1d1219d..6d8142f159a1 100644
--- a/Documentation/gpu/drm-client.rst
+++ b/Documentation/gpu/drm-client.rst
@@ -13,3 +13,6 @@ Kernel clients
 
 .. kernel-doc:: drivers/gpu/drm/drm_client_modeset.c
:export:
+
+.. kernel-doc:: drivers/gpu/drm/drm_client_dev.c
+   :export:
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 3894f43f6d47..c50443756457 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -42,6 +42,7 @@ drm-y := \
drm_bridge.o \
drm_cache.o \
drm_client.o \
+   drm_client_dev.o \
drm_client_modeset.o \
drm_color_mgmt.o \
drm_connector.o \
diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c
index bfedcbf516db..549b28a5918c 100644
--- a/drivers/gpu/drm/drm_client.c
+++ b/drivers/gpu/drm/drm_client.c
@@ -10,7 +10,6 @@
 #include 
 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -172,99 +171,6 @@ void drm_client_release(struct drm_client_dev *client)
 }
 EXPORT_SYMBOL(drm_client_release);
 
-/**
- * drm_client_dev_unregister - Unregister clients
- * @dev: DRM device
- *
- * This function releases all clients by calling each client's
- * &drm_client_funcs.unregister callback. The callback function
- * is responsibe for releaseing all resources including the client
- * itself.
- *
- * The helper drm_dev_unregister() calls this function. Drivers
- * that use it don't need to call this function themselves.
- */
-void drm_client_dev_unregister(struct drm_device *dev)
-{
-   struct drm_client_dev *client, *tmp;
-
-   if (!drm_core_check_feature(dev, DRIVER_MODESET))
-   return;
-
-   mutex_lock(&dev->clientlist_mutex);
-   list_for_each_entry_safe(client, tmp, &dev->clientlist, list) {
-   list_del(&client->list);
-   if (client->funcs && client->funcs->unregister) {
-   client->funcs->unregister(client);
-   } else {
-   drm_client_release(client);
-   kfree(client);
-   }
-   }
-   mutex_unlock(&dev->clientlist_mutex);
-}
-EXPORT_SYMBOL(drm_client_dev_unregister);
-
-/**
- * drm_client_dev_hotplug - Send hotplug event to clients
- * @dev: DRM device
- *
- * This function calls the &drm_client_funcs.hotplug callback on the attached 
clients.
- *
- * drm_kms_helper_hotplug_event() calls this function, so drivers that use it
- * don't need to call this function themselves.
- */
-void drm_client_dev_hotplug(struct drm_device *dev)
-{
-   struct drm_client_dev *client;
-   int ret;
-
-   if (!drm_core_check_feature(dev, DRIVER_MODESET))
-   return;
-
-   if (!dev->mode_config.num_connector) {
-   drm_dbg_kms(dev, "No connectors found, will not send hotplug 
events!\n");
-   return;
-   }
-
-   mutex_lock(&dev->clientlist_mutex);
-   list_for_each_entry(client, &dev->clientlist, list) {
-   if (!client->funcs || !client->funcs->hotplug)
-   continue;
-
-   if (client->hotplug_failed)
-   continue;
-
-   ret = client->funcs->hotplug(client);
-   drm_dbg_kms(dev, "%s: ret=%d\n", client->name, ret);
-   if (ret)
-   client->hotplug_failed = true;
-   }
-   mutex_unlock(&dev->clientlist_mutex);
-}
-EXPORT_SYMBOL(drm_client_dev_hotplug);
-
-void drm_client_dev_restore(struct drm_device *dev)
-{
-   struct drm_client_dev *client;
-   int ret;
-
-   if (!drm_core_check_feature(dev, DRIVER_MODESET))
-   return;
-
-   mutex_lock(&dev->clientlist_mutex);
-   list_for_each_entry(client, &dev->clientlist, list) {
-   if (!client->funcs || !client->funcs->restore)
-   continue;
-
-   ret = client->funcs->restore(client);
-   drm_dbg_kms(dev, "%s: ret=%d\n", client->name, ret);
-   if (!ret) /* The first one to return zero gets the privilege to 
restore */
-   break;
-   }
-   mutex_unlock(&dev->clientlist_mutex);
-}
-
 static void drm_client_buffer_delete(struct drm_client_buffer *buffer)
 {
if (buffer->gem) {
@@ -584,30 +490,3 @@ int drm_client_framebuffer_flush(struct drm_client_buffer

[PATCH 5/5] drm: Add client-lib module

Add drm_client_lib.ko to contain most of the client code. Move the
existing client for fbdev emulation into the new module. Protect the
new module behind CONFIG_DRM_CLIENT.

The Kconfig rules separate the DRM drivers from the DRM clients. A
driver can opt into the default clients, but the user configures
each client individually. To do so, DRM drivers still select
DRM_CLIENT_SELECTION. The option is now a tristate that further
selects all dependencies of the enabled DRM clients. There's
a menu option for each client. Enabling at least one client also
selects DRM_CLIENT_SETUP, so that drivers call drm_client_setup().
New DRM clients should depend on DRM_CLIENT_SELECTION.

The KMS-helper module now exports handful of symbols needed by the
DRM client library.

There are existing kernel options in drm_fb_helper.o, so leave this
file in the KMS-helper module for now.

Amdgpu has an internal DRM client, so it has to select DRM_CLIENT by
itself unconditionally.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/Kconfig| 31 --
 drivers/gpu/drm/Makefile   | 19 +-
 drivers/gpu/drm/amd/amdgpu/Kconfig |  1 +
 drivers/gpu/drm/drm_client.c   |  3 +++
 drivers/gpu/drm/drm_dumb_buffers.c |  2 ++
 drivers/gpu/drm/drm_file.c |  2 ++
 drivers/gpu/drm/drm_framebuffer.c  |  2 ++
 drivers/gpu/drm/drm_gem.c  |  2 ++
 8 files changed, 51 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 88b2ba55fe16..379fccf3a6ea 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -9,8 +9,6 @@ menuconfig DRM
tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI 
support)"
depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && HAS_DMA
select DRM_PANEL_ORIENTATION_QUIRKS
-   select DRM_KMS_HELPER if DRM_FBDEV_EMULATION
-   select FB_CORE if DRM_FBDEV_EMULATION
select HDMI
select I2C
select DMA_SHARED_BUFFER
@@ -209,21 +207,40 @@ config DRM_DEBUG_MODESET_LOCK
 
  If in doubt, say "N".
 
+config DRM_CLIENT
+   tristate
+   depends on DRM
+   help
+ Enables the DRM client-lib module. DRM drivers that need
+ struct drm_client_dev and its interfaces should select this
+ option. Drivers that support the default clients should
+ select DRM_CLIENT_SELECTION instead.
+
 config DRM_CLIENT_SELECTION
-   bool
+   tristate
depends on DRM
-   select DRM_CLIENT_SETUP if DRM_FBDEV_EMULATION
+   select DRM_CLIENT if DRM_FBDEV_EMULATION
+   select DRM_KMS_HELPER if DRM_FBDEV_EMULATION
+   select FB_CORE if DRM_FBDEV_EMULATION
help
  Drivers that support in-kernel DRM clients have to select this
- option.
+ option. It selects all modules and components according to the
+ enabled clients.
 
 config DRM_CLIENT_SETUP
bool
depends on DRM_CLIENT_SELECTION
+   help
+ Enables the DRM client selection. DRM drivers that support the
+ default clients should select DRM_CLIENT_SELECTION instead.
+
+menu "Supported DRM clients"
+   depends on DRM_CLIENT_SELECTION
 
 config DRM_FBDEV_EMULATION
bool "Enable legacy fbdev support for your modesetting driver"
-   depends on DRM
+   depends on DRM_CLIENT_SELECTION
+   select DRM_CLIENT_SETUP
select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
default FB
help
@@ -262,6 +279,8 @@ config DRM_FBDEV_LEAK_PHYS_SMEM
  If in doubt, say "N" or spread the word to your closed source
  library vendor.
 
+endmenu
+
 config DRM_LOAD_EDID_FIRMWARE
bool "Allow to specify an EDID data set instead of probing for it"
depends on DRM
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index c50443756457..419208b97f57 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -41,9 +41,7 @@ drm-y := \
drm_blend.o \
drm_bridge.o \
drm_cache.o \
-   drm_client.o \
drm_client_dev.o \
-   drm_client_modeset.o \
drm_color_mgmt.o \
drm_connector.o \
drm_crtc.o \
@@ -144,14 +142,25 @@ drm_kms_helper-y := \
drm_probe_helper.o \
drm_self_refresh_helper.o \
drm_simple_kms_helper.o
-drm_kms_helper-$(CONFIG_DRM_CLIENT_SETUP) += \
-   drm_client_setup.o
 drm_kms_helper-$(CONFIG_DRM_PANEL_BRIDGE) += bridge/panel.o
 drm_kms_helper-$(CONFIG_DRM_FBDEV_EMULATION) += \
-   drm_fbdev_client.o \
drm_fb_helper.o
+drm_kms_helper-$(CONFIG_DRM_PANEL_BRIDGE) += bridge/panel.o
 obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
 
+#
+# DRM clients
+#
+
+drm_client_lib-y := \
+   drm_client.o \
+   drm_client_modeset.o
+drm_client_lib-$(CONFIG_DRM_CLIENT_SETUP) += \
+   drm_client_setup.o
+drm_client_lib-$(CONFIG_DRM_FBDEV_EMULATION) += \
+   drm_fbdev_client.o
+obj-$(CONFIG_DRM_

[PATCH v2 3/5] drm/amdgpu: update the handle ptr in sw_init

update the *handle to amdgpu_ip_block ptr for all
functions pointers of sw_init.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   | 4 ++--
 drivers/gpu/drm/amd/display/amd

[PATCH v2 5/5] drm/amdgpu: update the handle ptr in early_fini

Update the *handle to amdgpu_ip_block ptr for all
functions pointers of early_fini.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
 drivers/gpu/drm/amd/include/amd_shared.h  | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1c69776b98de..28c1bf6867ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3305,7 +3305,7 @@ static int amdgpu_device_ip_fini_early(struct 
amdgpu_device *adev)
if (!adev->ip_blocks[i].version->funcs->early_fini)
continue;
 
-   r = adev->ip_blocks[i].version->funcs->early_fini((void *)adev);
+   r = 
adev->ip_blocks[i].version->funcs->early_fini(&adev->ip_blocks[i]);
if (r) {
DRM_DEBUG("early_fini of IP block <%s> failed %d\n",
  adev->ip_blocks[i].version->funcs->name, r);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3f44227b7d4b..bc694e214533 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2108,9 +2108,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
return -EINVAL;
 }
 
-static int amdgpu_dm_early_fini(void *handle)
+static int amdgpu_dm_early_fini(struct amdgpu_ip_block *ip_block)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+   struct amdgpu_device *adev = ip_block->adev;
 
amdgpu_dm_audio_fini(adev);
 
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h 
b/drivers/gpu/drm/amd/include/amd_shared.h
index 4a10a804f130..980a6a740689 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -383,7 +383,7 @@ struct amd_ip_funcs {
int (*late_init)(struct amdgpu_ip_block *ip_block);
int (*sw_init)(struct amdgpu_ip_block *ip_block);
int (*sw_fini)(struct amdgpu_ip_block *ip_block);
-   int (*early_fini)(void *handle);
+   int (*early_fini)(struct amdgpu_ip_block *ip_block);
int (*hw_init)(void *handle);
int (*hw_fini)(void *handle);
void (*late_fini)(void *handle);
-- 
2.34.1

[PATCH v2 4/5] drm/amdgpu: update the handle ptr in sw_fini

update the *handle to amdgpu_ip_block ptr for all
functions pointers of sw_fini.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h| 2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   | 2 +-
 drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/soc24.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c| 4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   | 2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/a

[PATCH 2/5] drm/xe: Select DRM_CLIENT_SELECTION

The Kconfig token DRM_CLIENT_SELECTION will make DRM clients
available to drivers. Select it from xe.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/xe/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig
index ebd0879e04d4..bac96c0dd66e 100644
--- a/drivers/gpu/drm/xe/Kconfig
+++ b/drivers/gpu/drm/xe/Kconfig
@@ -8,6 +8,7 @@ config DRM_XE
select SHMEM
select TMPFS
select DRM_BUDDY
+   select DRM_CLIENT_SELECTION
select DRM_EXEC
select DRM_KMS_HELPER
select DRM_KUNIT_TEST_HELPERS if DRM_XE_KUNIT_TEST != n
-- 
2.46.0

[PATCH 1/5] drm/i915: Select DRM_CLIENT_SELECTION

The Kconfig token DRM_CLIENT_SELECTION will make DRM clients
available to drivers. Select it from i915.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/i915/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index db400aad88fa..1158a6b97f9a 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -10,6 +10,7 @@ config DRM_I915
# the shmem_readpage() which depends upon tmpfs
select SHMEM
select TMPFS
+   select DRM_CLIENT_SELECTION
select DRM_DISPLAY_DP_HELPER
select DRM_DISPLAY_DSC_HELPER
select DRM_DISPLAY_HDCP_HELPER
-- 
2.46.0

Re: [PATCH v5 79/80] drm/omapdrm: Remove struct drm_fb_helper from struct omap_fbdev.


Hi

Am 26.09.24 um 15:07 schrieb Tomi Valkeinen:

Hi,

On 24/09/2024 10:13, Thomas Zimmermann wrote:

Store instances of drm_fb_helper and struct omap_fbdev separately.
This will allow omapdrm to use the common fbdev client, which allocates
its own instance of struct drm_fb_helper.

There is at most one instance of each per DRM device, so both can be
referenced directly from the omap and DRM device structures. A later
patchset might rework the common fbdev client to allow for storing
both, drm_fb_helper and omap_fbdev, together in the same place.

Signed-off-by: Thomas Zimmermann 
Cc: Tomi Valkeinen 
Acked-by: Javier Martinez Canillas 
---
  drivers/gpu/drm/omapdrm/omap_drv.h   |  3 ++
  drivers/gpu/drm/omapdrm/omap_fbdev.c | 42 +++-
  2 files changed, 26 insertions(+), 19 deletions(-)


The ywrap seems to be broken, but it's broken without this series too. 
With some quick hacks I managed to get the omapdrm's panning function 
called, and it works the same way with or without this series.


Tested on DRA76 EVM.

Reviewed-by: Tomi Valkeinen 

For reference, in case someone is interested fixing omapdrm's ywrap code:

- get_fb() doesn't work. I don't understand the point of the function. 
It compares fbi->fix.id and MODULE_NAME, and the "fbi->fix.id" has 
changed along the years so the check no longer works. Afaik, the whole 
function is not needed, and we can just use fbi->par.


- omap_fbdev_pan_display() doesn't seem to get called when the console 
scrolls. I can get it called with an userspace app that does some y 
panning. Maybe FBINFO_HWACCEL_YWRAP is not supported anymore?


If ywrap doesn't work and no one complained, can we remove it? The rest 
of the code is equivalent to drm_fbdev_dma.c, so we could remove omap's 
implementation entirely.


Best regards
Thomas



 Tomi

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h 
b/drivers/gpu/drm/omapdrm/omap_drv.h

index 4c7217b35f6b..d903568fd8cc 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.h
+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
@@ -32,6 +32,7 @@
  #define MODULE_NAME "omapdrm"
    struct omap_drm_usergart;
+struct omap_fbdev;
    struct omap_drm_pipeline {
  struct drm_crtc *crtc;
@@ -97,6 +98,8 @@ struct omap_drm_private {
    /* memory bandwidth limit if it is needed on the platform */
  unsigned int max_bandwidth;
+
+    struct omap_fbdev *fbdev;
  };
    diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c 
b/drivers/gpu/drm/omapdrm/omap_fbdev.c

index 523be34682ca..044e80403c3b 100644
--- a/drivers/gpu/drm/omapdrm/omap_fbdev.c
+++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c
@@ -13,6 +13,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
    #include "omap_drv.h"
@@ -26,10 +27,8 @@ module_param_named(ywrap, ywrap_enabled, bool, 0644);
   * fbdev funcs, to implement legacy fbdev interface on top of drm 
driver

   */
  -#define to_omap_fbdev(x) container_of(x, struct omap_fbdev, base)
-
  struct omap_fbdev {
-    struct drm_fb_helper base;
+    struct drm_device *dev;
  bool ywrap_enabled;
    /* for deferred dmm roll when getting called in atomic ctx */
@@ -41,7 +40,7 @@ static struct drm_fb_helper *get_fb(struct fb_info 
*fbi);

  static void pan_worker(struct work_struct *work)
  {
  struct omap_fbdev *fbdev = container_of(work, struct 
omap_fbdev, work);

-    struct drm_fb_helper *helper = &fbdev->base;
+    struct drm_fb_helper *helper = fbdev->dev->fb_helper;
  struct fb_info *fbi = helper->info;
  struct drm_gem_object *bo = drm_gem_fb_get_obj(helper->fb, 0);
  int npages;
@@ -55,24 +54,25 @@ FB_GEN_DEFAULT_DEFERRED_DMAMEM_OPS(omap_fbdev,
 drm_fb_helper_damage_range,
 drm_fb_helper_damage_area)
  -static int omap_fbdev_pan_display(struct fb_var_screeninfo *var,
-    struct fb_info *fbi)
+static int omap_fbdev_pan_display(struct fb_var_screeninfo *var, 
struct fb_info *fbi)

  {
  struct drm_fb_helper *helper = get_fb(fbi);
-    struct omap_fbdev *fbdev = to_omap_fbdev(helper);
+    struct omap_drm_private *priv;
+    struct omap_fbdev *fbdev;
    if (!helper)
  goto fallback;
  +    priv = helper->dev->dev_private;
+    fbdev = priv->fbdev;
+
  if (!fbdev->ywrap_enabled)
  goto fallback;
  -    if (drm_can_sleep()) {
+    if (drm_can_sleep())
  pan_worker(&fbdev->work);
-    } else {
-    struct omap_drm_private *priv = helper->dev->dev_private;
+    else
  queue_work(priv->wq, &fbdev->work);
-    }
    return 0;
  @@ -92,7 +92,6 @@ static void omap_fbdev_fb_destroy(struct fb_info 
*info)

  struct drm_fb_helper *helper = info->par;
  struct drm_framebuffer *fb = helper->fb;
  struct drm_gem_object *bo = drm_gem_fb_get_obj(fb, 0);
-    struct omap_fbdev *fbdev = to_omap_fbdev(helper);
    DBG();
  @@ -104,7 +103,7 @@ static void omap_fbdev_fb_destroy(struct 
fb_info *info)

    drm_client_release(&helper->client);
  drm_fb_helper_unprepare(helper);
-

[PATCH v2 1/5] drm/amdgpu: update the handle ptr in early_init

update the handle ptr to amdgpu_ip_block ptr
for all functions pointers on early_init.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 24 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   |  5 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/cik.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_ih.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/cz_ih.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h|  2 +-
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/navi10_ih.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/si.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/si_dma.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/si_ih.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc15.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c |  6 ++---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   |  4 ++--
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 ++---
 drivers/gpu/drm/amd/include/amd_shared.h  |  2 +-
 drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c|  4 ++--
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c|  4 ++--
 .../gpu/drm/amd/pm/powerplay/amd_powerplay.c  |  5 ++--
 drivers/gpu/drm/amd/p

Re: [PATCH v1 1/5] drm/amdgpu: update the handle ptr in early_init

2024-09-27 Thread Khatri, Sunil




On 9/27/2024 7:26 PM, Khatri, Sunil wrote:


On 9/27/2024 5:51 PM, Christian König wrote:

Am 27.09.24 um 11:57 schrieb Sunil Khatri:

update the handle ptr to amdgpu_ip_block ptr
for all functions pointers on early_init.

Signed-off-by: Sunil Khatri 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c   | 2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    | 6 --
  drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c   | 5 +++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/cz_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/iceland_ih.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v6_1.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/ih_v7_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h    | 2 +-
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v11_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/mes_v12_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/navi10_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/nv.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_dma.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/si_ih.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc15.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc21.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/soc24.c    | 4 ++--
  drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 6 +++---
  drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c   | 4 ++--
  drivers/gpu/drm/amd/amdgpu/vega10_ih.c

[PATCH 4/5] drm: Select fbdev helpers for modules that require them

Fbdev emulation for SHMEM and TTM requires helpers from the fbdev
subsystem. Select them from the modules that use them instead of the
core DRM module.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/Kconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 1df4e627e3d3..88b2ba55fe16 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -11,7 +11,6 @@ menuconfig DRM
select DRM_PANEL_ORIENTATION_QUIRKS
select DRM_KMS_HELPER if DRM_FBDEV_EMULATION
select FB_CORE if DRM_FBDEV_EMULATION
-   select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
select HDMI
select I2C
select DMA_SHARED_BUFFER
@@ -332,6 +331,7 @@ config DRM_TTM_HELPER
tristate
depends on DRM
select DRM_TTM
+   select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
help
  Helpers for ttm-based gem objects
 
@@ -345,6 +345,7 @@ config DRM_GEM_DMA_HELPER
 config DRM_GEM_SHMEM_HELPER
tristate
depends on DRM && MMU
+   select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
help
  Choose this if you need the GEM shmem helper functions
 
-- 
2.46.0

[PATCH 02/13] drm/amd/display: Fix system hang while resume with TBT monitor

From: Tom Chung 

[Why]
Connected with a Thunderbolt monitor and do the suspend and the system
may hang while resume.

The TBT monitor HPD will be triggered during the resume procedure
and call the drm_client_modeset_probe() while
struct drm_connector connector->dev->master is NULL.

It will mess up the pipe topology after resume.

[How]
Skip the TBT monitor HPD during the resume procedure because we
currently will probe the connectors after resume by default.

Reviewed-by: Wayne Lin 
Signed-off-by: Tom Chung 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0d32f9cbf8aa..054608d4a0db 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -770,6 +770,12 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,
return;
}
 
+   /* Skip DMUB HPD IRQ in suspend/resume. We will probe them later. */
+   if (notify->type == DMUB_NOTIFICATION_HPD && adev->in_suspend) {
+   DRM_INFO("Skip DMUB HPD IRQ callback in suspend/resume\n");
+   return;
+   }
+
link_index = notify->link_index;
link = adev->dm.dc->links[link_index];
dev = adev->dm.ddev;
-- 
2.34.1

[PATCH 03/13] drm/amd/display: Add logs to record register read/write

From: Paul Hsieh 

[Why]
There are some issues which customer only can provide full
dump for analyze, without register history, it's hard to
debug HW status.

[How]
1. Put register read/write into WPP log so we can trace the logs
from full memory dump.
2. MALL doesn't add into WPP, add it.

Reviewed-by: Aric Cyr 
Signed-off-by: Paul Hsieh 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/include/logger_types.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h 
b/drivers/gpu/drm/amd/display/include/logger_types.h
index a48d564d1660..4d68c1c6e210 100644
--- a/drivers/gpu/drm/amd/display/include/logger_types.h
+++ b/drivers/gpu/drm/amd/display/include/logger_types.h
@@ -61,11 +61,13 @@
 #define DC_LOG_ALL_TF_CHANNELS(...) pr_debug("[GAMMA]:"__VA_ARGS__)
 #define DC_LOG_DSC(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_SMU(...) pr_debug("[SMU_MSG]:"__VA_ARGS__)
-#define DC_LOG_MALL(...) pr_debug("[MALL]:"__VA_ARGS__)
 #define DC_LOG_DWB(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
 #define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__)
 #define DC_LOG_IPS(...) pr_debug("[IPS]: "__VA_ARGS__)
+#define DC_LOG_MALL(...) pr_debug("[MALL]:"__VA_ARGS__)
+#define DC_LOG_REGISTER_READ(...) pr_debug("[REGISTER_READ]: "__VA_ARGS__)
+#define DC_LOG_REGISTER_WRITE(...) pr_debug("[REGISTER_WRITE]: "__VA_ARGS__)
 
 struct dc_log_buffer_ctx {
char *buf;
-- 
2.34.1

[PATCH 12/13] drm/amd/display: [FW Promotion] Release 0.0.236.0

From: Taimur Hassan 

Signed-off-by: Taimur Hassan 
Signed-off-by: Fangzhi Zuo 
---
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   | 62 +--
 1 file changed, 57 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h 
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 3296788731ec..05d352c7b1d3 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -1401,9 +1401,10 @@ enum dmub_out_cmd_type {
 /* DMUB_CMD__DPIA command sub-types. */
 enum dmub_cmd_dpia_type {
DMUB_CMD__DPIA_DIG1_DPIA_CONTROL = 0,
-   DMUB_CMD__DPIA_SET_CONFIG_ACCESS = 1,
+   DMUB_CMD__DPIA_SET_CONFIG_ACCESS = 1, // will be replaced by 
DPIA_SET_CONFIG_REQUEST
DMUB_CMD__DPIA_MST_ALLOC_SLOTS = 2,
DMUB_CMD__DPIA_SET_TPS_NOTIFICATION = 3,
+   DMUB_CMD__DPIA_SET_CONFIG_REQUEST = 4,
 };
 
 /* DMUB_OUT_CMD__DPIA_NOTIFICATION command types. */
@@ -2192,7 +2193,7 @@ struct dmub_rb_cmd_dig1_dpia_control {
 };
 
 /**
- * SET_CONFIG Command Payload
+ * SET_CONFIG Command Payload (deprecated)
  */
 struct set_config_cmd_payload {
uint8_t msg_type; /* set config message type */
@@ -2200,7 +2201,7 @@ struct set_config_cmd_payload {
 };
 
 /**
- * Data passed from driver to FW in a DMUB_CMD__DPIA_SET_CONFIG_ACCESS command.
+ * Data passed from driver to FW in a DMUB_CMD__DPIA_SET_CONFIG_ACCESS 
command. (deprecated)
  */
 struct dmub_cmd_set_config_control_data {
struct set_config_cmd_payload cmd_pkt;
@@ -2208,6 +2209,17 @@ struct dmub_cmd_set_config_control_data {
uint8_t immed_status; /* Immediate status returned in case of error */
 };
 
+/**
+ * SET_CONFIG Request Command Payload
+ */
+struct set_config_request_cmd_payload {
+   uint8_t instance; /* DPIA instance */
+   uint8_t immed_status; /* Immediate status returned in case of error */
+   uint8_t msg_type; /* set config message type */
+   uint8_t reserved;
+   uint32_t msg_data; /* set config message data */
+};
+
 /**
  * DMUB command structure for SET_CONFIG command.
  */
@@ -2216,6 +2228,14 @@ struct dmub_rb_cmd_set_config_access {
struct dmub_cmd_set_config_control_data set_config_control; /* set 
config data */
 };
 
+/**
+ * DMUB command structure for SET_CONFIG request command.
+ */
+struct dmub_rb_cmd_set_config_request {
+   struct dmub_cmd_header header; /* header */
+   struct set_config_request_cmd_payload payload; /* set config request 
payload */
+};
+
 /**
  * Data passed from driver to FW in a DMUB_CMD__DPIA_MST_ALLOC_SLOTS command.
  */
@@ -4410,10 +4430,38 @@ struct dmub_cmd_abm_set_backlight_data {
 */
uint8_t panel_mask;
 
+   /**
+* Backlight control type.
+* Value 0 is PWM backlight control.
+* Value 1 is VAUX backlight control.
+* Value 2 is AMD DPCD AUX backlight control.
+*/
+   uint8_t backlight_control_type;
+
/**
 * Explicit padding to 4 byte boundary.
 */
-   uint8_t pad[2];
+   uint8_t pad[1];
+
+   /**
+* Minimum luminance in nits.
+*/
+   uint32_t min_luminance;
+
+   /**
+* Maximum luminance in nits.
+*/
+   uint32_t max_luminance;
+
+   /**
+* Minimum backlight in pwm.
+*/
+   uint32_t min_backlight_pwm;
+
+   /**
+* Maximum backlight in pwm.
+*/
+   uint32_t max_backlight_pwm;
 };
 
 /**
@@ -5413,7 +5461,11 @@ union dmub_rb_cmd {
/**
 * Definition of a DMUB_CMD__DPIA_SET_CONFIG_ACCESS command.
 */
-   struct dmub_rb_cmd_set_config_access set_config_access;
+   struct dmub_rb_cmd_set_config_access set_config_access; // (deprecated)
+   /**
+* Definition of a DMUB_CMD__DPIA_SET_CONFIG_ACCESS command.
+*/
+   struct dmub_rb_cmd_set_config_request set_config_request;
/**
 * Definition of a DMUB_CMD__DPIA_MST_ALLOC_SLOTS command.
 */
-- 
2.34.1

[PATCH 13/13] drm/amd/display: 3.2.303

From: Aric Cyr 

DC 3.2.303 contains some improvements as summarized below:
* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup

Signed-off-by: Aric Cyr 
Signed-off-by: Fangzhi Zuo 
---
 drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 059e5f4ede49..d80c91eddc75 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -55,7 +55,7 @@ struct aux_payload;
 struct set_config_cmd_payload;
 struct dmub_notification;
 
-#define DC_VER "3.2.302"
+#define DC_VER "3.2.303"
 
 #define MAX_SURFACES 3
 #define MAX_PLANES 6
-- 
2.34.1

[PATCH 0/5] drm: Introduce DRM client library

With the next DRM client coming soon (drm_log) and most of DRM's
fbdev emulation consolidated in a few places, it's time to provide
a single place for the clients.

The new module drm_client_lib.ko stores most of the common client
code. It's designed such that drivers can opt into client support,
but the presence of the client module depends on the user's kernel
configuration. Without selected clients, no client module will be
build.

Thomas Zimmermann (5):
  drm/i915: Select DRM_CLIENT_SELECTION
  drm/xe: Select DRM_CLIENT_SELECTION
  drm: Move client-device functions in to drm_client_dev.c
  drm: Select fbdev helpers for modules that require them
  drm: Add client-lib module

 Documentation/gpu/drm-client.rst   |   3 +
 drivers/gpu/drm/Kconfig|  34 +--
 drivers/gpu/drm/Makefile   |  20 +++--
 drivers/gpu/drm/amd/amdgpu/Kconfig |   1 +
 drivers/gpu/drm/drm_client.c   | 122 +
 drivers/gpu/drm/drm_client_dev.c   | 138 +
 drivers/gpu/drm/drm_dumb_buffers.c |   2 +
 drivers/gpu/drm/drm_file.c |   2 +
 drivers/gpu/drm/drm_framebuffer.c  |   2 +
 drivers/gpu/drm/drm_gem.c  |   2 +
 drivers/gpu/drm/i915/Kconfig   |   1 +
 drivers/gpu/drm/xe/Kconfig |   1 +
 12 files changed, 196 insertions(+), 132 deletions(-)
 create mode 100644 drivers/gpu/drm/drm_client_dev.c

-- 
2.46.0

[PATCH 00/13] DC Patches Sept 23, 2024

This DC patchset brings improvements in multiple areas.
In summary, we highlight:

* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup

Cc: Daniel Wheeler 

Alex Hung (3):
  drm/amd/display: Remove always-false branches
  drm/amd/display: Eliminate recursive header inclusion
  drm/amd/display: Removed unused assignments and variables

Aric Cyr (1):
  drm/amd/display: 3.2.303

Dillon Varone (1):
  drm/amd/display: Configure DTBCLK_P with OPTC only for dcn401

Liu, Xi (Alex) (1):
  drm/amd/display: add more support for UHBR10 eDP

Muyuan Yang (2):
  drm/amd/display: Change Brightness Control Priority
  drm/amd/display: Introduce New ABC Framework for Brightness Control

Ovidiu Bunea (1):
  drm/amd/display: Add IPS residency capture helpers to dc_dmub_srv

Paul Hsieh (1):
  drm/amd/display: Add logs to record register read/write

Ryan Seto (1):
  drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS

Taimur Hassan (1):
  drm/amd/display: [FW Promotion] Release 0.0.236.0

Tom Chung (1):
  drm/amd/display: Fix system hang while resume with TBT monitor

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   9 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  48 +
 drivers/gpu/drm/amd/display/dc/dc.h   |   4 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |  78 
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |  39 
 drivers/gpu/drm/amd/display/dc/dc_plane.h |   1 -
 drivers/gpu/drm/amd/display/dc/dc_state.h |   1 -
 drivers/gpu/drm/amd/display/dc/dc_types.h |   6 +
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  |  84 
 .../dc/dml/dcn30/display_mode_vba_30.c|   9 -
 .../display/dc/dml/dml1_display_rq_dlg_calc.c |   3 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 187 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |  11 ++
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |   6 +-
 .../link/protocols/link_edp_panel_control.c   |  43 ++--
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |   8 +
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   | 157 ++-
 .../drm/amd/display/include/logger_types.h|   4 +-
 18 files changed, 521 insertions(+), 177 deletions(-)

-- 
2.34.1

[PATCH v2 2/5] drm/amdgpu: update the handle ptr in late_init

Update the ptr handle to amdgpu_ip_block ptr in all
the functions of late_init function ptr.

Signed-off-by: Sunil Khatri 
---
 drivers/gpu/drm/amd/amdgpu/aldebaran.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/mes_v12_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/nv.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c  |  4 ++--
 drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/soc15.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc21.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/soc24.c|  4 ++--
 drivers/gpu/drm/amd/amdgpu/vi.c   |  4 ++--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  4 ++--
 drivers/gpu/drm/amd/include/amd_shared.h  |  2 +-
 drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c|  4 ++--
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c|  4 ++--
 drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c  |  4 ++--
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |  6 +++---
 34 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c 
b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
index 98fb0ba4f9cb..574aeca993e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
@@ -304,7 +304,7 @@ static int aldebaran_mode2_restore_ip(struct amdgpu_device 
*adev)
 
if (adev->ip_blocks[i].version->funcs->late_init) {
r = adev->ip_blocks[i].version->funcs->late_init(
-   (void *)adev);
+   &adev->ip_blocks[i]);
if (r) {
dev_err(adev->dev,
"late_init of IP block <%s> failed %d 
after reset\n",
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 5aeea2aed323..e6e98b189072 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3196,7 +3196,7 @@ static int amdgpu_device_ip_late_init(struct 
amdgpu_device *adev)
if (!adev->ip_blocks[i].status.hw)
continue;
if (adev->ip_blocks[i].version->funcs->late_init) {
-   r = adev->ip_blocks[i].version->funcs->late_init((void 
*)adev);
+   r = 
adev->ip_blocks[i].version->funcs->late_init(&adev->ip_blocks[i]);
if (r) {
DRM_ERROR("late_init of IP block <%s> failed 
%d\n",
  
adev->ip_blocks[i].version->funcs->name, r);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
index d7e377341367..74b1ec10be2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
@@ -784,9 +784,9 @@ static int umsch_mm_early_init(struct amdgpu_ip_block 
*ip_block)
return 0;
 }
 
-static int umsch_mm_late_init(void *handle)
+static int umsch_mm_late_init(struct amdgpu_ip_block *ip_block)
 {
-   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+   struct amdgpu_device *adev = ip_block->adev;
 
if (amdgpu_in_reset(adev) || adev->in_s0ix || adev->in_suspend)
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 3d0969a7ba69..8008dbd24967 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -7722,9 +7722,9 @@ static int gfx_v10_0_early_init(struct amdgpu_ip_block 
*ip_block)
return gfx_v10_0_init_microcode(adev);
 }
 
-static int gfx_v10_0_late_init(void *handle)
+static int gfx_v10_0_late_init(str

[PATCH v8 0/5] drm/amd/display: Use drm_edid for more code

From: Mario Limonciello 

This is the successor of Melissa's v5 series that was posted [1] as well
as my series that was posted [2].

Melissa's patches are mostly unmodified from v5, but the series has been
rebase on the new 6.10 based amd-staging-drm-next.

As were both touching similar code for fetching the EDID, I've merged the
pertinent parts of my series into this one in allowing the connector to
fetch the EDID from _DDC if available for eDP as well.

There are still some remaining uses of drm_edid_raw() but they touch pure
DC code, so a wrapper or macro will probably be needed to convert them.
This can be for follow ups later on.

Link: https://lore.kernel.org/amd-gfx/20240807203207.2830-1-m...@igalia.com/ [1]
Link: 
https://lore.kernel.org/dri-devel/20240214215756.6530-1-mario.limoncie...@amd.com/
 [2]

v8:
 * Drop patches 5-9 as they cause regressions and will be future followups
 * Rebase patch 10 on patches 1-4

Mario Limonciello (1):
  drm/amd/display: Fetch the EDID from _DDC if available for eDP

Melissa Wen (4):
  drm/amd/display: switch amdgpu_dm_connector to use struct drm_edid
  drm/amd/display: switch to setting physical address directly
  drm/amd/display: always call connector_update when parsing
freesync_caps
  drm/amd/display: remove redundant freesync parser for DP

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 195 ++
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   4 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  76 ++-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  34 +--
 drivers/gpu/drm/amd/include/amd_shared.h  |   5 +
 5 files changed, 153 insertions(+), 161 deletions(-)

-- 
2.43.0

[PATCH v8 1/5] drm/amd/display: switch amdgpu_dm_connector to use struct drm_edid

From: Melissa Wen 

Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.

Signed-off-by: Melissa Wen 
Co-developed-by: Mario Limonciello 
Signed-off-by: Mario Limonciello 
---
v7: fix LKP robot issue
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 123 --
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   4 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  13 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  34 ++---
 4 files changed, 84 insertions(+), 90 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6f4b753f5f51..b7d93787667c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3487,7 +3487,7 @@ void amdgpu_dm_update_connector_after_detect(
aconnector->dc_sink = sink;
dc_sink_retain(aconnector->dc_sink);
amdgpu_dm_update_freesync_caps(connector,
-   aconnector->edid);
+   aconnector->drm_edid);
} else {
amdgpu_dm_update_freesync_caps(connector, NULL);
if (!aconnector->dc_sink) {
@@ -3546,18 +3546,19 @@ void amdgpu_dm_update_connector_after_detect(
aconnector->dc_sink = sink;
dc_sink_retain(aconnector->dc_sink);
if (sink->dc_edid.length == 0) {
-   aconnector->edid = NULL;
+   aconnector->drm_edid = NULL;
if (aconnector->dc_link->aux_mode) {
drm_dp_cec_unset_edid(
&aconnector->dm_dp_aux.aux);
}
} else {
-   aconnector->edid =
-   (struct edid *)sink->dc_edid.raw_edid;
+   const struct edid *edid = (const struct edid 
*)sink->dc_edid.raw_edid;
+
+   aconnector->drm_edid = drm_edid_alloc(edid, 
sink->dc_edid.length);
+   drm_edid_connector_update(connector, 
aconnector->drm_edid);
 
if (aconnector->dc_link->aux_mode)
-   drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,
-   aconnector->edid);
+   drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, 
edid);
}
 
if (!aconnector->timing_requested) {
@@ -3568,17 +3569,18 @@ void amdgpu_dm_update_connector_after_detect(
"failed to create 
aconnector->requested_timing\n");
}
 
-   drm_connector_update_edid_property(connector, aconnector->edid);
-   amdgpu_dm_update_freesync_caps(connector, aconnector->edid);
+   drm_edid_connector_update(connector, aconnector->drm_edid);
+   amdgpu_dm_update_freesync_caps(connector, aconnector->drm_edid);
update_connector_ext_caps(aconnector);
} else {
drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
amdgpu_dm_update_freesync_caps(connector, NULL);
-   drm_connector_update_edid_property(connector, NULL);
+   drm_edid_connector_update(connector, NULL);
aconnector->num_modes = 0;
dc_sink_release(aconnector->dc_sink);
aconnector->dc_sink = NULL;
-   aconnector->edid = NULL;
+   drm_edid_free(aconnector->drm_edid);
+   aconnector->drm_edid = NULL;
kfree(aconnector->timing_requested);
aconnector->timing_requested = NULL;
/* Set CP to DESIRED if it was ENABLED, so we can re-enable it 
again on hotplug */
@@ -7105,32 +7107,24 @@ static void amdgpu_dm_connector_funcs_force(struct 
drm_connector *connector)
struct amdgpu_dm_connector *aconnector = 
to_amdgpu_dm_connector(connector);
struct dc_link *dc_link = aconnector->dc_link;
struct dc_sink *dc_em_sink = aconnector->dc_em_sink;
-   struct edid *edid;
-   struct i2c_adapter *ddc;
-
-   if (dc_link && dc_link->aux_mode)
-   ddc = &aconnector->dm_dp_aux.aux.ddc;
-   else
-   ddc = &aconnector->i2c->base;
+   const struct drm_edid *drm_edid;
 
-   /*
-* Note: drm_get_edid gets edid in the following order:
-* 1) override EDID if set via edid_override debugfs,
-* 2) firmware EDID if set via edid_firmware module parameter
-* 3) regular DDC read.
-*/
-   edid = drm_get_edid(connector, ddc);
-   if (!edid) {
+   drm_edid = drm_edid_read(connector);
+

[PATCH v8 2/5] drm/amd/display: switch to setting physical address directly

From: Melissa Wen 

Connectors have source physical address available in display
info. Use drm_dp_cec_attach() to use it instead of parsing the EDID
again.

Signed-off-by: Melissa Wen 
Signed-off-by: Mario Limonciello 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b7d93787667c..0b6c936be7a6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3548,8 +3548,7 @@ void amdgpu_dm_update_connector_after_detect(
if (sink->dc_edid.length == 0) {
aconnector->drm_edid = NULL;
if (aconnector->dc_link->aux_mode) {
-   drm_dp_cec_unset_edid(
-   &aconnector->dm_dp_aux.aux);
+   
drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
}
} else {
const struct edid *edid = (const struct edid 
*)sink->dc_edid.raw_edid;
@@ -3558,7 +3557,8 @@ void amdgpu_dm_update_connector_after_detect(
drm_edid_connector_update(connector, 
aconnector->drm_edid);
 
if (aconnector->dc_link->aux_mode)
-   drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, 
edid);
+   drm_dp_cec_attach(&aconnector->dm_dp_aux.aux,
+ 
connector->display_info.source_physical_address);
}
 
if (!aconnector->timing_requested) {
-- 
2.43.0

[PATCH v8 4/5] drm/amd/display: remove redundant freesync parser for DP

From: Melissa Wen 

When updating connector under drm_edid infrastructure, many calculations
and validations are already done and become redundant inside AMD driver.
Remove those driver-specific code in favor of the DRM common code.

Signed-off-by: Melissa Wen 
Co-developed-by: Mario Limonciello 
Signed-off-by: Mario Limonciello 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 74 +--
 1 file changed, 4 insertions(+), 70 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index efc1609ff26f..bd8fb9968c7c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -12064,9 +12064,6 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
const struct drm_edid *drm_edid)
 {
int i = 0;
-   const struct detailed_timing *timing;
-   const struct detailed_non_pixel *data;
-   const struct detailed_data_monitor_range *range;
struct amdgpu_dm_connector *amdgpu_dm_connector =
to_amdgpu_dm_connector(connector);
struct dm_connector_state *dm_con_state = NULL;
@@ -12093,8 +12090,6 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
 
amdgpu_dm_connector->min_vfreq = 0;
amdgpu_dm_connector->max_vfreq = 0;
-   connector->display_info.monitor_range.min_vfreq = 0;
-   connector->display_info.monitor_range.max_vfreq = 0;
freesync_capable = false;
 
goto update;
@@ -12114,67 +12109,10 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
 
if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
 sink->sink_signal == SIGNAL_TYPE_EDP)) {
-   bool edid_check_required = false;
-
-   if (amdgpu_dm_connector->dc_link &&
-   
amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) {
-   if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) {
-   amdgpu_dm_connector->min_vfreq = 
connector->display_info.monitor_range.min_vfreq;
-   amdgpu_dm_connector->max_vfreq = 
connector->display_info.monitor_range.max_vfreq;
-   if (amdgpu_dm_connector->max_vfreq -
-   amdgpu_dm_connector->min_vfreq > 10)
-   freesync_capable = true;
-   } else {
-   edid_check_required = edid->version > 1 ||
- (edid->version == 1 &&
-  edid->revision > 1);
-   }
-   }
-
-   if (edid_check_required) {
-   for (i = 0; i < 4; i++) {
-
-   timing  = &edid->detailed_timings[i];
-   data= &timing->data.other_data;
-   range   = &data->data.range;
-   /*
-* Check if monitor has continuous frequency 
mode
-*/
-   if (data->type != EDID_DETAIL_MONITOR_RANGE)
-   continue;
-   /*
-* Check for flag range limits only. If flag == 
1 then
-* no additional timing information provided.
-* Default GTF, GTF Secondary curve and CVT are 
not
-* supported
-*/
-   if (range->flags != 1)
-   continue;
-
-   connector->display_info.monitor_range.min_vfreq 
= range->min_vfreq;
-   connector->display_info.monitor_range.max_vfreq 
= range->max_vfreq;
-
-   if (edid->revision >= 4) {
-   if (data->pad2 & 
DRM_EDID_RANGE_OFFSET_MIN_VFREQ)
-   
connector->display_info.monitor_range.min_vfreq += 255;
-   if (data->pad2 & 
DRM_EDID_RANGE_OFFSET_MAX_VFREQ)
-   
connector->display_info.monitor_range.max_vfreq += 255;
-   }
-
-   amdgpu_dm_connector->min_vfreq =
-   
connector->display_info.monitor_range.min_vfreq;
-   amdgpu_dm_connector->max_vfreq =
-   
connector->display_info.monitor_range.max_vfreq;
-
-   break;
-

[PATCH v8 3/5] drm/amd/display: always call connector_update when parsing freesync_caps

From: Melissa Wen 

Update connector caps with drm_edid data before parsing info for
freesync.

Signed-off-by: Melissa Wen 
Signed-off-by: Mario Limonciello 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0b6c936be7a6..efc1609ff26f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3569,13 +3569,11 @@ void amdgpu_dm_update_connector_after_detect(
"failed to create 
aconnector->requested_timing\n");
}
 
-   drm_edid_connector_update(connector, aconnector->drm_edid);
amdgpu_dm_update_freesync_caps(connector, aconnector->drm_edid);
update_connector_ext_caps(aconnector);
} else {
drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
amdgpu_dm_update_freesync_caps(connector, NULL);
-   drm_edid_connector_update(connector, NULL);
aconnector->num_modes = 0;
dc_sink_release(aconnector->dc_sink);
aconnector->dc_sink = NULL;
@@ -12088,6 +12086,8 @@ void amdgpu_dm_update_freesync_caps(struct 
drm_connector *connector,
amdgpu_dm_connector->dc_sink :
amdgpu_dm_connector->dc_em_sink;
 
+   drm_edid_connector_update(connector, drm_edid);
+
if (!drm_edid || !sink) {
dm_con_state = to_dm_connector_state(connector->state);
 
-- 
2.43.0

[PATCH v8 5/5] drm/amd/display: Fetch the EDID from _DDC if available for eDP