> Am 03.05.2023 um 23:25 schrieb Fabio Estevam :
>
> --- a/configs/imx8qm_dmsse20a1_defconfig
> +++ b/configs/imx8qm_dmsse20a1_defconfig
> @@ -16,6 +16,7 @@ CONFIG_SPL_SERIAL=y
> CONFIG_SPL_DRIVERS_MISC=y
> CONFIG_ENV_OFFSET=0x8
> CONFIG_ENV_SECT_SIZE=0x2
> +CONFIG_SPL_STACK=0x13e000
> C
On 04.05.23 08:13, Neha Malcom Francis wrote:
> Hi Jan
>
> On 04/05/23 10:13, Neha Malcom Francis wrote:
>> Hi Jan,
>>
>> On 03/05/23 22:04, Jan Kiszka wrote:
>>> On 03.05.23 14:56, Neha Malcom Francis wrote:
Hi Jan,
On 03/05/23 12:57, Neha Malcom Francis wrote:
> Hi Tom
>
>
On 5/4/23 00:52, Marek Vasut wrote:
On 5/2/23 18:13, Tim Harvey wrote:
On Mon, May 1, 2023 at 11:51 PM Eugen Hristev
wrote:
regulator_set_enable_if_allowed already handles cases when the
regulator is already enabled, or already disabled, and does not
treat these as errors.
With this change, t
Hi Simon,
On 19/04/23 09:32, Simon Glass wrote:
When video is set up in SPL, U-Boot proper needs to use the correct
parameters so it can write to the display.
Put these in a bloblist so they are available to U-Boot proper.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/pci/p
Hi Simon,
On Wed, May 3, 2023 at 6:58 AM Simon Glass wrote:
>
> Hi Mayuresh,
>
> On Tue, 2 May 2023 at 10:19, Mayuresh Chitale
> wrote:
> >
> > Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
> > for SPL which is required to auto configure the PCIe devices.
> >
> > Signed-o
Hi Simon,
On Wed, May 3, 2023 at 6:58 AM Simon Glass wrote:
>
> Hi Mayuresh,
>
> On Tue, 2 May 2023 at 10:19, Mayuresh Chitale
> wrote:
> >
> > Add support to load the next stage image from an NVMe disk which may
> > be formatted as an EXT or FAT filesystem.
> >
> > Signed-off-by: Mayuresh Chit
Hi
>
> This series aims to eliminate the use of additional custom repositories
> such as k3-image-gen (K3 Image Generation) repo and core-secdev-k3 (K3
> Security Development Tools) that was plumbed into the U-Boot build flow
> to generate boot images for TI K3 platform devices. And instead, we mo
Three unused macros were left over. Remove them.
Signed-off-by: Christophe Leroy
---
board/cssi/cmpcpro/cmpcpro.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index 3e9ba6a4cc..8a30c48e35 100644
--- a/board/cssi/cmpcpro/cmpcp
A duplicated FPGA loading sequence appears after FPGA reset.
Remove it.
Fixes: dac3c6f625 ("board: cssi: Add new board MCR3000_2G")
Signed-off-by: Christophe Leroy
---
board/cssi/cmpc885/cmpc885.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/board/cssi/cmpc885/cmpc885.c b/
This series adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.
Christophe Leroy (10):
board: cssi: Remove duplicated FPGA loading sequence on CMPC885
board: cssi: Remove stale macro from cmpcpro.c
board: cssi: Lo
When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.
In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.
Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is
In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().
This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.
Console is not available ye
MPC885 CPU has the following ERRATA:
When the USB controller is configured in Host mode, and the
SOF generation (SFTE=1 in USMOD register) is being used,
there may be false CRC error indication in other SCCs.
Although the data is received correctly, the CRC result
With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.
Remove dparam and dparam16 members of struct comm_proc
PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.
Signed-off-by
In order to use QMC mode in the CPM, a SCC requires more space
in parameter RAM.
After SCC1 there is I2C parameter RAM and after SCC2 there is
SPI parameter RAM. MPC866 and MPC885 can already relocate I2C and.
SPI parameter RAM.
But in order to free space after SCC3 and SCC4, SMC1 and SMC2
need t
Instead of inhibiting parameter RAM relocation, take it into account.
Signed-off-by: Christophe Leroy
---
drivers/spi/mpc8xx_spi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 734b0751a9..5c8d760935 100644
---
Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.
At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.
For the time being we are not goin
Instead of inhibiting parameter RAM relacation, take
into account the configured one.
It means INIT_TRX command cannot be used and must be done
manually as explained in the microcode patch application note.
Signed-off-by: Christophe Leroy
---
drivers/serial/serial_mpc8xx.c | 22 +++-
On Sun, 30 Apr 2023 23:20:35 +0200
Marek Vasut wrote:
> In case NET networking is not enabled, it is not possible to compile
> the USB ethernet gadget. Protect the symbols in Makefile to avoid
> build failure. Such build failure may occur e.g. in case NET and USB
> ethernet gadget is enabled in U
Hi Christian
On 04/05/23 14:08, Christian Gmeiner wrote:
Hi
This series aims to eliminate the use of additional custom repositories
such as k3-image-gen (K3 Image Generation) repo and core-secdev-k3 (K3
Security Development Tools) that was plumbed into the U-Boot build flow
to generate boot i
On 5/4/23 11:04, Lukasz Majewski wrote:
On Sun, 30 Apr 2023 23:20:35 +0200
Marek Vasut wrote:
In case NET networking is not enabled, it is not possible to compile
the USB ethernet gadget. Protect the symbols in Makefile to avoid
build failure. Such build failure may occur e.g. in case NET and
This patchset adds support to load images of the SPL's next booting stage from
a NVMe device.
Changes in v3:
- Add generic API to fetch payload from Ext or FAT filesystems
- Remove reduntant SPL_PCI_PNP config check
Changes in v2:
- Rebase on v2023.07-rc1
- Use uclass ID for blk APIs
- Add suppo
Add kconfig options to enable NVME and PCI NVMe support in SPL
Signed-off-by: Mayuresh Chitale
---
common/spl/Kconfig | 21 +
1 file changed, 21 insertions(+)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2c042ad306..515e8f2c66 100644
--- a/common/spl/Kconfig
++
Add a generic API to support loading of SPL payload from EXT or FAT
filesystem on a given partition of a block device.
Signed-off-by: Mayuresh Chitale
---
common/spl/Makefile | 1 +
common/spl/spl_blk_fs.c | 54 +
drivers/block/Kconfig | 7 ++
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
for SPL which is required to auto configure the PCIe devices.
Signed-off-by: Mayuresh Chitale
---
drivers/Makefile | 1 +
drivers/nvme/Makefile | 2 +-
drivers/pci/Kconfig | 7 +++
3 files changed, 9 insertions(+), 1
Detect a FIT when loading from an ext File system and handle it using
the FIT SPL support.
Signed-off-by: Mayuresh Chitale
---
common/spl/spl_ext.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index f117c630bf.
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.
Signed-off-by: Mayuresh Chitale
---
arch/riscv/include/asm/spl.h | 1 +
common/spl/Kconfig | 10 ++
common/spl/Makefile | 1 +
common/spl/spl_nvme.c
On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote:
> Using SMC relocation microcode patch or USB-SOF microcode patch
> will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
> to 0x3000.
>
> At the time being, init RAM is setup to use 0x2800-0x2e00, but
> the stack pointer goes be
Le 04/05/2023 à 12:07, Joakim Tjernlund a écrit :
> On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote:
>> Using SMC relocation microcode patch or USB-SOF microcode patch
>> will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
>> to 0x3000.
>>
>> At the time being, init RAM is s
From: Fabio Estevam
Currently, building imx8qm_dmsse20a1_defconfig leads to the following
warning:
aarch64-linux-ld.bfd: invalid origin for memory region .sdram
Fix it by using the same SPL memory layout as done in the imx8mq_evk.
Reported-by: Tom Rini
Signed-off-by: Fabio Estevam
Tested-by:
Hi Rob,
On Wed, May 03, 2023 at 12:24:39PM -0500, Rob Herring wrote:
> On Wed, May 3, 2023 at 9:37 AM Ilias Apalodimas
> wrote:
> >
> > Hi Krzysztof,
> >
> > On Tue, Apr 11, 2023 at 07:38:11AM +0200, Krzysztof Kozlowski wrote:
> > > On 11/04/2023 01:21, jaswinder.si...@linaro.org wrote:
> > > > F
Dear Tom,
The following changes since commit 2440719d258a97824395532cb4a775752b423f63:
Merge tag 'u-boot-imx-20230503' of
https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2023-05-03 13:15:12
-0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-bo
On Thu, 2023-05-04 at 10:17 +, Christophe Leroy wrote:
>
> Le 04/05/2023 à 12:07, Joakim Tjernlund a écrit :
> > On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote:
> > > Using SMC relocation microcode patch or USB-SOF microcode patch
> > > will disable DPRAM memory from 0x2000 to 0x240
The idea in 3609e1dc5f4d (dts: automatically build necessary .dtb
files) was fine, but the implementation was suboptimal due to some
misunderstandings on my part (and possibly defects in some defconfig
files):
- Sometimes DEFAULT_DEVICE_TREE is not included in OF_LIST or
SPL_OF_LIST
- SPL_OF_LI
On 5/4/23 10:12, Eugen Hristev wrote:
On 5/4/23 00:52, Marek Vasut wrote:
On 5/2/23 18:13, Tim Harvey wrote:
On Mon, May 1, 2023 at 11:51 PM Eugen Hristev
wrote:
regulator_set_enable_if_allowed already handles cases when the
regulator is already enabled, or already disabled, and does not
tre
Hello Simon,
I've tried out successfully the option (with BOOTSTD_FULL, with BOOTSTD_DEFAULT
it's not possible to boot) and will provide a changed patch set soon.
Mit freundlichen Grüßen / Best regards
Thomas Mittelstaedt
Cross-Domain Computing Solutions
> -Ursprüngliche Nachricht-
This patch series is for building Xen target with Clang.
The first patch is to fix building failure for Xen target, the second
patch is to add info for a linkage known issue when use Clang as
compiler.
Leo Yan (2):
arm64: Remove duplicated symbols
doc: Add info for building Xen target with C
When build U-boot with clang with using commands:
$ make HOSTCC=clang xenguest_arm64_defconfig
$ make HOSTCC=clang CROSS_COMPILE=aarch64-linux-gnu- \
CC="clang -target aarch64-linux-gnueabi" -j8
The compiler reports error:
/tmp/start-acdf31.s:330:1: error: symbol '_start' i
When build Xen target with Clang, the linker reports failure.
This patch adds the related info in the documentation as a known issue
and gives details for how to dismiss the building failure with Clang.
Signed-off-by: Leo Yan
---
doc/build/clang.rst | 36
1
On 5/4/23 14:41, Marek Vasut wrote:
On 5/4/23 10:12, Eugen Hristev wrote:
On 5/4/23 00:52, Marek Vasut wrote:
On 5/2/23 18:13, Tim Harvey wrote:
On Mon, May 1, 2023 at 11:51 PM Eugen Hristev
wrote:
regulator_set_enable_if_allowed already handles cases when the
regulator is already enabled,
On 5/4/23 13:51, Eugen Hristev wrote:
On 5/4/23 14:41, Marek Vasut wrote:
On 5/4/23 10:12, Eugen Hristev wrote:
On 5/4/23 00:52, Marek Vasut wrote:
On 5/2/23 18:13, Tim Harvey wrote:
On Mon, May 1, 2023 at 11:51 PM Eugen Hristev
wrote:
regulator_set_enable_if_allowed already handles cases
hi Ilias,
On Thu, 4 May 2023 at 16:15, Ilias Apalodimas
wrote:
>
> Hi Rob,
>
> On Wed, May 03, 2023 at 12:24:39PM -0500, Rob Herring wrote:
> > On Wed, May 3, 2023 at 9:37 AM Ilias Apalodimas
> > wrote:
> > >
> > > Hi Krzysztof,
> > >
> > > On Tue, Apr 11, 2023 at 07:38:11AM +0200, Krzysztof Koz
[...]
> > > I'm assuming it's per partition type rather than storage medium (e.g.
> > > SATA, USB, SD, NAND, SPI-NOR)? GPT, 'fixed-partitions', other DT
> > > partition bindings, etc. If so, then I'm really wondering why it's a
> > > standalone tree rather than integrated into those existing par
of_property_match_string calls of_find_property to search for the
string property.
If the device node does not exist, of_find_property returns NULL, and
of_property_match_string returns -EINVAL, which is correct.
However, if the device node exists, but the property is not found,
of_find_property st
[Linux commit b8fc5b2157b1]
If dtc is rebuilt, we should rebuild .dtb files with the new dtc.
[Import notes: Back then there was no .dtbo rule in Linux's
Makefile.lib, but the current .dtbo rules in Linux also have the
$(DTC) dependency, so also add it to our .dtbo rule.]
Signed-off-by: Rasmus V
[Linux commit 363547d2191c]
Currently DTB Overlays (.dtbo) are build from source files with the same
extension (.dts) as the base DTs (.dtb). This may become confusing and
even lead to wrong results. For example, a composite DTB (created from a
base DTB and a set of overlays) might have the same n
On 03/05/2023 16.54, Tom Rini wrote:
> On Wed, May 03, 2023 at 09:51:58AM -0400, Tom Rini wrote:
>> On Mon, May 01, 2023 at 10:49:22AM +0200, Rasmus Villemoes wrote:
>>> On 27/04/2023 19.31, Tom Rini wrote:
>
> Well, I'm not sure there's a use case for building all of the extra
> device
On 5/1/23 15:21, Zixun Li wrote:
Hi,
Can you find some place to set this bit in the atmel sdhci driver, and not in
the core?
The MC1R register is specific to at91 device.
I've overridden get_cd of the driver, below is the patch:
From e186af71297e9ae6ce241a85bff64683949f0e1b Mon Sep 17 00:0
On Thu, May 04, 2023 at 09:42:54AM +0530, Neha Malcom Francis wrote:
> Hi Tom,
>
> On 03/05/23 18:34, Tom Rini wrote:
> > On Wed, May 03, 2023 at 11:27:20AM +0530, Neha Malcom Francis wrote:
> > > Hi Tom
> > >
> > > Thanks for these patches!
> > >
> > > On 27/04/23 01:14, Tom Rini wrote:
> > > >
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> When U-Boot did not do the MP init, we don't get an actual CPU number
> here. Skip printing it in that case.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Don't show an invalid CPU number on error
>
>
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> Avoid searching starting at 0 since this memory may not be available,
> e.g. if protection against NULL-pointer access is enabled. The table
> cannot be there anyway, since the first 1KB of memory was originally
> used for the interrupt table
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> We have several Kconfig options for ACPI, but all relate to specific
> functions, such as generating tables and AML code.
>
> Add a new option which controls including basic ACPI library code,
> including the lib/acpi directory. This will all
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> This is useful for other features. Move the function into library code
> so it can be used outside just the 'acpi' command.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Avoid a build error with the ASL compiler
>
> Changes in
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> If U-Boot is not the first-stage bootloader the keyboard may already be
> set up. Make sure to flush any data before trying to reset it. This
> avoids a long timeout / hang.
>
> Add some comments and a log category while we are here.
>
> Sign
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> When coreboot does not pass a UART in its sysinfo struct, there is no
> easy way to find it out.
>
> Since coreboot does not actually init the serial device when serial is
> disabled, it is not possible to make it add this information to the
On Sun, Apr 2, 2023 at 6:52 PM Christian Gmeiner
wrote:
>
> >
> > When U-Boot is the second-stage bootloader, PCI is already set up. We
> > cannot read the regions from the device tree. There is no point anyway,
> > since PCI devices have already been allocated according to the regions
> > and it
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> This is much more common on modern hardware, so default to using it.
>
> This does not affect the normal UART, but does allow the debug UART to
> work, since it uses serial_out_shift(), etc.
>
> Signed-off-by: Simon Glass
> ---
>
> (no chang
On Thu, May 4, 2023 at 9:18 PM Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Mar 27, 2023 at 12:17 PM Simon Glass wrote:
> >
> > Enable support for NVMe storage devices. Update the driver to enable the
> > bus master bit, since coreboot does not do that automatically.
> >
> > Signed-off-by: Simon Gla
Hi Simon,
On Mon, Mar 27, 2023 at 12:17 PM Simon Glass wrote:
>
> Enable support for NVMe storage devices. Update the driver to enable the
> bus master bit, since coreboot does not do that automatically.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Drop p
On Mon, Mar 27, 2023 at 12:16 PM Simon Glass wrote:
>
> At present any ACPI tables created by prior-stage firmware are ignored.
> It is useful to be able to view these in U-Boot.
>
> Pick this up from the sysinfo tables and display it with the cbsysinfo
> command. This allows the 'acpi list' comma
On Mon, Mar 27, 2023 at 12:17 PM Simon Glass wrote:
>
> This is useful when looking for tables in memory. Enable it for coreboot.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - Add new patch to enable ms command
>
> configs/coreboot_defconfig | 1 +
> 1 fil
Hi Simon,
On Mon, Mar 27, 2023 at 12:17 PM Simon Glass wrote:
>
> When coreboot does not pass a UART in its sysinfo struct, there is no
> easy way to find it out. Add a way to specify known UARTs so we can
> find them without needing help from coreboot.
>
> Since coreboot does not actually init t
On Thu, May 04, 2023 at 11:47:51AM +0530, Kumar, Udit wrote:
>
> On 5/3/2023 8:15 PM, Nishanth Menon wrote:
> > On 10:58-20230503, Udit Kumar wrote:
> > > This patch corrects the MMC raw mode sector offset as
> > > per documentation.
> > >
> > > https://software-dl.ti.com/jacinto7/esd/processor-s
Hello,
Recently, when working with the AM65x_GP_EVM development board, I found that
the U-boot source code (specifically the SPL), does not properly initialize the
DDRSS ram drivers for the AM6548. There are missing register writes that are
required from DDR to function with ECC on.
I validate
From: Thomas Mittelstaedt
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the need boot data.
Signed-off-by: Thomas Mittelstaedt
---
configs/efi-x86_payload64_defconfig | 6 --
1 file changed, 4 insertions(+)
From: Thomas Mittelstaedt
The changes are needed to get U-Boot to be started at VirtualBox
images supporting distro boot capability (scripts and extlinux.conf).
Atm the patch "pci: coreboot: Don't read regions when booting" from Simon Glass
is not integrated yet.
So AHCI and IDE devices are not h
From: Thomas Mittelstaedt
Enable bootstd support for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/bootstd.rst
This is used to boot system images at Virtualbox via
- distroboot (extlinux.conf)
- boot script
Signed-off-by: Thomas Mittelstaedt
--
From: Thomas Mittelstaedt
The problem was, that zboot() didn't work because of missing
ramdisc size.
Signed-off-by: Thomas Mittelstaedt
---
boot/pxe_utils.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index 3a1e50f2b1..87c32b6e62 1006
On Thu, May 04, 2023 at 06:15:13AM +, Christophe Leroy wrote:
>
>
> Le 03/05/2023 à 22:02, Tom Rini a écrit :
> > On Thu, Jan 26, 2023 at 07:17:48PM +0100, Christophe Leroy wrote:
> >
> >> When doing a build with C=2, the following failure is encountered on
> >> several files:
> >>
> >>
On Thu, 4 May 2023 at 07:08, Ilias Apalodimas
wrote:
> [...]
>
> > > > I'm assuming it's per partition type rather than storage medium (e.g.
> > > > SATA, USB, SD, NAND, SPI-NOR)? GPT, 'fixed-partitions', other DT
> > > > partition bindings, etc. If so, then I'm really wondering why it's a
> > > >
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> The original function was only called once, before relocation. The new
> one is called again after relocation. This was not the intend of the
intend => intent ?
> original call. Fix this by renaming and updating the calling logic.
>
> With
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> Allow symbol writing in these cases so that U-Boot can find the position
> and size of U-Boot at runtime.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 2 +-
> tools/bin
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> With tiny SPI flash the erasesize is 0 which can cause a divide-by-zero
> error. Check for this and returns a proper error instead.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> drivers/mtd/spi/sf_probe.c | 3 ++-
> 1 f
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> The 'tiny' SPI nor functions have the same name as their big brothers,
> which can be confusing. Use different names so it is clear which
> version is in the image.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> drivers/
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> The bd82x6x_get_gpio_base() does not work if the LPC is not set up.
> Probe it early to avoid this problem.
>
> In chromebook_link64 this propblem shows up as an inability to read
typo: problem
> the GPIO straps for the memory type.
>
> Sig
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> This adds a lot of code so that it cannot be build with the binary
build => built
> blobs. It is not used on this board. Drop it.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> configs/chromebook_samus_defconfig | 1 +
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> The debug UART is already set up in SPL, so there is no need to do
> anything here. We must provide the (empty) function though.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/x86/cpu/x86_64/cpu.c | 7 +++
> 1 f
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> For now, just enable the fast-but-large string functions in 32-boot
32-bit
> U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit
> builds since we only have 32-bit assembly.
>
> Signed-off-by: Simon Glass
> ---
>
> (n
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> SPL printf() does not normally support %#x so just use %x instead. Hex is
> expected in U-Boot anyway.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/x86/lib/mrccache.c | 2 +-
> 1 file changed, 1 insertion(+), 1 de
Hi Simon,
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> Show the area of memory cleared for BSS, when debugging is enabled.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/x86/lib/spl.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a
Hi Simon,
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> This function used to be for adding a list of requests to be actioned on
> relocation. Revert it back to this purpose, to avoid problems with boards
> which need control of their MTRRs (i.e. those which don't use FSP).
>
> The mtrr
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> This function is used by U-Boot proper. It does not set up MTRRs when SPL
> is enabled, but we do want this done when it is called from SPL. In fact
> it is confusing to use the same function from SPL, since there are require
> a few conditio
Hi Simon,
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> We don't need to commit the SPI-flash MTRR change immediately, since it is
> now done in the board_init_f_r(). Also this causes chromebook_link64 to
> hang.
Could you add more details as to why this causes chromebook_link64 to han
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> Use the binman symbols for this, to avoid hard-coding the value. We could
> use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to
> obtain the offset and size through the same mechanism.
>
> Signed-off-by: Simon Glass
> ---
>
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> This copies the cpu_call64() function to memory address and then jumps to
> it. This seems to work correctly even when call from SPL, which is
call => called
> running from SPI flash.
>
> Drop the copy as it is not needed.
>
> Signed-off-by
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> These are not used in TPL so disable the drivers to save space.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/x86/cpu/broadwell/Makefile | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: B
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> Move the TPL up a little to make room for the refcode binary blob. Also
> increase the pre-relocation memory to make space for recent additions.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Drop patch "x86: Add on to existing
On Sat, 22 Apr 2023 at 03:08, wrote:
>
> From: Ehsan Mohandesi
Hello, Ehsan! Good patch, but one little change is needed.
> +struct icmp6_ra_prefix_info {
> + u8 type; /* Type is 3 for Prefix Information. */
> + u8 len;/* Len is 4 for Prefix Informati
Hi Simon,
On Tue, Apr 18, 2023 at 11:31 PM Simon Glass wrote:
>
> Probing LPC can cause PCI enumeration to take place, which significantly
> increases pre-relocation memory usage. Also, LPC is somtimes enabled
typo: sometimes
> directly by SPL.
>
> Adjust the logic to probe the LPC only after r
Hi Tom,
TI has one SDK release per SoC. If we go this way we will have to release
multiple SDK release for each board. It doesn't seem feasible to release
different SDK based on same SoC as we have other boards based on AM62x SoC
which we planning to add upstream support in future. In past, we fol
On Sat, 22 Apr 2023 at 03:08, wrote:
> + if (prefix->on_link && ntohl(prefix->valid_lifetime))
> {
> + net_prefix_length = prefix->prefix_len;
> + net_gateway6 = ip6->saddr;
> + return
On Thu, May 4, 2023 at 9:01 AM Jassi Brar wrote:
>
> On Thu, 4 May 2023 at 07:08, Ilias Apalodimas
> wrote:
> > [...]
> >
> > > > > I'm assuming it's per partition type rather than storage medium (e.g.
> > > > > SATA, USB, SD, NAND, SPI-NOR)? GPT, 'fixed-partitions', other DT
> > > > > partition
On Thu, 4 May 2023 at 10:19, Rob Herring wrote:
> On Thu, May 4, 2023 at 9:01 AM Jassi Brar wrote:
>
> > I may be wrong, but I see having fwu properties contained within the
> > fwu node is cleaner than having them embedded into existing bindings
> > (potentially different classes in future). So
Hi Neha!
On April 25, 2023 thus sayeth Neha Malcom Francis:
> Update the DDR settings to those generated using 0.9.1 version of
> Jacinto 7 DDRSS Register Configuration tool.
>
> Signed-off-by: Neha Malcom Francis
> ---
> arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi | 149 ++--
>
Hi Neha!
On April 25, 2023 thus sayeth Neha Malcom Francis:
> Update the DDR settings to those generated using 0.6 version of
> Jacinto 7 DDRSS Register Configuration tool.
>
> Signed-off-by: Neha Malcom Francis
> ---
> arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi | 120 ++--
> 1
> Can't we do this in a different place?
> When we parse the DT for example. If the card is non-removable, this is
> described as a property in the DT.
> In this way you don't have to recreate all the below code from the common
> sdhci_get_cd, and you avoid rewriting the MC1R every time the get_
On Thu, May 04, 2023 at 01:16:02PM +0200, Heinrich Schuchardt wrote:
> Dear Tom,
>
> The following changes since commit 2440719d258a97824395532cb4a775752b423f63:
>
> Merge tag 'u-boot-imx-20230503' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2023-05-03 13:15:12
> -0400)
>
> are
On Sat, Apr 22, 2023 at 03:01:34PM +0200, Marek Vasut wrote:
> Add test for command bdinfo .
>
> Signed-off-by: Marek Vasut
> Reviewed-by: Simon Glass
> ---
> Cc: Jason Liu
> Cc: Michal Simek
> Cc: Ovidiu Panait
> Cc: Simon Glass
> ---
> include/test/suites.h | 1 +
> test/cmd/Makefile
On Thu, May 04, 2023 at 01:33:08PM +0200, Rasmus Villemoes wrote:
> The idea in 3609e1dc5f4d (dts: automatically build necessary .dtb
> files) was fine, but the implementation was suboptimal due to some
> misunderstandings on my part (and possibly defects in some defconfig
> files):
>
> - Sometim
On Mon, Apr 24, 2023 at 04:51:12PM -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve
>
> Fix comments syntax error in SPL_LOAD_FIT_APPLY_OVERLAY description.
>
> Signed-off-by: Hugo Villeneuve
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Descripti
1 - 100 of 235 matches
Mail list logo
